hwpstate: add CPPC support for pstate driver on AMD
Implement CPPC interface for AMD Pstate Driver.
This feature is only enabled when the CPUID shows it support CPPC.
The CPPC is implemneted by the following steps:
1. Write MSR to enable it.
2. Read capability registert which indicates binary value of levels
about lowest, best energy efficient, guarantee, and max performance.
3. Write request register with epp in energy balanced mode. And let
CPU and firmware to enter autonomous mode.
Also, create a sysctl to allow userspace to change epp value