Bhyve doesn't reset vcpus properly.- Clear CR2, EFER, Resetting a vcpu is required whenand R8-15 to zero.
- Reset DR6 and DR7 to their documented reset values.
- Reset interrupt shadow state.
- Document the reason CR0 is reset to a value that doesn't match
the guest restarts a vcpu by sending an INIT SIPI SIPI sequence to a
vcpu its documented value.