Change Details

It can be useful to see a summary of CPU caches on bootup. This is done for most platforms already, so add this to arm64, in the form of (taken from Apple M1 pro test): Per CPU cache: L1 cache: 192KB (instruction) L1 cache: 128KB (data) L2 cache: 6144KB (unified) This is printed out only once, rather than once per core, and assumed to be consistent for all cores. Future refinements could instead determine if a cache level is shared with other cores (L2 is shared among cores on some SoCs, for instance), and perform a better calculation to the full true cache sizes. Sponsored by: Juniper Networks, Inc.

It can be useful to see a summary of CPU caches on bootup. This is done for most platforms already, so add this to arm64, in the form of (taken from Apple M1 pro test): L1 cache: 192KB (instruction), 128KB (data) L2 cache: 12288KB (unified) This is printed out per-CPU, only under bootverbose. Future refinements could instead determine if a cache level is shared with other cores (L2 is shared among cores on some SoCs, for instance), and perform a better calculation to the full true cache sizes. For instance, it's known that the M1 pro, on which this test was done, has 2 12MB L2 clusters, for a total of 24MB. Seeing each CPU with 12288KB L2 would make one think that there's 12MB * NCPUs, for possibly 120MB cache, which is incorrect. Sponsored by: Juniper Networks, Inc.

It can be useful to see a summary of CPU caches on bootup. This is done for most platforms already, so add this to arm64, in the form of (taken from Apple M1 pro test): Per CPU cache: L1 cache: 192KB (instruction), 128KB (data) L1L2 cache: 128KB (data) L2 cache: 6144288KB (unified) This is printed out only onceper-CPU, rather than once per core, and assumed toonly under bootverbose. Future refinements could instead determine if a cache level is shared be consistent for allwith other cores. Future refinements could instead determine (L2 is shared among cores on some SoCs, for instance), if a cache level is shared with other cores (L2 is shared among cores onand perform a better calculation to the full true cache sizes. For some SoCsinstance, it's known that the M1 pro, for instance)on which this test was done, and perform a better calculation to the fullhas 2 true cache sizes12MB L2 clusters, for a total of 24MB. Seeing each CPU with 12288KB L2 would make one think that there's 12MB * NCPUs, for possibly 120MB cache, which is incorrect. Sponsored by: Juniper Networks, Inc.