Change Details

Data In Polarity and Blink Enable registers are set unconditionally for all GPIO pins during attach. It turned out that additional configuration may have side effects on the output pins, which was observed as a boot hang on MacchiatoBin and CN913x-DB, whose PCIE slots' reset signals are connected to the GPIO lines. Note that it only occurred when booting with FDT (both from most recent U-Boot or EDK2), whereas ACPI is unaffected since GPIO kernel driver remains unused with it. As a fix remove default configuration of GPIO_DATA_IN_POL and GPIO_BLINK_ENA registers and update them only when explicity requested - otherwise rely on the firmware settings.

Data In Polarity and Blink Enable registers are set unconditionally for all GPIO pins during attach. Update them only when explicitly requested - otherwise rely on the firmware settings.

Data In Polarity and Blink Enable registers are set unconditionally for all GPIO pins during attach. It turned out that additional configuration may have side effects Update them only when explicitly on the output pins, which was observed as a boot hang on MacchiatoBin and CN913x-DB, whose PCIE slots' reset signals are connected to the GPIO lines. Note that it only occurred when booting with FDT (both from most recent U-Boot or EDK2), whereas ACPI is unaffected since GPIO kernel driver remains unused with it. As a fix remove default configuration of GPIO_DATA_IN_POL and GPIO_BLINK_ENA registers and update them only when explicity requested - otherwise rely on the firmware settings.