This change adds support for transparent superpages for PowerPC64
systems using Hashed Page Tables (HPT). All pmap operations are
The changes were inspired by RISC-V implementation of superpages,
by @markj (r344106), but heavily adapted to fit PPC64 HPT architecture
and existing MMU OEA64 code.
While these changes are not better tested, superpages support is disabled by default.
To enable it, use `vm.pmap.sp_enabled=1`.
The focus of this initial implementation is on correctness, thus, performance is not very
good (yet). Below are the buildworld times of a POWER8 machine with 32GB RAM, with
CURRENT kernel (r362045) using GENERIC config:
- Without D25237:
`>>> World built in 6031 seconds, ncpu: 80, make -j32`
- With* Without D25237 and `vm.pmap.sp_enabled=1`::
` >>> World built in 6742031 seconds, ncpu: 80, make -j32`
* With D25237 and vm.pmap.sp_enabled=1:
>>> World built in 6742 seconds, ncpu: 80, make -j32
* With D25237 and vm.pmap.sp_enabled=0:
>>> World built in 6105 seconds, ncpu: 80, make -j32
The high count of promotion failures seem to suggest that something could be done to
reduce the number of promotion failures or to speed up the code that checks if promotion