Change Details

The Privileged ISA specification permits caching of invalid PTEs 12.2.1. Supervisor Memory-Management Fence Instruction), which may result in a spurious page fault. Such faults are handled by 'pmap_fault' which locks the kernel pmap before inspecting and possibly updating the offending L2 entry. Unfortunately, spurious faults may also occur in non-sleepable contexts (e.g., while holding a spinlock) where any attempt to grab the pmap lock will result in a kernel panic. Fix this avoidable panic by treating all kernel page faults as spurious initially, recording the faulting address, and restarting the faulting thread. A non-spurious fault will generate a subsequent fault on the same address and will get processed as a regular page fault.

The Privileged ISA specification permits caching of invalid PTEs 12.2.1. Supervisor Memory-Management Fence Instruction), which may result in a spurious page fault. Such faults are handled by 'pmap_fault' which locks the kernel pmap before inspecting and possibly updating the offending L2 entry. Unfortunately, spurious faults may also occur in non-sleepable contexts (e.g., while holding a spinlock) where any attempt to grab the pmap lock will result in a kernel panic. Fix this avoidable panic by preemptively flushing the appropriate TLB entry when inserting new PTEs into the kernel pmap.

The Privileged ISA specification permits caching of invalid PTEs 12.2.1. Supervisor Memory-Management Fence Instruction), which may result in a spurious page fault. Such faults are handled by 'pmap_fault' which locks the kernel pmap before inspecting and possibly updating the offending L2 entry. Unfortunately, spurious faults may also occur in non-sleepable contexts (e.g., while holding a spinlock) where any attempt to grab the pmap lock will result in a kernel panic. Fix this avoidable panic by treating all kernel page faults as spuriouspreemptively flushing the appropriate TLB initially, recording the faulting address, and restarting the faulting thread. A non-spurious fault will generate a subsequent fault on the same address and will get processed as a regular page faultentry when inserting new PTEs into the kernel pmap.