Change Details

https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=267654 Hyper-V storvsc driver is using bus_dma. storvsc needs physically contiguous memory which may not be the case when bus_dma needs to create a bounce buffer. This can happen when the destination is not cache-line aligned. bus_get_dma_tag is needed as the parent bus may have restrictions on the DMA of a child, e.g. to limit the usable memory.

In ARM64 Hyper-V UFS filesystem is getting corruption and those corruptions are consistently happening just after hitting a page boundary. It is unable to correctly read disk blocks into buffers that are not aligned to 512-byte boundaries. It happens because storvsc needs physically contiguous memory which may not be the case when bus_dma needs to create a bounce buffer. This can happen when the destination is not cache-line aligned. Hyper-V VMs have VMbus synthetic devices and PCI pass-thru devices that are added dynamically via the VMbus protocol and are not represented in the ACPI DSDT. Only the top level VMbus node exists in the DSDT. As such, on ARM64 these devices don't pick up coherence information and default to not hardware coherent.

https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=267654In ARM64 Hyper-V UFS filesystem is getting corruption and those corruptions are consistently happening just after hitting a page boundary. Hyper-V storvsc driver is using bus_dmaIt is unable to correctly read disk blocks into buffers that are not aligned to 512-byte boundaries. It happens because storvsc needs physically contiguous memory which may not be the case when bus_dma needs to create a bounce buffer. This can happen when the destination is not cache-line aligned. storvsc needs physically contiguous memory which may not be the case when bus_dma needs to create a bounce buffer. This can happen when the destination is not cache-line aligned.Hyper-V VMs have VMbus synthetic devices and PCI pass-thru devices that are added bus_get_dma_tag is needed as the parent bus may have restrictions odynamically via the VMbus protocol and are not represented in the DMA of a child,ACPI DSDT. e.g.Only the top level VMbus node exists in the DSDT. As such, to limit the usable memory.on ARM64 these devices don't pick up coherence information and default to not hardware coherent.