Index: head/share/man/man4/Makefile =================================================================== --- head/share/man/man4/Makefile (revision 364972) +++ head/share/man/man4/Makefile (revision 364973) @@ -1,1027 +1,1030 @@ # @(#)Makefile 8.1 (Berkeley) 6/18/93 # $FreeBSD$ .include MAN= aac.4 \ aacraid.4 \ acpi.4 \ ${_acpi_asus.4} \ ${_acpi_asus_wmi.4} \ ${_acpi_dock.4} \ ${_acpi_fujitsu.4} \ ${_acpi_hp.4} \ ${_acpi_ibm.4} \ ${_acpi_panasonic.4} \ ${_acpi_rapidstart.4} \ ${_acpi_sony.4} \ acpi_thermal.4 \ acpi_battery.4 \ ${_acpi_toshiba.4} \ acpi_video.4 \ ${_acpi_wmi.4} \ ada.4 \ adm6996fc.4 \ ads111x.4 \ ae.4 \ ${_aesni.4} \ age.4 \ agp.4 \ ahc.4 \ ahci.4 \ ahd.4 \ ${_aibs.4} \ aio.4 \ alc.4 \ ale.4 \ alpm.4 \ altera_atse.4 \ altera_avgen.4 \ altera_jtag_uart.4 \ altera_sdcard.4 \ altq.4 \ amdpm.4 \ ${_amdsbwd.4} \ ${_amdsmb.4} \ ${_amdsmn.4} \ ${_amdtemp.4} \ ${_bxe.4} \ amr.4 \ an.4 \ ${_aout.4} \ ${_apic.4} \ arcmsr.4 \ ${_asmc.4} \ at45d.4 \ ata.4 \ ath.4 \ ath_ahb.4 \ ath_hal.4 \ ath_pci.4 \ atkbd.4 \ atkbdc.4 \ atp.4 \ ${_atf_test_case.4} \ ${_atrtc.4} \ ${_attimer.4} \ audit.4 \ auditpipe.4 \ aue.4 \ axe.4 \ axge.4 \ bce.4 \ bcma.4 \ bfe.4 \ bge.4 \ ${_bhyve.4} \ bhnd.4 \ bhnd_chipc.4 \ bhnd_pmu.4 \ bhndb.4 \ bhndb_pci.4 \ blackhole.4 \ bnxt.4 \ bpf.4 \ bridge.4 \ bt.4 \ bwi.4 \ bwn.4 \ ${_bytgpio.4} \ capsicum.4 \ cardbus.4 \ carp.4 \ cas.4 \ cc_cdg.4 \ cc_chd.4 \ cc_cubic.4 \ cc_dctcp.4 \ cc_hd.4 \ cc_htcp.4 \ cc_newreno.4 \ cc_vegas.4 \ ${_ccd.4} \ ccr.4 \ cd.4 \ cdce.4 \ cdceem.4 \ cfi.4 \ cfumass.4 \ ch.4 \ chromebook_platform.4 \ ${_chvgpio.4} \ ciss.4 \ cloudabi.4 \ cmx.4 \ ${_coretemp.4} \ cp2112.4 \ ${_cpuctl.4} \ cpufreq.4 \ crypto.4 \ ctl.4 \ cue.4 \ cxgb.4 \ cxgbe.4 \ cxgbev.4 \ cyapa.4 \ da.4 \ dc.4 \ dcons.4 \ dcons_crom.4 \ ddb.4 \ devctl.4 \ disc.4 \ divert.4 \ ${_dpms.4} \ ds1307.4 \ ds3231.4 \ ${_dtrace_provs} \ dummynet.4 \ edsc.4 \ ehci.4 \ em.4 \ ena.4 \ enc.4 \ epair.4 \ esp.4 \ est.4 \ et.4 \ etherswitch.4 \ eventtimers.4 \ exca.4 \ e6060sw.4 \ fd.4 \ fdc.4 \ fdt.4 \ fdt_pinctrl.4 \ fdtbus.4 \ ffclock.4 \ filemon.4 \ firewire.4 \ full.4 \ fwe.4 \ fwip.4 \ fwohci.4 \ fxp.4 \ gbde.4 \ gdb.4 \ gem.4 \ geom.4 \ geom_linux_lvm.4 \ geom_map.4 \ geom_uzip.4 \ gif.4 \ gpio.4 \ gpioiic.4 \ gpiokeys.4 \ gpioled.4 \ gpioths.4 \ gre.4 \ h_ertt.4 \ hifn.4 \ hme.4 \ hpet.4 \ ${_hpt27xx.4} \ ${_hptiop.4} \ ${_hptmv.4} \ ${_hptnr.4} \ ${_hptrr.4} \ ${_hv_kvp.4} \ ${_hv_netvsc.4} \ ${_hv_storvsc.4} \ ${_hv_utils.4} \ ${_hv_vmbus.4} \ ${_hv_vss.4} \ hwpmc.4 \ ${_hwpstate_intel.4} \ iavf.4 \ ichsmb.4 \ ${_ichwd.4} \ icmp.4 \ icmp6.4 \ ida.4 \ if_ipsec.4 \ iflib.4 \ ifmib.4 \ ig4.4 \ igmp.4 \ iic.4 \ iic_gpiomux.4 \ iicbb.4 \ iicbus.4 \ iicmux.4 \ iicsmb.4 \ iir.4 \ ${_imcsmb.4} \ inet.4 \ inet6.4 \ intpm.4 \ intro.4 \ ${_io.4} \ ${_ioat.4} \ ip.4 \ ip6.4 \ ipfirewall.4 \ ipheth.4 \ ${_ipmi.4} \ ips.4 \ ipsec.4 \ ipw.4 \ ipwfw.4 \ isci.4 \ isl.4 \ ismt.4 \ isp.4 \ ispfw.4 \ ${_itwd.4} \ iwi.4 \ iwifw.4 \ iwm.4 \ iwmfw.4 \ iwn.4 \ iwnfw.4 \ ixgbe.4 \ ixl.4 \ jedec_dimm.4 \ jme.4 \ kbdmux.4 \ kcov.4 \ keyboard.4 \ kld.4 \ ksyms.4 \ ksz8995ma.4 \ ktr.4 \ kue.4 \ lagg.4 \ le.4 \ led.4 \ lge.4 \ ${_linux.4} \ liquidio.4 \ lm75.4 \ lo.4 \ lp.4 \ lpbb.4 \ lpt.4 \ ltc430x.4 \ mac.4 \ mac_biba.4 \ mac_bsdextended.4 \ mac_ifoff.4 \ mac_lomac.4 \ mac_mls.4 \ mac_none.4 \ mac_ntpd.4 \ mac_partition.4 \ mac_portacl.4 \ mac_seeotheruids.4 \ mac_stub.4 \ mac_test.4 \ malo.4 \ md.4 \ mdio.4 \ me.4 \ mem.4 \ meteor.4 \ mfi.4 \ miibus.4 \ mk48txx.4 \ mld.4 \ mlx.4 \ mlx4en.4 \ mlx5en.4 \ mly.4 \ mmc.4 \ mmcsd.4 \ mn.4 \ mod_cc.4 \ mos.4 \ mouse.4 \ mpr.4 \ mps.4 \ mpt.4 \ mrsas.4 \ msk.4 \ mtio.4 \ multicast.4 \ muge.4 \ mvs.4 \ mwl.4 \ mwlfw.4 \ mx25l.4 \ mxge.4 \ my.4 \ ${_ndis.4} \ net80211.4 \ netdump.4 \ netfpga10g_nf10bmac.4 \ netgdb.4 \ netgraph.4 \ netintro.4 \ netmap.4 \ ${_nfe.4} \ ${_nfsmb.4} \ ng_async.4 \ ngatmbase.4 \ ng_atmllc.4 \ ng_bpf.4 \ ng_bridge.4 \ ng_bt3c.4 \ ng_btsocket.4 \ ng_car.4 \ ng_ccatm.4 \ ng_checksum.4 \ ng_cisco.4 \ ng_deflate.4 \ ng_device.4 \ nge.4 \ ng_echo.4 \ ng_eiface.4 \ ng_etf.4 \ ng_ether.4 \ ng_ether_echo.4 \ ng_frame_relay.4 \ ng_gif.4 \ ng_gif_demux.4 \ ng_h4.4 \ ng_hci.4 \ ng_hole.4 \ ng_hub.4 \ ng_iface.4 \ ng_ipfw.4 \ ng_ip_input.4 \ ng_ksocket.4 \ ng_l2cap.4 \ ng_l2tp.4 \ ng_lmi.4 \ ng_mppc.4 \ ng_nat.4 \ ng_netflow.4 \ ng_one2many.4 \ ng_patch.4 \ ng_pipe.4 \ ng_ppp.4 \ ng_pppoe.4 \ ng_pptpgre.4 \ ng_pred1.4 \ ng_rfc1490.4 \ ng_socket.4 \ ng_source.4 \ ng_split.4 \ ng_sppp.4 \ ng_sscfu.4 \ ng_sscop.4 \ ng_tag.4 \ ng_tcpmss.4 \ ng_tee.4 \ ng_tty.4 \ ng_ubt.4 \ ng_UI.4 \ ng_uni.4 \ ng_vjc.4 \ ng_vlan.4 \ nmdm.4 \ ${_ntb.4} \ ${_ntb_hw_amd.4} \ ${_ntb_hw_intel.4} \ ${_ntb_hw_plx.4} \ ${_ntb_transport.4} \ ${_nda.4} \ ${_if_ntb.4} \ null.4 \ numa.4 \ ${_nvd.4} \ ${_nvdimm.4} \ ${_nvme.4} \ ${_nvram.4} \ ${_nvram2env.4} \ oce.4 \ ocs_fc.4\ ohci.4 \ orm.4 \ ow.4 \ ow_temp.4 \ owc.4 \ ${_padlock.4} \ pass.4 \ pccard.4 \ pccbb.4 \ pcf.4 \ ${_pchtherm.4} \ pci.4 \ pcib.4 \ pcic.4 \ pcm.4 \ ${_pf.4} \ ${_pflog.4} \ ${_pfsync.4} \ pim.4 \ pms.4 \ polling.4 \ ppbus.4 \ ppc.4 \ ppi.4 \ procdesc.4 \ proto.4 \ psm.4 \ pst.4 \ pt.4 \ ptnet.4 \ pts.4 \ pty.4 \ puc.4 \ pwmc.4 \ ${_qlxge.4} \ ${_qlxgb.4} \ ${_qlxgbe.4} \ ${_qlnxe.4} \ ral.4 \ random.4 \ rctl.4 \ re.4 \ rgephy.4 \ rights.4 \ rl.4 \ rndtest.4 \ route.4 \ rtwn.4 \ rtwnfw.4 \ rtwn_pci.4 \ rue.4 \ sa.4 \ safe.4 \ safexcel.4 \ sbp.4 \ sbp_targ.4 \ scc.4 \ sched_4bsd.4 \ sched_ule.4 \ screen.4 \ scsi.4 \ sctp.4 \ sdhci.4 \ sem.4 \ send.4 \ ses.4 \ ${_sfxge.4} \ sge.4 \ siba.4 \ siftr.4 \ siis.4 \ simplebus.4 \ sis.4 \ sk.4 \ ${_smartpqi.4} \ smb.4 \ smbios.4 \ smbus.4 \ smp.4 \ smsc.4 \ snd_ad1816.4 \ snd_als4000.4 \ snd_atiixp.4 \ snd_cmi.4 \ snd_cs4281.4 \ snd_csa.4 \ snd_ds1.4 \ snd_emu10k1.4 \ snd_emu10kx.4 \ snd_envy24.4 \ snd_envy24ht.4 \ snd_es137x.4 \ snd_ess.4 \ snd_fm801.4 \ snd_gusc.4 \ snd_hda.4 \ snd_hdspe.4 \ snd_ich.4 \ snd_maestro3.4 \ snd_maestro.4 \ snd_mss.4 \ snd_neomagic.4 \ snd_sbc.4 \ snd_solo.4 \ snd_spicds.4 \ snd_t4dwave.4 \ snd_uaudio.4 \ snd_via8233.4 \ snd_via82c686.4 \ snd_vibes.4 \ snp.4 \ spigen.4 \ ${_spkr.4} \ splash.4 \ sppp.4 \ ste.4 \ stf.4 \ stge.4 \ + ${_sume.4} \ ${_superio.4} \ sym.4 \ syncache.4 \ syncer.4 \ syscons.4 \ sysmouse.4 \ tap.4 \ targ.4 \ tcp.4 \ tdfx.4 \ terasic_mtl.4 \ termios.4 \ textdump.4 \ ti.4 \ timecounters.4 \ ${_tpm.4} \ tty.4 \ tun.4 \ twa.4 \ twe.4 \ tws.4 \ udp.4 \ udplite.4 \ ure.4 \ vale.4 \ vga.4 \ vge.4 \ viapm.4 \ ${_viawd.4} \ ${_virtio.4} \ ${_virtio_balloon.4} \ ${_virtio_blk.4} \ ${_virtio_console.4} \ ${_virtio_random.4} \ ${_virtio_scsi.4} \ ${_vmci.4} \ vkbd.4 \ vlan.4 \ vxlan.4 \ ${_vmd.4} \ ${_vmm.4} \ ${_vmx.4} \ vr.4 \ vt.4 \ vte.4 \ ${_vtnet.4} \ watchdog.4 \ ${_wbwd.4} \ wi.4 \ witness.4 \ wlan.4 \ wlan_acl.4 \ wlan_amrr.4 \ wlan_ccmp.4 \ wlan_tkip.4 \ wlan_wep.4 \ wlan_xauth.4 \ wmt.4 \ ${_wpi.4} \ wsp.4 \ ${_xen.4} \ xhci.4 \ xl.4 \ ${_xnb.4} \ xpt.4 \ zero.4 MLINKS= ads111x.4 ads1013.4 \ ads111x.4 ads1014.4 \ ads111x.4 ads1015.4 \ ads111x.4 ads1113.4 \ ads111x.4 ads1114.4 \ ads111x.4 ads1115.4 MLINKS+=ae.4 if_ae.4 MLINKS+=age.4 if_age.4 MLINKS+=agp.4 agpgart.4 MLINKS+=alc.4 if_alc.4 MLINKS+=ale.4 if_ale.4 MLINKS+=altera_atse.4 atse.4 MLINKS+=altera_sdcard.4 altera_sdcardc.4 MLINKS+=altq.4 ALTQ.4 MLINKS+=ath.4 if_ath.4 MLINKS+=ath_pci.4 if_ath_pci.4 MLINKS+=an.4 if_an.4 MLINKS+=aue.4 if_aue.4 MLINKS+=axe.4 if_axe.4 MLINKS+=bce.4 if_bce.4 MLINKS+=bfe.4 if_bfe.4 MLINKS+=bge.4 if_bge.4 MLINKS+=bnxt.4 if_bnxt.4 MLINKS+=bridge.4 if_bridge.4 MLINKS+=bwi.4 if_bwi.4 MLINKS+=bwn.4 if_bwn.4 MLINKS+=${_bxe.4} ${_if_bxe.4} MLINKS+=cas.4 if_cas.4 MLINKS+=cdce.4 if_cdce.4 MLINKS+=cfi.4 cfid.4 MLINKS+=cloudabi.4 cloudabi32.4 \ cloudabi.4 cloudabi64.4 MLINKS+=crypto.4 cryptodev.4 MLINKS+=cue.4 if_cue.4 MLINKS+=cxgb.4 if_cxgb.4 MLINKS+=cxgbe.4 if_cxgbe.4 \ cxgbe.4 vcxgbe.4 \ cxgbe.4 if_vcxgbe.4 \ cxgbe.4 cxl.4 \ cxgbe.4 if_cxl.4 \ cxgbe.4 vcxl.4 \ cxgbe.4 if_vcxl.4 \ cxgbe.4 cc.4 \ cxgbe.4 if_cc.4 \ cxgbe.4 vcc.4 \ cxgbe.4 if_vcc.4 MLINKS+=cxgbev.4 if_cxgbev.4 \ cxgbev.4 cxlv.4 \ cxgbev.4 if_cxlv.4 \ cxgbev.4 ccv.4 \ cxgbev.4 if_ccv.4 MLINKS+=dc.4 if_dc.4 MLINKS+=disc.4 if_disc.4 MLINKS+=edsc.4 if_edsc.4 MLINKS+=em.4 if_em.4 \ em.4 igb.4 \ em.4 if_igb.4 MLINKS+=enc.4 if_enc.4 MLINKS+=epair.4 if_epair.4 MLINKS+=et.4 if_et.4 MLINKS+=fd.4 stderr.4 \ fd.4 stdin.4 \ fd.4 stdout.4 MLINKS+=fdt.4 FDT.4 MLINKS+=firewire.4 ieee1394.4 MLINKS+=fwe.4 if_fwe.4 MLINKS+=fwip.4 if_fwip.4 MLINKS+=fxp.4 if_fxp.4 MLINKS+=gem.4 if_gem.4 MLINKS+=geom.4 GEOM.4 MLINKS+=gif.4 if_gif.4 MLINKS+=gpio.4 gpiobus.4 MLINKS+=gpioths.4 dht11.4 MLINKS+=gpioths.4 dht22.4 MLINKS+=gre.4 if_gre.4 MLINKS+=hme.4 if_hme.4 MLINKS+=hpet.4 acpi_hpet.4 MLINKS+=${_hptrr.4} ${_rr232x.4} MLINKS+=${_attimer.4} ${_i8254.4} MLINKS+=ip.4 rawip.4 MLINKS+=ipfirewall.4 ipaccounting.4 \ ipfirewall.4 ipacct.4 \ ipfirewall.4 ipfw.4 MLINKS+=ipheth.4 if_ipheth.4 MLINKS+=ipw.4 if_ipw.4 MLINKS+=iwi.4 if_iwi.4 MLINKS+=iwm.4 if_iwm.4 MLINKS+=iwn.4 if_iwn.4 MLINKS+=ixgbe.4 ix.4 MLINKS+=ixgbe.4 if_ix.4 MLINKS+=ixgbe.4 if_ixgbe.4 MLINKS+=ixl.4 if_ixl.4 MLINKS+=iavf.4 if_iavf.4 MLINKS+=jme.4 if_jme.4 MLINKS+=kue.4 if_kue.4 MLINKS+=lagg.4 trunk.4 MLINKS+=lagg.4 if_lagg.4 MLINKS+=le.4 if_le.4 MLINKS+=lge.4 if_lge.4 MLINKS+=lo.4 loop.4 MLINKS+=lp.4 plip.4 MLINKS+=malo.4 if_malo.4 MLINKS+=md.4 vn.4 MLINKS+=mem.4 kmem.4 MLINKS+=mfi.4 mfi_linux.4 \ mfi.4 mfip.4 MLINKS+=mlx5en.4 mce.4 MLINKS+=mn.4 if_mn.4 MLINKS+=mos.4 if_mos.4 MLINKS+=msk.4 if_msk.4 MLINKS+=mwl.4 if_mwl.4 MLINKS+=mxge.4 if_mxge.4 MLINKS+=my.4 if_my.4 MLINKS+=${_ndis.4} ${_if_ndis.4} MLINKS+=netfpga10g_nf10bmac.4 if_nf10bmac.4 MLINKS+=netintro.4 net.4 \ netintro.4 networking.4 MLINKS+=${_nfe.4} ${_if_nfe.4} MLINKS+=nge.4 if_nge.4 MLINKS+=ow.4 onewire.4 MLINKS+=pccbb.4 cbb.4 MLINKS+=pcm.4 snd.4 \ pcm.4 sound.4 MLINKS+=pms.4 pmspcv.4 MLINKS+=ptnet.4 if_ptnet.4 MLINKS+=ral.4 if_ral.4 MLINKS+=re.4 if_re.4 MLINKS+=rl.4 if_rl.4 MLINKS+=rtwn_pci.4 if_rtwn_pci.4 MLINKS+=rue.4 if_rue.4 MLINKS+=scsi.4 CAM.4 \ scsi.4 cam.4 \ scsi.4 scbus.4 \ scsi.4 SCSI.4 MLINKS+=sge.4 if_sge.4 MLINKS+=sis.4 if_sis.4 MLINKS+=sk.4 if_sk.4 MLINKS+=smp.4 SMP.4 MLINKS+=smsc.4 if_smsc.4 MLINKS+=snd_envy24.4 snd_ak452x.4 MLINKS+=snd_sbc.4 snd_sb16.4 \ snd_sbc.4 snd_sb8.4 MLINKS+=${_spkr.4} ${_speaker.4} MLINKS+=splash.4 screensaver.4 MLINKS+=ste.4 if_ste.4 MLINKS+=stf.4 if_stf.4 MLINKS+=stge.4 if_stge.4 MLINKS+=syncache.4 syncookies.4 MLINKS+=syscons.4 sc.4 MLINKS+=tap.4 if_tap.4 \ tap.4 vmnet.4 \ tap.4 if_vmnet.4 MLINKS+=tdfx.4 tdfx_linux.4 MLINKS+=ti.4 if_ti.4 MLINKS+=tun.4 if_tun.4 MLINKS+=ure.4 if_ure.4 MLINKS+=vge.4 if_vge.4 MLINKS+=vlan.4 if_vlan.4 MLINKS+=vxlan.4 if_vxlan.4 MLINKS+=${_vmx.4} ${_if_vmx.4} MLINKS+=vr.4 if_vr.4 MLINKS+=vte.4 if_vte.4 MLINKS+=${_vtnet.4} ${_if_vtnet.4} MLINKS+=watchdog.4 SW_WATCHDOG.4 MLINKS+=wi.4 if_wi.4 MLINKS+=${_wpi.4} ${_if_wpi.4} MLINKS+=xl.4 if_xl.4 .if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" _acpi_asus.4= acpi_asus.4 _acpi_asus_wmi.4= acpi_asus_wmi.4 _acpi_dock.4= acpi_dock.4 _acpi_fujitsu.4=acpi_fujitsu.4 _acpi_hp.4= acpi_hp.4 _acpi_ibm.4= acpi_ibm.4 _acpi_panasonic.4=acpi_panasonic.4 _acpi_rapidstart.4=acpi_rapidstart.4 _acpi_sony.4= acpi_sony.4 _acpi_toshiba.4=acpi_toshiba.4 _acpi_wmi.4= acpi_wmi.4 _aesni.4= aesni.4 _aout.4= aout.4 _apic.4= apic.4 _atrtc.4= atrtc.4 _attimer.4= attimer.4 _aibs.4= aibs.4 _amdsbwd.4= amdsbwd.4 _amdsmb.4= amdsmb.4 _amdsmn.4= amdsmn.4 _amdtemp.4= amdtemp.4 _asmc.4= asmc.4 _bxe.4= bxe.4 _bytgpio.4= bytgpio.4 _chvgpio.4= chvgpio.4 _coretemp.4= coretemp.4 _cpuctl.4= cpuctl.4 _dpms.4= dpms.4 _hpt27xx.4= hpt27xx.4 _hptiop.4= hptiop.4 _hptmv.4= hptmv.4 _hptnr.4= hptnr.4 _hptrr.4= hptrr.4 _hv_kvp.4= hv_kvp.4 _hv_netvsc.4= hv_netvsc.4 _hv_storvsc.4= hv_storvsc.4 _hv_utils.4= hv_utils.4 _hv_vmbus.4= hv_vmbus.4 _hv_vss.4= hv_vss.4 _hwpstate_intel.4= hwpstate_intel.4 _i8254.4= i8254.4 _ichwd.4= ichwd.4 _if_bxe.4= if_bxe.4 _if_ndis.4= if_ndis.4 _if_nfe.4= if_nfe.4 _if_urtw.4= if_urtw.4 _if_vmx.4= if_vmx.4 _if_vtnet.4= if_vtnet.4 _if_wpi.4= if_wpi.4 _imcsmb.4= imcsmb.4 _ipmi.4= ipmi.4 _io.4= io.4 _itwd.4= itwd.4 _linux.4= linux.4 _nda.4= nda.4 _ndis.4= ndis.4 _nfe.4= nfe.4 _nfsmb.4= nfsmb.4 _if_ntb.4= if_ntb.4 _ntb.4= ntb.4 _ntb_hw_amd.4= ntb_hw_amd.4 _ntb_hw_intel.4= ntb_hw_intel.4 _ntb_hw_plx.4= ntb_hw_plx.4 _ntb_transport.4=ntb_transport.4 _nvd.4= nvd.4 _nvme.4= nvme.4 _nvram.4= nvram.4 _padlock.4= padlock.4 _pchtherm.4= pchtherm.4 _rr232x.4= rr232x.4 _speaker.4= speaker.4 _spkr.4= spkr.4 _superio.4= superio.4 _tpm.4= tpm.4 _urtw.4= urtw.4 _viawd.4= viawd.4 _virtio.4= virtio.4 _virtio_balloon.4=virtio_balloon.4 _virtio_blk.4= virtio_blk.4 _virtio_console.4=virtio_console.4 _virtio_random.4= virtio_random.4 _virtio_scsi.4= virtio_scsi.4 _vmci.4= vmci.4 _vmx.4= vmx.4 _vtnet.4= vtnet.4 _wbwd.4= wbwd.4 _wpi.4= wpi.4 _xen.4= xen.4 _xnb.4= xnb.4 .endif .if ${MACHINE_CPUARCH} == "amd64" _ioat.4= ioat.4 _nvdimm.4= nvdimm.4 _qlxge.4= qlxge.4 _qlxgb.4= qlxgb.4 _qlxgbe.4= qlxgbe.4 _qlnxe.4= qlnxe.4 _sfxge.4= sfxge.4 _smartpqi.4= smartpqi.4 +_sume.4= sume.4 _vmd.4= vmd.4 MLINKS+=qlxge.4 if_qlxge.4 MLINKS+=qlxgb.4 if_qlxgb.4 MLINKS+=qlxgbe.4 if_qlxgbe.4 MLINKS+=qlnxe.4 if_qlnxe.4 MLINKS+=sfxge.4 if_sfxge.4 +MLINKS+=sume.4 if_sume.4 .if ${MK_BHYVE} != "no" _bhyve.4= bhyve.4 _vmm.4= vmm.4 .endif .endif .if ${MACHINE_CPUARCH} == "mips" _nvram2env.4= nvram2env.4 .endif .if ${MACHINE_CPUARCH} == "powerpc" _if_vtnet.4= if_vtnet.4 _nvd.4= nvd.4 _nvme.4= nvme.4 _virtio.4= virtio.4 _virtio_balloon.4=virtio_balloon.4 _virtio_blk.4= virtio_blk.4 _virtio_console.4=virtio_console.4 _virtio_random.4= virtio_random.4 _virtio_scsi.4= virtio_scsi.4 _vtnet.4= vtnet.4 .endif .if empty(MAN_ARCH) __arches= ${MACHINE} ${MACHINE_ARCH} ${MACHINE_CPUARCH} .elif ${MAN_ARCH} == "all" __arches= ${:!/bin/sh -c "/bin/ls -d ${.CURDIR}/man4.*"!:E} .else __arches= ${MAN_ARCH} .endif .for __arch in ${__arches:O:u} .if exists(${.CURDIR}/man4.${__arch}) SUBDIR+= man4.${__arch} .endif .endfor .if ${MK_BLUETOOTH} != "no" MAN+= ng_bluetooth.4 .endif .if ${MK_CCD} != "no" _ccd.4= ccd.4 .endif .if ${MK_CDDL} != "no" _dtrace_provs= dtrace_audit.4 \ dtrace_io.4 \ dtrace_ip.4 \ dtrace_lockstat.4 \ dtrace_proc.4 \ dtrace_sched.4 \ dtrace_sctp.4 \ dtrace_tcp.4 \ dtrace_udp.4 \ dtrace_udplite.4 MLINKS+= dtrace_audit.4 dtaudit.4 .endif .if ${MK_EFI} != "no" MAN+= efidev.4 MLINKS+= efidev.4 efirtc.4 .endif .if ${MK_ISCSI} != "no" MAN+= cfiscsi.4 MAN+= iscsi.4 MAN+= iscsi_initiator.4 MAN+= iser.4 .endif .if ${MK_OFED} != "no" MAN+= mlx4ib.4 MAN+= mlx5ib.4 .endif .if ${MK_MLX5TOOL} != "no" MAN+= mlx5io.4 .endif .if ${MK_TESTS} != "no" ATF= ${SRCTOP}/contrib/atf .PATH: ${ATF}/doc _atf_test_case.4= atf-test-case.4 .endif .if ${MK_PF} != "no" _pf.4= pf.4 _pflog.4= pflog.4 _pfsync.4= pfsync.4 .endif .if ${MK_USB} != "no" MAN+= \ otus.4 \ otusfw.4 \ rsu.4 \ rsufw.4 \ rtwn_usb.4 \ rum.4 \ run.4 \ runfw.4 \ u3g.4 \ uark.4 \ uart.4 \ uath.4 \ ubsa.4 \ ubser.4 \ ubtbcmfw.4 \ uchcom.4 \ ucom.4 \ ucycom.4 \ udav.4 \ udbp.4 \ udl.4 \ uep.4 \ ufoma.4 \ uftdi.4 \ ugen.4 \ ugold.4 \ uhci.4 \ uhid.4 \ uhso.4 \ uipaq.4 \ ukbd.4 \ uled.4 \ ulpt.4 \ umass.4 \ umcs.4 \ umct.4 \ umodem.4 \ umoscom.4 \ ums.4 \ unix.4 \ upgt.4 \ uplcom.4 \ ural.4 \ urio.4 \ urndis.4 \ ${_urtw.4} \ usb.4 \ usb_quirk.4 \ usb_template.4 \ usfs.4 \ uslcom.4 \ uvisor.4 \ uvscom.4 \ zyd.4 MLINKS+=otus.4 if_otus.4 MLINKS+=rsu.4 if_rsu.4 MLINKS+=rtwn_usb.4 if_rtwn_usb.4 MLINKS+=rum.4 if_rum.4 MLINKS+=run.4 if_run.4 MLINKS+=u3g.4 u3gstub.4 MLINKS+=uath.4 if_uath.4 MLINKS+=udav.4 if_udav.4 MLINKS+=upgt.4 if_upgt.4 MLINKS+=ural.4 if_ural.4 MLINKS+=urndis.4 if_urndis.4 MLINKS+=${_urtw.4} ${_if_urtw.4} MLINKS+=zyd.4 if_zyd.4 .endif .include Index: head/share/man/man4/sume.4 =================================================================== --- head/share/man/man4/sume.4 (nonexistent) +++ head/share/man/man4/sume.4 (revision 364973) @@ -0,0 +1,98 @@ +.\"- +.\" SPDX-License-Identifier: BSD-2-Clause-FreeBSD +.\" +.\" Copyright (c) 2020 Denis Salopek +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +.\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +.\" POSSIBILITY OF SUCH DAMAGE. +.\" +.\" $FreeBSD$ +.\" +.Dd August 30, 2020 +.Dt SUME 4 +.Os +.Sh NAME +.Nm sume +.Nd "NetFPGA SUME 4x10Gb Ethernet driver" +.Sh SYNOPSIS +To compile this driver into the kernel, place the following lines +in your kernel configuration file: +.Bd -ragged -offset indent +.Cd "device sume" +.Ed +.Pp +Alternatively, to load the driver as a module at boot time, place +the following line in +.Xr loader.conf 5 : +.Bd -literal -offset indent +if_sume_load="YES" +.Ed +.Sh DESCRIPTION +The +.Nm +driver provides support for NetFPGA SUME Virtex-7 FPGA Development Board +with the reference NIC bitstream loaded onto it. +The HDL design for the reference NIC project uses the RIFFA based DMA +engine to communicate with the host machine over PCIe. +Every packet is transmitted to / from the board via a single DMA +transaction, taking up to two or three interrupts per one transaction +which yields low performance. +.Pp +There is no support for Jumbo frames as the hardware is capable of +dealing only with frames with maximum size of 1514 bytes. +The hardware does not support multicast filtering, provides no checksums, +and offers no other offloading. +.Sh SEE ALSO +.Xr arp 4 , +.Xr netgraph 4 , +.Xr netintro 4 , +.Xr ng_ether 4 , +.Xr vlan 4 , +.Xr ifconfig 8 +.Sh AUTHORS +The Linux +.Nm +driver was originally written by +.An -nosplit +.An Bjoern A. Zeeb . +The +.Fx version and this manual page were written by +.An Denis Salopek +as a GSoC project. +More information about the project can be found here: +.Pa https://wiki.freebsd.org/SummerOfCode2020Projects/NetFPGA_SUME_Driver +.Sh BUGS +The reference NIC hardware design provides no mechanism for quiescing +inbound traffic from interfaces configured as DOWN. +All packets from administratively disabled interfaces are transferred to +main memory, leaving the driver with the task of dropping such packets, +thus consuming PCI bandwidth, interrupts and CPU cycles in vain. +.Pp +Pre-built FPGA bitstream from the NetFPGA project may not work correctly. +At higher RX packet rates, the newly incoming packets can overwrite the +ones in an internal FIFO so the packets would arrive in main memory +corrupted, until a physical reset of the board. +.Pp +Occasionally, the driver can get stuck in a non-IDLE TX state due to +a missed interrupt. +The driver includes a watchdog function which monitors for such a +condition and resets the board automatically. +For more details, visit the NetFPGA SUME project site. Property changes on: head/share/man/man4/sume.4 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/conf/files.amd64 =================================================================== --- head/sys/conf/files.amd64 (revision 364972) +++ head/sys/conf/files.amd64 (revision 364973) @@ -1,475 +1,476 @@ # This file tells config what files go into building a kernel, # files marked standard are always included. # # $FreeBSD$ # # common files stuff between i386 and amd64 include "conf/files.x86" # The long compile-with and dependency lines are required because of # limitations in config: backslash-newline doesn't work in strings, and # dependency lines other than the first are silently ignored. # # cloudabi32_vdso.o optional compat_cloudabi32 \ dependency "$S/contrib/cloudabi/cloudabi_vdso_i686_on_64bit.S" \ compile-with "${CC} -x assembler-with-cpp -m32 -shared -nostdinc -nostdlib -Wl,-T$S/compat/cloudabi/cloudabi_vdso.lds $S/contrib/cloudabi/cloudabi_vdso_i686_on_64bit.S -o ${.TARGET}" \ no-obj no-implicit-rule \ clean "cloudabi32_vdso.o" # cloudabi32_vdso_blob.o optional compat_cloudabi32 \ dependency "cloudabi32_vdso.o" \ compile-with "${OBJCOPY} --input-target binary --output-target elf64-x86-64-freebsd --binary-architecture i386 cloudabi32_vdso.o ${.TARGET}" \ no-implicit-rule \ clean "cloudabi32_vdso_blob.o" # cloudabi64_vdso.o optional compat_cloudabi64 \ dependency "$S/contrib/cloudabi/cloudabi_vdso_x86_64.S" \ compile-with "${CC} -x assembler-with-cpp -shared -nostdinc -nostdlib -Wl,-T$S/compat/cloudabi/cloudabi_vdso.lds $S/contrib/cloudabi/cloudabi_vdso_x86_64.S -o ${.TARGET}" \ no-obj no-implicit-rule \ clean "cloudabi64_vdso.o" # cloudabi64_vdso_blob.o optional compat_cloudabi64 \ dependency "cloudabi64_vdso.o" \ compile-with "${OBJCOPY} --input-target binary --output-target elf64-x86-64-freebsd --binary-architecture i386 cloudabi64_vdso.o ${.TARGET}" \ no-implicit-rule \ clean "cloudabi64_vdso_blob.o" # linux32_genassym.o optional compat_linux32 \ dependency "$S/amd64/linux32/linux32_genassym.c offset.inc" \ compile-with "${CC} ${CFLAGS:N-flto:N-fno-common} -fcommon -c ${.IMPSRC}" \ no-obj no-implicit-rule \ clean "linux32_genassym.o" # linux32_assym.h optional compat_linux32 \ dependency "$S/kern/genassym.sh linux32_genassym.o" \ compile-with "sh $S/kern/genassym.sh linux32_genassym.o > ${.TARGET}" \ no-obj no-implicit-rule before-depend \ clean "linux32_assym.h" # linux32_locore.o optional compat_linux32 \ dependency "linux32_assym.h $S/amd64/linux32/linux32_locore.asm" \ compile-with "${CC} -x assembler-with-cpp -DLOCORE -m32 -shared -s -pipe -I. -I$S ${WERROR} -Wall -fPIC -fno-common -nostdinc -nostdlib -Wl,-T$S/amd64/linux32/linux32_vdso.lds.s -Wl,-soname=linux32_vdso.so,--eh-frame-hdr,-warn-common ${.IMPSRC} -o ${.TARGET}" \ no-obj no-implicit-rule \ clean "linux32_locore.o" # linux32_vdso.so optional compat_linux32 \ dependency "linux32_locore.o" \ compile-with "${OBJCOPY} --input-target binary --output-target elf64-x86-64-freebsd --binary-architecture i386 linux32_locore.o ${.TARGET}" \ no-implicit-rule \ clean "linux32_vdso.so" # ia32_genassym.o standard \ dependency "$S/compat/ia32/ia32_genassym.c offset.inc" \ compile-with "${CC} ${CFLAGS:N-flto:N-fno-common} -fcommon -c ${.IMPSRC}" \ no-obj no-implicit-rule \ clean "ia32_genassym.o" # ia32_assym.h standard \ dependency "$S/kern/genassym.sh ia32_genassym.o" \ compile-with "env NM='${NM}' NMFLAGS='${NMFLAGS}' sh $S/kern/genassym.sh ia32_genassym.o > ${.TARGET}" \ no-obj no-implicit-rule before-depend \ clean "ia32_assym.h" # amd64/acpica/acpi_machdep.c optional acpi acpi_wakecode.o optional acpi \ dependency "$S/amd64/acpica/acpi_wakecode.S assym.inc" \ compile-with "${NORMAL_S}" \ no-obj no-implicit-rule before-depend \ clean "acpi_wakecode.o" acpi_wakecode.bin optional acpi \ dependency "acpi_wakecode.o" \ compile-with "${OBJCOPY} -S -O binary acpi_wakecode.o ${.TARGET}" \ no-obj no-implicit-rule before-depend \ clean "acpi_wakecode.bin" acpi_wakecode.h optional acpi \ dependency "acpi_wakecode.bin" \ compile-with "file2c -sx 'static char wakecode[] = {' '};' < acpi_wakecode.bin > ${.TARGET}" \ no-obj no-implicit-rule before-depend \ clean "acpi_wakecode.h" acpi_wakedata.h optional acpi \ dependency "acpi_wakecode.o" \ compile-with '${NM} -n --defined-only acpi_wakecode.o | while read offset dummy what; do echo "#define $${what} 0x$${offset}"; done > ${.TARGET}' \ no-obj no-implicit-rule before-depend \ clean "acpi_wakedata.h" # #amd64/amd64/apic_vector.S standard amd64/amd64/bios.c standard amd64/amd64/bpf_jit_machdep.c optional bpf_jitter amd64/amd64/copyout.c standard amd64/amd64/cpu_switch.S standard amd64/amd64/db_disasm.c optional ddb amd64/amd64/db_interface.c optional ddb amd64/amd64/db_trace.c optional ddb amd64/amd64/efirt_machdep.c optional efirt amd64/amd64/efirt_support.S optional efirt amd64/amd64/elf_machdep.c standard amd64/amd64/exception.S standard amd64/amd64/fpu.c standard amd64/amd64/gdb_machdep.c optional gdb amd64/amd64/in_cksum.c optional inet | inet6 amd64/amd64/initcpu.c standard amd64/amd64/io.c optional io amd64/amd64/locore.S standard no-obj amd64/amd64/xen-locore.S optional xenhvm \ compile-with "${NORMAL_S} -g0" \ no-ctfconvert amd64/amd64/machdep.c standard amd64/amd64/mem.c optional mem amd64/amd64/minidump_machdep.c standard amd64/amd64/mp_machdep.c optional smp amd64/amd64/mpboot.S optional smp amd64/amd64/pmap.c standard amd64/amd64/prof_machdep.c optional profiling-routine amd64/amd64/ptrace_machdep.c standard amd64/amd64/sigtramp.S standard amd64/amd64/support.S standard amd64/amd64/sys_machdep.c standard amd64/amd64/trap.c standard amd64/amd64/uio_machdep.c standard amd64/amd64/uma_machdep.c standard amd64/amd64/vm_machdep.c standard amd64/cloudabi32/cloudabi32_sysvec.c optional compat_cloudabi32 amd64/cloudabi64/cloudabi64_sysvec.c optional compat_cloudabi64 amd64/pci/pci_cfgreg.c optional pci cddl/dev/dtrace/amd64/dtrace_asm.S optional dtrace compile-with "${DTRACE_S}" cddl/dev/dtrace/amd64/dtrace_subr.c optional dtrace compile-with "${DTRACE_C}" crypto/aesni/aeskeys_amd64.S optional aesni crypto/des/des_enc.c optional netsmb dev/acpi_support/acpi_wmi_if.m standard dev/agp/agp_amd64.c optional agp dev/agp/agp_i810.c optional agp dev/agp/agp_via.c optional agp dev/amdgpio/amdgpio.c optional amdgpio dev/hyperv/vmbus/amd64/hyperv_machdep.c optional hyperv dev/hyperv/vmbus/amd64/vmbus_vector.S optional hyperv dev/ice/if_ice_iflib.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_lib.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_osdep.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_resmgr.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_strings.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_iflib_recovery_txrx.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_iflib_txrx.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_common.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_controlq.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_dcb.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_flex_pipe.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_flow.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_nvm.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_sched.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_sriov.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" dev/ice/ice_switch.c optional ice pci \ compile-with "${NORMAL_C} -I$S/dev/ice" ice_ddp.c optional ice_ddp \ compile-with "${AWK} -f $S/tools/fw_stub.awk ice_ddp.fw:ice_ddp:0x01030900 -mice_ddp -c${.TARGET}" \ no-implicit-rule before-depend local \ clean "ice_ddp.c" ice_ddp.fwo optional ice_ddp \ dependency "ice_ddp.fw" \ compile-with "${NORMAL_FWO}" \ no-implicit-rule \ clean "ice_ddp.fwo" ice_ddp.fw optional ice_ddp \ dependency "$S/contrib/dev/ice/ice-1.3.9.0.pkg" \ compile-with "${CP} $S/contrib/dev/ice/ice-1.3.9.0.pkg ice_ddp.fw" \ no-obj no-implicit-rule \ clean "ice_ddp.fw" dev/ioat/ioat.c optional ioat pci dev/ioat/ioat_test.c optional ioat pci dev/ixl/if_ixl.c optional ixl pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/ixl_pf_main.c optional ixl pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/ixl_pf_iflib.c optional ixl pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/ixl_pf_qmgr.c optional ixl pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/ixl_pf_iov.c optional ixl pci pci_iov \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/ixl_pf_i2c.c optional ixl pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/if_iavf.c optional iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/iavf_vc.c optional iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/ixl_txrx.c optional ixl pci | iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/i40e_osdep.c optional ixl pci | iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/i40e_lan_hmc.c optional ixl pci | iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/i40e_hmc.c optional ixl pci | iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/i40e_common.c optional ixl pci | iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/i40e_nvm.c optional ixl pci | iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/i40e_adminq.c optional ixl pci | iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/i40e_dcb.c optional ixl pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/nctgpio/nctgpio.c optional nctgpio dev/nfe/if_nfe.c optional nfe pci dev/ntb/if_ntb/if_ntb.c optional if_ntb dev/ntb/ntb_transport.c optional ntb_transport | if_ntb dev/ntb/ntb.c optional ntb | ntb_transport | if_ntb | ntb_hw_amd | ntb_hw_intel | ntb_hw_plx | ntb_hw dev/ntb/ntb_if.m optional ntb | ntb_transport | if_ntb | ntb_hw_amd | ntb_hw_intel | ntb_hw_plx | ntb_hw dev/ntb/ntb_hw/ntb_hw_amd.c optional ntb_hw_amd | ntb_hw dev/ntb/ntb_hw/ntb_hw_intel.c optional ntb_hw_intel | ntb_hw dev/ntb/ntb_hw/ntb_hw_plx.c optional ntb_hw_plx | ntb_hw dev/ntb/test/ntb_tool.c optional ntb_tool dev/nvram/nvram.c optional nvram isa dev/random/ivy.c optional rdrand_rng !random_loadable dev/random/nehemiah.c optional padlock_rng !random_loadable dev/qlxge/qls_dbg.c optional qlxge pci dev/qlxge/qls_dump.c optional qlxge pci dev/qlxge/qls_hw.c optional qlxge pci dev/qlxge/qls_ioctl.c optional qlxge pci dev/qlxge/qls_isr.c optional qlxge pci dev/qlxge/qls_os.c optional qlxge pci dev/qlxgb/qla_dbg.c optional qlxgb pci dev/qlxgb/qla_hw.c optional qlxgb pci dev/qlxgb/qla_ioctl.c optional qlxgb pci dev/qlxgb/qla_isr.c optional qlxgb pci dev/qlxgb/qla_misc.c optional qlxgb pci dev/qlxgb/qla_os.c optional qlxgb pci dev/qlxgbe/ql_dbg.c optional qlxgbe pci dev/qlxgbe/ql_hw.c optional qlxgbe pci dev/qlxgbe/ql_ioctl.c optional qlxgbe pci dev/qlxgbe/ql_isr.c optional qlxgbe pci dev/qlxgbe/ql_misc.c optional qlxgbe pci dev/qlxgbe/ql_os.c optional qlxgbe pci dev/qlxgbe/ql_reset.c optional qlxgbe pci dev/qlxgbe/ql_fw.c optional qlxgbe pci dev/qlxgbe/ql_boot.c optional qlxgbe pci dev/qlxgbe/ql_minidump.c optional qlxgbe pci dev/qlnx/qlnxe/ecore_cxt.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_dcbx.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_dev.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_hw.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_init_fw_funcs.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_init_ops.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_int.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_l2.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_mcp.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_sp_commands.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_spq.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/qlnx_ioctl.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/qlnx_os.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/sfxge/common/ef10_ev.c optional sfxge pci dev/sfxge/common/ef10_filter.c optional sfxge pci dev/sfxge/common/ef10_image.c optional sfxge pci dev/sfxge/common/ef10_intr.c optional sfxge pci dev/sfxge/common/ef10_mac.c optional sfxge pci dev/sfxge/common/ef10_mcdi.c optional sfxge pci dev/sfxge/common/ef10_nic.c optional sfxge pci dev/sfxge/common/ef10_nvram.c optional sfxge pci dev/sfxge/common/ef10_phy.c optional sfxge pci dev/sfxge/common/ef10_rx.c optional sfxge pci dev/sfxge/common/ef10_tx.c optional sfxge pci dev/sfxge/common/ef10_vpd.c optional sfxge pci dev/sfxge/common/efx_bootcfg.c optional sfxge pci dev/sfxge/common/efx_crc32.c optional sfxge pci dev/sfxge/common/efx_ev.c optional sfxge pci dev/sfxge/common/efx_filter.c optional sfxge pci dev/sfxge/common/efx_hash.c optional sfxge pci dev/sfxge/common/efx_intr.c optional sfxge pci dev/sfxge/common/efx_lic.c optional sfxge pci dev/sfxge/common/efx_mac.c optional sfxge pci dev/sfxge/common/efx_mcdi.c optional sfxge pci dev/sfxge/common/efx_mon.c optional sfxge pci dev/sfxge/common/efx_nic.c optional sfxge pci dev/sfxge/common/efx_nvram.c optional sfxge pci dev/sfxge/common/efx_phy.c optional sfxge pci dev/sfxge/common/efx_port.c optional sfxge pci dev/sfxge/common/efx_rx.c optional sfxge pci dev/sfxge/common/efx_sram.c optional sfxge pci dev/sfxge/common/efx_tunnel.c optional sfxge pci dev/sfxge/common/efx_tx.c optional sfxge pci dev/sfxge/common/efx_vpd.c optional sfxge pci dev/sfxge/common/hunt_nic.c optional sfxge pci dev/sfxge/common/mcdi_mon.c optional sfxge pci dev/sfxge/common/medford_nic.c optional sfxge pci dev/sfxge/common/medford2_nic.c optional sfxge pci dev/sfxge/common/siena_mac.c optional sfxge pci dev/sfxge/common/siena_mcdi.c optional sfxge pci dev/sfxge/common/siena_nic.c optional sfxge pci dev/sfxge/common/siena_nvram.c optional sfxge pci dev/sfxge/common/siena_phy.c optional sfxge pci dev/sfxge/common/siena_sram.c optional sfxge pci dev/sfxge/common/siena_vpd.c optional sfxge pci dev/sfxge/sfxge.c optional sfxge pci dev/sfxge/sfxge_dma.c optional sfxge pci dev/sfxge/sfxge_ev.c optional sfxge pci dev/sfxge/sfxge_intr.c optional sfxge pci dev/sfxge/sfxge_mcdi.c optional sfxge pci dev/sfxge/sfxge_nvram.c optional sfxge pci dev/sfxge/sfxge_port.c optional sfxge pci dev/sfxge/sfxge_rx.c optional sfxge pci dev/sfxge/sfxge_tx.c optional sfxge pci dev/smartpqi/smartpqi_cam.c optional smartpqi dev/smartpqi/smartpqi_cmd.c optional smartpqi dev/smartpqi/smartpqi_discovery.c optional smartpqi dev/smartpqi/smartpqi_event.c optional smartpqi dev/smartpqi/smartpqi_helper.c optional smartpqi dev/smartpqi/smartpqi_init.c optional smartpqi dev/smartpqi/smartpqi_intr.c optional smartpqi dev/smartpqi/smartpqi_ioctl.c optional smartpqi dev/smartpqi/smartpqi_main.c optional smartpqi dev/smartpqi/smartpqi_mem.c optional smartpqi dev/smartpqi/smartpqi_misc.c optional smartpqi dev/smartpqi/smartpqi_queue.c optional smartpqi dev/smartpqi/smartpqi_request.c optional smartpqi dev/smartpqi/smartpqi_response.c optional smartpqi dev/smartpqi/smartpqi_sis.c optional smartpqi dev/smartpqi/smartpqi_tag.c optional smartpqi dev/speaker/spkr.c optional speaker +dev/sume/if_sume.c optional sume dev/superio/superio.c optional superio isa dev/syscons/apm/apm_saver.c optional apm_saver apm dev/syscons/scvesactl.c optional sc vga vesa dev/syscons/scvgarndr.c optional sc vga dev/tpm/tpm.c optional tpm dev/tpm/tpm20.c optional tpm dev/tpm/tpm_crb.c optional tpm acpi dev/tpm/tpm_tis.c optional tpm acpi dev/tpm/tpm_acpi.c optional tpm acpi dev/tpm/tpm_isa.c optional tpm isa dev/uart/uart_cpu_x86.c optional uart dev/viawd/viawd.c optional viawd dev/vmware/vmxnet3/if_vmx.c optional vmx dev/vmware/vmci/vmci.c optional vmci dev/vmware/vmci/vmci_datagram.c optional vmci dev/vmware/vmci/vmci_doorbell.c optional vmci dev/vmware/vmci/vmci_driver.c optional vmci dev/vmware/vmci/vmci_event.c optional vmci dev/vmware/vmci/vmci_hashtable.c optional vmci dev/vmware/vmci/vmci_kernel_if.c optional vmci dev/vmware/vmci/vmci_qpair.c optional vmci dev/vmware/vmci/vmci_queue_pair.c optional vmci dev/vmware/vmci/vmci_resource.c optional vmci dev/vmware/pvscsi/pvscsi.c optional pvscsi dev/vmd/vmd.c optional vmd dev/vmd/vmd_bus.c optional vmd_bus dev/wbwd/wbwd.c optional wbwd dev/xen/pci/xen_acpi_pci.c optional xenhvm dev/xen/pci/xen_pci.c optional xenhvm isa/syscons_isa.c optional sc isa/vga_isa.c optional vga kern/kern_clocksource.c standard kern/imgact_aout.c optional compat_aout kern/link_elf_obj.c standard # # IA32 binary support # #amd64/ia32/ia32_exception.S optional compat_freebsd32 amd64/ia32/ia32_reg.c optional compat_freebsd32 amd64/ia32/ia32_signal.c optional compat_freebsd32 amd64/ia32/ia32_sigtramp.S optional compat_freebsd32 amd64/ia32/ia32_syscall.c optional compat_freebsd32 amd64/ia32/ia32_misc.c optional compat_freebsd32 compat/ia32/ia32_sysvec.c optional compat_freebsd32 compat/linprocfs/linprocfs.c optional linprocfs compat/linsysfs/linsysfs.c optional linsysfs # # Linux/i386 binary support # amd64/linux32/linux32_dummy.c optional compat_linux32 amd64/linux32/linux32_machdep.c optional compat_linux32 amd64/linux32/linux32_support.s optional compat_linux32 \ dependency "linux32_assym.h" amd64/linux32/linux32_sysent.c optional compat_linux32 amd64/linux32/linux32_sysvec.c optional compat_linux32 compat/linux/linux_emul.c optional compat_linux32 compat/linux/linux_errno.c optional compat_linux32 compat/linux/linux_file.c optional compat_linux32 compat/linux/linux_fork.c optional compat_linux32 compat/linux/linux_futex.c optional compat_linux32 compat/linux/linux_getcwd.c optional compat_linux32 compat/linux/linux_ioctl.c optional compat_linux32 compat/linux/linux_ipc.c optional compat_linux32 compat/linux/linux_mib.c optional compat_linux32 compat/linux/linux_misc.c optional compat_linux32 compat/linux/linux_mmap.c optional compat_linux32 compat/linux/linux_signal.c optional compat_linux32 compat/linux/linux_socket.c optional compat_linux32 compat/linux/linux_stats.c optional compat_linux32 compat/linux/linux_sysctl.c optional compat_linux32 compat/linux/linux_time.c optional compat_linux32 compat/linux/linux_timer.c optional compat_linux32 compat/linux/linux_uid16.c optional compat_linux32 compat/linux/linux_util.c optional compat_linux32 compat/linux/linux_vdso.c optional compat_linux32 compat/linux/linux_common.c optional compat_linux32 compat/linux/linux_event.c optional compat_linux32 compat/linux/linux.c optional compat_linux32 dev/amr/amr_linux.c optional compat_linux32 amr dev/mfi/mfi_linux.c optional compat_linux32 mfi compat/ndis/winx64_wrap.S optional ndisapi pci # # x86 real mode BIOS emulator, required by dpms/pci/vesa # compat/x86bios/x86bios.c optional x86bios | dpms | pci | vesa contrib/x86emu/x86emu.c optional x86bios | dpms | pci | vesa # # bvm console # dev/bvm/bvm_console.c optional bvmconsole dev/bvm/bvm_dbg.c optional bvmdebug # Common files where we currently configure the system differently, but perhaps shouldn't # config(8) doesn't have a way to force standard options, so we've been inconsistent # about marking non-optional things 'standard'. x86/acpica/madt.c optional acpi x86/isa/atpic.c optional atpic isa x86/isa/elcr.c optional atpic isa | mptable x86/isa/isa.c standard x86/isa/isa_dma.c standard x86/pci/pci_early_quirks.c optional pci x86/x86/io_apic.c standard x86/x86/local_apic.c standard x86/x86/mptable.c optional mptable x86/x86/mptable_pci.c optional mptable pci x86/x86/msi.c optional pci x86/xen/pv.c optional xenhvm x86/xen/pvcpu_enum.c optional xenhvm x86/xen/xen_pci_bus.c optional xenhvm contrib/openzfs/module/zcommon/zfs_fletcher_avx512.c optional zfs compile-with "${ZFS_C}" contrib/openzfs/module/zcommon/zfs_fletcher_intel.c optional zfs compile-with "${ZFS_C}" contrib/openzfs/module/zcommon/zfs_fletcher_sse.c optional zfs compile-with "${ZFS_C}" contrib/openzfs/module/zfs/vdev_raidz_math_avx2.c optional zfs compile-with "${ZFS_C}" contrib/openzfs/module/zfs/vdev_raidz_math_avx512bw.c optional zfs compile-with "${ZFS_C}" contrib/openzfs/module/zfs/vdev_raidz_math_avx512f.c optional zfs compile-with "${ZFS_C}" contrib/openzfs/module/zfs/vdev_raidz_math_sse2.c optional zfs compile-with "${ZFS_C}" contrib/openzfs/module/zfs/vdev_raidz_math_ssse3.c optional zfs compile-with "${ZFS_C}" Index: head/sys/dev/sume/adapter.h =================================================================== --- head/sys/dev/sume/adapter.h (nonexistent) +++ head/sys/dev/sume/adapter.h (revision 364973) @@ -0,0 +1,242 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD + * + * Copyright (c) 2015 Bjoern A. Zeeb + * Copyright (c) 2020 Denis Salopek + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-11-C-0249 + * ("MRC2"), as part of the DARPA MRC research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* $FreeBSD$ */ + +#define DEFAULT_ETHER_ADDRESS "\02SUME\00" +#define SUME_ETH_DEVICE_NAME "sume" +#define MAX_IFC_NAME_LEN 8 + +#define SUME_NPORTS 4 + +#define SUME_IOCTL_CMD_WRITE_REG (SIOCGPRIVATE_0) +#define SUME_IOCTL_CMD_READ_REG (SIOCGPRIVATE_1) + +#define SUME_LOCK(adapter) mtx_lock(&adapter->lock); +#define SUME_UNLOCK(adapter) mtx_unlock(&adapter->lock); + +/* Currently SUME only uses 2 fixed channels for all port traffic and regs. */ +#define SUME_RIFFA_CHANNEL_DATA 0 +#define SUME_RIFFA_CHANNEL_REG 1 +#define SUME_RIFFA_CHANNELS 2 + +/* RIFFA constants. */ +#define RIFFA_MAX_CHNLS 12 +#define RIFFA_MAX_BUS_WIDTH_PARAM 4 +#define RIFFA_SG_BUF_SIZE (4*1024) +#define RIFFA_SG_ELEMS 200 + +/* RIFFA register offsets. */ +#define RIFFA_RX_SG_LEN_REG_OFF 0x0 +#define RIFFA_RX_SG_ADDR_LO_REG_OFF 0x1 +#define RIFFA_RX_SG_ADDR_HI_REG_OFF 0x2 +#define RIFFA_RX_LEN_REG_OFF 0x3 +#define RIFFA_RX_OFFLAST_REG_OFF 0x4 +#define RIFFA_TX_SG_LEN_REG_OFF 0x5 +#define RIFFA_TX_SG_ADDR_LO_REG_OFF 0x6 +#define RIFFA_TX_SG_ADDR_HI_REG_OFF 0x7 +#define RIFFA_TX_LEN_REG_OFF 0x8 +#define RIFFA_TX_OFFLAST_REG_OFF 0x9 +#define RIFFA_INFO_REG_OFF 0xA +#define RIFFA_IRQ_REG0_OFF 0xB +#define RIFFA_IRQ_REG1_OFF 0xC +#define RIFFA_RX_TNFR_LEN_REG_OFF 0xD +#define RIFFA_TX_TNFR_LEN_REG_OFF 0xE + +#define RIFFA_CHNL_REG(c, o) ((c << 4) + o) + +/* + * RIFFA state machine; + * rather than using complex circular buffers for 1 transaction. + */ +#define SUME_RIFFA_CHAN_STATE_IDLE 0x01 +#define SUME_RIFFA_CHAN_STATE_READY 0x02 +#define SUME_RIFFA_CHAN_STATE_READ 0x04 +#define SUME_RIFFA_CHAN_STATE_LEN 0x08 + +/* Accessor macros. */ +#define SUME_OFFLAST ((0 << 1) | (1 & 0x01)) +#define SUME_RIFFA_LAST(offlast) ((offlast) & 0x01) +#define SUME_RIFFA_OFFSET(offlast) ((uint64_t)((offlast) >> 1) << 2) +#define SUME_RIFFA_LEN(len) ((uint64_t)(len) << 2) + +#define SUME_RIFFA_LO_ADDR(addr) (addr & 0xFFFFFFFF) +#define SUME_RIFFA_HI_ADDR(addr) ((addr >> 32) & 0xFFFFFFFF) + +/* Vector bits. */ +#define SUME_MSI_RXQUE (1 << 0) +#define SUME_MSI_RXBUF (1 << 1) +#define SUME_MSI_RXDONE (1 << 2) +#define SUME_MSI_TXBUF (1 << 3) +#define SUME_MSI_TXDONE (1 << 4) + +/* Invalid vector. */ +#define SUME_INVALID_VECT 0xc0000000 + +/* Module register data (packet counters, link status...) */ +#define SUME_MOD0_REG_BASE 0x44040000 +#define SUME_MOD_REG(port) (SUME_MOD0_REG_BASE + 0x10000 * port) + +#define SUME_RESET_OFFSET 0x8 +#define SUME_PKTIN_OFFSET 0x18 +#define SUME_PKTOUT_OFFSET 0x1c +#define SUME_STATUS_OFFSET 0x48 + +#define SUME_RESET_ADDR(p) (SUME_MOD_REG(p) + SUME_RESET_OFFSET) +#define SUME_STAT_RX_ADDR(p) (SUME_MOD_REG(p) + SUME_PKTIN_OFFSET) +#define SUME_STAT_TX_ADDR(p) (SUME_MOD_REG(p) + SUME_PKTOUT_OFFSET) +#define SUME_STATUS_ADDR(p) (SUME_MOD_REG(p) + SUME_STATUS_OFFSET) + +#define SUME_LINK_STATUS(val) ((val >> 12) & 0x1) + +/* Various bits and pieces. */ +#define SUME_RIFFA_MAGIC 0xcafe +#define SUME_MR_WRITE 0x1f +#define SUME_MR_READ 0x00 +#define SUME_INIT_RTAG -3 +#define SUME_DPORT_MASK 0xaa +#define SUME_MIN_PKT_SIZE (ETHER_MIN_LEN - ETHER_CRC_LEN) + +struct irq { + uint32_t rid; + struct resource *res; + void *tag; +} __aligned(CACHE_LINE_SIZE); + +struct nf_stats { + uint64_t hw_rx_packets; + uint64_t hw_tx_packets; + uint64_t ifc_down_bytes; + uint64_t ifc_down_packets; + uint64_t rx_bytes; + uint64_t rx_dropped; + uint64_t rx_packets; + uint64_t tx_bytes; + uint64_t tx_dropped; + uint64_t tx_packets; +}; + +struct riffa_chnl_dir { + uint32_t state; + bus_dma_tag_t ch_tag; + bus_dmamap_t ch_map; + char *buf_addr; /* bouncebuf addresses+len. */ + bus_addr_t buf_hw_addr; /* -- " -- mapped. */ + uint32_t num_sg; + uint32_t event; /* Used for modreg r/w */ + uint32_t len; /* words */ + uint32_t offlast; + uint32_t recovery; + uint32_t rtag; +}; + +struct sume_ifreq { + uint32_t addr; + uint32_t val; +}; + +struct nf_priv { + struct sume_adapter *adapter; + struct ifmedia media; + struct nf_stats stats; + uint32_t unit; + uint32_t port; + uint32_t link_up; +}; + +struct sume_adapter { + struct mtx lock; + uint32_t running; + uint32_t rid; + struct riffa_chnl_dir **recv; + struct riffa_chnl_dir **send; + device_t dev; + struct ifnet *ifp[SUME_NPORTS]; + struct resource *bar0_addr; + bus_space_tag_t bt; + bus_space_handle_t bh; + bus_size_t bar0_len; + struct irq irq; + struct callout timer; + struct task stat_task; + struct taskqueue *tq; + uint64_t bytes_err; + uint64_t packets_err; + uint32_t last_ifc; + uint32_t num_sg; + uint32_t sg_buf_size; + uint32_t sume_debug; + uint32_t wd_counter; +}; + +/* SUME metadata: + * sport - not used for RX. For TX, set to 0x02, 0x08, 0x20, 0x80, depending on + * the sending interface (nf0, nf1, nf2 or nf3). + * dport - For RX, is set to 0x02, 0x08, 0x20, 0x80, depending on the receiving + * interface (nf0, nf1, nf2 or nf3). For TX, set to 0x01, 0x04, 0x10, 0x40, + * depending on the sending HW interface (nf0, nf1, nf2 or nf3). + * plen - length of the send/receive packet data (in bytes) + * magic - SUME hardcoded magic number which should be 0xcafe + * t1, t1 - could be used for timestamping by SUME + */ +struct nf_metadata { + uint16_t sport; + uint16_t dport; + uint16_t plen; + uint16_t magic; + uint32_t t1; + uint32_t t2; +}; + +/* Used for ioctl communication with the rwaxi program used to read/write SUME + * internally defined register data. + * addr - address of the SUME module register to read/write + * val - value to write/read to/from the register + * rtag - returned on read: transaction tag, for syncronization + * optype - 0x1f when writing, 0x00 for reading + */ +struct nf_regop_data { + uint32_t addr; + uint32_t val; + uint32_t rtag; + uint32_t optype; +}; + +/* Our bouncebuffer "descriptor". This holds our physical address (lower and + * upper values) of the beginning of the DMA data to RX/TX. The len is number + * of words to transmit. + */ +struct nf_bb_desc { + uint32_t lower; + uint32_t upper; + uint32_t len; +}; Property changes on: head/sys/dev/sume/adapter.h ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dev/sume/if_sume.c =================================================================== --- head/sys/dev/sume/if_sume.c (nonexistent) +++ head/sys/dev/sume/if_sume.c (revision 364973) @@ -0,0 +1,1602 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD + * + * Copyright (c) 2015 Bjoern A. Zeeb + * Copyright (c) 2020 Denis Salopek + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-11-C-0249 + * ("MRC2"), as part of the DARPA MRC research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include + +#include "adapter.h" + +#define PCI_VENDOR_ID_XILINX 0x10ee +#define PCI_DEVICE_ID_SUME 0x7028 + +/* SUME bus driver interface */ +static int sume_probe(device_t); +static int sume_attach(device_t); +static int sume_detach(device_t); + +static device_method_t sume_methods[] = { + DEVMETHOD(device_probe, sume_probe), + DEVMETHOD(device_attach, sume_attach), + DEVMETHOD(device_detach, sume_detach), + DEVMETHOD_END +}; + +static driver_t sume_driver = { + "sume", + sume_methods, + sizeof(struct sume_adapter) +}; + +/* + * The DMA engine for SUME generates interrupts for each RX/TX transaction. + * Depending on the channel (0 if packet transaction, 1 if register transaction) + * the used bits of the interrupt vector will be the lowest or the second lowest + * 5 bits. + * + * When receiving packets from SUME (RX): + * (1) SUME received a packet on one of the interfaces. + * (2) SUME generates an interrupt vector, bit 00001 is set (channel 0 - new RX + * transaction). + * (3) We read the length of the incoming packet and the offset along with the + * 'last' flag from the SUME registers. + * (4) We prepare for the DMA transaction by setting the bouncebuffer on the + * address buf_addr. For now, this is how it's done: + * - First 3*sizeof(uint32_t) bytes are: lower and upper 32 bits of physical + * address where we want the data to arrive (buf_addr[0] and buf_addr[1]), + * and length of incoming data (buf_addr[2]). + * - Data will start right after, at buf_addr+3*sizeof(uint32_t). The + * physical address buf_hw_addr is a block of contiguous memory mapped to + * buf_addr, so we can set the incoming data's physical address (buf_addr[0] + * and buf_addr[1]) to buf_hw_addr+3*sizeof(uint32_t). + * (5) We notify SUME that the bouncebuffer is ready for the transaction by + * writing the lower/upper physical address buf_hw_addr to the SUME + * registers RIFFA_TX_SG_ADDR_LO_REG_OFF and RIFFA_TX_SG_ADDR_HI_REG_OFF as + * well as the number of segments to the register RIFFA_TX_SG_LEN_REG_OFF. + * (6) SUME generates an interrupt vector, bit 00010 is set (channel 0 - + * bouncebuffer received). + * (7) SUME generates an interrupt vector, bit 00100 is set (channel 0 - + * transaction is done). + * (8) SUME can do both steps (6) and (7) using the same interrupt. + * (8) We read the first 16 bytes (metadata) of the received data and note the + * incoming interface so we can later forward it to the right one in the OS + * (sume0, sume1, sume2 or sume3). + * (10) We create an mbuf and copy the data from the bouncebuffer to the mbuf + * and set the mbuf rcvif to the incoming interface. + * (11) We forward the mbuf to the appropriate interface via ifp->if_input. + * + * When sending packets to SUME (TX): + * (1) The OS calls sume_if_start() function on TX. + * (2) We get the mbuf packet data and copy it to the + * buf_addr+3*sizeof(uint32_t) + metadata 16 bytes. + * (3) We create the metadata based on the output interface and copy it to the + * buf_addr+3*sizeof(uint32_t). + * (4) We write the offset/last and length of the packet to the SUME registers + * RIFFA_RX_OFFLAST_REG_OFF and RIFFA_RX_LEN_REG_OFF. + * (5) We fill the bouncebuffer by filling the first 3*sizeof(uint32_t) bytes + * with the physical address and length just as in RX step (4). + * (6) We notify SUME that the bouncebuffer is ready by writing to SUME + * registers RIFFA_RX_SG_ADDR_LO_REG_OFF, RIFFA_RX_SG_ADDR_HI_REG_OFF and + * RIFFA_RX_SG_LEN_REG_OFF just as in RX step (5). + * (7) SUME generates an interrupt vector, bit 01000 is set (channel 0 - + * bouncebuffer is read). + * (8) SUME generates an interrupt vector, bit 10000 is set (channel 0 - + * transaction is done). + * (9) SUME can do both steps (7) and (8) using the same interrupt. + * + * Internal registers + * Every module in the SUME hardware has its own set of internal registers + * (IDs, for debugging and statistic purposes, etc.). Their base addresses are + * defined in 'projects/reference_nic/hw/tcl/reference_nic_defines.tcl' and the + * offsets to different memory locations of every module are defined in their + * corresponding folder inside the library. These registers can be RO/RW and + * there is a special method to fetch/change this data over 1 or 2 DMA + * transactions. For writing, by calling the sume_module_reg_write(). For + * reading, by calling the sume_module_reg_write() and then + * sume_module_reg_read(). Check those functions for more information. + */ + +MALLOC_DECLARE(M_SUME); +MALLOC_DEFINE(M_SUME, "sume", "NetFPGA SUME device driver"); + +static void check_tx_queues(struct sume_adapter *); +static void sume_fill_bb_desc(struct sume_adapter *, struct riffa_chnl_dir *, + uint64_t); + +static struct unrhdr *unr; + +static struct { + uint16_t device; + char *desc; +} sume_pciids[] = { + {PCI_DEVICE_ID_SUME, "NetFPGA SUME reference NIC"}, +}; + +static inline uint32_t +read_reg(struct sume_adapter *adapter, int offset) +{ + + return (bus_space_read_4(adapter->bt, adapter->bh, offset << 2)); +} + +static inline void +write_reg(struct sume_adapter *adapter, int offset, uint32_t val) +{ + + bus_space_write_4(adapter->bt, adapter->bh, offset << 2, val); +} + +static int +sume_probe(device_t dev) +{ + int i; + uint16_t v = pci_get_vendor(dev); + uint16_t d = pci_get_device(dev); + + if (v != PCI_VENDOR_ID_XILINX) + return (ENXIO); + + for (i = 0; i < nitems(sume_pciids); i++) { + if (d == sume_pciids[i].device) { + device_set_desc(dev, sume_pciids[i].desc); + return (BUS_PROBE_DEFAULT); + } + } + + return (ENXIO); +} + +/* + * Building mbuf for packet received from SUME. We expect to receive 'len' + * bytes of data (including metadata) written from the bouncebuffer address + * buf_addr+3*sizeof(uint32_t). Metadata will tell us which SUME interface + * received the packet (sport will be 1, 2, 4 or 8), the packet length (plen), + * and the magic word needs to be 0xcafe. When we have the packet data, we + * create an mbuf and copy the data to it using m_copyback() function, set the + * correct interface to rcvif and return the mbuf to be later sent to the OS + * with if_input. + */ +static struct mbuf * +sume_rx_build_mbuf(struct sume_adapter *adapter, uint32_t len) +{ + struct nf_priv *nf_priv; + struct mbuf *m; + struct ifnet *ifp = NULL; + int np; + uint16_t dport, plen, magic; + device_t dev = adapter->dev; + uint8_t *indata = (uint8_t *) + adapter->recv[SUME_RIFFA_CHANNEL_DATA]->buf_addr + + sizeof(struct nf_bb_desc); + struct nf_metadata *mdata = (struct nf_metadata *) indata; + + /* The metadata header is 16 bytes. */ + if (len < sizeof(struct nf_metadata)) { + device_printf(dev, "short frame (%d)\n", len); + adapter->packets_err++; + adapter->bytes_err += len; + return (NULL); + } + + dport = le16toh(mdata->dport); + plen = le16toh(mdata->plen); + magic = le16toh(mdata->magic); + + if (sizeof(struct nf_metadata) + plen > len || + magic != SUME_RIFFA_MAGIC) { + device_printf(dev, "corrupted packet (%zd + %d > %d || magic " + "0x%04x != 0x%04x)\n", sizeof(struct nf_metadata), plen, + len, magic, SUME_RIFFA_MAGIC); + return (NULL); + } + + /* We got the packet from one of the even bits */ + np = (ffs(dport & SUME_DPORT_MASK) >> 1) - 1; + if (np > SUME_NPORTS) { + device_printf(dev, "invalid destination port 0x%04x (%d)\n", + dport, np); + adapter->packets_err++; + adapter->bytes_err += plen; + return (NULL); + } + ifp = adapter->ifp[np]; + nf_priv = ifp->if_softc; + nf_priv->stats.rx_packets++; + nf_priv->stats.rx_bytes += plen; + + /* If the interface is down, well, we are done. */ + if (!(ifp->if_flags & IFF_UP)) { + nf_priv->stats.ifc_down_packets++; + nf_priv->stats.ifc_down_bytes += plen; + return (NULL); + } + + if (adapter->sume_debug) + printf("Building mbuf with length: %d\n", plen); + + m = m_getm(NULL, plen, M_NOWAIT, MT_DATA); + if (m == NULL) { + adapter->packets_err++; + adapter->bytes_err += plen; + return (NULL); + } + + /* Copy the data in at the right offset. */ + m_copyback(m, 0, plen, (void *) (indata + sizeof(struct nf_metadata))); + m->m_pkthdr.rcvif = ifp; + + return (m); +} + +/* + * SUME interrupt handler for when we get a valid interrupt from the board. + * Theoretically, we can receive interrupt for any of the available channels, + * but RIFFA DMA uses only 2: 0 and 1, so we use only vect0. The vector is a 32 + * bit number, using 5 bits for every channel, the least significant bits + * correspond to channel 0 and the next 5 bits correspond to channel 1. Vector + * bits for RX/TX are: + * RX + * bit 0 - new transaction from SUME + * bit 1 - SUME received our bouncebuffer address + * bit 2 - SUME copied the received data to our bouncebuffer, transaction done + * TX + * bit 3 - SUME received our bouncebuffer address + * bit 4 - SUME copied the data from our bouncebuffer, transaction done + * + * There are two finite state machines (one for TX, one for RX). We loop + * through channels 0 and 1 to check and our current state and which interrupt + * bit is set. + * TX + * SUME_RIFFA_CHAN_STATE_IDLE: waiting for the first TX transaction. + * SUME_RIFFA_CHAN_STATE_READY: we prepared (filled with data) the bouncebuffer + * and triggered the SUME for the TX transaction. Waiting for interrupt bit 3 + * to go to the next state. + * SUME_RIFFA_CHAN_STATE_READ: waiting for interrupt bit 4 (for SUME to send + * our packet). Then we get the length of the sent data and go back to the + * IDLE state. + * RX + * SUME_RIFFA_CHAN_STATE_IDLE: waiting for the interrupt bit 0 (new RX + * transaction). When we get it, we prepare our bouncebuffer for reading and + * trigger the SUME to start the transaction. Go to the next state. + * SUME_RIFFA_CHAN_STATE_READY: waiting for the interrupt bit 1 (SUME got our + * bouncebuffer). Go to the next state. + * SUME_RIFFA_CHAN_STATE_READ: SUME copied data and our bouncebuffer is ready, + * we can build the mbuf and go back to the IDLE state. + */ +static void +sume_intr_handler(void *arg) +{ + struct sume_adapter *adapter = arg; + uint32_t vect, vect0, len; + int ch, loops; + device_t dev = adapter->dev; + struct mbuf *m = NULL; + struct ifnet *ifp = NULL; + struct riffa_chnl_dir *send, *recv; + + SUME_LOCK(adapter); + + vect0 = read_reg(adapter, RIFFA_IRQ_REG0_OFF); + if ((vect0 & SUME_INVALID_VECT) != 0) { + SUME_UNLOCK(adapter); + return; + } + + /* + * We only have one interrupt for all channels and no way + * to quickly lookup for which channel(s) we got an interrupt? + */ + for (ch = 0; ch < SUME_RIFFA_CHANNELS; ch++) { + vect = vect0 >> (5 * ch); + send = adapter->send[ch]; + recv = adapter->recv[ch]; + + loops = 0; + while ((vect & (SUME_MSI_TXBUF | SUME_MSI_TXDONE)) && + loops <= 5) { + if (adapter->sume_debug) + device_printf(dev, "TX ch %d state %u vect = " + "0x%08x\n", ch, send->state, vect); + switch (send->state) { + case SUME_RIFFA_CHAN_STATE_IDLE: + break; + case SUME_RIFFA_CHAN_STATE_READY: + if (!(vect & SUME_MSI_TXBUF)) { + device_printf(dev, "ch %d unexpected " + "interrupt in send+3 state %u: " + "vect = 0x%08x\n", ch, send->state, + vect); + send->recovery = 1; + break; + } + send->state = SUME_RIFFA_CHAN_STATE_READ; + vect &= ~SUME_MSI_TXBUF; + break; + case SUME_RIFFA_CHAN_STATE_READ: + if (!(vect & SUME_MSI_TXDONE)) { + device_printf(dev, "ch %d unexpected " + "interrupt in send+4 state %u: " + "vect = 0x%08x\n", ch, send->state, + vect); + send->recovery = 1; + break; + } + send->state = SUME_RIFFA_CHAN_STATE_LEN; + + len = read_reg(adapter, RIFFA_CHNL_REG(ch, + RIFFA_RX_TNFR_LEN_REG_OFF)); + if (ch == SUME_RIFFA_CHANNEL_DATA) { + send->state = + SUME_RIFFA_CHAN_STATE_IDLE; + check_tx_queues(adapter); + } else if (ch == SUME_RIFFA_CHANNEL_REG) + wakeup(&send->event); + else { + device_printf(dev, "ch %d unexpected " + "interrupt in send+4 state %u: " + "vect = 0x%08x\n", ch, send->state, + vect); + send->recovery = 1; + } + vect &= ~SUME_MSI_TXDONE; + break; + case SUME_RIFFA_CHAN_STATE_LEN: + break; + default: + device_printf(dev, "unknown TX state!\n"); + } + loops++; + } + + if ((vect & (SUME_MSI_TXBUF | SUME_MSI_TXDONE)) && + send->recovery) + device_printf(dev, "ch %d ignoring vect = 0x%08x " + "during TX; not in recovery; state = %d loops = " + "%d\n", ch, vect, send->state, loops); + + loops = 0; + while ((vect & (SUME_MSI_RXQUE | SUME_MSI_RXBUF | + SUME_MSI_RXDONE)) && loops < 5) { + if (adapter->sume_debug) + device_printf(dev, "RX ch %d state %u vect = " + "0x%08x\n", ch, recv->state, vect); + switch (recv->state) { + case SUME_RIFFA_CHAN_STATE_IDLE: + if (!(vect & SUME_MSI_RXQUE)) { + device_printf(dev, "ch %d unexpected " + "interrupt in recv+0 state %u: " + "vect = 0x%08x\n", ch, recv->state, + vect); + recv->recovery = 1; + break; + } + uint32_t max_ptr; + + /* Clear recovery state. */ + recv->recovery = 0; + + /* Get offset and length. */ + recv->offlast = read_reg(adapter, + RIFFA_CHNL_REG(ch, + RIFFA_TX_OFFLAST_REG_OFF)); + recv->len = read_reg(adapter, RIFFA_CHNL_REG(ch, + RIFFA_TX_LEN_REG_OFF)); + + /* Boundary checks. */ + max_ptr = (uint32_t)((uintptr_t)recv->buf_addr + + SUME_RIFFA_OFFSET(recv->offlast) + + SUME_RIFFA_LEN(recv->len) - 1); + if (max_ptr < + (uint32_t)((uintptr_t)recv->buf_addr)) + device_printf(dev, "receive buffer " + "wrap-around overflow.\n"); + if (SUME_RIFFA_OFFSET(recv->offlast) + + SUME_RIFFA_LEN(recv->len) > + adapter->sg_buf_size) + device_printf(dev, "receive buffer too" + " small.\n"); + + /* Fill the bouncebuf "descriptor". */ + sume_fill_bb_desc(adapter, recv, + SUME_RIFFA_LEN(recv->len)); + + bus_dmamap_sync(recv->ch_tag, recv->ch_map, + BUS_DMASYNC_PREREAD | + BUS_DMASYNC_PREWRITE); + write_reg(adapter, RIFFA_CHNL_REG(ch, + RIFFA_TX_SG_ADDR_LO_REG_OFF), + SUME_RIFFA_LO_ADDR(recv->buf_hw_addr)); + write_reg(adapter, RIFFA_CHNL_REG(ch, + RIFFA_TX_SG_ADDR_HI_REG_OFF), + SUME_RIFFA_HI_ADDR(recv->buf_hw_addr)); + write_reg(adapter, RIFFA_CHNL_REG(ch, + RIFFA_TX_SG_LEN_REG_OFF), + 4 * recv->num_sg); + bus_dmamap_sync(recv->ch_tag, recv->ch_map, + BUS_DMASYNC_POSTREAD | + BUS_DMASYNC_POSTWRITE); + + recv->state = SUME_RIFFA_CHAN_STATE_READY; + vect &= ~SUME_MSI_RXQUE; + break; + case SUME_RIFFA_CHAN_STATE_READY: + if (!(vect & SUME_MSI_RXBUF)) { + device_printf(dev, "ch %d unexpected " + "interrupt in recv+1 state %u: " + "vect = 0x%08x\n", ch, recv->state, + vect); + recv->recovery = 1; + break; + } + recv->state = SUME_RIFFA_CHAN_STATE_READ; + vect &= ~SUME_MSI_RXBUF; + break; + case SUME_RIFFA_CHAN_STATE_READ: + if (!(vect & SUME_MSI_RXDONE)) { + device_printf(dev, "ch %d unexpected " + "interrupt in recv+2 state %u: " + "vect = 0x%08x\n", ch, recv->state, + vect); + recv->recovery = 1; + break; + } + len = read_reg(adapter, RIFFA_CHNL_REG(ch, + RIFFA_TX_TNFR_LEN_REG_OFF)); + + /* Remember, len and recv->len are words. */ + if (ch == SUME_RIFFA_CHANNEL_DATA) { + m = sume_rx_build_mbuf(adapter, + len << 2); + recv->state = + SUME_RIFFA_CHAN_STATE_IDLE; + } else if (ch == SUME_RIFFA_CHANNEL_REG) + wakeup(&recv->event); + else { + device_printf(dev, "ch %d unexpected " + "interrupt in recv+2 state %u: " + "vect = 0x%08x\n", ch, recv->state, + vect); + recv->recovery = 1; + } + vect &= ~SUME_MSI_RXDONE; + break; + case SUME_RIFFA_CHAN_STATE_LEN: + break; + default: + device_printf(dev, "unknown RX state!\n"); + } + loops++; + } + + if ((vect & (SUME_MSI_RXQUE | SUME_MSI_RXBUF | + SUME_MSI_RXDONE)) && recv->recovery) { + device_printf(dev, "ch %d ignoring vect = 0x%08x " + "during RX; not in recovery; state = %d, loops = " + "%d\n", ch, vect, recv->state, loops); + + /* Clean the unfinished transaction. */ + if (ch == SUME_RIFFA_CHANNEL_REG && + vect & SUME_MSI_RXDONE) { + read_reg(adapter, RIFFA_CHNL_REG(ch, + RIFFA_TX_TNFR_LEN_REG_OFF)); + recv->recovery = 0; + } + } + } + SUME_UNLOCK(adapter); + + if (m != NULL) { + ifp = m->m_pkthdr.rcvif; + (*ifp->if_input)(ifp, m); + } +} + +/* + * As we cannot disable interrupt generation, ignore early interrupts by waiting + * for the adapter to go into the 'running' state. + */ +static int +sume_intr_filter(void *arg) +{ + struct sume_adapter *adapter = arg; + + if (adapter->running == 0) + return (FILTER_STRAY); + + return (FILTER_SCHEDULE_THREAD); +} + +static int +sume_probe_riffa_pci(struct sume_adapter *adapter) +{ + device_t dev = adapter->dev; + int error, count, capmem; + uint32_t reg, devctl, linkctl; + + pci_enable_busmaster(dev); + + adapter->rid = PCIR_BAR(0); + adapter->bar0_addr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, + &adapter->rid, RF_ACTIVE); + if (adapter->bar0_addr == NULL) { + device_printf(dev, "unable to allocate bus resource: " + "BAR0 address\n"); + return (ENXIO); + } + adapter->bt = rman_get_bustag(adapter->bar0_addr); + adapter->bh = rman_get_bushandle(adapter->bar0_addr); + adapter->bar0_len = rman_get_size(adapter->bar0_addr); + if (adapter->bar0_len != 1024) { + device_printf(dev, "BAR0 resource length %lu != 1024\n", + adapter->bar0_len); + return (ENXIO); + } + + count = pci_msi_count(dev); + error = pci_alloc_msi(dev, &count); + if (error) { + device_printf(dev, "unable to allocate bus resource: PCI " + "MSI\n"); + return (error); + } + + adapter->irq.rid = 1; /* Should be 1, thus says pci_alloc_msi() */ + adapter->irq.res = bus_alloc_resource_any(dev, SYS_RES_IRQ, + &adapter->irq.rid, RF_SHAREABLE | RF_ACTIVE); + if (adapter->irq.res == NULL) { + device_printf(dev, "unable to allocate bus resource: IRQ " + "memory\n"); + return (ENXIO); + } + + error = bus_setup_intr(dev, adapter->irq.res, INTR_MPSAFE | + INTR_TYPE_NET, sume_intr_filter, sume_intr_handler, adapter, + &adapter->irq.tag); + if (error) { + device_printf(dev, "failed to setup interrupt for rid %d, name" + " %s: %d\n", adapter->irq.rid, "SUME_INTR", error); + return (ENXIO); + } + + if (pci_find_cap(dev, PCIY_EXPRESS, &capmem) != 0) { + device_printf(dev, "PCI not PCIe capable\n"); + return (ENXIO); + } + + devctl = pci_read_config(dev, capmem + PCIER_DEVICE_CTL, 2); + pci_write_config(dev, capmem + PCIER_DEVICE_CTL, (devctl | + PCIEM_CTL_EXT_TAG_FIELD), 2); + + devctl = pci_read_config(dev, capmem + PCIER_DEVICE_CTL2, 2); + pci_write_config(dev, capmem + PCIER_DEVICE_CTL2, (devctl | + PCIEM_CTL2_ID_ORDERED_REQ_EN), 2); + + linkctl = pci_read_config(dev, capmem + PCIER_LINK_CTL, 2); + pci_write_config(dev, capmem + PCIER_LINK_CTL, (linkctl | + PCIEM_LINK_CTL_RCB), 2); + + reg = read_reg(adapter, RIFFA_INFO_REG_OFF); + adapter->num_sg = RIFFA_SG_ELEMS * ((reg >> 19) & 0xf); + adapter->sg_buf_size = RIFFA_SG_BUF_SIZE * ((reg >> 19) & 0xf); + + error = ENODEV; + /* Check bus master is enabled. */ + if (((reg >> 4) & 0x1) != 1) { + device_printf(dev, "bus master not enabled: %d\n", + (reg >> 4) & 0x1); + return (error); + } + /* Check link parameters are valid. */ + if (((reg >> 5) & 0x3f) == 0 || ((reg >> 11) & 0x3) == 0) { + device_printf(dev, "link parameters not valid: %d %d\n", + (reg >> 5) & 0x3f, (reg >> 11) & 0x3); + return (error); + } + /* Check # of channels are within valid range. */ + if ((reg & 0xf) == 0 || (reg & 0xf) > RIFFA_MAX_CHNLS) { + device_printf(dev, "number of channels out of range: %d\n", + reg & 0xf); + return (error); + } + /* Check bus width. */ + if (((reg >> 19) & 0xf) == 0 || + ((reg >> 19) & 0xf) > RIFFA_MAX_BUS_WIDTH_PARAM) { + device_printf(dev, "bus width out of range: %d\n", + (reg >> 19) & 0xf); + return (error); + } + + device_printf(dev, "[riffa] # of channels: %d\n", + reg & 0xf); + device_printf(dev, "[riffa] bus interface width: %d\n", + ((reg >> 19) & 0xf) << 5); + device_printf(dev, "[riffa] bus master enabled: %d\n", + (reg >> 4) & 0x1); + device_printf(dev, "[riffa] negotiated link width: %d\n", + (reg >> 5) & 0x3f); + device_printf(dev, "[riffa] negotiated rate width: %d MTs\n", + ((reg >> 11) & 0x3) * 2500); + device_printf(dev, "[riffa] max downstream payload: %d B\n", + 128 << ((reg >> 13) & 0x7)); + device_printf(dev, "[riffa] max upstream payload: %d B\n", + 128 << ((reg >> 16) & 0x7)); + + return (0); +} + +/* If there is no sume_if_init, the ether_ioctl panics. */ +static void +sume_if_init(void *sc) +{ +} + +/* Write the address and length for our incoming / outgoing transaction. */ +static void +sume_fill_bb_desc(struct sume_adapter *adapter, struct riffa_chnl_dir *p, + uint64_t len) +{ + struct nf_bb_desc *bouncebuf = (struct nf_bb_desc *) p->buf_addr; + + bouncebuf->lower = (p->buf_hw_addr + sizeof(struct nf_bb_desc)); + bouncebuf->upper = (p->buf_hw_addr + sizeof(struct nf_bb_desc)) >> 32; + bouncebuf->len = len >> 2; +} + +/* Module register locked write. */ +static int +sume_modreg_write_locked(struct sume_adapter *adapter) +{ + struct riffa_chnl_dir *send = adapter->send[SUME_RIFFA_CHANNEL_REG]; + + /* Let the FPGA know about the transfer. */ + write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_REG, + RIFFA_RX_OFFLAST_REG_OFF), SUME_OFFLAST); + write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_REG, + RIFFA_RX_LEN_REG_OFF), send->len); /* words */ + + /* Fill the bouncebuf "descriptor". */ + sume_fill_bb_desc(adapter, send, SUME_RIFFA_LEN(send->len)); + + /* Update the state before intiating the DMA to avoid races. */ + send->state = SUME_RIFFA_CHAN_STATE_READY; + + bus_dmamap_sync(send->ch_tag, send->ch_map, + BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); + /* DMA. */ + write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_REG, + RIFFA_RX_SG_ADDR_LO_REG_OFF), + SUME_RIFFA_LO_ADDR(send->buf_hw_addr)); + write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_REG, + RIFFA_RX_SG_ADDR_HI_REG_OFF), + SUME_RIFFA_HI_ADDR(send->buf_hw_addr)); + write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_REG, + RIFFA_RX_SG_LEN_REG_OFF), 4 * send->num_sg); + bus_dmamap_sync(send->ch_tag, send->ch_map, + BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); + + return (0); +} + +/* + * Request a register read or write (depending on optype). + * If optype is set (0x1f) this will result in a register write, + * otherwise this will result in a register read request at the given + * address and the result will need to be DMAed back. + */ +static int +sume_module_reg_write(struct nf_priv *nf_priv, struct sume_ifreq *sifr, + uint32_t optype) +{ + struct sume_adapter *adapter = nf_priv->adapter; + struct riffa_chnl_dir *send = adapter->send[SUME_RIFFA_CHANNEL_REG]; + struct nf_regop_data *data; + int error; + + /* + * 1. Make sure the channel is free; otherwise return EBUSY. + * 2. Prepare the memory in the bounce buffer (which we always + * use for regs). + * 3. Start the DMA process. + * 4. Sleep and wait for result and return success or error. + */ + SUME_LOCK(adapter); + + if (send->state != SUME_RIFFA_CHAN_STATE_IDLE) { + SUME_UNLOCK(adapter); + return (EBUSY); + } + + data = (struct nf_regop_data *) (send->buf_addr + + sizeof(struct nf_bb_desc)); + data->addr = htole32(sifr->addr); + data->val = htole32(sifr->val); + /* Tag to indentify request. */ + data->rtag = htole32(++send->rtag); + data->optype = htole32(optype); + send->len = sizeof(struct nf_regop_data) / 4; /* words */ + + error = sume_modreg_write_locked(adapter); + if (error) { + SUME_UNLOCK(adapter); + return (EFAULT); + } + + /* Timeout after 1s. */ + if (send->state != SUME_RIFFA_CHAN_STATE_LEN) + error = msleep(&send->event, &adapter->lock, 0, + "Waiting recv finish", 1 * hz); + + /* This was a write so we are done; were interrupted, or timed out. */ + if (optype != SUME_MR_READ || error != 0 || error == EWOULDBLOCK) { + send->state = SUME_RIFFA_CHAN_STATE_IDLE; + if (optype == SUME_MR_READ) + error = EWOULDBLOCK; + else + error = 0; + } else + error = 0; + + /* + * For read requests we will update state once we are done + * having read the result to avoid any two outstanding + * transactions, or we need a queue and validate tags, + * which is a lot of work for a low priority, infrequent + * event. + */ + + SUME_UNLOCK(adapter); + + return (error); +} + +/* Module register read. */ +static int +sume_module_reg_read(struct nf_priv *nf_priv, struct sume_ifreq *sifr) +{ + struct sume_adapter *adapter = nf_priv->adapter; + struct riffa_chnl_dir *recv = adapter->recv[SUME_RIFFA_CHANNEL_REG]; + struct riffa_chnl_dir *send = adapter->send[SUME_RIFFA_CHANNEL_REG]; + struct nf_regop_data *data; + int error = 0; + + /* + * 0. Sleep waiting for result if needed (unless condition is + * true already). + * 1. Read DMA results. + * 2. Update state on *TX* to IDLE to allow next read to start. + */ + SUME_LOCK(adapter); + + bus_dmamap_sync(recv->ch_tag, recv->ch_map, + BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); + /* + * We only need to be woken up at the end of the transaction. + * Timeout after 1s. + */ + if (recv->state != SUME_RIFFA_CHAN_STATE_READ) + error = msleep(&recv->event, &adapter->lock, 0, + "Waiting transaction finish", 1 * hz); + + if (recv->state != SUME_RIFFA_CHAN_STATE_READ || error == EWOULDBLOCK) { + SUME_UNLOCK(adapter); + device_printf(adapter->dev, "wait error: %d\n", error); + return (EWOULDBLOCK); + } + + bus_dmamap_sync(recv->ch_tag, recv->ch_map, + BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); + + /* + * Read reply data and validate address and tag. + * Note: we do access the send side without lock but the state + * machine does prevent the data from changing. + */ + data = (struct nf_regop_data *) (recv->buf_addr + + sizeof(struct nf_bb_desc)); + + if (le32toh(data->rtag) != send->rtag) + device_printf(adapter->dev, "rtag error: 0x%08x 0x%08x\n", + le32toh(data->rtag), send->rtag); + + sifr->val = le32toh(data->val); + recv->state = SUME_RIFFA_CHAN_STATE_IDLE; + + /* We are done. */ + send->state = SUME_RIFFA_CHAN_STATE_IDLE; + + SUME_UNLOCK(adapter); + + return (0); +} + +/* Read value from a module register and return it to a sume_ifreq. */ +static int +get_modreg_value(struct nf_priv *nf_priv, struct sume_ifreq *sifr) +{ + int error; + + error = sume_module_reg_write(nf_priv, sifr, SUME_MR_READ); + if (!error) + error = sume_module_reg_read(nf_priv, sifr); + + return (error); +} + +static int +sume_if_ioctl(struct ifnet *ifp, unsigned long cmd, caddr_t data) +{ + struct ifreq *ifr = (struct ifreq *) data; + struct nf_priv *nf_priv = ifp->if_softc; + struct sume_ifreq sifr; + int error = 0; + + switch (cmd) { + case SIOCGIFMEDIA: + case SIOCGIFXMEDIA: + error = ifmedia_ioctl(ifp, ifr, &nf_priv->media, cmd); + break; + + case SUME_IOCTL_CMD_WRITE_REG: + error = copyin(ifr_data_get_ptr(ifr), &sifr, sizeof(sifr)); + if (error) { + error = EINVAL; + break; + } + error = sume_module_reg_write(nf_priv, &sifr, SUME_MR_WRITE); + break; + + case SUME_IOCTL_CMD_READ_REG: + error = copyin(ifr_data_get_ptr(ifr), &sifr, sizeof(sifr)); + if (error) { + error = EINVAL; + break; + } + + error = get_modreg_value(nf_priv, &sifr); + if (error) + break; + + error = copyout(&sifr, ifr_data_get_ptr(ifr), sizeof(sifr)); + if (error) + error = EINVAL; + + break; + + case SIOCSIFFLAGS: + /* Silence tcpdump 'promisc mode not supported' warning. */ + if (ifp->if_flags & IFF_PROMISC) + break; + + default: + error = ether_ioctl(ifp, cmd, data); + break; + } + + return (error); +} + +static int +sume_media_change(struct ifnet *ifp) +{ + struct nf_priv *nf_priv = ifp->if_softc; + struct ifmedia *ifm = &nf_priv->media; + + if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) + return (EINVAL); + + if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10G_SR) + ifp->if_baudrate = ifmedia_baudrate(IFM_ETHER | IFM_10G_SR); + else + ifp->if_baudrate = ifmedia_baudrate(ifm->ifm_media); + + return (0); +} + +static void +sume_update_link_status(struct ifnet *ifp) +{ + struct nf_priv *nf_priv = ifp->if_softc; + struct sume_adapter *adapter = nf_priv->adapter; + struct sume_ifreq sifr; + int link_status; + + sifr.addr = SUME_STATUS_ADDR(nf_priv->port); + sifr.val = 0; + + if (get_modreg_value(nf_priv, &sifr)) + return; + + link_status = SUME_LINK_STATUS(sifr.val); + + if (!link_status && nf_priv->link_up) { + if_link_state_change(ifp, LINK_STATE_DOWN); + nf_priv->link_up = 0; + if (adapter->sume_debug) + device_printf(adapter->dev, "port %d link state " + "changed to DOWN\n", nf_priv->unit); + } else if (link_status && !nf_priv->link_up) { + nf_priv->link_up = 1; + if_link_state_change(ifp, LINK_STATE_UP); + if (adapter->sume_debug) + device_printf(adapter->dev, "port %d link state " + "changed to UP\n", nf_priv->unit); + } +} + +static void +sume_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) +{ + struct nf_priv *nf_priv = ifp->if_softc; + struct ifmedia *ifm = &nf_priv->media; + + if (ifm->ifm_cur->ifm_media == (IFM_ETHER | IFM_10G_SR) && + (ifp->if_flags & IFF_UP)) + ifmr->ifm_active = IFM_ETHER | IFM_10G_SR; + else + ifmr->ifm_active = ifm->ifm_cur->ifm_media; + + ifmr->ifm_status |= IFM_AVALID; + + sume_update_link_status(ifp); + + if (nf_priv->link_up) + ifmr->ifm_status |= IFM_ACTIVE; +} + +/* + * Packet to transmit. We take the packet data from the mbuf and copy it to the + * bouncebuffer address buf_addr+3*sizeof(uint32_t)+16. The 16 bytes before the + * packet data are for metadata: sport/dport (depending on our source + * interface), packet length and magic 0xcafe. We tell the SUME about the + * transfer, fill the first 3*sizeof(uint32_t) bytes of the bouncebuffer with + * the information about the start and length of the packet and trigger the + * transaction. + */ +static int +sume_if_start_locked(struct ifnet *ifp) +{ + struct mbuf *m; + struct nf_priv *nf_priv = ifp->if_softc; + struct sume_adapter *adapter = nf_priv->adapter; + struct riffa_chnl_dir *send = adapter->send[SUME_RIFFA_CHANNEL_DATA]; + uint8_t *outbuf; + struct nf_metadata *mdata; + int plen = SUME_MIN_PKT_SIZE; + + KASSERT(mtx_owned(&adapter->lock), ("SUME lock not owned")); + KASSERT(send->state == SUME_RIFFA_CHAN_STATE_IDLE, + ("SUME not in IDLE state")); + + IFQ_DEQUEUE(&ifp->if_snd, m); + if (m == NULL) + return (EINVAL); + + /* Packets large enough do not need to be padded */ + if (m->m_pkthdr.len > SUME_MIN_PKT_SIZE) + plen = m->m_pkthdr.len; + + if (adapter->sume_debug) + device_printf(adapter->dev, "sending %d bytes to %s%d\n", plen, + SUME_ETH_DEVICE_NAME, nf_priv->unit); + + outbuf = (uint8_t *) send->buf_addr + sizeof(struct nf_bb_desc); + mdata = (struct nf_metadata *) outbuf; + + /* Clear the recovery flag. */ + send->recovery = 0; + + /* Make sure we fit with the 16 bytes nf_metadata. */ + if (m->m_pkthdr.len + sizeof(struct nf_metadata) > + adapter->sg_buf_size) { + device_printf(adapter->dev, "packet too big for bounce buffer " + "(%d)\n", m->m_pkthdr.len); + m_freem(m); + nf_priv->stats.tx_dropped++; + return (ENOMEM); + } + + bus_dmamap_sync(send->ch_tag, send->ch_map, + BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); + + /* Zero out the padded data */ + if (m->m_pkthdr.len < SUME_MIN_PKT_SIZE) + bzero(outbuf + sizeof(struct nf_metadata), SUME_MIN_PKT_SIZE); + /* Skip the first 16 bytes for the metadata. */ + m_copydata(m, 0, m->m_pkthdr.len, outbuf + sizeof(struct nf_metadata)); + send->len = (sizeof(struct nf_metadata) + plen + 3) / 4; + + /* Fill in the metadata: CPU(DMA) ports are odd, MAC ports are even. */ + mdata->sport = htole16(1 << (nf_priv->port * 2 + 1)); + mdata->dport = htole16(1 << (nf_priv->port * 2)); + mdata->plen = htole16(plen); + mdata->magic = htole16(SUME_RIFFA_MAGIC); + mdata->t1 = htole32(0); + mdata->t2 = htole32(0); + + /* Let the FPGA know about the transfer. */ + write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_DATA, + RIFFA_RX_OFFLAST_REG_OFF), SUME_OFFLAST); + write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_DATA, + RIFFA_RX_LEN_REG_OFF), send->len); + + /* Fill the bouncebuf "descriptor". */ + sume_fill_bb_desc(adapter, send, SUME_RIFFA_LEN(send->len)); + + /* Update the state before intiating the DMA to avoid races. */ + send->state = SUME_RIFFA_CHAN_STATE_READY; + + /* DMA. */ + write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_DATA, + RIFFA_RX_SG_ADDR_LO_REG_OFF), + SUME_RIFFA_LO_ADDR(send->buf_hw_addr)); + write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_DATA, + RIFFA_RX_SG_ADDR_HI_REG_OFF), + SUME_RIFFA_HI_ADDR(send->buf_hw_addr)); + write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_DATA, + RIFFA_RX_SG_LEN_REG_OFF), 4 * send->num_sg); + + bus_dmamap_sync(send->ch_tag, send->ch_map, + BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); + + nf_priv->stats.tx_packets++; + nf_priv->stats.tx_bytes += plen; + + /* We can free as long as we use the bounce buffer. */ + m_freem(m); + + adapter->last_ifc = nf_priv->port; + + /* Reset watchdog counter. */ + adapter->wd_counter = 0; + + return (0); +} + +static void +sume_if_start(struct ifnet *ifp) +{ + struct nf_priv *nf_priv = ifp->if_softc; + struct sume_adapter *adapter = nf_priv->adapter; + + if (!adapter->running || !(ifp->if_flags & IFF_UP)) + return; + + SUME_LOCK(adapter); + if (adapter->send[SUME_RIFFA_CHANNEL_DATA]->state == + SUME_RIFFA_CHAN_STATE_IDLE) + sume_if_start_locked(ifp); + SUME_UNLOCK(adapter); +} + +/* + * We call this function at the end of every TX transaction to check for + * remaining packets in the TX queues for every UP interface. + */ +static void +check_tx_queues(struct sume_adapter *adapter) +{ + int i, last_ifc; + + KASSERT(mtx_owned(&adapter->lock), ("SUME lock not owned")); + + last_ifc = adapter->last_ifc; + + /* Check all interfaces */ + for (i = last_ifc + 1; i < last_ifc + SUME_NPORTS + 1; i++) { + struct ifnet *ifp = adapter->ifp[i % SUME_NPORTS]; + + if (!(ifp->if_flags & IFF_UP)) + continue; + + if (!sume_if_start_locked(ifp)) + break; + } +} + +static int +sume_ifp_alloc(struct sume_adapter *adapter, uint32_t port) +{ + struct ifnet *ifp; + struct nf_priv *nf_priv = malloc(sizeof(struct nf_priv), M_SUME, + M_ZERO | M_WAITOK); + + ifp = if_alloc(IFT_ETHER); + if (ifp == NULL) { + device_printf(adapter->dev, "cannot allocate ifnet\n"); + return (ENOMEM); + } + + adapter->ifp[port] = ifp; + ifp->if_softc = nf_priv; + + nf_priv->adapter = adapter; + nf_priv->unit = alloc_unr(unr); + nf_priv->port = port; + nf_priv->link_up = 0; + + if_initname(ifp, SUME_ETH_DEVICE_NAME, nf_priv->unit); + ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; + + ifp->if_init = sume_if_init; + ifp->if_start = sume_if_start; + ifp->if_ioctl = sume_if_ioctl; + + uint8_t hw_addr[ETHER_ADDR_LEN] = DEFAULT_ETHER_ADDRESS; + hw_addr[ETHER_ADDR_LEN-1] = nf_priv->unit; + ether_ifattach(ifp, hw_addr); + + ifmedia_init(&nf_priv->media, IFM_IMASK, sume_media_change, + sume_media_status); + ifmedia_add(&nf_priv->media, IFM_ETHER | IFM_10G_SR, 0, NULL); + ifmedia_set(&nf_priv->media, IFM_ETHER | IFM_10G_SR); + + ifp->if_drv_flags |= IFF_DRV_RUNNING; + + return (0); +} + +static void +callback_dma(void *arg, bus_dma_segment_t *segs, int nseg, int err) +{ + if (err) + return; + + KASSERT(nseg == 1, ("%d segments returned!", nseg)); + + *(bus_addr_t *) arg = segs[0].ds_addr; +} + +static int +sume_probe_riffa_buffer(const struct sume_adapter *adapter, + struct riffa_chnl_dir ***p, const char *dir) +{ + struct riffa_chnl_dir **rp; + bus_addr_t hw_addr; + int error, ch; + device_t dev = adapter->dev; + + error = ENOMEM; + *p = malloc(SUME_RIFFA_CHANNELS * sizeof(struct riffa_chnl_dir *), + M_SUME, M_ZERO | M_WAITOK); + if (*p == NULL) { + device_printf(dev, "malloc(%s) failed.\n", dir); + return (error); + } + + rp = *p; + /* Allocate the chnl_dir structs themselves. */ + for (ch = 0; ch < SUME_RIFFA_CHANNELS; ch++) { + /* One direction. */ + rp[ch] = malloc(sizeof(struct riffa_chnl_dir), M_SUME, + M_ZERO | M_WAITOK); + if (rp[ch] == NULL) { + device_printf(dev, "malloc(%s[%d]) riffa_chnl_dir " + "failed.\n", dir, ch); + return (error); + } + + int err = bus_dma_tag_create(bus_get_dma_tag(dev), + 4, 0, + BUS_SPACE_MAXADDR, + BUS_SPACE_MAXADDR, + NULL, NULL, + adapter->sg_buf_size, + 1, + adapter->sg_buf_size, + 0, + NULL, + NULL, + &rp[ch]->ch_tag); + + if (err) { + device_printf(dev, "bus_dma_tag_create(%s[%d]) " + "failed.\n", dir, ch); + return (err); + } + + err = bus_dmamem_alloc(rp[ch]->ch_tag, (void **) + &rp[ch]->buf_addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT | + BUS_DMA_ZERO, &rp[ch]->ch_map); + if (err) { + device_printf(dev, "bus_dmamem_alloc(%s[%d]) failed.\n", + dir, ch); + return (err); + } + + bzero(rp[ch]->buf_addr, adapter->sg_buf_size); + + err = bus_dmamap_load(rp[ch]->ch_tag, rp[ch]->ch_map, + rp[ch]->buf_addr, adapter->sg_buf_size, callback_dma, + &hw_addr, BUS_DMA_NOWAIT); + if (err) { + device_printf(dev, "bus_dmamap_load(%s[%d]) failed.\n", + dir, ch); + return (err); + } + rp[ch]->buf_hw_addr = hw_addr; + rp[ch]->num_sg = 1; + rp[ch]->state = SUME_RIFFA_CHAN_STATE_IDLE; + + rp[ch]->rtag = SUME_INIT_RTAG; + } + + return (0); +} + +static int +sume_probe_riffa_buffers(struct sume_adapter *adapter) +{ + int error; + + error = sume_probe_riffa_buffer(adapter, &adapter->recv, "recv"); + if (error) + return (error); + + error = sume_probe_riffa_buffer(adapter, &adapter->send, "send"); + + return (error); +} + +static void +sume_sysctl_init(struct sume_adapter *adapter) +{ + device_t dev = adapter->dev; + struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); + struct sysctl_oid *tree = device_get_sysctl_tree(dev); + struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); + struct sysctl_oid *tmp_tree; + char namebuf[MAX_IFC_NAME_LEN]; + int i; + + tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "sume", CTLFLAG_RW, + 0, "SUME top-level tree"); + if (tree == NULL) { + device_printf(dev, "SYSCTL_ADD_NODE failed.\n"); + return; + } + SYSCTL_ADD_INT(ctx, child, OID_AUTO, "debug", CTLFLAG_RW, + &adapter->sume_debug, 0, "debug int leaf"); + + /* total RX error stats */ + SYSCTL_ADD_U64(ctx, child, OID_AUTO, "rx_epkts", + CTLFLAG_RD, &adapter->packets_err, 0, "rx errors"); + SYSCTL_ADD_U64(ctx, child, OID_AUTO, "rx_ebytes", + CTLFLAG_RD, &adapter->bytes_err, 0, "rx error bytes"); + + for (i = SUME_NPORTS - 1; i >= 0; i--) { + struct ifnet *ifp = adapter->ifp[i]; + if (ifp == NULL) + continue; + + struct nf_priv *nf_priv = ifp->if_softc; + + snprintf(namebuf, MAX_IFC_NAME_LEN, "%s%d", + SUME_ETH_DEVICE_NAME, nf_priv->unit); + tmp_tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, + CTLFLAG_RW, 0, "SUME ifc tree"); + if (tmp_tree == NULL) { + device_printf(dev, "SYSCTL_ADD_NODE failed.\n"); + return; + } + + /* Packets dropped by down interface. */ + SYSCTL_ADD_U64(ctx, SYSCTL_CHILDREN(tmp_tree), OID_AUTO, + "ifc_down_bytes", CTLFLAG_RD, + &nf_priv->stats.ifc_down_bytes, 0, "ifc_down bytes"); + SYSCTL_ADD_U64(ctx, SYSCTL_CHILDREN(tmp_tree), OID_AUTO, + "ifc_down_packets", CTLFLAG_RD, + &nf_priv->stats.ifc_down_packets, 0, "ifc_down packets"); + + /* HW RX stats */ + SYSCTL_ADD_U64(ctx, SYSCTL_CHILDREN(tmp_tree), OID_AUTO, + "hw_rx_packets", CTLFLAG_RD, &nf_priv->stats.hw_rx_packets, + 0, "hw_rx packets"); + + /* HW TX stats */ + SYSCTL_ADD_U64(ctx, SYSCTL_CHILDREN(tmp_tree), OID_AUTO, + "hw_tx_packets", CTLFLAG_RD, &nf_priv->stats.hw_tx_packets, + 0, "hw_tx packets"); + + /* RX stats */ + SYSCTL_ADD_U64(ctx, SYSCTL_CHILDREN(tmp_tree), OID_AUTO, + "rx_bytes", CTLFLAG_RD, &nf_priv->stats.rx_bytes, 0, + "rx bytes"); + SYSCTL_ADD_U64(ctx, SYSCTL_CHILDREN(tmp_tree), OID_AUTO, + "rx_dropped", CTLFLAG_RD, &nf_priv->stats.rx_dropped, 0, + "rx dropped"); + SYSCTL_ADD_U64(ctx, SYSCTL_CHILDREN(tmp_tree), OID_AUTO, + "rx_packets", CTLFLAG_RD, &nf_priv->stats.rx_packets, 0, + "rx packets"); + + /* TX stats */ + SYSCTL_ADD_U64(ctx, SYSCTL_CHILDREN(tmp_tree), OID_AUTO, + "tx_bytes", CTLFLAG_RD, &nf_priv->stats.tx_bytes, 0, + "tx bytes"); + SYSCTL_ADD_U64(ctx, SYSCTL_CHILDREN(tmp_tree), OID_AUTO, + "tx_dropped", CTLFLAG_RD, &nf_priv->stats.tx_dropped, 0, + "tx dropped"); + SYSCTL_ADD_U64(ctx, SYSCTL_CHILDREN(tmp_tree), OID_AUTO, + "tx_packets", CTLFLAG_RD, &nf_priv->stats.tx_packets, 0, + "tx packets"); + } +} + +static void +sume_local_timer(void *arg) +{ + struct sume_adapter *adapter = arg; + + if (!adapter->running) + return; + + taskqueue_enqueue(adapter->tq, &adapter->stat_task); + + SUME_LOCK(adapter); + if (adapter->send[SUME_RIFFA_CHANNEL_DATA]->state != + SUME_RIFFA_CHAN_STATE_IDLE && ++adapter->wd_counter >= 3) { + /* Resetting interfaces if stuck for 3 seconds. */ + device_printf(adapter->dev, "TX stuck, resetting adapter.\n"); + read_reg(adapter, RIFFA_INFO_REG_OFF); + + adapter->send[SUME_RIFFA_CHANNEL_DATA]->state = + SUME_RIFFA_CHAN_STATE_IDLE; + adapter->wd_counter = 0; + + check_tx_queues(adapter); + } + SUME_UNLOCK(adapter); + + callout_reset(&adapter->timer, 1 * hz, sume_local_timer, adapter); +} + +static void +sume_get_stats(void *context, int pending) +{ + struct sume_adapter *adapter = context; + int i; + + for (i = 0; i < SUME_NPORTS; i++) { + struct ifnet *ifp = adapter->ifp[i]; + + if (ifp->if_flags & IFF_UP) { + struct nf_priv *nf_priv = ifp->if_softc; + struct sume_ifreq sifr; + + sume_update_link_status(ifp); + + /* Get RX counter. */ + sifr.addr = SUME_STAT_RX_ADDR(nf_priv->port); + sifr.val = 0; + + if (!get_modreg_value(nf_priv, &sifr)) + nf_priv->stats.hw_rx_packets += sifr.val; + + /* Get TX counter. */ + sifr.addr = SUME_STAT_TX_ADDR(nf_priv->port); + sifr.val = 0; + + if (!get_modreg_value(nf_priv, &sifr)) + nf_priv->stats.hw_tx_packets += sifr.val; + } + } +} + +static int +sume_attach(device_t dev) +{ + struct sume_adapter *adapter = device_get_softc(dev); + adapter->dev = dev; + int error, i; + + mtx_init(&adapter->lock, "Global lock", NULL, MTX_DEF); + + adapter->running = 0; + + /* OK finish up RIFFA. */ + error = sume_probe_riffa_pci(adapter); + if (error != 0) + goto error; + + error = sume_probe_riffa_buffers(adapter); + if (error != 0) + goto error; + + /* Now do the network interfaces. */ + for (i = 0; i < SUME_NPORTS; i++) { + error = sume_ifp_alloc(adapter, i); + if (error != 0) + goto error; + } + + /* Register stats and register sysctls. */ + sume_sysctl_init(adapter); + + /* Reset the HW. */ + read_reg(adapter, RIFFA_INFO_REG_OFF); + + /* Ready to go, "enable" IRQ. */ + adapter->running = 1; + + callout_init(&adapter->timer, 1); + TASK_INIT(&adapter->stat_task, 0, sume_get_stats, adapter); + + adapter->tq = taskqueue_create("sume_stats", M_NOWAIT, + taskqueue_thread_enqueue, &adapter->tq); + taskqueue_start_threads(&adapter->tq, 1, PI_NET, "%s stattaskq", + device_get_nameunit(adapter->dev)); + + callout_reset(&adapter->timer, 1 * hz, sume_local_timer, adapter); + + return (0); + +error: + sume_detach(dev); + + return (error); +} + +static void +sume_remove_riffa_buffer(const struct sume_adapter *adapter, + struct riffa_chnl_dir **pp) +{ + int ch; + + for (ch = 0; ch < SUME_RIFFA_CHANNELS; ch++) { + if (pp[ch] == NULL) + continue; + + if (pp[ch]->buf_hw_addr != 0) { + bus_dmamem_free(pp[ch]->ch_tag, pp[ch]->buf_addr, + pp[ch]->ch_map); + pp[ch]->buf_hw_addr = 0; + } + + free(pp[ch], M_SUME); + } +} + +static void +sume_remove_riffa_buffers(struct sume_adapter *adapter) +{ + if (adapter->send != NULL) { + sume_remove_riffa_buffer(adapter, adapter->send); + free(adapter->send, M_SUME); + adapter->send = NULL; + } + if (adapter->recv != NULL) { + sume_remove_riffa_buffer(adapter, adapter->recv); + free(adapter->recv, M_SUME); + adapter->recv = NULL; + } +} + +static int +sume_detach(device_t dev) +{ + struct sume_adapter *adapter = device_get_softc(dev); + int i; + struct nf_priv *nf_priv; + + KASSERT(mtx_initialized(&adapter->lock), ("SUME mutex not " + "initialized")); + adapter->running = 0; + + /* Drain the stats callout and task queue. */ + callout_drain(&adapter->timer); + + if (adapter->tq) { + taskqueue_drain(adapter->tq, &adapter->stat_task); + taskqueue_free(adapter->tq); + } + + for (i = 0; i < SUME_NPORTS; i++) { + struct ifnet *ifp = adapter->ifp[i]; + if (ifp == NULL) + continue; + + ifp->if_drv_flags &= ~IFF_DRV_RUNNING; + nf_priv = ifp->if_softc; + + if (ifp->if_flags & IFF_UP) + if_down(ifp); + ifmedia_removeall(&nf_priv->media); + free_unr(unr, nf_priv->unit); + + ifp->if_flags &= ~IFF_UP; + ether_ifdetach(ifp); + if_free(ifp); + + free(nf_priv, M_SUME); + } + + sume_remove_riffa_buffers(adapter); + + if (adapter->irq.tag) + bus_teardown_intr(dev, adapter->irq.res, adapter->irq.tag); + if (adapter->irq.res) + bus_release_resource(dev, SYS_RES_IRQ, adapter->irq.rid, + adapter->irq.res); + + pci_release_msi(dev); + + if (adapter->bar0_addr) + bus_release_resource(dev, SYS_RES_MEMORY, adapter->rid, + adapter->bar0_addr); + + mtx_destroy(&adapter->lock); + + return (0); +} + +static int +mod_event(module_t mod, int cmd, void *arg) +{ + switch (cmd) { + case MOD_LOAD: + unr = new_unrhdr(0, INT_MAX, NULL); + break; + + case MOD_UNLOAD: + delete_unrhdr(unr); + break; + } + + return (0); +} +static devclass_t sume_devclass; + +DRIVER_MODULE(sume, pci, sume_driver, sume_devclass, mod_event, 0); +MODULE_VERSION(sume, 1); Property changes on: head/sys/dev/sume/if_sume.c ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/modules/Makefile =================================================================== --- head/sys/modules/Makefile (revision 364972) +++ head/sys/modules/Makefile (revision 364973) @@ -1,823 +1,825 @@ # $FreeBSD$ SYSDIR?=${SRCTOP}/sys .include "${SYSDIR}/conf/kern.opts.mk" SUBDIR_PARALLEL= # Modules that include binary-only blobs of microcode should be selectable by # MK_SOURCELESS_UCODE option (see below). .include "${SYSDIR}/conf/config.mk" .if defined(MODULES_OVERRIDE) && !defined(ALL_MODULES) SUBDIR=${MODULES_OVERRIDE} .else SUBDIR= \ ${_3dfx} \ ${_3dfx_linux} \ ${_aac} \ ${_aacraid} \ accf_data \ accf_dns \ accf_http \ acl_nfs4 \ acl_posix1e \ ${_acpi} \ ae \ ${_aesni} \ age \ ${_agp} \ ahci \ aic7xxx \ alc \ ale \ alq \ ${_amd_ecc_inject} \ ${_amdgpio} \ ${_amdsbwd} \ ${_amdsmn} \ ${_amdtemp} \ amr \ ${_an} \ ${_aout} \ ${_apm} \ ${_arcmsr} \ ${_allwinner} \ ${_armv8crypto} \ ${_asmc} \ ata \ ath \ ath_dfs \ ath_hal \ ath_hal_ar5210 \ ath_hal_ar5211 \ ath_hal_ar5212 \ ath_hal_ar5416 \ ath_hal_ar9300 \ ath_main \ ath_rate \ ath_pci \ ${_autofs} \ ${_bce} \ ${_bcm283x_clkman} \ ${_bcm283x_pwm} \ bfe \ bge \ bhnd \ ${_bxe} \ ${_bios} \ ${_blake2} \ bnxt \ bridgestp \ bwi \ bwn \ ${_bytgpio} \ ${_chvgpio} \ cam \ ${_cardbus} \ ${_carp} \ cas \ ${_cbb} \ cc \ ${_ccp} \ cd9660 \ cd9660_iconv \ ${_ce} \ ${_cfi} \ ${_chromebook_platform} \ ${_ciss} \ cloudabi \ ${_cloudabi32} \ ${_cloudabi64} \ ${_cmx} \ ${_coretemp} \ ${_cp} \ ${_cpsw} \ ${_cpuctl} \ ${_cpufreq} \ ${_crypto} \ ${_cryptodev} \ ctl \ ${_cxgb} \ ${_cxgbe} \ dc \ dcons \ dcons_crom \ ${_dpms} \ dummynet \ ${_efirt} \ ${_em} \ ${_ena} \ esp \ ${_et} \ evdev \ ${_exca} \ ext2fs \ fdc \ fdescfs \ ${_ffec} \ filemon \ firewire \ firmware \ fusefs \ ${_fxp} \ gem \ geom \ ${_glxiic} \ ${_glxsb} \ gpio \ hifn \ hme \ ${_hpt27xx} \ ${_hptiop} \ ${_hptmv} \ ${_hptnr} \ ${_hptrr} \ hwpmc \ ${_hwpmc_mips24k} \ ${_hwpmc_mips74k} \ ${_hyperv} \ i2c \ ${_iavf} \ ${_ibcore} \ ${_ichwd} \ ${_ice} \ ${_ice_ddp} \ ${_ida} \ if_bridge \ if_disc \ if_edsc \ ${_if_enc} \ if_epair \ ${_if_gif} \ ${_if_gre} \ ${_if_me} \ if_lagg \ ${_if_ndis} \ ${_if_stf} \ if_tuntap \ if_vlan \ if_vxlan \ iflib \ ${_iir} \ imgact_binmisc \ ${_intelspi} \ ${_io} \ ${_ioat} \ ${_ipoib} \ ${_ipdivert} \ ${_ipfilter} \ ${_ipfw} \ ipfw_nat \ ${_ipfw_nat64} \ ${_ipfw_nptv6} \ ${_ipfw_pmod} \ ${_ipmi} \ ip6_mroute_mod \ ip_mroute_mod \ ${_ips} \ ${_ipsec} \ ${_ipw} \ ${_ipwfw} \ ${_isci} \ ${_iser} \ isp \ ${_ispfw} \ ${_itwd} \ ${_iwi} \ ${_iwifw} \ ${_iwm} \ ${_iwmfw} \ ${_iwn} \ ${_iwnfw} \ ${_ix} \ ${_ixv} \ ${_ixl} \ jme \ kbdmux \ kgssapi \ kgssapi_krb5 \ khelp \ krpc \ ksyms \ ${_ktls_ocf} \ le \ lge \ libalias \ libiconv \ libmchain \ lindebugfs \ linuxkpi \ ${_lio} \ lpt \ mac_biba \ mac_bsdextended \ mac_ifoff \ mac_lomac \ mac_mls \ mac_none \ mac_ntpd \ mac_partition \ mac_portacl \ mac_seeotheruids \ mac_stub \ mac_test \ malo \ md \ mdio \ mem \ mfi \ mii \ mlx \ mlxfw \ ${_mlx4} \ ${_mlx4ib} \ ${_mlx4en} \ ${_mlx5} \ ${_mlx5en} \ ${_mlx5ib} \ ${_mly} \ mmc \ mmcsd \ ${_mpr} \ ${_mps} \ mpt \ mqueue \ mrsas \ msdosfs \ msdosfs_iconv \ msk \ ${_mthca} \ mvs \ mwl \ ${_mwlfw} \ mxge \ my \ ${_nctgpio} \ ${_ndis} \ ${_netgraph} \ ${_nfe} \ nfscl \ nfscommon \ nfsd \ nfslockd \ nfssvc \ nge \ nmdm \ nullfs \ ${_ntb} \ ${_nvd} \ ${_nvdimm} \ ${_nvme} \ ${_nvram} \ oce \ ${_ocs_fc} \ otus \ ${_otusfw} \ ow \ ${_padlock} \ ${_padlock_rng} \ ${_pccard} \ ${_pchtherm} \ ${_pcfclock} \ ${_pf} \ ${_pflog} \ ${_pfsync} \ plip \ ${_pms} \ ppbus \ ppc \ ppi \ pps \ procfs \ proto \ pseudofs \ ${_pst} \ pty \ puc \ pwm \ ${_qlxge} \ ${_qlxgb} \ ${_qlxgbe} \ ${_qlnx} \ ral \ ${_ralfw} \ ${_random_fortuna} \ ${_random_other} \ rc4 \ ${_rdma} \ ${_rdrand_rng} \ re \ rl \ ${_rockchip} \ rtwn \ rtwn_pci \ rtwn_usb \ ${_rtwnfw} \ ${_s3} \ ${_safe} \ safexcel \ ${_sbni} \ scc \ ${_sctp} \ sdhci \ ${_sdhci_acpi} \ sdhci_pci \ sdio \ sem \ send \ ${_sfxge} \ sge \ ${_sgx} \ ${_sgx_linux} \ siftr \ siis \ sis \ sk \ ${_smartpqi} \ smbfs \ snp \ sound \ ${_speaker} \ spi \ ${_splash} \ ${_sppp} \ ste \ stge \ + ${_sume} \ ${_superio} \ ${_sym} \ ${_syscons} \ sysvipc \ tcp \ ${_ti} \ tmpfs \ ${_toecore} \ ${_tpm} \ ${_twa} \ twe \ tws \ uart \ udf \ udf_iconv \ ufs \ uinput \ unionfs \ usb \ ${_vesa} \ ${_virtio} \ vge \ ${_viawd} \ videomode \ vkbd \ ${_vmd} \ ${_vmm} \ ${_vmware} \ vr \ vte \ ${_wbwd} \ ${_wi} \ wlan \ wlan_acl \ wlan_amrr \ wlan_ccmp \ wlan_rssadapt \ wlan_tkip \ wlan_wep \ wlan_xauth \ ${_wpi} \ ${_wpifw} \ ${_x86bios} \ xdr \ xl \ xz \ zlib .if ${MK_AUTOFS} != "no" || defined(ALL_MODULES) _autofs= autofs .endif .if ${MK_CDDL} != "no" || defined(ALL_MODULES) .if (${MACHINE_CPUARCH} != "arm" || ${MACHINE_ARCH:Marmv[67]*} != "") && \ ${MACHINE_CPUARCH} != "mips" .if ${KERN_OPTS:MKDTRACE_HOOKS} SUBDIR+= dtrace .endif .endif SUBDIR+= opensolaris .endif .if ${MK_CRYPT} != "no" || defined(ALL_MODULES) .if exists(${SRCTOP}/sys/opencrypto) _crypto= crypto _cryptodev= cryptodev _random_fortuna=random_fortuna _random_other= random_other _ktls_ocf= ktls_ocf .endif .endif .if ${MK_CUSE} != "no" || defined(ALL_MODULES) SUBDIR+= cuse .endif .if ${MK_EFI} != "no" .if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" _efirt= efirt .endif .endif .if (${MK_INET_SUPPORT} != "no" || ${MK_INET6_SUPPORT} != "no") || \ defined(ALL_MODULES) _carp= carp _toecore= toecore _if_enc= if_enc _if_gif= if_gif _if_gre= if_gre _ipfw_pmod= ipfw_pmod .if ${KERN_OPTS:MIPSEC_SUPPORT} && !${KERN_OPTS:MIPSEC} _ipsec= ipsec .endif .if ${KERN_OPTS:MSCTP_SUPPORT} || ${KERN_OPTS:MSCTP} _sctp= sctp .endif .endif .if (${MK_INET_SUPPORT} != "no" && ${MK_INET6_SUPPORT} != "no") || \ defined(ALL_MODULES) _if_stf= if_stf .endif .if ${MK_INET_SUPPORT} != "no" || defined(ALL_MODULES) _if_me= if_me _ipdivert= ipdivert _ipfw= ipfw .if ${MK_INET6_SUPPORT} != "no" || defined(ALL_MODULES) _ipfw_nat64= ipfw_nat64 .endif .endif .if ${MK_INET6_SUPPORT} != "no" || defined(ALL_MODULES) _ipfw_nptv6= ipfw_nptv6 .endif .if ${MK_IPFILTER} != "no" || defined(ALL_MODULES) _ipfilter= ipfilter .endif .if ${MK_ISCSI} != "no" || defined(ALL_MODULES) SUBDIR+= cfiscsi SUBDIR+= iscsi SUBDIR+= iscsi_initiator .endif .if !empty(OPT_FDT) SUBDIR+= fdt .endif # Linuxulator .if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" || \ ${MACHINE_CPUARCH} == "i386" SUBDIR+= linprocfs SUBDIR+= linsysfs .endif .if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" SUBDIR+= linux .endif .if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" SUBDIR+= linux64 SUBDIR+= linux_common .endif .if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" || \ ${MACHINE_CPUARCH} == "i386" _ena= ena .if ${MK_OFED} != "no" || defined(ALL_MODULES) _ibcore= ibcore _ipoib= ipoib _iser= iser .endif _mlx4= mlx4 _mlx5= mlx5 .if (${MK_INET_SUPPORT} != "no" && ${MK_INET6_SUPPORT} != "no") || \ defined(ALL_MODULES) _mlx4en= mlx4en _mlx5en= mlx5en .endif .if ${MK_OFED} != "no" || defined(ALL_MODULES) _mthca= mthca _mlx4ib= mlx4ib _mlx5ib= mlx5ib .endif .endif .if ${MK_NETGRAPH} != "no" || defined(ALL_MODULES) _netgraph= netgraph .endif .if (${MK_PF} != "no" && (${MK_INET_SUPPORT} != "no" || \ ${MK_INET6_SUPPORT} != "no")) || defined(ALL_MODULES) _pf= pf _pflog= pflog .if ${MK_INET_SUPPORT} != "no" _pfsync= pfsync .endif .endif .if ${MK_SOURCELESS_UCODE} != "no" _bce= bce _fxp= fxp _ispfw= ispfw _ti= ti .if ${MACHINE_CPUARCH} != "mips" _mwlfw= mwlfw _otusfw= otusfw _ralfw= ralfw _rtwnfw= rtwnfw .endif .endif .if ${MK_SOURCELESS_UCODE} != "no" && ${MACHINE_CPUARCH} != "arm" && \ ${MACHINE_CPUARCH} != "mips" && \ ${MACHINE_ARCH} != "powerpc" && ${MACHINE_ARCH} != "powerpcspe" && \ ${MACHINE_CPUARCH} != "riscv" _cxgbe= cxgbe .endif .if ${MACHINE_ARCH} == "amd64" || ${MACHINE_ARCH} == "arm64" _ice= ice .if ${MK_SOURCELESS_UCODE} != "no" _ice_ddp= ice_ddp .endif .endif # These rely on 64bit atomics .if ${MACHINE_ARCH} != "powerpc" && ${MACHINE_ARCH} != "powerpcspe" && \ ${MACHINE_CPUARCH} != "mips" _mps= mps _mpr= mpr .endif .if ${MK_TESTS} != "no" || defined(ALL_MODULES) SUBDIR+= tests .endif .if ${MK_ZFS} != "no" || (defined(ALL_MODULES) && ${MACHINE_CPUARCH} != "powerpc") SUBDIR+= zfs .endif .if (${MACHINE_CPUARCH} == "mips" && ${MACHINE_ARCH:Mmips64} == "") _hwpmc_mips24k= hwpmc_mips24k _hwpmc_mips74k= hwpmc_mips74k .endif .if ${MACHINE_CPUARCH} != "aarch64" && ${MACHINE_CPUARCH} != "arm" && \ ${MACHINE_CPUARCH} != "mips" && ${MACHINE_CPUARCH} != "powerpc" && \ ${MACHINE_CPUARCH} != "riscv" _syscons= syscons .endif .if ${MACHINE_CPUARCH} != "mips" # no BUS_SPACE_UNSPECIFIED # No barrier instruction support (specific to this driver) _sym= sym # intr_disable() is a macro, causes problems .if ${MK_SOURCELESS_UCODE} != "no" _cxgb= cxgb .endif .endif .if ${MACHINE_CPUARCH} == "aarch64" _allwinner= allwinner _armv8crypto= armv8crypto _em= em _rockchip= rockchip .endif .if ${MACHINE_CPUARCH} == "i386" || ${MACHINE_CPUARCH} == "amd64" _agp= agp _an= an _aout= aout _bios= bios .if ${MK_SOURCELESS_UCODE} != "no" _bxe= bxe .endif _cardbus= cardbus _cbb= cbb _cpuctl= cpuctl _cpufreq= cpufreq _dpms= dpms _em= em _et= et _exca= exca _if_ndis= if_ndis _io= io _itwd= itwd _ix= ix _ixv= ixv .if ${MK_SOURCELESS_UCODE} != "no" _lio= lio .endif _nctgpio= nctgpio _ndis= ndis _ntb= ntb _ocs_fc= ocs_fc _pccard= pccard .if ${MK_OFED} != "no" || defined(ALL_MODULES) _rdma= rdma .endif _safe= safe _speaker= speaker _splash= splash _sppp= sppp _vmware= vmware _wbwd= wbwd _wi= wi _aac= aac _aacraid= aacraid _acpi= acpi .if ${MK_CRYPT} != "no" || defined(ALL_MODULES) _aesni= aesni .endif _amd_ecc_inject=amd_ecc_inject _amdsbwd= amdsbwd _amdsmn= amdsmn _amdtemp= amdtemp _arcmsr= arcmsr _asmc= asmc .if ${MK_CRYPT} != "no" || defined(ALL_MODULES) _blake2= blake2 .endif _bytgpio= bytgpio _chvgpio= chvgpio _ciss= ciss _chromebook_platform= chromebook_platform _cmx= cmx _coretemp= coretemp .if ${MK_SOURCELESS_HOST} != "no" && empty(KCSAN_ENABLED) _hpt27xx= hpt27xx .endif _hptiop= hptiop .if ${MK_SOURCELESS_HOST} != "no" && empty(KCSAN_ENABLED) _hptmv= hptmv _hptnr= hptnr _hptrr= hptrr .endif _hyperv= hyperv _ichwd= ichwd _ida= ida _iir= iir _intelspi= intelspi _ipmi= ipmi _ips= ips _isci= isci _ipw= ipw _iwi= iwi _iwm= iwm _iwn= iwn .if ${MK_SOURCELESS_UCODE} != "no" _ipwfw= ipwfw _iwifw= iwifw _iwmfw= iwmfw _iwnfw= iwnfw .endif _mly= mly _nfe= nfe _nvd= nvd _nvme= nvme _nvram= nvram .if ${MK_CRYPT} != "no" || defined(ALL_MODULES) _padlock= padlock _padlock_rng= padlock_rng _rdrand_rng= rdrand_rng .endif _pchtherm = pchtherm _s3= s3 _sdhci_acpi= sdhci_acpi _superio= superio _tpm= tpm _twa= twa _vesa= vesa _viawd= viawd _virtio= virtio _wpi= wpi .if ${MK_SOURCELESS_UCODE} != "no" _wpifw= wpifw .endif _x86bios= x86bios .endif .if ${MACHINE_CPUARCH} == "amd64" _amdgpio= amdgpio _ccp= ccp _iavf= iavf _ioat= ioat _ixl= ixl _nvdimm= nvdimm _pms= pms _qlxge= qlxge _qlxgb= qlxgb +_sume= sume _vmd= vmd .if ${MK_SOURCELESS_UCODE} != "no" _qlxgbe= qlxgbe _qlnx= qlnx .endif _sfxge= sfxge _sgx= sgx _sgx_linux= sgx_linux _smartpqi= smartpqi .if ${MK_BHYVE} != "no" || defined(ALL_MODULES) .if ${KERN_OPTS:MSMP} _vmm= vmm .endif .endif .endif .if ${MACHINE_CPUARCH} == "i386" # XXX some of these can move to the general case when de-i386'ed # XXX some of these can move now, but are untested on other architectures. _3dfx= 3dfx _3dfx_linux= 3dfx_linux _apm= apm .if ${MK_SOURCELESS_HOST} != "no" _ce= ce .endif .if ${MK_SOURCELESS_UCODE} != "no" _cp= cp .endif _glxiic= glxiic _glxsb= glxsb _pcfclock= pcfclock _pst= pst _sbni= sbni .endif .if ${MACHINE_ARCH} == "armv7" _cfi= cfi _cpsw= cpsw .endif .if ${MACHINE_CPUARCH} == "powerpc" _aacraid= aacraid _agp= agp _an= an _cardbus= cardbus _cbb= cbb _cfi= cfi _cpufreq= cpufreq _exca= exca _ffec= ffec _nvd= nvd _nvme= nvme _pccard= pccard _wi= wi _virtio= virtio .endif .if ${MACHINE_ARCH} == "powerpc64" _ipmi= ipmi _ixl= ixl _nvram= opal_nvram .endif .if ${MACHINE_ARCH} == "powerpc64" || ${MACHINE_ARCH} == "powerpc" # Don't build powermac_nvram for powerpcspe, it's never supported. _nvram+= powermac_nvram .endif .if (${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" || \ ${MACHINE_ARCH:Marmv[67]*} != "" || ${MACHINE_CPUARCH} == "i386") _cloudabi32= cloudabi32 .endif .if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" _cloudabi64= cloudabi64 .endif .endif .if ${MACHINE_ARCH:Marmv[67]*} != "" || ${MACHINE_CPUARCH} == "aarch64" _bcm283x_clkman= bcm283x_clkman _bcm283x_pwm= bcm283x_pwm .endif SUBDIR+=${MODULES_EXTRA} .for reject in ${WITHOUT_MODULES} SUBDIR:= ${SUBDIR:N${reject}} .endfor # Calling kldxref(8) for each module is expensive. .if !defined(NO_XREF) .MAKEFLAGS+= -DNO_XREF afterinstall: .PHONY @if type kldxref >/dev/null 2>&1; then \ ${ECHO} ${KLDXREF_CMD} ${DESTDIR}${KMODDIR}; \ ${KLDXREF_CMD} ${DESTDIR}${KMODDIR}; \ fi .endif SUBDIR:= ${SUBDIR:u:O} .include Index: head/sys/modules/sume/Makefile =================================================================== --- head/sys/modules/sume/Makefile (nonexistent) +++ head/sys/modules/sume/Makefile (revision 364973) @@ -0,0 +1,9 @@ +# $FreeBSD$ + +.PATH: ${SRCTOP}/sys/dev/sume + +KMOD= if_sume +SRCS= if_sume.c +SRCS+= device_if.h bus_if.h pci_if.h + +.include Property changes on: head/sys/modules/sume/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property