Index: stable/12/share/man/man4/ahci.4 =================================================================== --- stable/12/share/man/man4/ahci.4 (revision 356959) +++ stable/12/share/man/man4/ahci.4 (revision 356960) @@ -1,186 +1,206 @@ .\" Copyright (c) 2009-2013 Alexander Motin .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" .\" $FreeBSD$ .\" -.Dd November 2, 2018 +.Dd August 21, 2019 .Dt AHCI 4 .Os .Sh NAME .Nm ahci .Nd Serial ATA Advanced Host Controller Interface driver .Sh SYNOPSIS To compile this driver into the kernel, place the following lines in your kernel configuration file: .Bd -ragged -offset indent .Cd "device pci" .Cd "device scbus" .Cd "device ahci" .Ed .Pp Alternatively, to load the driver as a module at boot time, place the following line in .Xr loader.conf 5 : .Bd -literal -offset indent ahci_load="YES" .Ed .Pp The following tunables are settable from the .Xr loader 8 : .Bl -ohang .It Va hint.ahci. Ns Ar X Ns Va .msi controls Message Signaled Interrupts (MSI) usage by the specified controller. .Pp .Bl -tag -width 4n -offset indent -compact .It 0 MSI disabled; .It 1 single MSI vector used, if supported; .It 2 multiple MSI vectors used, if supported (default); .El .It Va hint.ahci. Ns Ar X Ns Va .ccc controls Command Completion Coalescing (CCC) usage by the specified controller. Non-zero value enables CCC and defines maximum time (in ms), request can wait for interrupt, if there are some more requests present on controller queue. CCC reduces number of context switches on systems with many parallel requests, but it can decrease disk performance on some workloads due to additional command latency. .It Va hint.ahci. Ns Ar X Ns Va .direct controls whether the driver should use direct command completion from interrupt thread(s), or queue them to CAM completion threads. Default value depends on number of MSI interrupts supported and number of implemented SATA ports. .It Va hint.ahcich. Ns Ar X Ns Va .pm_level controls SATA interface Power Management for the specified channel, allowing some power to be saved at the cost of additional command latency. Possible values: .Pp .Bl -tag -width 4n -offset indent -compact .It 0 interface Power Management is disabled (default); .It 1 device is allowed to initiate PM state change, host is passive; .It 2 host initiates PARTIAL PM state transition every time port becomes idle; .It 3 host initiates SLUMBER PM state transition every time port becomes idle. .It 4 driver initiates PARTIAL PM state transition 1ms after port becomes idle; .It 5 driver initiates SLUMBER PM state transition 125ms after port becomes idle. .El .Pp Some controllers, such as ICH8, do not implement modes 2 and 3 with NCQ used. Because of artificial entering latency, performance degradation in modes 4 and 5 is much smaller then in modes 2 and 3. .Pp Note that interface Power Management complicates device presence detection. A manual bus reset/rescan may be needed after device hot-plug, unless hardware implements Cold Presence Detection. .It Va hint.ahcich. Ns Ar X Ns Va .sata_rev setting to nonzero value limits maximum SATA revision (speed). Values 1, 2 and 3 are respectively 1.5, 3 and 6Gbps. .It Va hw.ahci.force setting to nonzero value forces driver attach to some known AHCI-capable chips even if they are configured for legacy IDE emulation. Default is 1. .El .Sh DESCRIPTION This driver provides the .Xr CAM 4 subsystem with native access to the .Tn SATA ports of AHCI-compatible controllers. Each SATA port found is represented to CAM as a separate bus with one target, or, if HBA supports Port Multipliers, 16 targets. Most of the bus-management details are handled by the SATA-specific transport of CAM. Connected ATA disks are handled by the ATA protocol disk peripheral driver .Xr ada 4 . ATAPI devices are handled by the SCSI protocol peripheral drivers .Xr cd 4 , .Xr da 4 , .Xr sa 4 , etc. .Pp Driver features include support for Serial ATA and ATAPI devices, Port Multipliers (including FIS-based switching, when supported), hardware command queues (up to 32 commands per port), Native Command Queuing, SATA interface Power Management, device hot-plug and Message Signaled Interrupts. .Pp Driver supports "LED" enclosure management messages, defined by the AHCI. When supported by hardware, it allows to control per-port activity, locate and fault LEDs via the .Xr led 4 API or emulated .Xr ses 4 device for localization and status reporting purposes. Supporting AHCI controllers may transmit that information to the backplane controllers via SGPIO interface. Backplane controllers interpret received statuses in some way (IBPI standard) to report them using present indicators. .Sh HARDWARE The .Nm driver supports AHCI compatible controllers having PCI class 1 (mass storage), subclass 6 (SATA) and programming interface 1 (AHCI). .Pp Also, in cooperation with atamarvell and atajmicron drivers of ata(4), it supports AHCI part of legacy-PATA + AHCI-SATA combined controllers, such as JMicron JMB36x and Marvell 88SE61xx. +.Pp +The +.Nm +driver also supports AHCI devices that act as PCI bridges for +.Xr nvme 4 +using Intel Rapid Storage Technology (RST). +To use the +.Xr nvme 4 +device, either one must set the SATA mode in the BIOS to AHCI (from RST), +or one must accept the performance with RST enabled due to interrupt sharing. +.Fx +will automatically detect AHCI devices with this extension that are in RST +mode. +When that happens, +.Nm +will attach +.Xr nvme 4 +children to the +.Xr ahci 4 +device. .Sh FILES .Bl -tag -width /dev/led/ahcich*.locate .It Pa /dev/led/ahci*.*.act activity LED device nodes .It Pa /dev/led/ahci*.*.fault fault LED device nodes .It Pa /dev/led/ahci*.*.locate locate LED device nodes .El .Sh SYSCTL .Bl -tag .It Pa dev.ahcich.X.disable_phy Set to 1 to disable the phy for the drive on channel X. Set to 0 to enable the phy. Useful for turning off troublemakers. Also useful for debugging when you need the ada drive to come and go. .Sh SEE ALSO .Xr ada 4 , .Xr ata 4 , .Xr cam 4 , .Xr cd 4 , .Xr da 4 , .Xr sa 4 , .Xr ses 4 .Sh HISTORY The .Nm driver first appeared in .Fx 8.0 . .Sh AUTHORS .An Alexander Motin Aq Mt mav@FreeBSD.org Index: stable/12/share/man/man4/nvme.4 =================================================================== --- stable/12/share/man/man4/nvme.4 (revision 356959) +++ stable/12/share/man/man4/nvme.4 (revision 356960) @@ -1,217 +1,234 @@ .\" .\" Copyright (c) 2012-2016 Intel Corporation .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions, and the following disclaimer, .\" without modification. .\" 2. Redistributions in binary form must reproduce at minimum a disclaimer .\" substantially similar to the "NO WARRANTY" disclaimer below .\" ("Disclaimer") and any redistribution must be conditioned upon .\" including a substantially similar Disclaimer requirement for further .\" binary redistribution. .\" .\" NO WARRANTY .\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS .\" "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT .\" LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR .\" A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT .\" HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, .\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING .\" IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE .\" POSSIBILITY OF SUCH DAMAGES. .\" .\" nvme driver man page. .\" .\" Author: Jim Harris .\" .\" $FreeBSD$ .\" -.Dd December 7, 2018 +.Dd August 21, 2019 .Dt NVME 4 .Os .Sh NAME .Nm nvme .Nd NVM Express core driver .Sh SYNOPSIS To compile this driver into your kernel, place the following line in your kernel configuration file: .Bd -ragged -offset indent .Cd "device nvme" .Ed .Pp Or, to load the driver as a module at boot, place the following line in .Xr loader.conf 5 : .Bd -literal -offset indent nvme_load="YES" .Ed .Pp Most users will also want to enable .Xr nvd 4 to expose NVM Express namespaces as disk devices which can be partitioned. Note that in NVM Express terms, a namespace is roughly equivalent to a SCSI LUN. .Sh DESCRIPTION The .Nm driver provides support for NVM Express (NVMe) controllers, such as: .Bl -bullet .It Hardware initialization .It Per-CPU IO queue pairs .It API for registering NVMe namespace consumers such as .Xr nvd 4 or .Xr nda 4 .It API for submitting NVM commands to namespaces .It Ioctls for controller and namespace configuration and management .El .Pp The .Nm driver creates controller device nodes in the format .Pa /dev/nvmeX and namespace device nodes in the format .Pa /dev/nvmeXnsY . Note that the NVM Express specification starts numbering namespaces at 1, not 0, and this driver follows that convention. .Sh CONFIGURATION By default, .Nm will create an I/O queue pair for each CPU, provided enough MSI-X vectors and NVMe queue pairs can be allocated. If not enough vectors or queue pairs are available, nvme(4) will use a smaller number of queue pairs and assign multiple CPUs per queue pair. .Pp To force a single I/O queue pair shared by all CPUs, set the following tunable value in .Xr loader.conf 5 : .Bd -literal -offset indent hw.nvme.per_cpu_io_queues=0 .Ed .Pp To assign more than one CPU per I/O queue pair, thereby reducing the number of MSI-X vectors consumed by the device, set the following tunable value in .Xr loader.conf 5 : .Bd -literal -offset indent hw.nvme.min_cpus_per_ioq=X .Ed .Pp To force legacy interrupts for all .Nm driver instances, set the following tunable value in .Xr loader.conf 5 : .Bd -literal -offset indent hw.nvme.force_intx=1 .Ed .Pp Note that use of INTx implies disabling of per-CPU I/O queue pairs. .Pp The .Xr nvd 4 driver is used to provide a disk driver to the system by default. The .Xr nda 4 driver can also be used instead. The .Xr nvd 4 driver performs better with smaller transactions and few TRIM commands. It sends all commands directly to the drive immediately. The .Xr nda 4 driver performs better with larger transactions and also collapses TRIM commands giving better performance. It can queue commands to the drive; combine .Dv BIO_DELETE commands into a single trip; and use the CAM I/O scheduler to bias one type of operation over another. To select the .Xr nda 4 driver, set the following tunable value in .Xr loader.conf 5 : .Bd -literal -offset indent hw.nvme.verbose_cmd_dump=1 .Ed .Pp .Sh SYSCTL VARIABLES The following controller-level sysctls are currently implemented: .Bl -tag -width indent .It Va dev.nvme.0.num_cpus_per_ioq (R) Number of CPUs associated with each I/O queue pair. .It Va dev.nvme.0.int_coal_time (R/W) Interrupt coalescing timer period in microseconds. Set to 0 to disable. .It Va dev.nvme.0.int_coal_threshold (R/W) Interrupt coalescing threshold in number of command completions. Set to 0 to disable. .El .Pp The following queue pair-level sysctls are currently implemented. Admin queue sysctls take the format of dev.nvme.0.adminq and I/O queue sysctls take the format of dev.nvme.0.ioq0. .Bl -tag -width indent .It Va dev.nvme.0.ioq0.num_entries (R) Number of entries in this queue pair's command and completion queue. .It Va dev.nvme.0.ioq0.num_tr (R) Number of nvme_tracker structures currently allocated for this queue pair. .It Va dev.nvme.0.ioq0.num_prp_list (R) Number of nvme_prp_list structures currently allocated for this queue pair. .It Va dev.nvme.0.ioq0.sq_head (R) Current location of the submission queue head pointer as observed by the driver. The head pointer is incremented by the controller as it takes commands off of the submission queue. .It Va dev.nvme.0.ioq0.sq_tail (R) Current location of the submission queue tail pointer as observed by the driver. The driver increments the tail pointer after writing a command into the submission queue to signal that a new command is ready to be processed. .It Va dev.nvme.0.ioq0.cq_head (R) Current location of the completion queue head pointer as observed by the driver. The driver increments the head pointer after finishing with a completion entry that was posted by the controller. .It Va dev.nvme.0.ioq0.num_cmds (R) Number of commands that have been submitted on this queue pair. .It Va dev.nvme.0.ioq0.dump_debug (W) Writing 1 to this sysctl will dump the full contents of the submission and completion queues to the console. .El +.Pp +In addition to the typical pci attachment, the +.Nm +driver supports attaching to a +.Xr ahci 4 +device. +Intel's Rapid Storage Technology (RST) hides the nvme device +behind the AHCI device due to limitations in Windows. +However, this effectively hides it from the +.Fx +kernel. +To work around this limitation, +.Fx +detects that the AHCI device supports RST and when it is enabled. +See +.Xr ahci 4 +for more details. .Sh SEE ALSO .Xr nda 4 , .Xr nvd 4 , .Xr pci 4 , .Xr nvmecontrol 8 , .Xr disk 9 .Sh HISTORY The .Nm driver first appeared in .Fx 9.2 . .Sh AUTHORS .An -nosplit The .Nm driver was developed by Intel and originally written by .An Jim Harris Aq Mt jimharris@FreeBSD.org , with contributions from .An Joe Golio at EMC. .Pp This man page was written by .An Jim Harris Aq Mt jimharris@FreeBSD.org . Index: stable/12 =================================================================== --- stable/12 (revision 356959) +++ stable/12 (revision 356960) Property changes on: stable/12 ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /head:r351357