Index: stable/12/share/man/man4/gpioiic.4 =================================================================== --- stable/12/share/man/man4/gpioiic.4 (revision 355489) +++ stable/12/share/man/man4/gpioiic.4 (revision 355490) @@ -1,171 +1,159 @@ .\" Copyright (c) 2013, Luiz Otavio O Souza .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" .\" $FreeBSD$ .\" -.Dd May 14, 2014 +.Dd December 1, 2019 .Dt GPIOIIC 4 .Os .Sh NAME .Nm gpioiic .Nd GPIO I2C bit-banging device driver .Sh SYNOPSIS To compile this driver into the kernel, place the following lines in your kernel configuration file: .Bd -ragged -offset indent .Cd "device gpio" .Cd "device gpioiic" -.Cd "device iic" .Cd "device iicbb" .Cd "device iicbus" .Ed +.Pp +Alternatively, to load the driver as a +module at boot time, place the following line in +.Xr loader.conf 5 : +.Bd -literal -offset indent +gpioiic_load="YES" +.Ed .Sh DESCRIPTION The .Nm driver provides an IIC bit-banging interface using two GPIO pins for the -SCL and SDA on the -.Nm gpiobus . +SCL and SDA lines on the bus. +.Pp .Nm -implements an open collector kind of output, as recommended by the standard, -when driving the pins on the -.Nm gpiobus , -i.e, they are never switched to the logical value of '1', -or they are '0' or simply open (Hi-Z/tri-state). -So the pullup resistors are required so -.Nm -can work. +simulates an open collector kind of output when managing the pins on the +bus, even on systems which don't directly support configuring gpio pins +in that mode. +The pins are never driven to the logical value of '1'. +They are driven to '0' or switched to input mode (Hi-Z/tri-state), and +an external pullup resistor pulls the line to the 1 state unless some +other device on the bus is driving it to 0. .Pp +.Sh HINTS CONFIGURATION On a .Xr device.hints 5 -based system, like -.Li MIPS , -these values are configurable for the +based system, such as MIPS, these values are configurable for .Nm : .Bl -tag -width ".Va hint.gpioiic.%d.atXXX" .It Va hint.gpioiic.%d.at The .Nm gpiobus you are attaching to. -Normally just gpiobus0. +Normally just gpiobus0 on systems with a single bank of gpio pins. .It Va hint.gpioiic.%d.pins This is a bitmask of the pins on the .Nm gpiobus that are to be used for SCLOCK and SDATA from the GPIO IIC bit-banging bus. To configure pin 0 and 7, use the bitmask of 0b10000001 and convert it to a hexadecimal value of 0x0081. Please note that this mask should only ever have two bits set (any other bits - i.e., pins - will be ignored). +Because +.Nm +must be a child of the gpiobus, both gpio pins must be part of that bus. .It Va hint.gpioiic.%d.scl Indicates which bit in the .Va hint.gpioiic.%d.pins should be used as the SCLOCK source. Optional, defaults to 0. .It Va hint.gpioiic.%d.sda Indicates which bit in the .Va hint.gpioiic.%d.pins should be used as the SDATA source. Optional, defaults to 1. .El -.Pp -On a +.Sh FDT CONFIGURATION +On an .Xr FDT 4 -based system, like -.Li ARM , -the DTS part for a +based system, such as ARM, the DTS node for .Nm gpioiic -device usually looks like: +conforms to the standard bindings document i2c/i2c-gpio.yaml. +The device node typically appears at the root of the device tree. +The following is an example of a +.Nm +node with one slave device +on the IIC bus: .Bd -literal -gpio: gpio { - - gpio-controller; - ... - +/ { gpioiic0 { - compatible = "gpioiic"; - /* - * Attach to GPIO pins 21 and 22. Set them - * initially as inputs. - */ - gpios = <&gpio 21 1 0 - &gpio 22 1 0>; - scl = <0>; /* GPIO pin 21 - optional */ - sda = <1>; /* GPIO pin 22 - optional */ + compatible = "i2c-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpioiic0>; + scl-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; + status = "okay"; - /* This is an example of a gpioiic child. */ - gpioiic-child0 { - compatible = "lm75"; - i2c-address = <0x4f>; + /* One slave device on the i2c bus. */ + rtc@51 { + compatible="nxp,pcf2127"; + reg = <0x51>; + status = "okay"; }; }; }; .Ed .Pp Where: .Bl -tag -width ".Va compatible" .It Va compatible -Should always be set to "gpioiic". -.It Va gpios -The -.Va gpios -property indicates which GPIO pins should be used for SCLOCK and SDATA -on the GPIO IIC bit-banging bus. -For more details about the -.Va gpios -property, please consult -.Pa /usr/src/sys/dts/bindings-gpio.txt . -.It Va scl -The -.Va scl -option indicates which bit in the -.Va gpios -should be used as the SCLOCK source. -Optional, defaults to 0. -.It Va sda -The -.Va sda -option indicates which bit in the -.Va gpios -should be used as the SDATA source. -Optional, defaults to 1. +Should be set to "i2c-gpio". +The deprecated string "gpioiic" is also accepted for backwards compatibility. +.It Va scl-gpios Va sda-gpios +These properties indicate which GPIO pins should be used for clock +and data on the GPIO IIC bit-banging bus. +There is no requirement that the two pins belong to the same gpio controller. +.It Va pinctrl-names pinctrl-0 +These properties may be required to configure the chosen pins as gpio +pins, unless the pins default to that state on your system. .El .Sh SEE ALSO .Xr fdt 4 , .Xr gpio 4 , -.Xr gpioled 4 , .Xr iic 4 , .Xr iicbb 4 , .Xr iicbus 4 .Sh HISTORY The .Nm manual page first appeared in .Fx 10.1 . .Sh AUTHORS This manual page was written by .An Luiz Otavio O Souza . Index: stable/12/sys/dev/gpio/gpiobus.c =================================================================== --- stable/12/sys/dev/gpio/gpiobus.c (revision 355489) +++ stable/12/sys/dev/gpio/gpiobus.c (revision 355490) @@ -1,997 +1,1113 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2009 Oleksandr Tymoshenko * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #ifdef INTRNG #include #endif #include #include #include #include #include "gpiobus_if.h" #undef GPIOBUS_DEBUG #ifdef GPIOBUS_DEBUG #define dprintf printf #else #define dprintf(x, arg...) #endif static void gpiobus_print_pins(struct gpiobus_ivar *, char *, size_t); static int gpiobus_parse_pins(struct gpiobus_softc *, device_t, int); static int gpiobus_probe(device_t); static int gpiobus_attach(device_t); static int gpiobus_detach(device_t); static int gpiobus_suspend(device_t); static int gpiobus_resume(device_t); static void gpiobus_probe_nomatch(device_t, device_t); static int gpiobus_print_child(device_t, device_t); static int gpiobus_child_location_str(device_t, device_t, char *, size_t); static int gpiobus_child_pnpinfo_str(device_t, device_t, char *, size_t); static device_t gpiobus_add_child(device_t, u_int, const char *, int); static void gpiobus_hinted_child(device_t, const char *, int); /* * GPIOBUS interface */ static int gpiobus_acquire_bus(device_t, device_t, int); static void gpiobus_release_bus(device_t, device_t); static int gpiobus_pin_setflags(device_t, device_t, uint32_t, uint32_t); static int gpiobus_pin_getflags(device_t, device_t, uint32_t, uint32_t*); static int gpiobus_pin_getcaps(device_t, device_t, uint32_t, uint32_t*); static int gpiobus_pin_set(device_t, device_t, uint32_t, unsigned int); static int gpiobus_pin_get(device_t, device_t, uint32_t, unsigned int*); static int gpiobus_pin_toggle(device_t, device_t, uint32_t); /* + * gpiobus_pin flags + * The flags in struct gpiobus_pin are not related to the flags used by the + * low-level controller driver in struct gpio_pin. Currently, only pins + * acquired via FDT data have gpiobus_pin.flags set, sourced from the flags in + * the FDT properties. In theory, these flags are defined per-platform. In + * practice they are always the flags from the dt-bindings/gpio/gpio.h file. + * The only one of those flags we currently support is for handling active-low + * pins, so we just define that flag here instead of including a GPL'd header. + */ +#define GPIO_ACTIVE_LOW 1 + +/* * XXX -> Move me to better place - gpio_subr.c? * Also, this function must be changed when interrupt configuration * data will be moved into struct resource. */ #ifdef INTRNG struct resource * gpio_alloc_intr_resource(device_t consumer_dev, int *rid, u_int alloc_flags, gpio_pin_t pin, uint32_t intr_mode) { u_int irq; struct intr_map_data_gpio *gpio_data; struct resource *res; gpio_data = (struct intr_map_data_gpio *)intr_alloc_map_data( INTR_MAP_DATA_GPIO, sizeof(*gpio_data), M_WAITOK | M_ZERO); gpio_data->gpio_pin_num = pin->pin; gpio_data->gpio_pin_flags = pin->flags; gpio_data->gpio_intr_mode = intr_mode; irq = intr_map_irq(pin->dev, 0, (struct intr_map_data *)gpio_data); res = bus_alloc_resource(consumer_dev, SYS_RES_IRQ, rid, irq, irq, 1, alloc_flags); if (res == NULL) { intr_free_intr_map_data((struct intr_map_data *)gpio_data); return (NULL); } rman_set_virtual(res, gpio_data); return (res); } #else struct resource * gpio_alloc_intr_resource(device_t consumer_dev, int *rid, u_int alloc_flags, gpio_pin_t pin, uint32_t intr_mode) { return (NULL); } #endif int gpio_check_flags(uint32_t caps, uint32_t flags) { /* Filter unwanted flags. */ flags &= caps; /* Cannot mix input/output together. */ if (flags & GPIO_PIN_INPUT && flags & GPIO_PIN_OUTPUT) return (EINVAL); /* Cannot mix pull-up/pull-down together. */ if (flags & GPIO_PIN_PULLUP && flags & GPIO_PIN_PULLDOWN) return (EINVAL); return (0); } +int +gpio_pin_get_by_bus_pinnum(device_t busdev, uint32_t pinnum, gpio_pin_t *ppin) +{ + gpio_pin_t pin; + int err; + + err = gpiobus_acquire_pin(busdev, pinnum); + if (err != 0) + return (EBUSY); + + pin = malloc(sizeof(*pin), M_DEVBUF, M_WAITOK | M_ZERO); + + pin->dev = device_get_parent(busdev); + pin->pin = pinnum; + pin->flags = 0; + + *ppin = pin; + return (0); +} + +int +gpio_pin_get_by_child_index(device_t childdev, uint32_t idx, gpio_pin_t *ppin) +{ + struct gpiobus_ivar *devi; + + devi = GPIOBUS_IVAR(childdev); + if (idx >= devi->npins) + return (EINVAL); + + return (gpio_pin_get_by_bus_pinnum(device_get_parent(childdev), + devi->pins[idx], ppin)); +} + +int +gpio_pin_getcaps(gpio_pin_t pin, uint32_t *caps) +{ + + KASSERT(pin != NULL, ("GPIO pin is NULL.")); + KASSERT(pin->dev != NULL, ("GPIO pin device is NULL.")); + return (GPIO_PIN_GETCAPS(pin->dev, pin->pin, caps)); +} + +int +gpio_pin_is_active(gpio_pin_t pin, bool *active) +{ + int rv; + uint32_t tmp; + + KASSERT(pin != NULL, ("GPIO pin is NULL.")); + KASSERT(pin->dev != NULL, ("GPIO pin device is NULL.")); + rv = GPIO_PIN_GET(pin->dev, pin->pin, &tmp); + if (rv != 0) { + return (rv); + } + + if (pin->flags & GPIO_ACTIVE_LOW) + *active = tmp == 0; + else + *active = tmp != 0; + return (0); +} + +void +gpio_pin_release(gpio_pin_t gpio) +{ + device_t busdev; + + if (gpio == NULL) + return; + + KASSERT(gpio->dev != NULL, ("GPIO pin device is NULL.")); + + busdev = GPIO_GET_BUS(gpio->dev); + if (busdev != NULL) + gpiobus_release_pin(busdev, gpio->pin); + + free(gpio, M_DEVBUF); +} + +int +gpio_pin_set_active(gpio_pin_t pin, bool active) +{ + int rv; + uint32_t tmp; + + if (pin->flags & GPIO_ACTIVE_LOW) + tmp = active ? 0 : 1; + else + tmp = active ? 1 : 0; + + KASSERT(pin != NULL, ("GPIO pin is NULL.")); + KASSERT(pin->dev != NULL, ("GPIO pin device is NULL.")); + rv = GPIO_PIN_SET(pin->dev, pin->pin, tmp); + return (rv); +} + +int +gpio_pin_setflags(gpio_pin_t pin, uint32_t flags) +{ + int rv; + + KASSERT(pin != NULL, ("GPIO pin is NULL.")); + KASSERT(pin->dev != NULL, ("GPIO pin device is NULL.")); + + rv = GPIO_PIN_SETFLAGS(pin->dev, pin->pin, flags); + return (rv); +} + static void gpiobus_print_pins(struct gpiobus_ivar *devi, char *buf, size_t buflen) { char tmp[128]; int i, range_start, range_stop, need_coma; if (devi->npins == 0) return; need_coma = 0; range_start = range_stop = devi->pins[0]; for (i = 1; i < devi->npins; i++) { if (devi->pins[i] != (range_stop + 1)) { if (need_coma) strlcat(buf, ",", buflen); memset(tmp, 0, sizeof(tmp)); if (range_start != range_stop) snprintf(tmp, sizeof(tmp) - 1, "%d-%d", range_start, range_stop); else snprintf(tmp, sizeof(tmp) - 1, "%d", range_start); strlcat(buf, tmp, buflen); range_start = range_stop = devi->pins[i]; need_coma = 1; } else range_stop++; } if (need_coma) strlcat(buf, ",", buflen); memset(tmp, 0, sizeof(tmp)); if (range_start != range_stop) snprintf(tmp, sizeof(tmp) - 1, "%d-%d", range_start, range_stop); else snprintf(tmp, sizeof(tmp) - 1, "%d", range_start); strlcat(buf, tmp, buflen); } device_t gpiobus_attach_bus(device_t dev) { device_t busdev; busdev = device_add_child(dev, "gpiobus", -1); if (busdev == NULL) return (NULL); if (device_add_child(dev, "gpioc", -1) == NULL) { device_delete_child(dev, busdev); return (NULL); } #ifdef FDT ofw_gpiobus_register_provider(dev); #endif bus_generic_attach(dev); return (busdev); } int gpiobus_detach_bus(device_t dev) { int err; #ifdef FDT ofw_gpiobus_unregister_provider(dev); #endif err = bus_generic_detach(dev); if (err != 0) return (err); return (device_delete_children(dev)); } int gpiobus_init_softc(device_t dev) { struct gpiobus_softc *sc; sc = GPIOBUS_SOFTC(dev); sc->sc_busdev = dev; sc->sc_dev = device_get_parent(dev); sc->sc_intr_rman.rm_type = RMAN_ARRAY; sc->sc_intr_rman.rm_descr = "GPIO Interrupts"; if (rman_init(&sc->sc_intr_rman) != 0 || rman_manage_region(&sc->sc_intr_rman, 0, ~0) != 0) panic("%s: failed to set up rman.", __func__); if (GPIO_PIN_MAX(sc->sc_dev, &sc->sc_npins) != 0) return (ENXIO); KASSERT(sc->sc_npins >= 0, ("GPIO device with no pins")); /* Pins = GPIO_PIN_MAX() + 1 */ sc->sc_npins++; sc->sc_pins = malloc(sizeof(*sc->sc_pins) * sc->sc_npins, M_DEVBUF, M_NOWAIT | M_ZERO); if (sc->sc_pins == NULL) return (ENOMEM); /* Initialize the bus lock. */ GPIOBUS_LOCK_INIT(sc); return (0); } int gpiobus_alloc_ivars(struct gpiobus_ivar *devi) { /* Allocate pins and flags memory. */ devi->pins = malloc(sizeof(uint32_t) * devi->npins, M_DEVBUF, M_NOWAIT | M_ZERO); if (devi->pins == NULL) return (ENOMEM); return (0); } void gpiobus_free_ivars(struct gpiobus_ivar *devi) { if (devi->pins) { free(devi->pins, M_DEVBUF); devi->pins = NULL; } devi->npins = 0; } int gpiobus_acquire_pin(device_t bus, uint32_t pin) { struct gpiobus_softc *sc; sc = device_get_softc(bus); /* Consistency check. */ if (pin >= sc->sc_npins) { device_printf(bus, "invalid pin %d, max: %d\n", pin, sc->sc_npins - 1); return (-1); } /* Mark pin as mapped and give warning if it's already mapped. */ if (sc->sc_pins[pin].mapped) { device_printf(bus, "warning: pin %d is already mapped\n", pin); return (-1); } sc->sc_pins[pin].mapped = 1; return (0); } /* Release mapped pin */ int gpiobus_release_pin(device_t bus, uint32_t pin) { struct gpiobus_softc *sc; sc = device_get_softc(bus); /* Consistency check. */ if (pin >= sc->sc_npins) { device_printf(bus, "gpiobus_acquire_pin: invalid pin %d, max=%d\n", pin, sc->sc_npins - 1); return (-1); } if (!sc->sc_pins[pin].mapped) { device_printf(bus, "gpiobus_acquire_pin: pin %d is not mapped\n", pin); return (-1); } sc->sc_pins[pin].mapped = 0; return (0); } static int gpiobus_acquire_child_pins(device_t dev, device_t child) { struct gpiobus_ivar *devi = GPIOBUS_IVAR(child); int i; for (i = 0; i < devi->npins; i++) { /* Reserve the GPIO pin. */ if (gpiobus_acquire_pin(dev, devi->pins[i]) != 0) { device_printf(child, "cannot acquire pin %d\n", devi->pins[i]); while (--i >= 0) { (void)gpiobus_release_pin(dev, devi->pins[i]); } gpiobus_free_ivars(devi); return (EBUSY); } } for (i = 0; i < devi->npins; i++) { /* Use the child name as pin name. */ GPIOBUS_PIN_SETNAME(dev, devi->pins[i], device_get_nameunit(child)); } return (0); } static int gpiobus_parse_pins(struct gpiobus_softc *sc, device_t child, int mask) { struct gpiobus_ivar *devi = GPIOBUS_IVAR(child); int i, npins; npins = 0; for (i = 0; i < 32; i++) { if (mask & (1 << i)) npins++; } if (npins == 0) { device_printf(child, "empty pin mask\n"); return (EINVAL); } devi->npins = npins; if (gpiobus_alloc_ivars(devi) != 0) { device_printf(child, "cannot allocate device ivars\n"); return (EINVAL); } npins = 0; for (i = 0; i < 32; i++) { if ((mask & (1 << i)) == 0) continue; devi->pins[npins++] = i; } - if (gpiobus_acquire_child_pins(sc->sc_busdev, child) != 0) - return (EINVAL); return (0); } static int gpiobus_parse_pin_list(struct gpiobus_softc *sc, device_t child, const char *pins) { struct gpiobus_ivar *devi = GPIOBUS_IVAR(child); const char *p; char *endp; unsigned long pin; int i, npins; npins = 0; p = pins; for (;;) { pin = strtoul(p, &endp, 0); if (endp == p) break; npins++; if (*endp == '\0') break; p = endp + 1; } if (*endp != '\0') { device_printf(child, "garbage in the pin list: %s\n", endp); return (EINVAL); } if (npins == 0) { device_printf(child, "empty pin list\n"); return (EINVAL); } devi->npins = npins; if (gpiobus_alloc_ivars(devi) != 0) { device_printf(child, "cannot allocate device ivars\n"); return (EINVAL); } i = 0; p = pins; for (;;) { pin = strtoul(p, &endp, 0); devi->pins[i] = pin; if (*endp == '\0') break; i++; p = endp + 1; } - if (gpiobus_acquire_child_pins(sc->sc_busdev, child) != 0) - return (EINVAL); return (0); } static int gpiobus_probe(device_t dev) { device_set_desc(dev, "GPIO bus"); return (BUS_PROBE_GENERIC); } static int gpiobus_attach(device_t dev) { int err; err = gpiobus_init_softc(dev); if (err != 0) return (err); /* * Get parent's pins and mark them as unmapped */ bus_generic_probe(dev); bus_enumerate_hinted_children(dev); return (bus_generic_attach(dev)); } /* * Since this is not a self-enumerating bus, and since we always add * children in attach, we have to always delete children here. */ static int gpiobus_detach(device_t dev) { struct gpiobus_softc *sc; struct gpiobus_ivar *devi; device_t *devlist; int i, err, ndevs; sc = GPIOBUS_SOFTC(dev); KASSERT(mtx_initialized(&sc->sc_mtx), ("gpiobus mutex not initialized")); GPIOBUS_LOCK_DESTROY(sc); if ((err = bus_generic_detach(dev)) != 0) return (err); if ((err = device_get_children(dev, &devlist, &ndevs)) != 0) return (err); for (i = 0; i < ndevs; i++) { devi = GPIOBUS_IVAR(devlist[i]); gpiobus_free_ivars(devi); resource_list_free(&devi->rl); free(devi, M_DEVBUF); device_delete_child(dev, devlist[i]); } free(devlist, M_TEMP); rman_fini(&sc->sc_intr_rman); if (sc->sc_pins) { for (i = 0; i < sc->sc_npins; i++) { if (sc->sc_pins[i].name != NULL) free(sc->sc_pins[i].name, M_DEVBUF); sc->sc_pins[i].name = NULL; } free(sc->sc_pins, M_DEVBUF); sc->sc_pins = NULL; } return (0); } static int gpiobus_suspend(device_t dev) { return (bus_generic_suspend(dev)); } static int gpiobus_resume(device_t dev) { return (bus_generic_resume(dev)); } static void gpiobus_probe_nomatch(device_t dev, device_t child) { char pins[128]; struct gpiobus_ivar *devi; devi = GPIOBUS_IVAR(child); memset(pins, 0, sizeof(pins)); gpiobus_print_pins(devi, pins, sizeof(pins)); if (devi->npins > 1) device_printf(dev, " at pins %s", pins); else device_printf(dev, " at pin %s", pins); resource_list_print_type(&devi->rl, "irq", SYS_RES_IRQ, "%jd"); printf("\n"); } static int gpiobus_print_child(device_t dev, device_t child) { char pins[128]; int retval = 0; struct gpiobus_ivar *devi; devi = GPIOBUS_IVAR(child); memset(pins, 0, sizeof(pins)); retval += bus_print_child_header(dev, child); if (devi->npins > 0) { if (devi->npins > 1) retval += printf(" at pins "); else retval += printf(" at pin "); gpiobus_print_pins(devi, pins, sizeof(pins)); retval += printf("%s", pins); } resource_list_print_type(&devi->rl, "irq", SYS_RES_IRQ, "%jd"); retval += bus_print_child_footer(dev, child); return (retval); } static int gpiobus_child_location_str(device_t bus, device_t child, char *buf, size_t buflen) { struct gpiobus_ivar *devi; devi = GPIOBUS_IVAR(child); if (devi->npins > 1) strlcpy(buf, "pins=", buflen); else strlcpy(buf, "pin=", buflen); gpiobus_print_pins(devi, buf, buflen); return (0); } static int gpiobus_child_pnpinfo_str(device_t bus, device_t child, char *buf, size_t buflen) { *buf = '\0'; return (0); } static device_t gpiobus_add_child(device_t dev, u_int order, const char *name, int unit) { device_t child; struct gpiobus_ivar *devi; child = device_add_child_ordered(dev, order, name, unit); if (child == NULL) return (child); devi = malloc(sizeof(struct gpiobus_ivar), M_DEVBUF, M_NOWAIT | M_ZERO); if (devi == NULL) { device_delete_child(dev, child); return (NULL); } resource_list_init(&devi->rl); device_set_ivars(child, devi); return (child); } static void gpiobus_hinted_child(device_t bus, const char *dname, int dunit) { struct gpiobus_softc *sc = GPIOBUS_SOFTC(bus); struct gpiobus_ivar *devi; device_t child; const char *pins; int irq, pinmask; child = BUS_ADD_CHILD(bus, 0, dname, dunit); devi = GPIOBUS_IVAR(child); if (resource_int_value(dname, dunit, "pins", &pinmask) == 0) { if (gpiobus_parse_pins(sc, child, pinmask)) { resource_list_free(&devi->rl); free(devi, M_DEVBUF); device_delete_child(bus, child); return; } } else if (resource_string_value(dname, dunit, "pin_list", &pins) == 0) { if (gpiobus_parse_pin_list(sc, child, pins)) { resource_list_free(&devi->rl); free(devi, M_DEVBUF); device_delete_child(bus, child); return; } } if (resource_int_value(dname, dunit, "irq", &irq) == 0) { if (bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1) != 0) device_printf(bus, "warning: bus_set_resource() failed\n"); } } static int gpiobus_set_resource(device_t dev, device_t child, int type, int rid, rman_res_t start, rman_res_t count) { struct gpiobus_ivar *devi; struct resource_list_entry *rle; dprintf("%s: entry (%p, %p, %d, %d, %p, %ld)\n", __func__, dev, child, type, rid, (void *)(intptr_t)start, count); devi = GPIOBUS_IVAR(child); rle = resource_list_add(&devi->rl, type, rid, start, start + count - 1, count); if (rle == NULL) return (ENXIO); return (0); } static int gpiobus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) { struct gpiobus_ivar *devi; devi = GPIOBUS_IVAR(child); switch (which) { case GPIOBUS_IVAR_NPINS: *result = devi->npins; break; case GPIOBUS_IVAR_PINS: /* Children do not ever need to directly examine this. */ return (ENOTSUP); default: return (ENOENT); } return (0); } static int gpiobus_write_ivar(device_t dev, device_t child, int which, uintptr_t value) { struct gpiobus_ivar *devi; const uint32_t *ptr; int i; devi = GPIOBUS_IVAR(child); switch (which) { case GPIOBUS_IVAR_NPINS: /* GPIO ivars are set once. */ if (devi->npins != 0) { return (EBUSY); } devi->npins = value; if (gpiobus_alloc_ivars(devi) != 0) { device_printf(child, "cannot allocate device ivars\n"); devi->npins = 0; return (ENOMEM); } break; case GPIOBUS_IVAR_PINS: ptr = (const uint32_t *)value; for (i = 0; i < devi->npins; i++) devi->pins[i] = ptr[i]; if (gpiobus_acquire_child_pins(dev, child) != 0) return (EBUSY); break; default: return (ENOENT); } return (0); } static struct resource * gpiobus_alloc_resource(device_t bus, device_t child, int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) { struct gpiobus_softc *sc; struct resource *rv; struct resource_list *rl; struct resource_list_entry *rle; int isdefault; if (type != SYS_RES_IRQ) return (NULL); isdefault = (RMAN_IS_DEFAULT_RANGE(start, end) && count == 1); rle = NULL; if (isdefault) { rl = BUS_GET_RESOURCE_LIST(bus, child); if (rl == NULL) return (NULL); rle = resource_list_find(rl, type, *rid); if (rle == NULL) return (NULL); if (rle->res != NULL) panic("%s: resource entry is busy", __func__); start = rle->start; count = rle->count; end = rle->end; } sc = device_get_softc(bus); rv = rman_reserve_resource(&sc->sc_intr_rman, start, end, count, flags, child); if (rv == NULL) return (NULL); rman_set_rid(rv, *rid); if ((flags & RF_ACTIVE) != 0 && bus_activate_resource(child, type, *rid, rv) != 0) { rman_release_resource(rv); return (NULL); } return (rv); } static int gpiobus_release_resource(device_t bus __unused, device_t child, int type, int rid, struct resource *r) { int error; if (rman_get_flags(r) & RF_ACTIVE) { error = bus_deactivate_resource(child, type, rid, r); if (error) return (error); } return (rman_release_resource(r)); } static struct resource_list * gpiobus_get_resource_list(device_t bus __unused, device_t child) { struct gpiobus_ivar *ivar; ivar = GPIOBUS_IVAR(child); return (&ivar->rl); } static int gpiobus_acquire_bus(device_t busdev, device_t child, int how) { struct gpiobus_softc *sc; sc = device_get_softc(busdev); GPIOBUS_ASSERT_UNLOCKED(sc); GPIOBUS_LOCK(sc); if (sc->sc_owner != NULL) { if (sc->sc_owner == child) panic("%s: %s still owns the bus.", device_get_nameunit(busdev), device_get_nameunit(child)); if (how == GPIOBUS_DONTWAIT) { GPIOBUS_UNLOCK(sc); return (EWOULDBLOCK); } while (sc->sc_owner != NULL) mtx_sleep(sc, &sc->sc_mtx, 0, "gpiobuswait", 0); } sc->sc_owner = child; GPIOBUS_UNLOCK(sc); return (0); } static void gpiobus_release_bus(device_t busdev, device_t child) { struct gpiobus_softc *sc; sc = device_get_softc(busdev); GPIOBUS_ASSERT_UNLOCKED(sc); GPIOBUS_LOCK(sc); if (sc->sc_owner == NULL) panic("%s: %s releasing unowned bus.", device_get_nameunit(busdev), device_get_nameunit(child)); if (sc->sc_owner != child) panic("%s: %s trying to release bus owned by %s", device_get_nameunit(busdev), device_get_nameunit(child), device_get_nameunit(sc->sc_owner)); sc->sc_owner = NULL; wakeup(sc); GPIOBUS_UNLOCK(sc); } static int gpiobus_pin_setflags(device_t dev, device_t child, uint32_t pin, uint32_t flags) { struct gpiobus_softc *sc = GPIOBUS_SOFTC(dev); struct gpiobus_ivar *devi = GPIOBUS_IVAR(child); uint32_t caps; if (pin >= devi->npins) return (EINVAL); if (GPIO_PIN_GETCAPS(sc->sc_dev, devi->pins[pin], &caps) != 0) return (EINVAL); if (gpio_check_flags(caps, flags) != 0) return (EINVAL); return (GPIO_PIN_SETFLAGS(sc->sc_dev, devi->pins[pin], flags)); } static int gpiobus_pin_getflags(device_t dev, device_t child, uint32_t pin, uint32_t *flags) { struct gpiobus_softc *sc = GPIOBUS_SOFTC(dev); struct gpiobus_ivar *devi = GPIOBUS_IVAR(child); if (pin >= devi->npins) return (EINVAL); return GPIO_PIN_GETFLAGS(sc->sc_dev, devi->pins[pin], flags); } static int gpiobus_pin_getcaps(device_t dev, device_t child, uint32_t pin, uint32_t *caps) { struct gpiobus_softc *sc = GPIOBUS_SOFTC(dev); struct gpiobus_ivar *devi = GPIOBUS_IVAR(child); if (pin >= devi->npins) return (EINVAL); return GPIO_PIN_GETCAPS(sc->sc_dev, devi->pins[pin], caps); } static int gpiobus_pin_set(device_t dev, device_t child, uint32_t pin, unsigned int value) { struct gpiobus_softc *sc = GPIOBUS_SOFTC(dev); struct gpiobus_ivar *devi = GPIOBUS_IVAR(child); if (pin >= devi->npins) return (EINVAL); return GPIO_PIN_SET(sc->sc_dev, devi->pins[pin], value); } static int gpiobus_pin_get(device_t dev, device_t child, uint32_t pin, unsigned int *value) { struct gpiobus_softc *sc = GPIOBUS_SOFTC(dev); struct gpiobus_ivar *devi = GPIOBUS_IVAR(child); if (pin >= devi->npins) return (EINVAL); return GPIO_PIN_GET(sc->sc_dev, devi->pins[pin], value); } static int gpiobus_pin_toggle(device_t dev, device_t child, uint32_t pin) { struct gpiobus_softc *sc = GPIOBUS_SOFTC(dev); struct gpiobus_ivar *devi = GPIOBUS_IVAR(child); if (pin >= devi->npins) return (EINVAL); return GPIO_PIN_TOGGLE(sc->sc_dev, devi->pins[pin]); } static int gpiobus_pin_getname(device_t dev, uint32_t pin, char *name) { struct gpiobus_softc *sc; sc = GPIOBUS_SOFTC(dev); if (pin > sc->sc_npins) return (EINVAL); /* Did we have a name for this pin ? */ if (sc->sc_pins[pin].name != NULL) { memcpy(name, sc->sc_pins[pin].name, GPIOMAXNAME); return (0); } /* Return the default pin name. */ return (GPIO_PIN_GETNAME(device_get_parent(dev), pin, name)); } static int gpiobus_pin_setname(device_t dev, uint32_t pin, const char *name) { struct gpiobus_softc *sc; sc = GPIOBUS_SOFTC(dev); if (pin > sc->sc_npins) return (EINVAL); if (name == NULL) return (EINVAL); /* Save the pin name. */ if (sc->sc_pins[pin].name == NULL) sc->sc_pins[pin].name = malloc(GPIOMAXNAME, M_DEVBUF, M_WAITOK | M_ZERO); strlcpy(sc->sc_pins[pin].name, name, GPIOMAXNAME); return (0); } static device_method_t gpiobus_methods[] = { /* Device interface */ DEVMETHOD(device_probe, gpiobus_probe), DEVMETHOD(device_attach, gpiobus_attach), DEVMETHOD(device_detach, gpiobus_detach), DEVMETHOD(device_shutdown, bus_generic_shutdown), DEVMETHOD(device_suspend, gpiobus_suspend), DEVMETHOD(device_resume, gpiobus_resume), /* Bus interface */ DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), DEVMETHOD(bus_config_intr, bus_generic_config_intr), DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), DEVMETHOD(bus_set_resource, gpiobus_set_resource), DEVMETHOD(bus_alloc_resource, gpiobus_alloc_resource), DEVMETHOD(bus_release_resource, gpiobus_release_resource), DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), DEVMETHOD(bus_get_resource_list, gpiobus_get_resource_list), DEVMETHOD(bus_add_child, gpiobus_add_child), DEVMETHOD(bus_probe_nomatch, gpiobus_probe_nomatch), DEVMETHOD(bus_print_child, gpiobus_print_child), DEVMETHOD(bus_child_pnpinfo_str, gpiobus_child_pnpinfo_str), DEVMETHOD(bus_child_location_str, gpiobus_child_location_str), DEVMETHOD(bus_hinted_child, gpiobus_hinted_child), DEVMETHOD(bus_read_ivar, gpiobus_read_ivar), DEVMETHOD(bus_write_ivar, gpiobus_write_ivar), /* GPIO protocol */ DEVMETHOD(gpiobus_acquire_bus, gpiobus_acquire_bus), DEVMETHOD(gpiobus_release_bus, gpiobus_release_bus), DEVMETHOD(gpiobus_pin_getflags, gpiobus_pin_getflags), DEVMETHOD(gpiobus_pin_getcaps, gpiobus_pin_getcaps), DEVMETHOD(gpiobus_pin_setflags, gpiobus_pin_setflags), DEVMETHOD(gpiobus_pin_get, gpiobus_pin_get), DEVMETHOD(gpiobus_pin_set, gpiobus_pin_set), DEVMETHOD(gpiobus_pin_toggle, gpiobus_pin_toggle), DEVMETHOD(gpiobus_pin_getname, gpiobus_pin_getname), DEVMETHOD(gpiobus_pin_setname, gpiobus_pin_setname), DEVMETHOD_END }; driver_t gpiobus_driver = { "gpiobus", gpiobus_methods, sizeof(struct gpiobus_softc) }; devclass_t gpiobus_devclass; EARLY_DRIVER_MODULE(gpiobus, gpio, gpiobus_driver, gpiobus_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); MODULE_VERSION(gpiobus, 1); Index: stable/12/sys/dev/gpio/gpiobusvar.h =================================================================== --- stable/12/sys/dev/gpio/gpiobusvar.h (revision 355489) +++ stable/12/sys/dev/gpio/gpiobusvar.h (revision 355490) @@ -1,172 +1,187 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2009 Oleksandr Tymoshenko * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ * */ #ifndef __GPIOBUS_H__ #define __GPIOBUS_H__ #include "opt_platform.h" #include #include #include #ifdef FDT #include #endif #ifdef INTRNG #include #endif #include "gpio_if.h" #ifdef FDT #define GPIOBUS_IVAR(d) (struct gpiobus_ivar *) \ &((struct ofw_gpiobus_devinfo *)device_get_ivars(d))->opd_dinfo #else #define GPIOBUS_IVAR(d) (struct gpiobus_ivar *) device_get_ivars(d) #endif #define GPIOBUS_SOFTC(d) (struct gpiobus_softc *) device_get_softc(d) #define GPIOBUS_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) #define GPIOBUS_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) #define GPIOBUS_LOCK_INIT(_sc) mtx_init(&_sc->sc_mtx, \ device_get_nameunit(_sc->sc_dev), "gpiobus", MTX_DEF) #define GPIOBUS_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx) #define GPIOBUS_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED) #define GPIOBUS_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED) #define GPIOBUS_WAIT 1 #define GPIOBUS_DONTWAIT 2 /* Use default interrupt mode - for gpio_alloc_intr_resource */ #define GPIO_INTR_CONFORM GPIO_INTR_NONE struct gpiobus_pin_data { int mapped; /* pin is mapped/reserved. */ char *name; /* pin name. */ }; #ifdef INTRNG struct intr_map_data_gpio { struct intr_map_data hdr; u_int gpio_pin_num; u_int gpio_pin_flags; u_int gpio_intr_mode; }; #endif struct gpiobus_softc { struct mtx sc_mtx; /* bus mutex */ struct rman sc_intr_rman; /* isr resources */ device_t sc_busdev; /* bus device */ device_t sc_owner; /* bus owner */ device_t sc_dev; /* driver device */ int sc_npins; /* total pins on bus */ struct gpiobus_pin_data *sc_pins; /* pin data */ }; struct gpiobus_pin { device_t dev; /* gpio device */ uint32_t flags; /* pin flags */ uint32_t pin; /* pin number */ }; typedef struct gpiobus_pin *gpio_pin_t; struct gpiobus_ivar { struct resource_list rl; /* isr resource list */ uint32_t npins; /* pins total */ uint32_t *pins; /* pins map */ }; enum gpiobus_ivars { GPIOBUS_IVAR_NPINS = 10500, GPIOBUS_IVAR_PINS, }; #define GPIOBUS_ACCESSOR(var, ivar, type) \ __BUS_ACCESSOR(gpiobus, var, GPIOBUS, ivar, type) GPIOBUS_ACCESSOR(npins, NPINS, uint32_t) GPIOBUS_ACCESSOR(pins, PINS, const uint32_t *) #undef GPIOBUS_ACCESSOR #ifdef FDT struct ofw_gpiobus_devinfo { struct gpiobus_ivar opd_dinfo; struct ofw_bus_devinfo opd_obdinfo; }; static __inline int gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags) { return (GPIO_MAP_GPIOS(bus, dev, gparent, gcells, gpios, pin, flags)); } device_t ofw_gpiobus_add_fdt_child(device_t, const char *, phandle_t); int ofw_gpiobus_parse_gpios(device_t, char *, struct gpiobus_pin **); void ofw_gpiobus_register_provider(device_t); void ofw_gpiobus_unregister_provider(device_t); -/* Consumers interface. */ +/* Acquire a pin by parsing FDT data. */ int gpio_pin_get_by_ofw_name(device_t consumer, phandle_t node, char *name, gpio_pin_t *gpio); int gpio_pin_get_by_ofw_idx(device_t consumer, phandle_t node, int idx, gpio_pin_t *gpio); int gpio_pin_get_by_ofw_property(device_t consumer, phandle_t node, char *name, gpio_pin_t *gpio); int gpio_pin_get_by_ofw_propidx(device_t consumer, phandle_t node, char *name, int idx, gpio_pin_t *gpio); +#endif /* FDT */ + +/* Acquire a pin by bus and pin number. */ +int gpio_pin_get_by_bus_pinnum(device_t _bus, uint32_t _pinnum, gpio_pin_t *_gp); + +/* Acquire a pin by child and index (used by direct children of gpiobus). */ +int gpio_pin_get_by_child_index(device_t _child, uint32_t _idx, gpio_pin_t *_gp); + +/* Release a pin acquired via any gpio_pin_get_xxx() function. */ void gpio_pin_release(gpio_pin_t gpio); + +/* Work with gpio pins acquired using the functions above. */ int gpio_pin_getcaps(gpio_pin_t pin, uint32_t *caps); int gpio_pin_is_active(gpio_pin_t pin, bool *active); int gpio_pin_set_active(gpio_pin_t pin, bool active); int gpio_pin_setflags(gpio_pin_t pin, uint32_t flags); -#endif struct resource *gpio_alloc_intr_resource(device_t consumer_dev, int *rid, u_int alloc_flags, gpio_pin_t pin, uint32_t intr_mode); + +/* + * Functions shared between gpiobus and other bus classes that derive from it; + * these should not be called directly by other drivers. + */ int gpio_check_flags(uint32_t, uint32_t); device_t gpiobus_attach_bus(device_t); int gpiobus_detach_bus(device_t); int gpiobus_init_softc(device_t); int gpiobus_alloc_ivars(struct gpiobus_ivar *); void gpiobus_free_ivars(struct gpiobus_ivar *); int gpiobus_acquire_pin(device_t, uint32_t); int gpiobus_release_pin(device_t, uint32_t); extern driver_t gpiobus_driver; #endif /* __GPIOBUS_H__ */ Index: stable/12/sys/dev/gpio/gpioiic.c =================================================================== --- stable/12/sys/dev/gpio/gpioiic.c (revision 355489) +++ stable/12/sys/dev/gpio/gpioiic.c (revision 355490) @@ -1,287 +1,363 @@ /*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD + * SPDX-License-Identifier: BSD-2-Clause * * Copyright (c) 2009 Oleksandr Tymoshenko * Copyright (c) 2010 Luiz Otavio O Souza - * All rights reserved. + * Copyright (c) 2019 Ian Lepore * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_platform.h" #include #include #include #include #include #include -#ifdef FDT -#include -#include -#endif - #include #include -#include #include "gpiobus_if.h" #include "iicbb_if.h" #define GPIOIIC_SCL_DFLT 0 #define GPIOIIC_SDA_DFLT 1 #define GPIOIIC_MIN_PINS 2 struct gpioiic_softc { - device_t sc_dev; - device_t sc_busdev; - int scl_pin; - int sda_pin; + device_t dev; + gpio_pin_t sclpin; + gpio_pin_t sdapin; }; -static int gpioiic_probe(device_t); -static int gpioiic_attach(device_t); +#ifdef FDT -/* iicbb interface */ -static void gpioiic_reset_bus(device_t); -static void gpioiic_setsda(device_t, int); -static void gpioiic_setscl(device_t, int); -static int gpioiic_getsda(device_t); -static int gpioiic_getscl(device_t); -static int gpioiic_reset(device_t, u_char, u_char, u_char *); +#include +static struct ofw_compat_data compat_data[] = { + {"i2c-gpio", true}, /* Standard devicetree compat string */ + {"gpioiic", true}, /* Deprecated old freebsd compat string */ + {NULL, false} +}; +OFWBUS_PNP_INFO(compat_data); +SIMPLEBUS_PNP_INFO(compat_data); + +static phandle_t +gpioiic_get_node(device_t bus, device_t dev) +{ + + /* Share our fdt node with iicbus so it can find its child nodes. */ + return (ofw_bus_get_node(bus)); +} + static int -gpioiic_probe(device_t dev) +gpioiic_setup_fdt_pins(struct gpioiic_softc *sc) { - struct gpiobus_ivar *devi; + phandle_t node; + int err; -#ifdef FDT - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - if (!ofw_bus_is_compatible(dev, "gpioiic")) - return (ENXIO); -#endif - devi = GPIOBUS_IVAR(dev); - if (devi->npins < GPIOIIC_MIN_PINS) { - device_printf(dev, - "gpioiic needs at least %d GPIO pins (only %d given).\n", - GPIOIIC_MIN_PINS, devi->npins); - return (ENXIO); - } - device_set_desc(dev, "GPIO I2C bit-banging driver"); + node = ofw_bus_get_node(sc->dev); - return (BUS_PROBE_DEFAULT); + /* + * Historically, we used the first two array elements of the gpios + * property. The modern bindings specify separate scl-gpios and + * sda-gpios properties. We cope with whichever is present. + */ + if (OF_hasprop(node, "gpios")) { + if ((err = gpio_pin_get_by_ofw_idx(sc->dev, node, + GPIOIIC_SCL_DFLT, &sc->sclpin)) != 0) { + device_printf(sc->dev, "invalid gpios property\n"); + return (err); + } + if ((err = gpio_pin_get_by_ofw_idx(sc->dev, node, + GPIOIIC_SDA_DFLT, &sc->sdapin)) != 0) { + device_printf(sc->dev, "ivalid gpios property\n"); + return (err); + } + } else { + if ((err = gpio_pin_get_by_ofw_property(sc->dev, node, + "scl-gpios", &sc->sclpin)) != 0) { + device_printf(sc->dev, "missing scl-gpios property\n"); + return (err); + } + if ((err = gpio_pin_get_by_ofw_property(sc->dev, node, + "sda-gpios", &sc->sdapin)) != 0) { + device_printf(sc->dev, "missing sda-gpios property\n"); + return (err); + } + } + return (0); } +#endif /* FDT */ static int -gpioiic_attach(device_t dev) +gpioiic_setup_hinted_pins(struct gpioiic_softc *sc) { - device_t bitbang; -#ifdef FDT - phandle_t node; - pcell_t pin; -#endif - struct gpiobus_ivar *devi; - struct gpioiic_softc *sc; + device_t busdev; + const char *busname, *devname; + int err, numpins, sclnum, sdanum, unit; - sc = device_get_softc(dev); - sc->sc_dev = dev; - sc->sc_busdev = device_get_parent(dev); - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "scl", &sc->scl_pin)) - sc->scl_pin = GPIOIIC_SCL_DFLT; - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "sda", &sc->sda_pin)) - sc->sda_pin = GPIOIIC_SDA_DFLT; + devname = device_get_name(sc->dev); + unit = device_get_unit(sc->dev); + busdev = device_get_parent(sc->dev); + /* + * If there is not an "at" hint naming our actual parent, then we + * weren't instantiated as a child of gpiobus via hints, and we thus + * can't access ivars that only exist for such children. + */ + if (resource_string_value(devname, unit, "at", &busname) != 0 || + (strcmp(busname, device_get_nameunit(busdev)) != 0 && + strcmp(busname, device_get_name(busdev)) != 0)) { + return (ENOENT); + } + + /* Make sure there were hints for at least two pins. */ + numpins = gpiobus_get_npins(sc->dev); + if (numpins < GPIOIIC_MIN_PINS) { #ifdef FDT - if ((node = ofw_bus_get_node(dev)) == -1) - return (ENXIO); - if (OF_getencprop(node, "scl", &pin, sizeof(pin)) > 0) - sc->scl_pin = (int)pin; - if (OF_getencprop(node, "sda", &pin, sizeof(pin)) > 0) - sc->sda_pin = (int)pin; + /* + * Be silent when there are no hints on FDT systems; the FDT + * data will provide the pin config (we'll whine if it doesn't). + */ + if (numpins == 0) { + return (ENOENT); + } #endif + device_printf(sc->dev, + "invalid pins hint; it must contain at least %d pins\n", + GPIOIIC_MIN_PINS); + return (EINVAL); + } - if (sc->scl_pin < 0 || sc->scl_pin > 1) - sc->scl_pin = GPIOIIC_SCL_DFLT; - if (sc->sda_pin < 0 || sc->sda_pin > 1) - sc->sda_pin = GPIOIIC_SDA_DFLT; + /* + * Our parent bus has already parsed the pins hint and it will use that + * info when we call gpio_pin_get_by_child_index(). But we have to + * handle the scl/sda index hints that tell us which of the two pins is + * the clock and which is the data. They're optional, but if present + * they must be a valid index (0 <= index < numpins). + */ + if ((err = resource_int_value(devname, unit, "scl", &sclnum)) != 0) + sclnum = GPIOIIC_SCL_DFLT; + else if (sclnum < 0 || sclnum >= numpins) { + device_printf(sc->dev, "invalid scl hint %d\n", sclnum); + return (EINVAL); + } + if ((err = resource_int_value(devname, unit, "sda", &sdanum)) != 0) + sdanum = GPIOIIC_SDA_DFLT; + else if (sdanum < 0 || sdanum >= numpins) { + device_printf(sc->dev, "invalid sda hint %d\n", sdanum); + return (EINVAL); + } - devi = GPIOBUS_IVAR(dev); - device_printf(dev, "SCL pin: %d, SDA pin: %d\n", - devi->pins[sc->scl_pin], devi->pins[sc->sda_pin]); + /* Allocate gpiobus_pin structs for the pins we found above. */ + if ((err = gpio_pin_get_by_child_index(sc->dev, sclnum, + &sc->sclpin)) != 0) + return (err); + if ((err = gpio_pin_get_by_child_index(sc->dev, sdanum, + &sc->sdapin)) != 0) + return (err); - /* add generic bit-banging code */ - bitbang = device_add_child(dev, "iicbb", -1); - device_probe_and_attach(bitbang); - return (0); } -static int -gpioiic_detach(device_t dev) -{ - - bus_generic_detach(dev); - device_delete_children(dev); - return (0); -} - -/* - * Reset bus by setting SDA first and then SCL. - * Must always be called with gpio bus locked. - */ static void -gpioiic_reset_bus(device_t dev) +gpioiic_setsda(device_t dev, int val) { - struct gpioiic_softc *sc = device_get_softc(dev); + struct gpioiic_softc *sc = device_get_softc(dev); + int err; - GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, sc->sda_pin, - GPIO_PIN_INPUT); - GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, sc->scl_pin, - GPIO_PIN_INPUT); + /* + * Some controllers cannot set an output value while a pin is in input + * mode; in that case we set the pin again after changing mode. + */ + err = gpio_pin_set_active(sc->sdapin, val); + gpio_pin_setflags(sc->sdapin, GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN); + if (err != 0) + gpio_pin_set_active(sc->sdapin, val); } static void -gpioiic_setpin(struct gpioiic_softc *sc, int pin, int val) +gpioiic_setscl(device_t dev, int val) { - int err; + struct gpioiic_softc *sc = device_get_softc(dev); - if (val == 0) { - err = GPIOBUS_PIN_SET(sc->sc_busdev, sc->sc_dev, pin, 0); - GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, pin, - GPIO_PIN_OUTPUT); - - /* - * Some controllers cannot set output value while a pin is in - * input mode. - */ - if (err != 0) - GPIOBUS_PIN_SET(sc->sc_busdev, sc->sc_dev, pin, 0); - } else { - GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, pin, - GPIO_PIN_INPUT); - } + gpio_pin_setflags(sc->sclpin, GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN); + gpio_pin_set_active(sc->sclpin, val); } -static void -gpioiic_setsda(device_t dev, int val) +static int +gpioiic_getscl(device_t dev) { - struct gpioiic_softc *sc = device_get_softc(dev); + struct gpioiic_softc *sc = device_get_softc(dev); + bool val; - gpioiic_setpin(sc, sc->sda_pin, val); + gpio_pin_setflags(sc->sclpin, GPIO_PIN_INPUT); + gpio_pin_is_active(sc->sclpin, &val); + return (val); } -static void -gpioiic_setscl(device_t dev, int val) +static int +gpioiic_getsda(device_t dev) { - struct gpioiic_softc *sc = device_get_softc(dev); + struct gpioiic_softc *sc = device_get_softc(dev); + bool val; - gpioiic_setpin(sc, sc->scl_pin, val); + gpio_pin_setflags(sc->sdapin, GPIO_PIN_INPUT); + gpio_pin_is_active(sc->sdapin, &val); + return (val); } static int -gpioiic_getpin(struct gpioiic_softc *sc, int pin) +gpioiic_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr) { - unsigned int val; + struct gpioiic_softc *sc = device_get_softc(dev); - GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, pin, GPIO_PIN_INPUT); - GPIOBUS_PIN_GET(sc->sc_busdev, sc->sc_dev, pin, &val); - return ((int)val); + /* Stop driving the bus pins. */ + gpio_pin_setflags(sc->sdapin, GPIO_PIN_INPUT); + gpio_pin_setflags(sc->sclpin, GPIO_PIN_INPUT); + + /* Indicate that we have no slave address (master mode). */ + return (IIC_ENOADDR); } -static int -gpioiic_getscl(device_t dev) +static void +gpioiic_cleanup(struct gpioiic_softc *sc) { - struct gpioiic_softc *sc = device_get_softc(dev); - return (gpioiic_getpin(sc, sc->scl_pin)); + device_delete_children(sc->dev); + + if (sc->sclpin != NULL) + gpio_pin_release(sc->sclpin); + + if (sc->sdapin != NULL) + gpio_pin_release(sc->sdapin); } static int -gpioiic_getsda(device_t dev) +gpioiic_probe(device_t dev) { - struct gpioiic_softc *sc = device_get_softc(dev); + int rv; - return (gpioiic_getpin(sc, sc->sda_pin)); + /* + * By default we only bid to attach if specifically added by our parent + * (usually via hint.gpioiic.#.at=busname). On FDT systems we bid as + * the default driver based on being configured in the FDT data. + */ + rv = BUS_PROBE_NOWILDCARD; + +#ifdef FDT + if (ofw_bus_status_okay(dev) && + ofw_bus_search_compatible(dev, compat_data)->ocd_data) + rv = BUS_PROBE_DEFAULT; +#endif + + device_set_desc(dev, "GPIO I2C"); + + return (rv); } static int -gpioiic_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr) +gpioiic_attach(device_t dev) { - struct gpioiic_softc *sc; + struct gpioiic_softc *sc = device_get_softc(dev); + int err; - sc = device_get_softc(dev); - gpioiic_reset_bus(sc->sc_dev); + sc->dev = dev; - return (IIC_ENOADDR); + /* Acquire our gpio pins. */ + err = gpioiic_setup_hinted_pins(sc); +#ifdef FDT + if (err != 0) + err = gpioiic_setup_fdt_pins(sc); +#endif + if (err != 0) { + device_printf(sc->dev, "no pins configured\n"); + gpioiic_cleanup(sc); + return (ENXIO); + } + + /* Say what we came up with for pin config. */ + device_printf(dev, "SCL pin: %s:%d, SDA pin: %s:%d\n", + device_get_nameunit(GPIO_GET_BUS(sc->sclpin->dev)), sc->sclpin->pin, + device_get_nameunit(GPIO_GET_BUS(sc->sdapin->dev)), sc->sdapin->pin); + + /* Add the bitbang driver as our only child; it will add iicbus. */ + device_add_child(sc->dev, "iicbb", -1); + return (bus_generic_attach(dev)); } -#ifdef FDT -static phandle_t -gpioiic_get_node(device_t bus, device_t dev) +static int +gpioiic_detach(device_t dev) { + struct gpioiic_softc *sc = device_get_softc(dev); + int err; - /* We only have one child, the iicbb, which needs our own node. */ - return (ofw_bus_get_node(bus)); + if ((err = bus_generic_detach(dev)) != 0) + return (err); + + gpioiic_cleanup(sc); + + return (0); } -#endif static devclass_t gpioiic_devclass; static device_method_t gpioiic_methods[] = { /* Device interface */ DEVMETHOD(device_probe, gpioiic_probe), DEVMETHOD(device_attach, gpioiic_attach), DEVMETHOD(device_detach, gpioiic_detach), /* iicbb interface */ DEVMETHOD(iicbb_setsda, gpioiic_setsda), DEVMETHOD(iicbb_setscl, gpioiic_setscl), DEVMETHOD(iicbb_getsda, gpioiic_getsda), DEVMETHOD(iicbb_getscl, gpioiic_getscl), DEVMETHOD(iicbb_reset, gpioiic_reset), #ifdef FDT /* OFW bus interface */ DEVMETHOD(ofw_bus_get_node, gpioiic_get_node), #endif DEVMETHOD_END }; static driver_t gpioiic_driver = { "gpioiic", gpioiic_methods, sizeof(struct gpioiic_softc), }; DRIVER_MODULE(gpioiic, gpiobus, gpioiic_driver, gpioiic_devclass, 0, 0); +DRIVER_MODULE(gpioiic, simplebus, gpioiic_driver, gpioiic_devclass, 0, 0); DRIVER_MODULE(iicbb, gpioiic, iicbb_driver, iicbb_devclass, 0, 0); MODULE_DEPEND(gpioiic, iicbb, IICBB_MINVER, IICBB_PREFVER, IICBB_MAXVER); MODULE_DEPEND(gpioiic, gpiobus, 1, 1, 1); Index: stable/12/sys/dev/gpio/ofw_gpiobus.c =================================================================== --- stable/12/sys/dev/gpio/ofw_gpiobus.c (revision 355489) +++ stable/12/sys/dev/gpio/ofw_gpiobus.c (revision 355490) @@ -1,591 +1,515 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2009, Nathan Whitehorn * Copyright (c) 2013, Luiz Otavio O Souza * Copyright (c) 2013 The FreeBSD Foundation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice unmodified, this list of conditions, and the following * disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include "gpiobus_if.h" -#define GPIO_ACTIVE_LOW 1 - static struct ofw_gpiobus_devinfo *ofw_gpiobus_setup_devinfo(device_t, device_t, phandle_t); static void ofw_gpiobus_destroy_devinfo(device_t, struct ofw_gpiobus_devinfo *); static int ofw_gpiobus_parse_gpios_impl(device_t, phandle_t, char *, struct gpiobus_softc *, struct gpiobus_pin **); /* * Utility functions for easier handling of OFW GPIO pins. * * !!! BEWARE !!! * GPIOBUS uses children's IVARs, so we cannot use this interface for cross * tree consumers. * */ int gpio_pin_get_by_ofw_propidx(device_t consumer, phandle_t cnode, char *prop_name, int idx, gpio_pin_t *out_pin) { phandle_t xref; pcell_t *cells; device_t busdev; struct gpiobus_pin pin; int ncells, rv; KASSERT(consumer != NULL && cnode > 0, ("both consumer and cnode required")); rv = ofw_bus_parse_xref_list_alloc(cnode, prop_name, "#gpio-cells", idx, &xref, &ncells, &cells); if (rv != 0) return (rv); /* Translate provider to device. */ pin.dev = OF_device_from_xref(xref); if (pin.dev == NULL) { OF_prop_free(cells); return (ENODEV); } /* Test if GPIO bus already exist. */ busdev = GPIO_GET_BUS(pin.dev); if (busdev == NULL) { OF_prop_free(cells); return (ENODEV); } /* Map GPIO pin. */ rv = gpio_map_gpios(pin.dev, cnode, OF_node_from_xref(xref), ncells, cells, &pin.pin, &pin.flags); OF_prop_free(cells); if (rv != 0) return (ENXIO); /* Reserve GPIO pin. */ rv = gpiobus_acquire_pin(busdev, pin.pin); if (rv != 0) return (EBUSY); *out_pin = malloc(sizeof(struct gpiobus_pin), M_DEVBUF, M_WAITOK | M_ZERO); **out_pin = pin; return (0); } int gpio_pin_get_by_ofw_idx(device_t consumer, phandle_t node, int idx, gpio_pin_t *pin) { return (gpio_pin_get_by_ofw_propidx(consumer, node, "gpios", idx, pin)); } int gpio_pin_get_by_ofw_property(device_t consumer, phandle_t node, char *name, gpio_pin_t *pin) { return (gpio_pin_get_by_ofw_propidx(consumer, node, name, 0, pin)); } int gpio_pin_get_by_ofw_name(device_t consumer, phandle_t node, char *name, gpio_pin_t *pin) { int rv, idx; KASSERT(consumer != NULL && node > 0, ("both consumer and node required")); rv = ofw_bus_find_string_index(node, "gpio-names", name, &idx); if (rv != 0) return (rv); return (gpio_pin_get_by_ofw_idx(consumer, node, idx, pin)); } -void -gpio_pin_release(gpio_pin_t gpio) -{ - device_t busdev; - - if (gpio == NULL) - return; - - KASSERT(gpio->dev != NULL, ("invalid pin state")); - - busdev = GPIO_GET_BUS(gpio->dev); - if (busdev != NULL) - gpiobus_release_pin(busdev, gpio->pin); - - /* XXXX Unreserve pin. */ - free(gpio, M_DEVBUF); -} - -int -gpio_pin_getcaps(gpio_pin_t pin, uint32_t *caps) -{ - - KASSERT(pin != NULL, ("GPIO pin is NULL.")); - KASSERT(pin->dev != NULL, ("GPIO pin device is NULL.")); - return (GPIO_PIN_GETCAPS(pin->dev, pin->pin, caps)); -} - -int -gpio_pin_is_active(gpio_pin_t pin, bool *active) -{ - int rv; - uint32_t tmp; - - KASSERT(pin != NULL, ("GPIO pin is NULL.")); - KASSERT(pin->dev != NULL, ("GPIO pin device is NULL.")); - rv = GPIO_PIN_GET(pin->dev, pin->pin, &tmp); - if (rv != 0) { - return (rv); - } - - if (pin->flags & GPIO_ACTIVE_LOW) - *active = tmp == 0; - else - *active = tmp != 0; - return (0); -} - -int -gpio_pin_set_active(gpio_pin_t pin, bool active) -{ - int rv; - uint32_t tmp; - - if (pin->flags & GPIO_ACTIVE_LOW) - tmp = active ? 0 : 1; - else - tmp = active ? 1 : 0; - - KASSERT(pin != NULL, ("GPIO pin is NULL.")); - KASSERT(pin->dev != NULL, ("GPIO pin device is NULL.")); - rv = GPIO_PIN_SET(pin->dev, pin->pin, tmp); - return (rv); -} - -int -gpio_pin_setflags(gpio_pin_t pin, uint32_t flags) -{ - int rv; - - KASSERT(pin != NULL, ("GPIO pin is NULL.")); - KASSERT(pin->dev != NULL, ("GPIO pin device is NULL.")); - - rv = GPIO_PIN_SETFLAGS(pin->dev, pin->pin, flags); - return (rv); -} - /* * OFW_GPIOBUS driver. */ device_t ofw_gpiobus_add_fdt_child(device_t bus, const char *drvname, phandle_t child) { device_t childdev; int i; struct gpiobus_ivar *devi; struct ofw_gpiobus_devinfo *dinfo; /* * Check to see if we already have a child for @p child, and if so * return it. */ childdev = ofw_bus_find_child_device_by_phandle(bus, child); if (childdev != NULL) return (childdev); /* * Set up the GPIO child and OFW bus layer devinfo and add it to bus. */ childdev = device_add_child(bus, drvname, -1); if (childdev == NULL) return (NULL); dinfo = ofw_gpiobus_setup_devinfo(bus, childdev, child); if (dinfo == NULL) { device_delete_child(bus, childdev); return (NULL); } if (device_probe_and_attach(childdev) != 0) { ofw_gpiobus_destroy_devinfo(bus, dinfo); device_delete_child(bus, childdev); return (NULL); } /* Use the child name as pin name. */ devi = &dinfo->opd_dinfo; for (i = 0; i < devi->npins; i++) GPIOBUS_PIN_SETNAME(bus, devi->pins[i], device_get_nameunit(childdev)); return (childdev); } int ofw_gpiobus_parse_gpios(device_t consumer, char *pname, struct gpiobus_pin **pins) { return (ofw_gpiobus_parse_gpios_impl(consumer, ofw_bus_get_node(consumer), pname, NULL, pins)); } void ofw_gpiobus_register_provider(device_t provider) { phandle_t node; node = ofw_bus_get_node(provider); OF_device_register_xref(OF_xref_from_node(node), provider); } void ofw_gpiobus_unregister_provider(device_t provider) { phandle_t node; node = ofw_bus_get_node(provider); OF_device_register_xref(OF_xref_from_node(node), NULL); } static struct ofw_gpiobus_devinfo * ofw_gpiobus_setup_devinfo(device_t bus, device_t child, phandle_t node) { int i, npins; struct gpiobus_ivar *devi; struct gpiobus_pin *pins; struct gpiobus_softc *sc; struct ofw_gpiobus_devinfo *dinfo; sc = device_get_softc(bus); dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_NOWAIT | M_ZERO); if (dinfo == NULL) return (NULL); if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, node) != 0) { free(dinfo, M_DEVBUF); return (NULL); } /* Parse the gpios property for the child. */ npins = ofw_gpiobus_parse_gpios_impl(child, node, "gpios", sc, &pins); if (npins <= 0) { ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo); free(dinfo, M_DEVBUF); return (NULL); } /* Initialize the irq resource list. */ resource_list_init(&dinfo->opd_dinfo.rl); /* Allocate the child ivars and copy the parsed pin data. */ devi = &dinfo->opd_dinfo; devi->npins = (uint32_t)npins; if (gpiobus_alloc_ivars(devi) != 0) { free(pins, M_DEVBUF); ofw_gpiobus_destroy_devinfo(bus, dinfo); return (NULL); } for (i = 0; i < devi->npins; i++) devi->pins[i] = pins[i].pin; free(pins, M_DEVBUF); /* Parse the interrupt resources. */ if (ofw_bus_intr_to_rl(bus, node, &dinfo->opd_dinfo.rl, NULL) != 0) { ofw_gpiobus_destroy_devinfo(bus, dinfo); return (NULL); } device_set_ivars(child, dinfo); return (dinfo); } static void ofw_gpiobus_destroy_devinfo(device_t bus, struct ofw_gpiobus_devinfo *dinfo) { int i; struct gpiobus_ivar *devi; struct gpiobus_softc *sc; sc = device_get_softc(bus); devi = &dinfo->opd_dinfo; for (i = 0; i < devi->npins; i++) { if (devi->pins[i] > sc->sc_npins) continue; sc->sc_pins[devi->pins[i]].mapped = 0; } gpiobus_free_ivars(devi); resource_list_free(&dinfo->opd_dinfo.rl); ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo); free(dinfo, M_DEVBUF); } static int ofw_gpiobus_parse_gpios_impl(device_t consumer, phandle_t cnode, char *pname, struct gpiobus_softc *bussc, struct gpiobus_pin **pins) { int gpiocells, i, j, ncells, npins; pcell_t *gpios; phandle_t gpio; ncells = OF_getencprop_alloc_multi(cnode, pname, sizeof(*gpios), (void **)&gpios); if (ncells == -1) { device_printf(consumer, "Warning: No %s specified in fdt data; " "device may not function.\n", pname); return (-1); } /* * The gpio-specifier is controller independent, the first pcell has * the reference to the GPIO controller phandler. * Count the number of encoded gpio-specifiers on the first pass. */ i = 0; npins = 0; while (i < ncells) { /* Allow NULL specifiers. */ if (gpios[i] == 0) { npins++; i++; continue; } gpio = OF_node_from_xref(gpios[i]); /* If we have bussc, ignore devices from other gpios. */ if (bussc != NULL) if (ofw_bus_get_node(bussc->sc_dev) != gpio) return (0); /* * Check for gpio-controller property and read the #gpio-cells * for this GPIO controller. */ if (!OF_hasprop(gpio, "gpio-controller") || OF_getencprop(gpio, "#gpio-cells", &gpiocells, sizeof(gpiocells)) < 0) { device_printf(consumer, "gpio reference is not a gpio-controller.\n"); OF_prop_free(gpios); return (-1); } if (ncells - i < gpiocells + 1) { device_printf(consumer, "%s cells doesn't match #gpio-cells.\n", pname); return (-1); } npins++; i += gpiocells + 1; } if (npins == 0 || pins == NULL) { if (npins == 0) device_printf(consumer, "no pin specified in %s.\n", pname); OF_prop_free(gpios); return (npins); } *pins = malloc(sizeof(struct gpiobus_pin) * npins, M_DEVBUF, M_NOWAIT | M_ZERO); if (*pins == NULL) { OF_prop_free(gpios); return (-1); } /* Decode the gpio specifier on the second pass. */ i = 0; j = 0; while (i < ncells) { /* Allow NULL specifiers. */ if (gpios[i] == 0) { j++; i++; continue; } gpio = OF_node_from_xref(gpios[i]); /* Read gpio-cells property for this GPIO controller. */ if (OF_getencprop(gpio, "#gpio-cells", &gpiocells, sizeof(gpiocells)) < 0) { device_printf(consumer, "gpio does not have the #gpio-cells property.\n"); goto fail; } /* Return the device reference for the GPIO controller. */ (*pins)[j].dev = OF_device_from_xref(gpios[i]); if ((*pins)[j].dev == NULL) { device_printf(consumer, "no device registered for the gpio controller.\n"); goto fail; } /* * If the gpiobus softc is NULL we use the GPIO_GET_BUS() to * retrieve it. The GPIO_GET_BUS() method is only valid after * the child is probed and attached. */ if (bussc == NULL) { if (GPIO_GET_BUS((*pins)[j].dev) == NULL) { device_printf(consumer, "no gpiobus reference for %s.\n", device_get_nameunit((*pins)[j].dev)); goto fail; } bussc = device_get_softc(GPIO_GET_BUS((*pins)[j].dev)); } /* Get the GPIO pin number and flags. */ if (gpio_map_gpios((*pins)[j].dev, cnode, gpio, gpiocells, &gpios[i + 1], &(*pins)[j].pin, &(*pins)[j].flags) != 0) { device_printf(consumer, "cannot map the gpios specifier.\n"); goto fail; } /* Reserve the GPIO pin. */ if (gpiobus_acquire_pin(bussc->sc_busdev, (*pins)[j].pin) != 0) goto fail; j++; i += gpiocells + 1; } OF_prop_free(gpios); return (npins); fail: OF_prop_free(gpios); free(*pins, M_DEVBUF); return (-1); } static int ofw_gpiobus_probe(device_t dev) { if (ofw_bus_get_node(dev) == -1) return (ENXIO); device_set_desc(dev, "OFW GPIO bus"); - return (0); + return (BUS_PROBE_DEFAULT); } static int ofw_gpiobus_attach(device_t dev) { int err; phandle_t child; err = gpiobus_init_softc(dev); if (err != 0) return (err); bus_generic_probe(dev); bus_enumerate_hinted_children(dev); /* * Attach the children represented in the device tree. */ for (child = OF_child(ofw_bus_get_node(dev)); child != 0; child = OF_peer(child)) { + if (OF_hasprop(child, "gpio-hog")) + continue; if (!OF_hasprop(child, "gpios")) continue; if (ofw_gpiobus_add_fdt_child(dev, NULL, child) == NULL) continue; } return (bus_generic_attach(dev)); } static device_t ofw_gpiobus_add_child(device_t dev, u_int order, const char *name, int unit) { device_t child; struct ofw_gpiobus_devinfo *devi; child = device_add_child_ordered(dev, order, name, unit); if (child == NULL) return (child); devi = malloc(sizeof(struct ofw_gpiobus_devinfo), M_DEVBUF, M_NOWAIT | M_ZERO); if (devi == NULL) { device_delete_child(dev, child); return (0); } /* * NULL all the OFW-related parts of the ivars for non-OFW * children. */ devi->opd_obdinfo.obd_node = -1; devi->opd_obdinfo.obd_name = NULL; devi->opd_obdinfo.obd_compat = NULL; devi->opd_obdinfo.obd_type = NULL; devi->opd_obdinfo.obd_model = NULL; device_set_ivars(child, devi); return (child); } static const struct ofw_bus_devinfo * ofw_gpiobus_get_devinfo(device_t bus, device_t dev) { struct ofw_gpiobus_devinfo *dinfo; dinfo = device_get_ivars(dev); return (&dinfo->opd_obdinfo); } static device_method_t ofw_gpiobus_methods[] = { /* Device interface */ DEVMETHOD(device_probe, ofw_gpiobus_probe), DEVMETHOD(device_attach, ofw_gpiobus_attach), /* Bus interface */ DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), DEVMETHOD(bus_add_child, ofw_gpiobus_add_child), /* ofw_bus interface */ DEVMETHOD(ofw_bus_get_devinfo, ofw_gpiobus_get_devinfo), DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), DEVMETHOD_END }; devclass_t ofwgpiobus_devclass; DEFINE_CLASS_1(gpiobus, ofw_gpiobus_driver, ofw_gpiobus_methods, sizeof(struct gpiobus_softc), gpiobus_driver); EARLY_DRIVER_MODULE(ofw_gpiobus, gpio, ofw_gpiobus_driver, ofwgpiobus_devclass, 0, 0, BUS_PASS_BUS); MODULE_VERSION(ofw_gpiobus, 1); MODULE_DEPEND(ofw_gpiobus, gpiobus, 1, 1, 1); Index: stable/12/sys/dev/ofw/ofw_bus_subr.h =================================================================== --- stable/12/sys/dev/ofw/ofw_bus_subr.h (revision 355489) +++ stable/12/sys/dev/ofw/ofw_bus_subr.h (revision 355490) @@ -1,152 +1,153 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2005 Marius Strobl * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions, and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #ifndef _DEV_OFW_OFW_BUS_SUBR_H_ #define _DEV_OFW_OFW_BUS_SUBR_H_ #include #ifdef INTRNG #include #endif #include #include "ofw_bus_if.h" #define ORIP_NOINT -1 #define ORIR_NOTFOUND 0xffffffff struct ofw_bus_iinfo { uint8_t *opi_imap; uint8_t *opi_imapmsk; int opi_imapsz; pcell_t opi_addrc; }; struct ofw_compat_data { const char *ocd_str; uintptr_t ocd_data; }; #ifdef INTRNG struct intr_map_data_fdt { struct intr_map_data hdr; phandle_t iparent; u_int ncells; pcell_t cells[]; }; #endif #define FDTCOMPAT_PNP_DESCR "Z:compat;P:#;" #define FDTCOMPAT_PNP_INFO(t, busname) \ MODULE_PNP_INFO(FDTCOMPAT_PNP_DESCR, busname, t, t, sizeof(t) / sizeof(t[0])); -#define SIMPLEBUS_PNP_INFO(t) FDTCOMPAT_PNP_INFO(t, simplebus) +#define OFWBUS_PNP_INFO(t) FDTCOMPAT_PNP_INFO(t, ofwbus) +#define SIMPLEBUS_PNP_INFO(t) FDTCOMPAT_PNP_INFO(t, simplebus) /* Generic implementation of ofw_bus_if.m methods and helper routines */ int ofw_bus_gen_setup_devinfo(struct ofw_bus_devinfo *, phandle_t); void ofw_bus_gen_destroy_devinfo(struct ofw_bus_devinfo *); ofw_bus_get_compat_t ofw_bus_gen_get_compat; ofw_bus_get_model_t ofw_bus_gen_get_model; ofw_bus_get_name_t ofw_bus_gen_get_name; ofw_bus_get_node_t ofw_bus_gen_get_node; ofw_bus_get_type_t ofw_bus_gen_get_type; /* Helper method to report interesting OF properties in pnpinfo */ bus_child_pnpinfo_str_t ofw_bus_gen_child_pnpinfo_str; /* Routines for processing firmware interrupt maps */ void ofw_bus_setup_iinfo(phandle_t, struct ofw_bus_iinfo *, int); int ofw_bus_lookup_imap(phandle_t, struct ofw_bus_iinfo *, void *, int, void *, int, void *, int, phandle_t *); int ofw_bus_search_intrmap(void *, int, void *, int, void *, int, void *, void *, void *, int, phandle_t *); /* Routines for processing msi maps */ int ofw_bus_msimap(phandle_t, uint16_t, phandle_t *, uint32_t *); /* Routines for parsing device-tree data into resource lists. */ int ofw_bus_reg_to_rl(device_t, phandle_t, pcell_t, pcell_t, struct resource_list *); int ofw_bus_assigned_addresses_to_rl(device_t, phandle_t, pcell_t, pcell_t, struct resource_list *); int ofw_bus_intr_to_rl(device_t, phandle_t, struct resource_list *, int *); int ofw_bus_intr_by_rid(device_t, phandle_t, int, phandle_t *, int *, pcell_t **); /* Helper to get device status property */ const char *ofw_bus_get_status(device_t dev); int ofw_bus_status_okay(device_t dev); int ofw_bus_node_status_okay(phandle_t node); /* Helper to get node's interrupt parent */ phandle_t ofw_bus_find_iparent(phandle_t); /* Helper routine for checking compat prop */ int ofw_bus_is_compatible(device_t, const char *); int ofw_bus_is_compatible_strict(device_t, const char *); int ofw_bus_node_is_compatible(phandle_t, const char *); /* * Helper routine to search a list of compat properties. The table is * terminated by an entry with a NULL compat-string pointer; a pointer to that * table entry is returned if none of the compat strings match for the device, * giving you control over the not-found value. Will not return NULL unless the * provided table pointer is NULL. */ const struct ofw_compat_data * ofw_bus_search_compatible(device_t, const struct ofw_compat_data *); /* Helper routine for checking existence of a prop */ int ofw_bus_has_prop(device_t, const char *); /* Helper to search for a child with a given compat prop */ phandle_t ofw_bus_find_compatible(phandle_t, const char *); /* Helper to search for a child with a given name */ phandle_t ofw_bus_find_child(phandle_t, const char *); /* Helper routine to find a device_t child matching a given phandle_t */ device_t ofw_bus_find_child_device_by_phandle(device_t bus, phandle_t node); /* Helper routines for parsing lists */ int ofw_bus_parse_xref_list_alloc(phandle_t node, const char *list_name, const char *cells_name, int idx, phandle_t *producer, int *ncells, pcell_t **cells); int ofw_bus_parse_xref_list_get_length(phandle_t node, const char *list_name, const char *cells_name, int *count); int ofw_bus_find_string_index(phandle_t node, const char *list_name, const char *name, int *idx); int ofw_bus_string_list_to_array(phandle_t node, const char *list_name, const char ***array); #endif /* !_DEV_OFW_OFW_BUS_SUBR_H_ */ Index: stable/12 =================================================================== --- stable/12 (revision 355489) +++ stable/12 (revision 355490) Property changes on: stable/12 ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /head:r355214,355239,355274,355276-355277,355295,355298