Index: head/contrib/llvm/lib/Target/PowerPC/PPCSubtarget.cpp =================================================================== --- head/contrib/llvm/lib/Target/PowerPC/PPCSubtarget.cpp (revision 349350) +++ head/contrib/llvm/lib/Target/PowerPC/PPCSubtarget.cpp (revision 349351) @@ -1,234 +1,235 @@ //===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file implements the PPC specific subclass of TargetSubtargetInfo. // //===----------------------------------------------------------------------===// #include "PPCSubtarget.h" #include "PPC.h" #include "PPCRegisterInfo.h" #include "PPCTargetMachine.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineScheduler.h" #include "llvm/IR/Attributes.h" #include "llvm/IR/Function.h" #include "llvm/IR/GlobalValue.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/TargetRegistry.h" #include "llvm/Target/TargetMachine.h" #include using namespace llvm; #define DEBUG_TYPE "ppc-subtarget" #define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_CTOR #include "PPCGenSubtargetInfo.inc" static cl::opt UseSubRegLiveness("ppc-track-subreg-liveness", cl::desc("Enable subregister liveness tracking for PPC"), cl::Hidden); static cl::opt QPXStackUnaligned("qpx-stack-unaligned", cl::desc("Even when QPX is enabled the stack is not 32-byte aligned"), cl::Hidden); PPCSubtarget &PPCSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) { initializeEnvironment(); initSubtargetFeatures(CPU, FS); return *this; } PPCSubtarget::PPCSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const PPCTargetMachine &TM) : PPCGenSubtargetInfo(TT, CPU, FS), TargetTriple(TT), IsPPC64(TargetTriple.getArch() == Triple::ppc64 || TargetTriple.getArch() == Triple::ppc64le), TM(TM), FrameLowering(initializeSubtargetDependencies(CPU, FS)), InstrInfo(*this), TLInfo(TM, *this) {} void PPCSubtarget::initializeEnvironment() { StackAlignment = 16; DarwinDirective = PPC::DIR_NONE; HasMFOCRF = false; Has64BitSupport = false; Use64BitRegs = false; UseCRBits = false; HasHardFloat = false; HasAltivec = false; HasSPE = false; HasFPU = false; HasQPX = false; HasVSX = false; HasP8Vector = false; HasP8Altivec = false; HasP8Crypto = false; HasP9Vector = false; HasP9Altivec = false; HasFCPSGN = false; HasFSQRT = false; HasFRE = false; HasFRES = false; HasFRSQRTE = false; HasFRSQRTES = false; HasRecipPrec = false; HasSTFIWX = false; HasLFIWAX = false; HasFPRND = false; HasFPCVT = false; HasISEL = false; HasBPERMD = false; HasExtDiv = false; HasCMPB = false; HasLDBRX = false; IsBookE = false; HasOnlyMSYNC = false; IsPPC4xx = false; IsPPC6xx = false; IsE500 = false; FeatureMFTB = false; DeprecatedDST = false; HasLazyResolverStubs = false; HasICBT = false; HasInvariantFunctionDescriptors = false; HasPartwordAtomics = false; HasDirectMove = false; IsQPXStackUnaligned = false; HasHTM = false; HasFusion = false; HasFloat128 = false; IsISA3_0 = false; UseLongCalls = false; SecurePlt = false; HasPOPCNTD = POPCNTD_Unavailable; } void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { // Determine default and user specified characteristics std::string CPUName = CPU; if (CPUName.empty() || CPU == "generic") { // If cross-compiling with -march=ppc64le without -mcpu if (TargetTriple.getArch() == Triple::ppc64le) CPUName = "ppc64le"; else CPUName = "generic"; } // Initialize scheduling itinerary for the specified CPU. InstrItins = getInstrItineraryForCPU(CPUName); // Parse features string. ParseSubtargetFeatures(CPUName, FS); // If the user requested use of 64-bit regs, but the cpu selected doesn't // support it, ignore. if (IsPPC64 && has64BitSupport()) Use64BitRegs = true; // Set up darwin-specific properties. if (isDarwin()) HasLazyResolverStubs = true; - if (TargetTriple.isOSNetBSD() || TargetTriple.isOSOpenBSD()) + if ((TargetTriple.isOSFreeBSD() && TargetTriple.getOSMajorVersion() >= 13) + || TargetTriple.isOSNetBSD() || TargetTriple.isOSOpenBSD()) SecurePlt = true; if (HasSPE && IsPPC64) report_fatal_error( "SPE is only supported for 32-bit targets.\n", false); if (HasSPE && (HasAltivec || HasQPX || HasVSX || HasFPU)) report_fatal_error( "SPE and traditional floating point cannot both be enabled.\n", false); // If not SPE, set standard FPU if (!HasSPE) HasFPU = true; // QPX requires a 32-byte aligned stack. Note that we need to do this if // we're compiling for a BG/Q system regardless of whether or not QPX // is enabled because external functions will assume this alignment. IsQPXStackUnaligned = QPXStackUnaligned; StackAlignment = getPlatformStackAlignment(); // Determine endianness. // FIXME: Part of the TargetMachine. IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le); } /// Return true if accesses to the specified global have to go through a dyld /// lazy resolution stub. This means that an extra load is required to get the /// address of the global. bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV) const { if (!HasLazyResolverStubs) return false; if (!TM.shouldAssumeDSOLocal(*GV->getParent(), GV)) return true; // 32 bit macho has no relocation for a-b if a is undefined, even if b is in // the section that is being relocated. This means we have to use o load even // for GVs that are known to be local to the dso. if (GV->isDeclarationForLinker() || GV->hasCommonLinkage()) return true; return false; } bool PPCSubtarget::enableMachineScheduler() const { return true; } // This overrides the PostRAScheduler bit in the SchedModel for each CPU. bool PPCSubtarget::enablePostRAScheduler() const { return true; } PPCGenSubtargetInfo::AntiDepBreakMode PPCSubtarget::getAntiDepBreakMode() const { return TargetSubtargetInfo::ANTIDEP_ALL; } void PPCSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { CriticalPathRCs.clear(); CriticalPathRCs.push_back(isPPC64() ? &PPC::G8RCRegClass : &PPC::GPRCRegClass); } void PPCSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const { // The GenericScheduler that we use defaults to scheduling bottom up only. // We want to schedule from both the top and the bottom and so we set // OnlyBottomUp to false. // We want to do bi-directional scheduling since it provides a more balanced // schedule leading to better performance. Policy.OnlyBottomUp = false; // Spilling is generally expensive on all PPC cores, so always enable // register-pressure tracking. Policy.ShouldTrackPressure = true; } bool PPCSubtarget::useAA() const { return true; } bool PPCSubtarget::enableSubRegLiveness() const { return UseSubRegLiveness; } unsigned char PPCSubtarget::classifyGlobalReference(const GlobalValue *GV) const { // Note that currently we don't generate non-pic references. // If a caller wants that, this will have to be updated. // Large code model always uses the TOC even for local symbols. if (TM.getCodeModel() == CodeModel::Large) return PPCII::MO_PIC_FLAG | PPCII::MO_NLP_FLAG; if (TM.shouldAssumeDSOLocal(*GV->getParent(), GV)) return PPCII::MO_PIC_FLAG; return PPCII::MO_PIC_FLAG | PPCII::MO_NLP_FLAG; } bool PPCSubtarget::isELFv2ABI() const { return TM.isELFv2ABI(); } bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); } Index: head/contrib/llvm/tools/clang/lib/Driver/ToolChains/Arch/PPC.cpp =================================================================== --- head/contrib/llvm/tools/clang/lib/Driver/ToolChains/Arch/PPC.cpp (revision 349350) +++ head/contrib/llvm/tools/clang/lib/Driver/ToolChains/Arch/PPC.cpp (revision 349351) @@ -1,157 +1,158 @@ //===--- PPC.cpp - PPC Helpers for Tools ------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// #include "PPC.h" #include "ToolChains/CommonArgs.h" #include "clang/Driver/Driver.h" #include "clang/Driver/DriverDiagnostic.h" #include "clang/Driver/Options.h" #include "llvm/ADT/StringSwitch.h" #include "llvm/Option/ArgList.h" using namespace clang::driver; using namespace clang::driver::tools; using namespace clang; using namespace llvm::opt; /// getPPCTargetCPU - Get the (LLVM) name of the PowerPC cpu we are targeting. std::string ppc::getPPCTargetCPU(const ArgList &Args) { if (Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ)) { StringRef CPUName = A->getValue(); if (CPUName == "native") { std::string CPU = llvm::sys::getHostCPUName(); if (!CPU.empty() && CPU != "generic") return CPU; else return ""; } return llvm::StringSwitch(CPUName) .Case("common", "generic") .Case("440", "440") .Case("440fp", "440") .Case("450", "450") .Case("601", "601") .Case("602", "602") .Case("603", "603") .Case("603e", "603e") .Case("603ev", "603ev") .Case("604", "604") .Case("604e", "604e") .Case("620", "620") .Case("630", "pwr3") .Case("G3", "g3") .Case("7400", "7400") .Case("G4", "g4") .Case("7450", "7450") .Case("G4+", "g4+") .Case("750", "750") .Case("970", "970") .Case("G5", "g5") .Case("a2", "a2") .Case("a2q", "a2q") .Case("e500mc", "e500mc") .Case("e5500", "e5500") .Case("power3", "pwr3") .Case("power4", "pwr4") .Case("power5", "pwr5") .Case("power5x", "pwr5x") .Case("power6", "pwr6") .Case("power6x", "pwr6x") .Case("power7", "pwr7") .Case("power8", "pwr8") .Case("power9", "pwr9") .Case("pwr3", "pwr3") .Case("pwr4", "pwr4") .Case("pwr5", "pwr5") .Case("pwr5x", "pwr5x") .Case("pwr6", "pwr6") .Case("pwr6x", "pwr6x") .Case("pwr7", "pwr7") .Case("pwr8", "pwr8") .Case("pwr9", "pwr9") .Case("powerpc", "ppc") .Case("powerpc64", "ppc64") .Case("powerpc64le", "ppc64le") .Default(""); } return ""; } const char *ppc::getPPCAsmModeForCPU(StringRef Name) { return llvm::StringSwitch(Name) .Case("pwr7", "-mpower7") .Case("power7", "-mpower7") .Case("pwr8", "-mpower8") .Case("power8", "-mpower8") .Case("ppc64le", "-mpower8") .Case("pwr9", "-mpower9") .Case("power9", "-mpower9") .Default("-many"); } void ppc::getPPCTargetFeatures(const Driver &D, const llvm::Triple &Triple, const ArgList &Args, std::vector &Features) { handleTargetFeaturesGroup(Args, Features, options::OPT_m_ppc_Features_Group); ppc::FloatABI FloatABI = ppc::getPPCFloatABI(D, Args); if (FloatABI == ppc::FloatABI::Soft) Features.push_back("-hard-float"); ppc::ReadGOTPtrMode ReadGOT = ppc::getPPCReadGOTPtrMode(D, Triple, Args); if (ReadGOT == ppc::ReadGOTPtrMode::SecurePlt) Features.push_back("+secure-plt"); } ppc::ReadGOTPtrMode ppc::getPPCReadGOTPtrMode(const Driver &D, const llvm::Triple &Triple, const ArgList &Args) { if (Args.getLastArg(options::OPT_msecure_plt)) return ppc::ReadGOTPtrMode::SecurePlt; - if (Triple.isOSOpenBSD()) + if ((Triple.isOSFreeBSD() && Triple.getOSMajorVersion() >= 13) || + Triple.isOSOpenBSD()) return ppc::ReadGOTPtrMode::SecurePlt; else return ppc::ReadGOTPtrMode::Bss; } ppc::FloatABI ppc::getPPCFloatABI(const Driver &D, const ArgList &Args) { ppc::FloatABI ABI = ppc::FloatABI::Invalid; if (Arg *A = Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float, options::OPT_mfloat_abi_EQ)) { if (A->getOption().matches(options::OPT_msoft_float)) ABI = ppc::FloatABI::Soft; else if (A->getOption().matches(options::OPT_mhard_float)) ABI = ppc::FloatABI::Hard; else { ABI = llvm::StringSwitch(A->getValue()) .Case("soft", ppc::FloatABI::Soft) .Case("hard", ppc::FloatABI::Hard) .Default(ppc::FloatABI::Invalid); if (ABI == ppc::FloatABI::Invalid && !StringRef(A->getValue()).empty()) { D.Diag(clang::diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args); ABI = ppc::FloatABI::Hard; } } } // If unspecified, choose the default based on the platform. if (ABI == ppc::FloatABI::Invalid) { ABI = ppc::FloatABI::Hard; } return ABI; } bool ppc::hasPPCAbiArg(const ArgList &Args, const char *Value) { Arg *A = Args.getLastArg(options::OPT_mabi_EQ); return A && (A->getValue() == StringRef(Value)); } Index: head/gnu/usr.bin/cc/cc_tools/Makefile.hdrs =================================================================== --- head/gnu/usr.bin/cc/cc_tools/Makefile.hdrs (revision 349350) +++ head/gnu/usr.bin/cc/cc_tools/Makefile.hdrs (revision 349351) @@ -1,136 +1,139 @@ # $FreeBSD$ # # This is logic for common headers shared inside of gnu/lib. It used to # live in gnu/usr.bin/cc/cc_tools/Makefile. .if !defined(TARGET_CPUARCH) || !defined(GCC_CPU) .error ${.CURDIR}: Must include gnu/usr.bin/cc/Makefile.tgt first. .endif # # The list of headers to go into tm.h # TARGET_INC+= options.h .if ${TARGET_CPUARCH} == "amd64" TARGET_INC+= i386/biarch64.h .endif .if ${TARGET_CPUARCH} != "arm" TARGET_INC+= ${GCC_CPU}/${GCC_CPU}.h .endif .if ${TARGET_CPUARCH} == "i386" || ${TARGET_CPUARCH} == "amd64" TARGET_INC+= ${GCC_CPU}/unix.h TARGET_INC+= ${GCC_CPU}/att.h .endif +.if ${TARGET_CPUARCH} == "powerpc" +TARGET_INC+= ${GCC_CPU}/secureplt.h +.endif TARGET_INC+= dbxelf.h TARGET_INC+= elfos-undef.h TARGET_INC+= elfos.h TARGET_INC+= freebsd-native.h TARGET_INC+= freebsd-spec.h TARGET_INC+= freebsd.h .if ${TARGET_CPUARCH} != "i386" && ${TARGET_CPUARCH} != "amd64" . if exists(${GCCDIR}/config/${GCC_CPU}/sysv4.h) TARGET_INC+= ${GCC_CPU}/sysv4.h . endif .endif .if ${TARGET_CPUARCH} == "amd64" TARGET_INC+= ${GCC_CPU}/x86-64.h .endif .if ${TARGET_CPUARCH} == "arm" || ${TARGET_CPUARCH} == "mips" TARGET_INC+= ${GCC_CPU}/elf.h .endif .if ${TARGET_CPUARCH} == "arm" TARGET_INC+= ${GCC_CPU}/aout.h TARGET_INC+= ${GCC_CPU}/bpabi.h .endif .if ${TARGET_ARCH} == "powerpc64" TARGET_INC+= ${GCC_CPU}/biarch64.h TARGET_INC+= ${GCC_CPU}/default64.h .endif .if ${TARGET_ARCH} == "powerpcspe" TARGET_INC+= ${GCC_CPU}/freebsdspe.h TARGET_INC+= ${GCC_CPU}/e500-double.h .endif TARGET_INC+= ${GCC_CPU}/freebsd.h .if ${TARGET_CPUARCH} == "amd64" TARGET_INC+= ${GCC_CPU}/freebsd64.h .endif .if ${TARGET_CPUARCH} == "arm" TARGET_INC+= ${GCC_CPU}/arm.h .endif TARGET_INC+= defaults.h # # Option files. # OPT_FILES= c.opt common.opt .if exists(${GCCDIR}/config/${GCC_CPU}/${GCC_CPU}.opt) OPT_FILES+= ${GCCDIR}/config/${GCC_CPU}/${GCC_CPU}.opt .endif .if exists(${.CURDIR}/${GCC_CPU}-freebsd.opt) OPT_FILES+= ${.CURDIR}/${GCC_CPU}-freebsd.opt .endif .if ${TARGET_CPUARCH} == "powerpc" OPT_FILES+= ${GCCDIR}/config/${GCC_CPU}/sysv4.opt .endif .if ${TARGET_CPUARCH} == "sparc64" OPT_FILES+= ${GCCDIR}/config/${GCC_CPU}/long-double-switch.opt .endif .if exists(${.CURDIR}/freebsd.opt) OPT_FILES+= ${.CURDIR}/freebsd.opt .endif # Options optionlist: ${OPT_FILES} LC_ALL=C awk -f ${GCCDIR}/opt-gather.awk ${.ALLSRC} > ${.TARGET} options.h: optionlist LC_ALL=C awk -f ${GCCDIR}/opt-functions.awk \ -f ${GCCDIR}/opth-gen.awk \ < ${.ALLSRC} > ${.TARGET} options.c: optionlist LC_ALL=C awk -f ${GCCDIR}/opt-functions.awk \ -f ${GCCDIR}/optc-gen.awk \ -v header_name="config.h system.h coretypes.h tm.h" \ < ${.ALLSRC} > ${.TARGET} # Target machine config tm.h: TARGET_CPU_DEFAULT="${TARGET_CPU_DEFAULT}" \ HEADERS="${TARGET_INC}" \ DEFINES="" \ /bin/sh ${GCCDIR}/mkconfig.sh ${.TARGET} .if exists(${GCCDIR}/config/${GCC_CPU}/${GCC_CPU}-modes.def) echo '#define EXTRA_MODES_FILE "${GCC_CPU}/${GCC_CPU}-modes.def"' >> ${.TARGET} .endif # tconfig.h tconfig.h: TARGET_CPU_DEFAULT="${TARGET_CPU_DEFAULT}" \ HEADERS="auto-host.h ansidecl.h" \ DEFINES="USED_FOR_TARGET" \ /bin/sh ${GCCDIR}/mkconfig.sh ${.TARGET} # Version header for gcov gcov-iov.h: echo "#define GCOV_VERSION ((gcov_unsigned_t)0x34303270)" >> ${.TARGET} # Linked headers gthr-default.h: ${GCCDIR}/gthr-posix.h .NOMETA ln -sf ${.ALLSRC} ${.TARGET} .if ${TARGET_CPUARCH} == "arm" unwind.h: ${GCCDIR}/config/arm/unwind-arm.h .else unwind.h: ${GCCDIR}/unwind-generic.h .endif unwind.h: .NOMETA ln -sf ${.ALLSRC} ${.TARGET} Index: head/share/mk/bsd.cpu.mk =================================================================== --- head/share/mk/bsd.cpu.mk (revision 349350) +++ head/share/mk/bsd.cpu.mk (revision 349351) @@ -1,414 +1,418 @@ # $FreeBSD$ # Set default CPU compile flags and baseline CPUTYPE for each arch. The # compile flags must support the minimum CPU type for each architecture but # may tune support for more advanced processors. .if !defined(CPUTYPE) || empty(CPUTYPE) _CPUCFLAGS = . if ${MACHINE_CPUARCH} == "aarch64" MACHINE_CPU = arm64 . elif ${MACHINE_CPUARCH} == "amd64" MACHINE_CPU = amd64 sse2 sse mmx . elif ${MACHINE_CPUARCH} == "arm" MACHINE_CPU = arm . elif ${MACHINE_CPUARCH} == "i386" MACHINE_CPU = i486 . elif ${MACHINE_CPUARCH} == "mips" MACHINE_CPU = mips . elif ${MACHINE_CPUARCH} == "powerpc" MACHINE_CPU = aim . elif ${MACHINE_CPUARCH} == "riscv" MACHINE_CPU = riscv . elif ${MACHINE_CPUARCH} == "sparc64" MACHINE_CPU = ultrasparc . endif .else # Handle aliases (not documented in make.conf to avoid user confusion # between e.g. i586 and pentium) . if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" . if ${CPUTYPE} == "barcelona" CPUTYPE = amdfam10 . elif ${CPUTYPE} == "skx" CPUTYPE = skylake-avx512 . elif ${CPUTYPE} == "core-avx2" CPUTYPE = haswell . elif ${CPUTYPE} == "core-avx-i" CPUTYPE = ivybridge . elif ${CPUTYPE} == "corei7-avx" CPUTYPE = sandybridge . elif ${CPUTYPE} == "corei7" CPUTYPE = nehalem . elif ${CPUTYPE} == "slm" CPUTYPE = silvermont . elif ${CPUTYPE} == "atom" CPUTYPE = bonnell . elif ${CPUTYPE} == "core" CPUTYPE = prescott . endif . if ${MACHINE_CPUARCH} == "amd64" . if ${CPUTYPE} == "prescott" CPUTYPE = nocona . endif . else . if ${CPUTYPE} == "k7" CPUTYPE = athlon . elif ${CPUTYPE} == "p4" CPUTYPE = pentium4 . elif ${CPUTYPE} == "p4m" CPUTYPE = pentium4m . elif ${CPUTYPE} == "p3" CPUTYPE = pentium3 . elif ${CPUTYPE} == "p3m" CPUTYPE = pentium3m . elif ${CPUTYPE} == "p-m" CPUTYPE = pentium-m . elif ${CPUTYPE} == "p2" CPUTYPE = pentium2 . elif ${CPUTYPE} == "i686" CPUTYPE = pentiumpro . elif ${CPUTYPE} == "i586/mmx" CPUTYPE = pentium-mmx . elif ${CPUTYPE} == "i586" CPUTYPE = pentium . endif . endif . elif ${MACHINE_ARCH} == "sparc64" . if ${CPUTYPE} == "us" CPUTYPE = ultrasparc . elif ${CPUTYPE} == "us3" CPUTYPE = ultrasparc3 . endif . endif ############################################################################### # Logic to set up correct gcc optimization flag. This must be included # after /etc/make.conf so it can react to the local value of CPUTYPE # defined therein. Consult: # http://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html # http://gcc.gnu.org/onlinedocs/gcc/RS-6000-and-PowerPC-Options.html # http://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html # http://gcc.gnu.org/onlinedocs/gcc/SPARC-Options.html # http://gcc.gnu.org/onlinedocs/gcc/i386-and-x86_002d64-Options.html . if ${MACHINE_CPUARCH} == "i386" . if ${CPUTYPE} == "crusoe" _CPUCFLAGS = -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0 . elif ${CPUTYPE} == "k5" _CPUCFLAGS = -march=pentium . elif ${CPUTYPE} == "c7" _CPUCFLAGS = -march=c3-2 . else _CPUCFLAGS = -march=${CPUTYPE} . endif . elif ${MACHINE_CPUARCH} == "amd64" _CPUCFLAGS = -march=${CPUTYPE} . elif ${MACHINE_CPUARCH} == "arm" . if ${CPUTYPE} == "xscale" #XXX: gcc doesn't seem to like -mcpu=xscale, and dies while rebuilding itself #_CPUCFLAGS = -mcpu=xscale _CPUCFLAGS = -march=armv5te -D__XSCALE__ . elif ${CPUTYPE:M*soft*} != "" _CPUCFLAGS = -mfloat-abi=softfp . elif ${CPUTYPE} == "cortexa" _CPUCFLAGS = -march=armv7 -mfpu=vfp . elif ${CPUTYPE:Marmv[4567]*} != "" # Handle all the armvX types that FreeBSD runs: # armv4, armv4t, armv5, armv5te, armv6, armv6t2, armv7, armv7-a, armv7ve # they require -march=. All the others require -mcpu=. _CPUCFLAGS = -march=${CPUTYPE} . else # Common values for FreeBSD # arm: (any arm v4 or v5 processor you are targeting) # arm920t, arm926ej-s, marvell-pj4, fa526, fa626, # fa606te, fa626te, fa726te # armv6: (any arm v7 or v8 processor you are targeting and the arm1176jzf-s) # arm1176jzf-s, generic-armv7-a, cortex-a5, cortex-a7, cortex-a8, # cortex-a9, cortex-a12, cortex-a15, cortex-a17, cortex-a53, cortex-a57, # cortex-a72, exynos-m1 _CPUCFLAGS = -mcpu=${CPUTYPE} . endif . elif ${MACHINE_ARCH} == "powerpc" . if ${CPUTYPE} == "e500" _CPUCFLAGS = -Wa,-me500 -msoft-float . else _CPUCFLAGS = -mcpu=${CPUTYPE} -mno-powerpc64 . endif . elif ${MACHINE_ARCH} == "powerpcspe" _CPUCFLAGS = -Wa,-me500 -mspe=yes -mabi=spe -mfloat-gprs=double -mcpu=8548 . elif ${MACHINE_ARCH} == "powerpc64" _CPUCFLAGS = -mcpu=${CPUTYPE} . elif ${MACHINE_CPUARCH} == "mips" # mips[1234], mips32, mips64, and all later releases need to have mips # preserved (releases later than r2 require external toolchain) . if ${CPUTYPE:Mmips32*} != "" || ${CPUTYPE:Mmips64*} != "" || \ ${CPUTYPE:Mmips[1234]} != "" _CPUCFLAGS = -march=${CPUTYPE} . else # Default -march to the CPUTYPE passed in, with mips stripped off so we # accept either mips4kc or 4kc, mostly for historical reasons # Typical values for cores: # 4kc, 24kc, 34kc, 74kc, 1004kc, octeon, octeon+, octeon2, octeon3, # sb1, xlp, xlr _CPUCFLAGS = -march=${CPUTYPE:S/^mips//} . endif . elif ${MACHINE_ARCH} == "sparc64" . if ${CPUTYPE} == "v9" _CPUCFLAGS = -mcpu=v9 . elif ${CPUTYPE} == "ultrasparc" _CPUCFLAGS = -mcpu=ultrasparc . elif ${CPUTYPE} == "ultrasparc3" _CPUCFLAGS = -mcpu=ultrasparc3 . endif . elif ${MACHINE_CPUARCH} == "aarch64" _CPUCFLAGS = -mcpu=${CPUTYPE} . endif # Set up the list of CPU features based on the CPU type. This is an # unordered list to make it easy for client makefiles to test for the # presence of a CPU feature. ########## i386 . if ${MACHINE_CPUARCH} == "i386" . if ${CPUTYPE} == "znver1" MACHINE_CPU = avx2 avx sse42 sse41 ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586 . elif ${CPUTYPE} == "bdver4" MACHINE_CPU = xop avx2 avx sse42 sse41 ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586 . elif ${CPUTYPE} == "bdver3" || ${CPUTYPE} == "bdver2" || \ ${CPUTYPE} == "bdver1" MACHINE_CPU = xop avx sse42 sse41 ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586 . elif ${CPUTYPE} == "btver2" MACHINE_CPU = avx sse42 sse41 ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586 . elif ${CPUTYPE} == "btver1" MACHINE_CPU = ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586 . elif ${CPUTYPE} == "amdfam10" MACHINE_CPU = athlon-xp athlon k7 3dnow sse4a sse3 sse2 sse mmx k6 k5 i586 . elif ${CPUTYPE} == "opteron-sse3" || ${CPUTYPE} == "athlon64-sse3" MACHINE_CPU = athlon-xp athlon k7 3dnow sse3 sse2 sse mmx k6 k5 i586 . elif ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64" || \ ${CPUTYPE} == "athlon-fx" MACHINE_CPU = athlon-xp athlon k7 3dnow sse2 sse mmx k6 k5 i586 . elif ${CPUTYPE} == "athlon-mp" || ${CPUTYPE} == "athlon-xp" || \ ${CPUTYPE} == "athlon-4" MACHINE_CPU = athlon-xp athlon k7 3dnow sse mmx k6 k5 i586 . elif ${CPUTYPE} == "athlon" || ${CPUTYPE} == "athlon-tbird" MACHINE_CPU = athlon k7 3dnow mmx k6 k5 i586 . elif ${CPUTYPE} == "k6-3" || ${CPUTYPE} == "k6-2" || ${CPUTYPE} == "geode" MACHINE_CPU = 3dnow mmx k6 k5 i586 . elif ${CPUTYPE} == "k6" MACHINE_CPU = mmx k6 k5 i586 . elif ${CPUTYPE} == "k5" MACHINE_CPU = k5 i586 . elif ${CPUTYPE} == "cascadelake" || ${CPUTYPE} == "icelake-server" || \ ${CPUTYPE} == "icelake-client" || ${CPUTYPE} == "cannonlake" || \ ${CPUTYPE} == "knm" || ${CPUTYPE} == "skylake-avx512" || \ ${CPUTYPE} == "knl" MACHINE_CPU = avx512 avx2 avx sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586 . elif ${CPUTYPE} == "skylake" || ${CPUTYPE} == "broadwell" || \ ${CPUTYPE} == "haswell" MACHINE_CPU = avx2 avx sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586 . elif ${CPUTYPE} == "ivybridge" || ${CPUTYPE} == "sandybridge" MACHINE_CPU = avx sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586 . elif ${CPUTYPE} == "tremont" || ${CPUTYPE} == "goldmont-plus" || \ ${CPUTYPE} == "goldmont" || ${CPUTYPE} == "westmere" || \ ${CPUTYPE} == "nehalem" || ${CPUTYPE} == "silvermont" MACHINE_CPU = sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586 . elif ${CPUTYPE} == "penryn" MACHINE_CPU = sse41 ssse3 sse3 sse2 sse i686 mmx i586 . elif ${CPUTYPE} == "core2" || ${CPUTYPE} == "bonnell" MACHINE_CPU = ssse3 sse3 sse2 sse i686 mmx i586 . elif ${CPUTYPE} == "yonah" || ${CPUTYPE} == "prescott" MACHINE_CPU = sse3 sse2 sse i686 mmx i586 . elif ${CPUTYPE} == "pentium4" || ${CPUTYPE} == "pentium4m" || \ ${CPUTYPE} == "pentium-m" MACHINE_CPU = sse2 sse i686 mmx i586 . elif ${CPUTYPE} == "pentium3" || ${CPUTYPE} == "pentium3m" MACHINE_CPU = sse i686 mmx i586 . elif ${CPUTYPE} == "pentium2" MACHINE_CPU = i686 mmx i586 . elif ${CPUTYPE} == "pentiumpro" MACHINE_CPU = i686 i586 . elif ${CPUTYPE} == "pentium-mmx" MACHINE_CPU = mmx i586 . elif ${CPUTYPE} == "pentium" MACHINE_CPU = i586 . elif ${CPUTYPE} == "c7" MACHINE_CPU = sse3 sse2 sse i686 mmx i586 . elif ${CPUTYPE} == "c3-2" MACHINE_CPU = sse i686 mmx i586 . elif ${CPUTYPE} == "c3" MACHINE_CPU = 3dnow mmx i586 . elif ${CPUTYPE} == "winchip2" MACHINE_CPU = 3dnow mmx . elif ${CPUTYPE} == "winchip-c6" MACHINE_CPU = mmx . endif MACHINE_CPU += i486 ########## amd64 . elif ${MACHINE_CPUARCH} == "amd64" . if ${CPUTYPE} == "znver1" MACHINE_CPU = avx2 avx sse42 sse41 ssse3 sse4a sse3 . elif ${CPUTYPE} == "bdver4" MACHINE_CPU = xop avx2 avx sse42 sse41 ssse3 sse4a sse3 . elif ${CPUTYPE} == "bdver3" || ${CPUTYPE} == "bdver2" || \ ${CPUTYPE} == "bdver1" MACHINE_CPU = xop avx sse42 sse41 ssse3 sse4a sse3 . elif ${CPUTYPE} == "btver2" MACHINE_CPU = avx sse42 sse41 ssse3 sse4a sse3 . elif ${CPUTYPE} == "btver1" MACHINE_CPU = ssse3 sse4a sse3 . elif ${CPUTYPE} == "amdfam10" MACHINE_CPU = k8 3dnow sse4a sse3 . elif ${CPUTYPE} == "opteron-sse3" || ${CPUTYPE} == "athlon64-sse3" || \ ${CPUTYPE} == "k8-sse3" MACHINE_CPU = k8 3dnow sse3 . elif ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64" || \ ${CPUTYPE} == "athlon-fx" || ${CPUTYPE} == "k8" MACHINE_CPU = k8 3dnow . elif ${CPUTYPE} == "cascadelake" || ${CPUTYPE} == "icelake-server" || \ ${CPUTYPE} == "icelake-client" || ${CPUTYPE} == "cannonlake" || \ ${CPUTYPE} == "knm" || ${CPUTYPE} == "skylake-avx512" || \ ${CPUTYPE} == "knl" MACHINE_CPU = avx512 avx2 avx sse42 sse41 ssse3 sse3 . elif ${CPUTYPE} == "skylake" || ${CPUTYPE} == "broadwell" || \ ${CPUTYPE} == "haswell" MACHINE_CPU = avx2 avx sse42 sse41 ssse3 sse3 . elif ${CPUTYPE} == "ivybridge" || ${CPUTYPE} == "sandybridge" MACHINE_CPU = avx sse42 sse41 ssse3 sse3 . elif ${CPUTYPE} == "tremont" || ${CPUTYPE} == "goldmont-plus" || \ ${CPUTYPE} == "goldmont" || ${CPUTYPE} == "westmere" || \ ${CPUTYPE} == "nehalem" || ${CPUTYPE} == "silvermont" MACHINE_CPU = sse42 sse41 ssse3 sse3 . elif ${CPUTYPE} == "penryn" MACHINE_CPU = sse41 ssse3 sse3 . elif ${CPUTYPE} == "core2" || ${CPUTYPE} == "bonnell" MACHINE_CPU = ssse3 sse3 . elif ${CPUTYPE} == "nocona" MACHINE_CPU = sse3 . endif MACHINE_CPU += amd64 sse2 sse mmx ########## Mips . elif ${MACHINE_CPUARCH} == "mips" MACHINE_CPU = mips ########## powerpc . elif ${MACHINE_ARCH} == "powerpc" . if ${CPUTYPE} == "e500" MACHINE_CPU = booke softfp . endif ########## riscv . elif ${MACHINE_CPUARCH} == "riscv" MACHINE_CPU = riscv ########## sparc64 . elif ${MACHINE_ARCH} == "sparc64" . if ${CPUTYPE} == "v9" MACHINE_CPU = v9 . elif ${CPUTYPE} == "ultrasparc" MACHINE_CPU = v9 ultrasparc . elif ${CPUTYPE} == "ultrasparc3" MACHINE_CPU = v9 ultrasparc ultrasparc3 . endif . endif .endif .if ${MACHINE_CPUARCH} == "mips" CFLAGS += -G0 . if ${MACHINE_ARCH:Mmips*el*} != "" AFLAGS += -EL CFLAGS += -EL LDFLAGS += -EL . else AFLAGS += -EB CFLAGS += -EB LDFLAGS += -EB . endif . if ${MACHINE_ARCH:Mmips64*} != "" AFLAGS+= -mabi=64 CFLAGS+= -mabi=64 LDFLAGS+= -mabi=64 . elif ${MACHINE_ARCH:Mmipsn32*} != "" AFLAGS+= -mabi=n32 CFLAGS+= -mabi=n32 LDFLAGS+= -mabi=n32 . else AFLAGS+= -mabi=32 CFLAGS+= -mabi=32 LDFLAGS+= -mabi=32 . endif . if ${MACHINE_ARCH:Mmips*hf} CFLAGS += -mhard-float . else CFLAGS += -msoft-float . endif .endif ########## arm .if ${MACHINE_CPUARCH} == "arm" MACHINE_CPU += arm . if ${MACHINE_ARCH:Marmv6*} != "" MACHINE_CPU += armv6 . endif . if ${MACHINE_ARCH:Marmv7*} != "" MACHINE_CPU += armv7 . endif # armv6 and armv7 are a hybrid. It can use the softfp ABI, but doesn't emulate # floating point in the general case, so don't define softfp for it at this # time. arm is pure softfp, so define it for them. . if ${MACHINE_ARCH:Marmv[67]*} == "" MACHINE_CPU += softfp . endif # Normally armv6 and armv7 are hard float ABI from FreeBSD 11 onwards. However # when CPUTYPE has 'soft' in it, we use the soft-float ABI to allow building of # soft-float ABI libraries. In this case, we have to add the -mfloat-abi=softfp # to force that. .if ${MACHINE_ARCH:Marmv[67]*} && defined(CPUTYPE) && ${CPUTYPE:M*soft*} != "" # Needs to be CFLAGS not _CPUCFLAGS because it's needed for the ABI # not a nice optimization. CFLAGS += -mfloat-abi=softfp .endif .endif +.if ${MACHINE_ARCH} == "powerpc" || ${MACHINE_ARCH} == "powerpcspe" +LDFLAGS+= -Wl,--secure-plt +.endif + .if ${MACHINE_ARCH} == "powerpcspe" CFLAGS += -mcpu=8548 -Wa,-me500 -mspe=yes -mabi=spe -mfloat-gprs=double .endif .if ${MACHINE_CPUARCH} == "riscv" .if ${MACHINE_ARCH:Mriscv*sf} CFLAGS += -march=rv64imac -mabi=lp64 .else CFLAGS += -march=rv64imafdc -mabi=lp64d .endif .endif # NB: COPTFLAGS is handled in /usr/src/sys/conf/kern.pre.mk .if !defined(NO_CPU_CFLAGS) CFLAGS += ${_CPUCFLAGS} .endif # # Prohibit the compiler from emitting SIMD instructions. # These flags are added to CFLAGS in areas where the extra context-switch # cost outweighs the advantages of SIMD instructions. # # gcc: # Setting -mno-mmx implies -mno-3dnow # Setting -mno-sse implies -mno-sse2, -mno-sse3, -mno-ssse3 and -mfpmath=387 # # clang: # Setting -mno-mmx implies -mno-3dnow and -mno-3dnowa # Setting -mno-sse implies -mno-sse2, -mno-sse3, -mno-ssse3, -mno-sse41 and # -mno-sse42 # (-mfpmath= is not supported) # .if ${MACHINE_CPUARCH} == "i386" || ${MACHINE_CPUARCH} == "amd64" CFLAGS_NO_SIMD.clang= -mno-avx -mno-avx2 CFLAGS_NO_SIMD= -mno-mmx -mno-sse .endif CFLAGS_NO_SIMD += ${CFLAGS_NO_SIMD.${COMPILER_TYPE}} # Add in any architecture-specific CFLAGS. # These come from make.conf or the command line or the environment. CFLAGS += ${CFLAGS.${MACHINE_ARCH}} CXXFLAGS += ${CXXFLAGS.${MACHINE_ARCH}}