Index: stable/12/sys/conf/files.amd64 =================================================================== --- stable/12/sys/conf/files.amd64 (revision 346719) +++ stable/12/sys/conf/files.amd64 (revision 346720) @@ -1,759 +1,762 @@ # This file tells config what files go into building a kernel, # files marked standard are always included. # # $FreeBSD$ # # The long compile-with and dependency lines are required because of # limitations in config: backslash-newline doesn't work in strings, and # dependency lines other than the first are silently ignored. # # cloudabi32_vdso.o optional compat_cloudabi32 \ dependency "$S/contrib/cloudabi/cloudabi_vdso_i686_on_64bit.S" \ compile-with "${CC} -x assembler-with-cpp -m32 -shared -nostdinc -nostdlib -Wl,-T$S/compat/cloudabi/cloudabi_vdso.lds $S/contrib/cloudabi/cloudabi_vdso_i686_on_64bit.S -o ${.TARGET}" \ no-obj no-implicit-rule \ clean "cloudabi32_vdso.o" # cloudabi32_vdso_blob.o optional compat_cloudabi32 \ dependency "cloudabi32_vdso.o" \ compile-with "${OBJCOPY} --input-target binary --output-target elf64-x86-64-freebsd --binary-architecture i386 cloudabi32_vdso.o ${.TARGET}" \ no-implicit-rule \ clean "cloudabi32_vdso_blob.o" # cloudabi64_vdso.o optional compat_cloudabi64 \ dependency "$S/contrib/cloudabi/cloudabi_vdso_x86_64.S" \ compile-with "${CC} -x assembler-with-cpp -shared -nostdinc -nostdlib -Wl,-T$S/compat/cloudabi/cloudabi_vdso.lds $S/contrib/cloudabi/cloudabi_vdso_x86_64.S -o ${.TARGET}" \ no-obj no-implicit-rule \ clean "cloudabi64_vdso.o" # cloudabi64_vdso_blob.o optional compat_cloudabi64 \ dependency "cloudabi64_vdso.o" \ compile-with "${OBJCOPY} --input-target binary --output-target elf64-x86-64-freebsd --binary-architecture i386 cloudabi64_vdso.o ${.TARGET}" \ no-implicit-rule \ clean "cloudabi64_vdso_blob.o" # linux32_genassym.o optional compat_linux32 \ dependency "$S/amd64/linux32/linux32_genassym.c offset.inc" \ compile-with "${CC} ${CFLAGS:N-flto:N-fno-common} -c ${.IMPSRC}" \ no-obj no-implicit-rule \ clean "linux32_genassym.o" # linux32_assym.h optional compat_linux32 \ dependency "$S/kern/genassym.sh linux32_genassym.o" \ compile-with "sh $S/kern/genassym.sh linux32_genassym.o > ${.TARGET}" \ no-obj no-implicit-rule before-depend \ clean "linux32_assym.h" # linux32_locore.o optional compat_linux32 \ dependency "linux32_assym.h $S/amd64/linux32/linux32_locore.s" \ compile-with "${CC} -x assembler-with-cpp -DLOCORE -m32 -shared -s -pipe -I. -I$S -Werror -Wall -fPIC -fno-common -nostdinc -nostdlib -Wl,-T$S/amd64/linux32/linux32_vdso.lds.s -Wl,-soname=linux32_vdso.so,--eh-frame-hdr,-warn-common ${.IMPSRC} -o ${.TARGET}" \ no-obj no-implicit-rule \ clean "linux32_locore.o" # linux32_vdso.so optional compat_linux32 \ dependency "linux32_locore.o" \ compile-with "${OBJCOPY} --input-target binary --output-target elf64-x86-64-freebsd --binary-architecture i386 linux32_locore.o ${.TARGET}" \ no-implicit-rule \ clean "linux32_vdso.so" # ia32_genassym.o standard \ dependency "$S/compat/ia32/ia32_genassym.c offset.inc" \ compile-with "${CC} ${CFLAGS:N-flto:N-fno-common} -c ${.IMPSRC}" \ no-obj no-implicit-rule \ clean "ia32_genassym.o" # ia32_assym.h standard \ dependency "$S/kern/genassym.sh ia32_genassym.o" \ compile-with "env NM='${NM}' NMFLAGS='${NMFLAGS}' sh $S/kern/genassym.sh ia32_genassym.o > ${.TARGET}" \ no-obj no-implicit-rule before-depend \ clean "ia32_assym.h" # font.h optional sc_dflt_font \ compile-with "uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x16.fnt && file2c 'static u_char dflt_font_16[16*256] = {' '};' < ${SC_DFLT_FONT}-8x16 > font.h && uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x14.fnt && file2c 'static u_char dflt_font_14[14*256] = {' '};' < ${SC_DFLT_FONT}-8x14 >> font.h && uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x8.fnt && file2c 'static u_char dflt_font_8[8*256] = {' '};' < ${SC_DFLT_FONT}-8x8 >> font.h" \ no-obj no-implicit-rule before-depend \ clean "font.h ${SC_DFLT_FONT}-8x14 ${SC_DFLT_FONT}-8x16 ${SC_DFLT_FONT}-8x8" # atkbdmap.h optional atkbd_dflt_keymap \ compile-with "kbdcontrol -P ${S:S/sys$/share/}/vt/keymaps -P ${S:S/sys$/share/}/syscons/keymaps -L ${ATKBD_DFLT_KEYMAP} | sed -e 's/^static keymap_t.* = /static keymap_t key_map = /' -e 's/^static accentmap_t.* = /static accentmap_t accent_map = /' > atkbdmap.h" \ no-obj no-implicit-rule before-depend \ clean "atkbdmap.h" # ukbdmap.h optional ukbd_dflt_keymap \ compile-with "kbdcontrol -P ${S:S/sys$/share/}/vt/keymaps -P ${S:S/sys$/share/}/syscons/keymaps -L ${UKBD_DFLT_KEYMAP} | sed -e 's/^static keymap_t.* = /static keymap_t key_map = /' -e 's/^static accentmap_t.* = /static accentmap_t accent_map = /' > ukbdmap.h" \ no-obj no-implicit-rule before-depend \ clean "ukbdmap.h" # hpt27xx_lib.o optional hpt27xx \ dependency "$S/dev/hpt27xx/amd64-elf.hpt27xx_lib.o.uu" \ compile-with "uudecode < $S/dev/hpt27xx/amd64-elf.hpt27xx_lib.o.uu" \ no-implicit-rule # hptmvraid.o optional hptmv \ dependency "$S/dev/hptmv/amd64-elf.raid.o.uu" \ compile-with "uudecode < $S/dev/hptmv/amd64-elf.raid.o.uu" \ no-implicit-rule # hptnr_lib.o optional hptnr \ dependency "$S/dev/hptnr/amd64-elf.hptnr_lib.o.uu" \ compile-with "uudecode < $S/dev/hptnr/amd64-elf.hptnr_lib.o.uu" \ no-implicit-rule # hptrr_lib.o optional hptrr \ dependency "$S/dev/hptrr/amd64-elf.hptrr_lib.o.uu" \ compile-with "uudecode < $S/dev/hptrr/amd64-elf.hptrr_lib.o.uu" \ no-implicit-rule # amd64/acpica/acpi_machdep.c optional acpi acpi_wakecode.o optional acpi \ dependency "$S/amd64/acpica/acpi_wakecode.S assym.inc" \ compile-with "${NORMAL_S}" \ no-obj no-implicit-rule before-depend \ clean "acpi_wakecode.o" acpi_wakecode.bin optional acpi \ dependency "acpi_wakecode.o" \ compile-with "${OBJCOPY} -S -O binary acpi_wakecode.o ${.TARGET}" \ no-obj no-implicit-rule before-depend \ clean "acpi_wakecode.bin" acpi_wakecode.h optional acpi \ dependency "acpi_wakecode.bin" \ compile-with "file2c -sx 'static char wakecode[] = {' '};' < acpi_wakecode.bin > ${.TARGET}" \ no-obj no-implicit-rule before-depend \ clean "acpi_wakecode.h" acpi_wakedata.h optional acpi \ dependency "acpi_wakecode.o" \ compile-with '${NM} -n --defined-only acpi_wakecode.o | while read offset dummy what; do echo "#define $${what} 0x$${offset}"; done > ${.TARGET}' \ no-obj no-implicit-rule before-depend \ clean "acpi_wakedata.h" # #amd64/amd64/apic_vector.S standard amd64/amd64/bios.c standard amd64/amd64/bpf_jit_machdep.c optional bpf_jitter amd64/amd64/copyout.c standard amd64/amd64/cpu_switch.S standard amd64/amd64/db_disasm.c optional ddb amd64/amd64/db_interface.c optional ddb amd64/amd64/db_trace.c optional ddb amd64/amd64/efirt_machdep.c optional efirt amd64/amd64/efirt_support.S optional efirt amd64/amd64/elf_machdep.c standard amd64/amd64/exception.S standard amd64/amd64/fpu.c standard amd64/amd64/gdb_machdep.c optional gdb amd64/amd64/in_cksum.c optional inet | inet6 amd64/amd64/initcpu.c standard amd64/amd64/io.c optional io amd64/amd64/locore.S standard no-obj amd64/amd64/xen-locore.S optional xenhvm amd64/amd64/machdep.c standard amd64/amd64/mem.c optional mem amd64/amd64/minidump_machdep.c standard amd64/amd64/mp_machdep.c optional smp amd64/amd64/mpboot.S optional smp amd64/amd64/pmap.c standard amd64/amd64/prof_machdep.c optional profiling-routine amd64/amd64/ptrace_machdep.c standard amd64/amd64/sigtramp.S standard amd64/amd64/support.S standard amd64/amd64/sys_machdep.c standard amd64/amd64/trap.c standard amd64/amd64/uio_machdep.c standard amd64/amd64/uma_machdep.c standard amd64/amd64/vm_machdep.c standard amd64/cloudabi32/cloudabi32_sysvec.c optional compat_cloudabi32 amd64/cloudabi64/cloudabi64_sysvec.c optional compat_cloudabi64 amd64/pci/pci_cfgreg.c optional pci cddl/contrib/opensolaris/common/atomic/amd64/opensolaris_atomic.S optional zfs | dtrace compile-with "${ZFS_S}" cddl/dev/dtrace/amd64/dtrace_asm.S optional dtrace compile-with "${DTRACE_S}" cddl/dev/dtrace/amd64/dtrace_subr.c optional dtrace compile-with "${DTRACE_C}" cddl/dev/fbt/x86/fbt_isa.c optional dtrace_fbt | dtraceall compile-with "${FBT_C}" cddl/dev/dtrace/x86/dis_tables.c optional dtrace_fbt | dtraceall compile-with "${DTRACE_C}" cddl/dev/dtrace/x86/instr_size.c optional dtrace_fbt | dtraceall compile-with "${DTRACE_C}" crypto/aesni/aeskeys_amd64.S optional aesni crypto/aesni/aesni.c optional aesni aesni_ghash.o optional aesni \ dependency "$S/crypto/aesni/aesni_ghash.c" \ compile-with "${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc} ${WERROR} ${NO_WCAST_QUAL} ${PROF} -mmmx -msse -msse4 -maes -mpclmul ${.IMPSRC}" \ no-implicit-rule \ clean "aesni_ghash.o" aesni_wrap.o optional aesni \ dependency "$S/crypto/aesni/aesni_wrap.c" \ compile-with "${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc} ${WERROR} ${NO_WCAST_QUAL} ${PROF} -mmmx -msse -msse4 -maes ${.IMPSRC}" \ no-implicit-rule \ clean "aesni_wrap.o" crypto/blowfish/bf_enc.c optional crypto | ipsec | ipsec_support crypto/des/des_enc.c optional crypto | ipsec | \ ipsec_support | netsmb intel_sha1.o optional aesni \ dependency "$S/crypto/aesni/intel_sha1.c" \ compile-with "${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc} ${WERROR} ${PROF} -mmmx -msse -msse4 -msha ${.IMPSRC}" \ no-implicit-rule \ clean "intel_sha1.o" intel_sha256.o optional aesni \ dependency "$S/crypto/aesni/intel_sha256.c" \ compile-with "${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc} ${WERROR} ${PROF} -mmmx -msse -msse4 -msha ${.IMPSRC}" \ no-implicit-rule \ clean "intel_sha256.o" crypto/via/padlock.c optional padlock crypto/via/padlock_cipher.c optional padlock crypto/via/padlock_hash.c optional padlock dev/acpica/acpi_if.m standard dev/acpica/acpi_hpet.c optional acpi dev/acpica/acpi_pci.c optional acpi pci dev/acpica/acpi_pci_link.c optional acpi pci dev/acpica/acpi_pcib.c optional acpi pci dev/acpica/acpi_pcib_acpi.c optional acpi pci dev/acpica/acpi_pcib_pci.c optional acpi pci dev/acpica/acpi_timer.c optional acpi dev/acpi_support/acpi_wmi_if.m standard dev/agp/agp_amd64.c optional agp dev/agp/agp_i810.c optional agp dev/agp/agp_via.c optional agp dev/amdgpio/amdgpio.c optional amdgpio dev/amdsbwd/amdsbwd.c optional amdsbwd dev/amdsmn/amdsmn.c optional amdsmn | amdtemp dev/amdtemp/amdtemp.c optional amdtemp dev/arcmsr/arcmsr.c optional arcmsr pci dev/asmc/asmc.c optional asmc isa dev/atkbdc/atkbd.c optional atkbd atkbdc dev/atkbdc/atkbd_atkbdc.c optional atkbd atkbdc dev/atkbdc/atkbdc.c optional atkbdc dev/atkbdc/atkbdc_isa.c optional atkbdc isa dev/atkbdc/atkbdc_subr.c optional atkbdc dev/atkbdc/psm.c optional psm atkbdc dev/bxe/bxe.c optional bxe pci dev/bxe/bxe_stats.c optional bxe pci dev/bxe/bxe_debug.c optional bxe pci dev/bxe/ecore_sp.c optional bxe pci dev/bxe/bxe_elink.c optional bxe pci dev/bxe/57710_init_values.c optional bxe pci dev/bxe/57711_init_values.c optional bxe pci dev/bxe/57712_init_values.c optional bxe pci dev/coretemp/coretemp.c optional coretemp dev/cpuctl/cpuctl.c optional cpuctl dev/dpms/dpms.c optional dpms # There are no systems with isa slots, so all ed isa entries should go.. dev/ed/if_ed_3c503.c optional ed isa ed_3c503 dev/ed/if_ed_isa.c optional ed isa dev/ed/if_ed_wd80x3.c optional ed isa dev/ed/if_ed_hpp.c optional ed isa ed_hpp dev/ed/if_ed_sic.c optional ed isa ed_sic dev/fb/fb.c optional fb | vga dev/fb/s3_pci.c optional s3pci dev/fb/vesa.c optional vga vesa dev/fb/vga.c optional vga dev/ichwd/ichwd.c optional ichwd dev/if_ndis/if_ndis.c optional ndis dev/if_ndis/if_ndis_pccard.c optional ndis pccard dev/if_ndis/if_ndis_pci.c optional ndis cardbus | ndis pci dev/if_ndis/if_ndis_usb.c optional ndis usb dev/imcsmb/imcsmb.c optional imcsmb dev/imcsmb/imcsmb_pci.c optional imcsmb pci dev/intel/spi.c optional intelspi dev/io/iodev.c optional io dev/ioat/ioat.c optional ioat pci dev/ioat/ioat_test.c optional ioat pci dev/ipmi/ipmi.c optional ipmi dev/ipmi/ipmi_acpi.c optional ipmi acpi dev/ipmi/ipmi_isa.c optional ipmi isa dev/ipmi/ipmi_kcs.c optional ipmi dev/ipmi/ipmi_smic.c optional ipmi dev/ipmi/ipmi_smbus.c optional ipmi smbus dev/ipmi/ipmi_smbios.c optional ipmi dev/ipmi/ipmi_ssif.c optional ipmi smbus dev/ipmi/ipmi_pci.c optional ipmi pci dev/ipmi/ipmi_linux.c optional ipmi compat_linux32 dev/ixl/if_ixl.c optional ixl pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/ixl_pf_main.c optional ixl pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/ixl_pf_qmgr.c optional ixl pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/ixl_pf_iov.c optional ixl pci pci_iov \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/ixl_pf_i2c.c optional ixl pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/if_iavf.c optional iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/iavf_vc.c optional iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/ixl_txrx.c optional ixl pci | iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/i40e_osdep.c optional ixl pci | iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/i40e_lan_hmc.c optional ixl pci | iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/i40e_hmc.c optional ixl pci | iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/i40e_common.c optional ixl pci | iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/i40e_nvm.c optional ixl pci | iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/i40e_adminq.c optional ixl pci | iavf pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/ixl/i40e_dcb.c optional ixl pci \ compile-with "${NORMAL_C} -I$S/dev/ixl" dev/fdc/fdc.c optional fdc dev/fdc/fdc_acpi.c optional fdc dev/fdc/fdc_isa.c optional fdc isa dev/fdc/fdc_pccard.c optional fdc pccard dev/gpio/bytgpio.c optional bytgpio dev/gpio/chvgpio.c optional chvgpio dev/hpt27xx/hpt27xx_os_bsd.c optional hpt27xx dev/hpt27xx/hpt27xx_osm_bsd.c optional hpt27xx dev/hpt27xx/hpt27xx_config.c optional hpt27xx dev/hptmv/entry.c optional hptmv dev/hptmv/mv.c optional hptmv dev/hptmv/gui_lib.c optional hptmv dev/hptmv/hptproc.c optional hptmv dev/hptmv/ioctl.c optional hptmv dev/hptnr/hptnr_os_bsd.c optional hptnr dev/hptnr/hptnr_osm_bsd.c optional hptnr dev/hptnr/hptnr_config.c optional hptnr dev/hptrr/hptrr_os_bsd.c optional hptrr dev/hptrr/hptrr_osm_bsd.c optional hptrr dev/hptrr/hptrr_config.c optional hptrr dev/hwpmc/hwpmc_amd.c optional hwpmc dev/hwpmc/hwpmc_intel.c optional hwpmc dev/hwpmc/hwpmc_core.c optional hwpmc dev/hwpmc/hwpmc_uncore.c optional hwpmc dev/hwpmc/hwpmc_tsc.c optional hwpmc dev/hwpmc/hwpmc_x86.c optional hwpmc dev/hyperv/input/hv_kbd.c optional hyperv dev/hyperv/input/hv_kbdc.c optional hyperv dev/hyperv/pcib/vmbus_pcib.c optional hyperv pci dev/hyperv/netvsc/hn_nvs.c optional hyperv dev/hyperv/netvsc/hn_rndis.c optional hyperv dev/hyperv/netvsc/if_hn.c optional hyperv dev/hyperv/storvsc/hv_storvsc_drv_freebsd.c optional hyperv dev/hyperv/utilities/hv_kvp.c optional hyperv dev/hyperv/utilities/hv_snapshot.c optional hyperv dev/hyperv/utilities/vmbus_heartbeat.c optional hyperv dev/hyperv/utilities/vmbus_ic.c optional hyperv dev/hyperv/utilities/vmbus_shutdown.c optional hyperv dev/hyperv/utilities/vmbus_timesync.c optional hyperv dev/hyperv/vmbus/hyperv.c optional hyperv dev/hyperv/vmbus/hyperv_busdma.c optional hyperv dev/hyperv/vmbus/vmbus.c optional hyperv pci dev/hyperv/vmbus/vmbus_br.c optional hyperv dev/hyperv/vmbus/vmbus_chan.c optional hyperv dev/hyperv/vmbus/vmbus_et.c optional hyperv dev/hyperv/vmbus/vmbus_if.m optional hyperv dev/hyperv/vmbus/vmbus_res.c optional hyperv dev/hyperv/vmbus/vmbus_xact.c optional hyperv dev/hyperv/vmbus/amd64/hyperv_machdep.c optional hyperv dev/hyperv/vmbus/amd64/vmbus_vector.S optional hyperv dev/nctgpio/nctgpio.c optional nctgpio dev/nfe/if_nfe.c optional nfe pci dev/ntb/if_ntb/if_ntb.c optional if_ntb dev/ntb/ntb_transport.c optional ntb_transport | if_ntb dev/ntb/ntb.c optional ntb | ntb_transport | if_ntb | ntb_hw_intel | ntb_hw_plx | ntb_hw dev/ntb/ntb_if.m optional ntb | ntb_transport | if_ntb | ntb_hw_intel | ntb_hw_plx | ntb_hw dev/ntb/ntb_hw/ntb_hw_intel.c optional ntb_hw_intel | ntb_hw dev/ntb/ntb_hw/ntb_hw_plx.c optional ntb_hw_plx | ntb_hw dev/nvd/nvd.c optional nvd nvme dev/nvme/nvme.c optional nvme dev/nvme/nvme_ctrlr.c optional nvme dev/nvme/nvme_ctrlr_cmd.c optional nvme dev/nvme/nvme_ns.c optional nvme dev/nvme/nvme_ns_cmd.c optional nvme dev/nvme/nvme_qpair.c optional nvme dev/nvme/nvme_sim.c optional nvme scbus dev/nvme/nvme_sysctl.c optional nvme dev/nvme/nvme_test.c optional nvme dev/nvme/nvme_util.c optional nvme dev/nvram/nvram.c optional nvram isa dev/random/ivy.c optional rdrand_rng dev/random/nehemiah.c optional padlock_rng dev/qlxge/qls_dbg.c optional qlxge pci dev/qlxge/qls_dump.c optional qlxge pci dev/qlxge/qls_hw.c optional qlxge pci dev/qlxge/qls_ioctl.c optional qlxge pci dev/qlxge/qls_isr.c optional qlxge pci dev/qlxge/qls_os.c optional qlxge pci dev/qlxgb/qla_dbg.c optional qlxgb pci dev/qlxgb/qla_hw.c optional qlxgb pci dev/qlxgb/qla_ioctl.c optional qlxgb pci dev/qlxgb/qla_isr.c optional qlxgb pci dev/qlxgb/qla_misc.c optional qlxgb pci dev/qlxgb/qla_os.c optional qlxgb pci dev/qlxgbe/ql_dbg.c optional qlxgbe pci dev/qlxgbe/ql_hw.c optional qlxgbe pci dev/qlxgbe/ql_ioctl.c optional qlxgbe pci dev/qlxgbe/ql_isr.c optional qlxgbe pci dev/qlxgbe/ql_misc.c optional qlxgbe pci dev/qlxgbe/ql_os.c optional qlxgbe pci dev/qlxgbe/ql_reset.c optional qlxgbe pci dev/qlnx/qlnxe/ecore_cxt.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_dcbx.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_dev.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_hw.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_init_fw_funcs.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_init_ops.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_int.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_l2.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_mcp.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_sp_commands.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/ecore_spq.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/qlnx_ioctl.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/qlnx/qlnxe/qlnx_os.c optional qlnxe pci \ compile-with "${LINUXKPI_C}" dev/sfxge/common/ef10_ev.c optional sfxge pci dev/sfxge/common/ef10_filter.c optional sfxge pci dev/sfxge/common/ef10_intr.c optional sfxge pci dev/sfxge/common/ef10_mac.c optional sfxge pci dev/sfxge/common/ef10_mcdi.c optional sfxge pci dev/sfxge/common/ef10_nic.c optional sfxge pci dev/sfxge/common/ef10_nvram.c optional sfxge pci dev/sfxge/common/ef10_phy.c optional sfxge pci dev/sfxge/common/ef10_rx.c optional sfxge pci dev/sfxge/common/ef10_tx.c optional sfxge pci dev/sfxge/common/ef10_vpd.c optional sfxge pci dev/sfxge/common/efx_bootcfg.c optional sfxge pci dev/sfxge/common/efx_crc32.c optional sfxge pci dev/sfxge/common/efx_ev.c optional sfxge pci dev/sfxge/common/efx_filter.c optional sfxge pci dev/sfxge/common/efx_hash.c optional sfxge pci dev/sfxge/common/efx_intr.c optional sfxge pci dev/sfxge/common/efx_lic.c optional sfxge pci dev/sfxge/common/efx_mac.c optional sfxge pci dev/sfxge/common/efx_mcdi.c optional sfxge pci dev/sfxge/common/efx_mon.c optional sfxge pci dev/sfxge/common/efx_nic.c optional sfxge pci dev/sfxge/common/efx_nvram.c optional sfxge pci dev/sfxge/common/efx_phy.c optional sfxge pci dev/sfxge/common/efx_port.c optional sfxge pci dev/sfxge/common/efx_rx.c optional sfxge pci dev/sfxge/common/efx_sram.c optional sfxge pci dev/sfxge/common/efx_tx.c optional sfxge pci dev/sfxge/common/efx_vpd.c optional sfxge pci dev/sfxge/common/hunt_nic.c optional sfxge pci dev/sfxge/common/mcdi_mon.c optional sfxge pci dev/sfxge/common/medford_nic.c optional sfxge pci dev/sfxge/common/siena_mac.c optional sfxge pci dev/sfxge/common/siena_mcdi.c optional sfxge pci dev/sfxge/common/siena_nic.c optional sfxge pci dev/sfxge/common/siena_nvram.c optional sfxge pci dev/sfxge/common/siena_phy.c optional sfxge pci dev/sfxge/common/siena_sram.c optional sfxge pci dev/sfxge/common/siena_vpd.c optional sfxge pci dev/sfxge/sfxge.c optional sfxge pci dev/sfxge/sfxge_dma.c optional sfxge pci dev/sfxge/sfxge_ev.c optional sfxge pci dev/sfxge/sfxge_intr.c optional sfxge pci dev/sfxge/sfxge_mcdi.c optional sfxge pci dev/sfxge/sfxge_nvram.c optional sfxge pci dev/sfxge/sfxge_port.c optional sfxge pci dev/sfxge/sfxge_rx.c optional sfxge pci dev/sfxge/sfxge_tx.c optional sfxge pci dev/sio/sio.c optional sio dev/sio/sio_isa.c optional sio isa dev/sio/sio_pccard.c optional sio pccard dev/sio/sio_pci.c optional sio pci dev/sio/sio_puc.c optional sio puc dev/smartpqi/smartpqi_cam.c optional smartpqi dev/smartpqi/smartpqi_cmd.c optional smartpqi dev/smartpqi/smartpqi_discovery.c optional smartpqi dev/smartpqi/smartpqi_event.c optional smartpqi dev/smartpqi/smartpqi_helper.c optional smartpqi dev/smartpqi/smartpqi_init.c optional smartpqi dev/smartpqi/smartpqi_intr.c optional smartpqi dev/smartpqi/smartpqi_ioctl.c optional smartpqi dev/smartpqi/smartpqi_main.c optional smartpqi dev/smartpqi/smartpqi_mem.c optional smartpqi dev/smartpqi/smartpqi_misc.c optional smartpqi dev/smartpqi/smartpqi_queue.c optional smartpqi dev/smartpqi/smartpqi_request.c optional smartpqi dev/smartpqi/smartpqi_response.c optional smartpqi dev/smartpqi/smartpqi_sis.c optional smartpqi dev/smartpqi/smartpqi_tag.c optional smartpqi dev/speaker/spkr.c optional speaker dev/syscons/apm/apm_saver.c optional apm_saver apm dev/syscons/scterm-teken.c optional sc dev/syscons/scvesactl.c optional sc vga vesa dev/syscons/scvgarndr.c optional sc vga dev/syscons/scvtb.c optional sc dev/tpm/tpm.c optional tpm +dev/tpm/tpm20.c optional tpm +dev/tpm/tpm_crb.c optional tpm acpi +dev/tpm/tpm_tis.c optional tpm acpi dev/tpm/tpm_acpi.c optional tpm acpi dev/tpm/tpm_isa.c optional tpm isa dev/uart/uart_cpu_x86.c optional uart dev/viawd/viawd.c optional viawd dev/vmware/vmxnet3/if_vmx.c optional vmx dev/vmware/vmci/vmci.c optional vmci dev/vmware/vmci/vmci_datagram.c optional vmci dev/vmware/vmci/vmci_doorbell.c optional vmci dev/vmware/vmci/vmci_driver.c optional vmci dev/vmware/vmci/vmci_event.c optional vmci dev/vmware/vmci/vmci_hashtable.c optional vmci dev/vmware/vmci/vmci_kernel_if.c optional vmci dev/vmware/vmci/vmci_qpair.c optional vmci dev/vmware/vmci/vmci_queue_pair.c optional vmci dev/vmware/vmci/vmci_resource.c optional vmci dev/wbwd/wbwd.c optional wbwd dev/xen/pci/xen_acpi_pci.c optional xenhvm dev/xen/pci/xen_pci.c optional xenhvm dev/isci/isci.c optional isci dev/isci/isci_controller.c optional isci dev/isci/isci_domain.c optional isci dev/isci/isci_interrupt.c optional isci dev/isci/isci_io_request.c optional isci dev/isci/isci_logger.c optional isci dev/isci/isci_oem_parameters.c optional isci dev/isci/isci_remote_device.c optional isci dev/isci/isci_sysctl.c optional isci dev/isci/isci_task_request.c optional isci dev/isci/isci_timer.c optional isci dev/isci/scil/sati.c optional isci dev/isci/scil/sati_abort_task_set.c optional isci dev/isci/scil/sati_atapi.c optional isci dev/isci/scil/sati_device.c optional isci dev/isci/scil/sati_inquiry.c optional isci dev/isci/scil/sati_log_sense.c optional isci dev/isci/scil/sati_lun_reset.c optional isci dev/isci/scil/sati_mode_pages.c optional isci dev/isci/scil/sati_mode_select.c optional isci dev/isci/scil/sati_mode_sense.c optional isci dev/isci/scil/sati_mode_sense_10.c optional isci dev/isci/scil/sati_mode_sense_6.c optional isci dev/isci/scil/sati_move.c optional isci dev/isci/scil/sati_passthrough.c optional isci dev/isci/scil/sati_read.c optional isci dev/isci/scil/sati_read_buffer.c optional isci dev/isci/scil/sati_read_capacity.c optional isci dev/isci/scil/sati_reassign_blocks.c optional isci dev/isci/scil/sati_report_luns.c optional isci dev/isci/scil/sati_request_sense.c optional isci dev/isci/scil/sati_start_stop_unit.c optional isci dev/isci/scil/sati_synchronize_cache.c optional isci dev/isci/scil/sati_test_unit_ready.c optional isci dev/isci/scil/sati_unmap.c optional isci dev/isci/scil/sati_util.c optional isci dev/isci/scil/sati_verify.c optional isci dev/isci/scil/sati_write.c optional isci dev/isci/scil/sati_write_and_verify.c optional isci dev/isci/scil/sati_write_buffer.c optional isci dev/isci/scil/sati_write_long.c optional isci dev/isci/scil/sci_abstract_list.c optional isci dev/isci/scil/sci_base_controller.c optional isci dev/isci/scil/sci_base_domain.c optional isci dev/isci/scil/sci_base_iterator.c optional isci dev/isci/scil/sci_base_library.c optional isci dev/isci/scil/sci_base_logger.c optional isci dev/isci/scil/sci_base_memory_descriptor_list.c optional isci dev/isci/scil/sci_base_memory_descriptor_list_decorator.c optional isci dev/isci/scil/sci_base_object.c optional isci dev/isci/scil/sci_base_observer.c optional isci dev/isci/scil/sci_base_phy.c optional isci dev/isci/scil/sci_base_port.c optional isci dev/isci/scil/sci_base_remote_device.c optional isci dev/isci/scil/sci_base_request.c optional isci dev/isci/scil/sci_base_state_machine.c optional isci dev/isci/scil/sci_base_state_machine_logger.c optional isci dev/isci/scil/sci_base_state_machine_observer.c optional isci dev/isci/scil/sci_base_subject.c optional isci dev/isci/scil/sci_util.c optional isci dev/isci/scil/scic_sds_controller.c optional isci dev/isci/scil/scic_sds_library.c optional isci dev/isci/scil/scic_sds_pci.c optional isci dev/isci/scil/scic_sds_phy.c optional isci dev/isci/scil/scic_sds_port.c optional isci dev/isci/scil/scic_sds_port_configuration_agent.c optional isci dev/isci/scil/scic_sds_remote_device.c optional isci dev/isci/scil/scic_sds_remote_node_context.c optional isci dev/isci/scil/scic_sds_remote_node_table.c optional isci dev/isci/scil/scic_sds_request.c optional isci dev/isci/scil/scic_sds_sgpio.c optional isci dev/isci/scil/scic_sds_smp_remote_device.c optional isci dev/isci/scil/scic_sds_smp_request.c optional isci dev/isci/scil/scic_sds_ssp_request.c optional isci dev/isci/scil/scic_sds_stp_packet_request.c optional isci dev/isci/scil/scic_sds_stp_remote_device.c optional isci dev/isci/scil/scic_sds_stp_request.c optional isci dev/isci/scil/scic_sds_unsolicited_frame_control.c optional isci dev/isci/scil/scif_sas_controller.c optional isci dev/isci/scil/scif_sas_controller_state_handlers.c optional isci dev/isci/scil/scif_sas_controller_states.c optional isci dev/isci/scil/scif_sas_domain.c optional isci dev/isci/scil/scif_sas_domain_state_handlers.c optional isci dev/isci/scil/scif_sas_domain_states.c optional isci dev/isci/scil/scif_sas_high_priority_request_queue.c optional isci dev/isci/scil/scif_sas_internal_io_request.c optional isci dev/isci/scil/scif_sas_io_request.c optional isci dev/isci/scil/scif_sas_io_request_state_handlers.c optional isci dev/isci/scil/scif_sas_io_request_states.c optional isci dev/isci/scil/scif_sas_library.c optional isci dev/isci/scil/scif_sas_remote_device.c optional isci dev/isci/scil/scif_sas_remote_device_ready_substate_handlers.c optional isci dev/isci/scil/scif_sas_remote_device_ready_substates.c optional isci dev/isci/scil/scif_sas_remote_device_starting_substate_handlers.c optional isci dev/isci/scil/scif_sas_remote_device_starting_substates.c optional isci dev/isci/scil/scif_sas_remote_device_state_handlers.c optional isci dev/isci/scil/scif_sas_remote_device_states.c optional isci dev/isci/scil/scif_sas_request.c optional isci dev/isci/scil/scif_sas_smp_activity_clear_affiliation.c optional isci dev/isci/scil/scif_sas_smp_io_request.c optional isci dev/isci/scil/scif_sas_smp_phy.c optional isci dev/isci/scil/scif_sas_smp_remote_device.c optional isci dev/isci/scil/scif_sas_stp_io_request.c optional isci dev/isci/scil/scif_sas_stp_remote_device.c optional isci dev/isci/scil/scif_sas_stp_task_request.c optional isci dev/isci/scil/scif_sas_task_request.c optional isci dev/isci/scil/scif_sas_task_request_state_handlers.c optional isci dev/isci/scil/scif_sas_task_request_states.c optional isci dev/isci/scil/scif_sas_timer.c optional isci isa/syscons_isa.c optional sc isa/vga_isa.c optional vga kern/kern_clocksource.c standard kern/imgact_aout.c optional compat_aout kern/imgact_gzip.c optional gzip kern/link_elf_obj.c standard libkern/x86/crc32_sse42.c standard # # IA32 binary support # #amd64/ia32/ia32_exception.S optional compat_freebsd32 amd64/ia32/ia32_reg.c optional compat_freebsd32 amd64/ia32/ia32_signal.c optional compat_freebsd32 amd64/ia32/ia32_sigtramp.S optional compat_freebsd32 amd64/ia32/ia32_syscall.c optional compat_freebsd32 amd64/ia32/ia32_misc.c optional compat_freebsd32 compat/ia32/ia32_sysvec.c optional compat_freebsd32 compat/linprocfs/linprocfs.c optional linprocfs compat/linsysfs/linsysfs.c optional linsysfs # # Linux/i386 binary support # amd64/linux32/linux32_dummy.c optional compat_linux32 amd64/linux32/linux32_machdep.c optional compat_linux32 amd64/linux32/linux32_support.s optional compat_linux32 \ dependency "linux32_assym.h" amd64/linux32/linux32_sysent.c optional compat_linux32 amd64/linux32/linux32_sysvec.c optional compat_linux32 compat/linux/linux_emul.c optional compat_linux32 compat/linux/linux_errno.c optional compat_linux32 compat/linux/linux_file.c optional compat_linux32 compat/linux/linux_fork.c optional compat_linux32 compat/linux/linux_futex.c optional compat_linux32 compat/linux/linux_getcwd.c optional compat_linux32 compat/linux/linux_ioctl.c optional compat_linux32 compat/linux/linux_ipc.c optional compat_linux32 compat/linux/linux_mib.c optional compat_linux32 compat/linux/linux_misc.c optional compat_linux32 compat/linux/linux_mmap.c optional compat_linux32 compat/linux/linux_signal.c optional compat_linux32 compat/linux/linux_socket.c optional compat_linux32 compat/linux/linux_stats.c optional compat_linux32 compat/linux/linux_sysctl.c optional compat_linux32 compat/linux/linux_time.c optional compat_linux32 compat/linux/linux_timer.c optional compat_linux32 compat/linux/linux_uid16.c optional compat_linux32 compat/linux/linux_util.c optional compat_linux32 compat/linux/linux_vdso.c optional compat_linux32 compat/linux/linux_common.c optional compat_linux32 compat/linux/linux_event.c optional compat_linux32 compat/linux/linux.c optional compat_linux32 dev/amr/amr_linux.c optional compat_linux32 amr dev/mfi/mfi_linux.c optional compat_linux32 mfi # # Windows NDIS driver support # compat/ndis/kern_ndis.c optional ndisapi pci compat/ndis/kern_windrv.c optional ndisapi pci compat/ndis/subr_hal.c optional ndisapi pci compat/ndis/subr_ndis.c optional ndisapi pci compat/ndis/subr_ntoskrnl.c optional ndisapi pci compat/ndis/subr_pe.c optional ndisapi pci compat/ndis/subr_usbd.c optional ndisapi pci compat/ndis/winx64_wrap.S optional ndisapi pci # # x86 real mode BIOS emulator, required by dpms/pci/vesa # compat/x86bios/x86bios.c optional x86bios | dpms | pci | vesa contrib/x86emu/x86emu.c optional x86bios | dpms | pci | vesa # # bvm console # dev/bvm/bvm_console.c optional bvmconsole dev/bvm/bvm_dbg.c optional bvmdebug # # x86 shared code between IA32 and AMD64 architectures # x86/acpica/OsdEnvironment.c optional acpi x86/acpica/acpi_apm.c optional acpi x86/acpica/acpi_wakeup.c optional acpi x86/acpica/madt.c optional acpi x86/acpica/srat.c optional acpi x86/bios/smbios.c optional smbios x86/bios/vpd.c optional vpd x86/cpufreq/powernow.c optional cpufreq x86/cpufreq/est.c optional cpufreq x86/cpufreq/hwpstate.c optional cpufreq x86/cpufreq/p4tcc.c optional cpufreq x86/iommu/busdma_dmar.c optional acpi acpi_dmar pci x86/iommu/intel_ctx.c optional acpi acpi_dmar pci x86/iommu/intel_drv.c optional acpi acpi_dmar pci x86/iommu/intel_fault.c optional acpi acpi_dmar pci x86/iommu/intel_gas.c optional acpi acpi_dmar pci x86/iommu/intel_idpgtbl.c optional acpi acpi_dmar pci x86/iommu/intel_intrmap.c optional acpi acpi_dmar pci x86/iommu/intel_qi.c optional acpi acpi_dmar pci x86/iommu/intel_quirks.c optional acpi acpi_dmar pci x86/iommu/intel_utils.c optional acpi acpi_dmar pci x86/isa/atpic.c optional atpic isa x86/isa/atrtc.c standard x86/isa/clock.c standard x86/isa/elcr.c optional atpic isa | mptable x86/isa/isa.c standard x86/isa/isa_dma.c standard x86/isa/nmi.c standard x86/isa/orm.c optional isa x86/pci/pci_bus.c optional pci x86/pci/pci_early_quirks.c optional pci x86/pci/qpi.c optional pci x86/x86/autoconf.c standard x86/x86/bus_machdep.c standard x86/x86/busdma_bounce.c standard x86/x86/busdma_machdep.c standard x86/x86/cpu_machdep.c standard x86/x86/dump_machdep.c standard x86/x86/fdt_machdep.c optional fdt x86/x86/identcpu.c standard x86/x86/intr_machdep.c standard x86/x86/io_apic.c standard x86/x86/legacy.c standard x86/x86/local_apic.c standard x86/x86/mca.c standard x86/x86/x86_mem.c optional mem x86/x86/mptable.c optional mptable x86/x86/mptable_pci.c optional mptable pci x86/x86/mp_x86.c optional smp x86/x86/mp_watchdog.c optional mp_watchdog smp x86/x86/msi.c optional pci x86/x86/nexus.c standard x86/x86/pvclock.c standard x86/x86/stack_machdep.c optional ddb | stack x86/x86/tsc.c standard x86/x86/ucode.c standard x86/x86/delay.c standard x86/xen/hvm.c optional xenhvm x86/xen/xen_intr.c optional xenhvm x86/xen/pv.c optional xenhvm x86/xen/pvcpu_enum.c optional xenhvm x86/xen/xen_apic.c optional xenhvm x86/xen/xenpv.c optional xenhvm x86/xen/xen_nexus.c optional xenhvm x86/xen/xen_msi.c optional xenhvm x86/xen/xen_pci_bus.c optional xenhvm Index: stable/12/sys/dev/tpm/tpm20.c =================================================================== --- stable/12/sys/dev/tpm/tpm20.c (nonexistent) +++ stable/12/sys/dev/tpm/tpm20.c (revision 346720) @@ -0,0 +1,276 @@ +/*- + * Copyright (c) 2018 Stormshield. + * Copyright (c) 2018 Semihalf. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "tpm20.h" + +MALLOC_DECLARE(M_TPM20); +MALLOC_DEFINE(M_TPM20, "tpm_buffer", "buffer for tpm 2.0 driver"); + +static void tpm20_discard_buffer(void *arg); +static int tpm20_save_state(device_t dev, bool suspend); + +static d_open_t tpm20_open; +static d_close_t tpm20_close; +static d_read_t tpm20_read; +static d_write_t tpm20_write; +static d_ioctl_t tpm20_ioctl; + +static struct cdevsw tpm20_cdevsw = { + .d_version = D_VERSION, + .d_open = tpm20_open, + .d_close = tpm20_close, + .d_read = tpm20_read, + .d_write = tpm20_write, + .d_ioctl = tpm20_ioctl, + .d_name = "tpm20", +}; + +int +tpm20_read(struct cdev *dev, struct uio *uio, int flags) +{ + struct tpm_sc *sc; + size_t bytes_to_transfer; + int result = 0; + + sc = (struct tpm_sc *)dev->si_drv1; + + callout_stop(&sc->discard_buffer_callout); + sx_xlock(&sc->dev_lock); + + bytes_to_transfer = MIN(sc->pending_data_length, uio->uio_resid); + if (bytes_to_transfer > 0) { + result = uiomove((caddr_t) sc->buf, bytes_to_transfer, uio); + memset(sc->buf, 0, TPM_BUFSIZE); + sc->pending_data_length = 0; + cv_signal(&sc->buf_cv); + } else { + result = ETIMEDOUT; + } + + sx_xunlock(&sc->dev_lock); + + return (result); +} + +int +tpm20_write(struct cdev *dev, struct uio *uio, int flags) +{ + struct tpm_sc *sc; + size_t byte_count; + int result = 0; + + sc = (struct tpm_sc *)dev->si_drv1; + + byte_count = uio->uio_resid; + if (byte_count < TPM_HEADER_SIZE) { + device_printf(sc->dev, + "Requested transfer is too small\n"); + return (EINVAL); + } + + if (byte_count > TPM_BUFSIZE) { + device_printf(sc->dev, + "Requested transfer is too large\n"); + return (E2BIG); + } + + sx_xlock(&sc->dev_lock); + + while (sc->pending_data_length != 0) + cv_wait(&sc->buf_cv, &sc->dev_lock); + + result = uiomove(sc->buf, byte_count, uio); + if (result != 0) { + sx_xunlock(&sc->dev_lock); + return (result); + } + + result = sc->transmit(sc, byte_count); + + if (result == 0) + callout_reset(&sc->discard_buffer_callout, + TPM_READ_TIMEOUT / tick, tpm20_discard_buffer, sc); + + sx_xunlock(&sc->dev_lock); + return (result); +} + +static void tpm20_discard_buffer(void *arg) +{ + struct tpm_sc *sc; + + sc = (struct tpm_sc *)arg; + if (callout_pending(&sc->discard_buffer_callout)) + return; + + sx_xlock(&sc->dev_lock); + + memset(sc->buf, 0, TPM_BUFSIZE); + sc->pending_data_length = 0; + + cv_signal(&sc->buf_cv); + sx_xunlock(&sc->dev_lock); + + device_printf(sc->dev, + "User failed to read buffer in time\n"); +} + +int +tpm20_open(struct cdev *dev, int flag, int mode, struct thread *td) +{ + + return (0); +} + +int +tpm20_close(struct cdev *dev, int flag, int mode, struct thread *td) +{ + + return (0); +} + + +int +tpm20_ioctl(struct cdev *dev, u_long cmd, caddr_t data, + int flags, struct thread *td) +{ + + return (ENOTTY); +} + +int +tpm20_init(struct tpm_sc *sc) +{ + struct make_dev_args args; + int result; + + sc->buf = malloc(TPM_BUFSIZE, M_TPM20, M_WAITOK); + sx_init(&sc->dev_lock, "TPM driver lock"); + cv_init(&sc->buf_cv, "TPM buffer cv"); + callout_init(&sc->discard_buffer_callout, 1); + sc->pending_data_length = 0; + + make_dev_args_init(&args); + args.mda_devsw = &tpm20_cdevsw; + args.mda_uid = UID_ROOT; + args.mda_gid = GID_WHEEL; + args.mda_mode = TPM_CDEV_PERM_FLAG; + args.mda_si_drv1 = sc; + result = make_dev_s(&args, &sc->sc_cdev, TPM_CDEV_NAME); + if (result != 0) + tpm20_release(sc); + + return (result); + +} + +void +tpm20_release(struct tpm_sc *sc) +{ + + if (sc->buf != NULL) + free(sc->buf, M_TPM20); + + sx_destroy(&sc->dev_lock); + cv_destroy(&sc->buf_cv); + if (sc->sc_cdev != NULL) + destroy_dev(sc->sc_cdev); +} + + +int +tpm20_suspend(device_t dev) +{ + return (tpm20_save_state(dev, true)); +} + +int +tpm20_shutdown(device_t dev) +{ + return (tpm20_save_state(dev, false)); +} + +static int +tpm20_save_state(device_t dev, bool suspend) +{ + struct tpm_sc *sc; + uint8_t save_cmd[] = { + 0x80, 0x01, /* TPM_ST_NO_SESSIONS tag*/ + 0x00, 0x00, 0x00, 0x0C, /* cmd length */ + 0x00, 0x00, 0x01, 0x45, 0x00, 0x00 /* cmd TPM_CC_Shutdown */ + }; + + sc = device_get_softc(dev); + + /* + * Inform the TPM whether we are going to suspend or reboot/shutdown. + */ + if (suspend) + save_cmd[11] = 1; /* TPM_SU_STATE */ + + if (sc == NULL || sc->buf == NULL) + return (0); + + sx_xlock(&sc->dev_lock); + + memcpy(sc->buf, save_cmd, sizeof(save_cmd)); + sc->transmit(sc, sizeof(save_cmd)); + + sx_xunlock(&sc->dev_lock); + + return (0); +} + +int32_t +tpm20_get_timeout(uint32_t command) +{ + int32_t timeout; + + switch (command) { + case TPM_CC_CreatePrimary: + case TPM_CC_Create: + case TPM_CC_CreateLoaded: + timeout = TPM_TIMEOUT_LONG; + break; + case TPM_CC_SequenceComplete: + case TPM_CC_Startup: + case TPM_CC_SequenceUpdate: + case TPM_CC_GetCapability: + case TPM_CC_PCR_Extend: + case TPM_CC_EventSequenceComplete: + case TPM_CC_HashSequenceStart: + timeout = TPM_TIMEOUT_C; + break; + default: + timeout = TPM_TIMEOUT_B; + break; + } + return timeout; +} Property changes on: stable/12/sys/dev/tpm/tpm20.c ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Index: stable/12/sys/dev/tpm/tpm20.h =================================================================== --- stable/12/sys/dev/tpm/tpm20.h (nonexistent) +++ stable/12/sys/dev/tpm/tpm20.h (revision 346720) @@ -0,0 +1,178 @@ +/*- + * Copyright (c) 2018 Stormshield. + * Copyright (c) 2018 Semihalf. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _TPM20_H_ +#define _TPM20_H_ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include "opt_acpi.h" + +#define BIT(x) (1 << (x)) + +/* Timeouts in us */ +#define TPM_TIMEOUT_A 750000 +#define TPM_TIMEOUT_B 2000000 +#define TPM_TIMEOUT_C 200000 +#define TPM_TIMEOUT_D 30000 + +/* + * Generating RSA key pair takes ~(10-20s), which is significantly longer than + * any timeout defined in spec. Because of that we need a new one. + */ +#define TPM_TIMEOUT_LONG 40000000 + +/* List of commands that require TPM_TIMEOUT_LONG time to complete */ +#define TPM_CC_CreatePrimary 0x00000131 +#define TPM_CC_Create 0x00000153 +#define TPM_CC_CreateLoaded 0x00000191 + +/* List of commands that require only TPM_TIMEOUT_C time to complete */ +#define TPM_CC_SequenceComplete 0x0000013e +#define TPM_CC_Startup 0x00000144 +#define TPM_CC_SequenceUpdate 0x0000015c +#define TPM_CC_GetCapability 0x0000017a +#define TPM_CC_PCR_Extend 0x00000182 +#define TPM_CC_EventSequenceComplete 0x00000185 +#define TPM_CC_HashSequenceStart 0x00000186 + +/* Timeout before data in read buffer is discarded */ +#define TPM_READ_TIMEOUT 500000 + +#define TPM_BUFSIZE 0x1000 + +#define TPM_HEADER_SIZE 10 + +#define TPM_CDEV_NAME "tpm0" +#define TPM_CDEV_PERM_FLAG 0600 + +struct tpm_sc { + device_t dev; + + struct resource *mem_res; + struct resource *irq_res; + int mem_rid; + int irq_rid; + + struct cdev *sc_cdev; + + struct sx dev_lock; + struct cv buf_cv; + + void *intr_cookie; + int intr_type; /* Current event type */ + bool interrupts; + + uint8_t *buf; + size_t pending_data_length; + + struct callout discard_buffer_callout; + + int (*transmit)(struct tpm_sc *, size_t); +}; + +int tpm20_suspend(device_t dev); +int tpm20_shutdown(device_t dev); +int32_t tpm20_get_timeout(uint32_t command); +int tpm20_init(struct tpm_sc *sc); +void tpm20_release(struct tpm_sc *sc); + +/* Small helper routines for io ops */ +static inline uint8_t +RD1(struct tpm_sc *sc, bus_size_t off) +{ + + return (bus_read_1(sc->mem_res, off)); +} +static inline uint32_t +RD4(struct tpm_sc *sc, bus_size_t off) +{ + + return (bus_read_4(sc->mem_res, off)); +} +#ifdef __amd64__ +static inline uint64_t +RD8(struct tpm_sc *sc, bus_size_t off) +{ + + return (bus_read_8(sc->mem_res, off)); +} +#endif +static inline void +WR1(struct tpm_sc *sc, bus_size_t off, uint8_t val) +{ + + bus_write_1(sc->mem_res, off, val); +} +static inline void +WR4(struct tpm_sc *sc, bus_size_t off, uint32_t val) +{ + + bus_write_4(sc->mem_res, off, val); +} +static inline void +AND4(struct tpm_sc *sc, bus_size_t off, uint32_t val) +{ + + WR4(sc, off, RD4(sc, off) & val); +} +static inline void +OR1(struct tpm_sc *sc, bus_size_t off, uint8_t val) +{ + + WR1(sc, off, RD1(sc, off) | val); +} +static inline void +OR4(struct tpm_sc *sc, bus_size_t off, uint32_t val) +{ + + WR4(sc, off, RD4(sc, off) | val); +} +#endif /* _TPM20_H_ */ Property changes on: stable/12/sys/dev/tpm/tpm20.h ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Index: stable/12/sys/dev/tpm/tpm_crb.c =================================================================== --- stable/12/sys/dev/tpm/tpm_crb.c (nonexistent) +++ stable/12/sys/dev/tpm/tpm_crb.c (revision 346720) @@ -0,0 +1,425 @@ +/*- + * Copyright (c) 2018 Stormshield. + * Copyright (c) 2018 Semihalf. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "tpm20.h" + +/* + * CRB register space as defined in + * TCG_PC_Client_Platform_TPM_Profile_PTP_2.0_r1.03_v22 + */ +#define TPM_LOC_STATE 0x0 +#define TPM_LOC_CTRL 0x8 +#define TPM_LOC_STS 0xC +#define TPM_CRB_INTF_ID 0x30 +#define TPM_CRB_CTRL_EXT 0x38 +#define TPM_CRB_CTRL_REQ 0x40 +#define TPM_CRB_CTRL_STS 0x44 +#define TPM_CRB_CTRL_CANCEL 0x48 +#define TPM_CRB_CTRL_START 0x4C +#define TPM_CRB_INT_ENABLE 0x50 +#define TPM_CRB_INT_STS 0x54 +#define TPM_CRB_CTRL_CMD_SIZE 0x58 +#define TPM_CRB_CTRL_CMD_LADDR 0x5C +#define TPM_CRB_CTRL_CMD_HADDR 0x60 +#define TPM_CRB_CTRL_RSP_SIZE 0x64 +#define TPM_CRB_CTRL_RSP_ADDR 0x68 +#define TPM_CRB_CTRL_RSP_HADDR 0x6c +#define TPM_CRB_DATA_BUFFER 0x80 + +#define TPM_LOC_STATE_ESTB BIT(0) +#define TPM_LOC_STATE_ASSIGNED BIT(1) +#define TPM_LOC_STATE_ACTIVE_MASK 0x9C +#define TPM_LOC_STATE_VALID BIT(7) + +#define TPM_CRB_INTF_ID_TYPE_CRB 0x1 +#define TPM_CRB_INTF_ID_TYPE 0x7 + +#define TPM_LOC_CTRL_REQUEST BIT(0) +#define TPM_LOC_CTRL_RELINQUISH BIT(1) + +#define TPM_CRB_CTRL_REQ_GO_READY BIT(0) +#define TPM_CRB_CTRL_REQ_GO_IDLE BIT(1) + +#define TPM_CRB_CTRL_STS_ERR_BIT BIT(0) +#define TPM_CRB_CTRL_STS_IDLE_BIT BIT(1) + +#define TPM_CRB_CTRL_CANCEL_CMD BIT(0) + +#define TPM_CRB_CTRL_START_CMD BIT(0) + +#define TPM_CRB_INT_ENABLE_BIT BIT(31) + +struct tpmcrb_sc { + struct tpm_sc base; + bus_size_t cmd_off; + bus_size_t rsp_off; + size_t cmd_buf_size; + size_t rsp_buf_size; +}; + + +int tpmcrb_transmit(struct tpm_sc *sc, size_t size); + +static int tpmcrb_acpi_probe(device_t dev); +static int tpmcrb_attach(device_t dev); +static int tpmcrb_detach(device_t dev); + +static ACPI_STATUS tpmcrb_fix_buff_offsets(ACPI_RESOURCE *res, void *arg); + +static bool tpm_wait_for_u32(struct tpm_sc *sc, bus_size_t off, + uint32_t mask, uint32_t val, int32_t timeout); +static bool tpmcrb_request_locality(struct tpm_sc *sc, int locality); +static void tpmcrb_relinquish_locality(struct tpm_sc *sc); +static bool tpmcrb_cancel_cmd(struct tpm_sc *sc); + +char *tpmcrb_ids[] = {"MSFT0101", NULL}; + +static int +tpmcrb_acpi_probe(device_t dev) +{ + struct resource *res; + int rid = 0; + uint32_t caps; + + if (ACPI_ID_PROBE(device_get_parent(dev), dev, tpmcrb_ids) == NULL) + return (ENXIO); + + /* Check if device is in CRB mode */ + res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); + if (res == NULL) + return (ENXIO); + + caps = bus_read_4(res, TPM_CRB_INTF_ID); + bus_release_resource(dev, SYS_RES_MEMORY, rid, res); + + if ((caps & TPM_CRB_INTF_ID_TYPE) != TPM_CRB_INTF_ID_TYPE_CRB) + return (ENXIO); + + device_set_desc(dev, "Trusted Platform Module 2.0, CRB mode"); + return (BUS_PROBE_DEFAULT); +} + +static ACPI_STATUS +tpmcrb_fix_buff_offsets(ACPI_RESOURCE *res, void *arg) +{ + struct tpmcrb_sc *crb_sc; + size_t length; + uint32_t base_addr; + + crb_sc = (struct tpmcrb_sc *)arg; + + if (res->Type != ACPI_RESOURCE_TYPE_FIXED_MEMORY32) + return (AE_OK); + + base_addr = res->Data.FixedMemory32.Address; + length = res->Data.FixedMemory32.AddressLength; + + if (crb_sc->cmd_off > base_addr && crb_sc->cmd_off < base_addr + length) + crb_sc->cmd_off -= base_addr; + if (crb_sc->rsp_off > base_addr && crb_sc->rsp_off < base_addr + length) + crb_sc->rsp_off -= base_addr; + + return (AE_OK); +} + +static int +tpmcrb_attach(device_t dev) +{ + struct tpmcrb_sc *crb_sc; + struct tpm_sc *sc; + ACPI_HANDLE handle; + ACPI_STATUS status; + int result; + + crb_sc = device_get_softc(dev); + sc = &crb_sc->base; + handle = acpi_get_handle(dev); + + sc->dev = dev; + + sc->mem_rid = 0; + sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid, + RF_ACTIVE); + if (sc->mem_res == NULL) + return (ENXIO); + + if(!tpmcrb_request_locality(sc, 0)) { + tpmcrb_detach(dev); + return (ENXIO); + } + + /* + * Disable all interrupts for now, since I don't have a device that + * works in CRB mode and supports them. + */ + AND4(sc, TPM_CRB_INT_ENABLE, ~TPM_CRB_INT_ENABLE_BIT); + sc->interrupts = false; + + /* + * Read addresses of Tx/Rx buffers and their sizes. Note that they + * can be implemented by a single buffer. Also for some reason CMD + * addr is stored in two 4 byte neighboring registers, whereas RSP is + * stored in a single 8 byte one. + */ +#ifdef __amd64__ + crb_sc->rsp_off = RD8(sc, TPM_CRB_CTRL_RSP_ADDR); +#else + crb_sc->rsp_off = RD4(sc, TPM_CRB_CTRL_RSP_ADDR); + crb_sc->rsp_off |= ((uint64_t) RD4(sc, TPM_CRB_CTRL_RSP_HADDR) << 32); +#endif + crb_sc->cmd_off = RD4(sc, TPM_CRB_CTRL_CMD_LADDR); + crb_sc->cmd_off |= ((uint64_t) RD4(sc, TPM_CRB_CTRL_CMD_HADDR) << 32); + crb_sc->cmd_buf_size = RD4(sc, TPM_CRB_CTRL_CMD_SIZE); + crb_sc->rsp_buf_size = RD4(sc, TPM_CRB_CTRL_RSP_SIZE); + + tpmcrb_relinquish_locality(sc); + + /* Emulator returns address in acpi space instead of an offset */ + status = AcpiWalkResources(handle, "_CRS", tpmcrb_fix_buff_offsets, + (void *)crb_sc); + if (ACPI_FAILURE(status)) { + tpmcrb_detach(dev); + return (ENXIO); + } + + if (crb_sc->rsp_off == crb_sc->cmd_off) { + /* + * If Tx/Rx buffers are implemented as one they have to be of + * same size + */ + if (crb_sc->cmd_buf_size != crb_sc->rsp_buf_size) { + device_printf(sc->dev, + "Overlapping Tx/Rx buffers have different sizes\n"); + tpmcrb_detach(dev); + return (ENXIO); + } + } + + sc->transmit = tpmcrb_transmit; + + result = tpm20_init(sc); + if (result != 0) + tpmcrb_detach(dev); + + return (result); +} + +static int +tpmcrb_detach(device_t dev) +{ + struct tpm_sc *sc; + + sc = device_get_softc(dev); + + if (sc->mem_res != NULL) + bus_release_resource(dev, SYS_RES_MEMORY, + sc->mem_rid, sc->mem_res); + + tpm20_release(sc); + return (0); +} + +static bool +tpm_wait_for_u32(struct tpm_sc *sc, bus_size_t off, uint32_t mask, uint32_t val, + int32_t timeout) +{ + + /* Check for condition */ + if ((RD4(sc, off) & mask) == val) + return (true); + + while (timeout > 0) { + if ((RD4(sc, off) & mask) == val) + return (true); + + pause("TPM in polling mode", 1); + timeout -= tick; + } + return (false); +} + +static bool +tpmcrb_request_locality(struct tpm_sc *sc, int locality) +{ + uint32_t mask; + + /* Currently we only support Locality 0 */ + if (locality != 0) + return (false); + + mask = TPM_LOC_STATE_VALID | TPM_LOC_STATE_ASSIGNED; + + OR4(sc, TPM_LOC_CTRL, TPM_LOC_CTRL_REQUEST); + if (!tpm_wait_for_u32(sc, TPM_LOC_STATE, mask, mask, TPM_TIMEOUT_C)) + return (false); + + return (true); +} + +static void +tpmcrb_relinquish_locality(struct tpm_sc *sc) +{ + + OR4(sc, TPM_LOC_CTRL, TPM_LOC_CTRL_RELINQUISH); +} + +static bool +tpmcrb_cancel_cmd(struct tpm_sc *sc) +{ + uint32_t mask = ~0; + + WR4(sc, TPM_CRB_CTRL_CANCEL, TPM_CRB_CTRL_CANCEL_CMD); + if (!tpm_wait_for_u32(sc, TPM_CRB_CTRL_START, + mask, ~mask, TPM_TIMEOUT_B)) { + device_printf(sc->dev, + "Device failed to cancel command\n"); + return (false); + } + + WR4(sc, TPM_CRB_CTRL_CANCEL, !TPM_CRB_CTRL_CANCEL_CMD); + return (true); +} + +int +tpmcrb_transmit(struct tpm_sc *sc, size_t length) +{ + struct tpmcrb_sc *crb_sc; + uint32_t mask, curr_cmd; + int timeout, bytes_available; + + crb_sc = (struct tpmcrb_sc *)sc; + + sx_assert(&sc->dev_lock, SA_XLOCKED); + + if (length > crb_sc->cmd_buf_size) { + device_printf(sc->dev, + "Requested transfer is bigger than buffer size\n"); + return (E2BIG); + } + + if (RD4(sc, TPM_CRB_CTRL_STS) & TPM_CRB_CTRL_STS_ERR_BIT) { + device_printf(sc->dev, + "Device has Error bit set\n"); + return (EIO); + } + if (!tpmcrb_request_locality(sc, 0)) { + device_printf(sc->dev, + "Failed to obtain locality\n"); + return (EIO); + } + /* Clear cancellation bit */ + WR4(sc, TPM_CRB_CTRL_CANCEL, !TPM_CRB_CTRL_CANCEL_CMD); + + /* Switch device to idle state if necessary */ + if (!(RD4(sc, TPM_CRB_CTRL_STS) & TPM_CRB_CTRL_STS_IDLE_BIT)) { + OR4(sc, TPM_CRB_CTRL_REQ, TPM_CRB_CTRL_REQ_GO_IDLE); + + mask = TPM_CRB_CTRL_STS_IDLE_BIT; + if (!tpm_wait_for_u32(sc, TPM_CRB_CTRL_STS, + mask, mask, TPM_TIMEOUT_C)) { + device_printf(sc->dev, + "Failed to transition to idle state\n"); + return (EIO); + } + } + /* Switch to ready state */ + OR4(sc, TPM_CRB_CTRL_REQ, TPM_CRB_CTRL_REQ_GO_READY); + + mask = TPM_CRB_CTRL_REQ_GO_READY; + if (!tpm_wait_for_u32(sc, TPM_CRB_CTRL_STS, + mask, !mask, TPM_TIMEOUT_C)) { + device_printf(sc->dev, + "Failed to transition to ready state\n"); + return (EIO); + } + + /* + * Calculate timeout for current command. + * Command code is passed in bytes 6-10. + */ + curr_cmd = be32toh(*(uint32_t *) (&sc->buf[6])); + timeout = tpm20_get_timeout(curr_cmd); + + /* Send command and tell device to process it. */ + bus_write_region_stream_1(sc->mem_res, crb_sc->cmd_off, + sc->buf, length); + bus_barrier(sc->mem_res, crb_sc->cmd_off, + length, BUS_SPACE_BARRIER_WRITE); + + WR4(sc, TPM_CRB_CTRL_START, TPM_CRB_CTRL_START_CMD); + bus_barrier(sc->mem_res, TPM_CRB_CTRL_START, + 4, BUS_SPACE_BARRIER_WRITE); + + mask = ~0; + if (!tpm_wait_for_u32(sc, TPM_CRB_CTRL_START, mask, ~mask, timeout)) { + device_printf(sc->dev, + "Timeout while waiting for device to process cmd\n"); + if (!tpmcrb_cancel_cmd(sc)) + return (EIO); + } + + /* Read response header. Length is passed in bytes 2 - 6. */ + bus_read_region_stream_1(sc->mem_res, crb_sc->rsp_off, + sc->buf, TPM_HEADER_SIZE); + bytes_available = be32toh(*(uint32_t *) (&sc->buf[2])); + + if (bytes_available > TPM_BUFSIZE || bytes_available < TPM_HEADER_SIZE) { + device_printf(sc->dev, + "Incorrect response size: %d\n", + bytes_available); + return (EIO); + } + + bus_read_region_stream_1(sc->mem_res, crb_sc->rsp_off + TPM_HEADER_SIZE, + &sc->buf[TPM_HEADER_SIZE], bytes_available - TPM_HEADER_SIZE); + + OR4(sc, TPM_CRB_CTRL_REQ, TPM_CRB_CTRL_REQ_GO_IDLE); + + tpmcrb_relinquish_locality(sc); + sc->pending_data_length = bytes_available; + + return (0); +} + +/* ACPI Driver */ +static device_method_t tpmcrb_methods[] = { + DEVMETHOD(device_probe, tpmcrb_acpi_probe), + DEVMETHOD(device_attach, tpmcrb_attach), + DEVMETHOD(device_detach, tpmcrb_detach), + DEVMETHOD(device_shutdown, tpm20_shutdown), + DEVMETHOD(device_suspend, tpm20_suspend), + {0, 0} +}; +static driver_t tpmcrb_driver = { + "tpmcrb", tpmcrb_methods, sizeof(struct tpmcrb_sc), +}; + +devclass_t tpmcrb_devclass; +DRIVER_MODULE(tpmcrb, acpi, tpmcrb_driver, tpmcrb_devclass, 0, 0); Property changes on: stable/12/sys/dev/tpm/tpm_crb.c ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Index: stable/12/sys/dev/tpm/tpm_tis.c =================================================================== --- stable/12/sys/dev/tpm/tpm_tis.c (nonexistent) +++ stable/12/sys/dev/tpm/tpm_tis.c (revision 346720) @@ -0,0 +1,510 @@ +/*- + * Copyright (c) 2018 Stormshield. + * Copyright (c) 2018 Semihalf. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "tpm20.h" + +/* + * TIS register space as defined in + * TCG_PC_Client_Platform_TPM_Profile_PTP_2.0_r1.03_v22 + */ +#define TPM_ACCESS 0x0 +#define TPM_INT_ENABLE 0x8 +#define TPM_INT_VECTOR 0xc +#define TPM_INT_STS 0x10 +#define TPM_INTF_CAPS 0x14 +#define TPM_STS 0x18 +#define TPM_DATA_FIFO 0x24 +#define TPM_INTF_ID 0x30 +#define TPM_XDATA_FIFO 0x80 +#define TPM_DID_VID 0xF00 +#define TPM_RID 0xF04 + +#define TPM_ACCESS_LOC_REQ BIT(1) +#define TPM_ACCESS_LOC_Seize BIT(3) +#define TPM_ACCESS_LOC_ACTIVE BIT(5) +#define TPM_ACCESS_LOC_RELINQUISH BIT(5) +#define TPM_ACCESS_VALID BIT(7) + +#define TPM_INT_ENABLE_GLOBAL_ENABLE BIT(31) +#define TPM_INT_ENABLE_CMD_RDY BIT(7) +#define TPM_INT_ENABLE_LOC_CHANGE BIT(2) +#define TPM_INT_ENABLE_STS_VALID BIT(1) +#define TPM_INT_ENABLE_DATA_AVAIL BIT(0) + +#define TPM_INT_STS_CMD_RDY BIT(7) +#define TPM_INT_STS_LOC_CHANGE BIT(2) +#define TPM_INT_STS_VALID BIT(1) +#define TPM_INT_STS_DATA_AVAIL BIT(0) + +#define TPM_INTF_CAPS_VERSION 0x70000000 +#define TPM_INTF_CAPS_TPM20 0x30000000 + +#define TPM_STS_VALID BIT(7) +#define TPM_STS_CMD_RDY BIT(6) +#define TPM_STS_CMD_START BIT(5) +#define TPM_STS_DATA_AVAIL BIT(4) +#define TPM_STS_DATA_EXPECTED BIT(3) +#define TPM_STS_BURST_MASK 0xFFFF00 +#define TPM_STS_BURST_OFFSET 0x8 + +static int tpmtis_transmit(struct tpm_sc *sc, size_t length); + +static int tpmtis_acpi_probe(device_t dev); +static int tpmtis_attach(device_t dev); +static int tpmtis_detach(device_t dev); + +static void tpmtis_intr_handler(void *arg); + +static ACPI_STATUS tpmtis_get_SIRQ_channel(ACPI_RESOURCE *res, void *arg); +static bool tpmtis_setup_intr(struct tpm_sc *sc); + +static bool tpmtis_read_bytes(struct tpm_sc *sc, size_t count, uint8_t *buf); +static bool tpmtis_write_bytes(struct tpm_sc *sc, size_t count, uint8_t *buf); +static bool tpmtis_request_locality(struct tpm_sc *sc, int locality); +static void tpmtis_relinquish_locality(struct tpm_sc *sc); +static bool tpmtis_go_ready(struct tpm_sc *sc); + +static bool tpm_wait_for_u32(struct tpm_sc *sc, bus_size_t off, + uint32_t mask, uint32_t val, int32_t timeout); +static uint16_t tpmtis_wait_for_burst(struct tpm_sc *sc); + +char *tpmtis_ids[] = {"MSFT0101", NULL}; + +static int +tpmtis_acpi_probe(device_t dev) +{ + struct resource *res; + int rid = 0; + uint32_t caps; + + if (ACPI_ID_PROBE(device_get_parent(dev), dev, tpmtis_ids) == NULL) + return (ENXIO); + + /* Check if device is in TPM 2.0 TIS mode */ + res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); + if (res == NULL) + return (ENXIO); + + caps = bus_read_4(res, TPM_INTF_CAPS); + bus_release_resource(dev, SYS_RES_MEMORY, rid, res); + if ((caps & TPM_INTF_CAPS_VERSION) != TPM_INTF_CAPS_TPM20) + return (ENXIO); + + device_set_desc(dev, "Trusted Platform Module 2.0, FIFO mode"); + return (BUS_PROBE_DEFAULT); +} + +static int +tpmtis_attach(device_t dev) +{ + struct tpm_sc *sc; + int result; + + sc = device_get_softc(dev); + sc->dev = dev; + + sc->mem_rid = 0; + sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid, + RF_ACTIVE); + if (sc->mem_res == NULL) + return (ENXIO); + + sc->irq_rid = 0; + sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid, + RF_ACTIVE | RF_SHAREABLE); + if (sc->irq_res != NULL) { + if (bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE, + NULL, tpmtis_intr_handler, sc, &sc->intr_cookie)) + sc->interrupts = false; + else + sc->interrupts = tpmtis_setup_intr(sc); + } else { + sc->interrupts = false; + } + + sc->intr_type = -1; + + sc->transmit = tpmtis_transmit; + + result = tpm20_init(sc); + if (result != 0) + tpmtis_detach(dev); + + return (result); +} + +static int +tpmtis_detach(device_t dev) +{ + struct tpm_sc *sc; + + sc = device_get_softc(dev); + + if (sc->intr_cookie != NULL) + bus_teardown_intr(dev, sc->irq_res, sc->intr_cookie); + + if (sc->irq_res != NULL) + bus_release_resource(dev, SYS_RES_IRQ, + sc->irq_rid, sc->irq_res); + + if (sc->mem_res != NULL) + bus_release_resource(dev, SYS_RES_MEMORY, + sc->mem_rid, sc->mem_res); + + tpm20_release(sc); + return (0); +} + +static ACPI_STATUS +tpmtis_get_SIRQ_channel(ACPI_RESOURCE *res, void *arg) +{ + struct tpm_sc *sc; + uint8_t channel; + + sc = (struct tpm_sc *)arg; + + switch (res->Type) { + case ACPI_RESOURCE_TYPE_IRQ: + channel = res->Data.Irq.Interrupts[0]; + break; + case ACPI_RESOURCE_TYPE_EXTENDED_IRQ: + channel = res->Data.ExtendedIrq.Interrupts[0]; + break; + default: + return (AE_OK); + } + + WR1(sc, TPM_INT_VECTOR, channel); + return (AE_OK); +} + +static bool +tpmtis_setup_intr(struct tpm_sc *sc) +{ + ACPI_STATUS status; + ACPI_HANDLE handle; + uint32_t irq_mask; + + handle = acpi_get_handle(sc->dev); + + if(!tpmtis_request_locality(sc, 0)) + return (false); + + irq_mask = RD4(sc, TPM_INT_ENABLE); + irq_mask |= TPM_INT_ENABLE_GLOBAL_ENABLE | + TPM_INT_ENABLE_DATA_AVAIL | + TPM_INT_ENABLE_LOC_CHANGE | + TPM_INT_ENABLE_CMD_RDY | + TPM_INT_ENABLE_STS_VALID; + WR4(sc, TPM_INT_ENABLE, irq_mask); + + status = AcpiWalkResources(handle, "_CRS", + tpmtis_get_SIRQ_channel, (void *)sc); + + tpmtis_relinquish_locality(sc); + + return (ACPI_SUCCESS(status)); +} + +static void +tpmtis_intr_handler(void *arg) +{ + struct tpm_sc *sc; + uint32_t status; + + sc = (struct tpm_sc *)arg; + status = RD4(sc, TPM_INT_STS); + + WR4(sc, TPM_INT_STS, status); + if (sc->intr_type != -1 && sc->intr_type & status) + wakeup(sc); +} + +static bool +tpm_wait_for_u32(struct tpm_sc *sc, bus_size_t off, uint32_t mask, uint32_t val, + int32_t timeout) +{ + + /* Check for condition */ + if ((RD4(sc, off) & mask) == val) + return (true); + + /* If interrupts are enabled sleep for timeout duration */ + if(sc->interrupts && sc->intr_type != -1) { + tsleep(sc, PWAIT, "TPM WITH INTERRUPTS", timeout / tick); + + sc->intr_type = -1; + return ((RD4(sc, off) & mask) == val); + } + + /* If we don't have interrupts poll the device every tick */ + while (timeout > 0) { + if ((RD4(sc, off) & mask) == val) + return (true); + + pause("TPM POLLING", 1); + timeout -= tick; + } + return (false); +} + +static uint16_t +tpmtis_wait_for_burst(struct tpm_sc *sc) +{ + int timeout; + uint16_t burst_count; + + timeout = TPM_TIMEOUT_A; + + while (timeout-- > 0) { + burst_count = (RD4(sc, TPM_STS) & TPM_STS_BURST_MASK) >> + TPM_STS_BURST_OFFSET; + if (burst_count > 0) + break; + + DELAY(1); + } + return (burst_count); +} + +static bool +tpmtis_read_bytes(struct tpm_sc *sc, size_t count, uint8_t *buf) +{ + uint16_t burst_count; + + while (count > 0) { + burst_count = tpmtis_wait_for_burst(sc); + if (burst_count == 0) + return (false); + + burst_count = MIN(burst_count, count); + count -= burst_count; + + while (burst_count-- > 0) + *buf++ = RD1(sc, TPM_DATA_FIFO); + } + + return (true); +} + +static bool +tpmtis_write_bytes(struct tpm_sc *sc, size_t count, uint8_t *buf) +{ + uint16_t burst_count; + + while (count > 0) { + burst_count = tpmtis_wait_for_burst(sc); + if (burst_count == 0) + return (false); + + burst_count = MIN(burst_count, count); + count -= burst_count; + + while (burst_count-- > 0) + WR1(sc, TPM_DATA_FIFO, *buf++); + } + + return (true); +} + + +static bool +tpmtis_request_locality(struct tpm_sc *sc, int locality) +{ + uint8_t mask; + int timeout; + + /* Currently we only support Locality 0 */ + if (locality != 0) + return (false); + + mask = TPM_ACCESS_LOC_ACTIVE | TPM_ACCESS_VALID; + timeout = TPM_TIMEOUT_A; + sc->intr_type = TPM_INT_STS_LOC_CHANGE; + + WR1(sc, TPM_ACCESS, TPM_ACCESS_LOC_REQ); + bus_barrier(sc->mem_res, TPM_ACCESS, 1, BUS_SPACE_BARRIER_WRITE); + if(sc->interrupts) { + tsleep(sc, PWAIT, "TPMLOCREQUEST with INTR", timeout / tick); + return ((RD1(sc, TPM_ACCESS) & mask) == mask); + } else { + while(timeout > 0) { + if ((RD1(sc, TPM_ACCESS) & mask) == mask) + return (true); + + pause("TPMLOCREQUEST POLLING", 1); + timeout -= tick; + } + } + + return (false); +} + +static void +tpmtis_relinquish_locality(struct tpm_sc *sc) +{ + + /* + * Interrupts can only be cleared when a locality is active. + * Clear them now in case interrupt handler didn't make it in time. + */ + if(sc->interrupts) + AND4(sc, TPM_INT_STS, RD4(sc, TPM_INT_STS)); + + OR1(sc, TPM_ACCESS, TPM_ACCESS_LOC_RELINQUISH); +} + +static bool +tpmtis_go_ready(struct tpm_sc *sc) +{ + uint32_t mask; + + mask = TPM_STS_CMD_RDY; + sc->intr_type = TPM_INT_STS_CMD_RDY; + + OR4(sc, TPM_STS, TPM_STS_CMD_RDY); + bus_barrier(sc->mem_res, TPM_STS, 4, BUS_SPACE_BARRIER_WRITE); + if (!tpm_wait_for_u32(sc, TPM_STS, mask, mask, TPM_TIMEOUT_B)) + return (false); + + AND4(sc, TPM_STS, ~TPM_STS_CMD_RDY); + return (true); +} + +static int +tpmtis_transmit(struct tpm_sc *sc, size_t length) +{ + size_t bytes_available; + uint32_t mask, curr_cmd; + int timeout; + + sx_assert(&sc->dev_lock, SA_XLOCKED); + + if (!tpmtis_request_locality(sc, 0)) { + device_printf(sc->dev, + "Failed to obtain locality\n"); + return (EIO); + } + if (!tpmtis_go_ready(sc)) { + device_printf(sc->dev, + "Failed to switch to ready state\n"); + return (EIO); + } + if (!tpmtis_write_bytes(sc, length, sc->buf)) { + device_printf(sc->dev, + "Failed to write cmd to device\n"); + return (EIO); + } + + mask = TPM_STS_VALID; + sc->intr_type = TPM_INT_STS_VALID; + if (!tpm_wait_for_u32(sc, TPM_STS, mask, mask, TPM_TIMEOUT_C)) { + device_printf(sc->dev, + "Timeout while waiting for valid bit\n"); + return (EIO); + } + if (RD4(sc, TPM_STS) & TPM_STS_DATA_EXPECTED) { + device_printf(sc->dev, + "Device expects more data even though we already" + " sent everything we had\n"); + return (EIO); + } + + /* + * Calculate timeout for current command. + * Command code is passed in bytes 6-10. + */ + curr_cmd = be32toh(*(uint32_t *) (&sc->buf[6])); + timeout = tpm20_get_timeout(curr_cmd); + + WR4(sc, TPM_STS, TPM_STS_CMD_START); + bus_barrier(sc->mem_res, TPM_STS, 4, BUS_SPACE_BARRIER_WRITE); + + mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID; + sc->intr_type = TPM_INT_STS_DATA_AVAIL; + if (!tpm_wait_for_u32(sc, TPM_STS, mask, mask, timeout)) { + device_printf(sc->dev, + "Timeout while waiting for device to process cmd\n"); + /* + * Switching to ready state also cancels processing + * current command + */ + if (!tpmtis_go_ready(sc)) + return (EIO); + + /* + * After canceling a command we should get a response, + * check if there is one. + */ + sc->intr_type = TPM_INT_STS_DATA_AVAIL; + if (!tpm_wait_for_u32(sc, TPM_STS, mask, mask, TPM_TIMEOUT_C)) + return (EIO); + } + /* Read response header. Length is passed in bytes 2 - 6. */ + if(!tpmtis_read_bytes(sc, TPM_HEADER_SIZE, sc->buf)) { + device_printf(sc->dev, + "Failed to read response header\n"); + return (EIO); + } + bytes_available = be32toh(*(uint32_t *) (&sc->buf[2])); + + if (bytes_available > TPM_BUFSIZE || bytes_available < TPM_HEADER_SIZE) { + device_printf(sc->dev, + "Incorrect response size: %zu\n", + bytes_available); + return (EIO); + } + if(!tpmtis_read_bytes(sc, bytes_available - TPM_HEADER_SIZE, + &sc->buf[TPM_HEADER_SIZE])) { + device_printf(sc->dev, + "Failed to read response\n"); + return (EIO); + } + tpmtis_relinquish_locality(sc); + sc->pending_data_length = bytes_available; + + return (0); +} + +/* ACPI Driver */ +static device_method_t tpmtis_methods[] = { + DEVMETHOD(device_probe, tpmtis_acpi_probe), + DEVMETHOD(device_attach, tpmtis_attach), + DEVMETHOD(device_detach, tpmtis_detach), + DEVMETHOD(device_shutdown, tpm20_shutdown), + DEVMETHOD(device_suspend, tpm20_suspend), + {0, 0} +}; +static driver_t tpmtis_driver = { + "tpmtis", tpmtis_methods, sizeof(struct tpm_sc), +}; + +devclass_t tpmtis_devclass; +DRIVER_MODULE(tpmtis, acpi, tpmtis_driver, tpmtis_devclass, 0, 0); Property changes on: stable/12/sys/dev/tpm/tpm_tis.c ___________________________________________________________________ Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Index: stable/12/sys/modules/tpm/Makefile =================================================================== --- stable/12/sys/modules/tpm/Makefile (revision 346719) +++ stable/12/sys/modules/tpm/Makefile (revision 346720) @@ -1,11 +1,13 @@ # $FreeBSD$ .PATH: ${SRCTOP}/sys/dev/tpm KMOD= tpm SRCS= tpm.c bus_if.h device_if.h #Bus specific stuff. SRCS+= tpm_isa.c tpm_acpi.c isa_if.h opt_acpi.h acpi_if.h +#TPM 2.0 +SRCS+= tpm20.c tpm_crb.c tpm_tis.c .include