Index: vendor/lld/dist-release_80/ELF/Arch/X86_64.cpp
===================================================================
--- vendor/lld/dist-release_80/ELF/Arch/X86_64.cpp	(revision 343197)
+++ vendor/lld/dist-release_80/ELF/Arch/X86_64.cpp	(revision 343198)
@@ -1,656 +1,677 @@
 //===- X86_64.cpp ---------------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #include "InputFiles.h"
 #include "Symbols.h"
 #include "SyntheticSections.h"
 #include "Target.h"
 #include "lld/Common/ErrorHandler.h"
 #include "llvm/Object/ELF.h"
 #include "llvm/Support/Endian.h"
 
 using namespace llvm;
 using namespace llvm::object;
 using namespace llvm::support::endian;
 using namespace llvm::ELF;
 using namespace lld;
 using namespace lld::elf;
 
 namespace {
 template <class ELFT> class X86_64 : public TargetInfo {
 public:
   X86_64();
   RelExpr getRelExpr(RelType Type, const Symbol &S,
                      const uint8_t *Loc) const override;
   RelType getDynRel(RelType Type) const override;
   void writeGotPltHeader(uint8_t *Buf) const override;
   void writeGotPlt(uint8_t *Buf, const Symbol &S) const override;
   void writePltHeader(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
 
   RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
                           RelExpr Expr) const override;
   void relaxGot(uint8_t *Loc, uint64_t Val) const override;
   void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
   void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
   void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
   void relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
   bool adjustPrologueForCrossSplitStack(uint8_t *Loc, uint8_t *End,
                                         uint8_t StOther) const override;
 
 private:
   void relaxGotNoPic(uint8_t *Loc, uint64_t Val, uint8_t Op,
                      uint8_t ModRm) const;
 };
 } // namespace
 
 template <class ELFT> X86_64<ELFT>::X86_64() {
   CopyRel = R_X86_64_COPY;
   GotRel = R_X86_64_GLOB_DAT;
   NoneRel = R_X86_64_NONE;
   PltRel = R_X86_64_JUMP_SLOT;
   RelativeRel = R_X86_64_RELATIVE;
   IRelativeRel = R_X86_64_IRELATIVE;
   TlsGotRel = R_X86_64_TPOFF64;
   TlsModuleIndexRel = R_X86_64_DTPMOD64;
   TlsOffsetRel = R_X86_64_DTPOFF64;
   GotEntrySize = 8;
   GotPltEntrySize = 8;
   PltEntrySize = 16;
   PltHeaderSize = 16;
   TlsGdRelaxSkip = 2;
   TrapInstr = {0xcc, 0xcc, 0xcc, 0xcc}; // 0xcc = INT3
 
   // Align to the large page size (known as a superpage or huge page).
   // FreeBSD automatically promotes large, superpage-aligned allocations.
   DefaultImageBase = 0x200000;
 }
 
 template <class ELFT>
 RelExpr X86_64<ELFT>::getRelExpr(RelType Type, const Symbol &S,
                                  const uint8_t *Loc) const {
   switch (Type) {
   case R_X86_64_8:
   case R_X86_64_16:
   case R_X86_64_32:
   case R_X86_64_32S:
   case R_X86_64_64:
   case R_X86_64_DTPOFF32:
   case R_X86_64_DTPOFF64:
     return R_ABS;
   case R_X86_64_TPOFF32:
     return R_TLS;
   case R_X86_64_TLSLD:
     return R_TLSLD_PC;
   case R_X86_64_TLSGD:
     return R_TLSGD_PC;
   case R_X86_64_SIZE32:
   case R_X86_64_SIZE64:
     return R_SIZE;
   case R_X86_64_PLT32:
     return R_PLT_PC;
   case R_X86_64_PC32:
   case R_X86_64_PC64:
     return R_PC;
   case R_X86_64_GOT32:
   case R_X86_64_GOT64:
     return R_GOT_FROM_END;
   case R_X86_64_GOTPCREL:
   case R_X86_64_GOTPCRELX:
   case R_X86_64_REX_GOTPCRELX:
   case R_X86_64_GOTTPOFF:
     return R_GOT_PC;
   case R_X86_64_GOTOFF64:
     return R_GOTREL_FROM_END;
   case R_X86_64_GOTPC32:
   case R_X86_64_GOTPC64:
     return R_GOTONLY_PC_FROM_END;
   case R_X86_64_NONE:
     return R_NONE;
   default:
     return R_INVALID;
   }
 }
 
 template <class ELFT> void X86_64<ELFT>::writeGotPltHeader(uint8_t *Buf) const {
   // The first entry holds the value of _DYNAMIC. It is not clear why that is
   // required, but it is documented in the psabi and the glibc dynamic linker
   // seems to use it (note that this is relevant for linking ld.so, not any
   // other program).
   write64le(Buf, In.Dynamic->getVA());
 }
 
 template <class ELFT>
 void X86_64<ELFT>::writeGotPlt(uint8_t *Buf, const Symbol &S) const {
   // See comments in X86::writeGotPlt.
   write64le(Buf, S.getPltVA() + 6);
 }
 
 template <class ELFT> void X86_64<ELFT>::writePltHeader(uint8_t *Buf) const {
   const uint8_t PltData[] = {
       0xff, 0x35, 0, 0, 0, 0, // pushq GOTPLT+8(%rip)
       0xff, 0x25, 0, 0, 0, 0, // jmp *GOTPLT+16(%rip)
       0x0f, 0x1f, 0x40, 0x00, // nop
   };
   memcpy(Buf, PltData, sizeof(PltData));
   uint64_t GotPlt = In.GotPlt->getVA();
   uint64_t Plt = In.Plt->getVA();
   write32le(Buf + 2, GotPlt - Plt + 2); // GOTPLT+8
   write32le(Buf + 8, GotPlt - Plt + 4); // GOTPLT+16
 }
 
 template <class ELFT>
 void X86_64<ELFT>::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
                             uint64_t PltEntryAddr, int32_t Index,
                             unsigned RelOff) const {
   const uint8_t Inst[] = {
       0xff, 0x25, 0, 0, 0, 0, // jmpq *got(%rip)
       0x68, 0, 0, 0, 0,       // pushq <relocation index>
       0xe9, 0, 0, 0, 0,       // jmpq plt[0]
   };
   memcpy(Buf, Inst, sizeof(Inst));
 
   write32le(Buf + 2, GotPltEntryAddr - PltEntryAddr - 6);
   write32le(Buf + 7, Index);
   write32le(Buf + 12, -getPltEntryOffset(Index) - 16);
 }
 
 template <class ELFT> RelType X86_64<ELFT>::getDynRel(RelType Type) const {
   if (Type == R_X86_64_64 || Type == R_X86_64_PC64 || Type == R_X86_64_SIZE32 ||
       Type == R_X86_64_SIZE64)
     return Type;
   return R_X86_64_NONE;
 }
 
 template <class ELFT>
 void X86_64<ELFT>::relaxTlsGdToLe(uint8_t *Loc, RelType Type,
                                   uint64_t Val) const {
   // Convert
   //   .byte 0x66
   //   leaq x@tlsgd(%rip), %rdi
   //   .word 0x6666
   //   rex64
   //   call __tls_get_addr@plt
   // to
   //   mov %fs:0x0,%rax
   //   lea x@tpoff,%rax
   const uint8_t Inst[] = {
       0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax
       0x48, 0x8d, 0x80, 0, 0, 0, 0,                         // lea x@tpoff,%rax
   };
   memcpy(Loc - 4, Inst, sizeof(Inst));
 
   // The original code used a pc relative relocation and so we have to
   // compensate for the -4 in had in the addend.
   write32le(Loc + 8, Val + 4);
 }
 
 template <class ELFT>
 void X86_64<ELFT>::relaxTlsGdToIe(uint8_t *Loc, RelType Type,
                                   uint64_t Val) const {
   // Convert
   //   .byte 0x66
   //   leaq x@tlsgd(%rip), %rdi
   //   .word 0x6666
   //   rex64
   //   call __tls_get_addr@plt
   // to
   //   mov %fs:0x0,%rax
   //   addq x@tpoff,%rax
   const uint8_t Inst[] = {
       0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax
       0x48, 0x03, 0x05, 0, 0, 0, 0,                         // addq x@tpoff,%rax
   };
   memcpy(Loc - 4, Inst, sizeof(Inst));
 
   // Both code sequences are PC relatives, but since we are moving the constant
   // forward by 8 bytes we have to subtract the value by 8.
   write32le(Loc + 8, Val - 8);
 }
 
 // In some conditions, R_X86_64_GOTTPOFF relocation can be optimized to
 // R_X86_64_TPOFF32 so that it does not use GOT.
 template <class ELFT>
 void X86_64<ELFT>::relaxTlsIeToLe(uint8_t *Loc, RelType Type,
                                   uint64_t Val) const {
   uint8_t *Inst = Loc - 3;
   uint8_t Reg = Loc[-1] >> 3;
   uint8_t *RegSlot = Loc - 1;
 
   // Note that ADD with RSP or R12 is converted to ADD instead of LEA
   // because LEA with these registers needs 4 bytes to encode and thus
   // wouldn't fit the space.
 
   if (memcmp(Inst, "\x48\x03\x25", 3) == 0) {
     // "addq foo@gottpoff(%rip),%rsp" -> "addq $foo,%rsp"
     memcpy(Inst, "\x48\x81\xc4", 3);
   } else if (memcmp(Inst, "\x4c\x03\x25", 3) == 0) {
     // "addq foo@gottpoff(%rip),%r12" -> "addq $foo,%r12"
     memcpy(Inst, "\x49\x81\xc4", 3);
   } else if (memcmp(Inst, "\x4c\x03", 2) == 0) {
     // "addq foo@gottpoff(%rip),%r[8-15]" -> "leaq foo(%r[8-15]),%r[8-15]"
     memcpy(Inst, "\x4d\x8d", 2);
     *RegSlot = 0x80 | (Reg << 3) | Reg;
   } else if (memcmp(Inst, "\x48\x03", 2) == 0) {
     // "addq foo@gottpoff(%rip),%reg -> "leaq foo(%reg),%reg"
     memcpy(Inst, "\x48\x8d", 2);
     *RegSlot = 0x80 | (Reg << 3) | Reg;
   } else if (memcmp(Inst, "\x4c\x8b", 2) == 0) {
     // "movq foo@gottpoff(%rip),%r[8-15]" -> "movq $foo,%r[8-15]"
     memcpy(Inst, "\x49\xc7", 2);
     *RegSlot = 0xc0 | Reg;
   } else if (memcmp(Inst, "\x48\x8b", 2) == 0) {
     // "movq foo@gottpoff(%rip),%reg" -> "movq $foo,%reg"
     memcpy(Inst, "\x48\xc7", 2);
     *RegSlot = 0xc0 | Reg;
   } else {
     error(getErrorLocation(Loc - 3) +
           "R_X86_64_GOTTPOFF must be used in MOVQ or ADDQ instructions only");
   }
 
   // The original code used a PC relative relocation.
   // Need to compensate for the -4 it had in the addend.
   write32le(Loc, Val + 4);
 }
 
 template <class ELFT>
 void X86_64<ELFT>::relaxTlsLdToLe(uint8_t *Loc, RelType Type,
                                   uint64_t Val) const {
-  // Convert
-  //   leaq bar@tlsld(%rip), %rdi
-  //   callq __tls_get_addr@PLT
-  //   leaq bar@dtpoff(%rax), %rcx
-  // to
-  //   .word 0x6666
-  //   .byte 0x66
-  //   mov %fs:0,%rax
-  //   leaq bar@tpoff(%rax), %rcx
   if (Type == R_X86_64_DTPOFF64) {
     write64le(Loc, Val);
     return;
   }
   if (Type == R_X86_64_DTPOFF32) {
     write32le(Loc, Val);
     return;
   }
 
   const uint8_t Inst[] = {
       0x66, 0x66,                                           // .word 0x6666
       0x66,                                                 // .byte 0x66
       0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0,%rax
   };
-  memcpy(Loc - 3, Inst, sizeof(Inst));
+
+  if (Loc[4] == 0xe8) {
+    // Convert
+    //   leaq bar@tlsld(%rip), %rdi           # 48 8d 3d <Loc>
+    //   callq __tls_get_addr@PLT             # e8 <disp32>
+    //   leaq bar@dtpoff(%rax), %rcx
+    // to
+    //   .word 0x6666
+    //   .byte 0x66
+    //   mov %fs:0,%rax
+    //   leaq bar@tpoff(%rax), %rcx
+    memcpy(Loc - 3, Inst, sizeof(Inst));
+    return;
+  }
+
+  if (Loc[4] == 0xff && Loc[5] == 0x15) {
+    // Convert
+    //   leaq  x@tlsld(%rip),%rdi               # 48 8d 3d <Loc>
+    //   call *__tls_get_addr@GOTPCREL(%rip)    # ff 15 <disp32>
+    // to
+    //   .long  0x66666666
+    //   movq   %fs:0,%rax
+    // See "Table 11.9: LD -> LE Code Transition (LP64)" in
+    // https://raw.githubusercontent.com/wiki/hjl-tools/x86-psABI/x86-64-psABI-1.0.pdf
+    Loc[-3] = 0x66;
+    memcpy(Loc - 2, Inst, sizeof(Inst));
+    return;
+  }
+
+  error(getErrorLocation(Loc - 3) +
+        "expected R_X86_64_PLT32 or R_X86_64_GOTPCRELX after R_X86_64_TLSLD");
 }
 
 template <class ELFT>
 void X86_64<ELFT>::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
   switch (Type) {
   case R_X86_64_8:
     checkUInt(Loc, Val, 8, Type);
     *Loc = Val;
     break;
   case R_X86_64_16:
     checkUInt(Loc, Val, 16, Type);
     write16le(Loc, Val);
     break;
   case R_X86_64_32:
     checkUInt(Loc, Val, 32, Type);
     write32le(Loc, Val);
     break;
   case R_X86_64_32S:
   case R_X86_64_TPOFF32:
   case R_X86_64_GOT32:
   case R_X86_64_GOTPC32:
   case R_X86_64_GOTPCREL:
   case R_X86_64_GOTPCRELX:
   case R_X86_64_REX_GOTPCRELX:
   case R_X86_64_PC32:
   case R_X86_64_GOTTPOFF:
   case R_X86_64_PLT32:
   case R_X86_64_TLSGD:
   case R_X86_64_TLSLD:
   case R_X86_64_DTPOFF32:
   case R_X86_64_SIZE32:
     checkInt(Loc, Val, 32, Type);
     write32le(Loc, Val);
     break;
   case R_X86_64_64:
   case R_X86_64_DTPOFF64:
   case R_X86_64_GLOB_DAT:
   case R_X86_64_PC64:
   case R_X86_64_SIZE64:
   case R_X86_64_GOT64:
   case R_X86_64_GOTOFF64:
   case R_X86_64_GOTPC64:
     write64le(Loc, Val);
     break;
   default:
     error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
   }
 }
 
 template <class ELFT>
 RelExpr X86_64<ELFT>::adjustRelaxExpr(RelType Type, const uint8_t *Data,
                                       RelExpr RelExpr) const {
   if (Type != R_X86_64_GOTPCRELX && Type != R_X86_64_REX_GOTPCRELX)
     return RelExpr;
   const uint8_t Op = Data[-2];
   const uint8_t ModRm = Data[-1];
 
   // FIXME: When PIC is disabled and foo is defined locally in the
   // lower 32 bit address space, memory operand in mov can be converted into
   // immediate operand. Otherwise, mov must be changed to lea. We support only
   // latter relaxation at this moment.
   if (Op == 0x8b)
     return R_RELAX_GOT_PC;
 
   // Relax call and jmp.
   if (Op == 0xff && (ModRm == 0x15 || ModRm == 0x25))
     return R_RELAX_GOT_PC;
 
   // Relaxation of test, adc, add, and, cmp, or, sbb, sub, xor.
   // If PIC then no relaxation is available.
   // We also don't relax test/binop instructions without REX byte,
   // they are 32bit operations and not common to have.
   assert(Type == R_X86_64_REX_GOTPCRELX);
   return Config->Pic ? RelExpr : R_RELAX_GOT_PC_NOPIC;
 }
 
 // A subset of relaxations can only be applied for no-PIC. This method
 // handles such relaxations. Instructions encoding information was taken from:
 // "Intel 64 and IA-32 Architectures Software Developer's Manual V2"
 // (http://www.intel.com/content/dam/www/public/us/en/documents/manuals/
 //    64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf)
 template <class ELFT>
 void X86_64<ELFT>::relaxGotNoPic(uint8_t *Loc, uint64_t Val, uint8_t Op,
                                  uint8_t ModRm) const {
   const uint8_t Rex = Loc[-3];
   // Convert "test %reg, foo@GOTPCREL(%rip)" to "test $foo, %reg".
   if (Op == 0x85) {
     // See "TEST-Logical Compare" (4-428 Vol. 2B),
     // TEST r/m64, r64 uses "full" ModR / M byte (no opcode extension).
 
     // ModR/M byte has form XX YYY ZZZ, where
     // YYY is MODRM.reg(register 2), ZZZ is MODRM.rm(register 1).
     // XX has different meanings:
     // 00: The operand's memory address is in reg1.
     // 01: The operand's memory address is reg1 + a byte-sized displacement.
     // 10: The operand's memory address is reg1 + a word-sized displacement.
     // 11: The operand is reg1 itself.
     // If an instruction requires only one operand, the unused reg2 field
     // holds extra opcode bits rather than a register code
     // 0xC0 == 11 000 000 binary.
     // 0x38 == 00 111 000 binary.
     // We transfer reg2 to reg1 here as operand.
     // See "2.1.3 ModR/M and SIB Bytes" (Vol. 2A 2-3).
     Loc[-1] = 0xc0 | (ModRm & 0x38) >> 3; // ModR/M byte.
 
     // Change opcode from TEST r/m64, r64 to TEST r/m64, imm32
     // See "TEST-Logical Compare" (4-428 Vol. 2B).
     Loc[-2] = 0xf7;
 
     // Move R bit to the B bit in REX byte.
     // REX byte is encoded as 0100WRXB, where
     // 0100 is 4bit fixed pattern.
     // REX.W When 1, a 64-bit operand size is used. Otherwise, when 0, the
     //   default operand size is used (which is 32-bit for most but not all
     //   instructions).
     // REX.R This 1-bit value is an extension to the MODRM.reg field.
     // REX.X This 1-bit value is an extension to the SIB.index field.
     // REX.B This 1-bit value is an extension to the MODRM.rm field or the
     // SIB.base field.
     // See "2.2.1.2 More on REX Prefix Fields " (2-8 Vol. 2A).
     Loc[-3] = (Rex & ~0x4) | (Rex & 0x4) >> 2;
     write32le(Loc, Val);
     return;
   }
 
   // If we are here then we need to relax the adc, add, and, cmp, or, sbb, sub
   // or xor operations.
 
   // Convert "binop foo@GOTPCREL(%rip), %reg" to "binop $foo, %reg".
   // Logic is close to one for test instruction above, but we also
   // write opcode extension here, see below for details.
   Loc[-1] = 0xc0 | (ModRm & 0x38) >> 3 | (Op & 0x3c); // ModR/M byte.
 
   // Primary opcode is 0x81, opcode extension is one of:
   // 000b = ADD, 001b is OR, 010b is ADC, 011b is SBB,
   // 100b is AND, 101b is SUB, 110b is XOR, 111b is CMP.
   // This value was wrote to MODRM.reg in a line above.
   // See "3.2 INSTRUCTIONS (A-M)" (Vol. 2A 3-15),
   // "INSTRUCTION SET REFERENCE, N-Z" (Vol. 2B 4-1) for
   // descriptions about each operation.
   Loc[-2] = 0x81;
   Loc[-3] = (Rex & ~0x4) | (Rex & 0x4) >> 2;
   write32le(Loc, Val);
 }
 
 template <class ELFT>
 void X86_64<ELFT>::relaxGot(uint8_t *Loc, uint64_t Val) const {
   const uint8_t Op = Loc[-2];
   const uint8_t ModRm = Loc[-1];
 
   // Convert "mov foo@GOTPCREL(%rip),%reg" to "lea foo(%rip),%reg".
   if (Op == 0x8b) {
     Loc[-2] = 0x8d;
     write32le(Loc, Val);
     return;
   }
 
   if (Op != 0xff) {
     // We are relaxing a rip relative to an absolute, so compensate
     // for the old -4 addend.
     assert(!Config->Pic);
     relaxGotNoPic(Loc, Val + 4, Op, ModRm);
     return;
   }
 
   // Convert call/jmp instructions.
   if (ModRm == 0x15) {
     // ABI says we can convert "call *foo@GOTPCREL(%rip)" to "nop; call foo".
     // Instead we convert to "addr32 call foo" where addr32 is an instruction
     // prefix. That makes result expression to be a single instruction.
     Loc[-2] = 0x67; // addr32 prefix
     Loc[-1] = 0xe8; // call
     write32le(Loc, Val);
     return;
   }
 
   // Convert "jmp *foo@GOTPCREL(%rip)" to "jmp foo; nop".
   // jmp doesn't return, so it is fine to use nop here, it is just a stub.
   assert(ModRm == 0x25);
   Loc[-2] = 0xe9; // jmp
   Loc[3] = 0x90;  // nop
   write32le(Loc - 1, Val + 1);
 }
 
 // This anonymous namespace works around a warning bug in
 // old versions of gcc. See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56480
 namespace {
 
 // A split-stack prologue starts by checking the amount of stack remaining
 // in one of two ways:
 // A) Comparing of the stack pointer to a field in the tcb.
 // B) Or a load of a stack pointer offset with an lea to r10 or r11.
 template <>
 bool X86_64<ELF64LE>::adjustPrologueForCrossSplitStack(uint8_t *Loc,
                                                        uint8_t *End,
                                                        uint8_t StOther) const {
   if (Loc + 8 >= End)
     return false;
 
   // Replace "cmp %fs:0x70,%rsp" and subsequent branch
   // with "stc, nopl 0x0(%rax,%rax,1)"
   if (memcmp(Loc, "\x64\x48\x3b\x24\x25", 5) == 0) {
     memcpy(Loc, "\xf9\x0f\x1f\x84\x00\x00\x00\x00", 8);
     return true;
   }
 
   // Adjust "lea X(%rsp),%rYY" to lea "(X - 0x4000)(%rsp),%rYY" where rYY could
   // be r10 or r11. The lea instruction feeds a subsequent compare which checks
   // if there is X available stack space. Making X larger effectively reserves
   // that much additional space. The stack grows downward so subtract the value.
   if (memcmp(Loc, "\x4c\x8d\x94\x24", 4) == 0 ||
       memcmp(Loc, "\x4c\x8d\x9c\x24", 4) == 0) {
     // The offset bytes are encoded four bytes after the start of the
     // instruction.
     write32le(Loc + 4, read32le(Loc + 4) - 0x4000);
     return true;
   }
   return false;
 }
 
 template <>
 bool X86_64<ELF32LE>::adjustPrologueForCrossSplitStack(uint8_t *Loc,
                                                        uint8_t *End,
                                                        uint8_t StOther) const {
   llvm_unreachable("Target doesn't support split stacks.");
 }
 
 } // namespace
 
 // These nonstandard PLT entries are to migtigate Spectre v2 security
 // vulnerability. In order to mitigate Spectre v2, we want to avoid indirect
 // branch instructions such as `jmp *GOTPLT(%rip)`. So, in the following PLT
 // entries, we use a CALL followed by MOV and RET to do the same thing as an
 // indirect jump. That instruction sequence is so-called "retpoline".
 //
 // We have two types of retpoline PLTs as a size optimization. If `-z now`
 // is specified, all dynamic symbols are resolved at load-time. Thus, when
 // that option is given, we can omit code for symbol lazy resolution.
 namespace {
 template <class ELFT> class Retpoline : public X86_64<ELFT> {
 public:
   Retpoline();
   void writeGotPlt(uint8_t *Buf, const Symbol &S) const override;
   void writePltHeader(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
 };
 
 template <class ELFT> class RetpolineZNow : public X86_64<ELFT> {
 public:
   RetpolineZNow();
   void writeGotPlt(uint8_t *Buf, const Symbol &S) const override {}
   void writePltHeader(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
 };
 } // namespace
 
 template <class ELFT> Retpoline<ELFT>::Retpoline() {
   TargetInfo::PltHeaderSize = 48;
   TargetInfo::PltEntrySize = 32;
 }
 
 template <class ELFT>
 void Retpoline<ELFT>::writeGotPlt(uint8_t *Buf, const Symbol &S) const {
   write64le(Buf, S.getPltVA() + 17);
 }
 
 template <class ELFT> void Retpoline<ELFT>::writePltHeader(uint8_t *Buf) const {
   const uint8_t Insn[] = {
       0xff, 0x35, 0,    0,    0,    0,          // 0:    pushq GOTPLT+8(%rip)
       0x4c, 0x8b, 0x1d, 0,    0,    0,    0,    // 6:    mov GOTPLT+16(%rip), %r11
       0xe8, 0x0e, 0x00, 0x00, 0x00,             // d:    callq next
       0xf3, 0x90,                               // 12: loop: pause
       0x0f, 0xae, 0xe8,                         // 14:   lfence
       0xeb, 0xf9,                               // 17:   jmp loop
       0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, // 19:   int3; .align 16
       0x4c, 0x89, 0x1c, 0x24,                   // 20: next: mov %r11, (%rsp)
       0xc3,                                     // 24:   ret
       0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, // 25:   int3; padding
       0xcc, 0xcc, 0xcc, 0xcc,                   // 2c:   int3; padding
   };
   memcpy(Buf, Insn, sizeof(Insn));
 
   uint64_t GotPlt = In.GotPlt->getVA();
   uint64_t Plt = In.Plt->getVA();
   write32le(Buf + 2, GotPlt - Plt - 6 + 8);
   write32le(Buf + 9, GotPlt - Plt - 13 + 16);
 }
 
 template <class ELFT>
 void Retpoline<ELFT>::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
                                uint64_t PltEntryAddr, int32_t Index,
                                unsigned RelOff) const {
   const uint8_t Insn[] = {
       0x4c, 0x8b, 0x1d, 0, 0, 0, 0, // 0:  mov foo@GOTPLT(%rip), %r11
       0xe8, 0,    0,    0,    0,    // 7:  callq plt+0x20
       0xe9, 0,    0,    0,    0,    // c:  jmp plt+0x12
       0x68, 0,    0,    0,    0,    // 11: pushq <relocation index>
       0xe9, 0,    0,    0,    0,    // 16: jmp plt+0
       0xcc, 0xcc, 0xcc, 0xcc, 0xcc, // 1b: int3; padding
   };
   memcpy(Buf, Insn, sizeof(Insn));
 
   uint64_t Off = getPltEntryOffset(Index);
 
   write32le(Buf + 3, GotPltEntryAddr - PltEntryAddr - 7);
   write32le(Buf + 8, -Off - 12 + 32);
   write32le(Buf + 13, -Off - 17 + 18);
   write32le(Buf + 18, Index);
   write32le(Buf + 23, -Off - 27);
 }
 
 template <class ELFT> RetpolineZNow<ELFT>::RetpolineZNow() {
   TargetInfo::PltHeaderSize = 32;
   TargetInfo::PltEntrySize = 16;
 }
 
 template <class ELFT>
 void RetpolineZNow<ELFT>::writePltHeader(uint8_t *Buf) const {
   const uint8_t Insn[] = {
       0xe8, 0x0b, 0x00, 0x00, 0x00, // 0:    call next
       0xf3, 0x90,                   // 5:  loop: pause
       0x0f, 0xae, 0xe8,             // 7:    lfence
       0xeb, 0xf9,                   // a:    jmp loop
       0xcc, 0xcc, 0xcc, 0xcc,       // c:    int3; .align 16
       0x4c, 0x89, 0x1c, 0x24,       // 10: next: mov %r11, (%rsp)
       0xc3,                         // 14:   ret
       0xcc, 0xcc, 0xcc, 0xcc, 0xcc, // 15:   int3; padding
       0xcc, 0xcc, 0xcc, 0xcc, 0xcc, // 1a:   int3; padding
       0xcc,                         // 1f:   int3; padding
   };
   memcpy(Buf, Insn, sizeof(Insn));
 }
 
 template <class ELFT>
 void RetpolineZNow<ELFT>::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
                                    uint64_t PltEntryAddr, int32_t Index,
                                    unsigned RelOff) const {
   const uint8_t Insn[] = {
       0x4c, 0x8b, 0x1d, 0,    0, 0, 0, // mov foo@GOTPLT(%rip), %r11
       0xe9, 0,    0,    0,    0,       // jmp plt+0
       0xcc, 0xcc, 0xcc, 0xcc,          // int3; padding
   };
   memcpy(Buf, Insn, sizeof(Insn));
 
   write32le(Buf + 3, GotPltEntryAddr - PltEntryAddr - 7);
   write32le(Buf + 8, -getPltEntryOffset(Index) - 12);
 }
 
 template <class ELFT> static TargetInfo *getTargetInfo() {
   if (Config->ZRetpolineplt) {
     if (Config->ZNow) {
       static RetpolineZNow<ELFT> T;
       return &T;
     }
     static Retpoline<ELFT> T;
     return &T;
   }
 
   static X86_64<ELFT> T;
   return &T;
 }
 
 TargetInfo *elf::getX32TargetInfo() { return getTargetInfo<ELF32LE>(); }
 TargetInfo *elf::getX86_64TargetInfo() { return getTargetInfo<ELF64LE>(); }
Index: vendor/lld/dist-release_80/ELF/Config.h
===================================================================
--- vendor/lld/dist-release_80/ELF/Config.h	(revision 343197)
+++ vendor/lld/dist-release_80/ELF/Config.h	(revision 343198)
@@ -1,293 +1,294 @@
 //===- Config.h -------------------------------------------------*- C++ -*-===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLD_ELF_CONFIG_H
 #define LLD_ELF_CONFIG_H
 
 #include "lld/Common/ErrorHandler.h"
 #include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/StringSet.h"
 #include "llvm/BinaryFormat/ELF.h"
 #include "llvm/Support/CachePruning.h"
 #include "llvm/Support/CodeGen.h"
 #include "llvm/Support/Endian.h"
 #include <vector>
 
 namespace lld {
 namespace elf {
 
 class InputFile;
 class InputSectionBase;
 
 enum ELFKind {
   ELFNoneKind,
   ELF32LEKind,
   ELF32BEKind,
   ELF64LEKind,
   ELF64BEKind
 };
 
 // For --build-id.
 enum class BuildIdKind { None, Fast, Md5, Sha1, Hexstring, Uuid };
 
 // For --discard-{all,locals,none}.
 enum class DiscardPolicy { Default, All, Locals, None };
 
 // For --icf={none,safe,all}.
 enum class ICFLevel { None, Safe, All };
 
 // For --strip-{all,debug}.
 enum class StripPolicy { None, All, Debug };
 
 // For --unresolved-symbols.
 enum class UnresolvedPolicy { ReportError, Warn, Ignore };
 
 // For --orphan-handling.
 enum class OrphanHandlingPolicy { Place, Warn, Error };
 
 // For --sort-section and linkerscript sorting rules.
 enum class SortSectionPolicy { Default, None, Alignment, Name, Priority };
 
 // For --target2
 enum class Target2Policy { Abs, Rel, GotRel };
 
 // For tracking ARM Float Argument PCS
 enum class ARMVFPArgKind { Default, Base, VFP, ToolChain };
 
 struct SymbolVersion {
   llvm::StringRef Name;
   bool IsExternCpp;
   bool HasWildcard;
 };
 
 // This struct contains symbols version definition that
 // can be found in version script if it is used for link.
 struct VersionDefinition {
   llvm::StringRef Name;
   uint16_t Id = 0;
   std::vector<SymbolVersion> Globals;
   size_t NameOff = 0; // Offset in the string table
 };
 
 // This struct contains the global configuration for the linker.
 // Most fields are direct mapping from the command line options
 // and such fields have the same name as the corresponding options.
 // Most fields are initialized by the driver.
 struct Configuration {
   uint8_t OSABI = 0;
   llvm::CachePruningPolicy ThinLTOCachePolicy;
   llvm::StringMap<uint64_t> SectionStartMap;
   llvm::StringRef Chroot;
   llvm::StringRef DynamicLinker;
   llvm::StringRef DwoDir;
   llvm::StringRef Entry;
   llvm::StringRef Emulation;
   llvm::StringRef Fini;
   llvm::StringRef Init;
   llvm::StringRef LTOAAPipeline;
   llvm::StringRef LTONewPmPasses;
   llvm::StringRef LTOObjPath;
   llvm::StringRef LTOSampleProfile;
   llvm::StringRef MapFile;
   llvm::StringRef OutputFile;
   llvm::StringRef OptRemarksFilename;
   llvm::StringRef ProgName;
   llvm::StringRef SoName;
   llvm::StringRef Sysroot;
   llvm::StringRef ThinLTOCacheDir;
   llvm::StringRef ThinLTOIndexOnlyArg;
   std::pair<llvm::StringRef, llvm::StringRef> ThinLTOObjectSuffixReplace;
   std::pair<llvm::StringRef, llvm::StringRef> ThinLTOPrefixReplace;
   std::string Rpath;
   std::vector<VersionDefinition> VersionDefinitions;
   std::vector<llvm::StringRef> AuxiliaryList;
   std::vector<llvm::StringRef> FilterList;
   std::vector<llvm::StringRef> SearchPaths;
   std::vector<llvm::StringRef> SymbolOrderingFile;
   std::vector<llvm::StringRef> Undefined;
   std::vector<SymbolVersion> DynamicList;
   std::vector<SymbolVersion> VersionScriptGlobals;
   std::vector<SymbolVersion> VersionScriptLocals;
   std::vector<uint8_t> BuildIdVector;
   llvm::MapVector<std::pair<const InputSectionBase *, const InputSectionBase *>,
                   uint64_t>
       CallGraphProfile;
   bool AllowMultipleDefinition;
   bool AndroidPackDynRelocs;
   bool ARMHasBlx = false;
   bool ARMHasMovtMovw = false;
   bool ARMJ1J2BranchEncoding = false;
   bool AsNeeded = false;
   bool Bsymbolic;
   bool BsymbolicFunctions;
   bool CallGraphProfileSort;
   bool CheckSections;
   bool CompressDebugSections;
   bool Cref;
   bool DefineCommon;
   bool Demangle = true;
   bool DisableVerify;
   bool EhFrameHdr;
   bool EmitLLVM;
   bool EmitRelocs;
   bool EnableNewDtags;
   bool ExecuteOnly;
   bool ExportDynamic;
   bool FixCortexA53Errata843419;
   bool FormatBinary = false;
   bool GcSections;
   bool GdbIndex;
   bool GnuHash = false;
   bool GnuUnique;
   bool HasDynamicList = false;
   bool HasDynSymTab;
   bool IgnoreDataAddressEquality;
   bool IgnoreFunctionAddressEquality;
   bool LTODebugPassManager;
   bool LTONewPassManager;
   bool MergeArmExidx;
   bool MipsN32Abi = false;
   bool NoinhibitExec;
   bool Nostdlib;
   bool OFormatBinary;
   bool Omagic;
   bool OptRemarksWithHotness;
+  bool PicThunk;
   bool Pie;
   bool PrintGcSections;
   bool PrintIcfSections;
   bool Relocatable;
   bool RelrPackDynRelocs;
   bool SaveTemps;
   bool SingleRoRx;
   bool Shared;
   bool Static = false;
   bool SysvHash = false;
   bool Target1Rel;
   bool Trace;
   bool ThinLTOEmitImportsFiles;
   bool ThinLTOIndexOnly;
   bool TocOptimize;
   bool UndefinedVersion;
   bool UseAndroidRelrTags = false;
   bool WarnBackrefs;
   bool WarnCommon;
   bool WarnIfuncTextrel;
   bool WarnMissingEntry;
   bool WarnSymbolOrdering;
   bool WriteAddends;
   bool ZCombreloc;
   bool ZCopyreloc;
   bool ZExecstack;
   bool ZGlobal;
   bool ZHazardplt;
   bool ZInitfirst;
   bool ZInterpose;
   bool ZKeepTextSectionPrefix;
   bool ZNodefaultlib;
   bool ZNodelete;
   bool ZNodlopen;
   bool ZNow;
   bool ZOrigin;
   bool ZRelro;
   bool ZRodynamic;
   bool ZText;
   bool ZRetpolineplt;
   bool ZWxneeded;
   DiscardPolicy Discard;
   ICFLevel ICF;
   OrphanHandlingPolicy OrphanHandling;
   SortSectionPolicy SortSection;
   StripPolicy Strip;
   UnresolvedPolicy UnresolvedSymbols;
   Target2Policy Target2;
   ARMVFPArgKind ARMVFPArgs = ARMVFPArgKind::Default;
   BuildIdKind BuildId = BuildIdKind::None;
   ELFKind EKind = ELFNoneKind;
   uint16_t DefaultSymbolVersion = llvm::ELF::VER_NDX_GLOBAL;
   uint16_t EMachine = llvm::ELF::EM_NONE;
   llvm::Optional<uint64_t> ImageBase;
   uint64_t MaxPageSize;
   uint64_t MipsGotSize;
   uint64_t ZStackSize;
   unsigned LTOPartitions;
   unsigned LTOO;
   unsigned Optimize;
   unsigned ThinLTOJobs;
   int32_t SplitStackAdjustSize;
 
   // The following config options do not directly correspond to any
   // particualr command line options.
 
   // True if we need to pass through relocations in input files to the
   // output file. Usually false because we consume relocations.
   bool CopyRelocs;
 
   // True if the target is ELF64. False if ELF32.
   bool Is64;
 
   // True if the target is little-endian. False if big-endian.
   bool IsLE;
 
   // endianness::little if IsLE is true. endianness::big otherwise.
   llvm::support::endianness Endianness;
 
   // True if the target is the little-endian MIPS64.
   //
   // The reason why we have this variable only for the MIPS is because
   // we use this often.  Some ELF headers for MIPS64EL are in a
   // mixed-endian (which is horrible and I'd say that's a serious spec
   // bug), and we need to know whether we are reading MIPS ELF files or
   // not in various places.
   //
   // (Note that MIPS64EL is not a typo for MIPS64LE. This is the official
   // name whatever that means. A fun hypothesis is that "EL" is short for
   // little-endian written in the little-endian order, but I don't know
   // if that's true.)
   bool IsMips64EL;
 
   // Holds set of ELF header flags for the target.
   uint32_t EFlags = 0;
 
   // The ELF spec defines two types of relocation table entries, RELA and
   // REL. RELA is a triplet of (offset, info, addend) while REL is a
   // tuple of (offset, info). Addends for REL are implicit and read from
   // the location where the relocations are applied. So, REL is more
   // compact than RELA but requires a bit of more work to process.
   //
   // (From the linker writer's view, this distinction is not necessary.
   // If the ELF had chosen whichever and sticked with it, it would have
   // been easier to write code to process relocations, but it's too late
   // to change the spec.)
   //
   // Each ABI defines its relocation type. IsRela is true if target
   // uses RELA. As far as we know, all 64-bit ABIs are using RELA. A
   // few 32-bit ABIs are using RELA too.
   bool IsRela;
 
   // True if we are creating position-independent code.
   bool Pic;
 
   // 4 for ELF32, 8 for ELF64.
   int Wordsize;
 };
 
 // The only instance of Configuration struct.
 extern Configuration *Config;
 
 static inline void errorOrWarn(const Twine &Msg) {
   if (!Config->NoinhibitExec)
     error(Msg);
   else
     warn(Msg);
 }
 } // namespace elf
 } // namespace lld
 
 #endif
Index: vendor/lld/dist-release_80/ELF/Driver.cpp
===================================================================
--- vendor/lld/dist-release_80/ELF/Driver.cpp	(revision 343197)
+++ vendor/lld/dist-release_80/ELF/Driver.cpp	(revision 343198)
@@ -1,1648 +1,1649 @@
 //===- Driver.cpp ---------------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // The driver drives the entire linking process. It is responsible for
 // parsing command line options and doing whatever it is instructed to do.
 //
 // One notable thing in the LLD's driver when compared to other linkers is
 // that the LLD's driver is agnostic on the host operating system.
 // Other linkers usually have implicit default values (such as a dynamic
 // linker path or library paths) for each host OS.
 //
 // I don't think implicit default values are useful because they are
 // usually explicitly specified by the compiler driver. They can even
 // be harmful when you are doing cross-linking. Therefore, in LLD, we
 // simply trust the compiler driver to pass all required options and
 // don't try to make effort on our side.
 //
 //===----------------------------------------------------------------------===//
 
 #include "Driver.h"
 #include "Config.h"
 #include "Filesystem.h"
 #include "ICF.h"
 #include "InputFiles.h"
 #include "InputSection.h"
 #include "LinkerScript.h"
 #include "MarkLive.h"
 #include "OutputSections.h"
 #include "ScriptParser.h"
 #include "SymbolTable.h"
 #include "Symbols.h"
 #include "SyntheticSections.h"
 #include "Target.h"
 #include "Writer.h"
 #include "lld/Common/Args.h"
 #include "lld/Common/Driver.h"
 #include "lld/Common/ErrorHandler.h"
 #include "lld/Common/Memory.h"
 #include "lld/Common/Strings.h"
 #include "lld/Common/TargetOptionsCommandFlags.h"
 #include "lld/Common/Threads.h"
 #include "lld/Common/Version.h"
 #include "llvm/ADT/SetVector.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Compression.h"
 #include "llvm/Support/LEB128.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/TarWriter.h"
 #include "llvm/Support/TargetSelect.h"
 #include "llvm/Support/raw_ostream.h"
 #include <cstdlib>
 #include <utility>
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
 using namespace llvm::sys;
 using namespace llvm::support;
 
 using namespace lld;
 using namespace lld::elf;
 
 Configuration *elf::Config;
 LinkerDriver *elf::Driver;
 
 static void setConfigs(opt::InputArgList &Args);
 
 bool elf::link(ArrayRef<const char *> Args, bool CanExitEarly,
                raw_ostream &Error) {
   errorHandler().LogName = args::getFilenameWithoutExe(Args[0]);
   errorHandler().ErrorLimitExceededMsg =
       "too many errors emitted, stopping now (use "
       "-error-limit=0 to see all errors)";
   errorHandler().ErrorOS = &Error;
   errorHandler().ExitEarly = CanExitEarly;
   errorHandler().ColorDiagnostics = Error.has_colors();
 
   InputSections.clear();
   OutputSections.clear();
   BinaryFiles.clear();
   BitcodeFiles.clear();
   ObjectFiles.clear();
   SharedFiles.clear();
 
   Config = make<Configuration>();
   Driver = make<LinkerDriver>();
   Script = make<LinkerScript>();
   Symtab = make<SymbolTable>();
 
   Tar = nullptr;
   memset(&In, 0, sizeof(In));
 
   Config->ProgName = Args[0];
 
   Driver->main(Args);
 
   // Exit immediately if we don't need to return to the caller.
   // This saves time because the overhead of calling destructors
   // for all globally-allocated objects is not negligible.
   if (CanExitEarly)
     exitLld(errorCount() ? 1 : 0);
 
   freeArena();
   return !errorCount();
 }
 
 // Parses a linker -m option.
 static std::tuple<ELFKind, uint16_t, uint8_t> parseEmulation(StringRef Emul) {
   uint8_t OSABI = 0;
   StringRef S = Emul;
   if (S.endswith("_fbsd")) {
     S = S.drop_back(5);
     OSABI = ELFOSABI_FREEBSD;
   }
 
   std::pair<ELFKind, uint16_t> Ret =
       StringSwitch<std::pair<ELFKind, uint16_t>>(S)
           .Cases("aarch64elf", "aarch64linux", "aarch64_elf64_le_vec",
                  {ELF64LEKind, EM_AARCH64})
           .Cases("armelf", "armelf_linux_eabi", {ELF32LEKind, EM_ARM})
           .Case("elf32_x86_64", {ELF32LEKind, EM_X86_64})
           .Cases("elf32btsmip", "elf32btsmipn32", {ELF32BEKind, EM_MIPS})
           .Cases("elf32ltsmip", "elf32ltsmipn32", {ELF32LEKind, EM_MIPS})
           .Case("elf32lriscv", {ELF32LEKind, EM_RISCV})
           .Case("elf32ppc", {ELF32BEKind, EM_PPC})
           .Case("elf64btsmip", {ELF64BEKind, EM_MIPS})
           .Case("elf64ltsmip", {ELF64LEKind, EM_MIPS})
           .Case("elf64lriscv", {ELF64LEKind, EM_RISCV})
           .Case("elf64ppc", {ELF64BEKind, EM_PPC64})
           .Case("elf64lppc", {ELF64LEKind, EM_PPC64})
           .Cases("elf_amd64", "elf_x86_64", {ELF64LEKind, EM_X86_64})
           .Case("elf_i386", {ELF32LEKind, EM_386})
           .Case("elf_iamcu", {ELF32LEKind, EM_IAMCU})
           .Default({ELFNoneKind, EM_NONE});
 
   if (Ret.first == ELFNoneKind)
     error("unknown emulation: " + Emul);
   return std::make_tuple(Ret.first, Ret.second, OSABI);
 }
 
 // Returns slices of MB by parsing MB as an archive file.
 // Each slice consists of a member file in the archive.
 std::vector<std::pair<MemoryBufferRef, uint64_t>> static getArchiveMembers(
     MemoryBufferRef MB) {
   std::unique_ptr<Archive> File =
       CHECK(Archive::create(MB),
             MB.getBufferIdentifier() + ": failed to parse archive");
 
   std::vector<std::pair<MemoryBufferRef, uint64_t>> V;
   Error Err = Error::success();
   bool AddToTar = File->isThin() && Tar;
   for (const ErrorOr<Archive::Child> &COrErr : File->children(Err)) {
     Archive::Child C =
         CHECK(COrErr, MB.getBufferIdentifier() +
                           ": could not get the child of the archive");
     MemoryBufferRef MBRef =
         CHECK(C.getMemoryBufferRef(),
               MB.getBufferIdentifier() +
                   ": could not get the buffer for a child of the archive");
     if (AddToTar)
       Tar->append(relativeToRoot(check(C.getFullName())), MBRef.getBuffer());
     V.push_back(std::make_pair(MBRef, C.getChildOffset()));
   }
   if (Err)
     fatal(MB.getBufferIdentifier() + ": Archive::children failed: " +
           toString(std::move(Err)));
 
   // Take ownership of memory buffers created for members of thin archives.
   for (std::unique_ptr<MemoryBuffer> &MB : File->takeThinBuffers())
     make<std::unique_ptr<MemoryBuffer>>(std::move(MB));
 
   return V;
 }
 
 // Opens a file and create a file object. Path has to be resolved already.
 void LinkerDriver::addFile(StringRef Path, bool WithLOption) {
   using namespace sys::fs;
 
   Optional<MemoryBufferRef> Buffer = readFile(Path);
   if (!Buffer.hasValue())
     return;
   MemoryBufferRef MBRef = *Buffer;
 
   if (Config->FormatBinary) {
     Files.push_back(make<BinaryFile>(MBRef));
     return;
   }
 
   switch (identify_magic(MBRef.getBuffer())) {
   case file_magic::unknown:
     readLinkerScript(MBRef);
     return;
   case file_magic::archive: {
     // Handle -whole-archive.
     if (InWholeArchive) {
       for (const auto &P : getArchiveMembers(MBRef))
         Files.push_back(createObjectFile(P.first, Path, P.second));
       return;
     }
 
     std::unique_ptr<Archive> File =
         CHECK(Archive::create(MBRef), Path + ": failed to parse archive");
 
     // If an archive file has no symbol table, it is likely that a user
     // is attempting LTO and using a default ar command that doesn't
     // understand the LLVM bitcode file. It is a pretty common error, so
     // we'll handle it as if it had a symbol table.
     if (!File->isEmpty() && !File->hasSymbolTable()) {
       for (const auto &P : getArchiveMembers(MBRef))
         Files.push_back(make<LazyObjFile>(P.first, Path, P.second));
       return;
     }
 
     // Handle the regular case.
     Files.push_back(make<ArchiveFile>(std::move(File)));
     return;
   }
   case file_magic::elf_shared_object:
     if (Config->Static || Config->Relocatable) {
       error("attempted static link of dynamic object " + Path);
       return;
     }
 
     // DSOs usually have DT_SONAME tags in their ELF headers, and the
     // sonames are used to identify DSOs. But if they are missing,
     // they are identified by filenames. We don't know whether the new
     // file has a DT_SONAME or not because we haven't parsed it yet.
     // Here, we set the default soname for the file because we might
     // need it later.
     //
     // If a file was specified by -lfoo, the directory part is not
     // significant, as a user did not specify it. This behavior is
     // compatible with GNU.
     Files.push_back(
         createSharedFile(MBRef, WithLOption ? path::filename(Path) : Path));
     return;
   case file_magic::bitcode:
   case file_magic::elf_relocatable:
     if (InLib)
       Files.push_back(make<LazyObjFile>(MBRef, "", 0));
     else
       Files.push_back(createObjectFile(MBRef));
     break;
   default:
     error(Path + ": unknown file type");
   }
 }
 
 // Add a given library by searching it from input search paths.
 void LinkerDriver::addLibrary(StringRef Name) {
   if (Optional<std::string> Path = searchLibrary(Name))
     addFile(*Path, /*WithLOption=*/true);
   else
     error("unable to find library -l" + Name);
 }
 
 // This function is called on startup. We need this for LTO since
 // LTO calls LLVM functions to compile bitcode files to native code.
 // Technically this can be delayed until we read bitcode files, but
 // we don't bother to do lazily because the initialization is fast.
 static void initLLVM() {
   InitializeAllTargets();
   InitializeAllTargetMCs();
   InitializeAllAsmPrinters();
   InitializeAllAsmParsers();
 }
 
 // Some command line options or some combinations of them are not allowed.
 // This function checks for such errors.
 static void checkOptions() {
   // The MIPS ABI as of 2016 does not support the GNU-style symbol lookup
   // table which is a relatively new feature.
   if (Config->EMachine == EM_MIPS && Config->GnuHash)
     error("the .gnu.hash section is not compatible with the MIPS target");
 
   if (Config->FixCortexA53Errata843419 && Config->EMachine != EM_AARCH64)
     error("--fix-cortex-a53-843419 is only supported on AArch64 targets");
 
   if (Config->TocOptimize && Config->EMachine != EM_PPC64)
     error("--toc-optimize is only supported on the PowerPC64 target");
 
   if (Config->Pie && Config->Shared)
     error("-shared and -pie may not be used together");
 
   if (!Config->Shared && !Config->FilterList.empty())
     error("-F may not be used without -shared");
 
   if (!Config->Shared && !Config->AuxiliaryList.empty())
     error("-f may not be used without -shared");
 
   if (!Config->Relocatable && !Config->DefineCommon)
     error("-no-define-common not supported in non relocatable output");
 
   if (Config->Relocatable) {
     if (Config->Shared)
       error("-r and -shared may not be used together");
     if (Config->GcSections)
       error("-r and --gc-sections may not be used together");
     if (Config->GdbIndex)
       error("-r and --gdb-index may not be used together");
     if (Config->ICF != ICFLevel::None)
       error("-r and --icf may not be used together");
     if (Config->Pie)
       error("-r and -pie may not be used together");
   }
 
   if (Config->ExecuteOnly) {
     if (Config->EMachine != EM_AARCH64)
       error("-execute-only is only supported on AArch64 targets");
 
     if (Config->SingleRoRx && !Script->HasSectionsCommand)
       error("-execute-only and -no-rosegment cannot be used together");
   }
 }
 
 static const char *getReproduceOption(opt::InputArgList &Args) {
   if (auto *Arg = Args.getLastArg(OPT_reproduce))
     return Arg->getValue();
   return getenv("LLD_REPRODUCE");
 }
 
 static bool hasZOption(opt::InputArgList &Args, StringRef Key) {
   for (auto *Arg : Args.filtered(OPT_z))
     if (Key == Arg->getValue())
       return true;
   return false;
 }
 
 static bool getZFlag(opt::InputArgList &Args, StringRef K1, StringRef K2,
                      bool Default) {
   for (auto *Arg : Args.filtered_reverse(OPT_z)) {
     if (K1 == Arg->getValue())
       return true;
     if (K2 == Arg->getValue())
       return false;
   }
   return Default;
 }
 
 static bool isKnownZFlag(StringRef S) {
   return S == "combreloc" || S == "copyreloc" || S == "defs" ||
          S == "execstack" || S == "global" || S == "hazardplt" ||
          S == "initfirst" || S == "interpose" ||
          S == "keep-text-section-prefix" || S == "lazy" || S == "muldefs" ||
          S == "nocombreloc" || S == "nocopyreloc" || S == "nodefaultlib" ||
          S == "nodelete" || S == "nodlopen" || S == "noexecstack" ||
          S == "nokeep-text-section-prefix" || S == "norelro" || S == "notext" ||
          S == "now" || S == "origin" || S == "relro" || S == "retpolineplt" ||
          S == "rodynamic" || S == "text" || S == "wxneeded" ||
          S.startswith("max-page-size=") || S.startswith("stack-size=");
 }
 
 // Report an error for an unknown -z option.
 static void checkZOptions(opt::InputArgList &Args) {
   for (auto *Arg : Args.filtered(OPT_z))
     if (!isKnownZFlag(Arg->getValue()))
       error("unknown -z value: " + StringRef(Arg->getValue()));
 }
 
 void LinkerDriver::main(ArrayRef<const char *> ArgsArr) {
   ELFOptTable Parser;
   opt::InputArgList Args = Parser.parse(ArgsArr.slice(1));
 
   // Interpret this flag early because error() depends on them.
   errorHandler().ErrorLimit = args::getInteger(Args, OPT_error_limit, 20);
 
   // Handle -help
   if (Args.hasArg(OPT_help)) {
     printHelp();
     return;
   }
 
   // Handle -v or -version.
   //
   // A note about "compatible with GNU linkers" message: this is a hack for
   // scripts generated by GNU Libtool 2.4.6 (released in February 2014 and
   // still the newest version in March 2017) or earlier to recognize LLD as
   // a GNU compatible linker. As long as an output for the -v option
   // contains "GNU" or "with BFD", they recognize us as GNU-compatible.
   //
   // This is somewhat ugly hack, but in reality, we had no choice other
   // than doing this. Considering the very long release cycle of Libtool,
   // it is not easy to improve it to recognize LLD as a GNU compatible
   // linker in a timely manner. Even if we can make it, there are still a
   // lot of "configure" scripts out there that are generated by old version
   // of Libtool. We cannot convince every software developer to migrate to
   // the latest version and re-generate scripts. So we have this hack.
   if (Args.hasArg(OPT_v) || Args.hasArg(OPT_version))
     message(getLLDVersion() + " (compatible with GNU linkers)");
 
   if (const char *Path = getReproduceOption(Args)) {
     // Note that --reproduce is a debug option so you can ignore it
     // if you are trying to understand the whole picture of the code.
     Expected<std::unique_ptr<TarWriter>> ErrOrWriter =
         TarWriter::create(Path, path::stem(Path));
     if (ErrOrWriter) {
       Tar = std::move(*ErrOrWriter);
       Tar->append("response.txt", createResponseFile(Args));
       Tar->append("version.txt", getLLDVersion() + "\n");
     } else {
       error("--reproduce: " + toString(ErrOrWriter.takeError()));
     }
   }
 
   readConfigs(Args);
   checkZOptions(Args);
 
   // The behavior of -v or --version is a bit strange, but this is
   // needed for compatibility with GNU linkers.
   if (Args.hasArg(OPT_v) && !Args.hasArg(OPT_INPUT))
     return;
   if (Args.hasArg(OPT_version))
     return;
 
   initLLVM();
   createFiles(Args);
   if (errorCount())
     return;
 
   inferMachineType();
   setConfigs(Args);
   checkOptions();
   if (errorCount())
     return;
 
   switch (Config->EKind) {
   case ELF32LEKind:
     link<ELF32LE>(Args);
     return;
   case ELF32BEKind:
     link<ELF32BE>(Args);
     return;
   case ELF64LEKind:
     link<ELF64LE>(Args);
     return;
   case ELF64BEKind:
     link<ELF64BE>(Args);
     return;
   default:
     llvm_unreachable("unknown Config->EKind");
   }
 }
 
 static std::string getRpath(opt::InputArgList &Args) {
   std::vector<StringRef> V = args::getStrings(Args, OPT_rpath);
   return llvm::join(V.begin(), V.end(), ":");
 }
 
 // Determines what we should do if there are remaining unresolved
 // symbols after the name resolution.
 static UnresolvedPolicy getUnresolvedSymbolPolicy(opt::InputArgList &Args) {
   UnresolvedPolicy ErrorOrWarn = Args.hasFlag(OPT_error_unresolved_symbols,
                                               OPT_warn_unresolved_symbols, true)
                                      ? UnresolvedPolicy::ReportError
                                      : UnresolvedPolicy::Warn;
 
   // Process the last of -unresolved-symbols, -no-undefined or -z defs.
   for (auto *Arg : llvm::reverse(Args)) {
     switch (Arg->getOption().getID()) {
     case OPT_unresolved_symbols: {
       StringRef S = Arg->getValue();
       if (S == "ignore-all" || S == "ignore-in-object-files")
         return UnresolvedPolicy::Ignore;
       if (S == "ignore-in-shared-libs" || S == "report-all")
         return ErrorOrWarn;
       error("unknown --unresolved-symbols value: " + S);
       continue;
     }
     case OPT_no_undefined:
       return ErrorOrWarn;
     case OPT_z:
       if (StringRef(Arg->getValue()) == "defs")
         return ErrorOrWarn;
       continue;
     }
   }
 
   // -shared implies -unresolved-symbols=ignore-all because missing
   // symbols are likely to be resolved at runtime using other DSOs.
   if (Config->Shared)
     return UnresolvedPolicy::Ignore;
   return ErrorOrWarn;
 }
 
 static Target2Policy getTarget2(opt::InputArgList &Args) {
   StringRef S = Args.getLastArgValue(OPT_target2, "got-rel");
   if (S == "rel")
     return Target2Policy::Rel;
   if (S == "abs")
     return Target2Policy::Abs;
   if (S == "got-rel")
     return Target2Policy::GotRel;
   error("unknown --target2 option: " + S);
   return Target2Policy::GotRel;
 }
 
 static bool isOutputFormatBinary(opt::InputArgList &Args) {
   StringRef S = Args.getLastArgValue(OPT_oformat, "elf");
   if (S == "binary")
     return true;
   if (!S.startswith("elf"))
     error("unknown --oformat value: " + S);
   return false;
 }
 
 static DiscardPolicy getDiscard(opt::InputArgList &Args) {
   if (Args.hasArg(OPT_relocatable))
     return DiscardPolicy::None;
 
   auto *Arg =
       Args.getLastArg(OPT_discard_all, OPT_discard_locals, OPT_discard_none);
   if (!Arg)
     return DiscardPolicy::Default;
   if (Arg->getOption().getID() == OPT_discard_all)
     return DiscardPolicy::All;
   if (Arg->getOption().getID() == OPT_discard_locals)
     return DiscardPolicy::Locals;
   return DiscardPolicy::None;
 }
 
 static StringRef getDynamicLinker(opt::InputArgList &Args) {
   auto *Arg = Args.getLastArg(OPT_dynamic_linker, OPT_no_dynamic_linker);
   if (!Arg || Arg->getOption().getID() == OPT_no_dynamic_linker)
     return "";
   return Arg->getValue();
 }
 
 static ICFLevel getICF(opt::InputArgList &Args) {
   auto *Arg = Args.getLastArg(OPT_icf_none, OPT_icf_safe, OPT_icf_all);
   if (!Arg || Arg->getOption().getID() == OPT_icf_none)
     return ICFLevel::None;
   if (Arg->getOption().getID() == OPT_icf_safe)
     return ICFLevel::Safe;
   return ICFLevel::All;
 }
 
 static StripPolicy getStrip(opt::InputArgList &Args) {
   if (Args.hasArg(OPT_relocatable))
     return StripPolicy::None;
 
   auto *Arg = Args.getLastArg(OPT_strip_all, OPT_strip_debug);
   if (!Arg)
     return StripPolicy::None;
   if (Arg->getOption().getID() == OPT_strip_all)
     return StripPolicy::All;
   return StripPolicy::Debug;
 }
 
 static uint64_t parseSectionAddress(StringRef S, const opt::Arg &Arg) {
   uint64_t VA = 0;
   if (S.startswith("0x"))
     S = S.drop_front(2);
   if (!to_integer(S, VA, 16))
     error("invalid argument: " + toString(Arg));
   return VA;
 }
 
 static StringMap<uint64_t> getSectionStartMap(opt::InputArgList &Args) {
   StringMap<uint64_t> Ret;
   for (auto *Arg : Args.filtered(OPT_section_start)) {
     StringRef Name;
     StringRef Addr;
     std::tie(Name, Addr) = StringRef(Arg->getValue()).split('=');
     Ret[Name] = parseSectionAddress(Addr, *Arg);
   }
 
   if (auto *Arg = Args.getLastArg(OPT_Ttext))
     Ret[".text"] = parseSectionAddress(Arg->getValue(), *Arg);
   if (auto *Arg = Args.getLastArg(OPT_Tdata))
     Ret[".data"] = parseSectionAddress(Arg->getValue(), *Arg);
   if (auto *Arg = Args.getLastArg(OPT_Tbss))
     Ret[".bss"] = parseSectionAddress(Arg->getValue(), *Arg);
   return Ret;
 }
 
 static SortSectionPolicy getSortSection(opt::InputArgList &Args) {
   StringRef S = Args.getLastArgValue(OPT_sort_section);
   if (S == "alignment")
     return SortSectionPolicy::Alignment;
   if (S == "name")
     return SortSectionPolicy::Name;
   if (!S.empty())
     error("unknown --sort-section rule: " + S);
   return SortSectionPolicy::Default;
 }
 
 static OrphanHandlingPolicy getOrphanHandling(opt::InputArgList &Args) {
   StringRef S = Args.getLastArgValue(OPT_orphan_handling, "place");
   if (S == "warn")
     return OrphanHandlingPolicy::Warn;
   if (S == "error")
     return OrphanHandlingPolicy::Error;
   if (S != "place")
     error("unknown --orphan-handling mode: " + S);
   return OrphanHandlingPolicy::Place;
 }
 
 // Parse --build-id or --build-id=<style>. We handle "tree" as a
 // synonym for "sha1" because all our hash functions including
 // -build-id=sha1 are actually tree hashes for performance reasons.
 static std::pair<BuildIdKind, std::vector<uint8_t>>
 getBuildId(opt::InputArgList &Args) {
   auto *Arg = Args.getLastArg(OPT_build_id, OPT_build_id_eq);
   if (!Arg)
     return {BuildIdKind::None, {}};
 
   if (Arg->getOption().getID() == OPT_build_id)
     return {BuildIdKind::Fast, {}};
 
   StringRef S = Arg->getValue();
   if (S == "fast")
     return {BuildIdKind::Fast, {}};
   if (S == "md5")
     return {BuildIdKind::Md5, {}};
   if (S == "sha1" || S == "tree")
     return {BuildIdKind::Sha1, {}};
   if (S == "uuid")
     return {BuildIdKind::Uuid, {}};
   if (S.startswith("0x"))
     return {BuildIdKind::Hexstring, parseHex(S.substr(2))};
 
   if (S != "none")
     error("unknown --build-id style: " + S);
   return {BuildIdKind::None, {}};
 }
 
 static std::pair<bool, bool> getPackDynRelocs(opt::InputArgList &Args) {
   StringRef S = Args.getLastArgValue(OPT_pack_dyn_relocs, "none");
   if (S == "android")
     return {true, false};
   if (S == "relr")
     return {false, true};
   if (S == "android+relr")
     return {true, true};
 
   if (S != "none")
     error("unknown -pack-dyn-relocs format: " + S);
   return {false, false};
 }
 
 static void readCallGraph(MemoryBufferRef MB) {
   // Build a map from symbol name to section
   DenseMap<StringRef, Symbol *> Map;
   for (InputFile *File : ObjectFiles)
     for (Symbol *Sym : File->getSymbols())
       Map[Sym->getName()] = Sym;
 
   auto FindSection = [&](StringRef Name) -> InputSectionBase * {
     Symbol *Sym = Map.lookup(Name);
     if (!Sym) {
       if (Config->WarnSymbolOrdering)
         warn(MB.getBufferIdentifier() + ": no such symbol: " + Name);
       return nullptr;
     }
     maybeWarnUnorderableSymbol(Sym);
 
     if (Defined *DR = dyn_cast_or_null<Defined>(Sym))
       return dyn_cast_or_null<InputSectionBase>(DR->Section);
     return nullptr;
   };
 
   for (StringRef Line : args::getLines(MB)) {
     SmallVector<StringRef, 3> Fields;
     Line.split(Fields, ' ');
     uint64_t Count;
 
     if (Fields.size() != 3 || !to_integer(Fields[2], Count)) {
       error(MB.getBufferIdentifier() + ": parse error");
       return;
     }
 
     if (InputSectionBase *From = FindSection(Fields[0]))
       if (InputSectionBase *To = FindSection(Fields[1]))
         Config->CallGraphProfile[std::make_pair(From, To)] += Count;
   }
 }
 
 template <class ELFT> static void readCallGraphsFromObjectFiles() {
   for (auto File : ObjectFiles) {
     auto *Obj = cast<ObjFile<ELFT>>(File);
 
     for (const Elf_CGProfile_Impl<ELFT> &CGPE : Obj->CGProfile) {
       auto *FromSym = dyn_cast<Defined>(&Obj->getSymbol(CGPE.cgp_from));
       auto *ToSym = dyn_cast<Defined>(&Obj->getSymbol(CGPE.cgp_to));
       if (!FromSym || !ToSym)
         continue;
 
       auto *From = dyn_cast_or_null<InputSectionBase>(FromSym->Section);
       auto *To = dyn_cast_or_null<InputSectionBase>(ToSym->Section);
       if (From && To)
         Config->CallGraphProfile[{From, To}] += CGPE.cgp_weight;
     }
   }
 }
 
 static bool getCompressDebugSections(opt::InputArgList &Args) {
   StringRef S = Args.getLastArgValue(OPT_compress_debug_sections, "none");
   if (S == "none")
     return false;
   if (S != "zlib")
     error("unknown --compress-debug-sections value: " + S);
   if (!zlib::isAvailable())
     error("--compress-debug-sections: zlib is not available");
   return true;
 }
 
 static std::pair<StringRef, StringRef> getOldNewOptions(opt::InputArgList &Args,
                                                         unsigned Id) {
   auto *Arg = Args.getLastArg(Id);
   if (!Arg)
     return {"", ""};
 
   StringRef S = Arg->getValue();
   std::pair<StringRef, StringRef> Ret = S.split(';');
   if (Ret.second.empty())
     error(Arg->getSpelling() + " expects 'old;new' format, but got " + S);
   return Ret;
 }
 
 // Parse the symbol ordering file and warn for any duplicate entries.
 static std::vector<StringRef> getSymbolOrderingFile(MemoryBufferRef MB) {
   SetVector<StringRef> Names;
   for (StringRef S : args::getLines(MB))
     if (!Names.insert(S) && Config->WarnSymbolOrdering)
       warn(MB.getBufferIdentifier() + ": duplicate ordered symbol: " + S);
 
   return Names.takeVector();
 }
 
 static void parseClangOption(StringRef Opt, const Twine &Msg) {
   std::string Err;
   raw_string_ostream OS(Err);
 
   const char *Argv[] = {Config->ProgName.data(), Opt.data()};
   if (cl::ParseCommandLineOptions(2, Argv, "", &OS))
     return;
   OS.flush();
   error(Msg + ": " + StringRef(Err).trim());
 }
 
 // Initializes Config members by the command line options.
 void LinkerDriver::readConfigs(opt::InputArgList &Args) {
   errorHandler().Verbose = Args.hasArg(OPT_verbose);
   errorHandler().FatalWarnings =
       Args.hasFlag(OPT_fatal_warnings, OPT_no_fatal_warnings, false);
   ThreadsEnabled = Args.hasFlag(OPT_threads, OPT_no_threads, true);
 
   Config->AllowMultipleDefinition =
       Args.hasFlag(OPT_allow_multiple_definition,
                    OPT_no_allow_multiple_definition, false) ||
       hasZOption(Args, "muldefs");
   Config->AuxiliaryList = args::getStrings(Args, OPT_auxiliary);
   Config->Bsymbolic = Args.hasArg(OPT_Bsymbolic);
   Config->BsymbolicFunctions = Args.hasArg(OPT_Bsymbolic_functions);
   Config->CheckSections =
       Args.hasFlag(OPT_check_sections, OPT_no_check_sections, true);
   Config->Chroot = Args.getLastArgValue(OPT_chroot);
   Config->CompressDebugSections = getCompressDebugSections(Args);
   Config->Cref = Args.hasFlag(OPT_cref, OPT_no_cref, false);
   Config->DefineCommon = Args.hasFlag(OPT_define_common, OPT_no_define_common,
                                       !Args.hasArg(OPT_relocatable));
   Config->Demangle = Args.hasFlag(OPT_demangle, OPT_no_demangle, true);
   Config->DisableVerify = Args.hasArg(OPT_disable_verify);
   Config->Discard = getDiscard(Args);
   Config->DwoDir = Args.getLastArgValue(OPT_plugin_opt_dwo_dir_eq);
   Config->DynamicLinker = getDynamicLinker(Args);
   Config->EhFrameHdr =
       Args.hasFlag(OPT_eh_frame_hdr, OPT_no_eh_frame_hdr, false);
   Config->EmitLLVM = Args.hasArg(OPT_plugin_opt_emit_llvm, false);
   Config->EmitRelocs = Args.hasArg(OPT_emit_relocs);
   Config->CallGraphProfileSort = Args.hasFlag(
       OPT_call_graph_profile_sort, OPT_no_call_graph_profile_sort, true);
   Config->EnableNewDtags =
       Args.hasFlag(OPT_enable_new_dtags, OPT_disable_new_dtags, true);
   Config->Entry = Args.getLastArgValue(OPT_entry);
   Config->ExecuteOnly =
       Args.hasFlag(OPT_execute_only, OPT_no_execute_only, false);
   Config->ExportDynamic =
       Args.hasFlag(OPT_export_dynamic, OPT_no_export_dynamic, false);
   Config->FilterList = args::getStrings(Args, OPT_filter);
   Config->Fini = Args.getLastArgValue(OPT_fini, "_fini");
   Config->FixCortexA53Errata843419 = Args.hasArg(OPT_fix_cortex_a53_843419);
   Config->GcSections = Args.hasFlag(OPT_gc_sections, OPT_no_gc_sections, false);
   Config->GnuUnique = Args.hasFlag(OPT_gnu_unique, OPT_no_gnu_unique, true);
   Config->GdbIndex = Args.hasFlag(OPT_gdb_index, OPT_no_gdb_index, false);
   Config->ICF = getICF(Args);
   Config->IgnoreDataAddressEquality =
       Args.hasArg(OPT_ignore_data_address_equality);
   Config->IgnoreFunctionAddressEquality =
       Args.hasArg(OPT_ignore_function_address_equality);
   Config->Init = Args.getLastArgValue(OPT_init, "_init");
   Config->LTOAAPipeline = Args.getLastArgValue(OPT_lto_aa_pipeline);
   Config->LTODebugPassManager = Args.hasArg(OPT_lto_debug_pass_manager);
   Config->LTONewPassManager = Args.hasArg(OPT_lto_new_pass_manager);
   Config->LTONewPmPasses = Args.getLastArgValue(OPT_lto_newpm_passes);
   Config->LTOO = args::getInteger(Args, OPT_lto_O, 2);
   Config->LTOObjPath = Args.getLastArgValue(OPT_plugin_opt_obj_path_eq);
   Config->LTOPartitions = args::getInteger(Args, OPT_lto_partitions, 1);
   Config->LTOSampleProfile = Args.getLastArgValue(OPT_lto_sample_profile);
   Config->MapFile = Args.getLastArgValue(OPT_Map);
   Config->MipsGotSize = args::getInteger(Args, OPT_mips_got_size, 0xfff0);
   Config->MergeArmExidx =
       Args.hasFlag(OPT_merge_exidx_entries, OPT_no_merge_exidx_entries, true);
   Config->NoinhibitExec = Args.hasArg(OPT_noinhibit_exec);
   Config->Nostdlib = Args.hasArg(OPT_nostdlib);
   Config->OFormatBinary = isOutputFormatBinary(Args);
   Config->Omagic = Args.hasFlag(OPT_omagic, OPT_no_omagic, false);
   Config->OptRemarksFilename = Args.getLastArgValue(OPT_opt_remarks_filename);
   Config->OptRemarksWithHotness = Args.hasArg(OPT_opt_remarks_with_hotness);
   Config->Optimize = args::getInteger(Args, OPT_O, 1);
   Config->OrphanHandling = getOrphanHandling(Args);
   Config->OutputFile = Args.getLastArgValue(OPT_o);
   Config->Pie = Args.hasFlag(OPT_pie, OPT_no_pie, false);
   Config->PrintIcfSections =
       Args.hasFlag(OPT_print_icf_sections, OPT_no_print_icf_sections, false);
   Config->PrintGcSections =
       Args.hasFlag(OPT_print_gc_sections, OPT_no_print_gc_sections, false);
   Config->Rpath = getRpath(Args);
   Config->Relocatable = Args.hasArg(OPT_relocatable);
   Config->SaveTemps = Args.hasArg(OPT_save_temps);
   Config->SearchPaths = args::getStrings(Args, OPT_library_path);
   Config->SectionStartMap = getSectionStartMap(Args);
   Config->Shared = Args.hasArg(OPT_shared);
   Config->SingleRoRx = Args.hasArg(OPT_no_rosegment);
   Config->SoName = Args.getLastArgValue(OPT_soname);
   Config->SortSection = getSortSection(Args);
   Config->SplitStackAdjustSize = args::getInteger(Args, OPT_split_stack_adjust_size, 16384);
   Config->Strip = getStrip(Args);
   Config->Sysroot = Args.getLastArgValue(OPT_sysroot);
   Config->Target1Rel = Args.hasFlag(OPT_target1_rel, OPT_target1_abs, false);
   Config->Target2 = getTarget2(Args);
   Config->ThinLTOCacheDir = Args.getLastArgValue(OPT_thinlto_cache_dir);
   Config->ThinLTOCachePolicy = CHECK(
       parseCachePruningPolicy(Args.getLastArgValue(OPT_thinlto_cache_policy)),
       "--thinlto-cache-policy: invalid cache policy");
   Config->ThinLTOEmitImportsFiles =
       Args.hasArg(OPT_plugin_opt_thinlto_emit_imports_files);
   Config->ThinLTOIndexOnly = Args.hasArg(OPT_plugin_opt_thinlto_index_only) ||
                              Args.hasArg(OPT_plugin_opt_thinlto_index_only_eq);
   Config->ThinLTOIndexOnlyArg =
       Args.getLastArgValue(OPT_plugin_opt_thinlto_index_only_eq);
   Config->ThinLTOJobs = args::getInteger(Args, OPT_thinlto_jobs, -1u);
   Config->ThinLTOObjectSuffixReplace =
       getOldNewOptions(Args, OPT_plugin_opt_thinlto_object_suffix_replace_eq);
   Config->ThinLTOPrefixReplace =
       getOldNewOptions(Args, OPT_plugin_opt_thinlto_prefix_replace_eq);
   Config->Trace = Args.hasArg(OPT_trace);
   Config->Undefined = args::getStrings(Args, OPT_undefined);
   Config->UndefinedVersion =
       Args.hasFlag(OPT_undefined_version, OPT_no_undefined_version, true);
   Config->UseAndroidRelrTags = Args.hasFlag(
       OPT_use_android_relr_tags, OPT_no_use_android_relr_tags, false);
   Config->UnresolvedSymbols = getUnresolvedSymbolPolicy(Args);
   Config->WarnBackrefs =
       Args.hasFlag(OPT_warn_backrefs, OPT_no_warn_backrefs, false);
   Config->WarnCommon = Args.hasFlag(OPT_warn_common, OPT_no_warn_common, false);
   Config->WarnIfuncTextrel =
       Args.hasFlag(OPT_warn_ifunc_textrel, OPT_no_warn_ifunc_textrel, false);
   Config->WarnSymbolOrdering =
       Args.hasFlag(OPT_warn_symbol_ordering, OPT_no_warn_symbol_ordering, true);
   Config->ZCombreloc = getZFlag(Args, "combreloc", "nocombreloc", true);
   Config->ZCopyreloc = getZFlag(Args, "copyreloc", "nocopyreloc", true);
   Config->ZExecstack = getZFlag(Args, "execstack", "noexecstack", false);
   Config->ZGlobal = hasZOption(Args, "global");
   Config->ZHazardplt = hasZOption(Args, "hazardplt");
   Config->ZInitfirst = hasZOption(Args, "initfirst");
   Config->ZInterpose = hasZOption(Args, "interpose");
   Config->ZKeepTextSectionPrefix = getZFlag(
       Args, "keep-text-section-prefix", "nokeep-text-section-prefix", false);
   Config->ZNodefaultlib = hasZOption(Args, "nodefaultlib");
   Config->ZNodelete = hasZOption(Args, "nodelete");
   Config->ZNodlopen = hasZOption(Args, "nodlopen");
   Config->ZNow = getZFlag(Args, "now", "lazy", false);
   Config->ZOrigin = hasZOption(Args, "origin");
   Config->ZRelro = getZFlag(Args, "relro", "norelro", true);
   Config->ZRetpolineplt = hasZOption(Args, "retpolineplt");
   Config->ZRodynamic = hasZOption(Args, "rodynamic");
   Config->ZStackSize = args::getZOptionValue(Args, OPT_z, "stack-size", 0);
   Config->ZText = getZFlag(Args, "text", "notext", true);
   Config->ZWxneeded = hasZOption(Args, "wxneeded");
 
   // Parse LTO options.
   if (auto *Arg = Args.getLastArg(OPT_plugin_opt_mcpu_eq))
     parseClangOption(Saver.save("-mcpu=" + StringRef(Arg->getValue())),
                      Arg->getSpelling());
 
   for (auto *Arg : Args.filtered(OPT_plugin_opt))
     parseClangOption(Arg->getValue(), Arg->getSpelling());
 
   // Parse -mllvm options.
   for (auto *Arg : Args.filtered(OPT_mllvm))
     parseClangOption(Arg->getValue(), Arg->getSpelling());
 
   if (Config->LTOO > 3)
     error("invalid optimization level for LTO: " + Twine(Config->LTOO));
   if (Config->LTOPartitions == 0)
     error("--lto-partitions: number of threads must be > 0");
   if (Config->ThinLTOJobs == 0)
     error("--thinlto-jobs: number of threads must be > 0");
 
   if (Config->SplitStackAdjustSize < 0)
     error("--split-stack-adjust-size: size must be >= 0");
 
   // Parse ELF{32,64}{LE,BE} and CPU type.
   if (auto *Arg = Args.getLastArg(OPT_m)) {
     StringRef S = Arg->getValue();
     std::tie(Config->EKind, Config->EMachine, Config->OSABI) =
         parseEmulation(S);
     Config->MipsN32Abi = (S == "elf32btsmipn32" || S == "elf32ltsmipn32");
     Config->Emulation = S;
   }
 
   // Parse -hash-style={sysv,gnu,both}.
   if (auto *Arg = Args.getLastArg(OPT_hash_style)) {
     StringRef S = Arg->getValue();
     if (S == "sysv")
       Config->SysvHash = true;
     else if (S == "gnu")
       Config->GnuHash = true;
     else if (S == "both")
       Config->SysvHash = Config->GnuHash = true;
     else
       error("unknown -hash-style: " + S);
   }
 
   if (Args.hasArg(OPT_print_map))
     Config->MapFile = "-";
 
   // --omagic is an option to create old-fashioned executables in which
   // .text segments are writable. Today, the option is still in use to
   // create special-purpose programs such as boot loaders. It doesn't
   // make sense to create PT_GNU_RELRO for such executables.
   if (Config->Omagic)
     Config->ZRelro = false;
 
   std::tie(Config->BuildId, Config->BuildIdVector) = getBuildId(Args);
 
   std::tie(Config->AndroidPackDynRelocs, Config->RelrPackDynRelocs) =
       getPackDynRelocs(Args);
 
   if (auto *Arg = Args.getLastArg(OPT_symbol_ordering_file))
     if (Optional<MemoryBufferRef> Buffer = readFile(Arg->getValue()))
       Config->SymbolOrderingFile = getSymbolOrderingFile(*Buffer);
 
   // If --retain-symbol-file is used, we'll keep only the symbols listed in
   // the file and discard all others.
   if (auto *Arg = Args.getLastArg(OPT_retain_symbols_file)) {
     Config->DefaultSymbolVersion = VER_NDX_LOCAL;
     if (Optional<MemoryBufferRef> Buffer = readFile(Arg->getValue()))
       for (StringRef S : args::getLines(*Buffer))
         Config->VersionScriptGlobals.push_back(
             {S, /*IsExternCpp*/ false, /*HasWildcard*/ false});
   }
 
   bool HasExportDynamic =
       Args.hasFlag(OPT_export_dynamic, OPT_no_export_dynamic, false);
 
   // Parses -dynamic-list and -export-dynamic-symbol. They make some
   // symbols private. Note that -export-dynamic takes precedence over them
   // as it says all symbols should be exported.
   if (!HasExportDynamic) {
     for (auto *Arg : Args.filtered(OPT_dynamic_list))
       if (Optional<MemoryBufferRef> Buffer = readFile(Arg->getValue()))
         readDynamicList(*Buffer);
 
     for (auto *Arg : Args.filtered(OPT_export_dynamic_symbol))
       Config->DynamicList.push_back(
           {Arg->getValue(), /*IsExternCpp*/ false, /*HasWildcard*/ false});
   }
 
   // If --export-dynamic-symbol=foo is given and symbol foo is defined in
   // an object file in an archive file, that object file should be pulled
   // out and linked. (It doesn't have to behave like that from technical
   // point of view, but this is needed for compatibility with GNU.)
   for (auto *Arg : Args.filtered(OPT_export_dynamic_symbol))
     Config->Undefined.push_back(Arg->getValue());
 
   for (auto *Arg : Args.filtered(OPT_version_script))
     if (Optional<std::string> Path = searchScript(Arg->getValue())) {
       if (Optional<MemoryBufferRef> Buffer = readFile(*Path))
         readVersionScript(*Buffer);
     } else {
       error(Twine("cannot find version script ") + Arg->getValue());
     }
 }
 
 // Some Config members do not directly correspond to any particular
 // command line options, but computed based on other Config values.
 // This function initialize such members. See Config.h for the details
 // of these values.
 static void setConfigs(opt::InputArgList &Args) {
   ELFKind K = Config->EKind;
   uint16_t M = Config->EMachine;
 
   Config->CopyRelocs = (Config->Relocatable || Config->EmitRelocs);
   Config->Is64 = (K == ELF64LEKind || K == ELF64BEKind);
   Config->IsLE = (K == ELF32LEKind || K == ELF64LEKind);
   Config->Endianness = Config->IsLE ? endianness::little : endianness::big;
   Config->IsMips64EL = (K == ELF64LEKind && M == EM_MIPS);
   Config->Pic = Config->Pie || Config->Shared;
+  Config->PicThunk = Args.hasArg(OPT_pic_veneer, Config->Pic);
   Config->Wordsize = Config->Is64 ? 8 : 4;
 
   // ELF defines two different ways to store relocation addends as shown below:
   //
   //  Rel:  Addends are stored to the location where relocations are applied.
   //  Rela: Addends are stored as part of relocation entry.
   //
   // In other words, Rela makes it easy to read addends at the price of extra
   // 4 or 8 byte for each relocation entry. We don't know why ELF defined two
   // different mechanisms in the first place, but this is how the spec is
   // defined.
   //
   // You cannot choose which one, Rel or Rela, you want to use. Instead each
   // ABI defines which one you need to use. The following expression expresses
   // that.
   Config->IsRela = M == EM_AARCH64 || M == EM_AMDGPU || M == EM_HEXAGON ||
                    M == EM_PPC || M == EM_PPC64 || M == EM_RISCV ||
                    M == EM_X86_64;
 
   // If the output uses REL relocations we must store the dynamic relocation
   // addends to the output sections. We also store addends for RELA relocations
   // if --apply-dynamic-relocs is used.
   // We default to not writing the addends when using RELA relocations since
   // any standard conforming tool can find it in r_addend.
   Config->WriteAddends = Args.hasFlag(OPT_apply_dynamic_relocs,
                                       OPT_no_apply_dynamic_relocs, false) ||
                          !Config->IsRela;
 
   Config->TocOptimize =
       Args.hasFlag(OPT_toc_optimize, OPT_no_toc_optimize, M == EM_PPC64);
 }
 
 // Returns a value of "-format" option.
 static bool isFormatBinary(StringRef S) {
   if (S == "binary")
     return true;
   if (S == "elf" || S == "default")
     return false;
   error("unknown -format value: " + S +
         " (supported formats: elf, default, binary)");
   return false;
 }
 
 void LinkerDriver::createFiles(opt::InputArgList &Args) {
   // For --{push,pop}-state.
   std::vector<std::tuple<bool, bool, bool>> Stack;
 
   // Iterate over argv to process input files and positional arguments.
   for (auto *Arg : Args) {
     switch (Arg->getOption().getUnaliasedOption().getID()) {
     case OPT_library:
       addLibrary(Arg->getValue());
       break;
     case OPT_INPUT:
       addFile(Arg->getValue(), /*WithLOption=*/false);
       break;
     case OPT_defsym: {
       StringRef From;
       StringRef To;
       std::tie(From, To) = StringRef(Arg->getValue()).split('=');
       if (From.empty() || To.empty())
         error("-defsym: syntax error: " + StringRef(Arg->getValue()));
       else
         readDefsym(From, MemoryBufferRef(To, "-defsym"));
       break;
     }
     case OPT_script:
       if (Optional<std::string> Path = searchScript(Arg->getValue())) {
         if (Optional<MemoryBufferRef> MB = readFile(*Path))
           readLinkerScript(*MB);
         break;
       }
       error(Twine("cannot find linker script ") + Arg->getValue());
       break;
     case OPT_as_needed:
       Config->AsNeeded = true;
       break;
     case OPT_format:
       Config->FormatBinary = isFormatBinary(Arg->getValue());
       break;
     case OPT_no_as_needed:
       Config->AsNeeded = false;
       break;
     case OPT_Bstatic:
       Config->Static = true;
       break;
     case OPT_Bdynamic:
       Config->Static = false;
       break;
     case OPT_whole_archive:
       InWholeArchive = true;
       break;
     case OPT_no_whole_archive:
       InWholeArchive = false;
       break;
     case OPT_just_symbols:
       if (Optional<MemoryBufferRef> MB = readFile(Arg->getValue())) {
         Files.push_back(createObjectFile(*MB));
         Files.back()->JustSymbols = true;
       }
       break;
     case OPT_start_group:
       if (InputFile::IsInGroup)
         error("nested --start-group");
       InputFile::IsInGroup = true;
       break;
     case OPT_end_group:
       if (!InputFile::IsInGroup)
         error("stray --end-group");
       InputFile::IsInGroup = false;
       ++InputFile::NextGroupId;
       break;
     case OPT_start_lib:
       if (InLib)
         error("nested --start-lib");
       if (InputFile::IsInGroup)
         error("may not nest --start-lib in --start-group");
       InLib = true;
       InputFile::IsInGroup = true;
       break;
     case OPT_end_lib:
       if (!InLib)
         error("stray --end-lib");
       InLib = false;
       InputFile::IsInGroup = false;
       ++InputFile::NextGroupId;
       break;
     case OPT_push_state:
       Stack.emplace_back(Config->AsNeeded, Config->Static, InWholeArchive);
       break;
     case OPT_pop_state:
       if (Stack.empty()) {
         error("unbalanced --push-state/--pop-state");
         break;
       }
       std::tie(Config->AsNeeded, Config->Static, InWholeArchive) = Stack.back();
       Stack.pop_back();
       break;
     }
   }
 
   if (Files.empty() && errorCount() == 0)
     error("no input files");
 }
 
 // If -m <machine_type> was not given, infer it from object files.
 void LinkerDriver::inferMachineType() {
   if (Config->EKind != ELFNoneKind)
     return;
 
   for (InputFile *F : Files) {
     if (F->EKind == ELFNoneKind)
       continue;
     Config->EKind = F->EKind;
     Config->EMachine = F->EMachine;
     Config->OSABI = F->OSABI;
     Config->MipsN32Abi = Config->EMachine == EM_MIPS && isMipsN32Abi(F);
     return;
   }
   error("target emulation unknown: -m or at least one .o file required");
 }
 
 // Parse -z max-page-size=<value>. The default value is defined by
 // each target.
 static uint64_t getMaxPageSize(opt::InputArgList &Args) {
   uint64_t Val = args::getZOptionValue(Args, OPT_z, "max-page-size",
                                        Target->DefaultMaxPageSize);
   if (!isPowerOf2_64(Val))
     error("max-page-size: value isn't a power of 2");
   return Val;
 }
 
 // Parses -image-base option.
 static Optional<uint64_t> getImageBase(opt::InputArgList &Args) {
   // Because we are using "Config->MaxPageSize" here, this function has to be
   // called after the variable is initialized.
   auto *Arg = Args.getLastArg(OPT_image_base);
   if (!Arg)
     return None;
 
   StringRef S = Arg->getValue();
   uint64_t V;
   if (!to_integer(S, V)) {
     error("-image-base: number expected, but got " + S);
     return 0;
   }
   if ((V % Config->MaxPageSize) != 0)
     warn("-image-base: address isn't multiple of page size: " + S);
   return V;
 }
 
 // Parses `--exclude-libs=lib,lib,...`.
 // The library names may be delimited by commas or colons.
 static DenseSet<StringRef> getExcludeLibs(opt::InputArgList &Args) {
   DenseSet<StringRef> Ret;
   for (auto *Arg : Args.filtered(OPT_exclude_libs)) {
     StringRef S = Arg->getValue();
     for (;;) {
       size_t Pos = S.find_first_of(",:");
       if (Pos == StringRef::npos)
         break;
       Ret.insert(S.substr(0, Pos));
       S = S.substr(Pos + 1);
     }
     Ret.insert(S);
   }
   return Ret;
 }
 
 // Handles the -exclude-libs option. If a static library file is specified
 // by the -exclude-libs option, all public symbols from the archive become
 // private unless otherwise specified by version scripts or something.
 // A special library name "ALL" means all archive files.
 //
 // This is not a popular option, but some programs such as bionic libc use it.
 template <class ELFT>
 static void excludeLibs(opt::InputArgList &Args) {
   DenseSet<StringRef> Libs = getExcludeLibs(Args);
   bool All = Libs.count("ALL");
 
   auto Visit = [&](InputFile *File) {
     if (!File->ArchiveName.empty())
       if (All || Libs.count(path::filename(File->ArchiveName)))
         for (Symbol *Sym : File->getSymbols())
           if (!Sym->isLocal() && Sym->File == File)
             Sym->VersionId = VER_NDX_LOCAL;
   };
 
   for (InputFile *File : ObjectFiles)
     Visit(File);
 
   for (BitcodeFile *File : BitcodeFiles)
     Visit(File);
 }
 
 // Force Sym to be entered in the output. Used for -u or equivalent.
 template <class ELFT> static void handleUndefined(StringRef Name) {
   Symbol *Sym = Symtab->find(Name);
   if (!Sym)
     return;
 
   // Since symbol S may not be used inside the program, LTO may
   // eliminate it. Mark the symbol as "used" to prevent it.
   Sym->IsUsedInRegularObj = true;
 
   if (Sym->isLazy())
     Symtab->fetchLazy<ELFT>(Sym);
 }
 
 template <class ELFT> static void handleLibcall(StringRef Name) {
   Symbol *Sym = Symtab->find(Name);
   if (!Sym || !Sym->isLazy())
     return;
 
   MemoryBufferRef MB;
   if (auto *LO = dyn_cast<LazyObject>(Sym))
     MB = LO->File->MB;
   else
     MB = cast<LazyArchive>(Sym)->getMemberBuffer();
 
   if (isBitcode(MB))
     Symtab->fetchLazy<ELFT>(Sym);
 }
 
 // If all references to a DSO happen to be weak, the DSO is not added
 // to DT_NEEDED. If that happens, we need to eliminate shared symbols
 // created from the DSO. Otherwise, they become dangling references
 // that point to a non-existent DSO.
 template <class ELFT> static void demoteSharedSymbols() {
   for (Symbol *Sym : Symtab->getSymbols()) {
     if (auto *S = dyn_cast<SharedSymbol>(Sym)) {
       if (!S->getFile<ELFT>().IsNeeded) {
         bool Used = S->Used;
         replaceSymbol<Undefined>(S, nullptr, S->getName(), STB_WEAK, S->StOther,
                                  S->Type);
         S->Used = Used;
       }
     }
   }
 }
 
 // The section referred to by S is considered address-significant. Set the
 // KeepUnique flag on the section if appropriate.
 static void markAddrsig(Symbol *S) {
   if (auto *D = dyn_cast_or_null<Defined>(S))
     if (D->Section)
       // We don't need to keep text sections unique under --icf=all even if they
       // are address-significant.
       if (Config->ICF == ICFLevel::Safe || !(D->Section->Flags & SHF_EXECINSTR))
         D->Section->KeepUnique = true;
 }
 
 // Record sections that define symbols mentioned in --keep-unique <symbol>
 // and symbols referred to by address-significance tables. These sections are
 // ineligible for ICF.
 template <class ELFT>
 static void findKeepUniqueSections(opt::InputArgList &Args) {
   for (auto *Arg : Args.filtered(OPT_keep_unique)) {
     StringRef Name = Arg->getValue();
     auto *D = dyn_cast_or_null<Defined>(Symtab->find(Name));
     if (!D || !D->Section) {
       warn("could not find symbol " + Name + " to keep unique");
       continue;
     }
     D->Section->KeepUnique = true;
   }
 
   // --icf=all --ignore-data-address-equality means that we can ignore
   // the dynsym and address-significance tables entirely.
   if (Config->ICF == ICFLevel::All && Config->IgnoreDataAddressEquality)
     return;
 
   // Symbols in the dynsym could be address-significant in other executables
   // or DSOs, so we conservatively mark them as address-significant.
   for (Symbol *S : Symtab->getSymbols())
     if (S->includeInDynsym())
       markAddrsig(S);
 
   // Visit the address-significance table in each object file and mark each
   // referenced symbol as address-significant.
   for (InputFile *F : ObjectFiles) {
     auto *Obj = cast<ObjFile<ELFT>>(F);
     ArrayRef<Symbol *> Syms = Obj->getSymbols();
     if (Obj->AddrsigSec) {
       ArrayRef<uint8_t> Contents =
           check(Obj->getObj().getSectionContents(Obj->AddrsigSec));
       const uint8_t *Cur = Contents.begin();
       while (Cur != Contents.end()) {
         unsigned Size;
         const char *Err;
         uint64_t SymIndex = decodeULEB128(Cur, &Size, Contents.end(), &Err);
         if (Err)
           fatal(toString(F) + ": could not decode addrsig section: " + Err);
         markAddrsig(Syms[SymIndex]);
         Cur += Size;
       }
     } else {
       // If an object file does not have an address-significance table,
       // conservatively mark all of its symbols as address-significant.
       for (Symbol *S : Syms)
         markAddrsig(S);
     }
   }
 }
 
 template <class ELFT> static Symbol *addUndefined(StringRef Name) {
   return Symtab->addUndefined<ELFT>(Name, STB_GLOBAL, STV_DEFAULT, 0, false,
                                     nullptr);
 }
 
 // The --wrap option is a feature to rename symbols so that you can write
 // wrappers for existing functions. If you pass `-wrap=foo`, all
 // occurrences of symbol `foo` are resolved to `wrap_foo` (so, you are
 // expected to write `wrap_foo` function as a wrapper). The original
 // symbol becomes accessible as `real_foo`, so you can call that from your
 // wrapper.
 //
 // This data structure is instantiated for each -wrap option.
 struct WrappedSymbol {
   Symbol *Sym;
   Symbol *Real;
   Symbol *Wrap;
 };
 
 // Handles -wrap option.
 //
 // This function instantiates wrapper symbols. At this point, they seem
 // like they are not being used at all, so we explicitly set some flags so
 // that LTO won't eliminate them.
 template <class ELFT>
 static std::vector<WrappedSymbol> addWrappedSymbols(opt::InputArgList &Args) {
   std::vector<WrappedSymbol> V;
   DenseSet<StringRef> Seen;
 
   for (auto *Arg : Args.filtered(OPT_wrap)) {
     StringRef Name = Arg->getValue();
     if (!Seen.insert(Name).second)
       continue;
 
     Symbol *Sym = Symtab->find(Name);
     if (!Sym)
       continue;
 
     Symbol *Real = addUndefined<ELFT>(Saver.save("__real_" + Name));
     Symbol *Wrap = addUndefined<ELFT>(Saver.save("__wrap_" + Name));
     V.push_back({Sym, Real, Wrap});
 
     // We want to tell LTO not to inline symbols to be overwritten
     // because LTO doesn't know the final symbol contents after renaming.
     Real->CanInline = false;
     Sym->CanInline = false;
 
     // Tell LTO not to eliminate these symbols.
     Sym->IsUsedInRegularObj = true;
     Wrap->IsUsedInRegularObj = true;
   }
   return V;
 }
 
 // Do renaming for -wrap by updating pointers to symbols.
 //
 // When this function is executed, only InputFiles and symbol table
 // contain pointers to symbol objects. We visit them to replace pointers,
 // so that wrapped symbols are swapped as instructed by the command line.
 template <class ELFT> static void wrapSymbols(ArrayRef<WrappedSymbol> Wrapped) {
   DenseMap<Symbol *, Symbol *> Map;
   for (const WrappedSymbol &W : Wrapped) {
     Map[W.Sym] = W.Wrap;
     Map[W.Real] = W.Sym;
   }
 
   // Update pointers in input files.
   parallelForEach(ObjectFiles, [&](InputFile *File) {
     std::vector<Symbol *> &Syms = File->getMutableSymbols();
     for (size_t I = 0, E = Syms.size(); I != E; ++I)
       if (Symbol *S = Map.lookup(Syms[I]))
         Syms[I] = S;
   });
 
   // Update pointers in the symbol table.
   for (const WrappedSymbol &W : Wrapped)
     Symtab->wrap(W.Sym, W.Real, W.Wrap);
 }
 
 static const char *LibcallRoutineNames[] = {
 #define HANDLE_LIBCALL(code, name) name,
 #include "llvm/IR/RuntimeLibcalls.def"
 #undef HANDLE_LIBCALL
 };
 
 // Do actual linking. Note that when this function is called,
 // all linker scripts have already been parsed.
 template <class ELFT> void LinkerDriver::link(opt::InputArgList &Args) {
   Target = getTarget();
   InX<ELFT>::VerSym = nullptr;
   InX<ELFT>::VerNeed = nullptr;
 
   Config->MaxPageSize = getMaxPageSize(Args);
   Config->ImageBase = getImageBase(Args);
 
   // If a -hash-style option was not given, set to a default value,
   // which varies depending on the target.
   if (!Args.hasArg(OPT_hash_style)) {
     if (Config->EMachine == EM_MIPS)
       Config->SysvHash = true;
     else
       Config->SysvHash = Config->GnuHash = true;
   }
 
   // Default output filename is "a.out" by the Unix tradition.
   if (Config->OutputFile.empty())
     Config->OutputFile = "a.out";
 
   // Fail early if the output file or map file is not writable. If a user has a
   // long link, e.g. due to a large LTO link, they do not wish to run it and
   // find that it failed because there was a mistake in their command-line.
   if (auto E = tryCreateFile(Config->OutputFile))
     error("cannot open output file " + Config->OutputFile + ": " + E.message());
   if (auto E = tryCreateFile(Config->MapFile))
     error("cannot open map file " + Config->MapFile + ": " + E.message());
   if (errorCount())
     return;
 
   // Use default entry point name if no name was given via the command
   // line nor linker scripts. For some reason, MIPS entry point name is
   // different from others.
   Config->WarnMissingEntry =
       (!Config->Entry.empty() || (!Config->Shared && !Config->Relocatable));
   if (Config->Entry.empty() && !Config->Relocatable)
     Config->Entry = (Config->EMachine == EM_MIPS) ? "__start" : "_start";
 
   // Handle --trace-symbol.
   for (auto *Arg : Args.filtered(OPT_trace_symbol))
     Symtab->trace(Arg->getValue());
 
   // Add all files to the symbol table. This will add almost all
   // symbols that we need to the symbol table.
   for (InputFile *F : Files)
     Symtab->addFile<ELFT>(F);
 
   // Now that we have every file, we can decide if we will need a
   // dynamic symbol table.
   // We need one if we were asked to export dynamic symbols or if we are
   // producing a shared library.
   // We also need one if any shared libraries are used and for pie executables
   // (probably because the dynamic linker needs it).
   Config->HasDynSymTab =
       !SharedFiles.empty() || Config->Pic || Config->ExportDynamic;
 
   // Some symbols (such as __ehdr_start) are defined lazily only when there
   // are undefined symbols for them, so we add these to trigger that logic.
   for (StringRef Name : Script->ReferencedSymbols)
     addUndefined<ELFT>(Name);
 
   // Handle the `--undefined <sym>` options.
   for (StringRef S : Config->Undefined)
     handleUndefined<ELFT>(S);
 
   // If an entry symbol is in a static archive, pull out that file now.
   handleUndefined<ELFT>(Config->Entry);
 
   // If any of our inputs are bitcode files, the LTO code generator may create
   // references to certain library functions that might not be explicit in the
   // bitcode file's symbol table. If any of those library functions are defined
   // in a bitcode file in an archive member, we need to arrange to use LTO to
   // compile those archive members by adding them to the link beforehand.
   //
   // However, adding all libcall symbols to the link can have undesired
   // consequences. For example, the libgcc implementation of
   // __sync_val_compare_and_swap_8 on 32-bit ARM pulls in an .init_array entry
   // that aborts the program if the Linux kernel does not support 64-bit
   // atomics, which would prevent the program from running even if it does not
   // use 64-bit atomics.
   //
   // Therefore, we only add libcall symbols to the link before LTO if we have
   // to, i.e. if the symbol's definition is in bitcode. Any other required
   // libcall symbols will be added to the link after LTO when we add the LTO
   // object file to the link.
   if (!BitcodeFiles.empty())
     for (const char *S : LibcallRoutineNames)
       handleLibcall<ELFT>(S);
 
   // Return if there were name resolution errors.
   if (errorCount())
     return;
 
   // Now when we read all script files, we want to finalize order of linker
   // script commands, which can be not yet final because of INSERT commands.
   Script->processInsertCommands();
 
   // We want to declare linker script's symbols early,
   // so that we can version them.
   // They also might be exported if referenced by DSOs.
   Script->declareSymbols();
 
   // Handle the -exclude-libs option.
   if (Args.hasArg(OPT_exclude_libs))
     excludeLibs<ELFT>(Args);
 
   // Create ElfHeader early. We need a dummy section in
   // addReservedSymbols to mark the created symbols as not absolute.
   Out::ElfHeader = make<OutputSection>("", 0, SHF_ALLOC);
   Out::ElfHeader->Size = sizeof(typename ELFT::Ehdr);
 
   // Create wrapped symbols for -wrap option.
   std::vector<WrappedSymbol> Wrapped = addWrappedSymbols<ELFT>(Args);
 
   // We need to create some reserved symbols such as _end. Create them.
   if (!Config->Relocatable)
     addReservedSymbols();
 
   // Apply version scripts.
   //
   // For a relocatable output, version scripts don't make sense, and
   // parsing a symbol version string (e.g. dropping "@ver1" from a symbol
   // name "foo@ver1") rather do harm, so we don't call this if -r is given.
   if (!Config->Relocatable)
     Symtab->scanVersionScript();
 
   // Do link-time optimization if given files are LLVM bitcode files.
   // This compiles bitcode files into real object files.
   //
   // With this the symbol table should be complete. After this, no new names
   // except a few linker-synthesized ones will be added to the symbol table.
   Symtab->addCombinedLTOObject<ELFT>();
   if (errorCount())
     return;
 
   // If -thinlto-index-only is given, we should create only "index
   // files" and not object files. Index file creation is already done
   // in addCombinedLTOObject, so we are done if that's the case.
   if (Config->ThinLTOIndexOnly)
     return;
 
   // Likewise, --plugin-opt=emit-llvm is an option to make LTO create
   // an output file in bitcode and exit, so that you can just get a
   // combined bitcode file.
   if (Config->EmitLLVM)
     return;
 
   // Apply symbol renames for -wrap.
   if (!Wrapped.empty())
     wrapSymbols<ELFT>(Wrapped);
 
   // Now that we have a complete list of input files.
   // Beyond this point, no new files are added.
   // Aggregate all input sections into one place.
   for (InputFile *F : ObjectFiles)
     for (InputSectionBase *S : F->getSections())
       if (S && S != &InputSection::Discarded)
         InputSections.push_back(S);
   for (BinaryFile *F : BinaryFiles)
     for (InputSectionBase *S : F->getSections())
       InputSections.push_back(cast<InputSection>(S));
 
   // We do not want to emit debug sections if --strip-all
   // or -strip-debug are given.
   if (Config->Strip != StripPolicy::None)
     llvm::erase_if(InputSections, [](InputSectionBase *S) {
       return S->Name.startswith(".debug") || S->Name.startswith(".zdebug");
     });
 
   Config->EFlags = Target->calcEFlags();
 
   if (Config->EMachine == EM_ARM) {
     // FIXME: These warnings can be removed when lld only uses these features
     // when the input objects have been compiled with an architecture that
     // supports them.
     if (Config->ARMHasBlx == false)
       warn("lld uses blx instruction, no object with architecture supporting "
            "feature detected");
   }
 
   // This adds a .comment section containing a version string. We have to add it
   // before mergeSections because the .comment section is a mergeable section.
   if (!Config->Relocatable)
     InputSections.push_back(createCommentSection());
 
   // Do size optimizations: garbage collection, merging of SHF_MERGE sections
   // and identical code folding.
   splitSections<ELFT>();
   markLive<ELFT>();
   demoteSharedSymbols<ELFT>();
   mergeSections();
   if (Config->ICF != ICFLevel::None) {
     findKeepUniqueSections<ELFT>(Args);
     doIcf<ELFT>();
   }
 
   // Read the callgraph now that we know what was gced or icfed
   if (Config->CallGraphProfileSort) {
     if (auto *Arg = Args.getLastArg(OPT_call_graph_ordering_file))
       if (Optional<MemoryBufferRef> Buffer = readFile(Arg->getValue()))
         readCallGraph(*Buffer);
     readCallGraphsFromObjectFiles<ELFT>();
   }
 
   // Write the result to the file.
   writeResult<ELFT>();
 }
Index: vendor/lld/dist-release_80/ELF/Options.td
===================================================================
--- vendor/lld/dist-release_80/ELF/Options.td	(revision 343197)
+++ vendor/lld/dist-release_80/ELF/Options.td	(revision 343198)
@@ -1,518 +1,521 @@
 include "llvm/Option/OptParser.td"
 
 // For options whose names are multiple letters, either one dash or
 // two can precede the option name except those that start with 'o'.
 class F<string name>: Flag<["--", "-"], name>;
 class J<string name>: Joined<["--", "-"], name>;
 
 multiclass Eq<string name, string help> {
   def NAME: Separate<["--", "-"], name>;
   def NAME # _eq: Joined<["--", "-"], name # "=">, Alias<!cast<Separate>(NAME)>,
     HelpText<help>;
 }
 
 multiclass B<string name, string help1, string help2> {
   def NAME: Flag<["--", "-"], name>, HelpText<help1>;
   def no_ # NAME: Flag<["--", "-"], "no-" # name>, HelpText<help2>;
 }
 
 defm auxiliary: Eq<"auxiliary", "Set DT_AUXILIARY field to the specified name">;
 
 def Bsymbolic: F<"Bsymbolic">, HelpText<"Bind defined symbols locally">;
 
 def Bsymbolic_functions: F<"Bsymbolic-functions">,
   HelpText<"Bind defined function symbols locally">;
 
 def Bdynamic: F<"Bdynamic">, HelpText<"Link against shared libraries (default)">;
 
 def Bstatic: F<"Bstatic">, HelpText<"Do not link against shared libraries">;
 
 def build_id: F<"build-id">, HelpText<"Alias for --build-id=fast">;
 
 def build_id_eq: J<"build-id=">, HelpText<"Generate build ID note">,
   MetaVarName<"[fast,md5,sha,uuid,0x<hexstring>]">;
 
 defm check_sections: B<"check-sections",
     "Check section addresses for overlaps (default)",
     "Do not check section addresses for overlaps">;
 
 defm compress_debug_sections:
   Eq<"compress-debug-sections", "Compress DWARF debug sections">,
   MetaVarName<"[none,zlib]">;
 
 defm defsym: Eq<"defsym", "Define a symbol alias">, MetaVarName<"<symbol>=<value>">;
 
 defm split_stack_adjust_size
     : Eq<"split-stack-adjust-size",
          "Specify adjustment to stack size when a split-stack function calls a "
          "non-split-stack function">,
       MetaVarName<"<value>">;
 
 defm library_path:
   Eq<"library-path", "Add a directory to the library search path">, MetaVarName<"<dir>">;
 
 def O: JoinedOrSeparate<["-"], "O">, HelpText<"Optimize output file size">;
 
 defm Tbss: Eq<"Tbss", "Same as --section-start with .bss as the sectionname">;
 
 defm Tdata: Eq<"Tdata", "Same as --section-start with .data as the sectionname">;
 
 defm Ttext: Eq<"Ttext", "Same as --section-start with .text as the sectionname">;
 
 defm allow_multiple_definition: B<"allow-multiple-definition",
     "Allow multiple definitions",
     "Do not allow multiple definitions (default)">;
 
 defm apply_dynamic_relocs: B<"apply-dynamic-relocs",
     "Apply link-time values for dynamic relocations",
     "Do not apply link-time values for dynamic relocations (default)">;
 
 defm as_needed: B<"as-needed",
     "Only set DT_NEEDED for shared libraries if used",
     "Always set DT_NEEDED for shared libraries (default)">;
 
 defm call_graph_ordering_file:
   Eq<"call-graph-ordering-file", "Layout sections to optimize the given callgraph">;
 
 defm call_graph_profile_sort: B<"call-graph-profile-sort",
     "Reorder sections with call graph profile (default)",
     "Do not reorder sections with call graph profile">;
 
 // -chroot doesn't have a help text because it is an internal option.
 def chroot: Separate<["--", "-"], "chroot">;
 
 def color_diagnostics: F<"color-diagnostics">,
   HelpText<"Alias for --color-diagnostics=always">;
 
 def color_diagnostics_eq: J<"color-diagnostics=">,
   HelpText<"Use colors in diagnostics">,
   MetaVarName<"[auto,always,never]">;
 
 defm cref: B<"cref",
     "Output cross reference table",
     "Do not output cross reference table">;
 
 defm define_common: B<"define-common",
     "Assign space to common symbols",
     "Do not assign space to common symbols">;
 
 defm demangle: B<"demangle",
     "Demangle symbol names (default)",
     "Do not demangle symbol names">;
 
 def disable_new_dtags: F<"disable-new-dtags">,
   HelpText<"Disable new dynamic tags">;
 
 def discard_all: F<"discard-all">, HelpText<"Delete all local symbols">;
 
 def discard_locals: F<"discard-locals">,
   HelpText<"Delete temporary local symbols">;
 
 def discard_none: F<"discard-none">,
   HelpText<"Keep all symbols in the symbol table">;
 
 defm dynamic_linker: Eq<"dynamic-linker", "Which dynamic linker to use">;
 
 defm dynamic_list: Eq<"dynamic-list", "Read a list of dynamic symbols">;
 
 defm eh_frame_hdr: B<"eh-frame-hdr",
     "Request creation of .eh_frame_hdr section and PT_GNU_EH_FRAME segment header",
     "Do not create .eh_frame_hdr section">;
 
 def emit_relocs: F<"emit-relocs">, HelpText<"Generate relocations in output">;
 
 def enable_new_dtags: F<"enable-new-dtags">,
   HelpText<"Enable new dynamic tags (default)">;
 
 def end_group: F<"end-group">,
   HelpText<"Ignored for compatibility with GNU unless you pass --warn-backrefs">;
 
 def end_lib: F<"end-lib">,
   HelpText<"End a grouping of objects that should be treated as if they were together in an archive">;
 
 defm entry: Eq<"entry", "Name of entry point symbol">,
   MetaVarName<"<entry>">;
 
 defm error_limit:
   Eq<"error-limit", "Maximum number of errors to emit before stopping (0 = no limit)">;
 
 def error_unresolved_symbols: F<"error-unresolved-symbols">,
   HelpText<"Report unresolved symbols as errors">;
 
 defm exclude_libs: Eq<"exclude-libs", "Exclude static libraries from automatic export">;
 
 defm execute_only: B<"execute-only",
     "Mark executable sections unreadable",
     "Mark executable sections readable (default)">;
 
 defm export_dynamic: B<"export-dynamic",
     "Put symbols in the dynamic symbol table",
     "Do not put symbols in the dynamic symbol table (default)">;
 
 defm export_dynamic_symbol:
   Eq<"export-dynamic-symbol", "Put a symbol in the dynamic symbol table">;
 
 defm fatal_warnings: B<"fatal-warnings",
     "Treat warnings as errors",
     "Do not treat warnings as errors (default)">;
 
 defm filter: Eq<"filter", "Set DT_FILTER field to the specified name">;
 
 defm fini: Eq<"fini", "Specify a finalizer function">, MetaVarName<"<symbol>">;
 
 def fix_cortex_a53_843419: F<"fix-cortex-a53-843419">,
   HelpText<"Apply fixes for AArch64 Cortex-A53 erratum 843419">;
 
 defm format: Eq<"format", "Change the input format of the inputs following this option">,
   MetaVarName<"[default,elf,binary]">;
 
 defm gc_sections: B<"gc-sections",
     "Enable garbage collection of unused sections",
     "Disable garbage collection of unused sections (default)">;
 
 defm gdb_index: B<"gdb-index",
     "Generate .gdb_index section",
     "Do not generate .gdb_index section (default)">;
 
 defm gnu_unique: B<"gnu-unique",
   "Enable STB_GNU_UNIQUE symbol binding (default)",
   "Disable STB_GNU_UNIQUE symbol binding">;
 
 defm hash_style: Eq<"hash-style", "Specify hash style (sysv, gnu or both)">;
 
 def help: F<"help">, HelpText<"Print option help">;
 
 def icf_all: F<"icf=all">, HelpText<"Enable identical code folding">;
 
 def icf_safe: F<"icf=safe">, HelpText<"Enable safe identical code folding">;
 
 def icf_none: F<"icf=none">, HelpText<"Disable identical code folding (default)">;
 
 def ignore_function_address_equality: F<"ignore-function-address-equality">,
   HelpText<"lld can break the address equality of functions">;
 
 def ignore_data_address_equality: F<"ignore-data-address-equality">,
   HelpText<"lld can break the address equality of data">;
 
 defm image_base: Eq<"image-base", "Set the base address">;
 
 defm init: Eq<"init", "Specify an initializer function">,
   MetaVarName<"<symbol>">;
 
 defm just_symbols: Eq<"just-symbols", "Just link symbols">;
 
 defm keep_unique: Eq<"keep-unique", "Do not fold this symbol during ICF">;
 
 defm library: Eq<"library", "Root name of library to use">,
   MetaVarName<"<libName>">;
 
 def m: JoinedOrSeparate<["-"], "m">, HelpText<"Set target emulation">;
 
 defm Map: Eq<"Map", "Print a link map to the specified file">;
 
 defm merge_exidx_entries: B<"merge-exidx-entries",
     "Enable merging .ARM.exidx entries (default)",
     "Disable merging .ARM.exidx entries">;
 
 def nostdlib: F<"nostdlib">,
   HelpText<"Only search directories specified on the command line">;
 
 def no_color_diagnostics: F<"no-color-diagnostics">,
   HelpText<"Do not use colors in diagnostics">;
 
 def no_dynamic_linker: F<"no-dynamic-linker">,
   HelpText<"Inhibit output of .interp section">;
 
 def noinhibit_exec: F<"noinhibit-exec">,
   HelpText<"Retain the executable output file whenever it is still usable">;
 
 def no_omagic: F<"no-omagic">, MetaVarName<"<magic>">,
   HelpText<"Do not set the text data sections to be writable">;
 
 def no_rosegment: F<"no-rosegment">,
   HelpText<"Do not put read-only non-executable sections in their own segment">;
 
 def no_undefined: F<"no-undefined">,
   HelpText<"Report unresolved symbols even if the linker is creating a shared library">;
 
 def o: JoinedOrSeparate<["-"], "o">, MetaVarName<"<path>">,
   HelpText<"Path to file to write output">;
 
 def oformat: Separate<["--"], "oformat">, MetaVarName<"<format>">,
   HelpText<"Specify the binary format for the output object file">;
 
 def omagic: Flag<["--"], "omagic">, MetaVarName<"<magic>">,
   HelpText<"Set the text and data sections to be readable and writable">;
 
 defm orphan_handling:
   Eq<"orphan-handling", "Control how orphan sections are handled when linker script used">;
 
 defm pack_dyn_relocs:
   Eq<"pack-dyn-relocs", "Pack dynamic relocations in the given format">,
   MetaVarName<"[none,android,relr,android+relr]">;
 
 defm use_android_relr_tags: B<"use-android-relr-tags",
     "Use SHT_ANDROID_RELR / DT_ANDROID_RELR* tags instead of SHT_RELR / DT_RELR*",
     "Use SHT_RELR / DT_RELR* tags (default)">;
 
+def pic_veneer: F<"pic-veneer">,
+  HelpText<"Always generate position independent thunks (veneers)">;
+
 defm pie: B<"pie",
     "Create a position independent executable",
     "Do not create a position independent executable (default)">;
 
 defm print_gc_sections: B<"print-gc-sections",
     "List removed unused sections",
     "Do not list removed unused sections (default)">;
 
 defm print_icf_sections: B<"print-icf-sections",
     "List identical folded sections",
     "Do not list identical folded sections (default)">;
 
 def pop_state: F<"pop-state">,
   HelpText<"Undo the effect of -push-state">;
 
 def push_state: F<"push-state">,
   HelpText<"Save the current state of -as-needed, -static and -whole-archive">;
 
 def print_map: F<"print-map">,
   HelpText<"Print a link map to the standard output">;
 
 defm reproduce: Eq<"reproduce", "Dump linker invocation and input files for debugging">;
 
 defm rpath: Eq<"rpath", "Add a DT_RUNPATH to the output">;
 
 def relocatable: F<"relocatable">, HelpText<"Create relocatable object file">;
 
 defm retain_symbols_file:
   Eq<"retain-symbols-file", "Retain only the symbols listed in the file">,
   MetaVarName<"<file>">;
 
 defm script: Eq<"script", "Read linker script">;
 
 defm section_start: Eq<"section-start", "Set address of section">,
   MetaVarName<"<address>">;
 
 def shared: F<"shared">, HelpText<"Build a shared object">;
 
 defm soname: Eq<"soname", "Set DT_SONAME">;
 
 defm sort_section:
   Eq<"sort-section", "Specifies sections sorting rule when linkerscript is used">;
 
 def start_group: F<"start-group">,
   HelpText<"Ignored for compatibility with GNU unless you pass --warn-backrefs">;
 
 def start_lib: F<"start-lib">,
   HelpText<"Start a grouping of objects that should be treated as if they were together in an archive">;
 
 def strip_all: F<"strip-all">, HelpText<"Strip all symbols">;
 
 def strip_debug: F<"strip-debug">, HelpText<"Strip debugging information">;
 
 defm symbol_ordering_file:
   Eq<"symbol-ordering-file", "Layout sections to place symbols in the order specified by symbol ordering file">;
 
 defm sysroot: Eq<"sysroot", "Set the system root">;
 
 def target1_rel: F<"target1-rel">, HelpText<"Interpret R_ARM_TARGET1 as R_ARM_REL32">;
 
 def target1_abs: F<"target1-abs">, HelpText<"Interpret R_ARM_TARGET1 as R_ARM_ABS32 (default)">;
 
 defm target2:
   Eq<"target2", "Interpret R_ARM_TARGET2 as <type>, where <type> is one of rel, abs, or got-rel">,
   MetaVarName<"<type>">;
 
 defm threads: B<"threads",
     "Run the linker multi-threaded (default)",
     "Do not run the linker multi-threaded">;
 
 defm toc_optimize : B<"toc-optimize",
     "(PowerPC64) Enable TOC related optimizations (default)",
     "(PowerPC64) Disable TOC related optimizations">;
 
 def trace: F<"trace">, HelpText<"Print the names of the input files">;
 
 defm trace_symbol: Eq<"trace-symbol", "Trace references to symbols">;
 
 defm undefined: Eq<"undefined", "Force undefined symbol during linking">,
   MetaVarName<"<symbol>">;
 
 defm unresolved_symbols:
   Eq<"unresolved-symbols", "Determine how to handle unresolved symbols">;
 
 defm undefined_version: B<"undefined-version",
   "Allow unused version in version script (default)",
   "Report version scripts that refer undefined symbols">;
 
 defm rsp_quoting: Eq<"rsp-quoting", "Quoting style for response files">,
   MetaVarName<"[posix,windows]">;
 
 def v: Flag<["-"], "v">, HelpText<"Display the version number">;
 
 def verbose: F<"verbose">, HelpText<"Verbose mode">;
 
 def version: F<"version">, HelpText<"Display the version number and exit">;
 
 defm version_script: Eq<"version-script", "Read a version script">;
 
 defm warn_backrefs: B<"warn-backrefs",
     "Warn about backward symbol references to fetch archive members",
     "Do not warn about backward symbol references to fetch archive members (default)">;
 
 defm warn_common: B<"warn-common",
     "Warn about duplicate common symbols",
     "Do not warn about duplicate common symbols (default)">;
 
 defm warn_ifunc_textrel: B<"warn-ifunc-textrel",
     "Warn about using ifunc symbols with text relocations",
     "Do not warn about using ifunc symbols with text relocations (default)">;
 
 defm warn_symbol_ordering: B<"warn-symbol-ordering",
     "Warn about problems with the symbol ordering file (default)",
     "Do not warn about problems with the symbol ordering file">;
 
 def warn_unresolved_symbols: F<"warn-unresolved-symbols">,
   HelpText<"Report unresolved symbols as warnings">;
 
 defm whole_archive: B<"whole-archive",
     "Force load of all members in a static library",
     "Do not force load of all members in a static library (default)">;
 
 defm wrap: Eq<"wrap", "Use wrapper functions for symbol">,
   MetaVarName<"<symbol>=<symbol>">;
 
 def z: JoinedOrSeparate<["-"], "z">, MetaVarName<"<option>">,
   HelpText<"Linker option extensions">;
 
 // Aliases
 def: Separate<["-"], "f">, Alias<auxiliary>, HelpText<"Alias for --auxiliary">;
 def: F<"call_shared">, Alias<Bdynamic>, HelpText<"Alias for --Bdynamic">;
 def: F<"dy">, Alias<Bdynamic>, HelpText<"Alias for --Bdynamic">;
 def: F<"dn">, Alias<Bstatic>, HelpText<"Alias for --Bstatic">;
 def: F<"non_shared">, Alias<Bstatic>, HelpText<"Alias for --Bstatic">;
 def: F<"static">, Alias<Bstatic>, HelpText<"Alias for --Bstatic">;
 def: Flag<["-"], "d">, Alias<define_common>, HelpText<"Alias for --define-common">;
 def: F<"dc">, Alias<define_common>, HelpText<"Alias for --define-common">;
 def: F<"dp">, Alias<define_common>, HelpText<"Alias for --define-common">;
 def: Flag<["-"], "x">, Alias<discard_all>, HelpText<"Alias for --discard-all">;
 def: Flag<["-"], "X">, Alias<discard_locals>, HelpText<"Alias for --discard-locals">;
 def: Flag<["-"], "q">, Alias<emit_relocs>, HelpText<"Alias for --emit-relocs">;
 def: Flag<["-"], ")">, Alias<end_group>, HelpText<"Alias for --end-group">;
 def: JoinedOrSeparate<["-"], "e">, Alias<entry>, HelpText<"Alias for --entry">;
 def: Flag<["-"], "E">, Alias<export_dynamic>, HelpText<"Alias for --export-dynamic">;
 def: Separate<["-"], "F">, Alias<filter>, HelpText<"Alias for --filter">;
 def: Separate<["-"], "b">, Alias<format>, HelpText<"Alias for --format">;
 def: JoinedOrSeparate<["-"], "l">, Alias<library>, HelpText<"Alias for --library">;
 def: JoinedOrSeparate<["-"], "L">, Alias<library_path>, HelpText<"Alias for --library-path">;
 def: F<"no-pic-executable">, Alias<no_pie>, HelpText<"Alias for --no-pie">;
 def: Flag<["-"], "N">, Alias<omagic>, HelpText<"Alias for --omagic">;
 def: Joined<["--"], "output=">, Alias<o>, HelpText<"Alias for -o">;
 def: Separate<["--"], "output">, Alias<o>, HelpText<"Alias for -o">;
 def: F<"pic-executable">, Alias<pie>, HelpText<"Alias for --pie">;
 def: Flag<["-"], "M">, Alias<print_map>, HelpText<"Alias for --print-map">;
 def: Flag<["-"], "r">, Alias<relocatable>, HelpText<"Alias for --relocatable">;
 def: JoinedOrSeparate<["-"], "R">, Alias<rpath>, HelpText<"Alias for --rpath">;
 def: JoinedOrSeparate<["-"], "T">, Alias<script>, HelpText<"Alias for --script">;
 def: F<"Bshareable">, Alias<shared>, HelpText<"Alias for --shared">;
 def: JoinedOrSeparate<["-"], "h">, Alias<soname>, HelpText<"Alias for --soname">;
 def: Flag<["-"], "(">, Alias<start_group>, HelpText<"Alias for --start-group">;
 def: Flag<["-"], "s">, Alias<strip_all>, HelpText<"Alias for --strip-all">;
 def: Flag<["-"], "S">, Alias<strip_debug>, HelpText<"Alias for --strip-debug">;
 def: Flag<["-"], "t">, Alias<trace>, HelpText<"Alias for --trace">;
 def: JoinedOrSeparate<["-"], "y">, Alias<trace_symbol>, HelpText<"Alias for --trace-symbol">;
 def: Separate<["-", "--"], "Ttext-segment">, Alias<Ttext>, HelpText<"Alias for --Ttext">;
 def: Joined<["-", "--"], "Ttext-segment=">, Alias<Ttext>, HelpText<"Alias for --Ttext">;
 def: JoinedOrSeparate<["-"], "u">, Alias<undefined>, HelpText<"Alias for --undefined">;
 def: Flag<["-"], "V">, Alias<version>, HelpText<"Alias for --version">;
 
 // LTO-related options.
 def lto_aa_pipeline: J<"lto-aa-pipeline=">,
   HelpText<"AA pipeline to run during LTO. Used in conjunction with -lto-newpm-passes">;
 def lto_debug_pass_manager: F<"lto-debug-pass-manager">,
   HelpText<"Debug new pass manager">;
 def lto_new_pass_manager: F<"lto-new-pass-manager">,
   HelpText<"Use new pass manager">;
 def lto_newpm_passes: J<"lto-newpm-passes=">,
   HelpText<"Passes to run during LTO">;
 def lto_O: J<"lto-O">, MetaVarName<"<opt-level>">,
   HelpText<"Optimization level for LTO">;
 def lto_partitions: J<"lto-partitions=">,
   HelpText<"Number of LTO codegen partitions">;
 def lto_sample_profile: J<"lto-sample-profile=">,
   HelpText<"Sample profile file path">;
 def disable_verify: F<"disable-verify">;
 defm mllvm: Eq<"mllvm", "Additional arguments to forward to LLVM's option processing">;
 def opt_remarks_filename: Separate<["--"], "opt-remarks-filename">,
   HelpText<"YAML output file for optimization remarks">;
 def opt_remarks_with_hotness: Flag<["--"], "opt-remarks-with-hotness">,
   HelpText<"Include hotness information in the optimization remarks file">;
 defm plugin_opt: Eq<"plugin-opt", "specifies LTO options for compatibility with GNU linkers">;
 def save_temps: F<"save-temps">;
 def thinlto_cache_dir: J<"thinlto-cache-dir=">,
   HelpText<"Path to ThinLTO cached object file directory">;
 defm thinlto_cache_policy: Eq<"thinlto-cache-policy", "Pruning policy for the ThinLTO cache">;
 def thinlto_jobs: J<"thinlto-jobs=">, HelpText<"Number of ThinLTO jobs">;
 
 def: J<"plugin-opt=O">, Alias<lto_O>, HelpText<"Alias for -lto-O">;
 def: F<"plugin-opt=debug-pass-manager">,
   Alias<lto_debug_pass_manager>, HelpText<"Alias for -lto-debug-pass-manager">;
 def: F<"plugin-opt=disable-verify">, Alias<disable_verify>, HelpText<"Alias for -disable-verify">;
 def plugin_opt_dwo_dir_eq: J<"plugin-opt=dwo_dir=">,
   HelpText<"Directory to store .dwo files when LTO and debug fission are used">;
 def plugin_opt_emit_llvm: F<"plugin-opt=emit-llvm">;
 def: J<"plugin-opt=jobs=">, Alias<thinlto_jobs>, HelpText<"Alias for -thinlto-jobs">;
 def: J<"plugin-opt=lto-partitions=">, Alias<lto_partitions>, HelpText<"Alias for -lto-partitions">;
 def plugin_opt_mcpu_eq: J<"plugin-opt=mcpu=">;
 def: F<"plugin-opt=new-pass-manager">,
   Alias<lto_new_pass_manager>, HelpText<"Alias for -lto-new-pass-manager">;
 def plugin_opt_obj_path_eq: J<"plugin-opt=obj-path=">;
 def: J<"plugin-opt=sample-profile=">,
   Alias<lto_sample_profile>, HelpText<"Alias for -lto-sample-profile">;
 def: F<"plugin-opt=save-temps">, Alias<save_temps>, HelpText<"Alias for -save-temps">;
 def plugin_opt_thinlto_emit_imports_files: F<"plugin-opt=thinlto-emit-imports-files">;
 def plugin_opt_thinlto_index_only: F<"plugin-opt=thinlto-index-only">;
 def plugin_opt_thinlto_index_only_eq: J<"plugin-opt=thinlto-index-only=">;
 def plugin_opt_thinlto_object_suffix_replace_eq: J<"plugin-opt=thinlto-object-suffix-replace=">;
 def plugin_opt_thinlto_prefix_replace_eq: J<"plugin-opt=thinlto-prefix-replace=">;
 
 // Ignore LTO plugin-related options.
 // clang -flto passes -plugin and -plugin-opt to the linker. This is required
 // for ld.gold and ld.bfd to get LTO working. But it's not for lld which doesn't
 // rely on a plugin. Instead of detecting which linker is used on clang side we
 // just ignore the option on lld side as it's easier. In fact, the linker could
 // be called 'ld' and understanding which linker is used would require parsing of
 // --version output.
 defm plugin: Eq<"plugin", "Ignored for compatibility with GNU linkers">;
 
 def plugin_opt_fresolution_eq: J<"plugin-opt=-fresolution=">;
 def plugin_opt_pass_through_eq: J<"plugin-opt=-pass-through=">;
 def plugin_opt_thinlto: J<"plugin-opt=thinlto">;
 def plugin_opt_slash: J<"plugin-opt=/">;
 
 // Options listed below are silently ignored for now for compatibility.
 def: F<"allow-shlib-undefined">;
 def: F<"detect-odr-violations">;
 def: Flag<["-"], "g">;
 def: F<"long-plt">;
 def: F<"no-add-needed">;
 def: F<"no-allow-shlib-undefined">;
 def: F<"no-copy-dt-needed-entries">;
 def: F<"no-ctors-in-init-array">;
 def: F<"no-keep-memory">;
 def: F<"no-mmap-output-file">;
 def: F<"no-warn-mismatch">;
 def: Separate<["--", "-"], "rpath-link">;
 def: J<"rpath-link=">;
 def: F<"sort-common">;
 def: F<"stats">;
 def: F<"warn-execstack">;
 def: F<"warn-once">;
 def: F<"warn-shared-textrel">;
 def: F<"EB">;
 def: F<"EL">;
 def: JoinedOrSeparate<["-"], "G">;
 def: F<"Qy">;
 
 // Hidden option used for testing MIPS multi-GOT implementation.
 defm mips_got_size:
   Eq<"mips-got-size", "Max size of a single MIPS GOT. 0x10000 by default.">,
   Flags<[HelpHidden]>;
Index: vendor/lld/dist-release_80/ELF/Relocations.cpp
===================================================================
--- vendor/lld/dist-release_80/ELF/Relocations.cpp	(revision 343197)
+++ vendor/lld/dist-release_80/ELF/Relocations.cpp	(revision 343198)
@@ -1,1512 +1,1512 @@
 //===- Relocations.cpp ----------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains platform-independent functions to process relocations.
 // I'll describe the overview of this file here.
 //
 // Simple relocations are easy to handle for the linker. For example,
 // for R_X86_64_PC64 relocs, the linker just has to fix up locations
 // with the relative offsets to the target symbols. It would just be
 // reading records from relocation sections and applying them to output.
 //
 // But not all relocations are that easy to handle. For example, for
 // R_386_GOTOFF relocs, the linker has to create new GOT entries for
 // symbols if they don't exist, and fix up locations with GOT entry
 // offsets from the beginning of GOT section. So there is more than
 // fixing addresses in relocation processing.
 //
 // ELF defines a large number of complex relocations.
 //
 // The functions in this file analyze relocations and do whatever needs
 // to be done. It includes, but not limited to, the following.
 //
 //  - create GOT/PLT entries
 //  - create new relocations in .dynsym to let the dynamic linker resolve
 //    them at runtime (since ELF supports dynamic linking, not all
 //    relocations can be resolved at link-time)
 //  - create COPY relocs and reserve space in .bss
 //  - replace expensive relocs (in terms of runtime cost) with cheap ones
 //  - error out infeasible combinations such as PIC and non-relative relocs
 //
 // Note that the functions in this file don't actually apply relocations
 // because it doesn't know about the output file nor the output file buffer.
 // It instead stores Relocation objects to InputSection's Relocations
 // vector to let it apply later in InputSection::writeTo.
 //
 //===----------------------------------------------------------------------===//
 
 #include "Relocations.h"
 #include "Config.h"
 #include "LinkerScript.h"
 #include "OutputSections.h"
 #include "SymbolTable.h"
 #include "Symbols.h"
 #include "SyntheticSections.h"
 #include "Target.h"
 #include "Thunks.h"
 #include "lld/Common/ErrorHandler.h"
 #include "lld/Common/Memory.h"
 #include "lld/Common/Strings.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/raw_ostream.h"
 #include <algorithm>
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
 using namespace llvm::support::endian;
 
 using namespace lld;
 using namespace lld::elf;
 
 static Optional<std::string> getLinkerScriptLocation(const Symbol &Sym) {
   for (BaseCommand *Base : Script->SectionCommands)
     if (auto *Cmd = dyn_cast<SymbolAssignment>(Base))
       if (Cmd->Sym == &Sym)
         return Cmd->Location;
   return None;
 }
 
 // Construct a message in the following format.
 //
 // >>> defined in /home/alice/src/foo.o
 // >>> referenced by bar.c:12 (/home/alice/src/bar.c:12)
 // >>>               /home/alice/src/bar.o:(.text+0x1)
 static std::string getLocation(InputSectionBase &S, const Symbol &Sym,
                                uint64_t Off) {
   std::string Msg = "\n>>> defined in ";
   if (Sym.File)
     Msg += toString(Sym.File);
   else if (Optional<std::string> Loc = getLinkerScriptLocation(Sym))
     Msg += *Loc;
 
   Msg += "\n>>> referenced by ";
   std::string Src = S.getSrcMsg(Sym, Off);
   if (!Src.empty())
     Msg += Src + "\n>>>               ";
   return Msg + S.getObjMsg(Off);
 }
 
 // This function is similar to the `handleTlsRelocation`. MIPS does not
 // support any relaxations for TLS relocations so by factoring out MIPS
 // handling in to the separate function we can simplify the code and do not
 // pollute other `handleTlsRelocation` by MIPS `ifs` statements.
 // Mips has a custom MipsGotSection that handles the writing of GOT entries
 // without dynamic relocations.
 static unsigned handleMipsTlsRelocation(RelType Type, Symbol &Sym,
                                         InputSectionBase &C, uint64_t Offset,
                                         int64_t Addend, RelExpr Expr) {
   if (Expr == R_MIPS_TLSLD) {
     In.MipsGot->addTlsIndex(*C.File);
     C.Relocations.push_back({Expr, Type, Offset, Addend, &Sym});
     return 1;
   }
   if (Expr == R_MIPS_TLSGD) {
     In.MipsGot->addDynTlsEntry(*C.File, Sym);
     C.Relocations.push_back({Expr, Type, Offset, Addend, &Sym});
     return 1;
   }
   return 0;
 }
 
 // This function is similar to the `handleMipsTlsRelocation`. ARM also does not
 // support any relaxations for TLS relocations. ARM is logically similar to Mips
 // in how it handles TLS, but Mips uses its own custom GOT which handles some
 // of the cases that ARM uses GOT relocations for.
 //
 // We look for TLS global dynamic and local dynamic relocations, these may
 // require the generation of a pair of GOT entries that have associated
 // dynamic relocations. When the results of the dynamic relocations can be
 // resolved at static link time we do so. This is necessary for static linking
 // as there will be no dynamic loader to resolve them at load-time.
 //
 // The pair of GOT entries created are of the form
 // GOT[e0] Module Index (Used to find pointer to TLS block at run-time)
 // GOT[e1] Offset of symbol in TLS block
 template <class ELFT>
 static unsigned handleARMTlsRelocation(RelType Type, Symbol &Sym,
                                        InputSectionBase &C, uint64_t Offset,
                                        int64_t Addend, RelExpr Expr) {
   // The Dynamic TLS Module Index Relocation for a symbol defined in an
   // executable is always 1. If the target Symbol is not preemptible then
   // we know the offset into the TLS block at static link time.
   bool NeedDynId = Sym.IsPreemptible || Config->Shared;
   bool NeedDynOff = Sym.IsPreemptible;
 
   auto AddTlsReloc = [&](uint64_t Off, RelType Type, Symbol *Dest, bool Dyn) {
     if (Dyn)
       In.RelaDyn->addReloc(Type, In.Got, Off, Dest);
     else
       In.Got->Relocations.push_back({R_ABS, Type, Off, 0, Dest});
   };
 
   // Local Dynamic is for access to module local TLS variables, while still
   // being suitable for being dynamically loaded via dlopen.
   // GOT[e0] is the module index, with a special value of 0 for the current
   // module. GOT[e1] is unused. There only needs to be one module index entry.
   if (Expr == R_TLSLD_PC && In.Got->addTlsIndex()) {
     AddTlsReloc(In.Got->getTlsIndexOff(), Target->TlsModuleIndexRel,
                 NeedDynId ? nullptr : &Sym, NeedDynId);
     C.Relocations.push_back({Expr, Type, Offset, Addend, &Sym});
     return 1;
   }
 
   // Global Dynamic is the most general purpose access model. When we know
   // the module index and offset of symbol in TLS block we can fill these in
   // using static GOT relocations.
   if (Expr == R_TLSGD_PC) {
     if (In.Got->addDynTlsEntry(Sym)) {
       uint64_t Off = In.Got->getGlobalDynOffset(Sym);
       AddTlsReloc(Off, Target->TlsModuleIndexRel, &Sym, NeedDynId);
       AddTlsReloc(Off + Config->Wordsize, Target->TlsOffsetRel, &Sym,
                   NeedDynOff);
     }
     C.Relocations.push_back({Expr, Type, Offset, Addend, &Sym});
     return 1;
   }
   return 0;
 }
 
 // Returns the number of relocations processed.
 template <class ELFT>
 static unsigned
 handleTlsRelocation(RelType Type, Symbol &Sym, InputSectionBase &C,
                     typename ELFT::uint Offset, int64_t Addend, RelExpr Expr) {
   if (!Sym.isTls())
     return 0;
 
   if (Config->EMachine == EM_ARM)
     return handleARMTlsRelocation<ELFT>(Type, Sym, C, Offset, Addend, Expr);
   if (Config->EMachine == EM_MIPS)
     return handleMipsTlsRelocation(Type, Sym, C, Offset, Addend, Expr);
 
   if (isRelExprOneOf<R_TLSDESC, R_AARCH64_TLSDESC_PAGE, R_TLSDESC_CALL>(Expr) &&
       Config->Shared) {
     if (In.Got->addDynTlsEntry(Sym)) {
       uint64_t Off = In.Got->getGlobalDynOffset(Sym);
       In.RelaDyn->addReloc(
           {Target->TlsDescRel, In.Got, Off, !Sym.IsPreemptible, &Sym, 0});
     }
     if (Expr != R_TLSDESC_CALL)
       C.Relocations.push_back({Expr, Type, Offset, Addend, &Sym});
     return 1;
   }
 
   if (isRelExprOneOf<R_TLSLD_GOT, R_TLSLD_GOT_FROM_END, R_TLSLD_PC,
                      R_TLSLD_HINT>(Expr)) {
     // Local-Dynamic relocs can be relaxed to Local-Exec.
     if (!Config->Shared) {
       C.Relocations.push_back(
           {Target->adjustRelaxExpr(Type, nullptr, R_RELAX_TLS_LD_TO_LE), Type,
            Offset, Addend, &Sym});
       return Target->TlsGdRelaxSkip;
     }
     if (Expr == R_TLSLD_HINT)
       return 1;
     if (In.Got->addTlsIndex())
       In.RelaDyn->addReloc(Target->TlsModuleIndexRel, In.Got,
                            In.Got->getTlsIndexOff(), nullptr);
     C.Relocations.push_back({Expr, Type, Offset, Addend, &Sym});
     return 1;
   }
 
   // Local-Dynamic relocs can be relaxed to Local-Exec.
   if (Expr == R_ABS && !Config->Shared) {
     C.Relocations.push_back(
         {Target->adjustRelaxExpr(Type, nullptr, R_RELAX_TLS_LD_TO_LE), Type,
          Offset, Addend, &Sym});
     return 1;
   }
 
   // Local-Dynamic sequence where offset of tls variable relative to dynamic
   // thread pointer is stored in the got.
   if (Expr == R_TLSLD_GOT_OFF) {
     // Local-Dynamic relocs can be relaxed to local-exec
     if (!Config->Shared) {
       C.Relocations.push_back({R_RELAX_TLS_LD_TO_LE, Type, Offset, Addend, &Sym});
       return 1;
     }
     if (!Sym.isInGot()) {
       In.Got->addEntry(Sym);
       uint64_t Off = Sym.getGotOffset();
       In.Got->Relocations.push_back(
           {R_ABS, Target->TlsOffsetRel, Off, 0, &Sym});
     }
     C.Relocations.push_back({Expr, Type, Offset, Addend, &Sym});
     return 1;
   }
 
   if (isRelExprOneOf<R_TLSDESC, R_AARCH64_TLSDESC_PAGE, R_TLSDESC_CALL,
                      R_TLSGD_GOT, R_TLSGD_GOT_FROM_END, R_TLSGD_PC>(Expr)) {
     if (Config->Shared) {
       if (In.Got->addDynTlsEntry(Sym)) {
         uint64_t Off = In.Got->getGlobalDynOffset(Sym);
         In.RelaDyn->addReloc(Target->TlsModuleIndexRel, In.Got, Off, &Sym);
 
         // If the symbol is preemptible we need the dynamic linker to write
         // the offset too.
         uint64_t OffsetOff = Off + Config->Wordsize;
         if (Sym.IsPreemptible)
           In.RelaDyn->addReloc(Target->TlsOffsetRel, In.Got, OffsetOff, &Sym);
         else
           In.Got->Relocations.push_back(
               {R_ABS, Target->TlsOffsetRel, OffsetOff, 0, &Sym});
       }
       C.Relocations.push_back({Expr, Type, Offset, Addend, &Sym});
       return 1;
     }
 
     // Global-Dynamic relocs can be relaxed to Initial-Exec or Local-Exec
     // depending on the symbol being locally defined or not.
     if (Sym.IsPreemptible) {
       C.Relocations.push_back(
           {Target->adjustRelaxExpr(Type, nullptr, R_RELAX_TLS_GD_TO_IE), Type,
            Offset, Addend, &Sym});
       if (!Sym.isInGot()) {
         In.Got->addEntry(Sym);
         In.RelaDyn->addReloc(Target->TlsGotRel, In.Got, Sym.getGotOffset(),
                              &Sym);
       }
     } else {
       C.Relocations.push_back(
           {Target->adjustRelaxExpr(Type, nullptr, R_RELAX_TLS_GD_TO_LE), Type,
            Offset, Addend, &Sym});
     }
     return Target->TlsGdRelaxSkip;
   }
 
   // Initial-Exec relocs can be relaxed to Local-Exec if the symbol is locally
   // defined.
   if (isRelExprOneOf<R_GOT, R_GOT_FROM_END, R_GOT_PC, R_AARCH64_GOT_PAGE_PC,
                      R_GOT_OFF, R_TLSIE_HINT>(Expr) &&
       !Config->Shared && !Sym.IsPreemptible) {
     C.Relocations.push_back({R_RELAX_TLS_IE_TO_LE, Type, Offset, Addend, &Sym});
     return 1;
   }
 
   if (Expr == R_TLSIE_HINT)
     return 1;
   return 0;
 }
 
 static RelType getMipsPairType(RelType Type, bool IsLocal) {
   switch (Type) {
   case R_MIPS_HI16:
     return R_MIPS_LO16;
   case R_MIPS_GOT16:
     // In case of global symbol, the R_MIPS_GOT16 relocation does not
     // have a pair. Each global symbol has a unique entry in the GOT
     // and a corresponding instruction with help of the R_MIPS_GOT16
     // relocation loads an address of the symbol. In case of local
     // symbol, the R_MIPS_GOT16 relocation creates a GOT entry to hold
     // the high 16 bits of the symbol's value. A paired R_MIPS_LO16
     // relocations handle low 16 bits of the address. That allows
     // to allocate only one GOT entry for every 64 KBytes of local data.
     return IsLocal ? R_MIPS_LO16 : R_MIPS_NONE;
   case R_MICROMIPS_GOT16:
     return IsLocal ? R_MICROMIPS_LO16 : R_MIPS_NONE;
   case R_MIPS_PCHI16:
     return R_MIPS_PCLO16;
   case R_MICROMIPS_HI16:
     return R_MICROMIPS_LO16;
   default:
     return R_MIPS_NONE;
   }
 }
 
 // True if non-preemptable symbol always has the same value regardless of where
 // the DSO is loaded.
 static bool isAbsolute(const Symbol &Sym) {
   if (Sym.isUndefWeak())
     return true;
   if (const auto *DR = dyn_cast<Defined>(&Sym))
     return DR->Section == nullptr; // Absolute symbol.
   return false;
 }
 
 static bool isAbsoluteValue(const Symbol &Sym) {
   return isAbsolute(Sym) || Sym.isTls();
 }
 
 // Returns true if Expr refers a PLT entry.
 static bool needsPlt(RelExpr Expr) {
   return isRelExprOneOf<R_PLT_PC, R_PPC_CALL_PLT, R_PLT, R_AARCH64_PLT_PAGE_PC,
                         R_GOT_PLT, R_AARCH64_GOT_PAGE_PC_PLT>(Expr);
 }
 
 // Returns true if Expr refers a GOT entry. Note that this function
 // returns false for TLS variables even though they need GOT, because
 // TLS variables uses GOT differently than the regular variables.
 static bool needsGot(RelExpr Expr) {
   return isRelExprOneOf<R_GOT, R_GOT_OFF, R_HEXAGON_GOT, R_MIPS_GOT_LOCAL_PAGE,
                         R_MIPS_GOT_OFF, R_MIPS_GOT_OFF32, R_AARCH64_GOT_PAGE_PC,
                         R_AARCH64_GOT_PAGE_PC_PLT, R_GOT_PC, R_GOT_FROM_END,
                         R_GOT_PLT>(Expr);
 }
 
 // True if this expression is of the form Sym - X, where X is a position in the
 // file (PC, or GOT for example).
 static bool isRelExpr(RelExpr Expr) {
   return isRelExprOneOf<R_PC, R_GOTREL, R_GOTREL_FROM_END, R_MIPS_GOTREL,
                         R_PPC_CALL, R_PPC_CALL_PLT, R_AARCH64_PAGE_PC,
-                        R_RELAX_GOT_PC>(Expr);
+                        R_AARCH64_PLT_PAGE_PC, R_RELAX_GOT_PC>(Expr);
 }
 
 // Returns true if a given relocation can be computed at link-time.
 //
 // For instance, we know the offset from a relocation to its target at
 // link-time if the relocation is PC-relative and refers a
 // non-interposable function in the same executable. This function
 // will return true for such relocation.
 //
 // If this function returns false, that means we need to emit a
 // dynamic relocation so that the relocation will be fixed at load-time.
 static bool isStaticLinkTimeConstant(RelExpr E, RelType Type, const Symbol &Sym,
                                      InputSectionBase &S, uint64_t RelOff) {
   // These expressions always compute a constant
   if (isRelExprOneOf<R_GOT_FROM_END, R_GOT_OFF, R_HEXAGON_GOT, R_TLSLD_GOT_OFF,
                      R_MIPS_GOT_LOCAL_PAGE, R_MIPS_GOTREL, R_MIPS_GOT_OFF,
                      R_MIPS_GOT_OFF32, R_MIPS_GOT_GP_PC, R_MIPS_TLSGD,
                      R_AARCH64_GOT_PAGE_PC, R_AARCH64_GOT_PAGE_PC_PLT, R_GOT_PC,
                      R_GOTONLY_PC, R_GOTONLY_PC_FROM_END, R_PLT_PC, R_TLSGD_GOT,
                      R_TLSGD_GOT_FROM_END, R_TLSGD_PC, R_PPC_CALL_PLT,
                      R_TLSDESC_CALL, R_AARCH64_TLSDESC_PAGE, R_HINT,
                      R_TLSLD_HINT, R_TLSIE_HINT>(E))
     return true;
 
   // These never do, except if the entire file is position dependent or if
   // only the low bits are used.
   if (E == R_GOT || E == R_GOT_PLT || E == R_PLT || E == R_TLSDESC)
     return Target->usesOnlyLowPageBits(Type) || !Config->Pic;
 
   if (Sym.IsPreemptible)
     return false;
   if (!Config->Pic)
     return true;
 
   // The size of a non preemptible symbol is a constant.
   if (E == R_SIZE)
     return true;
 
   // For the target and the relocation, we want to know if they are
   // absolute or relative.
   bool AbsVal = isAbsoluteValue(Sym);
   bool RelE = isRelExpr(E);
   if (AbsVal && !RelE)
     return true;
   if (!AbsVal && RelE)
     return true;
   if (!AbsVal && !RelE)
     return Target->usesOnlyLowPageBits(Type);
 
   // Relative relocation to an absolute value. This is normally unrepresentable,
   // but if the relocation refers to a weak undefined symbol, we allow it to
   // resolve to the image base. This is a little strange, but it allows us to
   // link function calls to such symbols. Normally such a call will be guarded
   // with a comparison, which will load a zero from the GOT.
   // Another special case is MIPS _gp_disp symbol which represents offset
   // between start of a function and '_gp' value and defined as absolute just
   // to simplify the code.
   assert(AbsVal && RelE);
   if (Sym.isUndefWeak())
     return true;
 
   error("relocation " + toString(Type) + " cannot refer to absolute symbol: " +
         toString(Sym) + getLocation(S, Sym, RelOff));
   return true;
 }
 
 static RelExpr toPlt(RelExpr Expr) {
   switch (Expr) {
   case R_PPC_CALL:
     return R_PPC_CALL_PLT;
   case R_PC:
     return R_PLT_PC;
   case R_AARCH64_PAGE_PC:
     return R_AARCH64_PLT_PAGE_PC;
   case R_AARCH64_GOT_PAGE_PC:
     return R_AARCH64_GOT_PAGE_PC_PLT;
   case R_ABS:
     return R_PLT;
   case R_GOT:
     return R_GOT_PLT;
   default:
     return Expr;
   }
 }
 
 static RelExpr fromPlt(RelExpr Expr) {
   // We decided not to use a plt. Optimize a reference to the plt to a
   // reference to the symbol itself.
   switch (Expr) {
   case R_PLT_PC:
     return R_PC;
   case R_PPC_CALL_PLT:
     return R_PPC_CALL;
   case R_PLT:
     return R_ABS;
   default:
     return Expr;
   }
 }
 
 // Returns true if a given shared symbol is in a read-only segment in a DSO.
 template <class ELFT> static bool isReadOnly(SharedSymbol &SS) {
   typedef typename ELFT::Phdr Elf_Phdr;
 
   // Determine if the symbol is read-only by scanning the DSO's program headers.
   const SharedFile<ELFT> &File = SS.getFile<ELFT>();
   for (const Elf_Phdr &Phdr : check(File.getObj().program_headers()))
     if ((Phdr.p_type == ELF::PT_LOAD || Phdr.p_type == ELF::PT_GNU_RELRO) &&
         !(Phdr.p_flags & ELF::PF_W) && SS.Value >= Phdr.p_vaddr &&
         SS.Value < Phdr.p_vaddr + Phdr.p_memsz)
       return true;
   return false;
 }
 
 // Returns symbols at the same offset as a given symbol, including SS itself.
 //
 // If two or more symbols are at the same offset, and at least one of
 // them are copied by a copy relocation, all of them need to be copied.
 // Otherwise, they would refer to different places at runtime.
 template <class ELFT>
 static SmallSet<SharedSymbol *, 4> getSymbolsAt(SharedSymbol &SS) {
   typedef typename ELFT::Sym Elf_Sym;
 
   SharedFile<ELFT> &File = SS.getFile<ELFT>();
 
   SmallSet<SharedSymbol *, 4> Ret;
   for (const Elf_Sym &S : File.getGlobalELFSyms()) {
     if (S.st_shndx == SHN_UNDEF || S.st_shndx == SHN_ABS ||
         S.getType() == STT_TLS || S.st_value != SS.Value)
       continue;
     StringRef Name = check(S.getName(File.getStringTable()));
     Symbol *Sym = Symtab->find(Name);
     if (auto *Alias = dyn_cast_or_null<SharedSymbol>(Sym))
       Ret.insert(Alias);
   }
   return Ret;
 }
 
 // When a symbol is copy relocated or we create a canonical plt entry, it is
 // effectively a defined symbol. In the case of copy relocation the symbol is
 // in .bss and in the case of a canonical plt entry it is in .plt. This function
 // replaces the existing symbol with a Defined pointing to the appropriate
 // location.
 static void replaceWithDefined(Symbol &Sym, SectionBase *Sec, uint64_t Value,
                                uint64_t Size) {
   Symbol Old = Sym;
   replaceSymbol<Defined>(&Sym, Sym.File, Sym.getName(), Sym.Binding,
                          Sym.StOther, Sym.Type, Value, Size, Sec);
   Sym.PltIndex = Old.PltIndex;
   Sym.GotIndex = Old.GotIndex;
   Sym.VerdefIndex = Old.VerdefIndex;
   Sym.PPC64BranchltIndex = Old.PPC64BranchltIndex;
   Sym.IsPreemptible = true;
   Sym.ExportDynamic = true;
   Sym.IsUsedInRegularObj = true;
   Sym.Used = true;
 }
 
 // Reserve space in .bss or .bss.rel.ro for copy relocation.
 //
 // The copy relocation is pretty much a hack. If you use a copy relocation
 // in your program, not only the symbol name but the symbol's size, RW/RO
 // bit and alignment become part of the ABI. In addition to that, if the
 // symbol has aliases, the aliases become part of the ABI. That's subtle,
 // but if you violate that implicit ABI, that can cause very counter-
 // intuitive consequences.
 //
 // So, what is the copy relocation? It's for linking non-position
 // independent code to DSOs. In an ideal world, all references to data
 // exported by DSOs should go indirectly through GOT. But if object files
 // are compiled as non-PIC, all data references are direct. There is no
 // way for the linker to transform the code to use GOT, as machine
 // instructions are already set in stone in object files. This is where
 // the copy relocation takes a role.
 //
 // A copy relocation instructs the dynamic linker to copy data from a DSO
 // to a specified address (which is usually in .bss) at load-time. If the
 // static linker (that's us) finds a direct data reference to a DSO
 // symbol, it creates a copy relocation, so that the symbol can be
 // resolved as if it were in .bss rather than in a DSO.
 //
 // As you can see in this function, we create a copy relocation for the
 // dynamic linker, and the relocation contains not only symbol name but
 // various other informtion about the symbol. So, such attributes become a
 // part of the ABI.
 //
 // Note for application developers: I can give you a piece of advice if
 // you are writing a shared library. You probably should export only
 // functions from your library. You shouldn't export variables.
 //
 // As an example what can happen when you export variables without knowing
 // the semantics of copy relocations, assume that you have an exported
 // variable of type T. It is an ABI-breaking change to add new members at
 // end of T even though doing that doesn't change the layout of the
 // existing members. That's because the space for the new members are not
 // reserved in .bss unless you recompile the main program. That means they
 // are likely to overlap with other data that happens to be laid out next
 // to the variable in .bss. This kind of issue is sometimes very hard to
 // debug. What's a solution? Instead of exporting a varaible V from a DSO,
 // define an accessor getV().
 template <class ELFT> static void addCopyRelSymbol(SharedSymbol &SS) {
   // Copy relocation against zero-sized symbol doesn't make sense.
   uint64_t SymSize = SS.getSize();
   if (SymSize == 0 || SS.Alignment == 0)
     fatal("cannot create a copy relocation for symbol " + toString(SS));
 
   // See if this symbol is in a read-only segment. If so, preserve the symbol's
   // memory protection by reserving space in the .bss.rel.ro section.
   bool IsReadOnly = isReadOnly<ELFT>(SS);
   BssSection *Sec = make<BssSection>(IsReadOnly ? ".bss.rel.ro" : ".bss",
                                      SymSize, SS.Alignment);
   if (IsReadOnly)
     In.BssRelRo->getParent()->addSection(Sec);
   else
     In.Bss->getParent()->addSection(Sec);
 
   // Look through the DSO's dynamic symbol table for aliases and create a
   // dynamic symbol for each one. This causes the copy relocation to correctly
   // interpose any aliases.
   for (SharedSymbol *Sym : getSymbolsAt<ELFT>(SS))
     replaceWithDefined(*Sym, Sec, 0, Sym->Size);
 
   In.RelaDyn->addReloc(Target->CopyRel, Sec, 0, &SS);
 }
 
 // MIPS has an odd notion of "paired" relocations to calculate addends.
 // For example, if a relocation is of R_MIPS_HI16, there must be a
 // R_MIPS_LO16 relocation after that, and an addend is calculated using
 // the two relocations.
 template <class ELFT, class RelTy>
 static int64_t computeMipsAddend(const RelTy &Rel, const RelTy *End,
                                  InputSectionBase &Sec, RelExpr Expr,
                                  bool IsLocal) {
   if (Expr == R_MIPS_GOTREL && IsLocal)
     return Sec.getFile<ELFT>()->MipsGp0;
 
   // The ABI says that the paired relocation is used only for REL.
   // See p. 4-17 at ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
   if (RelTy::IsRela)
     return 0;
 
   RelType Type = Rel.getType(Config->IsMips64EL);
   uint32_t PairTy = getMipsPairType(Type, IsLocal);
   if (PairTy == R_MIPS_NONE)
     return 0;
 
   const uint8_t *Buf = Sec.data().data();
   uint32_t SymIndex = Rel.getSymbol(Config->IsMips64EL);
 
   // To make things worse, paired relocations might not be contiguous in
   // the relocation table, so we need to do linear search. *sigh*
   for (const RelTy *RI = &Rel; RI != End; ++RI)
     if (RI->getType(Config->IsMips64EL) == PairTy &&
         RI->getSymbol(Config->IsMips64EL) == SymIndex)
       return Target->getImplicitAddend(Buf + RI->r_offset, PairTy);
 
   warn("can't find matching " + toString(PairTy) + " relocation for " +
        toString(Type));
   return 0;
 }
 
 // Returns an addend of a given relocation. If it is RELA, an addend
 // is in a relocation itself. If it is REL, we need to read it from an
 // input section.
 template <class ELFT, class RelTy>
 static int64_t computeAddend(const RelTy &Rel, const RelTy *End,
                              InputSectionBase &Sec, RelExpr Expr,
                              bool IsLocal) {
   int64_t Addend;
   RelType Type = Rel.getType(Config->IsMips64EL);
 
   if (RelTy::IsRela) {
     Addend = getAddend<ELFT>(Rel);
   } else {
     const uint8_t *Buf = Sec.data().data();
     Addend = Target->getImplicitAddend(Buf + Rel.r_offset, Type);
   }
 
   if (Config->EMachine == EM_PPC64 && Config->Pic && Type == R_PPC64_TOC)
     Addend += getPPC64TocBase();
   if (Config->EMachine == EM_MIPS)
     Addend += computeMipsAddend<ELFT>(Rel, End, Sec, Expr, IsLocal);
 
   return Addend;
 }
 
 // Report an undefined symbol if necessary.
 // Returns true if this function printed out an error message.
 static bool maybeReportUndefined(Symbol &Sym, InputSectionBase &Sec,
                                  uint64_t Offset) {
   if (Sym.isLocal() || !Sym.isUndefined() || Sym.isWeak())
     return false;
 
   bool CanBeExternal =
       Sym.computeBinding() != STB_LOCAL && Sym.Visibility == STV_DEFAULT;
   if (Config->UnresolvedSymbols == UnresolvedPolicy::Ignore && CanBeExternal)
     return false;
 
   std::string Msg =
       "undefined symbol: " + toString(Sym) + "\n>>> referenced by ";
 
   std::string Src = Sec.getSrcMsg(Sym, Offset);
   if (!Src.empty())
     Msg += Src + "\n>>>               ";
   Msg += Sec.getObjMsg(Offset);
 
   if (Sym.getName().startswith("_ZTV"))
     Msg += "\nthe vtable symbol may be undefined because the class is missing "
            "its key function (see https://lld.llvm.org/missingkeyfunction)";
 
   if ((Config->UnresolvedSymbols == UnresolvedPolicy::Warn && CanBeExternal) ||
       Config->NoinhibitExec) {
     warn(Msg);
     return false;
   }
 
   error(Msg);
   return true;
 }
 
 // MIPS N32 ABI treats series of successive relocations with the same offset
 // as a single relocation. The similar approach used by N64 ABI, but this ABI
 // packs all relocations into the single relocation record. Here we emulate
 // this for the N32 ABI. Iterate over relocation with the same offset and put
 // theirs types into the single bit-set.
 template <class RelTy> static RelType getMipsN32RelType(RelTy *&Rel, RelTy *End) {
   RelType Type = 0;
   uint64_t Offset = Rel->r_offset;
 
   int N = 0;
   while (Rel != End && Rel->r_offset == Offset)
     Type |= (Rel++)->getType(Config->IsMips64EL) << (8 * N++);
   return Type;
 }
 
 // .eh_frame sections are mergeable input sections, so their input
 // offsets are not linearly mapped to output section. For each input
 // offset, we need to find a section piece containing the offset and
 // add the piece's base address to the input offset to compute the
 // output offset. That isn't cheap.
 //
 // This class is to speed up the offset computation. When we process
 // relocations, we access offsets in the monotonically increasing
 // order. So we can optimize for that access pattern.
 //
 // For sections other than .eh_frame, this class doesn't do anything.
 namespace {
 class OffsetGetter {
 public:
   explicit OffsetGetter(InputSectionBase &Sec) {
     if (auto *Eh = dyn_cast<EhInputSection>(&Sec))
       Pieces = Eh->Pieces;
   }
 
   // Translates offsets in input sections to offsets in output sections.
   // Given offset must increase monotonically. We assume that Piece is
   // sorted by InputOff.
   uint64_t get(uint64_t Off) {
     if (Pieces.empty())
       return Off;
 
     while (I != Pieces.size() && Pieces[I].InputOff + Pieces[I].Size <= Off)
       ++I;
     if (I == Pieces.size())
       fatal(".eh_frame: relocation is not in any piece");
 
     // Pieces must be contiguous, so there must be no holes in between.
     assert(Pieces[I].InputOff <= Off && "Relocation not in any piece");
 
     // Offset -1 means that the piece is dead (i.e. garbage collected).
     if (Pieces[I].OutputOff == -1)
       return -1;
     return Pieces[I].OutputOff + Off - Pieces[I].InputOff;
   }
 
 private:
   ArrayRef<EhSectionPiece> Pieces;
   size_t I = 0;
 };
 } // namespace
 
 static void addRelativeReloc(InputSectionBase *IS, uint64_t OffsetInSec,
                              Symbol *Sym, int64_t Addend, RelExpr Expr,
                              RelType Type) {
   // Add a relative relocation. If RelrDyn section is enabled, and the
   // relocation offset is guaranteed to be even, add the relocation to
   // the RelrDyn section, otherwise add it to the RelaDyn section.
   // RelrDyn sections don't support odd offsets. Also, RelrDyn sections
   // don't store the addend values, so we must write it to the relocated
   // address.
   if (In.RelrDyn && IS->Alignment >= 2 && OffsetInSec % 2 == 0) {
     IS->Relocations.push_back({Expr, Type, OffsetInSec, Addend, Sym});
     In.RelrDyn->Relocs.push_back({IS, OffsetInSec});
     return;
   }
   In.RelaDyn->addReloc(Target->RelativeRel, IS, OffsetInSec, Sym, Addend, Expr,
                        Type);
 }
 
 template <class ELFT, class GotPltSection>
 static void addPltEntry(PltSection *Plt, GotPltSection *GotPlt,
                         RelocationBaseSection *Rel, RelType Type, Symbol &Sym) {
   Plt->addEntry<ELFT>(Sym);
   GotPlt->addEntry(Sym);
   Rel->addReloc(
       {Type, GotPlt, Sym.getGotPltOffset(), !Sym.IsPreemptible, &Sym, 0});
 }
 
 template <class ELFT> static void addGotEntry(Symbol &Sym) {
   In.Got->addEntry(Sym);
 
   RelExpr Expr;
   if (Sym.isTls())
     Expr = R_TLS;
   else if (Sym.isGnuIFunc())
     Expr = R_PLT;
   else
     Expr = R_ABS;
 
   uint64_t Off = Sym.getGotOffset();
 
   // If a GOT slot value can be calculated at link-time, which is now,
   // we can just fill that out.
   //
   // (We don't actually write a value to a GOT slot right now, but we
   // add a static relocation to a Relocations vector so that
   // InputSection::relocate will do the work for us. We may be able
   // to just write a value now, but it is a TODO.)
   bool IsLinkTimeConstant =
       !Sym.IsPreemptible && (!Config->Pic || isAbsolute(Sym));
   if (IsLinkTimeConstant) {
     In.Got->Relocations.push_back({Expr, Target->GotRel, Off, 0, &Sym});
     return;
   }
 
   // Otherwise, we emit a dynamic relocation to .rel[a].dyn so that
   // the GOT slot will be fixed at load-time.
   if (!Sym.isTls() && !Sym.IsPreemptible && Config->Pic && !isAbsolute(Sym)) {
     addRelativeReloc(In.Got, Off, &Sym, 0, R_ABS, Target->GotRel);
     return;
   }
   In.RelaDyn->addReloc(Sym.isTls() ? Target->TlsGotRel : Target->GotRel, In.Got,
                        Off, &Sym, 0, Sym.IsPreemptible ? R_ADDEND : R_ABS,
                        Target->GotRel);
 }
 
 // Return true if we can define a symbol in the executable that
 // contains the value/function of a symbol defined in a shared
 // library.
 static bool canDefineSymbolInExecutable(Symbol &Sym) {
   // If the symbol has default visibility the symbol defined in the
   // executable will preempt it.
   // Note that we want the visibility of the shared symbol itself, not
   // the visibility of the symbol in the output file we are producing. That is
   // why we use Sym.StOther.
   if ((Sym.StOther & 0x3) == STV_DEFAULT)
     return true;
 
   // If we are allowed to break address equality of functions, defining
   // a plt entry will allow the program to call the function in the
   // .so, but the .so and the executable will no agree on the address
   // of the function. Similar logic for objects.
   return ((Sym.isFunc() && Config->IgnoreFunctionAddressEquality) ||
           (Sym.isObject() && Config->IgnoreDataAddressEquality));
 }
 
 // The reason we have to do this early scan is as follows
 // * To mmap the output file, we need to know the size
 // * For that, we need to know how many dynamic relocs we will have.
 // It might be possible to avoid this by outputting the file with write:
 // * Write the allocated output sections, computing addresses.
 // * Apply relocations, recording which ones require a dynamic reloc.
 // * Write the dynamic relocations.
 // * Write the rest of the file.
 // This would have some drawbacks. For example, we would only know if .rela.dyn
 // is needed after applying relocations. If it is, it will go after rw and rx
 // sections. Given that it is ro, we will need an extra PT_LOAD. This
 // complicates things for the dynamic linker and means we would have to reserve
 // space for the extra PT_LOAD even if we end up not using it.
 template <class ELFT, class RelTy>
 static void processRelocAux(InputSectionBase &Sec, RelExpr Expr, RelType Type,
                             uint64_t Offset, Symbol &Sym, const RelTy &Rel,
                             int64_t Addend) {
   if (isStaticLinkTimeConstant(Expr, Type, Sym, Sec, Offset)) {
     Sec.Relocations.push_back({Expr, Type, Offset, Addend, &Sym});
     return;
   }
   bool CanWrite = (Sec.Flags & SHF_WRITE) || !Config->ZText;
   if (CanWrite) {
     // R_GOT refers to a position in the got, even if the symbol is preemptible.
     bool IsPreemptibleValue = Sym.IsPreemptible && Expr != R_GOT;
 
     if (!IsPreemptibleValue) {
       addRelativeReloc(&Sec, Offset, &Sym, Addend, Expr, Type);
       return;
     } else if (RelType Rel = Target->getDynRel(Type)) {
       In.RelaDyn->addReloc(Rel, &Sec, Offset, &Sym, Addend, R_ADDEND, Type);
 
       // MIPS ABI turns using of GOT and dynamic relocations inside out.
       // While regular ABI uses dynamic relocations to fill up GOT entries
       // MIPS ABI requires dynamic linker to fills up GOT entries using
       // specially sorted dynamic symbol table. This affects even dynamic
       // relocations against symbols which do not require GOT entries
       // creation explicitly, i.e. do not have any GOT-relocations. So if
       // a preemptible symbol has a dynamic relocation we anyway have
       // to create a GOT entry for it.
       // If a non-preemptible symbol has a dynamic relocation against it,
       // dynamic linker takes it st_value, adds offset and writes down
       // result of the dynamic relocation. In case of preemptible symbol
       // dynamic linker performs symbol resolution, writes the symbol value
       // to the GOT entry and reads the GOT entry when it needs to perform
       // a dynamic relocation.
       // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf p.4-19
       if (Config->EMachine == EM_MIPS)
         In.MipsGot->addEntry(*Sec.File, Sym, Addend, Expr);
       return;
     }
   }
 
   // If the relocation is to a weak undef, and we are producing
   // executable, give up on it and produce a non preemptible 0.
   if (!Config->Shared && Sym.isUndefWeak()) {
     Sec.Relocations.push_back({Expr, Type, Offset, Addend, &Sym});
     return;
   }
 
   if (!CanWrite && (Config->Pic && !isRelExpr(Expr))) {
     error(
         "can't create dynamic relocation " + toString(Type) + " against " +
         (Sym.getName().empty() ? "local symbol" : "symbol: " + toString(Sym)) +
         " in readonly segment; recompile object files with -fPIC "
         "or pass '-Wl,-z,notext' to allow text relocations in the output" +
         getLocation(Sec, Sym, Offset));
     return;
   }
 
   // Copy relocations are only possible if we are creating an executable.
   if (Config->Shared) {
     errorOrWarn("relocation " + toString(Type) +
                 " cannot be used against symbol " + toString(Sym) +
                 "; recompile with -fPIC" + getLocation(Sec, Sym, Offset));
     return;
   }
 
   // If the symbol is undefined we already reported any relevant errors.
   if (Sym.isUndefined())
     return;
 
   if (!canDefineSymbolInExecutable(Sym)) {
     error("cannot preempt symbol: " + toString(Sym) +
           getLocation(Sec, Sym, Offset));
     return;
   }
 
   if (Sym.isObject()) {
     // Produce a copy relocation.
     if (auto *SS = dyn_cast<SharedSymbol>(&Sym)) {
       if (!Config->ZCopyreloc)
         error("unresolvable relocation " + toString(Type) +
               " against symbol '" + toString(*SS) +
               "'; recompile with -fPIC or remove '-z nocopyreloc'" +
               getLocation(Sec, Sym, Offset));
       addCopyRelSymbol<ELFT>(*SS);
     }
     Sec.Relocations.push_back({Expr, Type, Offset, Addend, &Sym});
     return;
   }
 
   if (Sym.isFunc()) {
     // This handles a non PIC program call to function in a shared library. In
     // an ideal world, we could just report an error saying the relocation can
     // overflow at runtime. In the real world with glibc, crt1.o has a
     // R_X86_64_PC32 pointing to libc.so.
     //
     // The general idea on how to handle such cases is to create a PLT entry and
     // use that as the function value.
     //
     // For the static linking part, we just return a plt expr and everything
     // else will use the PLT entry as the address.
     //
     // The remaining problem is making sure pointer equality still works. We
     // need the help of the dynamic linker for that. We let it know that we have
     // a direct reference to a so symbol by creating an undefined symbol with a
     // non zero st_value. Seeing that, the dynamic linker resolves the symbol to
     // the value of the symbol we created. This is true even for got entries, so
     // pointer equality is maintained. To avoid an infinite loop, the only entry
     // that points to the real function is a dedicated got entry used by the
     // plt. That is identified by special relocation types (R_X86_64_JUMP_SLOT,
     // R_386_JMP_SLOT, etc).
 
     // For position independent executable on i386, the plt entry requires ebx
     // to be set. This causes two problems:
     // * If some code has a direct reference to a function, it was probably
     //   compiled without -fPIE/-fPIC and doesn't maintain ebx.
     // * If a library definition gets preempted to the executable, it will have
     //   the wrong ebx value.
     if (Config->Pie && Config->EMachine == EM_386)
       errorOrWarn("symbol '" + toString(Sym) +
                   "' cannot be preempted; recompile with -fPIE" +
                   getLocation(Sec, Sym, Offset));
     if (!Sym.isInPlt())
       addPltEntry<ELFT>(In.Plt, In.GotPlt, In.RelaPlt, Target->PltRel, Sym);
     if (!Sym.isDefined())
       replaceWithDefined(Sym, In.Plt, getPltEntryOffset(Sym.PltIndex), 0);
     Sym.NeedsPltAddr = true;
     Sec.Relocations.push_back({Expr, Type, Offset, Addend, &Sym});
     return;
   }
 
   errorOrWarn("symbol '" + toString(Sym) + "' has no type" +
               getLocation(Sec, Sym, Offset));
 }
 
 template <class ELFT, class RelTy>
 static void scanReloc(InputSectionBase &Sec, OffsetGetter &GetOffset, RelTy *&I,
                       RelTy *End) {
   const RelTy &Rel = *I;
   Symbol &Sym = Sec.getFile<ELFT>()->getRelocTargetSym(Rel);
   RelType Type;
 
   // Deal with MIPS oddity.
   if (Config->MipsN32Abi) {
     Type = getMipsN32RelType(I, End);
   } else {
     Type = Rel.getType(Config->IsMips64EL);
     ++I;
   }
 
   // Get an offset in an output section this relocation is applied to.
   uint64_t Offset = GetOffset.get(Rel.r_offset);
   if (Offset == uint64_t(-1))
     return;
 
   // Skip if the target symbol is an erroneous undefined symbol.
   if (maybeReportUndefined(Sym, Sec, Rel.r_offset))
     return;
 
   const uint8_t *RelocatedAddr = Sec.data().begin() + Rel.r_offset;
   RelExpr Expr = Target->getRelExpr(Type, Sym, RelocatedAddr);
 
   // Ignore "hint" relocations because they are only markers for relaxation.
   if (isRelExprOneOf<R_HINT, R_NONE>(Expr))
     return;
 
   // Strenghten or relax relocations.
   //
   // GNU ifunc symbols must be accessed via PLT because their addresses
   // are determined by runtime.
   //
   // On the other hand, if we know that a PLT entry will be resolved within
   // the same ELF module, we can skip PLT access and directly jump to the
   // destination function. For example, if we are linking a main exectuable,
   // all dynamic symbols that can be resolved within the executable will
   // actually be resolved that way at runtime, because the main exectuable
   // is always at the beginning of a search list. We can leverage that fact.
   if (Sym.isGnuIFunc()) {
     if (!Config->ZText && Config->WarnIfuncTextrel) {
       warn("using ifunc symbols when text relocations are allowed may produce "
            "a binary that will segfault, if the object file is linked with "
            "old version of glibc (glibc 2.28 and earlier). If this applies to "
            "you, consider recompiling the object files without -fPIC and "
            "without -Wl,-z,notext option. Use -no-warn-ifunc-textrel to "
            "turn off this warning." +
            getLocation(Sec, Sym, Offset));
     }
     Expr = toPlt(Expr);
   } else if (!Sym.IsPreemptible && Expr == R_GOT_PC && !isAbsoluteValue(Sym)) {
     Expr = Target->adjustRelaxExpr(Type, RelocatedAddr, Expr);
   } else if (!Sym.IsPreemptible) {
     Expr = fromPlt(Expr);
   }
 
   // This relocation does not require got entry, but it is relative to got and
   // needs it to be created. Here we request for that.
   if (isRelExprOneOf<R_GOTONLY_PC, R_GOTONLY_PC_FROM_END, R_GOTREL,
                      R_GOTREL_FROM_END, R_PPC_TOC>(Expr))
     In.Got->HasGotOffRel = true;
 
   // Read an addend.
   int64_t Addend = computeAddend<ELFT>(Rel, End, Sec, Expr, Sym.isLocal());
 
   // Process some TLS relocations, including relaxing TLS relocations.
   // Note that this function does not handle all TLS relocations.
   if (unsigned Processed =
           handleTlsRelocation<ELFT>(Type, Sym, Sec, Offset, Addend, Expr)) {
     I += (Processed - 1);
     return;
   }
 
   // If a relocation needs PLT, we create PLT and GOTPLT slots for the symbol.
   if (needsPlt(Expr) && !Sym.isInPlt()) {
     if (Sym.isGnuIFunc() && !Sym.IsPreemptible)
       addPltEntry<ELFT>(In.Iplt, In.IgotPlt, In.RelaIplt, Target->IRelativeRel,
                         Sym);
     else
       addPltEntry<ELFT>(In.Plt, In.GotPlt, In.RelaPlt, Target->PltRel, Sym);
   }
 
   // Create a GOT slot if a relocation needs GOT.
   if (needsGot(Expr)) {
     if (Config->EMachine == EM_MIPS) {
       // MIPS ABI has special rules to process GOT entries and doesn't
       // require relocation entries for them. A special case is TLS
       // relocations. In that case dynamic loader applies dynamic
       // relocations to initialize TLS GOT entries.
       // See "Global Offset Table" in Chapter 5 in the following document
       // for detailed description:
       // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
       In.MipsGot->addEntry(*Sec.File, Sym, Addend, Expr);
     } else if (!Sym.isInGot()) {
       addGotEntry<ELFT>(Sym);
     }
   }
 
   processRelocAux<ELFT>(Sec, Expr, Type, Offset, Sym, Rel, Addend);
 }
 
 template <class ELFT, class RelTy>
 static void scanRelocs(InputSectionBase &Sec, ArrayRef<RelTy> Rels) {
   OffsetGetter GetOffset(Sec);
 
   // Not all relocations end up in Sec.Relocations, but a lot do.
   Sec.Relocations.reserve(Rels.size());
 
   for (auto I = Rels.begin(), End = Rels.end(); I != End;)
     scanReloc<ELFT>(Sec, GetOffset, I, End);
 
   // Sort relocations by offset to binary search for R_RISCV_PCREL_HI20
   if (Config->EMachine == EM_RISCV)
     std::stable_sort(Sec.Relocations.begin(), Sec.Relocations.end(),
                      RelocationOffsetComparator{});
 }
 
 template <class ELFT> void elf::scanRelocations(InputSectionBase &S) {
   if (S.AreRelocsRela)
     scanRelocs<ELFT>(S, S.relas<ELFT>());
   else
     scanRelocs<ELFT>(S, S.rels<ELFT>());
 }
 
 static bool mergeCmp(const InputSection *A, const InputSection *B) {
   // std::merge requires a strict weak ordering.
   if (A->OutSecOff < B->OutSecOff)
     return true;
 
   if (A->OutSecOff == B->OutSecOff) {
     auto *TA = dyn_cast<ThunkSection>(A);
     auto *TB = dyn_cast<ThunkSection>(B);
 
     // Check if Thunk is immediately before any specific Target
     // InputSection for example Mips LA25 Thunks.
     if (TA && TA->getTargetInputSection() == B)
       return true;
 
     // Place Thunk Sections without specific targets before
     // non-Thunk Sections.
     if (TA && !TB && !TA->getTargetInputSection())
       return true;
   }
 
   return false;
 }
 
 // Call Fn on every executable InputSection accessed via the linker script
 // InputSectionDescription::Sections.
 static void forEachInputSectionDescription(
     ArrayRef<OutputSection *> OutputSections,
     llvm::function_ref<void(OutputSection *, InputSectionDescription *)> Fn) {
   for (OutputSection *OS : OutputSections) {
     if (!(OS->Flags & SHF_ALLOC) || !(OS->Flags & SHF_EXECINSTR))
       continue;
     for (BaseCommand *BC : OS->SectionCommands)
       if (auto *ISD = dyn_cast<InputSectionDescription>(BC))
         Fn(OS, ISD);
   }
 }
 
 // Thunk Implementation
 //
 // Thunks (sometimes called stubs, veneers or branch islands) are small pieces
 // of code that the linker inserts inbetween a caller and a callee. The thunks
 // are added at link time rather than compile time as the decision on whether
 // a thunk is needed, such as the caller and callee being out of range, can only
 // be made at link time.
 //
 // It is straightforward to tell given the current state of the program when a
 // thunk is needed for a particular call. The more difficult part is that
 // the thunk needs to be placed in the program such that the caller can reach
 // the thunk and the thunk can reach the callee; furthermore, adding thunks to
 // the program alters addresses, which can mean more thunks etc.
 //
 // In lld we have a synthetic ThunkSection that can hold many Thunks.
 // The decision to have a ThunkSection act as a container means that we can
 // more easily handle the most common case of a single block of contiguous
 // Thunks by inserting just a single ThunkSection.
 //
 // The implementation of Thunks in lld is split across these areas
 // Relocations.cpp : Framework for creating and placing thunks
 // Thunks.cpp : The code generated for each supported thunk
 // Target.cpp : Target specific hooks that the framework uses to decide when
 //              a thunk is used
 // Synthetic.cpp : Implementation of ThunkSection
 // Writer.cpp : Iteratively call framework until no more Thunks added
 //
 // Thunk placement requirements:
 // Mips LA25 thunks. These must be placed immediately before the callee section
 // We can assume that the caller is in range of the Thunk. These are modelled
 // by Thunks that return the section they must precede with
 // getTargetInputSection().
 //
 // ARM interworking and range extension thunks. These thunks must be placed
 // within range of the caller. All implemented ARM thunks can always reach the
 // callee as they use an indirect jump via a register that has no range
 // restrictions.
 //
 // Thunk placement algorithm:
 // For Mips LA25 ThunkSections; the placement is explicit, it has to be before
 // getTargetInputSection().
 //
 // For thunks that must be placed within range of the caller there are many
 // possible choices given that the maximum range from the caller is usually
 // much larger than the average InputSection size. Desirable properties include:
 // - Maximize reuse of thunks by multiple callers
 // - Minimize number of ThunkSections to simplify insertion
 // - Handle impact of already added Thunks on addresses
 // - Simple to understand and implement
 //
 // In lld for the first pass, we pre-create one or more ThunkSections per
 // InputSectionDescription at Target specific intervals. A ThunkSection is
 // placed so that the estimated end of the ThunkSection is within range of the
 // start of the InputSectionDescription or the previous ThunkSection. For
 // example:
 // InputSectionDescription
 // Section 0
 // ...
 // Section N
 // ThunkSection 0
 // Section N + 1
 // ...
 // Section N + K
 // Thunk Section 1
 //
 // The intention is that we can add a Thunk to a ThunkSection that is well
 // spaced enough to service a number of callers without having to do a lot
 // of work. An important principle is that it is not an error if a Thunk cannot
 // be placed in a pre-created ThunkSection; when this happens we create a new
 // ThunkSection placed next to the caller. This allows us to handle the vast
 // majority of thunks simply, but also handle rare cases where the branch range
 // is smaller than the target specific spacing.
 //
 // The algorithm is expected to create all the thunks that are needed in a
 // single pass, with a small number of programs needing a second pass due to
 // the insertion of thunks in the first pass increasing the offset between
 // callers and callees that were only just in range.
 //
 // A consequence of allowing new ThunkSections to be created outside of the
 // pre-created ThunkSections is that in rare cases calls to Thunks that were in
 // range in pass K, are out of range in some pass > K due to the insertion of
 // more Thunks in between the caller and callee. When this happens we retarget
 // the relocation back to the original target and create another Thunk.
 
 // Remove ThunkSections that are empty, this should only be the initial set
 // precreated on pass 0.
 
 // Insert the Thunks for OutputSection OS into their designated place
 // in the Sections vector, and recalculate the InputSection output section
 // offsets.
 // This may invalidate any output section offsets stored outside of InputSection
 void ThunkCreator::mergeThunks(ArrayRef<OutputSection *> OutputSections) {
   forEachInputSectionDescription(
       OutputSections, [&](OutputSection *OS, InputSectionDescription *ISD) {
         if (ISD->ThunkSections.empty())
           return;
 
         // Remove any zero sized precreated Thunks.
         llvm::erase_if(ISD->ThunkSections,
                        [](const std::pair<ThunkSection *, uint32_t> &TS) {
                          return TS.first->getSize() == 0;
                        });
 
         // ISD->ThunkSections contains all created ThunkSections, including
         // those inserted in previous passes. Extract the Thunks created this
         // pass and order them in ascending OutSecOff.
         std::vector<ThunkSection *> NewThunks;
         for (const std::pair<ThunkSection *, uint32_t> TS : ISD->ThunkSections)
           if (TS.second == Pass)
             NewThunks.push_back(TS.first);
         std::stable_sort(NewThunks.begin(), NewThunks.end(),
                          [](const ThunkSection *A, const ThunkSection *B) {
                            return A->OutSecOff < B->OutSecOff;
                          });
 
         // Merge sorted vectors of Thunks and InputSections by OutSecOff
         std::vector<InputSection *> Tmp;
         Tmp.reserve(ISD->Sections.size() + NewThunks.size());
 
         std::merge(ISD->Sections.begin(), ISD->Sections.end(),
                    NewThunks.begin(), NewThunks.end(), std::back_inserter(Tmp),
                    mergeCmp);
 
         ISD->Sections = std::move(Tmp);
       });
 }
 
 // Find or create a ThunkSection within the InputSectionDescription (ISD) that
 // is in range of Src. An ISD maps to a range of InputSections described by a
 // linker script section pattern such as { .text .text.* }.
 ThunkSection *ThunkCreator::getISDThunkSec(OutputSection *OS, InputSection *IS,
                                            InputSectionDescription *ISD,
                                            uint32_t Type, uint64_t Src) {
   for (std::pair<ThunkSection *, uint32_t> TP : ISD->ThunkSections) {
     ThunkSection *TS = TP.first;
     uint64_t TSBase = OS->Addr + TS->OutSecOff;
     uint64_t TSLimit = TSBase + TS->getSize();
     if (Target->inBranchRange(Type, Src, (Src > TSLimit) ? TSBase : TSLimit))
       return TS;
   }
 
   // No suitable ThunkSection exists. This can happen when there is a branch
   // with lower range than the ThunkSection spacing or when there are too
   // many Thunks. Create a new ThunkSection as close to the InputSection as
   // possible. Error if InputSection is so large we cannot place ThunkSection
   // anywhere in Range.
   uint64_t ThunkSecOff = IS->OutSecOff;
   if (!Target->inBranchRange(Type, Src, OS->Addr + ThunkSecOff)) {
     ThunkSecOff = IS->OutSecOff + IS->getSize();
     if (!Target->inBranchRange(Type, Src, OS->Addr + ThunkSecOff))
       fatal("InputSection too large for range extension thunk " +
             IS->getObjMsg(Src - (OS->Addr + IS->OutSecOff)));
   }
   return addThunkSection(OS, ISD, ThunkSecOff);
 }
 
 // Add a Thunk that needs to be placed in a ThunkSection that immediately
 // precedes its Target.
 ThunkSection *ThunkCreator::getISThunkSec(InputSection *IS) {
   ThunkSection *TS = ThunkedSections.lookup(IS);
   if (TS)
     return TS;
 
   // Find InputSectionRange within Target Output Section (TOS) that the
   // InputSection (IS) that we need to precede is in.
   OutputSection *TOS = IS->getParent();
   for (BaseCommand *BC : TOS->SectionCommands) {
     auto *ISD = dyn_cast<InputSectionDescription>(BC);
     if (!ISD || ISD->Sections.empty())
       continue;
 
     InputSection *First = ISD->Sections.front();
     InputSection *Last = ISD->Sections.back();
 
     if (IS->OutSecOff < First->OutSecOff || Last->OutSecOff < IS->OutSecOff)
       continue;
 
     TS = addThunkSection(TOS, ISD, IS->OutSecOff);
     ThunkedSections[IS] = TS;
     return TS;
   }
 
   return nullptr;
 }
 
 // Create one or more ThunkSections per OS that can be used to place Thunks.
 // We attempt to place the ThunkSections using the following desirable
 // properties:
 // - Within range of the maximum number of callers
 // - Minimise the number of ThunkSections
 //
 // We follow a simple but conservative heuristic to place ThunkSections at
 // offsets that are multiples of a Target specific branch range.
 // For an InputSectionDescription that is smaller than the range, a single
 // ThunkSection at the end of the range will do.
 //
 // For an InputSectionDescription that is more than twice the size of the range,
 // we place the last ThunkSection at range bytes from the end of the
 // InputSectionDescription in order to increase the likelihood that the
 // distance from a thunk to its target will be sufficiently small to
 // allow for the creation of a short thunk.
 void ThunkCreator::createInitialThunkSections(
     ArrayRef<OutputSection *> OutputSections) {
   uint32_t ThunkSectionSpacing = Target->getThunkSectionSpacing();
 
   forEachInputSectionDescription(
       OutputSections, [&](OutputSection *OS, InputSectionDescription *ISD) {
         if (ISD->Sections.empty())
           return;
 
         uint32_t ISDBegin = ISD->Sections.front()->OutSecOff;
         uint32_t ISDEnd =
             ISD->Sections.back()->OutSecOff + ISD->Sections.back()->getSize();
         uint32_t LastThunkLowerBound = -1;
         if (ISDEnd - ISDBegin > ThunkSectionSpacing * 2)
           LastThunkLowerBound = ISDEnd - ThunkSectionSpacing;
 
         uint32_t ISLimit;
         uint32_t PrevISLimit = ISDBegin;
         uint32_t ThunkUpperBound = ISDBegin + ThunkSectionSpacing;
 
         for (const InputSection *IS : ISD->Sections) {
           ISLimit = IS->OutSecOff + IS->getSize();
           if (ISLimit > ThunkUpperBound) {
             addThunkSection(OS, ISD, PrevISLimit);
             ThunkUpperBound = PrevISLimit + ThunkSectionSpacing;
           }
           if (ISLimit > LastThunkLowerBound)
             break;
           PrevISLimit = ISLimit;
         }
         addThunkSection(OS, ISD, ISLimit);
       });
 }
 
 ThunkSection *ThunkCreator::addThunkSection(OutputSection *OS,
                                             InputSectionDescription *ISD,
                                             uint64_t Off) {
   auto *TS = make<ThunkSection>(OS, Off);
   ISD->ThunkSections.push_back({TS, Pass});
   return TS;
 }
 
 std::pair<Thunk *, bool> ThunkCreator::getThunk(Symbol &Sym, RelType Type,
                                                 uint64_t Src) {
   std::vector<Thunk *> *ThunkVec = nullptr;
 
   // We use (section, offset) pair to find the thunk position if possible so
   // that we create only one thunk for aliased symbols or ICFed sections.
   if (auto *D = dyn_cast<Defined>(&Sym))
     if (!D->isInPlt() && D->Section)
       ThunkVec = &ThunkedSymbolsBySection[{D->Section->Repl, D->Value}];
   if (!ThunkVec)
     ThunkVec = &ThunkedSymbols[&Sym];
 
   // Check existing Thunks for Sym to see if they can be reused
   for (Thunk *T : *ThunkVec)
     if (T->isCompatibleWith(Type) &&
         Target->inBranchRange(Type, Src, T->getThunkTargetSym()->getVA()))
       return std::make_pair(T, false);
 
   // No existing compatible Thunk in range, create a new one
   Thunk *T = addThunk(Type, Sym);
   ThunkVec->push_back(T);
   return std::make_pair(T, true);
 }
 
 // Return true if the relocation target is an in range Thunk.
 // Return false if the relocation is not to a Thunk. If the relocation target
 // was originally to a Thunk, but is no longer in range we revert the
 // relocation back to its original non-Thunk target.
 bool ThunkCreator::normalizeExistingThunk(Relocation &Rel, uint64_t Src) {
   if (Thunk *T = Thunks.lookup(Rel.Sym)) {
     if (Target->inBranchRange(Rel.Type, Src, Rel.Sym->getVA()))
       return true;
     Rel.Sym = &T->Destination;
     if (Rel.Sym->isInPlt())
       Rel.Expr = toPlt(Rel.Expr);
   }
   return false;
 }
 
 // Process all relocations from the InputSections that have been assigned
 // to InputSectionDescriptions and redirect through Thunks if needed. The
 // function should be called iteratively until it returns false.
 //
 // PreConditions:
 // All InputSections that may need a Thunk are reachable from
 // OutputSectionCommands.
 //
 // All OutputSections have an address and all InputSections have an offset
 // within the OutputSection.
 //
 // The offsets between caller (relocation place) and callee
 // (relocation target) will not be modified outside of createThunks().
 //
 // PostConditions:
 // If return value is true then ThunkSections have been inserted into
 // OutputSections. All relocations that needed a Thunk based on the information
 // available to createThunks() on entry have been redirected to a Thunk. Note
 // that adding Thunks changes offsets between caller and callee so more Thunks
 // may be required.
 //
 // If return value is false then no more Thunks are needed, and createThunks has
 // made no changes. If the target requires range extension thunks, currently
 // ARM, then any future change in offset between caller and callee risks a
 // relocation out of range error.
 bool ThunkCreator::createThunks(ArrayRef<OutputSection *> OutputSections) {
   bool AddressesChanged = false;
 
   if (Pass == 0 && Target->getThunkSectionSpacing())
     createInitialThunkSections(OutputSections);
 
   // With Thunk Size much smaller than branch range we expect to
   // converge quickly; if we get to 10 something has gone wrong.
   if (Pass == 10)
     fatal("thunk creation not converged");
 
   // Create all the Thunks and insert them into synthetic ThunkSections. The
   // ThunkSections are later inserted back into InputSectionDescriptions.
   // We separate the creation of ThunkSections from the insertion of the
   // ThunkSections as ThunkSections are not always inserted into the same
   // InputSectionDescription as the caller.
   forEachInputSectionDescription(
       OutputSections, [&](OutputSection *OS, InputSectionDescription *ISD) {
         for (InputSection *IS : ISD->Sections)
           for (Relocation &Rel : IS->Relocations) {
             uint64_t Src = IS->getVA(Rel.Offset);
 
             // If we are a relocation to an existing Thunk, check if it is
             // still in range. If not then Rel will be altered to point to its
             // original target so another Thunk can be generated.
             if (Pass > 0 && normalizeExistingThunk(Rel, Src))
               continue;
 
             if (!Target->needsThunk(Rel.Expr, Rel.Type, IS->File, Src,
                                     *Rel.Sym))
               continue;
 
             Thunk *T;
             bool IsNew;
             std::tie(T, IsNew) = getThunk(*Rel.Sym, Rel.Type, Src);
 
             if (IsNew) {
               // Find or create a ThunkSection for the new Thunk
               ThunkSection *TS;
               if (auto *TIS = T->getTargetInputSection())
                 TS = getISThunkSec(TIS);
               else
                 TS = getISDThunkSec(OS, IS, ISD, Rel.Type, Src);
               TS->addThunk(T);
               Thunks[T->getThunkTargetSym()] = T;
             }
 
             // Redirect relocation to Thunk, we never go via the PLT to a Thunk
             Rel.Sym = T->getThunkTargetSym();
             Rel.Expr = fromPlt(Rel.Expr);
           }
 
         for (auto &P : ISD->ThunkSections)
           AddressesChanged |= P.first->assignOffsets();
       });
 
   for (auto &P : ThunkedSections)
     AddressesChanged |= P.second->assignOffsets();
 
   // Merge all created synthetic ThunkSections back into OutputSection
   mergeThunks(OutputSections);
   ++Pass;
   return AddressesChanged;
 }
 
 template void elf::scanRelocations<ELF32LE>(InputSectionBase &);
 template void elf::scanRelocations<ELF32BE>(InputSectionBase &);
 template void elf::scanRelocations<ELF64LE>(InputSectionBase &);
 template void elf::scanRelocations<ELF64BE>(InputSectionBase &);
Index: vendor/lld/dist-release_80/ELF/Thunks.cpp
===================================================================
--- vendor/lld/dist-release_80/ELF/Thunks.cpp	(revision 343197)
+++ vendor/lld/dist-release_80/ELF/Thunks.cpp	(revision 343198)
@@ -1,846 +1,846 @@
 //===- Thunks.cpp --------------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===---------------------------------------------------------------------===//
 //
 // This file contains Thunk subclasses.
 //
 // A thunk is a small piece of code written after an input section
 // which is used to jump between "incompatible" functions
 // such as MIPS PIC and non-PIC or ARM non-Thumb and Thumb functions.
 //
 // If a jump target is too far and its address doesn't fit to a
 // short jump instruction, we need to create a thunk too, but we
 // haven't supported it yet.
 //
 // i386 and x86-64 don't need thunks.
 //
 //===---------------------------------------------------------------------===//
 
 #include "Thunks.h"
 #include "Config.h"
 #include "InputSection.h"
 #include "OutputSections.h"
 #include "Symbols.h"
 #include "SyntheticSections.h"
 #include "Target.h"
 #include "lld/Common/ErrorHandler.h"
 #include "lld/Common/Memory.h"
 #include "llvm/BinaryFormat/ELF.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MathExtras.h"
 #include <cstdint>
 #include <cstring>
 
 using namespace llvm;
 using namespace llvm::object;
 using namespace llvm::ELF;
 
 namespace lld {
 namespace elf {
 
 namespace {
 
 // AArch64 long range Thunks
 class AArch64ABSLongThunk final : public Thunk {
 public:
   AArch64ABSLongThunk(Symbol &Dest) : Thunk(Dest) {}
   uint32_t size() override { return 16; }
   void writeTo(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
 };
 
 class AArch64ADRPThunk final : public Thunk {
 public:
   AArch64ADRPThunk(Symbol &Dest) : Thunk(Dest) {}
   uint32_t size() override { return 12; }
   void writeTo(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
 };
 
 // Base class for ARM thunks.
 //
 // An ARM thunk may be either short or long. A short thunk is simply a branch
 // (B) instruction, and it may be used to call ARM functions when the distance
 // from the thunk to the target is less than 32MB. Long thunks can branch to any
 // virtual address and can switch between ARM and Thumb, and they are
 // implemented in the derived classes. This class tries to create a short thunk
 // if the target is in range, otherwise it creates a long thunk.
 class ARMThunk : public Thunk {
 public:
   ARMThunk(Symbol &Dest) : Thunk(Dest) {}
 
   bool mayUseShortThunk();
   uint32_t size() override { return mayUseShortThunk() ? 4 : sizeLong(); }
   void writeTo(uint8_t *Buf) override;
   bool isCompatibleWith(RelType Type) const override;
 
   // Returns the size of a long thunk.
   virtual uint32_t sizeLong() = 0;
 
   // Writes a long thunk to Buf.
   virtual void writeLong(uint8_t *Buf) = 0;
 
 private:
   // This field tracks whether all previously considered layouts would allow
   // this thunk to be short. If we have ever needed a long thunk, we always
   // create a long thunk, even if the thunk may be short given the current
   // distance to the target. We do this because transitioning from long to short
   // can create layout oscillations in certain corner cases which would prevent
   // the layout from converging.
   bool MayUseShortThunk = true;
 };
 
 // Base class for Thumb-2 thunks.
 //
 // This class is similar to ARMThunk, but it uses the Thumb-2 B.W instruction
 // which has a range of 16MB.
 class ThumbThunk : public Thunk {
 public:
   ThumbThunk(Symbol &Dest) : Thunk(Dest) { Alignment = 2; }
 
   bool mayUseShortThunk();
   uint32_t size() override { return mayUseShortThunk() ? 4 : sizeLong(); }
   void writeTo(uint8_t *Buf) override;
   bool isCompatibleWith(RelType Type) const override;
 
   // Returns the size of a long thunk.
   virtual uint32_t sizeLong() = 0;
 
   // Writes a long thunk to Buf.
   virtual void writeLong(uint8_t *Buf) = 0;
 
 private:
   // See comment in ARMThunk above.
   bool MayUseShortThunk = true;
 };
 
 // Specific ARM Thunk implementations. The naming convention is:
 // Source State, TargetState, Target Requirement, ABS or PI, Range
 class ARMV7ABSLongThunk final : public ARMThunk {
 public:
   ARMV7ABSLongThunk(Symbol &Dest) : ARMThunk(Dest) {}
 
   uint32_t sizeLong() override { return 12; }
   void writeLong(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
 };
 
 class ARMV7PILongThunk final : public ARMThunk {
 public:
   ARMV7PILongThunk(Symbol &Dest) : ARMThunk(Dest) {}
 
   uint32_t sizeLong() override { return 16; }
   void writeLong(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
 };
 
 class ThumbV7ABSLongThunk final : public ThumbThunk {
 public:
   ThumbV7ABSLongThunk(Symbol &Dest) : ThumbThunk(Dest) {}
 
   uint32_t sizeLong() override { return 10; }
   void writeLong(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
 };
 
 class ThumbV7PILongThunk final : public ThumbThunk {
 public:
   ThumbV7PILongThunk(Symbol &Dest) : ThumbThunk(Dest) {}
 
   uint32_t sizeLong() override { return 12; }
   void writeLong(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
 };
 
 // Implementations of Thunks for older Arm architectures that do not support
 // the movt/movw instructions. These thunks require at least Architecture v5
 // as used on processors such as the Arm926ej-s. There are no Thumb entry
 // points as there is no Thumb branch instruction on these architecture that
 // can result in a thunk
 class ARMV5ABSLongThunk final : public ARMThunk {
 public:
   ARMV5ABSLongThunk(Symbol &Dest) : ARMThunk(Dest) {}
 
   uint32_t sizeLong() override { return 8; }
   void writeLong(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
   bool isCompatibleWith(uint32_t RelocType) const override;
 };
 
 class ARMV5PILongThunk final : public ARMThunk {
 public:
   ARMV5PILongThunk(Symbol &Dest) : ARMThunk(Dest) {}
 
   uint32_t sizeLong() override { return 16; }
   void writeLong(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
   bool isCompatibleWith(uint32_t RelocType) const override;
 };
 
 // Implementations of Thunks for Arm v6-M. Only Thumb instructions are permitted
 class ThumbV6MABSLongThunk final : public ThumbThunk {
 public:
   ThumbV6MABSLongThunk(Symbol &Dest) : ThumbThunk(Dest) {}
 
   uint32_t sizeLong() override { return 12; }
   void writeLong(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
 };
 
 class ThumbV6MPILongThunk final : public ThumbThunk {
 public:
   ThumbV6MPILongThunk(Symbol &Dest) : ThumbThunk(Dest) {}
 
   uint32_t sizeLong() override { return 16; }
   void writeLong(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
 };
 
 // MIPS LA25 thunk
 class MipsThunk final : public Thunk {
 public:
   MipsThunk(Symbol &Dest) : Thunk(Dest) {}
 
   uint32_t size() override { return 16; }
   void writeTo(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
   InputSection *getTargetInputSection() const override;
 };
 
 // microMIPS R2-R5 LA25 thunk
 class MicroMipsThunk final : public Thunk {
 public:
   MicroMipsThunk(Symbol &Dest) : Thunk(Dest) {}
 
   uint32_t size() override { return 14; }
   void writeTo(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
   InputSection *getTargetInputSection() const override;
 };
 
 // microMIPS R6 LA25 thunk
 class MicroMipsR6Thunk final : public Thunk {
 public:
   MicroMipsR6Thunk(Symbol &Dest) : Thunk(Dest) {}
 
   uint32_t size() override { return 12; }
   void writeTo(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
   InputSection *getTargetInputSection() const override;
 };
 
 
 // PPC64 Plt call stubs.
 // Any call site that needs to call through a plt entry needs a call stub in
 // the .text section. The call stub is responsible for:
 // 1) Saving the toc-pointer to the stack.
 // 2) Loading the target functions address from the procedure linkage table into
 //    r12 for use by the target functions global entry point, and into the count
 //    register.
 // 3) Transfering control to the target function through an indirect branch.
 class PPC64PltCallStub final : public Thunk {
 public:
   PPC64PltCallStub(Symbol &Dest) : Thunk(Dest) {}
   uint32_t size() override { return 20; }
   void writeTo(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
 };
 
 // A bl instruction uses a signed 24 bit offset, with an implicit 4 byte
 // alignment. This gives a possible 26 bits of 'reach'. If the call offset is
 // larger then that we need to emit a long-branch thunk. The target address
 // of the callee is stored in a table to be accessed TOC-relative. Since the
 // call must be local (a non-local call will have a PltCallStub instead) the
 // table stores the address of the callee's local entry point. For
 // position-independent code a corresponding relative dynamic relocation is
 // used.
 class PPC64LongBranchThunk : public Thunk {
 public:
   uint32_t size() override { return 16; }
   void writeTo(uint8_t *Buf) override;
   void addSymbols(ThunkSection &IS) override;
 
 protected:
   PPC64LongBranchThunk(Symbol &Dest) : Thunk(Dest) {}
 };
 
 class PPC64PILongBranchThunk final : public PPC64LongBranchThunk {
 public:
   PPC64PILongBranchThunk(Symbol &Dest) : PPC64LongBranchThunk(Dest) {
     assert(!Dest.IsPreemptible);
     if (Dest.isInPPC64Branchlt())
       return;
 
     In.PPC64LongBranchTarget->addEntry(Dest);
     In.RelaDyn->addReloc({Target->RelativeRel, In.PPC64LongBranchTarget,
                           Dest.getPPC64LongBranchOffset(), true, &Dest,
                           getPPC64GlobalEntryToLocalEntryOffset(Dest.StOther)});
   }
 };
 
 class PPC64PDLongBranchThunk final : public PPC64LongBranchThunk {
 public:
   PPC64PDLongBranchThunk(Symbol &Dest) : PPC64LongBranchThunk(Dest) {
     if (!Dest.isInPPC64Branchlt())
       In.PPC64LongBranchTarget->addEntry(Dest);
   }
 };
 
 } // end anonymous namespace
 
 Defined *Thunk::addSymbol(StringRef Name, uint8_t Type, uint64_t Value,
                           InputSectionBase &Section) {
   Defined *D = addSyntheticLocal(Name, Type, Value, /*Size=*/0, Section);
   Syms.push_back(D);
   return D;
 }
 
 void Thunk::setOffset(uint64_t NewOffset) {
   for (Defined *D : Syms)
     D->Value = D->Value - Offset + NewOffset;
   Offset = NewOffset;
 }
 
 // AArch64 long range Thunks
 
 static uint64_t getAArch64ThunkDestVA(const Symbol &S) {
   uint64_t V = S.isInPlt() ? S.getPltVA() : S.getVA();
   return V;
 }
 
 void AArch64ABSLongThunk::writeTo(uint8_t *Buf) {
   const uint8_t Data[] = {
     0x50, 0x00, 0x00, 0x58, //     ldr x16, L0
     0x00, 0x02, 0x1f, 0xd6, //     br  x16
     0x00, 0x00, 0x00, 0x00, // L0: .xword S
     0x00, 0x00, 0x00, 0x00,
   };
   uint64_t S = getAArch64ThunkDestVA(Destination);
   memcpy(Buf, Data, sizeof(Data));
   Target->relocateOne(Buf + 8, R_AARCH64_ABS64, S);
 }
 
 void AArch64ABSLongThunk::addSymbols(ThunkSection &IS) {
   addSymbol(Saver.save("__AArch64AbsLongThunk_" + Destination.getName()),
             STT_FUNC, 0, IS);
   addSymbol("$x", STT_NOTYPE, 0, IS);
   addSymbol("$d", STT_NOTYPE, 8, IS);
 }
 
 // This Thunk has a maximum range of 4Gb, this is sufficient for all programs
 // using the small code model, including pc-relative ones. At time of writing
 // clang and gcc do not support the large code model for position independent
 // code so it is safe to use this for position independent thunks without
 // worrying about the destination being more than 4Gb away.
 void AArch64ADRPThunk::writeTo(uint8_t *Buf) {
   const uint8_t Data[] = {
       0x10, 0x00, 0x00, 0x90, // adrp x16, Dest R_AARCH64_ADR_PREL_PG_HI21(Dest)
       0x10, 0x02, 0x00, 0x91, // add  x16, x16, R_AARCH64_ADD_ABS_LO12_NC(Dest)
       0x00, 0x02, 0x1f, 0xd6, // br   x16
   };
   uint64_t S = getAArch64ThunkDestVA(Destination);
   uint64_t P = getThunkTargetSym()->getVA();
   memcpy(Buf, Data, sizeof(Data));
   Target->relocateOne(Buf, R_AARCH64_ADR_PREL_PG_HI21,
                       getAArch64Page(S) - getAArch64Page(P));
   Target->relocateOne(Buf + 4, R_AARCH64_ADD_ABS_LO12_NC, S);
 }
 
 void AArch64ADRPThunk::addSymbols(ThunkSection &IS) {
   addSymbol(Saver.save("__AArch64ADRPThunk_" + Destination.getName()), STT_FUNC,
             0, IS);
   addSymbol("$x", STT_NOTYPE, 0, IS);
 }
 
 // ARM Target Thunks
 static uint64_t getARMThunkDestVA(const Symbol &S) {
   uint64_t V = S.isInPlt() ? S.getPltVA() : S.getVA();
   return SignExtend64<32>(V);
 }
 
 // This function returns true if the target is not Thumb and is within 2^26, and
 // it has not previously returned false (see comment for MayUseShortThunk).
 bool ARMThunk::mayUseShortThunk() {
   if (!MayUseShortThunk)
     return false;
   uint64_t S = getARMThunkDestVA(Destination);
   if (S & 1) {
     MayUseShortThunk = false;
     return false;
   }
   uint64_t P = getThunkTargetSym()->getVA();
   int64_t Offset = S - P - 8;
   MayUseShortThunk = llvm::isInt<26>(Offset);
   return MayUseShortThunk;
 }
 
 void ARMThunk::writeTo(uint8_t *Buf) {
   if (!mayUseShortThunk()) {
     writeLong(Buf);
     return;
   }
 
   uint64_t S = getARMThunkDestVA(Destination);
   uint64_t P = getThunkTargetSym()->getVA();
   int64_t Offset = S - P - 8;
   const uint8_t Data[] = {
     0x00, 0x00, 0x00, 0xea, // b S
   };
   memcpy(Buf, Data, sizeof(Data));
   Target->relocateOne(Buf, R_ARM_JUMP24, Offset);
 }
 
 bool ARMThunk::isCompatibleWith(RelType Type) const {
   // Thumb branch relocations can't use BLX
   return Type != R_ARM_THM_JUMP19 && Type != R_ARM_THM_JUMP24;
 }
 
 // This function returns true if the target is Thumb and is within 2^25, and
 // it has not previously returned false (see comment for MayUseShortThunk).
 bool ThumbThunk::mayUseShortThunk() {
   if (!MayUseShortThunk)
     return false;
   uint64_t S = getARMThunkDestVA(Destination);
   if ((S & 1) == 0) {
     MayUseShortThunk = false;
     return false;
   }
   uint64_t P = getThunkTargetSym()->getVA() & ~1;
   int64_t Offset = S - P - 4;
   MayUseShortThunk = llvm::isInt<25>(Offset);
   return MayUseShortThunk;
 }
 
 void ThumbThunk::writeTo(uint8_t *Buf) {
   if (!mayUseShortThunk()) {
     writeLong(Buf);
     return;
   }
 
   uint64_t S = getARMThunkDestVA(Destination);
   uint64_t P = getThunkTargetSym()->getVA();
   int64_t Offset = S - P - 4;
   const uint8_t Data[] = {
       0x00, 0xf0, 0x00, 0xb0, // b.w S
   };
   memcpy(Buf, Data, sizeof(Data));
   Target->relocateOne(Buf, R_ARM_THM_JUMP24, Offset);
 }
 
 bool ThumbThunk::isCompatibleWith(RelType Type) const {
   // ARM branch relocations can't use BLX
   return Type != R_ARM_JUMP24 && Type != R_ARM_PC24 && Type != R_ARM_PLT32;
 }
 
 void ARMV7ABSLongThunk::writeLong(uint8_t *Buf) {
   const uint8_t Data[] = {
       0x00, 0xc0, 0x00, 0xe3, // movw         ip,:lower16:S
       0x00, 0xc0, 0x40, 0xe3, // movt         ip,:upper16:S
       0x1c, 0xff, 0x2f, 0xe1, // bx   ip
   };
   uint64_t S = getARMThunkDestVA(Destination);
   memcpy(Buf, Data, sizeof(Data));
   Target->relocateOne(Buf, R_ARM_MOVW_ABS_NC, S);
   Target->relocateOne(Buf + 4, R_ARM_MOVT_ABS, S);
 }
 
 void ARMV7ABSLongThunk::addSymbols(ThunkSection &IS) {
   addSymbol(Saver.save("__ARMv7ABSLongThunk_" + Destination.getName()),
             STT_FUNC, 0, IS);
   addSymbol("$a", STT_NOTYPE, 0, IS);
 }
 
 void ThumbV7ABSLongThunk::writeLong(uint8_t *Buf) {
   const uint8_t Data[] = {
       0x40, 0xf2, 0x00, 0x0c, // movw         ip, :lower16:S
       0xc0, 0xf2, 0x00, 0x0c, // movt         ip, :upper16:S
       0x60, 0x47,             // bx   ip
   };
   uint64_t S = getARMThunkDestVA(Destination);
   memcpy(Buf, Data, sizeof(Data));
   Target->relocateOne(Buf, R_ARM_THM_MOVW_ABS_NC, S);
   Target->relocateOne(Buf + 4, R_ARM_THM_MOVT_ABS, S);
 }
 
 void ThumbV7ABSLongThunk::addSymbols(ThunkSection &IS) {
   addSymbol(Saver.save("__Thumbv7ABSLongThunk_" + Destination.getName()),
             STT_FUNC, 1, IS);
   addSymbol("$t", STT_NOTYPE, 0, IS);
 }
 
 void ARMV7PILongThunk::writeLong(uint8_t *Buf) {
   const uint8_t Data[] = {
       0xf0, 0xcf, 0x0f, 0xe3, // P:  movw ip,:lower16:S - (P + (L1-P) + 8)
       0x00, 0xc0, 0x40, 0xe3, //     movt ip,:upper16:S - (P + (L1-P) + 8)
       0x0f, 0xc0, 0x8c, 0xe0, // L1: add  ip, ip, pc
       0x1c, 0xff, 0x2f, 0xe1, //     bx   ip
   };
   uint64_t S = getARMThunkDestVA(Destination);
   uint64_t P = getThunkTargetSym()->getVA();
   int64_t Offset = S - P - 16;
   memcpy(Buf, Data, sizeof(Data));
   Target->relocateOne(Buf, R_ARM_MOVW_PREL_NC, Offset);
   Target->relocateOne(Buf + 4, R_ARM_MOVT_PREL, Offset);
 }
 
 void ARMV7PILongThunk::addSymbols(ThunkSection &IS) {
   addSymbol(Saver.save("__ARMV7PILongThunk_" + Destination.getName()), STT_FUNC,
             0, IS);
   addSymbol("$a", STT_NOTYPE, 0, IS);
 }
 
 void ThumbV7PILongThunk::writeLong(uint8_t *Buf) {
   const uint8_t Data[] = {
       0x4f, 0xf6, 0xf4, 0x7c, // P:  movw ip,:lower16:S - (P + (L1-P) + 4)
       0xc0, 0xf2, 0x00, 0x0c, //     movt ip,:upper16:S - (P + (L1-P) + 4)
       0xfc, 0x44,             // L1: add  ip, pc
       0x60, 0x47,             //     bx   ip
   };
   uint64_t S = getARMThunkDestVA(Destination);
   uint64_t P = getThunkTargetSym()->getVA() & ~0x1;
   int64_t Offset = S - P - 12;
   memcpy(Buf, Data, sizeof(Data));
   Target->relocateOne(Buf, R_ARM_THM_MOVW_PREL_NC, Offset);
   Target->relocateOne(Buf + 4, R_ARM_THM_MOVT_PREL, Offset);
 }
 
 void ThumbV7PILongThunk::addSymbols(ThunkSection &IS) {
   addSymbol(Saver.save("__ThumbV7PILongThunk_" + Destination.getName()),
             STT_FUNC, 1, IS);
   addSymbol("$t", STT_NOTYPE, 0, IS);
 }
 
 void ARMV5ABSLongThunk::writeLong(uint8_t *Buf) {
   const uint8_t Data[] = {
       0x04, 0xf0, 0x1f, 0xe5, //     ldr pc, [pc,#-4] ; L1
       0x00, 0x00, 0x00, 0x00, // L1: .word S
   };
   memcpy(Buf, Data, sizeof(Data));
   Target->relocateOne(Buf + 4, R_ARM_ABS32, getARMThunkDestVA(Destination));
 }
 
 void ARMV5ABSLongThunk::addSymbols(ThunkSection &IS) {
   addSymbol(Saver.save("__ARMv5ABSLongThunk_" + Destination.getName()),
             STT_FUNC, 0, IS);
   addSymbol("$a", STT_NOTYPE, 0, IS);
   addSymbol("$d", STT_NOTYPE, 4, IS);
 }
 
 bool ARMV5ABSLongThunk::isCompatibleWith(uint32_t RelocType) const {
   // Thumb branch relocations can't use BLX
   return RelocType != R_ARM_THM_JUMP19 && RelocType != R_ARM_THM_JUMP24;
 }
 
 void ARMV5PILongThunk::writeLong(uint8_t *Buf) {
   const uint8_t Data[] = {
       0x04, 0xc0, 0x9f, 0xe5, // P:  ldr ip, [pc,#4] ; L2
       0x0c, 0xc0, 0x8f, 0xe0, // L1: add ip, pc, ip
       0x1c, 0xff, 0x2f, 0xe1, //     bx ip
       0x00, 0x00, 0x00, 0x00, // L2: .word S - (P + (L1 - P) + 8)
   };
   uint64_t S = getARMThunkDestVA(Destination);
   uint64_t P = getThunkTargetSym()->getVA() & ~0x1;
   memcpy(Buf, Data, sizeof(Data));
   Target->relocateOne(Buf + 12, R_ARM_REL32, S - P - 12);
 }
 
 void ARMV5PILongThunk::addSymbols(ThunkSection &IS) {
   addSymbol(Saver.save("__ARMV5PILongThunk_" + Destination.getName()), STT_FUNC,
             0, IS);
   addSymbol("$a", STT_NOTYPE, 0, IS);
   addSymbol("$d", STT_NOTYPE, 12, IS);
 }
 
 bool ARMV5PILongThunk::isCompatibleWith(uint32_t RelocType) const {
   // Thumb branch relocations can't use BLX
   return RelocType != R_ARM_THM_JUMP19 && RelocType != R_ARM_THM_JUMP24;
 }
 
 void ThumbV6MABSLongThunk::writeLong(uint8_t *Buf) {
   // Most Thumb instructions cannot access the high registers r8 - r15. As the
   // only register we can corrupt is r12 we must instead spill a low register
   // to the stack to use as a scratch register. We push r1 even though we
   // don't need to get some space to use for the return address.
   const uint8_t Data[] = {
       0x03, 0xb4,            // push {r0, r1} ; Obtain scratch registers
       0x01, 0x48,            // ldr r0, [pc, #4] ; L1
       0x01, 0x90,            // str r0, [sp, #4] ; SP + 4 = S
       0x01, 0xbd,            // pop {r0, pc} ; restore r0 and branch to dest
       0x00, 0x00, 0x00, 0x00 // L1: .word S
   };
   uint64_t S = getARMThunkDestVA(Destination);
   memcpy(Buf, Data, sizeof(Data));
   Target->relocateOne(Buf + 8, R_ARM_ABS32, S);
 }
 
 void ThumbV6MABSLongThunk::addSymbols(ThunkSection &IS) {
   addSymbol(Saver.save("__Thumbv6MABSLongThunk_" + Destination.getName()),
             STT_FUNC, 1, IS);
   addSymbol("$t", STT_NOTYPE, 0, IS);
   addSymbol("$d", STT_NOTYPE, 8, IS);
 }
 
 void ThumbV6MPILongThunk::writeLong(uint8_t *Buf) {
   // Most Thumb instructions cannot access the high registers r8 - r15. As the
   // only register we can corrupt is ip (r12) we must instead spill a low
   // register to the stack to use as a scratch register.
   const uint8_t Data[] = {
       0x01, 0xb4,             // P:  push {r0}        ; Obtain scratch register
       0x02, 0x48,             //     ldr r0, [pc, #8] ; L2
       0x84, 0x46,             //     mov ip, r0       ; high to low register
       0x01, 0xbc,             //     pop {r0}         ; restore scratch register
       0xe7, 0x44,             // L1: add pc, ip       ; transfer control
       0xc0, 0x46,             //     nop              ; pad to 4-byte boundary
       0x00, 0x00, 0x00, 0x00, // L2: .word S - (P + (L1 - P) + 4)
   };
   uint64_t S = getARMThunkDestVA(Destination);
   uint64_t P = getThunkTargetSym()->getVA() & ~0x1;
   memcpy(Buf, Data, sizeof(Data));
   Target->relocateOne(Buf + 12, R_ARM_REL32, S - P - 12);
 }
 
 void ThumbV6MPILongThunk::addSymbols(ThunkSection &IS) {
   addSymbol(Saver.save("__Thumbv6MPILongThunk_" + Destination.getName()),
             STT_FUNC, 1, IS);
   addSymbol("$t", STT_NOTYPE, 0, IS);
   addSymbol("$d", STT_NOTYPE, 12, IS);
 }
 
 // Write MIPS LA25 thunk code to call PIC function from the non-PIC one.
 void MipsThunk::writeTo(uint8_t *Buf) {
   uint64_t S = Destination.getVA();
   write32(Buf, 0x3c190000); // lui   $25, %hi(func)
   write32(Buf + 4, 0x08000000 | (S >> 2)); // j     func
   write32(Buf + 8, 0x27390000); // addiu $25, $25, %lo(func)
   write32(Buf + 12, 0x00000000); // nop
   Target->relocateOne(Buf, R_MIPS_HI16, S);
   Target->relocateOne(Buf + 8, R_MIPS_LO16, S);
 }
 
 void MipsThunk::addSymbols(ThunkSection &IS) {
   addSymbol(Saver.save("__LA25Thunk_" + Destination.getName()), STT_FUNC, 0,
             IS);
 }
 
 InputSection *MipsThunk::getTargetInputSection() const {
   auto &DR = cast<Defined>(Destination);
   return dyn_cast<InputSection>(DR.Section);
 }
 
 // Write microMIPS R2-R5 LA25 thunk code
 // to call PIC function from the non-PIC one.
 void MicroMipsThunk::writeTo(uint8_t *Buf) {
   uint64_t S = Destination.getVA() | 1;
   write16(Buf, 0x41b9);       // lui   $25, %hi(func)
   write16(Buf + 4, 0xd400);   // j     func
   write16(Buf + 8, 0x3339);   // addiu $25, $25, %lo(func)
   write16(Buf + 12, 0x0c00);  // nop
   Target->relocateOne(Buf, R_MICROMIPS_HI16, S);
   Target->relocateOne(Buf + 4, R_MICROMIPS_26_S1, S);
   Target->relocateOne(Buf + 8, R_MICROMIPS_LO16, S);
 }
 
 void MicroMipsThunk::addSymbols(ThunkSection &IS) {
   Defined *D = addSymbol(
       Saver.save("__microLA25Thunk_" + Destination.getName()), STT_FUNC, 0, IS);
   D->StOther |= STO_MIPS_MICROMIPS;
 }
 
 InputSection *MicroMipsThunk::getTargetInputSection() const {
   auto &DR = cast<Defined>(Destination);
   return dyn_cast<InputSection>(DR.Section);
 }
 
 // Write microMIPS R6 LA25 thunk code
 // to call PIC function from the non-PIC one.
 void MicroMipsR6Thunk::writeTo(uint8_t *Buf) {
   uint64_t S = Destination.getVA() | 1;
   uint64_t P = getThunkTargetSym()->getVA();
   write16(Buf, 0x1320);       // lui   $25, %hi(func)
   write16(Buf + 4, 0x3339);   // addiu $25, $25, %lo(func)
   write16(Buf + 8, 0x9400);   // bc    func
   Target->relocateOne(Buf, R_MICROMIPS_HI16, S);
   Target->relocateOne(Buf + 4, R_MICROMIPS_LO16, S);
   Target->relocateOne(Buf + 8, R_MICROMIPS_PC26_S1, S - P - 12);
 }
 
 void MicroMipsR6Thunk::addSymbols(ThunkSection &IS) {
   Defined *D = addSymbol(
       Saver.save("__microLA25Thunk_" + Destination.getName()), STT_FUNC, 0, IS);
   D->StOther |= STO_MIPS_MICROMIPS;
 }
 
 InputSection *MicroMipsR6Thunk::getTargetInputSection() const {
   auto &DR = cast<Defined>(Destination);
   return dyn_cast<InputSection>(DR.Section);
 }
 
 static void writePPCLoadAndBranch(uint8_t *Buf, int64_t Offset) {
   uint16_t OffHa = (Offset + 0x8000) >> 16;
   uint16_t OffLo = Offset & 0xffff;
 
   write32(Buf + 0, 0x3d820000 | OffHa); // addis r12, r2, OffHa
   write32(Buf + 4, 0xe98c0000 | OffLo); // ld    r12, OffLo(r12)
   write32(Buf + 8, 0x7d8903a6);         // mtctr r12
   write32(Buf + 12, 0x4e800420);        // bctr
 }
 
 void PPC64PltCallStub::writeTo(uint8_t *Buf) {
   int64_t Offset = Destination.getGotPltVA() - getPPC64TocBase();
   // Save the TOC pointer to the save-slot reserved in the call frame.
   write32(Buf + 0, 0xf8410018); // std     r2,24(r1)
   writePPCLoadAndBranch(Buf + 4, Offset);
 }
 
 void PPC64PltCallStub::addSymbols(ThunkSection &IS) {
   Defined *S = addSymbol(Saver.save("__plt_" + Destination.getName()), STT_FUNC,
                          0, IS);
   S->NeedsTocRestore = true;
 }
 
 void PPC64LongBranchThunk::writeTo(uint8_t *Buf) {
   int64_t Offset = Destination.getPPC64LongBranchTableVA() - getPPC64TocBase();
   writePPCLoadAndBranch(Buf, Offset);
 }
 
 void PPC64LongBranchThunk::addSymbols(ThunkSection &IS) {
   addSymbol(Saver.save("__long_branch_" + Destination.getName()), STT_FUNC, 0,
             IS);
 }
 
 Thunk::Thunk(Symbol &D) : Destination(D), Offset(0) {}
 
 Thunk::~Thunk() = default;
 
 static Thunk *addThunkAArch64(RelType Type, Symbol &S) {
   if (Type != R_AARCH64_CALL26 && Type != R_AARCH64_JUMP26)
     fatal("unrecognized relocation type");
-  if (Config->Pic)
+  if (Config->PicThunk)
     return make<AArch64ADRPThunk>(S);
   return make<AArch64ABSLongThunk>(S);
 }
 
 // Creates a thunk for Thumb-ARM interworking.
 // Arm Architectures v5 and v6 do not support Thumb2 technology. This means
 // - MOVT and MOVW instructions cannot be used
 // - Only Thumb relocation that can generate a Thunk is a BL, this can always
 //   be transformed into a BLX
 static Thunk *addThunkPreArmv7(RelType Reloc, Symbol &S) {
   switch (Reloc) {
   case R_ARM_PC24:
   case R_ARM_PLT32:
   case R_ARM_JUMP24:
   case R_ARM_CALL:
   case R_ARM_THM_CALL:
-    if (Config->Pic)
+    if (Config->PicThunk)
       return make<ARMV5PILongThunk>(S);
     return make<ARMV5ABSLongThunk>(S);
   }
   fatal("relocation " + toString(Reloc) + " to " + toString(S) +
         " not supported for Armv5 or Armv6 targets");
 }
 
 // Create a thunk for Thumb long branch on V6-M.
 // Arm Architecture v6-M only supports Thumb instructions. This means
 // - MOVT and MOVW instructions cannot be used.
 // - Only a limited number of instructions can access registers r8 and above
 // - No interworking support is needed (all Thumb).
 static Thunk *addThunkV6M(RelType Reloc, Symbol &S) {
   switch (Reloc) {
   case R_ARM_THM_JUMP19:
   case R_ARM_THM_JUMP24:
   case R_ARM_THM_CALL:
     if (Config->Pic)
       return make<ThumbV6MPILongThunk>(S);
     return make<ThumbV6MABSLongThunk>(S);
   }
   fatal("relocation " + toString(Reloc) + " to " + toString(S) +
         " not supported for Armv6-M targets");
 }
 
 // Creates a thunk for Thumb-ARM interworking or branch range extension.
 static Thunk *addThunkArm(RelType Reloc, Symbol &S) {
   // Decide which Thunk is needed based on:
   // Available instruction set
   // - An Arm Thunk can only be used if Arm state is available.
   // - A Thumb Thunk can only be used if Thumb state is available.
   // - Can only use a Thunk if it uses instructions that the Target supports.
   // Relocation is branch or branch and link
   // - Branch instructions cannot change state, can only select Thunk that
   //   starts in the same state as the caller.
   // - Branch and link relocations can change state, can select Thunks from
   //   either Arm or Thumb.
   // Position independent Thunks if we require position independent code.
 
   // Handle architectures that have restrictions on the instructions that they
   // can use in Thunks. The flags below are set by reading the BuildAttributes
   // of the input objects. InputFiles.cpp contains the mapping from ARM
   // architecture to flag.
   if (!Config->ARMHasMovtMovw) {
     if (!Config->ARMJ1J2BranchEncoding)
       return addThunkPreArmv7(Reloc, S);
     return addThunkV6M(Reloc, S);
   }
 
   switch (Reloc) {
   case R_ARM_PC24:
   case R_ARM_PLT32:
   case R_ARM_JUMP24:
   case R_ARM_CALL:
-    if (Config->Pic)
+    if (Config->PicThunk)
       return make<ARMV7PILongThunk>(S);
     return make<ARMV7ABSLongThunk>(S);
   case R_ARM_THM_JUMP19:
   case R_ARM_THM_JUMP24:
   case R_ARM_THM_CALL:
-    if (Config->Pic)
+    if (Config->PicThunk)
       return make<ThumbV7PILongThunk>(S);
     return make<ThumbV7ABSLongThunk>(S);
   }
   fatal("unrecognized relocation type");
 }
 
 static Thunk *addThunkMips(RelType Type, Symbol &S) {
   if ((S.StOther & STO_MIPS_MICROMIPS) && isMipsR6())
     return make<MicroMipsR6Thunk>(S);
   if (S.StOther & STO_MIPS_MICROMIPS)
     return make<MicroMipsThunk>(S);
   return make<MipsThunk>(S);
 }
 
 static Thunk *addThunkPPC64(RelType Type, Symbol &S) {
   assert(Type == R_PPC64_REL24 && "unexpected relocation type for thunk");
   if (S.isInPlt())
     return make<PPC64PltCallStub>(S);
 
-  if (Config->Pic)
+  if (Config->PicThunk)
     return make<PPC64PILongBranchThunk>(S);
 
   return make<PPC64PDLongBranchThunk>(S);
 }
 
 Thunk *addThunk(RelType Type, Symbol &S) {
   if (Config->EMachine == EM_AARCH64)
     return addThunkAArch64(Type, S);
 
   if (Config->EMachine == EM_ARM)
     return addThunkArm(Type, S);
 
   if (Config->EMachine == EM_MIPS)
     return addThunkMips(Type, S);
 
   if (Config->EMachine == EM_PPC64)
     return addThunkPPC64(Type, S);
 
   llvm_unreachable("add Thunk only supported for ARM, Mips and PowerPC");
 }
 
 } // end namespace elf
 } // end namespace lld
Index: vendor/lld/dist-release_80/docs/ld.lld.1
===================================================================
--- vendor/lld/dist-release_80/docs/ld.lld.1	(revision 343197)
+++ vendor/lld/dist-release_80/docs/ld.lld.1	(revision 343198)
@@ -1,606 +1,608 @@
 .\" This file is distributed under the University of Illinois Open Source
 .\" License. See LICENSE.TXT for details.
 .\"
 .\" This man page documents only lld's ELF linking support, obtained originally
 .\" from FreeBSD.
 .Dd September 26, 2018
 .Dt LD.LLD 1
 .Os
 .Sh NAME
 .Nm ld.lld
 .Nd ELF linker from the LLVM project
 .Sh SYNOPSIS
 .Nm ld.lld
 .Op Ar options
 .Ar objfile ...
 
 .Sh DESCRIPTION
 A linker takes one or more object, archive, and library files, and combines
 them into an output file (an executable, a shared library, or another object
 file).
 It relocates code and data from the input files and resolves symbol
 references between them.
 .Pp
 .Nm
 is a drop-in replacement for the GNU BFD and gold linkers.
 It accepts most of the same command line arguments and linker scripts
 as GNU linkers.
 .Pp
 .Nm
 currently supports i386, x86-64, ARM, AArch64, PowerPC32, PowerPC64,
 MIPS32, MIPS64, RISC-V, AMDGPU, Hexagon and SPARC V9 targets.
 .Nm
 acts as a Microsoft link.exe-compatible linker if invoked as
 .Nm lld-link
 and as macOS's ld if invoked as
 .Nm ld.ld64.
 All these targets are always supported however
 .Nm
 was built, so you can always use
 .Nm
 as a native linker as well as a cross linker.
 
 .Sh OPTIONS
 .Bl -tag -width indent
 .It Fl -allow-multiple-definition
 Do not error if a symbol is defined multiple times.
 The first definition will be used.
 .It Fl -apply-dynamic-relocs
 Apply link-time values for dynamic relocations.
 .It Fl -as-needed
 Only set
 .Dv DT_NEEDED
 for shared libraries if used.
 .It Fl -auxiliary Ns = Ns Ar value
 Set the
 .Dv DT_AUXILIARY
 field to the specified name.
 .It Fl -Bdynamic , Fl -dy
 Link against shared libraries.
 .It Fl -Bstatic , Fl -static , Fl -dn
 Do not link against shared libraries.
 .It Fl -Bsymbolic
 Bind defined symbols locally.
 .It Fl -Bsymbolic-functions
 Bind defined function symbols locally.
 .It Fl -build-id Ns = Ns Ar value
 Generate a build ID note.
 .Ar value
 may be one of
 .Cm fast ,
 .Cm md5 ,
 .Cm sha1 ,
 .Cm tree ,
 .Cm uuid ,
 .Cm 0x Ns Ar hex-string ,
 and
 .Cm none .
 .Cm tree
 is an alias for
 .Cm sha1 .
 Build-IDs of type
 .Cm fast ,
 .Cm md5 ,
 .Cm sha1 ,
 and
 .Cm tree
 are calculated from the object contents.
 .Cm fast
 is not intended to be cryptographically secure.
 .It Fl -build-id
 Synonym for
 .Fl -build-id Ns = Ns Cm fast .
 .It Fl -color-diagnostics Ns = Ns Ar value
 Use colors in diagnostics.
 .Ar value
 may be one of
 .Cm always ,
 .Cm auto ,
 and
 .Cm never .
 .Cm auto
 enables color if and only if output is to a terminal.
 .It Fl -color-diagnostics
 Alias for
 .Fl -color-diagnostics Ns = Ns Cm auto .
 .It Fl -compress-debug-sections Ns = Ns Ar value
 Compress DWARF debug sections.
 .Ar value
 may be
 .Cm none
 or
 .Cm zlib .
 .It Fl -cref
 Output cross reference table.
 .It Fl -define-common , Fl d
 Assign space to common symbols.
 .It Fl -defsym Ns = Ns Ar symbol Ns = Ns Ar expression
 Define a symbol alias.
 .Ar expression
 may be another symbol or a linker script expression.
 For example,
 .Ql --defsym=foo=bar
 or
 .Ql --defsym=foo=bar+0x100 .
 .It Fl -demangle
 Demangle symbol names.
 .It Fl -disable-new-dtags
 Disable new dynamic tags.
 .It Fl -discard-all , Fl x
 Delete all local symbols.
 .It Fl -discard-locals , Fl X
 Delete temporary local symbols.
 .It Fl -discard-none
 Keep all symbols in the symbol table.
 .It Fl -dynamic-linker Ns = Ns Ar value
 Specify the dynamic linker to be used for a dynamically linked executable.
 This is recorded in an ELF segment of type
 .Dv PT_INTERP .
 .It Fl -dynamic-list Ns = Ns Ar file
 Read a list of dynamic symbols from
 .Ar file .
 .It Fl -eh-frame-hdr
 Request creation of
 .Li .eh_frame_hdr
 section and
 .Dv PT_GNU_EH_FRAME
 segment header.
 .It Fl -emit-relocs , Fl q
 Generate relocations in the output.
 .It Fl -enable-new-dtags
 Enable new dynamic tags.
 .It Fl -end-lib
 End a grouping of objects that should be treated as if they were together
 in an archive.
 .It Fl -entry Ns = Ns Ar entry
 Name of entry point symbol.
 .It Fl -error-limit Ns = Ns Ar value
 Maximum number of errors to emit before stopping.
 A value of zero indicates that there is no limit.
 .It Fl -error-unresolved-symbols
 Report unresolved symbols as errors.
 .It Fl -execute-only
 Mark executable sections unreadable. This option is currently only
 supported on AArch64.
 .It Fl -exclude-libs Ns = Ns Ar value
 Exclude static libraries from automatic export.
 .It Fl -export-dynamic , Fl E
 Put symbols in the dynamic symbol table.
 .It Fl -export-dynamic-symbol Ns = Ns Ar symbol
 Include
 .Ar symbol
 in the dynamic symbol table.
 .It Fl -fatal-warnings
 Treat warnings as errors.
 .It Fl -filter Ns = Ns Ar value , Fl F Ar value
 Set the
 .Dv DT_FILTER
 field to the specified value.
 .It Fl -fini Ns = Ns Ar symbol
 Specify a finalizer function.
 .It Fl -format Ns = Ns Ar input-format , Fl b Ar input-format
 Specify the format of the inputs following this option.
 .Ar input-format
 may be one of
 .Cm binary ,
 .Cm elf ,
 and
 .Cm default .
 .Cm default
 is a synonym for
 .Cm elf .
 .It Fl -gc-sections
 Enable garbage collection of unused sections.
 .It Fl -gdb-index
 Generate
 .Li .gdb_index
 section.
 .It Fl -hash-style Ns = Ns Ar value
 Specify hash style.
 .Ar value
 may be
 .Cm sysv ,
 .Cm gnu ,
 or
 .Cm both .
 .Cm both
 is the default.
 .It Fl -help
 Print a help message.
 .It Fl -icf Ns = Ns Cm all
 Enable identical code folding.
 .It Fl -icf Ns = Ns Cm safe
 Enable safe identical code folding.
 .It Fl -icf Ns = Ns Cm none
 Disable identical code folding.
 .It Fl -image-base Ns = Ns Ar value
 Set the base address to
 .Ar value .
 .It Fl -init Ns = Ns Ar symbol
 Specify an initializer function.
 .It Fl -keep-unique Ns = Ns Ar symbol
 Do not fold
 .Ar symbol
 during ICF.
 .It Fl l Ar libName, Fl -library Ns = Ns Ar libName
 Root name of library to use.
 .It Fl L Ar dir , Fl -library-path Ns = Ns Ar dir
 Add a directory to the library search path.
 .It Fl -lto-aa-pipeline Ns = Ns Ar value
 AA pipeline to run during LTO.
 Used in conjunction with
 .Fl -lto-newpm-passes .
 .It Fl -lto-newpm-passes Ns = Ns Ar value
 Passes to run during LTO.
 .It Fl -lto-O Ns Ar opt-level
 Optimization level for LTO.
 .It Fl -lto-partitions Ns = Ns Ar value
 Number of LTO codegen partitions.
 .It Fl m Ar value
 Set target emulation.
 .It Fl -Map Ns = Ns Ar file , Fl M Ar file
 Print a link map to
 .Ar file .
 .It Fl -no-as-needed
 Always set
 .Dv DT_NEEDED
 for shared libraries.
 .It Fl -no-color-diagnostics
 Do not use colors in diagnostics.
 .It Fl -no-define-common
 Do not assign space to common symbols.
 .It Fl -no-demangle
 Do not demangle symbol names.
 .It Fl -no-dynamic-linker
 Inhibit output of an
 .Li .interp
 section.
 .It Fl -no-gc-sections
 Disable garbage collection of unused sections.
 .It Fl -no-gnu-unique
 Disable STB_GNU_UNIQUE symbol binding.
 .It Fl -no-rosegment
 Do not put read-only non-executable sections in their own segment.
 .It Fl -no-threads
 Do not run the linker multi-threaded.
 .It Fl -no-undefined-version
 Report version scripts that refer undefined symbols.
 .It Fl -no-undefined
 Report unresolved symbols even if the linker is creating a shared library.
 .It Fl -no-whole-archive
 Restores the default behavior of loading archive members.
 .It Fl -no-pie
 Do not create a position independent executable.
 .It Fl -noinhibit-exec
 Retain the executable output file whenever it is still usable.
 .It Fl -nostdlib
 Only search directories specified on the command line.
 .It Fl o Ar path
 Write the output executable, library, or object to
 .Ar path .
 If not specified,
 .Dv a.out
 is used as a default.
 .It Fl O Ns Ar value
 Optimize output file size.
 .Ar value
 may be:
 .Pp
 .Bl -tag -width 2n -compact
 .It Cm 0
 Disable string merging.
 .It Cm 1
 Enable string merging.
 .It Cm 2
 Enable string tail merging.
 .El
 .Pp
 .Fl O Ns Cm 1
 is the default.
 .It Fl -oformat Ns = Ns Ar format
 Specify the format for the output object file.
 The only supported
 .Ar format
 is
 .Cm binary ,
 which produces output with no ELF header.
 .It Fl -omagic , Fl N
 Set the text and data sections to be readable and writable.
 .It Fl -opt-remarks-filename Ar file
 Write optimization remarks in YAML format to
 .Ar file .
 .It Fl -opt-remarks-with-hotness
 Include hotness information in the optimization remarks file.
+.It Fl -pic-veneer
+Always generate position independent thunks.
 .It Fl -pie
 Create a position independent executable.
 .It Fl -print-gc-sections
 List removed unused sections.
 .It Fl -print-icf-sections
 List identical folded sections.
 .It Fl -print-map
 Print a link map to the standard output.
 .It Fl -push-state
 Save the current state of
 .Fl -as-needed ,
 .Fl -static ,
 and
 .Fl -whole-archive.
 .It Fl -pop-state
 Undo the effect of
 .Fl -push-state.
 .It Fl -relocatable , Fl r
 Create relocatable object file.
 .It Fl -reproduce Ns = Ns Ar value
 Dump linker invocation and input files for debugging.
 .It Fl -retain-symbols-file Ns = Ns Ar file
 Retain only the symbols listed in the file.
 .It Fl -rpath Ns = Ns Ar value , Fl R Ar value
 Add a
 .Dv DT_RUNPATH
 to the output.
 .It Fl -rsp-quoting Ns = Ns Ar value
 Quoting style for response files.
 The supported values are
 .Cm windows
 and
 .Cm posix .
 .It Fl -script Ns = Ns Ar file , Fl T Ar file
 Read linker script from
 .Ar file .
 .It Fl -section-start Ns = Ns Ar section Ns = Ns Ar address
 Set address of section.
 .It Fl -shared , Fl -Bsharable
 Build a shared object.
 .It Fl -soname Ns = Ns Ar value , Fl h Ar value
 Set
 .Dv DT_SONAME
 to
 .Ar value .
 .It Fl -sort-section Ns = Ns Ar value
 Specifies sections sorting rule when linkerscript is used.
 .It Fl -start-lib
 Start a grouping of objects that should be treated as if they were together
 in an archive.
 .It Fl -strip-all , Fl s
 Strip all symbols.
 .It Fl -strip-debug , Fl S
 Strip debugging information.
 .It Fl -symbol-ordering-file Ns = Ns Ar file
 Lay out sections in the order specified by
 .Ar file .
 .It Fl -sysroot Ns = Ns Ar value
 Set the system root.
 .It Fl -target1-abs
 Interpret
 .Dv R_ARM_TARGET1
 as
 .Dv R_ARM_ABS32 .
 .It Fl -target1-rel
 Interpret
 .Dv R_ARM_TARGET1
 as
 .Dv R_ARM_REL32 .
 .It Fl -target2 Ns = Ns Ar type
 Interpret
 .Dv R_ARM_TARGET2
 as
 .Ar type ,
 where
 .Ar type
 is one of
 .Cm rel ,
 .Cm abs ,
 or
 .Cm got-rel .
 .It Fl -Tbss Ns = Ns Ar value
 Same as
 .Fl -section-start
 with
 .Li .bss
 as the sectionname.
 .It Fl -Tdata Ns = Ns Ar value
 Same as
 .Fl -section-start
 with
 .Li .data
 as the sectionname.
 .It Fl -Ttext Ns = Ns Ar value
 Same as
 .Fl -section-start
 with
 .Li .text
 as the sectionname.
 .It Fl -thinlto-cache-dir Ns = Ns Ar value
 Path to ThinLTO cached object file directory.
 .It Fl -thinlto-cache-policy Ns = Ns Ar value
 Pruning policy for the ThinLTO cache.
 .It Fl -thinlto-jobs Ns = Ns Ar value
 Number of ThinLTO jobs.
 .It Fl -threads
 Run the linker multi-threaded.
 This option is enabled by default.
 .It Fl -trace
 Print the names of the input files.
 .It Fl -trace-symbol Ns = Ns Ar symbol , Fl y Ar symbol
 Trace references to
 .Ar symbol .
 .It Fl -undefined Ns = Ns Ar symbol , Fl u Ar symbol
 Force
 .Ar symbol
 to be an undefined symbol during linking.
 .It Fl -unresolved-symbols Ns = Ns Ar value
 Determine how to handle unresolved symbols.
 .It Fl v
 Display the version number and proceed with linking if object files are
 specified.
 .It Fl V , Fl -version
 Display the version number and exit.
 .It Fl -verbose
 Verbose mode.
 .It Fl -version-script Ns = Ns Ar file
 Read version script from
 .Ar file .
 .It Fl -warn-backrefs
 Warn about reverse or cyclic dependencies to or between static archives.
 This can be used to ensure linker invocation remains compatible with
 traditional Unix-like linkers.
 .It Fl -warn-common
 Warn about duplicate common symbols.
 .It Fl -warn-ifunc-textrel
 Warn about using ifunc symbols in conjunction with text relocations.
 Older versions of glibc library (2.28 and earlier) has a bug that causes
 the segment that includes ifunc symbols to be marked as not executable when
 they are relocated. As a result, although the program compiles and links
 successfully, it gives segmentation fault when the instruction pointer reaches
 an ifunc symbol. Use -warn-ifunc-textrel to let lld give a warning, if the
 code may include ifunc symbols, may do text relocations and be linked with
 an older glibc version. Otherwise, there is no need to use it, as the default
 value does not give a warning. This flag has been introduced in late 2018,
 has no counter part in ld and gold linkers, and may be removed in the future.
 .It Fl -warn-unresolved-symbols
 Report unresolved symbols as warnings.
 .It Fl -whole-archive
 Force load of all members in a static library.
 .It Fl -wrap Ns = Ns Ar symbol
 Use wrapper functions for symbol.
 .It Fl z Ar option
 Linker option extensions.
 .Bl -tag -width indent
 .It Cm execstack
 Make the main stack executable.
 Stack permissions are recorded in the
 .Dv PT_GNU_STACK
 segment.
 .It Cm global
 Sets the
 .Dv DF_1_GLOBAL flag in the
 .Dv DYNAMIC
 section.
 Different loaders can decide how to handle this flag on their own.
 .It Cm initfirst
 Sets the
 .Dv DF_1_INITFIRST
 flag to indicate the module should be initialized first.
 .It Cm interpose
 Set the
 .Dv DF_1_INTERPOSE
 flag to indicate to the runtime linker that the object is an interposer.
 During symbol resolution interposers are searched after the application
 but before other dependencies.
 .It Cm muldefs
 Do not error if a symbol is defined multiple times.
 The first definition will be used.
 This is a synonym for
 .Fl -allow-multiple-definition.
 .It Cm nocombreloc
 Disable combining and sorting multiple relocation sections.
 .It Cm nocopyreloc
 Disable the creation of copy relocations.
 .It Cm nodefaultlib
 Set the
 .Dv DF_1_NODEFLIB
 flag to indicate that default library search paths should be ignored.
 .It Cm nodelete
 Set the
 .Dv DF_1_NODELETE
 flag to indicate that the object cannot be unloaded from a process.
 .It Cm nodlopen
 Set the
 .Dv DF_1_NOOPEN
 flag to indicate that the object may not be opened by
 .Xr dlopen 3 .
 .It Cm norelro
 Do not indicate that portions of the object shold be mapped read-only
 after initial relocation processing.
 The object will omit the
 .Dv PT_GNU_RELRO
 segment.
 .It Cm notext
 Allow relocations against read-only segments.
 Sets the
 .Dv DT_TEXTREL flag in the
 .Dv DYNAMIC
 section.
 .It Cm now
 Set the
 .Dv DF_BIND_NOW
 flag to indicate that the run-time loader should perform all relocation
 processing as part of object initialization.
 By default relocations may be performed on demand.
 .It Cm origin
 Set the
 .Dv DF_ORIGIN
 flag to indicate that the object requires
 $ORIGIN
 processing.
 .It Cm retpolineplt
 Emit retpoline format PLT entries as a mitigation for CVE-2017-5715.
 .It Cm rodynamic
 Make the
 .Li .dynamic
 section read-only.
 The
 .Dv DT_DEBUG
 tag will not be emitted.
 .It Cm stack-size Ns = Ns Ar size
 Set the main thread's stack size to
 .Ar size .
 The stack size is recorded as the size of the
 .Ar size .
 .Dv PT_GNU_STACK
 program segment.
 .It Cm text
 Do not allow relocations against read-only segments.
 This is the default.
 .It Cm wxneeded
 Create a
 .Dv PT_OPENBSD_WXNEEDED
 segment.
 .El
 .El
 .Sh IMPLEMENTATION NOTES
 .Nm Ap s
 handing of archive files (those with a
 .Pa .a
 file extension) is different from traditional linkers used on Unix-like
 systems.
 .Pp
 Traditional linkers maintain a set of undefined symbols during linking.
 The linker processes each file in the order in which it appears on the
 command line, until the set of undefined symbols becomes empty.
 An object file is linked into the output object when it is encountered,
 with its undefined symbols added to the set.
 Upon encountering an archive file a traditional linker searches the objects
 contained therein, and processes those that satisfy symbols in the unresolved
 set.
 .Pp
 Handling mutually dependent archives may be awkward when using a traditional
 linker.
 Archive files may have to be specified multiple times, or the special command
 line options
 .Fl -start-group
 and
 .Fl -end-group
 may be used to have the linker loop over the files in the group until no new
 symbols are added to the set.
 .Pp
 .Nm
 records all symbols found in objects and archives as it iterates over
 command line arguments.
 When
 .Nm
 encounters an undefined symbol that can be resolved by an object file
 contained in a previously processed archive file, it immediately extracts
 and links it into the output object.
 .Pp
 With certain archive inputs
 .Nm
 may produce different results compared to traditional linkers.
 In practice, large bodies of third party software have been linked with
 .Nm
 without material issues.
 .Pp
 The
 .Fl -warn-backrefs
 option may be used to identify a linker invocation that may be incompatible
 with traditional Unix-like linker behavior.
Index: vendor/lld/dist-release_80/test/ELF/aarch64-gnu-ifunc-address-pie.s
===================================================================
--- vendor/lld/dist-release_80/test/ELF/aarch64-gnu-ifunc-address-pie.s	(nonexistent)
+++ vendor/lld/dist-release_80/test/ELF/aarch64-gnu-ifunc-address-pie.s	(revision 343198)
@@ -0,0 +1,44 @@
+# REQUIRES: aarch64
+# RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-gnu %s -o %t.o
+# RUN: ld.lld -pie %t.o -o %tout
+# RUN: llvm-objdump -D %tout | FileCheck %s
+# RUN: llvm-readobj -r %tout | FileCheck %s -check-prefix=CHECK-RELOCS
+
+# Test that when we take the address of a preemptible ifunc using -fpie, we can
+# handle the case when the ifunc is in the same translation unit as the address
+# taker. In this case the compiler knows that ifunc is not defined in a shared
+# library so it can use a non got generating relative reference.
+.text
+.globl myfunc
+.type myfunc,@gnu_indirect_function
+myfunc:
+ ret
+
+.text
+.globl main
+.type main,@function
+main:
+ adrp x8, myfunc
+ add  x8, x8, :lo12: myfunc
+ ret
+
+# CHECK: 0000000000010000 myfunc:
+# CHECK-NEXT:    10000:	c0 03 5f d6 	ret
+# CHECK: 0000000000010004 main:
+# CHECK-NEXT:    10004:	08 00 00 90 	adrp	x8, #0
+# x8 = 0x10000
+# CHECK-NEXT:    10008:	08 41 00 91 	add	x8, x8, #16
+# x8 = 0x10010 = .plt for myfunc
+# CHECK-NEXT:    1000c:	c0 03 5f d6 	ret
+# CHECK-NEXT: Disassembly of section .plt:
+# CHECK-NEXT: 0000000000010010 .plt:
+# CHECK-NEXT:    10010:	90 00 00 90 	adrp	x16, #65536
+# CHECK-NEXT:    10014:	11 02 40 f9 	ldr	x17, [x16]
+# CHECK-NEXT:    10018:	10 02 00 91 	add	x16, x16, #0
+# CHECK-NEXT:    1001c:	20 02 1f d6 	br	x17
+
+# CHECK-RELOCS: Relocations [
+# CHECK-RELOCS-NEXT:   Section {{.*}} .rela.plt {
+# CHECK-RELOCS-NEXT:     0x20000 R_AARCH64_IRELATIVE - 0x10000
+# CHECK-RELOCS-NEXT:   }
+# CHECK-RELOCS-NEXT: ]
Index: vendor/lld/dist-release_80/test/ELF/arm-force-pi-thunk.s
===================================================================
--- vendor/lld/dist-release_80/test/ELF/arm-force-pi-thunk.s	(nonexistent)
+++ vendor/lld/dist-release_80/test/ELF/arm-force-pi-thunk.s	(revision 343198)
@@ -0,0 +1,87 @@
+// REQUIRES: arm
+// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
+// RUN: echo "SECTIONS { \
+// RUN:       . = SIZEOF_HEADERS; \
+// RUN:       .text_low : { *(.text_low) *(.text_low2) } \
+// RUN:       .text_high 0x2000000 : { *(.text_high) *(.text_high2) } \
+// RUN:       } " > %t.script
+// RUN: ld.lld --pic-veneer --script %t.script %t -o %t2 2>&1
+// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi %t2 | FileCheck %s
+
+// Test that we can force generation of position independent thunks even when
+// inputs are not pic.
+
+ .syntax unified
+ .section .text_low, "ax", %progbits
+ .thumb
+ .globl _start
+_start: bx lr
+ .globl low_target
+ .type low_target, %function
+low_target:
+ bl high_target
+ bl high_target2
+
+ .section .text_low2, "ax", %progbits
+ .thumb
+ .globl low_target2
+ .type low_target2, %function
+low_target2:
+ bl high_target
+ bl high_target2
+
+// CHECK: Disassembly of section .text_low:
+// CHECK-NEXT: _start:
+// CHECK-NEXT:       94:        70 47   bx      lr
+// CHECK: low_target:
+// CHECK-NEXT:       96:        00 f0 03 f8     bl      #6
+// CHECK-NEXT:       9a:        00 f0 07 f8     bl      #14
+// CHECK-NEXT:       9e:        d4 d4   bmi     #-88
+// CHECK: __ThumbV7PILongThunk_high_target:
+// CHECK-NEXT:       a0:        4f f6 55 7c     movw    r12, #65365
+// CHECK-NEXT:       a4:        c0 f2 ff 1c     movt    r12, #511
+// CHECK-NEXT:       a8:        fc 44   add     r12, pc
+// CHECK-NEXT:       aa:        60 47   bx      r12
+// CHECK: __ThumbV7PILongThunk_high_target2:
+// CHECK-NEXT:       ac:        4f f6 69 7c     movw    r12, #65385
+// CHECK-NEXT:       b0:        c0 f2 ff 1c     movt    r12, #511
+// CHECK-NEXT:       b4:        fc 44   add     r12, pc
+// CHECK-NEXT:       b6:        60 47   bx      r12
+// CHECK: low_target2:
+// CHECK-NEXT:       b8:        ff f7 f2 ff     bl      #-28
+// CHECK-NEXT:       bc:        ff f7 f6 ff     bl      #-20
+
+
+ .section .text_high, "ax", %progbits
+ .thumb
+ .globl high_target
+ .type high_target, %function
+high_target:
+ bl low_target
+ bl low_target2
+
+ .section .text_high2, "ax", %progbits
+ .thumb
+ .globl high_target2
+ .type high_target2, %function
+high_target2:
+ bl low_target
+ bl low_target2
+
+// CHECK: Disassembly of section .text_high:
+// CHECK-NEXT: high_target:
+// CHECK-NEXT:  2000000:        00 f0 02 f8     bl      #4
+// CHECK-NEXT:  2000004:        00 f0 06 f8     bl      #12
+// CHECK: __ThumbV7PILongThunk_low_target:
+// CHECK-NEXT:  2000008:        40 f2 83 0c     movw    r12, #131
+// CHECK-NEXT:  200000c:        cf f6 00 6c     movt    r12, #65024
+// CHECK-NEXT:  2000010:        fc 44   add     r12, pc
+// CHECK-NEXT:  2000012:        60 47   bx      r12
+// CHECK: __ThumbV7PILongThunk_low_target2:
+// CHECK-NEXT:  2000014:        40 f2 99 0c     movw    r12, #153
+// CHECK-NEXT:  2000018:        cf f6 00 6c     movt    r12, #65024
+// CHECK-NEXT:  200001c:        fc 44   add     r12, pc
+// CHECK-NEXT:  200001e:        60 47   bx      r12
+// CHECK: high_target2:
+// CHECK-NEXT:  2000020:        ff f7 f2 ff     bl      #-28
+// CHECK-NEXT:  2000024:        ff f7 f6 ff     bl      #-20
Index: vendor/lld/dist-release_80/test/ELF/tls-opt-x86_64-noplt.s
===================================================================
--- vendor/lld/dist-release_80/test/ELF/tls-opt-x86_64-noplt.s	(nonexistent)
+++ vendor/lld/dist-release_80/test/ELF/tls-opt-x86_64-noplt.s	(revision 343198)
@@ -0,0 +1,88 @@
+// REQUIRES: x86
+
+// Checks whether the TLS optimizations match the cases in Chapter 11 of
+// https://raw.githubusercontent.com/wiki/hjl-tools/x86-psABI/x86-64-psABI-1.0.pdf
+
+// RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %s -o %t.o
+// RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %p/Inputs/tls-opt-gdie.s -o %tso.o
+// RUN: ld.lld -shared %tso.o -o %t.so
+// RUN: ld.lld %t.o %t.so -o %t1
+// RUN: llvm-readobj -r %t1 | FileCheck --check-prefix=RELOC %s
+// RUN: llvm-objdump -d %t1 | FileCheck --check-prefix=DISASM %s
+
+// RELOC:      Relocations [
+// RELOC-NEXT:  Section {{.*}} .rela.dyn {
+// RELOC-NEXT:    0x2020C0 R_X86_64_TPOFF64 tlsshared0 0x0
+// RELOC-NEXT:    0x2020C8 R_X86_64_TPOFF64 tlsshared1 0x0
+// RELOC-NEXT:  }
+// RELOC-NEXT: ]
+
+// DISASM:      _start:
+
+// Table 11.5: GD -> IE Code Transition (LP64)
+// DISASM-NEXT: 201000: 64 48 8b 04 25 00 00 00 00      movq %fs:0, %rax
+// DISASM-NEXT: 201009: 48 03 05 b0 10 00 00            addq 4272(%rip), %rax
+// DISASM-NEXT: 201010: 64 48 8b 04 25 00 00 00 00      movq %fs:0, %rax
+// DISASM-NEXT: 201019: 48 03 05 a8 10 00 00            addq 4264(%rip), %rax
+
+// Table 11.7: GD -> LE Code Transition (LP64)
+// DISASM-NEXT: 201020: 64 48 8b 04 25 00 00 00 00      movq %fs:0, %rax
+// DISASM-NEXT: 201029: 48 8d 80 f8 ff ff ff            leaq -8(%rax), %rax
+// DISASM-NEXT: 201030: 64 48 8b 04 25 00 00 00 00      movq %fs:0, %rax
+// DISASM-NEXT: 201039: 48 8d 80 fc ff ff ff            leaq -4(%rax), %rax
+
+
+// Table 11.9: LD -> LE Code Transition (LP64)
+// DISASM-NEXT: 201040: 66 66 66 66 64 48 8b 04 25 00 00 00 00  movq %fs:0, %rax
+// DISASM-NEXT: 20104d: 66 66 66 66 64 48 8b 04 25 00 00 00 00  movq %fs:0, %rax
+
+.type tls0,@object
+.section .tbss,"awT",@nobits
+.globl tls0
+.align 4
+tls0:
+ .long 0
+ .size tls0, 4
+
+.type  tls1,@object
+.globl tls1
+.align 4
+tls1:
+ .long 0
+ .size tls1, 4
+
+.section .text
+.globl _start
+_start:
+ // Table 11.5: GD -> IE Code Transition (LP64)
+ .byte  0x66
+ leaq   tlsshared0@tlsgd(%rip),%rdi
+ .byte  0x66
+ rex64
+ call   *__tls_get_addr@GOTPCREL(%rip)
+
+ .byte  0x66
+ leaq   tlsshared1@tlsgd(%rip),%rdi
+ .byte  0x66
+ rex64
+ call   *__tls_get_addr@GOTPCREL(%rip)
+
+ // Table 11.7: GD -> LE Code Transition (LP64)
+ .byte  0x66
+ leaq   tls0@tlsgd(%rip),%rdi
+ .byte  0x66
+ rex64
+ call   *__tls_get_addr@GOTPCREL(%rip)
+
+ .byte  0x66
+ leaq   tls1@tlsgd(%rip),%rdi
+ .byte  0x66
+ rex64
+ call   *__tls_get_addr@GOTPCREL(%rip)
+
+ // Table 11.9: LD -> LE Code Transition (LP64)
+ leaq   tls0@tlsld(%rip),%rdi
+ call   *__tls_get_addr@GOTPCREL(%rip)
+
+ leaq   tls1@tlsld(%rip),%rdi
+ call   *__tls_get_addr@GOTPCREL(%rip)