Index: head/sys/arm/conf/ARMADA38X =================================================================== --- head/sys/arm/conf/ARMADA38X (revision 340431) +++ head/sys/arm/conf/ARMADA38X (revision 340432) @@ -1,102 +1,107 @@ # # Kernel configuration for Marvell Armada38x # # $FreeBSD$ # include "../mv/armada38x/std.armada38x" include "std.armv7" ident ARMADA38X options SOC_MV_ARMADA38X makeoptions WERROR="-Werror" makeoptions MODULES_EXTRA="dtb/mv" options MD_ROOT #makeoptions MFS_IMAGE=/path/to/miniroot #options ROOTDEVNAME=\"ufs:md0\" options ROOTDEVNAME=\"/dev/da0s1a\" options SCHED_ULE # ULE scheduler options SMP options VM_KMEM_SIZE_MAX=0x9CCD000 # Pseudo devices device random device pty device loop device md # Serial ports device uart device uart_snps # Network device ether device vlan device mii device bpf device re device mdio device etherswitch device e6000sw device neta # PCI device pci # Interrupt controllers device gic # Timers device mpcore_timer # USB device usb device ehci device xhci device umass device scbus device pass device da # MMC/SD/SDIO Card slot support device mmc # mmc/sd bus device mmcsd # mmc/sd flash cards device sdhci # mmc/sd host controller # SATA device ahci # I2C device iic device iicbus device twsi +# SPI +device spibus +device spigen +device mv_spi + # Wireless NIC cards device wlan # 802.11 support device ath # Atheros NIC's device ath_pci # Atheros pci/cardbus glue device ath_hal device ath_rate_sample options ATH_ENABLE_11N # CESA device cesa device crypto device cryptodev # L2 Cache device pl310 options PLATFORM # FDT options FDT # GPIO device gpio device gpioled Index: head/sys/arm/conf/GENERIC =================================================================== --- head/sys/arm/conf/GENERIC (revision 340431) +++ head/sys/arm/conf/GENERIC (revision 340432) @@ -1,269 +1,270 @@ # # GENERICV6 -- Generic(ish) kernel config. # # For more information on this file, please read the config(5) manual page, # and/or the handbook section on Kernel Configuration Files: # # https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html # # The handbook is also available locally in /usr/share/doc/handbook # if you've installed the doc distribution, otherwise always see the # FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the # latest information. # # An exhaustive list of options and more detailed explanations of the # device lines is also present in the ../../conf/NOTES and NOTES files. # If you are in doubt as to the purpose or necessity of a line, check first # in NOTES. # # $FreeBSD$ ident GENERIC cpu CPU_CORTEXA cpu CPU_MV_PJ4B options SMP_ON_UP machine arm armv7 makeoptions CONF_CFLAGS="-march=armv7a" include "std.armv7" files "../allwinner/files.allwinner" files "../allwinner/files.allwinner_up" files "../allwinner/a10/files.a10" files "../allwinner/a13/files.a13" files "../allwinner/a20/files.a20" files "../allwinner/a31/files.a31" files "../allwinner/a33/files.a33" files "../allwinner/a83t/files.a83t" files "../allwinner/h3/files.h3" files "../broadcom/bcm2835/files.bcm2836" files "../broadcom/bcm2835/files.bcm283x" files "../freescale/imx/files.imx6" files "../mv/files.arm7" files "../nvidia/tegra124/files.tegra124" files "../qemu/files.qemu" files "../ti/files.ti" files "../ti/am335x/files.am335x" files "../ti/omap4/files.omap4" files "../xilinx/files.zynq7" options SOC_ALLWINNER_A10 options SOC_ALLWINNER_A13 options SOC_ALLWINNER_A20 options SOC_ALLWINNER_A31 options SOC_ALLWINNER_A31S options SOC_ALLWINNER_A33 options SOC_ALLWINNER_A83T options SOC_ALLWINNER_H2PLUS options SOC_ALLWINNER_H3 options SOC_BCM2836 options SOC_MV_ARMADA38X options SOC_MV_ARMADAXP options SOC_TI_AM335X options SOC_OMAP4 options SCHED_ULE # ULE scheduler options SMP # Enable multiple cores options PLATFORM options LINUX_BOOT_ABI # EXT_RESOURCES pseudo devices options EXT_RESOURCES device clk device phy device hwreset device nvmem device regulator device syscon # CPU frequency control device cpufreq # Interrupt controller device gic # PMU support (for CCNT). device pmu # ARM Generic Timer device generic_timer device mpcore_timer # MMC/SD/SDIO Card slot support device sdhci # SD controller device mmc # mmc/sd bus device mmcsd # mmc/sd flash cards # ATA controllers device ahci # AHCI-compatible SATA controllers #device ata # Legacy ATA/SATA controllers # PCI options NEW_PCIB device pci device pci_host_generic # PCI NICs device re # RealTek 8139C+/8169/8169S/8110S # VirtIO device virtio device virtio_mmio device virtio_pci device virtio_blk device vtnet # Console and misc device uart device uart_ns8250 device uart_snps device pl011 device pty device snp device md # Memory "disks" device random # Entropy device device firmware # firmware assist module device pl310 # PL310 L2 cache controller device psci # I2C support device iicbus device iic device twsi device rsb # Allwinner Reduced Serial Bus device p2wi # Allwinner Push-Pull Two Wire device axp209 # AXP209 Power Management Unit device axp81x # AXP813/818 Power Management Unit device bcm2835_bsc device fsliic # Freescale i2c/iic device icee # AT24Cxxx and compatible EEPROMs device sy8106a # SY8106A Buck Regulator device ti_i2c device am335x_pmic # AM335x Power Management IC (TPC65217) device am335x_rtc # RTC support (power management only) device twl # TI TWLX0X0/TPS659x0 Power Management device twl_vreg # twl voltage regulation device twl_clks # twl external clocks # i2c RTCs device ds1307 # Dallas DS1307 RTC and compatible device ds13rtc # All Dallas/Maxim DS13xx RTCs device ds1672 # Dallas DS1672 RTC device ds3231 # Dallas DS3231 RTC + temperature device nxprtc # NXP RTCs: PCA/PFC212x PCA/PCF85xx device s35390a # Seiko s3539x RTCs # GPIO device gpio device gpiobacklight device gpioled device gpioregulator # EVDEV support device evdev # input event device support options EVDEV_SUPPORT # evdev support in legacy drivers device uinput # install /dev/uinput cdev device aw_cir # SPI device spibus device spigen device bcm2835_spi +device mv_spi device ti_spi # ADC support device ti_adc # Watchdog support # If we don't enable the watchdog driver, the BealeBone could potentially # reboot automatically because the boot loader might have enabled the # watchdog. device ti_wdt device imxwdt # Watchdog. WARNING: can't be disabled!!! device scbus # SCSI bus (required for ATA/SCSI) device da # Direct Access (disks) device cd # CD device pass # Passthrough device (direct ATA/SCSI access) # USB support options USB_HOST_ALIGN=64 # Align usb buffers to cache line size. device usb device uhci device ohci device ehci device xhci device dwcotg # DWC OTG controller device musb device axe # USB-Ethernet device umass # Disks/Mass storage - Requires scbus and da device uhid # "Human Interface Devices" device ukbd # Allow keyboard like HIDs to control console device firmware # Device mode support device usb_template # Control of the gadget # Ethernet device loop device ether device vlan # 802.1Q VLAN support device bpf device mii device mdio device etherswitch device e6000sw # Ethernet NICs that use the common MII bus controller code. # NOTE: Be sure to keep the 'device miibus' line in order to use these NICs! device miibus device awg # 10/100/1000 integrated EMAC controller device cpsw # TI Common Platform Ethernet Switch (CPSW) device cgem # Zynq-7000 gig ethernet device device dwc # 10/100/1000 integrated GMAC controller device emac # 10/100 integrated EMAC controller device ffec # Freescale Fast Ethernet Controller device neta # Marvell 10/100/1000 Network controller device smsc # SMSC LAN91C111 # Sound support device sound # Framebuffer support device vt device kbdmux device ums device videomode device hdmi device vchiq # Pinmux device fdt_pinctrl # TI Programmable Realtime Unit support device ti_pruss # Mailbox support device ti_mbox # DMA controller device fslsdma device ti_sdma # Extensible Firmware Interface options EFI # Marvell Cryptographic Engine and Security Accelerator device cesa device crypto device cryptodev # imx6 on-chip RTC device imx6_snvs # On-chip RTC # Flattened Device Tree options FDT # Configure using FDT/DTB data makeoptions MODULES_EXTRA="dtb/allwinner dtb/am335x dtb/imx6 dtb/nvidia dtb/rpi dtb/zynq dtb/omap4" Index: head/sys/arm/mv/files.arm7 =================================================================== --- head/sys/arm/mv/files.arm7 (revision 340431) +++ head/sys/arm/mv/files.arm7 (revision 340432) @@ -1,39 +1,40 @@ # $FreeBSD$ arm/mv/armada38x/armada38x.c standard arm/mv/armadaxp/armadaxp.c standard arm/mv/gpio.c optional gpio arm/mv/mv_common.c standard arm/mv/mv_localbus.c standard arm/mv/mv_armv7_machdep.c standard arm/mv/mv_pci_ctrl.c optional pci | fdt arm/mv/mv_pci.c optional pci arm/mv/mv_ts.c standard arm/mv/timer.c standard arm/mv/mpic.c standard arm/mv/armada/thermal.c optional fdt arm/mv/armada/wdt.c optional fdt arm/mv/armada38x/armada38x_mp.c optional smp arm/mv/armada38x/pmsu.c standard arm/mv/armada38x/armada38x_rtc.c standard arm/mv/armada38x/armada38x_pl310.c optional pl310 +arm/mv/mv_spi.c optional mv_spi spibus dev/sdhci/sdhci_fdt.c optional sdhci arm/mv/rtc.c standard arm/mv/armadaxp/armadaxp_mp.c optional smp arm/mv/armadaxp/mptramp.S optional smp dev/cesa/cesa.c optional cesa dev/iicbus/twsi/mv_twsi.c optional twsi dev/mge/if_mge.c optional mge dev/neta/if_mvneta_fdt.c optional neta fdt dev/neta/if_mvneta.c optional neta mdio mii dev/nand/nfc_mv.c optional nand dev/mvs/mvs_soc.c optional mvs dev/uart/uart_dev_ns8250.c optional uart dev/uart/uart_dev_snps.c optional uart dev/usb/controller/ehci_mv.c optional ehci dev/usb/controller/xhci_mv.c optional xhci dev/ahci/ahci_mv_fdt.c optional ahci kern/kern_clocksource.c standard Index: head/sys/arm/mv/mv_spi.c =================================================================== --- head/sys/arm/mv/mv_spi.c (nonexistent) +++ head/sys/arm/mv/mv_spi.c (revision 340432) @@ -0,0 +1,351 @@ +/*- + * Copyright (c) 2017-2018, Rubicon Communications, LLC (Netgate) + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "spibus_if.h" + +struct mv_spi_softc { + device_t sc_dev; + struct mtx sc_mtx; + struct resource *sc_mem_res; + struct resource *sc_irq_res; + struct spi_command *sc_cmd; + bus_space_tag_t sc_bst; + bus_space_handle_t sc_bsh; + uint32_t sc_len; + uint32_t sc_read; + uint32_t sc_flags; + uint32_t sc_written; + void *sc_intrhand; +}; + +#define MV_SPI_BUSY 0x1 +#define MV_SPI_WRITE(_sc, _off, _val) \ + bus_space_write_4((_sc)->sc_bst, (_sc)->sc_bsh, (_off), (_val)) +#define MV_SPI_READ(_sc, _off) \ + bus_space_read_4((_sc)->sc_bst, (_sc)->sc_bsh, (_off)) +#define MV_SPI_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) +#define MV_SPI_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) + +#define MV_SPI_CONTROL 0 +#define MV_SPI_CTRL_CS_SHIFT 2 +#define MV_SPI_CTRL_SMEMREADY (1 << 1) +#define MV_SPI_CTRL_CS_ACTIVE (1 << 0) +#define MV_SPI_CONF 0x4 +#define MV_SPI_CONF_BYTELEN (1 << 5) +#define MV_SPI_DATAOUT 0x8 +#define MV_SPI_DATAIN 0xc +#define MV_SPI_INTR_STAT 0x10 +#define MV_SPI_INTR_MASK 0x14 +#define MV_SPI_INTR_SMEMREADY (1 << 0) + +static struct ofw_compat_data compat_data[] = { + {"marvell,armada-380-spi", 1}, + {NULL, 0} +}; + +static void mv_spi_intr(void *); + +static int +mv_spi_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) + return (ENXIO); + + device_set_desc(dev, "Marvell SPI controller"); + + return (BUS_PROBE_DEFAULT); +} + +static int +mv_spi_attach(device_t dev) +{ + struct mv_spi_softc *sc; + int rid; + uint32_t reg; + + sc = device_get_softc(dev); + sc->sc_dev = dev; + + rid = 0; + sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, + RF_ACTIVE); + if (!sc->sc_mem_res) { + device_printf(dev, "cannot allocate memory window\n"); + return (ENXIO); + } + + sc->sc_bst = rman_get_bustag(sc->sc_mem_res); + sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res); + + rid = 0; + sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, + RF_ACTIVE); + if (!sc->sc_irq_res) { + bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); + device_printf(dev, "cannot allocate interrupt\n"); + return (ENXIO); + } + + /* Deactivate the bus - just in case... */ + reg = MV_SPI_READ(sc, MV_SPI_CONTROL); + MV_SPI_WRITE(sc, MV_SPI_CONTROL, reg & ~MV_SPI_CTRL_CS_ACTIVE); + + /* Disable the two bytes FIFO. */ + reg = MV_SPI_READ(sc, MV_SPI_CONF); + MV_SPI_WRITE(sc, MV_SPI_CONF, reg & ~MV_SPI_CONF_BYTELEN); + + /* Clear and disable interrupts. */ + MV_SPI_WRITE(sc, MV_SPI_INTR_MASK, 0); + MV_SPI_WRITE(sc, MV_SPI_INTR_STAT, 0); + + /* Hook up our interrupt handler. */ + if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE, + NULL, mv_spi_intr, sc, &sc->sc_intrhand)) { + bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); + bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); + device_printf(dev, "cannot setup the interrupt handler\n"); + return (ENXIO); + } + + mtx_init(&sc->sc_mtx, "mv_spi", NULL, MTX_DEF); + + device_add_child(dev, "spibus", -1); + + /* Probe and attach the spibus when interrupts are available. */ + config_intrhook_oneshot((ich_func_t)bus_generic_attach, dev); + + return (0); +} + +static int +mv_spi_detach(device_t dev) +{ + struct mv_spi_softc *sc; + + bus_generic_detach(dev); + + sc = device_get_softc(dev); + mtx_destroy(&sc->sc_mtx); + if (sc->sc_intrhand) + bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intrhand); + if (sc->sc_irq_res) + bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); + if (sc->sc_mem_res) + bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); + + return (0); +} + +static __inline void +mv_spi_rx_byte(struct mv_spi_softc *sc) +{ + struct spi_command *cmd; + uint32_t read; + uint8_t *p; + + cmd = sc->sc_cmd; + p = (uint8_t *)cmd->rx_cmd; + read = sc->sc_read++; + if (read >= cmd->rx_cmd_sz) { + p = (uint8_t *)cmd->rx_data; + read -= cmd->rx_cmd_sz; + } + p[read] = MV_SPI_READ(sc, MV_SPI_DATAIN) & 0xff; +} + +static __inline void +mv_spi_tx_byte(struct mv_spi_softc *sc) +{ + struct spi_command *cmd; + uint32_t written; + uint8_t *p; + + cmd = sc->sc_cmd; + p = (uint8_t *)cmd->tx_cmd; + written = sc->sc_written++; + if (written >= cmd->tx_cmd_sz) { + p = (uint8_t *)cmd->tx_data; + written -= cmd->tx_cmd_sz; + } + MV_SPI_WRITE(sc, MV_SPI_DATAOUT, p[written]); +} + +static void +mv_spi_intr(void *arg) +{ + struct mv_spi_softc *sc; + + sc = (struct mv_spi_softc *)arg; + MV_SPI_LOCK(sc); + + /* Filter stray interrupts. */ + if ((sc->sc_flags & MV_SPI_BUSY) == 0) { + MV_SPI_UNLOCK(sc); + return; + } + + /* RX */ + mv_spi_rx_byte(sc); + + /* TX */ + mv_spi_tx_byte(sc); + + /* Check for end of transfer. */ + if (sc->sc_written == sc->sc_len && sc->sc_read == sc->sc_len) + wakeup(sc->sc_dev); + + MV_SPI_UNLOCK(sc); +} + +static int +mv_spi_transfer(device_t dev, device_t child, struct spi_command *cmd) +{ + struct mv_spi_softc *sc; + uint32_t cs, reg; + int resid, timeout; + + KASSERT(cmd->tx_cmd_sz == cmd->rx_cmd_sz, + ("TX/RX command sizes should be equal")); + KASSERT(cmd->tx_data_sz == cmd->rx_data_sz, + ("TX/RX data sizes should be equal")); + + /* Get the proper chip select for this child. */ + spibus_get_cs(child, &cs); + cs &= ~SPIBUS_CS_HIGH; + + sc = device_get_softc(dev); + MV_SPI_LOCK(sc); + + /* Wait until the controller is free. */ + while (sc->sc_flags & MV_SPI_BUSY) + mtx_sleep(dev, &sc->sc_mtx, 0, "mv_spi", 0); + + /* Now we have control over SPI controller. */ + sc->sc_flags = MV_SPI_BUSY; + + /* Save a pointer to the SPI command. */ + sc->sc_cmd = cmd; + sc->sc_read = 0; + sc->sc_written = 0; + sc->sc_len = cmd->tx_cmd_sz + cmd->tx_data_sz; + + MV_SPI_WRITE(sc, MV_SPI_CONTROL, cs << MV_SPI_CTRL_CS_SHIFT); + reg = MV_SPI_READ(sc, MV_SPI_CONTROL); + MV_SPI_WRITE(sc, MV_SPI_CONTROL, reg | MV_SPI_CTRL_CS_ACTIVE); + + while ((resid = sc->sc_len - sc->sc_written) > 0) { + + MV_SPI_WRITE(sc, MV_SPI_INTR_STAT, 0); + + /* + * Write to start the transmission and read the byte + * back when ready. + */ + mv_spi_tx_byte(sc); + timeout = 1000; + while (--timeout > 0) { + reg = MV_SPI_READ(sc, MV_SPI_CONTROL); + if (reg & MV_SPI_CTRL_SMEMREADY) + break; + DELAY(1); + } + if (timeout == 0) + break; + mv_spi_rx_byte(sc); + } + + /* Stop the controller. */ + reg = MV_SPI_READ(sc, MV_SPI_CONTROL); + MV_SPI_WRITE(sc, MV_SPI_CONTROL, reg & ~MV_SPI_CTRL_CS_ACTIVE); + MV_SPI_WRITE(sc, MV_SPI_INTR_MASK, 0); + MV_SPI_WRITE(sc, MV_SPI_INTR_STAT, 0); + + /* Release the controller and wakeup the next thread waiting for it. */ + sc->sc_flags = 0; + wakeup_one(dev); + MV_SPI_UNLOCK(sc); + + /* + * Check for transfer timeout. The SPI controller doesn't + * return errors. + */ + return ((timeout == 0) ? EIO : 0); +} + +static phandle_t +mv_spi_get_node(device_t bus, device_t dev) +{ + + return (ofw_bus_get_node(bus)); +} + +static device_method_t mv_spi_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, mv_spi_probe), + DEVMETHOD(device_attach, mv_spi_attach), + DEVMETHOD(device_detach, mv_spi_detach), + + /* SPI interface */ + DEVMETHOD(spibus_transfer, mv_spi_transfer), + + /* ofw_bus interface */ + DEVMETHOD(ofw_bus_get_node, mv_spi_get_node), + + DEVMETHOD_END +}; + +static devclass_t mv_spi_devclass; + +static driver_t mv_spi_driver = { + "spi", + mv_spi_methods, + sizeof(struct mv_spi_softc), +}; + +DRIVER_MODULE(mv_spi, simplebus, mv_spi_driver, mv_spi_devclass, 0, 0); Property changes on: head/sys/arm/mv/mv_spi.c ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property