Index: head/sys/arm/allwinner/a10_timer.c =================================================================== --- head/sys/arm/allwinner/a10_timer.c (revision 338271) +++ head/sys/arm/allwinner/a10_timer.c (revision 338272) @@ -1,367 +1,474 @@ /*- * Copyright (c) 2012 Ganbold Tsagaankhuu * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include -#include #include #include #include #include #include -#include +#include -#include - +#if defined(__aarch64__) +#include "opt_soc.h" +#else #include +#endif /** * Timer registers addr * */ -#define SW_TIMER_IRQ_EN_REG 0x00 -#define SW_TIMER_IRQ_STA_REG 0x04 -#define SW_TIMER0_CTRL_REG 0x10 -#define SW_TIMER0_INT_VALUE_REG 0x14 -#define SW_TIMER0_CUR_VALUE_REG 0x18 +#define TIMER_IRQ_EN_REG 0x00 +#define TIMER_IRQ_ENABLE(x) (1 << x) -#define SW_COUNTER64LO_REG 0xa4 -#define SW_COUNTER64HI_REG 0xa8 -#define CNT64_CTRL_REG 0xa0 +#define TIMER_IRQ_STA_REG 0x04 +#define TIMER_IRQ_PENDING(x) (1 << x) -#define CNT64_RL_EN 0x02 /* read latch enable */ +/* + * On A10, A13, A20 and A31/A31s 6 timers are available + */ +#define TIMER_CTRL_REG(x) (0x10 + 0x10 * x) +#define TIMER_CTRL_START (1 << 0) +#define TIMER_CTRL_AUTORELOAD (1 << 1) +#define TIMER_CTRL_CLKSRC_MASK (3 << 2) +#define TIMER_CTRL_OSC24M (1 << 2) +#define TIMER_CTRL_PRESCALAR_MASK (0x7 << 4) +#define TIMER_CTRL_PRESCALAR(x) ((x - 1) << 4) +#define TIMER_CTRL_MODE_MASK (1 << 7) +#define TIMER_CTRL_MODE_SINGLE (1 << 7) +#define TIMER_CTRL_MODE_CONTINUOUS (0 << 7) +#define TIMER_INTV_REG(x) (0x14 + 0x10 * x) +#define TIMER_CURV_REG(x) (0x18 + 0x10 * x) -#define TIMER_ENABLE (1<<0) -#define TIMER_AUTORELOAD (1<<1) -#define TIMER_OSC24M (1<<2) /* oscillator = 24mhz */ -#define TIMER_PRESCALAR (0<<4) /* prescalar = 1 */ +/* 64 bit counter, available in A10 and A13 */ +#define CNT64_CTRL_REG 0xa0 +#define CNT64_CTRL_RL_EN 0x02 /* read latch enable */ +#define CNT64_LO_REG 0xa4 +#define CNT64_HI_REG 0xa8 -#define SYS_TIMER_CLKSRC 24000000 /* clock source */ +#define SYS_TIMER_CLKSRC 24000000 /* clock source */ +enum a10_timer_type { + A10_TIMER = 1, + A23_TIMER, +}; + struct a10_timer_softc { device_t sc_dev; struct resource *res[2]; - bus_space_tag_t sc_bst; - bus_space_handle_t sc_bsh; void *sc_ih; /* interrupt handler */ uint32_t sc_period; - uint32_t timer0_freq; - struct eventtimer et; + uint64_t timer0_freq; + struct eventtimer et; + enum a10_timer_type type; }; -int a10_timer_get_timerfreq(struct a10_timer_softc *); - #define timer_read_4(sc, reg) \ - bus_space_read_4(sc->sc_bst, sc->sc_bsh, reg) + bus_read_4(sc->res[A10_TIMER_MEMRES], reg) #define timer_write_4(sc, reg, val) \ - bus_space_write_4(sc->sc_bst, sc->sc_bsh, reg, val) + bus_write_4(sc->res[A10_TIMER_MEMRES], reg, val) static u_int a10_timer_get_timecount(struct timecounter *); static int a10_timer_timer_start(struct eventtimer *, sbintime_t first, sbintime_t period); static int a10_timer_timer_stop(struct eventtimer *); -static uint64_t timer_read_counter64(void); +static uint64_t timer_read_counter64(struct a10_timer_softc *sc); +static void a10_timer_eventtimer_setup(struct a10_timer_softc *sc); -static int a10_timer_hardclock(void *); +static void a23_timer_timecounter_setup(struct a10_timer_softc *sc); +static u_int a23_timer_get_timecount(struct timecounter *tc); + +static int a10_timer_irq(void *); static int a10_timer_probe(device_t); static int a10_timer_attach(device_t); +#if defined(__arm__) static delay_func a10_timer_delay; +#endif static struct timecounter a10_timer_timecounter = { .tc_name = "a10_timer timer0", .tc_get_timecount = a10_timer_get_timecount, .tc_counter_mask = ~0u, .tc_frequency = 0, .tc_quality = 1000, }; -struct a10_timer_softc *a10_timer_sc = NULL; +static struct timecounter a23_timer_timecounter = { + .tc_name = "a10_timer timer0", + .tc_get_timecount = a23_timer_get_timecount, + .tc_counter_mask = ~0u, + .tc_frequency = 0, + /* We want it to be selected over the arm generic timecounter */ + .tc_quality = 2000, +}; +#define A10_TIMER_MEMRES 0 +#define A10_TIMER_IRQRES 1 + static struct resource_spec a10_timer_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, { SYS_RES_IRQ, 0, RF_ACTIVE }, { -1, 0 } }; -static uint64_t -timer_read_counter64(void) -{ - uint32_t lo, hi; +static struct ofw_compat_data compat_data[] = { + {"allwinner,sun4i-a10-timer", A10_TIMER}, + {"allwinner,sun8i-a23-timer", A23_TIMER}, + {NULL, 0}, +}; - /* Latch counter, wait for it to be ready to read. */ - timer_write_4(a10_timer_sc, CNT64_CTRL_REG, CNT64_RL_EN); - while (timer_read_4(a10_timer_sc, CNT64_CTRL_REG) & CNT64_RL_EN) - continue; - - hi = timer_read_4(a10_timer_sc, SW_COUNTER64HI_REG); - lo = timer_read_4(a10_timer_sc, SW_COUNTER64LO_REG); - - return (((uint64_t)hi << 32) | lo); -} - static int a10_timer_probe(device_t dev) { struct a10_timer_softc *sc; +#if defined(__arm__) u_int soc_family; +#endif sc = device_get_softc(dev); - if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-timer")) + if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) return (ENXIO); +#if defined(__arm__) + /* For SoC >= A10 we have the ARM Timecounter/Eventtimer */ soc_family = allwinner_soc_family(); if (soc_family != ALLWINNERSOC_SUN4I && soc_family != ALLWINNERSOC_SUN5I) return (ENXIO); +#endif - device_set_desc(dev, "Allwinner A10/A20 timer"); + device_set_desc(dev, "Allwinner timer"); return (BUS_PROBE_DEFAULT); } static int a10_timer_attach(device_t dev) { struct a10_timer_softc *sc; + clk_t clk; int err; - uint32_t val; sc = device_get_softc(dev); + sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; if (bus_alloc_resources(dev, a10_timer_spec, sc->res)) { device_printf(dev, "could not allocate resources\n"); return (ENXIO); } sc->sc_dev = dev; - sc->sc_bst = rman_get_bustag(sc->res[0]); - sc->sc_bsh = rman_get_bushandle(sc->res[0]); /* Setup and enable the timer interrupt */ - err = bus_setup_intr(dev, sc->res[1], INTR_TYPE_CLK, a10_timer_hardclock, - NULL, sc, &sc->sc_ih); + err = bus_setup_intr(dev, sc->res[A10_TIMER_IRQRES], INTR_TYPE_CLK, + a10_timer_irq, NULL, sc, &sc->sc_ih); if (err != 0) { bus_release_resources(dev, a10_timer_spec, sc->res); device_printf(dev, "Unable to setup the clock irq handler, " "err = %d\n", err); return (ENXIO); } - /* Set clock source to OSC24M, 16 pre-division */ - val = timer_read_4(sc, SW_TIMER0_CTRL_REG); - val |= TIMER_PRESCALAR | TIMER_OSC24M; - timer_write_4(sc, SW_TIMER0_CTRL_REG, val); + if (clk_get_by_ofw_index(dev, 0, 0, &clk) != 0) + sc->timer0_freq = SYS_TIMER_CLKSRC; + else { + if (clk_get_freq(clk, &sc->timer0_freq) != 0) { + device_printf(dev, "Cannot get clock source frequency\n"); + return (ENXIO); + } + } - /* Enable timer0 */ - val = timer_read_4(sc, SW_TIMER_IRQ_EN_REG); - val |= TIMER_ENABLE; - timer_write_4(sc, SW_TIMER_IRQ_EN_REG, val); +#if defined(__arm__) + a10_timer_eventtimer_setup(sc); + arm_set_delay(a10_timer_delay, sc); + a10_timer_timecounter.tc_priv = sc; + a10_timer_timecounter.tc_frequency = sc->timer0_freq; + tc_init(&a10_timer_timecounter); +#elif defined(__aarch64__) + a23_timer_timecounter_setup(sc); +#endif - sc->timer0_freq = SYS_TIMER_CLKSRC; + if (bootverbose) { + device_printf(sc->sc_dev, "clock: hz=%d stathz = %d\n", hz, stathz); + device_printf(sc->sc_dev, "event timer clock frequency %ju\n", + sc->timer0_freq); + device_printf(sc->sc_dev, "timecounter clock frequency %jd\n", + a10_timer_timecounter.tc_frequency); + } + + return (0); +} + +static int +a10_timer_irq(void *arg) +{ + struct a10_timer_softc *sc; + uint32_t val; + + sc = (struct a10_timer_softc *)arg; + + /* Clear interrupt pending bit. */ + timer_write_4(sc, TIMER_IRQ_STA_REG, TIMER_IRQ_PENDING(0)); + + val = timer_read_4(sc, TIMER_CTRL_REG(0)); + + /* + * Disabled autoreload and sc_period > 0 means + * timer_start was called with non NULL first value. + * Now we will set periodic timer with the given period + * value. + */ + if ((val & (1<<1)) == 0 && sc->sc_period > 0) { + /* Update timer */ + timer_write_4(sc, TIMER_CURV_REG(0), sc->sc_period); + + /* Make periodic and enable */ + val |= TIMER_CTRL_AUTORELOAD | TIMER_CTRL_START; + timer_write_4(sc, TIMER_CTRL_REG(0), val); + } + + if (sc->et.et_active) + sc->et.et_event_cb(&sc->et, sc->et.et_arg); + + return (FILTER_HANDLED); +} + +/* + * Event timer function for A10 and A13 + */ + +static void +a10_timer_eventtimer_setup(struct a10_timer_softc *sc) +{ + uint32_t val; + + /* Set clock source to OSC24M, 1 pre-division, continuous mode */ + val = timer_read_4(sc, TIMER_CTRL_REG(0)); + val &= ~TIMER_CTRL_PRESCALAR_MASK | ~TIMER_CTRL_MODE_MASK | ~TIMER_CTRL_CLKSRC_MASK; + val |= TIMER_CTRL_PRESCALAR(1) | TIMER_CTRL_OSC24M; + timer_write_4(sc, TIMER_CTRL_REG(0), val); + + /* Enable timer0 */ + val = timer_read_4(sc, TIMER_IRQ_EN_REG); + val |= TIMER_IRQ_ENABLE(0); + timer_write_4(sc, TIMER_IRQ_EN_REG, val); + /* Set desired frequency in event timer and timecounter */ sc->et.et_frequency = sc->timer0_freq; sc->et.et_name = "a10_timer Eventtimer"; sc->et.et_flags = ET_FLAGS_ONESHOT | ET_FLAGS_PERIODIC; sc->et.et_quality = 1000; sc->et.et_min_period = (0x00000005LLU << 32) / sc->et.et_frequency; sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency; sc->et.et_start = a10_timer_timer_start; sc->et.et_stop = a10_timer_timer_stop; sc->et.et_priv = sc; et_register(&sc->et); - - if (device_get_unit(dev) == 0) { - arm_set_delay(a10_timer_delay, sc); - a10_timer_sc = sc; - } - - a10_timer_timecounter.tc_frequency = sc->timer0_freq; - tc_init(&a10_timer_timecounter); - - if (bootverbose) { - device_printf(sc->sc_dev, "clock: hz=%d stathz = %d\n", hz, stathz); - - device_printf(sc->sc_dev, "event timer clock frequency %u\n", - sc->timer0_freq); - device_printf(sc->sc_dev, "timecounter clock frequency %lld\n", - a10_timer_timecounter.tc_frequency); - } - - return (0); } static int a10_timer_timer_start(struct eventtimer *et, sbintime_t first, sbintime_t period) { struct a10_timer_softc *sc; uint32_t count; uint32_t val; sc = (struct a10_timer_softc *)et->et_priv; if (period != 0) sc->sc_period = ((uint32_t)et->et_frequency * period) >> 32; else sc->sc_period = 0; if (first != 0) count = ((uint32_t)et->et_frequency * first) >> 32; else count = sc->sc_period; /* Update timer values */ - timer_write_4(sc, SW_TIMER0_INT_VALUE_REG, sc->sc_period); - timer_write_4(sc, SW_TIMER0_CUR_VALUE_REG, count); + timer_write_4(sc, TIMER_INTV_REG(0), sc->sc_period); + timer_write_4(sc, TIMER_CURV_REG(0), count); - val = timer_read_4(sc, SW_TIMER0_CTRL_REG); + val = timer_read_4(sc, TIMER_CTRL_REG(0)); if (period != 0) { /* periodic */ - val |= TIMER_AUTORELOAD; + val |= TIMER_CTRL_AUTORELOAD; } else { /* oneshot */ - val &= ~TIMER_AUTORELOAD; + val &= ~TIMER_CTRL_AUTORELOAD; } /* Enable timer0 */ - val |= TIMER_ENABLE; - timer_write_4(sc, SW_TIMER0_CTRL_REG, val); + val |= TIMER_IRQ_ENABLE(0); + timer_write_4(sc, TIMER_CTRL_REG(0), val); return (0); } static int a10_timer_timer_stop(struct eventtimer *et) { struct a10_timer_softc *sc; uint32_t val; sc = (struct a10_timer_softc *)et->et_priv; /* Disable timer0 */ - val = timer_read_4(sc, SW_TIMER0_CTRL_REG); - val &= ~TIMER_ENABLE; - timer_write_4(sc, SW_TIMER0_CTRL_REG, val); + val = timer_read_4(sc, TIMER_CTRL_REG(0)); + val &= ~TIMER_CTRL_START; + timer_write_4(sc, TIMER_CTRL_REG(0), val); sc->sc_period = 0; return (0); } -int -a10_timer_get_timerfreq(struct a10_timer_softc *sc) +/* + * Timecounter functions for A23 and above + */ + +static void +a23_timer_timecounter_setup(struct a10_timer_softc *sc) { - return (sc->timer0_freq); + uint32_t val; + + /* Set clock source to OSC24M, 1 pre-division, continuous mode */ + val = timer_read_4(sc, TIMER_CTRL_REG(0)); + val &= ~TIMER_CTRL_PRESCALAR_MASK | ~TIMER_CTRL_MODE_MASK | ~TIMER_CTRL_CLKSRC_MASK; + val |= TIMER_CTRL_PRESCALAR(1) | TIMER_CTRL_OSC24M; + timer_write_4(sc, TIMER_CTRL_REG(0), val); + + /* Set reload value */ + timer_write_4(sc, TIMER_INTV_REG(0), ~0); + val = timer_read_4(sc, TIMER_INTV_REG(0)); + + /* Enable timer0 */ + val = timer_read_4(sc, TIMER_CTRL_REG(0)); + val |= TIMER_CTRL_AUTORELOAD | TIMER_CTRL_START; + timer_write_4(sc, TIMER_CTRL_REG(0), val); + + val = timer_read_4(sc, TIMER_CURV_REG(0)); + + a23_timer_timecounter.tc_priv = sc; + a23_timer_timecounter.tc_frequency = sc->timer0_freq; + tc_init(&a23_timer_timecounter); } -static int -a10_timer_hardclock(void *arg) +static u_int +a23_timer_get_timecount(struct timecounter *tc) { struct a10_timer_softc *sc; uint32_t val; - sc = (struct a10_timer_softc *)arg; + sc = (struct a10_timer_softc *)tc->tc_priv; + if (sc == NULL) + return (0); - /* Clear interrupt pending bit. */ - timer_write_4(sc, SW_TIMER_IRQ_STA_REG, 0x1); + val = timer_read_4(sc, TIMER_CURV_REG(0)); + /* Counter count backwards */ + return (~0u - val); +} - val = timer_read_4(sc, SW_TIMER0_CTRL_REG); - /* - * Disabled autoreload and sc_period > 0 means - * timer_start was called with non NULL first value. - * Now we will set periodic timer with the given period - * value. - */ - if ((val & (1<<1)) == 0 && sc->sc_period > 0) { - /* Update timer */ - timer_write_4(sc, SW_TIMER0_CUR_VALUE_REG, sc->sc_period); +/* + * Timecounter functions for A10 and A13, using the 64 bits counter + */ - /* Make periodic and enable */ - val |= TIMER_AUTORELOAD | TIMER_ENABLE; - timer_write_4(sc, SW_TIMER0_CTRL_REG, val); - } +static uint64_t +timer_read_counter64(struct a10_timer_softc *sc) +{ + uint32_t lo, hi; - if (sc->et.et_active) - sc->et.et_event_cb(&sc->et, sc->et.et_arg); + /* Latch counter, wait for it to be ready to read. */ + timer_write_4(sc, CNT64_CTRL_REG, CNT64_CTRL_RL_EN); + while (timer_read_4(sc, CNT64_CTRL_REG) & CNT64_CTRL_RL_EN) + continue; - return (FILTER_HANDLED); + hi = timer_read_4(sc, CNT64_HI_REG); + lo = timer_read_4(sc, CNT64_LO_REG); + + return (((uint64_t)hi << 32) | lo); } -u_int +#if defined(__arm__) +static void +a10_timer_delay(int usec, void *arg) +{ + struct a10_timer_softc *sc = arg; + uint64_t end, now; + + now = timer_read_counter64(sc); + end = now + (sc->timer0_freq / 1000000) * (usec + 1); + + while (now < end) + now = timer_read_counter64(sc); +} +#endif + +static u_int a10_timer_get_timecount(struct timecounter *tc) { - if (a10_timer_sc == NULL) + if (tc->tc_priv == NULL) return (0); - return ((u_int)timer_read_counter64()); + return ((u_int)timer_read_counter64(tc->tc_priv)); } static device_method_t a10_timer_methods[] = { DEVMETHOD(device_probe, a10_timer_probe), DEVMETHOD(device_attach, a10_timer_attach), DEVMETHOD_END }; static driver_t a10_timer_driver = { "a10_timer", a10_timer_methods, sizeof(struct a10_timer_softc), }; static devclass_t a10_timer_devclass; EARLY_DRIVER_MODULE(a10_timer, simplebus, a10_timer_driver, a10_timer_devclass, 0, 0, BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE); - -static void -a10_timer_delay(int usec, void *arg) -{ - struct a10_timer_softc *sc = arg; - uint64_t end, now; - - now = timer_read_counter64(); - end = now + (sc->timer0_freq / 1000000) * (usec + 1); - - while (now < end) - now = timer_read_counter64(); -} Index: head/sys/arm64/conf/GENERIC =================================================================== --- head/sys/arm64/conf/GENERIC (revision 338271) +++ head/sys/arm64/conf/GENERIC (revision 338272) @@ -1,274 +1,277 @@ # # GENERIC -- Generic kernel configuration file for FreeBSD/arm64 # # For more information on this file, please read the config(5) manual page, # and/or the handbook section on Kernel Configuration Files: # # https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html # # The handbook is also available locally in /usr/share/doc/handbook # if you've installed the doc distribution, otherwise always see the # FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the # latest information. # # An exhaustive list of options and more detailed explanations of the # device lines is also present in the ../../conf/NOTES and NOTES files. # If you are in doubt as to the purpose or necessity of a line, check first # in NOTES. # # $FreeBSD$ cpu ARM64 ident GENERIC makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols makeoptions WITH_CTF=1 # Run ctfconvert(1) for DTrace support options SCHED_ULE # ULE scheduler options PREEMPTION # Enable kernel thread preemption options VIMAGE # Subsystem virtualization, e.g. VNET options INET # InterNETworking options INET6 # IPv6 communications protocols options IPSEC # IP (v4/v6) security options IPSEC_SUPPORT # Allow kldload of ipsec and tcpmd5 options TCP_HHOOK # hhook(9) framework for TCP options TCP_OFFLOAD # TCP offload options TCP_RFC7413 # TCP Fast Open options SCTP # Stream Control Transmission Protocol options FFS # Berkeley Fast Filesystem options SOFTUPDATES # Enable FFS soft updates support options UFS_ACL # Support for access control lists options UFS_DIRHASH # Improve performance on big directories options UFS_GJOURNAL # Enable gjournal-based UFS journaling options QUOTA # Enable disk quotas for UFS options MD_ROOT # MD is a potential root device options NFSCL # Network Filesystem Client options NFSD # Network Filesystem Server options NFSLOCKD # Network Lock Manager options NFS_ROOT # NFS usable as /, requires NFSCL options MSDOSFS # MSDOS Filesystem options CD9660 # ISO 9660 Filesystem options PROCFS # Process filesystem (requires PSEUDOFS) options PSEUDOFS # Pseudo-filesystem framework options GEOM_PART_GPT # GUID Partition Tables. options GEOM_RAID # Soft RAID functionality. options GEOM_LABEL # Provides labelization options COMPAT_FREEBSD32 # Incomplete, but used by cloudabi32.ko. options COMPAT_FREEBSD11 # Compatible with FreeBSD11 options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI options KTRACE # ktrace(1) support options STACK # stack(9) support options SYSVSHM # SYSV-style shared memory options SYSVMSG # SYSV-style message queues options SYSVSEM # SYSV-style semaphores options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed. options KBD_INSTALL_CDEV # install a CDEV entry in /dev options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4) options AUDIT # Security event auditing options CAPABILITY_MODE # Capsicum capability mode options CAPABILITIES # Capsicum capabilities options MAC # TrustedBSD MAC Framework options KDTRACE_FRAME # Ensure frames are compiled in options KDTRACE_HOOKS # Kernel DTrace hooks options VFP # Floating-point support options RACCT # Resource accounting framework options RACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default options RCTL # Resource limits options SMP options INTRNG # Debugging support. Always need this: options KDB # Enable kernel debugger support. options KDB_TRACE # Print a stack trace for a panic. # For full debugger support use (turn off in stable branch): options DDB # Support DDB. #options GDB # Support remote GDB. options DEADLKRES # Enable the deadlock resolver options INVARIANTS # Enable calls of extra sanity checking options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS options WITNESS # Enable checks to detect deadlocks and cycles options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed options MALLOC_DEBUG_MAXZONES=8 # Separate malloc(9) zones options ALT_BREAK_TO_DEBUGGER # Enter debugger on keyboard escape sequence options USB_DEBUG # enable debug msgs # Kernel dump features. options EKCD # Support for encrypted kernel dumps options GZIO # gzip-compressed kernel and user dumps options ZSTDIO # zstd-compressed kernel and user dumps options NETDUMP # netdump(4) client support # SoC support options SOC_ALLWINNER_A64 options SOC_ALLWINNER_H5 options SOC_CAVM_THUNDERX options SOC_HISI_HI6220 options SOC_BRCM_BCM2837 options SOC_ROCKCHIP_RK3328 options SOC_XILINX_ZYNQ +# Timer drivers +device a10_timer + # Annapurna Alpine drivers device al_ccu # Alpine Cache Coherency Unit device al_nb_service # Alpine North Bridge Service device al_iofic # I/O Fabric Interrupt Controller device al_serdes # Serializer/Deserializer device al_udma # Universal DMA # Qualcomm Snapdragon drivers device qcom_gcc # Global Clock Controller # VirtIO support device virtio device virtio_pci device virtio_mmio device virtio_blk device vtnet # CPU frequency control device cpufreq # Bus drivers device pci device al_pci # Annapurna Alpine PCI-E options PCI_HP # PCI-Express native HotPlug options PCI_IOV # PCI SR-IOV support # Ethernet NICs device mdio device mii device miibus # MII bus support device awg # Allwinner EMAC Gigabit Ethernet device axgbe # AMD Opteron A1100 integrated NIC device em # Intel PRO/1000 Gigabit Ethernet Family device ix # Intel 10Gb Ethernet Family device msk # Marvell/SysKonnect Yukon II Gigabit Ethernet device neta # Marvell Armada 370/38x/XP/3700 NIC device smc # SMSC LAN91C111 device vnic # Cavium ThunderX NIC device al_eth # Annapurna Alpine Ethernet NIC device dwc_rk # Rockchip Designware # Block devices device ahci device scbus device da # ATA/SCSI peripherals device pass # Passthrough device (direct ATA/SCSI access) # MMC/SD/SDIO Card slot support device sdhci device sdhci_xenon # Marvell Xenon SD/MMC controller device aw_mmc # Allwinner SD/MMC controller device mmc # mmc/sd bus device mmcsd # mmc/sd flash cards device dwmmc # Serial (COM) ports device uart # Generic UART driver device uart_msm # Qualcomm MSM UART driver device uart_mu # RPI3 aux port device uart_mvebu # Armada 3700 UART driver device uart_ns8250 # ns8250-type UART driver device uart_snps device pl011 # USB support device aw_ehci # Allwinner EHCI USB interface (USB 2.0) device aw_usbphy # Allwinner USB PHY device dwcotg # DWC OTG controller device ohci # OHCI USB interface device ehci # EHCI USB interface (USB 2.0) device ehci_mv # Marvell EHCI USB interface device xhci # XHCI PCI->USB interface (USB 3.0) device xhci_mv # Marvell XHCI USB interface device usb # USB Bus (required) device ukbd # Keyboard device umass # Disks/Mass storage - Requires scbus and da # USB ethernet support device muge device smcphy device smsc # GPIO device aw_gpio # Allwinner GPIO controller device gpio device gpioled device fdt_pinctrl # I2C device aw_rsb # Allwinner Reduced Serial Bus device bcm2835_bsc # Broadcom BCM283x I2C bus device iicbus device iic device twsi # Allwinner I2C controller # Clock and reset controllers device aw_ccu # Allwinner clock controller # Interrupt controllers device aw_nmi # Allwinner NMI support # Real-time clock support device aw_rtc # Allwinner Real-time Clock device mv_rtc # Marvell Real-time Clock # Watchdog controllers device aw_wdog # Allwinner Watchdog # Power management controllers device axp81x # X-Powers AXP81x PMIC # EFUSE device aw_sid # Allwinner Secure ID EFUSE # Thermal sensors device aw_thermal # Allwinner Thermal Sensor Controller # SPI device spibus device bcm2835_spi # Broadcom BCM283x SPI bus # Console device vt device kbdmux device vt_efifb # Pseudo devices. device crypto # core crypto support device loop # Network loopback device random # Entropy device device ether # Ethernet support device vlan # 802.1Q VLAN support device tun # Packet tunnel. device md # Memory "disks" device gif # IPv6 and IPv4 tunneling device firmware # firmware assist module options EFIRT # EFI Runtime Services # EXT_RESOURCES pseudo devices options EXT_RESOURCES device clk device phy device hwreset device nvmem device regulator device syscon device aw_syscon # The `bpf' device enables the Berkeley Packet Filter. # Be aware of the administrative consequences of enabling this! # Note that 'bpf' is required for DHCP. device bpf # Berkeley packet filter # Chip-specific errata options THUNDERX_PASS_1_1_ERRATA options FDT device acpi # DTBs makeoptions MODULES_EXTRA="dtb/allwinner" Index: head/sys/conf/files.arm64 =================================================================== --- head/sys/conf/files.arm64 (revision 338271) +++ head/sys/conf/files.arm64 (revision 338272) @@ -1,266 +1,267 @@ # $FreeBSD$ cloudabi32_vdso.o optional compat_cloudabi32 \ dependency "$S/contrib/cloudabi/cloudabi_vdso_armv6_on_64bit.S" \ compile-with "${CC} -x assembler-with-cpp -m32 -shared -nostdinc -nostdlib -Wl,-T$S/compat/cloudabi/cloudabi_vdso.lds $S/contrib/cloudabi/cloudabi_vdso_armv6_on_64bit.S -o ${.TARGET}" \ no-obj no-implicit-rule \ clean "cloudabi32_vdso.o" # cloudabi32_vdso_blob.o optional compat_cloudabi32 \ dependency "cloudabi32_vdso.o" \ compile-with "${OBJCOPY} --input-target binary --output-target elf64-littleaarch64 --binary-architecture aarch64 cloudabi32_vdso.o ${.TARGET}" \ no-implicit-rule \ clean "cloudabi32_vdso_blob.o" # cloudabi64_vdso.o optional compat_cloudabi64 \ dependency "$S/contrib/cloudabi/cloudabi_vdso_aarch64.S" \ compile-with "${CC} -x assembler-with-cpp -shared -nostdinc -nostdlib -Wl,-T$S/compat/cloudabi/cloudabi_vdso.lds $S/contrib/cloudabi/cloudabi_vdso_aarch64.S -o ${.TARGET}" \ no-obj no-implicit-rule \ clean "cloudabi64_vdso.o" # cloudabi64_vdso_blob.o optional compat_cloudabi64 \ dependency "cloudabi64_vdso.o" \ compile-with "${OBJCOPY} --input-target binary --output-target elf64-littleaarch64 --binary-architecture aarch64 cloudabi64_vdso.o ${.TARGET}" \ no-implicit-rule \ clean "cloudabi64_vdso_blob.o" # # Allwinner common files arm/allwinner/a10_ehci.c optional ehci aw_ehci fdt +arm/allwinner/a10_timer.c optional a10_timer fdt arm/allwinner/aw_gpio.c optional gpio aw_gpio fdt arm/allwinner/aw_mmc.c optional mmc aw_mmc fdt | mmccam aw_mmc fdt arm/allwinner/aw_nmi.c optional aw_nmi fdt \ compile-with "${NORMAL_C} -I$S/gnu/dts/include" arm/allwinner/aw_rsb.c optional aw_rsb fdt arm/allwinner/aw_rtc.c optional aw_rtc fdt arm/allwinner/aw_sid.c optional aw_sid fdt arm/allwinner/aw_spi.c optional aw_spi fdt arm/allwinner/aw_syscon.c optional aw_syscon ext_resources syscon fdt arm/allwinner/aw_thermal.c optional aw_thermal fdt arm/allwinner/aw_usbphy.c optional ehci aw_usbphy fdt arm/allwinner/aw_wdog.c optional aw_wdog fdt arm/allwinner/axp81x.c optional axp81x fdt arm/allwinner/if_awg.c optional awg ext_resources syscon fdt # Allwinner clock driver arm/allwinner/clkng/aw_ccung.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_nkmp.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_nm.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_prediv_mux.c optional aw_ccu fdt arm/allwinner/clkng/ccu_a64.c optional soc_allwinner_a64 aw_ccu fdt arm/allwinner/clkng/ccu_h3.c optional soc_allwinner_h5 aw_ccu fdt arm/allwinner/clkng/ccu_sun8i_r.c optional aw_ccu fdt # Allwinner padconf files arm/allwinner/a64/a64_padconf.c optional soc_allwinner_a64 fdt arm/allwinner/a64/a64_r_padconf.c optional soc_allwinner_a64 fdt arm/allwinner/h3/h3_padconf.c optional soc_allwinner_h5 fdt arm/allwinner/h3/h3_r_padconf.c optional soc_allwinner_h5 fdt arm/annapurna/alpine/alpine_ccu.c optional al_ccu fdt arm/annapurna/alpine/alpine_nb_service.c optional al_nb_service fdt arm/annapurna/alpine/alpine_pci.c optional al_pci fdt arm/annapurna/alpine/alpine_pci_msix.c optional al_pci fdt arm/annapurna/alpine/alpine_serdes.c optional al_serdes fdt \ no-depend \ compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}" arm/arm/generic_timer.c standard arm/arm/gic.c standard arm/arm/gic_acpi.c optional acpi arm/arm/gic_fdt.c optional fdt arm/arm/pmu.c standard arm/arm/physmem.c standard arm/broadcom/bcm2835/bcm2835_audio.c optional sound vchiq fdt \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" arm/broadcom/bcm2835/bcm2835_bsc.c optional bcm2835_bsc soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_cpufreq.c optional soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_dma.c optional soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_fbd.c optional vt soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_ft5406.c optional evdev bcm2835_ft5406 soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_gpio.c optional gpio soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_intr.c optional soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_mbox.c optional soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_rng.c optional random soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_sdhci.c optional sdhci soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_sdhost.c optional sdhci soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_spi.c optional bcm2835_spi soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_vcio.c optional soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_wdog.c optional soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2836.c optional soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm283x_dwc_fdt.c optional dwcotg fdt soc_brcm_bcm2837 arm/mv/armada38x/armada38x_rtc.c optional mv_rtc fdt arm/xilinx/uart_dev_cdnc.c optional uart soc_xilinx_zynq arm64/acpica/acpi_machdep.c optional acpi arm64/acpica/OsdEnvironment.c optional acpi arm64/acpica/acpi_wakeup.c optional acpi arm64/acpica/pci_cfgreg.c optional acpi pci arm64/arm64/autoconf.c standard arm64/arm64/bus_machdep.c standard arm64/arm64/bus_space_asm.S standard arm64/arm64/busdma_bounce.c standard arm64/arm64/busdma_machdep.c standard arm64/arm64/bzero.S standard arm64/arm64/clock.c standard arm64/arm64/copyinout.S standard arm64/arm64/copystr.c standard arm64/arm64/cpu_errata.c standard arm64/arm64/cpufunc_asm.S standard arm64/arm64/db_disasm.c optional ddb arm64/arm64/db_interface.c optional ddb arm64/arm64/db_trace.c optional ddb arm64/arm64/debug_monitor.c optional ddb arm64/arm64/disassem.c optional ddb arm64/arm64/dump_machdep.c standard arm64/arm64/efirt_machdep.c optional efirt arm64/arm64/elf32_machdep.c optional compat_freebsd32 arm64/arm64/elf_machdep.c standard arm64/arm64/exception.S standard arm64/arm64/freebsd32_machdep.c optional compat_freebsd32 arm64/arm64/gicv3_its.c optional intrng fdt arm64/arm64/gic_v3.c standard arm64/arm64/gic_v3_acpi.c optional acpi arm64/arm64/gic_v3_fdt.c optional fdt arm64/arm64/identcpu.c standard arm64/arm64/in_cksum.c optional inet | inet6 arm64/arm64/locore.S standard no-obj arm64/arm64/machdep.c standard arm64/arm64/mem.c standard arm64/arm64/memcpy.S standard arm64/arm64/memmove.S standard arm64/arm64/minidump_machdep.c standard arm64/arm64/mp_machdep.c optional smp arm64/arm64/nexus.c standard arm64/arm64/ofw_machdep.c optional fdt arm64/arm64/pmap.c standard arm64/arm64/stack_machdep.c optional ddb | stack arm64/arm64/support.S standard arm64/arm64/swtch.S standard arm64/arm64/sys_machdep.c standard arm64/arm64/trap.c standard arm64/arm64/uio_machdep.c standard arm64/arm64/uma_machdep.c standard arm64/arm64/undefined.c standard arm64/arm64/unwind.c optional ddb | kdtrace_hooks | stack arm64/arm64/vfp.c standard arm64/arm64/vm_machdep.c standard arm64/cavium/thunder_pcie_fdt.c optional soc_cavm_thunderx pci fdt arm64/cavium/thunder_pcie_pem.c optional soc_cavm_thunderx pci arm64/cavium/thunder_pcie_pem_fdt.c optional soc_cavm_thunderx pci fdt arm64/cavium/thunder_pcie_common.c optional soc_cavm_thunderx pci arm64/cloudabi32/cloudabi32_sysvec.c optional compat_cloudabi32 arm64/cloudabi64/cloudabi64_sysvec.c optional compat_cloudabi64 arm64/coresight/coresight.c standard arm64/coresight/coresight_if.m standard arm64/coresight/coresight-cmd.c standard arm64/coresight/coresight-cpu-debug.c standard arm64/coresight/coresight-dynamic-replicator.c standard arm64/coresight/coresight-etm4x.c standard arm64/coresight/coresight-funnel.c standard arm64/coresight/coresight-tmc.c standard arm64/qualcomm/qcom_gcc.c optional qcom_gcc fdt contrib/vchiq/interface/compat/vchi_bsd.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_2835_arm.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -Wno-unused -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_arm.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -Wno-unused -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_connected.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_core.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_kern_lib.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_kmod.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_shim.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_util.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" crypto/armv8/armv8_crypto.c optional armv8crypto armv8_crypto_wrap.o optional armv8crypto \ dependency "$S/crypto/armv8/armv8_crypto_wrap.c" \ compile-with "${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc:N-mgeneral-regs-only} -I$S/crypto/armv8/ ${WERROR} ${NO_WCAST_QUAL} ${PROF} -march=armv8-a+crypto ${.IMPSRC}" \ no-implicit-rule \ clean "armv8_crypto_wrap.o" crypto/blowfish/bf_enc.c optional crypto | ipsec | ipsec_support crypto/des/des_enc.c optional crypto | ipsec | ipsec_support | netsmb dev/acpica/acpi_bus_if.m optional acpi dev/acpica/acpi_if.m optional acpi dev/acpica/acpi_pci_link.c optional acpi pci dev/acpica/acpi_pcib.c optional acpi pci dev/ahci/ahci_generic.c optional ahci dev/axgbe/if_axgbe.c optional axgbe dev/axgbe/xgbe-desc.c optional axgbe dev/axgbe/xgbe-dev.c optional axgbe dev/axgbe/xgbe-drv.c optional axgbe dev/axgbe/xgbe-mdio.c optional axgbe dev/cpufreq/cpufreq_dt.c optional cpufreq fdt dev/iicbus/twsi/a10_twsi.c optional twsi fdt dev/iicbus/twsi/twsi.c optional twsi fdt dev/hwpmc/hwpmc_arm64.c optional hwpmc dev/hwpmc/hwpmc_arm64_md.c optional hwpmc dev/mbox/mbox_if.m optional soc_brcm_bcm2837 dev/mmc/host/dwmmc.c optional dwmmc fdt dev/mmc/host/dwmmc_hisi.c optional dwmmc fdt soc_hisi_hi6220 dev/mmc/host/dwmmc_rockchip.c optional dwmmc fdt soc_rockchip_rk3328 dev/neta/if_mvneta_fdt.c optional neta fdt dev/neta/if_mvneta.c optional neta mdio mii dev/ofw/ofw_cpu.c optional fdt dev/ofw/ofwpci.c optional fdt pci dev/pci/pci_host_generic.c optional pci dev/pci/pci_host_generic_acpi.c optional pci acpi dev/pci/pci_host_generic_fdt.c optional pci fdt dev/psci/psci.c standard dev/psci/psci_arm64.S standard dev/psci/smccc.c standard dev/sdhci/sdhci_xenon.c optional sdhci_xenon sdhci fdt dev/uart/uart_cpu_arm64.c optional uart dev/uart/uart_dev_mu.c optional uart uart_mu dev/uart/uart_dev_pl011.c optional uart pl011 dev/usb/controller/dwc_otg_hisi.c optional dwcotg fdt soc_hisi_hi6220 dev/usb/controller/ehci_mv.c optional ehci_mv fdt dev/usb/controller/generic_ehci.c optional ehci acpi dev/usb/controller/generic_ohci.c optional ohci fdt dev/usb/controller/generic_usb_if.m optional ohci fdt dev/usb/controller/xhci_mv.c optional xhci_mv fdt dev/vnic/mrml_bridge.c optional vnic fdt dev/vnic/nic_main.c optional vnic pci dev/vnic/nicvf_main.c optional vnic pci pci_iov dev/vnic/nicvf_queues.c optional vnic pci pci_iov dev/vnic/thunder_bgx_fdt.c optional vnic fdt dev/vnic/thunder_bgx.c optional vnic pci dev/vnic/thunder_mdio_fdt.c optional vnic fdt dev/vnic/thunder_mdio.c optional vnic dev/vnic/lmac_if.m optional inet | inet6 | vnic kern/kern_clocksource.c standard kern/msi_if.m optional intrng kern/pic_if.m optional intrng kern/subr_devmap.c standard kern/subr_intr.c optional intrng libkern/bcmp.c standard libkern/ffs.c standard libkern/ffsl.c standard libkern/ffsll.c standard libkern/fls.c standard libkern/flsl.c standard libkern/flsll.c standard libkern/memset.c standard libkern/arm64/crc32c_armv8.S standard cddl/contrib/opensolaris/common/atomic/aarch64/opensolaris_atomic.S optional zfs | dtrace compile-with "${CDDL_C}" cddl/dev/dtrace/aarch64/dtrace_asm.S optional dtrace compile-with "${DTRACE_S}" cddl/dev/dtrace/aarch64/dtrace_subr.c optional dtrace compile-with "${DTRACE_C}" cddl/dev/fbt/aarch64/fbt_isa.c optional dtrace_fbt | dtraceall compile-with "${FBT_C}" arm64/rockchip/rk_i2c.c optional rk_i2c fdt soc_rockchip_rk3328 arm64/rockchip/rk_grf.c optional fdt soc_rockchip_rk3328 arm64/rockchip/rk_pinctrl.c optional fdt soc_rockchip_rk3328 arm64/rockchip/rk_gpio.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk_cru.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk_clk_armclk.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk_clk_composite.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk_clk_gate.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk_clk_mux.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk_clk_pll.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk3328_cru.c optional fdt soc_rockchip_rk3328 arm64/rockchip/if_dwc_rk.c optional dwc_rk fdt soc_rockchip_rk3328 dev/dwc/if_dwc.c optional dwc_rk dev/dwc/if_dwc_if.m optional dwc_rk