Index: head/share/man/man4/jedec_dimm.4 =================================================================== --- head/share/man/man4/jedec_dimm.4 (revision 336661) +++ head/share/man/man4/jedec_dimm.4 (revision 336662) @@ -1,240 +1,243 @@ .\" .\" SPDX-License-Identifier: BSD-2-Clause-FreeBSD .\" .\" Copyright (c) 2016 Andriy Gapon .\" Copyright (c) 2018 Ravi Pokala .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR .\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES .\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. .\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, .\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT .\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, .\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY .\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. .\" .\" $FreeBSD$ .\" .Dd February 22, 2018 .Dt JEDEC_DIMM 4 .Os .Sh NAME .Nm jedec_dimm .Nd report asset information and temperatures for JEDEC DDR3 / DDR4 DIMMs .Sh SYNOPSIS .Bd -ragged -offset indent .Cd "device jedec_dimm" .Cd "device smbus" .Ed .Pp Alternatively, to load the driver as a module at boot time, place the following line in .Xr loader.conf 5 : .Bd -literal -offset indent jedec_dimm_load="YES" .Ed .Pp Addressing information must be manually specified in .Pa /boot/device.hints : .Bd -literal -offset indent .Cd hint.jedec_dimm.0.at="smbus0" .Cd hint.jedec_dimm.0.addr="0xa0" .Cd hint.jedec_dimm.0.slotid="Silkscreen" .Ed .Sh DESCRIPTION The .Nm driver reports asset information (Part Number, Serial Number) encoded in the .Dq Serial Presence Detect (SPD) data on JEDEC DDR3 and DDR4 DIMMs. It also calculates and reports the memory capacity of the DIMM, in megabytes. If the DIMM includes a .Dq Thermal Sensor On DIMM (TSOD), the temperature is also reported. .Pp The .Nm driver accesses the SPD and TSOD over the .Xr smbus 4 . .Pp The data is reported via a .Xr sysctl 8 interface; all values are read-only: .Bl -tag -width "dev.jedec_dimm.X.capacity" .It Va dev.jedec_dimm.X.%desc a string description of the DIMM, including TSOD and slotid info if present. .It Va dev.jedec_dimm.X.capacity the DIMM's memory capacity, in megabytes .It Va dev.jedec_dimm.X.part the manufacturer's part number of the DIMM .It Va dev.jedec_dimm.X.serial the manufacturer's serial number of the DIMM .It Va dev.jedec_dimm.X.slotid a copy of the corresponding hint, if set .It Va dev.jedec_dimm.X.temp if a TSOD is present, the reported temperature .It Va dev.jedec_dimm.X.type the DIMM type (DDR3 or DDR4) .El .Pp These values are configurable for .Nm via .Xr device.hints 5 : .Bl -tag -width "hint.jedec_dimm.X.slotid" .It Va hint.jedec_dimm.X.at the .Xr smbus 4 to which the DIMM is connected .It Va hint.jedec_dimm.X.addr the SMBus address of the SPD. JEDEC specifies that the four most-significant bits of the address are the .Dq Device Type Identifier (DTI), and that the DTI of the SPD is 0xa. Since the least-significant bit of an SMBus address is the read/write bit, and is always written as 0, that means the four least-significant bits of the address must be even. .It Va hint.jedec_dimm.X.slotid optional slot identifier. If populated with the DIMM slot name silkscreened on the motherboard, this provides a mapping between the DIMM slot name and the DIMM serial number. That mapping is useful for detailed asset tracking, and makes it easier to physically locate a specific DIMM when doing a replacement. This is useful when assembling multiple identical systems, as might be done by a system vendor. The mapping between bus/address and DIMM slot must first be determined, either through motherboard documentation or trial-and-error. .El .Pp If the DIMMs are on an I2C bus behind an .Xr iicbus 4 controller, then the .Xr iicsmb 4 bridge driver can be used to attach the .Xr smbus 4 . .Sh EXAMPLES Consider two DDR4 DIMMs with the following hints: .Bd -literal -offset indent hint.jedec_dimm.0.at="smbus0" hint.jedec_dimm.0.addr="0xa0" hint.jedec_dimm.0.slotid="A1" hint.jedec_dimm.6.at="smbus1" hint.jedec_dimm.6.addr="0xa8" .Ed .Pp Their .Xr sysctl 8 output (sorted): .Bd -literal -offset indent dev.jedec_dimm.0.%desc: DDR4 DIMM w/ Atmel TSOD (A1) dev.jedec_dimm.0.%driver: jedec_dimm dev.jedec_dimm.0.%location: addr=0xa0 dev.jedec_dimm.0.%parent: smbus0 dev.jedec_dimm.0.%pnpinfo: dev.jedec_dimm.0.capacity: 16384 dev.jedec_dimm.0.part: 36ASF2G72PZ-2G1A2 dev.jedec_dimm.0.serial: 0ea815de dev.jedec_dimm.0.slotid: A1 dev.jedec_dimm.0.temp: 32.7C dev.jedec_dimm.0.type: DDR4 dev.jedec_dimm.6.%desc: DDR4 DIMM w/ TSE2004av compliant TSOD dev.jedec_dimm.6.%driver: jedec_dimm dev.jedec_dimm.6.%location: addr=0xa8 dev.jedec_dimm.6.%parent: smbus1 dev.jedec_dimm.6.%pnpinfo: dev.jedec_dimm.6.capacity: 8192 dev.jedec_dimm.6.part: VRA9MR8B2H1603 dev.jedec_dimm.6.serial: 0c4c46ad dev.jedec_dimm.6.temp: 43.1C dev.jedec_dimm.6.type: DDR4 .Ed .Sh COMPATIBILITY +.Nm +implements a superset of the functionality of +.Xr jedec_ts 4 . Hints for .Xr jedec_ts 4 can be mechanically converted for use with .Nm . Two changes are required: .Bl -enum .It In all .Xr jedec_ts 4 hints, replace .Dq jedec_ts with .Dq jedec_dimm .It In .Xr jedec_ts 4 .Dq addr hints, replace the TSOD DTI .Dq 0x3 with the SPD DTI .Dq 0xa .El .Pp The following .Xr sed 1 script will perform the necessary changes: .Bd -literal -offset indent sed -i ".old" -e 's/jedec_ts/jedec_dimm/' \\ -e '/jedec_dimm/s/addr="0x3/addr="0xa/' /boot/device.hints .Ed .Sh SEE ALSO .Xr iicbus 4 , .Xr iicsmb 4 , .Xr jedec_ts 4 , .Xr smbus 4 , .Xr sysctl 8 .Sh STANDARDS .Rs (DDR3 SPD) .%A JEDEC .%T Standard 21-C, Annex K .Re .Pp .Rs (DDR3 TSOD) .%A JEDEC .%T Standard 21-C, TSE2002av .Re .Pp .Rs (DDR4 SPD) .%A JEDEC .%T Standard 21-C, Annex L .Re .Pp .Rs (DDR4 TSOD) .%A JEDEC .%T Standard 21-C, TSE2004av .Re .Sh HISTORY The .Nm driver first appeared in .Fx 12.0 . .Sh AUTHORS .An -nosplit The .Nm driver and this manual page were written by .An Ravi Pokala Aq Mt rpokala@freebsd.org . They are both based in part on the .Xr jedec_ts 4 driver and manual page, written by .An Andriy Gapon Aq Mt avg@FreeBSD.org . Index: head/share/man/man4/jedec_ts.4 =================================================================== --- head/share/man/man4/jedec_ts.4 (revision 336661) +++ head/share/man/man4/jedec_ts.4 (revision 336662) @@ -1,130 +1,142 @@ .\" .\" Copyright (c) 2016 Andriy Gapon .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR .\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES .\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. .\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, .\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT .\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, .\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY .\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. .\" .\" $FreeBSD$ .\" .Dd May 9, 2017 .Dt JEDEC_TS 4 .Os .Sh NAME .Nm jedec_ts .Nd driver for temperature sensors on memory modules .Sh SYNOPSIS .Bd -ragged -offset indent .Cd "device jedec_ts" .Cd "device smbus" .Ed .Pp Alternatively, to load the driver as a module at boot time, place the following line in .Xr loader.conf 5 : .Bd -literal -offset indent jedec_ts_load="YES" .Ed .Pp In .Pa /boot/device.hints : .Bd -literal -offset indent .Cd hint.jedec_ts.0.at="smbus0" .Cd hint.jedec_ts.0.addr="0x30" .Cd hint.jedec_ts.1.at="smbus0" .Cd hint.jedec_ts.1.addr="0x32" .Cd hint.jedec_ts.2.at="smbus0" .Cd hint.jedec_ts.2.addr="0x34" .Cd hint.jedec_ts.3.at="smbus0" .Cd hint.jedec_ts.3.addr="0x36" .Cd hint.jedec_ts.4.at="smbus0" .Cd hint.jedec_ts.4.addr="0x38" .Cd hint.jedec_ts.5.at="smbus0" .Cd hint.jedec_ts.5.addr="0x3A" .Cd hint.jedec_ts.6.at="smbus0" .Cd hint.jedec_ts.6.addr="0x3C" .Cd hint.jedec_ts.7.at="smbus0" .Cd hint.jedec_ts.7.addr="0x3E" .Ed +.Sh DEPRECATION NOTICE +The +.Nm +driver is not present in +.Fx 12.0 +and later. +A superset of its functionality is available in the +.Xr jedec_dimm 4 +driver. +That driver's manpage includes instructions on updating +.Pa /boot/device.hints +accordingly. .Sh DESCRIPTION The .Nm driver provides access to sensor data over the .Xr smbus 4 . The driver supports temperature sensors on memory modules that conform to JEDEC Standard 21-C, TSE2002 Specification. .Pp The access to .Nm data is made via the .Xr sysctl 8 interface: .Bl -tag -width "dev.jedec_ts.%d.temp" .It Va dev.jedec_ts.%d.temp read-only value of the current temperature read by the sensor. .El .Pp On a system using .Xr device.hints 5 , these values are configurable for .Nm : .Bl -tag -width "hint.jedec_ts.%d.addr" .It Va hint.jedec_ts.%d.at target .Xr smbus 4 . .It Va hint.jedec_ts.%d.addr .Nm SMBus address on the .Xr smbus 4 . .El .Pp .Nm temperature sensors can be wired to eight different addresses, allowing up to eight sensors on the same .Xr smbus 4 . .Pp If the sensors are on an I2C bus behind an .Xr iicbus 4 controller, then the .Xr iicsmb 4 bridge driver can be used to attach the .Xr smbus 4 . .Sh EXAMPLES .Ss Sensor read out for two memory modules: .Bd -literal dev.jedec_ts.0.temp: 40.2500C dev.jedec_ts.1.temp: 40.7500C .Ed .Sh SEE ALSO .Xr iicbus 4 , .Xr iicsmb 4 , .Xr smbus 4 , .Xr sysctl 8 .Sh HISTORY The .Nm driver first appeared in .Fx 11.1 . .Sh AUTHORS .An -nosplit The .Nm driver and this manual page were written by .An Andriy Gapon Aq Mt avg@FreeBSD.org . Index: head/sys/dev/jedec_ts/jedec_ts.c =================================================================== --- head/sys/dev/jedec_ts/jedec_ts.c (revision 336661) +++ head/sys/dev/jedec_ts/jedec_ts.c (revision 336662) @@ -1,280 +1,283 @@ /*- * Copyright (c) 2016 Andriy Gapon * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include "smbus_if.h" /* * General device identification notes. * * The JEDEC TSE2004av specification defines the device ID that all compliant * devices should use, but very few do in practice. Maybe that's because * TSE2002av was rather vague about that. * Rare examples are IDT TSE2004GB2B0 and Atmel AT30TSE004A, not sure if * they are TSE2004av compliant by design or by accident. * Also, the specification mandates that PCI SIG manufacturer IDs are to be * used, but in practice the JEDEC manufacturer IDs are often used. */ const struct ts_dev { uint16_t vendor_id; uint8_t device_id; const char *description; } known_devices[] = { /* * Analog Devices ADT7408. * http://www.analog.com/media/en/technical-documentation/data-sheets/ADT7408.pdf */ { 0x11d4, 0x08, "Analog Devices DIMM temperature sensor" }, /* * Atmel AT30TSE002B, AT30TSE004A. * http://www.atmel.com/images/doc8711.pdf * http://www.atmel.com/images/atmel-8868-dts-at30tse004a-datasheet.pdf * Note how one chip uses the JEDEC Manufacturer ID while the other * uses the PCI SIG one. */ { 0x001f, 0x82, "Atmel DIMM temperature sensor" }, { 0x1114, 0x22, "Atmel DIMM temperature sensor" }, /* * Integrated Device Technology (IDT) TS3000B3A, TSE2002B3C, * TSE2004GB2B0 chips and their variants. * http://www.idt.com/sites/default/files/documents/IDT_TSE2002B3C_DST_20100512_120303152056.pdf * http://www.idt.com/sites/default/files/documents/IDT_TS3000B3A_DST_20101129_120303152013.pdf * https://www.idt.com/document/dst/tse2004gb2b0-datasheet */ { 0x00b3, 0x29, "IDT DIMM temperature sensor" }, { 0x00b3, 0x22, "IDT DIMM temperature sensor" }, /* * Maxim Integrated MAX6604. * Different document revisions specify different Device IDs. * Document 19-3837; Rev 0; 10/05 has 0x3e00 while * 19-3837; Rev 3; 10/11 has 0x5400. * http://datasheets.maximintegrated.com/en/ds/MAX6604.pdf */ { 0x004d, 0x3e, "Maxim Integrated DIMM temperature sensor" }, { 0x004d, 0x54, "Maxim Integrated DIMM temperature sensor" }, /* * Microchip Technology MCP9805, MCP9843, MCP98242, MCP98243 * and their variants. * http://ww1.microchip.com/downloads/en/DeviceDoc/21977b.pdf * Microchip Technology EMC1501. * http://ww1.microchip.com/downloads/en/DeviceDoc/00001605A.pdf */ { 0x0054, 0x00, "Microchip DIMM temperature sensor" }, { 0x0054, 0x20, "Microchip DIMM temperature sensor" }, { 0x0054, 0x21, "Microchip DIMM temperature sensor" }, { 0x1055, 0x08, "Microchip DIMM temperature sensor" }, /* * NXP Semiconductors SE97 and SE98. * http://www.nxp.com/docs/en/data-sheet/SE97B.pdf */ { 0x1131, 0xa1, "NXP DIMM temperature sensor" }, { 0x1131, 0xa2, "NXP DIMM temperature sensor" }, /* * ON Semiconductor CAT34TS02 revisions B and C, CAT6095 and compatible. * https://www.onsemi.com/pub/Collateral/CAT34TS02-D.PDF * http://www.onsemi.com/pub/Collateral/CAT6095-D.PDF */ { 0x1b09, 0x08, "ON Semiconductor DIMM temperature sensor" }, { 0x1b09, 0x0a, "ON Semiconductor DIMM temperature sensor" }, /* * ST[Microelectronics] STTS424E02, STTS2002 and others. * http://www.st.com/resource/en/datasheet/cd00157558.pdf * http://www.st.com/resource/en/datasheet/stts2002.pdf */ { 0x104a, 0x00, "ST DIMM temperature sensor" }, { 0x104a, 0x03, "ST DIMM temperature sensor" }, }; static const char * ts_match_device(uint16_t vid, uint16_t did) { const struct ts_dev *d; int i; for (i = 0; i < nitems(known_devices); i++) { d = &known_devices[i]; if (vid == d->vendor_id && (did >> 8) == d->device_id) return (d->description); } /* * If no match for a specific device, then check * for a generic TSE2004av compliant device. */ if ((did >> 8) == 0x22) return ("TSE2004av compliant DIMM temperature sensor"); return (NULL); } /* * SMBus specification defines little-endian byte order, * but it seems that the JEDEC devices expect it to * be big-endian. */ static int ts_readw_be(device_t dev, uint8_t reg, uint16_t *val) { device_t bus = device_get_parent(dev); uint8_t addr = smbus_get_addr(dev); int err; err = smbus_readw(bus, addr, reg, val); if (err != 0) return (err); *val = be16toh(*val); return (0); } static int ts_temp_sysctl(SYSCTL_HANDLER_ARGS) { device_t dev = arg1; int err; int temp; uint16_t val; err = ts_readw_be(dev, 5, &val); if (err != 0) return (EIO); /* * Convert the reading to temperature in 0.0001 Kelvins. * Three most significant bits are flags, the next * most significant bit is a sign bit. * Each step is 0.0625 degrees. */ temp = val & 0xfff; if ((val & 0x1000) != 0) temp = -temp; temp = temp * 625 + 2731500; err = sysctl_handle_int(oidp, &temp, 0, req); return (err); } static int ts_probe(device_t dev) { const char *match; int err; uint16_t vendorid; uint16_t devid; uint8_t addr; addr = smbus_get_addr(dev); if ((addr & 0xf0) != 0x30) { /* Up to 8 slave devices starting at 0x30. */ return (ENXIO); } err = ts_readw_be(dev, 6, &vendorid); if (err != 0) { device_printf(dev, "failed to read Manufacturer ID\n"); return (ENXIO); } err = ts_readw_be(dev, 7, &devid); if (err != 0) { device_printf(dev, "failed to read Device ID\n"); return (ENXIO); } match = ts_match_device(vendorid, devid); if (match == NULL) { if (bootverbose) { device_printf(dev, "Unknown Manufacturer and Device IDs" ", 0x%x and 0x%x\n", vendorid, devid); } return (ENXIO); } device_set_desc(dev, match); return (BUS_PROBE_DEFAULT); } static int ts_attach(device_t dev) { struct sysctl_ctx_list *ctx; struct sysctl_oid_list *tree; ctx = device_get_sysctl_ctx(dev); tree = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "temp", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, dev, 0, ts_temp_sysctl, "IK4", "Current temperature"); + gone_in_dev(dev, 12, + "jedec_ts(4) driver; see COMPATIBILITY section of jedec_dimm(4)"); + return (0); } static int ts_detach(device_t dev) { return (0); } static device_method_t jedec_ts_methods[] = { /* Methods from the device interface */ DEVMETHOD(device_probe, ts_probe), DEVMETHOD(device_attach, ts_attach), DEVMETHOD(device_detach, ts_detach), /* Terminate method list */ { 0, 0 } }; static driver_t jedec_ts_driver = { "jedec_ts", jedec_ts_methods, 0 /* no softc */ }; static devclass_t jedec_ts_devclass; DRIVER_MODULE(jedec_ts, smbus, jedec_ts_driver, jedec_ts_devclass, 0, 0); MODULE_DEPEND(jedec_ts, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER); MODULE_VERSION(jedec_ts, 1);