Index: head/sys/dev/acpica/acpi_resource.c =================================================================== --- head/sys/dev/acpica/acpi_resource.c (revision 336128) +++ head/sys/dev/acpica/acpi_resource.c (revision 336129) @@ -1,771 +1,774 @@ /*- * Copyright (c) 2000 Michael Smith * Copyright (c) 2000 BSDi * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_acpi.h" #include #include #include #include #include #include #include #include #include #include #include #include #ifdef INTRNG #include "acpi_bus_if.h" #endif /* Hooks for the ACPI CA debugging infrastructure */ #define _COMPONENT ACPI_BUS ACPI_MODULE_NAME("RESOURCE") struct lookup_irq_request { ACPI_RESOURCE *acpi_res; struct resource *res; int counter; int rid; int found; }; static ACPI_STATUS acpi_lookup_irq_handler(ACPI_RESOURCE *res, void *context) { struct lookup_irq_request *req; size_t len; u_int irqnum, irq; switch (res->Type) { case ACPI_RESOURCE_TYPE_IRQ: irqnum = res->Data.Irq.InterruptCount; irq = res->Data.Irq.Interrupts[0]; len = ACPI_RS_SIZE(ACPI_RESOURCE_IRQ); break; case ACPI_RESOURCE_TYPE_EXTENDED_IRQ: irqnum = res->Data.ExtendedIrq.InterruptCount; irq = res->Data.ExtendedIrq.Interrupts[0]; len = ACPI_RS_SIZE(ACPI_RESOURCE_EXTENDED_IRQ); break; default: return (AE_OK); } if (irqnum != 1) return (AE_OK); req = (struct lookup_irq_request *)context; if (req->counter != req->rid) { req->counter++; return (AE_OK); } req->found = 1; KASSERT(irq == rman_get_start(req->res), ("IRQ resources do not match")); bcopy(res, req->acpi_res, len); return (AE_CTRL_TERMINATE); } ACPI_STATUS acpi_lookup_irq_resource(device_t dev, int rid, struct resource *res, ACPI_RESOURCE *acpi_res) { struct lookup_irq_request req; ACPI_STATUS status; req.acpi_res = acpi_res; req.res = res; req.counter = 0; req.rid = rid; req.found = 0; status = AcpiWalkResources(acpi_get_handle(dev), "_CRS", acpi_lookup_irq_handler, &req); if (ACPI_SUCCESS(status) && req.found == 0) status = AE_NOT_FOUND; return (status); } void acpi_config_intr(device_t dev, ACPI_RESOURCE *res) { u_int irq; int pol, trig; switch (res->Type) { case ACPI_RESOURCE_TYPE_IRQ: KASSERT(res->Data.Irq.InterruptCount == 1, ("%s: multiple interrupts", __func__)); irq = res->Data.Irq.Interrupts[0]; trig = res->Data.Irq.Triggering; pol = res->Data.Irq.Polarity; break; case ACPI_RESOURCE_TYPE_EXTENDED_IRQ: KASSERT(res->Data.ExtendedIrq.InterruptCount == 1, ("%s: multiple interrupts", __func__)); irq = res->Data.ExtendedIrq.Interrupts[0]; trig = res->Data.ExtendedIrq.Triggering; pol = res->Data.ExtendedIrq.Polarity; break; default: panic("%s: bad resource type %u", __func__, res->Type); } #if defined(__amd64__) || defined(__i386__) /* * XXX: Certain BIOSes have buggy AML that specify an IRQ that is * edge-sensitive and active-lo. However, edge-sensitive IRQs * should be active-hi. Force IRQs with an ISA IRQ value to be * active-hi instead. */ if (irq < 16 && trig == ACPI_EDGE_SENSITIVE && pol == ACPI_ACTIVE_LOW) pol = ACPI_ACTIVE_HIGH; #endif BUS_CONFIG_INTR(dev, irq, (trig == ACPI_EDGE_SENSITIVE) ? INTR_TRIGGER_EDGE : INTR_TRIGGER_LEVEL, (pol == ACPI_ACTIVE_HIGH) ? INTR_POLARITY_HIGH : INTR_POLARITY_LOW); } struct acpi_resource_context { struct acpi_parse_resource_set *set; device_t dev; void *context; }; #ifdef ACPI_DEBUG_OUTPUT static const char * acpi_address_range_name(UINT8 ResourceType) { static char buf[16]; switch (ResourceType) { case ACPI_MEMORY_RANGE: return ("Memory"); case ACPI_IO_RANGE: return ("IO"); case ACPI_BUS_NUMBER_RANGE: return ("Bus Number"); default: snprintf(buf, sizeof(buf), "type %u", ResourceType); return (buf); } } #endif static ACPI_STATUS acpi_parse_resource(ACPI_RESOURCE *res, void *context) { struct acpi_parse_resource_set *set; struct acpi_resource_context *arc; UINT64 min, max, length, gran; #ifdef ACPI_DEBUG const char *name; #endif device_t dev; arc = context; dev = arc->dev; set = arc->set; switch (res->Type) { case ACPI_RESOURCE_TYPE_END_TAG: ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "EndTag\n")); break; case ACPI_RESOURCE_TYPE_FIXED_IO: if (res->Data.FixedIo.AddressLength <= 0) break; ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "FixedIo 0x%x/%d\n", res->Data.FixedIo.Address, res->Data.FixedIo.AddressLength)); set->set_ioport(dev, arc->context, res->Data.FixedIo.Address, res->Data.FixedIo.AddressLength); break; case ACPI_RESOURCE_TYPE_IO: if (res->Data.Io.AddressLength <= 0) break; if (res->Data.Io.Minimum == res->Data.Io.Maximum) { ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "Io 0x%x/%d\n", res->Data.Io.Minimum, res->Data.Io.AddressLength)); set->set_ioport(dev, arc->context, res->Data.Io.Minimum, res->Data.Io.AddressLength); } else { ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "Io 0x%x-0x%x/%d\n", res->Data.Io.Minimum, res->Data.Io.Maximum, res->Data.Io.AddressLength)); set->set_iorange(dev, arc->context, res->Data.Io.Minimum, res->Data.Io.Maximum, res->Data.Io.AddressLength, res->Data.Io.Alignment); } break; case ACPI_RESOURCE_TYPE_FIXED_MEMORY32: if (res->Data.FixedMemory32.AddressLength <= 0) break; ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "FixedMemory32 0x%x/%d\n", res->Data.FixedMemory32.Address, res->Data.FixedMemory32.AddressLength)); set->set_memory(dev, arc->context, res->Data.FixedMemory32.Address, res->Data.FixedMemory32.AddressLength); break; case ACPI_RESOURCE_TYPE_MEMORY32: if (res->Data.Memory32.AddressLength <= 0) break; if (res->Data.Memory32.Minimum == res->Data.Memory32.Maximum) { ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "Memory32 0x%x/%d\n", res->Data.Memory32.Minimum, res->Data.Memory32.AddressLength)); set->set_memory(dev, arc->context, res->Data.Memory32.Minimum, res->Data.Memory32.AddressLength); } else { ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "Memory32 0x%x-0x%x/%d\n", res->Data.Memory32.Minimum, res->Data.Memory32.Maximum, res->Data.Memory32.AddressLength)); set->set_memoryrange(dev, arc->context, res->Data.Memory32.Minimum, res->Data.Memory32.Maximum, res->Data.Memory32.AddressLength, res->Data.Memory32.Alignment); } break; case ACPI_RESOURCE_TYPE_MEMORY24: if (res->Data.Memory24.AddressLength <= 0) break; if (res->Data.Memory24.Minimum == res->Data.Memory24.Maximum) { ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "Memory24 0x%x/%d\n", res->Data.Memory24.Minimum, res->Data.Memory24.AddressLength)); set->set_memory(dev, arc->context, res->Data.Memory24.Minimum, res->Data.Memory24.AddressLength); } else { ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "Memory24 0x%x-0x%x/%d\n", res->Data.Memory24.Minimum, res->Data.Memory24.Maximum, res->Data.Memory24.AddressLength)); set->set_memoryrange(dev, arc->context, res->Data.Memory24.Minimum, res->Data.Memory24.Maximum, res->Data.Memory24.AddressLength, res->Data.Memory24.Alignment); } break; case ACPI_RESOURCE_TYPE_IRQ: /* * from 1.0b 6.4.2 * "This structure is repeated for each separate interrupt * required" */ set->set_irq(dev, arc->context, res->Data.Irq.Interrupts, res->Data.Irq.InterruptCount, res->Data.Irq.Triggering, res->Data.Irq.Polarity); break; case ACPI_RESOURCE_TYPE_DMA: /* * from 1.0b 6.4.3 * "This structure is repeated for each separate DMA channel * required" */ set->set_drq(dev, arc->context, res->Data.Dma.Channels, res->Data.Dma.ChannelCount); break; case ACPI_RESOURCE_TYPE_START_DEPENDENT: ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "start dependent functions\n")); set->set_start_dependent(dev, arc->context, res->Data.StartDpf.CompatibilityPriority); break; case ACPI_RESOURCE_TYPE_END_DEPENDENT: ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "end dependent functions\n")); set->set_end_dependent(dev, arc->context); break; case ACPI_RESOURCE_TYPE_ADDRESS16: case ACPI_RESOURCE_TYPE_ADDRESS32: case ACPI_RESOURCE_TYPE_ADDRESS64: case ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64: switch (res->Type) { case ACPI_RESOURCE_TYPE_ADDRESS16: gran = res->Data.Address16.Address.Granularity; min = res->Data.Address16.Address.Minimum; max = res->Data.Address16.Address.Maximum; length = res->Data.Address16.Address.AddressLength; #ifdef ACPI_DEBUG name = "Address16"; #endif break; case ACPI_RESOURCE_TYPE_ADDRESS32: gran = res->Data.Address32.Address.Granularity; min = res->Data.Address32.Address.Minimum; max = res->Data.Address32.Address.Maximum; length = res->Data.Address32.Address.AddressLength; #ifdef ACPI_DEBUG name = "Address32"; #endif break; case ACPI_RESOURCE_TYPE_ADDRESS64: gran = res->Data.Address64.Address.Granularity; min = res->Data.Address64.Address.Minimum; max = res->Data.Address64.Address.Maximum; length = res->Data.Address64.Address.AddressLength; #ifdef ACPI_DEBUG name = "Address64"; #endif break; default: KASSERT(res->Type == ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64, ("should never happen")); gran = res->Data.ExtAddress64.Address.Granularity; min = res->Data.ExtAddress64.Address.Minimum; max = res->Data.ExtAddress64.Address.Maximum; length = res->Data.ExtAddress64.Address.AddressLength; #ifdef ACPI_DEBUG name = "ExtAddress64"; #endif break; } if (length <= 0) break; if (res->Type == ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64 && res->Data.Address.ProducerConsumer != ACPI_CONSUMER) { ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "ignored %s %s producer\n", name, acpi_address_range_name(res->Data.Address.ResourceType))); break; } if (res->Data.Address.ResourceType != ACPI_MEMORY_RANGE && res->Data.Address.ResourceType != ACPI_IO_RANGE) { ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "ignored %s for non-memory, non-I/O\n", name)); break; } #ifdef __i386__ if (min > ULONG_MAX || (res->Data.Address.MaxAddressFixed && max > ULONG_MAX)) { ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "ignored %s above 4G\n", name)); break; } if (max > ULONG_MAX) max = ULONG_MAX; #endif if (res->Data.Address.MinAddressFixed == ACPI_ADDRESS_FIXED && res->Data.Address.MaxAddressFixed == ACPI_ADDRESS_FIXED) { if (res->Data.Address.ResourceType == ACPI_MEMORY_RANGE) { ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "%s/Memory 0x%jx/%ju\n", name, (uintmax_t)min, (uintmax_t)length)); set->set_memory(dev, arc->context, min, length); } else { ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "%s/IO 0x%jx/%ju\n", name, (uintmax_t)min, (uintmax_t)length)); set->set_ioport(dev, arc->context, min, length); } } else { if (res->Data.Address32.ResourceType == ACPI_MEMORY_RANGE) { ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "%s/Memory 0x%jx-0x%jx/%ju\n", name, (uintmax_t)min, (uintmax_t)max, (uintmax_t)length)); set->set_memoryrange(dev, arc->context, min, max, length, gran); } else { ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "%s/IO 0x%jx-0x%jx/%ju\n", name, (uintmax_t)min, (uintmax_t)max, (uintmax_t)length)); set->set_iorange(dev, arc->context, min, max, length, gran); } } break; case ACPI_RESOURCE_TYPE_EXTENDED_IRQ: if (res->Data.ExtendedIrq.ProducerConsumer != ACPI_CONSUMER) { ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "ignored ExtIRQ producer\n")); break; } set->set_ext_irq(dev, arc->context, res->Data.ExtendedIrq.Interrupts, res->Data.ExtendedIrq.InterruptCount, res->Data.ExtendedIrq.Triggering, res->Data.ExtendedIrq.Polarity); break; case ACPI_RESOURCE_TYPE_VENDOR: ACPI_DEBUG_PRINT((ACPI_DB_RESOURCES, "unimplemented VendorSpecific resource\n")); break; default: break; } return (AE_OK); } /* * Fetch a device's resources and associate them with the device. * * Note that it might be nice to also locate ACPI-specific resource items, such * as GPE bits. * * We really need to split the resource-fetching code out from the * resource-parsing code, since we may want to use the parsing * code for _PRS someday. */ ACPI_STATUS acpi_parse_resources(device_t dev, ACPI_HANDLE handle, struct acpi_parse_resource_set *set, void *arg) { struct acpi_resource_context arc; ACPI_STATUS status; ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); set->set_init(dev, arg, &arc.context); arc.set = set; arc.dev = dev; status = AcpiWalkResources(handle, "_CRS", acpi_parse_resource, &arc); if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) { printf("can't fetch resources for %s - %s\n", acpi_name(handle), AcpiFormatException(status)); return_ACPI_STATUS (status); } set->set_done(dev, arc.context); return_ACPI_STATUS (AE_OK); } /* * Resource-set vectors used to attach _CRS-derived resources * to an ACPI device. */ static void acpi_res_set_init(device_t dev, void *arg, void **context); static void acpi_res_set_done(device_t dev, void *context); static void acpi_res_set_ioport(device_t dev, void *context, uint64_t base, uint64_t length); static void acpi_res_set_iorange(device_t dev, void *context, uint64_t low, uint64_t high, uint64_t length, uint64_t align); static void acpi_res_set_memory(device_t dev, void *context, uint64_t base, uint64_t length); static void acpi_res_set_memoryrange(device_t dev, void *context, uint64_t low, uint64_t high, uint64_t length, uint64_t align); static void acpi_res_set_irq(device_t dev, void *context, uint8_t *irq, int count, int trig, int pol); static void acpi_res_set_ext_irq(device_t dev, void *context, uint32_t *irq, int count, int trig, int pol); static void acpi_res_set_drq(device_t dev, void *context, uint8_t *drq, int count); static void acpi_res_set_start_dependent(device_t dev, void *context, int preference); static void acpi_res_set_end_dependent(device_t dev, void *context); struct acpi_parse_resource_set acpi_res_parse_set = { acpi_res_set_init, acpi_res_set_done, acpi_res_set_ioport, acpi_res_set_iorange, acpi_res_set_memory, acpi_res_set_memoryrange, acpi_res_set_irq, acpi_res_set_ext_irq, acpi_res_set_drq, acpi_res_set_start_dependent, acpi_res_set_end_dependent }; struct acpi_res_context { int ar_nio; int ar_nmem; int ar_nirq; int ar_ndrq; void *ar_parent; }; static void acpi_res_set_init(device_t dev, void *arg, void **context) { struct acpi_res_context *cp; if ((cp = AcpiOsAllocate(sizeof(*cp))) != NULL) { bzero(cp, sizeof(*cp)); cp->ar_parent = arg; *context = cp; } } static void acpi_res_set_done(device_t dev, void *context) { struct acpi_res_context *cp = (struct acpi_res_context *)context; if (cp == NULL) return; AcpiOsFree(cp); } static void acpi_res_set_ioport(device_t dev, void *context, uint64_t base, uint64_t length) { struct acpi_res_context *cp = (struct acpi_res_context *)context; if (cp == NULL) return; bus_set_resource(dev, SYS_RES_IOPORT, cp->ar_nio++, base, length); } static void acpi_res_set_iorange(device_t dev, void *context, uint64_t low, uint64_t high, uint64_t length, uint64_t align) { struct acpi_res_context *cp = (struct acpi_res_context *)context; if (cp == NULL) return; /* * XXX: Some BIOSes contain buggy _CRS entries where fixed I/O * ranges have the maximum base address (_MAX) to the end of the * I/O range instead of the start. These are then treated as a * relocatable I/O range rather than a fixed I/O resource. As a * workaround, treat I/O resources encoded this way as fixed I/O * ports. */ if (high == (low + length)) { if (bootverbose) device_printf(dev, "_CRS has fixed I/O port range defined as relocatable\n"); bus_set_resource(dev, SYS_RES_IOPORT, cp->ar_nio++, low, length); return; } device_printf(dev, "I/O range not supported\n"); } static void acpi_res_set_memory(device_t dev, void *context, uint64_t base, uint64_t length) { struct acpi_res_context *cp = (struct acpi_res_context *)context; if (cp == NULL) return; + while (bus_get_resource_start(dev, SYS_RES_MEMORY, cp->ar_nmem)) + cp->ar_nmem++; + bus_set_resource(dev, SYS_RES_MEMORY, cp->ar_nmem++, base, length); } static void acpi_res_set_memoryrange(device_t dev, void *context, uint64_t low, uint64_t high, uint64_t length, uint64_t align) { struct acpi_res_context *cp = (struct acpi_res_context *)context; if (cp == NULL) return; device_printf(dev, "memory range not supported\n"); } static void acpi_res_set_irq(device_t dev, void *context, uint8_t *irq, int count, int trig, int pol) { struct acpi_res_context *cp = (struct acpi_res_context *)context; rman_res_t intr; if (cp == NULL || irq == NULL) return; /* This implements no resource relocation. */ if (count != 1) return; #ifdef INTRNG intr = ACPI_BUS_MAP_INTR(device_get_parent(dev), dev, *irq, (trig == ACPI_EDGE_SENSITIVE) ? INTR_TRIGGER_EDGE : INTR_TRIGGER_LEVEL, (pol == ACPI_ACTIVE_HIGH) ? INTR_POLARITY_HIGH : INTR_POLARITY_LOW); #else intr = *irq; #endif bus_set_resource(dev, SYS_RES_IRQ, cp->ar_nirq++, intr, 1); } static void acpi_res_set_ext_irq(device_t dev, void *context, uint32_t *irq, int count, int trig, int pol) { struct acpi_res_context *cp = (struct acpi_res_context *)context; rman_res_t intr; if (cp == NULL || irq == NULL) return; /* This implements no resource relocation. */ if (count != 1) return; #ifdef INTRNG intr = ACPI_BUS_MAP_INTR(device_get_parent(dev), dev, *irq, (trig == ACPI_EDGE_SENSITIVE) ? INTR_TRIGGER_EDGE : INTR_TRIGGER_LEVEL, (pol == ACPI_ACTIVE_HIGH) ? INTR_POLARITY_HIGH : INTR_POLARITY_LOW); #else intr = *irq; #endif bus_set_resource(dev, SYS_RES_IRQ, cp->ar_nirq++, intr, 1); } static void acpi_res_set_drq(device_t dev, void *context, uint8_t *drq, int count) { struct acpi_res_context *cp = (struct acpi_res_context *)context; if (cp == NULL || drq == NULL) return; /* This implements no resource relocation. */ if (count != 1) return; bus_set_resource(dev, SYS_RES_DRQ, cp->ar_ndrq++, *drq, 1); } static void acpi_res_set_start_dependent(device_t dev, void *context, int preference) { struct acpi_res_context *cp = (struct acpi_res_context *)context; if (cp == NULL) return; device_printf(dev, "dependent functions not supported\n"); } static void acpi_res_set_end_dependent(device_t dev, void *context) { struct acpi_res_context *cp = (struct acpi_res_context *)context; if (cp == NULL) return; device_printf(dev, "dependent functions not supported\n"); } /* * Resource-owning placeholders for IO and memory pseudo-devices. * * This code allocates system resources that will be used by ACPI * child devices. The acpi parent manages these resources through a * private rman. */ static int acpi_sysres_rid = 100; static int acpi_sysres_probe(device_t dev); static int acpi_sysres_attach(device_t dev); static device_method_t acpi_sysres_methods[] = { /* Device interface */ DEVMETHOD(device_probe, acpi_sysres_probe), DEVMETHOD(device_attach, acpi_sysres_attach), DEVMETHOD_END }; static driver_t acpi_sysres_driver = { "acpi_sysresource", acpi_sysres_methods, 0, }; static devclass_t acpi_sysres_devclass; DRIVER_MODULE(acpi_sysresource, acpi, acpi_sysres_driver, acpi_sysres_devclass, 0, 0); MODULE_DEPEND(acpi_sysresource, acpi, 1, 1, 1); static int acpi_sysres_probe(device_t dev) { static char *sysres_ids[] = { "PNP0C01", "PNP0C02", NULL }; if (acpi_disabled("sysresource") || ACPI_ID_PROBE(device_get_parent(dev), dev, sysres_ids) == NULL) return (ENXIO); device_set_desc(dev, "System Resource"); device_quiet(dev); return (BUS_PROBE_DEFAULT); } static int acpi_sysres_attach(device_t dev) { device_t bus; struct resource_list_entry *bus_rle, *dev_rle; struct resource_list *bus_rl, *dev_rl; int done, type; rman_res_t start, end, count; /* * Loop through all current resources to see if the new one overlaps * any existing ones. If so, grow the old one up and/or down * accordingly. Discard any that are wholly contained in the old. If * the resource is unique, add it to the parent. It will later go into * the rman pool. */ bus = device_get_parent(dev); dev_rl = BUS_GET_RESOURCE_LIST(bus, dev); bus_rl = BUS_GET_RESOURCE_LIST(device_get_parent(bus), bus); STAILQ_FOREACH(dev_rle, dev_rl, link) { if (dev_rle->type != SYS_RES_IOPORT && dev_rle->type != SYS_RES_MEMORY) continue; start = dev_rle->start; end = dev_rle->end; count = dev_rle->count; type = dev_rle->type; done = FALSE; STAILQ_FOREACH(bus_rle, bus_rl, link) { if (bus_rle->type != type) continue; /* New resource wholly contained in old, discard. */ if (start >= bus_rle->start && end <= bus_rle->end) break; /* New tail overlaps old head, grow existing resource downward. */ if (start < bus_rle->start && end >= bus_rle->start) { bus_rle->count += bus_rle->start - start; bus_rle->start = start; done = TRUE; } /* New head overlaps old tail, grow existing resource upward. */ if (start <= bus_rle->end && end > bus_rle->end) { bus_rle->count += end - bus_rle->end; bus_rle->end = end; done = TRUE; } /* If we adjusted the old resource, we're finished. */ if (done) break; } /* If we didn't merge with anything, add this resource. */ if (bus_rle == NULL) bus_set_resource(bus, type, acpi_sysres_rid++, start, count); } /* After merging/moving resources to the parent, free the list. */ resource_list_free(dev_rl); return (0); } Index: head/sys/dev/pci/pci_host_generic.c =================================================================== --- head/sys/dev/pci/pci_host_generic.c (revision 336128) +++ head/sys/dev/pci/pci_host_generic.c (revision 336129) @@ -1,394 +1,394 @@ /*- * Copyright (c) 2015 Ruslan Bukin * Copyright (c) 2014 The FreeBSD Foundation * All rights reserved. * * This software was developed by Semihalf under * the sponsorship of the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ /* Generic ECAM PCIe driver */ #include __FBSDID("$FreeBSD$"); #include "opt_platform.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "pcib_if.h" /* Assembling ECAM Configuration Address */ #define PCIE_BUS_SHIFT 20 #define PCIE_SLOT_SHIFT 15 #define PCIE_FUNC_SHIFT 12 #define PCIE_BUS_MASK 0xFF #define PCIE_SLOT_MASK 0x1F #define PCIE_FUNC_MASK 0x07 #define PCIE_REG_MASK 0xFFF #define PCIE_ADDR_OFFSET(bus, slot, func, reg) \ ((((bus) & PCIE_BUS_MASK) << PCIE_BUS_SHIFT) | \ (((slot) & PCIE_SLOT_MASK) << PCIE_SLOT_SHIFT) | \ (((func) & PCIE_FUNC_MASK) << PCIE_FUNC_SHIFT) | \ ((reg) & PCIE_REG_MASK)) /* Forward prototypes */ static uint32_t generic_pcie_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, int bytes); static void generic_pcie_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, uint32_t val, int bytes); static int generic_pcie_maxslots(device_t dev); static int generic_pcie_read_ivar(device_t dev, device_t child, int index, uintptr_t *result); static int generic_pcie_write_ivar(device_t dev, device_t child, int index, uintptr_t value); int pci_host_generic_core_attach(device_t dev) { struct generic_pcie_core_softc *sc; int error; int rid; sc = device_get_softc(dev); sc->dev = dev; /* Create the parent DMA tag to pass down the coherent flag */ error = bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 1, 0, /* alignment, bounds */ BUS_SPACE_MAXADDR, /* lowaddr */ BUS_SPACE_MAXADDR, /* highaddr */ NULL, NULL, /* filter, filterarg */ BUS_SPACE_MAXSIZE, /* maxsize */ BUS_SPACE_UNRESTRICTED, /* nsegments */ BUS_SPACE_MAXSIZE, /* maxsegsize */ sc->coherent ? BUS_DMA_COHERENT : 0, /* flags */ NULL, NULL, /* lockfunc, lockarg */ &sc->dmat); if (error != 0) return (error); rid = 0; - sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); + sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE | RF_SHAREABLE); if (sc->res == NULL) { device_printf(dev, "could not map memory.\n"); return (ENXIO); } sc->bst = rman_get_bustag(sc->res); sc->bsh = rman_get_bushandle(sc->res); sc->mem_rman.rm_type = RMAN_ARRAY; sc->mem_rman.rm_descr = "PCIe Memory"; sc->io_rman.rm_type = RMAN_ARRAY; sc->io_rman.rm_descr = "PCIe IO window"; /* Initialize rman and allocate memory regions */ error = rman_init(&sc->mem_rman); if (error) { device_printf(dev, "rman_init() failed. error = %d\n", error); return (error); } error = rman_init(&sc->io_rman); if (error) { device_printf(dev, "rman_init() failed. error = %d\n", error); return (error); } return (0); } static uint32_t generic_pcie_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, int bytes) { struct generic_pcie_core_softc *sc; bus_space_handle_t h; bus_space_tag_t t; uint64_t offset; uint32_t data; if ((bus > PCI_BUSMAX) || (slot > PCI_SLOTMAX) || (func > PCI_FUNCMAX) || (reg > PCIE_REGMAX)) return (~0U); sc = device_get_softc(dev); offset = PCIE_ADDR_OFFSET(bus, slot, func, reg); t = sc->bst; h = sc->bsh; switch (bytes) { case 1: data = bus_space_read_1(t, h, offset); break; case 2: data = le16toh(bus_space_read_2(t, h, offset)); break; case 4: data = le32toh(bus_space_read_4(t, h, offset)); break; default: return (~0U); } return (data); } static void generic_pcie_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, uint32_t val, int bytes) { struct generic_pcie_core_softc *sc; bus_space_handle_t h; bus_space_tag_t t; uint64_t offset; if ((bus > PCI_BUSMAX) || (slot > PCI_SLOTMAX) || (func > PCI_FUNCMAX) || (reg > PCIE_REGMAX)) return; sc = device_get_softc(dev); offset = PCIE_ADDR_OFFSET(bus, slot, func, reg); t = sc->bst; h = sc->bsh; switch (bytes) { case 1: bus_space_write_1(t, h, offset, val); break; case 2: bus_space_write_2(t, h, offset, htole16(val)); break; case 4: bus_space_write_4(t, h, offset, htole32(val)); break; default: return; } } static int generic_pcie_maxslots(device_t dev) { return (31); /* max slots per bus acc. to standard */ } static int generic_pcie_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) { struct generic_pcie_core_softc *sc; int secondary_bus; sc = device_get_softc(dev); if (index == PCIB_IVAR_BUS) { /* this pcib adds only pci bus 0 as child */ secondary_bus = 0; *result = secondary_bus; return (0); } if (index == PCIB_IVAR_DOMAIN) { *result = sc->ecam; return (0); } if (bootverbose) device_printf(dev, "ERROR: Unknown index %d.\n", index); return (ENOENT); } static int generic_pcie_write_ivar(device_t dev, device_t child, int index, uintptr_t value) { return (ENOENT); } static struct rman * generic_pcie_rman(struct generic_pcie_core_softc *sc, int type) { switch (type) { case SYS_RES_IOPORT: return (&sc->io_rman); case SYS_RES_MEMORY: return (&sc->mem_rman); default: break; } return (NULL); } int pci_host_generic_core_release_resource(device_t dev, device_t child, int type, int rid, struct resource *res) { struct generic_pcie_core_softc *sc; struct rman *rm; sc = device_get_softc(dev); #if defined(NEW_PCIB) && defined(PCI_RES_BUS) if (type == PCI_RES_BUS) { return (pci_domain_release_bus(sc->ecam, child, rid, res)); } #endif rm = generic_pcie_rman(sc, type); if (rm != NULL) { KASSERT(rman_is_region_manager(res, rm), ("rman mismatch")); rman_release_resource(res); } return (bus_generic_release_resource(dev, child, type, rid, res)); } struct resource * pci_host_generic_core_alloc_resource(device_t dev, device_t child, int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) { struct generic_pcie_core_softc *sc; struct resource *res; struct rman *rm; sc = device_get_softc(dev); #if defined(NEW_PCIB) && defined(PCI_RES_BUS) if (type == PCI_RES_BUS) { return (pci_domain_alloc_bus(sc->ecam, child, rid, start, end, count, flags)); } #endif rm = generic_pcie_rman(sc, type); if (rm == NULL) return (BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, type, rid, start, end, count, flags)); if (bootverbose) { device_printf(dev, "rman_reserve_resource: start=%#jx, end=%#jx, count=%#jx\n", start, end, count); } res = rman_reserve_resource(rm, start, end, count, flags, child); if (res == NULL) goto fail; rman_set_rid(res, *rid); if (flags & RF_ACTIVE) if (bus_activate_resource(child, type, *rid, res)) { rman_release_resource(res); goto fail; } return (res); fail: device_printf(dev, "%s FAIL: type=%d, rid=%d, " "start=%016jx, end=%016jx, count=%016jx, flags=%x\n", __func__, type, *rid, start, end, count, flags); return (NULL); } static int generic_pcie_adjust_resource(device_t dev, device_t child, int type, struct resource *res, rman_res_t start, rman_res_t end) { struct generic_pcie_core_softc *sc; struct rman *rm; sc = device_get_softc(dev); #if defined(NEW_PCIB) && defined(PCI_RES_BUS) if (type == PCI_RES_BUS) return (pci_domain_adjust_bus(sc->ecam, child, res, start, end)); #endif rm = generic_pcie_rman(sc, type); if (rm != NULL) return (rman_adjust_resource(res, start, end)); return (bus_generic_adjust_resource(dev, child, type, res, start, end)); } static bus_dma_tag_t generic_pcie_get_dma_tag(device_t dev, device_t child) { struct generic_pcie_core_softc *sc; sc = device_get_softc(dev); return (sc->dmat); } static device_method_t generic_pcie_methods[] = { DEVMETHOD(device_attach, pci_host_generic_core_attach), DEVMETHOD(bus_read_ivar, generic_pcie_read_ivar), DEVMETHOD(bus_write_ivar, generic_pcie_write_ivar), DEVMETHOD(bus_alloc_resource, pci_host_generic_core_alloc_resource), DEVMETHOD(bus_adjust_resource, generic_pcie_adjust_resource), DEVMETHOD(bus_release_resource, pci_host_generic_core_release_resource), DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), DEVMETHOD(bus_get_dma_tag, generic_pcie_get_dma_tag), /* pcib interface */ DEVMETHOD(pcib_maxslots, generic_pcie_maxslots), DEVMETHOD(pcib_read_config, generic_pcie_read_config), DEVMETHOD(pcib_write_config, generic_pcie_write_config), DEVMETHOD_END }; DEFINE_CLASS_0(pcib, generic_pcie_core_driver, generic_pcie_methods, sizeof(struct generic_pcie_core_softc)); Index: head/sys/dev/pci/pci_host_generic_acpi.c =================================================================== --- head/sys/dev/pci/pci_host_generic_acpi.c (revision 336128) +++ head/sys/dev/pci/pci_host_generic_acpi.c (revision 336129) @@ -1,330 +1,394 @@ /*- + * Copyright (C) 2018 Cavium Inc. * Copyright (c) 2015 Ruslan Bukin * Copyright (c) 2014 The FreeBSD Foundation * All rights reserved. * * This software was developed by Semihalf under * the sponsorship of the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ /* Generic ECAM PCIe driver */ #include __FBSDID("$FreeBSD$"); #include "opt_platform.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "pcib_if.h" int pci_host_generic_acpi_attach(device_t); /* Assembling ECAM Configuration Address */ #define PCIE_BUS_SHIFT 20 #define PCIE_SLOT_SHIFT 15 #define PCIE_FUNC_SHIFT 12 #define PCIE_BUS_MASK 0xFF #define PCIE_SLOT_MASK 0x1F #define PCIE_FUNC_MASK 0x07 #define PCIE_REG_MASK 0xFFF #define PCIE_ADDR_OFFSET(bus, slot, func, reg) \ ((((bus) & PCIE_BUS_MASK) << PCIE_BUS_SHIFT) | \ (((slot) & PCIE_SLOT_MASK) << PCIE_SLOT_SHIFT) | \ (((func) & PCIE_FUNC_MASK) << PCIE_FUNC_SHIFT) | \ ((reg) & PCIE_REG_MASK)) #define PCI_IO_WINDOW_OFFSET 0x1000 #define SPACE_CODE_SHIFT 24 #define SPACE_CODE_MASK 0x3 #define SPACE_CODE_IO_SPACE 0x1 #define PROPS_CELL_SIZE 1 #define PCI_ADDR_CELL_SIZE 2 struct generic_pcie_acpi_softc { struct generic_pcie_core_softc base; ACPI_BUFFER ap_prt; /* interrupt routing table */ }; /* Forward prototypes */ static int generic_pcie_acpi_probe(device_t dev); -static uint32_t generic_pcie_read_config(device_t dev, u_int bus, u_int slot, - u_int func, u_int reg, int bytes); -static void generic_pcie_write_config(device_t dev, u_int bus, u_int slot, - u_int func, u_int reg, uint32_t val, int bytes); -static int generic_pcie_release_resource(device_t dev, device_t child, - int type, int rid, struct resource *res); +static ACPI_STATUS pci_host_generic_acpi_parse_resource(ACPI_RESOURCE *, void *); +static int generic_pcie_acpi_read_ivar(device_t, device_t, int, uintptr_t *); static int generic_pcie_acpi_probe(device_t dev) { ACPI_DEVICE_INFO *devinfo; ACPI_HANDLE h; int root; if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL || ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo))) return (ENXIO); root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0; AcpiOsFree(devinfo); if (!root) return (ENXIO); device_set_desc(dev, "Generic PCI host controller"); return (BUS_PROBE_GENERIC); } int pci_host_generic_acpi_attach(device_t dev) { struct generic_pcie_acpi_softc *sc; ACPI_HANDLE handle; + ACPI_STATUS status; int error; sc = device_get_softc(dev); handle = acpi_get_handle(dev); if (ACPI_FAILURE(acpi_GetInteger(handle, "_CCA", &sc->base.coherent))) sc->base.coherent = 0; if (bootverbose) device_printf(dev, "Bus is%s cache-coherent\n", sc->base.coherent ? "" : " not"); + if (!ACPI_FAILURE(acpi_GetInteger(handle, "_BBN", &sc->base.ecam))) + sc->base.ecam >>= 7; + else + sc->base.ecam = 0; + acpi_pcib_fetch_prt(dev, &sc->ap_prt); error = pci_host_generic_core_attach(dev); if (error != 0) return (error); + status = AcpiWalkResources(handle, "_CRS", + pci_host_generic_acpi_parse_resource, (void *)dev); + + if (ACPI_FAILURE(status)) + return (ENXIO); + device_add_child(dev, "pci", -1); return (bus_generic_attach(dev)); } -static int -generic_pcie_acpi_route_interrupt(device_t bus, device_t dev, int pin) +static ACPI_STATUS +pci_host_generic_acpi_parse_resource(ACPI_RESOURCE *res, void *arg) { + device_t dev = (device_t)arg; struct generic_pcie_acpi_softc *sc; + rman_res_t min, max; + int error; - sc = device_get_softc(bus); + switch (res->Type) { + case ACPI_RESOURCE_TYPE_ADDRESS32: + min = (rman_res_t)res->Data.Address32.Address.Minimum; + max = (rman_res_t)res->Data.Address32.Address.Maximum; + break; + case ACPI_RESOURCE_TYPE_ADDRESS64: + min = (rman_res_t)res->Data.Address64.Address.Minimum; + max = (rman_res_t)res->Data.Address64.Address.Maximum; + break; + default: + return (AE_OK); + } - return (acpi_pcib_route_interrupt(bus, dev, pin, &sc->ap_prt)); + sc = device_get_softc(dev); + + error = rman_manage_region(&sc->base.mem_rman, min, max); + if (error) { + device_printf(dev, "unable to allocate %lx-%lx range\n", min, max); + return (AE_NOT_FOUND); + } + device_printf(dev, "allocating %lx-%lx range\n", min, max); + + return (AE_OK); } -static struct rman * -generic_pcie_acpi_rman(struct generic_pcie_acpi_softc *sc, int type) +static int +generic_pcie_acpi_read_ivar(device_t dev, device_t child, int index, + uintptr_t *result) { + ACPI_HANDLE handle; + struct generic_pcie_acpi_softc *sc; + int secondary_bus; - switch (type) { - case SYS_RES_IOPORT: - return (&sc->base.io_rman); - case SYS_RES_MEMORY: - return (&sc->base.mem_rman); - default: - break; + sc = device_get_softc(dev); + + if (index == PCIB_IVAR_BUS) { + handle = acpi_get_handle(dev); + if (ACPI_FAILURE(acpi_GetInteger(handle, "_BBN", &secondary_bus))) + secondary_bus = sc->base.ecam * 0x80; + *result = secondary_bus; + return (0); } - return (NULL); + if (index == PCIB_IVAR_DOMAIN) { + *result = sc->base.ecam; + return (0); + } + + if (bootverbose) + device_printf(dev, "ERROR: Unknown index %d.\n", index); + return (ENOENT); } +static int +generic_pcie_acpi_route_interrupt(device_t bus, device_t dev, int pin) +{ + struct generic_pcie_acpi_softc *sc; + + sc = device_get_softc(bus); + + return (acpi_pcib_route_interrupt(bus, dev, pin, &sc->ap_prt)); +} + static struct resource * pci_host_generic_acpi_alloc_resource(device_t dev, device_t child, int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) { + struct resource *res = NULL; + #if defined(NEW_PCIB) && defined(PCI_RES_BUS) struct generic_pcie_acpi_softc *sc; if (type == PCI_RES_BUS) { sc = device_get_softc(dev); return (pci_domain_alloc_bus(sc->base.ecam, child, rid, start, end, count, flags)); } #endif - return (bus_generic_alloc_resource(dev, child, type, rid, start, end, - count, flags)); + if (type == SYS_RES_MEMORY) + res = pci_host_generic_core_alloc_resource(dev, child, type, + rid, start, end, count, flags); + + if (res == NULL) + res = bus_generic_alloc_resource(dev, child, type, rid, start, end, + count, flags); + + return (res); } static int generic_pcie_acpi_activate_resource(device_t dev, device_t child, int type, int rid, struct resource *r) { struct generic_pcie_acpi_softc *sc; int res; sc = device_get_softc(dev); if ((res = rman_activate_resource(r)) != 0) return (res); res = BUS_ACTIVATE_RESOURCE(device_get_parent(dev), child, type, rid,r); return (res); } static int generic_pcie_acpi_deactivate_resource(device_t dev, device_t child, int type, int rid, struct resource *r) { int res; if ((res = rman_deactivate_resource(r)) != 0) return (res); res = BUS_DEACTIVATE_RESOURCE(device_get_parent(dev), child, type, rid, r); return (res); } static int generic_pcie_acpi_alloc_msi(device_t pci, device_t child, int count, int maxcount, int *irqs) { #if defined(INTRNG) return (intr_alloc_msi(pci, child, ACPI_MSI_XREF, count, maxcount, irqs)); #else return (ENXIO); #endif } static int generic_pcie_acpi_release_msi(device_t pci, device_t child, int count, int *irqs) { #if defined(INTRNG) return (intr_release_msi(pci, child, ACPI_MSI_XREF, count, irqs)); #else return (ENXIO); #endif } static int generic_pcie_acpi_map_msi(device_t pci, device_t child, int irq, uint64_t *addr, uint32_t *data) { #if defined(INTRNG) return (intr_map_msi(pci, child, ACPI_MSI_XREF, irq, addr, data)); #else return (ENXIO); #endif } static int generic_pcie_acpi_alloc_msix(device_t pci, device_t child, int *irq) { #if defined(INTRNG) return (intr_alloc_msix(pci, child, ACPI_MSI_XREF, irq)); #else return (ENXIO); #endif } static int generic_pcie_acpi_release_msix(device_t pci, device_t child, int irq) { #if defined(INTRNG) return (intr_release_msix(pci, child, ACPI_MSI_XREF, irq)); #else return (ENXIO); #endif } static int generic_pcie_acpi_get_id(device_t pci, device_t child, enum pci_id_type type, uintptr_t *id) { struct generic_pcie_acpi_softc *sc; int err; /* Use the PCI RID to find the MSI ID */ if (type == PCI_ID_MSI) { sc = device_get_softc(pci); type = PCI_ID_RID; err = pcib_get_id(pci, child, type, id); if (err != 0) return (err); *id |= sc->base.ecam << 16; return (0); } return (pcib_get_id(pci, child, type, id)); } static device_method_t generic_pcie_acpi_methods[] = { DEVMETHOD(device_probe, generic_pcie_acpi_probe), DEVMETHOD(device_attach, pci_host_generic_acpi_attach), DEVMETHOD(bus_alloc_resource, pci_host_generic_acpi_alloc_resource), DEVMETHOD(bus_activate_resource, generic_pcie_acpi_activate_resource), DEVMETHOD(bus_deactivate_resource, generic_pcie_acpi_deactivate_resource), + DEVMETHOD(bus_read_ivar, generic_pcie_acpi_read_ivar), /* pcib interface */ DEVMETHOD(pcib_route_interrupt, generic_pcie_acpi_route_interrupt), DEVMETHOD(pcib_alloc_msi, generic_pcie_acpi_alloc_msi), DEVMETHOD(pcib_release_msi, generic_pcie_acpi_release_msi), DEVMETHOD(pcib_alloc_msix, generic_pcie_acpi_alloc_msix), DEVMETHOD(pcib_release_msix, generic_pcie_acpi_release_msix), DEVMETHOD(pcib_map_msi, generic_pcie_acpi_map_msi), DEVMETHOD(pcib_get_id, generic_pcie_acpi_get_id), DEVMETHOD_END }; DEFINE_CLASS_1(pcib, generic_pcie_acpi_driver, generic_pcie_acpi_methods, sizeof(struct generic_pcie_acpi_softc), generic_pcie_core_driver); static devclass_t generic_pcie_acpi_devclass; DRIVER_MODULE(pcib, acpi, generic_pcie_acpi_driver, generic_pcie_acpi_devclass, 0, 0);