Index: head/sys/dev/rtwn/rtl8812a/r12a_reg.h =================================================================== --- head/sys/dev/rtwn/rtl8812a/r12a_reg.h (revision 335350) +++ head/sys/dev/rtwn/rtl8812a/r12a_reg.h (revision 335351) @@ -1,236 +1,246 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #ifndef R12A_REG_H #define R12A_REG_H #include /* * MAC registers. */ /* System Configuration. */ #define R12A_SDIO_CTRL 0x070 #define R12A_RF_B_CTRL 0x076 /* Rx DMA Configuration. */ #define R12A_RXDMA_PRO 0x290 #define R12A_EARLY_MODE_CONTROL 0x2bc /* Protocol Configuration. */ #define R12A_TXPKT_EMPTY 0x41a #define R12A_ARFR_5G(i) (0x444 + (i) * 8) #define R12A_CCK_CHECK 0x454 #define R12A_AMPDU_MAX_TIME 0x456 #define R12A_AMPDU_MAX_LENGTH R92C_AGGLEN_LMT #define R12A_DATA_SEC 0x483 #define R12A_ARFR_2G(i) (0x48c + (i) * 8) #define R12A_HT_SINGLE_AMPDU 0x4c7 /* Bits for R92C_MAC_PHY_CTRL. */ #define R12A_MAC_PHY_CRYSTALCAP_M 0x7ff80000 #define R12A_MAC_PHY_CRYSTALCAP_S 19 /* Bits for R92C_LEDCFG2. */ #define R12A_LEDCFG2_ENA 0x20 +/* Bits for R12A_RXDMA_PRO. */ +#define R12A_DMA_MODE 0x02 +#define R12A_BURST_CNT_M 0x0c +#define R12A_BURST_CNT_S 2 +#define R12A_BURST_SZ_M 0x30 +#define R12A_BURST_SZ_S 4 +#define R12A_BURST_SZ_USB3 0 +#define R12A_BURST_SZ_USB2 1 +#define R12A_BURST_SZ_USB1 2 + /* Bits for R12A_CCK_CHECK. */ #define R12A_CCK_CHECK_BCN1 0x20 #define R12A_CCK_CHECK_5GHZ 0x80 /* Bits for R12A_DATA_SEC. */ #define R12A_DATA_SEC_NO_EXT 0x00 #define R12A_DATA_SEC_PRIM_UP_20 0x01 #define R12A_DATA_SEC_PRIM_DOWN_20 0x02 #define R12A_DATA_SEC_PRIM_UPPER_20 0x03 #define R12A_DATA_SEC_PRIM_LOWER_20 0x04 #define R12A_DATA_SEC_PRIM_UP_40 0x90 #define R12A_DATA_SEC_PRIM_DOWN_40 0xa0 /* Bits for R12A_HT_SINGLE_AMPDU. */ #define R12A_HT_SINGLE_AMPDU_PKT_ENA 0x80 /* Bits for R92C_RCR. */ #define R12A_RCR_DIS_CHK_14 0x00200000 #define R12A_RCR_TCP_OFFLD_EN 0x02000000 #define R12A_RCR_VHT_ACK 0x04000000 /* * Baseband registers. */ #define R12A_CCK_RPT_FORMAT 0x804 #define R12A_OFDMCCK_EN 0x808 #define R12A_RX_PATH R12A_OFDMCCK_EN #define R12A_TX_PATH 0x80c #define R12A_TXAGC_TABLE_SELECT 0x82c #define R12A_PWED_TH 0x830 #define R12A_BW_INDICATION 0x834 #define R12A_CCA_ON_SEC 0x838 #define R12A_L1_PEAK_TH 0x848 #define R12A_FC_AREA 0x860 #define R12A_RFMOD 0x8ac #define R12A_HSSI_PARAM2 0x8b0 #define R12A_ADC_BUF_CLK 0x8c4 #define R12A_ANTSEL_SW 0x900 #define R12A_SINGLETONE_CONT_TX 0x914 #define R12A_CCK_RX_PATH 0xa04 #define R12A_HSSI_PARAM1(chain) (0xc00 + (chain) * 0x200) #define R12A_TX_SCALE(chain) (0xc1c + (chain) * 0x200) #define R12A_TXAGC_CCK11_1(chain) (0xc20 + (chain) * 0x200) #define R12A_TXAGC_OFDM18_6(chain) (0xc24 + (chain) * 0x200) #define R12A_TXAGC_OFDM54_24(chain) (0xc28 + (chain) * 0x200) #define R12A_TXAGC_MCS3_0(chain) (0xc2c + (chain) * 0x200) #define R12A_TXAGC_MCS7_4(chain) (0xc30 + (chain) * 0x200) #define R12A_TXAGC_MCS11_8(chain) (0xc34 + (chain) * 0x200) #define R12A_TXAGC_MCS15_12(chain) (0xc38 + (chain) * 0x200) #define R12A_TXAGC_NSS1IX3_1IX0(chain) (0xc3c + (chain) * 0x200) #define R12A_TXAGC_NSS1IX7_1IX4(chain) (0xc40 + (chain) * 0x200) #define R12A_TXAGC_NSS2IX1_1IX8(chain) (0xc44 + (chain) * 0x200) #define R12A_TXAGC_NSS2IX5_2IX2(chain) (0xc48 + (chain) * 0x200) #define R12A_TXAGC_NSS2IX9_2IX6(chain) (0xc4c + (chain) * 0x200) #define R12A_INITIAL_GAIN(chain) (0xc50 + (chain) * 0x200) #define R12A_AFE_POWER_1(chain) (0xc60 + (chain) * 0x200) #define R12A_AFE_POWER_2(chain) (0xc64 + (chain) * 0x200) #define R12A_SLEEP_NAV(chain) (0xc80 + (chain) * 0x200) #define R12A_PMPD(chain) (0xc84 + (chain) * 0x200) #define R12A_LSSI_PARAM(chain) (0xc90 + (chain) * 0x200) #define R12A_RFE_PINMUX(chain) (0xcb0 + (chain) * 0x200) #define R12A_RFE_INV(chain) (0xcb4 + (chain) * 0x200) #define R12A_RFE(chain) (0xcb8 + (chain) * 0x200) #define R12A_HSPI_READBACK(chain) (0xd04 + (chain) * 0x40) #define R12A_LSSI_READBACK(chain) (0xd08 + (chain) * 0x40) /* Bits for R12A_CCK_RPT_FORMAT. */ #define R12A_CCK_RPT_FORMAT_HIPWR 0x00010000 /* Bits for R12A_OFDMCCK_EN. */ #define R12A_OFDMCCK_EN_CCK 0x10000000 #define R12A_OFDMCCK_EN_OFDM 0x20000000 /* Bits for R12A_CCA_ON_SEC. */ #define R12A_CCA_ON_SEC_EXT_CHAN_M 0xf0000000 #define R12A_CCA_ON_SEC_EXT_CHAN_S 28 /* Bits for R12A_RFE_PINMUX(i). */ #define R12A_RFE_PINMUX_PA_A_MASK 0x000000f0 #define R12A_RFE_PINMUX_LNA_MASK 0x0000f000 /* Bits for R12A_RFMOD. */ #define R12A_RFMOD_EXT_CHAN_M 0x3C #define R12A_RFMOD_EXT_CHAN_S 2 /* Bits for R12A_HSSI_PARAM2. */ #define R12A_HSSI_PARAM2_READ_ADDR_MASK 0xff /* Bits for R12A_HSSI_PARAM1(i). */ #define R12A_HSSI_PARAM1_PI 0x00000004 /* Bits for R12A_TX_SCALE(i). */ #define R12A_TX_SCALE_SWING_M 0xffe00000 #define R12A_TX_SCALE_SWING_S 21 /* Bits for R12A_TXAGC_CCK11_1(i). */ #define R12A_TXAGC_CCK1_M 0x000000ff #define R12A_TXAGC_CCK1_S 0 #define R12A_TXAGC_CCK2_M 0x0000ff00 #define R12A_TXAGC_CCK2_S 8 #define R12A_TXAGC_CCK55_M 0x00ff0000 #define R12A_TXAGC_CCK55_S 16 #define R12A_TXAGC_CCK11_M 0xff000000 #define R12A_TXAGC_CCK11_S 24 /* Bits for R12A_TXAGC_OFDM18_6(i). */ #define R12A_TXAGC_OFDM06_M 0x000000ff #define R12A_TXAGC_OFDM06_S 0 #define R12A_TXAGC_OFDM09_M 0x0000ff00 #define R12A_TXAGC_OFDM09_S 8 #define R12A_TXAGC_OFDM12_M 0x00ff0000 #define R12A_TXAGC_OFDM12_S 16 #define R12A_TXAGC_OFDM18_M 0xff000000 #define R12A_TXAGC_OFDM18_S 24 /* Bits for R12A_TXAGC_OFDM54_24(i). */ #define R12A_TXAGC_OFDM24_M 0x000000ff #define R12A_TXAGC_OFDM24_S 0 #define R12A_TXAGC_OFDM36_M 0x0000ff00 #define R12A_TXAGC_OFDM36_S 8 #define R12A_TXAGC_OFDM48_M 0x00ff0000 #define R12A_TXAGC_OFDM48_S 16 #define R12A_TXAGC_OFDM54_M 0xff000000 #define R12A_TXAGC_OFDM54_S 24 /* Bits for R12A_TXAGC_MCS3_0(i). */ #define R12A_TXAGC_MCS0_M 0x000000ff #define R12A_TXAGC_MCS0_S 0 #define R12A_TXAGC_MCS1_M 0x0000ff00 #define R12A_TXAGC_MCS1_S 8 #define R12A_TXAGC_MCS2_M 0x00ff0000 #define R12A_TXAGC_MCS2_S 16 #define R12A_TXAGC_MCS3_M 0xff000000 #define R12A_TXAGC_MCS3_S 24 /* Bits for R12A_TXAGC_MCS7_4(i). */ #define R12A_TXAGC_MCS4_M 0x000000ff #define R12A_TXAGC_MCS4_S 0 #define R12A_TXAGC_MCS5_M 0x0000ff00 #define R12A_TXAGC_MCS5_S 8 #define R12A_TXAGC_MCS6_M 0x00ff0000 #define R12A_TXAGC_MCS6_S 16 #define R12A_TXAGC_MCS7_M 0xff000000 #define R12A_TXAGC_MCS7_S 24 /* Bits for R12A_TXAGC_MCS11_8(i). */ #define R12A_TXAGC_MCS8_M 0x000000ff #define R12A_TXAGC_MCS8_S 0 #define R12A_TXAGC_MCS9_M 0x0000ff00 #define R12A_TXAGC_MCS9_S 8 #define R12A_TXAGC_MCS10_M 0x00ff0000 #define R12A_TXAGC_MCS10_S 16 #define R12A_TXAGC_MCS11_M 0xff000000 #define R12A_TXAGC_MCS11_S 24 /* Bits for R12A_TXAGC_MCS15_12(i). */ #define R12A_TXAGC_MCS12_M 0x000000ff #define R12A_TXAGC_MCS12_S 0 #define R12A_TXAGC_MCS13_M 0x0000ff00 #define R12A_TXAGC_MCS13_S 8 #define R12A_TXAGC_MCS14_M 0x00ff0000 #define R12A_TXAGC_MCS14_S 16 #define R12A_TXAGC_MCS15_M 0xff000000 #define R12A_TXAGC_MCS15_S 24 /* * RF (6052) registers. */ #define R12A_RF_LCK 0xb4 /* Bits for R12A_RF_LCK. */ #define R12A_RF_LCK_MODE 0x4000 #endif /* R12A_REG_H */ Index: head/sys/dev/rtwn/rtl8812a/usb/r12au.h =================================================================== --- head/sys/dev/rtwn/rtl8812a/usb/r12au.h (revision 335350) +++ head/sys/dev/rtwn/rtl8812a/usb/r12au.h (revision 335351) @@ -1,52 +1,53 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #ifndef RTL8812AU_H #define RTL8812AU_H #include /* * Function declarations. */ /* r12au_init.c */ void r12au_init_rx_agg(struct rtwn_softc *); +void r12au_init_burstlen_usb2(struct rtwn_softc *); void r12au_init_burstlen(struct rtwn_softc *); void r12au_init_ampdu_fwhw(struct rtwn_softc *); void r12au_init_ampdu(struct rtwn_softc *); void r12au_post_init(struct rtwn_softc *); /* r12au_rx.c */ int r12au_classify_intr(struct rtwn_softc *, void *, int); int r12au_align_rx(int, int); /* r12au_tx.c */ void r12au_dump_tx_desc(struct rtwn_softc *, const void *); #endif /* RTL8812AU_H */ Index: head/sys/dev/rtwn/rtl8812a/usb/r12au_init.c =================================================================== --- head/sys/dev/rtwn/rtl8812a/usb/r12au_init.c (revision 335350) +++ head/sys/dev/rtwn/rtl8812a/usb/r12au_init.c (revision 335351) @@ -1,187 +1,200 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include void r12au_init_rx_agg(struct rtwn_softc *sc) { struct r12a_softc *rs = sc->sc_priv; /* Rx aggregation (USB). */ rtwn_write_2(sc, R92C_RXDMA_AGG_PG_TH, rs->ac_usb_dma_size | (rs->ac_usb_dma_time << 8)); rtwn_setbits_1(sc, R92C_TRXDMA_CTRL, 0, R92C_TRXDMA_CTRL_RXDMA_AGG_EN); } void +r12au_init_burstlen_usb2(struct rtwn_softc *sc) +{ + const uint8_t dma_count = R12A_DMA_MODE | SM(R12A_BURST_CNT, 3); + + if ((rtwn_read_1(sc, R92C_USB_INFO) & 0x30) == 0) { + /* Set burst packet length to 512 B. */ + rtwn_setbits_1(sc, R12A_RXDMA_PRO, R12A_BURST_SZ_M, + dma_count | SM(R12A_BURST_SZ, R12A_BURST_SZ_USB2)); + } else { + /* Set burst packet length to 64 B. */ + rtwn_setbits_1(sc, R12A_RXDMA_PRO, R12A_BURST_SZ_M, + dma_count | SM(R12A_BURST_SZ, R12A_BURST_SZ_USB1)); + } +} + +void r12au_init_burstlen(struct rtwn_softc *sc) { - if (rtwn_read_1(sc, R92C_TYPE_ID + 3) & 0x80) { - if ((rtwn_read_1(sc, R92C_USB_INFO) & 0x30) == 0) { - /* Set burst packet length to 512 B. */ - rtwn_setbits_1(sc, R12A_RXDMA_PRO, 0x20, 0x1e); - } else { - /* Set burst packet length to 64 B. */ - rtwn_setbits_1(sc, R12A_RXDMA_PRO, 0x10, 0x2e); - } - } else { /* USB 3.0 */ + const uint8_t dma_count = R12A_DMA_MODE | SM(R12A_BURST_CNT, 3); + + if (rtwn_read_1(sc, R92C_TYPE_ID + 3) & 0x80) + r12au_init_burstlen_usb2(sc); + else { /* USB 3.0 */ /* Set burst packet length to 1 KB. */ - rtwn_setbits_1(sc, R12A_RXDMA_PRO, 0x30, 0x0e); + rtwn_setbits_1(sc, R12A_RXDMA_PRO, R12A_BURST_SZ_M, + dma_count | SM(R12A_BURST_SZ, R12A_BURST_SZ_USB3)); rtwn_setbits_1(sc, 0xf008, 0x18, 0); } } static void r12au_arfb_init(struct rtwn_softc *sc) { /* ARFB table 9 for 11ac 5G 2SS. */ rtwn_write_4(sc, R12A_ARFR_5G(0), 0x00000010); rtwn_write_4(sc, R12A_ARFR_5G(0) + 4, 0xfffff000); /* ARFB table 10 for 11ac 5G 1SS. */ rtwn_write_4(sc, R12A_ARFR_5G(1), 0x00000010); rtwn_write_4(sc, R12A_ARFR_5G(1) + 4, 0x003ff000); /* ARFB table 11 for 11ac 2G 1SS. */ rtwn_write_4(sc, R12A_ARFR_2G(0), 0x00000015); rtwn_write_4(sc, R12A_ARFR_2G(0) + 4, 0x003ff000); /* ARFB table 12 for 11ac 2G 2SS. */ rtwn_write_4(sc, R12A_ARFR_2G(1), 0x00000015); rtwn_write_4(sc, R12A_ARFR_2G(1) + 4, 0xffcff000); } void r12au_init_ampdu_fwhw(struct rtwn_softc *sc) { rtwn_setbits_1(sc, R92C_FWHW_TXQ_CTRL, R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW, 0); } void r12au_init_ampdu(struct rtwn_softc *sc) { struct r12a_softc *rs = sc->sc_priv; /* Rx interval (USB3). */ rtwn_write_1(sc, 0xf050, 0x01); /* burst length = 4 */ rtwn_write_2(sc, R92C_RXDMA_STATUS, 0x7400); rtwn_write_1(sc, R92C_RXDMA_STATUS + 1, 0xf5); /* Setup AMPDU aggregation. */ rtwn_write_1(sc, R12A_AMPDU_MAX_TIME, rs->ampdu_max_time); rtwn_write_4(sc, R12A_AMPDU_MAX_LENGTH, 0xffffffff); /* 80 MHz clock (again?) */ rtwn_write_1(sc, R92C_USTIME_TSF, 0x50); rtwn_write_1(sc, R92C_USTIME_EDCA, 0x50); rtwn_r12a_init_burstlen(sc); /* Enable single packet AMPDU. */ rtwn_setbits_1(sc, R12A_HT_SINGLE_AMPDU, 0, R12A_HT_SINGLE_AMPDU_PKT_ENA); /* 11K packet length for VHT. */ rtwn_write_1(sc, R92C_RX_PKT_LIMIT, 0x18); rtwn_write_1(sc, R92C_PIFS, 0); rtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x1f1f); rtwn_r12a_init_ampdu_fwhw(sc); /* Do not reset MAC. */ rtwn_setbits_1(sc, R92C_RSV_CTRL, 0, 0x60); r12au_arfb_init(sc); } void r12au_post_init(struct rtwn_softc *sc) { /* Setup RTS BW (equal to data BW). */ rtwn_setbits_1(sc, R92C_QUEUE_CTRL, 0x08, 0); rtwn_write_1(sc, R12A_EARLY_MODE_CONTROL + 3, 0x01); /* Reset USB mode switch setting. */ rtwn_write_1(sc, R12A_SDIO_CTRL, 0); rtwn_write_1(sc, R92C_ACLK_MON, 0); rtwn_write_1(sc, R92C_USB_HRPWM, 0); #ifndef RTWN_WITHOUT_UCODE if (sc->sc_flags & RTWN_FW_LOADED) { if (sc->sc_ratectl_sysctl == RTWN_RATECTL_FW) { /* TODO: implement */ sc->sc_ratectl = RTWN_RATECTL_NET80211; } else sc->sc_ratectl = sc->sc_ratectl_sysctl; } else #endif sc->sc_ratectl = RTWN_RATECTL_NONE; } Index: head/sys/dev/rtwn/rtl8821a/usb/r21au.h =================================================================== --- head/sys/dev/rtwn/rtl8821a/usb/r21au.h (revision 335350) +++ head/sys/dev/rtwn/rtl8821a/usb/r21au.h (revision 335351) @@ -1,48 +1,47 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #ifndef RTL8821AU_H #define RTL8821AU_H #include /* * Function declarations. */ /* r21au_init.c */ void r21au_init_tx_agg(struct rtwn_softc *); -void r21au_init_burstlen(struct rtwn_softc *); /* r21au_dfs.c */ void r21au_chan_check(void *, int); int r21au_newstate(struct ieee80211vap *, enum ieee80211_state, int); void r21au_scan_start(struct ieee80211com *); void r21au_scan_end(struct ieee80211com *); #endif /* RTL8821AU_H */ Index: head/sys/dev/rtwn/rtl8821a/usb/r21au_attach.c =================================================================== --- head/sys/dev/rtwn/rtl8821a/usb/r21au_attach.c (revision 335350) +++ head/sys/dev/rtwn/rtl8821a/usb/r21au_attach.c (revision 335351) @@ -1,284 +1,284 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include void r21au_attach(struct rtwn_usb_softc *); static void r21a_postattach(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; struct r12a_softc *rs = sc->sc_priv; if (rs->board_type == R92C_BOARD_TYPE_MINICARD || rs->board_type == R92C_BOARD_TYPE_SOLO || rs->board_type == R92C_BOARD_TYPE_COMBO) sc->sc_set_led = r88e_set_led; else sc->sc_set_led = r21a_set_led; TIMEOUT_TASK_INIT(taskqueue_thread, &rs->rs_chan_check, 0, r21au_chan_check, sc); /* RXCKSUM */ ic->ic_ioctl = r12a_ioctl_net; /* DFS */ rs->rs_scan_start = ic->ic_scan_start; ic->ic_scan_start = r21au_scan_start; rs->rs_scan_end = ic->ic_scan_end; ic->ic_scan_end = r21au_scan_end; } static void r21au_vap_preattach(struct rtwn_softc *sc, struct ieee80211vap *vap) { struct rtwn_vap *rvp = RTWN_VAP(vap); struct r12a_softc *rs = sc->sc_priv; r12a_vap_preattach(sc, vap); /* Install DFS newstate handler (non-monitor vaps only). */ if (rvp->id != RTWN_VAP_ID_INVALID) { KASSERT(rvp->id >= 0 && rvp->id <= nitems(rs->rs_newstate), ("%s: wrong vap id %d\n", __func__, rvp->id)); rs->rs_newstate[rvp->id] = vap->iv_newstate; vap->iv_newstate = r21au_newstate; } } static void r21a_attach_private(struct rtwn_softc *sc) { struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); struct r12a_softc *rs; rs = malloc(sizeof(struct r12a_softc), M_RTWN_PRIV, M_WAITOK | M_ZERO); rs->rs_flags = R12A_RXCKSUM_EN | R12A_RXCKSUM6_EN; rs->rs_radar = 0; SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "radar_detection", CTLFLAG_RDTUN, &rs->rs_radar, rs->rs_radar, "Enable radar detection (untested)"); rs->rs_fix_spur = rtwn_nop_softc_chan; rs->rs_set_band_2ghz = r21a_set_band_2ghz; rs->rs_set_band_5ghz = r21a_set_band_5ghz; - rs->rs_init_burstlen = r21au_init_burstlen; + rs->rs_init_burstlen = r12au_init_burstlen_usb2; rs->rs_init_ampdu_fwhw = r21a_init_ampdu_fwhw; rs->rs_crystalcap_write = r21a_crystalcap_write; #ifndef RTWN_WITHOUT_UCODE rs->rs_iq_calib_fw_supported = r21a_iq_calib_fw_supported; #endif rs->rs_iq_calib_sw = r21a_iq_calib_sw; rs->ampdu_max_time = 0x5e; rs->ac_usb_dma_size = 0x01; rs->ac_usb_dma_time = 0x10; sc->sc_priv = rs; } static void r21au_adj_devcaps(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; struct r12a_softc *rs = sc->sc_priv; ic->ic_htcaps |= IEEE80211_HTC_TXLDPC; if (rs->rs_radar != 0) ic->ic_caps |= IEEE80211_C_DFS; /* TODO: VHT */ } void r21au_attach(struct rtwn_usb_softc *uc) { struct rtwn_softc *sc = &uc->uc_sc; /* USB part. */ uc->uc_align_rx = r12au_align_rx; uc->tx_agg_desc_num = 6; /* Common part. */ sc->sc_flags = RTWN_FLAG_EXT_HDR; sc->sc_set_chan = r12a_set_chan; sc->sc_fill_tx_desc = r12a_fill_tx_desc; sc->sc_fill_tx_desc_raw = r12a_fill_tx_desc_raw; sc->sc_fill_tx_desc_null = r12a_fill_tx_desc_null; sc->sc_dump_tx_desc = r12au_dump_tx_desc; sc->sc_tx_radiotap_flags = r12a_tx_radiotap_flags; sc->sc_rx_radiotap_flags = r12a_rx_radiotap_flags; sc->sc_get_rx_stats = r12a_get_rx_stats; sc->sc_get_rssi_cck = r21a_get_rssi_cck; sc->sc_get_rssi_ofdm = r88e_get_rssi_ofdm; sc->sc_classify_intr = r12au_classify_intr; sc->sc_handle_tx_report = r12a_ratectl_tx_complete; sc->sc_handle_c2h_report = r12a_handle_c2h_report; sc->sc_check_frame = r12a_check_frame_checksum; sc->sc_rf_read = r12a_c_cut_rf_read; sc->sc_rf_write = r12a_rf_write; sc->sc_check_condition = r21a_check_condition; sc->sc_efuse_postread = rtwn_nop_softc; sc->sc_parse_rom = r21a_parse_rom; sc->sc_power_on = r21a_power_on; sc->sc_power_off = r21a_power_off; #ifndef RTWN_WITHOUT_UCODE sc->sc_fw_reset = r21a_fw_reset; sc->sc_fw_download_enable = r12a_fw_download_enable; #endif sc->sc_llt_init = r92c_llt_init; sc->sc_set_page_size = rtwn_nop_int_softc; sc->sc_lc_calib = rtwn_nop_softc; /* XXX not used */ sc->sc_iq_calib = r12a_iq_calib; sc->sc_read_chipid_vendor = rtwn_nop_softc_uint32; sc->sc_adj_devcaps = r21au_adj_devcaps; sc->sc_vap_preattach = r21au_vap_preattach; sc->sc_postattach = r21a_postattach; sc->sc_detach_private = r12a_detach_private; #ifndef RTWN_WITHOUT_UCODE sc->sc_set_media_status = r12a_set_media_status; sc->sc_set_rsvd_page = r88e_set_rsvd_page; sc->sc_set_pwrmode = r12a_set_pwrmode; sc->sc_set_rssi = rtwn_nop_softc; /* XXX TODO */ #else sc->sc_set_media_status = rtwn_nop_softc_int; #endif sc->sc_beacon_init = r21a_beacon_init; sc->sc_beacon_enable = r92c_beacon_enable; sc->sc_beacon_set_rate = r12a_beacon_set_rate; sc->sc_beacon_select = r21a_beacon_select; sc->sc_temp_measure = r88e_temp_measure; sc->sc_temp_read = r88e_temp_read; sc->sc_init_tx_agg = r21au_init_tx_agg; sc->sc_init_rx_agg = r12au_init_rx_agg; sc->sc_init_ampdu = r12au_init_ampdu; sc->sc_init_intr = r12a_init_intr; sc->sc_init_edca = r12a_init_edca; sc->sc_init_bb = r12a_init_bb; sc->sc_init_rf = r12a_init_rf; sc->sc_init_antsel = r12a_init_antsel; sc->sc_post_init = r12au_post_init; sc->sc_init_bcnq1_boundary = r21a_init_bcnq1_boundary; sc->chan_list_5ghz[0] = r12a_chan_5ghz_0; sc->chan_list_5ghz[1] = r12a_chan_5ghz_1; sc->chan_list_5ghz[2] = r12a_chan_5ghz_2; sc->chan_num_5ghz[0] = nitems(r12a_chan_5ghz_0); sc->chan_num_5ghz[1] = nitems(r12a_chan_5ghz_1); sc->chan_num_5ghz[2] = nitems(r12a_chan_5ghz_2); sc->mac_prog = &rtl8821au_mac[0]; sc->mac_size = nitems(rtl8821au_mac); sc->bb_prog = &rtl8821au_bb[0]; sc->bb_size = nitems(rtl8821au_bb); sc->agc_prog = &rtl8821au_agc[0]; sc->agc_size = nitems(rtl8821au_agc); sc->rf_prog = &rtl8821au_rf[0]; sc->name = "RTL8821AU"; sc->fwname = "rtwn-rtl8821aufw"; sc->fwsig = 0x210; sc->page_count = R21A_TX_PAGE_COUNT; sc->pktbuf_count = R12A_TXPKTBUF_COUNT; sc->ackto = 0x80; sc->npubqpages = R12A_PUBQ_NPAGES; sc->page_size = R21A_TX_PAGE_SIZE; sc->txdesc_len = sizeof(struct r12au_tx_desc); sc->efuse_maxlen = R12A_EFUSE_MAX_LEN; sc->efuse_maplen = R12A_EFUSE_MAP_LEN; sc->rx_dma_size = R12A_RX_DMA_BUFFER_SIZE; sc->macid_limit = R12A_MACID_MAX + 1; sc->cam_entry_limit = R12A_CAM_ENTRY_COUNT; sc->fwsize_limit = R12A_MAX_FW_SIZE; sc->temp_delta = R88E_CALIB_THRESHOLD; sc->bcn_status_reg[0] = R92C_TDECTRL; sc->bcn_status_reg[1] = R21A_DWBCN1_CTRL; sc->rcr = R12A_RCR_DIS_CHK_14 | R12A_RCR_VHT_ACK | R12A_RCR_TCP_OFFLD_EN; sc->ntxchains = 1; sc->nrxchains = 1; r21a_attach_private(sc); } Index: head/sys/dev/rtwn/rtl8821a/usb/r21au_init.c =================================================================== --- head/sys/dev/rtwn/rtl8821a/usb/r21au_init.c (revision 335350) +++ head/sys/dev/rtwn/rtl8821a/usb/r21au_init.c (revision 335351) @@ -1,83 +1,72 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include void r21au_init_tx_agg(struct rtwn_softc *sc) { struct rtwn_usb_softc *uc = RTWN_USB_SOFTC(sc); r92cu_init_tx_agg(sc); rtwn_write_1(sc, R21A_DWBCN1_CTRL, uc->tx_agg_desc_num << 1); } -void -r21au_init_burstlen(struct rtwn_softc *sc) -{ - if ((rtwn_read_1(sc, R92C_USB_INFO) & 0x30) == 0) { - /* Set burst packet length to 512 B. */ - rtwn_setbits_1(sc, R12A_RXDMA_PRO, 0x20, 0x1e); - } else { - /* Set burst packet length to 64 B. */ - rtwn_setbits_1(sc, R12A_RXDMA_PRO, 0x10, 0x2e); - } -}