Index: head/sys/arm64/conf/GENERIC =================================================================== --- head/sys/arm64/conf/GENERIC (revision 334996) +++ head/sys/arm64/conf/GENERIC (revision 334997) @@ -1,264 +1,265 @@ # # GENERIC -- Generic kernel configuration file for FreeBSD/arm64 # # For more information on this file, please read the config(5) manual page, # and/or the handbook section on Kernel Configuration Files: # # https://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html # # The handbook is also available locally in /usr/share/doc/handbook # if you've installed the doc distribution, otherwise always see the # FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the # latest information. # # An exhaustive list of options and more detailed explanations of the # device lines is also present in the ../../conf/NOTES and NOTES files. # If you are in doubt as to the purpose or necessity of a line, check first # in NOTES. # # $FreeBSD$ cpu ARM64 ident GENERIC makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols makeoptions WITH_CTF=1 # Run ctfconvert(1) for DTrace support options SCHED_ULE # ULE scheduler options PREEMPTION # Enable kernel thread preemption #options VIMAGE # Subsystem virtualization, e.g. VNET options INET # InterNETworking options INET6 # IPv6 communications protocols options IPSEC # IP (v4/v6) security options IPSEC_SUPPORT # Allow kldload of ipsec and tcpmd5 options TCP_HHOOK # hhook(9) framework for TCP options TCP_OFFLOAD # TCP offload options TCP_RFC7413 # TCP Fast Open options SCTP # Stream Control Transmission Protocol options FFS # Berkeley Fast Filesystem options SOFTUPDATES # Enable FFS soft updates support options UFS_ACL # Support for access control lists options UFS_DIRHASH # Improve performance on big directories options UFS_GJOURNAL # Enable gjournal-based UFS journaling options QUOTA # Enable disk quotas for UFS options MD_ROOT # MD is a potential root device options NFSCL # Network Filesystem Client options NFSD # Network Filesystem Server options NFSLOCKD # Network Lock Manager options NFS_ROOT # NFS usable as /, requires NFSCL options MSDOSFS # MSDOS Filesystem options CD9660 # ISO 9660 Filesystem options PROCFS # Process filesystem (requires PSEUDOFS) options PSEUDOFS # Pseudo-filesystem framework options GEOM_PART_GPT # GUID Partition Tables. options GEOM_RAID # Soft RAID functionality. options GEOM_LABEL # Provides labelization options COMPAT_FREEBSD32 # Incomplete, but used by cloudabi32.ko. options COMPAT_FREEBSD11 # Compatible with FreeBSD11 options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI options KTRACE # ktrace(1) support options STACK # stack(9) support options SYSVSHM # SYSV-style shared memory options SYSVMSG # SYSV-style message queues options SYSVSEM # SYSV-style semaphores options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed. options KBD_INSTALL_CDEV # install a CDEV entry in /dev options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4) options AUDIT # Security event auditing options CAPABILITY_MODE # Capsicum capability mode options CAPABILITIES # Capsicum capabilities options MAC # TrustedBSD MAC Framework options KDTRACE_FRAME # Ensure frames are compiled in options KDTRACE_HOOKS # Kernel DTrace hooks options VFP # Floating-point support options RACCT # Resource accounting framework options RACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default options RCTL # Resource limits options SMP options INTRNG # Debugging support. Always need this: options KDB # Enable kernel debugger support. options KDB_TRACE # Print a stack trace for a panic. # For full debugger support use (turn off in stable branch): options DDB # Support DDB. #options GDB # Support remote GDB. options DEADLKRES # Enable the deadlock resolver options INVARIANTS # Enable calls of extra sanity checking options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS options WITNESS # Enable checks to detect deadlocks and cycles options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed options MALLOC_DEBUG_MAXZONES=8 # Separate malloc(9) zones options ALT_BREAK_TO_DEBUGGER # Enter debugger on keyboard escape sequence options USB_DEBUG # enable debug msgs # Kernel dump features. options EKCD # Support for encrypted kernel dumps options GZIO # gzip-compressed kernel and user dumps options ZSTDIO # zstd-compressed kernel and user dumps options NETDUMP # netdump(4) client support # SoC support options SOC_ALLWINNER_A64 options SOC_ALLWINNER_H5 options SOC_CAVM_THUNDERX options SOC_HISI_HI6220 options SOC_BRCM_BCM2837 options SOC_ROCKCHIP_RK3328 # Annapurna Alpine drivers device al_ccu # Alpine Cache Coherency Unit device al_nb_service # Alpine North Bridge Service device al_iofic # I/O Fabric Interrupt Controller device al_serdes # Serializer/Deserializer device al_udma # Universal DMA # Qualcomm Snapdragon drivers device qcom_gcc # Global Clock Controller # VirtIO support device virtio device virtio_pci device virtio_mmio device virtio_blk device vtnet # CPU frequency control device cpufreq # Bus drivers device pci device al_pci # Annapurna Alpine PCI-E options PCI_HP # PCI-Express native HotPlug options PCI_IOV # PCI SR-IOV support # Ethernet NICs device mdio device mii device miibus # MII bus support device awg # Allwinner EMAC Gigabit Ethernet device axgbe # AMD Opteron A1100 integrated NIC device em # Intel PRO/1000 Gigabit Ethernet Family device ix # Intel 10Gb Ethernet Family device msk # Marvell/SysKonnect Yukon II Gigabit Ethernet device neta # Marvell Armada 370/38x/XP/3700 NIC device smc # SMSC LAN91C111 device vnic # Cavium ThunderX NIC device al_eth # Annapurna Alpine Ethernet NIC # Block devices device ahci device scbus device da # ATA/SCSI peripherals device pass # Passthrough device (direct ATA/SCSI access) # MMC/SD/SDIO Card slot support device sdhci device aw_mmc # Allwinner SD/MMC controller device mmc # mmc/sd bus device mmcsd # mmc/sd flash cards device dwmmc # Serial (COM) ports device uart # Generic UART driver device uart_msm # Qualcomm MSM UART driver +device uart_mu # RPI3 aux port device uart_mvebu # Armada 3700 UART driver device uart_ns8250 # ns8250-type UART driver device uart_snps device pl011 # USB support device aw_ehci # Allwinner EHCI USB interface (USB 2.0) device aw_usbphy # Allwinner USB PHY device dwcotg # DWC OTG controller device ohci # OHCI USB interface device ehci # EHCI USB interface (USB 2.0) device ehci_mv # Marvell EHCI USB interface device xhci # XHCI PCI->USB interface (USB 3.0) device xhci_mv # Marvell XHCI USB interface device usb # USB Bus (required) device ukbd # Keyboard device umass # Disks/Mass storage - Requires scbus and da # USB ethernet support device smcphy device smsc # GPIO device aw_gpio # Allwinner GPIO controller device gpio device gpioled device fdt_pinctrl # I2C device aw_rsb # Allwinner Reduced Serial Bus device bcm2835_bsc # Broadcom BCM283x I2C bus device iicbus device iic device twsi # Allwinner I2C controller # Clock and reset controllers device aw_ccu # Allwinner clock controller # Interrupt controllers device aw_nmi # Allwinner NMI support # Real-time clock support device aw_rtc # Allwinner Real-time Clock device mv_rtc # Marvell Real-time Clock # Watchdog controllers device aw_wdog # Allwinner Watchdog # Power management controllers device axp81x # X-Powers AXP81x PMIC # EFUSE device aw_sid # Allwinner Secure ID EFUSE # Thermal sensors device aw_thermal # Allwinner Thermal Sensor Controller # SPI device spibus device bcm2835_spi # Broadcom BCM283x SPI bus # Console device vt device kbdmux # Pseudo devices. device loop # Network loopback device random # Entropy device device ether # Ethernet support device vlan # 802.1Q VLAN support device tun # Packet tunnel. device md # Memory "disks" device gif # IPv6 and IPv4 tunneling device firmware # firmware assist module options EFIRT # EFI Runtime Services # EXT_RESOURCES pseudo devices options EXT_RESOURCES device clk device phy device hwreset device regulator device syscon # The `bpf' device enables the Berkeley Packet Filter. # Be aware of the administrative consequences of enabling this! # Note that 'bpf' is required for DHCP. device bpf # Berkeley packet filter # Chip-specific errata options THUNDERX_PASS_1_1_ERRATA options FDT device acpi # The crypto framework is required by IPSEC device crypto # Required by IPSEC Property changes on: head/sys/arm64/conf/GENERIC ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/conf/files.arm64 =================================================================== --- head/sys/conf/files.arm64 (revision 334996) +++ head/sys/conf/files.arm64 (revision 334997) @@ -1,256 +1,257 @@ # $FreeBSD$ cloudabi32_vdso.o optional compat_cloudabi32 \ dependency "$S/contrib/cloudabi/cloudabi_vdso_armv6_on_64bit.S" \ compile-with "${CC} -x assembler-with-cpp -m32 -shared -nostdinc -nostdlib -Wl,-T$S/compat/cloudabi/cloudabi_vdso.lds $S/contrib/cloudabi/cloudabi_vdso_armv6_on_64bit.S -o ${.TARGET}" \ no-obj no-implicit-rule \ clean "cloudabi32_vdso.o" # cloudabi32_vdso_blob.o optional compat_cloudabi32 \ dependency "cloudabi32_vdso.o" \ compile-with "${OBJCOPY} --input-target binary --output-target elf64-littleaarch64 --binary-architecture aarch64 cloudabi32_vdso.o ${.TARGET}" \ no-implicit-rule \ clean "cloudabi32_vdso_blob.o" # cloudabi64_vdso.o optional compat_cloudabi64 \ dependency "$S/contrib/cloudabi/cloudabi_vdso_aarch64.S" \ compile-with "${CC} -x assembler-with-cpp -shared -nostdinc -nostdlib -Wl,-T$S/compat/cloudabi/cloudabi_vdso.lds $S/contrib/cloudabi/cloudabi_vdso_aarch64.S -o ${.TARGET}" \ no-obj no-implicit-rule \ clean "cloudabi64_vdso.o" # cloudabi64_vdso_blob.o optional compat_cloudabi64 \ dependency "cloudabi64_vdso.o" \ compile-with "${OBJCOPY} --input-target binary --output-target elf64-littleaarch64 --binary-architecture aarch64 cloudabi64_vdso.o ${.TARGET}" \ no-implicit-rule \ clean "cloudabi64_vdso_blob.o" # # Allwinner common files arm/allwinner/a10_ehci.c optional ehci aw_ehci fdt arm/allwinner/aw_gpio.c optional gpio aw_gpio fdt arm/allwinner/aw_mmc.c optional mmc aw_mmc fdt arm/allwinner/aw_nmi.c optional aw_nmi fdt \ compile-with "${NORMAL_C} -I$S/gnu/dts/include" arm/allwinner/aw_rsb.c optional aw_rsb fdt arm/allwinner/aw_rtc.c optional aw_rtc fdt arm/allwinner/aw_sid.c optional aw_sid fdt arm/allwinner/aw_spi.c optional aw_spi fdt arm/allwinner/aw_thermal.c optional aw_thermal fdt arm/allwinner/aw_usbphy.c optional ehci aw_usbphy fdt arm/allwinner/aw_wdog.c optional aw_wdog fdt arm/allwinner/axp81x.c optional axp81x fdt arm/allwinner/if_awg.c optional awg ext_resources syscon fdt # Allwinner clock driver arm/allwinner/clkng/aw_ccung.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_nkmp.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_nm.c optional aw_ccu fdt arm/allwinner/clkng/aw_clk_prediv_mux.c optional aw_ccu fdt arm/allwinner/clkng/ccu_a64.c optional soc_allwinner_a64 aw_ccu fdt arm/allwinner/clkng/ccu_h3.c optional soc_allwinner_h5 aw_ccu fdt arm/allwinner/clkng/ccu_sun8i_r.c optional aw_ccu fdt # Allwinner padconf files arm/allwinner/a64/a64_padconf.c optional soc_allwinner_a64 fdt arm/allwinner/a64/a64_r_padconf.c optional soc_allwinner_a64 fdt arm/allwinner/h3/h3_padconf.c optional soc_allwinner_h5 fdt arm/allwinner/h3/h3_r_padconf.c optional soc_allwinner_h5 fdt arm/annapurna/alpine/alpine_ccu.c optional al_ccu fdt arm/annapurna/alpine/alpine_nb_service.c optional al_nb_service fdt arm/annapurna/alpine/alpine_pci.c optional al_pci fdt arm/annapurna/alpine/alpine_pci_msix.c optional al_pci fdt arm/annapurna/alpine/alpine_serdes.c optional al_serdes fdt \ no-depend \ compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}" arm/arm/generic_timer.c standard arm/arm/gic.c standard arm/arm/gic_acpi.c optional acpi arm/arm/gic_fdt.c optional fdt arm/arm/pmu.c standard arm/arm/physmem.c standard arm/broadcom/bcm2835/bcm2835_audio.c optional sound vchiq fdt \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" arm/broadcom/bcm2835/bcm2835_bsc.c optional bcm2835_bsc soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_cpufreq.c optional soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_dma.c optional soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_fbd.c optional vt soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_ft5406.c optional evdev bcm2835_ft5406 soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_gpio.c optional gpio soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_intr.c optional soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_mbox.c optional soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_rng.c optional random soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_sdhci.c optional sdhci soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_spi.c optional bcm2835_spi soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_vcio.c optional soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2835_wdog.c optional soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm2836.c optional soc_brcm_bcm2837 fdt arm/broadcom/bcm2835/bcm283x_dwc_fdt.c optional dwcotg fdt soc_brcm_bcm2837 arm/mv/armada38x/armada38x_rtc.c optional mv_rtc fdt arm64/acpica/acpi_machdep.c optional acpi arm64/acpica/OsdEnvironment.c optional acpi arm64/acpica/acpi_wakeup.c optional acpi arm64/acpica/pci_cfgreg.c optional acpi pci arm64/arm64/autoconf.c standard arm64/arm64/bus_machdep.c standard arm64/arm64/bus_space_asm.S standard arm64/arm64/busdma_bounce.c standard arm64/arm64/busdma_machdep.c standard arm64/arm64/bzero.S standard arm64/arm64/clock.c standard arm64/arm64/copyinout.S standard arm64/arm64/copystr.c standard arm64/arm64/cpu_errata.c standard arm64/arm64/cpufunc_asm.S standard arm64/arm64/db_disasm.c optional ddb arm64/arm64/db_interface.c optional ddb arm64/arm64/db_trace.c optional ddb arm64/arm64/debug_monitor.c optional ddb arm64/arm64/disassem.c optional ddb arm64/arm64/dump_machdep.c standard arm64/arm64/efirt_machdep.c optional efirt arm64/arm64/elf32_machdep.c optional compat_freebsd32 arm64/arm64/elf_machdep.c standard arm64/arm64/exception.S standard arm64/arm64/freebsd32_machdep.c optional compat_freebsd32 arm64/arm64/gicv3_its.c optional intrng fdt arm64/arm64/gic_v3.c standard arm64/arm64/gic_v3_acpi.c optional acpi arm64/arm64/gic_v3_fdt.c optional fdt arm64/arm64/identcpu.c standard arm64/arm64/in_cksum.c optional inet | inet6 arm64/arm64/locore.S standard no-obj arm64/arm64/machdep.c standard arm64/arm64/mem.c standard arm64/arm64/memcpy.S standard arm64/arm64/memmove.S standard arm64/arm64/minidump_machdep.c standard arm64/arm64/mp_machdep.c optional smp arm64/arm64/nexus.c standard arm64/arm64/ofw_machdep.c optional fdt arm64/arm64/pmap.c standard arm64/arm64/stack_machdep.c optional ddb | stack arm64/arm64/support.S standard arm64/arm64/swtch.S standard arm64/arm64/sys_machdep.c standard arm64/arm64/trap.c standard arm64/arm64/uio_machdep.c standard arm64/arm64/uma_machdep.c standard arm64/arm64/undefined.c standard arm64/arm64/unwind.c optional ddb | kdtrace_hooks | stack arm64/arm64/vfp.c standard arm64/arm64/vm_machdep.c standard arm64/cavium/thunder_pcie_fdt.c optional soc_cavm_thunderx pci fdt arm64/cavium/thunder_pcie_pem.c optional soc_cavm_thunderx pci arm64/cavium/thunder_pcie_pem_fdt.c optional soc_cavm_thunderx pci fdt arm64/cavium/thunder_pcie_common.c optional soc_cavm_thunderx pci arm64/cloudabi32/cloudabi32_sysvec.c optional compat_cloudabi32 arm64/cloudabi64/cloudabi64_sysvec.c optional compat_cloudabi64 arm64/coresight/coresight.c standard arm64/coresight/coresight_if.m standard arm64/coresight/coresight-cmd.c standard arm64/coresight/coresight-cpu-debug.c standard arm64/coresight/coresight-dynamic-replicator.c standard arm64/coresight/coresight-etm4x.c standard arm64/coresight/coresight-funnel.c standard arm64/coresight/coresight-tmc.c standard arm64/qualcomm/qcom_gcc.c optional qcom_gcc fdt contrib/vchiq/interface/compat/vchi_bsd.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_2835_arm.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -Wno-unused -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_arm.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -Wno-unused -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_connected.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_core.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_kern_lib.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_kmod.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_shim.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_util.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" crypto/armv8/armv8_crypto.c optional armv8crypto armv8_crypto_wrap.o optional armv8crypto \ dependency "$S/crypto/armv8/armv8_crypto_wrap.c" \ compile-with "${CC} -c ${CFLAGS:C/^-O2$/-O3/:N-nostdinc:N-mgeneral-regs-only} ${WERROR} ${NO_WCAST_QUAL} ${PROF} -march=armv8-a+crypto ${.IMPSRC}" \ no-implicit-rule \ clean "armv8_crypto_wrap.o" crypto/blowfish/bf_enc.c optional crypto | ipsec | ipsec_support crypto/des/des_enc.c optional crypto | ipsec | ipsec_support | netsmb dev/acpica/acpi_bus_if.m optional acpi dev/acpica/acpi_if.m optional acpi dev/acpica/acpi_pci_link.c optional acpi pci dev/acpica/acpi_pcib.c optional acpi pci dev/ahci/ahci_generic.c optional ahci dev/axgbe/if_axgbe.c optional axgbe dev/axgbe/xgbe-desc.c optional axgbe dev/axgbe/xgbe-dev.c optional axgbe dev/axgbe/xgbe-drv.c optional axgbe dev/axgbe/xgbe-mdio.c optional axgbe dev/cpufreq/cpufreq_dt.c optional cpufreq fdt dev/iicbus/twsi/a10_twsi.c optional twsi fdt dev/iicbus/twsi/twsi.c optional twsi fdt dev/hwpmc/hwpmc_arm64.c optional hwpmc dev/hwpmc/hwpmc_arm64_md.c optional hwpmc dev/mbox/mbox_if.m optional soc_brcm_bcm2837 dev/mmc/host/dwmmc.c optional dwmmc fdt dev/mmc/host/dwmmc_hisi.c optional dwmmc fdt soc_hisi_hi6220 dev/mmc/host/dwmmc_rockchip.c optional dwmmc fdt soc_rockchip_rk3328 dev/neta/if_mvneta_fdt.c optional neta fdt dev/neta/if_mvneta.c optional neta mdio mii dev/ofw/ofw_cpu.c optional fdt dev/ofw/ofwpci.c optional fdt pci dev/pci/pci_host_generic.c optional pci dev/pci/pci_host_generic_acpi.c optional pci acpi dev/pci/pci_host_generic_fdt.c optional pci fdt dev/psci/psci.c standard dev/psci/psci_arm64.S standard dev/uart/uart_cpu_arm64.c optional uart +dev/uart/uart_dev_mu.c optional uart uart_mu dev/uart/uart_dev_pl011.c optional uart pl011 dev/usb/controller/dwc_otg_hisi.c optional dwcotg fdt soc_hisi_hi6220 dev/usb/controller/ehci_mv.c optional ehci_mv fdt dev/usb/controller/generic_ehci.c optional ehci acpi dev/usb/controller/generic_ohci.c optional ohci fdt dev/usb/controller/generic_usb_if.m optional ohci fdt dev/usb/controller/xhci_mv.c optional xhci_mv fdt dev/vnic/mrml_bridge.c optional vnic fdt dev/vnic/nic_main.c optional vnic pci dev/vnic/nicvf_main.c optional vnic pci pci_iov dev/vnic/nicvf_queues.c optional vnic pci pci_iov dev/vnic/thunder_bgx_fdt.c optional vnic fdt dev/vnic/thunder_bgx.c optional vnic pci dev/vnic/thunder_mdio_fdt.c optional vnic fdt dev/vnic/thunder_mdio.c optional vnic dev/vnic/lmac_if.m optional inet | inet6 | vnic kern/kern_clocksource.c standard kern/msi_if.m optional intrng kern/pic_if.m optional intrng kern/subr_devmap.c standard kern/subr_intr.c optional intrng libkern/bcmp.c standard libkern/ffs.c standard libkern/ffsl.c standard libkern/ffsll.c standard libkern/fls.c standard libkern/flsl.c standard libkern/flsll.c standard libkern/memset.c standard libkern/arm64/crc32c_armv8.S standard cddl/contrib/opensolaris/common/atomic/aarch64/opensolaris_atomic.S optional zfs | dtrace compile-with "${CDDL_C}" cddl/dev/dtrace/aarch64/dtrace_asm.S optional dtrace compile-with "${DTRACE_S}" cddl/dev/dtrace/aarch64/dtrace_subr.c optional dtrace compile-with "${DTRACE_C}" cddl/dev/fbt/aarch64/fbt_isa.c optional dtrace_fbt | dtraceall compile-with "${FBT_C}" arm64/rockchip/rk_grf.c optional fdt soc_rockchip_rk3328 arm64/rockchip/rk_pinctrl.c optional fdt soc_rockchip_rk3328 arm64/rockchip/rk_gpio.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk_cru.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk_clk_armclk.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk_clk_composite.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk_clk_gate.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk_clk_mux.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk_clk_pll.c optional fdt soc_rockchip_rk3328 arm64/rockchip/clk/rk3328_cru.c optional fdt soc_rockchip_rk3328 Property changes on: head/sys/conf/files.arm64 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dev/uart/uart_dev_mu.c =================================================================== --- head/sys/dev/uart/uart_dev_mu.c (nonexistent) +++ head/sys/dev/uart/uart_dev_mu.c (revision 334997) @@ -0,0 +1,521 @@ +/*- + * Copyright (c) 2018 Diane Bruce + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Based on uart_dev_pl011.c + * Copyright (c) 2012 Semihalf. + * All rights reserved. + */ +/* + * The mini Uart has the following features: + * - 7 or 8 bit operation. + * - 1 start and 1 stop bit. + * - No parities. + * - Break generation. + * - 8 symbols deep FIFOs for receive and transmit. + * - SW controlled RTS, SW readable CTS. + * - Auto flow control with programmable FIFO level. + * - 16550 like registers. + * - Baudrate derived from system clock. + * This is a mini UART and it does NOT have the following capabilities: + * - Break detection + * - Framing errors detection. + * - Parity bit + * - Receive Time-out interrupt + * - DCD, DSR, DTR or RI signals. + * The implemented UART is not a 16650 compatible UART However as far + * as possible the first 8 control and status registers are laid out + * like a 16550 UART. All 16550 register bits which are not supported can + * be written but will be ignored and read back as 0. All control bits + * for simple UART receive/transmit operations are available. + */ + +#include "opt_acpi.h" +#include "opt_platform.h" + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#ifdef FDT +#include +#include +#endif +#include +#include "uart_if.h" + +/* BCM2835 Micro UART registers and masks*/ +#define AUX_MU_IO_REG 0x00 /* I/O register */ + +/* + * According to errata bits 1 and 2 are swapped, + * Also bits 2 and 3 are required to enable interrupts. + */ +#define AUX_MU_IER_REG 0x01 +#define IER_RXENABLE (1) +#define IER_TXENABLE (1<<1) +#define IER_REQUIRED (3<<2) +#define IER_MASK_ALL (IER_TXENABLE|IER_RXENABLE) + +#define AUX_MU_IIR_REG 0x02 +#define IIR_READY (1) +#define IIR_TXREADY (1<<1) +#define IIR_RXREADY (1<<2) +#define IIR_CLEAR (3<<1) + +#define AUX_MU_LCR_REG 0x03 +#define LCR_WLEN7 (0) +#define LCR_WLEN8 (3) + +#define AUX_MU_MCR_REG 0x04 +#define AUX_MCR_RTS (1<<1) + +#define AUX_MU_LSR_REG 0x05 +#define LSR_RXREADY (1) +#define LSR_OVRRUN (1<<1) +#define LSR_TXEMPTY (1<<5) +#define LSR_TXIDLE (1<<6) + +#define AUX_MU_MSR_REG 0x06 +#define MSR_CTS (1<<5) + +#define AUX_MU_SCRATCH_REG 0x07 + +#define AUX_MU_CNTL_REG 0x08 +#define CNTL_RXENAB (1) +#define CNTL_TXENAB (1<<1) + +#define AUX_MU_STAT_REG 0x09 +#define STAT_TX_SA (1<<1) +#define STAT_RX_SA (1) + +#define AUX_MU_BAUD_REG 0x0a + +/* + * FIXME: actual register size is SoC-dependent, we need to handle it + */ +#define __uart_getreg(bas, reg) \ + bus_space_read_4((bas)->bst, (bas)->bsh, uart_regofs(bas, reg)) +#define __uart_setreg(bas, reg, value) \ + bus_space_write_4((bas)->bst, (bas)->bsh, uart_regofs(bas, reg), value) + +/* + * Low-level UART interface. + */ +static int uart_mu_probe(struct uart_bas *bas); +static void uart_mu_init(struct uart_bas *bas, int, int, int, int); +static void uart_mu_term(struct uart_bas *bas); +static void uart_mu_putc(struct uart_bas *bas, int); +static int uart_mu_rxready(struct uart_bas *bas); +static int uart_mu_getc(struct uart_bas *bas, struct mtx *); + +static struct uart_ops uart_mu_ops = { + .probe = uart_mu_probe, + .init = uart_mu_init, + .term = uart_mu_term, + .putc = uart_mu_putc, + .rxready = uart_mu_rxready, + .getc = uart_mu_getc, +}; + +static int +uart_mu_probe(struct uart_bas *bas) +{ + + return (0); +} + +/* + * According to the docs, the cpu clock is locked to 250Mhz when + * the micro-uart is used + */ +#define CPU_CLOCK 250000000 + +static void +uart_mu_param(struct uart_bas *bas, int baudrate, int databits, int stopbits, + int parity) +{ + uint32_t line; + uint32_t baud; + + /* + * Zero all settings to make sure + * UART is disabled and not configured + */ + line = 0x0; + __uart_setreg(bas, AUX_MU_CNTL_REG, line); + + /* As I know UART is disabled I can setup the line */ + switch (databits) { + case 7: + line |= LCR_WLEN7; + break; + case 6: + case 8: + default: + line |= LCR_WLEN8; + break; + } + + __uart_setreg(bas, AUX_MU_LCR_REG, line); + + /* See 2.2.1 BCM2835-ARM-Peripherals baudrate */ + if (baudrate != 0) { + baud = CPU_CLOCK / (8 * baudrate); + /* XXX + * baud = cpu_clock() / (8 * baudrate); + */ + __uart_setreg(bas, AUX_MU_BAUD_REG, ((uint32_t)(baud & 0xFFFF))); + } + + /* re-enable UART */ + __uart_setreg(bas, AUX_MU_CNTL_REG, CNTL_RXENAB|CNTL_TXENAB); +} + +static void +uart_mu_init(struct uart_bas *bas, int baudrate, int databits, int stopbits, + int parity) +{ + + /* Mask all interrupts */ + __uart_setreg(bas, AUX_MU_IER_REG, 0); + uart_mu_param(bas, baudrate, databits, stopbits, parity); +} + +static void +uart_mu_term(struct uart_bas *bas) +{ +} + +static void +uart_mu_putc(struct uart_bas *bas, int c) +{ + + /* Wait when TX FIFO full. Push character otherwise. */ + while ((__uart_getreg(bas, AUX_MU_LSR_REG) & LSR_TXEMPTY) == 0) + ; + __uart_setreg(bas, AUX_MU_IO_REG, c & 0xff); +} + +static int +uart_mu_rxready(struct uart_bas *bas) +{ + + return ((__uart_getreg(bas, AUX_MU_LSR_REG) & LSR_RXREADY) != 0); +} + +static int +uart_mu_getc(struct uart_bas *bas, struct mtx *hwmtx) +{ + int c; + + while(!uart_mu_rxready(bas)) + ; + c = __uart_getreg(bas, AUX_MU_IO_REG) & 0xff; + return (c); +} + +/* + * High-level UART interface. + */ +struct uart_mu_softc { + struct uart_softc bas; + uint16_t aux_ier; /* Interrupt mask */ +}; + +static int uart_mu_bus_attach(struct uart_softc *); +static int uart_mu_bus_detach(struct uart_softc *); +static int uart_mu_bus_flush(struct uart_softc *, int); +static int uart_mu_bus_getsig(struct uart_softc *); +static int uart_mu_bus_ioctl(struct uart_softc *, int, intptr_t); +static int uart_mu_bus_ipend(struct uart_softc *); +static int uart_mu_bus_param(struct uart_softc *, int, int, int, int); +static int uart_mu_bus_probe(struct uart_softc *); +static int uart_mu_bus_receive(struct uart_softc *); +static int uart_mu_bus_setsig(struct uart_softc *, int); +static int uart_mu_bus_transmit(struct uart_softc *); +static void uart_mu_bus_grab(struct uart_softc *); +static void uart_mu_bus_ungrab(struct uart_softc *); + +static kobj_method_t uart_mu_methods[] = { + KOBJMETHOD(uart_attach, uart_mu_bus_attach), + KOBJMETHOD(uart_detach, uart_mu_bus_detach), + KOBJMETHOD(uart_flush, uart_mu_bus_flush), + KOBJMETHOD(uart_getsig, uart_mu_bus_getsig), + KOBJMETHOD(uart_ioctl, uart_mu_bus_ioctl), + KOBJMETHOD(uart_ipend, uart_mu_bus_ipend), + KOBJMETHOD(uart_param, uart_mu_bus_param), + KOBJMETHOD(uart_probe, uart_mu_bus_probe), + KOBJMETHOD(uart_receive, uart_mu_bus_receive), + KOBJMETHOD(uart_setsig, uart_mu_bus_setsig), + KOBJMETHOD(uart_transmit, uart_mu_bus_transmit), + KOBJMETHOD(uart_grab, uart_mu_bus_grab), + KOBJMETHOD(uart_ungrab, uart_mu_bus_ungrab), + + { 0, 0 } +}; + +static struct uart_class uart_mu_class = { + "aux-uart", + uart_mu_methods, + sizeof(struct uart_mu_softc), + .uc_ops = &uart_mu_ops, + .uc_range = 0x48, + .uc_rclk = 0, + .uc_rshift = 2 +}; + +#ifdef FDT +static struct ofw_compat_data fdt_compat_data[] = { + {"brcm,bcm2835-aux-uart" , (uintptr_t)&uart_mu_class}, + {NULL, (uintptr_t)NULL}, +}; +UART_FDT_CLASS_AND_DEVICE(fdt_compat_data); +#endif + +static int +uart_mu_bus_attach(struct uart_softc *sc) +{ + struct uart_mu_softc *psc; + struct uart_bas *bas; + + psc = (struct uart_mu_softc *)sc; + bas = &sc->sc_bas; + /* Clear interrupts */ + __uart_setreg(bas, AUX_MU_IIR_REG, IIR_CLEAR); + /* Enable interrupts */ + psc->aux_ier = (IER_RXENABLE|IER_TXENABLE|IER_REQUIRED); + __uart_setreg(bas, AUX_MU_IER_REG, psc->aux_ier); + sc->sc_txbusy = 0; + + return (0); +} + +static int +uart_mu_bus_detach(struct uart_softc *sc) +{ + + return (0); +} + +static int +uart_mu_bus_flush(struct uart_softc *sc, int what) +{ + + return (0); +} + +static int +uart_mu_bus_getsig(struct uart_softc *sc) +{ + + return (0); +} + +static int +uart_mu_bus_ioctl(struct uart_softc *sc, int request, intptr_t data) +{ + struct uart_bas *bas; + int error; + + bas = &sc->sc_bas; + error = 0; + uart_lock(sc->sc_hwmtx); + switch (request) { + case UART_IOCTL_BREAK: + break; + case UART_IOCTL_BAUD: + *(int*)data = 115200; + break; + default: + error = EINVAL; + break; + } + uart_unlock(sc->sc_hwmtx); + + return (error); +} + +static int +uart_mu_bus_ipend(struct uart_softc *sc) +{ + struct uart_mu_softc *psc; + struct uart_bas *bas; + uint32_t ints; + int ipend; + + psc = (struct uart_mu_softc *)sc; + bas = &sc->sc_bas; + + uart_lock(sc->sc_hwmtx); + ints = __uart_getreg(bas, AUX_MU_IIR_REG); + ipend = 0; + + /* + * According to docs only one of IIR_RXREADY + * or IIR_TXREADY are valid eg. Only one or the other. + */ + if (ints & IIR_RXREADY) { + ipend |= SER_INT_RXREADY; + } else if (ints & IIR_TXREADY) { + if (__uart_getreg(bas, AUX_MU_LSR_REG) & LSR_TXIDLE) { + if (sc->sc_txbusy) + ipend |= SER_INT_TXIDLE; + + /* Disable TX interrupt */ + __uart_setreg(bas, AUX_MU_IER_REG, + psc->aux_ier & ~IER_TXENABLE); + } + } + + uart_unlock(sc->sc_hwmtx); + + return (ipend); +} + +static int +uart_mu_bus_param(struct uart_softc *sc, int baudrate, int databits, + int stopbits, int parity) +{ + + uart_lock(sc->sc_hwmtx); + uart_mu_param(&sc->sc_bas, baudrate, databits, stopbits, parity); + uart_unlock(sc->sc_hwmtx); + + return (0); +} + +static int +uart_mu_bus_probe(struct uart_softc *sc) +{ + + /* MU always has 8 byte deep fifo */ + sc->sc_rxfifosz = 8; + sc->sc_txfifosz = 8; + device_set_desc(sc->sc_dev, "BCM2835 Mini-UART"); + + return (0); +} + +static int +uart_mu_bus_receive(struct uart_softc *sc) +{ + struct uart_mu_softc *psc; + struct uart_bas *bas; + uint32_t lsr, xc; + int rx; + + bas = &sc->sc_bas; + uart_lock(sc->sc_hwmtx); + psc = (struct uart_mu_softc *)sc; + + lsr = __uart_getreg(bas, AUX_MU_LSR_REG); + while (lsr & LSR_RXREADY) { + xc = __uart_getreg(bas, AUX_MU_IO_REG); + rx = xc & 0xff; + if (uart_rx_full(sc)) { + sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; + break; + } + uart_rx_put(sc, rx); + lsr = __uart_getreg(bas, AUX_MU_LSR_REG); + } + uart_unlock(sc->sc_hwmtx); + + return (0); +} + +static int +uart_mu_bus_setsig(struct uart_softc *sc, int sig) +{ + + return (0); +} + +static int +uart_mu_bus_transmit(struct uart_softc *sc) +{ + struct uart_mu_softc *psc; + struct uart_bas *bas; + int i; + + psc = (struct uart_mu_softc *)sc; + bas = &sc->sc_bas; + uart_lock(sc->sc_hwmtx); + + for (i = 0; i < sc->sc_txdatasz; i++) { + __uart_setreg(bas, AUX_MU_IO_REG, sc->sc_txbuf[i] & 0xff); + uart_barrier(bas); + } + + /* Mark busy and enable TX interrupt */ + sc->sc_txbusy = 1; + __uart_setreg(bas, AUX_MU_IER_REG, psc->aux_ier); + + uart_unlock(sc->sc_hwmtx); + + return (0); +} + +static void +uart_mu_bus_grab(struct uart_softc *sc) +{ + struct uart_mu_softc *psc; + struct uart_bas *bas; + + psc = (struct uart_mu_softc *)sc; + bas = &sc->sc_bas; + + /* Disable interrupts on switch to polling */ + uart_lock(sc->sc_hwmtx); + __uart_setreg(bas, AUX_MU_IER_REG, psc->aux_ier &~IER_MASK_ALL); + uart_unlock(sc->sc_hwmtx); +} + +static void +uart_mu_bus_ungrab(struct uart_softc *sc) +{ + struct uart_mu_softc *psc; + struct uart_bas *bas; + + psc = (struct uart_mu_softc *)sc; + bas = &sc->sc_bas; + + /* Switch to using interrupts while not grabbed */ + uart_lock(sc->sc_hwmtx); + __uart_setreg(bas, AUX_MU_CNTL_REG, CNTL_RXENAB|CNTL_TXENAB); + __uart_setreg(bas, AUX_MU_IER_REG, psc->aux_ier); + uart_unlock(sc->sc_hwmtx); +} Property changes on: head/sys/dev/uart/uart_dev_mu.c ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/modules/uart/Makefile =================================================================== --- head/sys/modules/uart/Makefile (revision 334996) +++ head/sys/modules/uart/Makefile (revision 334997) @@ -1,41 +1,42 @@ # $FreeBSD$ .PATH: ${SRCTOP}/sys/dev/uart .if ${MACHINE_CPUARCH} == "sparc64" uart_bus_ebus= uart_bus_ebus.c .endif .if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "arm" || \ ${MACHINE_CPUARCH} == "powerpc" || ${MACHINE_CPUARCH} == "riscv" || \ ${MACHINE_CPUARCH} == "sparc64" ofw_bus_if= ofw_bus_if.h .endif .if ${MACHINE} == "i386" || ${MACHINE} == "amd64" _uart_cpu=uart_cpu_x86.c .else _uart_cpu=uart_cpu_${MACHINE}.c .endif .if exists(${.CURDIR:H:H}/dev/uart/${_uart_cpu}) uart_cpu_machine= ${_uart_cpu} .endif .if ${MACHINE} == "arm64" uart_dev_mvebu=uart_dev_mvebu.c +uart_dev_mu=uart_dev_mu.c .endif KMOD= uart SRCS= uart_bus_acpi.c ${uart_bus_ebus} uart_bus_isa.c uart_bus_pccard.c \ uart_bus_pci.c uart_bus_puc.c uart_bus_scc.c \ uart_core.c ${uart_cpu_machine} uart_dbg.c \ - ${uart_dev_mvebu} uart_dev_ns8250.c uart_dev_quicc.c \ - uart_dev_sab82532.c uart_dev_z8530.c \ + ${uart_dev_mvebu} uart_dev_ns8250.c ${uart_dev_mu} \ + uart_dev_quicc.c uart_dev_sab82532.c uart_dev_z8530.c \ uart_if.c uart_if.h uart_subr.c uart_tty.c SRCS+= acpi_if.h bus_if.h card_if.h device_if.h isa_if.h ${ofw_bus_if} \ pci_if.h \ power_if.h pccarddevs.h serdev_if.h SRCS+= opt_platform.h opt_uart.h .include Property changes on: head/sys/modules/uart/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property