Index: head/lib/msun/amd64/fenv.c =================================================================== --- head/lib/msun/amd64/fenv.c (revision 334444) +++ head/lib/msun/amd64/fenv.c (revision 334445) @@ -1,166 +1,166 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2004-2005 David Schultz * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #include #include #include #define __fenv_static #include "fenv.h" #ifdef __GNUC_GNU_INLINE__ #error "This file must be compiled with C99 'inline' semantics" #endif const fenv_t __fe_dfl_env = { { 0xffff0000 | __INITIAL_FPUCW__, 0xffff0000, 0xffffffff, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff } }, __INITIAL_MXCSR__ }; extern inline int feclearexcept(int __excepts); extern inline int fegetexceptflag(fexcept_t *__flagp, int __excepts); int fesetexceptflag(const fexcept_t *flagp, int excepts) { fenv_t env; __fnstenv(&env.__x87); env.__x87.__status &= ~excepts; env.__x87.__status |= *flagp & excepts; - __fldenv(env.__x87); + __fldenv(&env.__x87); __stmxcsr(&env.__mxcsr); env.__mxcsr &= ~excepts; env.__mxcsr |= *flagp & excepts; - __ldmxcsr(env.__mxcsr); + __ldmxcsr(&env.__mxcsr); return (0); } int feraiseexcept(int excepts) { fexcept_t ex = excepts; fesetexceptflag(&ex, excepts); __fwait(); return (0); } extern inline int fetestexcept(int __excepts); extern inline int fegetround(void); extern inline int fesetround(int __round); int fegetenv(fenv_t *envp) { __fnstenv(&envp->__x87); __stmxcsr(&envp->__mxcsr); /* * fnstenv masks all exceptions, so we need to restore the * control word to avoid this side effect. */ - __fldcw(envp->__x87.__control); + __fldcw(&envp->__x87.__control); return (0); } int feholdexcept(fenv_t *envp) { __uint32_t mxcsr; __stmxcsr(&mxcsr); __fnstenv(&envp->__x87); __fnclex(); envp->__mxcsr = mxcsr; mxcsr &= ~FE_ALL_EXCEPT; mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT; - __ldmxcsr(mxcsr); + __ldmxcsr(&mxcsr); return (0); } extern inline int fesetenv(const fenv_t *__envp); int feupdateenv(const fenv_t *envp) { __uint32_t mxcsr; __uint16_t status; __fnstsw(&status); __stmxcsr(&mxcsr); fesetenv(envp); feraiseexcept((mxcsr | status) & FE_ALL_EXCEPT); return (0); } int __feenableexcept(int mask) { __uint32_t mxcsr, omask; __uint16_t control; mask &= FE_ALL_EXCEPT; __fnstcw(&control); __stmxcsr(&mxcsr); omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT; control &= ~mask; - __fldcw(control); + __fldcw(&control); mxcsr &= ~(mask << _SSE_EMASK_SHIFT); - __ldmxcsr(mxcsr); + __ldmxcsr(&mxcsr); return (omask); } int __fedisableexcept(int mask) { __uint32_t mxcsr, omask; __uint16_t control; mask &= FE_ALL_EXCEPT; __fnstcw(&control); __stmxcsr(&mxcsr); omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT; control |= mask; - __fldcw(control); + __fldcw(&control); mxcsr |= mask << _SSE_EMASK_SHIFT; - __ldmxcsr(mxcsr); + __ldmxcsr(&mxcsr); return (omask); } __weak_reference(__feenableexcept, feenableexcept); __weak_reference(__fedisableexcept, fedisableexcept); Index: head/lib/msun/i387/fenv.c =================================================================== --- head/lib/msun/i387/fenv.c (revision 334444) +++ head/lib/msun/i387/fenv.c (revision 334445) @@ -1,230 +1,230 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2004-2005 David Schultz * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #include #include #include #define __fenv_static #include "fenv.h" #ifdef __GNUC_GNU_INLINE__ #error "This file must be compiled with C99 'inline' semantics" #endif const fenv_t __fe_dfl_env = { __INITIAL_NPXCW__, 0x0000, 0x0000, 0x1f80, 0xffffffff, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff } }; enum __sse_support __has_sse = #ifdef __SSE__ __SSE_YES; #else __SSE_UNK; #endif #define getfl(x) __asm __volatile("pushfl\n\tpopl %0" : "=mr" (*(x))) #define setfl(x) __asm __volatile("pushl %0\n\tpopfl" : : "g" (x)) #define cpuid_dx(x) __asm __volatile("pushl %%ebx\n\tmovl $1, %%eax\n\t" \ "cpuid\n\tpopl %%ebx" \ : "=d" (*(x)) : : "eax", "ecx") /* * Test for SSE support on this processor. We need to do this because * we need to use ldmxcsr/stmxcsr to get correct results if any part * of the program was compiled to use SSE floating-point, but we can't * use SSE on older processors. */ int __test_sse(void) { int flag, nflag; int dx_features; /* Am I a 486? */ getfl(&flag); nflag = flag ^ 0x200000; setfl(nflag); getfl(&nflag); if (flag != nflag) { /* Not a 486, so CPUID should work. */ cpuid_dx(&dx_features); if (dx_features & 0x2000000) { __has_sse = __SSE_YES; return (1); } } __has_sse = __SSE_NO; return (0); } extern inline int feclearexcept(int __excepts); extern inline int fegetexceptflag(fexcept_t *__flagp, int __excepts); int fesetexceptflag(const fexcept_t *flagp, int excepts) { fenv_t env; __uint32_t mxcsr; __fnstenv(&env); env.__status &= ~excepts; env.__status |= *flagp & excepts; - __fldenv(env); + __fldenv(&env); if (__HAS_SSE()) { __stmxcsr(&mxcsr); mxcsr &= ~excepts; mxcsr |= *flagp & excepts; - __ldmxcsr(mxcsr); + __ldmxcsr(&mxcsr); } return (0); } int feraiseexcept(int excepts) { fexcept_t ex = excepts; fesetexceptflag(&ex, excepts); __fwait(); return (0); } extern inline int fetestexcept(int __excepts); extern inline int fegetround(void); extern inline int fesetround(int __round); int fegetenv(fenv_t *envp) { __uint32_t mxcsr; __fnstenv(envp); /* * fnstenv masks all exceptions, so we need to restore * the old control word to avoid this side effect. */ - __fldcw(envp->__control); + __fldcw(&envp->__control); if (__HAS_SSE()) { __stmxcsr(&mxcsr); __set_mxcsr(*envp, mxcsr); } return (0); } int feholdexcept(fenv_t *envp) { __uint32_t mxcsr; __fnstenv(envp); __fnclex(); if (__HAS_SSE()) { __stmxcsr(&mxcsr); __set_mxcsr(*envp, mxcsr); mxcsr &= ~FE_ALL_EXCEPT; mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT; - __ldmxcsr(mxcsr); + __ldmxcsr(&mxcsr); } return (0); } extern inline int fesetenv(const fenv_t *__envp); int feupdateenv(const fenv_t *envp) { __uint32_t mxcsr; __uint16_t status; __fnstsw(&status); if (__HAS_SSE()) __stmxcsr(&mxcsr); else mxcsr = 0; fesetenv(envp); feraiseexcept((mxcsr | status) & FE_ALL_EXCEPT); return (0); } int __feenableexcept(int mask) { __uint32_t mxcsr, omask; __uint16_t control; mask &= FE_ALL_EXCEPT; __fnstcw(&control); if (__HAS_SSE()) __stmxcsr(&mxcsr); else mxcsr = 0; omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT; control &= ~mask; - __fldcw(control); + __fldcw(&control); if (__HAS_SSE()) { mxcsr &= ~(mask << _SSE_EMASK_SHIFT); - __ldmxcsr(mxcsr); + __ldmxcsr(&mxcsr); } return (omask); } int __fedisableexcept(int mask) { __uint32_t mxcsr, omask; __uint16_t control; mask &= FE_ALL_EXCEPT; __fnstcw(&control); if (__HAS_SSE()) __stmxcsr(&mxcsr); else mxcsr = 0; omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT; control |= mask; - __fldcw(control); + __fldcw(&control); if (__HAS_SSE()) { mxcsr |= mask << _SSE_EMASK_SHIFT; - __ldmxcsr(mxcsr); + __ldmxcsr(&mxcsr); } return (omask); } __weak_reference(__feenableexcept, feenableexcept); __weak_reference(__fedisableexcept, fedisableexcept); Index: head/lib/msun/tests/Makefile =================================================================== --- head/lib/msun/tests/Makefile (revision 334444) +++ head/lib/msun/tests/Makefile (revision 334445) @@ -1,108 +1,104 @@ # $FreeBSD$ .include TESTSRC= ${SRCTOP}/contrib/netbsd-tests/lib/libm # All architectures on FreeBSD have fenv.h CFLAGS+= -DHAVE_FENV_H # For isqemu.h CFLAGS+= -I${TESTSRC:H}/libc/gen # Not sure why this isn't defined for all architectures, since most # have long double. .if ${MACHINE_CPUARCH} == "aarch64" || \ ${MACHINE_CPUARCH} == "amd64" || \ ${MACHINE_CPUARCH} == "i386" CFLAGS+= -D__HAVE_LONG_DOUBLE .endif NETBSD_ATF_TESTS_C= acos_test NETBSD_ATF_TESTS_C+= asin_test NETBSD_ATF_TESTS_C+= atan_test NETBSD_ATF_TESTS_C+= cbrt_test NETBSD_ATF_TESTS_C+= ceil_test NETBSD_ATF_TESTS_C+= casinh_test NETBSD_ATF_TESTS_C+= cos_test NETBSD_ATF_TESTS_C+= cosh_test NETBSD_ATF_TESTS_C+= erf_test NETBSD_ATF_TESTS_C+= exp_test NETBSD_ATF_TESTS_C+= fmod_test NETBSD_ATF_TESTS_C+= fe_round_test NETBSD_ATF_TESTS_C+= infinity_test NETBSD_ATF_TESTS_C+= ilogb_test NETBSD_ATF_TESTS_C+= ldexp_test NETBSD_ATF_TESTS_C+= log_test NETBSD_ATF_TESTS_C+= pow_test NETBSD_ATF_TESTS_C+= precision_test NETBSD_ATF_TESTS_C+= round_test NETBSD_ATF_TESTS_C+= scalbn_test NETBSD_ATF_TESTS_C+= sin_test NETBSD_ATF_TESTS_C+= sinh_test NETBSD_ATF_TESTS_C+= sqrt_test NETBSD_ATF_TESTS_C+= tan_test NETBSD_ATF_TESTS_C+= tanh_test TAP_TESTS_C+= cexp_test TAP_TESTS_C+= conj_test .if ${MACHINE_CPUARCH} != "aarch64" # Hits an assert in llvm when building for arm64: # https://llvm.org/bugs/show_bug.cgi?id=26081 TAP_TESTS_C+= csqrt_test .endif ATF_TESTS_C+= ctrig_test TAP_TESTS_C+= exponential_test TAP_TESTS_C+= fenv_test TAP_TESTS_C+= fma_test TAP_TESTS_C+= fmaxmin_test TAP_TESTS_C+= ilogb2_test TAP_TESTS_C+= invtrig_test TAP_TESTS_C+= invctrig_test TAP_TESTS_C+= logarithm_test TAP_TESTS_C+= lrint_test # XXX: the testcase crashes on all platforms, but only on head # (bug 205451) #TAP_TESTS_C+= lround_test TAP_TESTS_C+= nan_test TAP_TESTS_C+= nearbyint_test TAP_TESTS_C+= next_test TAP_TESTS_C+= rem_test ATF_TESTS_C+= trig_test .if !empty(PROG) && !empty(TAP_TESTS_C:M${PROG}) CFLAGS+= -O0 .endif CSTD= c99 #COPTS+= -Wfloat-equal IGNORE_PRAGMA= SRCS.ilogb2_test= ilogb_test.c LIBADD+= m -.if ${MACHINE_CPUARCH} == "i386" -# XXX: __fldcw macro mismatch between fenv.h and ieeefp.h . -CWARNFLAGS.clang+= -Wno-error=macro-redefined -.endif WARNS?= 1 # Copied from lib/msun/Makefile .if ${MACHINE_CPUARCH} == "i386" ARCH_SUBDIR= i387 .else ARCH_SUBDIR= ${MACHINE_CPUARCH} .endif .include "../${ARCH_SUBDIR}/Makefile.inc" # XXX: for some odd reason float.h doesn't tell the full story about what the # precision is. CFLAGS+= -DLDBL_PREC=${LDBL_PREC} .include .include Index: head/lib/msun/x86/fenv.h =================================================================== --- head/lib/msun/x86/fenv.h (revision 334444) +++ head/lib/msun/x86/fenv.h (revision 334445) @@ -1,357 +1,350 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2004-2005 David Schultz * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #ifndef _FENV_H_ #define _FENV_H_ #include #include +#include #ifndef __fenv_static #define __fenv_static static #endif typedef __uint16_t fexcept_t; /* Exception flags */ #define FE_INVALID 0x01 #define FE_DENORMAL 0x02 #define FE_DIVBYZERO 0x04 #define FE_OVERFLOW 0x08 #define FE_UNDERFLOW 0x10 #define FE_INEXACT 0x20 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \ FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW) /* Rounding modes */ #define FE_TONEAREST 0x0000 #define FE_DOWNWARD 0x0400 #define FE_UPWARD 0x0800 #define FE_TOWARDZERO 0x0c00 #define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \ FE_UPWARD | FE_TOWARDZERO) /* * As compared to the x87 control word, the SSE unit's control word * has the rounding control bits offset by 3 and the exception mask * bits offset by 7. */ #define _SSE_ROUND_SHIFT 3 #define _SSE_EMASK_SHIFT 7 #ifdef __i386__ /* * To preserve binary compatibility with FreeBSD 5.3, we pack the * mxcsr into some reserved fields, rather than changing sizeof(fenv_t). */ typedef struct { __uint16_t __control; __uint16_t __mxcsr_hi; __uint16_t __status; __uint16_t __mxcsr_lo; __uint32_t __tag; char __other[16]; } fenv_t; #else /* __amd64__ */ typedef struct { struct { __uint32_t __control; __uint32_t __status; __uint32_t __tag; char __other[16]; } __x87; __uint32_t __mxcsr; } fenv_t; #endif /* __i386__ */ __BEGIN_DECLS /* Default floating-point environment */ extern const fenv_t __fe_dfl_env; #define FE_DFL_ENV (&__fe_dfl_env) -#define __fldcw(__cw) __asm __volatile("fldcw %0" : : "m" (__cw)) -#define __fldenv(__env) __asm __volatile("fldenv %0" : : "m" (__env)) #define __fldenvx(__env) __asm __volatile("fldenv %0" : : "m" (__env) \ : "st", "st(1)", "st(2)", "st(3)", "st(4)", \ "st(5)", "st(6)", "st(7)") -#define __fnclex() __asm __volatile("fnclex") -#define __fnstenv(__env) __asm __volatile("fnstenv %0" : "=m" (*(__env))) -#define __fnstcw(__cw) __asm __volatile("fnstcw %0" : "=m" (*(__cw))) -#define __fnstsw(__sw) __asm __volatile("fnstsw %0" : "=am" (*(__sw))) #define __fwait() __asm __volatile("fwait") -#define __ldmxcsr(__csr) __asm __volatile("ldmxcsr %0" : : "m" (__csr)) -#define __stmxcsr(__csr) __asm __volatile("stmxcsr %0" : "=m" (*(__csr))) int fegetenv(fenv_t *__envp); int feholdexcept(fenv_t *__envp); int fesetexceptflag(const fexcept_t *__flagp, int __excepts); int feraiseexcept(int __excepts); int feupdateenv(const fenv_t *__envp); __fenv_static inline int fegetround(void) { __uint16_t __control; /* * We assume that the x87 and the SSE unit agree on the * rounding mode. Reading the control word on the x87 turns * out to be about 5 times faster than reading it on the SSE * unit on an Opteron 244. */ __fnstcw(&__control); return (__control & _ROUND_MASK); } #if __BSD_VISIBLE int feenableexcept(int __mask); int fedisableexcept(int __mask); /* We currently provide no external definition of fegetexcept(). */ static inline int fegetexcept(void) { __uint16_t __control; /* * We assume that the masks for the x87 and the SSE unit are * the same. */ __fnstcw(&__control); return (~__control & FE_ALL_EXCEPT); } #endif /* __BSD_VISIBLE */ #ifdef __i386__ /* After testing for SSE support once, we cache the result in __has_sse. */ enum __sse_support { __SSE_YES, __SSE_NO, __SSE_UNK }; extern enum __sse_support __has_sse; int __test_sse(void); #ifdef __SSE__ #define __HAS_SSE() 1 #else #define __HAS_SSE() (__has_sse == __SSE_YES || \ (__has_sse == __SSE_UNK && __test_sse())) #endif #define __get_mxcsr(env) (((env).__mxcsr_hi << 16) | \ ((env).__mxcsr_lo)) #define __set_mxcsr(env, x) do { \ (env).__mxcsr_hi = (__uint32_t)(x) >> 16; \ (env).__mxcsr_lo = (__uint16_t)(x); \ } while (0) __fenv_static inline int feclearexcept(int __excepts) { fenv_t __env; __uint32_t __mxcsr; if (__excepts == FE_ALL_EXCEPT) { __fnclex(); } else { __fnstenv(&__env); __env.__status &= ~__excepts; - __fldenv(__env); + __fldenv(&__env); } if (__HAS_SSE()) { __stmxcsr(&__mxcsr); __mxcsr &= ~__excepts; - __ldmxcsr(__mxcsr); + __ldmxcsr(&__mxcsr); } return (0); } __fenv_static inline int fegetexceptflag(fexcept_t *__flagp, int __excepts) { __uint32_t __mxcsr; __uint16_t __status; __fnstsw(&__status); if (__HAS_SSE()) __stmxcsr(&__mxcsr); else __mxcsr = 0; *__flagp = (__mxcsr | __status) & __excepts; return (0); } __fenv_static inline int fetestexcept(int __excepts) { __uint32_t __mxcsr; __uint16_t __status; __fnstsw(&__status); if (__HAS_SSE()) __stmxcsr(&__mxcsr); else __mxcsr = 0; return ((__status | __mxcsr) & __excepts); } __fenv_static inline int fesetround(int __round) { __uint32_t __mxcsr; __uint16_t __control; if (__round & ~_ROUND_MASK) return (-1); __fnstcw(&__control); __control &= ~_ROUND_MASK; __control |= __round; - __fldcw(__control); + __fldcw(&__control); if (__HAS_SSE()) { __stmxcsr(&__mxcsr); __mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT); __mxcsr |= __round << _SSE_ROUND_SHIFT; - __ldmxcsr(__mxcsr); + __ldmxcsr(&__mxcsr); } return (0); } __fenv_static inline int fesetenv(const fenv_t *__envp) { fenv_t __env = *__envp; __uint32_t __mxcsr; __mxcsr = __get_mxcsr(__env); __set_mxcsr(__env, 0xffffffff); /* * XXX Using fldenvx() instead of fldenv() tells the compiler that this * instruction clobbers the i387 register stack. This happens because * we restore the tag word from the saved environment. Normally, this * would happen anyway and we wouldn't care, because the ABI allows * function calls to clobber the i387 regs. However, fesetenv() is * inlined, so we need to be more careful. */ __fldenvx(__env); if (__HAS_SSE()) - __ldmxcsr(__mxcsr); + __ldmxcsr(&__mxcsr); return (0); } #else /* __amd64__ */ __fenv_static inline int feclearexcept(int __excepts) { fenv_t __env; if (__excepts == FE_ALL_EXCEPT) { __fnclex(); } else { __fnstenv(&__env.__x87); __env.__x87.__status &= ~__excepts; - __fldenv(__env.__x87); + __fldenv(&__env.__x87); } __stmxcsr(&__env.__mxcsr); __env.__mxcsr &= ~__excepts; - __ldmxcsr(__env.__mxcsr); + __ldmxcsr(&__env.__mxcsr); return (0); } __fenv_static inline int fegetexceptflag(fexcept_t *__flagp, int __excepts) { __uint32_t __mxcsr; __uint16_t __status; __stmxcsr(&__mxcsr); __fnstsw(&__status); *__flagp = (__mxcsr | __status) & __excepts; return (0); } __fenv_static inline int fetestexcept(int __excepts) { __uint32_t __mxcsr; __uint16_t __status; __stmxcsr(&__mxcsr); __fnstsw(&__status); return ((__status | __mxcsr) & __excepts); } __fenv_static inline int fesetround(int __round) { __uint32_t __mxcsr; __uint16_t __control; if (__round & ~_ROUND_MASK) return (-1); __fnstcw(&__control); __control &= ~_ROUND_MASK; __control |= __round; - __fldcw(__control); + __fldcw(&__control); __stmxcsr(&__mxcsr); __mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT); __mxcsr |= __round << _SSE_ROUND_SHIFT; - __ldmxcsr(__mxcsr); + __ldmxcsr(&__mxcsr); return (0); } __fenv_static inline int fesetenv(const fenv_t *__envp) { /* * XXX Using fldenvx() instead of fldenv() tells the compiler that this * instruction clobbers the i387 register stack. This happens because * we restore the tag word from the saved environment. Normally, this * would happen anyway and we wouldn't care, because the ABI allows * function calls to clobber the i387 regs. However, fesetenv() is * inlined, so we need to be more careful. */ __fldenvx(__envp->__x87); - __ldmxcsr(__envp->__mxcsr); + __ldmxcsr(&__envp->__mxcsr); return (0); } #endif /* __i386__ */ __END_DECLS #endif /* !_FENV_H_ */ Index: head/sys/amd64/include/ieeefp.h =================================================================== --- head/sys/amd64/include/ieeefp.h (revision 334444) +++ head/sys/amd64/include/ieeefp.h (revision 334445) @@ -1,310 +1,311 @@ /*- * SPDX-License-Identifier: BSD-4-Clause * * Copyright (c) 2003 Peter Wemm. * Copyright (c) 1990 Andrew Moore, Talke Studio * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by the University of * California, Berkeley and its contributors. * 4. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * from: @(#) ieeefp.h 1.0 (Berkeley) 9/23/93 * $FreeBSD$ */ #ifndef _MACHINE_IEEEFP_H_ #define _MACHINE_IEEEFP_H_ /* * Deprecated historical FPU control interface * * IEEE floating point type, constant and function definitions. * XXX: {FP,SSE}*FLD and {FP,SSE}*OFF are undocumented pollution. */ #ifndef _SYS_CDEFS_H_ #error this file needs sys/cdefs.h as a prerequisite #endif /* * Rounding modes. */ typedef enum { FP_RN=0, /* round to nearest */ FP_RM, /* round down towards minus infinity */ FP_RP, /* round up towards plus infinity */ FP_RZ /* truncate */ } fp_rnd_t; /* * Precision (i.e., rounding precision) modes. */ typedef enum { FP_PS=0, /* 24 bit (single-precision) */ FP_PRS, /* reserved */ FP_PD, /* 53 bit (double-precision) */ FP_PE /* 64 bit (extended-precision) */ } fp_prec_t; #define fp_except_t int /* * Exception bit masks. */ #define FP_X_INV 0x01 /* invalid operation */ #define FP_X_DNML 0x02 /* denormal */ #define FP_X_DZ 0x04 /* zero divide */ #define FP_X_OFL 0x08 /* overflow */ #define FP_X_UFL 0x10 /* underflow */ #define FP_X_IMP 0x20 /* (im)precision */ #define FP_X_STK 0x40 /* stack fault */ /* * FPU control word bit-field masks. */ #define FP_MSKS_FLD 0x3f /* exception masks field */ #define FP_PRC_FLD 0x300 /* precision control field */ #define FP_RND_FLD 0xc00 /* rounding control field */ /* * FPU status word bit-field masks. */ #define FP_STKY_FLD 0x3f /* sticky flags field */ /* * SSE mxcsr register bit-field masks. */ #define SSE_STKY_FLD 0x3f /* exception flags */ #define SSE_DAZ_FLD 0x40 /* Denormals are zero */ #define SSE_MSKS_FLD 0x1f80 /* exception masks field */ #define SSE_RND_FLD 0x6000 /* rounding control */ #define SSE_FZ_FLD 0x8000 /* flush to zero on underflow */ /* * FPU control word bit-field offsets (shift counts). */ #define FP_MSKS_OFF 0 /* exception masks offset */ #define FP_PRC_OFF 8 /* precision control offset */ #define FP_RND_OFF 10 /* rounding control offset */ /* * FPU status word bit-field offsets (shift counts). */ #define FP_STKY_OFF 0 /* sticky flags offset */ /* * SSE mxcsr register bit-field offsets (shift counts). */ #define SSE_STKY_OFF 0 /* exception flags offset */ #define SSE_DAZ_OFF 6 /* DAZ exception mask offset */ #define SSE_MSKS_OFF 7 /* other exception masks offset */ #define SSE_RND_OFF 13 /* rounding control offset */ #define SSE_FZ_OFF 15 /* flush to zero offset */ #ifdef __GNUCLIKE_ASM #define __fldcw(addr) __asm __volatile("fldcw %0" : : "m" (*(addr))) #define __fldenv(addr) __asm __volatile("fldenv %0" : : "m" (*(addr))) +#define __fnclex() __asm __volatile("fnclex") #define __fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr))) #define __fnstenv(addr) __asm __volatile("fnstenv %0" : "=m" (*(addr))) #define __fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr))) #define __ldmxcsr(addr) __asm __volatile("ldmxcsr %0" : : "m" (*(addr))) #define __stmxcsr(addr) __asm __volatile("stmxcsr %0" : "=m" (*(addr))) /* * Load the control word. Be careful not to trap if there is a currently * unmasked exception (ones that will become freshly unmasked are not a * problem). This case must be handled by a save/restore of the * environment or even of the full x87 state. Accessing the environment * is very inefficient, so only do it when necessary. */ static __inline void __fnldcw(unsigned short _cw, unsigned short _newcw) { struct { unsigned _cw; unsigned _other[6]; } _env; unsigned short _sw; if ((_cw & FP_MSKS_FLD) != FP_MSKS_FLD) { __fnstsw(&_sw); if (((_sw & ~_cw) & FP_STKY_FLD) != 0) { __fnstenv(&_env); _env._cw = _newcw; __fldenv(&_env); return; } } __fldcw(&_newcw); } /* * General notes about conflicting SSE vs FP status bits. * This code assumes that software will not fiddle with the control * bits of the SSE and x87 in such a way to get them out of sync and * still expect this to work. Break this at your peril. * Because I based this on the i386 port, the x87 state is used for * the fpget*() functions, and is shadowed into the SSE state for * the fpset*() functions. For dual source fpget*() functions, I * merge the two together. I think. */ static __inline fp_rnd_t __fpgetround(void) { unsigned short _cw; __fnstcw(&_cw); return ((fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF)); } static __inline fp_rnd_t __fpsetround(fp_rnd_t _m) { fp_rnd_t _p; unsigned _mxcsr; unsigned short _cw, _newcw; __fnstcw(&_cw); _p = (fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF); _newcw = _cw & ~FP_RND_FLD; _newcw |= (_m << FP_RND_OFF) & FP_RND_FLD; __fnldcw(_cw, _newcw); __stmxcsr(&_mxcsr); _mxcsr &= ~SSE_RND_FLD; _mxcsr |= (_m << SSE_RND_OFF) & SSE_RND_FLD; __ldmxcsr(&_mxcsr); return (_p); } /* * Get or set the rounding precision for x87 arithmetic operations. * There is no equivalent SSE mode or control. */ static __inline fp_prec_t __fpgetprec(void) { unsigned short _cw; __fnstcw(&_cw); return ((fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF)); } static __inline fp_prec_t __fpsetprec(fp_prec_t _m) { fp_prec_t _p; unsigned short _cw, _newcw; __fnstcw(&_cw); _p = (fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF); _newcw = _cw & ~FP_PRC_FLD; _newcw |= (_m << FP_PRC_OFF) & FP_PRC_FLD; __fnldcw(_cw, _newcw); return (_p); } /* * Get or set the exception mask. * Note that the x87 mask bits are inverted by the API -- a mask bit of 1 * means disable for x87 and SSE, but for fp*mask() it means enable. */ static __inline fp_except_t __fpgetmask(void) { unsigned short _cw; __fnstcw(&_cw); return ((~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF); } static __inline fp_except_t __fpsetmask(fp_except_t _m) { fp_except_t _p; unsigned _mxcsr; unsigned short _cw, _newcw; __fnstcw(&_cw); _p = (~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF; _newcw = _cw & ~FP_MSKS_FLD; _newcw |= (~_m << FP_MSKS_OFF) & FP_MSKS_FLD; __fnldcw(_cw, _newcw); __stmxcsr(&_mxcsr); /* XXX should we clear non-ieee SSE_DAZ_FLD and SSE_FZ_FLD ? */ _mxcsr &= ~SSE_MSKS_FLD; _mxcsr |= (~_m << SSE_MSKS_OFF) & SSE_MSKS_FLD; __ldmxcsr(&_mxcsr); return (_p); } static __inline fp_except_t __fpgetsticky(void) { unsigned _ex, _mxcsr; unsigned short _sw; __fnstsw(&_sw); _ex = (_sw & FP_STKY_FLD) >> FP_STKY_OFF; __stmxcsr(&_mxcsr); _ex |= (_mxcsr & SSE_STKY_FLD) >> SSE_STKY_OFF; return ((fp_except_t)_ex); } #endif /* __GNUCLIKE_ASM */ #if !defined(__IEEEFP_NOINLINES__) && defined(__GNUCLIKE_ASM) #define fpgetmask() __fpgetmask() #define fpgetprec() __fpgetprec() #define fpgetround() __fpgetround() #define fpgetsticky() __fpgetsticky() #define fpsetmask(m) __fpsetmask(m) #define fpsetprec(m) __fpsetprec(m) #define fpsetround(m) __fpsetround(m) #else /* !(!__IEEEFP_NOINLINES__ && __GNUCLIKE_ASM) */ /* Augment the userland declarations. */ __BEGIN_DECLS extern fp_rnd_t fpgetround(void); extern fp_rnd_t fpsetround(fp_rnd_t); extern fp_except_t fpgetmask(void); extern fp_except_t fpsetmask(fp_except_t); extern fp_except_t fpgetsticky(void); extern fp_except_t fpsetsticky(fp_except_t); fp_prec_t fpgetprec(void); fp_prec_t fpsetprec(fp_prec_t); __END_DECLS #endif /* !__IEEEFP_NOINLINES__ && __GNUCLIKE_ASM */ #endif /* !_MACHINE_IEEEFP_H_ */ Index: head/sys/i386/include/ieeefp.h =================================================================== --- head/sys/i386/include/ieeefp.h (revision 334444) +++ head/sys/i386/include/ieeefp.h (revision 334445) @@ -1,260 +1,262 @@ /*- * SPDX-License-Identifier: BSD-4-Clause * * Copyright (c) 2003 Peter Wemm. * Copyright (c) 1990 Andrew Moore, Talke Studio * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by the University of * California, Berkeley and its contributors. * 4. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * from: @(#) ieeefp.h 1.0 (Berkeley) 9/23/93 * $FreeBSD$ */ #ifndef _MACHINE_IEEEFP_H_ #define _MACHINE_IEEEFP_H_ /* * Deprecated historical FPU control interface * * IEEE floating point type, constant and function definitions. * XXX: FP*FLD and FP*OFF are undocumented pollution. */ #ifndef _SYS_CDEFS_H_ #error this file needs sys/cdefs.h as a prerequisite #endif /* * Rounding modes. */ typedef enum { FP_RN=0, /* round to nearest */ FP_RM, /* round down towards minus infinity */ FP_RP, /* round up towards plus infinity */ FP_RZ /* truncate */ } fp_rnd_t; /* * Precision (i.e., rounding precision) modes. */ typedef enum { FP_PS=0, /* 24 bit (single-precision) */ FP_PRS, /* reserved */ FP_PD, /* 53 bit (double-precision) */ FP_PE /* 64 bit (extended-precision) */ } fp_prec_t; #define fp_except_t int /* * Exception bit masks. */ #define FP_X_INV 0x01 /* invalid operation */ #define FP_X_DNML 0x02 /* denormal */ #define FP_X_DZ 0x04 /* zero divide */ #define FP_X_OFL 0x08 /* overflow */ #define FP_X_UFL 0x10 /* underflow */ #define FP_X_IMP 0x20 /* (im)precision */ #define FP_X_STK 0x40 /* stack fault */ /* * FPU control word bit-field masks. */ #define FP_MSKS_FLD 0x3f /* exception masks field */ #define FP_PRC_FLD 0x300 /* precision control field */ #define FP_RND_FLD 0xc00 /* rounding control field */ /* * FPU status word bit-field masks. */ #define FP_STKY_FLD 0x3f /* sticky flags field */ /* * FPU control word bit-field offsets (shift counts). */ #define FP_MSKS_OFF 0 /* exception masks offset */ #define FP_PRC_OFF 8 /* precision control offset */ #define FP_RND_OFF 10 /* rounding control offset */ /* * FPU status word bit-field offsets (shift counts). */ #define FP_STKY_OFF 0 /* sticky flags offset */ #ifdef __GNUCLIKE_ASM #define __fldcw(addr) __asm __volatile("fldcw %0" : : "m" (*(addr))) #define __fldenv(addr) __asm __volatile("fldenv %0" : : "m" (*(addr))) #define __fnclex() __asm __volatile("fnclex") #define __fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr))) #define __fnstenv(addr) __asm __volatile("fnstenv %0" : "=m" (*(addr))) #define __fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr))) +#define __ldmxcsr(addr) __asm __volatile("ldmxcsr %0" : : "m" (*(addr))) +#define __stmxcsr(addr) __asm __volatile("stmxcsr %0" : "=m" (*(addr))) /* * Load the control word. Be careful not to trap if there is a currently * unmasked exception (ones that will become freshly unmasked are not a * problem). This case must be handled by a save/restore of the * environment or even of the full x87 state. Accessing the environment * is very inefficient, so only do it when necessary. */ static __inline void __fnldcw(unsigned short _cw, unsigned short _newcw) { struct { unsigned _cw; unsigned _other[6]; } _env; unsigned short _sw; if ((_cw & FP_MSKS_FLD) != FP_MSKS_FLD) { __fnstsw(&_sw); if (((_sw & ~_cw) & FP_STKY_FLD) != 0) { __fnstenv(&_env); _env._cw = _newcw; __fldenv(&_env); return; } } __fldcw(&_newcw); } static __inline fp_rnd_t fpgetround(void) { unsigned short _cw; __fnstcw(&_cw); return ((fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF)); } static __inline fp_rnd_t fpsetround(fp_rnd_t _m) { fp_rnd_t _p; unsigned short _cw, _newcw; __fnstcw(&_cw); _p = (fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF); _newcw = _cw & ~FP_RND_FLD; _newcw |= (_m << FP_RND_OFF) & FP_RND_FLD; __fnldcw(_cw, _newcw); return (_p); } static __inline fp_prec_t fpgetprec(void) { unsigned short _cw; __fnstcw(&_cw); return ((fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF)); } static __inline fp_prec_t fpsetprec(fp_prec_t _m) { fp_prec_t _p; unsigned short _cw, _newcw; __fnstcw(&_cw); _p = (fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF); _newcw = _cw & ~FP_PRC_FLD; _newcw |= (_m << FP_PRC_OFF) & FP_PRC_FLD; __fnldcw(_cw, _newcw); return (_p); } /* * Get or set the exception mask. * Note that the x87 mask bits are inverted by the API -- a mask bit of 1 * means disable for x87 and SSE, but for fp*mask() it means enable. */ static __inline fp_except_t fpgetmask(void) { unsigned short _cw; __fnstcw(&_cw); return ((~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF); } static __inline fp_except_t fpsetmask(fp_except_t _m) { fp_except_t _p; unsigned short _cw, _newcw; __fnstcw(&_cw); _p = (~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF; _newcw = _cw & ~FP_MSKS_FLD; _newcw |= (~_m << FP_MSKS_OFF) & FP_MSKS_FLD; __fnldcw(_cw, _newcw); return (_p); } static __inline fp_except_t fpgetsticky(void) { unsigned _ex; unsigned short _sw; __fnstsw(&_sw); _ex = (_sw & FP_STKY_FLD) >> FP_STKY_OFF; return ((fp_except_t)_ex); } static __inline fp_except_t fpresetsticky(fp_except_t _m) { struct { unsigned _cw; unsigned _sw; unsigned _other[5]; } _env; fp_except_t _p; _m &= FP_STKY_FLD >> FP_STKY_OFF; _p = fpgetsticky(); if ((_p & ~_m) == _p) return (_p); if ((_p & ~_m) == 0) { __fnclex(); return (_p); } __fnstenv(&_env); _env._sw &= ~_m; __fldenv(&_env); return (_p); } #endif /* __GNUCLIKE_ASM */ #endif /* !_MACHINE_IEEEFP_H_ */