Index: stable/11/sbin/ifconfig/sfp.c =================================================================== --- stable/11/sbin/ifconfig/sfp.c (revision 333335) +++ stable/11/sbin/ifconfig/sfp.c (revision 333336) @@ -1,916 +1,929 @@ /*- * Copyright (c) 2014 Alexander V. Chernikov. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #ifndef lint static const char rcsid[] = "$FreeBSD$"; #endif /* not lint */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "ifconfig.h" struct i2c_info { int fd; /* fd to issue SIOCGI2C */ int error; /* Store first error */ int qsfp; /* True if transceiver is QSFP */ int do_diag; /* True if we need to request DDM */ struct ifreq *ifr; /* Pointer to pre-filled ifreq */ }; static int read_i2c(struct i2c_info *ii, uint8_t addr, uint8_t off, uint8_t len, uint8_t *buf); static void dump_i2c_data(struct i2c_info *ii, uint8_t addr, uint8_t off, uint8_t len); struct _nv { int v; const char *n; }; const char *find_value(struct _nv *x, int value); const char *find_zero_bit(struct _nv *x, int value, int sz); -/* SFF-8472 Rev. 11.4 table 3.4: Connector values */ +/* SFF-8024 Rev. 4.1 Table 4-3: Connector Types */ static struct _nv conn[] = { { 0x00, "Unknown" }, { 0x01, "SC" }, { 0x02, "Fibre Channel Style 1 copper" }, { 0x03, "Fibre Channel Style 2 copper" }, { 0x04, "BNC/TNC" }, { 0x05, "Fibre Channel coaxial" }, { 0x06, "FiberJack" }, { 0x07, "LC" }, { 0x08, "MT-RJ" }, { 0x09, "MU" }, { 0x0A, "SG" }, { 0x0B, "Optical pigtail" }, { 0x0C, "MPO Parallel Optic" }, { 0x20, "HSSDC II" }, { 0x21, "Copper pigtail" }, { 0x22, "RJ45" }, - { 0x23, "No separate connector" }, /* SFF-8436 */ + { 0x23, "No separable connector" }, + { 0x24, "MXC 2x16" }, { 0, NULL } }; /* SFF-8472 Rev. 11.4 table 3.5: Transceiver codes */ /* 10G Ethernet/IB compliance codes, byte 3 */ static struct _nv eth_10g[] = { { 0x80, "10G Base-ER" }, { 0x40, "10G Base-LRM" }, { 0x20, "10G Base-LR" }, { 0x10, "10G Base-SR" }, { 0x08, "1X SX" }, { 0x04, "1X LX" }, { 0x02, "1X Copper Active" }, { 0x01, "1X Copper Passive" }, { 0, NULL } }; /* Ethernet compliance codes, byte 6 */ static struct _nv eth_compat[] = { { 0x80, "BASE-PX" }, { 0x40, "BASE-BX10" }, { 0x20, "100BASE-FX" }, { 0x10, "100BASE-LX/LX10" }, { 0x08, "1000BASE-T" }, { 0x04, "1000BASE-CX" }, { 0x02, "1000BASE-LX" }, { 0x01, "1000BASE-SX" }, { 0, NULL } }; /* FC link length, byte 7 */ static struct _nv fc_len[] = { { 0x80, "very long distance" }, { 0x40, "short distance" }, { 0x20, "intermediate distance" }, { 0x10, "long distance" }, { 0x08, "medium distance" }, { 0, NULL } }; /* Channel/Cable technology, byte 7-8 */ static struct _nv cab_tech[] = { { 0x0400, "Shortwave laser (SA)" }, { 0x0200, "Longwave laser (LC)" }, { 0x0100, "Electrical inter-enclosure (EL)" }, { 0x80, "Electrical intra-enclosure (EL)" }, { 0x40, "Shortwave laser (SN)" }, { 0x20, "Shortwave laser (SL)" }, { 0x10, "Longwave laser (LL)" }, { 0x08, "Active Cable" }, { 0x04, "Passive Cable" }, { 0, NULL } }; /* FC Transmission media, byte 9 */ static struct _nv fc_media[] = { { 0x80, "Twin Axial Pair" }, { 0x40, "Twisted Pair" }, { 0x20, "Miniature Coax" }, { 0x10, "Viao Coax" }, { 0x08, "Miltimode, 62.5um" }, { 0x04, "Multimode, 50um" }, { 0x02, "" }, { 0x01, "Single Mode" }, { 0, NULL } }; /* FC Speed, byte 10 */ static struct _nv fc_speed[] = { { 0x80, "1200 MBytes/sec" }, { 0x40, "800 MBytes/sec" }, { 0x20, "1600 MBytes/sec" }, { 0x10, "400 MBytes/sec" }, { 0x08, "3200 MBytes/sec" }, { 0x04, "200 MBytes/sec" }, { 0x01, "100 MBytes/sec" }, { 0, NULL } }; /* SFF-8436 Rev. 4.8 table 33: Specification compliance */ /* 10/40G Ethernet compliance codes, byte 128 + 3 */ static struct _nv eth_1040g[] = { { 0x80, "Extended" }, { 0x40, "10GBASE-LRM" }, { 0x20, "10GBASE-LR" }, { 0x10, "10GBASE-SR" }, { 0x08, "40GBASE-CR4" }, { 0x04, "40GBASE-SR4" }, { 0x02, "40GBASE-LR4" }, { 0x01, "40G Active Cable" }, { 0, NULL } }; #define SFF_8636_EXT_COMPLIANCE 0x80 -/* SFF-8024 Rev. 3.4 table 4.4: Extended Specification Compliance */ +/* SFF-8024 Rev. 4.2 table 4-4: Extended Specification Compliance */ static struct _nv eth_extended_comp[] = { { 0xFF, "Reserved" }, - { 0x1A, "2 lambda DWDM 100G" }, + { 0x21, "100G PAM4 BiDi" }, + { 0x20, "100G SWDM4" }, + { 0x1F, "40G SWDM4" }, + { 0x1E, "2.5GBASE-T" }, + { 0x1D, "5GBASE-T" }, + { 0x1C, "10GBASE-T Short Reach" }, + { 0x1B, "100G 1550nm WDM" }, + { 0x1A, "100GE-DWDM2" }, { 0x19, "100G ACC or 25GAUI C2M ACC" }, { 0x18, "100G AOC or 25GAUI C2M AOC" }, { 0x17, "100G CLR4" }, { 0x16, "10GBASE-T with SFI electrical interface" }, { 0x15, "G959.1 profile P1L1-2D2" }, { 0x14, "G959.1 profile P1S1-2D2" }, { 0x13, "G959.1 profile P1I1-2D1" }, { 0x12, "40G PSM4 Parallel SMF" }, { 0x11, "4 x 10GBASE-SR" }, { 0x10, "40GBASE-ER4" }, { 0x0F, "Reserved" }, + { 0x0E, "Reserved" }, { 0x0D, "25GBASE-CR CA-N" }, { 0x0C, "25GBASE-CR CA-S" }, { 0x0B, "100GBASE-CR4 or 25GBASE-CR CA-L" }, { 0x0A, "Reserved" }, - { 0x09, "100G CWDM4 MSA without FEC" }, - { 0x08, "100G ACC (Active Copper Cable)" }, + { 0x09, "Obsolete" }, + { 0x08, "100G ACC (Active Copper Cable) or 25GAUI C2M ACC" }, { 0x07, "100G PSM4 Parallel SMF" }, - { 0x06, "100G CWDM4 MSA with FEC" }, + { 0x06, "100G CWDM4" }, { 0x05, "100GBASE-SR10" }, - { 0x04, "100GBASE-ER4" }, - { 0x03, "100GBASE-LR4" }, - { 0x02, "100GBASE-SR4" }, - { 0x01, "100G AOC (Active Optical Cable) or 25GAUI C2M ACC" }, + { 0x04, "100GBASE-ER4 or 25GBASE-ER" }, + { 0x03, "100GBASE-LR4 or 25GBASE-LR" }, + { 0x02, "100GBASE-SR4 or 25GBASE-SR" }, + { 0x01, "100G AOC (Active Optical Cable) or 25GAUI C2M AOC" }, { 0x00, "Unspecified" } }; -/* SFF-8636 Rev. 2.5 table 6.3: Revision compliance */ +/* SFF-8636 Rev. 2.9 table 6.3: Revision compliance */ static struct _nv rev_compl[] = { { 0x1, "SFF-8436 rev <=4.8" }, { 0x2, "SFF-8436 rev <=4.8" }, { 0x3, "SFF-8636 rev <=1.3" }, { 0x4, "SFF-8636 rev <=1.4" }, { 0x5, "SFF-8636 rev <=1.5" }, { 0x6, "SFF-8636 rev <=2.0" }, - { 0x7, "SFF-8636 rev <=2.5" }, + { 0x7, "SFF-8636 rev <=2.7" }, + { 0x8, "SFF-8636 rev >=2.8" }, { 0x0, "Unspecified" } }; const char * find_value(struct _nv *x, int value) { for (; x->n != NULL; x++) if (x->v == value) return (x->n); return (NULL); } const char * find_zero_bit(struct _nv *x, int value, int sz) { int v, m; const char *s; v = 1; for (v = 1, m = 1 << (8 * sz); v < m; v *= 2) { if ((value & v) == 0) continue; if ((s = find_value(x, value & v)) != NULL) { value &= ~v; return (s); } } return (NULL); } static void convert_sff_identifier(char *buf, size_t size, uint8_t value) { const char *x; x = NULL; if (value <= SFF_8024_ID_LAST) x = sff_8024_id[value]; else { if (value > 0x80) x = "Vendor specific"; else x = "Reserved"; } snprintf(buf, size, "%s", x); } static void convert_sff_connector(char *buf, size_t size, uint8_t value) { const char *x; if ((x = find_value(conn, value)) == NULL) { if (value >= 0x0D && value <= 0x1F) x = "Unallocated"; else if (value >= 0x24 && value <= 0x7F) x = "Unallocated"; else x = "Vendor specific"; } snprintf(buf, size, "%s", x); } static void convert_sff_rev_compliance(char *buf, size_t size, uint8_t value) { const char *x; if (value > 0x07) x = "Unallocated"; else x = find_value(rev_compl, value); snprintf(buf, size, "%s", x); } static void get_sfp_identifier(struct i2c_info *ii, char *buf, size_t size) { uint8_t data; read_i2c(ii, SFF_8472_BASE, SFF_8472_ID, 1, &data); convert_sff_identifier(buf, size, data); } static void get_sfp_connector(struct i2c_info *ii, char *buf, size_t size) { uint8_t data; read_i2c(ii, SFF_8472_BASE, SFF_8472_CONNECTOR, 1, &data); convert_sff_connector(buf, size, data); } static void get_qsfp_identifier(struct i2c_info *ii, char *buf, size_t size) { uint8_t data; read_i2c(ii, SFF_8436_BASE, SFF_8436_ID, 1, &data); convert_sff_identifier(buf, size, data); } static void get_qsfp_connector(struct i2c_info *ii, char *buf, size_t size) { uint8_t data; read_i2c(ii, SFF_8436_BASE, SFF_8436_CONNECTOR, 1, &data); convert_sff_connector(buf, size, data); } static void printf_sfp_transceiver_descr(struct i2c_info *ii, char *buf, size_t size) { char xbuf[12]; const char *tech_class, *tech_len, *tech_tech, *tech_media, *tech_speed; tech_class = NULL; tech_len = NULL; tech_tech = NULL; tech_media = NULL; tech_speed = NULL; /* Read bytes 3-10 at once */ read_i2c(ii, SFF_8472_BASE, SFF_8472_TRANS_START, 8, &xbuf[3]); /* Check 10G ethernet first */ tech_class = find_zero_bit(eth_10g, xbuf[3], 1); if (tech_class == NULL) { /* No match. Try 1G */ tech_class = find_zero_bit(eth_compat, xbuf[6], 1); } tech_len = find_zero_bit(fc_len, xbuf[7], 1); tech_tech = find_zero_bit(cab_tech, xbuf[7] << 8 | xbuf[8], 2); tech_media = find_zero_bit(fc_media, xbuf[9], 1); tech_speed = find_zero_bit(fc_speed, xbuf[10], 1); printf("Class: %s\n", tech_class); printf("Length: %s\n", tech_len); printf("Tech: %s\n", tech_tech); printf("Media: %s\n", tech_media); printf("Speed: %s\n", tech_speed); } static void get_sfp_transceiver_class(struct i2c_info *ii, char *buf, size_t size) { const char *tech_class; uint8_t code; - unsigned char qbuf[8]; - read_i2c(ii, SFF_8472_BASE, SFF_8472_TRANS_START, 8, (uint8_t *)qbuf); - - /* Check 10G Ethernet/IB first */ - read_i2c(ii, SFF_8472_BASE, SFF_8472_TRANS_START, 1, &code); - tech_class = find_zero_bit(eth_10g, code, 1); - if (tech_class == NULL) { - /* No match. Try Ethernet 1G */ - read_i2c(ii, SFF_8472_BASE, SFF_8472_TRANS_START + 3, - 1, (caddr_t)&code); - tech_class = find_zero_bit(eth_compat, code, 1); + /* Use extended compliance code if it's valid */ + read_i2c(ii, SFF_8472_BASE, SFF_8472_TRANS, 1, &code); + if (code != 0) + tech_class = find_value(eth_extended_comp, code); + else { + /* Next, check 10G Ethernet/IB CCs */ + read_i2c(ii, SFF_8472_BASE, SFF_8472_TRANS_START, 1, &code); + tech_class = find_zero_bit(eth_10g, code, 1); + if (tech_class == NULL) { + /* No match. Try Ethernet 1G */ + read_i2c(ii, SFF_8472_BASE, SFF_8472_TRANS_START + 3, + 1, (caddr_t)&code); + tech_class = find_zero_bit(eth_compat, code, 1); + } } if (tech_class == NULL) tech_class = "Unknown"; snprintf(buf, size, "%s", tech_class); } static void get_qsfp_transceiver_class(struct i2c_info *ii, char *buf, size_t size) { const char *tech_class; uint8_t code; read_i2c(ii, SFF_8436_BASE, SFF_8436_CODE_E1040100G, 1, &code); /* Check for extended specification compliance */ if (code & SFF_8636_EXT_COMPLIANCE) { read_i2c(ii, SFF_8436_BASE, SFF_8436_OPTIONS_START, 1, &code); tech_class = find_value(eth_extended_comp, code); } else /* Check 10/40G Ethernet class only */ tech_class = find_zero_bit(eth_1040g, code, 1); if (tech_class == NULL) tech_class = "Unknown"; snprintf(buf, size, "%s", tech_class); } /* * Print SFF-8472/SFF-8436 string to supplied buffer. * All (vendor-specific) strings are padded right with '0x20'. */ static void convert_sff_name(char *buf, size_t size, char *xbuf) { char *p; for (p = &xbuf[16]; *(p - 1) == 0x20; p--) ; *p = '\0'; snprintf(buf, size, "%s", xbuf); } static void convert_sff_date(char *buf, size_t size, char *xbuf) { snprintf(buf, size, "20%c%c-%c%c-%c%c", xbuf[0], xbuf[1], xbuf[2], xbuf[3], xbuf[4], xbuf[5]); } static void get_sfp_vendor_name(struct i2c_info *ii, char *buf, size_t size) { char xbuf[17]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8472_BASE, SFF_8472_VENDOR_START, 16, (uint8_t *)xbuf); convert_sff_name(buf, size, xbuf); } static void get_sfp_vendor_pn(struct i2c_info *ii, char *buf, size_t size) { char xbuf[17]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8472_BASE, SFF_8472_PN_START, 16, (uint8_t *)xbuf); convert_sff_name(buf, size, xbuf); } static void get_sfp_vendor_sn(struct i2c_info *ii, char *buf, size_t size) { char xbuf[17]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8472_BASE, SFF_8472_SN_START, 16, (uint8_t *)xbuf); convert_sff_name(buf, size, xbuf); } static void get_sfp_vendor_date(struct i2c_info *ii, char *buf, size_t size) { char xbuf[6]; memset(xbuf, 0, sizeof(xbuf)); /* Date code, see Table 3.8 for description */ read_i2c(ii, SFF_8472_BASE, SFF_8472_DATE_START, 6, (uint8_t *)xbuf); convert_sff_date(buf, size, xbuf); } static void get_qsfp_vendor_name(struct i2c_info *ii, char *buf, size_t size) { char xbuf[17]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8436_BASE, SFF_8436_VENDOR_START, 16, (uint8_t *)xbuf); convert_sff_name(buf, size, xbuf); } static void get_qsfp_vendor_pn(struct i2c_info *ii, char *buf, size_t size) { char xbuf[17]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8436_BASE, SFF_8436_PN_START, 16, (uint8_t *)xbuf); convert_sff_name(buf, size, xbuf); } static void get_qsfp_vendor_sn(struct i2c_info *ii, char *buf, size_t size) { char xbuf[17]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8436_BASE, SFF_8436_SN_START, 16, (uint8_t *)xbuf); convert_sff_name(buf, size, xbuf); } static void get_qsfp_vendor_date(struct i2c_info *ii, char *buf, size_t size) { char xbuf[6]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8436_BASE, SFF_8436_DATE_START, 6, (uint8_t *)xbuf); convert_sff_date(buf, size, xbuf); } static void print_sfp_vendor(struct i2c_info *ii, char *buf, size_t size) { char xbuf[80]; memset(xbuf, 0, sizeof(xbuf)); if (ii->qsfp != 0) { get_qsfp_vendor_name(ii, xbuf, 20); get_qsfp_vendor_pn(ii, &xbuf[20], 20); get_qsfp_vendor_sn(ii, &xbuf[40], 20); get_qsfp_vendor_date(ii, &xbuf[60], 20); } else { get_sfp_vendor_name(ii, xbuf, 20); get_sfp_vendor_pn(ii, &xbuf[20], 20); get_sfp_vendor_sn(ii, &xbuf[40], 20); get_sfp_vendor_date(ii, &xbuf[60], 20); } snprintf(buf, size, "vendor: %s PN: %s SN: %s DATE: %s", xbuf, &xbuf[20], &xbuf[40], &xbuf[60]); } /* * Converts internal templerature (SFF-8472, SFF-8436) * 16-bit unsigned value to human-readable representation: * * Internally measured Module temperature are represented * as a 16-bit signed twos complement value in increments of * 1/256 degrees Celsius, yielding a total range of –128C to +128C * that is considered valid between –40 and +125C. * */ static void convert_sff_temp(char *buf, size_t size, uint8_t *xbuf) { double d; d = (double)xbuf[0]; d += (double)xbuf[1] / 256; snprintf(buf, size, "%.2f C", d); } /* * Retrieves supplied voltage (SFF-8472, SFF-8436). * 16-bit usigned value, treated as range 0..+6.55 Volts */ static void convert_sff_voltage(char *buf, size_t size, uint8_t *xbuf) { double d; d = (double)((xbuf[0] << 8) | xbuf[1]); snprintf(buf, size, "%.2f Volts", d / 10000); } /* * Converts value in @xbuf to both milliwats and dBm * human representation. */ static void convert_sff_power(struct i2c_info *ii, char *buf, size_t size, uint8_t *xbuf) { uint16_t mW; double dbm; mW = (xbuf[0] << 8) + xbuf[1]; /* Convert mw to dbm */ dbm = 10.0 * log10(1.0 * mW / 10000); /* * Assume internally-calibrated data. * This is always true for SFF-8346, and explicitly * checked for SFF-8472. */ /* Table 3.9, bit 5 is set, internally calibrated */ snprintf(buf, size, "%d.%02d mW (%.2f dBm)", mW / 10000, (mW % 10000) / 100, dbm); } static void get_sfp_temp(struct i2c_info *ii, char *buf, size_t size) { uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8472_DIAG, SFF_8472_TEMP, 2, xbuf); convert_sff_temp(buf, size, xbuf); } static void get_sfp_voltage(struct i2c_info *ii, char *buf, size_t size) { uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8472_DIAG, SFF_8472_VCC, 2, xbuf); convert_sff_voltage(buf, size, xbuf); } static int get_qsfp_temp(struct i2c_info *ii, char *buf, size_t size) { uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8436_BASE, SFF_8436_TEMP, 2, xbuf); if ((xbuf[0] == 0xFF && xbuf[1] == 0xFF) || (xbuf[0] == 0 && xbuf[1] == 0)) return (-1); convert_sff_temp(buf, size, xbuf); return (0); } static void get_qsfp_voltage(struct i2c_info *ii, char *buf, size_t size) { uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8436_BASE, SFF_8436_VCC, 2, xbuf); convert_sff_voltage(buf, size, xbuf); } static void get_sfp_rx_power(struct i2c_info *ii, char *buf, size_t size) { uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8472_DIAG, SFF_8472_RX_POWER, 2, xbuf); convert_sff_power(ii, buf, size, xbuf); } static void get_sfp_tx_power(struct i2c_info *ii, char *buf, size_t size) { uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8472_DIAG, SFF_8472_TX_POWER, 2, xbuf); convert_sff_power(ii, buf, size, xbuf); } static void get_qsfp_rx_power(struct i2c_info *ii, char *buf, size_t size, int chan) { uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8436_BASE, SFF_8436_RX_CH1_MSB + (chan-1)*2, 2, xbuf); convert_sff_power(ii, buf, size, xbuf); } static void get_qsfp_tx_power(struct i2c_info *ii, char *buf, size_t size, int chan) { uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); read_i2c(ii, SFF_8436_BASE, SFF_8436_TX_CH1_MSB + (chan-1)*2, 2, xbuf); convert_sff_power(ii, buf, size, xbuf); } static void get_qsfp_rev_compliance(struct i2c_info *ii, char *buf, size_t size) { uint8_t xbuf; xbuf = 0; read_i2c(ii, SFF_8436_BASE, SFF_8436_STATUS, 1, &xbuf); convert_sff_rev_compliance(buf, size, xbuf); } static uint32_t get_qsfp_br(struct i2c_info *ii) { uint8_t xbuf; uint32_t rate; xbuf = 0; read_i2c(ii, SFF_8436_BASE, SFF_8436_BITRATE, 1, &xbuf); rate = xbuf * 100; if (xbuf == 0xFF) { read_i2c(ii, SFF_8436_BASE, SFF_8636_BITRATE, 1, &xbuf); rate = xbuf * 250; } return (rate); } /* * Reads i2c data from opened kernel socket. */ static int read_i2c(struct i2c_info *ii, uint8_t addr, uint8_t off, uint8_t len, uint8_t *buf) { struct ifi2creq req; int i, l; if (ii->error != 0) return (ii->error); ii->ifr->ifr_data = (caddr_t)&req; i = 0; l = 0; memset(&req, 0, sizeof(req)); req.dev_addr = addr; req.offset = off; req.len = len; while (len > 0) { l = MIN(sizeof(req.data), len); req.len = l; if (ioctl(ii->fd, SIOCGI2C, ii->ifr) != 0) { ii->error = errno; return (errno); } memcpy(&buf[i], req.data, l); len -= l; i += l; req.offset += l; } return (0); } static void dump_i2c_data(struct i2c_info *ii, uint8_t addr, uint8_t off, uint8_t len) { unsigned char buf[16]; int i, read; while (len > 0) { memset(buf, 0, sizeof(buf)); read = MIN(sizeof(buf), len); read_i2c(ii, addr, off, read, buf); if (ii->error != 0) { fprintf(stderr, "Error reading i2c info\n"); return; } printf("\t"); for (i = 0; i < read; i++) printf("%02X ", buf[i]); printf("\n"); len -= read; off += read; } } static void print_qsfp_status(struct i2c_info *ii, int verbose) { char buf[80], buf2[40], buf3[40]; uint32_t bitrate; int i; ii->qsfp = 1; /* Transceiver type */ get_qsfp_identifier(ii, buf, sizeof(buf)); get_qsfp_transceiver_class(ii, buf2, sizeof(buf2)); get_qsfp_connector(ii, buf3, sizeof(buf3)); if (ii->error == 0) printf("\tplugged: %s %s (%s)\n", buf, buf2, buf3); print_sfp_vendor(ii, buf, sizeof(buf)); if (ii->error == 0) printf("\t%s\n", buf); if (verbose > 1) { get_qsfp_rev_compliance(ii, buf, sizeof(buf)); if (ii->error == 0) printf("\tcompliance level: %s\n", buf); bitrate = get_qsfp_br(ii); if (ii->error == 0 && bitrate > 0) printf("\tnominal bitrate: %u Mbps\n", bitrate); } /* * The standards in this area are not clear when the * additional measurements are present or not. Use a valid * temperature reading as an indicator for the presence of * voltage and TX/RX power measurements. */ if (get_qsfp_temp(ii, buf, sizeof(buf)) == 0) { get_qsfp_voltage(ii, buf2, sizeof(buf2)); printf("\tmodule temperature: %s voltage: %s\n", buf, buf2); for (i = 1; i <= 4; i++) { get_qsfp_rx_power(ii, buf, sizeof(buf), i); get_qsfp_tx_power(ii, buf2, sizeof(buf2), i); printf("\tlane %d: RX: %s TX: %s\n", i, buf, buf2); } } if (verbose > 2) { printf("\n\tSFF8436 DUMP (0xA0 128..255 range):\n"); dump_i2c_data(ii, SFF_8436_BASE, 128, 128); printf("\n\tSFF8436 DUMP (0xA0 0..81 range):\n"); dump_i2c_data(ii, SFF_8436_BASE, 0, 82); } } static void print_sfp_status(struct i2c_info *ii, int verbose) { char buf[80], buf2[40], buf3[40]; uint8_t diag_type, flags; /* Read diagnostic monitoring type */ read_i2c(ii, SFF_8472_BASE, SFF_8472_DIAG_TYPE, 1, (caddr_t)&diag_type); if (ii->error != 0) return; /* * Read monitoring data IFF it is supplied AND is * internally calibrated */ flags = SFF_8472_DDM_DONE | SFF_8472_DDM_INTERNAL; if ((diag_type & flags) == flags) ii->do_diag = 1; /* Transceiver type */ get_sfp_identifier(ii, buf, sizeof(buf)); get_sfp_transceiver_class(ii, buf2, sizeof(buf2)); get_sfp_connector(ii, buf3, sizeof(buf3)); if (ii->error == 0) printf("\tplugged: %s %s (%s)\n", buf, buf2, buf3); print_sfp_vendor(ii, buf, sizeof(buf)); if (ii->error == 0) printf("\t%s\n", buf); if (verbose > 5) printf_sfp_transceiver_descr(ii, buf, sizeof(buf)); /* * Request current measurements iff they are provided: */ if (ii->do_diag != 0) { get_sfp_temp(ii, buf, sizeof(buf)); get_sfp_voltage(ii, buf2, sizeof(buf2)); printf("\tmodule temperature: %s Voltage: %s\n", buf, buf2); get_sfp_rx_power(ii, buf, sizeof(buf)); get_sfp_tx_power(ii, buf2, sizeof(buf2)); printf("\tRX: %s TX: %s\n", buf, buf2); } if (verbose > 2) { printf("\n\tSFF8472 DUMP (0xA0 0..127 range):\n"); dump_i2c_data(ii, SFF_8472_BASE, 0, 128); } } void sfp_status(int s, struct ifreq *ifr, int verbose) { struct i2c_info ii; uint8_t id_byte; /* Prepare necessary into pass to i2c reader */ memset(&ii, 0, sizeof(ii)); ii.fd = s; ii.ifr = ifr; /* * Try to read byte 0 from i2c: * Both SFF-8472 and SFF-8436 use it as * 'identification byte'. * Stop reading status on zero as value - * this might happen in case of empty transceiver slot. */ id_byte = 0; read_i2c(&ii, SFF_8472_BASE, SFF_8472_ID, 1, (caddr_t)&id_byte); if (ii.error != 0 || id_byte == 0) return; switch (id_byte) { case SFF_8024_ID_QSFP: case SFF_8024_ID_QSFPPLUS: case SFF_8024_ID_QSFP28: print_qsfp_status(&ii, verbose); break; default: print_sfp_status(&ii, verbose); } } Index: stable/11/sys/net/sff8472.h =================================================================== --- stable/11/sys/net/sff8472.h (revision 333335) +++ stable/11/sys/net/sff8472.h (revision 333336) @@ -1,508 +1,512 @@ /*- * Copyright (c) 2013 George V. Neville-Neil * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ /* * The following set of constants are from Document SFF-8472 * "Diagnostic Monitoring Interface for Optical Transceivers" revision * 11.3 published by the SFF Committee on June 11, 2013 * * The SFF standard defines two ranges of addresses, each 255 bytes * long for the storage of data and diagnostics on cables, such as * SFP+ optics and TwinAx cables. The ranges are defined in the * following way: * * Base Address 0xa0 (Identification Data) * 0-95 Serial ID Defined by SFP MSA * 96-127 Vendor Specific Data * 128-255 Reserved * * Base Address 0xa2 (Diagnostic Data) * 0-55 Alarm and Warning Thresholds * 56-95 Cal Constants * 96-119 Real Time Diagnostic Interface * 120-127 Vendor Specific * 128-247 User Writable EEPROM * 248-255 Vendor Specific * * Note that not all addresses are supported. Where support is * optional this is noted and instructions for checking for the * support are supplied. * * All these values are read across an I2C (i squared C) bus. Any * device wishing to read these addresses must first have support for * i2c calls. The Chelsio T4/T5 driver (dev/cxgbe) is one such * driver. */ /* Table 3.1 Two-wire interface ID: Data Fields */ enum { SFF_8472_BASE = 0xa0, /* Base address for all our queries. */ SFF_8472_ID = 0, /* Transceiver Type (Table 3.2) */ SFF_8472_EXT_ID = 1, /* Extended transceiver type (Table 3.3) */ SFF_8472_CONNECTOR = 2, /* Connector type (Table 3.4) */ SFF_8472_TRANS_START = 3, /* Elec or Optical Compatibility * (Table 3.5) */ SFF_8472_TRANS_END = 10, SFF_8472_ENCODING = 11, /* Encoding Code for high speed * serial encoding algorithm (see * Table 3.6) */ SFF_8472_BITRATE = 12, /* Nominal signaling rate, units * of 100MBd. (see details for * rates > 25.0Gb/s) */ SFF_8472_RATEID = 13, /* Type of rate select * functionality (see Table * 3.6a) */ SFF_8472_LEN_SMF_KM = 14, /* Link length supported for single * mode fiber, units of km */ SFF_8472_LEN_SMF = 15, /* Link length supported for single * mode fiber, units of 100 m */ SFF_8472_LEN_50UM = 16, /* Link length supported for 50 um * OM2 fiber, units of 10 m */ SFF_8472_LEN_625UM = 17, /* Link length supported for 62.5 * um OM1 fiber, units of 10 m */ SFF_8472_LEN_OM4 = 18, /* Link length supported for 50um * OM4 fiber, units of 10m. * Alternatively copper or direct * attach cable, units of m */ SFF_8472_LEN_OM3 = 19, /* Link length supported for 50 um OM3 fiber, units of 10 m */ SFF_8472_VENDOR_START = 20, /* Vendor name [Address A0h, Bytes * 20-35] */ SFF_8472_VENDOR_END = 35, SFF_8472_TRANS = 36, /* Transceiver Code for electronic * or optical compatibility (see * Table 3.5) */ SFF_8472_VENDOR_OUI_START = 37, /* Vendor OUI SFP vendor IEEE * company ID */ SFF_8472_VENDOR_OUI_END = 39, SFF_8472_PN_START = 40, /* Vendor PN */ SFF_8472_PN_END = 55, SFF_8472_REV_START = 56, /* Vendor Revision */ SFF_8472_REV_END = 59, SFF_8472_WAVELEN_START = 60, /* Wavelength Laser wavelength * (Passive/Active Cable * Specification Compliance) */ SFF_8472_WAVELEN_END = 61, SFF_8472_CC_BASE = 63, /* CC_BASE Check code for Base ID * Fields (addresses 0 to 62) */ /* * Extension Fields (optional) check the options before reading other * addresses. */ SFF_8472_OPTIONS_MSB = 64, /* Options Indicates which optional * transceiver signals are * implemented */ SFF_8472_OPTIONS_LSB = 65, /* (see Table 3.7) */ SFF_8472_BR_MAX = 66, /* BR max Upper bit rate margin, * units of % (see details for * rates > 25.0Gb/s) */ SFF_8472_BR_MIN = 67, /* Lower bit rate margin, units of * % (see details for rates > * 25.0Gb/s) */ SFF_8472_SN_START = 68, /* Vendor SN [Address A0h, Bytes 68-83] */ SFF_8472_SN_END = 83, SFF_8472_DATE_START = 84, /* Date code Vendor’s manufacturing * date code (see Table 3.8) */ SFF_8472_DATE_END = 91, SFF_8472_DIAG_TYPE = 92, /* Diagnostic Monitoring Type * Indicates which type of * diagnostic monitoring is * implemented (if any) in the * transceiver (see Table 3.9) */ SFF_8472_ENHANCED = 93, /* Enhanced Options Indicates which * optional enhanced features are * implemented (if any) in the * transceiver (see Table 3.10) */ SFF_8472_COMPLIANCE = 94, /* SFF-8472 Compliance Indicates * which revision of SFF-8472 the * transceiver complies with. (see * Table 3.12)*/ SFF_8472_CC_EXT = 95, /* Check code for the Extended ID * Fields (addresses 64 to 94) */ SFF_8472_VENDOR_RSRVD_START = 96, SFF_8472_VENDOR_RSRVD_END = 127, SFF_8472_RESERVED_START = 128, SFF_8472_RESERVED_END = 255 }; #define SFF_8472_DIAG_IMPL (1 << 6) /* Required to be 1 */ #define SFF_8472_DIAG_INTERNAL (1 << 5) /* Internal measurements. */ #define SFF_8472_DIAG_EXTERNAL (1 << 4) /* External measurements. */ #define SFF_8472_DIAG_POWER (1 << 3) /* Power measurement type */ #define SFF_8472_DIAG_ADDR_CHG (1 << 2) /* Address change required. * See SFF-8472 doc. */ /* * Diagnostics are available at the two wire address 0xa2. All * diagnostics are OPTIONAL so you should check 0xa0 registers 92 to * see which, if any are supported. */ enum {SFF_8472_DIAG = 0xa2}; /* Base address for diagnostics. */ /* * Table 3.15 Alarm and Warning Thresholds All values are 2 bytes * and MUST be read in a single read operation starting at the MSB */ enum { SFF_8472_TEMP_HIGH_ALM = 0, /* Temp High Alarm */ SFF_8472_TEMP_LOW_ALM = 2, /* Temp Low Alarm */ SFF_8472_TEMP_HIGH_WARN = 4, /* Temp High Warning */ SFF_8472_TEMP_LOW_WARN = 6, /* Temp Low Warning */ SFF_8472_VOLTAGE_HIGH_ALM = 8, /* Voltage High Alarm */ SFF_8472_VOLTAGE_LOW_ALM = 10, /* Voltage Low Alarm */ SFF_8472_VOLTAGE_HIGH_WARN = 12, /* Voltage High Warning */ SFF_8472_VOLTAGE_LOW_WARN = 14, /* Voltage Low Warning */ SFF_8472_BIAS_HIGH_ALM = 16, /* Bias High Alarm */ SFF_8472_BIAS_LOW_ALM = 18, /* Bias Low Alarm */ SFF_8472_BIAS_HIGH_WARN = 20, /* Bias High Warning */ SFF_8472_BIAS_LOW_WARN = 22, /* Bias Low Warning */ SFF_8472_TX_POWER_HIGH_ALM = 24, /* TX Power High Alarm */ SFF_8472_TX_POWER_LOW_ALM = 26, /* TX Power Low Alarm */ SFF_8472_TX_POWER_HIGH_WARN = 28, /* TX Power High Warning */ SFF_8472_TX_POWER_LOW_WARN = 30, /* TX Power Low Warning */ SFF_8472_RX_POWER_HIGH_ALM = 32, /* RX Power High Alarm */ SFF_8472_RX_POWER_LOW_ALM = 34, /* RX Power Low Alarm */ SFF_8472_RX_POWER_HIGH_WARN = 36, /* RX Power High Warning */ SFF_8472_RX_POWER_LOW_WARN = 38, /* RX Power Low Warning */ SFF_8472_RX_POWER4 = 56, /* Rx_PWR(4) Single precision * floating point calibration data * - Rx optical power. Bit 7 of * byte 56 is MSB. Bit 0 of byte * 59 is LSB. Rx_PWR(4) should be * set to zero for “internally * calibrated” devices. */ SFF_8472_RX_POWER3 = 60, /* Rx_PWR(3) Single precision * floating point calibration data * - Rx optical power. Bit 7 of * byte 60 is MSB. Bit 0 of byte 63 * is LSB. Rx_PWR(3) should be set * to zero for “internally * calibrated” devices.*/ SFF_8472_RX_POWER2 = 64, /* Rx_PWR(2) Single precision * floating point calibration data, * Rx optical power. Bit 7 of byte * 64 is MSB, bit 0 of byte 67 is * LSB. Rx_PWR(2) should be set to * zero for “internally calibrated” * devices. */ SFF_8472_RX_POWER1 = 68, /* Rx_PWR(1) Single precision * floating point calibration data, * Rx optical power. Bit 7 of byte * 68 is MSB, bit 0 of byte 71 is * LSB. Rx_PWR(1) should be set to * 1 for “internally calibrated” * devices. */ SFF_8472_RX_POWER0 = 72, /* Rx_PWR(0) Single precision * floating point calibration data, * Rx optical power. Bit 7 of byte * 72 is MSB, bit 0 of byte 75 is * LSB. Rx_PWR(0) should be set to * zero for “internally calibrated” * devices. */ SFF_8472_TX_I_SLOPE = 76, /* Tx_I(Slope) Fixed decimal * (unsigned) calibration data, * laser bias current. Bit 7 of * byte 76 is MSB, bit 0 of byte 77 * is LSB. Tx_I(Slope) should be * set to 1 for “internally * calibrated” devices. */ SFF_8472_TX_I_OFFSET = 78, /* Tx_I(Offset) Fixed decimal * (signed two’s complement) * calibration data, laser bias * current. Bit 7 of byte 78 is * MSB, bit 0 of byte 79 is * LSB. Tx_I(Offset) should be set * to zero for “internally * calibrated” devices. */ SFF_8472_TX_POWER_SLOPE = 80, /* Tx_PWR(Slope) Fixed decimal * (unsigned) calibration data, * transmitter coupled output * power. Bit 7 of byte 80 is MSB, * bit 0 of byte 81 is LSB. * Tx_PWR(Slope) should be set to 1 * for “internally calibrated” * devices. */ SFF_8472_TX_POWER_OFFSET = 82, /* Tx_PWR(Offset) Fixed decimal * (signed two’s complement) * calibration data, transmitter * coupled output power. Bit 7 of * byte 82 is MSB, bit 0 of byte 83 * is LSB. Tx_PWR(Offset) should be * set to zero for “internally * calibrated” devices. */ SFF_8472_T_SLOPE = 84, /* T (Slope) Fixed decimal * (unsigned) calibration data, * internal module temperature. Bit * 7 of byte 84 is MSB, bit 0 of * byte 85 is LSB. T(Slope) should * be set to 1 for “internally * calibrated” devices. */ SFF_8472_T_OFFSET = 86, /* T (Offset) Fixed decimal (signed * two’s complement) calibration * data, internal module * temperature. Bit 7 of byte 86 is * MSB, bit 0 of byte 87 is LSB. * T(Offset) should be set to zero * for “internally calibrated” * devices. */ SFF_8472_V_SLOPE = 88, /* V (Slope) Fixed decimal * (unsigned) calibration data, * internal module supply * voltage. Bit 7 of byte 88 is * MSB, bit 0 of byte 89 is * LSB. V(Slope) should be set to 1 * for “internally calibrated” * devices. */ SFF_8472_V_OFFSET = 90, /* V (Offset) Fixed decimal (signed * two’s complement) calibration * data, internal module supply * voltage. Bit 7 of byte 90 is * MSB. Bit 0 of byte 91 is * LSB. V(Offset) should be set to * zero for “internally calibrated” * devices. */ SFF_8472_CHECKSUM = 95, /* Checksum Byte 95 contains the * low order 8 bits of the sum of * bytes 0 – 94. */ /* Internal measurements. */ SFF_8472_TEMP = 96, /* Internally measured module temperature. */ SFF_8472_VCC = 98, /* Internally measured supply * voltage in transceiver. */ SFF_8472_TX_BIAS = 100, /* Internally measured TX Bias Current. */ SFF_8472_TX_POWER = 102, /* Measured TX output power. */ SFF_8472_RX_POWER = 104, /* Measured RX input power. */ SFF_8472_STATUS = 110 /* See below */ }; /* Status Bits Described */ /* * TX Disable State Digital state of the TX Disable Input Pin. Updated * within 100ms of change on pin. */ #define SFF_8472_STATUS_TX_DISABLE (1 << 7) /* * Select Read/write bit that allows software disable of * laser. Writing ‘1’ disables laser. See Table 3.11 for * enable/disable timing requirements. This bit is “OR”d with the hard * TX_DISABLE pin value. Note, per SFP MSA TX_DISABLE pin is default * enabled unless pulled low by hardware. If Soft TX Disable is not * implemented, the transceiver ignores the value of this bit. Default * power up value is zero/low. */ #define SFF_8472_STATUS_SOFT_TX_DISABLE (1 << 6) /* * RS(1) State Digital state of SFP input pin AS(1) per SFF-8079 or * RS(1) per SFF-8431. Updated within 100ms of change on pin. See A2h * Byte 118, Bit 3 for Soft RS(1) Select control information. */ #define SFF_8472_RS_STATE (1 << 5) /* * Rate_Select State [aka. “RS(0)”] Digital state of the SFP * Rate_Select Input Pin. Updated within 100ms of change on pin. Note: * This pin is also known as AS(0) in SFF-8079 and RS(0) in SFF-8431. */ #define SFF_8472_STATUS_SELECT_STATE (1 << 4) /* * Read/write bit that allows software rate select control. Writing * ‘1’ selects full bandwidth operation. This bit is “OR’d with the * hard Rate_Select, AS(0) or RS(0) pin value. See Table 3.11 for * timing requirements. Default at power up is logic zero/low. If Soft * Rate Select is not implemented, the transceiver ignores the value * of this bit. Note: Specific transceiver behaviors of this bit are * identified in Table 3.6a and referenced documents. See Table 3.18a, * byte 118, bit 3 for Soft RS(1) Select. */ #define SFF_8472_STATUS_SOFT_RATE_SELECT (1 << 3) /* * TX Fault State Digital state of the TX Fault Output Pin. Updated * within 100ms of change on pin. */ #define SFF_8472_STATUS_TX_FAULT_STATE (1 << 2) /* * Digital state of the RX_LOS Output Pin. Updated within 100ms of * change on pin. */ #define SFF_8472_STATUS_RX_LOS (1 << 1) /* * Indicates transceiver has achieved power up and data is ready. Bit * remains high until data is ready to be read at which time the * device sets the bit low. */ #define SFF_8472_STATUS_DATA_READY (1 << 0) /* * Table 3.2 Identifier values. - * Identifier constants has taken from SFF-8024 rev 2.9 table 4.1 + * Identifier constants has taken from SFF-8024 rev 4.2 table 4.1 * (as referenced by table 3.2 footer) * */ enum { SFF_8024_ID_UNKNOWN = 0x0, /* Unknown or unspecified */ SFF_8024_ID_GBIC = 0x1, /* GBIC */ SFF_8024_ID_SFF = 0x2, /* Module soldered to motherboard (ex: SFF)*/ SFF_8024_ID_SFP = 0x3, /* SFP or SFP “Plus” */ SFF_8024_ID_XBI = 0x4, /* 300 pin XBI */ SFF_8024_ID_XENPAK = 0x5, /* Xenpak */ SFF_8024_ID_XFP = 0x6, /* XFP */ SFF_8024_ID_XFF = 0x7, /* XFF */ SFF_8024_ID_XFPE = 0x8, /* XFP-E */ SFF_8024_ID_XPAK = 0x9, /* XPAk */ SFF_8024_ID_X2 = 0xA, /* X2 */ SFF_8024_ID_DWDM_SFP = 0xB, /* DWDM-SFP */ SFF_8024_ID_QSFP = 0xC, /* QSFP */ SFF_8024_ID_QSFPPLUS = 0xD, /* QSFP+ */ SFF_8024_ID_CXP = 0xE, /* CXP */ SFF_8024_ID_HD4X = 0xF, /* Shielded Mini Multilane HD 4X */ SFF_8024_ID_HD8X = 0x10, /* Shielded Mini Multilane HD 8X */ - SFF_8024_ID_QSFP28 = 0x11, /* QSFP28 */ + SFF_8024_ID_QSFP28 = 0x11, /* QSFP28 or later */ SFF_8024_ID_CXP2 = 0x12, /* CXP2 (aka CXP28) */ SFF_8024_ID_CDFP = 0x13, /* CDFP (Style 1/Style 2) */ SFF_8024_ID_SMM4 = 0x14, /* Shielded Mini Multilate HD 4X Fanout */ SFF_8024_ID_SMM8 = 0x15, /* Shielded Mini Multilate HD 8X Fanout */ SFF_8024_ID_CDFP3 = 0x16, /* CDFP (Style3) */ - SFF_8024_ID_LAST = SFF_8024_ID_CDFP3 + SFF_8024_ID_MICROQSFP = 0x17, /* microQSFP */ + SFF_8024_ID_QSFP_DD = 0x18, /* QSFP-DD 8X Pluggable Transceiver */ + SFF_8024_ID_LAST = SFF_8024_ID_QSFP_DD }; static const char *sff_8024_id[SFF_8024_ID_LAST + 1] = {"Unknown", "GBIC", "SFF", "SFP/SFP+/SFP28", "XBI", "Xenpak", "XFP", "XFF", "XFP-E", "XPAK", "X2", "DWDM-SFP/SFP+", "QSFP", "QSFP+", "CXP", "HD4X", "HD8X", "QSFP28", "CXP2", "CDFP", "SMM4", "SMM8", - "CDFP3"}; + "CDFP3", + "microQSFP", + "QSFP-DD"}; /* Keep compatibility with old definitions */ #define SFF_8472_ID_UNKNOWN SFF_8024_ID_UNKNOWN #define SFF_8472_ID_GBIC SFF_8024_ID_GBIC #define SFF_8472_ID_SFF SFF_8024_ID_SFF #define SFF_8472_ID_SFP SFF_8024_ID_SFP #define SFF_8472_ID_XBI SFF_8024_ID_XBI #define SFF_8472_ID_XENPAK SFF_8024_ID_XENPAK #define SFF_8472_ID_XFP SFF_8024_ID_XFP #define SFF_8472_ID_XFF SFF_8024_ID_XFF #define SFF_8472_ID_XFPE SFF_8024_ID_XFPE #define SFF_8472_ID_XPAK SFF_8024_ID_XPAK #define SFF_8472_ID_X2 SFF_8024_ID_X2 #define SFF_8472_ID_DWDM_SFP SFF_8024_ID_DWDM_SFP #define SFF_8472_ID_QSFP SFF_8024_ID_QSFP #define SFF_8472_ID_LAST SFF_8024_ID_LAST #define sff_8472_id sff_8024_id /* * Table 3.9 Diagnostic Monitoring Type (byte 92) * bits described. */ /* * Digital diagnostic monitoring implemented. * Set to 1 for transceivers implementing DDM. */ #define SFF_8472_DDM_DONE (1 << 6) /* * Measurements are internally calibrated. */ #define SFF_8472_DDM_INTERNAL (1 << 5) /* * Measurements are externally calibrated. */ #define SFF_8472_DDM_EXTERNAL (1 << 4) /* * Received power measurement type * 0 = OMA, 1 = average power */ #define SFF_8472_DDM_PMTYPE (1 << 3) /* Table 3.13 and 3.14 Temperature Conversion Values */ #define SFF_8472_TEMP_SIGN (1 << 15) #define SFF_8472_TEMP_SHIFT 8 #define SFF_8472_TEMP_MSK 0xEF00 #define SFF_8472_TEMP_FRAC 0x00FF /* Internal Callibration Conversion factors */ /* * Represented as a 16 bit unsigned integer with the voltage defined * as the full 16 bit value (0 – 65535) with LSB equal to 100 uVolt, * yielding a total range of 0 to +6.55 Volts. */ #define SFF_8472_VCC_FACTOR 10000.0 /* * Represented as a 16 bit unsigned integer with the current defined * as the full 16 bit value (0 – 65535) with LSB equal to 2 uA, * yielding a total range of 0 to 131 mA. */ #define SFF_8472_BIAS_FACTOR 2000.0 /* * Represented as a 16 bit unsigned integer with the power defined as * the full 16 bit value (0 – 65535) with LSB equal to 0.1 uW, * yielding a total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). */ #define SFF_8472_POWER_FACTOR 10000.0 Index: stable/11 =================================================================== --- stable/11 (revision 333335) +++ stable/11 (revision 333336) Property changes on: stable/11 ___________________________________________________________________ Modified: svn:mergeinfo ## -0,0 +0,1 ## Merged /head:r326571