Index: head/sys/arm/amlogic/aml8726/aml8726_usb_phy-m3.c =================================================================== --- head/sys/arm/amlogic/aml8726/aml8726_usb_phy-m3.c (revision 332340) +++ head/sys/arm/amlogic/aml8726/aml8726_usb_phy-m3.c (revision 332341) @@ -1,428 +1,428 @@ /*- * Copyright 2014-2015 John Wehle * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ /* * Amlogic aml8726-m3 USB physical layer driver. * * Both USB physical interfaces share the same configuration register. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "gpio_if.h" struct aml8726_usb_phy_gpio { device_t dev; uint32_t pin; uint32_t pol; }; struct aml8726_usb_phy_softc { device_t dev; struct resource *res[1]; uint32_t npwr_en; struct aml8726_usb_phy_gpio *pwr_en; }; static struct resource_spec aml8726_usb_phy_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, { -1, 0 } }; #define AML_USB_PHY_CFG_REG 0 #define AML_USB_PHY_CFG_A_CLK_DETECTED (1U << 31) #define AML_USB_PHY_CFG_CLK_DIV_MASK (0x7f << 24) #define AML_USB_PHY_CFG_CLK_DIV_SHIFT 24 #define AML_USB_PHY_CFG_B_CLK_DETECTED (1 << 22) #define AML_USB_PHY_CFG_A_PLL_RST (1 << 19) #define AML_USB_PHY_CFG_A_PHYS_RST (1 << 18) #define AML_USB_PHY_CFG_A_RST (1 << 17) #define AML_USB_PHY_CFG_B_PLL_RST (1 << 13) #define AML_USB_PHY_CFG_B_PHYS_RST (1 << 12) #define AML_USB_PHY_CFG_B_RST (1 << 11) #define AML_USB_PHY_CFG_CLK_EN (1 << 8) #define AML_USB_PHY_CFG_CLK_SEL_MASK (7 << 5) #define AML_USB_PHY_CFG_CLK_SEL_XTAL (0 << 5) #define AML_USB_PHY_CFG_CLK_SEL_XTAL_DIV2 (1 << 5) #define AML_USB_PHY_CFG_B_POR (1 << 1) #define AML_USB_PHY_CFG_A_POR (1 << 0) #define AML_USB_PHY_CFG_CLK_DETECTED \ (AML_USB_PHY_CFG_A_CLK_DETECTED | AML_USB_PHY_CFG_B_CLK_DETECTED) #define AML_USB_PHY_MISC_A_REG 12 #define AML_USB_PHY_MISC_B_REG 16 #define AML_USB_PHY_MISC_ID_OVERIDE_EN (1 << 23) #define AML_USB_PHY_MISC_ID_OVERIDE_DEVICE (1 << 22) #define AML_USB_PHY_MISC_ID_OVERIDE_HOST (0 << 22) #define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], reg, (val)) #define CSR_READ_4(sc, reg) bus_read_4((sc)->res[0], reg) #define CSR_BARRIER(sc, reg) bus_barrier((sc)->res[0], reg, 4, \ (BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)) #define PIN_ON_FLAG(pol) ((pol) == 0 ? \ GPIO_PIN_LOW : GPIO_PIN_HIGH) #define PIN_OFF_FLAG(pol) ((pol) == 0 ? \ GPIO_PIN_HIGH : GPIO_PIN_LOW) static int aml8726_usb_phy_mode(const char *dwcotg_path, uint32_t *mode) { char *usb_mode; phandle_t node; ssize_t len; if ((node = OF_finddevice(dwcotg_path)) == -1) return (ENXIO); if (fdt_is_compatible_strict(node, "synopsys,designware-hs-otg2") == 0) return (ENXIO); *mode = 0; len = OF_getprop_alloc(node, "dr_mode", (void **)&usb_mode); if (len <= 0) return (0); if (strcasecmp(usb_mode, "host") == 0) { *mode = AML_USB_PHY_MISC_ID_OVERIDE_EN | AML_USB_PHY_MISC_ID_OVERIDE_HOST; } else if (strcasecmp(usb_mode, "peripheral") == 0) { *mode = AML_USB_PHY_MISC_ID_OVERIDE_EN | AML_USB_PHY_MISC_ID_OVERIDE_DEVICE; } OF_prop_free(usb_mode); return (0); } static int aml8726_usb_phy_probe(device_t dev) { if (!ofw_bus_status_okay(dev)) return (ENXIO); if (!ofw_bus_is_compatible(dev, "amlogic,aml8726-m3-usb-phy")) return (ENXIO); device_set_desc(dev, "Amlogic aml8726-m3 USB PHY"); return (BUS_PROBE_DEFAULT); } static int aml8726_usb_phy_attach(device_t dev) { struct aml8726_usb_phy_softc *sc = device_get_softc(dev); int err; int npwr_en; pcell_t *prop; phandle_t node; ssize_t len; uint32_t div; uint32_t i; uint32_t mode_a; uint32_t mode_b; uint32_t value; sc->dev = dev; if (aml8726_usb_phy_mode("/soc/usb@c9040000", &mode_a) != 0) { device_printf(dev, "missing usb@c9040000 node in FDT\n"); return (ENXIO); } if (aml8726_usb_phy_mode("/soc/usb@c90c0000", &mode_b) != 0) { device_printf(dev, "missing usb@c90c0000 node in FDT\n"); return (ENXIO); } if (bus_alloc_resources(dev, aml8726_usb_phy_spec, sc->res)) { device_printf(dev, "can not allocate resources for device\n"); return (ENXIO); } node = ofw_bus_get_node(dev); err = 0; - len = OF_getencprop_alloc(node, "usb-pwr-en", + len = OF_getencprop_alloc_multi(node, "usb-pwr-en", 3 * sizeof(pcell_t), (void **)&prop); npwr_en = (len > 0) ? len : 0; sc->npwr_en = 0; sc->pwr_en = (struct aml8726_usb_phy_gpio *) malloc(npwr_en * sizeof (*sc->pwr_en), M_DEVBUF, M_WAITOK); for (i = 0; i < npwr_en; i++) { sc->pwr_en[i].dev = OF_device_from_xref(prop[i * 3]); sc->pwr_en[i].pin = prop[i * 3 + 1]; sc->pwr_en[i].pol = prop[i * 3 + 2]; if (sc->pwr_en[i].dev == NULL) { err = 1; break; } } OF_prop_free(prop); if (err) { device_printf(dev, "unable to parse gpio\n"); goto fail; } /* Turn on power by setting pin and then enabling output driver. */ for (i = 0; i < npwr_en; i++) { if (GPIO_PIN_SET(sc->pwr_en[i].dev, sc->pwr_en[i].pin, PIN_ON_FLAG(sc->pwr_en[i].pol)) != 0 || GPIO_PIN_SETFLAGS(sc->pwr_en[i].dev, sc->pwr_en[i].pin, GPIO_PIN_OUTPUT) != 0) { device_printf(dev, "could not use gpio to control power\n"); goto fail; } sc->npwr_en++; } /* * Configure the clock source and divider. */ div = 2; value = CSR_READ_4(sc, AML_USB_PHY_CFG_REG); value &= ~(AML_USB_PHY_CFG_CLK_DIV_MASK | AML_USB_PHY_CFG_CLK_SEL_MASK); value &= ~(AML_USB_PHY_CFG_A_RST | AML_USB_PHY_CFG_B_RST); value &= ~(AML_USB_PHY_CFG_A_PLL_RST | AML_USB_PHY_CFG_B_PLL_RST); value &= ~(AML_USB_PHY_CFG_A_PHYS_RST | AML_USB_PHY_CFG_B_PHYS_RST); value &= ~(AML_USB_PHY_CFG_A_POR | AML_USB_PHY_CFG_B_POR); value |= AML_USB_PHY_CFG_CLK_SEL_XTAL; value |= ((div - 1) << AML_USB_PHY_CFG_CLK_DIV_SHIFT) & AML_USB_PHY_CFG_CLK_DIV_MASK; value |= AML_USB_PHY_CFG_CLK_EN; CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); /* * Issue the reset sequence. */ value |= (AML_USB_PHY_CFG_A_RST | AML_USB_PHY_CFG_B_RST); CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); DELAY(200); value &= ~(AML_USB_PHY_CFG_A_RST | AML_USB_PHY_CFG_B_RST); CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); DELAY(200); value |= (AML_USB_PHY_CFG_A_PLL_RST | AML_USB_PHY_CFG_B_PLL_RST); CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); DELAY(200); value &= ~(AML_USB_PHY_CFG_A_PLL_RST | AML_USB_PHY_CFG_B_PLL_RST); CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); DELAY(200); value |= (AML_USB_PHY_CFG_A_PHYS_RST | AML_USB_PHY_CFG_B_PHYS_RST); CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); DELAY(200); value &= ~(AML_USB_PHY_CFG_A_PHYS_RST | AML_USB_PHY_CFG_B_PHYS_RST); CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); DELAY(200); value |= (AML_USB_PHY_CFG_A_POR | AML_USB_PHY_CFG_B_POR); CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); DELAY(200); /* * Enable by clearing the power on reset. */ value &= ~(AML_USB_PHY_CFG_A_POR | AML_USB_PHY_CFG_B_POR); CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); DELAY(200); /* * Check if the clock was detected. */ value = CSR_READ_4(sc, AML_USB_PHY_CFG_REG); if ((value & AML_USB_PHY_CFG_CLK_DETECTED) != AML_USB_PHY_CFG_CLK_DETECTED) device_printf(dev, "PHY Clock not detected\n"); /* * Configure the mode for each port. */ value = CSR_READ_4(sc, AML_USB_PHY_MISC_A_REG); value &= ~(AML_USB_PHY_MISC_ID_OVERIDE_EN | AML_USB_PHY_MISC_ID_OVERIDE_DEVICE | AML_USB_PHY_MISC_ID_OVERIDE_HOST); value |= mode_a; CSR_WRITE_4(sc, AML_USB_PHY_MISC_A_REG, value); value = CSR_READ_4(sc, AML_USB_PHY_MISC_B_REG); value &= ~(AML_USB_PHY_MISC_ID_OVERIDE_EN | AML_USB_PHY_MISC_ID_OVERIDE_DEVICE | AML_USB_PHY_MISC_ID_OVERIDE_HOST); value |= mode_b; CSR_WRITE_4(sc, AML_USB_PHY_MISC_B_REG, value); CSR_BARRIER(sc, AML_USB_PHY_MISC_B_REG); return (0); fail: /* In the event of problems attempt to turn things back off. */ i = sc->npwr_en; while (i-- != 0) { GPIO_PIN_SET(sc->pwr_en[i].dev, sc->pwr_en[i].pin, PIN_OFF_FLAG(sc->pwr_en[i].pol)); } free (sc->pwr_en, M_DEVBUF); sc->pwr_en = NULL; bus_release_resources(dev, aml8726_usb_phy_spec, sc->res); return (ENXIO); } static int aml8726_usb_phy_detach(device_t dev) { struct aml8726_usb_phy_softc *sc = device_get_softc(dev); uint32_t i; uint32_t value; /* * Disable by issuing a power on reset. */ value = CSR_READ_4(sc, AML_USB_PHY_CFG_REG); value |= (AML_USB_PHY_CFG_A_POR | AML_USB_PHY_CFG_B_POR); CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); /* Turn off power */ i = sc->npwr_en; while (i-- != 0) { (void)GPIO_PIN_SET(sc->pwr_en[i].dev, sc->pwr_en[i].pin, PIN_OFF_FLAG(sc->pwr_en[i].pol)); } free (sc->pwr_en, M_DEVBUF); sc->pwr_en = NULL; bus_release_resources(dev, aml8726_usb_phy_spec, sc->res); return (0); } static device_method_t aml8726_usb_phy_methods[] = { /* Device interface */ DEVMETHOD(device_probe, aml8726_usb_phy_probe), DEVMETHOD(device_attach, aml8726_usb_phy_attach), DEVMETHOD(device_detach, aml8726_usb_phy_detach), DEVMETHOD_END }; static driver_t aml8726_usb_phy_driver = { "usbphy", aml8726_usb_phy_methods, sizeof(struct aml8726_usb_phy_softc), }; static devclass_t aml8726_usb_phy_devclass; DRIVER_MODULE(aml8726_m3usbphy, simplebus, aml8726_usb_phy_driver, aml8726_usb_phy_devclass, 0, 0); MODULE_DEPEND(aml8726_m3usbphy, aml8726_gpio, 1, 1, 1); Index: head/sys/arm/amlogic/aml8726/aml8726_usb_phy-m6.c =================================================================== --- head/sys/arm/amlogic/aml8726/aml8726_usb_phy-m6.c (revision 332340) +++ head/sys/arm/amlogic/aml8726/aml8726_usb_phy-m6.c (revision 332341) @@ -1,418 +1,418 @@ /*- * Copyright 2014-2015 John Wehle * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ /* * Amlogic aml8726-m6 (and later) USB physical layer driver. * * Each USB physical interface has a dedicated register block. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "gpio_if.h" struct aml8726_usb_phy_gpio { device_t dev; uint32_t pin; uint32_t pol; }; struct aml8726_usb_phy_softc { device_t dev; struct resource *res[1]; uint32_t npwr_en; struct aml8726_usb_phy_gpio *pwr_en; boolean_t force_aca; struct aml8726_usb_phy_gpio hub_rst; }; static struct resource_spec aml8726_usb_phy_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, { -1, 0 } }; #define AML_USB_PHY_CFG_REG 0 #define AML_USB_PHY_CFG_CLK_SEL_32K_ALT (1 << 15) #define AML_USB_PHY_CFG_CLK_DIV_MASK (0x7f << 4) #define AML_USB_PHY_CFG_CLK_DIV_SHIFT 4 #define AML_USB_PHY_CFG_CLK_SEL_MASK (7 << 1) #define AML_USB_PHY_CFG_CLK_SEL_XTAL (0 << 1) #define AML_USB_PHY_CFG_CLK_SEL_XTAL_DIV2 (1 << 1) #define AML_USB_PHY_CFG_CLK_EN (1 << 0) #define AML_USB_PHY_CTRL_REG 4 #define AML_USB_PHY_CTRL_FSEL_MASK (7 << 22) #define AML_USB_PHY_CTRL_FSEL_12M (2 << 22) #define AML_USB_PHY_CTRL_FSEL_24M (5 << 22) #define AML_USB_PHY_CTRL_POR (1 << 15) #define AML_USB_PHY_CTRL_CLK_DETECTED (1 << 8) #define AML_USB_PHY_ADP_BC_REG 12 #define AML_USB_PHY_ADP_BC_ACA_FLOATING (1 << 26) #define AML_USB_PHY_ADP_BC_ACA_EN (1 << 16) #define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], reg, (val)) #define CSR_READ_4(sc, reg) bus_read_4((sc)->res[0], reg) #define CSR_BARRIER(sc, reg) bus_barrier((sc)->res[0], reg, 4, \ (BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)) #define PIN_ON_FLAG(pol) ((pol) == 0 ? \ GPIO_PIN_LOW : GPIO_PIN_HIGH) #define PIN_OFF_FLAG(pol) ((pol) == 0 ? \ GPIO_PIN_HIGH : GPIO_PIN_LOW) static int aml8726_usb_phy_probe(device_t dev) { if (!ofw_bus_status_okay(dev)) return (ENXIO); if (!ofw_bus_is_compatible(dev, "amlogic,aml8726-m6-usb-phy") && !ofw_bus_is_compatible(dev, "amlogic,aml8726-m8-usb-phy")) return (ENXIO); switch (aml8726_soc_hw_rev) { case AML_SOC_HW_REV_M8: case AML_SOC_HW_REV_M8B: device_set_desc(dev, "Amlogic aml8726-m8 USB PHY"); break; default: device_set_desc(dev, "Amlogic aml8726-m6 USB PHY"); break; } return (BUS_PROBE_DEFAULT); } static int aml8726_usb_phy_attach(device_t dev) { struct aml8726_usb_phy_softc *sc = device_get_softc(dev); char *force_aca; int err; int npwr_en; pcell_t *prop; phandle_t node; ssize_t len; uint32_t div; uint32_t i; uint32_t value; sc->dev = dev; if (bus_alloc_resources(dev, aml8726_usb_phy_spec, sc->res)) { device_printf(dev, "can not allocate resources for device\n"); return (ENXIO); } node = ofw_bus_get_node(dev); len = OF_getprop_alloc(node, "force-aca", (void **)&force_aca); sc->force_aca = FALSE; if (len > 0) { if (strncmp(force_aca, "true", len) == 0) sc->force_aca = TRUE; } OF_prop_free(force_aca); err = 0; - len = OF_getencprop_alloc(node, "usb-pwr-en", + len = OF_getencprop_alloc_multi(node, "usb-pwr-en", 3 * sizeof(pcell_t), (void **)&prop); npwr_en = (len > 0) ? len : 0; sc->npwr_en = 0; sc->pwr_en = (struct aml8726_usb_phy_gpio *) malloc(npwr_en * sizeof (*sc->pwr_en), M_DEVBUF, M_WAITOK); for (i = 0; i < npwr_en; i++) { sc->pwr_en[i].dev = OF_device_from_xref(prop[i * 3]); sc->pwr_en[i].pin = prop[i * 3 + 1]; sc->pwr_en[i].pol = prop[i * 3 + 2]; if (sc->pwr_en[i].dev == NULL) { err = 1; break; } } OF_prop_free(prop); - len = OF_getencprop_alloc(node, "usb-hub-rst", + len = OF_getencprop_alloc_multi(node, "usb-hub-rst", 3 * sizeof(pcell_t), (void **)&prop); if (len > 0) { sc->hub_rst.dev = OF_device_from_xref(prop[0]); sc->hub_rst.pin = prop[1]; sc->hub_rst.pol = prop[2]; if (len > 1 || sc->hub_rst.dev == NULL) err = 1; } OF_prop_free(prop); if (err) { device_printf(dev, "unable to parse gpio\n"); goto fail; } /* Turn on power by setting pin and then enabling output driver. */ for (i = 0; i < npwr_en; i++) { if (GPIO_PIN_SET(sc->pwr_en[i].dev, sc->pwr_en[i].pin, PIN_ON_FLAG(sc->pwr_en[i].pol)) != 0 || GPIO_PIN_SETFLAGS(sc->pwr_en[i].dev, sc->pwr_en[i].pin, GPIO_PIN_OUTPUT) != 0) { device_printf(dev, "could not use gpio to control power\n"); goto fail; } sc->npwr_en++; } /* * Configure the clock source and divider. */ value = CSR_READ_4(sc, AML_USB_PHY_CFG_REG); value &= ~(AML_USB_PHY_CFG_CLK_SEL_32K_ALT | AML_USB_PHY_CFG_CLK_DIV_MASK | AML_USB_PHY_CFG_CLK_SEL_MASK | AML_USB_PHY_CFG_CLK_EN); switch (aml8726_soc_hw_rev) { case AML_SOC_HW_REV_M8: case AML_SOC_HW_REV_M8B: value |= AML_USB_PHY_CFG_CLK_SEL_32K_ALT; break; default: div = 2; value |= AML_USB_PHY_CFG_CLK_SEL_XTAL; value |= ((div - 1) << AML_USB_PHY_CFG_CLK_DIV_SHIFT) & AML_USB_PHY_CFG_CLK_DIV_MASK; value |= AML_USB_PHY_CFG_CLK_EN; break; } CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); /* * Configure the clock frequency and issue a power on reset. */ value = CSR_READ_4(sc, AML_USB_PHY_CTRL_REG); value &= ~AML_USB_PHY_CTRL_FSEL_MASK; switch (aml8726_soc_hw_rev) { case AML_SOC_HW_REV_M8: case AML_SOC_HW_REV_M8B: value |= AML_USB_PHY_CTRL_FSEL_24M; break; default: value |= AML_USB_PHY_CTRL_FSEL_12M; break; } value |= AML_USB_PHY_CTRL_POR; CSR_WRITE_4(sc, AML_USB_PHY_CTRL_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CTRL_REG); DELAY(500); /* * Enable by clearing the power on reset. */ value &= ~AML_USB_PHY_CTRL_POR; CSR_WRITE_4(sc, AML_USB_PHY_CTRL_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CTRL_REG); DELAY(1000); /* * Check if the clock was detected. */ value = CSR_READ_4(sc, AML_USB_PHY_CTRL_REG); if ((value & AML_USB_PHY_CTRL_CLK_DETECTED) == 0) device_printf(dev, "PHY Clock not detected\n"); /* * If necessary enabled Accessory Charger Adaptor detection * so that the port knows what mode to operate in. */ if (sc->force_aca) { value = CSR_READ_4(sc, AML_USB_PHY_ADP_BC_REG); value |= AML_USB_PHY_ADP_BC_ACA_EN; CSR_WRITE_4(sc, AML_USB_PHY_ADP_BC_REG, value); CSR_BARRIER(sc, AML_USB_PHY_ADP_BC_REG); DELAY(50); value = CSR_READ_4(sc, AML_USB_PHY_ADP_BC_REG); if ((value & AML_USB_PHY_ADP_BC_ACA_FLOATING) != 0) { device_printf(dev, "force-aca requires newer silicon\n"); goto fail; } } /* * Reset the hub. */ if (sc->hub_rst.dev != NULL) { err = 0; if (GPIO_PIN_SET(sc->hub_rst.dev, sc->hub_rst.pin, PIN_ON_FLAG(sc->hub_rst.pol)) != 0 || GPIO_PIN_SETFLAGS(sc->hub_rst.dev, sc->hub_rst.pin, GPIO_PIN_OUTPUT) != 0) err = 1; DELAY(30); if (GPIO_PIN_SET(sc->hub_rst.dev, sc->hub_rst.pin, PIN_OFF_FLAG(sc->hub_rst.pol)) != 0) err = 1; DELAY(60000); if (err) { device_printf(dev, "could not use gpio to reset hub\n"); goto fail; } } return (0); fail: /* In the event of problems attempt to turn things back off. */ i = sc->npwr_en; while (i-- != 0) { GPIO_PIN_SET(sc->pwr_en[i].dev, sc->pwr_en[i].pin, PIN_OFF_FLAG(sc->pwr_en[i].pol)); } free (sc->pwr_en, M_DEVBUF); sc->pwr_en = NULL; bus_release_resources(dev, aml8726_usb_phy_spec, sc->res); return (ENXIO); } static int aml8726_usb_phy_detach(device_t dev) { struct aml8726_usb_phy_softc *sc = device_get_softc(dev); uint32_t i; uint32_t value; /* * Disable by issuing a power on reset. */ value = CSR_READ_4(sc, AML_USB_PHY_CTRL_REG); value |= AML_USB_PHY_CTRL_POR; CSR_WRITE_4(sc, AML_USB_PHY_CTRL_REG, value); CSR_BARRIER(sc, AML_USB_PHY_CTRL_REG); /* Turn off power */ i = sc->npwr_en; while (i-- != 0) { GPIO_PIN_SET(sc->pwr_en[i].dev, sc->pwr_en[i].pin, PIN_OFF_FLAG(sc->pwr_en[i].pol)); } free (sc->pwr_en, M_DEVBUF); sc->pwr_en = NULL; bus_release_resources(dev, aml8726_usb_phy_spec, sc->res); return (0); } static device_method_t aml8726_usb_phy_methods[] = { /* Device interface */ DEVMETHOD(device_probe, aml8726_usb_phy_probe), DEVMETHOD(device_attach, aml8726_usb_phy_attach), DEVMETHOD(device_detach, aml8726_usb_phy_detach), DEVMETHOD_END }; static driver_t aml8726_usb_phy_driver = { "usbphy", aml8726_usb_phy_methods, sizeof(struct aml8726_usb_phy_softc), }; static devclass_t aml8726_usb_phy_devclass; DRIVER_MODULE(aml8726_m6usbphy, simplebus, aml8726_usb_phy_driver, aml8726_usb_phy_devclass, 0, 0); MODULE_DEPEND(aml8726_m6usbphy, aml8726_gpio, 1, 1, 1); Index: head/sys/arm/annapurna/alpine/alpine_pci_msix.c =================================================================== --- head/sys/arm/annapurna/alpine/alpine_pci_msix.c (revision 332340) +++ head/sys/arm/annapurna/alpine/alpine_pci_msix.c (revision 332341) @@ -1,394 +1,394 @@ /*- * Copyright (c) 2015,2016 Annapurna Labs Ltd. and affiliates * All rights reserved. * * Developed by Semihalf. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include "msi_if.h" #include "pic_if.h" #define AL_SPI_INTR 0 #define AL_EDGE_HIGH 1 #define ERR_NOT_IN_MAP -1 #define IRQ_OFFSET 1 #define GIC_INTR_CELL_CNT 3 #define INTR_RANGE_COUNT 2 #define MAX_MSIX_COUNT 160 static int al_msix_attach(device_t); static int al_msix_probe(device_t); static msi_alloc_msi_t al_msix_alloc_msi; static msi_release_msi_t al_msix_release_msi; static msi_alloc_msix_t al_msix_alloc_msix; static msi_release_msix_t al_msix_release_msix; static msi_map_msi_t al_msix_map_msi; static int al_find_intr_pos_in_map(device_t, struct intr_irqsrc *); static struct ofw_compat_data compat_data[] = { {"annapurna-labs,al-msix", true}, {"annapurna-labs,alpine-msix", true}, {NULL, false} }; /* * Bus interface definitions. */ static device_method_t al_msix_methods[] = { DEVMETHOD(device_probe, al_msix_probe), DEVMETHOD(device_attach, al_msix_attach), /* Interrupt controller interface */ DEVMETHOD(msi_alloc_msi, al_msix_alloc_msi), DEVMETHOD(msi_release_msi, al_msix_release_msi), DEVMETHOD(msi_alloc_msix, al_msix_alloc_msix), DEVMETHOD(msi_release_msix, al_msix_release_msix), DEVMETHOD(msi_map_msi, al_msix_map_msi), DEVMETHOD_END }; struct al_msix_softc { bus_addr_t base_addr; struct resource *res; uint32_t irq_min; uint32_t irq_max; uint32_t irq_count; struct mtx msi_mtx; vmem_t *irq_alloc; device_t gic_dev; /* Table of isrcs maps isrc pointer to vmem_alloc'd irq number */ struct intr_irqsrc *isrcs[MAX_MSIX_COUNT]; }; static driver_t al_msix_driver = { "al_msix", al_msix_methods, sizeof(struct al_msix_softc), }; devclass_t al_msix_devclass; DRIVER_MODULE(al_msix, ofwbus, al_msix_driver, al_msix_devclass, 0, 0); DRIVER_MODULE(al_msix, simplebus, al_msix_driver, al_msix_devclass, 0, 0); MALLOC_DECLARE(M_AL_MSIX); MALLOC_DEFINE(M_AL_MSIX, "al_msix", "Alpine MSIX"); static int al_msix_probe(device_t dev) { if (!ofw_bus_status_okay(dev)) return (ENXIO); if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) return (ENXIO); device_set_desc(dev, "Annapurna-Labs MSI-X Controller"); return (BUS_PROBE_DEFAULT); } static int al_msix_attach(device_t dev) { struct al_msix_softc *sc; device_t gic_dev; phandle_t iparent; phandle_t node; intptr_t xref; int interrupts[INTR_RANGE_COUNT]; int nintr, i, rid; uint32_t icells, *intr; sc = device_get_softc(dev); node = ofw_bus_get_node(dev); xref = OF_xref_from_node(node); OF_device_register_xref(xref, dev); rid = 0; sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (sc->res == NULL) { device_printf(dev, "Failed to allocate resource\n"); return (ENXIO); } sc->base_addr = (bus_addr_t)rman_get_start(sc->res); /* Register this device to handle MSI interrupts */ if (intr_msi_register(dev, xref) != 0) { device_printf(dev, "could not register MSI-X controller\n"); return (ENXIO); } else device_printf(dev, "MSI-X controller registered\n"); /* Find root interrupt controller */ iparent = ofw_bus_find_iparent(node); if (iparent == 0) { device_printf(dev, "No interrupt-parrent found. " "Error in DTB\n"); return (ENXIO); } else { /* While at parent - store interrupt cells prop */ if (OF_searchencprop(OF_node_from_xref(iparent), "#interrupt-cells", &icells, sizeof(icells)) == -1) { device_printf(dev, "DTB: Missing #interrupt-cells " "property in GIC node\n"); return (ENXIO); } } gic_dev = OF_device_from_xref(iparent); if (gic_dev == NULL) { device_printf(dev, "Cannot find GIC device\n"); return (ENXIO); } sc->gic_dev = gic_dev; /* Manually read range of interrupts from DTB */ - nintr = OF_getencprop_alloc(node, "interrupts", sizeof(*intr), + nintr = OF_getencprop_alloc_multi(node, "interrupts", sizeof(*intr), (void **)&intr); if (nintr == 0) { device_printf(dev, "Cannot read interrupts prop from DTB\n"); return (ENXIO); } else if ((nintr / icells) != INTR_RANGE_COUNT) { /* Supposed to have min and max value only */ device_printf(dev, "Unexpected count of interrupts " "in DTB node\n"); return (EINVAL); } /* Read interrupt range values */ for (i = 0; i < INTR_RANGE_COUNT; i++) interrupts[i] = intr[(i * icells) + IRQ_OFFSET]; sc->irq_min = interrupts[0]; sc->irq_max = interrupts[1]; sc->irq_count = (sc->irq_max - sc->irq_min + 1); if (sc->irq_count > MAX_MSIX_COUNT) { device_printf(dev, "Available MSI-X count exceeds buffer size." " Capping to %d\n", MAX_MSIX_COUNT); sc->irq_count = MAX_MSIX_COUNT; } mtx_init(&sc->msi_mtx, "msi_mtx", NULL, MTX_DEF); sc->irq_alloc = vmem_create("Alpine MSI-X IRQs", 0, sc->irq_count, 1, 0, M_FIRSTFIT | M_WAITOK); device_printf(dev, "MSI-X SPI IRQ %d-%d\n", sc->irq_min, sc->irq_max); return (bus_generic_attach(dev)); } static int al_find_intr_pos_in_map(device_t dev, struct intr_irqsrc *isrc) { struct al_msix_softc *sc; int i; sc = device_get_softc(dev); for (i = 0; i < MAX_MSIX_COUNT; i++) if (sc->isrcs[i] == isrc) return (i); return (ERR_NOT_IN_MAP); } static int al_msix_map_msi(device_t dev, device_t child, struct intr_irqsrc *isrc, uint64_t *addr, uint32_t *data) { struct al_msix_softc *sc; int i, spi; sc = device_get_softc(dev); i = al_find_intr_pos_in_map(dev, isrc); if (i == ERR_NOT_IN_MAP) return (EINVAL); spi = sc->irq_min + i; /* * MSIX message address format: * [63:20] - MSIx TBAR * Same value as the MSIx Translation Base Address Register * [19] - WFE_EXIT * Once set by MSIx message, an EVENTI is signal to the CPUs * cluster specified by ‘Local GIC Target List’ * [18:17] - Target GIC ID * Specifies which IO-GIC (external shared GIC) is targeted * 0: Local GIC, as specified by the Local GIC Target List * 1: IO-GIC 0 * 2: Reserved * 3: Reserved * [16:13] - Local GIC Target List * Specifies the Local GICs list targeted by this MSIx * message. * [16] If set, SPIn is set in Cluster 0 local GIC * [15:13] Reserved * [15] If set, SPIn is set in Cluster 1 local GIC * [14] If set, SPIn is set in Cluster 2 local GIC * [13] If set, SPIn is set in Cluster 3 local GIC * [12:3] - SPIn * Specifies the SPI (Shared Peripheral Interrupt) index to * be set in target GICs * Notes: * If targeting any local GIC than only SPI[249:0] are valid * [2] - Function vector * MSI Data vector extension hint * [1:0] - Reserved * Must be set to zero */ *addr = (uint64_t)sc->base_addr + (uint64_t)((1 << 16) + (spi << 3)); *data = 0; if (bootverbose) device_printf(dev, "MSI mapping: SPI: %d addr: %jx data: %x\n", spi, (uintmax_t)*addr, *data); return (0); } static int al_msix_alloc_msi(device_t dev, device_t child, int count, int maxcount, device_t *pic, struct intr_irqsrc **srcs) { struct intr_map_data_fdt *fdt_data; struct al_msix_softc *sc; vmem_addr_t irq_base; int error; u_int i, j; sc = device_get_softc(dev); if ((powerof2(count) == 0) || (count > 8)) return (EINVAL); if (vmem_alloc(sc->irq_alloc, count, M_FIRSTFIT | M_NOWAIT, &irq_base) != 0) return (ENOMEM); /* Fabricate OFW data to get ISRC from GIC and return it */ fdt_data = malloc(sizeof(*fdt_data) + GIC_INTR_CELL_CNT * sizeof(pcell_t), M_AL_MSIX, M_WAITOK); fdt_data->hdr.type = INTR_MAP_DATA_FDT; fdt_data->iparent = 0; fdt_data->ncells = GIC_INTR_CELL_CNT; fdt_data->cells[0] = AL_SPI_INTR; /* code for SPI interrupt */ fdt_data->cells[1] = 0; /* SPI number (uninitialized) */ fdt_data->cells[2] = AL_EDGE_HIGH; /* trig = edge, pol = high */ mtx_lock(&sc->msi_mtx); for (i = irq_base; i < irq_base + count; i++) { fdt_data->cells[1] = sc->irq_min + i; error = PIC_MAP_INTR(sc->gic_dev, (struct intr_map_data *)fdt_data, srcs); if (error) { for (j = irq_base; j < i; j++) sc->isrcs[j] = NULL; mtx_unlock(&sc->msi_mtx); vmem_free(sc->irq_alloc, irq_base, count); free(fdt_data, M_AL_MSIX); return (error); } sc->isrcs[i] = *srcs; srcs++; } mtx_unlock(&sc->msi_mtx); free(fdt_data, M_AL_MSIX); if (bootverbose) device_printf(dev, "MSI-X allocation: start SPI %d, count %d\n", (int)irq_base + sc->irq_min, count); *pic = sc->gic_dev; return (0); } static int al_msix_release_msi(device_t dev, device_t child, int count, struct intr_irqsrc **srcs) { struct al_msix_softc *sc; int i, pos; sc = device_get_softc(dev); mtx_lock(&sc->msi_mtx); pos = al_find_intr_pos_in_map(dev, *srcs); vmem_free(sc->irq_alloc, pos, count); for (i = 0; i < count; i++) { pos = al_find_intr_pos_in_map(dev, *srcs); if (pos != ERR_NOT_IN_MAP) sc->isrcs[pos] = NULL; srcs++; } mtx_unlock(&sc->msi_mtx); return (0); } static int al_msix_alloc_msix(device_t dev, device_t child, device_t *pic, struct intr_irqsrc **isrcp) { return (al_msix_alloc_msi(dev, child, 1, 1, pic, isrcp)); } static int al_msix_release_msix(device_t dev, device_t child, struct intr_irqsrc *isrc) { return (al_msix_release_msi(dev, child, 1, &isrc)); } Index: head/sys/arm/at91/at91_pinctrl.c =================================================================== --- head/sys/arm/at91/at91_pinctrl.c (revision 332340) +++ head/sys/arm/at91/at91_pinctrl.c (revision 332341) @@ -1,516 +1,517 @@ /*- * Copyright (c) 2014 Warner Losh. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #define BUS_PASS_PINMUX (BUS_PASS_INTERRUPT + 1) struct pinctrl_range { uint64_t bus; uint64_t host; uint64_t size; }; struct pinctrl_softc { device_t dev; phandle_t node; struct pinctrl_range *ranges; int nranges; pcell_t acells, scells; int done_pinmux; }; struct pinctrl_devinfo { struct ofw_bus_devinfo obdinfo; struct resource_list rl; }; static int at91_pinctrl_probe(device_t dev) { if (!ofw_bus_is_compatible(dev, "atmel,at91rm9200-pinctrl")) return (ENXIO); device_set_desc(dev, "pincontrol bus"); return (0); } /* XXX Make this a subclass of simplebus */ static struct pinctrl_devinfo * at91_pinctrl_setup_dinfo(device_t dev, phandle_t node) { struct pinctrl_softc *sc; struct pinctrl_devinfo *ndi; uint32_t *reg, *intr, icells; uint64_t phys, size; phandle_t iparent; int i, j, k; int nintr; int nreg; sc = device_get_softc(dev); ndi = malloc(sizeof(*ndi), M_DEVBUF, M_WAITOK | M_ZERO); if (ofw_bus_gen_setup_devinfo(&ndi->obdinfo, node) != 0) { free(ndi, M_DEVBUF); return (NULL); } resource_list_init(&ndi->rl); - nreg = OF_getencprop_alloc(node, "reg", sizeof(*reg), (void **)®); + nreg = OF_getencprop_alloc_multi(node, "reg", sizeof(*reg), + (void **)®); if (nreg == -1) nreg = 0; if (nreg % (sc->acells + sc->scells) != 0) { // if (bootverbose) device_printf(dev, "Malformed reg property on <%s>\n", ndi->obdinfo.obd_name); nreg = 0; } for (i = 0, k = 0; i < nreg; i += sc->acells + sc->scells, k++) { phys = size = 0; for (j = 0; j < sc->acells; j++) { phys <<= 32; phys |= reg[i + j]; } for (j = 0; j < sc->scells; j++) { size <<= 32; size |= reg[i + sc->acells + j]; } resource_list_add(&ndi->rl, SYS_RES_MEMORY, k, phys, phys + size - 1, size); } OF_prop_free(reg); - nintr = OF_getencprop_alloc(node, "interrupts", sizeof(*intr), + nintr = OF_getencprop_alloc_multi(node, "interrupts", sizeof(*intr), (void **)&intr); if (nintr > 0) { if (OF_searchencprop(node, "interrupt-parent", &iparent, sizeof(iparent)) == -1) { device_printf(dev, "No interrupt-parent found, " "assuming direct parent\n"); iparent = OF_parent(node); } if (OF_searchencprop(OF_node_from_xref(iparent), "#interrupt-cells", &icells, sizeof(icells)) == -1) { device_printf(dev, "Missing #interrupt-cells property," " assuming <1>\n"); icells = 1; } if (icells < 1 || icells > nintr) { device_printf(dev, "Invalid #interrupt-cells property " "value <%d>, assuming <1>\n", icells); icells = 1; } for (i = 0, k = 0; i < nintr; i += icells, k++) { intr[i] = ofw_bus_map_intr(dev, iparent, icells, &intr[i]); resource_list_add(&ndi->rl, SYS_RES_IRQ, k, intr[i], intr[i], 1); } OF_prop_free(intr); } return (ndi); } static int at91_pinctrl_fill_ranges(phandle_t node, struct pinctrl_softc *sc) { int host_address_cells; cell_t *base_ranges; ssize_t nbase_ranges; int err; int i, j, k; err = OF_searchencprop(OF_parent(node), "#address-cells", &host_address_cells, sizeof(host_address_cells)); if (err <= 0) return (-1); nbase_ranges = OF_getproplen(node, "ranges"); if (nbase_ranges < 0) return (-1); sc->nranges = nbase_ranges / sizeof(cell_t) / (sc->acells + host_address_cells + sc->scells); if (sc->nranges == 0) return (0); sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]), M_DEVBUF, M_WAITOK); base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK); OF_getencprop(node, "ranges", base_ranges, nbase_ranges); for (i = 0, j = 0; i < sc->nranges; i++) { sc->ranges[i].bus = 0; for (k = 0; k < sc->acells; k++) { sc->ranges[i].bus <<= 32; sc->ranges[i].bus |= base_ranges[j++]; } sc->ranges[i].host = 0; for (k = 0; k < host_address_cells; k++) { sc->ranges[i].host <<= 32; sc->ranges[i].host |= base_ranges[j++]; } sc->ranges[i].size = 0; for (k = 0; k < sc->scells; k++) { sc->ranges[i].size <<= 32; sc->ranges[i].size |= base_ranges[j++]; } } free(base_ranges, M_DEVBUF); return (sc->nranges); } static int at91_pinctrl_attach(device_t dev) { struct pinctrl_softc *sc; struct pinctrl_devinfo *di; phandle_t node; device_t cdev; sc = device_get_softc(dev); node = ofw_bus_get_node(dev); sc->dev = dev; sc->node = node; /* * Some important numbers */ sc->acells = 2; OF_getencprop(node, "#address-cells", &sc->acells, sizeof(sc->acells)); sc->scells = 1; OF_getencprop(node, "#size-cells", &sc->scells, sizeof(sc->scells)); if (at91_pinctrl_fill_ranges(node, sc) < 0) { device_printf(dev, "could not get ranges\n"); return (ENXIO); } for (node = OF_child(node); node > 0; node = OF_peer(node)) { if ((di = at91_pinctrl_setup_dinfo(dev, node)) == NULL) continue; cdev = device_add_child(dev, NULL, -1); if (cdev == NULL) { device_printf(dev, "<%s>: device_add_child failed\n", di->obdinfo.obd_name); resource_list_free(&di->rl); ofw_bus_gen_destroy_devinfo(&di->obdinfo); free(di, M_DEVBUF); continue; } device_set_ivars(cdev, di); } fdt_pinctrl_register(dev, "atmel,pins"); return (bus_generic_attach(dev)); } static const struct ofw_bus_devinfo * pinctrl_get_devinfo(device_t bus __unused, device_t child) { struct pinctrl_devinfo *ndi; ndi = device_get_ivars(child); return (&ndi->obdinfo); } static struct resource * pinctrl_alloc_resource(device_t bus, device_t child, int type, int *rid, u_long start, u_long end, u_long count, u_int flags) { struct pinctrl_softc *sc; struct pinctrl_devinfo *di; struct resource_list_entry *rle; int j; sc = device_get_softc(bus); /* * Request for the default allocation with a given rid: use resource * list stored in the local device info. */ if (RMAN_IS_DEFAULT_RANGE(start, end)) { if ((di = device_get_ivars(child)) == NULL) return (NULL); if (type == SYS_RES_IOPORT) type = SYS_RES_MEMORY; rle = resource_list_find(&di->rl, type, *rid); if (rle == NULL) { // if (bootverbose) device_printf(bus, "no default resources for " "rid = %d, type = %d\n", *rid, type); return (NULL); } start = rle->start; end = rle->end; count = rle->count; } if (type == SYS_RES_MEMORY) { /* Remap through ranges property */ for (j = 0; j < sc->nranges; j++) { if (start >= sc->ranges[j].bus && end < sc->ranges[j].bus + sc->ranges[j].size) { start -= sc->ranges[j].bus; start += sc->ranges[j].host; end -= sc->ranges[j].bus; end += sc->ranges[j].host; break; } } if (j == sc->nranges && sc->nranges != 0) { // if (bootverbose) device_printf(bus, "Could not map resource " "%#lx-%#lx\n", start, end); return (NULL); } } return (bus_generic_alloc_resource(bus, child, type, rid, start, end, count, flags)); } static int pinctrl_print_res(struct pinctrl_devinfo *di) { int rv; rv = 0; rv += resource_list_print_type(&di->rl, "mem", SYS_RES_MEMORY, "%#jx"); rv += resource_list_print_type(&di->rl, "irq", SYS_RES_IRQ, "%jd"); return (rv); } static void pinctrl_probe_nomatch(device_t bus, device_t child) { const char *name, *type, *compat; // if (!bootverbose) return; name = ofw_bus_get_name(child); type = ofw_bus_get_type(child); compat = ofw_bus_get_compat(child); device_printf(bus, "<%s>", name != NULL ? name : "unknown"); pinctrl_print_res(device_get_ivars(child)); if (!ofw_bus_status_okay(child)) printf(" disabled"); if (type) printf(" type %s", type); if (compat) printf(" compat %s", compat); printf(" (no driver attached)\n"); } static int pinctrl_print_child(device_t bus, device_t child) { int rv; rv = bus_print_child_header(bus, child); rv += pinctrl_print_res(device_get_ivars(child)); if (!ofw_bus_status_okay(child)) rv += printf(" disabled"); rv += bus_print_child_footer(bus, child); return (rv); } const char *periphs[] = {"gpio", "periph A", "periph B", "periph C", "periph D", "periph E" }; struct pincfg { uint32_t unit; uint32_t pin; uint32_t periph; uint32_t flags; }; static int pinctrl_configure_pins(device_t bus, phandle_t cfgxref) { struct pinctrl_softc *sc; struct pincfg *cfg, *cfgdata; char name[32]; phandle_t node; ssize_t npins; int i; sc = device_get_softc(bus); node = OF_node_from_xref(cfgxref); memset(name, 0, sizeof(name)); OF_getprop(node, "name", name, sizeof(name)); - npins = OF_getencprop_alloc(node, "atmel,pins", sizeof(*cfgdata), + npins = OF_getencprop_alloc_multi(node, "atmel,pins", sizeof(*cfgdata), (void **)&cfgdata); if (npins < 0) { printf("We're doing it wrong %s\n", name); return (ENXIO); } if (npins == 0) return (0); for (i = 0, cfg = cfgdata; i < npins; i++, cfg++) { uint32_t pio; pio = (0xfffffff & sc->ranges[0].bus) + 0x200 * cfg->unit; printf("P%c%d %s %#x\n", cfg->unit + 'A', cfg->pin, periphs[cfg->periph], cfg->flags); switch (cfg->periph) { case 0: at91_pio_use_gpio(pio, 1u << cfg->pin); at91_pio_gpio_pullup(pio, 1u << cfg->pin, !!(cfg->flags & 1)); at91_pio_gpio_high_z(pio, 1u << cfg->pin, !!(cfg->flags & 2)); at91_pio_gpio_set_deglitch(pio, 1u << cfg->pin, !!(cfg->flags & 4)); // at91_pio_gpio_pulldown(pio, 1u << cfg->pin, // !!(cfg->flags & 8)); // at91_pio_gpio_dis_schmidt(pio, // 1u << cfg->pin, !!(cfg->flags & 16)); break; case 1: at91_pio_use_periph_a(pio, 1u << cfg->pin, cfg->flags); break; case 2: at91_pio_use_periph_b(pio, 1u << cfg->pin, cfg->flags); break; } } OF_prop_free(cfgdata); return (0); } static void pinctrl_new_pass(device_t bus) { struct pinctrl_softc *sc; sc = device_get_softc(bus); bus_generic_new_pass(bus); if (sc->done_pinmux || bus_current_pass < BUS_PASS_PINMUX) return; sc->done_pinmux++; fdt_pinctrl_configure_tree(bus); } static device_method_t at91_pinctrl_methods[] = { DEVMETHOD(device_probe, at91_pinctrl_probe), DEVMETHOD(device_attach, at91_pinctrl_attach), DEVMETHOD(bus_print_child, pinctrl_print_child), DEVMETHOD(bus_probe_nomatch, pinctrl_probe_nomatch), DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), DEVMETHOD(bus_alloc_resource, pinctrl_alloc_resource), DEVMETHOD(bus_release_resource, bus_generic_release_resource), DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource), DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), DEVMETHOD(bus_new_pass, pinctrl_new_pass), /* ofw_bus interface */ DEVMETHOD(ofw_bus_get_devinfo, pinctrl_get_devinfo), DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), /* fdt_pintrl interface */ DEVMETHOD(fdt_pinctrl_configure,pinctrl_configure_pins), DEVMETHOD_END }; static driver_t at91_pinctrl_driver = { "at91_pinctrl", at91_pinctrl_methods, sizeof(struct pinctrl_softc), }; static devclass_t at91_pinctrl_devclass; EARLY_DRIVER_MODULE(at91_pinctrl, simplebus, at91_pinctrl_driver, at91_pinctrl_devclass, NULL, NULL, BUS_PASS_BUS); /* * dummy driver to force pass BUS_PASS_PINMUX to happen. */ static int at91_pingroup_probe(device_t dev) { return ENXIO; } static device_method_t at91_pingroup_methods[] = { DEVMETHOD(device_probe, at91_pingroup_probe), DEVMETHOD_END }; static driver_t at91_pingroup_driver = { "at91_pingroup", at91_pingroup_methods, 0, }; static devclass_t at91_pingroup_devclass; EARLY_DRIVER_MODULE(at91_pingroup, at91_pinctrl, at91_pingroup_driver, at91_pingroup_devclass, NULL, NULL, BUS_PASS_PINMUX); Index: head/sys/arm/broadcom/bcm2835/bcm2835_gpio.c =================================================================== --- head/sys/arm/broadcom/bcm2835/bcm2835_gpio.c (revision 332340) +++ head/sys/arm/broadcom/bcm2835/bcm2835_gpio.c (revision 332341) @@ -1,1324 +1,1324 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2012 Oleksandr Tymoshenko * Copyright (c) 2012-2015 Luiz Otavio O Souza * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * */ #include __FBSDID("$FreeBSD$"); #include "opt_platform.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "gpio_if.h" #include "pic_if.h" #ifdef DEBUG #define dprintf(fmt, args...) do { printf("%s(): ", __func__); \ printf(fmt,##args); } while (0) #else #define dprintf(fmt, args...) #endif #define BCM_GPIO_IRQS 4 #define BCM_GPIO_PINS 54 #define BCM_GPIO_PINS_PER_BANK 32 #define BCM_GPIO_DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \ GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN | GPIO_INTR_LEVEL_LOW | \ GPIO_INTR_LEVEL_HIGH | GPIO_INTR_EDGE_RISING | \ GPIO_INTR_EDGE_FALLING | GPIO_INTR_EDGE_BOTH) #define BCM2835_FSEL_GPIO_IN 0 #define BCM2835_FSEL_GPIO_OUT 1 #define BCM2835_FSEL_ALT5 2 #define BCM2835_FSEL_ALT4 3 #define BCM2835_FSEL_ALT0 4 #define BCM2835_FSEL_ALT1 5 #define BCM2835_FSEL_ALT2 6 #define BCM2835_FSEL_ALT3 7 #define BCM2835_PUD_OFF 0 #define BCM2835_PUD_DOWN 1 #define BCM2835_PUD_UP 2 static struct resource_spec bcm_gpio_res_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, { SYS_RES_IRQ, 0, RF_ACTIVE }, /* bank 0 interrupt */ { SYS_RES_IRQ, 1, RF_ACTIVE }, /* bank 1 interrupt */ { -1, 0, 0 } }; struct bcm_gpio_sysctl { struct bcm_gpio_softc *sc; uint32_t pin; }; struct bcm_gpio_irqsrc { struct intr_irqsrc bgi_isrc; uint32_t bgi_irq; uint32_t bgi_mode; uint32_t bgi_mask; }; struct bcm_gpio_softc { device_t sc_dev; device_t sc_busdev; struct mtx sc_mtx; struct resource * sc_res[BCM_GPIO_IRQS + 1]; bus_space_tag_t sc_bst; bus_space_handle_t sc_bsh; void * sc_intrhand[BCM_GPIO_IRQS]; int sc_gpio_npins; int sc_ro_npins; int sc_ro_pins[BCM_GPIO_PINS]; struct gpio_pin sc_gpio_pins[BCM_GPIO_PINS]; struct bcm_gpio_sysctl sc_sysctl[BCM_GPIO_PINS]; struct bcm_gpio_irqsrc sc_isrcs[BCM_GPIO_PINS]; }; enum bcm_gpio_pud { BCM_GPIO_NONE, BCM_GPIO_PULLDOWN, BCM_GPIO_PULLUP, }; #define BCM_GPIO_LOCK(_sc) mtx_lock_spin(&(_sc)->sc_mtx) #define BCM_GPIO_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->sc_mtx) #define BCM_GPIO_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED) #define BCM_GPIO_WRITE(_sc, _off, _val) \ bus_space_write_4((_sc)->sc_bst, (_sc)->sc_bsh, _off, _val) #define BCM_GPIO_READ(_sc, _off) \ bus_space_read_4((_sc)->sc_bst, (_sc)->sc_bsh, _off) #define BCM_GPIO_CLEAR_BITS(_sc, _off, _bits) \ BCM_GPIO_WRITE(_sc, _off, BCM_GPIO_READ(_sc, _off) & ~(_bits)) #define BCM_GPIO_SET_BITS(_sc, _off, _bits) \ BCM_GPIO_WRITE(_sc, _off, BCM_GPIO_READ(_sc, _off) | _bits) #define BCM_GPIO_BANK(a) (a / BCM_GPIO_PINS_PER_BANK) #define BCM_GPIO_MASK(a) (1U << (a % BCM_GPIO_PINS_PER_BANK)) #define BCM_GPIO_GPFSEL(_bank) (0x00 + _bank * 4) /* Function Select */ #define BCM_GPIO_GPSET(_bank) (0x1c + _bank * 4) /* Pin Out Set */ #define BCM_GPIO_GPCLR(_bank) (0x28 + _bank * 4) /* Pin Out Clear */ #define BCM_GPIO_GPLEV(_bank) (0x34 + _bank * 4) /* Pin Level */ #define BCM_GPIO_GPEDS(_bank) (0x40 + _bank * 4) /* Event Status */ #define BCM_GPIO_GPREN(_bank) (0x4c + _bank * 4) /* Rising Edge irq */ #define BCM_GPIO_GPFEN(_bank) (0x58 + _bank * 4) /* Falling Edge irq */ #define BCM_GPIO_GPHEN(_bank) (0x64 + _bank * 4) /* High Level irq */ #define BCM_GPIO_GPLEN(_bank) (0x70 + _bank * 4) /* Low Level irq */ #define BCM_GPIO_GPAREN(_bank) (0x7c + _bank * 4) /* Async Rising Edge */ #define BCM_GPIO_GPAFEN(_bank) (0x88 + _bank * 4) /* Async Falling Egde */ #define BCM_GPIO_GPPUD(_bank) (0x94) /* Pin Pull up/down */ #define BCM_GPIO_GPPUDCLK(_bank) (0x98 + _bank * 4) /* Pin Pull up clock */ static struct ofw_compat_data compat_data[] = { {"broadcom,bcm2835-gpio", 1}, {"brcm,bcm2835-gpio", 1}, {NULL, 0} }; static struct bcm_gpio_softc *bcm_gpio_sc = NULL; static int bcm_gpio_intr_bank0(void *arg); static int bcm_gpio_intr_bank1(void *arg); static int bcm_gpio_pic_attach(struct bcm_gpio_softc *sc); static int bcm_gpio_pic_detach(struct bcm_gpio_softc *sc); static int bcm_gpio_pin_is_ro(struct bcm_gpio_softc *sc, int pin) { int i; for (i = 0; i < sc->sc_ro_npins; i++) if (pin == sc->sc_ro_pins[i]) return (1); return (0); } static uint32_t bcm_gpio_get_function(struct bcm_gpio_softc *sc, uint32_t pin) { uint32_t bank, func, offset; /* Five banks, 10 pins per bank, 3 bits per pin. */ bank = pin / 10; offset = (pin - bank * 10) * 3; BCM_GPIO_LOCK(sc); func = (BCM_GPIO_READ(sc, BCM_GPIO_GPFSEL(bank)) >> offset) & 7; BCM_GPIO_UNLOCK(sc); return (func); } static void bcm_gpio_func_str(uint32_t nfunc, char *buf, int bufsize) { switch (nfunc) { case BCM2835_FSEL_GPIO_IN: strncpy(buf, "input", bufsize); break; case BCM2835_FSEL_GPIO_OUT: strncpy(buf, "output", bufsize); break; case BCM2835_FSEL_ALT0: strncpy(buf, "alt0", bufsize); break; case BCM2835_FSEL_ALT1: strncpy(buf, "alt1", bufsize); break; case BCM2835_FSEL_ALT2: strncpy(buf, "alt2", bufsize); break; case BCM2835_FSEL_ALT3: strncpy(buf, "alt3", bufsize); break; case BCM2835_FSEL_ALT4: strncpy(buf, "alt4", bufsize); break; case BCM2835_FSEL_ALT5: strncpy(buf, "alt5", bufsize); break; default: strncpy(buf, "invalid", bufsize); } } static int bcm_gpio_str_func(char *func, uint32_t *nfunc) { if (strcasecmp(func, "input") == 0) *nfunc = BCM2835_FSEL_GPIO_IN; else if (strcasecmp(func, "output") == 0) *nfunc = BCM2835_FSEL_GPIO_OUT; else if (strcasecmp(func, "alt0") == 0) *nfunc = BCM2835_FSEL_ALT0; else if (strcasecmp(func, "alt1") == 0) *nfunc = BCM2835_FSEL_ALT1; else if (strcasecmp(func, "alt2") == 0) *nfunc = BCM2835_FSEL_ALT2; else if (strcasecmp(func, "alt3") == 0) *nfunc = BCM2835_FSEL_ALT3; else if (strcasecmp(func, "alt4") == 0) *nfunc = BCM2835_FSEL_ALT4; else if (strcasecmp(func, "alt5") == 0) *nfunc = BCM2835_FSEL_ALT5; else return (-1); return (0); } static uint32_t bcm_gpio_func_flag(uint32_t nfunc) { switch (nfunc) { case BCM2835_FSEL_GPIO_IN: return (GPIO_PIN_INPUT); case BCM2835_FSEL_GPIO_OUT: return (GPIO_PIN_OUTPUT); } return (0); } static void bcm_gpio_set_function(struct bcm_gpio_softc *sc, uint32_t pin, uint32_t f) { uint32_t bank, data, offset; /* Must be called with lock held. */ BCM_GPIO_LOCK_ASSERT(sc); /* Five banks, 10 pins per bank, 3 bits per pin. */ bank = pin / 10; offset = (pin - bank * 10) * 3; data = BCM_GPIO_READ(sc, BCM_GPIO_GPFSEL(bank)); data &= ~(7 << offset); data |= (f << offset); BCM_GPIO_WRITE(sc, BCM_GPIO_GPFSEL(bank), data); } static void bcm_gpio_set_pud(struct bcm_gpio_softc *sc, uint32_t pin, uint32_t state) { uint32_t bank; /* Must be called with lock held. */ BCM_GPIO_LOCK_ASSERT(sc); bank = BCM_GPIO_BANK(pin); BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUD(0), state); BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUDCLK(bank), BCM_GPIO_MASK(pin)); BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUD(0), 0); BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUDCLK(bank), 0); } static void bcm_gpio_set_alternate(device_t dev, uint32_t pin, uint32_t nfunc) { struct bcm_gpio_softc *sc; int i; sc = device_get_softc(dev); BCM_GPIO_LOCK(sc); /* Set the pin function. */ bcm_gpio_set_function(sc, pin, nfunc); /* Update the pin flags. */ for (i = 0; i < sc->sc_gpio_npins; i++) { if (sc->sc_gpio_pins[i].gp_pin == pin) break; } if (i < sc->sc_gpio_npins) sc->sc_gpio_pins[i].gp_flags = bcm_gpio_func_flag(nfunc); BCM_GPIO_UNLOCK(sc); } static void bcm_gpio_pin_configure(struct bcm_gpio_softc *sc, struct gpio_pin *pin, unsigned int flags) { BCM_GPIO_LOCK(sc); /* * Manage input/output. */ if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) { pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT); if (flags & GPIO_PIN_OUTPUT) { pin->gp_flags |= GPIO_PIN_OUTPUT; bcm_gpio_set_function(sc, pin->gp_pin, BCM2835_FSEL_GPIO_OUT); } else { pin->gp_flags |= GPIO_PIN_INPUT; bcm_gpio_set_function(sc, pin->gp_pin, BCM2835_FSEL_GPIO_IN); } } /* Manage Pull-up/pull-down. */ pin->gp_flags &= ~(GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN); if (flags & (GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN)) { if (flags & GPIO_PIN_PULLUP) { pin->gp_flags |= GPIO_PIN_PULLUP; bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_PULLUP); } else { pin->gp_flags |= GPIO_PIN_PULLDOWN; bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_PULLDOWN); } } else bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_NONE); BCM_GPIO_UNLOCK(sc); } static device_t bcm_gpio_get_bus(device_t dev) { struct bcm_gpio_softc *sc; sc = device_get_softc(dev); return (sc->sc_busdev); } static int bcm_gpio_pin_max(device_t dev, int *maxpin) { *maxpin = BCM_GPIO_PINS - 1; return (0); } static int bcm_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) { struct bcm_gpio_softc *sc = device_get_softc(dev); int i; for (i = 0; i < sc->sc_gpio_npins; i++) { if (sc->sc_gpio_pins[i].gp_pin == pin) break; } if (i >= sc->sc_gpio_npins) return (EINVAL); BCM_GPIO_LOCK(sc); *caps = sc->sc_gpio_pins[i].gp_caps; BCM_GPIO_UNLOCK(sc); return (0); } static int bcm_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) { struct bcm_gpio_softc *sc = device_get_softc(dev); int i; for (i = 0; i < sc->sc_gpio_npins; i++) { if (sc->sc_gpio_pins[i].gp_pin == pin) break; } if (i >= sc->sc_gpio_npins) return (EINVAL); BCM_GPIO_LOCK(sc); *flags = sc->sc_gpio_pins[i].gp_flags; BCM_GPIO_UNLOCK(sc); return (0); } static int bcm_gpio_pin_getname(device_t dev, uint32_t pin, char *name) { struct bcm_gpio_softc *sc = device_get_softc(dev); int i; for (i = 0; i < sc->sc_gpio_npins; i++) { if (sc->sc_gpio_pins[i].gp_pin == pin) break; } if (i >= sc->sc_gpio_npins) return (EINVAL); BCM_GPIO_LOCK(sc); memcpy(name, sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME); BCM_GPIO_UNLOCK(sc); return (0); } static int bcm_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) { struct bcm_gpio_softc *sc = device_get_softc(dev); int i; for (i = 0; i < sc->sc_gpio_npins; i++) { if (sc->sc_gpio_pins[i].gp_pin == pin) break; } if (i >= sc->sc_gpio_npins) return (EINVAL); /* We never touch on read-only/reserved pins. */ if (bcm_gpio_pin_is_ro(sc, pin)) return (EINVAL); bcm_gpio_pin_configure(sc, &sc->sc_gpio_pins[i], flags); return (0); } static int bcm_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) { struct bcm_gpio_softc *sc = device_get_softc(dev); uint32_t bank, reg; int i; for (i = 0; i < sc->sc_gpio_npins; i++) { if (sc->sc_gpio_pins[i].gp_pin == pin) break; } if (i >= sc->sc_gpio_npins) return (EINVAL); /* We never write to read-only/reserved pins. */ if (bcm_gpio_pin_is_ro(sc, pin)) return (EINVAL); BCM_GPIO_LOCK(sc); bank = BCM_GPIO_BANK(pin); if (value) reg = BCM_GPIO_GPSET(bank); else reg = BCM_GPIO_GPCLR(bank); BCM_GPIO_WRITE(sc, reg, BCM_GPIO_MASK(pin)); BCM_GPIO_UNLOCK(sc); return (0); } static int bcm_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) { struct bcm_gpio_softc *sc = device_get_softc(dev); uint32_t bank, reg_data; int i; for (i = 0; i < sc->sc_gpio_npins; i++) { if (sc->sc_gpio_pins[i].gp_pin == pin) break; } if (i >= sc->sc_gpio_npins) return (EINVAL); bank = BCM_GPIO_BANK(pin); BCM_GPIO_LOCK(sc); reg_data = BCM_GPIO_READ(sc, BCM_GPIO_GPLEV(bank)); BCM_GPIO_UNLOCK(sc); *val = (reg_data & BCM_GPIO_MASK(pin)) ? 1 : 0; return (0); } static int bcm_gpio_pin_toggle(device_t dev, uint32_t pin) { struct bcm_gpio_softc *sc = device_get_softc(dev); uint32_t bank, data, reg; int i; for (i = 0; i < sc->sc_gpio_npins; i++) { if (sc->sc_gpio_pins[i].gp_pin == pin) break; } if (i >= sc->sc_gpio_npins) return (EINVAL); /* We never write to read-only/reserved pins. */ if (bcm_gpio_pin_is_ro(sc, pin)) return (EINVAL); BCM_GPIO_LOCK(sc); bank = BCM_GPIO_BANK(pin); data = BCM_GPIO_READ(sc, BCM_GPIO_GPLEV(bank)); if (data & BCM_GPIO_MASK(pin)) reg = BCM_GPIO_GPCLR(bank); else reg = BCM_GPIO_GPSET(bank); BCM_GPIO_WRITE(sc, reg, BCM_GPIO_MASK(pin)); BCM_GPIO_UNLOCK(sc); return (0); } static int bcm_gpio_func_proc(SYSCTL_HANDLER_ARGS) { char buf[16]; struct bcm_gpio_softc *sc; struct bcm_gpio_sysctl *sc_sysctl; uint32_t nfunc; int error; sc_sysctl = arg1; sc = sc_sysctl->sc; /* Get the current pin function. */ nfunc = bcm_gpio_get_function(sc, sc_sysctl->pin); bcm_gpio_func_str(nfunc, buf, sizeof(buf)); error = sysctl_handle_string(oidp, buf, sizeof(buf), req); if (error != 0 || req->newptr == NULL) return (error); /* Ignore changes on read-only pins. */ if (bcm_gpio_pin_is_ro(sc, sc_sysctl->pin)) return (0); /* Parse the user supplied string and check for a valid pin function. */ if (bcm_gpio_str_func(buf, &nfunc) != 0) return (EINVAL); /* Update the pin alternate function. */ bcm_gpio_set_alternate(sc->sc_dev, sc_sysctl->pin, nfunc); return (0); } static void bcm_gpio_sysctl_init(struct bcm_gpio_softc *sc) { char pinbuf[3]; struct bcm_gpio_sysctl *sc_sysctl; struct sysctl_ctx_list *ctx; struct sysctl_oid *tree_node, *pin_node, *pinN_node; struct sysctl_oid_list *tree, *pin_tree, *pinN_tree; int i; /* * Add per-pin sysctl tree/handlers. */ ctx = device_get_sysctl_ctx(sc->sc_dev); tree_node = device_get_sysctl_tree(sc->sc_dev); tree = SYSCTL_CHILDREN(tree_node); pin_node = SYSCTL_ADD_NODE(ctx, tree, OID_AUTO, "pin", CTLFLAG_RD, NULL, "GPIO Pins"); pin_tree = SYSCTL_CHILDREN(pin_node); for (i = 0; i < sc->sc_gpio_npins; i++) { snprintf(pinbuf, sizeof(pinbuf), "%d", i); pinN_node = SYSCTL_ADD_NODE(ctx, pin_tree, OID_AUTO, pinbuf, CTLFLAG_RD, NULL, "GPIO Pin"); pinN_tree = SYSCTL_CHILDREN(pinN_node); sc->sc_sysctl[i].sc = sc; sc_sysctl = &sc->sc_sysctl[i]; sc_sysctl->sc = sc; sc_sysctl->pin = sc->sc_gpio_pins[i].gp_pin; SYSCTL_ADD_PROC(ctx, pinN_tree, OID_AUTO, "function", CTLFLAG_RW | CTLTYPE_STRING, sc_sysctl, sizeof(struct bcm_gpio_sysctl), bcm_gpio_func_proc, "A", "Pin Function"); } } static int bcm_gpio_get_ro_pins(struct bcm_gpio_softc *sc, phandle_t node, const char *propname, const char *label) { int i, need_comma, npins, range_start, range_stop; pcell_t *pins; /* Get the property data. */ - npins = OF_getencprop_alloc(node, propname, sizeof(*pins), + npins = OF_getencprop_alloc_multi(node, propname, sizeof(*pins), (void **)&pins); if (npins < 0) return (-1); if (npins == 0) { OF_prop_free(pins); return (0); } for (i = 0; i < npins; i++) sc->sc_ro_pins[i + sc->sc_ro_npins] = pins[i]; sc->sc_ro_npins += npins; need_comma = 0; device_printf(sc->sc_dev, "%s pins: ", label); range_start = range_stop = pins[0]; for (i = 1; i < npins; i++) { if (pins[i] != range_stop + 1) { if (need_comma) printf(","); if (range_start != range_stop) printf("%d-%d", range_start, range_stop); else printf("%d", range_start); range_start = range_stop = pins[i]; need_comma = 1; } else range_stop++; } if (need_comma) printf(","); if (range_start != range_stop) printf("%d-%d.\n", range_start, range_stop); else printf("%d.\n", range_start); OF_prop_free(pins); return (0); } static int bcm_gpio_get_reserved_pins(struct bcm_gpio_softc *sc) { char *name; phandle_t gpio, node, reserved; ssize_t len; /* Get read-only pins if they're provided */ gpio = ofw_bus_get_node(sc->sc_dev); if (bcm_gpio_get_ro_pins(sc, gpio, "broadcom,read-only", "read-only") != 0) return (0); /* Traverse the GPIO subnodes to find the reserved pins node. */ reserved = 0; node = OF_child(gpio); while ((node != 0) && (reserved == 0)) { len = OF_getprop_alloc(node, "name", (void **)&name); if (len == -1) return (-1); if (strcmp(name, "reserved") == 0) reserved = node; OF_prop_free(name); node = OF_peer(node); } if (reserved == 0) return (-1); /* Get the reserved pins. */ if (bcm_gpio_get_ro_pins(sc, reserved, "broadcom,pins", "reserved") != 0) return (-1); return (0); } static int bcm_gpio_probe(device_t dev) { if (!ofw_bus_status_okay(dev)) return (ENXIO); if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) return (ENXIO); device_set_desc(dev, "BCM2708/2835 GPIO controller"); return (BUS_PROBE_DEFAULT); } static int bcm_gpio_intr_attach(device_t dev) { struct bcm_gpio_softc *sc; /* * Only first two interrupt lines are used. Third line is * mirrored second line and forth line is common for all banks. */ sc = device_get_softc(dev); if (sc->sc_res[1] == NULL || sc->sc_res[2] == NULL) return (-1); if (bcm_gpio_pic_attach(sc) != 0) { device_printf(dev, "unable to attach PIC\n"); return (-1); } if (bus_setup_intr(dev, sc->sc_res[1], INTR_TYPE_MISC | INTR_MPSAFE, bcm_gpio_intr_bank0, NULL, sc, &sc->sc_intrhand[0]) != 0) return (-1); if (bus_setup_intr(dev, sc->sc_res[2], INTR_TYPE_MISC | INTR_MPSAFE, bcm_gpio_intr_bank1, NULL, sc, &sc->sc_intrhand[1]) != 0) return (-1); return (0); } static void bcm_gpio_intr_detach(device_t dev) { struct bcm_gpio_softc *sc; sc = device_get_softc(dev); if (sc->sc_intrhand[0] != NULL) bus_teardown_intr(dev, sc->sc_res[1], sc->sc_intrhand[0]); if (sc->sc_intrhand[1] != NULL) bus_teardown_intr(dev, sc->sc_res[2], sc->sc_intrhand[1]); bcm_gpio_pic_detach(sc); } static int bcm_gpio_attach(device_t dev) { int i, j; phandle_t gpio; struct bcm_gpio_softc *sc; uint32_t func; if (bcm_gpio_sc != NULL) return (ENXIO); bcm_gpio_sc = sc = device_get_softc(dev); sc->sc_dev = dev; mtx_init(&sc->sc_mtx, "bcm gpio", "gpio", MTX_SPIN); if (bus_alloc_resources(dev, bcm_gpio_res_spec, sc->sc_res) != 0) { device_printf(dev, "cannot allocate resources\n"); goto fail; } sc->sc_bst = rman_get_bustag(sc->sc_res[0]); sc->sc_bsh = rman_get_bushandle(sc->sc_res[0]); /* Setup the GPIO interrupt handler. */ if (bcm_gpio_intr_attach(dev)) { device_printf(dev, "unable to setup the gpio irq handler\n"); goto fail; } /* Find our node. */ gpio = ofw_bus_get_node(sc->sc_dev); if (!OF_hasprop(gpio, "gpio-controller")) /* Node is not a GPIO controller. */ goto fail; /* * Find the read-only pins. These are pins we never touch or bad * things could happen. */ if (bcm_gpio_get_reserved_pins(sc) == -1) goto fail; /* Initialize the software controlled pins. */ for (i = 0, j = 0; j < BCM_GPIO_PINS; j++) { snprintf(sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME, "pin %d", j); func = bcm_gpio_get_function(sc, j); sc->sc_gpio_pins[i].gp_pin = j; sc->sc_gpio_pins[i].gp_caps = BCM_GPIO_DEFAULT_CAPS; sc->sc_gpio_pins[i].gp_flags = bcm_gpio_func_flag(func); i++; } sc->sc_gpio_npins = i; bcm_gpio_sysctl_init(sc); sc->sc_busdev = gpiobus_attach_bus(dev); if (sc->sc_busdev == NULL) goto fail; fdt_pinctrl_register(dev, "brcm,pins"); fdt_pinctrl_configure_tree(dev); return (0); fail: bcm_gpio_intr_detach(dev); bus_release_resources(dev, bcm_gpio_res_spec, sc->sc_res); mtx_destroy(&sc->sc_mtx); return (ENXIO); } static int bcm_gpio_detach(device_t dev) { return (EBUSY); } static inline void bcm_gpio_modify(struct bcm_gpio_softc *sc, uint32_t reg, uint32_t mask, bool set_bits) { if (set_bits) BCM_GPIO_SET_BITS(sc, reg, mask); else BCM_GPIO_CLEAR_BITS(sc, reg, mask); } static inline void bcm_gpio_isrc_eoi(struct bcm_gpio_softc *sc, struct bcm_gpio_irqsrc *bgi) { uint32_t bank; /* Write 1 to clear. */ bank = BCM_GPIO_BANK(bgi->bgi_irq); BCM_GPIO_WRITE(sc, BCM_GPIO_GPEDS(bank), bgi->bgi_mask); } static inline bool bcm_gpio_isrc_is_level(struct bcm_gpio_irqsrc *bgi) { return (bgi->bgi_mode == GPIO_INTR_LEVEL_LOW || bgi->bgi_mode == GPIO_INTR_LEVEL_HIGH); } static inline void bcm_gpio_isrc_mask(struct bcm_gpio_softc *sc, struct bcm_gpio_irqsrc *bgi) { uint32_t bank; bank = BCM_GPIO_BANK(bgi->bgi_irq); BCM_GPIO_LOCK(sc); switch (bgi->bgi_mode) { case GPIO_INTR_LEVEL_LOW: BCM_GPIO_CLEAR_BITS(sc, BCM_GPIO_GPLEN(bank), bgi->bgi_mask); break; case GPIO_INTR_LEVEL_HIGH: BCM_GPIO_CLEAR_BITS(sc, BCM_GPIO_GPHEN(bank), bgi->bgi_mask); break; case GPIO_INTR_EDGE_RISING: BCM_GPIO_CLEAR_BITS(sc, BCM_GPIO_GPREN(bank), bgi->bgi_mask); break; case GPIO_INTR_EDGE_FALLING: BCM_GPIO_CLEAR_BITS(sc, BCM_GPIO_GPFEN(bank), bgi->bgi_mask); break; case GPIO_INTR_EDGE_BOTH: BCM_GPIO_CLEAR_BITS(sc, BCM_GPIO_GPREN(bank), bgi->bgi_mask); BCM_GPIO_CLEAR_BITS(sc, BCM_GPIO_GPFEN(bank), bgi->bgi_mask); break; } BCM_GPIO_UNLOCK(sc); } static inline void bcm_gpio_isrc_unmask(struct bcm_gpio_softc *sc, struct bcm_gpio_irqsrc *bgi) { uint32_t bank; bank = BCM_GPIO_BANK(bgi->bgi_irq); BCM_GPIO_LOCK(sc); switch (bgi->bgi_mode) { case GPIO_INTR_LEVEL_LOW: BCM_GPIO_SET_BITS(sc, BCM_GPIO_GPLEN(bank), bgi->bgi_mask); break; case GPIO_INTR_LEVEL_HIGH: BCM_GPIO_SET_BITS(sc, BCM_GPIO_GPHEN(bank), bgi->bgi_mask); break; case GPIO_INTR_EDGE_RISING: BCM_GPIO_SET_BITS(sc, BCM_GPIO_GPREN(bank), bgi->bgi_mask); break; case GPIO_INTR_EDGE_FALLING: BCM_GPIO_SET_BITS(sc, BCM_GPIO_GPFEN(bank), bgi->bgi_mask); break; case GPIO_INTR_EDGE_BOTH: BCM_GPIO_SET_BITS(sc, BCM_GPIO_GPREN(bank), bgi->bgi_mask); BCM_GPIO_SET_BITS(sc, BCM_GPIO_GPFEN(bank), bgi->bgi_mask); break; } BCM_GPIO_UNLOCK(sc); } static int bcm_gpio_intr_internal(struct bcm_gpio_softc *sc, uint32_t bank) { u_int irq; struct bcm_gpio_irqsrc *bgi; uint32_t reg; /* Do not care of spurious interrupt on GPIO. */ reg = BCM_GPIO_READ(sc, BCM_GPIO_GPEDS(bank)); while (reg != 0) { irq = BCM_GPIO_PINS_PER_BANK * bank + ffs(reg) - 1; bgi = sc->sc_isrcs + irq; if (!bcm_gpio_isrc_is_level(bgi)) bcm_gpio_isrc_eoi(sc, bgi); if (intr_isrc_dispatch(&bgi->bgi_isrc, curthread->td_intr_frame) != 0) { bcm_gpio_isrc_mask(sc, bgi); if (bcm_gpio_isrc_is_level(bgi)) bcm_gpio_isrc_eoi(sc, bgi); device_printf(sc->sc_dev, "Stray irq %u disabled\n", irq); } reg &= ~bgi->bgi_mask; } return (FILTER_HANDLED); } static int bcm_gpio_intr_bank0(void *arg) { return (bcm_gpio_intr_internal(arg, 0)); } static int bcm_gpio_intr_bank1(void *arg) { return (bcm_gpio_intr_internal(arg, 1)); } static int bcm_gpio_pic_attach(struct bcm_gpio_softc *sc) { int error; uint32_t irq; const char *name; name = device_get_nameunit(sc->sc_dev); for (irq = 0; irq < BCM_GPIO_PINS; irq++) { sc->sc_isrcs[irq].bgi_irq = irq; sc->sc_isrcs[irq].bgi_mask = BCM_GPIO_MASK(irq); sc->sc_isrcs[irq].bgi_mode = GPIO_INTR_CONFORM; error = intr_isrc_register(&sc->sc_isrcs[irq].bgi_isrc, sc->sc_dev, 0, "%s,%u", name, irq); if (error != 0) return (error); /* XXX deregister ISRCs */ } if (intr_pic_register(sc->sc_dev, OF_xref_from_node(ofw_bus_get_node(sc->sc_dev))) == NULL) return (ENXIO); return (0); } static int bcm_gpio_pic_detach(struct bcm_gpio_softc *sc) { /* * There has not been established any procedure yet * how to detach PIC from living system correctly. */ device_printf(sc->sc_dev, "%s: not implemented yet\n", __func__); return (EBUSY); } static void bcm_gpio_pic_config_intr(struct bcm_gpio_softc *sc, struct bcm_gpio_irqsrc *bgi, uint32_t mode) { uint32_t bank; bank = BCM_GPIO_BANK(bgi->bgi_irq); BCM_GPIO_LOCK(sc); bcm_gpio_modify(sc, BCM_GPIO_GPREN(bank), bgi->bgi_mask, mode == GPIO_INTR_EDGE_RISING || mode == GPIO_INTR_EDGE_BOTH); bcm_gpio_modify(sc, BCM_GPIO_GPFEN(bank), bgi->bgi_mask, mode == GPIO_INTR_EDGE_FALLING || mode == GPIO_INTR_EDGE_BOTH); bcm_gpio_modify(sc, BCM_GPIO_GPHEN(bank), bgi->bgi_mask, mode == GPIO_INTR_LEVEL_HIGH); bcm_gpio_modify(sc, BCM_GPIO_GPLEN(bank), bgi->bgi_mask, mode == GPIO_INTR_LEVEL_LOW); bgi->bgi_mode = mode; BCM_GPIO_UNLOCK(sc); } static void bcm_gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc) { struct bcm_gpio_softc *sc = device_get_softc(dev); struct bcm_gpio_irqsrc *bgi = (struct bcm_gpio_irqsrc *)isrc; bcm_gpio_isrc_mask(sc, bgi); } static void bcm_gpio_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc) { struct bcm_gpio_softc *sc = device_get_softc(dev); struct bcm_gpio_irqsrc *bgi = (struct bcm_gpio_irqsrc *)isrc; arm_irq_memory_barrier(bgi->bgi_irq); bcm_gpio_isrc_unmask(sc, bgi); } static int bcm_gpio_pic_map_fdt(struct bcm_gpio_softc *sc, struct intr_map_data_fdt *daf, u_int *irqp, uint32_t *modep) { u_int irq; uint32_t mode; /* * The first cell is the interrupt number. * The second cell is used to specify flags: * bits[3:0] trigger type and level flags: * 1 = low-to-high edge triggered. * 2 = high-to-low edge triggered. * 4 = active high level-sensitive. * 8 = active low level-sensitive. */ if (daf->ncells != 2) return (EINVAL); irq = daf->cells[0]; if (irq >= BCM_GPIO_PINS || bcm_gpio_pin_is_ro(sc, irq)) return (EINVAL); /* Only reasonable modes are supported. */ if (daf->cells[1] == 1) mode = GPIO_INTR_EDGE_RISING; else if (daf->cells[1] == 2) mode = GPIO_INTR_EDGE_FALLING; else if (daf->cells[1] == 3) mode = GPIO_INTR_EDGE_BOTH; else if (daf->cells[1] == 4) mode = GPIO_INTR_LEVEL_HIGH; else if (daf->cells[1] == 8) mode = GPIO_INTR_LEVEL_LOW; else return (EINVAL); *irqp = irq; if (modep != NULL) *modep = mode; return (0); } static int bcm_gpio_pic_map_gpio(struct bcm_gpio_softc *sc, struct intr_map_data_gpio *dag, u_int *irqp, uint32_t *modep) { u_int irq; uint32_t mode; irq = dag->gpio_pin_num; if (irq >= BCM_GPIO_PINS || bcm_gpio_pin_is_ro(sc, irq)) return (EINVAL); mode = dag->gpio_intr_mode; if (mode != GPIO_INTR_LEVEL_LOW && mode != GPIO_INTR_LEVEL_HIGH && mode != GPIO_INTR_EDGE_RISING && mode != GPIO_INTR_EDGE_FALLING && mode != GPIO_INTR_EDGE_BOTH) return (EINVAL); *irqp = irq; if (modep != NULL) *modep = mode; return (0); } static int bcm_gpio_pic_map(struct bcm_gpio_softc *sc, struct intr_map_data *data, u_int *irqp, uint32_t *modep) { switch (data->type) { case INTR_MAP_DATA_FDT: return (bcm_gpio_pic_map_fdt(sc, (struct intr_map_data_fdt *)data, irqp, modep)); case INTR_MAP_DATA_GPIO: return (bcm_gpio_pic_map_gpio(sc, (struct intr_map_data_gpio *)data, irqp, modep)); default: return (ENOTSUP); } } static int bcm_gpio_pic_map_intr(device_t dev, struct intr_map_data *data, struct intr_irqsrc **isrcp) { int error; u_int irq; struct bcm_gpio_softc *sc = device_get_softc(dev); error = bcm_gpio_pic_map(sc, data, &irq, NULL); if (error == 0) *isrcp = &sc->sc_isrcs[irq].bgi_isrc; return (error); } static void bcm_gpio_pic_post_filter(device_t dev, struct intr_irqsrc *isrc) { struct bcm_gpio_softc *sc = device_get_softc(dev); struct bcm_gpio_irqsrc *bgi = (struct bcm_gpio_irqsrc *)isrc; if (bcm_gpio_isrc_is_level(bgi)) bcm_gpio_isrc_eoi(sc, bgi); } static void bcm_gpio_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) { bcm_gpio_pic_enable_intr(dev, isrc); } static void bcm_gpio_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) { struct bcm_gpio_softc *sc = device_get_softc(dev); struct bcm_gpio_irqsrc *bgi = (struct bcm_gpio_irqsrc *)isrc; bcm_gpio_isrc_mask(sc, bgi); if (bcm_gpio_isrc_is_level(bgi)) bcm_gpio_isrc_eoi(sc, bgi); } static int bcm_gpio_pic_setup_intr(device_t dev, struct intr_irqsrc *isrc, struct resource *res, struct intr_map_data *data) { u_int irq; uint32_t mode; struct bcm_gpio_softc *sc; struct bcm_gpio_irqsrc *bgi; if (data == NULL) return (ENOTSUP); sc = device_get_softc(dev); bgi = (struct bcm_gpio_irqsrc *)isrc; /* Get and check config for an interrupt. */ if (bcm_gpio_pic_map(sc, data, &irq, &mode) != 0 || bgi->bgi_irq != irq) return (EINVAL); /* * If this is a setup for another handler, * only check that its configuration match. */ if (isrc->isrc_handlers != 0) return (bgi->bgi_mode == mode ? 0 : EINVAL); bcm_gpio_pic_config_intr(sc, bgi, mode); return (0); } static int bcm_gpio_pic_teardown_intr(device_t dev, struct intr_irqsrc *isrc, struct resource *res, struct intr_map_data *data) { struct bcm_gpio_softc *sc = device_get_softc(dev); struct bcm_gpio_irqsrc *bgi = (struct bcm_gpio_irqsrc *)isrc; if (isrc->isrc_handlers == 0) bcm_gpio_pic_config_intr(sc, bgi, GPIO_INTR_CONFORM); return (0); } static phandle_t bcm_gpio_get_node(device_t bus, device_t dev) { /* We only have one child, the GPIO bus, which needs our own node. */ return (ofw_bus_get_node(bus)); } static int bcm_gpio_configure_pins(device_t dev, phandle_t cfgxref) { phandle_t cfgnode; int i, pintuples, pulltuples; uint32_t pin; uint32_t *pins; uint32_t *pulls; uint32_t function; static struct bcm_gpio_softc *sc; sc = device_get_softc(dev); cfgnode = OF_node_from_xref(cfgxref); pins = NULL; - pintuples = OF_getencprop_alloc(cfgnode, "brcm,pins", sizeof(*pins), - (void **)&pins); + pintuples = OF_getencprop_alloc_multi(cfgnode, "brcm,pins", + sizeof(*pins), (void **)&pins); char name[32]; OF_getprop(cfgnode, "name", &name, sizeof(name)); if (pintuples < 0) return (ENOENT); if (pintuples == 0) return (0); /* Empty property is not an error. */ if (OF_getencprop(cfgnode, "brcm,function", &function, sizeof(function)) <= 0) { OF_prop_free(pins); return (EINVAL); } pulls = NULL; - pulltuples = OF_getencprop_alloc(cfgnode, "brcm,pull", sizeof(*pulls), - (void **)&pulls); + pulltuples = OF_getencprop_alloc_multi(cfgnode, "brcm,pull", + sizeof(*pulls), (void **)&pulls); if ((pulls != NULL) && (pulltuples != pintuples)) { OF_prop_free(pins); OF_prop_free(pulls); return (EINVAL); } for (i = 0; i < pintuples; i++) { pin = pins[i]; bcm_gpio_set_alternate(dev, pin, function); if (bootverbose) device_printf(dev, "set pin %d to func %d", pin, function); if (pulls) { if (bootverbose) printf(", pull %d", pulls[i]); switch (pulls[i]) { /* Convert to gpio(4) flags */ case BCM2835_PUD_OFF: bcm_gpio_pin_setflags(dev, pin, 0); break; case BCM2835_PUD_UP: bcm_gpio_pin_setflags(dev, pin, GPIO_PIN_PULLUP); break; case BCM2835_PUD_DOWN: bcm_gpio_pin_setflags(dev, pin, GPIO_PIN_PULLDOWN); break; default: printf("%s: invalid pull value for pin %d: %d\n", name, pin, pulls[i]); } } if (bootverbose) printf("\n"); } OF_prop_free(pins); if (pulls) OF_prop_free(pulls); return (0); } static device_method_t bcm_gpio_methods[] = { /* Device interface */ DEVMETHOD(device_probe, bcm_gpio_probe), DEVMETHOD(device_attach, bcm_gpio_attach), DEVMETHOD(device_detach, bcm_gpio_detach), /* GPIO protocol */ DEVMETHOD(gpio_get_bus, bcm_gpio_get_bus), DEVMETHOD(gpio_pin_max, bcm_gpio_pin_max), DEVMETHOD(gpio_pin_getname, bcm_gpio_pin_getname), DEVMETHOD(gpio_pin_getflags, bcm_gpio_pin_getflags), DEVMETHOD(gpio_pin_getcaps, bcm_gpio_pin_getcaps), DEVMETHOD(gpio_pin_setflags, bcm_gpio_pin_setflags), DEVMETHOD(gpio_pin_get, bcm_gpio_pin_get), DEVMETHOD(gpio_pin_set, bcm_gpio_pin_set), DEVMETHOD(gpio_pin_toggle, bcm_gpio_pin_toggle), /* Interrupt controller interface */ DEVMETHOD(pic_disable_intr, bcm_gpio_pic_disable_intr), DEVMETHOD(pic_enable_intr, bcm_gpio_pic_enable_intr), DEVMETHOD(pic_map_intr, bcm_gpio_pic_map_intr), DEVMETHOD(pic_post_filter, bcm_gpio_pic_post_filter), DEVMETHOD(pic_post_ithread, bcm_gpio_pic_post_ithread), DEVMETHOD(pic_pre_ithread, bcm_gpio_pic_pre_ithread), DEVMETHOD(pic_setup_intr, bcm_gpio_pic_setup_intr), DEVMETHOD(pic_teardown_intr, bcm_gpio_pic_teardown_intr), /* ofw_bus interface */ DEVMETHOD(ofw_bus_get_node, bcm_gpio_get_node), /* fdt_pinctrl interface */ DEVMETHOD(fdt_pinctrl_configure, bcm_gpio_configure_pins), DEVMETHOD_END }; static devclass_t bcm_gpio_devclass; static driver_t bcm_gpio_driver = { "gpio", bcm_gpio_methods, sizeof(struct bcm_gpio_softc), }; EARLY_DRIVER_MODULE(bcm_gpio, simplebus, bcm_gpio_driver, bcm_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE); Index: head/sys/arm/freescale/imx/imx_iomux.c =================================================================== --- head/sys/arm/freescale/imx/imx_iomux.c (revision 332340) +++ head/sys/arm/freescale/imx/imx_iomux.c (revision 332341) @@ -1,330 +1,330 @@ /*- * Copyright (c) 2014 Ian Lepore * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ /* * Pin mux and pad control driver for imx5 and imx6. * * This driver implements the fdt_pinctrl interface for configuring the gpio and * peripheral pins based on fdt configuration data. * * When the driver attaches, it walks the entire fdt tree and automatically * configures the pins for each device which has a pinctrl-0 property and whose * status is "okay". In addition it implements the fdt_pinctrl_configure() * method which any other driver can call at any time to reconfigure its pins. * * The nature of the fsl,pins property in fdt data makes this driver's job very * easy. Instead of representing each pin and pad configuration using symbolic * properties such as pullup-enable="true" and so on, the data simply contains * the addresses of the registers that control the pins, and the raw values to * store in those registers. * * The imx5 and imx6 SoCs also have a small number of "general purpose * registers" in the iomuxc device which are used to control an assortment * of completely unrelated aspects of SoC behavior. This driver provides other * drivers with direct access to those registers via simple accessor functions. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include struct iomux_softc { device_t dev; struct resource *mem_res; u_int last_gpregaddr; }; static struct iomux_softc *iomux_sc; static struct ofw_compat_data compat_data[] = { {"fsl,imx6dl-iomuxc", true}, {"fsl,imx6q-iomuxc", true}, {"fsl,imx6sl-iomuxc", true}, {"fsl,imx6ul-iomuxc", true}, {"fsl,imx6sx-iomuxc", true}, {"fsl,imx53-iomuxc", true}, {"fsl,imx51-iomuxc", true}, {NULL, false}, }; /* * Each tuple in an fsl,pins property contains these fields. */ struct pincfg { uint32_t mux_reg; uint32_t padconf_reg; uint32_t input_reg; uint32_t mux_val; uint32_t input_val; uint32_t padconf_val; }; #define PADCONF_NONE (1U << 31) /* Do not configure pad. */ #define PADCONF_SION (1U << 30) /* Force SION bit in mux register. */ #define PADMUX_SION (1U << 4) /* The SION bit in the mux register. */ static inline uint32_t RD4(struct iomux_softc *sc, bus_size_t off) { return (bus_read_4(sc->mem_res, off)); } static inline void WR4(struct iomux_softc *sc, bus_size_t off, uint32_t val) { bus_write_4(sc->mem_res, off, val); } static void iomux_configure_input(struct iomux_softc *sc, uint32_t reg, uint32_t val) { u_int select, mask, shift, width; /* If register and value are zero, there is nothing to configure. */ if (reg == 0 && val == 0) return; /* * If the config value has 0xff in the high byte it is encoded: * 31 23 15 7 0 * | 0xff | shift | width | select | * We need to mask out the old select value and OR in the new, using a * mask of the given width and shifting the values up by shift. */ if ((val & 0xff000000) == 0xff000000) { select = val & 0x000000ff; width = (val & 0x0000ff00) >> 8; shift = (val & 0x00ff0000) >> 16; mask = ((1u << width) - 1) << shift; val = (RD4(sc, reg) & ~mask) | (select << shift); } WR4(sc, reg, val); } static int iomux_configure_pins(device_t dev, phandle_t cfgxref) { struct iomux_softc *sc; struct pincfg *cfgtuples, *cfg; phandle_t cfgnode; int i, ntuples; uint32_t sion; sc = device_get_softc(dev); cfgnode = OF_node_from_xref(cfgxref); - ntuples = OF_getencprop_alloc(cfgnode, "fsl,pins", sizeof(*cfgtuples), - (void **)&cfgtuples); + ntuples = OF_getencprop_alloc_multi(cfgnode, "fsl,pins", + sizeof(*cfgtuples), (void **)&cfgtuples); if (ntuples < 0) return (ENOENT); if (ntuples == 0) return (0); /* Empty property is not an error. */ for (i = 0, cfg = cfgtuples; i < ntuples; i++, cfg++) { sion = (cfg->padconf_val & PADCONF_SION) ? PADMUX_SION : 0; WR4(sc, cfg->mux_reg, cfg->mux_val | sion); iomux_configure_input(sc, cfg->input_reg, cfg->input_val); if ((cfg->padconf_val & PADCONF_NONE) == 0) WR4(sc, cfg->padconf_reg, cfg->padconf_val); if (bootverbose) { char name[32]; OF_getprop(cfgnode, "name", &name, sizeof(name)); printf("%16s: muxreg 0x%04x muxval 0x%02x " "inpreg 0x%04x inpval 0x%02x " "padreg 0x%04x padval 0x%08x\n", name, cfg->mux_reg, cfg->mux_val | sion, cfg->input_reg, cfg->input_val, cfg->padconf_reg, cfg->padconf_val); } } OF_prop_free(cfgtuples); return (0); } static int iomux_probe(device_t dev) { if (!ofw_bus_status_okay(dev)) return (ENXIO); if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) return (ENXIO); device_set_desc(dev, "Freescale i.MX pin configuration"); return (BUS_PROBE_DEFAULT); } static int iomux_detach(device_t dev) { /* This device is always present. */ return (EBUSY); } static int iomux_attach(device_t dev) { struct iomux_softc * sc; int rid; sc = device_get_softc(dev); sc->dev = dev; switch (imx_soc_type()) { case IMXSOC_51: sc->last_gpregaddr = 1 * sizeof(uint32_t); break; case IMXSOC_53: sc->last_gpregaddr = 2 * sizeof(uint32_t); break; case IMXSOC_6DL: case IMXSOC_6S: case IMXSOC_6SL: case IMXSOC_6Q: sc->last_gpregaddr = 13 * sizeof(uint32_t); break; case IMXSOC_6UL: sc->last_gpregaddr = 14 * sizeof(uint32_t); break; default: device_printf(dev, "Unknown SoC type\n"); return (ENXIO); } rid = 0; sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (sc->mem_res == NULL) { device_printf(dev, "Cannot allocate memory resources\n"); return (ENXIO); } iomux_sc = sc; /* * Register as a pinctrl device, and call the convenience function that * walks the entire device tree invoking FDT_PINCTRL_CONFIGURE() on any * pinctrl-0 property cells whose xref phandle refers to a configuration * that is a child node of our node in the tree. * * The pinctrl bindings documentation specifically mentions that the * pinctrl device itself may have a pinctrl-0 property which contains * static configuration to be applied at device init time. The tree * walk will automatically handle this for us when it passes through our * node in the tree. */ fdt_pinctrl_register(dev, "fsl,pins"); fdt_pinctrl_configure_tree(dev); return (0); } uint32_t imx_iomux_gpr_get(u_int regaddr) { struct iomux_softc * sc; sc = iomux_sc; KASSERT(sc != NULL, ("%s called before attach", __FUNCTION__)); KASSERT(regaddr >= 0 && regaddr <= sc->last_gpregaddr, ("%s bad regaddr %u, max %u", __FUNCTION__, regaddr, sc->last_gpregaddr)); return (RD4(iomux_sc, regaddr)); } void imx_iomux_gpr_set(u_int regaddr, uint32_t val) { struct iomux_softc * sc; sc = iomux_sc; KASSERT(sc != NULL, ("%s called before attach", __FUNCTION__)); KASSERT(regaddr >= 0 && regaddr <= sc->last_gpregaddr, ("%s bad regaddr %u, max %u", __FUNCTION__, regaddr, sc->last_gpregaddr)); WR4(iomux_sc, regaddr, val); } void imx_iomux_gpr_set_masked(u_int regaddr, uint32_t clrbits, uint32_t setbits) { struct iomux_softc * sc; uint32_t val; sc = iomux_sc; KASSERT(sc != NULL, ("%s called before attach", __FUNCTION__)); KASSERT(regaddr >= 0 && regaddr <= sc->last_gpregaddr, ("%s bad regaddr %u, max %u", __FUNCTION__, regaddr, sc->last_gpregaddr)); val = RD4(iomux_sc, regaddr * 4); val = (val & ~clrbits) | setbits; WR4(iomux_sc, regaddr, val); } static device_method_t imx_iomux_methods[] = { /* Device interface */ DEVMETHOD(device_probe, iomux_probe), DEVMETHOD(device_attach, iomux_attach), DEVMETHOD(device_detach, iomux_detach), /* fdt_pinctrl interface */ DEVMETHOD(fdt_pinctrl_configure,iomux_configure_pins), DEVMETHOD_END }; static driver_t imx_iomux_driver = { "imx_iomux", imx_iomux_methods, sizeof(struct iomux_softc), }; static devclass_t imx_iomux_devclass; EARLY_DRIVER_MODULE(imx_iomux, simplebus, imx_iomux_driver, imx_iomux_devclass, 0, 0, BUS_PASS_CPU + BUS_PASS_ORDER_LATE); Index: head/sys/arm/nvidia/drm2/tegra_drm_subr.c =================================================================== --- head/sys/arm/nvidia/drm2/tegra_drm_subr.c (revision 332340) +++ head/sys/arm/nvidia/drm2/tegra_drm_subr.c (revision 332341) @@ -1,177 +1,177 @@ /*- * Copyright (c) 2015 Michal Meloun * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include int tegra_drm_connector_get_modes(struct drm_connector *connector) { struct tegra_drm_encoder *output; struct edid *edid = NULL; int rv; output = container_of(connector, struct tegra_drm_encoder, connector); /* Panel is first */ if (output->panel != NULL) { /* XXX panel parsing */ return (0); } /* static EDID is second*/ edid = output->edid; /* EDID from monitor is last */ if (edid == NULL) edid = drm_get_edid(connector, output->ddc); if (edid == NULL) return (0); /* Process EDID */ drm_mode_connector_update_edid_property(connector, edid); rv = drm_add_edid_modes(connector, edid); drm_edid_to_eld(connector, edid); return (rv); } struct drm_encoder * tegra_drm_connector_best_encoder(struct drm_connector *connector) { struct tegra_drm_encoder *output; output = container_of(connector, struct tegra_drm_encoder, connector); return &(output->encoder); } enum drm_connector_status tegra_drm_connector_detect(struct drm_connector *connector, bool force) { struct tegra_drm_encoder *output; bool active; int rv; output = container_of(connector, struct tegra_drm_encoder, connector); if (output->gpio_hpd == NULL) { return ((output->panel != NULL) ? connector_status_connected: connector_status_disconnected); } rv = gpio_pin_is_active(output->gpio_hpd, &active); if (rv != 0) { device_printf(output->dev, " GPIO read failed: %d\n", rv); return (connector_status_unknown); } return (active ? connector_status_connected : connector_status_disconnected); } int tegra_drm_encoder_attach(struct tegra_drm_encoder *output, phandle_t node) { int rv; phandle_t ddc; /* XXX parse output panel here */ - rv = OF_getencprop_alloc(node, "nvidia,edid", 1, + rv = OF_getencprop_alloc(node, "nvidia,edid", (void **)&output->edid); /* EDID exist but have invalid size */ if ((rv >= 0) && (rv != sizeof(struct edid))) { device_printf(output->dev, "Malformed \"nvidia,edid\" property\n"); if (output->edid != NULL) free(output->edid, M_OFWPROP); return (ENXIO); } gpio_pin_get_by_ofw_property(output->dev, node, "nvidia,hpd-gpio", &output->gpio_hpd); ddc = 0; OF_getencprop(node, "nvidia,ddc-i2c-bus", &ddc, sizeof(ddc)); if (ddc > 0) output->ddc = OF_device_from_xref(ddc); if ((output->edid == NULL) && (output->ddc == NULL)) return (ENXIO); if (output->gpio_hpd != NULL) { output->connector.polled = // DRM_CONNECTOR_POLL_HPD; DRM_CONNECTOR_POLL_DISCONNECT | DRM_CONNECTOR_POLL_CONNECT; } return (0); } int tegra_drm_encoder_init(struct tegra_drm_encoder *output, struct tegra_drm *drm) { if (output->panel) { /* attach panel */ } return (0); } int tegra_drm_encoder_exit(struct tegra_drm_encoder *output, struct tegra_drm *drm) { if (output->panel) { /* detach panel */ } return (0); -} \ No newline at end of file +} Index: head/sys/arm/ti/ti_adc.c =================================================================== --- head/sys/arm/ti/ti_adc.c (revision 332340) +++ head/sys/arm/ti/ti_adc.c (revision 332341) @@ -1,965 +1,966 @@ /*- * Copyright 2014 Luiz Otavio O Souza * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_evdev.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #ifdef EVDEV_SUPPORT #include #include #endif #include #include #include #undef DEBUG_TSC #define DEFAULT_CHARGE_DELAY 0x400 #define STEPDLY_OPEN 0x98 #define ORDER_XP 0 #define ORDER_XN 1 #define ORDER_YP 2 #define ORDER_YN 3 /* Define our 8 steps, one for each input channel. */ static struct ti_adc_input ti_adc_inputs[TI_ADC_NPINS] = { { .stepconfig = ADC_STEPCFG(1), .stepdelay = ADC_STEPDLY(1) }, { .stepconfig = ADC_STEPCFG(2), .stepdelay = ADC_STEPDLY(2) }, { .stepconfig = ADC_STEPCFG(3), .stepdelay = ADC_STEPDLY(3) }, { .stepconfig = ADC_STEPCFG(4), .stepdelay = ADC_STEPDLY(4) }, { .stepconfig = ADC_STEPCFG(5), .stepdelay = ADC_STEPDLY(5) }, { .stepconfig = ADC_STEPCFG(6), .stepdelay = ADC_STEPDLY(6) }, { .stepconfig = ADC_STEPCFG(7), .stepdelay = ADC_STEPDLY(7) }, { .stepconfig = ADC_STEPCFG(8), .stepdelay = ADC_STEPDLY(8) }, }; static int ti_adc_samples[5] = { 0, 2, 4, 8, 16 }; static int ti_adc_detach(device_t dev); #ifdef EVDEV_SUPPORT static void ti_adc_ev_report(struct ti_adc_softc *sc) { evdev_push_event(sc->sc_evdev, EV_ABS, ABS_X, sc->sc_x); evdev_push_event(sc->sc_evdev, EV_ABS, ABS_Y, sc->sc_y); evdev_push_event(sc->sc_evdev, EV_KEY, BTN_TOUCH, sc->sc_pen_down); evdev_sync(sc->sc_evdev); } #endif /* EVDEV */ static void ti_adc_enable(struct ti_adc_softc *sc) { uint32_t reg; TI_ADC_LOCK_ASSERT(sc); if (sc->sc_last_state == 1) return; /* Enable the FIFO0 threshold and the end of sequence interrupt. */ ADC_WRITE4(sc, ADC_IRQENABLE_SET, ADC_IRQ_FIFO0_THRES | ADC_IRQ_FIFO1_THRES | ADC_IRQ_END_OF_SEQ); reg = ADC_CTRL_STEP_WP | ADC_CTRL_STEP_ID; if (sc->sc_tsc_wires > 0) { reg |= ADC_CTRL_TSC_ENABLE; switch (sc->sc_tsc_wires) { case 4: reg |= ADC_CTRL_TSC_4WIRE; break; case 5: reg |= ADC_CTRL_TSC_5WIRE; break; case 8: reg |= ADC_CTRL_TSC_8WIRE; break; default: break; } } reg |= ADC_CTRL_ENABLE; /* Enable the ADC. Run thru enabled steps, start the conversions. */ ADC_WRITE4(sc, ADC_CTRL, reg); sc->sc_last_state = 1; } static void ti_adc_disable(struct ti_adc_softc *sc) { int count; uint32_t data; TI_ADC_LOCK_ASSERT(sc); if (sc->sc_last_state == 0) return; /* Disable all the enabled steps. */ ADC_WRITE4(sc, ADC_STEPENABLE, 0); /* Disable the ADC. */ ADC_WRITE4(sc, ADC_CTRL, ADC_READ4(sc, ADC_CTRL) & ~ADC_CTRL_ENABLE); /* Disable the FIFO0 threshold and the end of sequence interrupt. */ ADC_WRITE4(sc, ADC_IRQENABLE_CLR, ADC_IRQ_FIFO0_THRES | ADC_IRQ_FIFO1_THRES | ADC_IRQ_END_OF_SEQ); /* ACK any pending interrupt. */ ADC_WRITE4(sc, ADC_IRQSTATUS, ADC_READ4(sc, ADC_IRQSTATUS)); /* Drain the FIFO data. */ count = ADC_READ4(sc, ADC_FIFO0COUNT) & ADC_FIFO_COUNT_MSK; while (count > 0) { data = ADC_READ4(sc, ADC_FIFO0DATA); count = ADC_READ4(sc, ADC_FIFO0COUNT) & ADC_FIFO_COUNT_MSK; } count = ADC_READ4(sc, ADC_FIFO1COUNT) & ADC_FIFO_COUNT_MSK; while (count > 0) { data = ADC_READ4(sc, ADC_FIFO1DATA); count = ADC_READ4(sc, ADC_FIFO1COUNT) & ADC_FIFO_COUNT_MSK; } sc->sc_last_state = 0; } static int ti_adc_setup(struct ti_adc_softc *sc) { int ain, i; uint32_t enabled; TI_ADC_LOCK_ASSERT(sc); /* Check for enabled inputs. */ enabled = sc->sc_tsc_enabled; for (i = 0; i < sc->sc_adc_nchannels; i++) { ain = sc->sc_adc_channels[i]; if (ti_adc_inputs[ain].enable) enabled |= (1U << (ain + 1)); } /* Set the ADC global status. */ if (enabled != 0) { ti_adc_enable(sc); /* Update the enabled steps. */ if (enabled != ADC_READ4(sc, ADC_STEPENABLE)) ADC_WRITE4(sc, ADC_STEPENABLE, enabled); } else ti_adc_disable(sc); return (0); } static void ti_adc_input_setup(struct ti_adc_softc *sc, int32_t ain) { struct ti_adc_input *input; uint32_t reg, val; TI_ADC_LOCK_ASSERT(sc); input = &ti_adc_inputs[ain]; reg = input->stepconfig; val = ADC_READ4(sc, reg); /* Set single ended operation. */ val &= ~ADC_STEP_DIFF_CNTRL; /* Set the negative voltage reference. */ val &= ~ADC_STEP_RFM_MSK; /* Set the positive voltage reference. */ val &= ~ADC_STEP_RFP_MSK; /* Set the samples average. */ val &= ~ADC_STEP_AVG_MSK; val |= input->samples << ADC_STEP_AVG_SHIFT; /* Select the desired input. */ val &= ~ADC_STEP_INP_MSK; val |= ain << ADC_STEP_INP_SHIFT; /* Set the ADC to one-shot mode. */ val &= ~ADC_STEP_MODE_MSK; ADC_WRITE4(sc, reg, val); } static void ti_adc_reset(struct ti_adc_softc *sc) { int ain, i; TI_ADC_LOCK_ASSERT(sc); /* Disable all the inputs. */ for (i = 0; i < sc->sc_adc_nchannels; i++) { ain = sc->sc_adc_channels[i]; ti_adc_inputs[ain].enable = 0; } } static int ti_adc_clockdiv_proc(SYSCTL_HANDLER_ARGS) { int error, reg; struct ti_adc_softc *sc; sc = (struct ti_adc_softc *)arg1; TI_ADC_LOCK(sc); reg = (int)ADC_READ4(sc, ADC_CLKDIV) + 1; TI_ADC_UNLOCK(sc); error = sysctl_handle_int(oidp, ®, sizeof(reg), req); if (error != 0 || req->newptr == NULL) return (error); /* * The actual written value is the prescaler setting - 1. * Enforce a minimum value of 10 (i.e. 9) which limits the maximum * ADC clock to ~2.4Mhz (CLK_M_OSC / 10). */ reg--; if (reg < 9) reg = 9; if (reg > USHRT_MAX) reg = USHRT_MAX; TI_ADC_LOCK(sc); /* Disable the ADC. */ ti_adc_disable(sc); /* Update the ADC prescaler setting. */ ADC_WRITE4(sc, ADC_CLKDIV, reg); /* Enable the ADC again. */ ti_adc_setup(sc); TI_ADC_UNLOCK(sc); return (0); } static int ti_adc_enable_proc(SYSCTL_HANDLER_ARGS) { int error; int32_t enable; struct ti_adc_softc *sc; struct ti_adc_input *input; input = (struct ti_adc_input *)arg1; sc = input->sc; enable = input->enable; error = sysctl_handle_int(oidp, &enable, sizeof(enable), req); if (error != 0 || req->newptr == NULL) return (error); if (enable) enable = 1; TI_ADC_LOCK(sc); /* Setup the ADC as needed. */ if (input->enable != enable) { input->enable = enable; ti_adc_setup(sc); if (input->enable == 0) input->value = 0; } TI_ADC_UNLOCK(sc); return (0); } static int ti_adc_open_delay_proc(SYSCTL_HANDLER_ARGS) { int error, reg; struct ti_adc_softc *sc; struct ti_adc_input *input; input = (struct ti_adc_input *)arg1; sc = input->sc; TI_ADC_LOCK(sc); reg = (int)ADC_READ4(sc, input->stepdelay) & ADC_STEP_OPEN_DELAY; TI_ADC_UNLOCK(sc); error = sysctl_handle_int(oidp, ®, sizeof(reg), req); if (error != 0 || req->newptr == NULL) return (error); if (reg < 0) reg = 0; TI_ADC_LOCK(sc); ADC_WRITE4(sc, input->stepdelay, reg & ADC_STEP_OPEN_DELAY); TI_ADC_UNLOCK(sc); return (0); } static int ti_adc_samples_avg_proc(SYSCTL_HANDLER_ARGS) { int error, samples, i; struct ti_adc_softc *sc; struct ti_adc_input *input; input = (struct ti_adc_input *)arg1; sc = input->sc; if (input->samples > nitems(ti_adc_samples)) input->samples = nitems(ti_adc_samples); samples = ti_adc_samples[input->samples]; error = sysctl_handle_int(oidp, &samples, 0, req); if (error != 0 || req->newptr == NULL) return (error); TI_ADC_LOCK(sc); if (samples != ti_adc_samples[input->samples]) { input->samples = 0; for (i = 0; i < nitems(ti_adc_samples); i++) if (samples >= ti_adc_samples[i]) input->samples = i; ti_adc_input_setup(sc, input->input); } TI_ADC_UNLOCK(sc); return (error); } static void ti_adc_read_data(struct ti_adc_softc *sc) { int count, ain; struct ti_adc_input *input; uint32_t data; TI_ADC_LOCK_ASSERT(sc); /* Read the available data. */ count = ADC_READ4(sc, ADC_FIFO0COUNT) & ADC_FIFO_COUNT_MSK; while (count > 0) { data = ADC_READ4(sc, ADC_FIFO0DATA); ain = (data & ADC_FIFO_STEP_ID_MSK) >> ADC_FIFO_STEP_ID_SHIFT; input = &ti_adc_inputs[ain]; if (input->enable == 0) input->value = 0; else input->value = (int32_t)(data & ADC_FIFO_DATA_MSK); count = ADC_READ4(sc, ADC_FIFO0COUNT) & ADC_FIFO_COUNT_MSK; } } static int cmp_values(const void *a, const void *b) { const uint32_t *v1, *v2; v1 = a; v2 = b; if (*v1 < *v2) return -1; if (*v1 > *v2) return 1; return (0); } static void ti_adc_tsc_read_data(struct ti_adc_softc *sc) { int count; uint32_t data[16]; uint32_t x, y; int i, start, end; TI_ADC_LOCK_ASSERT(sc); /* Read the available data. */ count = ADC_READ4(sc, ADC_FIFO1COUNT) & ADC_FIFO_COUNT_MSK; if (count == 0) return; i = 0; while (count > 0) { data[i++] = ADC_READ4(sc, ADC_FIFO1DATA) & ADC_FIFO_DATA_MSK; count = ADC_READ4(sc, ADC_FIFO1COUNT) & ADC_FIFO_COUNT_MSK; } if (sc->sc_coord_readouts > 3) { start = 1; end = sc->sc_coord_readouts - 1; qsort(data, sc->sc_coord_readouts, sizeof(data[0]), &cmp_values); qsort(&data[sc->sc_coord_readouts + 2], sc->sc_coord_readouts, sizeof(data[0]), &cmp_values); } else { start = 0; end = sc->sc_coord_readouts; } x = y = 0; for (i = start; i < end; i++) y += data[i]; y /= (end - start); for (i = sc->sc_coord_readouts + 2 + start; i < sc->sc_coord_readouts + 2 + end; i++) x += data[i]; x /= (end - start); #ifdef DEBUG_TSC device_printf(sc->sc_dev, "touchscreen x: %d, y: %d\n", x, y); #endif #ifdef EVDEV_SUPPORT if ((sc->sc_x != x) || (sc->sc_y != y)) { sc->sc_x = x; sc->sc_y = y; ti_adc_ev_report(sc); } #endif } static void ti_adc_intr_locked(struct ti_adc_softc *sc, uint32_t status) { /* Read the available data. */ if (status & ADC_IRQ_FIFO0_THRES) ti_adc_read_data(sc); } static void ti_adc_tsc_intr_locked(struct ti_adc_softc *sc, uint32_t status) { /* Read the available data. */ if (status & ADC_IRQ_FIFO1_THRES) ti_adc_tsc_read_data(sc); } static void ti_adc_intr(void *arg) { struct ti_adc_softc *sc; uint32_t status, rawstatus; sc = (struct ti_adc_softc *)arg; TI_ADC_LOCK(sc); rawstatus = ADC_READ4(sc, ADC_IRQSTATUS_RAW); status = ADC_READ4(sc, ADC_IRQSTATUS); if (rawstatus & ADC_IRQ_HW_PEN_ASYNC) { sc->sc_pen_down = 1; status |= ADC_IRQ_HW_PEN_ASYNC; ADC_WRITE4(sc, ADC_IRQENABLE_CLR, ADC_IRQ_HW_PEN_ASYNC); #ifdef EVDEV_SUPPORT ti_adc_ev_report(sc); #endif } if (rawstatus & ADC_IRQ_PEN_UP) { sc->sc_pen_down = 0; status |= ADC_IRQ_PEN_UP; #ifdef EVDEV_SUPPORT ti_adc_ev_report(sc); #endif } if (status & ADC_IRQ_FIFO0_THRES) ti_adc_intr_locked(sc, status); if (status & ADC_IRQ_FIFO1_THRES) ti_adc_tsc_intr_locked(sc, status); if (status) { /* ACK the interrupt. */ ADC_WRITE4(sc, ADC_IRQSTATUS, status); } /* Start the next conversion ? */ if (status & ADC_IRQ_END_OF_SEQ) ti_adc_setup(sc); TI_ADC_UNLOCK(sc); } static void ti_adc_sysctl_init(struct ti_adc_softc *sc) { char pinbuf[3]; struct sysctl_ctx_list *ctx; struct sysctl_oid *tree_node, *inp_node, *inpN_node; struct sysctl_oid_list *tree, *inp_tree, *inpN_tree; int ain, i; /* * Add per-pin sysctl tree/handlers. */ ctx = device_get_sysctl_ctx(sc->sc_dev); tree_node = device_get_sysctl_tree(sc->sc_dev); tree = SYSCTL_CHILDREN(tree_node); SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "clockdiv", CTLFLAG_RW | CTLTYPE_UINT, sc, 0, ti_adc_clockdiv_proc, "IU", "ADC clock prescaler"); inp_node = SYSCTL_ADD_NODE(ctx, tree, OID_AUTO, "ain", CTLFLAG_RD, NULL, "ADC inputs"); inp_tree = SYSCTL_CHILDREN(inp_node); for (i = 0; i < sc->sc_adc_nchannels; i++) { ain = sc->sc_adc_channels[i]; snprintf(pinbuf, sizeof(pinbuf), "%d", ain); inpN_node = SYSCTL_ADD_NODE(ctx, inp_tree, OID_AUTO, pinbuf, CTLFLAG_RD, NULL, "ADC input"); inpN_tree = SYSCTL_CHILDREN(inpN_node); SYSCTL_ADD_PROC(ctx, inpN_tree, OID_AUTO, "enable", CTLFLAG_RW | CTLTYPE_UINT, &ti_adc_inputs[ain], 0, ti_adc_enable_proc, "IU", "Enable ADC input"); SYSCTL_ADD_PROC(ctx, inpN_tree, OID_AUTO, "open_delay", CTLFLAG_RW | CTLTYPE_UINT, &ti_adc_inputs[ain], 0, ti_adc_open_delay_proc, "IU", "ADC open delay"); SYSCTL_ADD_PROC(ctx, inpN_tree, OID_AUTO, "samples_avg", CTLFLAG_RW | CTLTYPE_UINT, &ti_adc_inputs[ain], 0, ti_adc_samples_avg_proc, "IU", "ADC samples average"); SYSCTL_ADD_INT(ctx, inpN_tree, OID_AUTO, "input", CTLFLAG_RD, &ti_adc_inputs[ain].value, 0, "Converted raw value for the ADC input"); } } static void ti_adc_inputs_init(struct ti_adc_softc *sc) { int ain, i; struct ti_adc_input *input; TI_ADC_LOCK(sc); for (i = 0; i < sc->sc_adc_nchannels; i++) { ain = sc->sc_adc_channels[i]; input = &ti_adc_inputs[ain]; input->sc = sc; input->input = ain; input->value = 0; input->enable = 0; input->samples = 0; ti_adc_input_setup(sc, ain); } TI_ADC_UNLOCK(sc); } static void ti_adc_tsc_init(struct ti_adc_softc *sc) { int i, start_step, end_step; uint32_t stepconfig, val; TI_ADC_LOCK(sc); /* X coordinates */ stepconfig = ADC_STEP_FIFO1 | (4 << ADC_STEP_AVG_SHIFT) | ADC_STEP_MODE_HW_ONESHOT | sc->sc_xp_bit; if (sc->sc_tsc_wires == 4) stepconfig |= ADC_STEP_INP(sc->sc_yp_inp) | sc->sc_xn_bit; else if (sc->sc_tsc_wires == 5) stepconfig |= ADC_STEP_INP(4) | sc->sc_xn_bit | sc->sc_yn_bit | sc->sc_yp_bit; else if (sc->sc_tsc_wires == 8) stepconfig |= ADC_STEP_INP(sc->sc_yp_inp) | sc->sc_xn_bit; start_step = ADC_STEPS - sc->sc_coord_readouts + 1; end_step = start_step + sc->sc_coord_readouts - 1; for (i = start_step; i <= end_step; i++) { ADC_WRITE4(sc, ADC_STEPCFG(i), stepconfig); ADC_WRITE4(sc, ADC_STEPDLY(i), STEPDLY_OPEN); } /* Y coordinates */ stepconfig = ADC_STEP_FIFO1 | (4 << ADC_STEP_AVG_SHIFT) | ADC_STEP_MODE_HW_ONESHOT | sc->sc_yn_bit | ADC_STEP_INM(8); if (sc->sc_tsc_wires == 4) stepconfig |= ADC_STEP_INP(sc->sc_xp_inp) | sc->sc_yp_bit; else if (sc->sc_tsc_wires == 5) stepconfig |= ADC_STEP_INP(4) | sc->sc_xp_bit | sc->sc_xn_bit | sc->sc_yp_bit; else if (sc->sc_tsc_wires == 8) stepconfig |= ADC_STEP_INP(sc->sc_xp_inp) | sc->sc_yp_bit; start_step = ADC_STEPS - (sc->sc_coord_readouts*2 + 2) + 1; end_step = start_step + sc->sc_coord_readouts - 1; for (i = start_step; i <= end_step; i++) { ADC_WRITE4(sc, ADC_STEPCFG(i), stepconfig); ADC_WRITE4(sc, ADC_STEPDLY(i), STEPDLY_OPEN); } /* Charge config */ val = ADC_READ4(sc, ADC_IDLECONFIG); ADC_WRITE4(sc, ADC_TC_CHARGE_STEPCONFIG, val); ADC_WRITE4(sc, ADC_TC_CHARGE_DELAY, sc->sc_charge_delay); /* 2 steps for Z */ start_step = ADC_STEPS - (sc->sc_coord_readouts + 2) + 1; stepconfig = ADC_STEP_FIFO1 | (4 << ADC_STEP_AVG_SHIFT) | ADC_STEP_MODE_HW_ONESHOT | sc->sc_yp_bit | sc->sc_xn_bit | ADC_STEP_INP(sc->sc_xp_inp) | ADC_STEP_INM(8); ADC_WRITE4(sc, ADC_STEPCFG(start_step), stepconfig); ADC_WRITE4(sc, ADC_STEPDLY(start_step), STEPDLY_OPEN); start_step++; stepconfig |= ADC_STEP_INP(sc->sc_yn_inp); ADC_WRITE4(sc, ADC_STEPCFG(start_step), stepconfig); ADC_WRITE4(sc, ADC_STEPDLY(start_step), STEPDLY_OPEN); ADC_WRITE4(sc, ADC_FIFO1THRESHOLD, (sc->sc_coord_readouts*2 + 2) - 1); sc->sc_tsc_enabled = 1; start_step = ADC_STEPS - (sc->sc_coord_readouts*2 + 2) + 1; end_step = ADC_STEPS; for (i = start_step; i <= end_step; i++) { sc->sc_tsc_enabled |= (1 << i); } TI_ADC_UNLOCK(sc); } static void ti_adc_idlestep_init(struct ti_adc_softc *sc) { uint32_t val; val = ADC_STEP_YNN_SW | ADC_STEP_INM(8) | ADC_STEP_INP(8) | ADC_STEP_YPN_SW; ADC_WRITE4(sc, ADC_IDLECONFIG, val); } static int ti_adc_config_wires(struct ti_adc_softc *sc, int *wire_configs, int nwire_configs) { int i; int wire, ai; for (i = 0; i < nwire_configs; i++) { wire = wire_configs[i] & 0xf; ai = (wire_configs[i] >> 4) & 0xf; switch (wire) { case ORDER_XP: sc->sc_xp_bit = ADC_STEP_XPP_SW; sc->sc_xp_inp = ai; break; case ORDER_XN: sc->sc_xn_bit = ADC_STEP_XNN_SW; sc->sc_xn_inp = ai; break; case ORDER_YP: sc->sc_yp_bit = ADC_STEP_YPP_SW; sc->sc_yp_inp = ai; break; case ORDER_YN: sc->sc_yn_bit = ADC_STEP_YNN_SW; sc->sc_yn_inp = ai; break; default: device_printf(sc->sc_dev, "Invalid wire config\n"); return (-1); } } return (0); } static int ti_adc_probe(device_t dev) { if (!ofw_bus_is_compatible(dev, "ti,am3359-tscadc")) return (ENXIO); device_set_desc(dev, "TI ADC controller"); return (BUS_PROBE_DEFAULT); } static int ti_adc_attach(device_t dev) { int err, rid, i; struct ti_adc_softc *sc; uint32_t rev, reg; phandle_t node, child; pcell_t cell; int *channels; int nwire_configs; int *wire_configs; sc = device_get_softc(dev); sc->sc_dev = dev; node = ofw_bus_get_node(dev); sc->sc_tsc_wires = 0; sc->sc_coord_readouts = 1; sc->sc_x_plate_resistance = 0; sc->sc_charge_delay = DEFAULT_CHARGE_DELAY; /* Read "tsc" node properties */ child = ofw_bus_find_child(node, "tsc"); if (child != 0 && OF_hasprop(child, "ti,wires")) { if ((OF_getencprop(child, "ti,wires", &cell, sizeof(cell))) > 0) sc->sc_tsc_wires = cell; if ((OF_getencprop(child, "ti,coordinate-readouts", &cell, sizeof(cell))) > 0) sc->sc_coord_readouts = cell; if ((OF_getencprop(child, "ti,x-plate-resistance", &cell, sizeof(cell))) > 0) sc->sc_x_plate_resistance = cell; if ((OF_getencprop(child, "ti,charge-delay", &cell, sizeof(cell))) > 0) sc->sc_charge_delay = cell; - nwire_configs = OF_getencprop_alloc(child, "ti,wire-config", - sizeof(*wire_configs), (void **)&wire_configs); + nwire_configs = OF_getencprop_alloc_multi(child, + "ti,wire-config", sizeof(*wire_configs), + (void **)&wire_configs); if (nwire_configs != sc->sc_tsc_wires) { device_printf(sc->sc_dev, "invalid number of ti,wire-config: %d (should be %d)\n", nwire_configs, sc->sc_tsc_wires); OF_prop_free(wire_configs); return (EINVAL); } err = ti_adc_config_wires(sc, wire_configs, nwire_configs); OF_prop_free(wire_configs); if (err) return (EINVAL); } /* Read "adc" node properties */ child = ofw_bus_find_child(node, "adc"); if (child != 0) { - sc->sc_adc_nchannels = OF_getencprop_alloc(child, "ti,adc-channels", - sizeof(*channels), (void **)&channels); + sc->sc_adc_nchannels = OF_getencprop_alloc_multi(child, + "ti,adc-channels", sizeof(*channels), (void **)&channels); if (sc->sc_adc_nchannels > 0) { for (i = 0; i < sc->sc_adc_nchannels; i++) sc->sc_adc_channels[i] = channels[i]; OF_prop_free(channels); } } /* Sanity check FDT data */ if (sc->sc_tsc_wires + sc->sc_adc_nchannels > TI_ADC_NPINS) { device_printf(dev, "total number of chanels (%d) is larger than %d\n", sc->sc_tsc_wires + sc->sc_adc_nchannels, TI_ADC_NPINS); return (ENXIO); } rid = 0; sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (!sc->sc_mem_res) { device_printf(dev, "cannot allocate memory window\n"); return (ENXIO); } /* Activate the ADC_TSC module. */ err = ti_prcm_clk_enable(TSC_ADC_CLK); if (err) return (err); rid = 0; sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); if (!sc->sc_irq_res) { bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); device_printf(dev, "cannot allocate interrupt\n"); return (ENXIO); } if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE, NULL, ti_adc_intr, sc, &sc->sc_intrhand) != 0) { bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); device_printf(dev, "Unable to setup the irq handler.\n"); return (ENXIO); } /* Check the ADC revision. */ rev = ADC_READ4(sc, ADC_REVISION); device_printf(dev, "scheme: %#x func: %#x rtl: %d rev: %d.%d custom rev: %d\n", (rev & ADC_REV_SCHEME_MSK) >> ADC_REV_SCHEME_SHIFT, (rev & ADC_REV_FUNC_MSK) >> ADC_REV_FUNC_SHIFT, (rev & ADC_REV_RTL_MSK) >> ADC_REV_RTL_SHIFT, (rev & ADC_REV_MAJOR_MSK) >> ADC_REV_MAJOR_SHIFT, rev & ADC_REV_MINOR_MSK, (rev & ADC_REV_CUSTOM_MSK) >> ADC_REV_CUSTOM_SHIFT); reg = ADC_READ4(sc, ADC_CTRL); ADC_WRITE4(sc, ADC_CTRL, reg | ADC_CTRL_STEP_WP | ADC_CTRL_STEP_ID); /* * Set the ADC prescaler to 2400 if touchscreen is not enabled * and to 24 if it is. This sets the ADC clock to ~10Khz and * ~1Mhz respectively (CLK_M_OSC / prescaler). */ if (sc->sc_tsc_wires) ADC_WRITE4(sc, ADC_CLKDIV, 24 - 1); else ADC_WRITE4(sc, ADC_CLKDIV, 2400 - 1); TI_ADC_LOCK_INIT(sc); ti_adc_idlestep_init(sc); ti_adc_inputs_init(sc); ti_adc_sysctl_init(sc); ti_adc_tsc_init(sc); TI_ADC_LOCK(sc); ti_adc_setup(sc); TI_ADC_UNLOCK(sc); #ifdef EVDEV_SUPPORT if (sc->sc_tsc_wires > 0) { sc->sc_evdev = evdev_alloc(); evdev_set_name(sc->sc_evdev, device_get_desc(dev)); evdev_set_phys(sc->sc_evdev, device_get_nameunit(dev)); evdev_set_id(sc->sc_evdev, BUS_VIRTUAL, 0, 0, 0); evdev_support_prop(sc->sc_evdev, INPUT_PROP_DIRECT); evdev_support_event(sc->sc_evdev, EV_SYN); evdev_support_event(sc->sc_evdev, EV_ABS); evdev_support_event(sc->sc_evdev, EV_KEY); evdev_support_abs(sc->sc_evdev, ABS_X, 0, 0, ADC_MAX_VALUE, 0, 0, 0); evdev_support_abs(sc->sc_evdev, ABS_Y, 0, 0, ADC_MAX_VALUE, 0, 0, 0); evdev_support_key(sc->sc_evdev, BTN_TOUCH); err = evdev_register(sc->sc_evdev); if (err) { device_printf(dev, "failed to register evdev: error=%d\n", err); ti_adc_detach(dev); return (err); } sc->sc_pen_down = 0; sc->sc_x = -1; sc->sc_y = -1; } #endif /* EVDEV */ return (0); } static int ti_adc_detach(device_t dev) { struct ti_adc_softc *sc; sc = device_get_softc(dev); /* Turn off the ADC. */ TI_ADC_LOCK(sc); ti_adc_reset(sc); ti_adc_setup(sc); #ifdef EVDEV_SUPPORT evdev_free(sc->sc_evdev); #endif TI_ADC_UNLOCK(sc); TI_ADC_LOCK_DESTROY(sc); if (sc->sc_intrhand) bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intrhand); if (sc->sc_irq_res) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); if (sc->sc_mem_res) bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); return (bus_generic_detach(dev)); } static device_method_t ti_adc_methods[] = { DEVMETHOD(device_probe, ti_adc_probe), DEVMETHOD(device_attach, ti_adc_attach), DEVMETHOD(device_detach, ti_adc_detach), DEVMETHOD_END }; static driver_t ti_adc_driver = { "ti_adc", ti_adc_methods, sizeof(struct ti_adc_softc), }; static devclass_t ti_adc_devclass; DRIVER_MODULE(ti_adc, simplebus, ti_adc_driver, ti_adc_devclass, 0, 0); MODULE_VERSION(ti_adc, 1); MODULE_DEPEND(ti_adc, simplebus, 1, 1, 1); #ifdef EVDEV_SUPPORT MODULE_DEPEND(ti_adc, evdev, 1, 1, 1); #endif Index: head/sys/arm/ti/ti_pinmux.c =================================================================== --- head/sys/arm/ti/ti_pinmux.c (revision 332340) +++ head/sys/arm/ti/ti_pinmux.c (revision 332341) @@ -1,461 +1,461 @@ /* * Copyright (c) 2010 * Ben Gray . * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Ben Gray. * 4. The name of the company nor the name of the author may be used to * endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** * Exposes pinmux module to pinctrl-compatible interface */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "ti_pinmux.h" struct pincfg { uint32_t reg; uint32_t conf; }; static struct resource_spec ti_pinmux_res_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Control memory window */ { -1, 0 } }; static struct ti_pinmux_softc *ti_pinmux_sc; #define ti_pinmux_read_2(sc, reg) \ bus_space_read_2((sc)->sc_bst, (sc)->sc_bsh, (reg)) #define ti_pinmux_write_2(sc, reg, val) \ bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) #define ti_pinmux_read_4(sc, reg) \ bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) #define ti_pinmux_write_4(sc, reg, val) \ bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) /** * ti_padconf_devmap - Array of pins, should be defined one per SoC * * This array is typically defined in one of the targeted *_scm_pinumx.c * files and is specific to the given SoC platform. Each entry in the array * corresponds to an individual pin. */ static const struct ti_pinmux_device *ti_pinmux_dev; /** * ti_pinmux_padconf_from_name - searches the list of pads and returns entry * with matching ball name. * @ballname: the name of the ball * * RETURNS: * A pointer to the matching padconf or NULL if the ball wasn't found. */ static const struct ti_pinmux_padconf* ti_pinmux_padconf_from_name(const char *ballname) { const struct ti_pinmux_padconf *padconf; padconf = ti_pinmux_dev->padconf; while (padconf->ballname != NULL) { if (strcmp(ballname, padconf->ballname) == 0) return(padconf); padconf++; } return (NULL); } /** * ti_pinmux_padconf_set_internal - sets the muxmode and state for a pad/pin * @padconf: pointer to the pad structure * @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx" * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? * * * LOCKING: * Internally locks it's own context. * * RETURNS: * 0 on success. * EINVAL if pin requested is outside valid range or already in use. */ static int ti_pinmux_padconf_set_internal(struct ti_pinmux_softc *sc, const struct ti_pinmux_padconf *padconf, const char *muxmode, unsigned int state) { unsigned int mode; uint16_t reg_val; /* populate the new value for the PADCONF register */ reg_val = (uint16_t)(state & ti_pinmux_dev->padconf_sate_mask); /* find the new mode requested */ for (mode = 0; mode < 8; mode++) { if ((padconf->muxmodes[mode] != NULL) && (strcmp(padconf->muxmodes[mode], muxmode) == 0)) { break; } } /* couldn't find the mux mode */ if (mode >= 8) { printf("Invalid mode \"%s\"\n", muxmode); return (EINVAL); } /* set the mux mode */ reg_val |= (uint16_t)(mode & ti_pinmux_dev->padconf_muxmode_mask); if (bootverbose) device_printf(sc->sc_dev, "setting internal %x for %s\n", reg_val, muxmode); /* write the register value (16-bit writes) */ ti_pinmux_write_2(sc, padconf->reg_off, reg_val); return (0); } /** * ti_pinmux_padconf_set - sets the muxmode and state for a pad/pin * @padname: the name of the pad, i.e. "c12" * @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx" * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? * * * LOCKING: * Internally locks it's own context. * * RETURNS: * 0 on success. * EINVAL if pin requested is outside valid range or already in use. */ int ti_pinmux_padconf_set(const char *padname, const char *muxmode, unsigned int state) { const struct ti_pinmux_padconf *padconf; if (!ti_pinmux_sc) return (ENXIO); /* find the pin in the devmap */ padconf = ti_pinmux_padconf_from_name(padname); if (padconf == NULL) return (EINVAL); return (ti_pinmux_padconf_set_internal(ti_pinmux_sc, padconf, muxmode, state)); } /** * ti_pinmux_padconf_get - gets the muxmode and state for a pad/pin * @padname: the name of the pad, i.e. "c12" * @muxmode: upon return will contain the name of the muxmode of the pin * @state: upon return will contain the state of the pad/pin * * * LOCKING: * Internally locks it's own context. * * RETURNS: * 0 on success. * EINVAL if pin requested is outside valid range or already in use. */ int ti_pinmux_padconf_get(const char *padname, const char **muxmode, unsigned int *state) { const struct ti_pinmux_padconf *padconf; uint16_t reg_val; if (!ti_pinmux_sc) return (ENXIO); /* find the pin in the devmap */ padconf = ti_pinmux_padconf_from_name(padname); if (padconf == NULL) return (EINVAL); /* read the register value (16-bit reads) */ reg_val = ti_pinmux_read_2(ti_pinmux_sc, padconf->reg_off); /* save the state */ if (state) *state = (reg_val & ti_pinmux_dev->padconf_sate_mask); /* save the mode */ if (muxmode) *muxmode = padconf->muxmodes[(reg_val & ti_pinmux_dev->padconf_muxmode_mask)]; return (0); } /** * ti_pinmux_padconf_set_gpiomode - converts a pad to GPIO mode. * @gpio: the GPIO pin number (0-195) * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? * * * * LOCKING: * Internally locks it's own context. * * RETURNS: * 0 on success. * EINVAL if pin requested is outside valid range or already in use. */ int ti_pinmux_padconf_set_gpiomode(uint32_t gpio, unsigned int state) { const struct ti_pinmux_padconf *padconf; uint16_t reg_val; if (!ti_pinmux_sc) return (ENXIO); /* find the gpio pin in the padconf array */ padconf = ti_pinmux_dev->padconf; while (padconf->ballname != NULL) { if (padconf->gpio_pin == gpio) break; padconf++; } if (padconf->ballname == NULL) return (EINVAL); /* populate the new value for the PADCONF register */ reg_val = (uint16_t)(state & ti_pinmux_dev->padconf_sate_mask); /* set the mux mode */ reg_val |= (uint16_t)(padconf->gpio_mode & ti_pinmux_dev->padconf_muxmode_mask); /* write the register value (16-bit writes) */ ti_pinmux_write_2(ti_pinmux_sc, padconf->reg_off, reg_val); return (0); } /** * ti_pinmux_padconf_get_gpiomode - gets the current GPIO mode of the pin * @gpio: the GPIO pin number (0-195) * @state: upon return will contain the state * * * * LOCKING: * Internally locks it's own context. * * RETURNS: * 0 on success. * EINVAL if pin requested is outside valid range or not configured as GPIO. */ int ti_pinmux_padconf_get_gpiomode(uint32_t gpio, unsigned int *state) { const struct ti_pinmux_padconf *padconf; uint16_t reg_val; if (!ti_pinmux_sc) return (ENXIO); /* find the gpio pin in the padconf array */ padconf = ti_pinmux_dev->padconf; while (padconf->ballname != NULL) { if (padconf->gpio_pin == gpio) break; padconf++; } if (padconf->ballname == NULL) return (EINVAL); /* read the current register settings */ reg_val = ti_pinmux_read_2(ti_pinmux_sc, padconf->reg_off); /* check to make sure the pins is configured as GPIO in the first state */ if ((reg_val & ti_pinmux_dev->padconf_muxmode_mask) != padconf->gpio_mode) return (EINVAL); /* read and store the reset of the state, i.e. pull-up, pull-down, etc */ if (state) *state = (reg_val & ti_pinmux_dev->padconf_sate_mask); return (0); } static int ti_pinmux_configure_pins(device_t dev, phandle_t cfgxref) { struct pincfg *cfgtuples, *cfg; phandle_t cfgnode; int i, ntuples; static struct ti_pinmux_softc *sc; sc = device_get_softc(dev); cfgnode = OF_node_from_xref(cfgxref); - ntuples = OF_getencprop_alloc(cfgnode, "pinctrl-single,pins", sizeof(*cfgtuples), - (void **)&cfgtuples); + ntuples = OF_getencprop_alloc_multi(cfgnode, "pinctrl-single,pins", + sizeof(*cfgtuples), (void **)&cfgtuples); if (ntuples < 0) return (ENOENT); if (ntuples == 0) return (0); /* Empty property is not an error. */ for (i = 0, cfg = cfgtuples; i < ntuples; i++, cfg++) { if (bootverbose) { char name[32]; OF_getprop(cfgnode, "name", &name, sizeof(name)); printf("%16s: muxreg 0x%04x muxval 0x%02x\n", name, cfg->reg, cfg->conf); } /* write the register value (16-bit writes) */ ti_pinmux_write_2(sc, cfg->reg, cfg->conf); } OF_prop_free(cfgtuples); return (0); } /* * Device part of OMAP SCM driver */ static int ti_pinmux_probe(device_t dev) { if (!ofw_bus_status_okay(dev)) return (ENXIO); if (!ofw_bus_is_compatible(dev, "pinctrl-single")) return (ENXIO); if (ti_pinmux_sc) { printf("%s: multiple pinctrl modules in device tree data, ignoring\n", __func__); return (EEXIST); } switch (ti_chip()) { #ifdef SOC_OMAP4 case CHIP_OMAP_4: ti_pinmux_dev = &omap4_pinmux_dev; break; #endif #ifdef SOC_TI_AM335X case CHIP_AM335X: ti_pinmux_dev = &ti_am335x_pinmux_dev; break; #endif default: printf("Unknown CPU in pinmux\n"); return (ENXIO); } device_set_desc(dev, "TI Pinmux Module"); return (BUS_PROBE_DEFAULT); } /** * ti_pinmux_attach - attaches the pinmux to the simplebus * @dev: new device * * RETURNS * Zero on success or ENXIO if an error occuried. */ static int ti_pinmux_attach(device_t dev) { struct ti_pinmux_softc *sc = device_get_softc(dev); #if 0 if (ti_pinmux_sc) return (ENXIO); #endif sc->sc_dev = dev; if (bus_alloc_resources(dev, ti_pinmux_res_spec, sc->sc_res)) { device_printf(dev, "could not allocate resources\n"); return (ENXIO); } sc->sc_bst = rman_get_bustag(sc->sc_res[0]); sc->sc_bsh = rman_get_bushandle(sc->sc_res[0]); if (ti_pinmux_sc == NULL) ti_pinmux_sc = sc; fdt_pinctrl_register(dev, "pinctrl-single,pins"); fdt_pinctrl_configure_tree(dev); return (0); } static device_method_t ti_pinmux_methods[] = { DEVMETHOD(device_probe, ti_pinmux_probe), DEVMETHOD(device_attach, ti_pinmux_attach), /* fdt_pinctrl interface */ DEVMETHOD(fdt_pinctrl_configure, ti_pinmux_configure_pins), { 0, 0 } }; static driver_t ti_pinmux_driver = { "ti_pinmux", ti_pinmux_methods, sizeof(struct ti_pinmux_softc), }; static devclass_t ti_pinmux_devclass; DRIVER_MODULE(ti_pinmux, simplebus, ti_pinmux_driver, ti_pinmux_devclass, 0, 0); Index: head/sys/dev/cpufreq/cpufreq_dt.c =================================================================== --- head/sys/dev/cpufreq/cpufreq_dt.c (revision 332340) +++ head/sys/dev/cpufreq/cpufreq_dt.c (revision 332341) @@ -1,360 +1,360 @@ /*- * Copyright (c) 2016 Jared McNeill * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ /* * Generic DT based cpufreq driver */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include "cpufreq_if.h" struct cpufreq_dt_opp { uint32_t freq_khz; uint32_t voltage_uv; }; struct cpufreq_dt_softc { clk_t clk; regulator_t reg; struct cpufreq_dt_opp *opp; ssize_t nopp; int clk_latency; cpuset_t cpus; }; static void cpufreq_dt_notify(device_t dev, uint64_t freq) { #ifdef __aarch64__ struct cpufreq_dt_softc *sc; struct pcpu *pc; int cpu; sc = device_get_softc(dev); CPU_FOREACH(cpu) { if (CPU_ISSET(cpu, &sc->cpus)) { pc = pcpu_find(cpu); pc->pc_clock = freq; } } #endif } static const struct cpufreq_dt_opp * cpufreq_dt_find_opp(device_t dev, uint32_t freq_mhz) { struct cpufreq_dt_softc *sc; ssize_t n; sc = device_get_softc(dev); for (n = 0; n < sc->nopp; n++) if (CPUFREQ_CMP(sc->opp[n].freq_khz / 1000, freq_mhz)) return (&sc->opp[n]); return (NULL); } static void cpufreq_dt_opp_to_setting(device_t dev, const struct cpufreq_dt_opp *opp, struct cf_setting *set) { struct cpufreq_dt_softc *sc; sc = device_get_softc(dev); memset(set, 0, sizeof(*set)); set->freq = opp->freq_khz / 1000; set->volts = opp->voltage_uv / 1000; set->power = CPUFREQ_VAL_UNKNOWN; set->lat = sc->clk_latency; set->dev = dev; } static int cpufreq_dt_get(device_t dev, struct cf_setting *set) { struct cpufreq_dt_softc *sc; const struct cpufreq_dt_opp *opp; uint64_t freq; sc = device_get_softc(dev); if (clk_get_freq(sc->clk, &freq) != 0) return (ENXIO); opp = cpufreq_dt_find_opp(dev, freq / 1000000); if (opp == NULL) return (ENOENT); cpufreq_dt_opp_to_setting(dev, opp, set); return (0); } static int cpufreq_dt_set(device_t dev, const struct cf_setting *set) { struct cpufreq_dt_softc *sc; const struct cpufreq_dt_opp *opp, *copp; uint64_t freq; int error; sc = device_get_softc(dev); if (clk_get_freq(sc->clk, &freq) != 0) return (ENXIO); copp = cpufreq_dt_find_opp(dev, freq / 1000000); if (copp == NULL) return (ENOENT); opp = cpufreq_dt_find_opp(dev, set->freq); if (opp == NULL) return (EINVAL); if (copp->voltage_uv < opp->voltage_uv) { error = regulator_set_voltage(sc->reg, opp->voltage_uv, opp->voltage_uv); if (error != 0) return (ENXIO); } error = clk_set_freq(sc->clk, (uint64_t)opp->freq_khz * 1000, 0); if (error != 0) { /* Restore previous voltage (best effort) */ (void)regulator_set_voltage(sc->reg, copp->voltage_uv, copp->voltage_uv); return (ENXIO); } if (copp->voltage_uv > opp->voltage_uv) { error = regulator_set_voltage(sc->reg, opp->voltage_uv, opp->voltage_uv); if (error != 0) { /* Restore previous CPU frequency (best effort) */ (void)clk_set_freq(sc->clk, (uint64_t)copp->freq_khz * 1000, 0); return (ENXIO); } } if (clk_get_freq(sc->clk, &freq) == 0) cpufreq_dt_notify(dev, freq); return (0); } static int cpufreq_dt_type(device_t dev, int *type) { if (type == NULL) return (EINVAL); *type = CPUFREQ_TYPE_ABSOLUTE; return (0); } static int cpufreq_dt_settings(device_t dev, struct cf_setting *sets, int *count) { struct cpufreq_dt_softc *sc; ssize_t n; if (sets == NULL || count == NULL) return (EINVAL); sc = device_get_softc(dev); if (*count < sc->nopp) { *count = (int)sc->nopp; return (E2BIG); } for (n = 0; n < sc->nopp; n++) cpufreq_dt_opp_to_setting(dev, &sc->opp[n], &sets[n]); *count = (int)sc->nopp; return (0); } static void cpufreq_dt_identify(driver_t *driver, device_t parent) { phandle_t node; /* Properties must be listed under node /cpus/cpu@0 */ node = ofw_bus_get_node(parent); /* The cpu@0 node must have the following properties */ if (!OF_hasprop(node, "operating-points") || !OF_hasprop(node, "clocks") || !OF_hasprop(node, "cpu-supply")) return; if (device_find_child(parent, "cpufreq_dt", -1) != NULL) return; if (BUS_ADD_CHILD(parent, 0, "cpufreq_dt", -1) == NULL) device_printf(parent, "add cpufreq_dt child failed\n"); } static int cpufreq_dt_probe(device_t dev) { phandle_t node; node = ofw_bus_get_node(device_get_parent(dev)); if (!OF_hasprop(node, "operating-points") || !OF_hasprop(node, "clocks") || !OF_hasprop(node, "cpu-supply")) return (ENXIO); device_set_desc(dev, "Generic cpufreq driver"); return (BUS_PROBE_GENERIC); } static int cpufreq_dt_attach(device_t dev) { struct cpufreq_dt_softc *sc; uint32_t *opp, lat; phandle_t node, cnode; uint64_t freq; ssize_t n; int cpu; sc = device_get_softc(dev); node = ofw_bus_get_node(device_get_parent(dev)); if (regulator_get_by_ofw_property(dev, node, "cpu-supply", &sc->reg) != 0) { device_printf(dev, "no regulator for %s\n", ofw_bus_get_name(device_get_parent(dev))); return (ENXIO); } if (clk_get_by_ofw_index(dev, node, 0, &sc->clk) != 0) { device_printf(dev, "no clock for %s\n", ofw_bus_get_name(device_get_parent(dev))); regulator_release(sc->reg); return (ENXIO); } - sc->nopp = OF_getencprop_alloc(node, "operating-points", + sc->nopp = OF_getencprop_alloc_multi(node, "operating-points", sizeof(*sc->opp), (void **)&opp); if (sc->nopp == -1) return (ENXIO); sc->opp = malloc(sizeof(*sc->opp) * sc->nopp, M_DEVBUF, M_WAITOK); for (n = 0; n < sc->nopp; n++) { sc->opp[n].freq_khz = opp[n * 2 + 0]; sc->opp[n].voltage_uv = opp[n * 2 + 1]; if (bootverbose) device_printf(dev, "%u.%03u MHz, %u uV\n", sc->opp[n].freq_khz / 1000, sc->opp[n].freq_khz % 1000, sc->opp[n].voltage_uv); } free(opp, M_OFWPROP); if (OF_getencprop(node, "clock-latency", &lat, sizeof(lat)) == -1) sc->clk_latency = CPUFREQ_VAL_UNKNOWN; else sc->clk_latency = (int)lat; /* * Find all CPUs that share the same voltage and CPU frequency * controls. Start with the current node and move forward until * the end is reached or a peer has an "operating-points" property. */ CPU_ZERO(&sc->cpus); cpu = device_get_unit(device_get_parent(dev)); for (cnode = node; cnode > 0; cnode = OF_peer(cnode), cpu++) { if (cnode != node && OF_hasprop(cnode, "operating-points")) break; CPU_SET(cpu, &sc->cpus); } if (clk_get_freq(sc->clk, &freq) == 0) cpufreq_dt_notify(dev, freq); cpufreq_register(dev); return (0); } static device_method_t cpufreq_dt_methods[] = { /* Device interface */ DEVMETHOD(device_identify, cpufreq_dt_identify), DEVMETHOD(device_probe, cpufreq_dt_probe), DEVMETHOD(device_attach, cpufreq_dt_attach), /* cpufreq interface */ DEVMETHOD(cpufreq_drv_get, cpufreq_dt_get), DEVMETHOD(cpufreq_drv_set, cpufreq_dt_set), DEVMETHOD(cpufreq_drv_type, cpufreq_dt_type), DEVMETHOD(cpufreq_drv_settings, cpufreq_dt_settings), DEVMETHOD_END }; static driver_t cpufreq_dt_driver = { "cpufreq_dt", cpufreq_dt_methods, sizeof(struct cpufreq_dt_softc), }; static devclass_t cpufreq_dt_devclass; DRIVER_MODULE(cpufreq_dt, cpu, cpufreq_dt_driver, cpufreq_dt_devclass, 0, 0); MODULE_VERSION(cpufreq_dt, 1); Index: head/sys/dev/dpaa/qman_fdt.c =================================================================== --- head/sys/dev/dpaa/qman_fdt.c (revision 332340) +++ head/sys/dev/dpaa/qman_fdt.c (revision 332341) @@ -1,267 +1,267 @@ /*- * Copyright (c) 2011-2012 Semihalf. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include "opt_platform.h" #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include "qman.h" #include "portals.h" #define FQMAN_DEVSTR "Freescale Queue Manager" static int qman_fdt_probe(device_t); static device_method_t qman_methods[] = { /* Device interface */ DEVMETHOD(device_probe, qman_fdt_probe), DEVMETHOD(device_attach, qman_attach), DEVMETHOD(device_detach, qman_detach), DEVMETHOD(device_suspend, qman_suspend), DEVMETHOD(device_resume, qman_resume), DEVMETHOD(device_shutdown, qman_shutdown), { 0, 0 } }; static driver_t qman_driver = { "qman", qman_methods, sizeof(struct qman_softc), }; static devclass_t qman_devclass; DRIVER_MODULE(qman, simplebus, qman_driver, qman_devclass, 0, 0); static int qman_fdt_probe(device_t dev) { if (!ofw_bus_is_compatible(dev, "fsl,qman")) return (ENXIO); device_set_desc(dev, FQMAN_DEVSTR); return (BUS_PROBE_DEFAULT); } /* * QMAN Portals */ #define QMAN_PORT_DEVSTR "Freescale Queue Manager - Portals" static device_probe_t qman_portals_fdt_probe; static device_attach_t qman_portals_fdt_attach; static device_method_t qm_portals_methods[] = { /* Device interface */ DEVMETHOD(device_probe, qman_portals_fdt_probe), DEVMETHOD(device_attach, qman_portals_fdt_attach), DEVMETHOD(device_detach, qman_portals_detach), { 0, 0 } }; static driver_t qm_portals_driver = { "qman-portals", qm_portals_methods, sizeof(struct dpaa_portals_softc), }; static devclass_t qm_portals_devclass; EARLY_DRIVER_MODULE(qman_portals, ofwbus, qm_portals_driver, qm_portals_devclass, 0, 0, BUS_PASS_BUS); static void get_addr_props(phandle_t node, uint32_t *addrp, uint32_t *sizep) { *addrp = 2; *sizep = 1; OF_getencprop(node, "#address-cells", addrp, sizeof(*addrp)); OF_getencprop(node, "#size-cells", sizep, sizeof(*sizep)); } static int qman_portals_fdt_probe(device_t dev) { phandle_t node; if (ofw_bus_is_compatible(dev, "simple-bus")) { node = ofw_bus_get_node(dev); for (node = OF_child(node); node > 0; node = OF_peer(node)) { if (ofw_bus_node_is_compatible(node, "fsl,qman-portal")) break; } if (node <= 0) return (ENXIO); } else if (!ofw_bus_is_compatible(dev, "fsl,qman-portals")) return (ENXIO); device_set_desc(dev, QMAN_PORT_DEVSTR); return (BUS_PROBE_DEFAULT); } static phandle_t qman_portal_find_cpu(int cpu) { phandle_t node; pcell_t reg; node = OF_finddevice("/cpus"); if (node == -1) return (-1); for (node = OF_child(node); node != 0; node = OF_peer(node)) { if (OF_getprop(node, "reg", ®, sizeof(reg)) <= 0) continue; if (reg == cpu) return (node); } return (-1); } static int qman_portals_fdt_attach(device_t dev) { struct dpaa_portals_softc *sc; phandle_t node, child, cpu_node; vm_paddr_t portal_pa, portal_par_pa; vm_size_t portal_size; uint32_t addr, paddr, size; ihandle_t cpu; int cpu_num, cpus, intr_rid; struct dpaa_portals_devinfo di; struct ofw_bus_devinfo ofw_di = {}; cell_t *range; int nrange; int i; cpus = 0; sc = device_get_softc(dev); sc->sc_dev = dev; node = ofw_bus_get_node(dev); /* Get this node's range */ get_addr_props(ofw_bus_get_node(device_get_parent(dev)), &paddr, &size); get_addr_props(node, &addr, &size); - nrange = OF_getencprop_alloc(node, "ranges", + nrange = OF_getencprop_alloc_multi(node, "ranges", sizeof(*range), (void **)&range); if (nrange < addr + paddr + size) return (ENXIO); portal_pa = portal_par_pa = 0; portal_size = 0; for (i = 0; i < addr; i++) { portal_pa <<= 32; portal_pa |= range[i]; } for (; i < paddr + addr; i++) { portal_par_pa <<= 32; portal_par_pa |= range[i]; } portal_pa += portal_par_pa; for (; i < size + paddr + addr; i++) { portal_size = (uintmax_t)portal_size << 32; portal_size |= range[i]; } OF_prop_free(range); sc->sc_dp_size = portal_size; sc->sc_dp_pa = portal_pa; /* Find portals tied to CPUs */ for (child = OF_child(node); child != 0; child = OF_peer(child)) { if (cpus >= mp_ncpus) break; if (!ofw_bus_node_is_compatible(child, "fsl,qman-portal")) { continue; } /* Checkout related cpu */ if (OF_getprop(child, "cpu-handle", (void *)&cpu, sizeof(cpu)) <= 0) { cpu = qman_portal_find_cpu(cpus); if (cpu <= 0) continue; } /* Acquire cpu number */ cpu_node = OF_instance_to_package(cpu); if (OF_getencprop(cpu_node, "reg", &cpu_num, sizeof(cpu_num)) <= 0) { device_printf(dev, "Could not retrieve CPU number.\n"); return (ENXIO); } cpus++; if (ofw_bus_gen_setup_devinfo(&ofw_di, child) != 0) { device_printf(dev, "could not set up devinfo\n"); continue; } resource_list_init(&di.di_res); if (ofw_bus_reg_to_rl(dev, child, addr, size, &di.di_res)) { device_printf(dev, "%s: could not process 'reg' " "property\n", ofw_di.obd_name); ofw_bus_gen_destroy_devinfo(&ofw_di); continue; } if (ofw_bus_intr_to_rl(dev, child, &di.di_res, &intr_rid)) { device_printf(dev, "%s: could not process " "'interrupts' property\n", ofw_di.obd_name); resource_list_free(&di.di_res); ofw_bus_gen_destroy_devinfo(&ofw_di); continue; } di.di_intr_rid = intr_rid; if (dpaa_portal_alloc_res(dev, &di, cpu_num)) goto err; } ofw_bus_gen_destroy_devinfo(&ofw_di); return (qman_portals_attach(dev)); err: resource_list_free(&di.di_res); ofw_bus_gen_destroy_devinfo(&ofw_di); qman_portals_detach(dev); return (ENXIO); } Index: head/sys/dev/extres/clk/clk.c =================================================================== --- head/sys/dev/extres/clk/clk.c (revision 332340) +++ head/sys/dev/extres/clk/clk.c (revision 332341) @@ -1,1514 +1,1514 @@ /*- * Copyright 2016 Michal Meloun * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_platform.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #ifdef FDT #include #include #include #endif #include MALLOC_DEFINE(M_CLOCK, "clocks", "Clock framework"); /* Forward declarations. */ struct clk; struct clknodenode; struct clkdom; typedef TAILQ_HEAD(clknode_list, clknode) clknode_list_t; typedef TAILQ_HEAD(clkdom_list, clkdom) clkdom_list_t; /* Default clock methods. */ static int clknode_method_init(struct clknode *clk, device_t dev); static int clknode_method_recalc_freq(struct clknode *clk, uint64_t *freq); static int clknode_method_set_freq(struct clknode *clk, uint64_t fin, uint64_t *fout, int flags, int *stop); static int clknode_method_set_gate(struct clknode *clk, bool enable); static int clknode_method_set_mux(struct clknode *clk, int idx); /* * Clock controller methods. */ static clknode_method_t clknode_methods[] = { CLKNODEMETHOD(clknode_init, clknode_method_init), CLKNODEMETHOD(clknode_recalc_freq, clknode_method_recalc_freq), CLKNODEMETHOD(clknode_set_freq, clknode_method_set_freq), CLKNODEMETHOD(clknode_set_gate, clknode_method_set_gate), CLKNODEMETHOD(clknode_set_mux, clknode_method_set_mux), CLKNODEMETHOD_END }; DEFINE_CLASS_0(clknode, clknode_class, clknode_methods, 0); /* * Clock node - basic element for modeling SOC clock graph. It holds the clock * provider's data about the clock, and the links for the clock's membership in * various lists. */ struct clknode { KOBJ_FIELDS; /* Clock nodes topology. */ struct clkdom *clkdom; /* Owning clock domain */ TAILQ_ENTRY(clknode) clkdom_link; /* Domain list entry */ TAILQ_ENTRY(clknode) clklist_link; /* Global list entry */ /* String based parent list. */ const char **parent_names; /* Array of parent names */ int parent_cnt; /* Number of parents */ int parent_idx; /* Parent index or -1 */ /* Cache for already resolved names. */ struct clknode **parents; /* Array of potential parents */ struct clknode *parent; /* Current parent */ /* Parent/child relationship links. */ clknode_list_t children; /* List of our children */ TAILQ_ENTRY(clknode) sibling_link; /* Our entry in parent's list */ /* Details of this device. */ void *softc; /* Instance softc */ const char *name; /* Globally unique name */ intptr_t id; /* Per domain unique id */ int flags; /* CLK_FLAG_* */ struct sx lock; /* Lock for this clock */ int ref_cnt; /* Reference counter */ int enable_cnt; /* Enabled counter */ /* Cached values. */ uint64_t freq; /* Actual frequency */ struct sysctl_ctx_list sysctl_ctx; }; /* * Per consumer data, information about how a consumer is using a clock node. * A pointer to this structure is used as a handle in the consumer interface. */ struct clk { device_t dev; struct clknode *clknode; int enable_cnt; }; /* * Clock domain - a group of clocks provided by one clock device. */ struct clkdom { device_t dev; /* Link to provider device */ TAILQ_ENTRY(clkdom) link; /* Global domain list entry */ clknode_list_t clknode_list; /* All clocks in the domain */ #ifdef FDT clknode_ofw_mapper_func *ofw_mapper; /* Find clock using FDT xref */ #endif }; /* * The system-wide list of clock domains. */ static clkdom_list_t clkdom_list = TAILQ_HEAD_INITIALIZER(clkdom_list); /* * Each clock node is linked on a system-wide list and can be searched by name. */ static clknode_list_t clknode_list = TAILQ_HEAD_INITIALIZER(clknode_list); /* * Locking - we use three levels of locking: * - First, topology lock is taken. This one protect all lists. * - Second level is per clknode lock. It protects clknode data. * - Third level is outside of this file, it protect clock device registers. * First two levels use sleepable locks; clock device can use mutex or sx lock. */ static struct sx clk_topo_lock; SX_SYSINIT(clock_topology, &clk_topo_lock, "Clock topology lock"); #define CLK_TOPO_SLOCK() sx_slock(&clk_topo_lock) #define CLK_TOPO_XLOCK() sx_xlock(&clk_topo_lock) #define CLK_TOPO_UNLOCK() sx_unlock(&clk_topo_lock) #define CLK_TOPO_ASSERT() sx_assert(&clk_topo_lock, SA_LOCKED) #define CLK_TOPO_XASSERT() sx_assert(&clk_topo_lock, SA_XLOCKED) #define CLKNODE_SLOCK(_sc) sx_slock(&((_sc)->lock)) #define CLKNODE_XLOCK(_sc) sx_xlock(&((_sc)->lock)) #define CLKNODE_UNLOCK(_sc) sx_unlock(&((_sc)->lock)) static void clknode_adjust_parent(struct clknode *clknode, int idx); enum clknode_sysctl_type { CLKNODE_SYSCTL_PARENT, CLKNODE_SYSCTL_PARENTS_LIST, CLKNODE_SYSCTL_CHILDREN_LIST, }; static int clknode_sysctl(SYSCTL_HANDLER_ARGS); static int clkdom_sysctl(SYSCTL_HANDLER_ARGS); /* * Default clock methods for base class. */ static int clknode_method_init(struct clknode *clknode, device_t dev) { return (0); } static int clknode_method_recalc_freq(struct clknode *clknode, uint64_t *freq) { return (0); } static int clknode_method_set_freq(struct clknode *clknode, uint64_t fin, uint64_t *fout, int flags, int *stop) { *stop = 0; return (0); } static int clknode_method_set_gate(struct clknode *clk, bool enable) { return (0); } static int clknode_method_set_mux(struct clknode *clk, int idx) { return (0); } /* * Internal functions. */ /* * Duplicate an array of parent names. * * Compute total size and allocate a single block which holds both the array of * pointers to strings and the copied strings themselves. Returns a pointer to * the start of the block where the array of copied string pointers lives. * * XXX Revisit this, no need for the DECONST stuff. */ static const char ** strdup_list(const char **names, int num) { size_t len, slen; const char **outptr, *ptr; int i; len = sizeof(char *) * num; for (i = 0; i < num; i++) { if (names[i] == NULL) continue; slen = strlen(names[i]); if (slen == 0) panic("Clock parent names array have empty string"); len += slen + 1; } outptr = malloc(len, M_CLOCK, M_WAITOK | M_ZERO); ptr = (char *)(outptr + num); for (i = 0; i < num; i++) { if (names[i] == NULL) continue; outptr[i] = ptr; slen = strlen(names[i]) + 1; bcopy(names[i], __DECONST(void *, outptr[i]), slen); ptr += slen; } return (outptr); } /* * Recompute the cached frequency for this node and all its children. */ static int clknode_refresh_cache(struct clknode *clknode, uint64_t freq) { int rv; struct clknode *entry; CLK_TOPO_XASSERT(); /* Compute generated frequency. */ rv = CLKNODE_RECALC_FREQ(clknode, &freq); if (rv != 0) { /* XXX If an error happens while refreshing children * this leaves the world in a partially-updated state. * Panic for now. */ panic("clknode_refresh_cache failed for '%s'\n", clknode->name); return (rv); } /* Refresh cache for this node. */ clknode->freq = freq; /* Refresh cache for all children. */ TAILQ_FOREACH(entry, &(clknode->children), sibling_link) { rv = clknode_refresh_cache(entry, freq); if (rv != 0) return (rv); } return (0); } /* * Public interface. */ struct clknode * clknode_find_by_name(const char *name) { struct clknode *entry; CLK_TOPO_ASSERT(); TAILQ_FOREACH(entry, &clknode_list, clklist_link) { if (strcmp(entry->name, name) == 0) return (entry); } return (NULL); } struct clknode * clknode_find_by_id(struct clkdom *clkdom, intptr_t id) { struct clknode *entry; CLK_TOPO_ASSERT(); TAILQ_FOREACH(entry, &clkdom->clknode_list, clkdom_link) { if (entry->id == id) return (entry); } return (NULL); } /* -------------------------------------------------------------------------- */ /* * Clock domain functions */ /* Find clock domain associated to device in global list. */ struct clkdom * clkdom_get_by_dev(const device_t dev) { struct clkdom *entry; CLK_TOPO_ASSERT(); TAILQ_FOREACH(entry, &clkdom_list, link) { if (entry->dev == dev) return (entry); } return (NULL); } #ifdef FDT /* Default DT mapper. */ static int clknode_default_ofw_map(struct clkdom *clkdom, uint32_t ncells, phandle_t *cells, struct clknode **clk) { CLK_TOPO_ASSERT(); if (ncells == 0) *clk = clknode_find_by_id(clkdom, 1); else if (ncells == 1) *clk = clknode_find_by_id(clkdom, cells[0]); else return (ERANGE); if (*clk == NULL) return (ENXIO); return (0); } #endif /* * Create a clock domain. Returns with the topo lock held. */ struct clkdom * clkdom_create(device_t dev) { struct clkdom *clkdom; clkdom = malloc(sizeof(struct clkdom), M_CLOCK, M_WAITOK | M_ZERO); clkdom->dev = dev; TAILQ_INIT(&clkdom->clknode_list); #ifdef FDT clkdom->ofw_mapper = clknode_default_ofw_map; #endif SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "clocks", CTLTYPE_STRING | CTLFLAG_RD, clkdom, 0, clkdom_sysctl, "A", "Clock list for the domain"); return (clkdom); } void clkdom_unlock(struct clkdom *clkdom) { CLK_TOPO_UNLOCK(); } void clkdom_xlock(struct clkdom *clkdom) { CLK_TOPO_XLOCK(); } /* * Finalize initialization of clock domain. Releases topo lock. * * XXX Revisit failure handling. */ int clkdom_finit(struct clkdom *clkdom) { struct clknode *clknode; int i, rv; #ifdef FDT phandle_t node; if ((node = ofw_bus_get_node(clkdom->dev)) == -1) { device_printf(clkdom->dev, "%s called on not ofw based device\n", __func__); return (ENXIO); } #endif rv = 0; /* Make clock domain globally visible. */ CLK_TOPO_XLOCK(); TAILQ_INSERT_TAIL(&clkdom_list, clkdom, link); #ifdef FDT OF_device_register_xref(OF_xref_from_node(node), clkdom->dev); #endif /* Register all clock names into global list. */ TAILQ_FOREACH(clknode, &clkdom->clknode_list, clkdom_link) { TAILQ_INSERT_TAIL(&clknode_list, clknode, clklist_link); } /* * At this point all domain nodes must be registered and all * parents must be valid. */ TAILQ_FOREACH(clknode, &clkdom->clknode_list, clkdom_link) { if (clknode->parent_cnt == 0) continue; for (i = 0; i < clknode->parent_cnt; i++) { if (clknode->parents[i] != NULL) continue; if (clknode->parent_names[i] == NULL) continue; clknode->parents[i] = clknode_find_by_name( clknode->parent_names[i]); if (clknode->parents[i] == NULL) { device_printf(clkdom->dev, "Clock %s have unknown parent: %s\n", clknode->name, clknode->parent_names[i]); rv = ENODEV; } } /* If parent index is not set yet... */ if (clknode->parent_idx == CLKNODE_IDX_NONE) { device_printf(clkdom->dev, "Clock %s have not set parent idx\n", clknode->name); rv = ENXIO; continue; } if (clknode->parents[clknode->parent_idx] == NULL) { device_printf(clkdom->dev, "Clock %s have unknown parent(idx %d): %s\n", clknode->name, clknode->parent_idx, clknode->parent_names[clknode->parent_idx]); rv = ENXIO; continue; } clknode_adjust_parent(clknode, clknode->parent_idx); } CLK_TOPO_UNLOCK(); return (rv); } /* Dump clock domain. */ void clkdom_dump(struct clkdom * clkdom) { struct clknode *clknode; int rv; uint64_t freq; CLK_TOPO_SLOCK(); TAILQ_FOREACH(clknode, &clkdom->clknode_list, clkdom_link) { rv = clknode_get_freq(clknode, &freq); printf("Clock: %s, parent: %s(%d), freq: %ju\n", clknode->name, clknode->parent == NULL ? "(NULL)" : clknode->parent->name, clknode->parent_idx, (uintmax_t)((rv == 0) ? freq: rv)); } CLK_TOPO_UNLOCK(); } /* * Create and initialize clock object, but do not register it. */ struct clknode * clknode_create(struct clkdom * clkdom, clknode_class_t clknode_class, const struct clknode_init_def *def) { struct clknode *clknode; struct sysctl_oid *clknode_oid; KASSERT(def->name != NULL, ("clock name is NULL")); KASSERT(def->name[0] != '\0', ("clock name is empty")); #ifdef INVARIANTS CLK_TOPO_SLOCK(); if (clknode_find_by_name(def->name) != NULL) panic("Duplicated clock registration: %s\n", def->name); CLK_TOPO_UNLOCK(); #endif /* Create object and initialize it. */ clknode = malloc(sizeof(struct clknode), M_CLOCK, M_WAITOK | M_ZERO); kobj_init((kobj_t)clknode, (kobj_class_t)clknode_class); sx_init(&clknode->lock, "Clocknode lock"); /* Allocate softc if required. */ if (clknode_class->size > 0) { clknode->softc = malloc(clknode_class->size, M_CLOCK, M_WAITOK | M_ZERO); } /* Prepare array for ptrs to parent clocks. */ clknode->parents = malloc(sizeof(struct clknode *) * def->parent_cnt, M_CLOCK, M_WAITOK | M_ZERO); /* Copy all strings unless they're flagged as static. */ if (def->flags & CLK_NODE_STATIC_STRINGS) { clknode->name = def->name; clknode->parent_names = def->parent_names; } else { clknode->name = strdup(def->name, M_CLOCK); clknode->parent_names = strdup_list(def->parent_names, def->parent_cnt); } /* Rest of init. */ clknode->id = def->id; clknode->clkdom = clkdom; clknode->flags = def->flags; clknode->parent_cnt = def->parent_cnt; clknode->parent = NULL; clknode->parent_idx = CLKNODE_IDX_NONE; TAILQ_INIT(&clknode->children); sysctl_ctx_init(&clknode->sysctl_ctx); clknode_oid = SYSCTL_ADD_NODE(&clknode->sysctl_ctx, SYSCTL_STATIC_CHILDREN(_clock), OID_AUTO, clknode->name, CTLFLAG_RD, 0, "A clock node"); SYSCTL_ADD_U64(&clknode->sysctl_ctx, SYSCTL_CHILDREN(clknode_oid), OID_AUTO, "frequency", CTLFLAG_RD, &clknode->freq, 0, "The clock frequency"); SYSCTL_ADD_PROC(&clknode->sysctl_ctx, SYSCTL_CHILDREN(clknode_oid), OID_AUTO, "parent", CTLTYPE_STRING | CTLFLAG_RD, clknode, CLKNODE_SYSCTL_PARENT, clknode_sysctl, "A", "The clock parent"); SYSCTL_ADD_PROC(&clknode->sysctl_ctx, SYSCTL_CHILDREN(clknode_oid), OID_AUTO, "parents", CTLTYPE_STRING | CTLFLAG_RD, clknode, CLKNODE_SYSCTL_PARENTS_LIST, clknode_sysctl, "A", "The clock parents list"); SYSCTL_ADD_PROC(&clknode->sysctl_ctx, SYSCTL_CHILDREN(clknode_oid), OID_AUTO, "childrens", CTLTYPE_STRING | CTLFLAG_RD, clknode, CLKNODE_SYSCTL_CHILDREN_LIST, clknode_sysctl, "A", "The clock childrens list"); SYSCTL_ADD_INT(&clknode->sysctl_ctx, SYSCTL_CHILDREN(clknode_oid), OID_AUTO, "enable_cnt", CTLFLAG_RD, &clknode->enable_cnt, 0, "The clock enable counter"); return (clknode); } /* * Register clock object into clock domain hierarchy. */ struct clknode * clknode_register(struct clkdom * clkdom, struct clknode *clknode) { int rv; rv = CLKNODE_INIT(clknode, clknode_get_device(clknode)); if (rv != 0) { printf(" CLKNODE_INIT failed: %d\n", rv); return (NULL); } TAILQ_INSERT_TAIL(&clkdom->clknode_list, clknode, clkdom_link); return (clknode); } /* * Clock providers interface. */ /* * Reparent clock node. */ static void clknode_adjust_parent(struct clknode *clknode, int idx) { CLK_TOPO_XASSERT(); if (clknode->parent_cnt == 0) return; if ((idx == CLKNODE_IDX_NONE) || (idx >= clknode->parent_cnt)) panic("%s: Invalid parent index %d for clock %s", __func__, idx, clknode->name); if (clknode->parents[idx] == NULL) panic("%s: Invalid parent index %d for clock %s", __func__, idx, clknode->name); /* Remove me from old children list. */ if (clknode->parent != NULL) { TAILQ_REMOVE(&clknode->parent->children, clknode, sibling_link); } /* Insert into children list of new parent. */ clknode->parent_idx = idx; clknode->parent = clknode->parents[idx]; TAILQ_INSERT_TAIL(&clknode->parent->children, clknode, sibling_link); } /* * Set parent index - init function. */ void clknode_init_parent_idx(struct clknode *clknode, int idx) { if (clknode->parent_cnt == 0) { clknode->parent_idx = CLKNODE_IDX_NONE; clknode->parent = NULL; return; } if ((idx == CLKNODE_IDX_NONE) || (idx >= clknode->parent_cnt) || (clknode->parent_names[idx] == NULL)) panic("%s: Invalid parent index %d for clock %s", __func__, idx, clknode->name); clknode->parent_idx = idx; } int clknode_set_parent_by_idx(struct clknode *clknode, int idx) { int rv; uint64_t freq; int oldidx; /* We have exclusive topology lock, node lock is not needed. */ CLK_TOPO_XASSERT(); if (clknode->parent_cnt == 0) return (0); if (clknode->parent_idx == idx) return (0); oldidx = clknode->parent_idx; clknode_adjust_parent(clknode, idx); rv = CLKNODE_SET_MUX(clknode, idx); if (rv != 0) { clknode_adjust_parent(clknode, oldidx); return (rv); } rv = clknode_get_freq(clknode->parent, &freq); if (rv != 0) return (rv); rv = clknode_refresh_cache(clknode, freq); return (rv); } int clknode_set_parent_by_name(struct clknode *clknode, const char *name) { int rv; uint64_t freq; int oldidx, idx; /* We have exclusive topology lock, node lock is not needed. */ CLK_TOPO_XASSERT(); if (clknode->parent_cnt == 0) return (0); /* * If this node doesnt have mux, then passthrough request to parent. * This feature is used in clock domain initialization and allows us to * set clock source and target frequency on the tail node of the clock * chain. */ if (clknode->parent_cnt == 1) { rv = clknode_set_parent_by_name(clknode->parent, name); return (rv); } for (idx = 0; idx < clknode->parent_cnt; idx++) { if (clknode->parent_names[idx] == NULL) continue; if (strcmp(clknode->parent_names[idx], name) == 0) break; } if (idx >= clknode->parent_cnt) { return (ENXIO); } if (clknode->parent_idx == idx) return (0); oldidx = clknode->parent_idx; clknode_adjust_parent(clknode, idx); rv = CLKNODE_SET_MUX(clknode, idx); if (rv != 0) { clknode_adjust_parent(clknode, oldidx); CLKNODE_UNLOCK(clknode); return (rv); } rv = clknode_get_freq(clknode->parent, &freq); if (rv != 0) return (rv); rv = clknode_refresh_cache(clknode, freq); return (rv); } struct clknode * clknode_get_parent(struct clknode *clknode) { return (clknode->parent); } const char * clknode_get_name(struct clknode *clknode) { return (clknode->name); } const char ** clknode_get_parent_names(struct clknode *clknode) { return (clknode->parent_names); } int clknode_get_parents_num(struct clknode *clknode) { return (clknode->parent_cnt); } int clknode_get_parent_idx(struct clknode *clknode) { return (clknode->parent_idx); } int clknode_get_flags(struct clknode *clknode) { return (clknode->flags); } void * clknode_get_softc(struct clknode *clknode) { return (clknode->softc); } device_t clknode_get_device(struct clknode *clknode) { return (clknode->clkdom->dev); } #ifdef FDT void clkdom_set_ofw_mapper(struct clkdom * clkdom, clknode_ofw_mapper_func *map) { clkdom->ofw_mapper = map; } #endif /* * Real consumers executive */ int clknode_get_freq(struct clknode *clknode, uint64_t *freq) { int rv; CLK_TOPO_ASSERT(); /* Use cached value, if it exists. */ *freq = clknode->freq; if (*freq != 0) return (0); /* Get frequency from parent, if the clock has a parent. */ if (clknode->parent_cnt > 0) { rv = clknode_get_freq(clknode->parent, freq); if (rv != 0) { return (rv); } } /* And recalculate my output frequency. */ CLKNODE_XLOCK(clknode); rv = CLKNODE_RECALC_FREQ(clknode, freq); if (rv != 0) { CLKNODE_UNLOCK(clknode); printf("Cannot get frequency for clk: %s, error: %d\n", clknode->name, rv); return (rv); } /* Save new frequency to cache. */ clknode->freq = *freq; CLKNODE_UNLOCK(clknode); return (0); } int clknode_set_freq(struct clknode *clknode, uint64_t freq, int flags, int enablecnt) { int rv, done; uint64_t parent_freq; /* We have exclusive topology lock, node lock is not needed. */ CLK_TOPO_XASSERT(); /* Check for no change */ if (clknode->freq == freq) return (0); parent_freq = 0; /* * We can set frequency only if * clock is disabled * OR * clock is glitch free and is enabled by calling consumer only */ if ((flags & CLK_SET_DRYRUN) == 0 && clknode->enable_cnt > 1 && clknode->enable_cnt > enablecnt && (clknode->flags & CLK_NODE_GLITCH_FREE) == 0) { return (EBUSY); } /* Get frequency from parent, if the clock has a parent. */ if (clknode->parent_cnt > 0) { rv = clknode_get_freq(clknode->parent, &parent_freq); if (rv != 0) { return (rv); } } /* Set frequency for this clock. */ rv = CLKNODE_SET_FREQ(clknode, parent_freq, &freq, flags, &done); if (rv != 0) { printf("Cannot set frequency for clk: %s, error: %d\n", clknode->name, rv); if ((flags & CLK_SET_DRYRUN) == 0) clknode_refresh_cache(clknode, parent_freq); return (rv); } if (done) { /* Success - invalidate frequency cache for all children. */ if ((flags & CLK_SET_DRYRUN) == 0) { clknode->freq = freq; /* Clock might have reparent during set_freq */ if (clknode->parent_cnt > 0) { rv = clknode_get_freq(clknode->parent, &parent_freq); if (rv != 0) { return (rv); } } clknode_refresh_cache(clknode, parent_freq); } } else if (clknode->parent != NULL) { /* Nothing changed, pass request to parent. */ rv = clknode_set_freq(clknode->parent, freq, flags, enablecnt); } else { /* End of chain without action. */ printf("Cannot set frequency for clk: %s, end of chain\n", clknode->name); rv = ENXIO; } return (rv); } int clknode_enable(struct clknode *clknode) { int rv; CLK_TOPO_ASSERT(); /* Enable clock for each node in chain, starting from source. */ if (clknode->parent_cnt > 0) { rv = clknode_enable(clknode->parent); if (rv != 0) { return (rv); } } /* Handle this node */ CLKNODE_XLOCK(clknode); if (clknode->enable_cnt == 0) { rv = CLKNODE_SET_GATE(clknode, 1); if (rv != 0) { CLKNODE_UNLOCK(clknode); return (rv); } } clknode->enable_cnt++; CLKNODE_UNLOCK(clknode); return (0); } int clknode_disable(struct clknode *clknode) { int rv; CLK_TOPO_ASSERT(); rv = 0; CLKNODE_XLOCK(clknode); /* Disable clock for each node in chain, starting from consumer. */ if ((clknode->enable_cnt == 1) && ((clknode->flags & CLK_NODE_CANNOT_STOP) == 0)) { rv = CLKNODE_SET_GATE(clknode, 0); if (rv != 0) { CLKNODE_UNLOCK(clknode); return (rv); } } clknode->enable_cnt--; CLKNODE_UNLOCK(clknode); if (clknode->parent_cnt > 0) { rv = clknode_disable(clknode->parent); } return (rv); } int clknode_stop(struct clknode *clknode, int depth) { int rv; CLK_TOPO_ASSERT(); rv = 0; CLKNODE_XLOCK(clknode); /* The first node cannot be enabled. */ if ((clknode->enable_cnt != 0) && (depth == 0)) { CLKNODE_UNLOCK(clknode); return (EBUSY); } /* Stop clock for each node in chain, starting from consumer. */ if ((clknode->enable_cnt == 0) && ((clknode->flags & CLK_NODE_CANNOT_STOP) == 0)) { rv = CLKNODE_SET_GATE(clknode, 0); if (rv != 0) { CLKNODE_UNLOCK(clknode); return (rv); } } CLKNODE_UNLOCK(clknode); if (clknode->parent_cnt > 0) rv = clknode_stop(clknode->parent, depth + 1); return (rv); } /* -------------------------------------------------------------------------- * * Clock consumers interface. * */ /* Helper function for clk_get*() */ static clk_t clk_create(struct clknode *clknode, device_t dev) { struct clk *clk; CLK_TOPO_ASSERT(); clk = malloc(sizeof(struct clk), M_CLOCK, M_WAITOK); clk->dev = dev; clk->clknode = clknode; clk->enable_cnt = 0; clknode->ref_cnt++; return (clk); } int clk_get_freq(clk_t clk, uint64_t *freq) { int rv; struct clknode *clknode; clknode = clk->clknode; KASSERT(clknode->ref_cnt > 0, ("Attempt to access unreferenced clock: %s\n", clknode->name)); CLK_TOPO_SLOCK(); rv = clknode_get_freq(clknode, freq); CLK_TOPO_UNLOCK(); return (rv); } int clk_set_freq(clk_t clk, uint64_t freq, int flags) { int rv; struct clknode *clknode; flags &= CLK_SET_USER_MASK; clknode = clk->clknode; KASSERT(clknode->ref_cnt > 0, ("Attempt to access unreferenced clock: %s\n", clknode->name)); CLK_TOPO_XLOCK(); rv = clknode_set_freq(clknode, freq, flags, clk->enable_cnt); CLK_TOPO_UNLOCK(); return (rv); } int clk_test_freq(clk_t clk, uint64_t freq, int flags) { int rv; struct clknode *clknode; flags &= CLK_SET_USER_MASK; clknode = clk->clknode; KASSERT(clknode->ref_cnt > 0, ("Attempt to access unreferenced clock: %s\n", clknode->name)); CLK_TOPO_XLOCK(); rv = clknode_set_freq(clknode, freq, flags | CLK_SET_DRYRUN, 0); CLK_TOPO_UNLOCK(); return (rv); } int clk_get_parent(clk_t clk, clk_t *parent) { struct clknode *clknode; struct clknode *parentnode; clknode = clk->clknode; KASSERT(clknode->ref_cnt > 0, ("Attempt to access unreferenced clock: %s\n", clknode->name)); CLK_TOPO_SLOCK(); parentnode = clknode_get_parent(clknode); if (parentnode == NULL) { CLK_TOPO_UNLOCK(); return (ENODEV); } *parent = clk_create(parentnode, clk->dev); CLK_TOPO_UNLOCK(); return (0); } int clk_set_parent_by_clk(clk_t clk, clk_t parent) { int rv; struct clknode *clknode; struct clknode *parentnode; clknode = clk->clknode; parentnode = parent->clknode; KASSERT(clknode->ref_cnt > 0, ("Attempt to access unreferenced clock: %s\n", clknode->name)); KASSERT(parentnode->ref_cnt > 0, ("Attempt to access unreferenced clock: %s\n", clknode->name)); CLK_TOPO_XLOCK(); rv = clknode_set_parent_by_name(clknode, parentnode->name); CLK_TOPO_UNLOCK(); return (rv); } int clk_enable(clk_t clk) { int rv; struct clknode *clknode; clknode = clk->clknode; KASSERT(clknode->ref_cnt > 0, ("Attempt to access unreferenced clock: %s\n", clknode->name)); CLK_TOPO_SLOCK(); rv = clknode_enable(clknode); if (rv == 0) clk->enable_cnt++; CLK_TOPO_UNLOCK(); return (rv); } int clk_disable(clk_t clk) { int rv; struct clknode *clknode; clknode = clk->clknode; KASSERT(clknode->ref_cnt > 0, ("Attempt to access unreferenced clock: %s\n", clknode->name)); KASSERT(clk->enable_cnt > 0, ("Attempt to disable already disabled clock: %s\n", clknode->name)); CLK_TOPO_SLOCK(); rv = clknode_disable(clknode); if (rv == 0) clk->enable_cnt--; CLK_TOPO_UNLOCK(); return (rv); } int clk_stop(clk_t clk) { int rv; struct clknode *clknode; clknode = clk->clknode; KASSERT(clknode->ref_cnt > 0, ("Attempt to access unreferenced clock: %s\n", clknode->name)); KASSERT(clk->enable_cnt == 0, ("Attempt to stop already enabled clock: %s\n", clknode->name)); CLK_TOPO_SLOCK(); rv = clknode_stop(clknode, 0); CLK_TOPO_UNLOCK(); return (rv); } int clk_release(clk_t clk) { struct clknode *clknode; clknode = clk->clknode; KASSERT(clknode->ref_cnt > 0, ("Attempt to access unreferenced clock: %s\n", clknode->name)); CLK_TOPO_SLOCK(); while (clk->enable_cnt > 0) { clknode_disable(clknode); clk->enable_cnt--; } CLKNODE_XLOCK(clknode); clknode->ref_cnt--; CLKNODE_UNLOCK(clknode); CLK_TOPO_UNLOCK(); free(clk, M_CLOCK); return (0); } const char * clk_get_name(clk_t clk) { const char *name; struct clknode *clknode; clknode = clk->clknode; KASSERT(clknode->ref_cnt > 0, ("Attempt to access unreferenced clock: %s\n", clknode->name)); name = clknode_get_name(clknode); return (name); } int clk_get_by_name(device_t dev, const char *name, clk_t *clk) { struct clknode *clknode; CLK_TOPO_SLOCK(); clknode = clknode_find_by_name(name); if (clknode == NULL) { CLK_TOPO_UNLOCK(); return (ENODEV); } *clk = clk_create(clknode, dev); CLK_TOPO_UNLOCK(); return (0); } int clk_get_by_id(device_t dev, struct clkdom *clkdom, intptr_t id, clk_t *clk) { struct clknode *clknode; CLK_TOPO_SLOCK(); clknode = clknode_find_by_id(clkdom, id); if (clknode == NULL) { CLK_TOPO_UNLOCK(); return (ENODEV); } *clk = clk_create(clknode, dev); CLK_TOPO_UNLOCK(); return (0); } #ifdef FDT int clk_set_assigned(device_t dev, phandle_t node) { clk_t clk, clk_parent; int error, nclocks, i; error = ofw_bus_parse_xref_list_get_length(node, "assigned-clock-parents", "#clock-cells", &nclocks); if (error != 0) { if (error != ENOENT) device_printf(dev, "cannot parse assigned-clock-parents property\n"); return (error); } for (i = 0; i < nclocks; i++) { error = clk_get_by_ofw_index_prop(dev, 0, "assigned-clock-parents", i, &clk_parent); if (error != 0) { device_printf(dev, "cannot get parent %d\n", i); return (error); } error = clk_get_by_ofw_index_prop(dev, 0, "assigned-clocks", i, &clk); if (error != 0) { device_printf(dev, "cannot get assigned clock %d\n", i); clk_release(clk_parent); return (error); } error = clk_set_parent_by_clk(clk, clk_parent); clk_release(clk_parent); clk_release(clk); if (error != 0) return (error); } return (0); } int clk_get_by_ofw_index_prop(device_t dev, phandle_t cnode, const char *prop, int idx, clk_t *clk) { phandle_t parent, *cells; device_t clockdev; int ncells, rv; struct clkdom *clkdom; struct clknode *clknode; *clk = NULL; if (cnode <= 0) cnode = ofw_bus_get_node(dev); if (cnode <= 0) { device_printf(dev, "%s called on not ofw based device\n", __func__); return (ENXIO); } rv = ofw_bus_parse_xref_list_alloc(cnode, prop, "#clock-cells", idx, &parent, &ncells, &cells); if (rv != 0) { return (rv); } clockdev = OF_device_from_xref(parent); if (clockdev == NULL) { rv = ENODEV; goto done; } CLK_TOPO_SLOCK(); clkdom = clkdom_get_by_dev(clockdev); if (clkdom == NULL){ CLK_TOPO_UNLOCK(); rv = ENXIO; goto done; } rv = clkdom->ofw_mapper(clkdom, ncells, cells, &clknode); if (rv == 0) { *clk = clk_create(clknode, dev); } CLK_TOPO_UNLOCK(); done: if (cells != NULL) OF_prop_free(cells); return (rv); } int clk_get_by_ofw_index(device_t dev, phandle_t cnode, int idx, clk_t *clk) { return (clk_get_by_ofw_index_prop(dev, cnode, "clocks", idx, clk)); } int clk_get_by_ofw_name(device_t dev, phandle_t cnode, const char *name, clk_t *clk) { int rv, idx; if (cnode <= 0) cnode = ofw_bus_get_node(dev); if (cnode <= 0) { device_printf(dev, "%s called on not ofw based device\n", __func__); return (ENXIO); } rv = ofw_bus_find_string_index(cnode, "clock-names", name, &idx); if (rv != 0) return (rv); return (clk_get_by_ofw_index(dev, cnode, idx, clk)); } /* -------------------------------------------------------------------------- * * Support functions for parsing various clock related OFW things. */ /* * Get "clock-output-names" and (optional) "clock-indices" lists. * Both lists are alocated using M_OFWPROP specifier. * * Returns number of items or 0. */ int clk_parse_ofw_out_names(device_t dev, phandle_t node, const char ***out_names, uint32_t **indices) { int name_items, rv; *out_names = NULL; *indices = NULL; if (!OF_hasprop(node, "clock-output-names")) return (0); rv = ofw_bus_string_list_to_array(node, "clock-output-names", out_names); if (rv <= 0) return (0); name_items = rv; if (!OF_hasprop(node, "clock-indices")) return (name_items); - rv = OF_getencprop_alloc(node, "clock-indices", sizeof (uint32_t), + rv = OF_getencprop_alloc_multi(node, "clock-indices", sizeof (uint32_t), (void **)indices); if (rv != name_items) { device_printf(dev, " Size of 'clock-output-names' and " "'clock-indices' differs\n"); OF_prop_free(*out_names); OF_prop_free(*indices); return (0); } return (name_items); } /* * Get output clock name for single output clock node. */ int clk_parse_ofw_clk_name(device_t dev, phandle_t node, const char **name) { const char **out_names; const char *tmp_name; int rv; *name = NULL; if (!OF_hasprop(node, "clock-output-names")) { tmp_name = ofw_bus_get_name(dev); if (tmp_name == NULL) return (ENXIO); *name = strdup(tmp_name, M_OFWPROP); return (0); } rv = ofw_bus_string_list_to_array(node, "clock-output-names", &out_names); if (rv != 1) { OF_prop_free(out_names); device_printf(dev, "Malformed 'clock-output-names' property\n"); return (ENXIO); } *name = strdup(out_names[0], M_OFWPROP); OF_prop_free(out_names); return (0); } #endif static int clkdom_sysctl(SYSCTL_HANDLER_ARGS) { struct clkdom *clkdom = arg1; struct clknode *clknode; struct sbuf *sb; int ret; sb = sbuf_new_for_sysctl(NULL, NULL, 4096, req); if (sb == NULL) return (ENOMEM); CLK_TOPO_SLOCK(); TAILQ_FOREACH(clknode, &clkdom->clknode_list, clkdom_link) { sbuf_printf(sb, "%s ", clknode->name); } CLK_TOPO_UNLOCK(); ret = sbuf_finish(sb); sbuf_delete(sb); return (ret); } static int clknode_sysctl(SYSCTL_HANDLER_ARGS) { struct clknode *clknode, *children; enum clknode_sysctl_type type = arg2; struct sbuf *sb; const char **parent_names; int ret, i; clknode = arg1; sb = sbuf_new_for_sysctl(NULL, NULL, 512, req); if (sb == NULL) return (ENOMEM); CLK_TOPO_SLOCK(); switch (type) { case CLKNODE_SYSCTL_PARENT: if (clknode->parent) sbuf_printf(sb, "%s", clknode->parent->name); break; case CLKNODE_SYSCTL_PARENTS_LIST: parent_names = clknode_get_parent_names(clknode); for (i = 0; i < clknode->parent_cnt; i++) sbuf_printf(sb, "%s ", parent_names[i]); break; case CLKNODE_SYSCTL_CHILDREN_LIST: TAILQ_FOREACH(children, &(clknode->children), sibling_link) { sbuf_printf(sb, "%s ", children->name); } break; } CLK_TOPO_UNLOCK(); ret = sbuf_finish(sb); sbuf_delete(sb); return (ret); } Index: head/sys/dev/extres/phy/phy.c =================================================================== --- head/sys/dev/extres/phy/phy.c (revision 332340) +++ head/sys/dev/extres/phy/phy.c (revision 332341) @@ -1,585 +1,585 @@ /*- * Copyright 2016 Michal Meloun * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_platform.h" #include #include #include #include #include #include #include #include #ifdef FDT #include #include #endif #include #include "phydev_if.h" MALLOC_DEFINE(M_PHY, "phy", "Phy framework"); /* Forward declarations. */ struct phy; struct phynode; typedef TAILQ_HEAD(phynode_list, phynode) phynode_list_t; typedef TAILQ_HEAD(phy_list, phy) phy_list_t; /* Default phy methods. */ static int phynode_method_init(struct phynode *phynode); static int phynode_method_enable(struct phynode *phynode, bool disable); static int phynode_method_status(struct phynode *phynode, int *status); /* * Phy controller methods. */ static phynode_method_t phynode_methods[] = { PHYNODEMETHOD(phynode_init, phynode_method_init), PHYNODEMETHOD(phynode_enable, phynode_method_enable), PHYNODEMETHOD(phynode_status, phynode_method_status), PHYNODEMETHOD_END }; DEFINE_CLASS_0(phynode, phynode_class, phynode_methods, 0); /* * Phy node */ struct phynode { KOBJ_FIELDS; TAILQ_ENTRY(phynode) phylist_link; /* Global list entry */ phy_list_t consumers_list; /* Consumers list */ /* Details of this device. */ const char *name; /* Globally unique name */ device_t pdev; /* Producer device_t */ void *softc; /* Producer softc */ intptr_t id; /* Per producer unique id */ #ifdef FDT phandle_t ofw_node; /* OFW node of phy */ #endif struct sx lock; /* Lock for this phy */ int ref_cnt; /* Reference counter */ int enable_cnt; /* Enabled counter */ }; struct phy { device_t cdev; /* consumer device*/ struct phynode *phynode; TAILQ_ENTRY(phy) link; /* Consumers list entry */ int enable_cnt; }; static phynode_list_t phynode_list = TAILQ_HEAD_INITIALIZER(phynode_list); static struct sx phynode_topo_lock; SX_SYSINIT(phy_topology, &phynode_topo_lock, "Phy topology lock"); #define PHY_TOPO_SLOCK() sx_slock(&phynode_topo_lock) #define PHY_TOPO_XLOCK() sx_xlock(&phynode_topo_lock) #define PHY_TOPO_UNLOCK() sx_unlock(&phynode_topo_lock) #define PHY_TOPO_ASSERT() sx_assert(&phynode_topo_lock, SA_LOCKED) #define PHY_TOPO_XASSERT() sx_assert(&phynode_topo_lock, SA_XLOCKED) #define PHYNODE_SLOCK(_sc) sx_slock(&((_sc)->lock)) #define PHYNODE_XLOCK(_sc) sx_xlock(&((_sc)->lock)) #define PHYNODE_UNLOCK(_sc) sx_unlock(&((_sc)->lock)) /* ---------------------------------------------------------------------------- * * Default phy methods for base class. * */ static int phynode_method_init(struct phynode *phynode) { return (0); } static int phynode_method_enable(struct phynode *phynode, bool enable) { if (!enable) return (ENXIO); return (0); } static int phynode_method_status(struct phynode *phynode, int *status) { *status = PHY_STATUS_ENABLED; return (0); } /* ---------------------------------------------------------------------------- * * Internal functions. * */ /* * Create and initialize phy object, but do not register it. */ struct phynode * phynode_create(device_t pdev, phynode_class_t phynode_class, struct phynode_init_def *def) { struct phynode *phynode; /* Create object and initialize it. */ phynode = malloc(sizeof(struct phynode), M_PHY, M_WAITOK | M_ZERO); kobj_init((kobj_t)phynode, (kobj_class_t)phynode_class); sx_init(&phynode->lock, "Phy node lock"); /* Allocate softc if required. */ if (phynode_class->size > 0) { phynode->softc = malloc(phynode_class->size, M_PHY, M_WAITOK | M_ZERO); } /* Rest of init. */ TAILQ_INIT(&phynode->consumers_list); phynode->id = def->id; phynode->pdev = pdev; #ifdef FDT phynode->ofw_node = def->ofw_node; #endif return (phynode); } /* Register phy object. */ struct phynode * phynode_register(struct phynode *phynode) { int rv; #ifdef FDT if (phynode->ofw_node <= 0) phynode->ofw_node = ofw_bus_get_node(phynode->pdev); if (phynode->ofw_node <= 0) return (NULL); #endif rv = PHYNODE_INIT(phynode); if (rv != 0) { printf("PHYNODE_INIT failed: %d\n", rv); return (NULL); } PHY_TOPO_XLOCK(); TAILQ_INSERT_TAIL(&phynode_list, phynode, phylist_link); PHY_TOPO_UNLOCK(); #ifdef FDT OF_device_register_xref(OF_xref_from_node(phynode->ofw_node), phynode->pdev); #endif return (phynode); } static struct phynode * phynode_find_by_id(device_t dev, intptr_t id) { struct phynode *entry; PHY_TOPO_ASSERT(); TAILQ_FOREACH(entry, &phynode_list, phylist_link) { if ((entry->pdev == dev) && (entry->id == id)) return (entry); } return (NULL); } /* -------------------------------------------------------------------------- * * Phy providers interface * */ void * phynode_get_softc(struct phynode *phynode) { return (phynode->softc); } device_t phynode_get_device(struct phynode *phynode) { return (phynode->pdev); } intptr_t phynode_get_id(struct phynode *phynode) { return (phynode->id); } #ifdef FDT phandle_t phynode_get_ofw_node(struct phynode *phynode) { return (phynode->ofw_node); } #endif /* -------------------------------------------------------------------------- * * Real consumers executive * */ /* * Enable phy. */ int phynode_enable(struct phynode *phynode) { int rv; PHY_TOPO_ASSERT(); PHYNODE_XLOCK(phynode); if (phynode->enable_cnt == 0) { rv = PHYNODE_ENABLE(phynode, true); if (rv != 0) { PHYNODE_UNLOCK(phynode); return (rv); } } phynode->enable_cnt++; PHYNODE_UNLOCK(phynode); return (0); } /* * Disable phy. */ int phynode_disable(struct phynode *phynode) { int rv; PHY_TOPO_ASSERT(); PHYNODE_XLOCK(phynode); if (phynode->enable_cnt == 1) { rv = PHYNODE_ENABLE(phynode, false); if (rv != 0) { PHYNODE_UNLOCK(phynode); return (rv); } } phynode->enable_cnt--; PHYNODE_UNLOCK(phynode); return (0); } /* * Get phy status. (PHY_STATUS_*) */ int phynode_status(struct phynode *phynode, int *status) { int rv; PHY_TOPO_ASSERT(); PHYNODE_XLOCK(phynode); rv = PHYNODE_STATUS(phynode, status); PHYNODE_UNLOCK(phynode); return (rv); } /* -------------------------------------------------------------------------- * * Phy consumers interface. * */ /* Helper function for phy_get*() */ static phy_t phy_create(struct phynode *phynode, device_t cdev) { struct phy *phy; PHY_TOPO_ASSERT(); phy = malloc(sizeof(struct phy), M_PHY, M_WAITOK | M_ZERO); phy->cdev = cdev; phy->phynode = phynode; phy->enable_cnt = 0; PHYNODE_XLOCK(phynode); phynode->ref_cnt++; TAILQ_INSERT_TAIL(&phynode->consumers_list, phy, link); PHYNODE_UNLOCK(phynode); return (phy); } int phy_enable(phy_t phy) { int rv; struct phynode *phynode; phynode = phy->phynode; KASSERT(phynode->ref_cnt > 0, ("Attempt to access unreferenced phy.\n")); PHY_TOPO_SLOCK(); rv = phynode_enable(phynode); if (rv == 0) phy->enable_cnt++; PHY_TOPO_UNLOCK(); return (rv); } int phy_disable(phy_t phy) { int rv; struct phynode *phynode; phynode = phy->phynode; KASSERT(phynode->ref_cnt > 0, ("Attempt to access unreferenced phy.\n")); KASSERT(phy->enable_cnt > 0, ("Attempt to disable already disabled phy.\n")); PHY_TOPO_SLOCK(); rv = phynode_disable(phynode); if (rv == 0) phy->enable_cnt--; PHY_TOPO_UNLOCK(); return (rv); } int phy_status(phy_t phy, int *status) { int rv; struct phynode *phynode; phynode = phy->phynode; KASSERT(phynode->ref_cnt > 0, ("Attempt to access unreferenced phy.\n")); PHY_TOPO_SLOCK(); rv = phynode_status(phynode, status); PHY_TOPO_UNLOCK(); return (rv); } int phy_get_by_id(device_t consumer_dev, device_t provider_dev, intptr_t id, phy_t *phy) { struct phynode *phynode; PHY_TOPO_SLOCK(); phynode = phynode_find_by_id(provider_dev, id); if (phynode == NULL) { PHY_TOPO_UNLOCK(); return (ENODEV); } *phy = phy_create(phynode, consumer_dev); PHY_TOPO_UNLOCK(); return (0); } void phy_release(phy_t phy) { struct phynode *phynode; phynode = phy->phynode; KASSERT(phynode->ref_cnt > 0, ("Attempt to access unreferenced phy.\n")); PHY_TOPO_SLOCK(); while (phy->enable_cnt > 0) { phynode_disable(phynode); phy->enable_cnt--; } PHYNODE_XLOCK(phynode); TAILQ_REMOVE(&phynode->consumers_list, phy, link); phynode->ref_cnt--; PHYNODE_UNLOCK(phynode); PHY_TOPO_UNLOCK(); free(phy, M_PHY); } #ifdef FDT int phydev_default_ofw_map(device_t provider, phandle_t xref, int ncells, pcell_t *cells, intptr_t *id) { struct phynode *entry; phandle_t node; /* Single device can register multiple subnodes. */ if (ncells == 0) { node = OF_node_from_xref(xref); PHY_TOPO_XLOCK(); TAILQ_FOREACH(entry, &phynode_list, phylist_link) { if ((entry->pdev == provider) && (entry->ofw_node == node)) { *id = entry->id; PHY_TOPO_UNLOCK(); return (0); } } PHY_TOPO_UNLOCK(); return (ERANGE); } /* First cell is ID. */ if (ncells == 1) { *id = cells[0]; return (0); } /* No default way how to get ID, custom mapper is required. */ return (ERANGE); } int phy_get_by_ofw_idx(device_t consumer_dev, phandle_t cnode, int idx, phy_t *phy) { phandle_t xnode; pcell_t *cells; device_t phydev; int ncells, rv; intptr_t id; if (cnode <= 0) cnode = ofw_bus_get_node(consumer_dev); if (cnode <= 0) { device_printf(consumer_dev, "%s called on not ofw based device\n", __func__); return (ENXIO); } rv = ofw_bus_parse_xref_list_alloc(cnode, "phys", "#phy-cells", idx, &xnode, &ncells, &cells); if (rv != 0) return (rv); /* Tranlate provider to device. */ phydev = OF_device_from_xref(xnode); if (phydev == NULL) { OF_prop_free(cells); return (ENODEV); } /* Map phy to number. */ rv = PHYDEV_MAP(phydev, xnode, ncells, cells, &id); OF_prop_free(cells); if (rv != 0) return (rv); return (phy_get_by_id(consumer_dev, phydev, id, phy)); } int phy_get_by_ofw_name(device_t consumer_dev, phandle_t cnode, char *name, phy_t *phy) { int rv, idx; if (cnode <= 0) cnode = ofw_bus_get_node(consumer_dev); if (cnode <= 0) { device_printf(consumer_dev, "%s called on not ofw based device\n", __func__); return (ENXIO); } rv = ofw_bus_find_string_index(cnode, "phy-names", name, &idx); if (rv != 0) return (rv); return (phy_get_by_ofw_idx(consumer_dev, cnode, idx, phy)); } int phy_get_by_ofw_property(device_t consumer_dev, phandle_t cnode, char *name, phy_t *phy) { pcell_t *cells; device_t phydev; int ncells, rv; intptr_t id; if (cnode <= 0) cnode = ofw_bus_get_node(consumer_dev); if (cnode <= 0) { device_printf(consumer_dev, "%s called on not ofw based device\n", __func__); return (ENXIO); } - ncells = OF_getencprop_alloc(cnode, name, sizeof(pcell_t), + ncells = OF_getencprop_alloc_multi(cnode, name, sizeof(pcell_t), (void **)&cells); if (ncells < 1) return (ENXIO); /* Tranlate provider to device. */ phydev = OF_device_from_xref(cells[0]); if (phydev == NULL) { OF_prop_free(cells); return (ENODEV); } /* Map phy to number. */ rv = PHYDEV_MAP(phydev, cells[0], ncells - 1 , cells + 1, &id); OF_prop_free(cells); if (rv != 0) return (rv); return (phy_get_by_id(consumer_dev, phydev, id, phy)); } #endif Index: head/sys/dev/extres/regulator/regulator.c =================================================================== --- head/sys/dev/extres/regulator/regulator.c (revision 332340) +++ head/sys/dev/extres/regulator/regulator.c (revision 332341) @@ -1,1191 +1,1191 @@ /*- * Copyright 2016 Michal Meloun * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_platform.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #ifdef FDT #include #include #include #endif #include #include "regdev_if.h" SYSCTL_NODE(_hw, OID_AUTO, regulator, CTLFLAG_RD, NULL, "Regulators"); MALLOC_DEFINE(M_REGULATOR, "regulator", "Regulator framework"); #define DIV_ROUND_UP(n,d) howmany(n, d) /* Forward declarations. */ struct regulator; struct regnode; typedef TAILQ_HEAD(regnode_list, regnode) regnode_list_t; typedef TAILQ_HEAD(regulator_list, regulator) regulator_list_t; /* Default regulator methods. */ static int regnode_method_enable(struct regnode *regnode, bool enable, int *udelay); static int regnode_method_status(struct regnode *regnode, int *status); static int regnode_method_set_voltage(struct regnode *regnode, int min_uvolt, int max_uvolt, int *udelay); static int regnode_method_get_voltage(struct regnode *regnode, int *uvolt); static void regulator_shutdown(void *dummy); /* * Regulator controller methods. */ static regnode_method_t regnode_methods[] = { REGNODEMETHOD(regnode_enable, regnode_method_enable), REGNODEMETHOD(regnode_status, regnode_method_status), REGNODEMETHOD(regnode_set_voltage, regnode_method_set_voltage), REGNODEMETHOD(regnode_get_voltage, regnode_method_get_voltage), REGNODEMETHOD_END }; DEFINE_CLASS_0(regnode, regnode_class, regnode_methods, 0); /* * Regulator node - basic element for modelling SOC and bard power supply * chains. Its contains producer data. */ struct regnode { KOBJ_FIELDS; TAILQ_ENTRY(regnode) reglist_link; /* Global list entry */ regulator_list_t consumers_list; /* Consumers list */ /* Cache for already resolved names */ struct regnode *parent; /* Resolved parent */ /* Details of this device. */ const char *name; /* Globally unique name */ const char *parent_name; /* Parent name */ device_t pdev; /* Producer device_t */ void *softc; /* Producer softc */ intptr_t id; /* Per producer unique id */ #ifdef FDT phandle_t ofw_node; /* OFW node of regulator */ #endif int flags; /* REGULATOR_FLAGS_ */ struct sx lock; /* Lock for this regulator */ int ref_cnt; /* Reference counter */ int enable_cnt; /* Enabled counter */ struct regnode_std_param std_param; /* Standard parameters */ struct sysctl_ctx_list sysctl_ctx; }; /* * Per consumer data, information about how a consumer is using a regulator * node. * A pointer to this structure is used as a handle in the consumer interface. */ struct regulator { device_t cdev; /* Consumer device */ struct regnode *regnode; TAILQ_ENTRY(regulator) link; /* Consumers list entry */ int enable_cnt; int min_uvolt; /* Requested uvolt range */ int max_uvolt; }; /* * Regulator names must be system wide unique. */ static regnode_list_t regnode_list = TAILQ_HEAD_INITIALIZER(regnode_list); static struct sx regnode_topo_lock; SX_SYSINIT(regulator_topology, ®node_topo_lock, "Regulator topology lock"); #define REG_TOPO_SLOCK() sx_slock(®node_topo_lock) #define REG_TOPO_XLOCK() sx_xlock(®node_topo_lock) #define REG_TOPO_UNLOCK() sx_unlock(®node_topo_lock) #define REG_TOPO_ASSERT() sx_assert(®node_topo_lock, SA_LOCKED) #define REG_TOPO_XASSERT() sx_assert(®node_topo_lock, SA_XLOCKED) #define REGNODE_SLOCK(_sc) sx_slock(&((_sc)->lock)) #define REGNODE_XLOCK(_sc) sx_xlock(&((_sc)->lock)) #define REGNODE_UNLOCK(_sc) sx_unlock(&((_sc)->lock)) SYSINIT(regulator_shutdown, SI_SUB_LAST, SI_ORDER_ANY, regulator_shutdown, NULL); /* * Disable unused regulator * We run this function at SI_SUB_LAST which mean that every driver that needs * regulator should have already enable them. * All the remaining regulators should be those left enabled by the bootloader * or enable by default by the PMIC. */ static void regulator_shutdown(void *dummy) { struct regnode *entry; int disable = 1; REG_TOPO_SLOCK(); TUNABLE_INT_FETCH("hw.regulator.disable_unused", &disable); TAILQ_FOREACH(entry, ®node_list, reglist_link) { if (entry->enable_cnt == 0 && entry->std_param.always_on == 0 && disable) { if (bootverbose) printf("regulator: shuting down %s\n", entry->name); regnode_stop(entry, 0); } } REG_TOPO_UNLOCK(); } /* * sysctl handler */ static int regnode_uvolt_sysctl(SYSCTL_HANDLER_ARGS) { struct regnode *regnode = arg1; int rv, uvolt; if (regnode->std_param.min_uvolt == regnode->std_param.max_uvolt) { uvolt = regnode->std_param.min_uvolt; } else { REG_TOPO_SLOCK(); if ((rv = regnode_get_voltage(regnode, &uvolt)) != 0) { REG_TOPO_UNLOCK(); return (rv); } REG_TOPO_UNLOCK(); } return sysctl_handle_int(oidp, &uvolt, sizeof(uvolt), req); } /* ---------------------------------------------------------------------------- * * Default regulator methods for base class. * */ static int regnode_method_enable(struct regnode *regnode, bool enable, int *udelay) { if (!enable) return (ENXIO); *udelay = 0; return (0); } static int regnode_method_status(struct regnode *regnode, int *status) { *status = REGULATOR_STATUS_ENABLED; return (0); } static int regnode_method_set_voltage(struct regnode *regnode, int min_uvolt, int max_uvolt, int *udelay) { if ((min_uvolt > regnode->std_param.max_uvolt) || (max_uvolt < regnode->std_param.min_uvolt)) return (ERANGE); *udelay = 0; return (0); } static int regnode_method_get_voltage(struct regnode *regnode, int *uvolt) { return (regnode->std_param.min_uvolt + (regnode->std_param.max_uvolt - regnode->std_param.min_uvolt) / 2); } /* ---------------------------------------------------------------------------- * * Internal functions. * */ static struct regnode * regnode_find_by_name(const char *name) { struct regnode *entry; REG_TOPO_ASSERT(); TAILQ_FOREACH(entry, ®node_list, reglist_link) { if (strcmp(entry->name, name) == 0) return (entry); } return (NULL); } static struct regnode * regnode_find_by_id(device_t dev, intptr_t id) { struct regnode *entry; REG_TOPO_ASSERT(); TAILQ_FOREACH(entry, ®node_list, reglist_link) { if ((entry->pdev == dev) && (entry->id == id)) return (entry); } return (NULL); } /* * Create and initialize regulator object, but do not register it. */ struct regnode * regnode_create(device_t pdev, regnode_class_t regnode_class, struct regnode_init_def *def) { struct regnode *regnode; struct sysctl_oid *regnode_oid; KASSERT(def->name != NULL, ("regulator name is NULL")); KASSERT(def->name[0] != '\0', ("regulator name is empty")); REG_TOPO_SLOCK(); if (regnode_find_by_name(def->name) != NULL) panic("Duplicated regulator registration: %s\n", def->name); REG_TOPO_UNLOCK(); /* Create object and initialize it. */ regnode = malloc(sizeof(struct regnode), M_REGULATOR, M_WAITOK | M_ZERO); kobj_init((kobj_t)regnode, (kobj_class_t)regnode_class); sx_init(®node->lock, "Regulator node lock"); /* Allocate softc if required. */ if (regnode_class->size > 0) { regnode->softc = malloc(regnode_class->size, M_REGULATOR, M_WAITOK | M_ZERO); } /* Copy all strings unless they're flagged as static. */ if (def->flags & REGULATOR_FLAGS_STATIC) { regnode->name = def->name; regnode->parent_name = def->parent_name; } else { regnode->name = strdup(def->name, M_REGULATOR); if (def->parent_name != NULL) regnode->parent_name = strdup(def->parent_name, M_REGULATOR); } /* Rest of init. */ TAILQ_INIT(®node->consumers_list); regnode->id = def->id; regnode->pdev = pdev; regnode->flags = def->flags; regnode->parent = NULL; regnode->std_param = def->std_param; #ifdef FDT regnode->ofw_node = def->ofw_node; #endif sysctl_ctx_init(®node->sysctl_ctx); regnode_oid = SYSCTL_ADD_NODE(®node->sysctl_ctx, SYSCTL_STATIC_CHILDREN(_hw_regulator), OID_AUTO, regnode->name, CTLFLAG_RD, 0, "A regulator node"); SYSCTL_ADD_INT(®node->sysctl_ctx, SYSCTL_CHILDREN(regnode_oid), OID_AUTO, "min_uvolt", CTLFLAG_RD, ®node->std_param.min_uvolt, 0, "Minimal voltage (in uV)"); SYSCTL_ADD_INT(®node->sysctl_ctx, SYSCTL_CHILDREN(regnode_oid), OID_AUTO, "max_uvolt", CTLFLAG_RD, ®node->std_param.max_uvolt, 0, "Maximal voltage (in uV)"); SYSCTL_ADD_INT(®node->sysctl_ctx, SYSCTL_CHILDREN(regnode_oid), OID_AUTO, "min_uamp", CTLFLAG_RD, ®node->std_param.min_uamp, 0, "Minimal amperage (in uA)"); SYSCTL_ADD_INT(®node->sysctl_ctx, SYSCTL_CHILDREN(regnode_oid), OID_AUTO, "max_uamp", CTLFLAG_RD, ®node->std_param.max_uamp, 0, "Maximal amperage (in uA)"); SYSCTL_ADD_INT(®node->sysctl_ctx, SYSCTL_CHILDREN(regnode_oid), OID_AUTO, "ramp_delay", CTLFLAG_RD, ®node->std_param.ramp_delay, 0, "Ramp delay (in uV/us)"); SYSCTL_ADD_INT(®node->sysctl_ctx, SYSCTL_CHILDREN(regnode_oid), OID_AUTO, "enable_delay", CTLFLAG_RD, ®node->std_param.enable_delay, 0, "Enable delay (in us)"); SYSCTL_ADD_INT(®node->sysctl_ctx, SYSCTL_CHILDREN(regnode_oid), OID_AUTO, "enable_cnt", CTLFLAG_RD, ®node->enable_cnt, 0, "The regulator enable counter"); SYSCTL_ADD_INT(®node->sysctl_ctx, SYSCTL_CHILDREN(regnode_oid), OID_AUTO, "boot_on", CTLFLAG_RD, (int *) ®node->std_param.boot_on, 0, "Is enabled on boot"); SYSCTL_ADD_INT(®node->sysctl_ctx, SYSCTL_CHILDREN(regnode_oid), OID_AUTO, "always_on", CTLFLAG_RD, (int *)®node->std_param.always_on, 0, "Is always enabled"); SYSCTL_ADD_PROC(®node->sysctl_ctx, SYSCTL_CHILDREN(regnode_oid), OID_AUTO, "uvolt", CTLTYPE_INT | CTLFLAG_RD, regnode, 0, regnode_uvolt_sysctl, "I", "Current voltage (in uV)"); return (regnode); } /* Register regulator object. */ struct regnode * regnode_register(struct regnode *regnode) { int rv; #ifdef FDT if (regnode->ofw_node <= 0) regnode->ofw_node = ofw_bus_get_node(regnode->pdev); if (regnode->ofw_node <= 0) return (NULL); #endif rv = REGNODE_INIT(regnode); if (rv != 0) { printf("REGNODE_INIT failed: %d\n", rv); return (NULL); } REG_TOPO_XLOCK(); TAILQ_INSERT_TAIL(®node_list, regnode, reglist_link); REG_TOPO_UNLOCK(); #ifdef FDT OF_device_register_xref(OF_xref_from_node(regnode->ofw_node), regnode->pdev); #endif return (regnode); } static int regnode_resolve_parent(struct regnode *regnode) { /* All ready resolved or no parent? */ if ((regnode->parent != NULL) || (regnode->parent_name == NULL)) return (0); regnode->parent = regnode_find_by_name(regnode->parent_name); if (regnode->parent == NULL) return (ENODEV); return (0); } static void regnode_delay(int usec) { int ticks; if (usec == 0) return; ticks = (usec * hz + 999999) / 1000000; if (cold || ticks < 2) DELAY(usec); else pause("REGULATOR", ticks); } /* -------------------------------------------------------------------------- * * Regulator providers interface * */ const char * regnode_get_name(struct regnode *regnode) { return (regnode->name); } const char * regnode_get_parent_name(struct regnode *regnode) { return (regnode->parent_name); } int regnode_get_flags(struct regnode *regnode) { return (regnode->flags); } void * regnode_get_softc(struct regnode *regnode) { return (regnode->softc); } device_t regnode_get_device(struct regnode *regnode) { return (regnode->pdev); } struct regnode_std_param *regnode_get_stdparam(struct regnode *regnode) { return (®node->std_param); } void regnode_topo_unlock(void) { REG_TOPO_UNLOCK(); } void regnode_topo_xlock(void) { REG_TOPO_XLOCK(); } void regnode_topo_slock(void) { REG_TOPO_SLOCK(); } /* -------------------------------------------------------------------------- * * Real consumers executive * */ struct regnode * regnode_get_parent(struct regnode *regnode) { int rv; REG_TOPO_ASSERT(); rv = regnode_resolve_parent(regnode); if (rv != 0) return (NULL); return (regnode->parent); } /* * Enable regulator. */ int regnode_enable(struct regnode *regnode) { int udelay; int rv; REG_TOPO_ASSERT(); /* Enable regulator for each node in chain, starting from source. */ rv = regnode_resolve_parent(regnode); if (rv != 0) return (rv); if (regnode->parent != NULL) { rv = regnode_enable(regnode->parent); if (rv != 0) return (rv); } /* Handle this node. */ REGNODE_XLOCK(regnode); if (regnode->enable_cnt == 0) { rv = REGNODE_ENABLE(regnode, true, &udelay); if (rv != 0) { REGNODE_UNLOCK(regnode); return (rv); } regnode_delay(udelay); } regnode->enable_cnt++; REGNODE_UNLOCK(regnode); return (0); } /* * Disable regulator. */ int regnode_disable(struct regnode *regnode) { int udelay; int rv; REG_TOPO_ASSERT(); rv = 0; REGNODE_XLOCK(regnode); /* Disable regulator for each node in chain, starting from consumer. */ if ((regnode->enable_cnt == 1) && ((regnode->flags & REGULATOR_FLAGS_NOT_DISABLE) == 0)) { rv = REGNODE_ENABLE(regnode, false, &udelay); if (rv != 0) { REGNODE_UNLOCK(regnode); return (rv); } regnode_delay(udelay); } regnode->enable_cnt--; REGNODE_UNLOCK(regnode); rv = regnode_resolve_parent(regnode); if (rv != 0) return (rv); if (regnode->parent != NULL) rv = regnode_disable(regnode->parent); return (rv); } /* * Stop regulator. */ int regnode_stop(struct regnode *regnode, int depth) { int udelay; int rv; REG_TOPO_ASSERT(); rv = 0; REGNODE_XLOCK(regnode); /* The first node must not be enabled. */ if ((regnode->enable_cnt != 0) && (depth == 0)) { REGNODE_UNLOCK(regnode); return (EBUSY); } /* Disable regulator for each node in chain, starting from consumer */ if ((regnode->enable_cnt == 0) && ((regnode->flags & REGULATOR_FLAGS_NOT_DISABLE) == 0)) { rv = REGNODE_ENABLE(regnode, false, &udelay); if (rv != 0) { REGNODE_UNLOCK(regnode); return (rv); } regnode_delay(udelay); } REGNODE_UNLOCK(regnode); rv = regnode_resolve_parent(regnode); if (rv != 0) return (rv); if (regnode->parent != NULL) rv = regnode_stop(regnode->parent, depth + 1); return (rv); } /* * Get regulator status. (REGULATOR_STATUS_*) */ int regnode_status(struct regnode *regnode, int *status) { int rv; REG_TOPO_ASSERT(); REGNODE_XLOCK(regnode); rv = REGNODE_STATUS(regnode, status); REGNODE_UNLOCK(regnode); return (rv); } /* * Get actual regulator voltage. */ int regnode_get_voltage(struct regnode *regnode, int *uvolt) { int rv; REG_TOPO_ASSERT(); REGNODE_XLOCK(regnode); rv = REGNODE_GET_VOLTAGE(regnode, uvolt); REGNODE_UNLOCK(regnode); /* Pass call into parent, if regulator is in bypass mode. */ if (rv == ENOENT) { rv = regnode_resolve_parent(regnode); if (rv != 0) return (rv); if (regnode->parent != NULL) rv = regnode_get_voltage(regnode->parent, uvolt); } return (rv); } /* * Set regulator voltage. */ int regnode_set_voltage(struct regnode *regnode, int min_uvolt, int max_uvolt) { int udelay; int rv; REG_TOPO_ASSERT(); REGNODE_XLOCK(regnode); rv = REGNODE_SET_VOLTAGE(regnode, min_uvolt, max_uvolt, &udelay); if (rv == 0) regnode_delay(udelay); REGNODE_UNLOCK(regnode); return (rv); } /* * Consumer variant of regnode_set_voltage(). */ static int regnode_set_voltage_checked(struct regnode *regnode, struct regulator *reg, int min_uvolt, int max_uvolt) { int udelay; int all_max_uvolt; int all_min_uvolt; struct regulator *tmp; int rv; REG_TOPO_ASSERT(); REGNODE_XLOCK(regnode); /* Return error if requested range is outside of regulator range. */ if ((min_uvolt > regnode->std_param.max_uvolt) || (max_uvolt < regnode->std_param.min_uvolt)) { REGNODE_UNLOCK(regnode); return (ERANGE); } /* Get actual voltage range for all consumers. */ all_min_uvolt = regnode->std_param.min_uvolt; all_max_uvolt = regnode->std_param.max_uvolt; TAILQ_FOREACH(tmp, ®node->consumers_list, link) { /* Don't take requestor in account. */ if (tmp == reg) continue; if (all_min_uvolt < tmp->min_uvolt) all_min_uvolt = tmp->min_uvolt; if (all_max_uvolt > tmp->max_uvolt) all_max_uvolt = tmp->max_uvolt; } /* Test if request fits to actual contract. */ if ((min_uvolt > all_max_uvolt) || (max_uvolt < all_min_uvolt)) { REGNODE_UNLOCK(regnode); return (ERANGE); } /* Adjust new range.*/ if (min_uvolt < all_min_uvolt) min_uvolt = all_min_uvolt; if (max_uvolt > all_max_uvolt) max_uvolt = all_max_uvolt; rv = REGNODE_SET_VOLTAGE(regnode, min_uvolt, max_uvolt, &udelay); regnode_delay(udelay); REGNODE_UNLOCK(regnode); return (rv); } #ifdef FDT phandle_t regnode_get_ofw_node(struct regnode *regnode) { return (regnode->ofw_node); } #endif /* -------------------------------------------------------------------------- * * Regulator consumers interface. * */ /* Helper function for regulator_get*() */ static regulator_t regulator_create(struct regnode *regnode, device_t cdev) { struct regulator *reg; REG_TOPO_ASSERT(); reg = malloc(sizeof(struct regulator), M_REGULATOR, M_WAITOK | M_ZERO); reg->cdev = cdev; reg->regnode = regnode; reg->enable_cnt = 0; REGNODE_XLOCK(regnode); regnode->ref_cnt++; TAILQ_INSERT_TAIL(®node->consumers_list, reg, link); reg ->min_uvolt = regnode->std_param.min_uvolt; reg ->max_uvolt = regnode->std_param.max_uvolt; REGNODE_UNLOCK(regnode); return (reg); } int regulator_enable(regulator_t reg) { int rv; struct regnode *regnode; regnode = reg->regnode; KASSERT(regnode->ref_cnt > 0, ("Attempt to access unreferenced regulator: %s\n", regnode->name)); REG_TOPO_SLOCK(); rv = regnode_enable(regnode); if (rv == 0) reg->enable_cnt++; REG_TOPO_UNLOCK(); return (rv); } int regulator_disable(regulator_t reg) { int rv; struct regnode *regnode; regnode = reg->regnode; KASSERT(regnode->ref_cnt > 0, ("Attempt to access unreferenced regulator: %s\n", regnode->name)); KASSERT(reg->enable_cnt > 0, ("Attempt to disable already disabled regulator: %s\n", regnode->name)); REG_TOPO_SLOCK(); rv = regnode_disable(regnode); if (rv == 0) reg->enable_cnt--; REG_TOPO_UNLOCK(); return (rv); } int regulator_stop(regulator_t reg) { int rv; struct regnode *regnode; regnode = reg->regnode; KASSERT(regnode->ref_cnt > 0, ("Attempt to access unreferenced regulator: %s\n", regnode->name)); KASSERT(reg->enable_cnt == 0, ("Attempt to stop already enabled regulator: %s\n", regnode->name)); REG_TOPO_SLOCK(); rv = regnode_stop(regnode, 0); REG_TOPO_UNLOCK(); return (rv); } int regulator_status(regulator_t reg, int *status) { int rv; struct regnode *regnode; regnode = reg->regnode; KASSERT(regnode->ref_cnt > 0, ("Attempt to access unreferenced regulator: %s\n", regnode->name)); REG_TOPO_SLOCK(); rv = regnode_status(regnode, status); REG_TOPO_UNLOCK(); return (rv); } int regulator_get_voltage(regulator_t reg, int *uvolt) { int rv; struct regnode *regnode; regnode = reg->regnode; KASSERT(regnode->ref_cnt > 0, ("Attempt to access unreferenced regulator: %s\n", regnode->name)); REG_TOPO_SLOCK(); rv = regnode_get_voltage(regnode, uvolt); REG_TOPO_UNLOCK(); return (rv); } int regulator_set_voltage(regulator_t reg, int min_uvolt, int max_uvolt) { struct regnode *regnode; int rv; regnode = reg->regnode; KASSERT(regnode->ref_cnt > 0, ("Attempt to access unreferenced regulator: %s\n", regnode->name)); REG_TOPO_SLOCK(); rv = regnode_set_voltage_checked(regnode, reg, min_uvolt, max_uvolt); if (rv == 0) { reg->min_uvolt = min_uvolt; reg->max_uvolt = max_uvolt; } REG_TOPO_UNLOCK(); return (rv); } const char * regulator_get_name(regulator_t reg) { struct regnode *regnode; regnode = reg->regnode; KASSERT(regnode->ref_cnt > 0, ("Attempt to access unreferenced regulator: %s\n", regnode->name)); return (regnode->name); } int regulator_get_by_name(device_t cdev, const char *name, regulator_t *reg) { struct regnode *regnode; REG_TOPO_SLOCK(); regnode = regnode_find_by_name(name); if (regnode == NULL) { REG_TOPO_UNLOCK(); return (ENODEV); } *reg = regulator_create(regnode, cdev); REG_TOPO_UNLOCK(); return (0); } int regulator_get_by_id(device_t cdev, device_t pdev, intptr_t id, regulator_t *reg) { struct regnode *regnode; REG_TOPO_SLOCK(); regnode = regnode_find_by_id(pdev, id); if (regnode == NULL) { REG_TOPO_UNLOCK(); return (ENODEV); } *reg = regulator_create(regnode, cdev); REG_TOPO_UNLOCK(); return (0); } int regulator_release(regulator_t reg) { struct regnode *regnode; regnode = reg->regnode; KASSERT(regnode->ref_cnt > 0, ("Attempt to access unreferenced regulator: %s\n", regnode->name)); REG_TOPO_SLOCK(); while (reg->enable_cnt > 0) { regnode_disable(regnode); reg->enable_cnt--; } REGNODE_XLOCK(regnode); TAILQ_REMOVE(®node->consumers_list, reg, link); regnode->ref_cnt--; REGNODE_UNLOCK(regnode); REG_TOPO_UNLOCK(); free(reg, M_REGULATOR); return (0); } #ifdef FDT /* Default DT mapper. */ int regdev_default_ofw_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells, intptr_t *id) { if (ncells == 0) *id = 1; else if (ncells == 1) *id = cells[0]; else return (ERANGE); return (0); } int regulator_parse_ofw_stdparam(device_t pdev, phandle_t node, struct regnode_init_def *def) { phandle_t supply_xref; struct regnode_std_param *par; int rv; par = &def->std_param; rv = OF_getprop_alloc(node, "regulator-name", (void **)&def->name); if (rv <= 0) { device_printf(pdev, "%s: Missing regulator name\n", __func__); return (ENXIO); } rv = OF_getencprop(node, "regulator-min-microvolt", &par->min_uvolt, sizeof(par->min_uvolt)); if (rv <= 0) par->min_uvolt = 0; rv = OF_getencprop(node, "regulator-max-microvolt", &par->max_uvolt, sizeof(par->max_uvolt)); if (rv <= 0) par->max_uvolt = 0; rv = OF_getencprop(node, "regulator-min-microamp", &par->min_uamp, sizeof(par->min_uamp)); if (rv <= 0) par->min_uamp = 0; rv = OF_getencprop(node, "regulator-max-microamp", &par->max_uamp, sizeof(par->max_uamp)); if (rv <= 0) par->max_uamp = 0; rv = OF_getencprop(node, "regulator-ramp-delay", &par->ramp_delay, sizeof(par->ramp_delay)); if (rv <= 0) par->ramp_delay = 0; rv = OF_getencprop(node, "regulator-enable-ramp-delay", &par->enable_delay, sizeof(par->enable_delay)); if (rv <= 0) par->enable_delay = 0; if (OF_hasprop(node, "regulator-boot-on")) par->boot_on = 1; if (OF_hasprop(node, "regulator-always-on")) par->always_on = 1; if (OF_hasprop(node, "enable-active-high")) par->enable_active_high = 1; rv = OF_getencprop(node, "vin-supply", &supply_xref, sizeof(supply_xref)); if (rv >= 0) { rv = OF_getprop_alloc(supply_xref, "regulator-name", (void **)&def->parent_name); if (rv <= 0) def->parent_name = NULL; } return (0); } int regulator_get_by_ofw_property(device_t cdev, phandle_t cnode, char *name, regulator_t *reg) { phandle_t *cells; device_t regdev; int ncells, rv; intptr_t id; *reg = NULL; if (cnode <= 0) cnode = ofw_bus_get_node(cdev); if (cnode <= 0) { device_printf(cdev, "%s called on not ofw based device\n", __func__); return (ENXIO); } cells = NULL; - ncells = OF_getencprop_alloc(cnode, name, sizeof(*cells), + ncells = OF_getencprop_alloc_multi(cnode, name, sizeof(*cells), (void **)&cells); if (ncells <= 0) return (ENXIO); /* Translate xref to device */ regdev = OF_device_from_xref(cells[0]); if (regdev == NULL) { OF_prop_free(cells); return (ENODEV); } /* Map regulator to number */ rv = REGDEV_MAP(regdev, cells[0], ncells - 1, cells + 1, &id); OF_prop_free(cells); if (rv != 0) return (rv); return (regulator_get_by_id(cdev, regdev, id, reg)); } #endif /* -------------------------------------------------------------------------- * * Regulator utility functions. * */ /* Convert raw selector value to real voltage */ int regulator_range_sel8_to_volt(struct regulator_range *ranges, int nranges, uint8_t sel, int *volt) { struct regulator_range *range; int i; if (nranges == 0) panic("Voltage regulator have zero ranges\n"); for (i = 0; i < nranges ; i++) { range = ranges + i; if (!(sel >= range->min_sel && sel <= range->max_sel)) continue; sel -= range->min_sel; *volt = range->min_uvolt + sel * range->step_uvolt; return (0); } return (ERANGE); } int regulator_range_volt_to_sel8(struct regulator_range *ranges, int nranges, int min_uvolt, int max_uvolt, uint8_t *out_sel) { struct regulator_range *range; uint8_t sel; int uvolt; int rv, i; if (nranges == 0) panic("Voltage regulator have zero ranges\n"); for (i = 0; i < nranges; i++) { range = ranges + i; uvolt = range->min_uvolt + (range->max_sel - range->min_sel) * range->step_uvolt; if ((min_uvolt > uvolt) || (max_uvolt < range->min_uvolt)) continue; if (min_uvolt <= range->min_uvolt) min_uvolt = range->min_uvolt; /* if step == 0 -> fixed voltage range. */ if (range->step_uvolt == 0) sel = 0; else sel = DIV_ROUND_UP(min_uvolt - range->min_uvolt, range->step_uvolt); sel += range->min_sel; break; } if (i >= nranges) return (ERANGE); /* Verify new settings. */ rv = regulator_range_sel8_to_volt(ranges, nranges, sel, &uvolt); if (rv != 0) return (rv); if ((uvolt < min_uvolt) || (uvolt > max_uvolt)) return (ERANGE); *out_sel = sel; return (0); } Index: head/sys/dev/extres/syscon/syscon.c =================================================================== --- head/sys/dev/extres/syscon/syscon.c (revision 332340) +++ head/sys/dev/extres/syscon/syscon.c (revision 332341) @@ -1,257 +1,257 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2017 Kyle Evans * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ /* * This is a generic syscon driver, whose purpose is to provide access to * various unrelated bits packed in a single register space. It is usually used * as a fallback to more specific driver, but works well enough for simple * access. */ #include __FBSDID("$FreeBSD$"); #include "opt_platform.h" #include #include #include #include #include #include #include #include #include #include #include #ifdef FDT #include #include #endif #include "syscon_if.h" #include "syscon.h" /* * Syscon interface details */ typedef TAILQ_HEAD(syscon_list, syscon) syscon_list_t; /* * Declarations */ static int syscon_method_init(struct syscon *syscon); static int syscon_method_uninit(struct syscon *syscon); MALLOC_DEFINE(M_SYSCON, "syscon", "Syscon driver"); static syscon_list_t syscon_list = TAILQ_HEAD_INITIALIZER(syscon_list); static struct sx syscon_topo_lock; SX_SYSINIT(syscon_topology, &syscon_topo_lock, "Syscon topology lock"); /* * Syscon methods. */ static syscon_method_t syscon_methods[] = { SYSCONMETHOD(syscon_init, syscon_method_init), SYSCONMETHOD(syscon_uninit, syscon_method_uninit), SYSCONMETHOD_END }; DEFINE_CLASS_0(syscon, syscon_class, syscon_methods, 0); #define SYSCON_TOPO_SLOCK() sx_slock(&syscon_topo_lock) #define SYSCON_TOPO_XLOCK() sx_xlock(&syscon_topo_lock) #define SYSCON_TOPO_UNLOCK() sx_unlock(&syscon_topo_lock) #define SYSCON_TOPO_ASSERT() sx_assert(&syscon_topo_lock, SA_LOCKED) #define SYSCON_TOPO_XASSERT() sx_assert(&syscon_topo_lock, SA_XLOCKED) /* * Default syscon methods for base class. */ static int syscon_method_init(struct syscon *syscon) { return (0); }; static int syscon_method_uninit(struct syscon *syscon) { return (0); }; void * syscon_get_softc(struct syscon *syscon) { return (syscon->softc); }; /* * Create and initialize syscon object, but do not register it. */ struct syscon * syscon_create(device_t pdev, syscon_class_t syscon_class) { struct syscon *syscon; /* Create object and initialize it. */ syscon = malloc(sizeof(struct syscon), M_SYSCON, M_WAITOK | M_ZERO); kobj_init((kobj_t)syscon, (kobj_class_t)syscon_class); /* Allocate softc if required. */ if (syscon_class->size > 0) syscon->softc = malloc(syscon_class->size, M_SYSCON, M_WAITOK | M_ZERO); /* Rest of init. */ syscon->pdev = pdev; return (syscon); } /* Register syscon object. */ struct syscon * syscon_register(struct syscon *syscon) { int rv; #ifdef FDT if (syscon->ofw_node <= 0) syscon->ofw_node = ofw_bus_get_node(syscon->pdev); if (syscon->ofw_node <= 0) return (NULL); #endif rv = SYSCON_INIT(syscon); if (rv != 0) { printf("SYSCON_INIT failed: %d\n", rv); return (NULL); } #ifdef FDT OF_device_register_xref(OF_xref_from_node(syscon->ofw_node), syscon->pdev); #endif SYSCON_TOPO_XLOCK(); TAILQ_INSERT_TAIL(&syscon_list, syscon, syscon_link); SYSCON_TOPO_UNLOCK(); return (syscon); } int syscon_unregister(struct syscon *syscon) { SYSCON_TOPO_XLOCK(); TAILQ_REMOVE(&syscon_list, syscon, syscon_link); SYSCON_TOPO_UNLOCK(); #ifdef FDT OF_device_register_xref(OF_xref_from_node(syscon->ofw_node), NULL); #endif return (SYSCON_UNINIT(syscon)); } /** * Provider methods */ #ifdef FDT static struct syscon * syscon_find_by_ofw_node(phandle_t node) { struct syscon *entry; SYSCON_TOPO_ASSERT(); TAILQ_FOREACH(entry, &syscon_list, syscon_link) { if (entry->ofw_node == node) return (entry); } return (NULL); } struct syscon * syscon_create_ofw_node(device_t pdev, syscon_class_t syscon_class, phandle_t node) { struct syscon *syscon; syscon = syscon_create(pdev, syscon_class); if (syscon == NULL) return (NULL); syscon->ofw_node = node; if (syscon_register(syscon) == NULL) return (NULL); return (syscon); } phandle_t syscon_get_ofw_node(struct syscon *syscon) { return (syscon->ofw_node); } int syscon_get_by_ofw_property(device_t cdev, phandle_t cnode, char *name, struct syscon **syscon) { pcell_t *cells; int ncells; if (cnode <= 0) cnode = ofw_bus_get_node(cdev); if (cnode <= 0) { device_printf(cdev, "%s called on not ofw based device\n", __func__); return (ENXIO); } - ncells = OF_getencprop_alloc(cnode, name, sizeof(pcell_t), + ncells = OF_getencprop_alloc_multi(cnode, name, sizeof(pcell_t), (void **)&cells); if (ncells < 1) return (ENXIO); /* Translate to syscon node. */ SYSCON_TOPO_SLOCK(); *syscon = syscon_find_by_ofw_node(OF_node_from_xref(cells[0])); if (*syscon == NULL) { SYSCON_TOPO_UNLOCK(); device_printf(cdev, "Failed to find syscon node\n"); OF_prop_free(cells); return (ENODEV); } SYSCON_TOPO_UNLOCK(); OF_prop_free(cells); return (0); } #endif Index: head/sys/dev/fdt/fdt_clock.c =================================================================== --- head/sys/dev/fdt/fdt_clock.c (revision 332340) +++ head/sys/dev/fdt/fdt_clock.c (revision 332341) @@ -1,162 +1,162 @@ /*- * Copyright (c) 2014 Ian Lepore * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #include #include #include #include #include #include #include #include #include #include "fdt_clock_if.h" #include /* * Loop through all the tuples in the clocks= property for a device, enabling or * disabling each clock. * * Be liberal about errors for now: warn about a failure to enable but keep * trying with any other clocks in the list. Return ENXIO if any errors were * found, and let the caller decide whether the problem is fatal. */ static int enable_disable_all(device_t consumer, boolean_t enable) { phandle_t cnode; device_t clockdev; int clocknum, err, i, ncells; uint32_t *clks; boolean_t anyerrors; cnode = ofw_bus_get_node(consumer); - ncells = OF_getencprop_alloc(cnode, "clocks", sizeof(*clks), + ncells = OF_getencprop_alloc_multi(cnode, "clocks", sizeof(*clks), (void **)&clks); if (enable && ncells < 2) { device_printf(consumer, "Warning: No clocks specified in fdt " "data; device may not function."); return (ENXIO); } anyerrors = false; for (i = 0; i < ncells; i += 2) { clockdev = OF_device_from_xref(clks[i]); clocknum = clks[i + 1]; if (clockdev == NULL) { if (enable) device_printf(consumer, "Warning: can not find " "driver for clock number %u; device may not " "function\n", clocknum); anyerrors = true; continue; } if (enable) err = FDT_CLOCK_ENABLE(clockdev, clocknum); else err = FDT_CLOCK_DISABLE(clockdev, clocknum); if (err != 0) { if (enable) device_printf(consumer, "Warning: failed to " "enable clock number %u; device may not " "function\n", clocknum); anyerrors = true; } } OF_prop_free(clks); return (anyerrors ? ENXIO : 0); } int fdt_clock_get_info(device_t consumer, int n, struct fdt_clock_info *info) { phandle_t cnode; device_t clockdev; int clocknum, err, ncells; uint32_t *clks; cnode = ofw_bus_get_node(consumer); - ncells = OF_getencprop_alloc(cnode, "clocks", sizeof(*clks), + ncells = OF_getencprop_alloc_multi(cnode, "clocks", sizeof(*clks), (void **)&clks); if (ncells <= 0) return (ENXIO); n *= 2; if (ncells <= n) err = ENXIO; else { clockdev = OF_device_from_xref(clks[n]); if (clockdev == NULL) err = ENXIO; else { /* * Make struct contents minimally valid, then call * provider to fill in what it knows (provider can * override anything it wants to). */ clocknum = clks[n + 1]; bzero(info, sizeof(*info)); info->provider = clockdev; info->index = clocknum; info->name = ""; err = FDT_CLOCK_GET_INFO(clockdev, clocknum, info); } } OF_prop_free(clks); return (err); } int fdt_clock_enable_all(device_t consumer) { return (enable_disable_all(consumer, true)); } int fdt_clock_disable_all(device_t consumer) { return (enable_disable_all(consumer, false)); } void fdt_clock_register_provider(device_t provider) { OF_device_register_xref( OF_xref_from_node(ofw_bus_get_node(provider)), provider); } void fdt_clock_unregister_provider(device_t provider) { OF_device_register_xref(OF_xref_from_device(provider), NULL); } Index: head/sys/dev/fdt/fdt_pinctrl.c =================================================================== --- head/sys/dev/fdt/fdt_pinctrl.c (revision 332340) +++ head/sys/dev/fdt/fdt_pinctrl.c (revision 332341) @@ -1,150 +1,150 @@ /*- * Copyright (c) 2014 Ian Lepore * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #include #include #include #include #include "fdt_pinctrl_if.h" #include #include int fdt_pinctrl_configure(device_t client, u_int index) { device_t pinctrl; phandle_t *configs; int i, nconfigs; char name[16]; snprintf(name, sizeof(name), "pinctrl-%u", index); - nconfigs = OF_getencprop_alloc(ofw_bus_get_node(client), name, + nconfigs = OF_getencprop_alloc_multi(ofw_bus_get_node(client), name, sizeof(*configs), (void **)&configs); if (nconfigs < 0) return (ENOENT); if (nconfigs == 0) return (0); /* Empty property is documented as valid. */ for (i = 0; i < nconfigs; i++) { if ((pinctrl = OF_device_from_xref(configs[i])) != NULL) FDT_PINCTRL_CONFIGURE(pinctrl, configs[i]); } OF_prop_free(configs); return (0); } int fdt_pinctrl_configure_by_name(device_t client, const char * name) { char * names; int i, offset, nameslen; nameslen = OF_getprop_alloc(ofw_bus_get_node(client), "pinctrl-names", (void **)&names); if (nameslen <= 0) return (ENOENT); for (i = 0, offset = 0; offset < nameslen; i++) { if (strcmp(name, &names[offset]) == 0) break; offset += strlen(&names[offset]) + 1; } OF_prop_free(names); if (offset < nameslen) return (fdt_pinctrl_configure(client, i)); else return (ENOENT); } static int pinctrl_register_children(device_t pinctrl, phandle_t parent, const char *pinprop) { phandle_t node; /* * Recursively descend from parent, looking for nodes that have the * given property, and associate the pinctrl device_t with each one. */ for (node = OF_child(parent); node != 0; node = OF_peer(node)) { pinctrl_register_children(pinctrl, node, pinprop); if (pinprop == NULL || OF_hasprop(node, pinprop)) { OF_device_register_xref(OF_xref_from_node(node), pinctrl); } } return (0); } int fdt_pinctrl_register(device_t pinctrl, const char *pinprop) { phandle_t node; node = ofw_bus_get_node(pinctrl); OF_device_register_xref(OF_xref_from_node(node), pinctrl); return (pinctrl_register_children(pinctrl, node, pinprop)); } static int pinctrl_configure_children(device_t pinctrl, phandle_t parent) { phandle_t node, *configs; int i, nconfigs; for (node = OF_child(parent); node != 0; node = OF_peer(node)) { if (!ofw_bus_node_status_okay(node)) continue; pinctrl_configure_children(pinctrl, node); - nconfigs = OF_getencprop_alloc(node, "pinctrl-0", + nconfigs = OF_getencprop_alloc_multi(node, "pinctrl-0", sizeof(*configs), (void **)&configs); if (nconfigs <= 0) continue; if (bootverbose) { char name[32]; OF_getprop(node, "name", &name, sizeof(name)); printf("Processing %d pin-config node(s) in pinctrl-0 for %s\n", nconfigs, name); } for (i = 0; i < nconfigs; i++) { if (OF_device_from_xref(configs[i]) == pinctrl) FDT_PINCTRL_CONFIGURE(pinctrl, configs[i]); } OF_prop_free(configs); } return (0); } int fdt_pinctrl_configure_tree(device_t pinctrl) { return (pinctrl_configure_children(pinctrl, OF_peer(0))); } Index: head/sys/dev/gpio/gpioregulator.c =================================================================== --- head/sys/dev/gpio/gpioregulator.c (revision 332340) +++ head/sys/dev/gpio/gpioregulator.c (revision 332341) @@ -1,348 +1,348 @@ /*- * Copyright (c) 2016 Jared McNeill * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ /* * GPIO controlled regulators */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include "regdev_if.h" struct gpioregulator_state { int val; uint32_t mask; }; struct gpioregulator_init_def { struct regnode_init_def reg_init_def; struct gpiobus_pin *enable_pin; int enable_pin_valid; int startup_delay_us; int nstates; struct gpioregulator_state *states; int npins; struct gpiobus_pin **pins; }; struct gpioregulator_reg_sc { struct regnode *regnode; device_t base_dev; struct regnode_std_param *param; struct gpioregulator_init_def *def; }; struct gpioregulator_softc { device_t dev; struct gpioregulator_reg_sc *reg_sc; struct gpioregulator_init_def init_def; }; static int gpioregulator_regnode_init(struct regnode *regnode) { struct gpioregulator_reg_sc *sc; int error, n; sc = regnode_get_softc(regnode); if (sc->def->enable_pin_valid == 1) { error = gpio_pin_setflags(sc->def->enable_pin, GPIO_PIN_OUTPUT); if (error != 0) return (error); } for (n = 0; n < sc->def->npins; n++) { error = gpio_pin_setflags(sc->def->pins[n], GPIO_PIN_OUTPUT); if (error != 0) return (error); } return (0); } static int gpioregulator_regnode_enable(struct regnode *regnode, bool enable, int *udelay) { struct gpioregulator_reg_sc *sc; bool active; int error; sc = regnode_get_softc(regnode); if (sc->def->enable_pin_valid == 1) { active = enable; if (!sc->param->enable_active_high) active = !active; error = gpio_pin_set_active(sc->def->enable_pin, active); if (error != 0) return (error); } *udelay = sc->def->startup_delay_us; return (0); } static int gpioregulator_regnode_set_voltage(struct regnode *regnode, int min_uvolt, int max_uvolt, int *udelay) { struct gpioregulator_reg_sc *sc; const struct gpioregulator_state *state; int error, n; sc = regnode_get_softc(regnode); state = NULL; for (n = 0; n < sc->def->nstates; n++) { if (sc->def->states[n].val >= min_uvolt && sc->def->states[n].val <= max_uvolt) { state = &sc->def->states[n]; break; } } if (state == NULL) return (EINVAL); for (n = 0; n < sc->def->npins; n++) { error = gpio_pin_set_active(sc->def->pins[n], (state->mask >> n) & 1); if (error != 0) return (error); } *udelay = sc->def->startup_delay_us; return (0); } static int gpioregulator_regnode_get_voltage(struct regnode *regnode, int *uvolt) { struct gpioregulator_reg_sc *sc; uint32_t mask; int error, n; bool active; sc = regnode_get_softc(regnode); mask = 0; for (n = 0; n < sc->def->npins; n++) { error = gpio_pin_is_active(sc->def->pins[n], &active); if (error != 0) return (error); mask |= (active << n); } for (n = 0; n < sc->def->nstates; n++) { if (sc->def->states[n].mask == mask) { *uvolt = sc->def->states[n].val; return (0); } } return (EIO); } static regnode_method_t gpioregulator_regnode_methods[] = { /* Regulator interface */ REGNODEMETHOD(regnode_init, gpioregulator_regnode_init), REGNODEMETHOD(regnode_enable, gpioregulator_regnode_enable), REGNODEMETHOD(regnode_set_voltage, gpioregulator_regnode_set_voltage), REGNODEMETHOD(regnode_get_voltage, gpioregulator_regnode_get_voltage), REGNODEMETHOD_END }; DEFINE_CLASS_1(gpioregulator_regnode, gpioregulator_regnode_class, gpioregulator_regnode_methods, sizeof(struct gpioregulator_reg_sc), regnode_class); static int gpioregulator_parse_fdt(struct gpioregulator_softc *sc) { uint32_t *pstates, mask; phandle_t node; ssize_t len; int error, n; node = ofw_bus_get_node(sc->dev); pstates = NULL; mask = 0; error = regulator_parse_ofw_stdparam(sc->dev, node, &sc->init_def.reg_init_def); if (error != 0) return (error); /* "states" property (required) */ - len = OF_getencprop_alloc(node, "states", sizeof(*pstates), + len = OF_getencprop_alloc_multi(node, "states", sizeof(*pstates), (void **)&pstates); if (len < 2) { device_printf(sc->dev, "invalid 'states' property\n"); error = EINVAL; goto done; } sc->init_def.nstates = len / 2; sc->init_def.states = malloc(sc->init_def.nstates * sizeof(*sc->init_def.states), M_DEVBUF, M_WAITOK); for (n = 0; n < sc->init_def.nstates; n++) { sc->init_def.states[n].val = pstates[n * 2 + 0]; sc->init_def.states[n].mask = pstates[n * 2 + 1]; mask |= sc->init_def.states[n].mask; } /* "startup-delay-us" property (optional) */ len = OF_getencprop(node, "startup-delay-us", &sc->init_def.startup_delay_us, sizeof(sc->init_def.startup_delay_us)); if (len <= 0) sc->init_def.startup_delay_us = 0; /* "enable-gpio" property (optional) */ error = gpio_pin_get_by_ofw_property(sc->dev, node, "enable-gpio", &sc->init_def.enable_pin); if (error == 0) sc->init_def.enable_pin_valid = 1; /* "gpios" property */ sc->init_def.npins = 32 - __builtin_clz(mask); sc->init_def.pins = malloc(sc->init_def.npins * sizeof(sc->init_def.pins), M_DEVBUF, M_WAITOK); for (n = 0; n < sc->init_def.npins; n++) { error = gpio_pin_get_by_ofw_idx(sc->dev, node, n, &sc->init_def.pins[n]); if (error != 0) { device_printf(sc->dev, "cannot get pin %d\n", n); goto done; } } done: if (error != 0) { for (n = 0; n < sc->init_def.npins; n++) { if (sc->init_def.pins[n] != NULL) gpio_pin_release(sc->init_def.pins[n]); } free(sc->init_def.states, M_DEVBUF); free(sc->init_def.pins, M_DEVBUF); } OF_prop_free(pstates); return (error); } static int gpioregulator_probe(device_t dev) { if (!ofw_bus_is_compatible(dev, "regulator-gpio")) return (ENXIO); device_set_desc(dev, "GPIO controlled regulator"); return (BUS_PROBE_GENERIC); } static int gpioregulator_attach(device_t dev) { struct gpioregulator_softc *sc; struct regnode *regnode; phandle_t node; int error; sc = device_get_softc(dev); sc->dev = dev; node = ofw_bus_get_node(dev); error = gpioregulator_parse_fdt(sc); if (error != 0) { device_printf(dev, "cannot parse parameters\n"); return (ENXIO); } sc->init_def.reg_init_def.id = 1; sc->init_def.reg_init_def.ofw_node = node; regnode = regnode_create(dev, &gpioregulator_regnode_class, &sc->init_def.reg_init_def); if (regnode == NULL) { device_printf(dev, "cannot create regulator\n"); return (ENXIO); } sc->reg_sc = regnode_get_softc(regnode); sc->reg_sc->regnode = regnode; sc->reg_sc->base_dev = dev; sc->reg_sc->param = regnode_get_stdparam(regnode); sc->reg_sc->def = &sc->init_def; regnode_register(regnode); return (0); } static device_method_t gpioregulator_methods[] = { /* Device interface */ DEVMETHOD(device_probe, gpioregulator_probe), DEVMETHOD(device_attach, gpioregulator_attach), /* Regdev interface */ DEVMETHOD(regdev_map, regdev_default_ofw_map), DEVMETHOD_END }; static driver_t gpioregulator_driver = { "gpioregulator", gpioregulator_methods, sizeof(struct gpioregulator_softc), }; static devclass_t gpioregulator_devclass; EARLY_DRIVER_MODULE(gpioregulator, simplebus, gpioregulator_driver, gpioregulator_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); MODULE_VERSION(gpioregulator, 1); Index: head/sys/dev/gpio/ofw_gpiobus.c =================================================================== --- head/sys/dev/gpio/ofw_gpiobus.c (revision 332340) +++ head/sys/dev/gpio/ofw_gpiobus.c (revision 332341) @@ -1,593 +1,593 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2009, Nathan Whitehorn * Copyright (c) 2013, Luiz Otavio O Souza * Copyright (c) 2013 The FreeBSD Foundation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice unmodified, this list of conditions, and the following * disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include "gpiobus_if.h" #define GPIO_ACTIVE_LOW 1 static struct ofw_gpiobus_devinfo *ofw_gpiobus_setup_devinfo(device_t, device_t, phandle_t); static void ofw_gpiobus_destroy_devinfo(device_t, struct ofw_gpiobus_devinfo *); static int ofw_gpiobus_parse_gpios_impl(device_t, phandle_t, char *, struct gpiobus_softc *, struct gpiobus_pin **); /* * Utility functions for easier handling of OFW GPIO pins. * * !!! BEWARE !!! * GPIOBUS uses children's IVARs, so we cannot use this interface for cross * tree consumers. * */ int gpio_pin_get_by_ofw_propidx(device_t consumer, phandle_t cnode, char *prop_name, int idx, gpio_pin_t *out_pin) { phandle_t xref; pcell_t *cells; device_t busdev; struct gpiobus_pin pin; int ncells, rv; KASSERT(consumer != NULL && cnode > 0, ("both consumer and cnode required")); rv = ofw_bus_parse_xref_list_alloc(cnode, prop_name, "#gpio-cells", idx, &xref, &ncells, &cells); if (rv != 0) return (rv); /* Translate provider to device. */ pin.dev = OF_device_from_xref(xref); if (pin.dev == NULL) { OF_prop_free(cells); return (ENODEV); } /* Test if GPIO bus already exist. */ busdev = GPIO_GET_BUS(pin.dev); if (busdev == NULL) { OF_prop_free(cells); return (ENODEV); } /* Map GPIO pin. */ rv = gpio_map_gpios(pin.dev, cnode, OF_node_from_xref(xref), ncells, cells, &pin.pin, &pin.flags); OF_prop_free(cells); if (rv != 0) return (ENXIO); /* Reserve GPIO pin. */ rv = gpiobus_acquire_pin(busdev, pin.pin); if (rv != 0) return (EBUSY); *out_pin = malloc(sizeof(struct gpiobus_pin), M_DEVBUF, M_WAITOK | M_ZERO); **out_pin = pin; return (0); } int gpio_pin_get_by_ofw_idx(device_t consumer, phandle_t node, int idx, gpio_pin_t *pin) { return (gpio_pin_get_by_ofw_propidx(consumer, node, "gpios", idx, pin)); } int gpio_pin_get_by_ofw_property(device_t consumer, phandle_t node, char *name, gpio_pin_t *pin) { return (gpio_pin_get_by_ofw_propidx(consumer, node, name, 0, pin)); } int gpio_pin_get_by_ofw_name(device_t consumer, phandle_t node, char *name, gpio_pin_t *pin) { int rv, idx; KASSERT(consumer != NULL && node > 0, ("both consumer and node required")); rv = ofw_bus_find_string_index(node, "gpio-names", name, &idx); if (rv != 0) return (rv); return (gpio_pin_get_by_ofw_idx(consumer, node, idx, pin)); } void gpio_pin_release(gpio_pin_t gpio) { device_t busdev; if (gpio == NULL) return; KASSERT(gpio->dev != NULL, ("invalid pin state")); busdev = GPIO_GET_BUS(gpio->dev); if (busdev != NULL) gpiobus_release_pin(busdev, gpio->pin); /* XXXX Unreserve pin. */ free(gpio, M_DEVBUF); } int gpio_pin_getcaps(gpio_pin_t pin, uint32_t *caps) { KASSERT(pin != NULL, ("GPIO pin is NULL.")); KASSERT(pin->dev != NULL, ("GPIO pin device is NULL.")); return (GPIO_PIN_GETCAPS(pin->dev, pin->pin, caps)); } int gpio_pin_is_active(gpio_pin_t pin, bool *active) { int rv; uint32_t tmp; KASSERT(pin != NULL, ("GPIO pin is NULL.")); KASSERT(pin->dev != NULL, ("GPIO pin device is NULL.")); rv = GPIO_PIN_GET(pin->dev, pin->pin, &tmp); if (rv != 0) { return (rv); } if (pin->flags & GPIO_ACTIVE_LOW) *active = tmp == 0; else *active = tmp != 0; return (0); } int gpio_pin_set_active(gpio_pin_t pin, bool active) { int rv; uint32_t tmp; if (pin->flags & GPIO_ACTIVE_LOW) tmp = active ? 0 : 1; else tmp = active ? 1 : 0; KASSERT(pin != NULL, ("GPIO pin is NULL.")); KASSERT(pin->dev != NULL, ("GPIO pin device is NULL.")); rv = GPIO_PIN_SET(pin->dev, pin->pin, tmp); return (rv); } int gpio_pin_setflags(gpio_pin_t pin, uint32_t flags) { int rv; KASSERT(pin != NULL, ("GPIO pin is NULL.")); KASSERT(pin->dev != NULL, ("GPIO pin device is NULL.")); rv = GPIO_PIN_SETFLAGS(pin->dev, pin->pin, flags); return (rv); } /* * OFW_GPIOBUS driver. */ device_t ofw_gpiobus_add_fdt_child(device_t bus, const char *drvname, phandle_t child) { device_t childdev; int i; struct gpiobus_ivar *devi; struct ofw_gpiobus_devinfo *dinfo; /* * Check to see if we already have a child for @p child, and if so * return it. */ childdev = ofw_bus_find_child_device_by_phandle(bus, child); if (childdev != NULL) return (childdev); /* * Set up the GPIO child and OFW bus layer devinfo and add it to bus. */ childdev = device_add_child(bus, drvname, -1); if (childdev == NULL) return (NULL); dinfo = ofw_gpiobus_setup_devinfo(bus, childdev, child); if (dinfo == NULL) { device_delete_child(bus, childdev); return (NULL); } if (device_probe_and_attach(childdev) != 0) { ofw_gpiobus_destroy_devinfo(bus, dinfo); device_delete_child(bus, childdev); return (NULL); } /* Use the child name as pin name. */ devi = &dinfo->opd_dinfo; for (i = 0; i < devi->npins; i++) GPIOBUS_PIN_SETNAME(bus, devi->pins[i], device_get_nameunit(childdev)); return (childdev); } int ofw_gpiobus_parse_gpios(device_t consumer, char *pname, struct gpiobus_pin **pins) { return (ofw_gpiobus_parse_gpios_impl(consumer, ofw_bus_get_node(consumer), pname, NULL, pins)); } void ofw_gpiobus_register_provider(device_t provider) { phandle_t node; node = ofw_bus_get_node(provider); OF_device_register_xref(OF_xref_from_node(node), provider); } void ofw_gpiobus_unregister_provider(device_t provider) { phandle_t node; node = ofw_bus_get_node(provider); OF_device_register_xref(OF_xref_from_node(node), NULL); } static struct ofw_gpiobus_devinfo * ofw_gpiobus_setup_devinfo(device_t bus, device_t child, phandle_t node) { int i, npins; struct gpiobus_ivar *devi; struct gpiobus_pin *pins; struct gpiobus_softc *sc; struct ofw_gpiobus_devinfo *dinfo; sc = device_get_softc(bus); dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_NOWAIT | M_ZERO); if (dinfo == NULL) return (NULL); if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, node) != 0) { free(dinfo, M_DEVBUF); return (NULL); } /* Parse the gpios property for the child. */ npins = ofw_gpiobus_parse_gpios_impl(child, node, "gpios", sc, &pins); if (npins <= 0) { ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo); free(dinfo, M_DEVBUF); return (NULL); } /* Initialize the irq resource list. */ resource_list_init(&dinfo->opd_dinfo.rl); /* Allocate the child ivars and copy the parsed pin data. */ devi = &dinfo->opd_dinfo; devi->npins = (uint32_t)npins; if (gpiobus_alloc_ivars(devi) != 0) { free(pins, M_DEVBUF); ofw_gpiobus_destroy_devinfo(bus, dinfo); return (NULL); } for (i = 0; i < devi->npins; i++) { devi->flags[i] = pins[i].flags; devi->pins[i] = pins[i].pin; } free(pins, M_DEVBUF); /* Parse the interrupt resources. */ if (ofw_bus_intr_to_rl(bus, node, &dinfo->opd_dinfo.rl, NULL) != 0) { ofw_gpiobus_destroy_devinfo(bus, dinfo); return (NULL); } device_set_ivars(child, dinfo); return (dinfo); } static void ofw_gpiobus_destroy_devinfo(device_t bus, struct ofw_gpiobus_devinfo *dinfo) { int i; struct gpiobus_ivar *devi; struct gpiobus_softc *sc; sc = device_get_softc(bus); devi = &dinfo->opd_dinfo; for (i = 0; i < devi->npins; i++) { if (devi->pins[i] > sc->sc_npins) continue; sc->sc_pins[devi->pins[i]].mapped = 0; } gpiobus_free_ivars(devi); resource_list_free(&dinfo->opd_dinfo.rl); ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo); free(dinfo, M_DEVBUF); } static int ofw_gpiobus_parse_gpios_impl(device_t consumer, phandle_t cnode, char *pname, struct gpiobus_softc *bussc, struct gpiobus_pin **pins) { int gpiocells, i, j, ncells, npins; pcell_t *gpios; phandle_t gpio; - ncells = OF_getencprop_alloc(cnode, pname, sizeof(*gpios), + ncells = OF_getencprop_alloc_multi(cnode, pname, sizeof(*gpios), (void **)&gpios); if (ncells == -1) { device_printf(consumer, "Warning: No %s specified in fdt data; " "device may not function.\n", pname); return (-1); } /* * The gpio-specifier is controller independent, the first pcell has * the reference to the GPIO controller phandler. * Count the number of encoded gpio-specifiers on the first pass. */ i = 0; npins = 0; while (i < ncells) { /* Allow NULL specifiers. */ if (gpios[i] == 0) { npins++; i++; continue; } gpio = OF_node_from_xref(gpios[i]); /* If we have bussc, ignore devices from other gpios. */ if (bussc != NULL) if (ofw_bus_get_node(bussc->sc_dev) != gpio) return (0); /* * Check for gpio-controller property and read the #gpio-cells * for this GPIO controller. */ if (!OF_hasprop(gpio, "gpio-controller") || OF_getencprop(gpio, "#gpio-cells", &gpiocells, sizeof(gpiocells)) < 0) { device_printf(consumer, "gpio reference is not a gpio-controller.\n"); OF_prop_free(gpios); return (-1); } if (ncells - i < gpiocells + 1) { device_printf(consumer, "%s cells doesn't match #gpio-cells.\n", pname); return (-1); } npins++; i += gpiocells + 1; } if (npins == 0 || pins == NULL) { if (npins == 0) device_printf(consumer, "no pin specified in %s.\n", pname); OF_prop_free(gpios); return (npins); } *pins = malloc(sizeof(struct gpiobus_pin) * npins, M_DEVBUF, M_NOWAIT | M_ZERO); if (*pins == NULL) { OF_prop_free(gpios); return (-1); } /* Decode the gpio specifier on the second pass. */ i = 0; j = 0; while (i < ncells) { /* Allow NULL specifiers. */ if (gpios[i] == 0) { j++; i++; continue; } gpio = OF_node_from_xref(gpios[i]); /* Read gpio-cells property for this GPIO controller. */ if (OF_getencprop(gpio, "#gpio-cells", &gpiocells, sizeof(gpiocells)) < 0) { device_printf(consumer, "gpio does not have the #gpio-cells property.\n"); goto fail; } /* Return the device reference for the GPIO controller. */ (*pins)[j].dev = OF_device_from_xref(gpios[i]); if ((*pins)[j].dev == NULL) { device_printf(consumer, "no device registered for the gpio controller.\n"); goto fail; } /* * If the gpiobus softc is NULL we use the GPIO_GET_BUS() to * retrieve it. The GPIO_GET_BUS() method is only valid after * the child is probed and attached. */ if (bussc == NULL) { if (GPIO_GET_BUS((*pins)[j].dev) == NULL) { device_printf(consumer, "no gpiobus reference for %s.\n", device_get_nameunit((*pins)[j].dev)); goto fail; } bussc = device_get_softc(GPIO_GET_BUS((*pins)[j].dev)); } /* Get the GPIO pin number and flags. */ if (gpio_map_gpios((*pins)[j].dev, cnode, gpio, gpiocells, &gpios[i + 1], &(*pins)[j].pin, &(*pins)[j].flags) != 0) { device_printf(consumer, "cannot map the gpios specifier.\n"); goto fail; } /* Reserve the GPIO pin. */ if (gpiobus_acquire_pin(bussc->sc_busdev, (*pins)[j].pin) != 0) goto fail; j++; i += gpiocells + 1; } OF_prop_free(gpios); return (npins); fail: OF_prop_free(gpios); free(*pins, M_DEVBUF); return (-1); } static int ofw_gpiobus_probe(device_t dev) { if (ofw_bus_get_node(dev) == -1) return (ENXIO); device_set_desc(dev, "OFW GPIO bus"); return (0); } static int ofw_gpiobus_attach(device_t dev) { int err; phandle_t child; err = gpiobus_init_softc(dev); if (err != 0) return (err); bus_generic_probe(dev); bus_enumerate_hinted_children(dev); /* * Attach the children represented in the device tree. */ for (child = OF_child(ofw_bus_get_node(dev)); child != 0; child = OF_peer(child)) { if (!OF_hasprop(child, "gpios")) continue; if (ofw_gpiobus_add_fdt_child(dev, NULL, child) == NULL) continue; } return (bus_generic_attach(dev)); } static device_t ofw_gpiobus_add_child(device_t dev, u_int order, const char *name, int unit) { device_t child; struct ofw_gpiobus_devinfo *devi; child = device_add_child_ordered(dev, order, name, unit); if (child == NULL) return (child); devi = malloc(sizeof(struct ofw_gpiobus_devinfo), M_DEVBUF, M_NOWAIT | M_ZERO); if (devi == NULL) { device_delete_child(dev, child); return (0); } /* * NULL all the OFW-related parts of the ivars for non-OFW * children. */ devi->opd_obdinfo.obd_node = -1; devi->opd_obdinfo.obd_name = NULL; devi->opd_obdinfo.obd_compat = NULL; devi->opd_obdinfo.obd_type = NULL; devi->opd_obdinfo.obd_model = NULL; device_set_ivars(child, devi); return (child); } static const struct ofw_bus_devinfo * ofw_gpiobus_get_devinfo(device_t bus, device_t dev) { struct ofw_gpiobus_devinfo *dinfo; dinfo = device_get_ivars(dev); return (&dinfo->opd_obdinfo); } static device_method_t ofw_gpiobus_methods[] = { /* Device interface */ DEVMETHOD(device_probe, ofw_gpiobus_probe), DEVMETHOD(device_attach, ofw_gpiobus_attach), /* Bus interface */ DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), DEVMETHOD(bus_add_child, ofw_gpiobus_add_child), /* ofw_bus interface */ DEVMETHOD(ofw_bus_get_devinfo, ofw_gpiobus_get_devinfo), DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), DEVMETHOD_END }; devclass_t ofwgpiobus_devclass; DEFINE_CLASS_1(gpiobus, ofw_gpiobus_driver, ofw_gpiobus_methods, sizeof(struct gpiobus_softc), gpiobus_driver); EARLY_DRIVER_MODULE(ofw_gpiobus, gpio, ofw_gpiobus_driver, ofwgpiobus_devclass, 0, 0, BUS_PASS_BUS); MODULE_VERSION(ofw_gpiobus, 1); MODULE_DEPEND(ofw_gpiobus, gpiobus, 1, 1, 1); Index: head/sys/dev/ofw/ofw_bus_subr.c =================================================================== --- head/sys/dev/ofw/ofw_bus_subr.c (revision 332340) +++ head/sys/dev/ofw/ofw_bus_subr.c (revision 332341) @@ -1,980 +1,982 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2001 - 2003 by Thomas Moestl . * Copyright (c) 2005 Marius Strobl * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions, and the following disclaimer, * without modification, immediately at the beginning of the file. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_platform.h" #include #include #include #include #include #include #include #include #include #include "ofw_bus_if.h" #define OFW_COMPAT_LEN 255 #define OFW_STATUS_LEN 16 int ofw_bus_gen_setup_devinfo(struct ofw_bus_devinfo *obd, phandle_t node) { if (obd == NULL) return (ENOMEM); /* The 'name' property is considered mandatory. */ if ((OF_getprop_alloc(node, "name", (void **)&obd->obd_name)) == -1) return (EINVAL); OF_getprop_alloc(node, "compatible", (void **)&obd->obd_compat); OF_getprop_alloc(node, "device_type", (void **)&obd->obd_type); OF_getprop_alloc(node, "model", (void **)&obd->obd_model); OF_getprop_alloc(node, "status", (void **)&obd->obd_status); obd->obd_node = node; return (0); } void ofw_bus_gen_destroy_devinfo(struct ofw_bus_devinfo *obd) { if (obd == NULL) return; if (obd->obd_compat != NULL) free(obd->obd_compat, M_OFWPROP); if (obd->obd_model != NULL) free(obd->obd_model, M_OFWPROP); if (obd->obd_name != NULL) free(obd->obd_name, M_OFWPROP); if (obd->obd_type != NULL) free(obd->obd_type, M_OFWPROP); if (obd->obd_status != NULL) free(obd->obd_status, M_OFWPROP); } int ofw_bus_gen_child_pnpinfo_str(device_t cbdev, device_t child, char *buf, size_t buflen) { *buf = '\0'; if (ofw_bus_get_name(child) != NULL) { strlcat(buf, "name=", buflen); strlcat(buf, ofw_bus_get_name(child), buflen); } if (ofw_bus_get_compat(child) != NULL) { strlcat(buf, " compat=", buflen); strlcat(buf, ofw_bus_get_compat(child), buflen); } return (0); }; const char * ofw_bus_gen_get_compat(device_t bus, device_t dev) { const struct ofw_bus_devinfo *obd; obd = OFW_BUS_GET_DEVINFO(bus, dev); if (obd == NULL) return (NULL); return (obd->obd_compat); } const char * ofw_bus_gen_get_model(device_t bus, device_t dev) { const struct ofw_bus_devinfo *obd; obd = OFW_BUS_GET_DEVINFO(bus, dev); if (obd == NULL) return (NULL); return (obd->obd_model); } const char * ofw_bus_gen_get_name(device_t bus, device_t dev) { const struct ofw_bus_devinfo *obd; obd = OFW_BUS_GET_DEVINFO(bus, dev); if (obd == NULL) return (NULL); return (obd->obd_name); } phandle_t ofw_bus_gen_get_node(device_t bus, device_t dev) { const struct ofw_bus_devinfo *obd; obd = OFW_BUS_GET_DEVINFO(bus, dev); if (obd == NULL) return (0); return (obd->obd_node); } const char * ofw_bus_gen_get_type(device_t bus, device_t dev) { const struct ofw_bus_devinfo *obd; obd = OFW_BUS_GET_DEVINFO(bus, dev); if (obd == NULL) return (NULL); return (obd->obd_type); } const char * ofw_bus_get_status(device_t dev) { const struct ofw_bus_devinfo *obd; obd = OFW_BUS_GET_DEVINFO(device_get_parent(dev), dev); if (obd == NULL) return (NULL); return (obd->obd_status); } int ofw_bus_status_okay(device_t dev) { const char *status; status = ofw_bus_get_status(dev); if (status == NULL || strcmp(status, "okay") == 0 || strcmp(status, "ok") == 0) return (1); return (0); } int ofw_bus_node_status_okay(phandle_t node) { char status[OFW_STATUS_LEN]; int len; len = OF_getproplen(node, "status"); if (len <= 0) return (1); OF_getprop(node, "status", status, OFW_STATUS_LEN); if ((len == 5 && (bcmp(status, "okay", len) == 0)) || (len == 3 && (bcmp(status, "ok", len)))) return (1); return (0); } static int ofw_bus_node_is_compatible_int(const char *compat, int len, const char *onecompat) { int onelen, l, ret; onelen = strlen(onecompat); ret = 0; while (len > 0) { if (strlen(compat) == onelen && strncasecmp(compat, onecompat, onelen) == 0) { /* Found it. */ ret = 1; break; } /* Slide to the next sub-string. */ l = strlen(compat) + 1; compat += l; len -= l; } return (ret); } int ofw_bus_node_is_compatible(phandle_t node, const char *compatstr) { char compat[OFW_COMPAT_LEN]; int len, rv; if ((len = OF_getproplen(node, "compatible")) <= 0) return (0); bzero(compat, OFW_COMPAT_LEN); if (OF_getprop(node, "compatible", compat, OFW_COMPAT_LEN) < 0) return (0); rv = ofw_bus_node_is_compatible_int(compat, len, compatstr); return (rv); } int ofw_bus_is_compatible(device_t dev, const char *onecompat) { phandle_t node; const char *compat; int len; if ((compat = ofw_bus_get_compat(dev)) == NULL) return (0); if ((node = ofw_bus_get_node(dev)) == -1) return (0); /* Get total 'compatible' prop len */ if ((len = OF_getproplen(node, "compatible")) <= 0) return (0); return (ofw_bus_node_is_compatible_int(compat, len, onecompat)); } int ofw_bus_is_compatible_strict(device_t dev, const char *compatible) { const char *compat; size_t len; if ((compat = ofw_bus_get_compat(dev)) == NULL) return (0); len = strlen(compatible); if (strlen(compat) == len && strncasecmp(compat, compatible, len) == 0) return (1); return (0); } const struct ofw_compat_data * ofw_bus_search_compatible(device_t dev, const struct ofw_compat_data *compat) { if (compat == NULL) return NULL; for (; compat->ocd_str != NULL; ++compat) { if (ofw_bus_is_compatible(dev, compat->ocd_str)) break; } return (compat); } int ofw_bus_has_prop(device_t dev, const char *propname) { phandle_t node; if ((node = ofw_bus_get_node(dev)) == -1) return (0); return (OF_hasprop(node, propname)); } void ofw_bus_setup_iinfo(phandle_t node, struct ofw_bus_iinfo *ii, int intrsz) { pcell_t addrc; int msksz; if (OF_getencprop(node, "#address-cells", &addrc, sizeof(addrc)) == -1) addrc = 2; ii->opi_addrc = addrc * sizeof(pcell_t); - ii->opi_imapsz = OF_getencprop_alloc(node, "interrupt-map", 1, + ii->opi_imapsz = OF_getencprop_alloc(node, "interrupt-map", (void **)&ii->opi_imap); if (ii->opi_imapsz > 0) { - msksz = OF_getencprop_alloc(node, "interrupt-map-mask", 1, + msksz = OF_getencprop_alloc(node, "interrupt-map-mask", (void **)&ii->opi_imapmsk); /* * Failure to get the mask is ignored; a full mask is used * then. We barf on bad mask sizes, however. */ if (msksz != -1 && msksz != ii->opi_addrc + intrsz) panic("ofw_bus_setup_iinfo: bad interrupt-map-mask " "property!"); } } int ofw_bus_lookup_imap(phandle_t node, struct ofw_bus_iinfo *ii, void *reg, int regsz, void *pintr, int pintrsz, void *mintr, int mintrsz, phandle_t *iparent) { uint8_t maskbuf[regsz + pintrsz]; int rv; if (ii->opi_imapsz <= 0) return (0); KASSERT(regsz >= ii->opi_addrc, ("ofw_bus_lookup_imap: register size too small: %d < %d", regsz, ii->opi_addrc)); if (node != -1) { rv = OF_getencprop(node, "reg", reg, regsz); if (rv < regsz) panic("ofw_bus_lookup_imap: cannot get reg property"); } return (ofw_bus_search_intrmap(pintr, pintrsz, reg, ii->opi_addrc, ii->opi_imap, ii->opi_imapsz, ii->opi_imapmsk, maskbuf, mintr, mintrsz, iparent)); } /* * Map an interrupt using the firmware reg, interrupt-map and * interrupt-map-mask properties. * The interrupt property to be mapped must be of size intrsz, and pointed to * by intr. The regs property of the node for which the mapping is done must * be passed as regs. This property is an array of register specifications; * the size of the address part of such a specification must be passed as * physsz. Only the first element of the property is used. * imap and imapsz hold the interrupt mask and it's size. * imapmsk is a pointer to the interrupt-map-mask property, which must have * a size of physsz + intrsz; it may be NULL, in which case a full mask is * assumed. * maskbuf must point to a buffer of length physsz + intrsz. * The interrupt is returned in result, which must point to a buffer of length * rintrsz (which gives the expected size of the mapped interrupt). * Returns number of cells in the interrupt if a mapping was found, 0 otherwise. */ int ofw_bus_search_intrmap(void *intr, int intrsz, void *regs, int physsz, void *imap, int imapsz, void *imapmsk, void *maskbuf, void *result, int rintrsz, phandle_t *iparent) { phandle_t parent; uint8_t *ref = maskbuf; uint8_t *uiintr = intr; uint8_t *uiregs = regs; uint8_t *uiimapmsk = imapmsk; uint8_t *mptr; pcell_t paddrsz; pcell_t pintrsz; int i, tsz; if (imapmsk != NULL) { for (i = 0; i < physsz; i++) ref[i] = uiregs[i] & uiimapmsk[i]; for (i = 0; i < intrsz; i++) ref[physsz + i] = uiintr[i] & uiimapmsk[physsz + i]; } else { bcopy(regs, ref, physsz); bcopy(intr, ref + physsz, intrsz); } mptr = imap; i = imapsz; paddrsz = 0; while (i > 0) { bcopy(mptr + physsz + intrsz, &parent, sizeof(parent)); #ifndef OFW_IMAP_NO_IPARENT_ADDR_CELLS /* * Find if we need to read the parent address data. * CHRP-derived OF bindings, including ePAPR-compliant FDTs, * use this as an optional part of the specifier. */ if (OF_getencprop(OF_node_from_xref(parent), "#address-cells", &paddrsz, sizeof(paddrsz)) == -1) paddrsz = 0; /* default */ paddrsz *= sizeof(pcell_t); #endif if (OF_searchencprop(OF_node_from_xref(parent), "#interrupt-cells", &pintrsz, sizeof(pintrsz)) == -1) pintrsz = 1; /* default */ pintrsz *= sizeof(pcell_t); /* Compute the map stride size. */ tsz = physsz + intrsz + sizeof(phandle_t) + paddrsz + pintrsz; KASSERT(i >= tsz, ("ofw_bus_search_intrmap: truncated map")); if (bcmp(ref, mptr, physsz + intrsz) == 0) { bcopy(mptr + physsz + intrsz + sizeof(parent) + paddrsz, result, MIN(rintrsz, pintrsz)); if (iparent != NULL) *iparent = parent; return (pintrsz/sizeof(pcell_t)); } mptr += tsz; i -= tsz; } return (0); } int ofw_bus_msimap(phandle_t node, uint16_t pci_rid, phandle_t *msi_parent, uint32_t *msi_rid) { pcell_t *map, mask, msi_base, rid_base, rid_length; ssize_t len; uint32_t masked_rid; int err, i; /* TODO: This should be OF_searchprop_alloc if we had it */ - len = OF_getencprop_alloc(node, "msi-map", sizeof(*map), (void **)&map); + len = OF_getencprop_alloc_multi(node, "msi-map", sizeof(*map), + (void **)&map); if (len < 0) { if (msi_parent != NULL) { *msi_parent = 0; OF_getencprop(node, "msi-parent", msi_parent, sizeof(*msi_parent)); } if (msi_rid != NULL) *msi_rid = pci_rid; return (0); } err = ENOENT; mask = 0xffffffff; OF_getencprop(node, "msi-map-mask", &mask, sizeof(mask)); masked_rid = pci_rid & mask; for (i = 0; i < len; i += 4) { rid_base = map[i + 0]; rid_length = map[i + 3]; if (masked_rid < rid_base || masked_rid >= (rid_base + rid_length)) continue; msi_base = map[i + 2]; if (msi_parent != NULL) *msi_parent = map[i + 1]; if (msi_rid != NULL) *msi_rid = masked_rid - rid_base + msi_base; err = 0; break; } free(map, M_OFWPROP); return (err); } static int ofw_bus_reg_to_rl_helper(device_t dev, phandle_t node, pcell_t acells, pcell_t scells, struct resource_list *rl, const char *reg_source) { uint64_t phys, size; ssize_t i, j, rid, nreg, ret; uint32_t *reg; char *name; /* * This may be just redundant when having ofw_bus_devinfo * but makes this routine independent of it. */ ret = OF_getprop_alloc(node, "name", (void **)&name); if (ret == -1) name = NULL; - ret = OF_getencprop_alloc(node, reg_source, sizeof(*reg), (void **)®); + ret = OF_getencprop_alloc_multi(node, reg_source, sizeof(*reg), + (void **)®); nreg = (ret == -1) ? 0 : ret; if (nreg % (acells + scells) != 0) { if (bootverbose) device_printf(dev, "Malformed reg property on <%s>\n", (name == NULL) ? "unknown" : name); nreg = 0; } for (i = 0, rid = 0; i < nreg; i += acells + scells, rid++) { phys = size = 0; for (j = 0; j < acells; j++) { phys <<= 32; phys |= reg[i + j]; } for (j = 0; j < scells; j++) { size <<= 32; size |= reg[i + acells + j]; } /* Skip the dummy reg property of glue devices like ssm(4). */ if (size != 0) resource_list_add(rl, SYS_RES_MEMORY, rid, phys, phys + size - 1, size); } free(name, M_OFWPROP); free(reg, M_OFWPROP); return (0); } int ofw_bus_reg_to_rl(device_t dev, phandle_t node, pcell_t acells, pcell_t scells, struct resource_list *rl) { return (ofw_bus_reg_to_rl_helper(dev, node, acells, scells, rl, "reg")); } int ofw_bus_assigned_addresses_to_rl(device_t dev, phandle_t node, pcell_t acells, pcell_t scells, struct resource_list *rl) { return (ofw_bus_reg_to_rl_helper(dev, node, acells, scells, rl, "assigned-addresses")); } /* * Get interrupt parent for given node. * Returns 0 if interrupt parent doesn't exist. */ phandle_t ofw_bus_find_iparent(phandle_t node) { phandle_t iparent; if (OF_searchencprop(node, "interrupt-parent", &iparent, sizeof(iparent)) == -1) { for (iparent = node; iparent != 0; iparent = OF_parent(iparent)) { if (OF_hasprop(iparent, "interrupt-controller")) break; } iparent = OF_xref_from_node(iparent); } return (iparent); } int ofw_bus_intr_to_rl(device_t dev, phandle_t node, struct resource_list *rl, int *rlen) { phandle_t iparent; uint32_t icells, *intr; int err, i, irqnum, nintr, rid; boolean_t extended; - nintr = OF_getencprop_alloc(node, "interrupts", sizeof(*intr), + nintr = OF_getencprop_alloc_multi(node, "interrupts", sizeof(*intr), (void **)&intr); if (nintr > 0) { iparent = ofw_bus_find_iparent(node); if (iparent == 0) { device_printf(dev, "No interrupt-parent found, " "assuming direct parent\n"); iparent = OF_parent(node); iparent = OF_xref_from_node(iparent); } if (OF_searchencprop(OF_node_from_xref(iparent), "#interrupt-cells", &icells, sizeof(icells)) == -1) { device_printf(dev, "Missing #interrupt-cells " "property, assuming <1>\n"); icells = 1; } if (icells < 1 || icells > nintr) { device_printf(dev, "Invalid #interrupt-cells property " "value <%d>, assuming <1>\n", icells); icells = 1; } extended = false; } else { - nintr = OF_getencprop_alloc(node, "interrupts-extended", + nintr = OF_getencprop_alloc_multi(node, "interrupts-extended", sizeof(*intr), (void **)&intr); if (nintr <= 0) return (0); extended = true; } err = 0; rid = 0; for (i = 0; i < nintr; i += icells) { if (extended) { iparent = intr[i++]; if (OF_searchencprop(OF_node_from_xref(iparent), "#interrupt-cells", &icells, sizeof(icells)) == -1) { device_printf(dev, "Missing #interrupt-cells " "property\n"); err = ENOENT; break; } if (icells < 1 || (i + icells) > nintr) { device_printf(dev, "Invalid #interrupt-cells " "property value <%d>\n", icells); err = ERANGE; break; } } irqnum = ofw_bus_map_intr(dev, iparent, icells, &intr[i]); resource_list_add(rl, SYS_RES_IRQ, rid++, irqnum, irqnum, 1); } if (rlen != NULL) *rlen = rid; free(intr, M_OFWPROP); return (err); } int ofw_bus_intr_by_rid(device_t dev, phandle_t node, int wanted_rid, phandle_t *producer, int *ncells, pcell_t **cells) { phandle_t iparent; uint32_t icells, *intr; int err, i, nintr, rid; boolean_t extended; - nintr = OF_getencprop_alloc(node, "interrupts", sizeof(*intr), + nintr = OF_getencprop_alloc_multi(node, "interrupts", sizeof(*intr), (void **)&intr); if (nintr > 0) { iparent = ofw_bus_find_iparent(node); if (iparent == 0) { device_printf(dev, "No interrupt-parent found, " "assuming direct parent\n"); iparent = OF_parent(node); iparent = OF_xref_from_node(iparent); } if (OF_searchencprop(OF_node_from_xref(iparent), "#interrupt-cells", &icells, sizeof(icells)) == -1) { device_printf(dev, "Missing #interrupt-cells " "property, assuming <1>\n"); icells = 1; } if (icells < 1 || icells > nintr) { device_printf(dev, "Invalid #interrupt-cells property " "value <%d>, assuming <1>\n", icells); icells = 1; } extended = false; } else { - nintr = OF_getencprop_alloc(node, "interrupts-extended", + nintr = OF_getencprop_alloc_multi(node, "interrupts-extended", sizeof(*intr), (void **)&intr); if (nintr <= 0) return (ESRCH); extended = true; } err = ESRCH; rid = 0; for (i = 0; i < nintr; i += icells, rid++) { if (extended) { iparent = intr[i++]; if (OF_searchencprop(OF_node_from_xref(iparent), "#interrupt-cells", &icells, sizeof(icells)) == -1) { device_printf(dev, "Missing #interrupt-cells " "property\n"); err = ENOENT; break; } if (icells < 1 || (i + icells) > nintr) { device_printf(dev, "Invalid #interrupt-cells " "property value <%d>\n", icells); err = ERANGE; break; } } if (rid == wanted_rid) { *cells = malloc(icells * sizeof(**cells), M_OFWPROP, M_WAITOK); *producer = iparent; *ncells= icells; memcpy(*cells, intr + i, icells * sizeof(**cells)); err = 0; break; } } free(intr, M_OFWPROP); return (err); } phandle_t ofw_bus_find_child(phandle_t start, const char *child_name) { char *name; int ret; phandle_t child; for (child = OF_child(start); child != 0; child = OF_peer(child)) { ret = OF_getprop_alloc(child, "name", (void **)&name); if (ret == -1) continue; if (strcmp(name, child_name) == 0) { free(name, M_OFWPROP); return (child); } free(name, M_OFWPROP); } return (0); } phandle_t ofw_bus_find_compatible(phandle_t node, const char *onecompat) { phandle_t child, ret; /* * Traverse all children of 'start' node, and find first with * matching 'compatible' property. */ for (child = OF_child(node); child != 0; child = OF_peer(child)) { if (ofw_bus_node_is_compatible(child, onecompat) != 0) return (child); ret = ofw_bus_find_compatible(child, onecompat); if (ret != 0) return (ret); } return (0); } /** * @brief Return child of bus whose phandle is node * * A direct child of @p will be returned if it its phandle in the * OFW tree is @p node. Otherwise, NULL is returned. * * @param bus The bus to examine * @param node The phandle_t to look for. */ device_t ofw_bus_find_child_device_by_phandle(device_t bus, phandle_t node) { device_t *children, retval, child; int nkid, i; /* * Nothing can match the flag value for no node. */ if (node == -1) return (NULL); /* * Search the children for a match. We microoptimize * a bit by not using ofw_bus_get since we already know * the parent. We do not recurse. */ if (device_get_children(bus, &children, &nkid) != 0) return (NULL); retval = NULL; for (i = 0; i < nkid; i++) { child = children[i]; if (OFW_BUS_GET_NODE(bus, child) == node) { retval = child; break; } } free(children, M_TEMP); return (retval); } /* * Parse property that contain list of xrefs and values * (like standard "clocks" and "resets" properties) * Input arguments: * node - consumers device node * list_name - name of parsed list - "clocks" * cells_name - name of size property - "#clock-cells" * idx - the index of the requested list entry, or, if -1, an indication * to return the number of entries in the parsed list. * Output arguments: * producer - handle of producer * ncells - number of cells in result or the number of items in the list when * idx == -1. * cells - array of decoded cells */ static int ofw_bus_parse_xref_list_internal(phandle_t node, const char *list_name, const char *cells_name, int idx, phandle_t *producer, int *ncells, pcell_t **cells) { phandle_t pnode; phandle_t *elems; uint32_t pcells; int rv, i, j, nelems, cnt; elems = NULL; - nelems = OF_getencprop_alloc(node, list_name, sizeof(*elems), + nelems = OF_getencprop_alloc_multi(node, list_name, sizeof(*elems), (void **)&elems); if (nelems <= 0) return (ENOENT); rv = (idx == -1) ? 0 : ENOENT; for (i = 0, cnt = 0; i < nelems; i += pcells, cnt++) { pnode = elems[i++]; if (OF_getencprop(OF_node_from_xref(pnode), cells_name, &pcells, sizeof(pcells)) == -1) { printf("Missing %s property\n", cells_name); rv = ENOENT; break; } if ((i + pcells) > nelems) { printf("Invalid %s property value <%d>\n", cells_name, pcells); rv = ERANGE; break; } if (cnt == idx) { *cells= malloc(pcells * sizeof(**cells), M_OFWPROP, M_WAITOK); *producer = pnode; *ncells = pcells; for (j = 0; j < pcells; j++) (*cells)[j] = elems[i + j]; rv = 0; break; } } if (elems != NULL) free(elems, M_OFWPROP); if (idx == -1 && rv == 0) *ncells = cnt; return (rv); } /* * Parse property that contain list of xrefs and values * (like standard "clocks" and "resets" properties) * Input arguments: * node - consumers device node * list_name - name of parsed list - "clocks" * cells_name - name of size property - "#clock-cells" * idx - the index of the requested list entry (>= 0) * Output arguments: * producer - handle of producer * ncells - number of cells in result * cells - array of decoded cells */ int ofw_bus_parse_xref_list_alloc(phandle_t node, const char *list_name, const char *cells_name, int idx, phandle_t *producer, int *ncells, pcell_t **cells) { KASSERT(idx >= 0, ("ofw_bus_parse_xref_list_alloc: negative index supplied")); return (ofw_bus_parse_xref_list_internal(node, list_name, cells_name, idx, producer, ncells, cells)); } /* * Parse property that contain list of xrefs and values * (like standard "clocks" and "resets" properties) * and determine the number of items in the list * Input arguments: * node - consumers device node * list_name - name of parsed list - "clocks" * cells_name - name of size property - "#clock-cells" * Output arguments: * count - number of items in list */ int ofw_bus_parse_xref_list_get_length(phandle_t node, const char *list_name, const char *cells_name, int *count) { return (ofw_bus_parse_xref_list_internal(node, list_name, cells_name, -1, NULL, count, NULL)); } /* * Find index of string in string list property (case sensitive). */ int ofw_bus_find_string_index(phandle_t node, const char *list_name, const char *name, int *idx) { char *elems; int rv, i, cnt, nelems; elems = NULL; nelems = OF_getprop_alloc(node, list_name, (void **)&elems); if (nelems <= 0) return (ENOENT); rv = ENOENT; for (i = 0, cnt = 0; i < nelems; cnt++) { if (strcmp(elems + i, name) == 0) { *idx = cnt; rv = 0; break; } i += strlen(elems + i) + 1; } if (elems != NULL) free(elems, M_OFWPROP); return (rv); } /* * Create zero terminated array of strings from string list property. */ int ofw_bus_string_list_to_array(phandle_t node, const char *list_name, const char ***out_array) { char *elems, *tptr; const char **array; int i, cnt, nelems, len; elems = NULL; nelems = OF_getprop_alloc(node, list_name, (void **)&elems); if (nelems <= 0) return (nelems); /* Count number of strings. */ for (i = 0, cnt = 0; i < nelems; cnt++) i += strlen(elems + i) + 1; /* Allocate space for arrays and all strings. */ array = malloc((cnt + 1) * sizeof(char *) + nelems, M_OFWPROP, M_WAITOK); /* Get address of first string. */ tptr = (char *)(array + cnt + 1); /* Copy strings. */ memcpy(tptr, elems, nelems); free(elems, M_OFWPROP); /* Fill string pointers. */ for (i = 0, cnt = 0; i < nelems; cnt++) { len = strlen(tptr) + 1; array[cnt] = tptr; i += len; tptr += len; } array[cnt] = NULL; *out_array = array; return (cnt); } Index: head/sys/dev/ofw/openfirm.c =================================================================== --- head/sys/dev/ofw/openfirm.c (revision 332340) +++ head/sys/dev/ofw/openfirm.c (revision 332341) @@ -1,840 +1,848 @@ /* $NetBSD: Locore.c,v 1.7 2000/08/20 07:04:59 tsubai Exp $ */ /*- * SPDX-License-Identifier: BSD-4-Clause * * Copyright (C) 1995, 1996 Wolfgang Solfrank. * Copyright (C) 1995, 1996 TooLs GmbH. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by TooLs GmbH. * 4. The name of TooLs GmbH may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /*- * Copyright (C) 2000 Benno Rice. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_platform.h" #include #include #include #include #include #include #include #include #include #include #include #include "ofw_if.h" static void OF_putchar(int c, void *arg); MALLOC_DEFINE(M_OFWPROP, "openfirm", "Open Firmware properties"); static ihandle_t stdout; static ofw_def_t *ofw_def_impl = NULL; static ofw_t ofw_obj; static struct ofw_kobj ofw_kernel_obj; static struct kobj_ops ofw_kernel_kops; struct xrefinfo { phandle_t xref; phandle_t node; device_t dev; SLIST_ENTRY(xrefinfo) next_entry; }; static SLIST_HEAD(, xrefinfo) xreflist = SLIST_HEAD_INITIALIZER(xreflist); static struct mtx xreflist_lock; static boolean_t xref_init_done; #define FIND_BY_XREF 0 #define FIND_BY_NODE 1 #define FIND_BY_DEV 2 /* * xref-phandle-device lookup helper routines. * * As soon as we are able to use malloc(), walk the node tree and build a list * of info that cross-references node handles, xref handles, and device_t * instances. This list exists primarily to allow association of a device_t * with an xref handle, but it is also used to speed up translation between xref * and node handles. Before malloc() is available we have to recursively search * the node tree each time we want to translate between a node and xref handle. * Afterwards we can do the translations by searching this much shorter list. */ static void xrefinfo_create(phandle_t node) { struct xrefinfo * xi; phandle_t child, xref; /* * Recursively descend from parent, looking for nodes with a property * named either "phandle", "ibm,phandle", or "linux,phandle". For each * such node found create an entry in the xreflist. */ for (child = OF_child(node); child != 0; child = OF_peer(child)) { xrefinfo_create(child); if (OF_getencprop(child, "phandle", &xref, sizeof(xref)) == -1 && OF_getencprop(child, "ibm,phandle", &xref, sizeof(xref)) == -1 && OF_getencprop(child, "linux,phandle", &xref, sizeof(xref)) == -1) continue; xi = malloc(sizeof(*xi), M_OFWPROP, M_WAITOK | M_ZERO); xi->node = child; xi->xref = xref; SLIST_INSERT_HEAD(&xreflist, xi, next_entry); } } static void xrefinfo_init(void *unsed) { /* * There is no locking during this init because it runs much earlier * than any of the clients/consumers of the xref list data, but we do * initialize the mutex that will be used for access later. */ mtx_init(&xreflist_lock, "OF xreflist lock", NULL, MTX_DEF); xrefinfo_create(OF_peer(0)); xref_init_done = true; } SYSINIT(xrefinfo, SI_SUB_KMEM, SI_ORDER_ANY, xrefinfo_init, NULL); static struct xrefinfo * xrefinfo_find(uintptr_t key, int find_by) { struct xrefinfo *rv, *xi; rv = NULL; mtx_lock(&xreflist_lock); SLIST_FOREACH(xi, &xreflist, next_entry) { if ((find_by == FIND_BY_XREF && (phandle_t)key == xi->xref) || (find_by == FIND_BY_NODE && (phandle_t)key == xi->node) || (find_by == FIND_BY_DEV && key == (uintptr_t)xi->dev)) { rv = xi; break; } } mtx_unlock(&xreflist_lock); return (rv); } static struct xrefinfo * xrefinfo_add(phandle_t node, phandle_t xref, device_t dev) { struct xrefinfo *xi; xi = malloc(sizeof(*xi), M_OFWPROP, M_WAITOK); xi->node = node; xi->xref = xref; xi->dev = dev; mtx_lock(&xreflist_lock); SLIST_INSERT_HEAD(&xreflist, xi, next_entry); mtx_unlock(&xreflist_lock); return (xi); } /* * OFW install routines. Highest priority wins, equal priority also * overrides allowing last-set to win. */ SET_DECLARE(ofw_set, ofw_def_t); boolean_t OF_install(char *name, int prio) { ofw_def_t *ofwp, **ofwpp; static int curr_prio = 0; /* Allow OF layer to be uninstalled */ if (name == NULL) { ofw_def_impl = NULL; return (FALSE); } /* * Try and locate the OFW kobj corresponding to the name. */ SET_FOREACH(ofwpp, ofw_set) { ofwp = *ofwpp; if (ofwp->name && !strcmp(ofwp->name, name) && prio >= curr_prio) { curr_prio = prio; ofw_def_impl = ofwp; return (TRUE); } } return (FALSE); } /* Initializer */ int OF_init(void *cookie) { phandle_t chosen; int rv; if (ofw_def_impl == NULL) return (-1); ofw_obj = &ofw_kernel_obj; /* * Take care of compiling the selected class, and * then statically initialize the OFW object. */ kobj_class_compile_static(ofw_def_impl, &ofw_kernel_kops); kobj_init_static((kobj_t)ofw_obj, ofw_def_impl); rv = OFW_INIT(ofw_obj, cookie); if ((chosen = OF_finddevice("/chosen")) != -1) if (OF_getencprop(chosen, "stdout", &stdout, sizeof(stdout)) == -1) stdout = -1; return (rv); } static void OF_putchar(int c, void *arg __unused) { char cbuf; if (c == '\n') { cbuf = '\r'; OF_write(stdout, &cbuf, 1); } cbuf = c; OF_write(stdout, &cbuf, 1); } void OF_printf(const char *fmt, ...) { va_list va; va_start(va, fmt); (void)kvprintf(fmt, OF_putchar, NULL, 10, va); va_end(va); } /* * Generic functions */ /* Test to see if a service exists. */ int OF_test(const char *name) { if (ofw_def_impl == NULL) return (-1); return (OFW_TEST(ofw_obj, name)); } int OF_interpret(const char *cmd, int nreturns, ...) { va_list ap; cell_t slots[16]; int i = 0; int status; if (ofw_def_impl == NULL) return (-1); status = OFW_INTERPRET(ofw_obj, cmd, nreturns, slots); if (status == -1) return (status); va_start(ap, nreturns); while (i < nreturns) *va_arg(ap, cell_t *) = slots[i++]; va_end(ap); return (status); } /* * Device tree functions */ /* Return the next sibling of this node or 0. */ phandle_t OF_peer(phandle_t node) { if (ofw_def_impl == NULL) return (0); return (OFW_PEER(ofw_obj, node)); } /* Return the first child of this node or 0. */ phandle_t OF_child(phandle_t node) { if (ofw_def_impl == NULL) return (0); return (OFW_CHILD(ofw_obj, node)); } /* Return the parent of this node or 0. */ phandle_t OF_parent(phandle_t node) { if (ofw_def_impl == NULL) return (0); return (OFW_PARENT(ofw_obj, node)); } /* Return the package handle that corresponds to an instance handle. */ phandle_t OF_instance_to_package(ihandle_t instance) { if (ofw_def_impl == NULL) return (-1); return (OFW_INSTANCE_TO_PACKAGE(ofw_obj, instance)); } /* Get the length of a property of a package. */ ssize_t OF_getproplen(phandle_t package, const char *propname) { if (ofw_def_impl == NULL) return (-1); return (OFW_GETPROPLEN(ofw_obj, package, propname)); } /* Check existence of a property of a package. */ int OF_hasprop(phandle_t package, const char *propname) { return (OF_getproplen(package, propname) >= 0 ? 1 : 0); } /* Get the value of a property of a package. */ ssize_t OF_getprop(phandle_t package, const char *propname, void *buf, size_t buflen) { if (ofw_def_impl == NULL) return (-1); return (OFW_GETPROP(ofw_obj, package, propname, buf, buflen)); } ssize_t OF_getencprop(phandle_t node, const char *propname, pcell_t *buf, size_t len) { ssize_t retval; int i; KASSERT(len % 4 == 0, ("Need a multiple of 4 bytes")); retval = OF_getprop(node, propname, buf, len); if (retval <= 0) return (retval); for (i = 0; i < len/4; i++) buf[i] = be32toh(buf[i]); return (retval); } /* * Recursively search the node and its parent for the given property, working * downward from the node to the device tree root. Returns the value of the * first match. */ ssize_t OF_searchprop(phandle_t node, const char *propname, void *buf, size_t len) { ssize_t rv; for (; node != 0; node = OF_parent(node)) if ((rv = OF_getprop(node, propname, buf, len)) != -1) return (rv); return (-1); } ssize_t OF_searchencprop(phandle_t node, const char *propname, pcell_t *buf, size_t len) { ssize_t rv; for (; node != 0; node = OF_parent(node)) if ((rv = OF_getencprop(node, propname, buf, len)) != -1) return (rv); return (-1); } /* * Store the value of a property of a package into newly allocated memory * (using the M_OFWPROP malloc pool and M_WAITOK). */ ssize_t OF_getprop_alloc(phandle_t package, const char *propname, void **buf) { int len; *buf = NULL; if ((len = OF_getproplen(package, propname)) == -1) return (-1); if (len > 0) { *buf = malloc(len, M_OFWPROP, M_WAITOK); if (OF_getprop(package, propname, *buf, len) == -1) { free(*buf, M_OFWPROP); *buf = NULL; return (-1); } } return (len); } /* * Store the value of a property of a package into newly allocated memory * (using the M_OFWPROP malloc pool and M_WAITOK). elsz is the size of a * single element, the number of elements is return in number. */ ssize_t OF_getprop_alloc_multi(phandle_t package, const char *propname, int elsz, void **buf) { int len; *buf = NULL; if ((len = OF_getproplen(package, propname)) == -1 || len % elsz != 0) return (-1); if (len > 0) { *buf = malloc(len, M_OFWPROP, M_WAITOK); if (OF_getprop(package, propname, *buf, len) == -1) { free(*buf, M_OFWPROP); *buf = NULL; return (-1); } } return (len / elsz); } +ssize_t +OF_getencprop_alloc(phandle_t package, const char *name, void **buf) +{ + ssize_t ret; + ret = OF_getencprop_alloc_multi(package, name, sizeof(pcell_t), + buf); + if (ret < 0) + return (ret); + else + return (ret * sizeof(pcell_t)); +} + ssize_t -OF_getencprop_alloc(phandle_t package, const char *name, int elsz, void **buf) +OF_getencprop_alloc_multi(phandle_t package, const char *name, int elsz, + void **buf) { ssize_t retval; pcell_t *cell; int i; retval = OF_getprop_alloc_multi(package, name, elsz, buf); if (retval == -1) return (-1); - if (retval * elsz % 4 != 0) { - free(*buf, M_OFWPROP); - *buf = NULL; - return (-1); - } cell = *buf; for (i = 0; i < retval * elsz / 4; i++) cell[i] = be32toh(cell[i]); return (retval); } /* Free buffer allocated by OF_getencprop_alloc or OF_getprop_alloc */ void OF_prop_free(void *buf) { free(buf, M_OFWPROP); } /* Get the next property of a package. */ int OF_nextprop(phandle_t package, const char *previous, char *buf, size_t size) { if (ofw_def_impl == NULL) return (-1); return (OFW_NEXTPROP(ofw_obj, package, previous, buf, size)); } /* Set the value of a property of a package. */ int OF_setprop(phandle_t package, const char *propname, const void *buf, size_t len) { if (ofw_def_impl == NULL) return (-1); return (OFW_SETPROP(ofw_obj, package, propname, buf,len)); } /* Convert a device specifier to a fully qualified pathname. */ ssize_t OF_canon(const char *device, char *buf, size_t len) { if (ofw_def_impl == NULL) return (-1); return (OFW_CANON(ofw_obj, device, buf, len)); } /* Return a package handle for the specified device. */ phandle_t OF_finddevice(const char *device) { if (ofw_def_impl == NULL) return (-1); return (OFW_FINDDEVICE(ofw_obj, device)); } /* Return the fully qualified pathname corresponding to an instance. */ ssize_t OF_instance_to_path(ihandle_t instance, char *buf, size_t len) { if (ofw_def_impl == NULL) return (-1); return (OFW_INSTANCE_TO_PATH(ofw_obj, instance, buf, len)); } /* Return the fully qualified pathname corresponding to a package. */ ssize_t OF_package_to_path(phandle_t package, char *buf, size_t len) { if (ofw_def_impl == NULL) return (-1); return (OFW_PACKAGE_TO_PATH(ofw_obj, package, buf, len)); } /* Look up effective phandle (see FDT/PAPR spec) */ static phandle_t OF_child_xref_phandle(phandle_t parent, phandle_t xref) { phandle_t child, rxref; /* * Recursively descend from parent, looking for a node with a property * named either "phandle", "ibm,phandle", or "linux,phandle" that * matches the xref we are looking for. */ for (child = OF_child(parent); child != 0; child = OF_peer(child)) { rxref = OF_child_xref_phandle(child, xref); if (rxref != -1) return (rxref); if (OF_getencprop(child, "phandle", &rxref, sizeof(rxref)) == -1 && OF_getencprop(child, "ibm,phandle", &rxref, sizeof(rxref)) == -1 && OF_getencprop(child, "linux,phandle", &rxref, sizeof(rxref)) == -1) continue; if (rxref == xref) return (child); } return (-1); } phandle_t OF_node_from_xref(phandle_t xref) { struct xrefinfo *xi; phandle_t node; if (xref_init_done) { if ((xi = xrefinfo_find(xref, FIND_BY_XREF)) == NULL) return (xref); return (xi->node); } if ((node = OF_child_xref_phandle(OF_peer(0), xref)) == -1) return (xref); return (node); } phandle_t OF_xref_from_node(phandle_t node) { struct xrefinfo *xi; phandle_t xref; if (xref_init_done) { if ((xi = xrefinfo_find(node, FIND_BY_NODE)) == NULL) return (node); return (xi->xref); } if (OF_getencprop(node, "phandle", &xref, sizeof(xref)) == -1 && OF_getencprop(node, "ibm,phandle", &xref, sizeof(xref)) == -1 && OF_getencprop(node, "linux,phandle", &xref, sizeof(xref)) == -1) return (node); return (xref); } device_t OF_device_from_xref(phandle_t xref) { struct xrefinfo *xi; if (xref_init_done) { if ((xi = xrefinfo_find(xref, FIND_BY_XREF)) == NULL) return (NULL); return (xi->dev); } panic("Attempt to find device before xreflist_init"); } phandle_t OF_xref_from_device(device_t dev) { struct xrefinfo *xi; if (xref_init_done) { if ((xi = xrefinfo_find((uintptr_t)dev, FIND_BY_DEV)) == NULL) return (0); return (xi->xref); } panic("Attempt to find xref before xreflist_init"); } int OF_device_register_xref(phandle_t xref, device_t dev) { struct xrefinfo *xi; /* * If the given xref handle doesn't already exist in the list then we * add a list entry. In theory this can only happen on a system where * nodes don't contain phandle properties and xref and node handles are * synonymous, so the xref handle is added as the node handle as well. */ if (xref_init_done) { if ((xi = xrefinfo_find(xref, FIND_BY_XREF)) == NULL) xrefinfo_add(xref, xref, dev); else xi->dev = dev; return (0); } panic("Attempt to register device before xreflist_init"); } /* Call the method in the scope of a given instance. */ int OF_call_method(const char *method, ihandle_t instance, int nargs, int nreturns, ...) { va_list ap; cell_t args_n_results[12]; int n, status; if (nargs > 6 || ofw_def_impl == NULL) return (-1); va_start(ap, nreturns); for (n = 0; n < nargs; n++) args_n_results[n] = va_arg(ap, cell_t); status = OFW_CALL_METHOD(ofw_obj, instance, method, nargs, nreturns, args_n_results); if (status != 0) return (status); for (; n < nargs + nreturns; n++) *va_arg(ap, cell_t *) = args_n_results[n]; va_end(ap); return (0); } /* * Device I/O functions */ /* Open an instance for a device. */ ihandle_t OF_open(const char *device) { if (ofw_def_impl == NULL) return (0); return (OFW_OPEN(ofw_obj, device)); } /* Close an instance. */ void OF_close(ihandle_t instance) { if (ofw_def_impl == NULL) return; OFW_CLOSE(ofw_obj, instance); } /* Read from an instance. */ ssize_t OF_read(ihandle_t instance, void *addr, size_t len) { if (ofw_def_impl == NULL) return (-1); return (OFW_READ(ofw_obj, instance, addr, len)); } /* Write to an instance. */ ssize_t OF_write(ihandle_t instance, const void *addr, size_t len) { if (ofw_def_impl == NULL) return (-1); return (OFW_WRITE(ofw_obj, instance, addr, len)); } /* Seek to a position. */ int OF_seek(ihandle_t instance, uint64_t pos) { if (ofw_def_impl == NULL) return (-1); return (OFW_SEEK(ofw_obj, instance, pos)); } /* * Memory functions */ /* Claim an area of memory. */ void * OF_claim(void *virt, size_t size, u_int align) { if (ofw_def_impl == NULL) return ((void *)-1); return (OFW_CLAIM(ofw_obj, virt, size, align)); } /* Release an area of memory. */ void OF_release(void *virt, size_t size) { if (ofw_def_impl == NULL) return; OFW_RELEASE(ofw_obj, virt, size); } /* * Control transfer functions */ /* Suspend and drop back to the Open Firmware interface. */ void OF_enter() { if (ofw_def_impl == NULL) return; OFW_ENTER(ofw_obj); } /* Shut down and drop back to the Open Firmware interface. */ void OF_exit() { if (ofw_def_impl == NULL) panic("OF_exit: Open Firmware not available"); /* Should not return */ OFW_EXIT(ofw_obj); for (;;) /* just in case */ ; } Index: head/sys/dev/ofw/openfirm.h =================================================================== --- head/sys/dev/ofw/openfirm.h (revision 332340) +++ head/sys/dev/ofw/openfirm.h (revision 332341) @@ -1,188 +1,190 @@ /* $NetBSD: openfirm.h,v 1.1 1998/05/15 10:16:00 tsubai Exp $ */ /*- * SPDX-License-Identifier: BSD-4-Clause * * Copyright (C) 1995, 1996 Wolfgang Solfrank. * Copyright (C) 1995, 1996 TooLs GmbH. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by TooLs GmbH. * 4. The name of TooLs GmbH may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (C) 2000 Benno Rice. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD$ */ #ifndef _DEV_OPENFIRM_H_ #define _DEV_OPENFIRM_H_ #include #include /* * Prototypes for Open Firmware Interface Routines */ typedef uint32_t ihandle_t; typedef uint32_t phandle_t; typedef uint32_t pcell_t; #ifdef _KERNEL #include #include MALLOC_DECLARE(M_OFWPROP); /* * Open Firmware interface initialization. OF_install installs the named * interface as the Open Firmware access mechanism, OF_init initializes it. */ boolean_t OF_install(char *name, int prio); int OF_init(void *cookie); /* * Known Open Firmware interface names */ #define OFW_STD_DIRECT "ofw_std" /* Standard OF interface */ #define OFW_STD_REAL "ofw_real" /* Real-mode OF interface */ #define OFW_STD_32BIT "ofw_32bit" /* 32-bit OF interface */ #define OFW_FDT "ofw_fdt" /* Flattened Device Tree */ /* Generic functions */ int OF_test(const char *name); void OF_printf(const char *fmt, ...); /* Device tree functions */ phandle_t OF_peer(phandle_t node); phandle_t OF_child(phandle_t node); phandle_t OF_parent(phandle_t node); ssize_t OF_getproplen(phandle_t node, const char *propname); ssize_t OF_getprop(phandle_t node, const char *propname, void *buf, size_t len); ssize_t OF_getencprop(phandle_t node, const char *prop, pcell_t *buf, size_t len); /* Same as getprop, but maintains endianness */ int OF_hasprop(phandle_t node, const char *propname); ssize_t OF_searchprop(phandle_t node, const char *propname, void *buf, size_t len); ssize_t OF_searchencprop(phandle_t node, const char *propname, pcell_t *buf, size_t len); ssize_t OF_getprop_alloc(phandle_t node, const char *propname, void **buf); ssize_t OF_getprop_alloc_multi(phandle_t node, const char *propname, int elsz, void **buf); ssize_t OF_getencprop_alloc(phandle_t node, const char *propname, + void **buf); +ssize_t OF_getencprop_alloc_multi(phandle_t node, const char *propname, int elsz, void **buf); void OF_prop_free(void *buf); int OF_nextprop(phandle_t node, const char *propname, char *buf, size_t len); int OF_setprop(phandle_t node, const char *name, const void *buf, size_t len); ssize_t OF_canon(const char *path, char *buf, size_t len); phandle_t OF_finddevice(const char *path); ssize_t OF_package_to_path(phandle_t node, char *buf, size_t len); /* * Some OF implementations (IBM, FDT) have a concept of effective phandles * used for device-tree cross-references. Given one of these, returns the * real phandle. If one can't be found (or running on OF implementations * without this property), returns its input. */ phandle_t OF_node_from_xref(phandle_t xref); phandle_t OF_xref_from_node(phandle_t node); /* * When properties contain references to other nodes using xref handles it is * often necessary to use interfaces provided by the driver for the referenced * instance. These routines allow a driver that provides such an interface to * register its association with an xref handle, and for other drivers to obtain * the device_t associated with an xref handle. */ device_t OF_device_from_xref(phandle_t xref); phandle_t OF_xref_from_device(device_t dev); int OF_device_register_xref(phandle_t xref, device_t dev); /* Device I/O functions */ ihandle_t OF_open(const char *path); void OF_close(ihandle_t instance); ssize_t OF_read(ihandle_t instance, void *buf, size_t len); ssize_t OF_write(ihandle_t instance, const void *buf, size_t len); int OF_seek(ihandle_t instance, uint64_t where); phandle_t OF_instance_to_package(ihandle_t instance); ssize_t OF_instance_to_path(ihandle_t instance, char *buf, size_t len); int OF_call_method(const char *method, ihandle_t instance, int nargs, int nreturns, ...); /* Memory functions */ void *OF_claim(void *virtrequest, size_t size, u_int align); void OF_release(void *virt, size_t size); /* Control transfer functions */ void OF_enter(void); void OF_exit(void) __attribute__((noreturn)); /* User interface functions */ int OF_interpret(const char *cmd, int nreturns, ...); /* * Decode the Nth register property of the given device node and create a bus * space tag and handle for accessing it. This is for use in setting up things * like early console output before newbus is available. The implementation is * machine-dependent, and sparc uses a different function signature as well. */ #ifndef __sparc64__ int OF_decode_addr(phandle_t dev, int regno, bus_space_tag_t *ptag, bus_space_handle_t *phandle, bus_size_t *sz); #endif #endif /* _KERNEL */ #endif /* _DEV_OPENFIRM_H_ */ Index: head/sys/dev/vnic/thunder_bgx_fdt.c =================================================================== --- head/sys/dev/vnic/thunder_bgx_fdt.c (revision 332340) +++ head/sys/dev/vnic/thunder_bgx_fdt.c (revision 332341) @@ -1,460 +1,460 @@ /*- * Copyright (c) 2015 The FreeBSD Foundation * All rights reserved. * * This software was developed by Semihalf under * the sponsorship of the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "thunder_bgx.h" #include "thunder_bgx_var.h" #define CONN_TYPE_MAXLEN 16 #define CONN_TYPE_OFFSET 2 #define BGX_NODE_NAME "bgx" #define BGX_MAXID 9 /* BGX func. 0, i.e.: reg = <0x8000 0 0 0 0>; DEVFN = 0x80 */ #define BGX_DEVFN_0 0x80 #define FDT_NAME_MAXLEN 31 int bgx_fdt_init_phy(struct bgx *); static void bgx_fdt_get_macaddr(phandle_t phy, uint8_t *hwaddr) { uint8_t addr[ETHER_ADDR_LEN]; if (OF_getprop(phy, "local-mac-address", addr, ETHER_ADDR_LEN) == -1) { /* Missing MAC address should be marked by clearing it */ memset(hwaddr, 0, ETHER_ADDR_LEN); } else memcpy(hwaddr, addr, ETHER_ADDR_LEN); } static boolean_t bgx_fdt_phy_mode_match(struct bgx *bgx, char *qlm_mode, ssize_t size) { const char *type; ssize_t sz; ssize_t offset; switch (bgx->qlm_mode) { case QLM_MODE_SGMII: type = "sgmii"; sz = sizeof("sgmii") - 1; offset = size - sz; break; case QLM_MODE_XAUI_1X4: type = "xaui"; sz = sizeof("xaui") - 1; offset = size - sz; if (offset < 0) return (FALSE); if (strncmp(&qlm_mode[offset], type, sz) == 0) return (TRUE); type = "dxaui"; sz = sizeof("dxaui") - 1; offset = size - sz; break; case QLM_MODE_RXAUI_2X2: type = "raui"; sz = sizeof("raui") - 1; offset = size - sz; break; case QLM_MODE_XFI_4X1: type = "xfi"; sz = sizeof("xfi") - 1; offset = size - sz; break; case QLM_MODE_XLAUI_1X4: type = "xlaui"; sz = sizeof("xlaui") - 1; offset = size - sz; break; case QLM_MODE_10G_KR_4X1: type = "xfi-10g-kr"; sz = sizeof("xfi-10g-kr") - 1; offset = size - sz; break; case QLM_MODE_40G_KR4_1X4: type = "xlaui-40g-kr"; sz = sizeof("xlaui-40g-kr") - 1; offset = size - sz; break; default: return (FALSE); } if (offset < 0) return (FALSE); if (strncmp(&qlm_mode[offset], type, sz) == 0) return (TRUE); return (FALSE); } static boolean_t bgx_fdt_phy_name_match(struct bgx *bgx, char *phy_name, ssize_t size) { const char *type; ssize_t sz; switch (bgx->qlm_mode) { case QLM_MODE_SGMII: type = "sgmii"; sz = sizeof("sgmii") - 1; break; case QLM_MODE_XAUI_1X4: type = "xaui"; sz = sizeof("xaui") - 1; if (sz < size) return (FALSE); if (strncmp(phy_name, type, sz) == 0) return (TRUE); type = "dxaui"; sz = sizeof("dxaui") - 1; break; case QLM_MODE_RXAUI_2X2: type = "raui"; sz = sizeof("raui") - 1; break; case QLM_MODE_XFI_4X1: type = "xfi"; sz = sizeof("xfi") - 1; break; case QLM_MODE_XLAUI_1X4: type = "xlaui"; sz = sizeof("xlaui") - 1; break; case QLM_MODE_10G_KR_4X1: type = "xfi-10g-kr"; sz = sizeof("xfi-10g-kr") - 1; break; case QLM_MODE_40G_KR4_1X4: type = "xlaui-40g-kr"; sz = sizeof("xlaui-40g-kr") - 1; break; default: return (FALSE); } if (sz > size) return (FALSE); if (strncmp(phy_name, type, sz) == 0) return (TRUE); return (FALSE); } static phandle_t bgx_fdt_traverse_nodes(uint8_t unit, phandle_t start, char *name, size_t len) { phandle_t node, ret; uint32_t *reg; size_t buf_size; ssize_t proplen; char *node_name; int err; /* * Traverse all subordinate nodes of 'start' to find BGX instance. * This supports both old (by name) and new (by reg) methods. */ buf_size = sizeof(*node_name) * FDT_NAME_MAXLEN; if (len > buf_size) { /* * This is an erroneous situation since the string * to compare cannot be longer than FDT_NAME_MAXLEN. */ return (0); } node_name = malloc(buf_size, M_BGX, M_WAITOK); for (node = OF_child(start); node != 0; node = OF_peer(node)) { /* Clean-up the buffer */ memset(node_name, 0, buf_size); /* Recurse to children */ if (OF_child(node) != 0) { ret = bgx_fdt_traverse_nodes(unit, node, name, len); if (ret != 0) { free(node_name, M_BGX); return (ret); } } /* * Old way - by name */ proplen = OF_getproplen(node, "name"); if ((proplen <= 0) || (proplen < len)) continue; err = OF_getprop(node, "name", node_name, proplen); if (err <= 0) continue; if (strncmp(node_name, name, len) == 0) { free(node_name, M_BGX); return (node); } /* * New way - by reg */ /* Check if even BGX */ if (strncmp(node_name, BGX_NODE_NAME, sizeof(BGX_NODE_NAME) - 1) != 0) continue; /* Get reg */ - err = OF_getencprop_alloc(node, "reg", sizeof(*reg), + err = OF_getencprop_alloc_multi(node, "reg", sizeof(*reg), (void **)®); if (err == -1) { free(reg, M_OFWPROP); continue; } /* Match BGX device function */ if ((BGX_DEVFN_0 + unit) == (reg[0] >> 8)) { free(reg, M_OFWPROP); free(node_name, M_BGX); return (node); } free(reg, M_OFWPROP); } free(node_name, M_BGX); return (0); } /* * Similar functionality to pci_find_pcie_root_port() * but this one works for ThunderX. */ static device_t bgx_find_root_pcib(device_t dev) { devclass_t pci_class; device_t pcib, bus; pci_class = devclass_find("pci"); KASSERT(device_get_devclass(device_get_parent(dev)) == pci_class, ("%s: non-pci device %s", __func__, device_get_nameunit(dev))); /* Walk the bridge hierarchy until we find a non-PCI device */ for (;;) { bus = device_get_parent(dev); KASSERT(bus != NULL, ("%s: null parent of %s", __func__, device_get_nameunit(dev))); if (device_get_devclass(bus) != pci_class) return (NULL); pcib = device_get_parent(bus); KASSERT(pcib != NULL, ("%s: null bridge of %s", __func__, device_get_nameunit(bus))); /* * If the parent of this PCIB is not PCI * then we found our root PCIB. */ if (device_get_devclass(device_get_parent(pcib)) != pci_class) return (pcib); dev = pcib; } } static __inline phandle_t bgx_fdt_find_node(struct bgx *bgx) { device_t root_pcib; phandle_t node; char *bgx_sel; size_t len; KASSERT(bgx->bgx_id <= BGX_MAXID, ("Invalid BGX ID: %d, max: %d", bgx->bgx_id, BGX_MAXID)); len = sizeof(BGX_NODE_NAME) + 1; /* ++<\0> */ /* Allocate memory for BGX node name + "/" character */ bgx_sel = malloc(sizeof(*bgx_sel) * (len + 1), M_BGX, M_ZERO | M_WAITOK); /* Prepare node's name */ snprintf(bgx_sel, len + 1, "/"BGX_NODE_NAME"%d", bgx->bgx_id); /* First try the root node */ node = OF_finddevice(bgx_sel); if (node != -1) { /* Found relevant node */ goto out; } /* * Clean-up and try to find BGX in DT * starting from the parent PCI bridge node. */ memset(bgx_sel, 0, sizeof(*bgx_sel) * (len + 1)); snprintf(bgx_sel, len, BGX_NODE_NAME"%d", bgx->bgx_id); /* Find PCI bridge that we are connected to */ root_pcib = bgx_find_root_pcib(bgx->dev); if (root_pcib == NULL) { device_printf(bgx->dev, "Unable to find BGX root bridge\n"); node = 0; goto out; } node = ofw_bus_get_node(root_pcib); if ((int)node <= 0) { device_printf(bgx->dev, "No parent FDT node for BGX\n"); goto out; } node = bgx_fdt_traverse_nodes(bgx->bgx_id, node, bgx_sel, len); out: free(bgx_sel, M_BGX); return (node); } int bgx_fdt_init_phy(struct bgx *bgx) { char *node_name; phandle_t node, child; phandle_t phy, mdio; ssize_t len; uint8_t lmac; char qlm_mode[CONN_TYPE_MAXLEN]; node = bgx_fdt_find_node(bgx); if (node == 0) { device_printf(bgx->dev, "Could not find bgx%d node in FDT\n", bgx->bgx_id); return (ENXIO); } lmac = 0; for (child = OF_child(node); child > 0; child = OF_peer(child)) { len = OF_getprop(child, "qlm-mode", qlm_mode, sizeof(qlm_mode)); if (len > 0) { if (!bgx_fdt_phy_mode_match(bgx, qlm_mode, len)) { /* * Connection type not match with BGX mode. */ continue; } } else { len = OF_getprop_alloc(child, "name", (void **)&node_name); if (len <= 0) { continue; } if (!bgx_fdt_phy_name_match(bgx, node_name, len)) { free(node_name, M_OFWPROP); continue; } free(node_name, M_OFWPROP); } /* Acquire PHY address */ if (OF_getencprop(child, "reg", &bgx->lmac[lmac].phyaddr, sizeof(bgx->lmac[lmac].phyaddr)) <= 0) { if (bootverbose) { device_printf(bgx->dev, "Could not retrieve PHY address\n"); } bgx->lmac[lmac].phyaddr = MII_PHY_ANY; } if (OF_getencprop(child, "phy-handle", &phy, sizeof(phy)) <= 0) { if (bootverbose) { device_printf(bgx->dev, "No phy-handle in PHY node. Skipping...\n"); } continue; } phy = OF_instance_to_package(phy); /* * Get PHY interface (MDIO bus) device. * Driver must be already attached. */ mdio = OF_parent(phy); bgx->lmac[lmac].phy_if_dev = OF_device_from_xref(OF_xref_from_node(mdio)); if (bgx->lmac[lmac].phy_if_dev == NULL) { if (bootverbose) { device_printf(bgx->dev, "Could not find interface to PHY\n"); } continue; } /* Get mac address from FDT */ bgx_fdt_get_macaddr(child, bgx->lmac[lmac].mac); bgx->lmac[lmac].lmacid = lmac; lmac++; if (lmac == MAX_LMAC_PER_BGX) break; } if (lmac == 0) { device_printf(bgx->dev, "Could not find matching PHY\n"); return (ENXIO); } return (0); } Index: head/sys/mips/ingenic/jz4780_pinctrl.c =================================================================== --- head/sys/mips/ingenic/jz4780_pinctrl.c (revision 332340) +++ head/sys/mips/ingenic/jz4780_pinctrl.c (revision 332341) @@ -1,260 +1,260 @@ /*- * Copyright 2015 Alexander Kabaev * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ /* * Ingenic JZ4780 pinctrl driver. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "jz4780_gpio_if.h" struct jz4780_pinctrl_softc { struct simplebus_softc ssc; device_t dev; }; #define CHIP_REG_STRIDE 256 #define CHIP_REG_OFFSET(base, chip) ((base) + (chip) * CHIP_REG_STRIDE) static int jz4780_pinctrl_probe(device_t dev) { if (!ofw_bus_status_okay(dev)) return (ENXIO); if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-pinctrl")) return (ENXIO); device_set_desc(dev, "Ingenic JZ4780 GPIO"); return (BUS_PROBE_DEFAULT); } static int jz4780_pinctrl_attach(device_t dev) { struct jz4780_pinctrl_softc *sc; struct resource_list *rs; struct resource_list_entry *re; phandle_t dt_parent, dt_child; int i, ret; sc = device_get_softc(dev); sc->dev = dev; /* * Fetch our own resource list to dole memory between children */ rs = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev); if (rs == NULL) return (ENXIO); re = resource_list_find(rs, SYS_RES_MEMORY, 0); if (re == NULL) return (ENXIO); simplebus_init(dev, 0); /* Iterate over this node children, looking for pin controllers */ dt_parent = ofw_bus_get_node(dev); i = 0; for (dt_child = OF_child(dt_parent); dt_child != 0; dt_child = OF_peer(dt_child)) { struct simplebus_devinfo *ndi; device_t child; bus_addr_t phys; bus_size_t size; /* Add gpio controller child */ if (!OF_hasprop(dt_child, "gpio-controller")) continue; child = simplebus_add_device(dev, dt_child, 0, NULL, -1, NULL); if (child == NULL) break; /* Setup child resources */ phys = CHIP_REG_OFFSET(re->start, i); size = CHIP_REG_STRIDE; if (phys + size - 1 <= re->end) { ndi = device_get_ivars(child); resource_list_add(&ndi->rl, SYS_RES_MEMORY, 0, phys, phys + size - 1, size); } i++; } ret = bus_generic_attach(dev); if (ret == 0) { fdt_pinctrl_register(dev, "ingenic,pins"); fdt_pinctrl_configure_tree(dev); } return (ret); } static int jz4780_pinctrl_detach(device_t dev) { bus_generic_detach(dev); return (0); } struct jx4780_bias_prop { const char *name; uint32_t bias; }; static struct jx4780_bias_prop jx4780_bias_table[] = { { "bias-disable", 0 }, { "bias-pull-up", GPIO_PIN_PULLUP }, { "bias-pull-down", GPIO_PIN_PULLDOWN }, }; static int jz4780_pinctrl_parse_pincfg(phandle_t pincfgxref, uint32_t *bias_value) { phandle_t pincfg_node; int i; pincfg_node = OF_node_from_xref(pincfgxref); for (i = 0; i < nitems(jx4780_bias_table); i++) { if (OF_hasprop(pincfg_node, jx4780_bias_table[i].name)) { *bias_value = jx4780_bias_table[i].bias; return 0; } } return -1; } static device_t jz4780_pinctrl_chip_lookup(struct jz4780_pinctrl_softc *sc, phandle_t chipxref) { device_t chipdev; chipdev = OF_device_from_xref(chipxref); return chipdev; } static int jz4780_pinctrl_configure_pins(device_t dev, phandle_t cfgxref) { struct jz4780_pinctrl_softc *sc = device_get_softc(dev); device_t chip; phandle_t node; ssize_t i, len; uint32_t *value, *pconf; int result; node = OF_node_from_xref(cfgxref); - len = OF_getencprop_alloc(node, "ingenic,pins", sizeof(uint32_t) * 4, - (void **)&value); + len = OF_getencprop_alloc_multi(node, "ingenic,pins", + sizeof(uint32_t) * 4, (void **)&value); if (len < 0) { device_printf(dev, "missing ingenic,pins attribute in FDT\n"); return (ENXIO); } pconf = value; result = EINVAL; for (i = 0; i < len; i++, pconf += 4) { uint32_t bias; /* Lookup the chip that handles this configuration */ chip = jz4780_pinctrl_chip_lookup(sc, pconf[0]); if (chip == NULL) { device_printf(dev, "invalid gpio controller reference in FDT\n"); goto done; } if (jz4780_pinctrl_parse_pincfg(pconf[3], &bias) != 0) { device_printf(dev, "invalid pin bias for pin %u on %s in FDT\n", pconf[1], ofw_bus_get_name(chip)); goto done; } result = JZ4780_GPIO_CONFIGURE_PIN(chip, pconf[1], pconf[2], bias); if (result != 0) { device_printf(dev, "failed to configure pin %u on %s\n", pconf[1], ofw_bus_get_name(chip)); goto done; } } result = 0; done: free(value, M_OFWPROP); return (result); } static device_method_t jz4780_pinctrl_methods[] = { /* Device interface */ DEVMETHOD(device_probe, jz4780_pinctrl_probe), DEVMETHOD(device_attach, jz4780_pinctrl_attach), DEVMETHOD(device_detach, jz4780_pinctrl_detach), /* fdt_pinctrl interface */ DEVMETHOD(fdt_pinctrl_configure, jz4780_pinctrl_configure_pins), DEVMETHOD_END }; static devclass_t jz4780_pinctrl_devclass; DEFINE_CLASS_1(pinctrl, jz4780_pinctrl_driver, jz4780_pinctrl_methods, sizeof(struct jz4780_pinctrl_softc), simplebus_driver); EARLY_DRIVER_MODULE(pinctrl, simplebus, jz4780_pinctrl_driver, jz4780_pinctrl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE); Index: head/sys/mips/mediatek/fdt_reset.c =================================================================== --- head/sys/mips/mediatek/fdt_reset.c (revision 332340) +++ head/sys/mips/mediatek/fdt_reset.c (revision 332341) @@ -1,125 +1,125 @@ /*- * Copyright (c) 2016 Stanislav Galabov * Copyright (c) 2014 Ian Lepore * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #include #include #include #include #include #include #include #include #include #include "fdt_reset_if.h" #include /* * Loop through all the tuples in the resets= property for a device, asserting * or deasserting each reset. * * Be liberal about errors for now: warn about a failure to (de)assert but keep * trying with any other resets in the list. Return ENXIO if any errors were * found, and let the caller decide whether the problem is fatal. */ static int assert_deassert_all(device_t consumer, boolean_t assert) { phandle_t rnode; device_t resetdev; int resetnum, err, i, ncells; uint32_t *resets; boolean_t anyerrors; rnode = ofw_bus_get_node(consumer); - ncells = OF_getencprop_alloc(rnode, "resets", sizeof(*resets), + ncells = OF_getencprop_alloc_multi(rnode, "resets", sizeof(*resets), (void **)&resets); if (!assert && ncells < 2) { device_printf(consumer, "Warning: No resets specified in fdt " "data; device may not function."); return (ENXIO); } anyerrors = false; for (i = 0; i < ncells; i += 2) { resetdev = OF_device_from_xref(resets[i]); resetnum = resets[i + 1]; if (resetdev == NULL) { if (!assert) device_printf(consumer, "Warning: can not find " "driver for reset number %u; device may " "not function\n", resetnum); anyerrors = true; continue; } if (assert) err = FDT_RESET_ASSERT(resetdev, resetnum); else err = FDT_RESET_DEASSERT(resetdev, resetnum); if (err != 0) { if (!assert) device_printf(consumer, "Warning: failed to " "deassert reset number %u; device may not " "function\n", resetnum); anyerrors = true; } } OF_prop_free(resets); return (anyerrors ? ENXIO : 0); } int fdt_reset_assert_all(device_t consumer) { return (assert_deassert_all(consumer, true)); } int fdt_reset_deassert_all(device_t consumer) { return (assert_deassert_all(consumer, false)); } void fdt_reset_register_provider(device_t provider) { OF_device_register_xref( OF_xref_from_node(ofw_bus_get_node(provider)), provider); } void fdt_reset_unregister_provider(device_t provider) { OF_device_register_xref(OF_xref_from_device(provider), NULL); } Index: head/sys/powerpc/mpc85xx/lbc.c =================================================================== --- head/sys/powerpc/mpc85xx/lbc.c (revision 332340) +++ head/sys/powerpc/mpc85xx/lbc.c (revision 332341) @@ -1,861 +1,862 @@ /*- * SPDX-License-Identifier: BSD-3-Clause * * Copyright (c) 2006-2008, Juniper Networks, Inc. * Copyright (c) 2008 Semihalf, Rafal Czubak * Copyright (c) 2009 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Semihalf * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include "opt_platform.h" #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "ofw_bus_if.h" #include "lbc.h" #ifdef DEBUG #define debugf(fmt, args...) do { printf("%s(): ", __func__); \ printf(fmt,##args); } while (0) #else #define debugf(fmt, args...) #endif static MALLOC_DEFINE(M_LBC, "localbus", "localbus devices information"); static int lbc_probe(device_t); static int lbc_attach(device_t); static int lbc_shutdown(device_t); static int lbc_activate_resource(device_t bus __unused, device_t child __unused, int type, int rid __unused, struct resource *r); static int lbc_deactivate_resource(device_t bus __unused, device_t child __unused, int type __unused, int rid __unused, struct resource *r); static struct resource *lbc_alloc_resource(device_t, device_t, int, int *, rman_res_t, rman_res_t, rman_res_t, u_int); static int lbc_print_child(device_t, device_t); static int lbc_release_resource(device_t, device_t, int, int, struct resource *); static const struct ofw_bus_devinfo *lbc_get_devinfo(device_t, device_t); /* * Bus interface definition */ static device_method_t lbc_methods[] = { /* Device interface */ DEVMETHOD(device_probe, lbc_probe), DEVMETHOD(device_attach, lbc_attach), DEVMETHOD(device_shutdown, lbc_shutdown), /* Bus interface */ DEVMETHOD(bus_print_child, lbc_print_child), DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), DEVMETHOD(bus_teardown_intr, NULL), DEVMETHOD(bus_alloc_resource, lbc_alloc_resource), DEVMETHOD(bus_release_resource, lbc_release_resource), DEVMETHOD(bus_activate_resource, lbc_activate_resource), DEVMETHOD(bus_deactivate_resource, lbc_deactivate_resource), /* OFW bus interface */ DEVMETHOD(ofw_bus_get_devinfo, lbc_get_devinfo), DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), { 0, 0 } }; static driver_t lbc_driver = { "lbc", lbc_methods, sizeof(struct lbc_softc) }; devclass_t lbc_devclass; EARLY_DRIVER_MODULE(lbc, ofwbus, lbc_driver, lbc_devclass, 0, 0, BUS_PASS_BUS); /* * Calculate address mask used by OR(n) registers. Use memory region size to * determine mask value. The size must be a power of two and within the range * of 32KB - 4GB. Otherwise error code is returned. Value representing * 4GB size can be passed as 0xffffffff. */ static uint32_t lbc_address_mask(uint32_t size) { int n = 15; if (size == ~0) return (0); while (n < 32) { if (size == (1U << n)) break; n++; } if (n == 32) return (EINVAL); return (0xffff8000 << (n - 15)); } static void lbc_banks_unmap(struct lbc_softc *sc) { int r; r = 0; while (r < LBC_DEV_MAX) { if (sc->sc_range[r].size == 0) return; pmap_unmapdev(sc->sc_range[r].kva, sc->sc_range[r].size); law_disable(OCP85XX_TGTIF_LBC, sc->sc_range[r].addr, sc->sc_range[r].size); r++; } } static int lbc_banks_map(struct lbc_softc *sc) { vm_paddr_t end, start; vm_size_t size; u_int i, r, ranges, s; int error; bzero(sc->sc_range, sizeof(sc->sc_range)); /* * Determine number of discontiguous address ranges to program. */ ranges = 0; for (i = 0; i < LBC_DEV_MAX; i++) { size = sc->sc_banks[i].size; if (size == 0) continue; start = sc->sc_banks[i].addr; for (r = 0; r < ranges; r++) { /* Avoid wrap-around bugs. */ end = sc->sc_range[r].addr - 1 + sc->sc_range[r].size; if (start > 0 && end == start - 1) { sc->sc_range[r].size += size; break; } /* Avoid wrap-around bugs. */ end = start - 1 + size; if (sc->sc_range[r].addr > 0 && end == sc->sc_range[r].addr - 1) { sc->sc_range[r].addr = start; sc->sc_range[r].size += size; break; } } if (r == ranges) { /* New range; add using insertion sort */ r = 0; while (r < ranges && sc->sc_range[r].addr < start) r++; for (s = ranges; s > r; s--) sc->sc_range[s] = sc->sc_range[s-1]; sc->sc_range[r].addr = start; sc->sc_range[r].size = size; ranges++; } } /* * Ranges are sorted so quickly go over the list to merge ranges * that grew toward each other while building the ranges. */ r = 0; while (r < ranges - 1) { end = sc->sc_range[r].addr + sc->sc_range[r].size; if (end != sc->sc_range[r+1].addr) { r++; continue; } sc->sc_range[r].size += sc->sc_range[r+1].size; for (s = r + 1; s < ranges - 1; s++) sc->sc_range[s] = sc->sc_range[s+1]; bzero(&sc->sc_range[s], sizeof(sc->sc_range[s])); ranges--; } /* * Configure LAW for the LBC ranges and map the physical memory * range into KVA. */ for (r = 0; r < ranges; r++) { start = sc->sc_range[r].addr; size = sc->sc_range[r].size; error = law_enable(OCP85XX_TGTIF_LBC, start, size); if (error) return (error); sc->sc_range[r].kva = (vm_offset_t)pmap_mapdev(start, size); } /* XXX: need something better here? */ if (ranges == 0) return (EINVAL); /* Assign KVA to banks based on the enclosing range. */ for (i = 0; i < LBC_DEV_MAX; i++) { size = sc->sc_banks[i].size; if (size == 0) continue; start = sc->sc_banks[i].addr; for (r = 0; r < ranges; r++) { end = sc->sc_range[r].addr - 1 + sc->sc_range[r].size; if (start >= sc->sc_range[r].addr && start - 1 + size <= end) break; } if (r < ranges) { sc->sc_banks[i].kva = sc->sc_range[r].kva + (start - sc->sc_range[r].addr); } } return (0); } static int lbc_banks_enable(struct lbc_softc *sc) { uint32_t size; uint32_t regval; int error, i; for (i = 0; i < LBC_DEV_MAX; i++) { size = sc->sc_banks[i].size; if (size == 0) continue; /* * Compute and program BR value. */ regval = sc->sc_banks[i].addr; switch (sc->sc_banks[i].width) { case 8: regval |= (1 << 11); break; case 16: regval |= (2 << 11); break; case 32: regval |= (3 << 11); break; default: error = EINVAL; goto fail; } regval |= (sc->sc_banks[i].decc << 9); regval |= (sc->sc_banks[i].wp << 8); regval |= (sc->sc_banks[i].msel << 5); regval |= (sc->sc_banks[i].atom << 2); regval |= 1; bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_BR(i), regval); /* * Compute and program OR value. */ regval = lbc_address_mask(size); switch (sc->sc_banks[i].msel) { case LBCRES_MSEL_GPCM: /* TODO Add flag support for option registers */ regval |= 0x0ff7; break; case LBCRES_MSEL_FCM: /* TODO Add flag support for options register */ regval |= 0x0796; break; case LBCRES_MSEL_UPMA: case LBCRES_MSEL_UPMB: case LBCRES_MSEL_UPMC: printf("UPM mode not supported yet!"); error = ENOSYS; goto fail; } bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_OR(i), regval); } return (0); fail: lbc_banks_unmap(sc); return (error); } static void fdt_lbc_fixup(phandle_t node, struct lbc_softc *sc, struct lbc_devinfo *di) { pcell_t width; int bank; if (OF_getprop(node, "bank-width", (void *)&width, sizeof(width)) <= 0) return; bank = di->di_bank; if (sc->sc_banks[bank].size == 0) return; /* Express width in bits. */ sc->sc_banks[bank].width = width * 8; } static int fdt_lbc_reg_decode(phandle_t node, struct lbc_softc *sc, struct lbc_devinfo *di) { rman_res_t start, end, count; pcell_t *reg, *regptr; pcell_t addr_cells, size_cells; int tuple_size, tuples; int i, j, rv, bank; if (fdt_addrsize_cells(OF_parent(node), &addr_cells, &size_cells) != 0) return (ENXIO); tuple_size = sizeof(pcell_t) * (addr_cells + size_cells); - tuples = OF_getencprop_alloc(node, "reg", tuple_size, (void **)®); + tuples = OF_getencprop_alloc_multi(node, "reg", tuple_size, + (void **)®); debugf("addr_cells = %d, size_cells = %d\n", addr_cells, size_cells); debugf("tuples = %d, tuple size = %d\n", tuples, tuple_size); if (tuples <= 0) /* No 'reg' property in this node. */ return (0); regptr = reg; for (i = 0; i < tuples; i++) { bank = fdt_data_get((void *)reg, 1); di->di_bank = bank; reg += 1; /* Get address/size. */ start = count = 0; for (j = 0; j < addr_cells; j++) { start <<= 32; start |= reg[j]; } for (j = 0; j < size_cells; j++) { count <<= 32; count |= reg[addr_cells + j - 1]; } reg += addr_cells - 1 + size_cells; /* Calculate address range relative to VA base. */ start = sc->sc_banks[bank].kva + start; end = start + count - 1; debugf("reg addr bank = %d, start = %jx, end = %jx, " "count = %jx\n", bank, start, end, count); /* Use bank (CS) cell as rid. */ resource_list_add(&di->di_res, SYS_RES_MEMORY, bank, start, end, count); } rv = 0; OF_prop_free(regptr); return (rv); } static void lbc_intr(void *arg) { struct lbc_softc *sc = arg; uint32_t ltesr; ltesr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR); sc->sc_ltesr = ltesr; bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR, ltesr); wakeup(sc->sc_dev); } static int lbc_probe(device_t dev) { if (!(ofw_bus_is_compatible(dev, "fsl,lbc") || ofw_bus_is_compatible(dev, "fsl,elbc"))) return (ENXIO); device_set_desc(dev, "Freescale Local Bus Controller"); return (BUS_PROBE_DEFAULT); } static int lbc_attach(device_t dev) { struct lbc_softc *sc; struct lbc_devinfo *di; struct rman *rm; uintmax_t offset, size; vm_paddr_t start; device_t cdev; phandle_t node, child; pcell_t *ranges, *rangesptr; int tuple_size, tuples; int par_addr_cells; int bank, error, i, j; sc = device_get_softc(dev); sc->sc_dev = dev; sc->sc_mrid = 0; sc->sc_mres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_mrid, RF_ACTIVE); if (sc->sc_mres == NULL) return (ENXIO); sc->sc_bst = rman_get_bustag(sc->sc_mres); sc->sc_bsh = rman_get_bushandle(sc->sc_mres); for (bank = 0; bank < LBC_DEV_MAX; bank++) { bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_BR(bank), 0); bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_OR(bank), 0); } /* * Initialize configuration register: * - enable Local Bus * - set data buffer control signal function * - disable parity byte select * - set ECC parity type * - set bus monitor timing and timer prescale */ bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LBCR, 0); /* * Initialize clock ratio register: * - disable PLL bypass mode * - configure LCLK delay cycles for the assertion of LALE * - set system clock divider */ bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LCRR, 0x00030008); bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTEDR, 0); bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR, ~0); bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTEIR, 0x64080001); sc->sc_irid = 0; sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE); if (sc->sc_ires != NULL) { error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_MISC | INTR_MPSAFE, NULL, lbc_intr, sc, &sc->sc_icookie); if (error) { device_printf(dev, "could not activate interrupt\n"); bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, sc->sc_ires); sc->sc_ires = NULL; } } sc->sc_ltesr = ~0; rangesptr = NULL; rm = &sc->sc_rman; rm->rm_type = RMAN_ARRAY; rm->rm_descr = "Local Bus Space"; error = rman_init(rm); if (error) goto fail; error = rman_manage_region(rm, rm->rm_start, rm->rm_end); if (error) { rman_fini(rm); goto fail; } /* * Process 'ranges' property. */ node = ofw_bus_get_node(dev); if ((fdt_addrsize_cells(node, &sc->sc_addr_cells, &sc->sc_size_cells)) != 0) { error = ENXIO; goto fail; } par_addr_cells = fdt_parent_addr_cells(node); if (par_addr_cells > 2) { device_printf(dev, "unsupported parent #addr-cells\n"); error = ERANGE; goto fail; } tuple_size = sizeof(pcell_t) * (sc->sc_addr_cells + par_addr_cells + sc->sc_size_cells); - tuples = OF_getencprop_alloc(node, "ranges", tuple_size, + tuples = OF_getencprop_alloc_multi(node, "ranges", tuple_size, (void **)&ranges); if (tuples < 0) { device_printf(dev, "could not retrieve 'ranges' property\n"); error = ENXIO; goto fail; } rangesptr = ranges; debugf("par addr_cells = %d, addr_cells = %d, size_cells = %d, " "tuple_size = %d, tuples = %d\n", par_addr_cells, sc->sc_addr_cells, sc->sc_size_cells, tuple_size, tuples); start = 0; size = 0; for (i = 0; i < tuples; i++) { /* The first cell is the bank (chip select) number. */ bank = fdt_data_get(ranges, 1); if (bank < 0 || bank > LBC_DEV_MAX) { device_printf(dev, "bank out of range: %d\n", bank); error = ERANGE; goto fail; } ranges += 1; /* * Remaining cells of the child address define offset into * this CS. */ offset = 0; for (j = 0; j < sc->sc_addr_cells - 1; j++) { offset <<= sizeof(pcell_t) * 8; offset |= *ranges; ranges++; } /* Parent bus start address of this bank. */ start = 0; for (j = 0; j < par_addr_cells; j++) { start <<= sizeof(pcell_t) * 8; start |= *ranges; ranges++; } size = fdt_data_get((void *)ranges, sc->sc_size_cells); ranges += sc->sc_size_cells; debugf("bank = %d, start = %jx, size = %jx\n", bank, (uintmax_t)start, size); sc->sc_banks[bank].addr = start + offset; sc->sc_banks[bank].size = size; /* * Attributes for the bank. * * XXX Note there are no DT bindings defined for them at the * moment, so we need to provide some defaults. */ sc->sc_banks[bank].width = 16; sc->sc_banks[bank].msel = LBCRES_MSEL_GPCM; sc->sc_banks[bank].decc = LBCRES_DECC_DISABLED; sc->sc_banks[bank].atom = LBCRES_ATOM_DISABLED; sc->sc_banks[bank].wp = 0; } /* * Initialize mem-mappings for the LBC banks (i.e. chip selects). */ error = lbc_banks_map(sc); if (error) goto fail; /* * Walk the localbus and add direct subordinates as our children. */ for (child = OF_child(node); child != 0; child = OF_peer(child)) { di = malloc(sizeof(*di), M_LBC, M_WAITOK | M_ZERO); if (ofw_bus_gen_setup_devinfo(&di->di_ofw, child) != 0) { free(di, M_LBC); device_printf(dev, "could not set up devinfo\n"); continue; } resource_list_init(&di->di_res); if (fdt_lbc_reg_decode(child, sc, di)) { device_printf(dev, "could not process 'reg' " "property\n"); ofw_bus_gen_destroy_devinfo(&di->di_ofw); free(di, M_LBC); continue; } fdt_lbc_fixup(child, sc, di); /* Add newbus device for this FDT node */ cdev = device_add_child(dev, NULL, -1); if (cdev == NULL) { device_printf(dev, "could not add child: %s\n", di->di_ofw.obd_name); resource_list_free(&di->di_res); ofw_bus_gen_destroy_devinfo(&di->di_ofw); free(di, M_LBC); continue; } debugf("added child name='%s', node=%x\n", di->di_ofw.obd_name, child); device_set_ivars(cdev, di); } /* * Enable the LBC. */ lbc_banks_enable(sc); OF_prop_free(rangesptr); return (bus_generic_attach(dev)); fail: OF_prop_free(rangesptr); bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mrid, sc->sc_mres); return (error); } static int lbc_shutdown(device_t dev) { /* TODO */ return(0); } static struct resource * lbc_alloc_resource(device_t bus, device_t child, int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) { struct lbc_softc *sc; struct lbc_devinfo *di; struct resource_list_entry *rle; struct resource *res; struct rman *rm; int needactivate; /* We only support default allocations. */ if (!RMAN_IS_DEFAULT_RANGE(start, end)) return (NULL); sc = device_get_softc(bus); if (type == SYS_RES_IRQ) return (bus_alloc_resource(bus, type, rid, start, end, count, flags)); /* * Request for the default allocation with a given rid: use resource * list stored in the local device info. */ if ((di = device_get_ivars(child)) == NULL) return (NULL); if (type == SYS_RES_IOPORT) type = SYS_RES_MEMORY; rid = &di->di_bank; rle = resource_list_find(&di->di_res, type, *rid); if (rle == NULL) { device_printf(bus, "no default resources for " "rid = %d, type = %d\n", *rid, type); return (NULL); } start = rle->start; count = rle->count; end = start + count - 1; sc = device_get_softc(bus); needactivate = flags & RF_ACTIVE; flags &= ~RF_ACTIVE; rm = &sc->sc_rman; res = rman_reserve_resource(rm, start, end, count, flags, child); if (res == NULL) { device_printf(bus, "failed to reserve resource %#jx - %#jx " "(%#jx)\n", start, end, count); return (NULL); } rman_set_rid(res, *rid); rman_set_bustag(res, &bs_be_tag); rman_set_bushandle(res, rman_get_start(res)); if (needactivate) if (bus_activate_resource(child, type, *rid, res)) { device_printf(child, "resource activation failed\n"); rman_release_resource(res); return (NULL); } return (res); } static int lbc_print_child(device_t dev, device_t child) { struct lbc_devinfo *di; struct resource_list *rl; int rv; di = device_get_ivars(child); rl = &di->di_res; rv = 0; rv += bus_print_child_header(dev, child); rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); rv += bus_print_child_footer(dev, child); return (rv); } static int lbc_release_resource(device_t dev, device_t child, int type, int rid, struct resource *res) { int err; if (rman_get_flags(res) & RF_ACTIVE) { err = bus_deactivate_resource(child, type, rid, res); if (err) return (err); } return (rman_release_resource(res)); } static int lbc_activate_resource(device_t bus __unused, device_t child __unused, int type __unused, int rid __unused, struct resource *r) { /* Child resources were already mapped, just activate. */ return (rman_activate_resource(r)); } static int lbc_deactivate_resource(device_t bus __unused, device_t child __unused, int type __unused, int rid __unused, struct resource *r) { return (rman_deactivate_resource(r)); } static const struct ofw_bus_devinfo * lbc_get_devinfo(device_t bus, device_t child) { struct lbc_devinfo *di; di = device_get_ivars(child); return (&di->di_ofw); } void lbc_write_reg(device_t child, u_int off, uint32_t val) { device_t dev; struct lbc_softc *sc; dev = device_get_parent(child); if (off >= 0x1000) { device_printf(dev, "%s(%s): invalid offset %#x\n", __func__, device_get_nameunit(child), off); return; } sc = device_get_softc(dev); if (off == LBC85XX_LTESR && sc->sc_ltesr != ~0u) { sc->sc_ltesr ^= (val & sc->sc_ltesr); return; } if (off == LBC85XX_LTEATR && (val & 1) == 0) sc->sc_ltesr = ~0u; bus_space_write_4(sc->sc_bst, sc->sc_bsh, off, val); } uint32_t lbc_read_reg(device_t child, u_int off) { device_t dev; struct lbc_softc *sc; uint32_t val; dev = device_get_parent(child); if (off >= 0x1000) { device_printf(dev, "%s(%s): invalid offset %#x\n", __func__, device_get_nameunit(child), off); return (~0U); } sc = device_get_softc(dev); if (off == LBC85XX_LTESR && sc->sc_ltesr != ~0U) val = sc->sc_ltesr; else val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, off); return (val); }