Index: head/share/man/man9/bhnd.9 =================================================================== --- head/share/man/man9/bhnd.9 (revision 331743) +++ head/share/man/man9/bhnd.9 (revision 331744) @@ -1,2667 +1,2681 @@ .\" Copyright (c) 2015-2016 Landon Fuller .\" Copyright (c) 2017 The FreeBSD Foundation .\" All rights reserved. .\" .\" Portions of this documentation were written by Landon Fuller .\" under sponsorship from the FreeBSD Foundation. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" .\" $FreeBSD$ .\" -.Dd January 19, 2018 +.Dd March 26, 2018 .Dt BHND 9 .Os .Sh NAME .Nm bhnd .Nd BHND driver programming interface .Sh SYNOPSIS .In dev/bhnd/bhnd.h .\" .Ss Bus Resource Functions .Ft int .Fo bhnd_activate_resource .Fa "device_t dev" "int type" "int rid" "struct bhnd_resource *r" .Fc .Ft "struct bhnd_resource *" .Fo bhnd_alloc_resource .Fa "device_t dev" "int type" "int *rid" "rman_res_t start" "rman_res_t end" .Fa "rman_res_t count" "u_int flags" .Fc .Ft "struct bhnd_resource *" .Fo bhnd_alloc_resource_any .Fa "device_t dev" "int type" "int *rid" "u_int flags" .Fc .Ft int .Fo bhnd_alloc_resources .Fa "device_t dev" "struct resource_spec *rs" "struct bhnd_resource **res" .Fc .Ft int .Fo bhnd_deactivate_resource .Fa "device_t dev" "int type" "int rid" "struct bhnd_resource *r" .Fc .Ft int .Fo bhnd_release_resource .Fa "device_t dev" "int type" "int rid" "struct bhnd_resource *r" .Fc .Ft void .Fo bhnd_release_resources .Fa "device_t dev" "const struct resource_spec *rs" .Fa "struct bhnd_resource **res" .Fc .\" .Ss "Bus Space Functions" .Ft void .Fo bhnd_bus_barrier .Fa "struct bhnd_resource *r" "bus_size_t offset" .Fa "bus_size_t length" "int flags" .Fc .Ft uint8_t .Fn bhnd_bus_read_1 "struct bhnd_resource *r" "bus_size_t offset" .Ft uint16_t .Fn bhnd_bus_read_2 "struct bhnd_resource *r" "bus_size_t offset" .Ft uint32_t .Fn bhnd_bus_read_4 "struct bhnd_resource *r" "bus_size_t offset" .Ft void .Fo bhnd_bus_read_multi_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_multi_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_multi_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_multi_stream_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_multi_stream_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_multi_stream_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_region_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_region_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_region_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_region_stream_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_region_stream_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_region_stream_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fn bhnd_bus_read_stream_1 "struct bhnd_resource *r" "bus_size_t offset" .Ft void .Fn bhnd_bus_read_stream_2 "struct bhnd_resource *r" "bus_size_t offset" .Ft uint32_t .Fn bhnd_bus_read_stream_4 "struct bhnd_resource *r" "bus_size_t offset" .Ft void .Fo bhnd_bus_set_multi_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t value" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_set_multi_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t value" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_set_multi_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t value" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_set_region_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t value" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_set_region_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t value" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_set_region_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t value" .Fa "bus_size_t count" .Fc .Ft void .Fn bhnd_bus_write_1 "struct bhnd_resource *r" "uint8_t value" .Ft void .Fn bhnd_bus_write_2 "struct bhnd_resource *r" "uint16_t value" .Ft void .Fn bhnd_bus_write_4 "struct bhnd_resource *r" "uint32_t value" .Ft void .Fo bhnd_bus_write_multi_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_multi_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_multi_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_multi_stream_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_multi_stream_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_multi_stream_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_region_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_region_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_region_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_region_stream_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_region_stream_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_region_stream_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fn bhnd_bus_write_stream_1 "struct bhnd_resource *r" "uint8_t value" .Ft void .Fn bhnd_bus_write_stream_2 "struct bhnd_resource *r" "uint16_t value" .Ft void .Fn bhnd_bus_write_stream_4 "struct bhnd_resource *r" "uint32_t value" .\" .Ss "Device Configuration Functions" .Ft int .Fn bhnd_read_ioctl "device_t dev" "uint16_t *ioctl" .Ft int .Fn bhnd_write_ioctl "device_t dev" "uint16_t value" "uint16_t mask" .Ft int .Fn bhnd_read_iost "device_t dev" "uint16_t *iost" .Ft uint32_t .Fo bhnd_read_config .Fa "device_t dev" "bus_size_t offset" "void *value" "u_int width" .Fc .Ft int .Fo bhnd_write_config .Fa "device_t dev" "bus_size_t offset" "const void *value" "u_int width" .Fc .Ft int .Fn bhnd_reset_hw "device_t dev" "uint16_t ioctl" "uint16_t reset_ioctl" .Ft int .Fn bhnd_suspend_hw "device_t dev" "uint16_t ioctl" .Ft bool .Fn bhnd_is_hw_suspended "device_t dev" .\" .Ss "Device Information Functions" .Ft bhnd_attach_type .Fo bhnd_get_attach_type .Fa "device_t dev" .Fc .Ft "const struct bhnd_chipid *" .Fo bhnd_get_chipid .Fa "device_t dev" .Fc .Ft bhnd_devclass_t .Fo bhnd_get_class .Fa "device_t dev" .Fc .Ft u_int .Fo bhnd_get_core_index .Fa "device_t dev" .Fc .Ft "struct bhnd_core_info" .Fo bhnd_get_core_info .Fa "device_t dev" .Fc .Ft int .Fo bhnd_get_core_unit .Fa "device_t dev" .Fc .Ft uint16_t .Fo bhnd_get_device .Fa "device_t dev" .Fc .Ft const char * .Fo bhnd_get_device_name .Fa "device_t dev" .Fc .Ft uint8_t .Fo bhnd_get_hwrev .Fa "device_t dev" .Fc .Ft uint16_t .Fo bhnd_get_vendor .Fa "device_t dev" .Fc .Ft const char * .Fo bhnd_get_vendor_name .Fa "device_t dev" .Fc .Ft int .Fo bhnd_read_board_info .Fa "device_t dev" "struct bhnd_board_info *info" .Fc .\" .Ss "Device Matching Functions" .Ft bool .Fo bhnd_board_matches .Fa "const struct bhnd_board_info *board" "const struct bhnd_board_match *desc" .Fc .Ft device_t .Fo bhnd_bus_match_child .Fa "device_t bus" "const struct bhnd_core_match *desc" .Fc .Ft bool .Fo bhnd_chip_matches .Fa "const struct bhnd_chipid *chip" "const struct bhnd_chip_match *desc" .Fc .Ft "struct bhnd_core_match" .Fo bhnd_core_get_match_desc .Fa "const struct bhnd_core_info *core" .Fc .Ft bool .Fo bhnd_core_matches .Fa "const struct bhnd_core_info *core" "const struct bhnd_core_match *desc" .Fc .Ft bool .Fo bhnd_cores_equal .Fa "const struct bhnd_core_info *lhs" "const struct bhnd_core_info *rhs" .Fc .Ft bool .Fo bhnd_hwrev_matches .Fa "uint16_t hwrev" "const struct bhnd_hwrev_match *desc" .Fc .Ft "const struct bhnd_core_info *" .Fo bhnd_match_core .Fa "const struct bhnd_core_info *cores" "u_int num_cores" .Fa "const struct bhnd_core_match *desc" .Fc .\" .Ss "Device Table Functions" .Ft "const struct bhnd_device *" .Fo bhnd_device_lookup .Fa "device_t dev" "const struct bhnd_device *table" "size_t entry_size" .Fc .Ft bool .Fo bhnd_device_matches .Fa "device_t dev" "const struct bhnd_device_match *desc" .Fc .Ft uint32_t .Fo bhnd_device_quirks .Fa "device_t dev" "const struct bhnd_device *table" "size_t entry_size" .Fc .Fo BHND_BOARD_QUIRK .Fa "board" "flags" .Fc .Fo BHND_CHIP_QUIRK .Fa "chip" "hwrev" "flags" .Fc .Fo BHND_CORE_QUIRK .Fa "hwrev" "flags" .Fc .Fo BHND_DEVICE .Fa "vendor" "device" "desc" "quirks" "..." .Fc .Fo BHND_DEVICE_IS_END .Fa "struct bhnd_device *d" .Fc .Fo BHND_DEVICE_QUIRK_IS_END .Fa "struct bhnd_device_quirk *q" .Fc .Fo BHND_PKG_QUIRK .Fa "chip" "pkg" "flags" .Fc .Bd -literal struct bhnd_device_quirk { struct bhnd_device_match desc; uint32_t quirks; }; .Ed .Bd -literal struct bhnd_device { const struct bhnd_device_match core; const char *desc; const struct bhnd_device_quirk *quirks_table; uint32_t device_flags; }; .Ed .Bd -literal enum { BHND_DF_ANY = 0, BHND_DF_HOSTB = (1 << 0), BHND_DF_SOC = (1 << 1), BHND_DF_ADAPTER = (1 << 2) }; .Ed .Bd -literal #define BHND_DEVICE_END { { BHND_MATCH_ANY }, NULL, NULL, 0 } .Ed .Bd -literal #define BHND_DEVICE_QUIRK_END { { BHND_MATCH_ANY }, 0 } .Ed .\" .Ss "DMA Address Translation Functions" .Ft int .Fo bhnd_get_dma_translation .Fa "device_t dev" "u_int width" "uint32_t flags" "bus_dma_tag_t *dmat" .Fa "struct bhnd_dma_translation *translation" .Fc .Bd -literal struct bhnd_dma_translation { bhnd_addr_t base_addr; bhnd_addr_t addr_mask; bhnd_addr_t addrext_mask; uint32_t flags; }; .Ed .Bd -literal typedef enum { BHND_DMA_ADDR_30BIT = 30, BHND_DMA_ADDR_32BIT = 32, BHND_DMA_ADDR_64BIT = 64 } bhnd_dma_addrwidth; .Ed .Bd -literal enum bhnd_dma_translation_flags { BHND_DMA_TRANSLATION_PHYSMAP = (1<<0), BHND_DMA_TRANSLATION_BYTESWAPPED = (1<<1) }; .Ed .\" .Ss "Interrupt Functions" .Ft u_int .Fo bhnd_get_intr_count .Fa "device_t dev" .Fc .Ft int .Fo bhnd_get_intr_ivec .Fa "device_t dev" "u_int intr" "u_int *ivec" .Fc .Ft int .Fo bhnd_map_intr .Fa "device_t dev" "u_int intr" "rman_res_t *irq" .Fc .Ft void .Fo bhnd_unmap_intr .Fa "device_t dev" "rman_res_t irq" .Fc .\" .Ss "NVRAM Functions" .Ft int .Fo bhnd_nvram_getvar .Fa "device_t dev" "const char *name" "void *buf" "size_t *len" .Fa "bhnd_nvram_type type" .Fc .Ft int .Fo bhnd_nvram_getvar_array .Fa "device_t dev" "const char *name" "void *buf" "size_t size" .Fa "bhnd_nvram_type type" .Fc .Ft int .Fo bhnd_nvram_getvar_int .Fa "device_t dev" "const char *name" "void *value" "int width" .Fc .Ft int .Fn bhnd_nvram_getvar_int8 "device_t dev" "const char *name" "int8_t *value" .Ft int .Fn bhnd_nvram_getvar_int16 "device_t dev" "const char *name" "int16_t *value" .Ft int .Fn bhnd_nvram_getvar_int32 "device_t dev" "const char *name" "int32_t *value" .Ft int .Fo bhnd_nvram_getvar_uint .Fa "device_t dev" "const char *name" "void *value" "int width" .Fc .Ft int .Fo bhnd_nvram_getvar_uint8 .Fa "device_t dev" "const char *name" "uint8_t *value" .Fc .Ft int .Fo bhnd_nvram_getvar_uint16 .Fa "device_t dev" "const char *name" "uint16_t *value" .Fc .Ft int .Fo bhnd_nvram_getvar_uint32 .Fa "device_t dev" "const char *name" "uint32_t *value" .Fc .Ft int .Fo bhnd_nvram_getvar_str .Fa "device_t dev" "const char *name" "char *buf" "size_t len" "size_t *rlen" .Fc .Ft "const char *" .Fo bhnd_nvram_string_array_next .Fa "const char *inp" "size_t ilen" "const char *prev" "size_t *olen" .Fc .Bd -literal typedef enum { BHND_NVRAM_TYPE_UINT8 = 0, BHND_NVRAM_TYPE_UINT16 = 1, BHND_NVRAM_TYPE_UINT32 = 2, BHND_NVRAM_TYPE_UINT64 = 3, BHND_NVRAM_TYPE_INT8 = 4, BHND_NVRAM_TYPE_INT16 = 5, BHND_NVRAM_TYPE_INT32 = 6, BHND_NVRAM_TYPE_INT64 = 7, BHND_NVRAM_TYPE_CHAR = 8, BHND_NVRAM_TYPE_STRING = 9, BHND_NVRAM_TYPE_BOOL = 10, BHND_NVRAM_TYPE_NULL = 11, BHND_NVRAM_TYPE_DATA = 12 BHND_NVRAM_TYPE_UINT8_ARRAY = 16, BHND_NVRAM_TYPE_UINT16_ARRAY = 17, BHND_NVRAM_TYPE_UINT32_ARRAY = 18, BHND_NVRAM_TYPE_UINT64_ARRAY = 19, BHND_NVRAM_TYPE_INT8_ARRAY = 20, BHND_NVRAM_TYPE_INT16_ARRAY = 21, BHND_NVRAM_TYPE_INT32_ARRAY = 22, BHND_NVRAM_TYPE_INT64_ARRAY = 23, BHND_NVRAM_TYPE_CHAR_ARRAY = 24, BHND_NVRAM_TYPE_STRING_ARRAY = 25, BHND_NVRAM_TYPE_BOOL_ARRAY = 26 } bhnd_nvram_type; .Ed .\" .Ss "Port/Region Functions" .Ft int .Fo bhnd_decode_port_rid .Fa "device_t dev" "int type" "int rid" "bhnd_port_type *port_type" .Fa "u_int *port" "u_int *region" .Fc .Ft u_int .Fo bhnd_get_port_count .Fa "device_t dev" "bhnd_port_type type" .Fc .Ft int .Fo bhnd_get_port_rid .Fa "device_t dev" "bhnd_port_type type" "u_int port" "u_int region" .Fc .Ft int .Fo bhnd_get_region_addr .Fa "device_t dev" "bhnd_port_type port_type" "u_int port" "u_int region" .Fa "bhnd_addr_t *region_addr" "bhnd_size_t *region_size" .Fc .Ft u_int .Fo bhnd_get_region_count .Fa "device_t dev" "bhnd_port_type type" "u_int port" .Fc .Ft bool .Fo bhnd_is_region_valid .Fa "device_t dev" "bhnd_port_type type" "u_int port" "u_int region" .Fc .Bd -literal typedef enum { BHND_PORT_DEVICE = 0, BHND_PORT_BRIDGE = 1, BHND_PORT_AGENT = 2 } bhnd_port_type; .Ed .\" .Ss "Power Management Functions" .Ft int .Fo bhnd_alloc_pmu .Fa "device_t dev" .Fc .Ft int .Fo bhnd_release_pmu .Fa "device_t dev" .Fc .Ft int .Fo bhnd_enable_clocks .Fa "device_t dev" "uint32_t clocks" .Fc .Ft int .Fo bhnd_request_clock .Fa "device_t dev" "bhnd_clock clock" .Fc .Ft int .Fo bhnd_get_clock_freq .Fa "device_t dev" "bhnd_clock clock" "u_int *freq" .Fc .Ft int .Fo bhnd_get_clock_latency .Fa "device_t dev" "bhnd_clock clock" "u_int *latency" .Fc .Ft int .Fo bhnd_request_ext_rsrc .Fa "device_t dev" "u_int rsrc" .Fc .Ft int .Fo bhnd_release_ext_rsrc .Fa "device_t dev" "u_int rsrc" .Fc .Bd -literal typedef enum { BHND_CLOCK_DYN = (1 << 0), BHND_CLOCK_ILP = (1 << 1), BHND_CLOCK_ALP = (1 << 2), BHND_CLOCK_HT = (1 << 3) } bhnd_clock; .Ed .\" .Ss "Service Provider Functions" .Ft int .Fo bhnd_register_provider .Fa "device_t dev" "bhnd_service_t service" .Fc .Ft int .Fo bhnd_deregister_provider .Fa "device_t dev" "bhnd_service_t service" .Fc .Ft device_t .Fo bhnd_retain_provider .Fa "device_t dev" "bhnd_service_t service" .Fc .Ft void .Fo bhnd_release_provider .Fa "device_t dev" "device_t provider" "bhnd_service_t service" .Fc .Bd -literal typedef enum { BHND_SERVICE_CHIPC, BHND_SERVICE_PWRCTL, BHND_SERVICE_PMU, BHND_SERVICE_NVRAM, BHND_SERVICE_GPIO, BHND_SERVICE_ANY = 1000 } bhnd_service_t; .Ed .\" .Ss "Utility Functions" .Ft "bhnd_erom_class_t *" .Fo bhnd_driver_get_erom_class .Fa "driver_t *driver" .Fc .Ft bhnd_devclass_t .Fo bhnd_find_core_class .Fa "uint16_t vendor" "uint16_t device" .Fc .Ft "const char *" .Fo bhnd_find_core_name .Fa "uint16_t vendor" "uint16_t device" .Fc .Ft bhnd_devclass_t .Fo bhnd_core_class .Fa "const struct bhnd_core_info *ci" .Fc .Ft "const char *" .Fo bhnd_core_name .Fa "const struct bhnd_core_info *ci" .Fc .Ft int .Fo bhnd_format_chip_id .Fa "char *buffer" "size_t size" "uint16_t chip_id" .Fc .Ft void .Fo bhnd_set_custom_core_desc .Fa "device_t dev" "const char *dev_name" .Fc .Ft void .Fo bhnd_set_default_core_desc .Fa "device_t dev" .Fc .Ft "const char *" .Fo bhnd_vendor_name .Fa "uint16_t vendor" .Fc .Bd -literal #define BHND_CHIPID_MAX_NAMELEN 32 .Ed .\" .Sh DESCRIPTION .Nm provides a unified bus and driver programming interface for the on-chip interconnects and IP cores found in Broadcom Home Networking Division (BHND) devices. .Pp The BHND device family consists of MIPS/ARM SoCs (System On a Chip) and host-connected chipsets based on a common library of Broadcom IP cores, connected via one of two on-chip backplane (hardware bus) architectures. .Pp Hardware designed prior to 2009 used Broadcom's .Dq SSB backplane architecture, based on Sonics Silicon's interconnect IP. Each core on the Sonics backplane vends a 4 KiB register block, containing both device-specific CSRs, and SSB-specific per-core device management (enable/reset/etc) registers. .Pp Subsequent hardware is based on Broadcom's .Dq BCMA backplane, based on ARM's AMBA IP. The IP cores used in earlier SSB-based devices were adapted for compatibility with the new backplane, with additional .Dq wrapper cores providing per-core device management functions in place of the SSB per-core management registers. .Pp When BHND hardware is used as a host-connected peripheral (e.g., in a PCI Wi-Fi card), the on-chip peripheral controller core is configured to operate as an endpoint device, bridging access to the SoC hardware: .Pp .Bl -dash -offset indent .It Host access to SoC address space is provided via a set of register windows (e.g., a set of configurable windows into SoC address space mapped via PCI BARs) .It DMA is supported by the bridge core's sparse mapping of host address space into the backplane address space. These address regions may be used as a target for the on-chip DMA engine. .It Any backplane interrupt vectors routed to the bridge core may be mapped by the bridge to host interrupts (e.g., PCI INTx/MSI/MSI-X). .El .Pp The .Nm driver programming interface \(em and .Xr bhndb 4 host bridge drivers \(em support the implementation of common drivers for Broadcom IP cores, whether attached via a BHND host bridge, or via the native SoC backplane. .\" .Ss "Bus Resource Functions" The bhnd_resource functions are wrappers for the standard .Vt "struct resource" bus APIs, providing support for .Vt SYS_RES_MEMORY resources that, on .Xr bhndb 4 bridged chipsets, may require on-demand remapping of address windows prior to accessing bus memory. .Pp These functions are primarily used in the implementation of BHND platform device drivers that, on host-connected peripherals, must share a small set of register windows during initial setup and teardown. .Pp BHND peripherals are designed to not require register window remapping during normal operation, and most drivers may safely use the standard .Vt struct resource APIs directly. .Pp The .Fn bhnd_activate_resource function activates a previously allocated resource. .Pp The arguments are as follows: .Bl -tag -width indent .It Fa dev The device holding ownership of the allocated resource. .It Fa type The type of the resource. .It Fa rid The bus-specific handle that identifies the resource being activated. .It Fa r A pointer to the resource returned by .Fn bhnd_alloc_resource . .El .Pp The .Fn bhnd_alloc_resource function allocates a resource from a device's parent .Xr bhnd 4 bus. .Pp The arguments are as follows: .Bl -tag -width indent .It Fa dev The device requesting resource ownership. .It Fa type The type of resource to allocate. This may be any type supported by the standard .Xr bus_alloc_resource 9 function. .It Fa rid The bus-specific handle identifying the resource being allocated. .It Fa start The start address of the resource. .It Fa end The end address of the resource. .It Fa count The size of the resource. .It Fa flags The flags for the resource to be allocated. These may be any values supported by the standard .Xr bus_alloc_resource 9 function. .El .Pp To request that the bus supply the resource's default .Fa start , .Fa end , and .Fa count values, pass .Fa start and .Fa end values of 0ul and ~0ul respectively, and a .Fa count of 1. .Pp The .Fn bhnd_alloc_resource_any function is a convenience wrapper for .Fn bhnd_alloc_resource , using the resource's default .Fa start , .Fa end , and .Fa count values. .Pp The arguments are as follows: .Bl -tag -width indent .It Fa dev The device requesting resource ownership. .It Fa type The type of resource to allocate. This may be any type supported by the standard .Xr bus_alloc_resource 9 function. .It Fa rid The bus-specific handle identifying the resource being allocated. .It Fa flags The flags for the resource to be allocated. These may be any values supported by the standard .Xr bus_alloc_resource 9 function. .El .Pp The .Fn bhnd_alloc_resources function allocates resources defined in resource specification from a device's parent .Xr bhnd 4 bus. .Pp The arguments are as follows: .Bl -tag -width indent .It Fa dev The device requesting ownership of the resources. .It Fa rs A standard bus resource specification. If all requested resources, are successfully allocated, this will be updated with the allocated resource identifiers. .It Fa res If all requested resources are successfully allocated, this will be populated with the allocated .Vt "struct bhnd_resource" instances. .El .Pp The .Fn bhnd_deactivate_resource function deactivates a resource previously activated by. .Fn bhnd_activate_resource . The arguments are as follows: .Bl -tag -width indent .It Fa dev The device holding ownership of the activated resource. .It Fa type The type of the resource. .It Fa rid The bus-specific handle identifying the resource. .It Fa r A pointer to the resource returned by bhnd_alloc_resource. .El .Pp The .Fn bhnd_release_resource function frees a resource previously returned by .Fn bhnd_alloc_resource . The arguments are as follows: .Bl -tag -width indent .It Fa dev The device holding ownership of the resource. .It Fa type The type of the resource. .It Fa rid The bus-specific handle identifying the resource. .It Fa r A pointer to the resource returned by bhnd_alloc_resource. .El .Pp The .Fn bhnd_release_resources function frees resources previously returned by .Fn bhnd_alloc_resources . The arguments are as follows: .Bl -tag -width indent .It Fa dev The device that owns the resources. .It Fa rs A standard bus resource specification previously initialized by .Fn bhnd_alloc_resources . .It Fa res The resources to be released. .El .Pp The .Vt bhnd_resource structure contains the following fields: .Bl -tag -width "direct" .It Fa res A pointer to the bus .Vt struct resource . .It Fa direct If true, the resource requires bus window remapping before it is MMIO accessible. .El .Pp .\" .Ss "Bus Space Functions" The bhnd_bus_space functions wrap their equivalent .Xr bus_space 9 counterparts, and provide support for accessing bus memory via .Vt "struct bhnd_resource". .Pp .Bl -ohang -offset indent -compact .It Fn bhnd_bus_barrier .It Fn bhnd_bus_[read|write]_[1|2|4] .It Fn bhnd_bus_[read_multi|write_multi]_[1|2|4] .It Fn bhnd_bus_[read_multi_stream|write_multi_stream]_[1|2|4] .It Fn bhnd_bus_[read_region|write_region]_[1|2|4] .It Fn bhnd_bus_[read_region_stream|write_region_stream]_[1|2|4] .It Fn bhnd_bus_[read_stream|write_stream]_[1|2|4] .It Fn bhnd_bus_[set_multi|set_stream]_[1|2|4] .El .Pp Drivers that do not rely on .Vt "struct bhnd_resource" should use the standard .Vt struct resource and .Xr bus_space 9 APIs directly. .\" .Ss "Device Configuration Functions" The .Fn bhnd_read_ioctl function is used to read the I/O control register value of device .Fa dev , returning the current value in .Fa ioctl . .Pp The .Fn bhnd_write_ioctl function is used to modify the I/O control register of .Fa dev . The new value of the register is computed by updating any bits set in .Fa mask to .Fa value . The following I/O control flags are supported: .Bl -tag -width ".Dv BHND_IOCTL_CLK_FORCE" -offset indent .It Dv BHND_IOCTL_BIST Initiate a built-in self-test (BIST). Must be cleared after BIST results are read via the IOST (I/O Status) register. .It Dv BHND_IOCTL_PME Enable posting of power management events by the core. .It Dv BHND_IOCTL_CLK_FORCE Force disable of clock gating, resulting in all clocks being distributed within the core. Should be set when asserting/deasserting reset to ensure the reset signal fully propagates to the entire core. .It Dv BHND_IOCTL_CLK_EN If cleared, the core clock will be disabled. Should be set during normal operation, and cleared when the core is held in reset. .It Dv BHND_IOCTL_CFLAGS The mask of IOCTL bits reserved for additional core-specific I/O control flags. .El .Pp The .Fn bhnd_read_iost function is used to read the I/O status register of device .Fa dev , returning the current value in .Fa iost . The following I/O status flags are supported: .Bl -tag -width ".Dv BHND_IOST_BIST_DONE" -offset indent .It Dv BHND_IOST_BIST_DONE Set upon BIST completion. Will be cleared when the .Dv BHND_IOCTL_BIST flag of the I/O control register is cleared using .Fn bhnd_write_ioctl . .It Dv BHND_IOST_BIST_FAIL Set upon detection of a BIST error; the value is unspecified if BIST has not completed and .Dv BHND_IOST_BIST_DONE is not also set. .It Dv BHND_IOST_CLK Set if the core has required that clocked be ungated, or cleared otherwise. The value is undefined if a core does not support clock gating. .It Dv BHND_IOST_DMA64 Set if this core supports 64-bit DMA. .It Dv BHND_IOST_CFLAGS The mask of IOST bits reserved for additional core-specific I/O status flags. .El .Pp The .Fn bhnd_read_config function is used to read a data item of .Fa width bytes at .Fa offset from the backplane-specific agent/config space of the device .Fa dev . .Pp The .Fn bhnd_write_config function is used to write a data item of .Fa width bytes with .Fa value at .Fa offset from the backplane-specific agent/config space of the device .Fa dev . The requested .Fa width must be one of 1, 2, or 4 bytes. .Pp The agent/config space accessible via .Fn bhnd_read_config and .Fn bhnd_write_config is backplane-specific, and these functions should only be used for functionality that is not available via another .Nm function. .Pp The .Fn bhnd_suspend_hw function transitions the device .Fa dev to a low power .Dq RESET state, writing .Fa ioctl to the I/O control flags of .Fa dev . The hardware may be brought out of this state using .Fn bhnd_reset_hw . .Pp The .Fn bhnd_reset_hw function first transitions the device .Fa dev to a low power RESET state, writing .Fa ioctl_reset to the I/O control flags of .Fa dev , and then brings the device out of RESET, writing .Fa ioctl to the device's I/O control flags. .Pp The .Fn bhnd_is_hw_suspended function returns .Dv true if the device .Fa dev is currently held in a RESET state, or is otherwise not clocked. Otherwise, it returns .Dv false . .Pp Any outstanding per-device PMU requests made using .Fn bhnd_enable_clocks , .Fn bhnd_request_clock , or .Fn bhnd_request_ext_rsrc will be released automatically upon placing a device into a RESET state. .Ss "Device Information Functions" The .Fn bhnd_get_attach_type function returns the attachment type of the parent .Xr bhnd 4 bus of device .Fa dev . .Pp The following attachment types are supported: .Bl -hang -width ".Dv BHND_ATTACH_ADAPTER" -offset indent .It Dv BHND_ATTACH_ADAPTER The bus is resident on a bridged adapter, such as a PCI Wi-Fi device. .It Dv BHND_ATTACH_NATIVE The bus is resident on the native host, such as the primary or secondary bus of an embedded SoC. .El .Pp The .Fn bhnd_get_chipid function returns chip information from the parent .Xr bhnd 4 bus of device .Fa dev . The returned .Vt bhnd_chipid struct contains the following fields: .Pp .Bl -tag -width "enum_addr" -offset indent .It Fa chip_id The chip identifier. .It Fa chip_rev The chip's hardware revision. .It Fa chip_pkg The chip's semiconductor package identifier. .Pp Several different physical semiconductor package variants may exist for a given chip, each of which may require driver workarounds for hardware errata, unpopulated components, etc. .It Fa chip_type The interconnect architecture used by this chip. +.It Fa chip_caps +The +.Nm +capability flags supported by this chip. .It Fa enum_addr The backplane enumeration address. On SSB devices, this will be the base address of the first SSB core. On BCMA devices, this will be the address of the enumeration ROM (EROM) core. .It Fa ncores The number of cores on the chip backplane, or 0 if unknown. .El .Pp The following constants are defined for known .Fa chip_type values: .Bl -tag -width ".Dv BHND_CHIPTYPE_BCMA_ALT" -offset indent -compact .It Dv BHND_CHIPTYPE_SIBA SSB interconnect. .It Dv BHND_CHIPTYPE_BCMA BCMA interconnect. .It Dv BHND_CHIPTYPE_BCMA_ALT BCMA-compatible variant found in Broadcom Northstar ARM SoCs. .It Dv BHND_CHIPTYPE_UBUS UBUS interconnect. This BCMA-derived interconnect is found in Broadcom BCM33xx DOCSIS SoCs, and BCM63xx xDSL SoCs. UBUS is not currently supported by .Xr bhnd 4 . +.El +.Pp +The following +.Fa chip_caps +flags are supported: +.Bl -tag -width ".Dv BHND_CAP_BP64" -offset indent -compact +.It Dv BHND_CAP_BP64 +The backplane supports 64-bit addressing. +.It Dv BHND_CAP_PMU +PMU is present. .El .Pp Additional symbolic constants for known .Fa chip_id , .Fa chip_pkg , and .Fa chip_type values are defined in .In dev/bhnd/bhnd_ids.h . .Pp The .Fn bhnd_get_class function returns the BHND class of device .Fa dev , if the device's .Em vendor and .Em device identifiers are recognized. Otherwise, returns .Dv BHND_DEVCLASS_OTHER . .Pp One of the following device classes will be returned: .Pp .Bl -tag -width ".Dv BHND_DEVCLASS_SOC_ROUTER" -offset indent -compact .It Dv BHND_DEVCLASS_CC ChipCommon I/O Controller .It Dv BHND_DEVCLASS_CC_B ChipCommon Auxiliary Controller .It Dv BHND_DEVCLASS_PMU PMU Controller .It Dv BHND_DEVCLASS_PCI PCI Host/Device Bridge .It Dv BHND_DEVCLASS_PCIE PCIe Host/Device Bridge .It Dv BHND_DEVCLASS_PCCARD PCMCIA Host/Device Bridge .It Dv BHND_DEVCLASS_RAM Internal RAM/SRAM .It Dv BHND_DEVCLASS_MEMC Memory Controller .It Dv BHND_DEVCLASS_ENET IEEE 802.3 MAC/PHY .It Dv BHND_DEVCLASS_ENET_MAC IEEE 802.3 MAC .It Dv BHND_DEVCLASS_ENET_PHY IEEE 802.3 PHY .It Dv BHND_DEVCLASS_WLAN IEEE 802.11 MAC/PHY/Radio .It Dv BHND_DEVCLASS_WLAN_MAC IEEE 802.11 MAC .It Dv BHND_DEVCLASS_WLAN_PHY IEEE 802.11 PHY .It Dv BHND_DEVCLASS_CPU CPU Core .It Dv BHND_DEVCLASS_SOC_ROUTER Interconnect Router .It Dv BHND_DEVCLASS_SOC_BRIDGE Interconnect Host Bridge .It Dv BHND_DEVCLASS_EROM Device Enumeration ROM .It Dv BHND_DEVCLASS_NVRAM NVRAM/Flash Controller .It Dv BHND_DEVCLASS_SOFTMODEM Analog/PSTN SoftModem Codec .It Dv BHND_DEVCLASS_USB_HOST USB Host Controller .It Dv BHND_DEVCLASS_USB_DEV USB Device Controller .It Dv BHND_DEVCLASS_USB_DUAL USB Host/Device Controller .It Dv BHND_DEVCLASS_OTHER Other / Unknown .It Dv BHND_DEVCLASS_INVALID Invalid Class .El .Pp The .Fn bhnd_get_core_info function returns the core information for device .Fa dev . The returned .Vt bhnd_core_info structure contains the following fields: .Pp .Bl -tag -width "core_idx" -offset indent -compact .It Fa vendor Vendor identifier (JEP-106, ARM 4-bit continuation encoded) .It Fa device Device identifier .It Fa hwrev Hardware revision .It Fa core_idx Core index .It Fa unit Core unit .El .Pp Symbolic constants for common vendor and device identifiers are defined in .In dev/bhnd/bhnd_ids.h . Common vendor identifiers include: .Pp .Bl -tag -width ".Dv BHND_MFGID_MIPS" -offset indent -compact .It Dv BHND_MFGID_ARM ARM .It Dv BHND_MFGID_BCM Broadcom .It Dv BHND_MFGID_MIPS MIPS .El .Pp The .Fn bhnd_get_core_index , .Fn bhnd_get_core_unit , .Fn bhnd_get_device , .Fn bhnd_get_hwrev , and .Fn bhnd_get_vendor functions are convenience wrappers for .Fn bhnd_get_core_info , returning, respect the .Fa core_idx , .Fa core_unit , .Fa device , .Fa hwrev , or .Fa vendor field from the .Vt bhnd_core_info structure. .Pp The .Fn bhnd_get_device_name function returns a human readable name for device .Fa dev . .Pp The .Fn bhnd_get_vendor_name function returns a human readable name for the vendor of device .Fa dev . .Pp The .Fn bhnd_read_board_info function attempts to read the board information for device .Fa dev . The board information will be returned in the location pointed to by .Fa info on success. .Pp The .Vt bhnd_board_info structure contains the following fields: .Pp .Bl -tag -width "board_srom_rev" -offset indent .It Fa board_vendor Vendor ID of the board manufacturer (PCI-SIG assigned). .It Fa board_type Board ID. .It Fa board_devid Device ID. .It Fa board_rev Board revision. .It Fa board_srom_rev Board SROM format revision. .It Fa board_flags Board flags (1) .It Fa board_flags2 Board flags (2) .It Fa board_flags3 Board flags (3) .El .Pp The .Fa board_devid field is the Broadcom PCI device ID that most closely matches the capabilities of the BHND device (if any). .Pp On PCI devices, the .Fa board_vendor , .Fa board_type , and .Fa board_devid fields default to the PCI Subsystem Vendor ID, PCI Subsystem ID, and PCI device ID, unless overridden in device NVRAM. .Pp On other devices, including SoCs, the .Fa board_vendor , .Fa board_type , and .Fa board_devid fields will be populated from device NVRAM. .Pp Symbolic constants for common board flags are defined in .In dev/bhnd/bhnd_ids.h . .Pp .Ss "Device Matching Functions" The bhnd device matching functions are used to match against core, chip, and board-level device attributes. Match requirements are specified using the .Vt "struct bhnd_board_match" , .Vt "struct bhnd_chip_match" , .Vt "struct bhnd_core_match" , .Vt "struct bhnd_device_match" , and .Vt "struct bhnd_hwrev_match" match descriptor structures. .Pp The .Fn bhnd_board_matches function returns .Dv true if .Fa board matches the board match descriptor .Fa desc . Otherwise, it returns .Dv false . .Pp The .Fn bhnd_chip_matches function returns .Dv true if .Fa chip matches the chip match descriptor .Fa desc . Otherwise, it returns .Dv false . .Pp The .Fn bhnd_core_matches function returns .Dv true if .Fa core matches the core match descriptor .Fa desc . Otherwise, it returns .Dv false . .Pp The .Fn bhnd_device_matches function returns .Dv true if the device .Fa dev matches the device match descriptor .Fa desc . Otherwise, it returns .Dv false . .Pp The .Fn bhnd_hwrev_matches function returns .Dv true if .Fa hwrev matches the hwrev match descriptor .Fa desc . Otherwise, it returns .Dv false . .Pp The .Fn bhnd_bus_match_child function returns the first child device of .Fa bus that matches the device match descriptor .Fa desc . If no matching child is found, .Dv NULL is returned. .Pp The .Fn bhnd_core_get_match_desc function returns an equality match descriptor for the core info in .Fa core . The returned descriptor will match only on core attributes identical to those defined by .Fa core . .Pp The .Fn bhnd_cores_equal function is a convenience wrapper for .Fn bhnd_core_matches and .Fn bhnd_core_get_match_desc . This function returns .Dv true if the .Vt bhnd_core_info structures .Fa lhs and .Fa rhs are equal. Otherwise, it returns .Dv false . .Pp The .Fn bhnd_match_core function returns a pointer to the first entry in the array .Fa cores of length .Fa num_cores that matches .Fa desc . If no matching core is found, .Dv NULL is returned. .Pp A .Vt bhnd_board_match match descriptor may be initialized using one or more of the following macros: .Pp .Bl -tag -width "Fn BHND_MATCH_BOARD_VENDOR vendor" -offset indent .It Fn BHND_MATCH_BOARD_VENDOR "vendor" Match on boards with a vendor equal to .Fa vendor . .It Fn BHND_MATCH_BOARD_TYPE "type" Match on boards with a type equal to .Dv "BHND_BOARD_ ##" .Fa type .It Fn BHND_MATCH_SROMREV "sromrev" Match on boards with a sromrev that matches .Dv "BHND_HWREV_ ##" .Fa sromrev . .It Fn BHND_MATCH_BOARD_REV "hwrev" Match on boards with hardware revisions that match .Dv "BHND_ ##" .Fa hwrev . .It Fn BHND_MATCH_BOARD "vendor" "type" A convenience wrapper for .Fn BHND_MATCH_BOARD_VENDOR and .Fn BHND_MATCH_BOARD_TYPE . .El .Pp For example: .Bd -literal -offset indent struct bhnd_board_match board_desc = { BHND_MATCH_BOARD_VENDOR(BHND_MFGID_BROADCOM), BHND_MATCH_BOARD_TYPE(BCM94360X52C), BHND_MATCH_BOARD_REV(HWREV_ANY), BHND_MATCH_SROMREV(RANGE(0, 10)) }; .Ed .Pp A .Vt bhnd_chip_match match descriptor may be initialized using one or more of the following macros: .Pp .Bl -tag -width "Fn BHND_MATCH_CHIP_IPR id pkg hwrev" -offset indent .It Fn BHND_MATCH_CHIP_ID "id" Match on chips with an ID equal to .Dv "BHND_CHIPID_ ##" .Fa id .It Fn BHND_MATCH_CHIP_REV "hwrev" Match on chips with hardware revisions that match .Dv "BHND_ ##" .Fa hwrev . .It Fn BHND_MATCH_CHIP_PKG "pkg" Match on chips with a package ID equal to .Dv "BHND_PKGID_ ##" .Fa pkg .It Fn BHND_MATCH_CHIP_TYPE "type" Match on chips with a chip type equal to .Dv "BHND_CHIPTYPE_ ##" .Fa type .It Fn BHND_MATCH_CHIP_IP "id" "pkg" A convenience wrapper for .Fn BHND_MATCH_CHIP_ID and .Fn BHND_MATCH_CHIP_PKG . .It Fn BHND_MATCH_CHIP_IPR "id" "pkg" "hwrev" A convenience wrapper for .Fn BHND_MATCH_CHIP_ID , .Fn BHND_MATCH_CHIP_PKG , and .Fn BHND_MATCH_CHIP_REV . .It Fn BHND_MATCH_CHIP_IR "id" "hwrev" A convenience wrapper for .Fn BHND_MATCH_CHIP_ID and .Fn BHND_MATCH_CHIP_REV . .El .Pp For example: .Bd -literal -offset indent struct bhnd_chip_match chip_desc = { BHND_MATCH_CHIP_IP(BCM4329, BCM4329_289PIN), BHND_MATCH_CHIP_TYPE(SIBA) }; .Ed .Pp A .Vt bhnd_core_match match descriptor may be initialized using one or more of the following macros: .Pp .Bl -tag -width "Fn BHND_MATCH_CORE_VENDOR vendor" -offset indent .It Fn BHND_MATCH_CORE_VENDOR "vendor" Match on cores with a vendor ID equal to .Fa vendor .It Fn BHND_MATCH_CORE_ID "id" Match on cores with a device ID equal to .Fa id .It Fn BHND_MATCH_CORE_REV "hwrev" Match on cores with hardware revisions that match .Dv "BHND_ ##" .Fa hwrev . .It Fn BHND_MATCH_CORE_CLASS "class" Match on cores with a core device class equal to .Fa class .It Fn BHND_MATCH_CORE_IDX "idx" Match on cores with a core index equal to .Fa idx .It Fn BHND_MATCH_CORE_UNIT "unit" Match on cores with a core unit equal to .Fa unit .It Fn BHND_MATCH_CORE "vendor" "id" A convenience wrapper for .Fn BHND_MATCH_CORE_VENDOR and .Fn BHND_MATCH_CORE_ID . .El .Pp For example: .Bd -literal -offset indent struct bhnd_core_match core_desc = { BHND_MATCH_CORE(BHND_MFGID_BROADCOM, BHND_COREID_CC), BHND_MATCH_CORE_REV(HWREV_RANGE(0, 10)) }; .Ed .Pp The .Vt bhnd_device_match match descriptor supports matching on all board, chip, and core attributes, and may be initialized using any of the .Vt bhnd_board_match , .Vt bhnd_chip_match , or .Vt bhnd_core_match macros. .Pp For example: .Bd -literal -offset indent struct bhnd_device_match device_desc = { BHND_MATCH_CHIP_IP(BCM4329, BCM4329_289PIN), BHND_MATCH_BOARD_VENDOR(BHND_MFGID_BROADCOM), BHND_MATCH_BOARD_TYPE(BCM94329AGB), BHND_MATCH_CORE(BHND_MFGID_BROADCOM, BHND_COREID_CC), }; .Ed .Pp A .Vt bhnd_hwrev_match match descriptor may be initialized using one of the following macros: .Pp .Bl -tag -width "Fn BHND_HWREV_RANGE start end" -offset indent -compact .It Dv BHND_HWREV_ANY Matches any hardware revision. .It Fn BHND_HWREV_EQ "hwrev" Matches any hardware revision equal to .Fa hwrev .It Fn BHND_HWREV_GTE "hwrev" Matches any hardware revision greater than or equal to .Fa hwrev .It Fn BHND_HWREV_LTE "hwrev" Matches any hardware revision less than or equal to .Fa hwrev .It Fn BHND_HWREV_RANGE "start" "end" Matches any hardware revision within an inclusive range. If .Dv BHND_HWREV_INVALID is specified as the .Fa end value, will match on any revision equal to or greater than .Fa start .El .\" .Ss "Device Table Functions" The bhnd device table functions are used to query device and quirk tables. .Pp The .Fn bhnd_device_lookup function returns a pointer to the first entry in device table .Fa table that matches the device .Fa dev . The table entry size is specified by .Fa entry_size . .Pp The .Fn bhnd_device_quirks function scan the device table .Fa table for all quirk entries that match the device .Fa dev , returning the bitwise OR of all matching quirk flags. The table entry size is specified by .Fa entry_size . .Pp The .Vt bhnd_device structure contains the following fields: .Bl -tag -width "quirks_table" -offset indent -compact .It Fa core A .Vt bhnd_device_match descriptor. .It Fa desc A verbose device description suitable for use with .Xr device_set_desc 9 , or .Dv NULL . .It Fa quirks_table The quirks table for this device, or .Dv NULL . .It Fa device_flags The device flags required when matching this entry. .El .Pp The following device flags are supported: .Bl -tag -width ".Dv BHND_DF_ADAPTER" -offset indent -compact .It Dv BHND_DF_ANY Match on any device. .It Dv BHND_DF_HOSTB Match only if the device is the .Xr bhndb 4 host bridge. Implies .Dv BHND_DF_ADAPTER . .It Dv BHND_DF_SOC Match only if the device is attached to a native SoC backplane. .It Dv BHND_DF_ADAPTER Match only if the device is attached to a .Xr bhndb 4 bridged backplane. .El .Pp A .Vt bhnd_device table entry may be initialized using one of the following macros: .Pp .Bl -ohang -offset indent .It Fn BHND_DEVICE "vendor" "device" "desc" "quirks" "flags" Match on devices with a vendor ID equal to .Dv BHND_MFGID_ ## .Fa vendor and a core device ID equal to .Dv BHND_COREID_ ## .Fa device . .Pp The device's verbose description is specified by the .Fa desc argument, a pointer to the device-specific quirks table is specified by the .Fa quirks argument, and any required device flags may be provided in .Fa flags . The optional .Fa flags argument defaults to .Dv BHND_DF_ANY if omitted. .It Dv BHND_DEVICE_END Terminate the .Vt bhnd_device table. .El .Pp For example: .Bd -literal -offset indent struct bhnd_device bhnd_usb11_devices[] = { BHND_DEVICE(BCM, USB, "Broadcom USB1.1 Controller", bhnd_usb11_quirks), BHND_DEVICE_END }; .Ed .Pp The .Vt bhnd_device_quirk structure contains the following fields: .Bl -tag -width "quirks_table" -offset indent -compact .It Fa desc A .Vt bhnd_device_match descriptor. .It Fa quirks Applicable quirk flags. .El .Pp A bhnd_device_quirk table entry may be initialized using one of the following convenience macros: .Bl -tag -width "Fn BHND_CHIP_QUIRK chip hwrev flags" -offset indent .It Fn BHND_BOARD_QUIRK "board" "flags" Set quirk flags .Fa flags on devices with a board type equal to .Dv BHND_BOARD_ ## .Fa board . .It Fn BHND_CHIP_QUIRK "chip" "hwrev" "flags" Set quirk flags .Fa flags on devices with a chip ID equal to .Dv BHND_CHIPID_BCM ## .Fa chip and chip hardware revision that matches .Dv BHND_ ## .Fa hwrev . .It Fn BHND_PKG_QUIRK "chip" "pkg" flags" Set quirk flags .Fa flags on devices with a chip ID equal to .Dv BHND_CHIPID_BCM ## .Fa chip and chip package equal to .Dv BHND_ ## chip ## .Fa pkg . .It Fn BHND_CORE_QUIRK "hwrev" flags" Set quirk flags .Fa flags on devices with a core hardware revision that matches .Dv BHND_ ## .Fa hwrev . .El For example: .Bd -literal -offset indent struct bhnd_device_quirk bhnd_usb11_quirks[] = { BHND_DEVICE(BCM, USB, "Broadcom USB1.1 Controller", bhnd_usb11_quirks), BHND_DEVICE_END }; .Ed .Ss "DMA Address Translation Functions" The .Fn bhnd_get_dma_translation function is used to request a DMA address translation descriptor suitable for use with a maximum DMA address width of .Fa width , with support for the requested translation .Fa flags . .Pp If a suitable DMA address translation descriptor is found, it will be stored in .Fa translation , and a bus DMA tag specifying the DMA translation's address restrictions will be stored in .Fa dmat . The .Fa translation and .Fa dmat arguments may be .Dv NULL if the translation descriptor or DMA tag are not desired. .Pp The following DMA translation flags are supported: .Bl -ohang -width ".Dv BHND_DMA_TRANSLATION_BYTESWAPPED" -offset indent .It Dv BHND_DMA_TRANSLATION_PHYSMAP The translation remaps the device's physical address space. .Pp This is used in conjunction with .Dv BHND_DMA_TRANSLATION_BYTESWAPPED to define a DMA translation that provides byteswapped access to physical memory on big-endian MIPS SoCs. .It Dv BHND_DMA_TRANSLATION_BYTESWAPPED The translation provides a byte-swapped mapping; write requests will be byte-swapped before being written to memory, and read requests will be byte-swapped before being returned. .Pp This is primarily used to perform efficient byte swapping of DMA data on embedded MIPS SoCs executing in big-endian mode. .El .Pp The following symbolic constants are defined for common DMA address widths: .Pp .Bl -tag -width ".Dv BHND_DMA_ADDR_64BIT" -offset indent -compact .It Dv BHND_DMA_ADDR_30BIT 30-bit DMA .It Dv BHND_DMA_ADDR_32BIT 32-bit DMA .It Dv BHND_DMA_ADDR_64BIT 64-bit DMA .El .Pp The .Vt bhnd_dma_translation structure contains the following fields: .Bl -tag -width "addrext_mask" .It Fa base_addr Host-to-device physical address translation. This may be added to a host physical address to produce a device DMA address. .It Fa addr_mask Device-addressable address mask. This defines the device DMA address range, and excludes any bits reserved for mapping the address within the translation window at .Fa base_addr . .It Fa addrext_mask Device-addressable extended address mask. If a the per-core BHND DMA engine supports the 'addrext' control field, it can be used to provide address bits excluded by .Fa addr_mask . .Pp Support for DMA extended address changes \(em including coordination with the core providing device-to-host DMA address translation \(em is handled transparently by the DMA engine. .Pp For example, on PCI Wi-Fi devices, the Wi-Fi core's DMA engine will (in effect) update the PCI host bridge core's DMA .Dv sbtopcitranslation base address to map the target address prior to performing a DMA transaction. .It Fa flags Translation flags. .El .\" .Ss "Interrupt Functions" The .Fn bhnd_get_intr_count function is used to determine the number of backplane interrupt lines assigned to the device .Fa dev . Interrupt line identifiers are allocated in monotonically increasing order, starting with 0. .Pp The .Fn bhnd_get_intr_ivec function is used to determine the backplane interrupt vector assigned to interrupt line .Fa intr on the device .Fa dev , writing the result to .Fa ivec . Interrupt vector assignments are backplane-specific: On BCMA devices, this function returns the OOB bus line assigned to the interrupt. On SIBA devices, it returns the target OCP slave flag number assigned to the interrupt. .Pp The .Fn bhnd_map_intr function is used to map interrupt line .Fa intr assigned to device .Fa dev to an IRQ number, writing the result to .Fa irq . Until unmapped, this IRQ may be used when allocating a resource of type SYS_RES_IRQ. .Pp Ownership of the interrupt mapping is assumed by the caller, and must be explicitly released using .Fa bhnd_unmap_intr . .Pp The .Fn bhnd_unmap_intr function is used to unmap bus IRQ .Fa irq previously mapped using .Fn bhnd_map_intr by the device .Fa dev . .\" .Ss "NVRAM Functions" The .Fn bhnd_nvram_getvar function is used to read the value of NVRAM variable .Fa name from the NVRAM provider(s) registered with the parent .Xr bhnd 4 bus of device .Fa dev , coerced to the desired data representation .Fa type , written to the buffer specified by .Fa buf . .Pp Before the call, the maximum capacity of .Fa buf is specified by .Fa len . After a successful call \(em or if .Er ENOMEM is returned \(em the size of the available data will be written to .Fa len . The size of the desired data representation can be determined by calling .Fn bhnd_nvram_getvar with a .Dv NULL argument for .Fa buf . .Pp The following NVRAM data types are supported: .Pp .Bl -tag -width ".Dv BHND_NVRAM_TYPE_UINT64_ARRAY" -offset indent -compact .It Dv BHND_NVRAM_TYPE_UINT8 unsigned 8-bit integer .It Dv BHND_NVRAM_TYPE_UINT16 unsigned 16-bit integer .It Dv BHND_NVRAM_TYPE_UINT32 unsigned 32-bit integer .It Dv BHND_NVRAM_TYPE_UINT64 signed 64-bit integer .It Dv BHND_NVRAM_TYPE_INT8 signed 8-bit integer .It Dv BHND_NVRAM_TYPE_INT16 signed 16-bit integer .It Dv BHND_NVRAM_TYPE_INT32 signed 32-bit integer .It Dv BHND_NVRAM_TYPE_INT64 signed 64-bit integer .It Dv BHND_NVRAM_TYPE_CHAR UTF-8 character .It Dv BHND_NVRAM_TYPE_STRING UTF-8 NUL-terminated string .It Dv BHND_NVRAM_TYPE_BOOL uint8 boolean value .It Dv BHND_NVRAM_TYPE_NULL NULL (empty) value .It Dv BHND_NVRAM_TYPE_DATA opaque octet string .It Dv BHND_NVRAM_TYPE_UINT8_ARRAY array of uint8 integers .It Dv BHND_NVRAM_TYPE_UINT16_ARRAY array of uint16 integers .It Dv BHND_NVRAM_TYPE_UINT32_ARRAY array of uint32 integers .It Dv BHND_NVRAM_TYPE_UINT64_ARRAY array of uint64 integers .It Dv BHND_NVRAM_TYPE_INT8_ARRAY array of int8 integers .It Dv BHND_NVRAM_TYPE_INT16_ARRAY array of int16 integers .It Dv BHND_NVRAM_TYPE_INT32_ARRAY array of int32 integers .It Dv BHND_NVRAM_TYPE_INT64_ARRAY array of int64 integers .It Dv BHND_NVRAM_TYPE_CHAR_ARRAY array of UTF-8 characters .It Dv BHND_NVRAM_TYPE_STRING_ARRAY array of UTF-8 NUL-terminated strings .It Dv BHND_NVRAM_TYPE_BOOL_ARRAY array of uint8 boolean values .El .Pp The .Fn bhnd_nvram_getvar_array , .Fn bhnd_nvram_getvar_int , .Fn bhnd_nvram_getvar_int8 , .Fn bhnd_nvram_getvar_int16 , .Fn bhnd_nvram_getvar_int32 , .Fn bhnd_nvram_getvar_uint , .Fn bhnd_nvram_getvar_uint8 , .Fn bhnd_nvram_getvar_uint16 , .Fn bhnd_nvram_getvar_uint32 , and .Fn bhnd_nvram_getvar_str functions are convenience wrappers for .Fn bhnd_nvram_getvar . .Pp The .Fn bhnd_nvram_getvar_array function returns either a value of exactly .Fa size in .Fa buf , or returns an error code of .Er ENXIO if the data representation is not exactly .Fa size in length. .Pp The .Fn bhnd_nvram_getvar_int and .Fn bhnd_nvram_getvar_uint functions return the value of NVRAM variable .Fa name , coerced to a signed or unsigned integer type of .Fa width (1, 2, or 4 bytes). .Pp The .Fn bhnd_nvram_getvar_int8 , .Fn bhnd_nvram_getvar_int16 , .Fn bhnd_nvram_getvar_int32 , .Fn bhnd_nvram_getvar_uint , .Fn bhnd_nvram_getvar_uint8 , .Fn bhnd_nvram_getvar_uint16 , and .Fn bhnd_nvram_getvar_uint32 functions return the value of NVRAM variable .Fa name , coerced to a signed or unsigned 8, 16, or 32-bit integer type. .Pp The .Fn bhnd_nvram_getvar_str functions return the value of NVRAM variable .Fa name , coerced to a NUL-terminated string. .Pp The .Fn bhnd_nvram_string_array_next function iterates over all strings in the .Fa inp .Dv BHND_NVRAM_TYPE_STRING_ARRAY value. The size of .Fa inp , including any terminating NUL character(s), is specified using the .Fa ilen argument. The .Fa prev argument should be either a string pointer previously returned by .Fn bhnd_nvram_string_array_next , or .Dv NULL to begin iteration. If .Fa prev is not .Dv NULL , the .Fa olen argument must be a pointer to the length previously returned by .Fn bhnd_nvram_string_array_next . On success, the next string element's length will be written to this pointer. .\" .Ss "Port/Region Functions" Per-device interconnect memory mappings are identified by a combination of .Em port type , .Em port number , and .Em region number . Port and memory region identifiers are allocated in monotonically increasing order for each .Em port type , starting with 0. .Pp The following port types are supported: .Bl -tag -width ".Dv BHND_PORT_DEVICE" -offset indent .It Dv BHND_PORT_DEVICE Device memory. The device's control/status registers are always mapped by the first device port and region, and will be assigned a .Dv SYS_RES_MEMORY resource ID of 0. .It Dv BHND_PORT_BRIDGE Bridge memory. .It Dv BHND_PORT_AGENT Interconnect agent/wrapper. .El .Pp The .Fn bhnd_decode_port_rid function is used to decode the resource ID .Fa rid assigned to device .Fa dev , of resource type .Fa type , writing the port type to .Fa port_type , port number to .Fa port , and region number to .Fa region . .Pp The .Fn bhnd_get_port_count function returns the number of ports of type .Fa type assigned to device .Fa dev . .Pp The .Fn bhnd_get_port_rid function returns the resource ID for the .Dv SYS_RES_MEMORY resource mapping the .Fa port of .Fa type and .Fa region on device .Fa dev , or -1 if the port or region are invalid, or do not have an assigned resource ID. .Pp The .Fn bhnd_get_region_addr function is used to determine the base address and size of the memory .Fa region on .Fa port of .Fa type assigned to .Fa dev . The region's base device address will be written to .Fa region_addr , and the region size to .Fa region_size . .Pp The .Fn bhnd_get_region_count function returns the number of memory regions mapped to .Fa port of .Fa type on device .Fa dev . .Pp The .Fn bhnd_is_region_valid function returns .Dv true if .Fa region is a valid region mapped by .Fa port of .Fa type on device .Fa dev . .\" .Ss "Power Management Functions" Drivers must ask the parent .Xr bhnd 4 bus to allocate device PMU state using .Fn bhnd_alloc_pmu before calling any another bhnd PMU functions. .Pp The .Fn bhnd_alloc_pmu function is used to allocate per-device PMU state and enable PMU request handling for device .Fa dev . The memory region containing the device's PMU register block must be allocated using .Xr bus_alloc_resource 9 or .Fn bhnd_alloc_resource before calling .Fn bhnd_alloc_pmu , and must not be released until after calling .Fn bhnd_release_pmu . .Pp On all supported BHND hardware, the PMU register block is mapped by the device's control/status registers in the first device port and region. .Pp The .Fn bhnd_release_pmu function releases the per-device PMU state previously allocated for device .Fa dev using .Fn bhnd_alloc_pmu . Any outstanding clock and external resource requests will be discarded upon release of the device PMU state. .Pp The .Fn bhnd_enable_clocks function is used to request that .Fa clocks be powered up and routed to the backplane on behalf of device .Fa dev . This will power any clock sources required (e.g., XTAL, PLL, etc) and wait until the requested clocks are stable. If the request succeeds, any previous clock requests issued by .Fa dev will be discarded. .Pp The following clocks are supported, and may be combined using bitwise OR to request multiple clocks: .Pp .Bl -tag -width ".Dv BHND_CLOCK_DYN" -offset indent .It BHND_CLOCK_DYN Dynamically select an appropriate clock source based on all outstanding clock requests by any device attached to the parent .Xr bhnd 4 bus. .It BHND_CLOCK_ILP Idle Low-Power (ILP) Clock. May be used if no register access is required, or long request latency is acceptable. .It BHND_CLOCK_ALP Active Low-Power (ALP) Clock. Supports low-latency register access and low-rate DMA. .It BHND_CLOCK_HT High Throughput (HT) Clock. Supports high bus throughput and lowest-latency register access. .El .Pp The .Fn bhnd_request_clock function is used to request that .Fa clock (or faster) be powered up and routed to device .Fa dev . .Pp The .Fn bhnd_get_clock_freq function is used to request the current clock frequency of .Fa clock , writing the frequency in Hz to .Fa freq . .Pp The .Fn bhnd_get_clock_latency function is used to determine the transition latency required for .Fa clock , writing the latency in microseconds to .Fa latency . The .Dv BHND_CLOCK_HT latency value is suitable for use as the D11 Wi-Fi core .Em fastpwrup_dly value. .Pp The .Fn bhnd_request_ext_rsrc function is used to request that the external PMU-managed resource assigned to device .Fa dev , identified by device-specific identifier .Fa rsrc , be powered up. .Pp The .Fn bhnd_release_ext_rsrc function releases any outstanding requests by device .Fa dev for the PMU-managed resource identified by device-specific identifier .Fa rsrc . If an external resource is shared by multiple devices, it will not be powered down until all device requests are released. .\" .Ss "Service Provider Functions" The .Fn bhnd_register_provider function is used to register device .Fa dev as a provider for platform .Fa service with the parent .Xr bhnd 4 bus. .Pp The following service types are supported: .Bl -tag -width ".Dv BHND_SERVICE_INVALID" -offset indent .It Dv BHND_SERVICE_CHIPC ChipCommon service. The providing device must implement the bhnd_chipc interface. .It Dv BHND_SERVICE_PWRCTL Legacy PWRCTL service. The providing device must implement the bhnd_pwrctl interface. .It Dv BHND_SERVICE_PMU PMU service. The providing device must implement the bhnd_pmu interface. .It Dv BHND_SERVICE_NVRAM NVRAM service. The providing device must implement the bhnd_nvram interface. .It Dv BHND_SERVICE_GPIO GPIO service. The providing device must implement the standard .Xr gpio 4 interface. .It Dv BHND_SERVICE_ANY Matches on any service type. May be used with .Fn bhnd_deregister_provider to remove all service provider registrations for a device. .El .Pp The .Fn bhnd_deregister_provider function attempts to remove provider registration for the device .Fa dev and .Fa service . If a .Fa service argument of .Dv BHND_SERVICE_ANY is specified, this function will attempt to remove .Em all service provider registrations for .Fa dev . .Pp The .Fn bhnd_retain_provider function retains and returns a reference to the provider registered for .Fa service with the parent .Xr bhnd 4 bus of devce .Fa dev , if available. On success, the caller is responsible for releasing this provider reference using .Fn bhnd_release_provider . The service provider is guaranteed to remain available until the provider reference is released. .Pp The .Fn bhnd_release_provider function releases a reference to a .Fa provider for .Fa service , previously retained by device .Fa dev using .Fn bhnd_retain_provider . .\" .Ss "Utility Functions" The .Fn bhnd_driver_get_erom_class function returns the .Xr bhnd_erom 9 class for the device enumeration table format used by .Xr bhnd 4 bus driver instance .Fa driver . If the driver does not support .Xr bhnd_erom 9 device enumeration, .Dv NULL is returned. .Pp The .Fn bhnd_find_core_class function looks up the BHND class, if known, for the BHND vendor ID .Fa vendor and device ID .Fa device . .Pp The .Fn bhnd_find_core_name function is used to fetch the human-readable name, if known, for the BHND core with a vendor ID of .Fa vendor and device ID of .Fa device . .Pp The .Fn bhnd_core_class and .Fn bhnd_core_name functions are convenience wrappers for .Fn bhnd_find_core_class and .Fn bhnd_find_core_name , that use the .Fa vendor and .Fa device fields of the core info structure .Fa ci . .Pp The .Fn bhnd_format_chip_id function writes a NUL-terminated human-readable representation of the BHND .Fa chip_id value to the specified .Fa buffer with a capacity of .Fa size . No more than .Fa size-1 characters will be written, with the .Fa size'th character set to '\\0'. A buffer size of .Dv BHND_CHIPID_MAX_NAMELEN is sufficient for any string representation produced using .Fn bhnd_format_chip_id . .Pp The .Fn bhnd_set_custom_core_desc function uses the .Xr bhnd 4 device identification of .Fa dev , overriding the core name with the specified .Fa dev_name , to populate the device's verbose description using .Xr device_set_desc . .Pp The .Fn bhnd_set_default_core_desc function uses the .Xr bhnd 4 device identification of .Fa dev to populate the device's verbose description using .Xr device_set_desc . .Pp The .Fn bhnd_vendor_name function returns the human-readable name for the JEP-106, ARM 4-bit continuation encoded manufacturer ID .Fa vendor , if known. .\" .Sh RETURN VALUES .Ss Bus Resource Functions The .Fn bhnd_activate_resource , .Fn bhnd_alloc_resources , .Fn bhnd_deactivate_resource , and .Fn bhnd_release_resource functions return 0 on success, otherwise an appropriate error code is returned. .Pp The .Fn bhnd_alloc_resource and .Fn bhnd_alloc_resource_any functions return a pointer to .Vt "struct resource" on success, a null pointer otherwise. .\" .Ss "Device Configuration Functions" .Pp The .Fn bhnd_read_config and .Fn bhnd_write_config functions return 0 on success, or one of the following values on error: .Bl -tag -width Er .It Bq Er EINVAL The device is not a direct child of the .Xr bhnd 4 bus .It Bq Er EINVAL The requested width is not one of 1, 2, or 4 bytes. .It Bq Er ENODEV Accessing agent/config space for the device is unsupported. .It Bq Er EFAULT The requested offset or width exceeds the bounds of the mapped agent/config space. .El .Pp The .Fn bhnd_read_ioctl , .Fn bhnd_write_ioctl , .Fn bhnd_read_iost , .Fn bhnd_reset_hw , and .Fn bhnd_suspend_hw functions return 0 on success, otherwise an appropriate error code is returned. .\" .Ss "Device Information Functions" .Pp The .Fn bhnd_read_board_info function returns 0 on success, otherwise an appropriate error code is returned. .\" .Ss "DMA Address Translation Functions" The .Fn bhnd_get_dma_translation function returns 0 on success, or one of the following values on error: .Bl -tag -width Er .It Bq Er ENODEV DMA is not supported. .It Bq Er ENOENT No DMA translation matching the requested address width and translation flags is available. .El .Pp If fetching the requested DMA address translation otherwise fails, an appropriate error code will be returned. .\" .Ss "Interrupt Functions" .Pp The .Fn bhnd_get_intr_ivec function returns 0 on success, or .Er ENXIO if the requested interrupt line exceeds the number of interrupt lines assigned to the device. .Pp The .Fn bhnd_map_intr function returns 0 on success, otherwise an appropriate error code is returned. .\" .Ss "NVRAM Functions" The .Fn bhnd_nvram_getvar , .Fn bhnd_nvram_getvar_array , .Fn bhnd_nvram_getvar_int , .Fn bhnd_nvram_getvar_int8 , .Fn bhnd_nvram_getvar_int16 , .Fn bhnd_nvram_getvar_int32 , .Fn bhnd_nvram_getvar_uint , .Fn bhnd_nvram_getvar_uint8 , .Fn bhnd_nvram_getvar_uint16 , and .Fn bhnd_nvram_getvar_uint32 functions return 0 on success, or one of the following values on error: .Bl -tag -width Er .It Bq Er ENODEV If an NVRAM provider has not been registered with the bus. .It Bq Er ENOENT The requested variable was not found. .It Bq Er ENOMEM If the buffer of size is too small to hold the requested value. .It Bq Er EOPNOTSUPP If the value's native type is incompatible with and cannot be coerced to the requested type. .It Bq Er ERANGE If value coercion would overflow (or underflow) the requested type .El .Pp If reading the variable otherwise fails, an appropriate error code will be returned. .\" .Ss "Port/Region Functions" The .Fn bhnd_decode_port_rid function returns 0 on success, or an appropriate error code if no matching port/region is found. .Pp The .Fn bhnd_get_port_rid function returns the resource ID for the requested port and region, or -1 if the port or region are invalid, or do not have an assigned resource ID. .Pp The .Fn bhnd_get_region_addr function returns 0 on success, or an appropriate error code if no matching port/region is found. .\" .Ss "PMU Functions" The .Fn bhnd_alloc_pmu function returns 0 on success, otherwise an appropriate error code is returned. .Pp The .Fn bhnd_release_pmu function returns 0 on success, otherwise an appropriate error code is returned, and the core state will be left unmodified. .Pp The .Fn bhnd_enable_clocks and .Fn bhnd_request_clock functions return 0 on success, or one of the following values on error: .Bl -tag -width Er .It Bq Er ENODEV An unsupported clock was requested. .It Bq Er ENXIO No PMU or PWRCTL provider has been registered with the bus. .El .Pp The .Fn bhnd_get_clock_freq function returns 0 on success, or .Er ENODEV if the frequency for the specified clock is not available. .Pp The .Fn bhnd_get_clock_latency function returns 0 on success, or .Er ENODEV if the transition latency for the specified clock is not available. .Pp The .Fn bhnd_request_ext_rsrc and .Fn bhnd_release_ext_rsrc functions return 0 on success, otherwise an appropriate error code is returned. .Pp .\" .Ss "Service Provider Functions" The .Fn bhnd_register_provider function returns 0 on success, .Er EEXIST if an entry for service already exists, or an appropriate error code if service registration otherwise fails. .Pp The .Fn bhnd_deregister_provider function returns 0 on success, or .Er EBUSY if active references to the service provider exist. .Pp The .Fn bhnd_retain_provider function returns a pointer to .Vt "device_t" on success, a null pointer if the requested provider is not registered. .\" .Ss "Utility Functions" .Pp The .Fn bhnd_format_chip_id function returns the total number of bytes written on success, or a negative integer on failure. .\" .Sh SEE ALSO .Xr bhnd 4 .Xr bhnd_erom 9 .Sh AUTHORS .An -nosplit The .Nm driver programming interface and this manual page were written by .An Landon Fuller Aq Mt landonf@FreeBSD.org . Index: head/sys/dev/bhnd/bcma/bcma_erom.c =================================================================== --- head/sys/dev/bhnd/bcma/bcma_erom.c (revision 331743) +++ head/sys/dev/bhnd/bcma/bcma_erom.c (revision 331744) @@ -1,1432 +1,1425 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2015-2017 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include -#include +#include #include "bcma_eromreg.h" #include "bcma_eromvar.h" /* * BCMA Enumeration ROM (EROM) Table * * Provides auto-discovery of BCMA cores on Broadcom's HND SoC. * * The EROM core address can be found at BCMA_CC_EROM_ADDR within the * ChipCommon registers. The table itself is comprised of 32-bit * type-tagged entries, organized into an array of variable-length * core descriptor records. * * The final core descriptor is followed by a 32-bit BCMA_EROM_TABLE_EOF (0xF) * marker. */ static const char *bcma_erom_entry_type_name (uint8_t entry); static int bcma_erom_read32(struct bcma_erom *erom, uint32_t *entry); static int bcma_erom_skip32(struct bcma_erom *erom); static int bcma_erom_skip_core(struct bcma_erom *erom); static int bcma_erom_skip_mport(struct bcma_erom *erom); static int bcma_erom_skip_sport_region(struct bcma_erom *erom); static int bcma_erom_seek_next(struct bcma_erom *erom, uint8_t etype); static int bcma_erom_region_to_port_type(struct bcma_erom *erom, uint8_t region_type, bhnd_port_type *port_type); static int bcma_erom_peek32(struct bcma_erom *erom, uint32_t *entry); static bus_size_t bcma_erom_tell(struct bcma_erom *erom); static void bcma_erom_seek(struct bcma_erom *erom, bus_size_t offset); static void bcma_erom_reset(struct bcma_erom *erom); static int bcma_erom_seek_matching_core(struct bcma_erom *sc, const struct bhnd_core_match *desc, struct bhnd_core_info *core); static int bcma_erom_parse_core(struct bcma_erom *erom, struct bcma_erom_core *core); static int bcma_erom_parse_mport(struct bcma_erom *erom, struct bcma_erom_mport *mport); static int bcma_erom_parse_sport_region(struct bcma_erom *erom, struct bcma_erom_sport_region *region); static void bcma_erom_to_core_info(const struct bcma_erom_core *core, u_int core_idx, int core_unit, struct bhnd_core_info *info); /** * BCMA EROM per-instance state. */ struct bcma_erom { struct bhnd_erom obj; device_t dev; /**< parent device, or NULL if none. */ struct bhnd_erom_io *eio; /**< bus I/O callbacks */ bhnd_size_t offset; /**< current read offset */ }; #define EROM_LOG(erom, fmt, ...) do { \ printf("%s erom[0x%llx]: " fmt, __FUNCTION__, \ (unsigned long long)(erom->offset), ##__VA_ARGS__); \ } while(0) /** Return the type name for an EROM entry */ static const char * bcma_erom_entry_type_name (uint8_t entry) { switch (BCMA_EROM_GET_ATTR(entry, ENTRY_TYPE)) { case BCMA_EROM_ENTRY_TYPE_CORE: return "core"; case BCMA_EROM_ENTRY_TYPE_MPORT: return "mport"; case BCMA_EROM_ENTRY_TYPE_REGION: return "region"; default: return "unknown"; } } /* BCMA implementation of BHND_EROM_INIT() */ static int bcma_erom_init(bhnd_erom_t *erom, const struct bhnd_chipid *cid, struct bhnd_erom_io *eio) { struct bcma_erom *sc; bhnd_addr_t table_addr; int error; sc = (struct bcma_erom *)erom; sc->eio = eio; sc->offset = 0; /* Determine erom table address */ if (BHND_ADDR_MAX - BCMA_EROM_TABLE_START < cid->enum_addr) return (ENXIO); /* would overflow */ table_addr = cid->enum_addr + BCMA_EROM_TABLE_START; /* Try to map the erom table */ error = bhnd_erom_io_map(sc->eio, table_addr, BCMA_EROM_TABLE_SIZE); if (error) return (error); return (0); } /* BCMA implementation of BHND_EROM_PROBE() */ static int bcma_erom_probe(bhnd_erom_class_t *cls, struct bhnd_erom_io *eio, const struct bhnd_chipid *hint, struct bhnd_chipid *cid) { - uint32_t idreg, eromptr; + int error; /* Hints aren't supported; all BCMA devices have a ChipCommon * core */ if (hint != NULL) return (EINVAL); - /* Confirm CHIPC_EROMPTR availability */ - idreg = bhnd_erom_io_read(eio, CHIPC_ID, 4); - if (!BHND_CHIPTYPE_HAS_EROM(CHIPC_GET_BITS(idreg, CHIPC_ID_BUS))) - return (ENXIO); - - /* Fetch EROM address */ - eromptr = bhnd_erom_io_read(eio, CHIPC_EROMPTR, 4); - - /* Parse chip identifier */ - *cid = bhnd_parse_chipid(idreg, eromptr); + /* Read and parse chip identification */ + if ((error = bhnd_erom_read_chipid(eio, cid))) + return (error); /* Verify chip type */ switch (cid->chip_type) { case BHND_CHIPTYPE_BCMA: return (BUS_PROBE_DEFAULT); case BHND_CHIPTYPE_BCMA_ALT: case BHND_CHIPTYPE_UBUS: return (BUS_PROBE_GENERIC); default: return (ENXIO); } } static void bcma_erom_fini(bhnd_erom_t *erom) { struct bcma_erom *sc = (struct bcma_erom *)erom; bhnd_erom_io_fini(sc->eio); } static int bcma_erom_lookup_core(bhnd_erom_t *erom, const struct bhnd_core_match *desc, struct bhnd_core_info *core) { struct bcma_erom *sc = (struct bcma_erom *)erom; /* Search for the first matching core */ return (bcma_erom_seek_matching_core(sc, desc, core)); } static int bcma_erom_lookup_core_addr(bhnd_erom_t *erom, const struct bhnd_core_match *desc, bhnd_port_type port_type, u_int port_num, u_int region_num, struct bhnd_core_info *core, bhnd_addr_t *addr, bhnd_size_t *size) { struct bcma_erom *sc; struct bcma_erom_core ec; uint32_t entry; uint8_t region_port, region_type; bool found; int error; sc = (struct bcma_erom *)erom; /* Seek to the first matching core and provide the core info * to the caller */ if ((error = bcma_erom_seek_matching_core(sc, desc, core))) return (error); if ((error = bcma_erom_parse_core(sc, &ec))) return (error); /* Skip master ports */ for (u_long i = 0; i < ec.num_mport; i++) { if ((error = bcma_erom_skip_mport(sc))) return (error); } /* Seek to the region block for the given port type */ found = false; while (1) { bhnd_port_type p_type; uint8_t r_type; if ((error = bcma_erom_peek32(sc, &entry))) return (error); if (!BCMA_EROM_ENTRY_IS(entry, REGION)) return (ENOENT); /* Expected region type? */ r_type = BCMA_EROM_GET_ATTR(entry, REGION_TYPE); error = bcma_erom_region_to_port_type(sc, r_type, &p_type); if (error) return (error); if (p_type == port_type) { found = true; break; } /* Skip to next entry */ if ((error = bcma_erom_skip_sport_region(sc))) return (error); } if (!found) return (ENOENT); /* Found the appropriate port type block; now find the region records * for the given port number */ found = false; for (u_int i = 0; i <= port_num; i++) { bhnd_port_type p_type; if ((error = bcma_erom_peek32(sc, &entry))) return (error); if (!BCMA_EROM_ENTRY_IS(entry, REGION)) return (ENOENT); /* Fetch the type/port of the first region entry */ region_type = BCMA_EROM_GET_ATTR(entry, REGION_TYPE); region_port = BCMA_EROM_GET_ATTR(entry, REGION_PORT); /* Have we found the region entries for the desired port? */ if (i == port_num) { error = bcma_erom_region_to_port_type(sc, region_type, &p_type); if (error) return (error); if (p_type == port_type) found = true; break; } /* Otherwise, seek to next block of region records */ while (1) { uint8_t next_type, next_port; if ((error = bcma_erom_skip_sport_region(sc))) return (error); if ((error = bcma_erom_peek32(sc, &entry))) return (error); if (!BCMA_EROM_ENTRY_IS(entry, REGION)) return (ENOENT); next_type = BCMA_EROM_GET_ATTR(entry, REGION_TYPE); next_port = BCMA_EROM_GET_ATTR(entry, REGION_PORT); if (next_type != region_type || next_port != region_port) break; } } if (!found) return (ENOENT); /* Finally, search for the requested region number */ for (u_int i = 0; i <= region_num; i++) { struct bcma_erom_sport_region region; uint8_t next_port, next_type; if ((error = bcma_erom_peek32(sc, &entry))) return (error); if (!BCMA_EROM_ENTRY_IS(entry, REGION)) return (ENOENT); /* Check for the end of the region block */ next_type = BCMA_EROM_GET_ATTR(entry, REGION_TYPE); next_port = BCMA_EROM_GET_ATTR(entry, REGION_PORT); if (next_type != region_type || next_port != region_port) break; /* Parse the region */ if ((error = bcma_erom_parse_sport_region(sc, ®ion))) return (error); /* Is this our target region_num? */ if (i == region_num) { /* Found */ *addr = region.base_addr; *size = region.size; return (0); } } /* Not found */ return (ENOENT); }; static int bcma_erom_get_core_table(bhnd_erom_t *erom, struct bhnd_core_info **cores, u_int *num_cores) { struct bcma_erom *sc; struct bhnd_core_info *buffer; bus_size_t initial_offset; u_int count; int error; sc = (struct bcma_erom *)erom; buffer = NULL; initial_offset = bcma_erom_tell(sc); /* Determine the core count */ bcma_erom_reset(sc); for (count = 0, error = 0; !error; count++) { struct bcma_erom_core core; /* Seek to the first readable core entry */ error = bcma_erom_seek_next(sc, BCMA_EROM_ENTRY_TYPE_CORE); if (error == ENOENT) break; else if (error) goto cleanup; /* Read past the core descriptor */ if ((error = bcma_erom_parse_core(sc, &core))) goto cleanup; } /* Allocate our output buffer */ buffer = mallocarray(count, sizeof(struct bhnd_core_info), M_BHND, M_NOWAIT); if (buffer == NULL) { error = ENOMEM; goto cleanup; } /* Parse all core descriptors */ bcma_erom_reset(sc); for (u_int i = 0; i < count; i++) { struct bcma_erom_core core; int unit; /* Parse the core */ error = bcma_erom_seek_next(sc, BCMA_EROM_ENTRY_TYPE_CORE); if (error) goto cleanup; error = bcma_erom_parse_core(sc, &core); if (error) goto cleanup; /* Determine the unit number */ unit = 0; for (u_int j = 0; j < i; j++) { if (buffer[i].vendor == buffer[j].vendor && buffer[i].device == buffer[j].device) unit++; } /* Convert to a bhnd info record */ bcma_erom_to_core_info(&core, i, unit, &buffer[i]); } cleanup: if (!error) { *cores = buffer; *num_cores = count; } else { if (buffer != NULL) free(buffer, M_BHND); } /* Restore the initial position */ bcma_erom_seek(sc, initial_offset); return (error); } static void bcma_erom_free_core_table(bhnd_erom_t *erom, struct bhnd_core_info *cores) { free(cores, M_BHND); } /** * Return the current read position. */ static bus_size_t bcma_erom_tell(struct bcma_erom *erom) { return (erom->offset); } /** * Seek to an absolute read position. */ static void bcma_erom_seek(struct bcma_erom *erom, bus_size_t offset) { erom->offset = offset; } /** * Read a 32-bit entry value from the EROM table without advancing the * read position. * * @param erom EROM read state. * @param entry Will contain the read result on success. * @retval 0 success * @retval ENOENT The end of the EROM table was reached. * @retval non-zero The read could not be completed. */ static int bcma_erom_peek32(struct bcma_erom *erom, uint32_t *entry) { if (erom->offset >= (BCMA_EROM_TABLE_SIZE - sizeof(uint32_t))) { EROM_LOG(erom, "BCMA EROM table missing terminating EOF\n"); return (EINVAL); } *entry = bhnd_erom_io_read(erom->eio, erom->offset, 4); return (0); } /** * Read a 32-bit entry value from the EROM table. * * @param erom EROM read state. * @param entry Will contain the read result on success. * @retval 0 success * @retval ENOENT The end of the EROM table was reached. * @retval non-zero The read could not be completed. */ static int bcma_erom_read32(struct bcma_erom *erom, uint32_t *entry) { int error; if ((error = bcma_erom_peek32(erom, entry)) == 0) erom->offset += 4; return (error); } /** * Read and discard 32-bit entry value from the EROM table. * * @param erom EROM read state. * @retval 0 success * @retval ENOENT The end of the EROM table was reached. * @retval non-zero The read could not be completed. */ static int bcma_erom_skip32(struct bcma_erom *erom) { uint32_t entry; return bcma_erom_read32(erom, &entry); } /** * Read and discard a core descriptor from the EROM table. * * @param erom EROM read state. * @retval 0 success * @retval ENOENT The end of the EROM table was reached. * @retval non-zero The read could not be completed. */ static int bcma_erom_skip_core(struct bcma_erom *erom) { struct bcma_erom_core core; return (bcma_erom_parse_core(erom, &core)); } /** * Read and discard a master port descriptor from the EROM table. * * @param erom EROM read state. * @retval 0 success * @retval ENOENT The end of the EROM table was reached. * @retval non-zero The read could not be completed. */ static int bcma_erom_skip_mport(struct bcma_erom *erom) { struct bcma_erom_mport mp; return (bcma_erom_parse_mport(erom, &mp)); } /** * Read and discard a port region descriptor from the EROM table. * * @param erom EROM read state. * @retval 0 success * @retval ENOENT The end of the EROM table was reached. * @retval non-zero The read could not be completed. */ static int bcma_erom_skip_sport_region(struct bcma_erom *erom) { struct bcma_erom_sport_region r; return (bcma_erom_parse_sport_region(erom, &r)); } /** * Seek to the next entry matching the given EROM entry type. * * @param erom EROM read state. * @param etype One of BCMA_EROM_ENTRY_TYPE_CORE, * BCMA_EROM_ENTRY_TYPE_MPORT, or BCMA_EROM_ENTRY_TYPE_REGION. * @retval 0 success * @retval ENOENT The end of the EROM table was reached. * @retval non-zero Reading or parsing the descriptor failed. */ static int bcma_erom_seek_next(struct bcma_erom *erom, uint8_t etype) { uint32_t entry; int error; /* Iterate until we hit an entry matching the requested type. */ while (!(error = bcma_erom_peek32(erom, &entry))) { /* Handle EOF */ if (entry == BCMA_EROM_TABLE_EOF) return (ENOENT); /* Invalid entry */ if (!BCMA_EROM_GET_ATTR(entry, ENTRY_ISVALID)) return (EINVAL); /* Entry type matches? */ if (BCMA_EROM_GET_ATTR(entry, ENTRY_TYPE) == etype) return (0); /* Skip non-matching entry types. */ switch (BCMA_EROM_GET_ATTR(entry, ENTRY_TYPE)) { case BCMA_EROM_ENTRY_TYPE_CORE: if ((error = bcma_erom_skip_core(erom))) return (error); break; case BCMA_EROM_ENTRY_TYPE_MPORT: if ((error = bcma_erom_skip_mport(erom))) return (error); break; case BCMA_EROM_ENTRY_TYPE_REGION: if ((error = bcma_erom_skip_sport_region(erom))) return (error); break; default: /* Unknown entry type! */ return (EINVAL); } } return (error); } /** * Return the read position to the start of the EROM table. * * @param erom EROM read state. */ static void bcma_erom_reset(struct bcma_erom *erom) { erom->offset = 0; } /** * Seek to the first core entry matching @p desc. * * @param erom EROM read state. * @param desc The core match descriptor. * @param[out] core On success, the matching core info. If the core info * is not desired, a NULL pointer may be provided. * @retval 0 success * @retval ENOENT The end of the EROM table was reached before @p index was * found. * @retval non-zero Reading or parsing failed. */ static int bcma_erom_seek_matching_core(struct bcma_erom *sc, const struct bhnd_core_match *desc, struct bhnd_core_info *core) { struct bhnd_core_match imatch; bus_size_t core_offset, next_offset; int error; /* Seek to table start. */ bcma_erom_reset(sc); /* We can't determine a core's unit number during the initial scan. */ imatch = *desc; imatch.m.match.core_unit = 0; /* Locate the first matching core */ for (u_int i = 0; i < UINT_MAX; i++) { struct bcma_erom_core ec; struct bhnd_core_info ci; /* Seek to the next core */ error = bcma_erom_seek_next(sc, BCMA_EROM_ENTRY_TYPE_CORE); if (error) return (error); /* Save the core offset */ core_offset = bcma_erom_tell(sc); /* Parse the core */ if ((error = bcma_erom_parse_core(sc, &ec))) return (error); bcma_erom_to_core_info(&ec, i, 0, &ci); /* Check for initial match */ if (!bhnd_core_matches(&ci, &imatch)) continue; /* Re-scan preceding cores to determine the unit number. */ next_offset = bcma_erom_tell(sc); bcma_erom_reset(sc); for (u_int j = 0; j < i; j++) { /* Parse the core */ error = bcma_erom_seek_next(sc, BCMA_EROM_ENTRY_TYPE_CORE); if (error) return (error); if ((error = bcma_erom_parse_core(sc, &ec))) return (error); /* Bump the unit number? */ if (ec.vendor == ci.vendor && ec.device == ci.device) ci.unit++; } /* Check for full match against now-valid unit number */ if (!bhnd_core_matches(&ci, desc)) { /* Reposition to allow reading the next core */ bcma_erom_seek(sc, next_offset); continue; } /* Found; seek to the core's initial offset and provide * the core info to the caller */ bcma_erom_seek(sc, core_offset); if (core != NULL) *core = ci; return (0); } /* Not found, or a parse error occured */ return (error); } /** * Read the next core descriptor from the EROM table. * * @param erom EROM read state. * @param[out] core On success, will be populated with the parsed core * descriptor data. * @retval 0 success * @retval ENOENT The end of the EROM table was reached. * @retval non-zero Reading or parsing the core descriptor failed. */ static int bcma_erom_parse_core(struct bcma_erom *erom, struct bcma_erom_core *core) { uint32_t entry; int error; /* Parse CoreDescA */ if ((error = bcma_erom_read32(erom, &entry))) return (error); /* Handle EOF */ if (entry == BCMA_EROM_TABLE_EOF) return (ENOENT); if (!BCMA_EROM_ENTRY_IS(entry, CORE)) { EROM_LOG(erom, "Unexpected EROM entry 0x%x (type=%s)\n", entry, bcma_erom_entry_type_name(entry)); return (EINVAL); } core->vendor = BCMA_EROM_GET_ATTR(entry, COREA_DESIGNER); core->device = BCMA_EROM_GET_ATTR(entry, COREA_ID); /* Parse CoreDescB */ if ((error = bcma_erom_read32(erom, &entry))) return (error); if (!BCMA_EROM_ENTRY_IS(entry, CORE)) { return (EINVAL); } core->rev = BCMA_EROM_GET_ATTR(entry, COREB_REV); core->num_mport = BCMA_EROM_GET_ATTR(entry, COREB_NUM_MP); core->num_dport = BCMA_EROM_GET_ATTR(entry, COREB_NUM_DP); core->num_mwrap = BCMA_EROM_GET_ATTR(entry, COREB_NUM_WMP); core->num_swrap = BCMA_EROM_GET_ATTR(entry, COREB_NUM_WSP); return (0); } /** * Read the next master port descriptor from the EROM table. * * @param erom EROM read state. * @param[out] mport On success, will be populated with the parsed * descriptor data. * @retval 0 success * @retval non-zero Reading or parsing the descriptor failed. */ static int bcma_erom_parse_mport(struct bcma_erom *erom, struct bcma_erom_mport *mport) { uint32_t entry; int error; /* Parse the master port descriptor */ if ((error = bcma_erom_read32(erom, &entry))) return (error); if (!BCMA_EROM_ENTRY_IS(entry, MPORT)) return (EINVAL); mport->port_vid = BCMA_EROM_GET_ATTR(entry, MPORT_ID); mport->port_num = BCMA_EROM_GET_ATTR(entry, MPORT_NUM); return (0); } /** * Read the next slave port region descriptor from the EROM table. * * @param erom EROM read state. * @param[out] mport On success, will be populated with the parsed * descriptor data. * @retval 0 success * @retval ENOENT The end of the region descriptor table was reached. * @retval non-zero Reading or parsing the descriptor failed. */ static int bcma_erom_parse_sport_region(struct bcma_erom *erom, struct bcma_erom_sport_region *region) { uint32_t entry; uint8_t size_type; int error; /* Peek at the region descriptor */ if (bcma_erom_peek32(erom, &entry)) return (EINVAL); /* A non-region entry signals the end of the region table */ if (!BCMA_EROM_ENTRY_IS(entry, REGION)) { return (ENOENT); } else { bcma_erom_skip32(erom); } region->base_addr = BCMA_EROM_GET_ATTR(entry, REGION_BASE); region->region_type = BCMA_EROM_GET_ATTR(entry, REGION_TYPE); region->region_port = BCMA_EROM_GET_ATTR(entry, REGION_PORT); size_type = BCMA_EROM_GET_ATTR(entry, REGION_SIZE); /* If region address is 64-bit, fetch the high bits. */ if (BCMA_EROM_GET_ATTR(entry, REGION_64BIT)) { if ((error = bcma_erom_read32(erom, &entry))) return (error); region->base_addr |= ((bhnd_addr_t) entry << 32); } /* Parse the region size; it's either encoded as the binary logarithm * of the number of 4K pages (i.e. log2 n), or its encoded as a * 32-bit/64-bit literal value directly following the current entry. */ if (size_type == BCMA_EROM_REGION_SIZE_OTHER) { if ((error = bcma_erom_read32(erom, &entry))) return (error); region->size = BCMA_EROM_GET_ATTR(entry, RSIZE_VAL); if (BCMA_EROM_GET_ATTR(entry, RSIZE_64BIT)) { if ((error = bcma_erom_read32(erom, &entry))) return (error); region->size |= ((bhnd_size_t) entry << 32); } } else { region->size = BCMA_EROM_REGION_SIZE_BASE << size_type; } /* Verify that addr+size does not overflow. */ if (region->size != 0 && BHND_ADDR_MAX - (region->size - 1) < region->base_addr) { EROM_LOG(erom, "%s%u: invalid address map %llx:%llx\n", bcma_erom_entry_type_name(region->region_type), region->region_port, (unsigned long long) region->base_addr, (unsigned long long) region->size); return (EINVAL); } return (0); } /** * Convert a bcma_erom_core record to its bhnd_core_info representation. * * @param core EROM core record to convert. * @param core_idx The core index of @p core. * @param core_unit The core unit of @p core. * @param[out] info The populated bhnd_core_info representation. */ static void bcma_erom_to_core_info(const struct bcma_erom_core *core, u_int core_idx, int core_unit, struct bhnd_core_info *info) { info->vendor = core->vendor; info->device = core->device; info->hwrev = core->rev; info->core_idx = core_idx; info->unit = core_unit; } /** * Map an EROM region type to its corresponding port type. * * @param region_type Region type value. * @param[out] port_type On success, the corresponding port type. */ static int bcma_erom_region_to_port_type(struct bcma_erom *erom, uint8_t region_type, bhnd_port_type *port_type) { switch (region_type) { case BCMA_EROM_REGION_TYPE_DEVICE: *port_type = BHND_PORT_DEVICE; return (0); case BCMA_EROM_REGION_TYPE_BRIDGE: *port_type = BHND_PORT_BRIDGE; return (0); case BCMA_EROM_REGION_TYPE_MWRAP: case BCMA_EROM_REGION_TYPE_SWRAP: *port_type = BHND_PORT_AGENT; return (0); default: EROM_LOG(erom, "unsupported region type %hhx\n", region_type); return (EINVAL); } } /** * Register all MMIO region descriptors for the given slave port. * * @param erom EROM read state. * @param corecfg Core info to be populated with the scanned port regions. * @param port_num Port index for which regions will be parsed. * @param region_type The region type to be parsed. * @param[out] offset The offset at which to perform parsing. On success, this * will be updated to point to the next EROM table entry. */ static int bcma_erom_corecfg_fill_port_regions(struct bcma_erom *erom, struct bcma_corecfg *corecfg, bcma_pid_t port_num, uint8_t region_type) { struct bcma_sport *sport; struct bcma_sport_list *sports; bus_size_t entry_offset; int error; bhnd_port_type port_type; error = 0; /* Determine the port type for this region type. */ error = bcma_erom_region_to_port_type(erom, region_type, &port_type); if (error) return (error); /* Fetch the list to be populated */ sports = bcma_corecfg_get_port_list(corecfg, port_type); /* Allocate a new port descriptor */ sport = bcma_alloc_sport(port_num, port_type); if (sport == NULL) return (ENOMEM); /* Read all address regions defined for this port */ for (bcma_rmid_t region_num = 0;; region_num++) { struct bcma_map *map; struct bcma_erom_sport_region spr; /* No valid port definition should come anywhere near * BCMA_RMID_MAX. */ if (region_num == BCMA_RMID_MAX) { EROM_LOG(erom, "core%u %s%u: region count reached " "upper limit of %u\n", corecfg->core_info.core_idx, bhnd_port_type_name(port_type), port_num, BCMA_RMID_MAX); error = EINVAL; goto cleanup; } /* Parse the next region entry. */ entry_offset = bcma_erom_tell(erom); error = bcma_erom_parse_sport_region(erom, &spr); if (error && error != ENOENT) { EROM_LOG(erom, "core%u %s%u.%u: invalid slave port " "address region\n", corecfg->core_info.core_idx, bhnd_port_type_name(port_type), port_num, region_num); goto cleanup; } /* ENOENT signals no further region entries */ if (error == ENOENT) { /* No further entries */ error = 0; break; } /* A region or type mismatch also signals no further region * entries */ if (spr.region_port != port_num || spr.region_type != region_type) { /* We don't want to consume this entry */ bcma_erom_seek(erom, entry_offset); error = 0; goto cleanup; } /* * Create the map entry. */ map = malloc(sizeof(struct bcma_map), M_BHND, M_NOWAIT); if (map == NULL) { error = ENOMEM; goto cleanup; } map->m_region_num = region_num; map->m_base = spr.base_addr; map->m_size = spr.size; map->m_rid = -1; /* Add the region map to the port */ STAILQ_INSERT_TAIL(&sport->sp_maps, map, m_link); sport->sp_num_maps++; } cleanup: /* Append the new port descriptor on success, or deallocate the * partially parsed descriptor on failure. */ if (error == 0) { STAILQ_INSERT_TAIL(sports, sport, sp_link); } else if (sport != NULL) { bcma_free_sport(sport); } return error; } /** * Parse the next core entry from the EROM table and produce a bcma_corecfg * to be owned by the caller. * * @param erom A bcma EROM instance. * @param[out] result On success, the core's device info. The caller inherits * ownership of this allocation. * * @return If successful, returns 0. If the end of the EROM table is hit, * ENOENT will be returned. On error, returns a non-zero error value. */ int bcma_erom_next_corecfg(struct bcma_erom *erom, struct bcma_corecfg **result) { struct bcma_corecfg *cfg; struct bcma_erom_core core; uint8_t first_region_type; bus_size_t initial_offset; u_int core_index; int core_unit; int error; cfg = NULL; initial_offset = bcma_erom_tell(erom); /* Parse the next core entry */ if ((error = bcma_erom_parse_core(erom, &core))) return (error); /* Determine the core's index and unit numbers */ bcma_erom_reset(erom); core_unit = 0; core_index = 0; for (; bcma_erom_tell(erom) != initial_offset; core_index++) { struct bcma_erom_core prev_core; /* Parse next core */ error = bcma_erom_seek_next(erom, BCMA_EROM_ENTRY_TYPE_CORE); if (error) return (error); if ((error = bcma_erom_parse_core(erom, &prev_core))) return (error); /* Is earlier unit? */ if (core.vendor == prev_core.vendor && core.device == prev_core.device) { core_unit++; } /* Seek to next core */ error = bcma_erom_seek_next(erom, BCMA_EROM_ENTRY_TYPE_CORE); if (error) return (error); } /* We already parsed the core descriptor */ if ((error = bcma_erom_skip_core(erom))) return (error); /* Allocate our corecfg */ cfg = bcma_alloc_corecfg(core_index, core_unit, core.vendor, core.device, core.rev); if (cfg == NULL) return (ENOMEM); /* These are 5-bit values in the EROM table, and should never be able * to overflow BCMA_PID_MAX. */ KASSERT(core.num_mport <= BCMA_PID_MAX, ("unsupported mport count")); KASSERT(core.num_dport <= BCMA_PID_MAX, ("unsupported dport count")); KASSERT(core.num_mwrap + core.num_swrap <= BCMA_PID_MAX, ("unsupported wport count")); if (bootverbose) { EROM_LOG(erom, "core%u: %s %s (cid=%hx, rev=%hu, unit=%d)\n", core_index, bhnd_vendor_name(core.vendor), bhnd_find_core_name(core.vendor, core.device), core.device, core.rev, core_unit); } cfg->num_master_ports = core.num_mport; cfg->num_dev_ports = 0; /* determined below */ cfg->num_bridge_ports = 0; /* determined blow */ cfg->num_wrapper_ports = core.num_mwrap + core.num_swrap; /* Parse Master Port Descriptors */ for (uint8_t i = 0; i < core.num_mport; i++) { struct bcma_mport *mport; struct bcma_erom_mport mpd; /* Parse the master port descriptor */ error = bcma_erom_parse_mport(erom, &mpd); if (error) goto failed; /* Initialize a new bus mport structure */ mport = malloc(sizeof(struct bcma_mport), M_BHND, M_NOWAIT); if (mport == NULL) { error = ENOMEM; goto failed; } mport->mp_vid = mpd.port_vid; mport->mp_num = mpd.port_num; /* Update dinfo */ STAILQ_INSERT_TAIL(&cfg->master_ports, mport, mp_link); } /* * Determine whether this is a bridge device; if so, we can * expect the first sequence of address region descriptors to * be of EROM_REGION_TYPE_BRIDGE instead of * BCMA_EROM_REGION_TYPE_DEVICE. * * It's unclear whether this is the correct mechanism by which we * should detect/handle bridge devices, but this approach matches * that of (some of) Broadcom's published drivers. */ if (core.num_dport > 0) { uint32_t entry; if ((error = bcma_erom_peek32(erom, &entry))) goto failed; if (BCMA_EROM_ENTRY_IS(entry, REGION) && BCMA_EROM_GET_ATTR(entry, REGION_TYPE) == BCMA_EROM_REGION_TYPE_BRIDGE) { first_region_type = BCMA_EROM_REGION_TYPE_BRIDGE; cfg->num_dev_ports = 0; cfg->num_bridge_ports = core.num_dport; } else { first_region_type = BCMA_EROM_REGION_TYPE_DEVICE; cfg->num_dev_ports = core.num_dport; cfg->num_bridge_ports = 0; } } /* Device/bridge port descriptors */ for (uint8_t sp_num = 0; sp_num < core.num_dport; sp_num++) { error = bcma_erom_corecfg_fill_port_regions(erom, cfg, sp_num, first_region_type); if (error) goto failed; } /* Wrapper (aka device management) descriptors (for master ports). */ for (uint8_t sp_num = 0; sp_num < core.num_mwrap; sp_num++) { error = bcma_erom_corecfg_fill_port_regions(erom, cfg, sp_num, BCMA_EROM_REGION_TYPE_MWRAP); if (error) goto failed; } /* Wrapper (aka device management) descriptors (for slave ports). */ for (uint8_t i = 0; i < core.num_swrap; i++) { /* Slave wrapper ports are not numbered distinctly from master * wrapper ports. */ /* * Broadcom DDR1/DDR2 Memory Controller * (cid=82e, rev=1, unit=0, d/mw/sw = 2/0/1 ) -> * bhnd0: erom[0xdc]: core6 agent0.0: mismatch got: 0x1 (0x2) * * ARM BP135 AMBA3 AXI to APB Bridge * (cid=135, rev=0, unit=0, d/mw/sw = 1/0/1 ) -> * bhnd0: erom[0x124]: core9 agent1.0: mismatch got: 0x0 (0x2) * * core.num_mwrap * ===> * (core.num_mwrap > 0) ? * core.num_mwrap : * ((core.vendor == BHND_MFGID_BCM) ? 1 : 0) */ uint8_t sp_num; sp_num = (core.num_mwrap > 0) ? core.num_mwrap : ((core.vendor == BHND_MFGID_BCM) ? 1 : 0) + i; error = bcma_erom_corecfg_fill_port_regions(erom, cfg, sp_num, BCMA_EROM_REGION_TYPE_SWRAP); if (error) goto failed; } /* * Seek to the next core entry (if any), skipping any dangling/invalid * region entries. * * On the BCM4706, the EROM entry for the memory controller core * (0x4bf/0x52E) contains a dangling/unused slave wrapper port region * descriptor. */ if ((error = bcma_erom_seek_next(erom, BCMA_EROM_ENTRY_TYPE_CORE))) { if (error != ENOENT) goto failed; } *result = cfg; return (0); failed: if (cfg != NULL) bcma_free_corecfg(cfg); return error; } static int bcma_erom_dump(bhnd_erom_t *erom) { struct bcma_erom *sc; uint32_t entry; int error; sc = (struct bcma_erom *)erom; bcma_erom_reset(sc); while (!(error = bcma_erom_read32(sc, &entry))) { /* Handle EOF */ if (entry == BCMA_EROM_TABLE_EOF) { EROM_LOG(sc, "EOF\n"); return (0); } /* Invalid entry */ if (!BCMA_EROM_GET_ATTR(entry, ENTRY_ISVALID)) { EROM_LOG(sc, "invalid EROM entry %#x\n", entry); return (EINVAL); } switch (BCMA_EROM_GET_ATTR(entry, ENTRY_TYPE)) { case BCMA_EROM_ENTRY_TYPE_CORE: { /* CoreDescA */ EROM_LOG(sc, "coreA (0x%x)\n", entry); EROM_LOG(sc, "\tdesigner:\t0x%x\n", BCMA_EROM_GET_ATTR(entry, COREA_DESIGNER)); EROM_LOG(sc, "\tid:\t\t0x%x\n", BCMA_EROM_GET_ATTR(entry, COREA_ID)); EROM_LOG(sc, "\tclass:\t\t0x%x\n", BCMA_EROM_GET_ATTR(entry, COREA_CLASS)); /* CoreDescB */ if ((error = bcma_erom_read32(sc, &entry))) { EROM_LOG(sc, "error reading CoreDescB: %d\n", error); return (error); } if (!BCMA_EROM_ENTRY_IS(entry, CORE)) { EROM_LOG(sc, "invalid core descriptor; found " "unexpected entry %#x (type=%s)\n", entry, bcma_erom_entry_type_name(entry)); return (EINVAL); } EROM_LOG(sc, "coreB (0x%x)\n", entry); EROM_LOG(sc, "\trev:\t0x%x\n", BCMA_EROM_GET_ATTR(entry, COREB_REV)); EROM_LOG(sc, "\tnummp:\t0x%x\n", BCMA_EROM_GET_ATTR(entry, COREB_NUM_MP)); EROM_LOG(sc, "\tnumdp:\t0x%x\n", BCMA_EROM_GET_ATTR(entry, COREB_NUM_DP)); EROM_LOG(sc, "\tnumwmp:\t0x%x\n", BCMA_EROM_GET_ATTR(entry, COREB_NUM_WMP)); EROM_LOG(sc, "\tnumwsp:\t0x%x\n", BCMA_EROM_GET_ATTR(entry, COREB_NUM_WMP)); break; } case BCMA_EROM_ENTRY_TYPE_MPORT: EROM_LOG(sc, "\tmport 0x%x\n", entry); EROM_LOG(sc, "\t\tport:\t0x%x\n", BCMA_EROM_GET_ATTR(entry, MPORT_NUM)); EROM_LOG(sc, "\t\tid:\t\t0x%x\n", BCMA_EROM_GET_ATTR(entry, MPORT_ID)); break; case BCMA_EROM_ENTRY_TYPE_REGION: { bool addr64; uint8_t size_type; addr64 = (BCMA_EROM_GET_ATTR(entry, REGION_64BIT) != 0); size_type = BCMA_EROM_GET_ATTR(entry, REGION_SIZE); EROM_LOG(sc, "\tregion 0x%x:\n", entry); EROM_LOG(sc, "\t\t%s:\t0x%x\n", addr64 ? "baselo" : "base", BCMA_EROM_GET_ATTR(entry, REGION_BASE)); EROM_LOG(sc, "\t\tport:\t0x%x\n", BCMA_EROM_GET_ATTR(entry, REGION_PORT)); EROM_LOG(sc, "\t\ttype:\t0x%x\n", BCMA_EROM_GET_ATTR(entry, REGION_TYPE)); EROM_LOG(sc, "\t\tsztype:\t0x%hhx\n", size_type); /* Read the base address high bits */ if (addr64) { if ((error = bcma_erom_read32(sc, &entry))) { EROM_LOG(sc, "error reading region " "base address high bits %d\n", error); return (error); } EROM_LOG(sc, "\t\tbasehi:\t0x%x\n", entry); } /* Read extended size descriptor */ if (size_type == BCMA_EROM_REGION_SIZE_OTHER) { bool size64; if ((error = bcma_erom_read32(sc, &entry))) { EROM_LOG(sc, "error reading region " "size descriptor %d\n", error); return (error); } if (BCMA_EROM_GET_ATTR(entry, RSIZE_64BIT)) size64 = true; else size64 = false; EROM_LOG(sc, "\t\t%s:\t0x%x\n", size64 ? "sizelo" : "size", BCMA_EROM_GET_ATTR(entry, RSIZE_VAL)); if (size64) { error = bcma_erom_read32(sc, &entry); if (error) { EROM_LOG(sc, "error reading " "region size high bits: " "%d\n", error); return (error); } EROM_LOG(sc, "\t\tsizehi:\t0x%x\n", entry); } } break; } default: EROM_LOG(sc, "unknown EROM entry 0x%x (type=%s)\n", entry, bcma_erom_entry_type_name(entry)); return (EINVAL); } } if (error == ENOENT) EROM_LOG(sc, "BCMA EROM table missing terminating EOF\n"); else if (error) EROM_LOG(sc, "EROM read failed: %d\n", error); return (error); } static kobj_method_t bcma_erom_methods[] = { KOBJMETHOD(bhnd_erom_probe, bcma_erom_probe), KOBJMETHOD(bhnd_erom_init, bcma_erom_init), KOBJMETHOD(bhnd_erom_fini, bcma_erom_fini), KOBJMETHOD(bhnd_erom_get_core_table, bcma_erom_get_core_table), KOBJMETHOD(bhnd_erom_free_core_table, bcma_erom_free_core_table), KOBJMETHOD(bhnd_erom_lookup_core, bcma_erom_lookup_core), KOBJMETHOD(bhnd_erom_lookup_core_addr, bcma_erom_lookup_core_addr), KOBJMETHOD(bhnd_erom_dump, bcma_erom_dump), KOBJMETHOD_END }; BHND_EROM_DEFINE_CLASS(bcma_erom, bcma_erom_parser, bcma_erom_methods, sizeof(struct bcma_erom)); Index: head/sys/dev/bhnd/bhnd.h =================================================================== --- head/sys/dev/bhnd/bhnd.h (revision 331743) +++ head/sys/dev/bhnd/bhnd.h (revision 331744) @@ -1,1763 +1,1761 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2015-2016 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. * * $FreeBSD$ */ #ifndef _BHND_BHND_H_ #define _BHND_BHND_H_ #include #include #include #include #include #include "bhnd_ids.h" #include "bhnd_types.h" #include "bhnd_erom_types.h" #include "bhnd_debug.h" #include "bhnd_bus_if.h" #include "bhnd_match.h" #include "nvram/bhnd_nvram.h" extern devclass_t bhnd_devclass; extern devclass_t bhnd_hostb_devclass; extern devclass_t bhnd_nvram_devclass; #define BHND_CHIPID_MAX_NAMELEN 32 /**< maximum buffer required for a bhnd_format_chip_id() */ /** * bhnd child instance variables */ enum bhnd_device_vars { BHND_IVAR_VENDOR, /**< Designer's JEP-106 manufacturer ID. */ BHND_IVAR_DEVICE, /**< Part number */ BHND_IVAR_HWREV, /**< Core revision */ BHND_IVAR_DEVICE_CLASS, /**< Core class (@sa bhnd_devclass_t) */ BHND_IVAR_VENDOR_NAME, /**< Core vendor name */ BHND_IVAR_DEVICE_NAME, /**< Core name */ BHND_IVAR_CORE_INDEX, /**< Bus-assigned core number */ BHND_IVAR_CORE_UNIT, /**< Bus-assigned core unit number, assigned sequentially (starting at 0) for each vendor/device pair. */ BHND_IVAR_PMU_INFO, /**< Internal bus-managed PMU state */ }; /** * bhnd device probe priority bands. */ enum { BHND_PROBE_ROOT = 0, /**< Nexus or host bridge */ BHND_PROBE_BUS = 1000, /**< Buses and bridges */ BHND_PROBE_CPU = 2000, /**< CPU devices */ BHND_PROBE_INTERRUPT = 3000, /**< Interrupt controllers. */ BHND_PROBE_TIMER = 4000, /**< Timers and clocks. */ BHND_PROBE_RESOURCE = 5000, /**< Resource discovery (including NVRAM/SPROM) */ BHND_PROBE_DEFAULT = 6000, /**< Default device priority */ }; /** * Constants defining fine grained ordering within a BHND_PROBE_* priority band. * * Example: * @code * BHND_PROBE_BUS + BHND_PROBE_ORDER_FIRST * @endcode */ enum { BHND_PROBE_ORDER_FIRST = 0, BHND_PROBE_ORDER_EARLY = 25, BHND_PROBE_ORDER_MIDDLE = 50, BHND_PROBE_ORDER_LATE = 75, BHND_PROBE_ORDER_LAST = 100 }; /** * Per-core IOCTL flags common to all bhnd(4) cores. */ enum { BHND_IOCTL_BIST = 0x8000, /**< Initiate a built-in self-test (BIST). Must be cleared after BIST results are read via BHND_IOST_BIST_* */ BHND_IOCTL_PME = 0x4000, /**< Enable posting of power management events by the core. */ BHND_IOCTL_CFLAGS = 0x3FFC, /**< Reserved for core-specific ioctl flags. */ BHND_IOCTL_CLK_FORCE = 0x0002, /**< Force disable of clock gating, resulting in all clocks being distributed within the core. Should be set when asserting/deasserting reset to ensure the reset signal fully propagates to the entire core. */ BHND_IOCTL_CLK_EN = 0x0001, /**< If cleared, the core clock will be disabled. Should be set during normal operation, and cleared when the core is held in reset. */ }; /** * Per-core IOST flags common to all bhnd(4) cores. */ enum { BHND_IOST_BIST_DONE = 0x8000, /**< Set upon BIST completion (see BHND_IOCTL_BIST), and cleared if 0 is written to BHND_IOCTL_BIST. */ BHND_IOST_BIST_FAIL = 0x4000, /**< Set upon detection of a BIST error; the value is unspecified if BIST has not completed and BHND_IOST_BIST_DONE is not set. */ BHND_IOST_CLK = 0x2000, /**< Set if the core has requested that gated clocks be enabled, or cleared otherwise. The value is undefined if a core does not support clock gating. */ BHND_IOST_DMA64 = 0x1000, /**< Set if this core supports 64-bit DMA */ BHND_IOST_CFLAGS = 0x0FFC, /**< Reserved for core-specific status flags. */ }; /* * Simplified accessors for bhnd device ivars */ #define BHND_ACCESSOR(var, ivar, type) \ __BUS_ACCESSOR(bhnd, var, BHND, ivar, type) BHND_ACCESSOR(vendor, VENDOR, uint16_t); BHND_ACCESSOR(device, DEVICE, uint16_t); BHND_ACCESSOR(hwrev, HWREV, uint8_t); BHND_ACCESSOR(class, DEVICE_CLASS, bhnd_devclass_t); BHND_ACCESSOR(vendor_name, VENDOR_NAME, const char *); BHND_ACCESSOR(device_name, DEVICE_NAME, const char *); BHND_ACCESSOR(core_index, CORE_INDEX, u_int); BHND_ACCESSOR(core_unit, CORE_UNIT, int); BHND_ACCESSOR(pmu_info, PMU_INFO, void *); #undef BHND_ACCESSOR /** * A bhnd(4) board descriptor. */ struct bhnd_board_info { uint16_t board_vendor; /**< Board vendor (PCI-SIG vendor ID). * * On PCI devices, this will default to * the PCI subsystem vendor ID, but may * be overridden by the 'boardtype' * NVRAM variable. * * On SoCs, this will default to * PCI_VENDOR_BROADCOM, but may be * overridden by the 'boardvendor' * NVRAM variable. */ uint16_t board_type; /**< Board type (See BHND_BOARD_*) * * This value is usually a * Broadcom-assigned reference board * identifier (see BHND_BOARD_*), but * may be set to an arbitrary value * assigned by the board vendor. * * On PCI devices, this will default * to the PCI subsystem ID, but may be * overridden by the 'boardtype' * NVRAM variable. * * On SoCs, this will always be * populated with the value of the * 'boardtype' NVRAM variable. */ uint16_t board_devid; /**< Board device ID. * * On PCI devices, this will default * to the PCI device ID, but may * be overridden by the 'devid' * NVRAM variable. */ uint16_t board_rev; /**< Board revision. */ uint8_t board_srom_rev; /**< Board SROM format revision */ uint32_t board_flags; /**< Board flags (see BHND_BFL_*) */ uint32_t board_flags2; /**< Board flags 2 (see BHND_BFL2_*) */ uint32_t board_flags3; /**< Board flags 3 (see BHND_BFL3_*) */ }; /** * Chip Identification * * This is read from the ChipCommon ID register; on earlier bhnd(4) devices * where ChipCommon is unavailable, known values must be supplied. */ struct bhnd_chipid { uint16_t chip_id; /**< chip id (BHND_CHIPID_*) */ uint8_t chip_rev; /**< chip revision */ uint8_t chip_pkg; /**< chip package (BHND_PKGID_*) */ uint8_t chip_type; /**< chip type (BHND_CHIPTYPE_*) */ + uint32_t chip_caps; /**< chip capabilities (BHND_CAP_*) */ bhnd_addr_t enum_addr; /**< chip_type-specific enumeration * address; either the siba(4) base * core register block, or the bcma(4) * EROM core address. */ uint8_t ncores; /**< number of cores, if known. 0 if * not available. */ }; /** + * Chip capabilities + */ +enum bhnd_cap { + BHND_CAP_BP64 = (1<<0), /**< Backplane supports 64-bit + * addressing */ + BHND_CAP_PMU = (1<<1), /**< PMU is present */ +}; + +/** * A bhnd(4) core descriptor. */ struct bhnd_core_info { uint16_t vendor; /**< JEP-106 vendor (BHND_MFGID_*) */ uint16_t device; /**< device */ uint16_t hwrev; /**< hardware revision */ u_int core_idx; /**< bus-assigned core index */ int unit; /**< bus-assigned core unit */ }; /** * bhnd(4) DMA address widths. */ typedef enum { BHND_DMA_ADDR_30BIT = 30, /**< 30-bit DMA */ BHND_DMA_ADDR_32BIT = 32, /**< 32-bit DMA */ BHND_DMA_ADDR_64BIT = 64, /**< 64-bit DMA */ } bhnd_dma_addrwidth; /** * Convert an address width (in bits) to its corresponding mask. */ #define BHND_DMA_ADDR_BITMASK(_width) \ ((_width >= 64) ? ~0ULL : \ (_width == 0) ? 0x0 : \ ((1ULL << (_width)) - 1)) \ /** * bhnd(4) DMA address translation descriptor. */ struct bhnd_dma_translation { /** * Host-to-device physical address translation. * * This may be added to the host physical address to produce a device * DMA address. */ bhnd_addr_t base_addr; /** * Device-addressable address mask. * * This defines the device's DMA address range, excluding any bits * reserved for mapping the address to the base_addr. */ bhnd_addr_t addr_mask; /** * Device-addressable extended address mask. * * If a per-core bhnd(4) DMA engine supports the 'addrext' control * field, it can be used to provide address bits excluded by addr_mask. * * Support for DMA extended address changes – including coordination * with the core providing DMA translation – is handled transparently by * the DMA engine. For example, on PCI(e) Wi-Fi chipsets, the Wi-Fi * core DMA engine will (in effect) update the PCI core's DMA * sbtopcitranslation base address to map the full address prior to * performing a DMA transaction. */ bhnd_addr_t addrext_mask; /** * Translation flags (see bhnd_dma_translation_flags). */ uint32_t flags; }; #define BHND_DMA_TRANSLATION_TABLE_END { 0, 0, 0, 0 } #define BHND_DMA_IS_TRANSLATION_TABLE_END(_dt) \ ((_dt)->base_addr == 0 && (_dt)->addr_mask == 0 && \ (_dt)->addrext_mask == 0 && (_dt)->flags == 0) /** * bhnd(4) DMA address translation flags. */ enum bhnd_dma_translation_flags { /** * The translation remaps the device's physical address space. * * This is used in conjunction with BHND_DMA_TRANSLATION_BYTESWAPPED to * define a DMA translation that provides byteswapped access to * physical memory on big-endian MIPS SoCs. */ BHND_DMA_TRANSLATION_PHYSMAP = (1<<0), /** * Provides a byte-swapped mapping; write requests will be byte-swapped * before being written to memory, and read requests will be * byte-swapped before being returned. * * This is primarily used to perform efficient byte swapping of DMA * data on embedded MIPS SoCs executing in big-endian mode. */ BHND_DMA_TRANSLATION_BYTESWAPPED = (1<<1), }; /** * A bhnd(4) bus resource. * * This provides an abstract interface to per-core resources that may require * bus-level remapping of address windows prior to access. */ struct bhnd_resource { struct resource *res; /**< the system resource. */ bool direct; /**< false if the resource requires * bus window remapping before it * is MMIO accessible. */ }; /** Wrap the active resource @p _r in a bhnd_resource structure */ #define BHND_DIRECT_RESOURCE(_r) ((struct bhnd_resource) { \ .res = (_r), \ .direct = true, \ }) /** * Device quirk table descriptor. */ struct bhnd_device_quirk { struct bhnd_device_match desc; /**< device match descriptor */ uint32_t quirks; /**< quirk flags */ }; #define BHND_CORE_QUIRK(_rev, _flags) \ {{ BHND_MATCH_CORE_REV(_rev) }, (_flags) } #define BHND_CHIP_QUIRK(_chip, _rev, _flags) \ {{ BHND_MATCH_CHIP_IR(BCM ## _chip, _rev) }, (_flags) } #define BHND_PKG_QUIRK(_chip, _pkg, _flags) \ {{ BHND_MATCH_CHIP_IP(BCM ## _chip, BCM ## _chip ## _pkg) }, (_flags) } #define BHND_BOARD_QUIRK(_board, _flags) \ {{ BHND_MATCH_BOARD_TYPE(_board) }, \ (_flags) } #define BHND_DEVICE_QUIRK_END { { BHND_MATCH_ANY }, 0 } #define BHND_DEVICE_QUIRK_IS_END(_q) \ (((_q)->desc.m.match_flags == 0) && (_q)->quirks == 0) enum { BHND_DF_ANY = 0, BHND_DF_HOSTB = (1<<0), /**< core is serving as the bus' host * bridge. implies BHND_DF_ADAPTER */ BHND_DF_SOC = (1<<1), /**< core is attached to a native bus (BHND_ATTACH_NATIVE) */ BHND_DF_ADAPTER = (1<<2), /**< core is attached to a bridged * adapter (BHND_ATTACH_ADAPTER) */ }; /** Device probe table descriptor */ struct bhnd_device { const struct bhnd_device_match core; /**< core match descriptor */ const char *desc; /**< device description, or NULL. */ const struct bhnd_device_quirk *quirks_table; /**< quirks table for this device, or NULL */ uint32_t device_flags; /**< required BHND_DF_* flags */ }; #define _BHND_DEVICE(_vendor, _device, _desc, _quirks, \ _flags, ...) \ { { BHND_MATCH_CORE(BHND_MFGID_ ## _vendor, \ BHND_COREID_ ## _device) }, _desc, _quirks, \ _flags } #define BHND_DEVICE(_vendor, _device, _desc, _quirks, ...) \ _BHND_DEVICE(_vendor, _device, _desc, _quirks, \ ## __VA_ARGS__, 0) #define BHND_DEVICE_END { { BHND_MATCH_ANY }, NULL, NULL, 0 } #define BHND_DEVICE_IS_END(_d) \ (BHND_MATCH_IS_ANY(&(_d)->core) && (_d)->desc == NULL) /** * bhnd device sort order. */ typedef enum { BHND_DEVICE_ORDER_ATTACH, /**< sort by bhnd(4) device attach order; child devices should be probed/attached in this order */ BHND_DEVICE_ORDER_DETACH, /**< sort by bhnd(4) device detach order; child devices should be detached, suspended, and shutdown in this order */ } bhnd_device_order; /** * A registry of bhnd service providers. */ struct bhnd_service_registry { STAILQ_HEAD(,bhnd_service_entry) entries; /**< registered services */ struct mtx lock; /**< state lock */ }; /** * bhnd service provider flags. */ enum { BHND_SPF_INHERITED = (1<<0), /**< service provider reference was inherited from a parent bus, and should be deregistered when the last active reference is released */ }; const char *bhnd_vendor_name(uint16_t vendor); const char *bhnd_port_type_name(bhnd_port_type port_type); const char *bhnd_nvram_src_name(bhnd_nvram_src nvram_src); const char *bhnd_find_core_name(uint16_t vendor, uint16_t device); bhnd_devclass_t bhnd_find_core_class(uint16_t vendor, uint16_t device); const char *bhnd_core_name(const struct bhnd_core_info *ci); bhnd_devclass_t bhnd_core_class(const struct bhnd_core_info *ci); int bhnd_format_chip_id(char *buffer, size_t size, uint16_t chip_id); device_t bhnd_bus_match_child(device_t bus, const struct bhnd_core_match *desc); device_t bhnd_bus_find_child(device_t bus, bhnd_devclass_t class, int unit); int bhnd_bus_get_children(device_t bus, device_t **devlistp, int *devcountp, bhnd_device_order order); void bhnd_bus_free_children(device_t *devlist); int bhnd_bus_probe_children(device_t bus); int bhnd_sort_devices(device_t *devlist, size_t devcount, bhnd_device_order order); device_t bhnd_find_bridge_root(device_t dev, devclass_t bus_class); const struct bhnd_core_info *bhnd_match_core( const struct bhnd_core_info *cores, u_int num_cores, const struct bhnd_core_match *desc); const struct bhnd_core_info *bhnd_find_core( const struct bhnd_core_info *cores, u_int num_cores, bhnd_devclass_t class); struct bhnd_core_match bhnd_core_get_match_desc( const struct bhnd_core_info *core); bool bhnd_cores_equal( const struct bhnd_core_info *lhs, const struct bhnd_core_info *rhs); bool bhnd_core_matches( const struct bhnd_core_info *core, const struct bhnd_core_match *desc); bool bhnd_chip_matches( const struct bhnd_chipid *chipid, const struct bhnd_chip_match *desc); bool bhnd_board_matches( const struct bhnd_board_info *info, const struct bhnd_board_match *desc); bool bhnd_hwrev_matches(uint16_t hwrev, const struct bhnd_hwrev_match *desc); bool bhnd_device_matches(device_t dev, const struct bhnd_device_match *desc); const struct bhnd_device *bhnd_device_lookup(device_t dev, const struct bhnd_device *table, size_t entry_size); uint32_t bhnd_device_quirks(device_t dev, const struct bhnd_device *table, size_t entry_size); struct bhnd_core_info bhnd_get_core_info(device_t dev); int bhnd_alloc_resources(device_t dev, struct resource_spec *rs, struct bhnd_resource **res); void bhnd_release_resources(device_t dev, const struct resource_spec *rs, struct bhnd_resource **res); - -struct bhnd_chipid bhnd_parse_chipid(uint32_t idreg, - bhnd_addr_t enum_addr); - -int bhnd_chipid_fixed_ncores( - const struct bhnd_chipid *cid, - uint16_t chipc_hwrev, uint8_t *ncores); - -int bhnd_read_chipid(device_t dev, - struct resource_spec *rs, - bus_size_t chipc_offset, - struct bhnd_chipid *result); void bhnd_set_custom_core_desc(device_t dev, const char *name); void bhnd_set_default_core_desc(device_t dev); void bhnd_set_default_bus_desc(device_t dev, const struct bhnd_chipid *chip_id); int bhnd_nvram_getvar_str(device_t dev, const char *name, char *buf, size_t len, size_t *rlen); int bhnd_nvram_getvar_uint(device_t dev, const char *name, void *value, int width); int bhnd_nvram_getvar_uint8(device_t dev, const char *name, uint8_t *value); int bhnd_nvram_getvar_uint16(device_t dev, const char *name, uint16_t *value); int bhnd_nvram_getvar_uint32(device_t dev, const char *name, uint32_t *value); int bhnd_nvram_getvar_int(device_t dev, const char *name, void *value, int width); int bhnd_nvram_getvar_int8(device_t dev, const char *name, int8_t *value); int bhnd_nvram_getvar_int16(device_t dev, const char *name, int16_t *value); int bhnd_nvram_getvar_int32(device_t dev, const char *name, int32_t *value); int bhnd_nvram_getvar_array(device_t dev, const char *name, void *buf, size_t count, bhnd_nvram_type type); int bhnd_service_registry_init( struct bhnd_service_registry *bsr); int bhnd_service_registry_fini( struct bhnd_service_registry *bsr); int bhnd_service_registry_add( struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service, uint32_t flags); int bhnd_service_registry_remove( struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service); device_t bhnd_service_registry_retain( struct bhnd_service_registry *bsr, bhnd_service_t service); bool bhnd_service_registry_release( struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service); int bhnd_bus_generic_register_provider( device_t dev, device_t child, device_t provider, bhnd_service_t service); int bhnd_bus_generic_deregister_provider( device_t dev, device_t child, device_t provider, bhnd_service_t service); device_t bhnd_bus_generic_retain_provider(device_t dev, device_t child, bhnd_service_t service); void bhnd_bus_generic_release_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service); int bhnd_bus_generic_sr_register_provider( device_t dev, device_t child, device_t provider, bhnd_service_t service); int bhnd_bus_generic_sr_deregister_provider( device_t dev, device_t child, device_t provider, bhnd_service_t service); device_t bhnd_bus_generic_sr_retain_provider(device_t dev, device_t child, bhnd_service_t service); void bhnd_bus_generic_sr_release_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service); bool bhnd_bus_generic_is_hw_disabled(device_t dev, device_t child); bool bhnd_bus_generic_is_region_valid(device_t dev, device_t child, bhnd_port_type type, u_int port, u_int region); int bhnd_bus_generic_get_nvram_var(device_t dev, device_t child, const char *name, void *buf, size_t *size, bhnd_nvram_type type); const struct bhnd_chipid *bhnd_bus_generic_get_chipid(device_t dev, device_t child); int bhnd_bus_generic_get_dma_translation( device_t dev, device_t child, u_int width, uint32_t flags, bus_dma_tag_t *dmat, struct bhnd_dma_translation *translation); int bhnd_bus_generic_read_board_info(device_t dev, device_t child, struct bhnd_board_info *info); struct bhnd_resource *bhnd_bus_generic_alloc_resource (device_t dev, device_t child, int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags); int bhnd_bus_generic_release_resource (device_t dev, device_t child, int type, int rid, struct bhnd_resource *r); int bhnd_bus_generic_activate_resource (device_t dev, device_t child, int type, int rid, struct bhnd_resource *r); int bhnd_bus_generic_deactivate_resource (device_t dev, device_t child, int type, int rid, struct bhnd_resource *r); uintptr_t bhnd_bus_generic_get_intr_domain(device_t dev, device_t child, bool self); /** * Return the bhnd(4) bus driver's device enumeration parser class * * @param driver A bhnd bus driver instance. */ static inline bhnd_erom_class_t * bhnd_driver_get_erom_class(driver_t *driver) { return (BHND_BUS_GET_EROM_CLASS(driver)); } /** * Return the active host bridge core for the bhnd bus, if any, or NULL if * not found. * * @param dev A bhnd bus device. */ static inline device_t bhnd_bus_find_hostb_device(device_t dev) { return (BHND_BUS_FIND_HOSTB_DEVICE(dev)); } /** * Register a provider for a given @p service. * * @param dev The device to register as a service provider * with its parent bus. * @param service The service for which @p dev will be registered. * * @retval 0 success * @retval EEXIST if an entry for @p service already exists. * @retval non-zero if registering @p dev otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_register_provider(device_t dev, bhnd_service_t service) { return (BHND_BUS_REGISTER_PROVIDER(device_get_parent(dev), dev, dev, service)); } /** * Attempt to remove a service provider registration for @p dev. * * @param dev The device to be deregistered as a service provider. * @param service The service for which @p dev will be deregistered, or * BHND_SERVICE_INVALID to remove all service registrations * for @p dev. * * @retval 0 success * @retval EBUSY if active references to @p dev exist; @see * bhnd_retain_provider() and bhnd_release_provider(). */ static inline int bhnd_deregister_provider(device_t dev, bhnd_service_t service) { return (BHND_BUS_DEREGISTER_PROVIDER(device_get_parent(dev), dev, dev, service)); } /** * Retain and return a reference to the registered @p service provider, if any. * * @param dev The requesting device. * @param service The service for which a provider should be returned. * * On success, the caller assumes ownership the returned provider, and * is responsible for releasing this reference via * BHND_BUS_RELEASE_PROVIDER(). * * @retval device_t success * @retval NULL if no provider is registered for @p service. */ static inline device_t bhnd_retain_provider(device_t dev, bhnd_service_t service) { return (BHND_BUS_RETAIN_PROVIDER(device_get_parent(dev), dev, service)); } /** * Release a reference to a provider device previously returned by * bhnd_retain_provider(). * * @param dev The requesting device. * @param provider The provider to be released. * @param service The service for which @p provider was previously retained. */ static inline void bhnd_release_provider(device_t dev, device_t provider, bhnd_service_t service) { return (BHND_BUS_RELEASE_PROVIDER(device_get_parent(dev), dev, provider, service)); } /** * Return true if the hardware components required by @p dev are known to be * unpopulated or otherwise unusable. * * In some cases, enumerated devices may have pins that are left floating, or * the hardware may otherwise be non-functional; this method allows a parent * device to explicitly specify if a successfully enumerated @p dev should * be disabled. * * @param dev A bhnd bus child device. */ static inline bool bhnd_is_hw_disabled(device_t dev) { return (BHND_BUS_IS_HW_DISABLED(device_get_parent(dev), dev)); } /** * Return the BHND chip identification info for the bhnd bus. * * @param dev A bhnd bus child device. */ static inline const struct bhnd_chipid * bhnd_get_chipid(device_t dev) { return (BHND_BUS_GET_CHIPID(device_get_parent(dev), dev)); }; /** * Read the current value of a bhnd(4) device's per-core I/O control register. * * @param dev The bhnd bus child device to be queried. * @param[out] ioctl On success, the I/O control register value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If reading the IOCTL register otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_read_ioctl(device_t dev, uint16_t *ioctl) { return (BHND_BUS_READ_IOCTL(device_get_parent(dev), dev, ioctl)); } /** * Write @p value and @p mask to a bhnd(4) device's per-core I/O control * register. * * @param dev The bhnd bus child device for which the IOCTL register will be * written. * @param value The value to be written (see BHND_IOCTL_*). * @param mask Only the bits defined by @p mask will be updated from @p value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If writing the IOCTL register otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_write_ioctl(device_t dev, uint16_t value, uint16_t mask) { return (BHND_BUS_WRITE_IOCTL(device_get_parent(dev), dev, value, mask)); } /** * Read the current value of a bhnd(4) device's per-core I/O status register. * * @param dev The bhnd bus child device to be queried. * @param[out] iost On success, the I/O status register value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If reading the IOST register otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_read_iost(device_t dev, uint16_t *iost) { return (BHND_BUS_READ_IOST(device_get_parent(dev), dev, iost)); } /** * Return true if the given bhnd device's hardware is currently held * in a RESET state or otherwise not clocked (BHND_IOCTL_CLK_EN). * * @param dev The device to query. * * @retval true If @p dev is held in RESET or not clocked (BHND_IOCTL_CLK_EN), * or an error occured determining @p dev's hardware state. * @retval false If @p dev is clocked and is not held in RESET. */ static inline bool bhnd_is_hw_suspended(device_t dev) { return (BHND_BUS_IS_HW_SUSPENDED(device_get_parent(dev), dev)); } /** * Place the bhnd(4) device's hardware into a low-power RESET state with * the @p reset_ioctl I/O control flags set, and then bring the hardware out of * RESET with the @p ioctl I/O control flags set. * * Any clock or resource PMU requests previously made by @p child will be * invalidated. * * @param dev The device to be reset. * @param ioctl Device-specific I/O control flags to be set when bringing * the core out of its RESET state (see BHND_IOCTL_*). * @param reset_ioctl Device-specific I/O control flags to be set when placing * the core into its RESET state. * * @retval 0 success * @retval non-zero error */ static inline int bhnd_reset_hw(device_t dev, uint16_t ioctl, uint16_t reset_ioctl) { return (BHND_BUS_RESET_HW(device_get_parent(dev), dev, ioctl, reset_ioctl)); } /** * Suspend @p child's hardware in a low-power reset state. * * Any clock or resource PMU requests previously made by @p dev will be * invalidated. * * The hardware may be brought out of reset via bhnd_reset_hw(). * * @param dev The device to be suspended. * * @retval 0 success * @retval non-zero error */ static inline int bhnd_suspend_hw(device_t dev, uint16_t ioctl) { return (BHND_BUS_SUSPEND_HW(device_get_parent(dev), dev, ioctl)); } /** * Return the BHND attachment type of the parent bhnd bus. * * @param dev A bhnd bus child device. * * @retval BHND_ATTACH_ADAPTER if the bus is resident on a bridged adapter, * such as a WiFi chipset. * @retval BHND_ATTACH_NATIVE if the bus provides hardware services (clock, * CPU, etc) to a directly attached native host. */ static inline bhnd_attach_type bhnd_get_attach_type (device_t dev) { return (BHND_BUS_GET_ATTACH_TYPE(device_get_parent(dev), dev)); } /** * Find the best available DMA address translation capable of mapping a * physical host address to a BHND DMA device address of @p width with * @p flags. * * @param dev A bhnd bus child device. * @param width The address width within which the translation window must * reside (see BHND_DMA_ADDR_*). * @param flags Required translation flags (see BHND_DMA_TRANSLATION_*). * @param[out] dmat On success, will be populated with a DMA tag specifying the * @p translation DMA address restrictions. This argment may be NULL if the DMA * tag is not desired. * the set of valid host DMA addresses reachable via @p translation. * @param[out] translation On success, will be populated with a DMA address * translation descriptor for @p child. This argment may be NULL if the * descriptor is not desired. * * @retval 0 success * @retval ENODEV If DMA is not supported. * @retval ENOENT If no DMA translation matching @p width and @p flags is * available. * @retval non-zero If determining the DMA address translation for @p child * otherwise fails, a regular unix error code will be returned. */ static inline int bhnd_get_dma_translation(device_t dev, u_int width, uint32_t flags, bus_dma_tag_t *dmat, struct bhnd_dma_translation *translation) { return (BHND_BUS_GET_DMA_TRANSLATION(device_get_parent(dev), dev, width, flags, dmat, translation)); } /** * Attempt to read the BHND board identification from the bhnd bus. * * This relies on NVRAM access, and will fail if a valid NVRAM device cannot * be found, or is not yet attached. * * @param dev The bhnd device requesting board info. * @param[out] info On success, will be populated with the bhnd(4) device's * board information. * * @retval 0 success * @retval ENODEV No valid NVRAM source could be found. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ static inline int bhnd_read_board_info(device_t dev, struct bhnd_board_info *info) { return (BHND_BUS_READ_BOARD_INFO(device_get_parent(dev), dev, info)); } /** * Return the number of interrupt lines assigned to @p dev. * * @param dev A bhnd bus child device. */ static inline u_int bhnd_get_intr_count(device_t dev) { return (BHND_BUS_GET_INTR_COUNT(device_get_parent(dev), dev)); } /** * Get the backplane interrupt vector of the @p intr line attached to @p dev. * * @param dev A bhnd bus child device. * @param intr The index of the interrupt line being queried. * @param[out] ivec On success, the assigned hardware interrupt vector will be * written to this pointer. * * On bcma(4) devices, this returns the OOB bus line assigned to the * interrupt. * * On siba(4) devices, this returns the target OCP slave flag number assigned * to the interrupt. * * @retval 0 success * @retval ENXIO If @p intr exceeds the number of interrupt lines * assigned to @p child. */ static inline int bhnd_get_intr_ivec(device_t dev, u_int intr, u_int *ivec) { return (BHND_BUS_GET_INTR_IVEC(device_get_parent(dev), dev, intr, ivec)); } /** * Map the given @p intr to an IRQ number; until unmapped, this IRQ may be used * to allocate a resource of type SYS_RES_IRQ. * * On success, the caller assumes ownership of the interrupt mapping, and * is responsible for releasing the mapping via bhnd_unmap_intr(). * * @param dev The requesting device. * @param intr The interrupt being mapped. * @param[out] irq On success, the bus interrupt value mapped for @p intr. * * @retval 0 If an interrupt was assigned. * @retval non-zero If mapping an interrupt otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_map_intr(device_t dev, u_int intr, rman_res_t *irq) { return (BHND_BUS_MAP_INTR(device_get_parent(dev), dev, intr, irq)); } /** * Unmap an bus interrupt previously mapped via bhnd_map_intr(). * * @param dev The requesting device. * @param irq The interrupt value being unmapped. */ static inline void bhnd_unmap_intr(device_t dev, rman_res_t irq) { return (BHND_BUS_UNMAP_INTR(device_get_parent(dev), dev, irq)); } /** * Allocate and enable per-core PMU request handling for @p child. * * The region containing the core's PMU register block (if any) must be * allocated via bus_alloc_resource(9) (or bhnd_alloc_resource) before * calling bhnd_alloc_pmu(), and must not be released until after * calling bhnd_release_pmu(). * * @param dev The requesting bhnd device. * * @retval 0 success * @retval non-zero If allocating PMU request state otherwise fails, a * regular unix error code will be returned. */ static inline int bhnd_alloc_pmu(device_t dev) { return (BHND_BUS_ALLOC_PMU(device_get_parent(dev), dev)); } /** * Release any per-core PMU resources allocated for @p child. Any outstanding * PMU requests are are discarded. * * @param dev The requesting bhnd device. * * @retval 0 success * @retval non-zero If releasing PMU request state otherwise fails, a * regular unix error code will be returned, and * the core state will be left unmodified. */ static inline int bhnd_release_pmu(device_t dev) { return (BHND_BUS_RELEASE_PMU(device_get_parent(dev), dev)); } /** * Return the transition latency required for @p clock in microseconds, if * known. * * The BHND_CLOCK_HT latency value is suitable for use as the D11 core's * 'fastpwrup_dly' value. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before querying PMU clocks. * * @param dev The requesting bhnd device. * @param clock The clock to be queried for transition latency. * @param[out] latency On success, the transition latency of @p clock in * microseconds. * * @retval 0 success * @retval ENODEV If the transition latency for @p clock is not available. */ static inline int bhnd_get_clock_latency(device_t dev, bhnd_clock clock, u_int *latency) { return (BHND_BUS_GET_CLOCK_LATENCY(device_get_parent(dev), dev, clock, latency)); } /** * Return the frequency for @p clock in Hz, if known. * * @param dev The requesting bhnd device. * @param clock The clock to be queried. * @param[out] freq On success, the frequency of @p clock in Hz. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before querying PMU clocks. * * @retval 0 success * @retval ENODEV If the frequency for @p clock is not available. */ static inline int bhnd_get_clock_freq(device_t dev, bhnd_clock clock, u_int *freq) { return (BHND_BUS_GET_CLOCK_FREQ(device_get_parent(dev), dev, clock, freq)); } /** * Request that @p clock (or faster) be routed to @p dev. * * @note A driver must ask the bhnd bus to allocate clock request state * via bhnd_alloc_pmu() before it can request clock resources. * * @note Any outstanding PMU clock requests will be discarded upon calling * BHND_BUS_RESET_HW() or BHND_BUS_SUSPEND_HW(). * * @param dev The bhnd(4) device to which @p clock should be routed. * @param clock The requested clock source. * * @retval 0 success * @retval ENODEV If an unsupported clock was requested. * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable, */ static inline int bhnd_request_clock(device_t dev, bhnd_clock clock) { return (BHND_BUS_REQUEST_CLOCK(device_get_parent(dev), dev, clock)); } /** * Request that @p clocks be powered on behalf of @p dev. * * This will power any clock sources (e.g. XTAL, PLL, etc) required for * @p clocks and wait until they are ready, discarding any previous * requests by @p dev. * * @note A driver must ask the bhnd bus to allocate clock request state * via bhnd_alloc_pmu() before it can request clock resources. * * @note Any outstanding PMU clock requests will be discarded upon calling * BHND_BUS_RESET_HW() or BHND_BUS_SUSPEND_HW(). * * @param dev The requesting bhnd(4) device. * @param clocks The clock(s) to be enabled. * * @retval 0 success * @retval ENODEV If an unsupported clock was requested. * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. */ static inline int bhnd_enable_clocks(device_t dev, uint32_t clocks) { return (BHND_BUS_ENABLE_CLOCKS(device_get_parent(dev), dev, clocks)); } /** * Power up an external PMU-managed resource assigned to @p dev. * * @note A driver must ask the bhnd bus to allocate PMU request state * via bhnd_alloc_pmu() before it can request PMU resources. * * @note Any outstanding PMU resource requests will be released upon calling * bhnd_reset_hw() or bhnd_suspend_hw(). * * @param dev The requesting bhnd(4) device. * @param rsrc The core-specific external resource identifier. * * @retval 0 success * @retval ENODEV If the PMU does not support @p rsrc. * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. */ static inline int bhnd_request_ext_rsrc(device_t dev, u_int rsrc) { return (BHND_BUS_REQUEST_EXT_RSRC(device_get_parent(dev), dev, rsrc)); } /** * Power down an external PMU-managed resource assigned to @p dev. * * A driver must ask the bhnd bus to allocate PMU request state * via bhnd_alloc_pmu() before it can request PMU resources. * * @param dev The requesting bhnd(4) device. * @param rsrc The core-specific external resource identifier. * * @retval 0 success * @retval ENODEV If the PMU does not support @p rsrc. * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. */ static inline int bhnd_release_ext_rsrc(device_t dev, u_int rsrc) { return (BHND_BUS_RELEASE_EXT_RSRC(device_get_parent(dev), dev, rsrc)); } /** * Read @p width bytes at @p offset from the bus-specific agent/config * space of @p dev. * * @param dev The bhnd device for which @p offset should be read. * @param offset The offset to be read. * @param[out] value On success, the will be set to the @p width value read * at @p offset. * @param width The size of the access. Must be 1, 2 or 4 bytes. * * The exact behavior of this method is bus-specific. In the case of * bcma(4), this method provides access to the first agent port of @p child. * * @note Device drivers should only use this API for functionality * that is not available via another bhnd(4) function. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval EINVAL If @p width is not one of 1, 2, or 4 bytes. * @retval ENODEV If accessing agent/config space for @p child is unsupported. * @retval EFAULT If reading @p width at @p offset exceeds the bounds of * the mapped agent/config space for @p child. */ static inline uint32_t bhnd_read_config(device_t dev, bus_size_t offset, void *value, u_int width) { return (BHND_BUS_READ_CONFIG(device_get_parent(dev), dev, offset, value, width)); } /** * Write @p width bytes at @p offset to the bus-specific agent/config * space of @p dev. * * @param dev The bhnd device for which @p offset should be read. * @param offset The offset to be written. * @param value A pointer to the value to be written. * @param width The size of @p value. Must be 1, 2 or 4 bytes. * * The exact behavior of this method is bus-specific. In the case of * bcma(4), this method provides access to the first agent port of @p child. * * @note Device drivers should only use this API for functionality * that is not available via another bhnd(4) function. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval EINVAL If @p width is not one of 1, 2, or 4 bytes. * @retval ENODEV If accessing agent/config space for @p child is unsupported. * @retval EFAULT If reading @p width at @p offset exceeds the bounds of * the mapped agent/config space for @p child. */ static inline int bhnd_write_config(device_t dev, bus_size_t offset, const void *value, u_int width) { return (BHND_BUS_WRITE_CONFIG(device_get_parent(dev), dev, offset, value, width)); } /** * Read an NVRAM variable, coerced to the requested @p type. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] buf A buffer large enough to hold @p len bytes. On * success, the requested value will be written to * this buffer. This argment may be NULL if * the value is not desired. * @param[in,out] len The maximum capacity of @p buf. On success, * will be set to the actual size of the requested * value. * @param type The desired data representation to be written * to @p buf. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval ENOMEM If a buffer of @p size is too small to hold the * requested value. * @retval EOPNOTSUPP If the value cannot be coerced to @p type. * @retval ERANGE If value coercion would overflow @p type. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ static inline int bhnd_nvram_getvar(device_t dev, const char *name, void *buf, size_t *len, bhnd_nvram_type type) { return (BHND_BUS_GET_NVRAM_VAR(device_get_parent(dev), dev, name, buf, len, type)); } /** * Allocate a resource from a device's parent bhnd(4) bus. * * @param dev The device requesting resource ownership. * @param type The type of resource to allocate. This may be any type supported * by the standard bus APIs. * @param rid The bus-specific handle identifying the resource being allocated. * @param start The start address of the resource. * @param end The end address of the resource. * @param count The size of the resource. * @param flags The flags for the resource to be allocated. These may be any * values supported by the standard bus APIs. * * To request the resource's default addresses, pass @p start and * @p end values of @c 0 and @c ~0, respectively, and * a @p count of @c 1. * * @retval NULL The resource could not be allocated. * @retval resource The allocated resource. */ static inline struct bhnd_resource * bhnd_alloc_resource(device_t dev, int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) { return BHND_BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, type, rid, start, end, count, flags); } /** * Allocate a resource from a device's parent bhnd(4) bus, using the * resource's default start, end, and count values. * * @param dev The device requesting resource ownership. * @param type The type of resource to allocate. This may be any type supported * by the standard bus APIs. * @param rid The bus-specific handle identifying the resource being allocated. * @param flags The flags for the resource to be allocated. These may be any * values supported by the standard bus APIs. * * @retval NULL The resource could not be allocated. * @retval resource The allocated resource. */ static inline struct bhnd_resource * bhnd_alloc_resource_any(device_t dev, int type, int *rid, u_int flags) { return bhnd_alloc_resource(dev, type, rid, 0, ~0, 1, flags); } /** * Activate a previously allocated bhnd resource. * * @param dev The device holding ownership of the allocated resource. * @param type The type of the resource. * @param rid The bus-specific handle identifying the resource. * @param r A pointer to the resource returned by bhnd_alloc_resource or * BHND_BUS_ALLOC_RESOURCE. * * @retval 0 success * @retval non-zero an error occurred while activating the resource. */ static inline int bhnd_activate_resource(device_t dev, int type, int rid, struct bhnd_resource *r) { return BHND_BUS_ACTIVATE_RESOURCE(device_get_parent(dev), dev, type, rid, r); } /** * Deactivate a previously activated bhnd resource. * * @param dev The device holding ownership of the activated resource. * @param type The type of the resource. * @param rid The bus-specific handle identifying the resource. * @param r A pointer to the resource returned by bhnd_alloc_resource or * BHND_BUS_ALLOC_RESOURCE. * * @retval 0 success * @retval non-zero an error occurred while activating the resource. */ static inline int bhnd_deactivate_resource(device_t dev, int type, int rid, struct bhnd_resource *r) { return BHND_BUS_DEACTIVATE_RESOURCE(device_get_parent(dev), dev, type, rid, r); } /** * Free a resource allocated by bhnd_alloc_resource(). * * @param dev The device holding ownership of the resource. * @param type The type of the resource. * @param rid The bus-specific handle identifying the resource. * @param r A pointer to the resource returned by bhnd_alloc_resource or * BHND_ALLOC_RESOURCE. * * @retval 0 success * @retval non-zero an error occurred while activating the resource. */ static inline int bhnd_release_resource(device_t dev, int type, int rid, struct bhnd_resource *r) { return BHND_BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, type, rid, r); } /** * Return true if @p region_num is a valid region on @p port_num of * @p type attached to @p dev. * * @param dev A bhnd bus child device. * @param type The port type being queried. * @param port The port number being queried. * @param region The region number being queried. */ static inline bool bhnd_is_region_valid(device_t dev, bhnd_port_type type, u_int port, u_int region) { return (BHND_BUS_IS_REGION_VALID(device_get_parent(dev), dev, type, port, region)); } /** * Return the number of ports of type @p type attached to @p def. * * @param dev A bhnd bus child device. * @param type The port type being queried. */ static inline u_int bhnd_get_port_count(device_t dev, bhnd_port_type type) { return (BHND_BUS_GET_PORT_COUNT(device_get_parent(dev), dev, type)); } /** * Return the number of memory regions mapped to @p child @p port of * type @p type. * * @param dev A bhnd bus child device. * @param port The port number being queried. * @param type The port type being queried. */ static inline u_int bhnd_get_region_count(device_t dev, bhnd_port_type type, u_int port) { return (BHND_BUS_GET_REGION_COUNT(device_get_parent(dev), dev, type, port)); } /** * Return the resource-ID for a memory region on the given device port. * * @param dev A bhnd bus child device. * @param type The port type. * @param port The port identifier. * @param region The identifier of the memory region on @p port. * * @retval int The RID for the given @p port and @p region on @p device. * @retval -1 No such port/region found. */ static inline int bhnd_get_port_rid(device_t dev, bhnd_port_type type, u_int port, u_int region) { return BHND_BUS_GET_PORT_RID(device_get_parent(dev), dev, type, port, region); } /** * Decode a port / region pair on @p dev defined by @p rid. * * @param dev A bhnd bus child device. * @param type The resource type. * @param rid The resource identifier. * @param[out] port_type The decoded port type. * @param[out] port The decoded port identifier. * @param[out] region The decoded region identifier. * * @retval 0 success * @retval non-zero No matching port/region found. */ static inline int bhnd_decode_port_rid(device_t dev, int type, int rid, bhnd_port_type *port_type, u_int *port, u_int *region) { return BHND_BUS_DECODE_PORT_RID(device_get_parent(dev), dev, type, rid, port_type, port, region); } /** * Get the address and size of @p region on @p port. * * @param dev A bhnd bus child device. * @param port_type The port type. * @param port The port identifier. * @param region The identifier of the memory region on @p port. * @param[out] region_addr The region's base address. * @param[out] region_size The region's size. * * @retval 0 success * @retval non-zero No matching port/region found. */ static inline int bhnd_get_region_addr(device_t dev, bhnd_port_type port_type, u_int port, u_int region, bhnd_addr_t *region_addr, bhnd_size_t *region_size) { return BHND_BUS_GET_REGION_ADDR(device_get_parent(dev), dev, port_type, port, region, region_addr, region_size); } /* * bhnd bus-level equivalents of the bus_(read|write|set|barrier|...) * macros (compatible with bhnd_resource). * * Generated with bhnd/tools/bus_macro.sh */ #define bhnd_bus_barrier(r, o, l, f) \ (((r)->direct) ? \ bus_barrier((r)->res, (o), (l), (f)) : \ BHND_BUS_BARRIER( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (l), (f))) #define bhnd_bus_read_1(r, o) \ (((r)->direct) ? \ bus_read_1((r)->res, (o)) : \ BHND_BUS_READ_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o))) #define bhnd_bus_read_multi_1(r, o, d, c) \ (((r)->direct) ? \ bus_read_multi_1((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_read_region_1(r, o, d, c) \ (((r)->direct) ? \ bus_read_region_1((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_write_1(r, o, v) \ (((r)->direct) ? \ bus_write_1((r)->res, (o), (v)) : \ BHND_BUS_WRITE_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v))) #define bhnd_bus_write_multi_1(r, o, d, c) \ (((r)->direct) ? \ bus_write_multi_1((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_write_region_1(r, o, d, c) \ (((r)->direct) ? \ bus_write_region_1((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_read_stream_1(r, o) \ (((r)->direct) ? \ bus_read_stream_1((r)->res, (o)) : \ BHND_BUS_READ_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o))) #define bhnd_bus_read_multi_stream_1(r, o, d, c) \ (((r)->direct) ? \ bus_read_multi_stream_1((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_read_region_stream_1(r, o, d, c) \ (((r)->direct) ? \ bus_read_region_stream_1((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_write_stream_1(r, o, v) \ (((r)->direct) ? \ bus_write_stream_1((r)->res, (o), (v)) : \ BHND_BUS_WRITE_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v))) #define bhnd_bus_write_multi_stream_1(r, o, d, c) \ (((r)->direct) ? \ bus_write_multi_stream_1((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_write_region_stream_1(r, o, d, c) \ (((r)->direct) ? \ bus_write_region_stream_1((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_set_multi_1(r, o, v, c) \ (((r)->direct) ? \ bus_set_multi_1((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_MULTI_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c))) #define bhnd_bus_set_region_1(r, o, v, c) \ (((r)->direct) ? \ bus_set_region_1((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_REGION_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c))) #define bhnd_bus_read_2(r, o) \ (((r)->direct) ? \ bus_read_2((r)->res, (o)) : \ BHND_BUS_READ_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o))) #define bhnd_bus_read_multi_2(r, o, d, c) \ (((r)->direct) ? \ bus_read_multi_2((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_read_region_2(r, o, d, c) \ (((r)->direct) ? \ bus_read_region_2((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_write_2(r, o, v) \ (((r)->direct) ? \ bus_write_2((r)->res, (o), (v)) : \ BHND_BUS_WRITE_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v))) #define bhnd_bus_write_multi_2(r, o, d, c) \ (((r)->direct) ? \ bus_write_multi_2((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_write_region_2(r, o, d, c) \ (((r)->direct) ? \ bus_write_region_2((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_read_stream_2(r, o) \ (((r)->direct) ? \ bus_read_stream_2((r)->res, (o)) : \ BHND_BUS_READ_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o))) #define bhnd_bus_read_multi_stream_2(r, o, d, c) \ (((r)->direct) ? \ bus_read_multi_stream_2((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_read_region_stream_2(r, o, d, c) \ (((r)->direct) ? \ bus_read_region_stream_2((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_write_stream_2(r, o, v) \ (((r)->direct) ? \ bus_write_stream_2((r)->res, (o), (v)) : \ BHND_BUS_WRITE_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v))) #define bhnd_bus_write_multi_stream_2(r, o, d, c) \ (((r)->direct) ? \ bus_write_multi_stream_2((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_write_region_stream_2(r, o, d, c) \ (((r)->direct) ? \ bus_write_region_stream_2((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_set_multi_2(r, o, v, c) \ (((r)->direct) ? \ bus_set_multi_2((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_MULTI_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c))) #define bhnd_bus_set_region_2(r, o, v, c) \ (((r)->direct) ? \ bus_set_region_2((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_REGION_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c))) #define bhnd_bus_read_4(r, o) \ (((r)->direct) ? \ bus_read_4((r)->res, (o)) : \ BHND_BUS_READ_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o))) #define bhnd_bus_read_multi_4(r, o, d, c) \ (((r)->direct) ? \ bus_read_multi_4((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_read_region_4(r, o, d, c) \ (((r)->direct) ? \ bus_read_region_4((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_write_4(r, o, v) \ (((r)->direct) ? \ bus_write_4((r)->res, (o), (v)) : \ BHND_BUS_WRITE_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v))) #define bhnd_bus_write_multi_4(r, o, d, c) \ (((r)->direct) ? \ bus_write_multi_4((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_write_region_4(r, o, d, c) \ (((r)->direct) ? \ bus_write_region_4((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_read_stream_4(r, o) \ (((r)->direct) ? \ bus_read_stream_4((r)->res, (o)) : \ BHND_BUS_READ_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o))) #define bhnd_bus_read_multi_stream_4(r, o, d, c) \ (((r)->direct) ? \ bus_read_multi_stream_4((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_read_region_stream_4(r, o, d, c) \ (((r)->direct) ? \ bus_read_region_stream_4((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_write_stream_4(r, o, v) \ (((r)->direct) ? \ bus_write_stream_4((r)->res, (o), (v)) : \ BHND_BUS_WRITE_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v))) #define bhnd_bus_write_multi_stream_4(r, o, d, c) \ (((r)->direct) ? \ bus_write_multi_stream_4((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_write_region_stream_4(r, o, d, c) \ (((r)->direct) ? \ bus_write_region_stream_4((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c))) #define bhnd_bus_set_multi_4(r, o, v, c) \ (((r)->direct) ? \ bus_set_multi_4((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_MULTI_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c))) #define bhnd_bus_set_region_4(r, o, v, c) \ (((r)->direct) ? \ bus_set_region_4((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_REGION_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c))) #endif /* _BHND_BHND_H_ */ Index: head/sys/dev/bhnd/bhnd_erom.c =================================================================== --- head/sys/dev/bhnd/bhnd_erom.c (revision 331743) +++ head/sys/dev/bhnd/bhnd_erom.c (revision 331744) @@ -1,490 +1,603 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2016 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include +#include #include + #include #include +#include + static int bhnd_erom_iores_map(struct bhnd_erom_io *eio, bhnd_addr_t addr, bhnd_size_t size); +static int bhnd_erom_iores_tell(struct bhnd_erom_io *eio, + bhnd_addr_t *addr, bhnd_size_t *size); static uint32_t bhnd_erom_iores_read(struct bhnd_erom_io *eio, bhnd_size_t offset, u_int width); static void bhnd_erom_iores_fini(struct bhnd_erom_io *eio); static int bhnd_erom_iobus_map(struct bhnd_erom_io *eio, bhnd_addr_t addr, bhnd_size_t size); +static int bhnd_erom_iobus_tell(struct bhnd_erom_io *eio, + bhnd_addr_t *addr, bhnd_size_t *size); static uint32_t bhnd_erom_iobus_read(struct bhnd_erom_io *eio, bhnd_size_t offset, u_int width); /** * An implementation of bhnd_erom_io that manages mappings via * bhnd_alloc_resource() and bhnd_release_resource(). */ struct bhnd_erom_iores { struct bhnd_erom_io eio; device_t owner; /**< device from which we'll allocate resources */ int owner_rid; /**< rid to use when allocating new mappings */ struct bhnd_resource *mapped; /**< current mapping, or NULL */ int mapped_rid; /**< resource ID of current mapping, or -1 */ }; /** * Fetch the device enumeration parser class from all bhnd(4)-compatible drivers * registered for @p bus_devclass, probe @p eio for supporting parser classes, * and return the best available supporting enumeration parser class. * * @param bus_devclass The bus device class to be queried for * bhnd(4)-compatible drivers. * @param eio An erom bus I/O instance, configured with a * mapping of the first bus core. * @param hint Identification hint used to identify the device. * If the chipset supports standard chip * identification registers within the first core, * this parameter should be NULL. * @param[out] cid On success, the probed chip identifier. * * @retval non-NULL on success, the best available EROM class. * @retval NULL if no erom class returned a successful probe result for * @p eio. */ bhnd_erom_class_t * bhnd_erom_probe_driver_classes(devclass_t bus_devclass, struct bhnd_erom_io *eio, const struct bhnd_chipid *hint, struct bhnd_chipid *cid) { driver_t **drivers; int drv_count; bhnd_erom_class_t *erom_cls; int error, prio, result; erom_cls = NULL; prio = 0; /* Fetch all available drivers */ error = devclass_get_drivers(bus_devclass, &drivers, &drv_count); if (error) { printf("error fetching bhnd(4) drivers for %s: %d\n", devclass_get_name(bus_devclass), error); return (NULL); } /* Enumerate the drivers looking for the best available EROM class */ for (int i = 0; i < drv_count; i++) { struct bhnd_chipid pcid; bhnd_erom_class_t *cls; /* The default implementation of BHND_BUS_GET_EROM_CLASS() * returns NULL if unimplemented; this should always be safe * to call on arbitrary drivers */ cls = bhnd_driver_get_erom_class(drivers[i]); if (cls == NULL) continue; kobj_class_compile(cls); /* Probe the bus */ result = bhnd_erom_probe(cls, eio, hint, &pcid); /* The parser did not match if an error was returned */ if (result > 0) continue; /* Check for a new highest priority match */ if (erom_cls == NULL || result > prio) { prio = result; *cid = pcid; erom_cls = cls; } /* Terminate immediately on BUS_PROBE_SPECIFIC */ if (result == BUS_PROBE_SPECIFIC) break; } free(drivers, M_TEMP); return (erom_cls); } /** * Allocate and return a new device enumeration table parser. * * @param cls The parser class for which an instance will be * allocated. * @param eio The bus I/O callbacks to use when reading the device * enumeration table. * @param cid The device's chip identifier. * * @retval non-NULL success * @retval NULL if an error occured allocating or initializing the * EROM parser. */ bhnd_erom_t * bhnd_erom_alloc(bhnd_erom_class_t *cls, const struct bhnd_chipid *cid, struct bhnd_erom_io *eio) { bhnd_erom_t *erom; int error; erom = (bhnd_erom_t *)kobj_create((kobj_class_t)cls, M_BHND, M_WAITOK|M_ZERO); if ((error = BHND_EROM_INIT(erom, cid, eio))) { printf("error initializing %s parser at %#jx: %d\n", cls->name, (uintmax_t)cid->enum_addr, error); kobj_delete((kobj_t)erom, M_BHND); return (NULL); } return (erom); } /** * Perform static initialization of a device enumeration table parser. * * This may be used to initialize a caller-allocated erom instance state * during early boot, prior to malloc availability. * * @param cls The parser class for which an instance will be * allocated. * @param erom The erom parser instance to initialize. * @param esize The total available number of bytes allocated for * @p erom. If this is less than is required by @p cls, * ENOMEM will be returned. * @param cid The device's chip identifier. * @param eio The bus I/O callbacks to use when reading the device * enumeration table. * * @retval 0 success * @retval ENOMEM if @p esize is smaller than required by @p cls. * @retval non-zero if an error occurs initializing the EROM parser, * a regular unix error code will be returned. */ int bhnd_erom_init_static(bhnd_erom_class_t *cls, bhnd_erom_t *erom, size_t esize, const struct bhnd_chipid *cid, struct bhnd_erom_io *eio) { kobj_class_t kcls; kcls = (kobj_class_t)cls; /* Verify allocation size */ if (kcls->size > esize) return (ENOMEM); /* Perform instance initialization */ kobj_init_static((kobj_t)erom, kcls); return (BHND_EROM_INIT(erom, cid, eio)); } /** * Release any resources held by a @p erom parser previously * initialized via bhnd_erom_init_static(). * * @param erom An erom parser instance previously initialized via * bhnd_erom_init_static(). */ void bhnd_erom_fini_static(bhnd_erom_t *erom) { return (BHND_EROM_FINI(erom)); } /** * Release all resources held by a @p erom parser previously * allocated via bhnd_erom_alloc(). * * @param erom An erom parser instance previously allocated via * bhnd_erom_alloc(). */ void bhnd_erom_free(bhnd_erom_t *erom) { BHND_EROM_FINI(erom); kobj_delete((kobj_t)erom, M_BHND); } +/** + * Read the chip identification registers mapped by @p eio, popuating @p cid + * with the parsed result + * + * @param eio A bus I/O instance, configured with a mapping + * of the ChipCommon core. + * @param[out] cid On success, the parsed chip identification. + * + * @warning + * On early siba(4) devices, the ChipCommon core does not provide + * a valid CHIPC_ID_NUMCORE field. On these ChipCommon revisions + * (see CHIPC_NCORES_MIN_HWREV()), this function will parse and return + * an invalid `ncores` value. + */ +int +bhnd_erom_read_chipid(struct bhnd_erom_io *eio, struct bhnd_chipid *cid) +{ + bhnd_addr_t cc_addr; + bhnd_size_t cc_size; + uint32_t idreg, cc_caps; + int error; + /* Fetch ChipCommon address */ + if ((error = bhnd_erom_io_tell(eio, &cc_addr, &cc_size))) + return (error); + + /* Read chip identifier */ + idreg = bhnd_erom_io_read(eio, CHIPC_ID, 4); + + /* Extract the basic chip info */ + cid->chip_id = CHIPC_GET_BITS(idreg, CHIPC_ID_CHIP); + cid->chip_pkg = CHIPC_GET_BITS(idreg, CHIPC_ID_PKG); + cid->chip_rev = CHIPC_GET_BITS(idreg, CHIPC_ID_REV); + cid->chip_type = CHIPC_GET_BITS(idreg, CHIPC_ID_BUS); + cid->ncores = CHIPC_GET_BITS(idreg, CHIPC_ID_NUMCORE); + + /* Populate EROM address */ + if (BHND_CHIPTYPE_HAS_EROM(cid->chip_type)) { + cid->enum_addr = bhnd_erom_io_read(eio, CHIPC_EROMPTR, 4); + } else { + cid->enum_addr = cc_addr; + } + + /* Populate capability flags */ + cc_caps = bhnd_erom_io_read(eio, CHIPC_CAPABILITIES, 4); + cid->chip_caps = 0x0; + + if (cc_caps & CHIPC_CAP_BKPLN64) + cid->chip_caps |= BHND_CAP_BP64; + + if (cc_caps & CHIPC_CAP_PMU) + cid->chip_caps |= BHND_CAP_PMU; + + return (0); +} + + /** * Attempt to map @p size bytes at @p addr, replacing any existing * @p eio mapping. * * @param eio I/O instance state. * @param addr The address to be mapped. * @param size The number of bytes to be mapped at @p addr. * * @retval 0 success * @retval non-zero if mapping @p addr otherwise fails, a regular * unix error code should be returned. */ int bhnd_erom_io_map(struct bhnd_erom_io *eio, bhnd_addr_t addr, bhnd_size_t size) { return (eio->map(eio, addr, size)); } /** + * Return the address range mapped by @p eio, if any. + * + * @param eio I/O instance state. + * @param[out] addr The address mapped by @p eio. + * @param[out] size The number of bytes mapped at @p addr. + * + * @retval 0 success + * @retval ENXIO if @p eio has no mapping. + */ +int +bhnd_erom_io_tell(struct bhnd_erom_io *eio, bhnd_addr_t *addr, + bhnd_size_t *size) +{ + return (eio->tell(eio, addr, size)); +} + +/** * Read a 1, 2, or 4 byte data item from @p eio, at the given @p offset * relative to @p eio's current mapping. * * @param eio erom I/O callbacks * @param offset read offset. * @param width item width (1, 2, or 4 bytes). */ uint32_t bhnd_erom_io_read(struct bhnd_erom_io *eio, bhnd_size_t offset, u_int width) { return (eio->read(eio, offset, width)); } /** * Free all resources held by @p eio. */ void bhnd_erom_io_fini(struct bhnd_erom_io *eio) { if (eio->fini != NULL) return (eio->fini(eio)); } /** * Allocate, initialize, and return a new I/O instance that will perform * mapping by allocating SYS_RES_MEMORY resources from @p dev using @p rid. * * @param dev The device to pass to bhnd_alloc_resource() and * bhnd_release_resource() functions. * @param rid The resource ID to be used when allocating memory resources. */ struct bhnd_erom_io * bhnd_erom_iores_new(device_t dev, int rid) { struct bhnd_erom_iores *iores; iores = malloc(sizeof(*iores), M_BHND, M_WAITOK | M_ZERO); iores->eio.map = bhnd_erom_iores_map; + iores->eio.tell = bhnd_erom_iores_tell; iores->eio.read = bhnd_erom_iores_read; iores->eio.fini = bhnd_erom_iores_fini; iores->owner = dev; iores->owner_rid = rid; iores->mapped = NULL; iores->mapped_rid = -1; return (&iores->eio); } static int bhnd_erom_iores_map(struct bhnd_erom_io *eio, bhnd_addr_t addr, bhnd_size_t size) { struct bhnd_erom_iores *iores; iores = (struct bhnd_erom_iores *)eio; /* Sanity check the addr/size */ if (size == 0) return (EINVAL); if (BHND_ADDR_MAX - size < addr) return (EINVAL); /* would overflow */ /* Check for an existing mapping */ if (iores->mapped) { /* If already mapped, nothing else to do */ if (rman_get_start(iores->mapped->res) == addr && rman_get_size(iores->mapped->res) == size) { return (0); } /* Otherwise, we need to drop the existing mapping */ bhnd_release_resource(iores->owner, SYS_RES_MEMORY, iores->mapped_rid, iores->mapped); iores->mapped = NULL; iores->mapped_rid = -1; } /* Try to allocate the new mapping */ iores->mapped_rid = iores->owner_rid; iores->mapped = bhnd_alloc_resource(iores->owner, SYS_RES_MEMORY, &iores->mapped_rid, addr, addr+size-1, size, RF_ACTIVE|RF_SHAREABLE); if (iores->mapped == NULL) { iores->mapped_rid = -1; return (ENXIO); } return (0); } +static int +bhnd_erom_iores_tell(struct bhnd_erom_io *eio, bhnd_addr_t *addr, + bhnd_size_t *size) +{ + struct bhnd_erom_iores *iores = (struct bhnd_erom_iores *)eio; + + if (iores->mapped == NULL) + return (ENXIO); + + *addr = rman_get_start(iores->mapped->res); + *size = rman_get_size(iores->mapped->res); + + return (0); +} + static uint32_t bhnd_erom_iores_read(struct bhnd_erom_io *eio, bhnd_size_t offset, u_int width) { struct bhnd_erom_iores *iores = (struct bhnd_erom_iores *)eio; if (iores->mapped == NULL) panic("read with invalid mapping"); switch (width) { case 1: return (bhnd_bus_read_1(iores->mapped, offset)); case 2: return (bhnd_bus_read_2(iores->mapped, offset)); case 4: return (bhnd_bus_read_4(iores->mapped, offset)); default: panic("invalid width %u", width); } } static void bhnd_erom_iores_fini(struct bhnd_erom_io *eio) { struct bhnd_erom_iores *iores = (struct bhnd_erom_iores *)eio; /* Release any mapping */ if (iores->mapped) { bhnd_release_resource(iores->owner, SYS_RES_MEMORY, iores->mapped_rid, iores->mapped); iores->mapped = NULL; iores->mapped_rid = -1; } free(eio, M_BHND); } /** * Initialize an I/O instance that will perform mapping directly from the * given bus space tag and handle. * * @param iobus The I/O instance to be initialized. * @param addr The base address mapped by @p bsh. * @param size The total size mapped by @p bsh. * @param bst Bus space tag for @p bsh. * @param bsh Bus space handle mapping the full bus enumeration space. * * @retval 0 success * @retval non-zero if initializing @p iobus otherwise fails, a regular * unix error code will be returned. */ int bhnd_erom_iobus_init(struct bhnd_erom_iobus *iobus, bhnd_addr_t addr, bhnd_size_t size, bus_space_tag_t bst, bus_space_handle_t bsh) { iobus->eio.map = bhnd_erom_iobus_map; + iobus->eio.tell = bhnd_erom_iobus_tell; iobus->eio.read = bhnd_erom_iobus_read; iobus->eio.fini = NULL; iobus->addr = addr; iobus->size = size; iobus->bst = bst; iobus->bsh = bsh; iobus->mapped = false; return (0); } static int bhnd_erom_iobus_map(struct bhnd_erom_io *eio, bhnd_addr_t addr, bhnd_size_t size) { struct bhnd_erom_iobus *iobus = (struct bhnd_erom_iobus *)eio; /* Sanity check the addr/size */ if (size == 0) return (EINVAL); /* addr+size must not overflow */ if (BHND_ADDR_MAX - size < addr) return (EINVAL); /* addr/size must fit within our bus tag's mapping */ if (addr < iobus->addr || size > iobus->size) return (ENXIO); if (iobus->size - (addr - iobus->addr) < size) return (ENXIO); /* The new addr offset and size must be representible as a bus_size_t */ if ((addr - iobus->addr) > BUS_SPACE_MAXSIZE) return (ENXIO); if (size > BUS_SPACE_MAXSIZE) return (ENXIO); iobus->offset = addr - iobus->addr; iobus->limit = size; iobus->mapped = true; + + return (0); +} + +static int +bhnd_erom_iobus_tell(struct bhnd_erom_io *eio, bhnd_addr_t *addr, + bhnd_size_t *size) +{ + struct bhnd_erom_iobus *iobus = (struct bhnd_erom_iobus *)eio; + + if (!iobus->mapped) + return (ENXIO); + + *addr = iobus->addr + iobus->offset; + *size = iobus->limit; return (0); } static uint32_t bhnd_erom_iobus_read(struct bhnd_erom_io *eio, bhnd_size_t offset, u_int width) { struct bhnd_erom_iobus *iobus = (struct bhnd_erom_iobus *)eio; if (!iobus->mapped) panic("no active mapping"); if (iobus->limit < width || iobus->limit - width < offset) panic("invalid offset %#jx", offset); switch (width) { case 1: return (bus_space_read_1(iobus->bst, iobus->bsh, iobus->offset + offset)); case 2: return (bus_space_read_2(iobus->bst, iobus->bsh, iobus->offset + offset)); case 4: return (bus_space_read_4(iobus->bst, iobus->bsh, iobus->offset + offset)); default: panic("invalid width %u", width); } } Index: head/sys/dev/bhnd/bhnd_erom.h =================================================================== --- head/sys/dev/bhnd/bhnd_erom.h (revision 331743) +++ head/sys/dev/bhnd/bhnd_erom.h (revision 331744) @@ -1,249 +1,251 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2015-2017 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. * * $FreeBSD$ */ #ifndef _BHND_EROM_BHND_EROM_H_ #define _BHND_EROM_BHND_EROM_H_ #include #include #include #include #include #include "bhnd_erom_if.h" /* forward declarations */ struct bhnd_erom_io; struct bhnd_erom_iobus; bhnd_erom_class_t *bhnd_erom_probe_driver_classes(devclass_t bus_devclass, struct bhnd_erom_io *eio, const struct bhnd_chipid *hint, struct bhnd_chipid *cid); bhnd_erom_t *bhnd_erom_alloc(bhnd_erom_class_t *cls, const struct bhnd_chipid *cid, struct bhnd_erom_io *eio); int bhnd_erom_init_static(bhnd_erom_class_t *cls, bhnd_erom_t *erom, size_t esize, const struct bhnd_chipid *cid, struct bhnd_erom_io *eio); void bhnd_erom_fini_static(bhnd_erom_t *erom); void bhnd_erom_free(bhnd_erom_t *erom); struct bhnd_erom_io *bhnd_erom_iores_new(device_t dev, int rid); int bhnd_erom_iobus_init(struct bhnd_erom_iobus *iobus, bhnd_addr_t addr, bhnd_size_t size, bus_space_tag_t bst, bus_space_handle_t bsh); int bhnd_erom_io_map(struct bhnd_erom_io *eio, bhnd_addr_t addr, bhnd_size_t size); +int bhnd_erom_io_tell(struct bhnd_erom_io *eio, + bhnd_addr_t *addr, bhnd_size_t *size); uint32_t bhnd_erom_io_read(struct bhnd_erom_io *eio, bhnd_size_t offset, u_int width); void bhnd_erom_io_fini(struct bhnd_erom_io *eio); /** * Abstract bhnd_erom instance state. Must be first member of all subclass * instances. */ struct bhnd_erom { KOBJ_FIELDS; }; /** Number of additional bytes to reserve for statically allocated * bhnd_erom instances. */ #define BHND_EROM_STATIC_BYTES 64 /** * A bhnd_erom instance structure large enough to statically allocate * any known bhnd_erom subclass. * * The maximum size of subclasses is verified statically in * BHND_EROM_DEFINE_CLASS(), and at runtime in bhnd_erom_init_static(). */ struct bhnd_erom_static { struct bhnd_erom obj; uint8_t idata[BHND_EROM_STATIC_BYTES]; }; /** Registered EROM parser class instances. */ SET_DECLARE(bhnd_erom_class_set, bhnd_erom_class_t); #define BHND_EROM_DEFINE_CLASS(name, classvar, methods, size) \ DEFINE_CLASS_0(name, classvar, methods, size); \ BHND_EROM_CLASS_DEF(classvar); \ _Static_assert(size <= sizeof(struct bhnd_erom_static), \ "cannot statically allocate instance data; " \ "increase BHND_EROM_STATIC_BYTES"); #define BHND_EROM_CLASS_DEF(classvar) DATA_SET(bhnd_erom_class_set, classvar) /** * Probe to see if this device enumeration class supports the bhnd bus * mapped by @p eio, returning a standard newbus device probe result * (see BUS_PROBE_*) and the probed chip identification. * * @param cls The erom class to probe. * @param eio A bus I/O instance, configured with a mapping of the * first bus core. * @param hint Identification hint used to identify the device. * If chipset supports standard chip identification * registers within the first core, this parameter should * be NULL. * @param[out] cid On success, the probed chip identifier. * * @retval 0 if this is the only possible device enumeration * parser for the probed bus. * @retval negative if the probe succeeds, a negative value should be * returned; the parser returning the highest negative * value will be selected to handle device enumeration. * @retval ENXIO If the bhnd bus type is not handled by this parser. * @retval positive if an error occurs during probing, a regular unix error * code should be returned. */ static inline int bhnd_erom_probe(bhnd_erom_class_t *cls, struct bhnd_erom_io *eio, const struct bhnd_chipid *hint, struct bhnd_chipid *cid) { return (BHND_EROM_PROBE(cls, eio, hint, cid)); } /** * Parse all cores descriptors in @p erom, returning the array in @p cores and * the count in @p num_cores. * * The memory allocated for the table must be freed via * bhnd_erom_free_core_table(). * * @param erom The erom parser to be queried. * @param[out] cores The table of parsed core descriptors. * @param[out] num_cores The number of core records in @p cores. * * @retval 0 success * @retval non-zero if an error occurs, a regular unix error code will * be returned. */ static inline int bhnd_erom_get_core_table(bhnd_erom_t *erom, struct bhnd_core_info **cores, u_int *num_cores) { return (BHND_EROM_GET_CORE_TABLE(erom, cores, num_cores)); } /** * Free any memory allocated in a previous call to BHND_EROM_GET_CORE_TABLE(). * * @param erom The erom parser instance. * @param cores A core table allocated by @p erom. */ static inline void bhnd_erom_free_core_table(bhnd_erom_t *erom, struct bhnd_core_info *cores) { return (BHND_EROM_FREE_CORE_TABLE(erom, cores)); }; /** * Locate the first core table entry in @p erom that matches @p desc. * * @param erom The erom parser to be queried. * @param desc A core match descriptor. * @param[out] core On success, the matching core info record. * * @retval 0 success * @retval ENOENT No core matching @p desc was found. * @retval non-zero Reading or parsing failed. */ static inline int bhnd_erom_lookup_core(bhnd_erom_t *erom, const struct bhnd_core_match *desc, struct bhnd_core_info *core) { return (BHND_EROM_LOOKUP_CORE(erom, desc, core)); } /** * Locate the first core table entry in @p erom that matches @p desc, * and return the specified port region's base address and size. * * If a core matching @p desc is not found, or the requested port region * is not mapped to the matching core, ENOENT is returned. * * @param erom The erom parser to be queried. * @param desc A core match descriptor. * @param type The port type to search for. * @param port The port to search for. * @param region The port region to search for. * @param[out] core If not NULL, will be populated with the matched core * info record on success. * @param[out] addr On success, the base address of the port region. * @param[out] size On success, the total size of the port region. * * @retval 0 success * @retval ENOENT No core matching @p desc was found. * @retval ENOENT No port region matching @p type, @p port, and @p region * was found. * @retval non-zero Reading or parsing failed. */ static inline int bhnd_erom_lookup_core_addr(bhnd_erom_t *erom, const struct bhnd_core_match *desc, bhnd_port_type type, u_int port, u_int region, struct bhnd_core_info *core, bhnd_addr_t *addr, bhnd_size_t *size) { return (BHND_EROM_LOOKUP_CORE_ADDR(erom, desc, type, port, region, core, addr, size)); }; /** * Enumerate and print all entries in @p erom. * * @param erom The erom parser to be enumerated. * * @retval 0 success * @retval non-zero If an error occurs parsing the EROM table, a regular * unix error code will be returned. */ static inline int bhnd_erom_dump(bhnd_erom_t *erom) { return (BHND_EROM_DUMP(erom)); } #endif /* _BHND_EROM_BHND_EROM_H_ */ Index: head/sys/dev/bhnd/bhnd_eromvar.h =================================================================== --- head/sys/dev/bhnd/bhnd_eromvar.h (revision 331743) +++ head/sys/dev/bhnd/bhnd_eromvar.h (revision 331744) @@ -1,81 +1,91 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * This software was developed by Landon Fuller under sponsorship from * the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. * * $FreeBSD$ */ #ifndef _BHND_EROM_BHND_EROMVAR_H_ #define _BHND_EROM_BHND_EROMVAR_H_ #include #include "bhnd_erom.h" /* forward declarations */ struct bhnd_erom_io; struct bhnd_erom_iobus; /** @see bhnd_erom_io_map() */ typedef int (bhnd_erom_io_map_t)(struct bhnd_erom_io *eio, bhnd_addr_t addr, bhnd_size_t size); +/** @see bhnd_erom_io_tell() */ +typedef int (bhnd_erom_io_tell_t)(struct bhnd_erom_io *eio, + bhnd_addr_t *addr, bhnd_size_t *size); + /** @see bhnd_erom_io_read() */ typedef uint32_t (bhnd_erom_io_read_t)(struct bhnd_erom_io *eio, bhnd_size_t offset, u_int width); /** @see bhnd_erom_io_fini() */ typedef void (bhnd_erom_io_fini_t)(struct bhnd_erom_io *eio); + +int bhnd_erom_read_chipid(struct bhnd_erom_io *eio, + struct bhnd_chipid *cid); + + /** * Abstract EROM bus I/O support. */ struct bhnd_erom_io { bhnd_erom_io_map_t *map; /**< @see bhnd_erom_io_map() */ + bhnd_erom_io_tell_t *tell; /**< @see bhnd_erom_io_tell() */ bhnd_erom_io_read_t *read; /**< @see bhnd_erom_io_read() */ bhnd_erom_io_fini_t *fini; /**< @see bhnd_erom_io_fini(). May be NULL */ }; /** * EROM bus handle/tag I/O instance state. */ struct bhnd_erom_iobus { struct bhnd_erom_io eio; bhnd_addr_t addr; /**< the address of @p bsh */ bhnd_size_t size; /**< the size of @p bsh */ bus_space_tag_t bst; /**< bus space tag */ bus_space_handle_t bsh; /**< bus space handle mapping the full enumeration space */ bool mapped; /**< if a mapping is active */ bus_size_t offset; /**< the current mapped offset within bsh */ bus_size_t limit; /**< the current mapped size relative to offset */ }; #endif /* _BHND_EROM_BHND_EROMVAR_H_ */ Index: head/sys/dev/bhnd/bhnd_subr.c =================================================================== --- head/sys/dev/bhnd/bhnd_subr.c (revision 331743) +++ head/sys/dev/bhnd/bhnd_subr.c (revision 331744) @@ -1,2515 +1,2347 @@ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2015-2016 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include "nvram/bhnd_nvram.h" #include "bhnd_chipc_if.h" #include "bhnd_nvram_if.h" #include "bhnd_nvram_map.h" #include "bhndreg.h" #include "bhndvar.h" #include "bhnd_private.h" static void bhnd_service_registry_free_entry( struct bhnd_service_entry *entry); static int compare_ascending_probe_order(const void *lhs, const void *rhs); static int compare_descending_probe_order(const void *lhs, const void *rhs); /* BHND core device description table. */ static const struct bhnd_core_desc { uint16_t vendor; uint16_t device; bhnd_devclass_t class; const char *desc; } bhnd_core_descs[] = { #define BHND_CDESC(_mfg, _cid, _cls, _desc) \ { BHND_MFGID_ ## _mfg, BHND_COREID_ ## _cid, \ BHND_DEVCLASS_ ## _cls, _desc } BHND_CDESC(BCM, CC, CC, "ChipCommon I/O Controller"), BHND_CDESC(BCM, ILINE20, OTHER, "iLine20 HPNA"), BHND_CDESC(BCM, SRAM, RAM, "SRAM"), BHND_CDESC(BCM, SDRAM, RAM, "SDRAM"), BHND_CDESC(BCM, PCI, PCI, "PCI Bridge"), BHND_CDESC(BCM, MIPS, CPU, "BMIPS CPU"), BHND_CDESC(BCM, ENET, ENET_MAC, "Fast Ethernet MAC"), BHND_CDESC(BCM, V90_CODEC, SOFTMODEM, "V.90 SoftModem Codec"), BHND_CDESC(BCM, USB, USB_DUAL, "USB 1.1 Device/Host Controller"), BHND_CDESC(BCM, ADSL, OTHER, "ADSL Core"), BHND_CDESC(BCM, ILINE100, OTHER, "iLine100 HPNA"), BHND_CDESC(BCM, IPSEC, OTHER, "IPsec Accelerator"), BHND_CDESC(BCM, UTOPIA, OTHER, "UTOPIA ATM Core"), BHND_CDESC(BCM, PCMCIA, PCCARD, "PCMCIA Bridge"), BHND_CDESC(BCM, SOCRAM, RAM, "Internal Memory"), BHND_CDESC(BCM, MEMC, MEMC, "MEMC SDRAM Controller"), BHND_CDESC(BCM, OFDM, OTHER, "OFDM PHY"), BHND_CDESC(BCM, EXTIF, OTHER, "External Interface"), BHND_CDESC(BCM, D11, WLAN, "802.11 MAC/PHY/Radio"), BHND_CDESC(BCM, APHY, WLAN_PHY, "802.11a PHY"), BHND_CDESC(BCM, BPHY, WLAN_PHY, "802.11b PHY"), BHND_CDESC(BCM, GPHY, WLAN_PHY, "802.11g PHY"), BHND_CDESC(BCM, MIPS33, CPU, "BMIPS33 CPU"), BHND_CDESC(BCM, USB11H, USB_HOST, "USB 1.1 Host Controller"), BHND_CDESC(BCM, USB11D, USB_DEV, "USB 1.1 Device Controller"), BHND_CDESC(BCM, USB20H, USB_HOST, "USB 2.0 Host Controller"), BHND_CDESC(BCM, USB20D, USB_DEV, "USB 2.0 Device Controller"), BHND_CDESC(BCM, SDIOH, OTHER, "SDIO Host Controller"), BHND_CDESC(BCM, ROBO, OTHER, "RoboSwitch"), BHND_CDESC(BCM, ATA100, OTHER, "Parallel ATA Controller"), BHND_CDESC(BCM, SATAXOR, OTHER, "SATA DMA/XOR Controller"), BHND_CDESC(BCM, GIGETH, ENET_MAC, "Gigabit Ethernet MAC"), BHND_CDESC(BCM, PCIE, PCIE, "PCIe Bridge"), BHND_CDESC(BCM, NPHY, WLAN_PHY, "802.11n 2x2 PHY"), BHND_CDESC(BCM, SRAMC, MEMC, "SRAM Controller"), BHND_CDESC(BCM, MINIMAC, OTHER, "MINI MAC/PHY"), BHND_CDESC(BCM, ARM11, CPU, "ARM1176 CPU"), BHND_CDESC(BCM, ARM7S, CPU, "ARM7TDMI-S CPU"), BHND_CDESC(BCM, LPPHY, WLAN_PHY, "802.11a/b/g PHY"), BHND_CDESC(BCM, PMU, PMU, "PMU"), BHND_CDESC(BCM, SSNPHY, WLAN_PHY, "802.11n Single-Stream PHY"), BHND_CDESC(BCM, SDIOD, OTHER, "SDIO Device Core"), BHND_CDESC(BCM, ARMCM3, CPU, "ARM Cortex-M3 CPU"), BHND_CDESC(BCM, HTPHY, WLAN_PHY, "802.11n 4x4 PHY"), BHND_CDESC(MIPS,MIPS74K, CPU, "MIPS74k CPU"), BHND_CDESC(BCM, GMAC, ENET_MAC, "Gigabit MAC core"), BHND_CDESC(BCM, DMEMC, MEMC, "DDR1/DDR2 Memory Controller"), BHND_CDESC(BCM, PCIERC, OTHER, "PCIe Root Complex"), BHND_CDESC(BCM, OCP, SOC_BRIDGE, "OCP to OCP Bridge"), BHND_CDESC(BCM, SC, OTHER, "Shared Common Core"), BHND_CDESC(BCM, AHB, SOC_BRIDGE, "OCP to AHB Bridge"), BHND_CDESC(BCM, SPIH, OTHER, "SPI Host Controller"), BHND_CDESC(BCM, I2S, OTHER, "I2S Digital Audio Interface"), BHND_CDESC(BCM, DMEMS, MEMC, "SDR/DDR1 Memory Controller"), BHND_CDESC(BCM, UBUS_SHIM, OTHER, "BCM6362/UBUS WLAN SHIM"), BHND_CDESC(BCM, PCIE2, PCIE, "PCIe Bridge (Gen2)"), BHND_CDESC(ARM, APB_BRIDGE, SOC_BRIDGE, "BP135 AMBA3 AXI to APB Bridge"), BHND_CDESC(ARM, PL301, SOC_ROUTER, "PL301 AMBA3 Interconnect"), BHND_CDESC(ARM, EROM, EROM, "PL366 Device Enumeration ROM"), BHND_CDESC(ARM, OOB_ROUTER, OTHER, "PL367 OOB Interrupt Router"), BHND_CDESC(ARM, AXI_UNMAPPED, OTHER, "Unmapped Address Ranges"), BHND_CDESC(BCM, 4706_CC, CC, "ChipCommon I/O Controller"), BHND_CDESC(BCM, NS_PCIE2, PCIE, "PCIe Bridge (Gen2)"), BHND_CDESC(BCM, NS_DMA, OTHER, "DMA engine"), BHND_CDESC(BCM, NS_SDIO, OTHER, "SDIO 3.0 Host Controller"), BHND_CDESC(BCM, NS_USB20H, USB_HOST, "USB 2.0 Host Controller"), BHND_CDESC(BCM, NS_USB30H, USB_HOST, "USB 3.0 Host Controller"), BHND_CDESC(BCM, NS_A9JTAG, OTHER, "ARM Cortex A9 JTAG Interface"), BHND_CDESC(BCM, NS_DDR23_MEMC, MEMC, "Denali DDR2/DD3 Memory Controller"), BHND_CDESC(BCM, NS_ROM, NVRAM, "System ROM"), BHND_CDESC(BCM, NS_NAND, NVRAM, "NAND Flash Controller"), BHND_CDESC(BCM, NS_QSPI, NVRAM, "QSPI Flash Controller"), BHND_CDESC(BCM, NS_CC_B, CC_B, "ChipCommon B Auxiliary I/O Controller"), BHND_CDESC(BCM, 4706_SOCRAM, RAM, "Internal Memory"), BHND_CDESC(BCM, IHOST_ARMCA9, CPU, "ARM Cortex A9 CPU"), BHND_CDESC(BCM, 4706_GMAC_CMN, ENET, "Gigabit MAC (Common)"), BHND_CDESC(BCM, 4706_GMAC, ENET_MAC, "Gigabit MAC"), BHND_CDESC(BCM, AMEMC, MEMC, "Denali DDR1/DDR2 Memory Controller"), #undef BHND_CDESC /* Derived from inspection of the BCM4331 cores that provide PrimeCell * IDs. Due to lack of documentation, the surmised device name/purpose * provided here may be incorrect. */ { BHND_MFGID_ARM, BHND_PRIMEID_EROM, BHND_DEVCLASS_OTHER, "PL364 Device Enumeration ROM" }, { BHND_MFGID_ARM, BHND_PRIMEID_SWRAP, BHND_DEVCLASS_OTHER, "PL368 Device Management Interface" }, { BHND_MFGID_ARM, BHND_PRIMEID_MWRAP, BHND_DEVCLASS_OTHER, "PL369 Device Management Interface" }, { 0, 0, 0, NULL } }; static const struct bhnd_device_quirk bhnd_chipc_clkctl_quirks[]; static const struct bhnd_device_quirk bhnd_pcmcia_clkctl_quirks[]; /** * Device table entries for core-specific CLKCTL quirk lookup. */ static const struct bhnd_device bhnd_clkctl_devices[] = { BHND_DEVICE(BCM, CC, NULL, bhnd_chipc_clkctl_quirks), BHND_DEVICE(BCM, PCMCIA, NULL, bhnd_pcmcia_clkctl_quirks), BHND_DEVICE_END, }; /** ChipCommon CLKCTL quirks */ static const struct bhnd_device_quirk bhnd_chipc_clkctl_quirks[] = { /* HTAVAIL/ALPAVAIL are bitswapped in chipc's CLKCTL */ BHND_CHIP_QUIRK(4328, HWREV_ANY, BHND_CLKCTL_QUIRK_CCS0), BHND_CHIP_QUIRK(5354, HWREV_ANY, BHND_CLKCTL_QUIRK_CCS0), BHND_DEVICE_QUIRK_END }; /** PCMCIA CLKCTL quirks */ static const struct bhnd_device_quirk bhnd_pcmcia_clkctl_quirks[] = { /* HTAVAIL/ALPAVAIL are bitswapped in pcmcia's CLKCTL */ BHND_CHIP_QUIRK(4328, HWREV_ANY, BHND_CLKCTL_QUIRK_CCS0), BHND_CHIP_QUIRK(5354, HWREV_ANY, BHND_CLKCTL_QUIRK_CCS0), BHND_DEVICE_QUIRK_END }; /** * Return the name for a given JEP106 manufacturer ID. * * @param vendor A JEP106 Manufacturer ID, including the non-standard ARM 4-bit * JEP106 continuation code. */ const char * bhnd_vendor_name(uint16_t vendor) { switch (vendor) { case BHND_MFGID_ARM: return "ARM"; case BHND_MFGID_BCM: return "Broadcom"; case BHND_MFGID_MIPS: return "MIPS"; default: return "unknown"; } } /** * Return the name of a port type. * * @param port_type The port type to look up. */ const char * bhnd_port_type_name(bhnd_port_type port_type) { switch (port_type) { case BHND_PORT_DEVICE: return ("device"); case BHND_PORT_BRIDGE: return ("bridge"); case BHND_PORT_AGENT: return ("agent"); default: return "unknown"; } } /** * Return the name of an NVRAM source. * * @param nvram_src The NVRAM source type to look up. */ const char * bhnd_nvram_src_name(bhnd_nvram_src nvram_src) { switch (nvram_src) { case BHND_NVRAM_SRC_FLASH: return ("flash"); case BHND_NVRAM_SRC_OTP: return ("OTP"); case BHND_NVRAM_SRC_SPROM: return ("SPROM"); case BHND_NVRAM_SRC_UNKNOWN: return ("none"); default: return ("unknown"); } } static const struct bhnd_core_desc * bhnd_find_core_desc(uint16_t vendor, uint16_t device) { for (u_int i = 0; bhnd_core_descs[i].desc != NULL; i++) { if (bhnd_core_descs[i].vendor != vendor) continue; if (bhnd_core_descs[i].device != device) continue; return (&bhnd_core_descs[i]); } return (NULL); } /** * Return a human-readable name for a BHND core. * * @param vendor The core designer's JEDEC-106 Manufacturer ID. * @param device The core identifier. */ const char * bhnd_find_core_name(uint16_t vendor, uint16_t device) { const struct bhnd_core_desc *desc; if ((desc = bhnd_find_core_desc(vendor, device)) == NULL) return ("unknown"); return desc->desc; } /** * Return the device class for a BHND core. * * @param vendor The core designer's JEDEC-106 Manufacturer ID. * @param device The core identifier. */ bhnd_devclass_t bhnd_find_core_class(uint16_t vendor, uint16_t device) { const struct bhnd_core_desc *desc; if ((desc = bhnd_find_core_desc(vendor, device)) == NULL) return (BHND_DEVCLASS_OTHER); return desc->class; } /** * Return a human-readable name for a BHND core. * * @param ci The core's info record. */ const char * bhnd_core_name(const struct bhnd_core_info *ci) { return bhnd_find_core_name(ci->vendor, ci->device); } /** * Return the device class for a BHND core. * * @param ci The core's info record. */ bhnd_devclass_t bhnd_core_class(const struct bhnd_core_info *ci) { return bhnd_find_core_class(ci->vendor, ci->device); } /** * Write a human readable name representation of the given * BHND_CHIPID_* constant to @p buffer. * * @param buffer Output buffer, or NULL to compute the required size. * @param size Capacity of @p buffer, in bytes. * @param chip_id Chip ID to be formatted. * * @return The required number of bytes on success, or a negative integer on * failure. No more than @p size-1 characters be written, with the @p size'th * set to '\0'. * * @sa BHND_CHIPID_MAX_NAMELEN */ int bhnd_format_chip_id(char *buffer, size_t size, uint16_t chip_id) { /* All hex formatted IDs are within the range of 0x4000-0x9C3F (40000-1) */ if (chip_id >= 0x4000 && chip_id <= 0x9C3F) return (snprintf(buffer, size, "BCM%hX", chip_id)); else return (snprintf(buffer, size, "BCM%hu", chip_id)); } /** * Return a core info record populated from a bhnd-attached @p dev. * * @param dev A bhnd device. * * @return A core info record for @p dev. */ struct bhnd_core_info bhnd_get_core_info(device_t dev) { return (struct bhnd_core_info) { .vendor = bhnd_get_vendor(dev), .device = bhnd_get_device(dev), .hwrev = bhnd_get_hwrev(dev), .core_idx = bhnd_get_core_index(dev), .unit = bhnd_get_core_unit(dev) }; } /** * Find a @p class child device with @p unit on @p bus. * * @param bus The bhnd-compatible bus to be searched. * @param class The device class to match on. * @param unit The core unit number; specify -1 to return the first match * regardless of unit number. * * @retval device_t if a matching child device is found. * @retval NULL if no matching child device is found. */ device_t bhnd_bus_find_child(device_t bus, bhnd_devclass_t class, int unit) { struct bhnd_core_match md = { BHND_MATCH_CORE_CLASS(class), BHND_MATCH_CORE_UNIT(unit) }; if (unit == -1) md.m.match.core_unit = 0; return bhnd_bus_match_child(bus, &md); } /** * Find the first child device on @p bus that matches @p desc. * * @param bus The bhnd-compatible bus to be searched. * @param desc A match descriptor. * * @retval device_t if a matching child device is found. * @retval NULL if no matching child device is found. */ device_t bhnd_bus_match_child(device_t bus, const struct bhnd_core_match *desc) { device_t *devlistp; device_t match; int devcnt; int error; error = device_get_children(bus, &devlistp, &devcnt); if (error != 0) return (NULL); match = NULL; for (int i = 0; i < devcnt; i++) { struct bhnd_core_info ci = bhnd_get_core_info(devlistp[i]); if (bhnd_core_matches(&ci, desc)) { match = devlistp[i]; goto done; } } done: free(devlistp, M_TEMP); return match; } /** * Retrieve an ordered list of all device instances currently connected to * @p bus, returning a pointer to the array in @p devlistp and the count * in @p ndevs. * * The memory allocated for the table must be freed via * bhnd_bus_free_children(). * * @param bus The bhnd-compatible bus to be queried. * @param[out] devlist The array of devices. * @param[out] devcount The number of devices in @p devlistp * @param order The order in which devices will be returned * in @p devlist. * * @retval 0 success * @retval non-zero if an error occurs, a regular unix error code will * be returned. */ int bhnd_bus_get_children(device_t bus, device_t **devlist, int *devcount, bhnd_device_order order) { int error; /* Fetch device array */ if ((error = device_get_children(bus, devlist, devcount))) return (error); /* Perform requested sorting */ if ((error = bhnd_sort_devices(*devlist, *devcount, order))) { bhnd_bus_free_children(*devlist); return (error); } return (0); } /** * Free any memory allocated in a previous call to bhnd_bus_get_children(). * * @param devlist The device array returned by bhnd_bus_get_children(). */ void bhnd_bus_free_children(device_t *devlist) { free(devlist, M_TEMP); } /** * Perform in-place sorting of an array of bhnd device instances. * * @param devlist An array of bhnd devices. * @param devcount The number of devices in @p devs. * @param order The sort order to be used. * * @retval 0 success * @retval EINVAL if the sort order is unknown. */ int bhnd_sort_devices(device_t *devlist, size_t devcount, bhnd_device_order order) { int (*compare)(const void *, const void *); switch (order) { case BHND_DEVICE_ORDER_ATTACH: compare = compare_ascending_probe_order; break; case BHND_DEVICE_ORDER_DETACH: compare = compare_descending_probe_order; break; default: printf("unknown sort order: %d\n", order); return (EINVAL); } qsort(devlist, devcount, sizeof(*devlist), compare); return (0); } /* * Ascending comparison of bhnd device's probe order. */ static int compare_ascending_probe_order(const void *lhs, const void *rhs) { device_t ldev, rdev; int lorder, rorder; ldev = (*(const device_t *) lhs); rdev = (*(const device_t *) rhs); lorder = BHND_BUS_GET_PROBE_ORDER(device_get_parent(ldev), ldev); rorder = BHND_BUS_GET_PROBE_ORDER(device_get_parent(rdev), rdev); if (lorder < rorder) { return (-1); } else if (lorder > rorder) { return (1); } else { return (0); } } /* * Descending comparison of bhnd device's probe order. */ static int compare_descending_probe_order(const void *lhs, const void *rhs) { return (compare_ascending_probe_order(rhs, lhs)); } /** * Call device_probe_and_attach() for each of the bhnd bus device's * children, in bhnd attach order. * * @param bus The bhnd-compatible bus for which all children should be probed * and attached. */ int bhnd_bus_probe_children(device_t bus) { device_t *devs; int ndevs; int error; /* Fetch children in attach order */ error = bhnd_bus_get_children(bus, &devs, &ndevs, BHND_DEVICE_ORDER_ATTACH); if (error) return (error); /* Probe and attach all children */ for (int i = 0; i < ndevs; i++) { device_t child = devs[i]; device_probe_and_attach(child); } bhnd_bus_free_children(devs); return (0); } /** * Walk up the bhnd device hierarchy to locate the root device * to which the bhndb bridge is attached. * * This can be used from within bhnd host bridge drivers to locate the * actual upstream host device. * * @param dev A bhnd device. * @param bus_class The expected bus (e.g. "pci") to which the bridge root * should be attached. * * @retval device_t if a matching parent device is found. * @retval NULL if @p dev is not attached via a bhndb bus. * @retval NULL if no parent device is attached via @p bus_class. */ device_t bhnd_find_bridge_root(device_t dev, devclass_t bus_class) { devclass_t bhndb_class; device_t parent; KASSERT(device_get_devclass(device_get_parent(dev)) == bhnd_devclass, ("%s not a bhnd device", device_get_nameunit(dev))); bhndb_class = devclass_find("bhndb"); /* Walk the device tree until we hit a bridge */ parent = dev; while ((parent = device_get_parent(parent)) != NULL) { if (device_get_devclass(parent) == bhndb_class) break; } /* No bridge? */ if (parent == NULL) return (NULL); /* Search for a parent attached to the expected bus class */ while ((parent = device_get_parent(parent)) != NULL) { device_t bus; bus = device_get_parent(parent); if (bus != NULL && device_get_devclass(bus) == bus_class) return (parent); } /* Not found */ return (NULL); } /** * Find the first core in @p cores that matches @p desc. * * @param cores The table to search. * @param num_cores The length of @p cores. * @param desc A match descriptor. * * @retval bhnd_core_info if a matching core is found. * @retval NULL if no matching core is found. */ const struct bhnd_core_info * bhnd_match_core(const struct bhnd_core_info *cores, u_int num_cores, const struct bhnd_core_match *desc) { for (u_int i = 0; i < num_cores; i++) { if (bhnd_core_matches(&cores[i], desc)) return &cores[i]; } return (NULL); } /** * Find the first core in @p cores with the given @p class. * * @param cores The table to search. * @param num_cores The length of @p cores. * @param class The device class to match on. * * @retval non-NULL if a matching core is found. * @retval NULL if no matching core is found. */ const struct bhnd_core_info * bhnd_find_core(const struct bhnd_core_info *cores, u_int num_cores, bhnd_devclass_t class) { struct bhnd_core_match md = { BHND_MATCH_CORE_CLASS(class) }; return bhnd_match_core(cores, num_cores, &md); } /** * Create an equality match descriptor for @p core. * * @param core The core info to be matched on. * * @return an equality match descriptor for @p core. */ struct bhnd_core_match bhnd_core_get_match_desc(const struct bhnd_core_info *core) { return ((struct bhnd_core_match) { BHND_MATCH_CORE_VENDOR(core->vendor), BHND_MATCH_CORE_ID(core->device), BHND_MATCH_CORE_REV(HWREV_EQ(core->hwrev)), BHND_MATCH_CORE_CLASS(bhnd_core_class(core)), BHND_MATCH_CORE_IDX(core->core_idx), BHND_MATCH_CORE_UNIT(core->unit) }); } /** * Return true if the @p lhs is equal to @p rhs. * * @param lhs The first bhnd core descriptor to compare. * @param rhs The second bhnd core descriptor to compare. * * @retval true if @p lhs is equal to @p rhs * @retval false if @p lhs is not equal to @p rhs */ bool bhnd_cores_equal(const struct bhnd_core_info *lhs, const struct bhnd_core_info *rhs) { struct bhnd_core_match md; /* Use an equality match descriptor to perform the comparison */ md = bhnd_core_get_match_desc(rhs); return (bhnd_core_matches(lhs, &md)); } /** * Return true if the @p core matches @p desc. * * @param core A bhnd core descriptor. * @param desc A match descriptor to compare against @p core. * * @retval true if @p core matches @p match. * @retval false if @p core does not match @p match. */ bool bhnd_core_matches(const struct bhnd_core_info *core, const struct bhnd_core_match *desc) { if (desc->m.match.core_vendor && desc->core_vendor != core->vendor) return (false); if (desc->m.match.core_id && desc->core_id != core->device) return (false); if (desc->m.match.core_unit && desc->core_unit != core->unit) return (false); if (desc->m.match.core_rev && !bhnd_hwrev_matches(core->hwrev, &desc->core_rev)) return (false); if (desc->m.match.core_idx && desc->core_idx != core->core_idx) return (false); if (desc->m.match.core_class && desc->core_class != bhnd_core_class(core)) return (false); return true; } /** * Return true if the @p chip matches @p desc. * * @param chip A bhnd chip identifier. * @param desc A match descriptor to compare against @p chip. * * @retval true if @p chip matches @p match. * @retval false if @p chip does not match @p match. */ bool bhnd_chip_matches(const struct bhnd_chipid *chip, const struct bhnd_chip_match *desc) { if (desc->m.match.chip_id && chip->chip_id != desc->chip_id) return (false); if (desc->m.match.chip_pkg && chip->chip_pkg != desc->chip_pkg) return (false); if (desc->m.match.chip_rev && !bhnd_hwrev_matches(chip->chip_rev, &desc->chip_rev)) return (false); if (desc->m.match.chip_type && chip->chip_type != desc->chip_type) return (false); return (true); } /** * Return true if the @p board matches @p desc. * * @param board The bhnd board info. * @param desc A match descriptor to compare against @p board. * * @retval true if @p chip matches @p match. * @retval false if @p chip does not match @p match. */ bool bhnd_board_matches(const struct bhnd_board_info *board, const struct bhnd_board_match *desc) { if (desc->m.match.board_srom_rev && !bhnd_hwrev_matches(board->board_srom_rev, &desc->board_srom_rev)) return (false); if (desc->m.match.board_vendor && board->board_vendor != desc->board_vendor) return (false); if (desc->m.match.board_type && board->board_type != desc->board_type) return (false); if (desc->m.match.board_devid && board->board_devid != desc->board_devid) return (false); if (desc->m.match.board_rev && !bhnd_hwrev_matches(board->board_rev, &desc->board_rev)) return (false); return (true); } /** * Return true if the @p hwrev matches @p desc. * * @param hwrev A bhnd hardware revision. * @param desc A match descriptor to compare against @p core. * * @retval true if @p hwrev matches @p match. * @retval false if @p hwrev does not match @p match. */ bool bhnd_hwrev_matches(uint16_t hwrev, const struct bhnd_hwrev_match *desc) { if (desc->start != BHND_HWREV_INVALID && desc->start > hwrev) return false; if (desc->end != BHND_HWREV_INVALID && desc->end < hwrev) return false; return true; } /** * Return true if the @p dev matches @p desc. * * @param dev A bhnd device. * @param desc A match descriptor to compare against @p dev. * * @retval true if @p dev matches @p match. * @retval false if @p dev does not match @p match. */ bool bhnd_device_matches(device_t dev, const struct bhnd_device_match *desc) { struct bhnd_core_info core; const struct bhnd_chipid *chip; struct bhnd_board_info board; device_t parent; int error; /* Construct individual match descriptors */ struct bhnd_core_match m_core = { _BHND_CORE_MATCH_COPY(desc) }; struct bhnd_chip_match m_chip = { _BHND_CHIP_MATCH_COPY(desc) }; struct bhnd_board_match m_board = { _BHND_BOARD_MATCH_COPY(desc) }; /* Fetch and match core info */ if (m_core.m.match_flags) { /* Only applicable to bhnd-attached cores */ parent = device_get_parent(dev); if (device_get_devclass(parent) != bhnd_devclass) { device_printf(dev, "attempting to match core " "attributes against non-core device\n"); return (false); } core = bhnd_get_core_info(dev); if (!bhnd_core_matches(&core, &m_core)) return (false); } /* Fetch and match chip info */ if (m_chip.m.match_flags) { chip = bhnd_get_chipid(dev); if (!bhnd_chip_matches(chip, &m_chip)) return (false); } /* Fetch and match board info. * * This is not available until after NVRAM is up; earlier device * matches should not include board requirements */ if (m_board.m.match_flags) { if ((error = bhnd_read_board_info(dev, &board))) { device_printf(dev, "failed to read required board info " "during device matching: %d\n", error); return (false); } if (!bhnd_board_matches(&board, &m_board)) return (false); } /* All matched */ return (true); } /** * Search @p table for an entry matching @p dev. * * @param dev A bhnd device to match against @p table. * @param table The device table to search. * @param entry_size The @p table entry size, in bytes. * * @retval non-NULL the first matching device, if any. * @retval NULL if no matching device is found in @p table. */ const struct bhnd_device * bhnd_device_lookup(device_t dev, const struct bhnd_device *table, size_t entry_size) { const struct bhnd_device *entry; device_t hostb, parent; bhnd_attach_type attach_type; uint32_t dflags; parent = device_get_parent(dev); hostb = bhnd_bus_find_hostb_device(parent); attach_type = bhnd_get_attach_type(dev); for (entry = table; !BHND_DEVICE_IS_END(entry); entry = (const struct bhnd_device *) ((const char *) entry + entry_size)) { /* match core info */ if (!bhnd_device_matches(dev, &entry->core)) continue; /* match device flags */ dflags = entry->device_flags; /* hostb implies BHND_ATTACH_ADAPTER requirement */ if (dflags & BHND_DF_HOSTB) dflags |= BHND_DF_ADAPTER; if (dflags & BHND_DF_ADAPTER) if (attach_type != BHND_ATTACH_ADAPTER) continue; if (dflags & BHND_DF_HOSTB) if (dev != hostb) continue; if (dflags & BHND_DF_SOC) if (attach_type != BHND_ATTACH_NATIVE) continue; /* device found */ return (entry); } /* not found */ return (NULL); } /** * Scan the device @p table for all quirk flags applicable to @p dev. * * @param dev A bhnd device to match against @p table. * @param table The device table to search. * @param entry_size The @p table entry size, in bytes. * * @return all matching quirk flags. */ uint32_t bhnd_device_quirks(device_t dev, const struct bhnd_device *table, size_t entry_size) { const struct bhnd_device *dent; const struct bhnd_device_quirk *qent, *qtable; uint32_t quirks; /* Locate the device entry */ if ((dent = bhnd_device_lookup(dev, table, entry_size)) == NULL) return (0); /* Quirks table is optional */ qtable = dent->quirks_table; if (qtable == NULL) return (0); /* Collect matching device quirk entries */ quirks = 0; for (qent = qtable; !BHND_DEVICE_QUIRK_IS_END(qent); qent++) { if (bhnd_device_matches(dev, &qent->desc)) quirks |= qent->quirks; } return (quirks); } /** * Allocate bhnd(4) resources defined in @p rs from a parent bus. * * @param dev The device requesting ownership of the resources. * @param rs A standard bus resource specification. This will be updated * with the allocated resource's RIDs. * @param res On success, the allocated bhnd resources. * * @retval 0 success * @retval non-zero if allocation of any non-RF_OPTIONAL resource fails, * all allocated resources will be released and a regular * unix error code will be returned. */ int bhnd_alloc_resources(device_t dev, struct resource_spec *rs, struct bhnd_resource **res) { /* Initialize output array */ for (u_int i = 0; rs[i].type != -1; i++) res[i] = NULL; for (u_int i = 0; rs[i].type != -1; i++) { res[i] = bhnd_alloc_resource_any(dev, rs[i].type, &rs[i].rid, rs[i].flags); /* Clean up all allocations on failure */ if (res[i] == NULL && !(rs[i].flags & RF_OPTIONAL)) { bhnd_release_resources(dev, rs, res); return (ENXIO); } } return (0); } /** * Release bhnd(4) resources defined in @p rs from a parent bus. * * @param dev The device that owns the resources. * @param rs A standard bus resource specification previously initialized * by @p bhnd_alloc_resources. * @param res The bhnd resources to be released. */ void bhnd_release_resources(device_t dev, const struct resource_spec *rs, struct bhnd_resource **res) { for (u_int i = 0; rs[i].type != -1; i++) { if (res[i] == NULL) continue; bhnd_release_resource(dev, rs[i].type, rs[i].rid, res[i]); res[i] = NULL; } } /** - * Parse the CHIPC_ID_* fields from the ChipCommon CHIPC_ID - * register, returning its bhnd_chipid representation. - * - * @param idreg The CHIPC_ID register value. - * @param enum_addr The enumeration address to include in the result. - * - * @warning - * On early siba(4) devices, the ChipCommon core does not provide - * a valid CHIPC_ID_NUMCORE field. On these ChipCommon revisions - * (see CHIPC_NCORES_MIN_HWREV()), this function will parse and return - * an invalid `ncores` value. - */ -struct bhnd_chipid -bhnd_parse_chipid(uint32_t idreg, bhnd_addr_t enum_addr) -{ - struct bhnd_chipid result; - - /* Fetch the basic chip info */ - result.chip_id = CHIPC_GET_BITS(idreg, CHIPC_ID_CHIP); - result.chip_pkg = CHIPC_GET_BITS(idreg, CHIPC_ID_PKG); - result.chip_rev = CHIPC_GET_BITS(idreg, CHIPC_ID_REV); - result.chip_type = CHIPC_GET_BITS(idreg, CHIPC_ID_BUS); - result.ncores = CHIPC_GET_BITS(idreg, CHIPC_ID_NUMCORE); - - result.enum_addr = enum_addr; - - return (result); -} - - -/** - * Determine the correct core count for a chip identification value that - * may contain an invalid core count. - * - * On some early siba(4) devices (see CHIPC_NCORES_MIN_HWREV()), the ChipCommon - * core does not provide a valid CHIPC_ID_NUMCORE field. - * - * @param cid The chip identification to be queried. - * @param chipc_hwrev The hardware revision of the ChipCommon core from which - * @p cid was parsed. - * @param[out] ncores On success, will be set to the correct core count. - * - * @retval 0 If the core count is already correct, or was mapped to a - * a correct value. - * @retval EINVAL If the core count is incorrect, but the chip was not - * recognized. - */ -int -bhnd_chipid_fixed_ncores(const struct bhnd_chipid *cid, uint16_t chipc_hwrev, - uint8_t *ncores) -{ - /* bcma(4), and most siba(4) devices */ - if (CHIPC_NCORES_MIN_HWREV(chipc_hwrev)) { - *ncores = cid->ncores; - return (0); - } - - /* broken siba(4) chipsets */ - switch (cid->chip_id) { - case BHND_CHIPID_BCM4306: - *ncores = 6; - break; - case BHND_CHIPID_BCM4704: - *ncores = 9; - break; - case BHND_CHIPID_BCM5365: - /* - * BCM5365 does support ID_NUMCORE in at least - * some of its revisions, but for unknown - * reasons, Broadcom's drivers always exclude - * the ChipCommon revision (0x5) used by BCM5365 - * from the set of revisions supporting - * ID_NUMCORE, and instead supply a fixed value. - * - * Presumably, at least some of these devices - * shipped with a broken ID_NUMCORE value. - */ - *ncores = 7; - break; - default: - return (EINVAL); - } - - return (0); -} - -/** - * Allocate the resource defined by @p rs via @p dev, use it - * to read the ChipCommon ID register relative to @p chipc_offset, - * then release the resource. - * - * @param dev The device owning @p rs. - * @param rs A resource spec that encompasses the ChipCommon register block. - * @param chipc_offset The offset of the ChipCommon registers within @p rs. - * @param[out] result The chip identification data. - * - * @retval 0 success - * @retval non-zero if the ChipCommon identification data could not be read. - */ -int -bhnd_read_chipid(device_t dev, struct resource_spec *rs, - bus_size_t chipc_offset, struct bhnd_chipid *result) -{ - struct resource *res; - bhnd_addr_t enum_addr; - uint32_t reg; - uint8_t chip_type; - int error, rid, rtype; - - rid = rs->rid; - rtype = rs->type; - error = 0; - - /* Allocate the ChipCommon window resource and fetch the chipid data */ - res = bus_alloc_resource_any(dev, rtype, &rid, RF_ACTIVE); - if (res == NULL) { - device_printf(dev, - "failed to allocate bhnd chipc resource\n"); - return (ENXIO); - } - - /* Fetch the basic chip info */ - reg = bus_read_4(res, chipc_offset + CHIPC_ID); - chip_type = CHIPC_GET_BITS(reg, CHIPC_ID_BUS); - - /* Fetch the EROMPTR */ - if (BHND_CHIPTYPE_HAS_EROM(chip_type)) { - enum_addr = bus_read_4(res, chipc_offset + CHIPC_EROMPTR); - } else if (chip_type == BHND_CHIPTYPE_SIBA) { - /* siba(4) uses the ChipCommon base address as the enumeration - * address */ - enum_addr = BHND_DEFAULT_CHIPC_ADDR; - } else { - device_printf(dev, "unknown chip type %hhu\n", chip_type); - error = ENODEV; - goto cleanup; - } - - *result = bhnd_parse_chipid(reg, enum_addr); - - /* Fix the core count on early siba(4) devices */ - if (chip_type == BHND_CHIPTYPE_SIBA) { - uint32_t idh; - uint16_t chipc_hwrev; - - /* - * We need the ChipCommon revision to determine whether - * the ncore field is valid. - * - * We can safely assume the siba IDHIGH register is mapped - * within the chipc register block. - */ - idh = bus_read_4(res, SB0_REG_ABS(SIBA_CFG0_IDHIGH)); - chipc_hwrev = SIBA_IDH_CORE_REV(idh); - - error = bhnd_chipid_fixed_ncores(result, chipc_hwrev, - &result->ncores); - if (error) - goto cleanup; - } - -cleanup: - /* Clean up */ - bus_release_resource(dev, rtype, rid, res); - return (error); -} - -/** * Allocate and return a new per-core PMU clock control/status (clkctl) * instance for @p dev. * * @param dev The bhnd(4) core device mapped by @p r. * @param pmu_dev The bhnd(4) PMU device, implmenting the bhnd_pmu_if * interface. The caller is responsible for ensuring that * this reference remains valid for the lifetime of the * returned clkctl instance. * @param r A resource mapping the core's clock control register * (see BHND_CLK_CTL_ST). The caller is responsible for * ensuring that this resource remains valid for the * lifetime of the returned clkctl instance. * @param offset The offset to the clock control register within @p r. * @param max_latency The PMU's maximum state transition latency in * microseconds; this upper bound will be used to busy-wait * on PMU state transitions. * * @retval non-NULL success * @retval NULL if allocation fails. * */ struct bhnd_core_clkctl * bhnd_alloc_core_clkctl(device_t dev, device_t pmu_dev, struct bhnd_resource *r, bus_size_t offset, u_int max_latency) { struct bhnd_core_clkctl *clkctl; clkctl = malloc(sizeof(*clkctl), M_BHND, M_ZERO | M_NOWAIT); if (clkctl == NULL) return (NULL); clkctl->cc_dev = dev; clkctl->cc_pmu_dev = pmu_dev; clkctl->cc_res = r; clkctl->cc_res_offset = offset; clkctl->cc_max_latency = max_latency; clkctl->cc_quirks = bhnd_device_quirks(dev, bhnd_clkctl_devices, sizeof(bhnd_clkctl_devices[0])); BHND_CLKCTL_LOCK_INIT(clkctl); return (clkctl); } /** * Free a clkctl instance previously allocated via bhnd_alloc_core_clkctl(). * * @param clkctl The clkctl instance to be freed. */ void bhnd_free_core_clkctl(struct bhnd_core_clkctl *clkctl) { BHND_CLKCTL_LOCK_DESTROY(clkctl); free(clkctl, M_BHND); } /** * Wait for the per-core clock status to be equal to @p value after * applying @p mask, timing out after the maximum transition latency is reached. * * @param clkctl Per-core clkctl state to be queryied. * @param value Value to wait for. * @param mask Mask to apply prior to value comparison. * * @retval 0 success * @retval ETIMEDOUT if the PMU's maximum transition delay is reached before * the clock status matches @p value and @p mask. */ int bhnd_core_clkctl_wait(struct bhnd_core_clkctl *clkctl, uint32_t value, uint32_t mask) { uint32_t clkst; BHND_CLKCTL_LOCK_ASSERT(clkctl, MA_OWNED); /* Bitswapped HTAVAIL/ALPAVAIL work-around */ if (clkctl->cc_quirks & BHND_CLKCTL_QUIRK_CCS0) { uint32_t fmask, fval; fmask = mask & ~(BHND_CCS_HTAVAIL | BHND_CCS_ALPAVAIL); fval = value & ~(BHND_CCS_HTAVAIL | BHND_CCS_ALPAVAIL); if (mask & BHND_CCS_HTAVAIL) fmask |= BHND_CCS0_HTAVAIL; if (value & BHND_CCS_HTAVAIL) fval |= BHND_CCS0_HTAVAIL; if (mask & BHND_CCS_ALPAVAIL) fmask |= BHND_CCS0_ALPAVAIL; if (value & BHND_CCS_ALPAVAIL) fval |= BHND_CCS0_ALPAVAIL; mask = fmask; value = fval; } for (u_int i = 0; i < clkctl->cc_max_latency; i += 10) { clkst = bhnd_bus_read_4(clkctl->cc_res, clkctl->cc_res_offset); if ((clkst & mask) == (value & mask)) return (0); DELAY(10); } device_printf(clkctl->cc_dev, "clkst wait timeout (value=%#x, " "mask=%#x)\n", value, mask); return (ETIMEDOUT); } /** * Read an NVRAM variable's NUL-terminated string value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] buf A buffer large enough to hold @p len bytes. On * success, the NUL-terminated string value will be * written to this buffer. This argment may be NULL if * the value is not desired. * @param len The maximum capacity of @p buf. * @param[out] rlen On success, will be set to the actual size of * the requested value (including NUL termination). This * argment may be NULL if the size is not desired. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval ENOMEM If @p buf is non-NULL and a buffer of @p len is too * small to hold the requested value. * @retval EFTYPE If the variable data cannot be coerced to a valid * string representation. * @retval ERANGE If value coercion would overflow @p type. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_str(device_t dev, const char *name, char *buf, size_t len, size_t *rlen) { size_t larg; int error; larg = len; error = bhnd_nvram_getvar(dev, name, buf, &larg, BHND_NVRAM_TYPE_STRING); if (rlen != NULL) *rlen = larg; return (error); } /** * Read an NVRAM variable's unsigned integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * @param width The output integer type width (1, 2, or * 4 bytes). * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid unsigned integer representation. * @retval ERANGE If value coercion would overflow (or underflow) an * unsigned representation of the given @p width. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_uint(device_t dev, const char *name, void *value, int width) { bhnd_nvram_type type; size_t len; switch (width) { case 1: type = BHND_NVRAM_TYPE_UINT8; break; case 2: type = BHND_NVRAM_TYPE_UINT16; break; case 4: type = BHND_NVRAM_TYPE_UINT32; break; default: device_printf(dev, "unsupported NVRAM integer width: %d\n", width); return (EINVAL); } len = width; return (bhnd_nvram_getvar(dev, name, value, &len, type)); } /** * Read an NVRAM variable's unsigned 8-bit integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid unsigned integer representation. * @retval ERANGE If value coercion would overflow (or underflow) uint8_t. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_uint8(device_t dev, const char *name, uint8_t *value) { return (bhnd_nvram_getvar_uint(dev, name, value, sizeof(*value))); } /** * Read an NVRAM variable's unsigned 16-bit integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid unsigned integer representation. * @retval ERANGE If value coercion would overflow (or underflow) * uint16_t. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_uint16(device_t dev, const char *name, uint16_t *value) { return (bhnd_nvram_getvar_uint(dev, name, value, sizeof(*value))); } /** * Read an NVRAM variable's unsigned 32-bit integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid unsigned integer representation. * @retval ERANGE If value coercion would overflow (or underflow) * uint32_t. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_uint32(device_t dev, const char *name, uint32_t *value) { return (bhnd_nvram_getvar_uint(dev, name, value, sizeof(*value))); } /** * Read an NVRAM variable's signed integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * @param width The output integer type width (1, 2, or * 4 bytes). * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid integer representation. * @retval ERANGE If value coercion would overflow (or underflow) an * signed representation of the given @p width. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_int(device_t dev, const char *name, void *value, int width) { bhnd_nvram_type type; size_t len; switch (width) { case 1: type = BHND_NVRAM_TYPE_INT8; break; case 2: type = BHND_NVRAM_TYPE_INT16; break; case 4: type = BHND_NVRAM_TYPE_INT32; break; default: device_printf(dev, "unsupported NVRAM integer width: %d\n", width); return (EINVAL); } len = width; return (bhnd_nvram_getvar(dev, name, value, &len, type)); } /** * Read an NVRAM variable's signed 8-bit integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid integer representation. * @retval ERANGE If value coercion would overflow (or underflow) int8_t. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_int8(device_t dev, const char *name, int8_t *value) { return (bhnd_nvram_getvar_int(dev, name, value, sizeof(*value))); } /** * Read an NVRAM variable's signed 16-bit integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid integer representation. * @retval ERANGE If value coercion would overflow (or underflow) * int16_t. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_int16(device_t dev, const char *name, int16_t *value) { return (bhnd_nvram_getvar_int(dev, name, value, sizeof(*value))); } /** * Read an NVRAM variable's signed 32-bit integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid integer representation. * @retval ERANGE If value coercion would overflow (or underflow) * int32_t. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_int32(device_t dev, const char *name, int32_t *value) { return (bhnd_nvram_getvar_int(dev, name, value, sizeof(*value))); } /** * Read an NVRAM variable's array value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] buf A buffer large enough to hold @p size bytes. * On success, the requested value will be written * to this buffer. * @param[in,out] size The required number of bytes to write to * @p buf. * @param type The desired array element data representation. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval ENXIO If less than @p size bytes are available. * @retval ENOMEM If a buffer of @p size is too small to hold the * requested value. * @retval EFTYPE If the variable data cannot be coerced to a * a valid instance of @p type. * @retval ERANGE If value coercion would overflow (or underflow) a * representation of @p type. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_array(device_t dev, const char *name, void *buf, size_t size, bhnd_nvram_type type) { size_t nbytes; int error; /* Attempt read */ nbytes = size; if ((error = bhnd_nvram_getvar(dev, name, buf, &nbytes, type))) return (error); /* Verify that the expected number of bytes were fetched */ if (nbytes < size) return (ENXIO); return (0); } /** * Initialize a service provider registry. * * @param bsr The service registry to initialize. * * @retval 0 success * @retval non-zero if an error occurs initializing the service registry, * a regular unix error code will be returned. */ int bhnd_service_registry_init(struct bhnd_service_registry *bsr) { STAILQ_INIT(&bsr->entries); mtx_init(&bsr->lock, "bhnd_service_registry lock", NULL, MTX_DEF); return (0); } /** * Release all resources held by @p bsr. * * @param bsr A service registry instance previously successfully * initialized via bhnd_service_registry_init(). * * @retval 0 success * @retval EBUSY if active references to service providers registered * with @p bsr exist. */ int bhnd_service_registry_fini(struct bhnd_service_registry *bsr) { struct bhnd_service_entry *entry, *enext; /* Remove everthing we can */ mtx_lock(&bsr->lock); STAILQ_FOREACH_SAFE(entry, &bsr->entries, link, enext) { if (entry->refs > 0) continue; STAILQ_REMOVE(&bsr->entries, entry, bhnd_service_entry, link); free(entry, M_BHND); } if (!STAILQ_EMPTY(&bsr->entries)) { mtx_unlock(&bsr->lock); return (EBUSY); } mtx_unlock(&bsr->lock); mtx_destroy(&bsr->lock); return (0); } /** * Register a @p provider for the given @p service. * * @param bsr Service registry to be modified. * @param provider Service provider to register. * @param service Service for which @p provider will be registered. * @param flags Service provider flags (see BHND_SPF_*). * * @retval 0 success * @retval EEXIST if an entry for @p service already exists. * @retval EINVAL if @p service is BHND_SERVICE_ANY. * @retval non-zero if registering @p provider otherwise fails, a regular * unix error code will be returned. */ int bhnd_service_registry_add(struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service, uint32_t flags) { struct bhnd_service_entry *entry; if (service == BHND_SERVICE_ANY) return (EINVAL); mtx_lock(&bsr->lock); /* Is a service provider already registered? */ STAILQ_FOREACH(entry, &bsr->entries, link) { if (entry->service == service) { mtx_unlock(&bsr->lock); return (EEXIST); } } /* Initialize and insert our new entry */ entry = malloc(sizeof(*entry), M_BHND, M_NOWAIT); if (entry == NULL) { mtx_unlock(&bsr->lock); return (ENOMEM); } entry->provider = provider; entry->service = service; entry->flags = flags; refcount_init(&entry->refs, 0); STAILQ_INSERT_HEAD(&bsr->entries, entry, link); mtx_unlock(&bsr->lock); return (0); } /** * Free an unreferenced registry entry. * * @param entry The entry to be deallocated. */ static void bhnd_service_registry_free_entry(struct bhnd_service_entry *entry) { KASSERT(entry->refs == 0, ("provider has active references")); free(entry, M_BHND); } /** * Attempt to remove the @p service provider registration for @p provider. * * @param bsr The service registry to be modified. * @param provider The service provider to be deregistered. * @param service The service for which @p provider will be deregistered, * or BHND_SERVICE_ANY to remove all service * registrations for @p provider. * * @retval 0 success * @retval EBUSY if active references to @p provider exist; see * bhnd_service_registry_retain() and * bhnd_service_registry_release(). */ int bhnd_service_registry_remove(struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service) { struct bhnd_service_entry *entry, *enext; mtx_lock(&bsr->lock); #define BHND_PROV_MATCH(_e) \ ((_e)->provider == provider && \ (service == BHND_SERVICE_ANY || (_e)->service == service)) /* Validate matching provider entries before making any * modifications */ STAILQ_FOREACH(entry, &bsr->entries, link) { /* Skip non-matching entries */ if (!BHND_PROV_MATCH(entry)) continue; /* Entry is in use? */ if (entry->refs > 0) { mtx_unlock(&bsr->lock); return (EBUSY); } } /* We can now safely remove matching entries */ STAILQ_FOREACH_SAFE(entry, &bsr->entries, link, enext) { /* Skip non-matching entries */ if (!BHND_PROV_MATCH(entry)) continue; /* Remove from list */ STAILQ_REMOVE(&bsr->entries, entry, bhnd_service_entry, link); /* Free provider entry */ bhnd_service_registry_free_entry(entry); } #undef BHND_PROV_MATCH mtx_unlock(&bsr->lock); return (0); } /** * Retain and return a reference to a registered @p service provider, if any. * * @param bsr The service registry to be queried. * @param service The service for which a provider should be returned. * * On success, the caller assumes ownership the returned provider, and * is responsible for releasing this reference via * bhnd_service_registry_release(). * * @retval device_t success * @retval NULL if no provider is registered for @p service. */ device_t bhnd_service_registry_retain(struct bhnd_service_registry *bsr, bhnd_service_t service) { struct bhnd_service_entry *entry; mtx_lock(&bsr->lock); STAILQ_FOREACH(entry, &bsr->entries, link) { if (entry->service != service) continue; /* With a live refcount, entry is gauranteed to remain alive * after we release our lock */ refcount_acquire(&entry->refs); mtx_unlock(&bsr->lock); return (entry->provider); } mtx_unlock(&bsr->lock); /* Not found */ return (NULL); } /** * Release a reference to a service provider previously returned by * bhnd_service_registry_retain(). * * If this is the last reference to an inherited service provider registration * (see BHND_SPF_INHERITED), the registration will also be removed, and * true will be returned. * * @param bsr The service registry from which @p provider * was returned. * @param provider The provider to be released. * @param service The service for which @p provider was previously * retained. * @retval true The inherited service provider registration was removed; * the caller should release its own reference to the * provider. * @retval false The service provider was not inherited, or active * references to the provider remain. * * @see BHND_SPF_INHERITED */ bool bhnd_service_registry_release(struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service) { struct bhnd_service_entry *entry; /* Exclusive lock, as we need to prevent any new references to the * entry from being taken if it's to be removed */ mtx_lock(&bsr->lock); STAILQ_FOREACH(entry, &bsr->entries, link) { bool removed; if (entry->provider != provider) continue; if (entry->service != service) continue; if (refcount_release(&entry->refs) && (entry->flags & BHND_SPF_INHERITED)) { /* If an inherited entry is no longer actively * referenced, remove the local registration and inform * the caller. */ STAILQ_REMOVE(&bsr->entries, entry, bhnd_service_entry, link); bhnd_service_registry_free_entry(entry); removed = true; } else { removed = false; } mtx_unlock(&bsr->lock); return (removed); } /* Caller owns a reference, but no such provider is registered? */ panic("invalid service provider reference"); } /** * Using the bhnd(4) bus-level core information and a custom core name, * populate @p dev's device description. * * @param dev A bhnd-bus attached device. * @param dev_name The core's name (e.g. "SDIO Device Core"). */ void bhnd_set_custom_core_desc(device_t dev, const char *dev_name) { const char *vendor_name; char *desc; vendor_name = bhnd_get_vendor_name(dev); asprintf(&desc, M_BHND, "%s %s, rev %hhu", vendor_name, dev_name, bhnd_get_hwrev(dev)); if (desc != NULL) { device_set_desc_copy(dev, desc); free(desc, M_BHND); } else { device_set_desc(dev, dev_name); } } /** * Using the bhnd(4) bus-level core information, populate @p dev's device * description. * * @param dev A bhnd-bus attached device. */ void bhnd_set_default_core_desc(device_t dev) { bhnd_set_custom_core_desc(dev, bhnd_get_device_name(dev)); } /** * Using the bhnd @p chip_id, populate the bhnd(4) bus @p dev's device * description. * * @param dev A bhnd-bus attached device. * @param chip_id The chip identification. */ void bhnd_set_default_bus_desc(device_t dev, const struct bhnd_chipid *chip_id) { const char *bus_name; char *desc; char chip_name[BHND_CHIPID_MAX_NAMELEN]; /* Determine chip type's bus name */ switch (chip_id->chip_type) { case BHND_CHIPTYPE_SIBA: bus_name = "SIBA bus"; break; case BHND_CHIPTYPE_BCMA: case BHND_CHIPTYPE_BCMA_ALT: bus_name = "BCMA bus"; break; case BHND_CHIPTYPE_UBUS: bus_name = "UBUS bus"; break; default: bus_name = "Unknown Type"; break; } /* Format chip name */ bhnd_format_chip_id(chip_name, sizeof(chip_name), chip_id->chip_id); /* Format and set device description */ asprintf(&desc, M_BHND, "%s %s", chip_name, bus_name); if (desc != NULL) { device_set_desc_copy(dev, desc); free(desc, M_BHND); } else { device_set_desc(dev, bus_name); } } /** * Helper function for implementing BHND_BUS_REGISTER_PROVIDER(). * * This implementation delegates the request to the BHND_BUS_REGISTER_PROVIDER() * method on the parent of @p dev. If no parent exists, the implementation * will return an error. */ int bhnd_bus_generic_register_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service) { device_t parent = device_get_parent(dev); if (parent != NULL) { return (BHND_BUS_REGISTER_PROVIDER(parent, child, provider, service)); } return (ENXIO); } /** * Helper function for implementing BHND_BUS_DEREGISTER_PROVIDER(). * * This implementation delegates the request to the * BHND_BUS_DEREGISTER_PROVIDER() method on the parent of @p dev. If no parent * exists, the implementation will panic. */ int bhnd_bus_generic_deregister_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service) { device_t parent = device_get_parent(dev); if (parent != NULL) { return (BHND_BUS_DEREGISTER_PROVIDER(parent, child, provider, service)); } panic("missing BHND_BUS_DEREGISTER_PROVIDER()"); } /** * Helper function for implementing BHND_BUS_RETAIN_PROVIDER(). * * This implementation delegates the request to the * BHND_BUS_DEREGISTER_PROVIDER() method on the parent of @p dev. If no parent * exists, the implementation will return NULL. */ device_t bhnd_bus_generic_retain_provider(device_t dev, device_t child, bhnd_service_t service) { device_t parent = device_get_parent(dev); if (parent != NULL) { return (BHND_BUS_RETAIN_PROVIDER(parent, child, service)); } return (NULL); } /** * Helper function for implementing BHND_BUS_RELEASE_PROVIDER(). * * This implementation delegates the request to the * BHND_BUS_DEREGISTER_PROVIDER() method on the parent of @p dev. If no parent * exists, the implementation will panic. */ void bhnd_bus_generic_release_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service) { device_t parent = device_get_parent(dev); if (parent != NULL) { return (BHND_BUS_RELEASE_PROVIDER(parent, child, provider, service)); } panic("missing BHND_BUS_RELEASE_PROVIDER()"); } /** * Helper function for implementing BHND_BUS_REGISTER_PROVIDER(). * * This implementation uses the bhnd_service_registry_add() function to * do most of the work. It calls BHND_BUS_GET_SERVICE_REGISTRY() to find * a suitable service registry to edit. */ int bhnd_bus_generic_sr_register_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service) { struct bhnd_service_registry *bsr; bsr = BHND_BUS_GET_SERVICE_REGISTRY(dev, child); KASSERT(bsr != NULL, ("NULL service registry")); return (bhnd_service_registry_add(bsr, provider, service, 0)); } /** * Helper function for implementing BHND_BUS_DEREGISTER_PROVIDER(). * * This implementation uses the bhnd_service_registry_remove() function to * do most of the work. It calls BHND_BUS_GET_SERVICE_REGISTRY() to find * a suitable service registry to edit. */ int bhnd_bus_generic_sr_deregister_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service) { struct bhnd_service_registry *bsr; bsr = BHND_BUS_GET_SERVICE_REGISTRY(dev, child); KASSERT(bsr != NULL, ("NULL service registry")); return (bhnd_service_registry_remove(bsr, provider, service)); } /** * Helper function for implementing BHND_BUS_RETAIN_PROVIDER(). * * This implementation uses the bhnd_service_registry_retain() function to * do most of the work. It calls BHND_BUS_GET_SERVICE_REGISTRY() to find * a suitable service registry. * * If a local provider for the service is not available, and a parent device is * available, this implementation will attempt to fetch and locally register * a service provider reference from the parent of @p dev. */ device_t bhnd_bus_generic_sr_retain_provider(device_t dev, device_t child, bhnd_service_t service) { struct bhnd_service_registry *bsr; device_t parent, provider; int error; bsr = BHND_BUS_GET_SERVICE_REGISTRY(dev, child); KASSERT(bsr != NULL, ("NULL service registry")); /* * Attempt to fetch a service provider reference from either the local * service registry, or if not found, from our parent. * * If we fetch a provider from our parent, we register the provider * with the local service registry to prevent conflicting local * registrations from being added. */ while (1) { /* Check the local service registry first */ provider = bhnd_service_registry_retain(bsr, service); if (provider != NULL) return (provider); /* Otherwise, try to delegate to our parent (if any) */ if ((parent = device_get_parent(dev)) == NULL) return (NULL); provider = BHND_BUS_RETAIN_PROVIDER(parent, dev, service); if (provider == NULL) return (NULL); /* Register the inherited service registration with the local * registry */ error = bhnd_service_registry_add(bsr, provider, service, BHND_SPF_INHERITED); if (error) { BHND_BUS_RELEASE_PROVIDER(parent, dev, provider, service); if (error == EEXIST) { /* A valid service provider was registered * concurrently; retry fetching from the local * registry */ continue; } device_printf(dev, "failed to register service " "provider: %d\n", error); return (NULL); } } } /** * Helper function for implementing BHND_BUS_RELEASE_PROVIDER(). * * This implementation uses the bhnd_service_registry_release() function to * do most of the work. It calls BHND_BUS_GET_SERVICE_REGISTRY() to find * a suitable service registry. */ void bhnd_bus_generic_sr_release_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service) { struct bhnd_service_registry *bsr; bsr = BHND_BUS_GET_SERVICE_REGISTRY(dev, child); KASSERT(bsr != NULL, ("NULL service registry")); /* Release the provider reference; if the refcount hits zero on an * inherited reference, true will be returned, and we need to drop * our own bus reference to the provider */ if (!bhnd_service_registry_release(bsr, provider, service)) return; /* Drop our reference to the borrowed provider */ BHND_BUS_RELEASE_PROVIDER(device_get_parent(dev), dev, provider, service); } /** * Helper function for implementing BHND_BUS_IS_HW_DISABLED(). * * If a parent device is available, this implementation delegates the * request to the BHND_BUS_IS_HW_DISABLED() method on the parent of @p dev. * * If no parent device is available (i.e. on a the bus root), the hardware * is assumed to be usable and false is returned. */ bool bhnd_bus_generic_is_hw_disabled(device_t dev, device_t child) { if (device_get_parent(dev) != NULL) return (BHND_BUS_IS_HW_DISABLED(device_get_parent(dev), child)); return (false); } /** * Helper function for implementing BHND_BUS_GET_CHIPID(). * * This implementation delegates the request to the BHND_BUS_GET_CHIPID() * method on the parent of @p dev. If no parent exists, the implementation * will panic. */ const struct bhnd_chipid * bhnd_bus_generic_get_chipid(device_t dev, device_t child) { if (device_get_parent(dev) != NULL) return (BHND_BUS_GET_CHIPID(device_get_parent(dev), child)); panic("missing BHND_BUS_GET_CHIPID()"); } /** * Helper function for implementing BHND_BUS_GET_DMA_TRANSLATION(). * * If a parent device is available, this implementation delegates the * request to the BHND_BUS_GET_DMA_TRANSLATION() method on the parent of @p dev. * * If no parent device is available, this implementation will panic. */ int bhnd_bus_generic_get_dma_translation(device_t dev, device_t child, u_int width, uint32_t flags, bus_dma_tag_t *dmat, struct bhnd_dma_translation *translation) { if (device_get_parent(dev) != NULL) { return (BHND_BUS_GET_DMA_TRANSLATION(device_get_parent(dev), child, width, flags, dmat, translation)); } panic("missing BHND_BUS_GET_DMA_TRANSLATION()"); } /* nvram board_info population macros for bhnd_bus_generic_read_board_info() */ #define BHND_GV(_dest, _name) \ bhnd_nvram_getvar_uint(child, BHND_NVAR_ ## _name, &_dest, \ sizeof(_dest)) #define REQ_BHND_GV(_dest, _name) do { \ if ((error = BHND_GV(_dest, _name))) { \ device_printf(dev, \ "error reading " __STRING(_name) ": %d\n", error); \ return (error); \ } \ } while(0) #define OPT_BHND_GV(_dest, _name, _default) do { \ if ((error = BHND_GV(_dest, _name))) { \ if (error != ENOENT) { \ device_printf(dev, \ "error reading " \ __STRING(_name) ": %d\n", error); \ return (error); \ } \ _dest = _default; \ } \ } while(0) /** * Helper function for implementing BHND_BUS_READ_BOARDINFO(). * * This implementation populates @p info with information from NVRAM, * defaulting board_vendor and board_type fields to 0 if the * requested variables cannot be found. * * This behavior is correct for most SoCs, but must be overridden on * bridged (PCI, PCMCIA, etc) devices to produce a complete bhnd_board_info * result. */ int bhnd_bus_generic_read_board_info(device_t dev, device_t child, struct bhnd_board_info *info) { int error; OPT_BHND_GV(info->board_vendor, BOARDVENDOR, 0); OPT_BHND_GV(info->board_type, BOARDTYPE, 0); /* srom >= 2 */ OPT_BHND_GV(info->board_devid, DEVID, 0); /* srom >= 8 */ REQ_BHND_GV(info->board_rev, BOARDREV); OPT_BHND_GV(info->board_srom_rev,SROMREV, 0); /* missing in some SoC NVRAM */ REQ_BHND_GV(info->board_flags, BOARDFLAGS); OPT_BHND_GV(info->board_flags2, BOARDFLAGS2, 0); /* srom >= 4 */ OPT_BHND_GV(info->board_flags3, BOARDFLAGS3, 0); /* srom >= 11 */ return (0); } #undef BHND_GV #undef BHND_GV_REQ #undef BHND_GV_OPT /** * Helper function for implementing BHND_BUS_GET_NVRAM_VAR(). * * This implementation searches @p dev for a usable NVRAM child device. * * If no usable child device is found on @p dev, the request is delegated to * the BHND_BUS_GET_NVRAM_VAR() method on the parent of @p dev. */ int bhnd_bus_generic_get_nvram_var(device_t dev, device_t child, const char *name, void *buf, size_t *size, bhnd_nvram_type type) { device_t nvram; device_t parent; /* Make sure we're holding Giant for newbus */ GIANT_REQUIRED; /* Look for a directly-attached NVRAM child */ if ((nvram = device_find_child(dev, "bhnd_nvram", -1)) != NULL) return BHND_NVRAM_GETVAR(nvram, name, buf, size, type); /* Try to delegate to parent */ if ((parent = device_get_parent(dev)) == NULL) return (ENODEV); return (BHND_BUS_GET_NVRAM_VAR(device_get_parent(dev), child, name, buf, size, type)); } /** * Helper function for implementing BHND_BUS_ALLOC_RESOURCE(). * * This implementation of BHND_BUS_ALLOC_RESOURCE() delegates allocation * of the underlying resource to BUS_ALLOC_RESOURCE(), and activation * to @p dev's BHND_BUS_ACTIVATE_RESOURCE(). */ struct bhnd_resource * bhnd_bus_generic_alloc_resource(device_t dev, device_t child, int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) { struct bhnd_resource *br; struct resource *res; int error; br = NULL; res = NULL; /* Allocate the real bus resource (without activating it) */ res = BUS_ALLOC_RESOURCE(dev, child, type, rid, start, end, count, (flags & ~RF_ACTIVE)); if (res == NULL) return (NULL); /* Allocate our bhnd resource wrapper. */ br = malloc(sizeof(struct bhnd_resource), M_BHND, M_NOWAIT); if (br == NULL) goto failed; br->direct = false; br->res = res; /* Attempt activation */ if (flags & RF_ACTIVE) { error = BHND_BUS_ACTIVATE_RESOURCE(dev, child, type, *rid, br); if (error) goto failed; } return (br); failed: if (res != NULL) BUS_RELEASE_RESOURCE(dev, child, type, *rid, res); free(br, M_BHND); return (NULL); } /** * Helper function for implementing BHND_BUS_RELEASE_RESOURCE(). * * This implementation of BHND_BUS_RELEASE_RESOURCE() delegates release of * the backing resource to BUS_RELEASE_RESOURCE(). */ int bhnd_bus_generic_release_resource(device_t dev, device_t child, int type, int rid, struct bhnd_resource *r) { int error; if ((error = BUS_RELEASE_RESOURCE(dev, child, type, rid, r->res))) return (error); free(r, M_BHND); return (0); } /** * Helper function for implementing BHND_BUS_ACTIVATE_RESOURCE(). * * This implementation of BHND_BUS_ACTIVATE_RESOURCE() first calls the * BHND_BUS_ACTIVATE_RESOURCE() method of the parent of @p dev. * * If this fails, and if @p dev is the direct parent of @p child, standard * resource activation is attempted via bus_activate_resource(). This enables * direct use of the bhnd(4) resource APIs on devices that may not be attached * to a parent bhnd bus or bridge. */ int bhnd_bus_generic_activate_resource(device_t dev, device_t child, int type, int rid, struct bhnd_resource *r) { int error; bool passthrough; passthrough = (device_get_parent(child) != dev); /* Try to delegate to the parent */ if (device_get_parent(dev) != NULL) { error = BHND_BUS_ACTIVATE_RESOURCE(device_get_parent(dev), child, type, rid, r); } else { error = ENODEV; } /* If bhnd(4) activation has failed and we're the child's direct * parent, try falling back on standard resource activation. */ if (error && !passthrough) { error = bus_activate_resource(child, type, rid, r->res); if (!error) r->direct = true; } return (error); } /** * Helper function for implementing BHND_BUS_DEACTIVATE_RESOURCE(). * * This implementation of BHND_BUS_ACTIVATE_RESOURCE() simply calls the * BHND_BUS_ACTIVATE_RESOURCE() method of the parent of @p dev. */ int bhnd_bus_generic_deactivate_resource(device_t dev, device_t child, int type, int rid, struct bhnd_resource *r) { if (device_get_parent(dev) != NULL) return (BHND_BUS_DEACTIVATE_RESOURCE(device_get_parent(dev), child, type, rid, r)); return (EINVAL); } /** * Helper function for implementing BHND_BUS_GET_INTR_DOMAIN(). * * This implementation simply returns the address of nearest bhnd(4) bus, * which may be @p dev; this behavior may be incompatible with FDT/OFW targets. */ uintptr_t bhnd_bus_generic_get_intr_domain(device_t dev, device_t child, bool self) { return ((uintptr_t)dev); } Index: head/sys/dev/bhnd/bhndb/bhndb_pci.c =================================================================== --- head/sys/dev/bhnd/bhndb/bhndb_pci.c (revision 331743) +++ head/sys/dev/bhnd/bhndb/bhndb_pci.c (revision 331744) @@ -1,1740 +1,1766 @@ /*- * Copyright (c) 2015-2016 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. */ #include __FBSDID("$FreeBSD$"); /* * PCI-specific implementation for the BHNDB bridge driver. * * Provides support for bridging from a PCI parent bus to a BHND-compatible * bus (e.g. bcma or siba) via a Broadcom PCI core configured in end-point * mode. * * This driver handles all initial generic host-level PCI interactions with a * PCI/PCIe bridge core operating in endpoint mode. Once the bridged bhnd(4) * bus has been enumerated, this driver works in tandem with a core-specific * bhnd_pci_hostb driver to manage the PCI core. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "bhnd_pwrctl_hostb_if.h" #include "bhndb_pcireg.h" #include "bhndb_pcivar.h" #include "bhndb_private.h" struct bhndb_pci_eio; struct bhndb_pci_probe; static int bhndb_pci_alloc_msi(struct bhndb_pci_softc *sc, int *msi_count); static int bhndb_pci_add_children(struct bhndb_pci_softc *sc); static bhnd_devclass_t bhndb_expected_pci_devclass(device_t dev); static bool bhndb_is_pcie_attached(device_t dev); static int bhndb_enable_pci_clocks(device_t dev); static int bhndb_disable_pci_clocks(device_t dev); static int bhndb_pci_compat_setregwin(device_t dev, device_t pci_dev, const struct bhndb_regwin *, bhnd_addr_t); static int bhndb_pci_fast_setregwin(device_t dev, device_t pci_dev, const struct bhndb_regwin *, bhnd_addr_t); static void bhndb_pci_write_core(struct bhndb_pci_softc *sc, bus_size_t offset, uint32_t value, u_int width); static uint32_t bhndb_pci_read_core(struct bhndb_pci_softc *sc, bus_size_t offset, u_int width); static int bhndb_pci_srsh_pi_war(struct bhndb_pci_softc *sc, struct bhndb_pci_probe *probe); static bus_addr_t bhndb_pci_sprom_addr(struct bhndb_pci_softc *sc); static bus_size_t bhndb_pci_sprom_size(struct bhndb_pci_softc *sc); static int bhndb_pci_probe_alloc(struct bhndb_pci_probe **probe, device_t dev, bhnd_devclass_t pci_devclass); static void bhndb_pci_probe_free(struct bhndb_pci_probe *probe); static int bhndb_pci_probe_copy_core_table( struct bhndb_pci_probe *probe, struct bhnd_core_info **cores, u_int *ncores); static void bhndb_pci_probe_free_core_table( struct bhnd_core_info *cores); static void bhndb_pci_probe_write(struct bhndb_pci_probe *sc, bhnd_addr_t addr, bhnd_size_t offset, uint32_t value, u_int width); static uint32_t bhndb_pci_probe_read(struct bhndb_pci_probe *sc, bhnd_addr_t addr, bhnd_size_t offset, u_int width); static void bhndb_pci_eio_init(struct bhndb_pci_eio *eio, struct bhndb_pci_probe *probe); static int bhndb_pci_eio_map(struct bhnd_erom_io *eio, bhnd_addr_t addr, bhnd_size_t size); +static int bhndb_pci_eio_tell(struct bhnd_erom_io *eio, + bhnd_addr_t *addr, bhnd_size_t *size); static uint32_t bhndb_pci_eio_read(struct bhnd_erom_io *eio, bhnd_size_t offset, u_int width); #define BHNDB_PCI_MSI_COUNT 1 static struct bhndb_pci_quirk bhndb_pci_quirks[]; static struct bhndb_pci_quirk bhndb_pcie_quirks[]; static struct bhndb_pci_quirk bhndb_pcie2_quirks[]; static struct bhndb_pci_core bhndb_pci_cores[] = { BHNDB_PCI_CORE(PCI, bhndb_pci_quirks), BHNDB_PCI_CORE(PCIE, bhndb_pcie_quirks), BHNDB_PCI_CORE(PCIE2, bhndb_pcie2_quirks), BHNDB_PCI_CORE_END }; /* bhndb_pci erom I/O instance state */ struct bhndb_pci_eio { struct bhnd_erom_io eio; + bool mapped; /**< true if a valid mapping exists */ bhnd_addr_t addr; /**< mapped address */ bhnd_size_t size; /**< mapped size */ struct bhndb_pci_probe *probe; /**< borrowed probe reference */ }; /** * Provides early bus access to the bridged device's cores and core enumeration * table. * * May be safely used during probe or early device attach, prior to calling * bhndb_attach(). */ struct bhndb_pci_probe { device_t dev; /**< bridge device */ device_t pci_dev; /**< parent PCI device */ struct bhnd_chipid cid; /**< chip identification */ struct bhnd_core_info hostb_core; /**< PCI bridge core info */ struct bhndb_pci_eio erom_io; /**< erom I/O instance */ bhnd_erom_class_t *erom_class; /**< probed erom class */ bhnd_erom_t *erom; /**< erom parser */ struct bhnd_core_info *cores; /**< erom-owned core table */ u_int ncores; /**< number of cores */ const struct bhndb_regwin *m_win; /**< mapped register window, or NULL if no mapping */ struct resource *m_res; /**< resource containing the register window, or NULL if no window mapped */ bhnd_addr_t m_target; /**< base address mapped by m_win */ bhnd_addr_t m_addr; /**< mapped address */ bhnd_size_t m_size; /**< mapped size */ bool m_valid; /**< true if a valid mapping exists, false otherwise */ struct bhndb_host_resources *hr; /**< backing host resources */ }; static struct bhndb_pci_quirk bhndb_pci_quirks[] = { /* Backplane interrupt flags must be routed via siba-specific * SIBA_CFG0_INTVEC configuration register; the BHNDB_PCI_INT_MASK * PCI configuration register is unsupported. */ {{ BHND_MATCH_CHIP_TYPE (SIBA) }, { BHND_MATCH_CORE_REV (HWREV_LTE(5)) }, BHNDB_PCI_QUIRK_SIBA_INTVEC }, /* All PCI core revisions require the SRSH work-around */ BHNDB_PCI_QUIRK(HWREV_ANY, BHNDB_PCI_QUIRK_SRSH_WAR), BHNDB_PCI_QUIRK_END }; static struct bhndb_pci_quirk bhndb_pcie_quirks[] = { /* All PCIe-G1 core revisions require the SRSH work-around */ BHNDB_PCI_QUIRK(HWREV_ANY, BHNDB_PCI_QUIRK_SRSH_WAR), BHNDB_PCI_QUIRK_END }; static struct bhndb_pci_quirk bhndb_pcie2_quirks[] = { BHNDB_PCI_QUIRK_END }; /** * Return the device table entry for @p ci, or NULL if none. */ static struct bhndb_pci_core * bhndb_pci_find_core(struct bhnd_core_info *ci) { for (size_t i = 0; !BHNDB_PCI_IS_CORE_END(&bhndb_pci_cores[i]); i++) { struct bhndb_pci_core *entry = &bhndb_pci_cores[i]; if (bhnd_core_matches(ci, &entry->match)) return (entry); } return (NULL); } /** * Return all quirk flags for the given @p cid and @p ci. */ static uint32_t bhndb_pci_get_core_quirks(struct bhnd_chipid *cid, struct bhnd_core_info *ci) { struct bhndb_pci_core *entry; struct bhndb_pci_quirk *qtable; uint32_t quirks; quirks = 0; /* No core entry? */ if ((entry = bhndb_pci_find_core(ci)) == NULL) return (quirks); /* No quirks? */ if ((qtable = entry->quirks) == NULL) return (quirks); for (size_t i = 0; !BHNDB_PCI_IS_QUIRK_END(&qtable[i]); i++) { struct bhndb_pci_quirk *q = &qtable[i]; if (!bhnd_chip_matches(cid, &q->chip_desc)) continue; if (!bhnd_core_matches(ci, &q->core_desc)) continue; quirks |= q->quirks; } return (quirks); } /** * Default bhndb_pci implementation of device_probe(). * * Verifies that the parent is a PCI/PCIe device. */ static int bhndb_pci_probe(device_t dev) { struct bhndb_pci_probe *probe; struct bhndb_pci_core *entry; bhnd_devclass_t hostb_devclass; device_t parent, parent_bus; devclass_t pci, bus_devclass; int error; probe = NULL; /* Our parent must be a PCI/PCIe device. */ pci = devclass_find("pci"); parent = device_get_parent(dev); parent_bus = device_get_parent(parent); if (parent_bus == NULL) return (ENXIO); /* The bus device class may inherit from 'pci' */ for (bus_devclass = device_get_devclass(parent_bus); bus_devclass != NULL; bus_devclass = devclass_get_parent(bus_devclass)) { if (bus_devclass == pci) break; } if (bus_devclass != pci) return (ENXIO); /* Enable clocks */ if ((error = bhndb_enable_pci_clocks(dev))) return (error); /* Identify the chip and enumerate the bridged cores */ hostb_devclass = bhndb_expected_pci_devclass(dev); if ((error = bhndb_pci_probe_alloc(&probe, dev, hostb_devclass))) goto cleanup; /* Look for a matching core table entry */ if ((entry = bhndb_pci_find_core(&probe->hostb_core)) == NULL) { error = ENXIO; goto cleanup; } device_set_desc(dev, "PCI-BHND bridge"); /* fall-through */ error = BUS_PROBE_DEFAULT; cleanup: if (probe != NULL) bhndb_pci_probe_free(probe); bhndb_disable_pci_clocks(dev); return (error); } /** * Attempt to allocate MSI interrupts, returning the count in @p msi_count * on success. */ static int bhndb_pci_alloc_msi(struct bhndb_pci_softc *sc, int *msi_count) { int error, count; /* Is MSI available? */ if (pci_msi_count(sc->parent) < BHNDB_PCI_MSI_COUNT) return (ENXIO); /* Allocate expected message count */ count = BHNDB_PCI_MSI_COUNT; if ((error = pci_alloc_msi(sc->parent, &count))) { device_printf(sc->dev, "failed to allocate MSI interrupts: " "%d\n", error); return (error); } if (count < BHNDB_PCI_MSI_COUNT) { pci_release_msi(sc->parent); return (ENXIO); } *msi_count = count; return (0); } static int bhndb_pci_attach(device_t dev) { struct bhndb_pci_softc *sc; struct bhnd_chipid cid; struct bhnd_core_info *cores, hostb_core; bhnd_erom_class_t *erom_class; struct bhndb_pci_probe *probe; u_int ncores; int irq_rid; int error; sc = device_get_softc(dev); sc->dev = dev; sc->parent = device_get_parent(dev); sc->pci_devclass = bhndb_expected_pci_devclass(dev); sc->pci_quirks = 0; sc->set_regwin = NULL; BHNDB_PCI_LOCK_INIT(sc); probe = NULL; cores = NULL; /* Enable PCI bus mastering */ pci_enable_busmaster(sc->parent); /* Enable clocks (if required by this hardware) */ if ((error = bhndb_enable_pci_clocks(sc->dev))) goto cleanup; /* Identify the chip and enumerate the bridged cores */ error = bhndb_pci_probe_alloc(&probe, dev, sc->pci_devclass); if (error) goto cleanup; sc->pci_quirks = bhndb_pci_get_core_quirks(&probe->cid, &probe->hostb_core); /* Select the appropriate register window handler */ if (probe->cid.chip_type == BHND_CHIPTYPE_SIBA) { sc->set_regwin = bhndb_pci_compat_setregwin; } else { sc->set_regwin = bhndb_pci_fast_setregwin; } /* * Fix up our PCI base address in the SPROM shadow, if necessary. * * This must be done prior to accessing any static register windows * that map the PCI core. */ if ((error = bhndb_pci_srsh_pi_war(sc, probe))) goto cleanup; /* Set up PCI interrupt handling */ if (bhndb_pci_alloc_msi(sc, &sc->msi_count) == 0) { /* MSI uses resource IDs starting at 1 */ irq_rid = 1; device_printf(dev, "Using MSI interrupts on %s\n", device_get_nameunit(sc->parent)); } else { sc->msi_count = 0; irq_rid = 0; device_printf(dev, "Using INTx interrupts on %s\n", device_get_nameunit(sc->parent)); } sc->isrc = bhndb_alloc_intr_isrc(sc->parent, irq_rid, 0, RM_MAX_END, 1, RF_SHAREABLE | RF_ACTIVE); if (sc->isrc == NULL) { device_printf(sc->dev, "failed to allocate interrupt " "resource\n"); error = ENXIO; goto cleanup; } /* * Copy out the probe results and then free our probe state, releasing * its exclusive ownership of host bridge resources. * * This must be done prior to full configuration of the bridge via * bhndb_attach(). */ cid = probe->cid; erom_class = probe->erom_class; hostb_core = probe->hostb_core; error = bhndb_pci_probe_copy_core_table(probe, &cores, &ncores); if (error) { cores = NULL; goto cleanup; } bhndb_pci_probe_free(probe); probe = NULL; /* Perform bridge attach */ error = bhndb_attach(dev, &cid, cores, ncores, &hostb_core, erom_class); if (error) goto cleanup; /* Add any additional child devices */ if ((error = bhndb_pci_add_children(sc))) goto cleanup; /* Probe and attach our children */ if ((error = bus_generic_attach(dev))) goto cleanup; bhndb_pci_probe_free_core_table(cores); return (0); cleanup: device_delete_children(dev); if (sc->isrc != NULL) bhndb_free_intr_isrc(sc->isrc); if (sc->msi_count > 0) pci_release_msi(sc->parent); if (cores != NULL) bhndb_pci_probe_free_core_table(cores); if (probe != NULL) bhndb_pci_probe_free(probe); bhndb_disable_pci_clocks(sc->dev); pci_disable_busmaster(sc->parent); BHNDB_PCI_LOCK_DESTROY(sc); return (error); } static int bhndb_pci_detach(device_t dev) { struct bhndb_pci_softc *sc; int error; sc = device_get_softc(dev); /* Attempt to detach our children */ if ((error = bus_generic_detach(dev))) return (error); /* Perform generic bridge detach */ if ((error = bhndb_generic_detach(dev))) return (error); /* Disable clocks (if required by this hardware) */ if ((error = bhndb_disable_pci_clocks(sc->dev))) return (error); /* Free our interrupt resources */ bhndb_free_intr_isrc(sc->isrc); /* Release MSI interrupts */ if (sc->msi_count > 0) pci_release_msi(sc->parent); /* Disable PCI bus mastering */ pci_disable_busmaster(sc->parent); BHNDB_PCI_LOCK_DESTROY(sc); return (0); } static int bhndb_pci_add_children(struct bhndb_pci_softc *sc) { bus_size_t nv_sz; int error; /** * If SPROM is mapped directly into BAR0, add child NVRAM * device. */ nv_sz = bhndb_pci_sprom_size(sc); if (nv_sz > 0) { struct bhndb_devinfo *dinfo; device_t child; if (bootverbose) { device_printf(sc->dev, "found SPROM (%ju bytes)\n", (uintmax_t)nv_sz); } /* Add sprom device, ordered early enough to be available * before the bridged bhnd(4) bus is attached. */ child = BUS_ADD_CHILD(sc->dev, BHND_PROBE_ROOT + BHND_PROBE_ORDER_EARLY, "bhnd_nvram", -1); if (child == NULL) { device_printf(sc->dev, "failed to add sprom device\n"); return (ENXIO); } /* Initialize device address space and resource covering the * BAR0 SPROM shadow. */ dinfo = device_get_ivars(child); dinfo->addrspace = BHNDB_ADDRSPACE_NATIVE; error = bus_set_resource(child, SYS_RES_MEMORY, 0, bhndb_pci_sprom_addr(sc), nv_sz); if (error) { device_printf(sc->dev, "failed to register sprom resources\n"); return (error); } } return (0); } static const struct bhndb_regwin * bhndb_pci_sprom_regwin(struct bhndb_pci_softc *sc) { struct bhndb_resources *bres; const struct bhndb_hwcfg *cfg; const struct bhndb_regwin *sprom_win; bres = sc->bhndb.bus_res; cfg = bres->cfg; sprom_win = bhndb_regwin_find_type(cfg->register_windows, BHNDB_REGWIN_T_SPROM, BHNDB_PCI_V0_BAR0_SPROM_SIZE); return (sprom_win); } static bus_addr_t bhndb_pci_sprom_addr(struct bhndb_pci_softc *sc) { const struct bhndb_regwin *sprom_win; struct resource *r; /* Fetch the SPROM register window */ sprom_win = bhndb_pci_sprom_regwin(sc); KASSERT(sprom_win != NULL, ("requested sprom address on PCI_V2+")); /* Fetch the associated resource */ r = bhndb_host_resource_for_regwin(sc->bhndb.bus_res->res, sprom_win); KASSERT(r != NULL, ("missing resource for sprom window\n")); return (rman_get_start(r) + sprom_win->win_offset); } static bus_size_t bhndb_pci_sprom_size(struct bhndb_pci_softc *sc) { const struct bhndb_regwin *sprom_win; uint32_t sctl; bus_size_t sprom_sz; sprom_win = bhndb_pci_sprom_regwin(sc); /* PCI_V2 and later devices map SPROM/OTP via ChipCommon */ if (sprom_win == NULL) return (0); /* Determine SPROM size */ sctl = pci_read_config(sc->parent, BHNDB_PCI_SPROM_CONTROL, 4); if (sctl & BHNDB_PCI_SPROM_BLANK) return (0); switch (sctl & BHNDB_PCI_SPROM_SZ_MASK) { case BHNDB_PCI_SPROM_SZ_1KB: sprom_sz = (1 * 1024); break; case BHNDB_PCI_SPROM_SZ_4KB: sprom_sz = (4 * 1024); break; case BHNDB_PCI_SPROM_SZ_16KB: sprom_sz = (16 * 1024); break; case BHNDB_PCI_SPROM_SZ_RESERVED: default: device_printf(sc->dev, "invalid PCI sprom size 0x%x\n", sctl); return (0); } /* If the device has a larger SPROM than can be addressed via our SPROM * register window, the SPROM image data will still be located within * the window's addressable range */ sprom_sz = MIN(sprom_sz, sprom_win->win_size); return (sprom_sz); } /** * Return the host resource providing a static mapping of the PCI core's * registers. * * @param sc bhndb PCI driver state. * @param offset The required readable offset within the PCI core * register block. * @param size The required readable size at @p offset. * @param[out] res On success, the host resource containing our PCI * core's register window. * @param[out] res_offset On success, the @p offset relative to @p res. * * @retval 0 success * @retval ENXIO if a valid static register window mapping the PCI core * registers is not available. */ static int bhndb_pci_get_core_regs(struct bhndb_pci_softc *sc, bus_size_t offset, bus_size_t size, struct resource **res, bus_size_t *res_offset) { const struct bhndb_regwin *win; struct resource *r; /* Locate the static register window mapping the requested offset */ win = bhndb_regwin_find_core(sc->bhndb.bus_res->cfg->register_windows, sc->pci_devclass, 0, BHND_PORT_DEVICE, 0, 0, offset, size); if (win == NULL) { device_printf(sc->dev, "missing PCI core register window\n"); return (ENXIO); } /* Fetch the resource containing the register window */ r = bhndb_host_resource_for_regwin(sc->bhndb.bus_res->res, win); if (r == NULL) { device_printf(sc->dev, "missing PCI core register resource\n"); return (ENXIO); } KASSERT(offset >= win->d.core.offset, ("offset %#jx outside of " "register window", (uintmax_t)offset)); *res = r; *res_offset = win->win_offset + (offset - win->d.core.offset); return (0); } /** * Write a 1, 2, or 4 byte data item to the PCI core's registers at @p offset. * * @param sc bhndb PCI driver state. * @param offset register write offset. * @param value value to be written. * @param width item width (1, 2, or 4 bytes). */ static void bhndb_pci_write_core(struct bhndb_pci_softc *sc, bus_size_t offset, uint32_t value, u_int width) { struct resource *r; bus_size_t r_offset; int error; error = bhndb_pci_get_core_regs(sc, offset, width, &r, &r_offset); if (error) { panic("no PCI register window mapping %#jx+%#x: %d", (uintmax_t)offset, width, error); } switch (width) { case 1: bus_write_1(r, r_offset, value); break; case 2: bus_write_2(r, r_offset, value); break; case 4: bus_write_4(r, r_offset, value); break; default: panic("invalid width: %u", width); } } /** * Read a 1, 2, or 4 byte data item from the PCI core's registers * at @p offset. * * @param sc bhndb PCI driver state. * @param offset register read offset. * @param width item width (1, 2, or 4 bytes). */ static uint32_t bhndb_pci_read_core(struct bhndb_pci_softc *sc, bus_size_t offset, u_int width) { struct resource *r; bus_size_t r_offset; int error; error = bhndb_pci_get_core_regs(sc, offset, width, &r, &r_offset); if (error) { panic("no PCI register window mapping %#jx+%#x: %d", (uintmax_t)offset, width, error); } switch (width) { case 1: return (bus_read_1(r, r_offset)); case 2: return (bus_read_2(r, r_offset)); case 4: return (bus_read_4(r, r_offset)); default: panic("invalid width: %u", width); } } /** * Fix-up power on defaults for SPROM-less devices. * * On SPROM-less devices, the PCI(e) cores will be initialized with their their * Power-on-Reset defaults; this can leave the BHND_PCI_SRSH_PI value pointing * to the wrong backplane address. This value is used by the PCI core when * performing address translation between static register windows in BAR0 that * map the PCI core's register block, and backplane address space. * * When translating accesses via these BAR0 regions, the PCI bridge determines * the base address of the PCI core by concatenating: * * [bits] [source] * 31:16 bits [31:16] of the enumeration space address (e.g. 0x18000000) * 15:12 value of BHND_PCI_SRSH_PI from the PCI core's SPROM shadow * 11:0 bits [11:0] of the PCI bus address * * For example, on a PCI_V0 device, the following PCI core register offsets are * mapped into BAR0: * * [BAR0 offset] [description] [PCI core offset] * 0x1000-0x17FF sprom shadow 0x800-0xFFF * 0x1800-0x1DFF device registers 0x000-0x5FF * 0x1E00+0x1FFF siba config registers 0xE00-0xFFF * * This function checks -- and if necessary, corrects -- the BHND_PCI_SRSH_PI * value in the SPROM shadow. * * This workaround must applied prior to accessing any static register windows * that map the PCI core. * * Applies to all PCI and PCIe-G1 core revisions. */ static int bhndb_pci_srsh_pi_war(struct bhndb_pci_softc *sc, struct bhndb_pci_probe *probe) { struct bhnd_core_match md; bhnd_addr_t pci_addr; bhnd_size_t pci_size; bus_size_t srsh_offset; uint16_t srsh_val, pci_val; uint16_t val; int error; if ((sc->pci_quirks & BHNDB_PCI_QUIRK_SRSH_WAR) == 0) return (0); /* Use an equality match descriptor to look up our PCI core's base * address in the EROM */ md = bhnd_core_get_match_desc(&probe->hostb_core); error = bhnd_erom_lookup_core_addr(probe->erom, &md, BHND_PORT_DEVICE, 0, 0, NULL, &pci_addr, &pci_size); if (error) { device_printf(sc->dev, "no base address found for the PCI host " "bridge core: %d\n", error); return (error); } /* Fetch the SPROM SRSH_PI value */ srsh_offset = BHND_PCI_SPROM_SHADOW + BHND_PCI_SRSH_PI_OFFSET; val = bhndb_pci_probe_read(probe, pci_addr, srsh_offset, sizeof(val)); srsh_val = (val & BHND_PCI_SRSH_PI_MASK) >> BHND_PCI_SRSH_PI_SHIFT; /* If it doesn't match PCI core's base address, update the SPROM * shadow */ pci_val = (pci_addr & BHND_PCI_SRSH_PI_ADDR_MASK) >> BHND_PCI_SRSH_PI_ADDR_SHIFT; if (srsh_val != pci_val) { val &= ~BHND_PCI_SRSH_PI_MASK; val |= (pci_val << BHND_PCI_SRSH_PI_SHIFT); bhndb_pci_probe_write(probe, pci_addr, srsh_offset, val, sizeof(val)); } return (0); } static int bhndb_pci_resume(device_t dev) { struct bhndb_pci_softc *sc; int error; sc = device_get_softc(dev); /* Enable clocks (if supported by this hardware) */ if ((error = bhndb_enable_pci_clocks(sc->dev))) return (error); /* Perform resume */ return (bhndb_generic_resume(dev)); } static int bhndb_pci_suspend(device_t dev) { struct bhndb_pci_softc *sc; int error; sc = device_get_softc(dev); /* Disable clocks (if supported by this hardware) */ if ((error = bhndb_disable_pci_clocks(sc->dev))) return (error); /* Perform suspend */ return (bhndb_generic_suspend(dev)); } static int bhndb_pci_set_window_addr(device_t dev, const struct bhndb_regwin *rw, bhnd_addr_t addr) { struct bhndb_pci_softc *sc = device_get_softc(dev); return (sc->set_regwin(sc->dev, sc->parent, rw, addr)); } /** * A siba(4) and bcma(4)-compatible bhndb_set_window_addr implementation. * * On siba(4) devices, it's possible that writing a PCI window register may * not succeed; it's necessary to immediately read the configuration register * and retry if not set to the desired value. * * This is not necessary on bcma(4) devices, but other than the overhead of * validating the register, there's no harm in performing the verification. */ static int bhndb_pci_compat_setregwin(device_t dev, device_t pci_dev, const struct bhndb_regwin *rw, bhnd_addr_t addr) { int error; int reg; if (rw->win_type != BHNDB_REGWIN_T_DYN) return (ENODEV); reg = rw->d.dyn.cfg_offset; for (u_int i = 0; i < BHNDB_PCI_BARCTRL_WRITE_RETRY; i++) { if ((error = bhndb_pci_fast_setregwin(dev, pci_dev, rw, addr))) return (error); if (pci_read_config(pci_dev, reg, 4) == addr) return (0); DELAY(10); } /* Unable to set window */ return (ENODEV); } /** * A bcma(4)-only bhndb_set_window_addr implementation. */ static int bhndb_pci_fast_setregwin(device_t dev, device_t pci_dev, const struct bhndb_regwin *rw, bhnd_addr_t addr) { /* The PCI bridge core only supports 32-bit addressing, regardless * of the bus' support for 64-bit addressing */ if (addr > UINT32_MAX) return (ERANGE); switch (rw->win_type) { case BHNDB_REGWIN_T_DYN: /* Addresses must be page aligned */ if (addr % rw->win_size != 0) return (EINVAL); pci_write_config(pci_dev, rw->d.dyn.cfg_offset, addr, 4); break; default: return (ENODEV); } return (0); } static int bhndb_pci_populate_board_info(device_t dev, device_t child, struct bhnd_board_info *info) { struct bhndb_pci_softc *sc; sc = device_get_softc(dev); /* * On a subset of Apple BCM4360 modules, always prefer the * PCI subdevice to the SPROM-supplied boardtype. * * TODO: * * Broadcom's own drivers implement this override, and then later use * the remapped BCM4360 board type to determine the required * board-specific workarounds. * * Without access to this hardware, it's unclear why this mapping * is done, and we must do the same. If we can survey the hardware * in question, it may be possible to replace this behavior with * explicit references to the SPROM-supplied boardtype(s) in our * quirk definitions. */ if (pci_get_subvendor(sc->parent) == PCI_VENDOR_APPLE) { switch (info->board_type) { case BHND_BOARD_BCM94360X29C: case BHND_BOARD_BCM94360X29CP2: case BHND_BOARD_BCM94360X51: case BHND_BOARD_BCM94360X51P2: info->board_type = 0; /* allow override below */ break; default: break; } } /* If NVRAM did not supply vendor/type/devid info, provide the PCI * subvendor/subdevice/device values. */ if (info->board_vendor == 0) info->board_vendor = pci_get_subvendor(sc->parent); if (info->board_type == 0) info->board_type = pci_get_subdevice(sc->parent); if (info->board_devid == 0) info->board_devid = pci_get_device(sc->parent); return (0); } /** * Examine the bridge device @p dev and return the expected host bridge * device class. * * @param dev The bhndb bridge device */ static bhnd_devclass_t bhndb_expected_pci_devclass(device_t dev) { if (bhndb_is_pcie_attached(dev)) return (BHND_DEVCLASS_PCIE); else return (BHND_DEVCLASS_PCI); } /** * Return true if the bridge device @p dev is attached via PCIe, * false otherwise. * * @param dev The bhndb bridge device */ static bool bhndb_is_pcie_attached(device_t dev) { int reg; if (pci_find_cap(device_get_parent(dev), PCIY_EXPRESS, ®) == 0) return (true); return (false); } /** * Enable externally managed clocks, if required. * * Some PCI chipsets (BCM4306, possibly others) chips do not support * the idle low-power clock. Clocking must be bootstrapped at * attach/resume by directly adjusting GPIO registers exposed in the * PCI config space, and correspondingly, explicitly shutdown at * detach/suspend. * * @note This function may be safely called prior to device attach, (e.g. * from DEVICE_PROBE). * * @param dev The bhndb bridge device */ static int bhndb_enable_pci_clocks(device_t dev) { device_t pci_dev; uint32_t gpio_in, gpio_out, gpio_en; uint32_t gpio_flags; uint16_t pci_status; pci_dev = device_get_parent(dev); /* Only supported and required on PCI devices */ if (bhndb_is_pcie_attached(dev)) return (0); /* Read state of XTAL pin */ gpio_in = pci_read_config(pci_dev, BHNDB_PCI_GPIO_IN, 4); if (gpio_in & BHNDB_PCI_GPIO_XTAL_ON) return (0); /* already enabled */ /* Fetch current config */ gpio_out = pci_read_config(pci_dev, BHNDB_PCI_GPIO_OUT, 4); gpio_en = pci_read_config(pci_dev, BHNDB_PCI_GPIO_OUTEN, 4); /* Set PLL_OFF/XTAL_ON pins to HIGH and enable both pins */ gpio_flags = (BHNDB_PCI_GPIO_PLL_OFF|BHNDB_PCI_GPIO_XTAL_ON); gpio_out |= gpio_flags; gpio_en |= gpio_flags; pci_write_config(pci_dev, BHNDB_PCI_GPIO_OUT, gpio_out, 4); pci_write_config(pci_dev, BHNDB_PCI_GPIO_OUTEN, gpio_en, 4); DELAY(1000); /* Reset PLL_OFF */ gpio_out &= ~BHNDB_PCI_GPIO_PLL_OFF; pci_write_config(pci_dev, BHNDB_PCI_GPIO_OUT, gpio_out, 4); DELAY(5000); /* Clear any PCI 'sent target-abort' flag. */ pci_status = pci_read_config(pci_dev, PCIR_STATUS, 2); pci_status &= ~PCIM_STATUS_STABORT; pci_write_config(pci_dev, PCIR_STATUS, pci_status, 2); return (0); } /** * Disable externally managed clocks, if required. * * This function may be safely called prior to device attach, (e.g. * from DEVICE_PROBE). * * @param dev The bhndb bridge device */ static int bhndb_disable_pci_clocks(device_t dev) { device_t pci_dev; uint32_t gpio_out, gpio_en; pci_dev = device_get_parent(dev); /* Only supported and required on PCI devices */ if (bhndb_is_pcie_attached(dev)) return (0); /* Fetch current config */ gpio_out = pci_read_config(pci_dev, BHNDB_PCI_GPIO_OUT, 4); gpio_en = pci_read_config(pci_dev, BHNDB_PCI_GPIO_OUTEN, 4); /* Set PLL_OFF to HIGH, XTAL_ON to LOW. */ gpio_out &= ~BHNDB_PCI_GPIO_XTAL_ON; gpio_out |= BHNDB_PCI_GPIO_PLL_OFF; pci_write_config(pci_dev, BHNDB_PCI_GPIO_OUT, gpio_out, 4); /* Enable both output pins */ gpio_en |= (BHNDB_PCI_GPIO_PLL_OFF|BHNDB_PCI_GPIO_XTAL_ON); pci_write_config(pci_dev, BHNDB_PCI_GPIO_OUTEN, gpio_en, 4); return (0); } static bhnd_clksrc bhndb_pci_pwrctl_get_clksrc(device_t dev, device_t child, bhnd_clock clock) { struct bhndb_pci_softc *sc; uint32_t gpio_out; sc = device_get_softc(dev); /* Only supported on PCI devices */ if (bhndb_is_pcie_attached(sc->dev)) return (BHND_CLKSRC_UNKNOWN); /* Only ILP is supported */ if (clock != BHND_CLOCK_ILP) return (BHND_CLKSRC_UNKNOWN); gpio_out = pci_read_config(sc->parent, BHNDB_PCI_GPIO_OUT, 4); if (gpio_out & BHNDB_PCI_GPIO_SCS) return (BHND_CLKSRC_PCI); else return (BHND_CLKSRC_XTAL); } static int bhndb_pci_pwrctl_gate_clock(device_t dev, device_t child, bhnd_clock clock) { struct bhndb_pci_softc *sc = device_get_softc(dev); /* Only supported on PCI devices */ if (bhndb_is_pcie_attached(sc->dev)) return (ENODEV); /* Only HT is supported */ if (clock != BHND_CLOCK_HT) return (ENXIO); return (bhndb_disable_pci_clocks(sc->dev)); } static int bhndb_pci_pwrctl_ungate_clock(device_t dev, device_t child, bhnd_clock clock) { struct bhndb_pci_softc *sc = device_get_softc(dev); /* Only supported on PCI devices */ if (bhndb_is_pcie_attached(sc->dev)) return (ENODEV); /* Only HT is supported */ if (clock != BHND_CLOCK_HT) return (ENXIO); return (bhndb_enable_pci_clocks(sc->dev)); } /** * BHNDB_MAP_INTR_ISRC() */ static int bhndb_pci_map_intr_isrc(device_t dev, struct resource *irq, struct bhndb_intr_isrc **isrc) { struct bhndb_pci_softc *sc = device_get_softc(dev); /* There's only one bridged interrupt to choose from */ *isrc = sc->isrc; return (0); } /* siba-specific implementation of BHNDB_ROUTE_INTERRUPTS() */ static int bhndb_pci_route_siba_interrupts(struct bhndb_pci_softc *sc, device_t child) { uint32_t sbintvec; u_int ivec; int error; KASSERT(sc->pci_quirks & BHNDB_PCI_QUIRK_SIBA_INTVEC, ("route_siba_interrupts not supported by this hardware")); /* Fetch the sbflag# for the child */ if ((error = bhnd_get_intr_ivec(child, 0, &ivec))) return (error); if (ivec > (sizeof(sbintvec)*8) - 1 /* aka '31' */) { /* This should never be an issue in practice */ device_printf(sc->dev, "cannot route interrupts to high " "sbflag# %u\n", ivec); return (ENXIO); } BHNDB_PCI_LOCK(sc); sbintvec = bhndb_pci_read_core(sc, SB0_REG_ABS(SIBA_CFG0_INTVEC), 4); sbintvec |= (1 << ivec); bhndb_pci_write_core(sc, SB0_REG_ABS(SIBA_CFG0_INTVEC), sbintvec, 4); BHNDB_PCI_UNLOCK(sc); return (0); } /* BHNDB_ROUTE_INTERRUPTS() */ static int bhndb_pci_route_interrupts(device_t dev, device_t child) { struct bhndb_pci_softc *sc; struct bhnd_core_info core; uint32_t core_bit; uint32_t intmask; sc = device_get_softc(dev); if (sc->pci_quirks & BHNDB_PCI_QUIRK_SIBA_INTVEC) return (bhndb_pci_route_siba_interrupts(sc, child)); core = bhnd_get_core_info(child); if (core.core_idx > BHNDB_PCI_SBIM_COREIDX_MAX) { /* This should never be an issue in practice */ device_printf(dev, "cannot route interrupts to high core " "index %u\n", core.core_idx); return (ENXIO); } BHNDB_PCI_LOCK(sc); core_bit = (1<parent, BHNDB_PCI_INT_MASK, 4); intmask |= core_bit; pci_write_config(sc->parent, BHNDB_PCI_INT_MASK, intmask, 4); BHNDB_PCI_UNLOCK(sc); return (0); } /** * Using the generic PCI bridge hardware configuration, allocate, initialize * and return a new bhndb_pci probe state instance. * * On success, the caller assumes ownership of the returned probe instance, and * is responsible for releasing this reference using bhndb_pci_probe_free(). * * @param[out] probe On success, the newly allocated probe instance. * @param dev The bhndb_pci bridge device. * @param hostb_devclass The expected device class of the bridge core. * * @retval 0 success * @retval non-zero if allocating the probe state fails, a regular * unix error code will be returned. * * @note This function requires exclusive ownership over allocating and * configuring host bridge resources, and should only be called prior to * completion of device attach and full configuration of the bridge. */ static int bhndb_pci_probe_alloc(struct bhndb_pci_probe **probe, device_t dev, bhnd_devclass_t hostb_devclass) { struct bhndb_pci_probe *p; struct bhnd_erom_io *eio; const struct bhndb_hwcfg *hwcfg; const struct bhnd_chipid *hint; device_t parent_dev; int error; parent_dev = device_get_parent(dev); eio = NULL; p = malloc(sizeof(*p), M_BHND, M_ZERO|M_WAITOK); p->dev = dev; p->pci_dev = parent_dev; /* Our register window mapping state must be initialized at this point, * as bhndb_pci_eio will begin making calls into * bhndb_pci_probe_(read|write|get_mapping) */ p->m_win = NULL; p->m_res = NULL; p->m_valid = false; bhndb_pci_eio_init(&p->erom_io, p); eio = &p->erom_io.eio; /* Fetch our chipid hint (if any) and generic hardware configuration */ hwcfg = BHNDB_BUS_GET_GENERIC_HWCFG(parent_dev, dev); hint = BHNDB_BUS_GET_CHIPID(parent_dev, dev); /* Allocate our host resources */ error = bhndb_alloc_host_resources(&p->hr, dev, parent_dev, hwcfg); if (error) { p->hr = NULL; goto failed; } /* Map the first bus core from our bridged bhnd(4) bus */ error = bhnd_erom_io_map(eio, BHND_DEFAULT_CHIPC_ADDR, BHND_DEFAULT_CORE_SIZE); if (error) goto failed; /* Probe for a usable EROM class, and read the chip identifier */ p->erom_class = bhnd_erom_probe_driver_classes( device_get_devclass(dev), eio, hint, &p->cid); if (p->erom_class == NULL) { device_printf(dev, "device enumeration unsupported; no " "compatible driver found\n"); error = ENXIO; goto failed; } /* Allocate EROM parser */ p->erom = bhnd_erom_alloc(p->erom_class, &p->cid, eio); if (p->erom == NULL) { device_printf(dev, "failed to allocate device enumeration " "table parser\n"); error = ENXIO; goto failed; } /* The EROM I/O instance is now owned by our EROM parser */ eio = NULL; /* Read the full core table */ error = bhnd_erom_get_core_table(p->erom, &p->cores, &p->ncores); if (error) { device_printf(p->dev, "error fetching core table: %d\n", error); p->cores = NULL; goto failed; } /* Identify the host bridge core */ error = bhndb_find_hostb_core(p->cores, p->ncores, hostb_devclass, &p->hostb_core); if (error) { device_printf(dev, "failed to identify the host bridge " "core: %d\n", error); goto failed; } *probe = p; return (0); failed: if (eio != NULL) { KASSERT(p->erom == NULL, ("I/O instance will be freed by " "its owning parser")); bhnd_erom_io_fini(eio); } if (p->erom != NULL) { if (p->cores != NULL) bhnd_erom_free_core_table(p->erom, p->cores); bhnd_erom_free(p->erom); } else { KASSERT(p->cores == NULL, ("cannot free erom-owned core table " "without erom reference")); } if (p->hr != NULL) bhndb_release_host_resources(p->hr); free(p, M_BHND); return (error); } /** * Free the given @p probe instance and any associated host bridge resources. */ static void bhndb_pci_probe_free(struct bhndb_pci_probe *probe) { bhnd_erom_free_core_table(probe->erom, probe->cores); bhnd_erom_free(probe->erom); bhndb_release_host_resources(probe->hr); free(probe, M_BHND); } /** * Return a copy of probed core table from @p probe. * * @param probe The probe instance. * @param[out] cores On success, a copy of the probed core table. The * caller is responsible for freeing this table * bhndb_pci_probe_free_core_table(). * @param[out] ncores On success, the number of cores found in * @p cores. * * @retval 0 success * @retval non-zero if enumerating the bridged bhnd(4) bus fails, a regular * unix error code will be returned. */ static int bhndb_pci_probe_copy_core_table(struct bhndb_pci_probe *probe, struct bhnd_core_info **cores, u_int *ncores) { size_t len = sizeof(**cores) * probe->ncores; *cores = malloc(len, M_BHND, M_WAITOK); memcpy(*cores, probe->cores, len); *ncores = probe->ncores; return (0); } /** * Free a core table previously returned by bhndb_pci_probe_copy_core_table(). * * @param cores The core table to be freed. */ static void bhndb_pci_probe_free_core_table(struct bhnd_core_info *cores) { free(cores, M_BHND); } /** * Return true if @p addr and @p size are mapped by the dynamic register window * backing @p probe. */ static bool bhndb_pci_probe_has_mapping(struct bhndb_pci_probe *probe, bhnd_addr_t addr, bhnd_size_t size) { if (!probe->m_valid) return (false); KASSERT(probe->m_win != NULL, ("missing register window")); KASSERT(probe->m_res != NULL, ("missing regwin resource")); KASSERT(probe->m_win->win_type == BHNDB_REGWIN_T_DYN, ("unexpected window type %d", probe->m_win->win_type)); if (addr < probe->m_target) return (false); if (addr >= probe->m_target + probe->m_win->win_size) return (false); if ((probe->m_target + probe->m_win->win_size) - addr < size) return (false); return (true); } /** * Attempt to adjust the dynamic register window backing @p probe to permit * accessing @p size bytes at @p addr. * * @param probe The bhndb_pci probe state to be modified. * @param addr The address at which @p size bytes will mapped. * @param size The number of bytes to be mapped. * @param[out] res On success, will be set to the host resource * mapping @p size bytes at @p addr. * @param[out] res_offset On success, will be set to the offset of @addr * within @p res. * * @retval 0 success * @retval non-zero if an error occurs adjusting the backing dynamic * register window. */ static int bhndb_pci_probe_map(struct bhndb_pci_probe *probe, bhnd_addr_t addr, bhnd_size_t offset, bhnd_size_t size, struct resource **res, bus_size_t *res_offset) { const struct bhndb_regwin *regwin, *regwin_table; struct resource *regwin_res; bhnd_addr_t target; int error; /* Determine the absolute address */ if (BHND_SIZE_MAX - offset < addr) { device_printf(probe->dev, "invalid offset %#jx+%#jx\n", addr, offset); return (ENXIO); } addr += offset; /* Can we use the existing mapping? */ if (bhndb_pci_probe_has_mapping(probe, addr, size)) { *res = probe->m_res; *res_offset = (addr - probe->m_target) + probe->m_win->win_offset; return (0); } /* Locate a useable dynamic register window */ regwin_table = probe->hr->cfg->register_windows; regwin = bhndb_regwin_find_type(regwin_table, BHNDB_REGWIN_T_DYN, size); if (regwin == NULL) { device_printf(probe->dev, "unable to map %#jx+%#jx; no " "usable dynamic register window found\n", addr, size); return (ENXIO); } /* Locate the host resource mapping our register window */ regwin_res = bhndb_host_resource_for_regwin(probe->hr, regwin); if (regwin_res == NULL) { device_printf(probe->dev, "unable to map %#jx+%#jx; no " "usable register resource found\n", addr, size); return (ENXIO); } /* Page-align the target address */ target = addr - (addr % regwin->win_size); /* Configure the register window */ error = bhndb_pci_compat_setregwin(probe->dev, probe->pci_dev, regwin, target); if (error) { device_printf(probe->dev, "failed to configure dynamic " "register window: %d\n", error); return (error); } /* Update our mapping state */ probe->m_win = regwin; probe->m_res = regwin_res; probe->m_addr = addr; probe->m_size = size; probe->m_target = target; probe->m_valid = true; *res = regwin_res; *res_offset = (addr - target) + regwin->win_offset; return (0); } /** * Write a data item to the bridged address space at the given @p offset from * @p addr. * * A dynamic register window will be used to map @p addr. * * @param probe The bhndb_pci probe state to be used to perform the * write. * @param addr The base address. * @param offset The offset from @p addr at which @p value will be * written. * @param value The data item to be written. * @param width The data item width (1, 2, or 4 bytes). */ static void bhndb_pci_probe_write(struct bhndb_pci_probe *probe, bhnd_addr_t addr, bhnd_size_t offset, uint32_t value, u_int width) { struct resource *r; bus_size_t res_offset; int error; /* Map the target address */ error = bhndb_pci_probe_map(probe, addr, offset, width, &r, &res_offset); if (error) { device_printf(probe->dev, "error mapping %#jx+%#jx for " "writing: %d\n", addr, offset, error); return; } /* Perform write */ switch (width) { case 1: return (bus_write_1(r, res_offset, value)); case 2: return (bus_write_2(r, res_offset, value)); case 4: return (bus_write_4(r, res_offset, value)); default: panic("unsupported width: %u", width); } } /** * Read a data item from the bridged address space at the given @p offset * from @p addr. * * A dynamic register window will be used to map @p addr. * * @param probe The bhndb_pci probe state to be used to perform the * read. * @param addr The base address. * @param offset The offset from @p addr at which to read a data item of * @p width bytes. * @param width Item width (1, 2, or 4 bytes). */ static uint32_t bhndb_pci_probe_read(struct bhndb_pci_probe *probe, bhnd_addr_t addr, bhnd_size_t offset, u_int width) { struct resource *r; bus_size_t res_offset; int error; /* Map the target address */ error = bhndb_pci_probe_map(probe, addr, offset, width, &r, &res_offset); if (error) { device_printf(probe->dev, "error mapping %#jx+%#jx for " "reading: %d\n", addr, offset, error); return (UINT32_MAX); } /* Perform read */ switch (width) { case 1: return (bus_read_1(r, res_offset)); case 2: return (bus_read_2(r, res_offset)); case 4: return (bus_read_4(r, res_offset)); default: panic("unsupported width: %u", width); } } /** * Initialize a new bhndb PCI bridge EROM I/O instance. All I/O will be * performed using @p probe. * * @param pio The instance to be initialized. * @param probe The bhndb_pci probe state to be used to perform all * I/O. */ static void bhndb_pci_eio_init(struct bhndb_pci_eio *pio, struct bhndb_pci_probe *probe) { memset(pio, 0, sizeof(*pio)); pio->eio.map = bhndb_pci_eio_map; + pio->eio.tell = bhndb_pci_eio_tell; pio->eio.read = bhndb_pci_eio_read; pio->eio.fini = NULL; + pio->mapped = false; pio->addr = 0; pio->size = 0; pio->probe = probe; } /* bhnd_erom_io_map() implementation */ static int bhndb_pci_eio_map(struct bhnd_erom_io *eio, bhnd_addr_t addr, bhnd_size_t size) { struct bhndb_pci_eio *pio = (struct bhndb_pci_eio *)eio; if (BHND_ADDR_MAX - addr < size) return (EINVAL); /* addr+size would overflow */ pio->addr = addr; pio->size = size; + pio->mapped = true; return (0); } +/* bhnd_erom_io_tell() implementation */ +static int +bhndb_pci_eio_tell(struct bhnd_erom_io *eio, bhnd_addr_t *addr, + bhnd_size_t *size) +{ + struct bhndb_pci_eio *pio = (struct bhndb_pci_eio *)eio; + + if (!pio->mapped) + return (ENXIO); + + *addr = pio->addr; + *size = pio->size; + + return (0); +} + /* bhnd_erom_io_read() implementation */ static uint32_t bhndb_pci_eio_read(struct bhnd_erom_io *eio, bhnd_size_t offset, u_int width) { struct bhndb_pci_eio *pio = (struct bhndb_pci_eio *)eio; + /* Must have a valid mapping */ + if (!pio->mapped) + panic("no active mapping"); + /* The requested subrange must fall within the existing mapped range */ if (offset > pio->size || width > pio->size || pio->size - offset < width) { - return (ENXIO); + panic("invalid offset %#jx", offset); } return (bhndb_pci_probe_read(pio->probe, pio->addr, offset, width)); } static device_method_t bhndb_pci_methods[] = { /* Device interface */ DEVMETHOD(device_probe, bhndb_pci_probe), DEVMETHOD(device_attach, bhndb_pci_attach), DEVMETHOD(device_resume, bhndb_pci_resume), DEVMETHOD(device_suspend, bhndb_pci_suspend), DEVMETHOD(device_detach, bhndb_pci_detach), /* BHNDB interface */ DEVMETHOD(bhndb_set_window_addr, bhndb_pci_set_window_addr), DEVMETHOD(bhndb_populate_board_info, bhndb_pci_populate_board_info), DEVMETHOD(bhndb_map_intr_isrc, bhndb_pci_map_intr_isrc), DEVMETHOD(bhndb_route_interrupts, bhndb_pci_route_interrupts), /* BHND PWRCTL hostb interface */ DEVMETHOD(bhnd_pwrctl_hostb_get_clksrc, bhndb_pci_pwrctl_get_clksrc), DEVMETHOD(bhnd_pwrctl_hostb_gate_clock, bhndb_pci_pwrctl_gate_clock), DEVMETHOD(bhnd_pwrctl_hostb_ungate_clock, bhndb_pci_pwrctl_ungate_clock), DEVMETHOD_END }; DEFINE_CLASS_1(bhndb, bhndb_pci_driver, bhndb_pci_methods, sizeof(struct bhndb_pci_softc), bhndb_driver); MODULE_VERSION(bhndb_pci, 1); MODULE_DEPEND(bhndb_pci, bhnd_pci_hostb, 1, 1, 1); MODULE_DEPEND(bhndb_pci, pci, 1, 1, 1); MODULE_DEPEND(bhndb_pci, bhndb, 1, 1, 1); MODULE_DEPEND(bhndb_pci, bhnd, 1, 1, 1); Index: head/sys/dev/bhnd/siba/siba_erom.c =================================================================== --- head/sys/dev/bhnd/siba/siba_erom.c (revision 331743) +++ head/sys/dev/bhnd/siba/siba_erom.c (revision 331744) @@ -1,706 +1,732 @@ /*- * Copyright (c) 2015-2016 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include -#include +#include #include #include "sibareg.h" #include "sibavar.h" #include "siba_eromvar.h" struct siba_erom; struct siba_erom_io; static int siba_eio_init(struct siba_erom_io *io, struct bhnd_erom_io *eio, u_int ncores); static uint32_t siba_eio_read_4(struct siba_erom_io *io, u_int core_idx, bus_size_t offset); static int siba_eio_read_core_id(struct siba_erom_io *io, u_int core_idx, int unit, struct siba_core_id *sid); static int siba_eio_read_chipid(struct siba_erom_io *io, bus_addr_t enum_addr, struct bhnd_chipid *cid); /** * SIBA EROM generic I/O context */ struct siba_erom_io { struct bhnd_erom_io *eio; /**< erom I/O callbacks */ bhnd_addr_t base_addr; /**< address of first core */ u_int ncores; /**< core count */ }; /** * SIBA EROM per-instance state. */ struct siba_erom { struct bhnd_erom obj; struct siba_erom_io io; /**< i/o context */ }; #define EROM_LOG(io, fmt, ...) do { \ printf("%s: " fmt, __FUNCTION__, ##__VA_ARGS__); \ } while(0) /* SIBA implementation of BHND_EROM_PROBE() */ static int siba_erom_probe(bhnd_erom_class_t *cls, struct bhnd_erom_io *eio, const struct bhnd_chipid *hint, struct bhnd_chipid *cid) { struct siba_erom_io io; uint32_t idreg; int error; /* Initialize I/O context, assuming at least the first core is mapped */ if ((error = siba_eio_init(&io, eio, 1))) return (error); /* Try using the provided hint. */ if (hint != NULL) { struct siba_core_id sid; /* Validate bus type */ if (hint->chip_type != BHND_CHIPTYPE_SIBA) return (ENXIO); /* * Verify the first core's IDHIGH/IDLOW identification. * * The core must be a Broadcom core, but must *not* be * a chipcommon core; those shouldn't be hinted. * * The first core on EXTIF-equipped devices varies, but on the * BCM4710, it's a SDRAM core (0x803). */ if ((error = siba_eio_read_core_id(&io, 0, 0, &sid))) return (error); if (sid.core_info.vendor != BHND_MFGID_BCM) return (ENXIO); if (sid.core_info.device == BHND_COREID_CC) return (EINVAL); *cid = *hint; } else { /* Validate bus type */ idreg = siba_eio_read_4(&io, 0, CHIPC_ID); if (CHIPC_GET_BITS(idreg, CHIPC_ID_BUS) != BHND_CHIPTYPE_SIBA) return (ENXIO); /* Identify the chipset */ if ((error = siba_eio_read_chipid(&io, SIBA_ENUM_ADDR, cid))) return (error); /* Verify the chip type */ if (cid->chip_type != BHND_CHIPTYPE_SIBA) return (ENXIO); } /* * gcc hack: ensure bhnd_chipid.ncores cannot exceed SIBA_MAX_CORES * without triggering build failure due to -Wtype-limits * * if (cid.ncores > SIBA_MAX_CORES) * return (EINVAL) */ _Static_assert((2^sizeof(cid->ncores)) <= SIBA_MAX_CORES, "ncores could result in over-read of backing resource"); return (0); } /* SIBA implementation of BHND_EROM_INIT() */ static int siba_erom_init(bhnd_erom_t *erom, const struct bhnd_chipid *cid, struct bhnd_erom_io *eio) { struct siba_erom *sc; int error; sc = (struct siba_erom *)erom; /* Attempt to map the full core enumeration space */ error = bhnd_erom_io_map(eio, cid->enum_addr, cid->ncores * SIBA_CORE_SIZE); if (error) { printf("%s: failed to map %u cores: %d\n", __FUNCTION__, cid->ncores, error); return (error); } /* Initialize I/O context */ return (siba_eio_init(&sc->io, eio, cid->ncores)); } /* SIBA implementation of BHND_EROM_FINI() */ static void siba_erom_fini(bhnd_erom_t *erom) { struct siba_erom *sc = (struct siba_erom *)erom; bhnd_erom_io_fini(sc->io.eio); } /* Initialize siba_erom resource I/O context */ static int siba_eio_init(struct siba_erom_io *io, struct bhnd_erom_io *eio, u_int ncores) { io->eio = eio; io->ncores = ncores; return (0); } /** * Read a 32-bit value from @p offset relative to the base address of * the given @p core_idx. * * @param io EROM I/O context. * @param core_idx Core index. * @param offset Core register offset. */ static uint32_t siba_eio_read_4(struct siba_erom_io *io, u_int core_idx, bus_size_t offset) { /* Sanity check core index and offset */ if (core_idx >= io->ncores) panic("core index %u out of range (ncores=%u)", core_idx, io->ncores); if (offset > SIBA_CORE_SIZE - sizeof(uint32_t)) panic("invalid core offset %#jx", (uintmax_t)offset); /* Perform read */ return (bhnd_erom_io_read(io->eio, SIBA_CORE_OFFSET(core_idx) + offset, 4)); } /** * Read and parse identification registers for the given @p core_index. * * @param io EROM I/O context. * @param core_idx The core index. * @param unit The caller-specified unit number to be included in the return * value. * @param[out] sid On success, the parsed siba core id. * * @retval 0 success * @retval non-zero if reading or parsing the identification registers * otherwise fails, a regular unix error code will be * returned. */ static int siba_eio_read_core_id(struct siba_erom_io *io, u_int core_idx, int unit, struct siba_core_id *sid) { struct siba_admatch admatch[SIBA_MAX_ADDRSPACE]; uint32_t idhigh, idlow; uint32_t tpsflag; uint16_t ocp_vendor; uint8_t sonics_rev; uint8_t num_admatch; uint8_t num_admatch_en; uint8_t num_cfg; bool intr_en; u_int intr_flag; int error; idhigh = siba_eio_read_4(io, core_idx, SB0_REG_ABS(SIBA_CFG0_IDHIGH)); idlow = siba_eio_read_4(io, core_idx, SB0_REG_ABS(SIBA_CFG0_IDLOW)); tpsflag = siba_eio_read_4(io, core_idx, SB0_REG_ABS(SIBA_CFG0_TPSFLAG)); ocp_vendor = SIBA_REG_GET(idhigh, IDH_VENDOR); sonics_rev = SIBA_REG_GET(idlow, IDL_SBREV); num_admatch = SIBA_REG_GET(idlow, IDL_NRADDR) + 1 /* + enum block */; if (num_admatch > nitems(admatch)) { printf("core%u: invalid admatch count %hhu\n", core_idx, num_admatch); return (EINVAL); } /* Determine backplane interrupt distribution configuration */ intr_en = ((tpsflag & SIBA_TPS_F0EN0) != 0); intr_flag = SIBA_REG_GET(tpsflag, TPS_NUM0); /* Determine the number of sonics config register blocks */ num_cfg = SIBA_CFG_NUM_2_2; if (sonics_rev >= SIBA_IDL_SBREV_2_3) num_cfg = SIBA_CFG_NUM_2_3; /* Parse all admatch descriptors */ num_admatch_en = 0; for (uint8_t i = 0; i < num_admatch; i++) { uint32_t am_value; u_int am_offset; KASSERT(i < nitems(admatch), ("invalid admatch index")); /* Determine the register offset */ am_offset = siba_admatch_offset(i); if (am_offset == 0) { printf("core%u: addrspace %hhu is unsupported", core_idx, i); return (ENODEV); } /* Read and parse the address match register */ am_value = siba_eio_read_4(io, core_idx, am_offset); error = siba_parse_admatch(am_value, &admatch[num_admatch_en]); if (error) { printf("core%u: failed to decode admatch[%hhu] " "register value 0x%x\n", core_idx, i, am_value); return (error); } /* Skip disabled entries */ if (!admatch[num_admatch_en].am_enabled) continue; /* Reject unsupported negative matches. These are not used on * any known devices */ if (admatch[num_admatch_en].am_negative) { printf("core%u: unsupported negative admatch[%hhu] " "value 0x%x\n", core_idx, i, am_value); return (ENXIO); } num_admatch_en++; } /* Populate the result */ *sid = (struct siba_core_id) { .core_info = { .vendor = siba_get_bhnd_mfgid(ocp_vendor), .device = SIBA_REG_GET(idhigh, IDH_DEVICE), .hwrev = SIBA_IDH_CORE_REV(idhigh), .core_idx = core_idx, .unit = unit }, .sonics_vendor = ocp_vendor, .sonics_rev = sonics_rev, .intr_en = intr_en, .intr_flag = intr_flag, .num_admatch = num_admatch_en, .num_cfg_blocks = num_cfg }; memcpy(sid->admatch, admatch, num_admatch_en * sizeof(admatch[0])); return (0); } /** * Read and parse the SSB identification registers for the given @p core_index, * returning the siba(4) core identification in @p sid. * * @param sc A siba EROM instance. * @param core_idx The index of the core to be identified. * @param[out] result On success, the parsed siba core id. * * @retval 0 success * @retval non-zero if reading or parsing the identification registers * otherwise fails, a regular unix error code will be * returned. */ int siba_erom_get_core_id(struct siba_erom *sc, u_int core_idx, struct siba_core_id *result) { struct siba_core_id sid; int error; /* Fetch the core info, assuming a unit number of 0 */ if ((error = siba_eio_read_core_id(&sc->io, core_idx, 0, &sid))) return (error); /* Scan preceding cores to determine the real unit number. */ for (u_int i = 0; i < core_idx; i++) { struct siba_core_id prev; if ((error = siba_eio_read_core_id(&sc->io, i, 0, &prev))) return (error); /* Bump the unit number? */ if (sid.core_info.vendor == prev.core_info.vendor && sid.core_info.device == prev.core_info.device) sid.core_info.unit++; } *result = sid; return (0); } /** * Read and parse the chip identification register from the ChipCommon core. * * @param io EROM I/O context. * @param enum_addr The physical address mapped by @p io. * @param cid On success, the parsed chip identifier. */ static int siba_eio_read_chipid(struct siba_erom_io *io, bus_addr_t enum_addr, struct bhnd_chipid *cid) { struct siba_core_id ccid; - uint32_t idreg; int error; /* Identify the chipcommon core */ if ((error = siba_eio_read_core_id(io, 0, 0, &ccid))) return (error); if (ccid.core_info.vendor != BHND_MFGID_BCM || ccid.core_info.device != BHND_COREID_CC) { if (bootverbose) { EROM_LOG(io, "first core not chipcommon " "(vendor=%#hx, core=%#hx)\n", ccid.core_info.vendor, ccid.core_info.device); } return (ENXIO); } /* Identify the chipset */ - idreg = siba_eio_read_4(io, 0, CHIPC_ID); - *cid = bhnd_parse_chipid(idreg, enum_addr); + if ((error = bhnd_erom_read_chipid(io->eio, cid))) + return (error); - /* Fix up the core count in-place */ - return (bhnd_chipid_fixed_ncores(cid, ccid.core_info.hwrev, - &cid->ncores)); + /* Do we need to fix up the core count? */ + if (CHIPC_NCORES_MIN_HWREV(ccid.core_info.hwrev)) + return (0); + + switch (cid->chip_id) { + case BHND_CHIPID_BCM4306: + cid->ncores = 6; + break; + case BHND_CHIPID_BCM4704: + cid->ncores = 9; + break; + case BHND_CHIPID_BCM5365: + /* + * BCM5365 does support ID_NUMCORE in at least + * some of its revisions, but for unknown + * reasons, Broadcom's drivers always exclude + * the ChipCommon revision (0x5) used by BCM5365 + * from the set of revisions supporting + * ID_NUMCORE, and instead supply a fixed value. + * + * Presumably, at least some of these devices + * shipped with a broken ID_NUMCORE value. + */ + cid->ncores = 7; + break; + default: + return (EINVAL); + } + + return (0); } static int siba_erom_lookup_core(bhnd_erom_t *erom, const struct bhnd_core_match *desc, struct bhnd_core_info *core) { struct siba_erom *sc; struct bhnd_core_match imatch; int error; sc = (struct siba_erom *)erom; /* We can't determine a core's unit number during the initial scan. */ imatch = *desc; imatch.m.match.core_unit = 0; /* Locate the first matching core */ for (u_int i = 0; i < sc->io.ncores; i++) { struct siba_core_id sid; struct bhnd_core_info ci; /* Read the core info */ if ((error = siba_eio_read_core_id(&sc->io, i, 0, &sid))) return (error); ci = sid.core_info; /* Check for initial match */ if (!bhnd_core_matches(&ci, &imatch)) continue; /* Re-scan preceding cores to determine the unit number. */ for (u_int j = 0; j < i; j++) { error = siba_eio_read_core_id(&sc->io, j, 0, &sid); if (error) return (error); /* Bump the unit number? */ if (sid.core_info.vendor == ci.vendor && sid.core_info.device == ci.device) ci.unit++; } /* Check for full match against now-valid unit number */ if (!bhnd_core_matches(&ci, desc)) continue; /* Matching core found */ *core = ci; return (0); } /* Not found */ return (ENOENT); } static int siba_erom_lookup_core_addr(bhnd_erom_t *erom, const struct bhnd_core_match *desc, bhnd_port_type type, u_int port, u_int region, struct bhnd_core_info *info, bhnd_addr_t *addr, bhnd_size_t *size) { struct siba_erom *sc; struct bhnd_core_info core; struct siba_core_id sid; struct siba_admatch admatch; uint32_t am; u_int am_offset; u_int addrspace, cfg; int error; sc = (struct siba_erom *)erom; /* Locate the requested core */ if ((error = siba_erom_lookup_core(erom, desc, &core))) return (error); /* Fetch full siba core ident */ error = siba_eio_read_core_id(&sc->io, core.core_idx, core.unit, &sid); if (error) return (error); /* Is port valid? */ if (!siba_is_port_valid(&sid, type, port)) return (ENOENT); /* Is region valid? */ if (region >= siba_port_region_count(&sid, type, port)) return (ENOENT); /* Is this a siba configuration region? If so, this is mapped to an * offset within the device0.0 port */ error = siba_cfg_index(&sid, type, port, region, &cfg); if (!error) { bhnd_addr_t region_addr; bhnd_addr_t region_size; bhnd_size_t cfg_offset, cfg_size; cfg_offset = SIBA_CFG_OFFSET(cfg); cfg_size = SIBA_CFG_SIZE; /* Fetch the device0.0 addr/size */ error = siba_erom_lookup_core_addr(erom, desc, BHND_PORT_DEVICE, 0, 0, NULL, ®ion_addr, ®ion_size); if (error) return (error); /* Verify that our offset fits within the region */ if (region_size < cfg_size) { printf("%s%u.%u offset %ju exceeds %s0.0 size %ju\n", bhnd_port_type_name(type), port, region, cfg_offset, bhnd_port_type_name(BHND_PORT_DEVICE), region_size); return (ENXIO); } if (BHND_ADDR_MAX - region_addr < cfg_offset) { printf("%s%u.%u offset %ju would overflow %s0.0 addr " "%ju\n", bhnd_port_type_name(type), port, region, cfg_offset, bhnd_port_type_name(BHND_PORT_DEVICE), region_addr); return (ENXIO); } if (info != NULL) *info = core; *addr = region_addr + cfg_offset; *size = cfg_size; return (0); } /* * Otherwise, must be a device port. * * Map the bhnd device port to a siba addrspace index. Unlike siba(4) * bus drivers, we do not exclude the siba(4) configuration blocks from * the first device port. */ error = siba_addrspace_index(&sid, type, port, region, &addrspace); if (error) return (error); /* Determine the register offset */ am_offset = siba_admatch_offset(addrspace); if (am_offset == 0) { printf("addrspace %u is unsupported", addrspace); return (ENODEV); } /* Read and parse the address match register */ am = siba_eio_read_4(&sc->io, core.core_idx, am_offset); if ((error = siba_parse_admatch(am, &admatch))) { printf("failed to decode address match register value 0x%x\n", am); return (error); } if (info != NULL) *info = core; *addr = admatch.am_base; *size = admatch.am_size; return (0); } /* BHND_EROM_GET_CORE_TABLE() */ static int siba_erom_get_core_table(bhnd_erom_t *erom, struct bhnd_core_info **cores, u_int *num_cores) { struct siba_erom *sc; struct bhnd_core_info *out; int error; sc = (struct siba_erom *)erom; /* Allocate our core array */ out = mallocarray(sc->io.ncores, sizeof(*out), M_BHND, M_NOWAIT); if (out == NULL) return (ENOMEM); *cores = out; *num_cores = sc->io.ncores; /* Enumerate all cores. */ for (u_int i = 0; i < sc->io.ncores; i++) { struct siba_core_id sid; /* Read the core info */ if ((error = siba_eio_read_core_id(&sc->io, i, 0, &sid))) return (error); out[i] = sid.core_info; /* Determine unit number */ for (u_int j = 0; j < i; j++) { if (out[j].vendor == out[i].vendor && out[j].device == out[i].device) out[i].unit++; } } return (0); } /* BHND_EROM_FREE_CORE_TABLE() */ static void siba_erom_free_core_table(bhnd_erom_t *erom, struct bhnd_core_info *cores) { free(cores, M_BHND); } /* BHND_EROM_DUMP() */ static int siba_erom_dump(bhnd_erom_t *erom) { struct siba_erom *sc; int error; sc = (struct siba_erom *)erom; /* Enumerate all cores. */ for (u_int i = 0; i < sc->io.ncores; i++) { uint32_t idhigh, idlow; uint32_t nraddr; idhigh = siba_eio_read_4(&sc->io, i, SB0_REG_ABS(SIBA_CFG0_IDHIGH)); idlow = siba_eio_read_4(&sc->io, i, SB0_REG_ABS(SIBA_CFG0_IDLOW)); printf("siba core %u:\n", i); printf("\tvendor:\t0x%04x\n", SIBA_REG_GET(idhigh, IDH_VENDOR)); printf("\tdevice:\t0x%04x\n", SIBA_REG_GET(idhigh, IDH_DEVICE)); printf("\trev:\t0x%04x\n", SIBA_IDH_CORE_REV(idhigh)); printf("\tsbrev:\t0x%02x\n", SIBA_REG_GET(idlow, IDL_SBREV)); /* Enumerate the address match registers */ nraddr = SIBA_REG_GET(idlow, IDL_NRADDR); printf("\tnraddr\t0x%04x\n", nraddr); for (size_t addrspace = 0; addrspace < nraddr; addrspace++) { struct siba_admatch admatch; uint32_t am; u_int am_offset; /* Determine the register offset */ am_offset = siba_admatch_offset(addrspace); if (am_offset == 0) { printf("addrspace %zu unsupported", addrspace); break; } /* Read and parse the address match register */ am = siba_eio_read_4(&sc->io, i, am_offset); if ((error = siba_parse_admatch(am, &admatch))) { printf("failed to decode address match " "register value 0x%x\n", am); continue; } printf("\taddrspace %zu\n", addrspace); printf("\t\taddr: 0x%08x\n", admatch.am_base); printf("\t\tsize: 0x%08x\n", admatch.am_size); } } return (0); } static kobj_method_t siba_erom_methods[] = { KOBJMETHOD(bhnd_erom_probe, siba_erom_probe), KOBJMETHOD(bhnd_erom_init, siba_erom_init), KOBJMETHOD(bhnd_erom_fini, siba_erom_fini), KOBJMETHOD(bhnd_erom_get_core_table, siba_erom_get_core_table), KOBJMETHOD(bhnd_erom_free_core_table, siba_erom_free_core_table), KOBJMETHOD(bhnd_erom_lookup_core, siba_erom_lookup_core), KOBJMETHOD(bhnd_erom_lookup_core_addr, siba_erom_lookup_core_addr), KOBJMETHOD(bhnd_erom_dump, siba_erom_dump), KOBJMETHOD_END }; BHND_EROM_DEFINE_CLASS(siba_erom, siba_erom_parser, siba_erom_methods, sizeof(struct siba_erom));