Index: head/sys/mips/conf/QCA953X_BASE =================================================================== --- head/sys/mips/conf/QCA953X_BASE (revision 328757) +++ head/sys/mips/conf/QCA953X_BASE (revision 328758) @@ -1,70 +1,79 @@ # # QCA953x -- Kernel configuration base file for the Qualcomm Atheros QCA953x SoC. # # This file (and the hints file accompanying it) are not designed to be # used by themselves. Instead, users of this file should create a kernel # config file which includes this file (which gets the basic hints), then # override the default options (adding devices as needed) and adding # hints as needed (for example, the GPIO and LAN PHY.) # # $FreeBSD$ # machine mips mips ident QCA953X_BASE cpu CPU_MIPS24K makeoptions KERNLOADADDR=0x80050000 options HZ=1000 files "../atheros/files.ar71xx" hints "QCA953X_BASE.hints" makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols makeoptions MODULES_OVERRIDE="gpio ar71xx if_gif if_vlan if_gre if_bridge bridgestp usb wlan wlan_xauth wlan_acl wlan_wep wlan_tkip wlan_ccmp wlan_rssadapt wlan_amrr hwpmc ipfw" options DDB options KDB options ALQ options BREAK_TO_DEBUGGER options SCHED_4BSD #4BSD scheduler options INET #InterNETworking #options INET6 #InterNETworking options TCP_HHOOK # hhook(9) framework for TCP #options NFSCL #Network Filesystem Client options PSEUDOFS #Pseudo-filesystem framework options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions # PMC options HWPMC_HOOKS # options NFS_LEGACYRPC # Debugging for use in -current options INVARIANTS options INVARIANT_SUPPORT options WITNESS options WITNESS_SKIPSPIN options FFS #Berkeley Fast Filesystem #options SOFTUPDATES #Enable FFS soft updates support #options UFS_ACL #Support for access control lists #options UFS_DIRHASH #Improve performance on big directories options NO_FFS_SNAPSHOT # We don't require snapshot support include "std.AR_MIPS_BASE" makeoptions MODULES_OVERRIDE+="hwpmc_mips24k" -option AH_SUPPORT_QCA9530 # Chipset support +# EEPROM caldata for AHB connected device +options AR71XX_ATH_EEPROM +device ar71xx_caldata +device firmware + +# Support QCA9530 in the HAL +options AH_SUPPORT_QCA9530 # Chipset support + +# Support EEPROM caldata in AHB devices +options ATH_EEPROM_FIRMWARE device usb device ehci device scbus device umass device da # Handle 25MHz refclock by allowing a higher baudrate error tolerance. device uart_ar71xx options UART_DEV_TOLERANCE_PCT=50 device ar71xx_apb Index: head/sys/mips/conf/QCA953X_BASE.hints =================================================================== --- head/sys/mips/conf/QCA953X_BASE.hints (revision 328757) +++ head/sys/mips/conf/QCA953X_BASE.hints (revision 328758) @@ -1,73 +1,80 @@ # This file (and the kernel config file accompanying it) are not designed # to be used by themselves. Instead, users of this file should create a # kernel # config file which includes this file (which gets the basic hints), # then override the default options (adding devices as needed) and adding # hints as needed (for example, the GPIO and LAN PHY.) # $FreeBSD$ hint.apb.0.at="nexus0" hint.apb.0.irq=4 +# ART calibration data mapping device +hint.ar71xx_caldata.0.at="nexus0" +hint.ar71xx_caldata.0.order=0 + # mdiobus on arge0 - required to bring up arge0 hint.argemdio.0.at="nexus0" hint.argemdio.0.maddr=0x19000000 hint.argemdio.0.msize=0x1000 hint.argemdio.0.order=0 # mdiobus on arge1 - this is what the internal switch is hooked into. hint.argemdio.1.at="nexus0" hint.argemdio.1.maddr=0x1a000000 hint.argemdio.1.msize=0x1000 hint.argemdio.1.order=0 # uart0 hint.uart.0.at="apb0" # see atheros/uart_cpu_ar71xx.c why +3 hint.uart.0.maddr=0x18020003 hint.uart.0.msize=0x18 hint.uart.0.irq=3 # ehci - on IP3 hint.ehci.0.at="nexus0" hint.ehci.0.maddr=0x1b000100 hint.ehci.0.msize=0x00ffff00 hint.ehci.0.irq=1 hint.arge.0.at="nexus0" hint.arge.0.maddr=0x19000000 hint.arge.0.msize=0x1000 hint.arge.0.irq=2 hint.arge.1.at="nexus0" hint.arge.1.maddr=0x1a000000 hint.arge.1.msize=0x1000 hint.arge.1.irq=3 # XXX The ath device hangs off of the AHB, rather than the Nexus. hint.ath.0.at="nexus0" hint.ath.0.maddr=0x18100000 hint.ath.0.msize=0x20000 hint.ath.0.irq=0 hint.ath.0.vendor_id=0x168c hint.ath.0.device_id=0x003d -# Set this to define where the ath calibration data -# should be fetched from in physical memory. -# hint.ath.0.eepromaddr=0x1fff1000 +# Where the ART is - last 64k in the first 8MB of flash +#hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000 +#hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384 + +# And now tell the ath(4) driver where to look! +#hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware" # SPI flash hint.spi.0.at="nexus0" hint.spi.0.maddr=0x1f000000 hint.spi.0.msize=0x10 hint.mx25l.0.at="spibus0" hint.mx25l.0.cs=0 # Watchdog hint.ar71xx_wdog.0.at="nexus0" # The GPIO function and pin mask is configured per-board hint.gpio.0.at="apb0" hint.gpio.0.maddr=0x18040000 hint.gpio.0.msize=0x1000 hint.gpio.0.irq=2