Index: vendor/lld/dist-release_60/ELF/AArch64ErrataFix.cpp
===================================================================
--- vendor/lld/dist-release_60/ELF/AArch64ErrataFix.cpp	(revision 328744)
+++ vendor/lld/dist-release_60/ELF/AArch64ErrataFix.cpp	(revision 328745)
@@ -1,648 +1,649 @@
 //===- AArch64ErrataFix.cpp -----------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 // This file implements Section Patching for the purpose of working around
 // errata in CPUs. The general principle is that an erratum sequence of one or
 // more instructions is detected in the instruction stream, one of the
 // instructions in the sequence is replaced with a branch to a patch sequence
 // of replacement instructions. At the end of the replacement sequence the
 // patch branches back to the instruction stream.
 
 // This technique is only suitable for fixing an erratum when:
 // - There is a set of necessary conditions required to trigger the erratum that
 // can be detected at static link time.
 // - There is a set of replacement instructions that can be used to remove at
 // least one of the necessary conditions that trigger the erratum.
 // - We can overwrite an instruction in the erratum sequence with a branch to
 // the replacement sequence.
 // - We can place the replacement sequence within range of the branch.
 
 // FIXME:
 // - The implementation here only supports one patch, the AArch64 Cortex-53
 // errata 843419 that affects r0p0, r0p1, r0p2 and r0p4 versions of the core.
 // To keep the initial version simple there is no support for multiple
 // architectures or selection of different patches.
 //===----------------------------------------------------------------------===//
 
 #include "AArch64ErrataFix.h"
 #include "Config.h"
 #include "LinkerScript.h"
 #include "OutputSections.h"
 #include "Relocations.h"
 #include "Strings.h"
 #include "Symbols.h"
 #include "SyntheticSections.h"
 #include "Target.h"
 #include "lld/Common/Memory.h"
 
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/raw_ostream.h"
 #include <algorithm>
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
+using namespace llvm::support;
 using namespace llvm::support::endian;
 
 using namespace lld;
 using namespace lld::elf;
 
 // Helper functions to identify instructions and conditions needed to trigger
 // the Cortex-A53-843419 erratum.
 
 // ADRP
 // | 1 | immlo (2) | 1 | 0 0 0 0 | immhi (19) | Rd (5) |
 static bool isADRP(uint32_t Instr) {
   return (Instr & 0x9f000000) == 0x90000000;
 }
 
 // Load and store bit patterns from ARMv8-A ARM ARM.
 // Instructions appear in order of appearance starting from table in
 // C4.1.3 Loads and Stores.
 
 // All loads and stores have 1 (at bit postion 27), (0 at bit position 25).
 // | op0 x op1 (2) | 1 op2 0 op3 (2) | x | op4 (5) | xxxx | op5 (2) | x (10) |
 static bool isLoadStoreClass(uint32_t Instr) {
   return (Instr & 0x0a000000) == 0x08000000;
 }
 
 // LDN/STN multiple no offset
 // | 0 Q 00 | 1100 | 0 L 00 | 0000 | opcode (4) | size (2) | Rn (5) | Rt (5) |
 // LDN/STN multiple post-indexed
 // | 0 Q 00 | 1100 | 1 L 0 | Rm (5)| opcode (4) | size (2) | Rn (5) | Rt (5) |
 // L == 0 for stores.
 
 // Utility routine to decode opcode field of LDN/STN multiple structure
 // instructions to find the ST1 instructions.
 // opcode == 0010 ST1 4 registers.
 // opcode == 0110 ST1 3 registers.
 // opcode == 0111 ST1 1 register.
 // opcode == 1010 ST1 2 registers.
 static bool isST1MultipleOpcode(uint32_t Instr) {
   return (Instr & 0x0000f000) == 0x00002000 ||
          (Instr & 0x0000f000) == 0x00006000 ||
          (Instr & 0x0000f000) == 0x00007000 ||
          (Instr & 0x0000f000) == 0x0000a000;
 }
 
 static bool isST1Multiple(uint32_t Instr) {
   return (Instr & 0xbfff0000) == 0x0c000000 && isST1MultipleOpcode(Instr);
 }
 
 // Writes to Rn (writeback).
 static bool isST1MultiplePost(uint32_t Instr) {
   return (Instr & 0xbfe00000) == 0x0c800000 && isST1MultipleOpcode(Instr);
 }
 
 // LDN/STN single no offset
 // | 0 Q 00 | 1101 | 0 L R 0 | 0000 | opc (3) S | size (2) | Rn (5) | Rt (5)|
 // LDN/STN single post-indexed
 // | 0 Q 00 | 1101 | 1 L R | Rm (5) | opc (3) S | size (2) | Rn (5) | Rt (5)|
 // L == 0 for stores
 
 // Utility routine to decode opcode field of LDN/STN single structure
 // instructions to find the ST1 instructions.
 // R == 0 for ST1 and ST3, R == 1 for ST2 and ST4.
 // opcode == 000 ST1 8-bit.
 // opcode == 010 ST1 16-bit.
 // opcode == 100 ST1 32 or 64-bit (Size determines which).
 static bool isST1SingleOpcode(uint32_t Instr) {
   return (Instr & 0x0040e000) == 0x00000000 ||
          (Instr & 0x0040e000) == 0x00004000 ||
          (Instr & 0x0040e000) == 0x00008000;
 }
 
 static bool isST1Single(uint32_t Instr) {
   return (Instr & 0xbfff0000) == 0x0d000000 && isST1SingleOpcode(Instr);
 }
 
 // Writes to Rn (writeback).
 static bool isST1SinglePost(uint32_t Instr) {
   return (Instr & 0xbfe00000) == 0x0d800000 && isST1SingleOpcode(Instr);
 }
 
 static bool isST1(uint32_t Instr) {
   return isST1Multiple(Instr) || isST1MultiplePost(Instr) ||
          isST1Single(Instr) || isST1SinglePost(Instr);
 }
 
 // Load/store exclusive
 // | size (2) 00 | 1000 | o2 L o1 | Rs (5) | o0 | Rt2 (5) | Rn (5) | Rt (5) |
 // L == 0 for Stores.
 static bool isLoadStoreExclusive(uint32_t Instr) {
   return (Instr & 0x3f000000) == 0x08000000;
 }
 
 static bool isLoadExclusive(uint32_t Instr) {
   return (Instr & 0x3f400000) == 0x08400000;
 }
 
 // Load register literal
 // | opc (2) 01 | 1 V 00 | imm19 | Rt (5) |
 static bool isLoadLiteral(uint32_t Instr) {
   return (Instr & 0x3b000000) == 0x18000000;
 }
 
 // Load/store no-allocate pair
 // (offset)
 // | opc (2) 10 | 1 V 00 | 0 L | imm7 | Rt2 (5) | Rn (5) | Rt (5) |
 // L == 0 for stores.
 // Never writes to register
 static bool isSTNP(uint32_t Instr) {
   return (Instr & 0x3bc00000) == 0x28000000;
 }
 
 // Load/store register pair
 // (post-indexed)
 // | opc (2) 10 | 1 V 00 | 1 L | imm7 | Rt2 (5) | Rn (5) | Rt (5) |
 // L == 0 for stores, V == 0 for Scalar, V == 1 for Simd/FP
 // Writes to Rn.
 static bool isSTPPost(uint32_t Instr) {
   return (Instr & 0x3bc00000) == 0x28800000;
 }
 
 // (offset)
 // | opc (2) 10 | 1 V 01 | 0 L | imm7 | Rt2 (5) | Rn (5) | Rt (5) |
 static bool isSTPOffset(uint32_t Instr) {
   return (Instr & 0x3bc00000) == 0x29000000;
 }
 
 // (pre-index)
 // | opc (2) 10 | 1 V 01 | 1 L | imm7 | Rt2 (5) | Rn (5) | Rt (5) |
 // Writes to Rn.
 static bool isSTPPre(uint32_t Instr) {
   return (Instr & 0x3bc00000) == 0x29800000;
 }
 
 static bool isSTP(uint32_t Instr) {
   return isSTPPost(Instr) || isSTPOffset(Instr) || isSTPPre(Instr);
 }
 
 // Load/store register (unscaled immediate)
 // | size (2) 11 | 1 V 00 | opc (2) 0 | imm9 | 00 | Rn (5) | Rt (5) |
 // V == 0 for Scalar, V == 1 for Simd/FP.
 static bool isLoadStoreUnscaled(uint32_t Instr) {
   return (Instr & 0x3b000c00) == 0x38000000;
 }
 
 // Load/store register (immediate post-indexed)
 // | size (2) 11 | 1 V 00 | opc (2) 0 | imm9 | 01 | Rn (5) | Rt (5) |
 static bool isLoadStoreImmediatePost(uint32_t Instr) {
   return (Instr & 0x3b200c00) == 0x38000400;
 }
 
 // Load/store register (unprivileged)
 // | size (2) 11 | 1 V 00 | opc (2) 0 | imm9 | 10 | Rn (5) | Rt (5) |
 static bool isLoadStoreUnpriv(uint32_t Instr) {
   return (Instr & 0x3b200c00) == 0x38000800;
 }
 
 // Load/store register (immediate pre-indexed)
 // | size (2) 11 | 1 V 00 | opc (2) 0 | imm9 | 11 | Rn (5) | Rt (5) |
 static bool isLoadStoreImmediatePre(uint32_t Instr) {
   return (Instr & 0x3b200c00) == 0x38000c00;
 }
 
 // Load/store register (register offset)
 // | size (2) 11 | 1 V 00 | opc (2) 1 | Rm (5) | option (3) S | 10 | Rn | Rt |
 static bool isLoadStoreRegisterOff(uint32_t Instr) {
   return (Instr & 0x3b200c00) == 0x38200800;
 }
 
 // Load/store register (unsigned immediate)
 // | size (2) 11 | 1 V 01 | opc (2) | imm12 | Rn (5) | Rt (5) |
 static bool isLoadStoreRegisterUnsigned(uint32_t Instr) {
   return (Instr & 0x3b000000) == 0x39000000;
 }
 
 // Rt is always in bit position 0 - 4.
 static uint32_t getRt(uint32_t Instr) { return (Instr & 0x1f); }
 
 // Rn is always in bit position 5 - 9.
 static uint32_t getRn(uint32_t Instr) { return (Instr >> 5) & 0x1f; }
 
 // C4.1.2 Branches, Exception Generating and System instructions
 // | op0 (3) 1 | 01 op1 (4) | x (22) |
 // op0 == 010 101 op1 == 0xxx Conditional Branch.
 // op0 == 110 101 op1 == 1xxx Unconditional Branch Register.
 // op0 == x00 101 op1 == xxxx Unconditional Branch immediate.
 // op0 == x01 101 op1 == 0xxx Compare and branch immediate.
 // op0 == x01 101 op1 == 1xxx Test and branch immediate.
 static bool isBranch(uint32_t Instr) {
   return ((Instr & 0xfe000000) == 0xd6000000) || // Cond branch.
          ((Instr & 0xfe000000) == 0x54000000) || // Uncond branch reg.
          ((Instr & 0x7c000000) == 0x14000000) || // Uncond branch imm.
          ((Instr & 0x7c000000) == 0x34000000);   // Compare and test branch.
 }
 
 static bool isV8SingleRegisterNonStructureLoadStore(uint32_t Instr) {
   return isLoadStoreUnscaled(Instr) || isLoadStoreImmediatePost(Instr) ||
          isLoadStoreUnpriv(Instr) || isLoadStoreImmediatePre(Instr) ||
          isLoadStoreRegisterOff(Instr) || isLoadStoreRegisterUnsigned(Instr);
 }
 
 // Note that this function refers to v8.0 only and does not include the
 // additional load and store instructions added for in later revisions of
 // the architecture such as the Atomic memory operations introduced
 // in v8.1.
 static bool isV8NonStructureLoad(uint32_t Instr) {
   if (isLoadExclusive(Instr))
     return true;
   if (isLoadLiteral(Instr))
     return true;
   else if (isV8SingleRegisterNonStructureLoadStore(Instr)) {
     // For Load and Store single register, Loads are derived from a
     // combination of the Size, V and Opc fields.
     uint32_t Size = (Instr >> 30) & 0xff;
     uint32_t V = (Instr >> 26) & 0x1;
     uint32_t Opc = (Instr >> 22) & 0x3;
     // For the load and store instructions that we are decoding.
     // Opc == 0 are all stores.
     // Opc == 1 with a couple of exceptions are loads. The exceptions are:
     // Size == 00 (0), V == 1, Opc == 10 (2) which is a store and
     // Size == 11 (3), V == 0, Opc == 10 (2) which is a prefetch.
     return Opc != 0 && !(Size == 0 && V == 1 && Opc == 2) &&
            !(Size == 3 && V == 0 && Opc == 2);
   }
   return false;
 }
 
 // The following decode instructions are only complete up to the instructions
 // needed for errata 843419.
 
 // Instruction with writeback updates the index register after the load/store.
 static bool hasWriteback(uint32_t Instr) {
   return isLoadStoreImmediatePre(Instr) || isLoadStoreImmediatePost(Instr) ||
          isSTPPre(Instr) || isSTPPost(Instr) || isST1SinglePost(Instr) ||
          isST1MultiplePost(Instr);
 }
 
 // For the load and store class of instructions, a load can write to the
 // destination register, a load and a store can write to the base register when
 // the instruction has writeback.
 static bool doesLoadStoreWriteToReg(uint32_t Instr, uint32_t Reg) {
   return (isV8NonStructureLoad(Instr) && getRt(Instr) == Reg) ||
          (hasWriteback(Instr) && getRn(Instr) == Reg);
 }
 
 // Scanner for Cortex-A53 errata 843419
 // Full details are available in the Cortex A53 MPCore revision 0 Software
 // Developers Errata Notice (ARM-EPM-048406).
 //
 // The instruction sequence that triggers the erratum is common in compiled
 // AArch64 code, however it is sensitive to the offset of the sequence within
 // a 4k page. This means that by scanning and fixing the patch after we have
 // assigned addresses we only need to disassemble and fix instances of the
 // sequence in the range of affected offsets.
 //
 // In summary the erratum conditions are a series of 4 instructions:
 // 1.) An ADRP instruction that writes to register Rn with low 12 bits of
 //     address of instruction either 0xff8 or 0xffc.
 // 2.) A load or store instruction that can be:
 // - A single register load or store, of either integer or vector registers.
 // - An STP or STNP, of either integer or vector registers.
 // - An Advanced SIMD ST1 store instruction.
 // - Must not write to Rn, but may optionally read from it.
 // 3.) An optional instruction that is not a branch and does not write to Rn.
 // 4.) A load or store from the  Load/store register (unsigned immediate) class
 //     that uses Rn as the base address register.
 //
 // Note that we do not attempt to scan for Sequence 2 as described in the
 // Software Developers Errata Notice as this has been assessed to be extremely
 // unlikely to occur in compiled code. This matches gold and ld.bfd behavior.
 
 // Return true if the Instruction sequence Adrp, Instr2, and Instr4 match
 // the erratum sequence. The Adrp, Instr2 and Instr4 correspond to 1.), 2.),
 // and 4.) in the Scanner for Cortex-A53 errata comment above.
 static bool is843419ErratumSequence(uint32_t Instr1, uint32_t Instr2,
                                     uint32_t Instr4) {
   if (!isADRP(Instr1))
     return false;
 
   uint32_t Rn = getRt(Instr1);
   return isLoadStoreClass(Instr2) &&
          (isLoadStoreExclusive(Instr2) || isLoadLiteral(Instr2) ||
           isV8SingleRegisterNonStructureLoadStore(Instr2) || isSTP(Instr2) ||
           isSTNP(Instr2) || isST1(Instr2)) &&
          !doesLoadStoreWriteToReg(Instr2, Rn) &&
          isLoadStoreRegisterUnsigned(Instr4) && getRn(Instr4) == Rn;
 }
 
 // Scan the instruction sequence starting at Offset Off from the base of
 // InputSection IS. We update Off in this function rather than in the caller as
 // we can skip ahead much further into the section when we know how many
 // instructions we've scanned.
 // Return the offset of the load or store instruction in IS that we want to
 // patch or 0 if no patch required.
 static uint64_t scanCortexA53Errata843419(InputSection *IS, uint64_t &Off,
                                           uint64_t Limit) {
   uint64_t ISAddr = IS->getParent()->Addr + IS->OutSecOff;
 
   // Advance Off so that (ISAddr + Off) modulo 0x1000 is at least 0xff8.
   uint64_t InitialPageOff = (ISAddr + Off) & 0xfff;
   if (InitialPageOff < 0xff8)
     Off += 0xff8 - InitialPageOff;
 
   bool OptionalAllowed = Limit - Off > 12;
   if (Off >= Limit || Limit - Off < 12) {
     // Need at least 3 4-byte sized instructions to trigger erratum.
     Off = Limit;
     return 0;
   }
 
   uint64_t PatchOff = 0;
   const uint8_t *Buf = IS->Data.begin();
-  const uint32_t *InstBuf = reinterpret_cast<const uint32_t *>(Buf + Off);
+  const ulittle32_t *InstBuf = reinterpret_cast<const ulittle32_t *>(Buf + Off);
   uint32_t Instr1 = *InstBuf++;
   uint32_t Instr2 = *InstBuf++;
   uint32_t Instr3 = *InstBuf++;
   if (is843419ErratumSequence(Instr1, Instr2, Instr3)) {
     PatchOff = Off + 8;
   } else if (OptionalAllowed && !isBranch(Instr3)) {
     uint32_t Instr4 = *InstBuf++;
     if (is843419ErratumSequence(Instr1, Instr2, Instr4))
       PatchOff = Off + 12;
   }
   if (((ISAddr + Off) & 0xfff) == 0xff8)
     Off += 4;
   else
     Off += 0xffc;
   return PatchOff;
 }
 
 class lld::elf::Patch843419Section : public SyntheticSection {
 public:
   Patch843419Section(InputSection *P, uint64_t Off);
 
   void writeTo(uint8_t *Buf) override;
 
   size_t getSize() const override { return 8; }
 
   uint64_t getLDSTAddr() const;
 
   // The Section we are patching.
   const InputSection *Patchee;
   // The offset of the instruction in the Patchee section we are patching.
   uint64_t PatcheeOffset;
   // A label for the start of the Patch that we can use as a relocation target.
   Symbol *PatchSym;
 };
 
 lld::elf::Patch843419Section::Patch843419Section(InputSection *P, uint64_t Off)
     : SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS, 4,
                        ".text.patch"),
       Patchee(P), PatcheeOffset(Off) {
   this->Parent = P->getParent();
   PatchSym = addSyntheticLocal(
       Saver.save("__CortexA53843419_" + utohexstr(getLDSTAddr())), STT_FUNC, 0,
       getSize(), *this);
   addSyntheticLocal(Saver.save("$x"), STT_NOTYPE, 0, 0, *this);
 }
 
 uint64_t lld::elf::Patch843419Section::getLDSTAddr() const {
   return Patchee->getParent()->Addr + Patchee->OutSecOff + PatcheeOffset;
 }
 
 void lld::elf::Patch843419Section::writeTo(uint8_t *Buf) {
   // Copy the instruction that we will be replacing with a branch in the
   // Patchee Section.
   write32le(Buf, read32le(Patchee->Data.begin() + PatcheeOffset));
 
   // Apply any relocation transferred from the original PatcheeSection.
   // For a SyntheticSection Buf already has OutSecOff added, but relocateAlloc
   // also adds OutSecOff so we need to subtract to avoid double counting.
   this->relocateAlloc(Buf - OutSecOff, Buf - OutSecOff + getSize());
 
   // Return address is the next instruction after the one we have just copied.
   uint64_t S = getLDSTAddr() + 4;
   uint64_t P = PatchSym->getVA() + 4;
   Target->relocateOne(Buf + 4, R_AARCH64_JUMP26, S - P);
 }
 
 void AArch64Err843419Patcher::init() {
   // The AArch64 ABI permits data in executable sections. We must avoid scanning
   // this data as if it were instructions to avoid false matches. We use the
   // mapping symbols in the InputObjects to identify this data, caching the
   // results in SectionMap so we don't have to recalculate it each pass.
 
   // The ABI Section 4.5.4 Mapping symbols; defines local symbols that describe
   // half open intervals [Symbol Value, Next Symbol Value) of code and data
   // within sections. If there is no next symbol then the half open interval is
   // [Symbol Value, End of section). The type, code or data, is determined by
   // the mapping symbol name, $x for code, $d for data.
   auto IsCodeMapSymbol = [](const Symbol *B) {
     return B->getName() == "$x" || B->getName().startswith("$x.");
   };
   auto IsDataMapSymbol = [](const Symbol *B) {
     return B->getName() == "$d" || B->getName().startswith("$d.");
   };
 
   // Collect mapping symbols for every executable InputSection.
   for (InputFile *File : ObjectFiles) {
     auto *F = cast<ObjFile<ELF64LE>>(File);
     for (Symbol *B : F->getLocalSymbols()) {
       auto *Def = dyn_cast<Defined>(B);
       if (!Def)
         continue;
       if (!IsCodeMapSymbol(Def) && !IsDataMapSymbol(Def))
         continue;
       if (auto *Sec = dyn_cast<InputSection>(Def->Section))
         if (Sec->Flags & SHF_EXECINSTR)
           SectionMap[Sec].push_back(Def);
     }
   }
   // For each InputSection make sure the mapping symbols are in sorted in
   // ascending order and free from consecutive runs of mapping symbols with
   // the same type. For example we must remove the redundant $d.1 from $x.0
   // $d.0 $d.1 $x.1.
   for (auto &KV : SectionMap) {
     std::vector<const Defined *> &MapSyms = KV.second;
     if (MapSyms.size() <= 1)
       continue;
     std::stable_sort(
         MapSyms.begin(), MapSyms.end(),
         [](const Defined *A, const Defined *B) { return A->Value < B->Value; });
     MapSyms.erase(
         std::unique(MapSyms.begin(), MapSyms.end(),
                     [=](const Defined *A, const Defined *B) {
                       return (IsCodeMapSymbol(A) && IsCodeMapSymbol(B)) ||
                              (IsDataMapSymbol(A) && IsDataMapSymbol(B));
                     }),
         MapSyms.end());
   }
   Initialized = true;
 }
 
 // Insert the PatchSections we have created back into the
 // InputSectionDescription. As inserting patches alters the addresses of
 // InputSections that follow them, we try and place the patches after all the
 // executable sections, although we may need to insert them earlier if the
 // InputSectionDescription is larger than the maximum branch range.
 void AArch64Err843419Patcher::insertPatches(
     InputSectionDescription &ISD, std::vector<Patch843419Section *> &Patches) {
   uint64_t ISLimit;
   uint64_t PrevISLimit = ISD.Sections.front()->OutSecOff;
   uint64_t PatchUpperBound = PrevISLimit + Target->ThunkSectionSpacing;
 
   // Set the OutSecOff of patches to the place where we want to insert them.
   // We use a similar strategy to Thunk placement. Place patches roughly
   // every multiple of maximum branch range.
   auto PatchIt = Patches.begin();
   auto PatchEnd = Patches.end();
   for (const InputSection *IS : ISD.Sections) {
     ISLimit = IS->OutSecOff + IS->getSize();
     if (ISLimit > PatchUpperBound) {
       while (PatchIt != PatchEnd) {
         if ((*PatchIt)->getLDSTAddr() >= PrevISLimit)
           break;
         (*PatchIt)->OutSecOff = PrevISLimit;
         ++PatchIt;
       }
       PatchUpperBound = PrevISLimit + Target->ThunkSectionSpacing;
     }
     PrevISLimit = ISLimit;
   }
   for (; PatchIt != PatchEnd; ++PatchIt) {
     (*PatchIt)->OutSecOff = ISLimit;
   }
 
   // merge all patch sections. We use the OutSecOff assigned above to
   // determine the insertion point. This is ok as we only merge into an
   // InputSectionDescription once per pass, and at the end of the pass
   // assignAddresses() will recalculate all the OutSecOff values.
   std::vector<InputSection *> Tmp;
   Tmp.reserve(ISD.Sections.size() + Patches.size());
   auto MergeCmp = [](const InputSection *A, const InputSection *B) {
     if (A->OutSecOff < B->OutSecOff)
       return true;
     if (A->OutSecOff == B->OutSecOff && isa<Patch843419Section>(A) &&
         !isa<Patch843419Section>(B))
       return true;
     return false;
   };
   std::merge(ISD.Sections.begin(), ISD.Sections.end(), Patches.begin(),
              Patches.end(), std::back_inserter(Tmp), MergeCmp);
   ISD.Sections = std::move(Tmp);
 }
 
 // Given an erratum sequence that starts at address AdrpAddr, with an
 // instruction that we need to patch at PatcheeOffset from the start of
 // InputSection IS, create a Patch843419 Section and add it to the
 // Patches that we need to insert.
 static void implementPatch(uint64_t AdrpAddr, uint64_t PatcheeOffset,
                            InputSection *IS,
                            std::vector<Patch843419Section *> &Patches) {
   // There may be a relocation at the same offset that we are patching. There
   // are three cases that we need to consider.
   // Case 1: R_AARCH64_JUMP26 branch relocation. We have already patched this
   // instance of the erratum on a previous patch and altered the relocation. We
   // have nothing more to do.
   // Case 2: A load/store register (unsigned immediate) class relocation. There
   // are two of these R_AARCH_LD64_ABS_LO12_NC and R_AARCH_LD64_GOT_LO12_NC and
   // they are both absolute. We need to add the same relocation to the patch,
   // and replace the relocation with a R_AARCH_JUMP26 branch relocation.
   // Case 3: No relocation. We must create a new R_AARCH64_JUMP26 branch
   // relocation at the offset.
   auto RelIt = std::find_if(
       IS->Relocations.begin(), IS->Relocations.end(),
       [=](const Relocation &R) { return R.Offset == PatcheeOffset; });
   if (RelIt != IS->Relocations.end() && RelIt->Type == R_AARCH64_JUMP26)
     return;
 
   if (Config->Verbose)
     message("detected cortex-a53-843419 erratum sequence starting at " +
             utohexstr(AdrpAddr) + " in unpatched output.");
 
   auto *PS = make<Patch843419Section>(IS, PatcheeOffset);
   Patches.push_back(PS);
 
   auto MakeRelToPatch = [](uint64_t Offset, Symbol *PatchSym) {
     return Relocation{R_PC, R_AARCH64_JUMP26, Offset, 0, PatchSym};
   };
 
   if (RelIt != IS->Relocations.end()) {
     PS->Relocations.push_back(
         {RelIt->Expr, RelIt->Type, 0, RelIt->Addend, RelIt->Sym});
     *RelIt = MakeRelToPatch(PatcheeOffset, PS->PatchSym);
   } else
     IS->Relocations.push_back(MakeRelToPatch(PatcheeOffset, PS->PatchSym));
 }
 
 // Scan all the instructions in InputSectionDescription, for each instance of
 // the erratum sequence create a Patch843419Section. We return the list of
 // Patch843419Sections that need to be applied to ISD.
 std::vector<Patch843419Section *>
 AArch64Err843419Patcher::patchInputSectionDescription(
     InputSectionDescription &ISD) {
   std::vector<Patch843419Section *> Patches;
   for (InputSection *IS : ISD.Sections) {
     //  LLD doesn't use the erratum sequence in SyntheticSections.
     if (isa<SyntheticSection>(IS))
       continue;
     // Use SectionMap to make sure we only scan code and not inline data.
     // We have already sorted MapSyms in ascending order and removed consecutive
     // mapping symbols of the same type. Our range of executable instructions to
     // scan is therefore [CodeSym->Value, DataSym->Value) or [CodeSym->Value,
     // section size).
     std::vector<const Defined *> &MapSyms = SectionMap[IS];
 
     auto CodeSym = llvm::find_if(MapSyms, [&](const Defined *MS) {
       return MS->getName().startswith("$x");
     });
 
     while (CodeSym != MapSyms.end()) {
       auto DataSym = std::next(CodeSym);
       uint64_t Off = (*CodeSym)->Value;
       uint64_t Limit =
           (DataSym == MapSyms.end()) ? IS->Data.size() : (*DataSym)->Value;
 
       while (Off < Limit) {
         uint64_t StartAddr = IS->getParent()->Addr + IS->OutSecOff + Off;
         if (uint64_t PatcheeOffset = scanCortexA53Errata843419(IS, Off, Limit))
           implementPatch(StartAddr, PatcheeOffset, IS, Patches);
       }
       if (DataSym == MapSyms.end())
         break;
       CodeSym = std::next(DataSym);
     }
   }
   return Patches;
 }
 
 // For each InputSectionDescription make one pass over the executable sections
 // looking for the erratum sequence; creating a synthetic Patch843419Section
 // for each instance found. We insert these synthetic patch sections after the
 // executable code in each InputSectionDescription.
 //
 // PreConditions:
 // The Output and Input Sections have had their final addresses assigned.
 //
 // PostConditions:
 // Returns true if at least one patch was added. The addresses of the
 // Ouptut and Input Sections may have been changed.
 // Returns false if no patches were required and no changes were made.
 bool AArch64Err843419Patcher::createFixes() {
   if (Initialized == false)
     init();
 
   bool AddressesChanged = false;
   for (OutputSection *OS : OutputSections) {
     if (!(OS->Flags & SHF_ALLOC) || !(OS->Flags & SHF_EXECINSTR))
       continue;
     for (BaseCommand *BC : OS->SectionCommands)
       if (auto *ISD = dyn_cast<InputSectionDescription>(BC)) {
         std::vector<Patch843419Section *> Patches =
             patchInputSectionDescription(*ISD);
         if (!Patches.empty()) {
           insertPatches(*ISD, Patches);
           AddressesChanged = true;
         }
       }
   }
   return AddressesChanged;
 }
Index: vendor/lld/dist-release_60/ELF/LinkerScript.cpp
===================================================================
--- vendor/lld/dist-release_60/ELF/LinkerScript.cpp	(revision 328744)
+++ vendor/lld/dist-release_60/ELF/LinkerScript.cpp	(revision 328745)
@@ -1,1026 +1,1030 @@
 //===- LinkerScript.cpp ---------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains the parser/evaluator of the linker script.
 //
 //===----------------------------------------------------------------------===//
 
 #include "LinkerScript.h"
 #include "Config.h"
 #include "InputSection.h"
 #include "OutputSections.h"
 #include "Strings.h"
 #include "SymbolTable.h"
 #include "Symbols.h"
 #include "SyntheticSections.h"
 #include "Target.h"
 #include "Writer.h"
 #include "lld/Common/Memory.h"
 #include "lld/Common/Threads.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/BinaryFormat/ELF.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/FileSystem.h"
 #include "llvm/Support/Path.h"
 #include <algorithm>
 #include <cassert>
 #include <cstddef>
 #include <cstdint>
 #include <iterator>
 #include <limits>
 #include <string>
 #include <vector>
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
 using namespace llvm::support::endian;
 using namespace lld;
 using namespace lld::elf;
 
 LinkerScript *elf::Script;
 
 static uint64_t getOutputSectionVA(SectionBase *InputSec, StringRef Loc) {
   if (OutputSection *OS = InputSec->getOutputSection())
     return OS->Addr;
   error(Loc + ": unable to evaluate expression: input section " +
         InputSec->Name + " has no output section assigned");
   return 0;
 }
 
 uint64_t ExprValue::getValue() const {
   if (Sec)
     return alignTo(Sec->getOffset(Val) + getOutputSectionVA(Sec, Loc),
                    Alignment);
   return alignTo(Val, Alignment);
 }
 
 uint64_t ExprValue::getSecAddr() const {
   if (Sec)
     return Sec->getOffset(0) + getOutputSectionVA(Sec, Loc);
   return 0;
 }
 
 uint64_t ExprValue::getSectionOffset() const {
   // If the alignment is trivial, we don't have to compute the full
   // value to know the offset. This allows this function to succeed in
   // cases where the output section is not yet known.
   if (Alignment == 1)
     return Val;
   return getValue() - getSecAddr();
 }
 
 OutputSection *LinkerScript::createOutputSection(StringRef Name,
                                                  StringRef Location) {
   OutputSection *&SecRef = NameToOutputSection[Name];
   OutputSection *Sec;
   if (SecRef && SecRef->Location.empty()) {
     // There was a forward reference.
     Sec = SecRef;
   } else {
     Sec = make<OutputSection>(Name, SHT_NOBITS, 0);
     if (!SecRef)
       SecRef = Sec;
   }
   Sec->Location = Location;
   return Sec;
 }
 
 OutputSection *LinkerScript::getOrCreateOutputSection(StringRef Name) {
   OutputSection *&CmdRef = NameToOutputSection[Name];
   if (!CmdRef)
     CmdRef = make<OutputSection>(Name, SHT_PROGBITS, 0);
   return CmdRef;
 }
 
 void LinkerScript::setDot(Expr E, const Twine &Loc, bool InSec) {
   uint64_t Val = E().getValue();
   if (Val < Dot && InSec)
     error(Loc + ": unable to move location counter backward for: " +
           Ctx->OutSec->Name);
   Dot = Val;
 
   // Update to location counter means update to section size.
   if (InSec)
     Ctx->OutSec->Size = Dot - Ctx->OutSec->Addr;
 }
 
 // This function is called from processSectionCommands,
 // while we are fixing the output section layout.
 void LinkerScript::addSymbol(SymbolAssignment *Cmd) {
   if (Cmd->Name == ".")
     return;
 
   // If a symbol was in PROVIDE(), we need to define it only when
   // it is a referenced undefined symbol.
   Symbol *B = Symtab->find(Cmd->Name);
   if (Cmd->Provide && (!B || B->isDefined()))
     return;
 
   // Define a symbol.
   Symbol *Sym;
   uint8_t Visibility = Cmd->Hidden ? STV_HIDDEN : STV_DEFAULT;
   std::tie(Sym, std::ignore) = Symtab->insert(Cmd->Name, /*Type*/ 0, Visibility,
                                               /*CanOmitFromDynSym*/ false,
                                               /*File*/ nullptr);
   ExprValue Value = Cmd->Expression();
   SectionBase *Sec = Value.isAbsolute() ? nullptr : Value.Sec;
 
   // When this function is called, section addresses have not been
   // fixed yet. So, we may or may not know the value of the RHS
   // expression.
   //
   // For example, if an expression is `x = 42`, we know x is always 42.
   // However, if an expression is `x = .`, there's no way to know its
   // value at the moment.
   //
   // We want to set symbol values early if we can. This allows us to
   // use symbols as variables in linker scripts. Doing so allows us to
   // write expressions like this: `alignment = 16; . = ALIGN(., alignment)`.
   uint64_t SymValue = Value.Sec ? 0 : Value.getValue();
 
   replaceSymbol<Defined>(Sym, nullptr, Cmd->Name, STB_GLOBAL, Visibility,
                          STT_NOTYPE, SymValue, 0, Sec);
   Cmd->Sym = cast<Defined>(Sym);
 }
 
 // This function is called from assignAddresses, while we are
 // fixing the output section addresses. This function is supposed
 // to set the final value for a given symbol assignment.
 void LinkerScript::assignSymbol(SymbolAssignment *Cmd, bool InSec) {
   if (Cmd->Name == ".") {
     setDot(Cmd->Expression, Cmd->Location, InSec);
     return;
   }
 
   if (!Cmd->Sym)
     return;
 
   ExprValue V = Cmd->Expression();
   if (V.isAbsolute()) {
     Cmd->Sym->Section = nullptr;
     Cmd->Sym->Value = V.getValue();
   } else {
     Cmd->Sym->Section = V.Sec;
     Cmd->Sym->Value = V.getSectionOffset();
   }
 }
 
 static std::string getFilename(InputFile *File) {
   if (!File)
     return "";
   if (File->ArchiveName.empty())
     return File->getName();
   return (File->ArchiveName + "(" + File->getName() + ")").str();
 }
 
 bool LinkerScript::shouldKeep(InputSectionBase *S) {
   if (KeptSections.empty())
     return false;
   std::string Filename = getFilename(S->File);
   for (InputSectionDescription *ID : KeptSections)
     if (ID->FilePat.match(Filename))
       for (SectionPattern &P : ID->SectionPatterns)
         if (P.SectionPat.match(S->Name))
           return true;
   return false;
 }
 
 // A helper function for the SORT() command.
 static std::function<bool(InputSectionBase *, InputSectionBase *)>
 getComparator(SortSectionPolicy K) {
   switch (K) {
   case SortSectionPolicy::Alignment:
     return [](InputSectionBase *A, InputSectionBase *B) {
       // ">" is not a mistake. Sections with larger alignments are placed
       // before sections with smaller alignments in order to reduce the
       // amount of padding necessary. This is compatible with GNU.
       return A->Alignment > B->Alignment;
     };
   case SortSectionPolicy::Name:
     return [](InputSectionBase *A, InputSectionBase *B) {
       return A->Name < B->Name;
     };
   case SortSectionPolicy::Priority:
     return [](InputSectionBase *A, InputSectionBase *B) {
       return getPriority(A->Name) < getPriority(B->Name);
     };
   default:
     llvm_unreachable("unknown sort policy");
   }
 }
 
 // A helper function for the SORT() command.
 static bool matchConstraints(ArrayRef<InputSection *> Sections,
                              ConstraintKind Kind) {
   if (Kind == ConstraintKind::NoConstraint)
     return true;
 
   bool IsRW = llvm::any_of(
       Sections, [](InputSection *Sec) { return Sec->Flags & SHF_WRITE; });
 
   return (IsRW && Kind == ConstraintKind::ReadWrite) ||
          (!IsRW && Kind == ConstraintKind::ReadOnly);
 }
 
 static void sortSections(MutableArrayRef<InputSection *> Vec,
                          SortSectionPolicy K) {
   if (K != SortSectionPolicy::Default && K != SortSectionPolicy::None)
     std::stable_sort(Vec.begin(), Vec.end(), getComparator(K));
 }
 
 // Sort sections as instructed by SORT-family commands and --sort-section
 // option. Because SORT-family commands can be nested at most two depth
 // (e.g. SORT_BY_NAME(SORT_BY_ALIGNMENT(.text.*))) and because the command
 // line option is respected even if a SORT command is given, the exact
 // behavior we have here is a bit complicated. Here are the rules.
 //
 // 1. If two SORT commands are given, --sort-section is ignored.
 // 2. If one SORT command is given, and if it is not SORT_NONE,
 //    --sort-section is handled as an inner SORT command.
 // 3. If one SORT command is given, and if it is SORT_NONE, don't sort.
 // 4. If no SORT command is given, sort according to --sort-section.
 // 5. If no SORT commands are given and --sort-section is not specified,
 //    apply sorting provided by --symbol-ordering-file if any exist.
 static void sortInputSections(
     MutableArrayRef<InputSection *> Vec, const SectionPattern &Pat,
     const DenseMap<SectionBase *, int> &Order) {
   if (Pat.SortOuter == SortSectionPolicy::None)
     return;
 
   if (Pat.SortOuter == SortSectionPolicy::Default &&
       Config->SortSection == SortSectionPolicy::Default) {
     // If -symbol-ordering-file was given, sort accordingly.
     // Usually, Order is empty.
     if (!Order.empty())
       sortByOrder(Vec, [&](InputSectionBase *S) { return Order.lookup(S); });
     return;
   }
 
   if (Pat.SortInner == SortSectionPolicy::Default)
     sortSections(Vec, Config->SortSection);
   else
     sortSections(Vec, Pat.SortInner);
   sortSections(Vec, Pat.SortOuter);
 }
 
 // Compute and remember which sections the InputSectionDescription matches.
 std::vector<InputSection *>
 LinkerScript::computeInputSections(const InputSectionDescription *Cmd,
                                    const DenseMap<SectionBase *, int> &Order) {
   std::vector<InputSection *> Ret;
 
   // Collects all sections that satisfy constraints of Cmd.
   for (const SectionPattern &Pat : Cmd->SectionPatterns) {
     size_t SizeBefore = Ret.size();
 
     for (InputSectionBase *Sec : InputSections) {
       if (!Sec->Live || Sec->Assigned)
         continue;
 
       // For -emit-relocs we have to ignore entries like
       //   .rela.dyn : { *(.rela.data) }
       // which are common because they are in the default bfd script.
       if (Sec->Type == SHT_REL || Sec->Type == SHT_RELA)
         continue;
 
       std::string Filename = getFilename(Sec->File);
       if (!Cmd->FilePat.match(Filename) ||
           Pat.ExcludedFilePat.match(Filename) ||
           !Pat.SectionPat.match(Sec->Name))
         continue;
 
       // It is safe to assume that Sec is an InputSection
       // because mergeable or EH input sections have already been
       // handled and eliminated.
       Ret.push_back(cast<InputSection>(Sec));
       Sec->Assigned = true;
     }
 
     sortInputSections(MutableArrayRef<InputSection *>(Ret).slice(SizeBefore),
                       Pat, Order);
   }
   return Ret;
 }
 
 void LinkerScript::discard(ArrayRef<InputSection *> V) {
   for (InputSection *S : V) {
     if (S == InX::ShStrTab || S == InX::Dynamic || S == InX::DynSymTab ||
         S == InX::DynStrTab)
       error("discarding " + S->Name + " section is not allowed");
 
     S->Assigned = false;
     S->Live = false;
     discard(S->DependentSections);
   }
 }
 
 std::vector<InputSection *> LinkerScript::createInputSectionList(
     OutputSection &OutCmd, const DenseMap<SectionBase *, int> &Order) {
   std::vector<InputSection *> Ret;
 
   for (BaseCommand *Base : OutCmd.SectionCommands) {
     if (auto *Cmd = dyn_cast<InputSectionDescription>(Base)) {
       Cmd->Sections = computeInputSections(Cmd, Order);
       Ret.insert(Ret.end(), Cmd->Sections.begin(), Cmd->Sections.end());
     }
   }
   return Ret;
 }
 
 void LinkerScript::processSectionCommands() {
   // A symbol can be assigned before any section is mentioned in the linker
   // script. In an DSO, the symbol values are addresses, so the only important
   // section values are:
   // * SHN_UNDEF
   // * SHN_ABS
   // * Any value meaning a regular section.
   // To handle that, create a dummy aether section that fills the void before
   // the linker scripts switches to another section. It has an index of one
   // which will map to whatever the first actual section is.
   Aether = make<OutputSection>("", 0, SHF_ALLOC);
   Aether->SectionIndex = 1;
 
   // Ctx captures the local AddressState and makes it accessible deliberately.
   // This is needed as there are some cases where we cannot just
   // thread the current state through to a lambda function created by the
   // script parser.
   auto Deleter = make_unique<AddressState>();
   Ctx = Deleter.get();
   Ctx->OutSec = Aether;
 
   size_t I = 0;
   DenseMap<SectionBase *, int> Order = buildSectionOrder();
   // Add input sections to output sections.
   for (BaseCommand *Base : SectionCommands) {
     // Handle symbol assignments outside of any output section.
     if (auto *Cmd = dyn_cast<SymbolAssignment>(Base)) {
       addSymbol(Cmd);
       continue;
     }
 
     if (auto *Sec = dyn_cast<OutputSection>(Base)) {
       std::vector<InputSection *> V = createInputSectionList(*Sec, Order);
 
       // The output section name `/DISCARD/' is special.
       // Any input section assigned to it is discarded.
       if (Sec->Name == "/DISCARD/") {
         discard(V);
         continue;
       }
 
       // This is for ONLY_IF_RO and ONLY_IF_RW. An output section directive
       // ".foo : ONLY_IF_R[OW] { ... }" is handled only if all member input
       // sections satisfy a given constraint. If not, a directive is handled
       // as if it wasn't present from the beginning.
       //
       // Because we'll iterate over SectionCommands many more times, the easy
       // way to "make it as if it wasn't present" is to make it empty.
       if (!matchConstraints(V, Sec->Constraint)) {
         for (InputSectionBase *S : V)
           S->Assigned = false;
         Sec->SectionCommands.clear();
         continue;
       }
 
       // A directive may contain symbol definitions like this:
       // ".foo : { ...; bar = .; }". Handle them.
       for (BaseCommand *Base : Sec->SectionCommands)
         if (auto *OutCmd = dyn_cast<SymbolAssignment>(Base))
           addSymbol(OutCmd);
 
       // Handle subalign (e.g. ".foo : SUBALIGN(32) { ... }"). If subalign
       // is given, input sections are aligned to that value, whether the
       // given value is larger or smaller than the original section alignment.
       if (Sec->SubalignExpr) {
         uint32_t Subalign = Sec->SubalignExpr().getValue();
         for (InputSectionBase *S : V)
           S->Alignment = Subalign;
       }
 
       // Add input sections to an output section.
       for (InputSection *S : V)
         Sec->addSection(S);
 
       Sec->SectionIndex = I++;
       if (Sec->Noload)
         Sec->Type = SHT_NOBITS;
     }
   }
   Ctx = nullptr;
 }
 
 static OutputSection *findByName(ArrayRef<BaseCommand *> Vec,
                                  StringRef Name) {
   for (BaseCommand *Base : Vec)
     if (auto *Sec = dyn_cast<OutputSection>(Base))
       if (Sec->Name == Name)
         return Sec;
   return nullptr;
 }
 
 static OutputSection *createSection(InputSectionBase *IS,
                                     StringRef OutsecName) {
   OutputSection *Sec = Script->createOutputSection(OutsecName, "<internal>");
   Sec->addSection(cast<InputSection>(IS));
   return Sec;
 }
 
 static OutputSection *addInputSec(StringMap<OutputSection *> &Map,
                                   InputSectionBase *IS, StringRef OutsecName) {
   // Sections with SHT_GROUP or SHF_GROUP attributes reach here only when the -r
   // option is given. A section with SHT_GROUP defines a "section group", and
   // its members have SHF_GROUP attribute. Usually these flags have already been
   // stripped by InputFiles.cpp as section groups are processed and uniquified.
   // However, for the -r option, we want to pass through all section groups
   // as-is because adding/removing members or merging them with other groups
   // change their semantics.
   if (IS->Type == SHT_GROUP || (IS->Flags & SHF_GROUP))
     return createSection(IS, OutsecName);
 
   // Imagine .zed : { *(.foo) *(.bar) } script. Both foo and bar may have
   // relocation sections .rela.foo and .rela.bar for example. Most tools do
   // not allow multiple REL[A] sections for output section. Hence we
   // should combine these relocation sections into single output.
   // We skip synthetic sections because it can be .rela.dyn/.rela.plt or any
   // other REL[A] sections created by linker itself.
   if (!isa<SyntheticSection>(IS) &&
       (IS->Type == SHT_REL || IS->Type == SHT_RELA)) {
     auto *Sec = cast<InputSection>(IS);
     OutputSection *Out = Sec->getRelocatedSection()->getOutputSection();
 
     if (Out->RelocationSection) {
       Out->RelocationSection->addSection(Sec);
       return nullptr;
     }
 
     Out->RelocationSection = createSection(IS, OutsecName);
     return Out->RelocationSection;
   }
 
   // When control reaches here, mergeable sections have already been merged into
   // synthetic sections. For relocatable case we want to create one output
   // section per syntetic section so that they have a valid sh_entsize.
   if (Config->Relocatable && (IS->Flags & SHF_MERGE))
     return createSection(IS, OutsecName);
 
   //  The ELF spec just says
   // ----------------------------------------------------------------
   // In the first phase, input sections that match in name, type and
   // attribute flags should be concatenated into single sections.
   // ----------------------------------------------------------------
   //
   // However, it is clear that at least some flags have to be ignored for
   // section merging. At the very least SHF_GROUP and SHF_COMPRESSED have to be
   // ignored. We should not have two output .text sections just because one was
   // in a group and another was not for example.
   //
   // It also seems that that wording was a late addition and didn't get the
   // necessary scrutiny.
   //
   // Merging sections with different flags is expected by some users. One
   // reason is that if one file has
   //
   // int *const bar __attribute__((section(".foo"))) = (int *)0;
   //
   // gcc with -fPIC will produce a read only .foo section. But if another
   // file has
   //
   // int zed;
   // int *const bar __attribute__((section(".foo"))) = (int *)&zed;
   //
   // gcc with -fPIC will produce a read write section.
   //
   // Last but not least, when using linker script the merge rules are forced by
   // the script. Unfortunately, linker scripts are name based. This means that
   // expressions like *(.foo*) can refer to multiple input sections with
   // different flags. We cannot put them in different output sections or we
   // would produce wrong results for
   //
   // start = .; *(.foo.*) end = .; *(.bar)
   //
   // and a mapping of .foo1 and .bar1 to one section and .foo2 and .bar2 to
   // another. The problem is that there is no way to layout those output
   // sections such that the .foo sections are the only thing between the start
   // and end symbols.
   //
   // Given the above issues, we instead merge sections by name and error on
   // incompatible types and flags.
   OutputSection *&Sec = Map[OutsecName];
   if (Sec) {
     Sec->addSection(cast<InputSection>(IS));
     return nullptr;
   }
 
   Sec = createSection(IS, OutsecName);
   return Sec;
 }
 
 // Add sections that didn't match any sections command.
 void LinkerScript::addOrphanSections() {
   unsigned End = SectionCommands.size();
   StringMap<OutputSection *> Map;
 
   std::vector<OutputSection *> V;
   for (InputSectionBase *S : InputSections) {
     if (!S->Live || S->Parent)
       continue;
 
     StringRef Name = getOutputSectionName(S);
 
     if (Config->OrphanHandling == OrphanHandlingPolicy::Error)
       error(toString(S) + " is being placed in '" + Name + "'");
     else if (Config->OrphanHandling == OrphanHandlingPolicy::Warn)
       warn(toString(S) + " is being placed in '" + Name + "'");
 
     if (OutputSection *Sec =
             findByName(makeArrayRef(SectionCommands).slice(0, End), Name)) {
       Sec->addSection(cast<InputSection>(S));
       continue;
     }
 
     if (OutputSection *OS = addInputSec(Map, S, Name))
       V.push_back(OS);
     assert(S->getOutputSection()->SectionIndex == INT_MAX);
   }
 
   // If no SECTIONS command was given, we should insert sections commands
   // before others, so that we can handle scripts which refers them,
   // for example: "foo = ABSOLUTE(ADDR(.text)));".
   // When SECTIONS command is present we just add all orphans to the end.
   if (HasSectionsCommand)
     SectionCommands.insert(SectionCommands.end(), V.begin(), V.end());
   else
     SectionCommands.insert(SectionCommands.begin(), V.begin(), V.end());
 }
 
 uint64_t LinkerScript::advance(uint64_t Size, unsigned Alignment) {
   bool IsTbss =
       (Ctx->OutSec->Flags & SHF_TLS) && Ctx->OutSec->Type == SHT_NOBITS;
   uint64_t Start = IsTbss ? Dot + Ctx->ThreadBssOffset : Dot;
   Start = alignTo(Start, Alignment);
   uint64_t End = Start + Size;
 
   if (IsTbss)
     Ctx->ThreadBssOffset = End - Dot;
   else
     Dot = End;
   return End;
 }
 
 void LinkerScript::output(InputSection *S) {
   uint64_t Before = advance(0, 1);
   uint64_t Pos = advance(S->getSize(), S->Alignment);
   S->OutSecOff = Pos - S->getSize() - Ctx->OutSec->Addr;
 
   // Update output section size after adding each section. This is so that
   // SIZEOF works correctly in the case below:
   // .foo { *(.aaa) a = SIZEOF(.foo); *(.bbb) }
   Ctx->OutSec->Size = Pos - Ctx->OutSec->Addr;
 
   // If there is a memory region associated with this input section, then
   // place the section in that region and update the region index.
+  if (Ctx->LMARegion)
+    Ctx->LMARegion->CurPos += Pos - Before;
+  // FIXME: should we also produce overflow errors for LMARegion?
+
   if (Ctx->MemRegion) {
-    uint64_t &CurOffset = Ctx->MemRegionOffset[Ctx->MemRegion];
+    uint64_t &CurOffset = Ctx->MemRegion->CurPos;
     CurOffset += Pos - Before;
     uint64_t CurSize = CurOffset - Ctx->MemRegion->Origin;
     if (CurSize > Ctx->MemRegion->Length) {
       uint64_t OverflowAmt = CurSize - Ctx->MemRegion->Length;
       error("section '" + Ctx->OutSec->Name + "' will not fit in region '" +
             Ctx->MemRegion->Name + "': overflowed by " + Twine(OverflowAmt) +
             " bytes");
     }
   }
 }
 
 void LinkerScript::switchTo(OutputSection *Sec) {
   if (Ctx->OutSec == Sec)
     return;
 
   Ctx->OutSec = Sec;
   Ctx->OutSec->Addr = advance(0, Ctx->OutSec->Alignment);
 }
 
 // This function searches for a memory region to place the given output
 // section in. If found, a pointer to the appropriate memory region is
 // returned. Otherwise, a nullptr is returned.
 MemoryRegion *LinkerScript::findMemoryRegion(OutputSection *Sec) {
   // If a memory region name was specified in the output section command,
   // then try to find that region first.
   if (!Sec->MemoryRegionName.empty()) {
-    auto It = MemoryRegions.find(Sec->MemoryRegionName);
-    if (It != MemoryRegions.end())
-      return It->second;
+    if (MemoryRegion *M = MemoryRegions.lookup(Sec->MemoryRegionName))
+      return M;
     error("memory region '" + Sec->MemoryRegionName + "' not declared");
     return nullptr;
   }
 
   // If at least one memory region is defined, all sections must
   // belong to some memory region. Otherwise, we don't need to do
   // anything for memory regions.
   if (MemoryRegions.empty())
     return nullptr;
 
   // See if a region can be found by matching section flags.
   for (auto &Pair : MemoryRegions) {
     MemoryRegion *M = Pair.second;
     if ((M->Flags & Sec->Flags) && (M->NegFlags & Sec->Flags) == 0)
       return M;
   }
 
   // Otherwise, no suitable region was found.
   if (Sec->Flags & SHF_ALLOC)
     error("no memory region specified for section '" + Sec->Name + "'");
   return nullptr;
 }
 
 // This function assigns offsets to input sections and an output section
 // for a single sections command (e.g. ".text { *(.text); }").
 void LinkerScript::assignOffsets(OutputSection *Sec) {
   if (!(Sec->Flags & SHF_ALLOC))
     Dot = 0;
   else if (Sec->AddrExpr)
     setDot(Sec->AddrExpr, Sec->Location, false);
 
   Ctx->MemRegion = Sec->MemRegion;
+  Ctx->LMARegion = Sec->LMARegion;
   if (Ctx->MemRegion)
-    Dot = Ctx->MemRegionOffset[Ctx->MemRegion];
+    Dot = Ctx->MemRegion->CurPos;
 
   switchTo(Sec);
 
-  if (Sec->LMAExpr) {
-    uint64_t D = Dot;
-    Ctx->LMAOffset = [=] { return Sec->LMAExpr().getValue() - D; };
-  }
+  if (Sec->LMAExpr)
+    Ctx->LMAOffset = Sec->LMAExpr().getValue() - Dot;
 
-  if (!Sec->LMARegionName.empty()) {
-    if (MemoryRegion *MR = MemoryRegions.lookup(Sec->LMARegionName)) {
-      uint64_t Offset = MR->Origin - Dot;
-      Ctx->LMAOffset = [=] { return Offset; };
-    } else {
-      error("memory region '" + Sec->LMARegionName + "' not declared");
-    }
-  }
+  if (MemoryRegion *MR = Sec->LMARegion)
+    Ctx->LMAOffset = MR->CurPos - Dot;
 
   // If neither AT nor AT> is specified for an allocatable section, the linker
   // will set the LMA such that the difference between VMA and LMA for the
   // section is the same as the preceding output section in the same region
   // https://sourceware.org/binutils/docs-2.20/ld/Output-Section-LMA.html
-  if (Ctx->LMAOffset)
-    Ctx->OutSec->LMAOffset = Ctx->LMAOffset();
+  if (PhdrEntry *L = Ctx->OutSec->PtLoad)
+    L->LMAOffset = Ctx->LMAOffset;
 
   // The Size previously denoted how many InputSections had been added to this
   // section, and was used for sorting SHF_LINK_ORDER sections. Reset it to
   // compute the actual size value.
   Sec->Size = 0;
 
   // We visited SectionsCommands from processSectionCommands to
   // layout sections. Now, we visit SectionsCommands again to fix
   // section offsets.
   for (BaseCommand *Base : Sec->SectionCommands) {
     // This handles the assignments to symbol or to the dot.
     if (auto *Cmd = dyn_cast<SymbolAssignment>(Base)) {
       assignSymbol(Cmd, true);
       continue;
     }
 
     // Handle BYTE(), SHORT(), LONG(), or QUAD().
     if (auto *Cmd = dyn_cast<ByteCommand>(Base)) {
       Cmd->Offset = Dot - Ctx->OutSec->Addr;
       Dot += Cmd->Size;
       if (Ctx->MemRegion)
-        Ctx->MemRegionOffset[Ctx->MemRegion] += Cmd->Size;
+        Ctx->MemRegion->CurPos += Cmd->Size;
+      if (Ctx->LMARegion)
+        Ctx->LMARegion->CurPos += Cmd->Size;
       Ctx->OutSec->Size = Dot - Ctx->OutSec->Addr;
       continue;
     }
 
     // Handle ASSERT().
     if (auto *Cmd = dyn_cast<AssertCommand>(Base)) {
       Cmd->Expression();
       continue;
     }
 
     // Handle a single input section description command.
     // It calculates and assigns the offsets for each section and also
     // updates the output section size.
     auto *Cmd = cast<InputSectionDescription>(Base);
     for (InputSection *Sec : Cmd->Sections) {
       // We tentatively added all synthetic sections at the beginning and
       // removed empty ones afterwards (because there is no way to know
       // whether they were going be empty or not other than actually running
       // linker scripts.) We need to ignore remains of empty sections.
       if (auto *S = dyn_cast<SyntheticSection>(Sec))
         if (S->empty())
           continue;
 
       if (!Sec->Live)
         continue;
       assert(Ctx->OutSec == Sec->getParent());
       output(Sec);
     }
   }
 }
 
 void LinkerScript::removeEmptyCommands() {
   // It is common practice to use very generic linker scripts. So for any
   // given run some of the output sections in the script will be empty.
   // We could create corresponding empty output sections, but that would
   // clutter the output.
   // We instead remove trivially empty sections. The bfd linker seems even
   // more aggressive at removing them.
   llvm::erase_if(SectionCommands, [&](BaseCommand *Base) {
     if (auto *Sec = dyn_cast<OutputSection>(Base))
       return !Sec->Live;
     return false;
   });
 }
 
 static bool isAllSectionDescription(const OutputSection &Cmd) {
   for (BaseCommand *Base : Cmd.SectionCommands)
     if (!isa<InputSectionDescription>(*Base))
       return false;
   return true;
 }
 
 void LinkerScript::adjustSectionsBeforeSorting() {
   // If the output section contains only symbol assignments, create a
   // corresponding output section. The issue is what to do with linker script
   // like ".foo : { symbol = 42; }". One option would be to convert it to
   // "symbol = 42;". That is, move the symbol out of the empty section
   // description. That seems to be what bfd does for this simple case. The
   // problem is that this is not completely general. bfd will give up and
   // create a dummy section too if there is a ". = . + 1" inside the section
   // for example.
   // Given that we want to create the section, we have to worry what impact
   // it will have on the link. For example, if we just create a section with
   // 0 for flags, it would change which PT_LOADs are created.
   // We could remember that that particular section is dummy and ignore it in
   // other parts of the linker, but unfortunately there are quite a few places
   // that would need to change:
   //   * The program header creation.
   //   * The orphan section placement.
   //   * The address assignment.
   // The other option is to pick flags that minimize the impact the section
   // will have on the rest of the linker. That is why we copy the flags from
   // the previous sections. Only a few flags are needed to keep the impact low.
   uint64_t Flags = SHF_ALLOC;
 
   for (BaseCommand *Cmd : SectionCommands) {
     auto *Sec = dyn_cast<OutputSection>(Cmd);
     if (!Sec)
       continue;
     if (Sec->Live) {
       Flags = Sec->Flags & (SHF_ALLOC | SHF_WRITE | SHF_EXECINSTR);
       continue;
     }
 
     if (isAllSectionDescription(*Sec))
       continue;
 
     Sec->Live = true;
     Sec->Flags = Flags;
   }
 }
 
 void LinkerScript::adjustSectionsAfterSorting() {
   // Try and find an appropriate memory region to assign offsets in.
   for (BaseCommand *Base : SectionCommands) {
     if (auto *Sec = dyn_cast<OutputSection>(Base)) {
       if (!Sec->Live)
         continue;
+      if (!Sec->LMARegionName.empty()) {
+        if (MemoryRegion *M = MemoryRegions.lookup(Sec->LMARegionName))
+          Sec->LMARegion = M;
+        else
+          error("memory region '" + Sec->LMARegionName + "' not declared");
+      }
       Sec->MemRegion = findMemoryRegion(Sec);
       // Handle align (e.g. ".foo : ALIGN(16) { ... }").
       if (Sec->AlignExpr)
         Sec->Alignment =
             std::max<uint32_t>(Sec->Alignment, Sec->AlignExpr().getValue());
     }
   }
 
   // If output section command doesn't specify any segments,
   // and we haven't previously assigned any section to segment,
   // then we simply assign section to the very first load segment.
   // Below is an example of such linker script:
   // PHDRS { seg PT_LOAD; }
   // SECTIONS { .aaa : { *(.aaa) } }
   std::vector<StringRef> DefPhdrs;
   auto FirstPtLoad =
       std::find_if(PhdrsCommands.begin(), PhdrsCommands.end(),
                    [](const PhdrsCommand &Cmd) { return Cmd.Type == PT_LOAD; });
   if (FirstPtLoad != PhdrsCommands.end())
     DefPhdrs.push_back(FirstPtLoad->Name);
 
   // Walk the commands and propagate the program headers to commands that don't
   // explicitly specify them.
   for (BaseCommand *Base : SectionCommands) {
     auto *Sec = dyn_cast<OutputSection>(Base);
     if (!Sec)
       continue;
 
     if (Sec->Phdrs.empty()) {
       // To match the bfd linker script behaviour, only propagate program
       // headers to sections that are allocated.
       if (Sec->Flags & SHF_ALLOC)
         Sec->Phdrs = DefPhdrs;
     } else {
       DefPhdrs = Sec->Phdrs;
     }
   }
 }
 
 static OutputSection *findFirstSection(PhdrEntry *Load) {
   for (OutputSection *Sec : OutputSections)
     if (Sec->PtLoad == Load)
       return Sec;
   return nullptr;
 }
 
 // Try to find an address for the file and program headers output sections,
 // which were unconditionally added to the first PT_LOAD segment earlier.
 //
 // When using the default layout, we check if the headers fit below the first
 // allocated section. When using a linker script, we also check if the headers
 // are covered by the output section. This allows omitting the headers by not
 // leaving enough space for them in the linker script; this pattern is common
 // in embedded systems.
 //
 // If there isn't enough space for these sections, we'll remove them from the
 // PT_LOAD segment, and we'll also remove the PT_PHDR segment.
 void LinkerScript::allocateHeaders(std::vector<PhdrEntry *> &Phdrs) {
   uint64_t Min = std::numeric_limits<uint64_t>::max();
   for (OutputSection *Sec : OutputSections)
     if (Sec->Flags & SHF_ALLOC)
       Min = std::min<uint64_t>(Min, Sec->Addr);
 
   auto It = llvm::find_if(
       Phdrs, [](const PhdrEntry *E) { return E->p_type == PT_LOAD; });
   if (It == Phdrs.end())
     return;
   PhdrEntry *FirstPTLoad = *It;
 
   uint64_t HeaderSize = getHeaderSize();
   // When linker script with SECTIONS is being used, don't output headers
   // unless there's a space for them.
   uint64_t Base = HasSectionsCommand ? alignDown(Min, Config->MaxPageSize) : 0;
   if (HeaderSize <= Min - Base || Script->hasPhdrsCommands()) {
     Min = alignDown(Min - HeaderSize, Config->MaxPageSize);
     Out::ElfHeader->Addr = Min;
     Out::ProgramHeaders->Addr = Min + Out::ElfHeader->Size;
     return;
   }
 
   Out::ElfHeader->PtLoad = nullptr;
   Out::ProgramHeaders->PtLoad = nullptr;
   FirstPTLoad->FirstSec = findFirstSection(FirstPTLoad);
 
   llvm::erase_if(Phdrs,
                  [](const PhdrEntry *E) { return E->p_type == PT_PHDR; });
 }
 
 LinkerScript::AddressState::AddressState() {
   for (auto &MRI : Script->MemoryRegions) {
-    const MemoryRegion *MR = MRI.second;
-    MemRegionOffset[MR] = MR->Origin;
+    MemoryRegion *MR = MRI.second;
+    MR->CurPos = MR->Origin;
   }
 }
 
 static uint64_t getInitialDot() {
   // By default linker scripts use an initial value of 0 for '.',
   // but prefer -image-base if set.
   if (Script->HasSectionsCommand)
     return Config->ImageBase ? *Config->ImageBase : 0;
 
   uint64_t StartAddr = UINT64_MAX;
   // The Sections with -T<section> have been sorted in order of ascending
   // address. We must lower StartAddr if the lowest -T<section address> as
   // calls to setDot() must be monotonically increasing.
   for (auto &KV : Config->SectionStartMap)
     StartAddr = std::min(StartAddr, KV.second);
   return std::min(StartAddr, Target->getImageBase() + elf::getHeaderSize());
 }
 
 // Here we assign addresses as instructed by linker script SECTIONS
 // sub-commands. Doing that allows us to use final VA values, so here
 // we also handle rest commands like symbol assignments and ASSERTs.
 void LinkerScript::assignAddresses() {
   Dot = getInitialDot();
 
   auto Deleter = make_unique<AddressState>();
   Ctx = Deleter.get();
   ErrorOnMissingSection = true;
   switchTo(Aether);
 
   for (BaseCommand *Base : SectionCommands) {
     if (auto *Cmd = dyn_cast<SymbolAssignment>(Base)) {
       assignSymbol(Cmd, false);
       continue;
     }
 
     if (auto *Cmd = dyn_cast<AssertCommand>(Base)) {
       Cmd->Expression();
       continue;
     }
 
     assignOffsets(cast<OutputSection>(Base));
   }
   Ctx = nullptr;
 }
 
 // Creates program headers as instructed by PHDRS linker script command.
 std::vector<PhdrEntry *> LinkerScript::createPhdrs() {
   std::vector<PhdrEntry *> Ret;
 
   // Process PHDRS and FILEHDR keywords because they are not
   // real output sections and cannot be added in the following loop.
   for (const PhdrsCommand &Cmd : PhdrsCommands) {
     PhdrEntry *Phdr = make<PhdrEntry>(Cmd.Type, Cmd.Flags ? *Cmd.Flags : PF_R);
 
     if (Cmd.HasFilehdr)
       Phdr->add(Out::ElfHeader);
     if (Cmd.HasPhdrs)
       Phdr->add(Out::ProgramHeaders);
 
     if (Cmd.LMAExpr) {
       Phdr->p_paddr = Cmd.LMAExpr().getValue();
       Phdr->HasLMA = true;
     }
     Ret.push_back(Phdr);
   }
 
   // Add output sections to program headers.
   for (OutputSection *Sec : OutputSections) {
     // Assign headers specified by linker script
     for (size_t Id : getPhdrIndices(Sec)) {
       Ret[Id]->add(Sec);
       if (!PhdrsCommands[Id].Flags.hasValue())
         Ret[Id]->p_flags |= Sec->getPhdrFlags();
     }
   }
   return Ret;
 }
 
 // Returns true if we should emit an .interp section.
 //
 // We usually do. But if PHDRS commands are given, and
 // no PT_INTERP is there, there's no place to emit an
 // .interp, so we don't do that in that case.
 bool LinkerScript::needsInterpSection() {
   if (PhdrsCommands.empty())
     return true;
   for (PhdrsCommand &Cmd : PhdrsCommands)
     if (Cmd.Type == PT_INTERP)
       return true;
   return false;
 }
 
 ExprValue LinkerScript::getSymbolValue(StringRef Name, const Twine &Loc) {
   if (Name == ".") {
     if (Ctx)
       return {Ctx->OutSec, false, Dot - Ctx->OutSec->Addr, Loc};
     error(Loc + ": unable to get location counter value");
     return 0;
   }
 
   if (Symbol *Sym = Symtab->find(Name)) {
     if (auto *DS = dyn_cast<Defined>(Sym))
       return {DS->Section, false, DS->Value, Loc};
     if (auto *SS = dyn_cast<SharedSymbol>(Sym))
       if (!ErrorOnMissingSection || SS->CopyRelSec)
         return {SS->CopyRelSec, false, 0, Loc};
   }
 
   error(Loc + ": symbol not found: " + Name);
   return 0;
 }
 
 // Returns the index of the segment named Name.
 static Optional<size_t> getPhdrIndex(ArrayRef<PhdrsCommand> Vec,
                                      StringRef Name) {
   for (size_t I = 0; I < Vec.size(); ++I)
     if (Vec[I].Name == Name)
       return I;
   return None;
 }
 
 // Returns indices of ELF headers containing specific section. Each index is a
 // zero based number of ELF header listed within PHDRS {} script block.
 std::vector<size_t> LinkerScript::getPhdrIndices(OutputSection *Cmd) {
   std::vector<size_t> Ret;
 
   for (StringRef S : Cmd->Phdrs) {
     if (Optional<size_t> Idx = getPhdrIndex(PhdrsCommands, S))
       Ret.push_back(*Idx);
     else if (S != "NONE")
       error(Cmd->Location + ": section header '" + S +
             "' is not listed in PHDRS");
   }
   return Ret;
 }
Index: vendor/lld/dist-release_60/ELF/LinkerScript.h
===================================================================
--- vendor/lld/dist-release_60/ELF/LinkerScript.h	(revision 328744)
+++ vendor/lld/dist-release_60/ELF/LinkerScript.h	(revision 328745)
@@ -1,291 +1,297 @@
 //===- LinkerScript.h -------------------------------------------*- C++ -*-===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLD_ELF_LINKER_SCRIPT_H
 #define LLD_ELF_LINKER_SCRIPT_H
 
 #include "Config.h"
 #include "Strings.h"
 #include "Writer.h"
 #include "lld/Common/LLVM.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/DenseSet.h"
 #include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Support/MemoryBuffer.h"
 #include <cstddef>
 #include <cstdint>
 #include <functional>
 #include <memory>
 #include <vector>
 
 namespace lld {
 namespace elf {
 
 class Defined;
 class Symbol;
 class InputSectionBase;
 class InputSection;
 class OutputSection;
 class InputSectionBase;
 class SectionBase;
 
 // This represents an r-value in the linker script.
 struct ExprValue {
   ExprValue(SectionBase *Sec, bool ForceAbsolute, uint64_t Val,
             const Twine &Loc)
       : Sec(Sec), ForceAbsolute(ForceAbsolute), Val(Val), Loc(Loc.str()) {}
 
   ExprValue(uint64_t Val) : ExprValue(nullptr, false, Val, "") {}
 
   bool isAbsolute() const { return ForceAbsolute || Sec == nullptr; }
   uint64_t getValue() const;
   uint64_t getSecAddr() const;
   uint64_t getSectionOffset() const;
 
   // If a value is relative to a section, it has a non-null Sec.
   SectionBase *Sec;
 
   // True if this expression is enclosed in ABSOLUTE().
   // This flag affects the return value of getValue().
   bool ForceAbsolute;
 
   uint64_t Val;
   uint64_t Alignment = 1;
 
   // Original source location. Used for error messages.
   std::string Loc;
 };
 
 // This represents an expression in the linker script.
 // ScriptParser::readExpr reads an expression and returns an Expr.
 // Later, we evaluate the expression by calling the function.
 typedef std::function<ExprValue()> Expr;
 
 // This enum is used to implement linker script SECTIONS command.
 // https://sourceware.org/binutils/docs/ld/SECTIONS.html#SECTIONS
 enum SectionsCommandKind {
   AssignmentKind, // . = expr or <sym> = expr
   OutputSectionKind,
   InputSectionKind,
   AssertKind, // ASSERT(expr)
   ByteKind    // BYTE(expr), SHORT(expr), LONG(expr) or QUAD(expr)
 };
 
 struct BaseCommand {
   BaseCommand(int K) : Kind(K) {}
   int Kind;
 };
 
 // This represents ". = <expr>" or "<symbol> = <expr>".
 struct SymbolAssignment : BaseCommand {
   SymbolAssignment(StringRef Name, Expr E, std::string Loc)
       : BaseCommand(AssignmentKind), Name(Name), Expression(E), Location(Loc) {}
 
   static bool classof(const BaseCommand *C) {
     return C->Kind == AssignmentKind;
   }
 
   // The LHS of an expression. Name is either a symbol name or ".".
   StringRef Name;
   Defined *Sym = nullptr;
 
   // The RHS of an expression.
   Expr Expression;
 
   // Command attributes for PROVIDE, HIDDEN and PROVIDE_HIDDEN.
   bool Provide = false;
   bool Hidden = false;
 
   // Holds file name and line number for error reporting.
   std::string Location;
 };
 
 // Linker scripts allow additional constraints to be put on ouput sections.
 // If an output section is marked as ONLY_IF_RO, the section is created
 // only if its input sections are read-only. Likewise, an output section
 // with ONLY_IF_RW is created if all input sections are RW.
 enum class ConstraintKind { NoConstraint, ReadOnly, ReadWrite };
 
 // This struct is used to represent the location and size of regions of
 // target memory. Instances of the struct are created by parsing the
 // MEMORY command.
 struct MemoryRegion {
+  MemoryRegion(StringRef Name, uint64_t Origin, uint64_t Length, uint32_t Flags,
+               uint32_t NegFlags)
+      : Name(Name), Origin(Origin), Length(Length), Flags(Flags),
+        NegFlags(NegFlags) {}
+
   std::string Name;
   uint64_t Origin;
   uint64_t Length;
   uint32_t Flags;
   uint32_t NegFlags;
+  uint64_t CurPos = 0;
 };
 
 // This struct represents one section match pattern in SECTIONS() command.
 // It can optionally have negative match pattern for EXCLUDED_FILE command.
 // Also it may be surrounded with SORT() command, so contains sorting rules.
 struct SectionPattern {
   SectionPattern(StringMatcher &&Pat1, StringMatcher &&Pat2)
       : ExcludedFilePat(Pat1), SectionPat(Pat2) {}
 
   StringMatcher ExcludedFilePat;
   StringMatcher SectionPat;
   SortSectionPolicy SortOuter;
   SortSectionPolicy SortInner;
 };
 
 class ThunkSection;
 struct InputSectionDescription : BaseCommand {
   InputSectionDescription(StringRef FilePattern)
       : BaseCommand(InputSectionKind), FilePat(FilePattern) {}
 
   static bool classof(const BaseCommand *C) {
     return C->Kind == InputSectionKind;
   }
 
   StringMatcher FilePat;
 
   // Input sections that matches at least one of SectionPatterns
   // will be associated with this InputSectionDescription.
   std::vector<SectionPattern> SectionPatterns;
 
   std::vector<InputSection *> Sections;
 
   // Temporary record of synthetic ThunkSection instances and the pass that
   // they were created in. This is used to insert newly created ThunkSections
   // into Sections at the end of a createThunks() pass.
   std::vector<std::pair<ThunkSection *, uint32_t>> ThunkSections;
 };
 
 // Represents an ASSERT().
 struct AssertCommand : BaseCommand {
   AssertCommand(Expr E) : BaseCommand(AssertKind), Expression(E) {}
 
   static bool classof(const BaseCommand *C) { return C->Kind == AssertKind; }
 
   Expr Expression;
 };
 
 // Represents BYTE(), SHORT(), LONG(), or QUAD().
 struct ByteCommand : BaseCommand {
   ByteCommand(Expr E, unsigned Size)
       : BaseCommand(ByteKind), Expression(E), Size(Size) {}
 
   static bool classof(const BaseCommand *C) { return C->Kind == ByteKind; }
 
   Expr Expression;
   unsigned Offset;
   unsigned Size;
 };
 
 struct PhdrsCommand {
   StringRef Name;
   unsigned Type = llvm::ELF::PT_NULL;
   bool HasFilehdr = false;
   bool HasPhdrs = false;
   llvm::Optional<unsigned> Flags;
   Expr LMAExpr = nullptr;
 };
 
 class LinkerScript final {
   // Temporary state used in processSectionCommands() and assignAddresses()
   // that must be reinitialized for each call to the above functions, and must
   // not be used outside of the scope of a call to the above functions.
   struct AddressState {
     AddressState();
     uint64_t ThreadBssOffset = 0;
     OutputSection *OutSec = nullptr;
     MemoryRegion *MemRegion = nullptr;
-    llvm::DenseMap<const MemoryRegion *, uint64_t> MemRegionOffset;
-    std::function<uint64_t()> LMAOffset;
+    MemoryRegion *LMARegion = nullptr;
+    uint64_t LMAOffset = 0;
   };
 
   llvm::DenseMap<StringRef, OutputSection *> NameToOutputSection;
 
   void addSymbol(SymbolAssignment *Cmd);
   void assignSymbol(SymbolAssignment *Cmd, bool InSec);
   void setDot(Expr E, const Twine &Loc, bool InSec);
 
   std::vector<InputSection *>
   computeInputSections(const InputSectionDescription *,
                        const llvm::DenseMap<SectionBase *, int> &Order);
 
   std::vector<InputSection *>
   createInputSectionList(OutputSection &Cmd,
                          const llvm::DenseMap<SectionBase *, int> &Order);
 
   std::vector<size_t> getPhdrIndices(OutputSection *Sec);
 
   MemoryRegion *findMemoryRegion(OutputSection *Sec);
 
   void switchTo(OutputSection *Sec);
   uint64_t advance(uint64_t Size, unsigned Align);
   void output(InputSection *Sec);
 
   void assignOffsets(OutputSection *Sec);
 
   // Ctx captures the local AddressState and makes it accessible
   // deliberately. This is needed as there are some cases where we cannot just
   // thread the current state through to a lambda function created by the
   // script parser.
   // This should remain a plain pointer as its lifetime is smaller than
   // LinkerScript.
   AddressState *Ctx = nullptr;
 
   OutputSection *Aether;
 
   uint64_t Dot;
 
 public:
   OutputSection *createOutputSection(StringRef Name, StringRef Location);
   OutputSection *getOrCreateOutputSection(StringRef Name);
 
   bool hasPhdrsCommands() { return !PhdrsCommands.empty(); }
   uint64_t getDot() { return Dot; }
   void discard(ArrayRef<InputSection *> V);
 
   ExprValue getSymbolValue(StringRef Name, const Twine &Loc);
 
   void addOrphanSections();
   void removeEmptyCommands();
   void adjustSectionsBeforeSorting();
   void adjustSectionsAfterSorting();
 
   std::vector<PhdrEntry *> createPhdrs();
   bool needsInterpSection();
 
   bool shouldKeep(InputSectionBase *S);
   void assignAddresses();
   void allocateHeaders(std::vector<PhdrEntry *> &Phdrs);
   void processSectionCommands();
 
   // SECTIONS command list.
   std::vector<BaseCommand *> SectionCommands;
 
   // PHDRS command list.
   std::vector<PhdrsCommand> PhdrsCommands;
 
   bool HasSectionsCommand = false;
   bool ErrorOnMissingSection = false;
 
   // List of section patterns specified with KEEP commands. They will
   // be kept even if they are unused and --gc-sections is specified.
   std::vector<InputSectionDescription *> KeptSections;
 
   // A map from memory region name to a memory region descriptor.
   llvm::MapVector<llvm::StringRef, MemoryRegion *> MemoryRegions;
 
   // A list of symbols referenced by the script.
   std::vector<llvm::StringRef> ReferencedSymbols;
 };
 
 extern LinkerScript *Script;
 
 } // end namespace elf
 } // end namespace lld
 
 #endif // LLD_ELF_LINKER_SCRIPT_H
Index: vendor/lld/dist-release_60/ELF/OutputSections.h
===================================================================
--- vendor/lld/dist-release_60/ELF/OutputSections.h	(revision 328744)
+++ vendor/lld/dist-release_60/ELF/OutputSections.h	(revision 328745)
@@ -1,153 +1,153 @@
 //===- OutputSections.h -----------------------------------------*- C++ -*-===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLD_ELF_OUTPUT_SECTIONS_H
 #define LLD_ELF_OUTPUT_SECTIONS_H
 
 #include "Config.h"
 #include "InputSection.h"
 #include "LinkerScript.h"
 #include "Relocations.h"
 
 #include "lld/Common/LLVM.h"
 #include "llvm/MC/StringTableBuilder.h"
 #include "llvm/Object/ELF.h"
 
 namespace lld {
 namespace elf {
 
 struct PhdrEntry;
 class Symbol;
 struct EhSectionPiece;
 class EhInputSection;
 class InputSection;
 class InputSectionBase;
 class MergeInputSection;
 class OutputSection;
 template <class ELFT> class ObjFile;
 template <class ELFT> class SharedFile;
 class SharedSymbol;
 class Defined;
 
 // This represents a section in an output file.
 // It is composed of multiple InputSections.
 // The writer creates multiple OutputSections and assign them unique,
 // non-overlapping file offsets and VAs.
 class OutputSection final : public BaseCommand, public SectionBase {
 public:
   OutputSection(StringRef Name, uint32_t Type, uint64_t Flags);
 
   static bool classof(const SectionBase *S) {
     return S->kind() == SectionBase::Output;
   }
 
   static bool classof(const BaseCommand *C);
 
-  uint64_t getLMA() const { return Addr + LMAOffset; }
+  uint64_t getLMA() const { return PtLoad ? Addr + PtLoad->LMAOffset : Addr; }
   template <typename ELFT> void writeHeaderTo(typename ELFT::Shdr *SHdr);
 
   unsigned SectionIndex;
   unsigned SortRank;
 
   uint32_t getPhdrFlags() const;
 
   // Pointer to the PT_LOAD segment, which this section resides in. This field
   // is used to correctly compute file offset of a section. When two sections
   // share the same load segment, difference between their file offsets should
   // be equal to difference between their virtual addresses. To compute some
   // section offset we use the following formula: Off = Off_first + VA -
   // VA_first, where Off_first and VA_first is file offset and VA of first
   // section in PT_LOAD.
   PhdrEntry *PtLoad = nullptr;
 
   // Pointer to a relocation section for this section. Usually nullptr because
   // we consume relocations, but if --emit-relocs is specified (which is rare),
   // it may have a non-null value.
   OutputSection *RelocationSection = nullptr;
 
   // Initially this field is the number of InputSections that have been added to
   // the OutputSection so far. Later on, after a call to assignAddresses, it
   // corresponds to the Elf_Shdr member.
   uint64_t Size = 0;
 
   // The following fields correspond to Elf_Shdr members.
   uint64_t Offset = 0;
-  uint64_t LMAOffset = 0;
   uint64_t Addr = 0;
   uint32_t ShName = 0;
 
   void addSection(InputSection *IS);
 
   // Location in the output buffer.
   uint8_t *Loc = nullptr;
 
   // The following members are normally only used in linker scripts.
   MemoryRegion *MemRegion = nullptr;
+  MemoryRegion *LMARegion = nullptr;
   Expr AddrExpr;
   Expr AlignExpr;
   Expr LMAExpr;
   Expr SubalignExpr;
   std::vector<BaseCommand *> SectionCommands;
   std::vector<StringRef> Phdrs;
   llvm::Optional<uint32_t> Filler;
   ConstraintKind Constraint = ConstraintKind::NoConstraint;
   std::string Location;
   std::string MemoryRegionName;
   std::string LMARegionName;
   bool Noload = false;
 
   template <class ELFT> void finalize();
   template <class ELFT> void writeTo(uint8_t *Buf);
   template <class ELFT> void maybeCompress();
 
   void sort(std::function<int(InputSectionBase *S)> Order);
   void sortInitFini();
   void sortCtorsDtors();
 
 private:
   // Used for implementation of --compress-debug-sections option.
   std::vector<uint8_t> ZDebugHeader;
   llvm::SmallVector<char, 1> CompressedData;
 
   uint32_t getFiller();
 };
 
 int getPriority(StringRef S);
 
 // All output sections that are handled by the linker specially are
 // globally accessible. Writer initializes them, so don't use them
 // until Writer is initialized.
 struct Out {
   static uint8_t First;
   static OutputSection *Opd;
   static uint8_t *OpdBuf;
   static PhdrEntry *TlsPhdr;
   static OutputSection *DebugInfo;
   static OutputSection *ElfHeader;
   static OutputSection *ProgramHeaders;
   static OutputSection *PreinitArray;
   static OutputSection *InitArray;
   static OutputSection *FiniArray;
 };
 
 } // namespace elf
 } // namespace lld
 
 namespace lld {
 namespace elf {
 
 uint64_t getHeaderSize();
 void sortByOrder(llvm::MutableArrayRef<InputSection *> In,
                  std::function<int(InputSectionBase *S)> Order);
 
 extern std::vector<OutputSection *> OutputSections;
 } // namespace elf
 } // namespace lld
 
 #endif
Index: vendor/lld/dist-release_60/ELF/ScriptParser.cpp
===================================================================
--- vendor/lld/dist-release_60/ELF/ScriptParser.cpp	(revision 328744)
+++ vendor/lld/dist-release_60/ELF/ScriptParser.cpp	(revision 328745)
@@ -1,1345 +1,1345 @@
 //===- ScriptParser.cpp ---------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains a recursive-descendent parser for linker scripts.
 // Parsed results are stored to Config and Script global objects.
 //
 //===----------------------------------------------------------------------===//
 
 #include "ScriptParser.h"
 #include "Config.h"
 #include "Driver.h"
 #include "InputSection.h"
 #include "LinkerScript.h"
 #include "OutputSections.h"
 #include "ScriptLexer.h"
 #include "Symbols.h"
 #include "Target.h"
 #include "lld/Common/Memory.h"
 #include "llvm/ADT/SmallString.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/StringSet.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/BinaryFormat/ELF.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/FileSystem.h"
 #include "llvm/Support/Path.h"
 #include <cassert>
 #include <limits>
 #include <vector>
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::support::endian;
 using namespace lld;
 using namespace lld::elf;
 
 static bool isUnderSysroot(StringRef Path);
 
 namespace {
 class ScriptParser final : ScriptLexer {
 public:
   ScriptParser(MemoryBufferRef MB)
       : ScriptLexer(MB),
         IsUnderSysroot(isUnderSysroot(MB.getBufferIdentifier())) {}
 
   void readLinkerScript();
   void readVersionScript();
   void readDynamicList();
   void readDefsym(StringRef Name);
 
 private:
   void addFile(StringRef Path);
 
   void readAsNeeded();
   void readEntry();
   void readExtern();
   void readGroup();
   void readInclude();
   void readMemory();
   void readOutput();
   void readOutputArch();
   void readOutputFormat();
   void readPhdrs();
   void readRegionAlias();
   void readSearchDir();
   void readSections();
   void readVersion();
   void readVersionScriptCommand();
 
   SymbolAssignment *readAssignment(StringRef Name);
   ByteCommand *readByteCommand(StringRef Tok);
   uint32_t readFill();
   uint32_t parseFill(StringRef Tok);
   void readSectionAddressType(OutputSection *Cmd);
   OutputSection *readOutputSectionDescription(StringRef OutSec);
   std::vector<StringRef> readOutputSectionPhdrs();
   InputSectionDescription *readInputSectionDescription(StringRef Tok);
   StringMatcher readFilePatterns();
   std::vector<SectionPattern> readInputSectionsList();
   InputSectionDescription *readInputSectionRules(StringRef FilePattern);
   unsigned readPhdrType();
   SortSectionPolicy readSortKind();
   SymbolAssignment *readProvideHidden(bool Provide, bool Hidden);
   SymbolAssignment *readProvideOrAssignment(StringRef Tok);
   void readSort();
   AssertCommand *readAssert();
   Expr readAssertExpr();
   Expr readConstant();
   Expr getPageSize();
 
   uint64_t readMemoryAssignment(StringRef, StringRef, StringRef);
   std::pair<uint32_t, uint32_t> readMemoryAttributes();
 
   Expr readExpr();
   Expr readExpr1(Expr Lhs, int MinPrec);
   StringRef readParenLiteral();
   Expr readPrimary();
   Expr readTernary(Expr Cond);
   Expr readParenExpr();
 
   // For parsing version script.
   std::vector<SymbolVersion> readVersionExtern();
   void readAnonymousDeclaration();
   void readVersionDeclaration(StringRef VerStr);
 
   std::pair<std::vector<SymbolVersion>, std::vector<SymbolVersion>>
   readSymbols();
 
   // True if a script being read is in a subdirectory specified by -sysroot.
   bool IsUnderSysroot;
 
   // A set to detect an INCLUDE() cycle.
   StringSet<> Seen;
 };
 } // namespace
 
 static StringRef unquote(StringRef S) {
   if (S.startswith("\""))
     return S.substr(1, S.size() - 2);
   return S;
 }
 
 static bool isUnderSysroot(StringRef Path) {
   if (Config->Sysroot == "")
     return false;
   for (; !Path.empty(); Path = sys::path::parent_path(Path))
     if (sys::fs::equivalent(Config->Sysroot, Path))
       return true;
   return false;
 }
 
 // Some operations only support one non absolute value. Move the
 // absolute one to the right hand side for convenience.
 static void moveAbsRight(ExprValue &A, ExprValue &B) {
   if (A.Sec == nullptr || (A.ForceAbsolute && !B.isAbsolute()))
     std::swap(A, B);
   if (!B.isAbsolute())
     error(A.Loc + ": at least one side of the expression must be absolute");
 }
 
 static ExprValue add(ExprValue A, ExprValue B) {
   moveAbsRight(A, B);
   return {A.Sec, A.ForceAbsolute, A.getSectionOffset() + B.getValue(), A.Loc};
 }
 
 static ExprValue sub(ExprValue A, ExprValue B) {
   // The distance between two symbols in sections is absolute.
   if (!A.isAbsolute() && !B.isAbsolute())
     return A.getValue() - B.getValue();
   return {A.Sec, false, A.getSectionOffset() - B.getValue(), A.Loc};
 }
 
 static ExprValue mul(ExprValue A, ExprValue B) {
   return A.getValue() * B.getValue();
 }
 
 static ExprValue div(ExprValue A, ExprValue B) {
   if (uint64_t BV = B.getValue())
     return A.getValue() / BV;
   error("division by zero");
   return 0;
 }
 
 static ExprValue bitAnd(ExprValue A, ExprValue B) {
   moveAbsRight(A, B);
   return {A.Sec, A.ForceAbsolute,
           (A.getValue() & B.getValue()) - A.getSecAddr(), A.Loc};
 }
 
 static ExprValue bitOr(ExprValue A, ExprValue B) {
   moveAbsRight(A, B);
   return {A.Sec, A.ForceAbsolute,
           (A.getValue() | B.getValue()) - A.getSecAddr(), A.Loc};
 }
 
 void ScriptParser::readDynamicList() {
   Config->HasDynamicList = true;
   expect("{");
   std::vector<SymbolVersion> Locals;
   std::vector<SymbolVersion> Globals;
   std::tie(Locals, Globals) = readSymbols();
   expect(";");
 
   if (!atEOF()) {
     setError("EOF expected, but got " + next());
     return;
   }
   if (!Locals.empty()) {
     setError("\"local:\" scope not supported in --dynamic-list");
     return;
   }
 
   for (SymbolVersion V : Globals)
     Config->DynamicList.push_back(V);
 }
 
 void ScriptParser::readVersionScript() {
   readVersionScriptCommand();
   if (!atEOF())
     setError("EOF expected, but got " + next());
 }
 
 void ScriptParser::readVersionScriptCommand() {
   if (consume("{")) {
     readAnonymousDeclaration();
     return;
   }
 
   while (!atEOF() && !errorCount() && peek() != "}") {
     StringRef VerStr = next();
     if (VerStr == "{") {
       setError("anonymous version definition is used in "
                "combination with other version definitions");
       return;
     }
     expect("{");
     readVersionDeclaration(VerStr);
   }
 }
 
 void ScriptParser::readVersion() {
   expect("{");
   readVersionScriptCommand();
   expect("}");
 }
 
 void ScriptParser::readLinkerScript() {
   while (!atEOF()) {
     StringRef Tok = next();
     if (Tok == ";")
       continue;
 
     if (Tok == "ASSERT") {
       Script->SectionCommands.push_back(readAssert());
     } else if (Tok == "ENTRY") {
       readEntry();
     } else if (Tok == "EXTERN") {
       readExtern();
     } else if (Tok == "GROUP" || Tok == "INPUT") {
       readGroup();
     } else if (Tok == "INCLUDE") {
       readInclude();
     } else if (Tok == "MEMORY") {
       readMemory();
     } else if (Tok == "OUTPUT") {
       readOutput();
     } else if (Tok == "OUTPUT_ARCH") {
       readOutputArch();
     } else if (Tok == "OUTPUT_FORMAT") {
       readOutputFormat();
     } else if (Tok == "PHDRS") {
       readPhdrs();
     } else if (Tok == "REGION_ALIAS") {
       readRegionAlias();
     } else if (Tok == "SEARCH_DIR") {
       readSearchDir();
     } else if (Tok == "SECTIONS") {
       readSections();
     } else if (Tok == "VERSION") {
       readVersion();
     } else if (SymbolAssignment *Cmd = readProvideOrAssignment(Tok)) {
       Script->SectionCommands.push_back(Cmd);
     } else {
       setError("unknown directive: " + Tok);
     }
   }
 }
 
 void ScriptParser::readDefsym(StringRef Name) {
   Expr E = readExpr();
   if (!atEOF())
     setError("EOF expected, but got " + next());
   SymbolAssignment *Cmd = make<SymbolAssignment>(Name, E, getCurrentLocation());
   Script->SectionCommands.push_back(Cmd);
 }
 
 void ScriptParser::addFile(StringRef S) {
   if (IsUnderSysroot && S.startswith("/")) {
     SmallString<128> PathData;
     StringRef Path = (Config->Sysroot + S).toStringRef(PathData);
     if (sys::fs::exists(Path)) {
       Driver->addFile(Saver.save(Path), /*WithLOption=*/false);
       return;
     }
   }
 
   if (S.startswith("/")) {
     Driver->addFile(S, /*WithLOption=*/false);
   } else if (S.startswith("=")) {
     if (Config->Sysroot.empty())
       Driver->addFile(S.substr(1), /*WithLOption=*/false);
     else
       Driver->addFile(Saver.save(Config->Sysroot + "/" + S.substr(1)),
                       /*WithLOption=*/false);
   } else if (S.startswith("-l")) {
     Driver->addLibrary(S.substr(2));
   } else if (sys::fs::exists(S)) {
     Driver->addFile(S, /*WithLOption=*/false);
   } else {
     if (Optional<std::string> Path = findFromSearchPaths(S))
       Driver->addFile(Saver.save(*Path), /*WithLOption=*/true);
     else
       setError("unable to find " + S);
   }
 }
 
 void ScriptParser::readAsNeeded() {
   expect("(");
   bool Orig = Config->AsNeeded;
   Config->AsNeeded = true;
   while (!errorCount() && !consume(")"))
     addFile(unquote(next()));
   Config->AsNeeded = Orig;
 }
 
 void ScriptParser::readEntry() {
   // -e <symbol> takes predecence over ENTRY(<symbol>).
   expect("(");
   StringRef Tok = next();
   if (Config->Entry.empty())
     Config->Entry = Tok;
   expect(")");
 }
 
 void ScriptParser::readExtern() {
   expect("(");
   while (!errorCount() && !consume(")"))
     Config->Undefined.push_back(next());
 }
 
 void ScriptParser::readGroup() {
   expect("(");
   while (!errorCount() && !consume(")")) {
     if (consume("AS_NEEDED"))
       readAsNeeded();
     else
       addFile(unquote(next()));
   }
 }
 
 void ScriptParser::readInclude() {
   StringRef Tok = unquote(next());
 
   if (!Seen.insert(Tok).second) {
     setError("there is a cycle in linker script INCLUDEs");
     return;
   }
 
   if (Optional<std::string> Path = searchLinkerScript(Tok)) {
     if (Optional<MemoryBufferRef> MB = readFile(*Path))
       tokenize(*MB);
     return;
   }
   setError("cannot find linker script " + Tok);
 }
 
 void ScriptParser::readOutput() {
   // -o <file> takes predecence over OUTPUT(<file>).
   expect("(");
   StringRef Tok = next();
   if (Config->OutputFile.empty())
     Config->OutputFile = unquote(Tok);
   expect(")");
 }
 
 void ScriptParser::readOutputArch() {
   // OUTPUT_ARCH is ignored for now.
   expect("(");
   while (!errorCount() && !consume(")"))
     skip();
 }
 
 void ScriptParser::readOutputFormat() {
   // Error checking only for now.
   expect("(");
   skip();
   if (consume(")"))
     return;
   expect(",");
   skip();
   expect(",");
   skip();
   expect(")");
 }
 
 void ScriptParser::readPhdrs() {
   expect("{");
 
   while (!errorCount() && !consume("}")) {
     PhdrsCommand Cmd;
     Cmd.Name = next();
     Cmd.Type = readPhdrType();
 
     while (!errorCount() && !consume(";")) {
       if (consume("FILEHDR"))
         Cmd.HasFilehdr = true;
       else if (consume("PHDRS"))
         Cmd.HasPhdrs = true;
       else if (consume("AT"))
         Cmd.LMAExpr = readParenExpr();
       else if (consume("FLAGS"))
         Cmd.Flags = readParenExpr()().getValue();
       else
         setError("unexpected header attribute: " + next());
     }
 
     Script->PhdrsCommands.push_back(Cmd);
   }
 }
 
 void ScriptParser::readRegionAlias() {
   expect("(");
   StringRef Alias = unquote(next());
   expect(",");
   StringRef Name = next();
   expect(")");
 
   if (Script->MemoryRegions.count(Alias))
     setError("redefinition of memory region '" + Alias + "'");
   if (!Script->MemoryRegions.count(Name))
     setError("memory region '" + Name + "' is not defined");
   Script->MemoryRegions.insert({Alias, Script->MemoryRegions[Name]});
 }
 
 void ScriptParser::readSearchDir() {
   expect("(");
   StringRef Tok = next();
   if (!Config->Nostdlib)
     Config->SearchPaths.push_back(unquote(Tok));
   expect(")");
 }
 
 void ScriptParser::readSections() {
   Script->HasSectionsCommand = true;
 
   // -no-rosegment is used to avoid placing read only non-executable sections in
   // their own segment. We do the same if SECTIONS command is present in linker
   // script. See comment for computeFlags().
   Config->SingleRoRx = true;
 
   expect("{");
   while (!errorCount() && !consume("}")) {
     StringRef Tok = next();
     BaseCommand *Cmd = readProvideOrAssignment(Tok);
     if (!Cmd) {
       if (Tok == "ASSERT")
         Cmd = readAssert();
       else
         Cmd = readOutputSectionDescription(Tok);
     }
     Script->SectionCommands.push_back(Cmd);
   }
 }
 
 static int precedence(StringRef Op) {
   return StringSwitch<int>(Op)
       .Cases("*", "/", 5)
       .Cases("+", "-", 4)
       .Cases("<<", ">>", 3)
       .Cases("<", "<=", ">", ">=", "==", "!=", 2)
       .Cases("&", "|", 1)
       .Default(-1);
 }
 
 StringMatcher ScriptParser::readFilePatterns() {
   std::vector<StringRef> V;
   while (!errorCount() && !consume(")"))
     V.push_back(next());
   return StringMatcher(V);
 }
 
 SortSectionPolicy ScriptParser::readSortKind() {
   if (consume("SORT") || consume("SORT_BY_NAME"))
     return SortSectionPolicy::Name;
   if (consume("SORT_BY_ALIGNMENT"))
     return SortSectionPolicy::Alignment;
   if (consume("SORT_BY_INIT_PRIORITY"))
     return SortSectionPolicy::Priority;
   if (consume("SORT_NONE"))
     return SortSectionPolicy::None;
   return SortSectionPolicy::Default;
 }
 
 // Reads SECTIONS command contents in the following form:
 //
 // <contents> ::= <elem>*
 // <elem>     ::= <exclude>? <glob-pattern>
 // <exclude>  ::= "EXCLUDE_FILE" "(" <glob-pattern>+ ")"
 //
 // For example,
 //
 // *(.foo EXCLUDE_FILE (a.o) .bar EXCLUDE_FILE (b.o) .baz)
 //
 // is parsed as ".foo", ".bar" with "a.o", and ".baz" with "b.o".
 // The semantics of that is section .foo in any file, section .bar in
 // any file but a.o, and section .baz in any file but b.o.
 std::vector<SectionPattern> ScriptParser::readInputSectionsList() {
   std::vector<SectionPattern> Ret;
   while (!errorCount() && peek() != ")") {
     StringMatcher ExcludeFilePat;
     if (consume("EXCLUDE_FILE")) {
       expect("(");
       ExcludeFilePat = readFilePatterns();
     }
 
     std::vector<StringRef> V;
     while (!errorCount() && peek() != ")" && peek() != "EXCLUDE_FILE")
       V.push_back(next());
 
     if (!V.empty())
       Ret.push_back({std::move(ExcludeFilePat), StringMatcher(V)});
     else
       setError("section pattern is expected");
   }
   return Ret;
 }
 
 // Reads contents of "SECTIONS" directive. That directive contains a
 // list of glob patterns for input sections. The grammar is as follows.
 //
 // <patterns> ::= <section-list>
 //              | <sort> "(" <section-list> ")"
 //              | <sort> "(" <sort> "(" <section-list> ")" ")"
 //
 // <sort>     ::= "SORT" | "SORT_BY_NAME" | "SORT_BY_ALIGNMENT"
 //              | "SORT_BY_INIT_PRIORITY" | "SORT_NONE"
 //
 // <section-list> is parsed by readInputSectionsList().
 InputSectionDescription *
 ScriptParser::readInputSectionRules(StringRef FilePattern) {
   auto *Cmd = make<InputSectionDescription>(FilePattern);
   expect("(");
 
   while (!errorCount() && !consume(")")) {
     SortSectionPolicy Outer = readSortKind();
     SortSectionPolicy Inner = SortSectionPolicy::Default;
     std::vector<SectionPattern> V;
     if (Outer != SortSectionPolicy::Default) {
       expect("(");
       Inner = readSortKind();
       if (Inner != SortSectionPolicy::Default) {
         expect("(");
         V = readInputSectionsList();
         expect(")");
       } else {
         V = readInputSectionsList();
       }
       expect(")");
     } else {
       V = readInputSectionsList();
     }
 
     for (SectionPattern &Pat : V) {
       Pat.SortInner = Inner;
       Pat.SortOuter = Outer;
     }
 
     std::move(V.begin(), V.end(), std::back_inserter(Cmd->SectionPatterns));
   }
   return Cmd;
 }
 
 InputSectionDescription *
 ScriptParser::readInputSectionDescription(StringRef Tok) {
   // Input section wildcard can be surrounded by KEEP.
   // https://sourceware.org/binutils/docs/ld/Input-Section-Keep.html#Input-Section-Keep
   if (Tok == "KEEP") {
     expect("(");
     StringRef FilePattern = next();
     InputSectionDescription *Cmd = readInputSectionRules(FilePattern);
     expect(")");
     Script->KeptSections.push_back(Cmd);
     return Cmd;
   }
   return readInputSectionRules(Tok);
 }
 
 void ScriptParser::readSort() {
   expect("(");
   expect("CONSTRUCTORS");
   expect(")");
 }
 
 AssertCommand *ScriptParser::readAssert() {
   return make<AssertCommand>(readAssertExpr());
 }
 
 Expr ScriptParser::readAssertExpr() {
   expect("(");
   Expr E = readExpr();
   expect(",");
   StringRef Msg = unquote(next());
   expect(")");
 
   return [=] {
     if (!E().getValue())
       error(Msg);
     return Script->getDot();
   };
 }
 
 // Reads a FILL(expr) command. We handle the FILL command as an
 // alias for =fillexp section attribute, which is different from
 // what GNU linkers do.
 // https://sourceware.org/binutils/docs/ld/Output-Section-Data.html
 uint32_t ScriptParser::readFill() {
   expect("(");
   uint32_t V = parseFill(next());
   expect(")");
   return V;
 }
 
 // Reads an expression and/or the special directive "(NOLOAD)" for an
 // output section definition.
 //
 // An output section name can be followed by an address expression
 // and/or by "(NOLOAD)". This grammar is not LL(1) because "(" can be
 // interpreted as either the beginning of some expression or "(NOLOAD)".
 //
 // https://sourceware.org/binutils/docs/ld/Output-Section-Address.html
 // https://sourceware.org/binutils/docs/ld/Output-Section-Type.html
 void ScriptParser::readSectionAddressType(OutputSection *Cmd) {
   if (consume("(")) {
     if (consume("NOLOAD")) {
       expect(")");
       Cmd->Noload = true;
       return;
     }
     Cmd->AddrExpr = readExpr();
     expect(")");
   } else {
     Cmd->AddrExpr = readExpr();
   }
 
   if (consume("(")) {
     expect("NOLOAD");
     expect(")");
     Cmd->Noload = true;
   }
 }
 
 static Expr checkAlignment(Expr E, std::string &Loc) {
   return [=] {
     uint64_t Alignment = std::max((uint64_t)1, E().getValue());
     if (!isPowerOf2_64(Alignment)) {
       error(Loc + ": alignment must be power of 2");
       return (uint64_t)1; // Return a dummy value.
     }
     return Alignment;
   };
 }
 
 OutputSection *ScriptParser::readOutputSectionDescription(StringRef OutSec) {
   OutputSection *Cmd =
       Script->createOutputSection(OutSec, getCurrentLocation());
 
   if (peek() != ":")
     readSectionAddressType(Cmd);
   expect(":");
 
   std::string Location = getCurrentLocation();
   if (consume("AT"))
     Cmd->LMAExpr = readParenExpr();
   if (consume("ALIGN"))
     Cmd->AlignExpr = checkAlignment(readParenExpr(), Location);
   if (consume("SUBALIGN"))
     Cmd->SubalignExpr = checkAlignment(readParenExpr(), Location);
 
   // Parse constraints.
   if (consume("ONLY_IF_RO"))
     Cmd->Constraint = ConstraintKind::ReadOnly;
   if (consume("ONLY_IF_RW"))
     Cmd->Constraint = ConstraintKind::ReadWrite;
   expect("{");
 
   while (!errorCount() && !consume("}")) {
     StringRef Tok = next();
     if (Tok == ";") {
       // Empty commands are allowed. Do nothing here.
     } else if (SymbolAssignment *Assign = readProvideOrAssignment(Tok)) {
       Cmd->SectionCommands.push_back(Assign);
     } else if (ByteCommand *Data = readByteCommand(Tok)) {
       Cmd->SectionCommands.push_back(Data);
     } else if (Tok == "ASSERT") {
       Cmd->SectionCommands.push_back(readAssert());
       expect(";");
     } else if (Tok == "CONSTRUCTORS") {
       // CONSTRUCTORS is a keyword to make the linker recognize C++ ctors/dtors
       // by name. This is for very old file formats such as ECOFF/XCOFF.
       // For ELF, we should ignore.
     } else if (Tok == "FILL") {
       Cmd->Filler = readFill();
     } else if (Tok == "SORT") {
       readSort();
     } else if (peek() == "(") {
       Cmd->SectionCommands.push_back(readInputSectionDescription(Tok));
     } else {
       setError("unknown command " + Tok);
     }
   }
 
   if (consume(">"))
     Cmd->MemoryRegionName = next();
 
   if (consume("AT")) {
     expect(">");
     Cmd->LMARegionName = next();
   }
 
   if (Cmd->LMAExpr && !Cmd->LMARegionName.empty())
     error("section can't have both LMA and a load region");
 
   Cmd->Phdrs = readOutputSectionPhdrs();
 
   if (consume("="))
     Cmd->Filler = parseFill(next());
   else if (peek().startswith("="))
     Cmd->Filler = parseFill(next().drop_front());
 
   // Consume optional comma following output section command.
   consume(",");
 
   return Cmd;
 }
 
 // Parses a given string as a octal/decimal/hexadecimal number and
 // returns it as a big-endian number. Used for `=<fillexp>`.
 // https://sourceware.org/binutils/docs/ld/Output-Section-Fill.html
 //
 // When reading a hexstring, ld.bfd handles it as a blob of arbitrary
 // size, while ld.gold always handles it as a 32-bit big-endian number.
 // We are compatible with ld.gold because it's easier to implement.
 uint32_t ScriptParser::parseFill(StringRef Tok) {
   uint32_t V = 0;
   if (!to_integer(Tok, V))
     setError("invalid filler expression: " + Tok);
 
   uint32_t Buf;
   write32be(&Buf, V);
   return Buf;
 }
 
 SymbolAssignment *ScriptParser::readProvideHidden(bool Provide, bool Hidden) {
   expect("(");
   SymbolAssignment *Cmd = readAssignment(next());
   Cmd->Provide = Provide;
   Cmd->Hidden = Hidden;
   expect(")");
   expect(";");
   return Cmd;
 }
 
 SymbolAssignment *ScriptParser::readProvideOrAssignment(StringRef Tok) {
   SymbolAssignment *Cmd = nullptr;
   if (peek() == "=" || peek() == "+=") {
     Cmd = readAssignment(Tok);
     expect(";");
   } else if (Tok == "PROVIDE") {
     Cmd = readProvideHidden(true, false);
   } else if (Tok == "HIDDEN") {
     Cmd = readProvideHidden(false, true);
   } else if (Tok == "PROVIDE_HIDDEN") {
     Cmd = readProvideHidden(true, true);
   }
   return Cmd;
 }
 
 SymbolAssignment *ScriptParser::readAssignment(StringRef Name) {
   StringRef Op = next();
   assert(Op == "=" || Op == "+=");
   Expr E = readExpr();
   if (Op == "+=") {
     std::string Loc = getCurrentLocation();
     E = [=] { return add(Script->getSymbolValue(Name, Loc), E()); };
   }
   return make<SymbolAssignment>(Name, E, getCurrentLocation());
 }
 
 // This is an operator-precedence parser to parse a linker
 // script expression.
 Expr ScriptParser::readExpr() {
   // Our lexer is context-aware. Set the in-expression bit so that
   // they apply different tokenization rules.
   bool Orig = InExpr;
   InExpr = true;
   Expr E = readExpr1(readPrimary(), 0);
   InExpr = Orig;
   return E;
 }
 
 static Expr combine(StringRef Op, Expr L, Expr R) {
   if (Op == "+")
     return [=] { return add(L(), R()); };
   if (Op == "-")
     return [=] { return sub(L(), R()); };
   if (Op == "*")
     return [=] { return mul(L(), R()); };
   if (Op == "/")
     return [=] { return div(L(), R()); };
   if (Op == "<<")
     return [=] { return L().getValue() << R().getValue(); };
   if (Op == ">>")
     return [=] { return L().getValue() >> R().getValue(); };
   if (Op == "<")
     return [=] { return L().getValue() < R().getValue(); };
   if (Op == ">")
     return [=] { return L().getValue() > R().getValue(); };
   if (Op == ">=")
     return [=] { return L().getValue() >= R().getValue(); };
   if (Op == "<=")
     return [=] { return L().getValue() <= R().getValue(); };
   if (Op == "==")
     return [=] { return L().getValue() == R().getValue(); };
   if (Op == "!=")
     return [=] { return L().getValue() != R().getValue(); };
   if (Op == "&")
     return [=] { return bitAnd(L(), R()); };
   if (Op == "|")
     return [=] { return bitOr(L(), R()); };
   llvm_unreachable("invalid operator");
 }
 
 // This is a part of the operator-precedence parser. This function
 // assumes that the remaining token stream starts with an operator.
 Expr ScriptParser::readExpr1(Expr Lhs, int MinPrec) {
   while (!atEOF() && !errorCount()) {
     // Read an operator and an expression.
     if (consume("?"))
       return readTernary(Lhs);
     StringRef Op1 = peek();
     if (precedence(Op1) < MinPrec)
       break;
     skip();
     Expr Rhs = readPrimary();
 
     // Evaluate the remaining part of the expression first if the
     // next operator has greater precedence than the previous one.
     // For example, if we have read "+" and "3", and if the next
     // operator is "*", then we'll evaluate 3 * ... part first.
     while (!atEOF()) {
       StringRef Op2 = peek();
       if (precedence(Op2) <= precedence(Op1))
         break;
       Rhs = readExpr1(Rhs, precedence(Op2));
     }
 
     Lhs = combine(Op1, Lhs, Rhs);
   }
   return Lhs;
 }
 
 Expr ScriptParser::getPageSize() {
   std::string Location = getCurrentLocation();
   return [=]() -> uint64_t {
     if (Target)
       return Target->PageSize;
     error(Location + ": unable to calculate page size");
     return 4096; // Return a dummy value.
   };
 }
 
 Expr ScriptParser::readConstant() {
   StringRef S = readParenLiteral();
   if (S == "COMMONPAGESIZE")
     return getPageSize();
   if (S == "MAXPAGESIZE")
     return [] { return Config->MaxPageSize; };
   setError("unknown constant: " + S);
   return {};
 }
 
 // Parses Tok as an integer. It recognizes hexadecimal (prefixed with
 // "0x" or suffixed with "H") and decimal numbers. Decimal numbers may
 // have "K" (Ki) or "M" (Mi) suffixes.
 static Optional<uint64_t> parseInt(StringRef Tok) {
   // Negative number
   if (Tok.startswith("-")) {
     if (Optional<uint64_t> Val = parseInt(Tok.substr(1)))
       return -*Val;
     return None;
   }
 
   // Hexadecimal
   uint64_t Val;
   if (Tok.startswith_lower("0x")) {
     if (!to_integer(Tok.substr(2), Val, 16))
       return None;
     return Val;
   }
   if (Tok.endswith_lower("H")) {
     if (!to_integer(Tok.drop_back(), Val, 16))
       return None;
     return Val;
   }
 
   // Decimal
   if (Tok.endswith_lower("K")) {
     if (!to_integer(Tok.drop_back(), Val, 10))
       return None;
     return Val * 1024;
   }
   if (Tok.endswith_lower("M")) {
     if (!to_integer(Tok.drop_back(), Val, 10))
       return None;
     return Val * 1024 * 1024;
   }
   if (!to_integer(Tok, Val, 10))
     return None;
   return Val;
 }
 
 ByteCommand *ScriptParser::readByteCommand(StringRef Tok) {
   int Size = StringSwitch<int>(Tok)
                  .Case("BYTE", 1)
                  .Case("SHORT", 2)
                  .Case("LONG", 4)
                  .Case("QUAD", 8)
                  .Default(-1);
   if (Size == -1)
     return nullptr;
   return make<ByteCommand>(readParenExpr(), Size);
 }
 
 StringRef ScriptParser::readParenLiteral() {
   expect("(");
   bool Orig = InExpr;
   InExpr = false;
   StringRef Tok = next();
   InExpr = Orig;
   expect(")");
   return Tok;
 }
 
 static void checkIfExists(OutputSection *Cmd, StringRef Location) {
   if (Cmd->Location.empty() && Script->ErrorOnMissingSection)
     error(Location + ": undefined section " + Cmd->Name);
 }
 
 Expr ScriptParser::readPrimary() {
   if (peek() == "(")
     return readParenExpr();
 
   if (consume("~")) {
     Expr E = readPrimary();
     return [=] { return ~E().getValue(); };
   }
   if (consume("!")) {
     Expr E = readPrimary();
     return [=] { return !E().getValue(); };
   }
   if (consume("-")) {
     Expr E = readPrimary();
     return [=] { return -E().getValue(); };
   }
 
   StringRef Tok = next();
   std::string Location = getCurrentLocation();
 
   // Built-in functions are parsed here.
   // https://sourceware.org/binutils/docs/ld/Builtin-Functions.html.
   if (Tok == "ABSOLUTE") {
     Expr Inner = readParenExpr();
     return [=] {
       ExprValue I = Inner();
       I.ForceAbsolute = true;
       return I;
     };
   }
   if (Tok == "ADDR") {
     StringRef Name = readParenLiteral();
     OutputSection *Sec = Script->getOrCreateOutputSection(Name);
     return [=]() -> ExprValue {
       checkIfExists(Sec, Location);
       return {Sec, false, 0, Location};
     };
   }
   if (Tok == "ALIGN") {
     expect("(");
     Expr E = readExpr();
     if (consume(")")) {
       E = checkAlignment(E, Location);
       return [=] { return alignTo(Script->getDot(), E().getValue()); };
     }
     expect(",");
     Expr E2 = checkAlignment(readExpr(), Location);
     expect(")");
     return [=] {
       ExprValue V = E();
       V.Alignment = E2().getValue();
       return V;
     };
   }
   if (Tok == "ALIGNOF") {
     StringRef Name = readParenLiteral();
     OutputSection *Cmd = Script->getOrCreateOutputSection(Name);
     return [=] {
       checkIfExists(Cmd, Location);
       return Cmd->Alignment;
     };
   }
   if (Tok == "ASSERT")
     return readAssertExpr();
   if (Tok == "CONSTANT")
     return readConstant();
   if (Tok == "DATA_SEGMENT_ALIGN") {
     expect("(");
     Expr E = readExpr();
     expect(",");
     readExpr();
     expect(")");
     return [=] {
       return alignTo(Script->getDot(), std::max((uint64_t)1, E().getValue()));
     };
   }
   if (Tok == "DATA_SEGMENT_END") {
     expect("(");
     expect(".");
     expect(")");
     return [] { return Script->getDot(); };
   }
   if (Tok == "DATA_SEGMENT_RELRO_END") {
     // GNU linkers implements more complicated logic to handle
     // DATA_SEGMENT_RELRO_END. We instead ignore the arguments and
     // just align to the next page boundary for simplicity.
     expect("(");
     readExpr();
     expect(",");
     readExpr();
     expect(")");
     Expr E = getPageSize();
     return [=] { return alignTo(Script->getDot(), E().getValue()); };
   }
   if (Tok == "DEFINED") {
     StringRef Name = readParenLiteral();
     return [=] { return Symtab->find(Name) ? 1 : 0; };
   }
   if (Tok == "LENGTH") {
     StringRef Name = readParenLiteral();
     if (Script->MemoryRegions.count(Name) == 0)
       setError("memory region not defined: " + Name);
     return [=] { return Script->MemoryRegions[Name]->Length; };
   }
   if (Tok == "LOADADDR") {
     StringRef Name = readParenLiteral();
     OutputSection *Cmd = Script->getOrCreateOutputSection(Name);
     return [=] {
       checkIfExists(Cmd, Location);
       return Cmd->getLMA();
     };
   }
   if (Tok == "ORIGIN") {
     StringRef Name = readParenLiteral();
     if (Script->MemoryRegions.count(Name) == 0)
       setError("memory region not defined: " + Name);
     return [=] { return Script->MemoryRegions[Name]->Origin; };
   }
   if (Tok == "SEGMENT_START") {
     expect("(");
     skip();
     expect(",");
     Expr E = readExpr();
     expect(")");
     return [=] { return E(); };
   }
   if (Tok == "SIZEOF") {
     StringRef Name = readParenLiteral();
     OutputSection *Cmd = Script->getOrCreateOutputSection(Name);
     // Linker script does not create an output section if its content is empty.
     // We want to allow SIZEOF(.foo) where .foo is a section which happened to
     // be empty.
     return [=] { return Cmd->Size; };
   }
   if (Tok == "SIZEOF_HEADERS")
     return [=] { return elf::getHeaderSize(); };
 
   // Tok is the dot.
   if (Tok == ".")
     return [=] { return Script->getSymbolValue(Tok, Location); };
 
   // Tok is a literal number.
   if (Optional<uint64_t> Val = parseInt(Tok))
     return [=] { return *Val; };
 
   // Tok is a symbol name.
   if (!isValidCIdentifier(Tok))
     setError("malformed number: " + Tok);
   Script->ReferencedSymbols.push_back(Tok);
   return [=] { return Script->getSymbolValue(Tok, Location); };
 }
 
 Expr ScriptParser::readTernary(Expr Cond) {
   Expr L = readExpr();
   expect(":");
   Expr R = readExpr();
   return [=] { return Cond().getValue() ? L() : R(); };
 }
 
 Expr ScriptParser::readParenExpr() {
   expect("(");
   Expr E = readExpr();
   expect(")");
   return E;
 }
 
 std::vector<StringRef> ScriptParser::readOutputSectionPhdrs() {
   std::vector<StringRef> Phdrs;
   while (!errorCount() && peek().startswith(":")) {
     StringRef Tok = next();
     Phdrs.push_back((Tok.size() == 1) ? next() : Tok.substr(1));
   }
   return Phdrs;
 }
 
 // Read a program header type name. The next token must be a
 // name of a program header type or a constant (e.g. "0x3").
 unsigned ScriptParser::readPhdrType() {
   StringRef Tok = next();
   if (Optional<uint64_t> Val = parseInt(Tok))
     return *Val;
 
   unsigned Ret = StringSwitch<unsigned>(Tok)
                      .Case("PT_NULL", PT_NULL)
                      .Case("PT_LOAD", PT_LOAD)
                      .Case("PT_DYNAMIC", PT_DYNAMIC)
                      .Case("PT_INTERP", PT_INTERP)
                      .Case("PT_NOTE", PT_NOTE)
                      .Case("PT_SHLIB", PT_SHLIB)
                      .Case("PT_PHDR", PT_PHDR)
                      .Case("PT_TLS", PT_TLS)
                      .Case("PT_GNU_EH_FRAME", PT_GNU_EH_FRAME)
                      .Case("PT_GNU_STACK", PT_GNU_STACK)
                      .Case("PT_GNU_RELRO", PT_GNU_RELRO)
                      .Case("PT_OPENBSD_RANDOMIZE", PT_OPENBSD_RANDOMIZE)
                      .Case("PT_OPENBSD_WXNEEDED", PT_OPENBSD_WXNEEDED)
                      .Case("PT_OPENBSD_BOOTDATA", PT_OPENBSD_BOOTDATA)
                      .Default(-1);
 
   if (Ret == (unsigned)-1) {
     setError("invalid program header type: " + Tok);
     return PT_NULL;
   }
   return Ret;
 }
 
 // Reads an anonymous version declaration.
 void ScriptParser::readAnonymousDeclaration() {
   std::vector<SymbolVersion> Locals;
   std::vector<SymbolVersion> Globals;
   std::tie(Locals, Globals) = readSymbols();
 
   for (SymbolVersion V : Locals) {
     if (V.Name == "*")
       Config->DefaultSymbolVersion = VER_NDX_LOCAL;
     else
       Config->VersionScriptLocals.push_back(V);
   }
 
   for (SymbolVersion V : Globals)
     Config->VersionScriptGlobals.push_back(V);
 
   expect(";");
 }
 
 // Reads a non-anonymous version definition,
 // e.g. "VerStr { global: foo; bar; local: *; };".
 void ScriptParser::readVersionDeclaration(StringRef VerStr) {
   // Read a symbol list.
   std::vector<SymbolVersion> Locals;
   std::vector<SymbolVersion> Globals;
   std::tie(Locals, Globals) = readSymbols();
 
   for (SymbolVersion V : Locals) {
     if (V.Name == "*")
       Config->DefaultSymbolVersion = VER_NDX_LOCAL;
     else
       Config->VersionScriptLocals.push_back(V);
   }
 
   // Create a new version definition and add that to the global symbols.
   VersionDefinition Ver;
   Ver.Name = VerStr;
   Ver.Globals = Globals;
 
   // User-defined version number starts from 2 because 0 and 1 are
   // reserved for VER_NDX_LOCAL and VER_NDX_GLOBAL, respectively.
   Ver.Id = Config->VersionDefinitions.size() + 2;
   Config->VersionDefinitions.push_back(Ver);
 
   // Each version may have a parent version. For example, "Ver2"
   // defined as "Ver2 { global: foo; local: *; } Ver1;" has "Ver1"
   // as a parent. This version hierarchy is, probably against your
   // instinct, purely for hint; the runtime doesn't care about it
   // at all. In LLD, we simply ignore it.
   if (peek() != ";")
     skip();
   expect(";");
 }
 
 static bool hasWildcard(StringRef S) {
   return S.find_first_of("?*[") != StringRef::npos;
 }
 
 // Reads a list of symbols, e.g. "{ global: foo; bar; local: *; };".
 std::pair<std::vector<SymbolVersion>, std::vector<SymbolVersion>>
 ScriptParser::readSymbols() {
   std::vector<SymbolVersion> Locals;
   std::vector<SymbolVersion> Globals;
   std::vector<SymbolVersion> *V = &Globals;
 
   while (!errorCount()) {
     if (consume("}"))
       break;
     if (consumeLabel("local")) {
       V = &Locals;
       continue;
     }
     if (consumeLabel("global")) {
       V = &Globals;
       continue;
     }
 
     if (consume("extern")) {
       std::vector<SymbolVersion> Ext = readVersionExtern();
       V->insert(V->end(), Ext.begin(), Ext.end());
     } else {
       StringRef Tok = next();
       V->push_back({unquote(Tok), false, hasWildcard(Tok)});
     }
     expect(";");
   }
   return {Locals, Globals};
 }
 
 // Reads an "extern C++" directive, e.g.,
 // "extern "C++" { ns::*; "f(int, double)"; };"
 std::vector<SymbolVersion> ScriptParser::readVersionExtern() {
   StringRef Tok = next();
   bool IsCXX = Tok == "\"C++\"";
   if (!IsCXX && Tok != "\"C\"")
     setError("Unknown language");
   expect("{");
 
   std::vector<SymbolVersion> Ret;
   while (!errorCount() && peek() != "}") {
     StringRef Tok = next();
     bool HasWildcard = !Tok.startswith("\"") && hasWildcard(Tok);
     Ret.push_back({unquote(Tok), IsCXX, HasWildcard});
     expect(";");
   }
 
   expect("}");
   return Ret;
 }
 
 uint64_t ScriptParser::readMemoryAssignment(StringRef S1, StringRef S2,
                                             StringRef S3) {
   if (!consume(S1) && !consume(S2) && !consume(S3)) {
     setError("expected one of: " + S1 + ", " + S2 + ", or " + S3);
     return 0;
   }
   expect("=");
   return readExpr()().getValue();
 }
 
 // Parse the MEMORY command as specified in:
 // https://sourceware.org/binutils/docs/ld/MEMORY.html
 //
 // MEMORY { name [(attr)] : ORIGIN = origin, LENGTH = len ... }
 void ScriptParser::readMemory() {
   expect("{");
   while (!errorCount() && !consume("}")) {
     StringRef Name = next();
 
     uint32_t Flags = 0;
     uint32_t NegFlags = 0;
     if (consume("(")) {
       std::tie(Flags, NegFlags) = readMemoryAttributes();
       expect(")");
     }
     expect(":");
 
     uint64_t Origin = readMemoryAssignment("ORIGIN", "org", "o");
     expect(",");
     uint64_t Length = readMemoryAssignment("LENGTH", "len", "l");
 
     // Add the memory region to the region map.
     if (Script->MemoryRegions.count(Name))
       setError("region '" + Name + "' already defined");
-    MemoryRegion *MR = make<MemoryRegion>();
-    *MR = {Name, Origin, Length, Flags, NegFlags};
+    MemoryRegion *MR =
+        make<MemoryRegion>(Name, Origin, Length, Flags, NegFlags);
     Script->MemoryRegions[Name] = MR;
   }
 }
 
 // This function parses the attributes used to match against section
 // flags when placing output sections in a memory region. These flags
 // are only used when an explicit memory region name is not used.
 std::pair<uint32_t, uint32_t> ScriptParser::readMemoryAttributes() {
   uint32_t Flags = 0;
   uint32_t NegFlags = 0;
   bool Invert = false;
 
   for (char C : next().lower()) {
     uint32_t Flag = 0;
     if (C == '!')
       Invert = !Invert;
     else if (C == 'w')
       Flag = SHF_WRITE;
     else if (C == 'x')
       Flag = SHF_EXECINSTR;
     else if (C == 'a')
       Flag = SHF_ALLOC;
     else if (C != 'r')
       setError("invalid memory region attribute");
 
     if (Invert)
       NegFlags |= Flag;
     else
       Flags |= Flag;
   }
   return {Flags, NegFlags};
 }
 
 void elf::readLinkerScript(MemoryBufferRef MB) {
   ScriptParser(MB).readLinkerScript();
 }
 
 void elf::readVersionScript(MemoryBufferRef MB) {
   ScriptParser(MB).readVersionScript();
 }
 
 void elf::readDynamicList(MemoryBufferRef MB) {
   ScriptParser(MB).readDynamicList();
 }
 
 void elf::readDefsym(StringRef Name, MemoryBufferRef MB) {
   ScriptParser(MB).readDefsym(Name);
 }
Index: vendor/lld/dist-release_60/ELF/Writer.cpp
===================================================================
--- vendor/lld/dist-release_60/ELF/Writer.cpp	(revision 328744)
+++ vendor/lld/dist-release_60/ELF/Writer.cpp	(revision 328745)
@@ -1,2071 +1,2075 @@
 //===- Writer.cpp ---------------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #include "Writer.h"
 #include "AArch64ErrataFix.h"
 #include "Config.h"
 #include "Filesystem.h"
 #include "LinkerScript.h"
 #include "MapFile.h"
 #include "OutputSections.h"
 #include "Relocations.h"
 #include "Strings.h"
 #include "SymbolTable.h"
 #include "Symbols.h"
 #include "SyntheticSections.h"
 #include "Target.h"
 #include "lld/Common/Memory.h"
 #include "lld/Common/Threads.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSwitch.h"
 #include <climits>
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
 using namespace llvm::support;
 using namespace llvm::support::endian;
 
 using namespace lld;
 using namespace lld::elf;
 
 namespace {
 // The writer writes a SymbolTable result to a file.
 template <class ELFT> class Writer {
 public:
   Writer() : Buffer(errorHandler().OutputBuffer) {}
   typedef typename ELFT::Shdr Elf_Shdr;
   typedef typename ELFT::Ehdr Elf_Ehdr;
   typedef typename ELFT::Phdr Elf_Phdr;
 
   void run();
 
 private:
   void copyLocalSymbols();
   void addSectionSymbols();
   void forEachRelSec(std::function<void(InputSectionBase &)> Fn);
   void sortSections();
   void resolveShfLinkOrder();
   void sortInputSections();
   void finalizeSections();
   void setReservedSymbolSections();
 
   std::vector<PhdrEntry *> createPhdrs();
   void removeEmptyPTLoad();
   void addPtArmExid(std::vector<PhdrEntry *> &Phdrs);
   void assignFileOffsets();
   void assignFileOffsetsBinary();
   void setPhdrs();
   void fixSectionAlignments();
   void openFile();
   void writeTrapInstr();
   void writeHeader();
   void writeSections();
   void writeSectionsBinary();
   void writeBuildId();
 
   std::unique_ptr<FileOutputBuffer> &Buffer;
 
   void addRelIpltSymbols();
   void addStartEndSymbols();
   void addStartStopSymbols(OutputSection *Sec);
   uint64_t getEntryAddr();
 
   std::vector<PhdrEntry *> Phdrs;
 
   uint64_t FileSize;
   uint64_t SectionHeaderOff;
 
   bool HasGotBaseSym = false;
 };
 } // anonymous namespace
 
 StringRef elf::getOutputSectionName(InputSectionBase *S) {
   // ".zdebug_" is a prefix for ZLIB-compressed sections.
   // Because we decompressed input sections, we want to remove 'z'.
   if (S->Name.startswith(".zdebug_"))
     return Saver.save("." + S->Name.substr(2));
 
   if (Config->Relocatable)
     return S->Name;
 
   // This is for --emit-relocs. If .text.foo is emitted as .text.bar, we want
   // to emit .rela.text.foo as .rela.text.bar for consistency (this is not
   // technically required, but not doing it is odd). This code guarantees that.
   if ((S->Type == SHT_REL || S->Type == SHT_RELA) &&
       !isa<SyntheticSection>(S)) {
     OutputSection *Out =
         cast<InputSection>(S)->getRelocatedSection()->getOutputSection();
     if (S->Type == SHT_RELA)
       return Saver.save(".rela" + Out->Name);
     return Saver.save(".rel" + Out->Name);
   }
 
   for (StringRef V :
        {".text.", ".rodata.", ".data.rel.ro.", ".data.", ".bss.rel.ro.",
         ".bss.", ".init_array.", ".fini_array.", ".ctors.", ".dtors.", ".tbss.",
         ".gcc_except_table.", ".tdata.", ".ARM.exidx.", ".ARM.extab."}) {
     StringRef Prefix = V.drop_back();
     if (S->Name.startswith(V) || S->Name == Prefix)
       return Prefix;
   }
 
   // CommonSection is identified as "COMMON" in linker scripts.
   // By default, it should go to .bss section.
   if (S->Name == "COMMON")
     return ".bss";
 
   return S->Name;
 }
 
 static bool needsInterpSection() {
   return !SharedFiles.empty() && !Config->DynamicLinker.empty() &&
          Script->needsInterpSection();
 }
 
 template <class ELFT> void elf::writeResult() { Writer<ELFT>().run(); }
 
 template <class ELFT> void Writer<ELFT>::removeEmptyPTLoad() {
   llvm::erase_if(Phdrs, [&](const PhdrEntry *P) {
     if (P->p_type != PT_LOAD)
       return false;
     if (!P->FirstSec)
       return true;
     uint64_t Size = P->LastSec->Addr + P->LastSec->Size - P->FirstSec->Addr;
     return Size == 0;
   });
 }
 
 template <class ELFT> static void combineEhFrameSections() {
   for (InputSectionBase *&S : InputSections) {
     EhInputSection *ES = dyn_cast<EhInputSection>(S);
     if (!ES || !ES->Live)
       continue;
 
     InX::EhFrame->addSection<ELFT>(ES);
     S = nullptr;
   }
 
   std::vector<InputSectionBase *> &V = InputSections;
   V.erase(std::remove(V.begin(), V.end(), nullptr), V.end());
 }
 
 static Defined *addOptionalRegular(StringRef Name, SectionBase *Sec,
                                    uint64_t Val, uint8_t StOther = STV_HIDDEN,
                                    uint8_t Binding = STB_GLOBAL) {
   Symbol *S = Symtab->find(Name);
   if (!S || S->isDefined())
     return nullptr;
   Symbol *Sym = Symtab->addRegular(Name, StOther, STT_NOTYPE, Val,
                                    /*Size=*/0, Binding, Sec,
                                    /*File=*/nullptr);
   return cast<Defined>(Sym);
 }
 
 // The linker is expected to define some symbols depending on
 // the linking result. This function defines such symbols.
 void elf::addReservedSymbols() {
   if (Config->EMachine == EM_MIPS) {
     // Define _gp for MIPS. st_value of _gp symbol will be updated by Writer
     // so that it points to an absolute address which by default is relative
     // to GOT. Default offset is 0x7ff0.
     // See "Global Data Symbols" in Chapter 6 in the following document:
     // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
     ElfSym::MipsGp = Symtab->addAbsolute("_gp", STV_HIDDEN, STB_GLOBAL);
 
     // On MIPS O32 ABI, _gp_disp is a magic symbol designates offset between
     // start of function and 'gp' pointer into GOT.
     if (Symtab->find("_gp_disp"))
       ElfSym::MipsGpDisp =
           Symtab->addAbsolute("_gp_disp", STV_HIDDEN, STB_GLOBAL);
 
     // The __gnu_local_gp is a magic symbol equal to the current value of 'gp'
     // pointer. This symbol is used in the code generated by .cpload pseudo-op
     // in case of using -mno-shared option.
     // https://sourceware.org/ml/binutils/2004-12/msg00094.html
     if (Symtab->find("__gnu_local_gp"))
       ElfSym::MipsLocalGp =
           Symtab->addAbsolute("__gnu_local_gp", STV_HIDDEN, STB_GLOBAL);
   }
 
   ElfSym::GlobalOffsetTable = addOptionalRegular(
       "_GLOBAL_OFFSET_TABLE_", Out::ElfHeader, Target->GotBaseSymOff);
 
   // __ehdr_start is the location of ELF file headers. Note that we define
   // this symbol unconditionally even when using a linker script, which
   // differs from the behavior implemented by GNU linker which only define
   // this symbol if ELF headers are in the memory mapped segment.
   // __executable_start is not documented, but the expectation of at
   // least the android libc is that it points to the elf header too.
   // __dso_handle symbol is passed to cxa_finalize as a marker to identify
   // each DSO. The address of the symbol doesn't matter as long as they are
   // different in different DSOs, so we chose the start address of the DSO.
   for (const char *Name :
        {"__ehdr_start", "__executable_start", "__dso_handle"})
     addOptionalRegular(Name, Out::ElfHeader, 0, STV_HIDDEN);
 
   // If linker script do layout we do not need to create any standart symbols.
   if (Script->HasSectionsCommand)
     return;
 
   auto Add = [](StringRef S, int64_t Pos) {
     return addOptionalRegular(S, Out::ElfHeader, Pos, STV_DEFAULT);
   };
 
   ElfSym::Bss = Add("__bss_start", 0);
   ElfSym::End1 = Add("end", -1);
   ElfSym::End2 = Add("_end", -1);
   ElfSym::Etext1 = Add("etext", -1);
   ElfSym::Etext2 = Add("_etext", -1);
   ElfSym::Edata1 = Add("edata", -1);
   ElfSym::Edata2 = Add("_edata", -1);
 }
 
 static OutputSection *findSection(StringRef Name) {
   for (BaseCommand *Base : Script->SectionCommands)
     if (auto *Sec = dyn_cast<OutputSection>(Base))
       if (Sec->Name == Name)
         return Sec;
   return nullptr;
 }
 
 // Initialize Out members.
 template <class ELFT> static void createSyntheticSections() {
   // Initialize all pointers with NULL. This is needed because
   // you can call lld::elf::main more than once as a library.
   memset(&Out::First, 0, sizeof(Out));
 
   auto Add = [](InputSectionBase *Sec) { InputSections.push_back(Sec); };
 
   InX::DynStrTab = make<StringTableSection>(".dynstr", true);
   InX::Dynamic = make<DynamicSection<ELFT>>();
   if (Config->AndroidPackDynRelocs) {
     InX::RelaDyn = make<AndroidPackedRelocationSection<ELFT>>(
         Config->IsRela ? ".rela.dyn" : ".rel.dyn");
   } else {
     InX::RelaDyn = make<RelocationSection<ELFT>>(
         Config->IsRela ? ".rela.dyn" : ".rel.dyn", Config->ZCombreloc);
   }
   InX::ShStrTab = make<StringTableSection>(".shstrtab", false);
 
   Out::ProgramHeaders = make<OutputSection>("", 0, SHF_ALLOC);
   Out::ProgramHeaders->Alignment = Config->Wordsize;
 
   if (needsInterpSection()) {
     InX::Interp = createInterpSection();
     Add(InX::Interp);
   } else {
     InX::Interp = nullptr;
   }
 
   if (Config->Strip != StripPolicy::All) {
     InX::StrTab = make<StringTableSection>(".strtab", false);
     InX::SymTab = make<SymbolTableSection<ELFT>>(*InX::StrTab);
   }
 
   if (Config->BuildId != BuildIdKind::None) {
     InX::BuildId = make<BuildIdSection>();
     Add(InX::BuildId);
   }
 
   InX::Bss = make<BssSection>(".bss", 0, 1);
   Add(InX::Bss);
 
   // If there is a SECTIONS command and a .data.rel.ro section name use name
   // .data.rel.ro.bss so that we match in the .data.rel.ro output section.
   // This makes sure our relro is contiguous.
   bool HasDataRelRo =
       Script->HasSectionsCommand && findSection(".data.rel.ro");
   InX::BssRelRo = make<BssSection>(
       HasDataRelRo ? ".data.rel.ro.bss" : ".bss.rel.ro", 0, 1);
   Add(InX::BssRelRo);
 
   // Add MIPS-specific sections.
   if (Config->EMachine == EM_MIPS) {
     if (!Config->Shared && Config->HasDynSymTab) {
       InX::MipsRldMap = make<MipsRldMapSection>();
       Add(InX::MipsRldMap);
     }
     if (auto *Sec = MipsAbiFlagsSection<ELFT>::create())
       Add(Sec);
     if (auto *Sec = MipsOptionsSection<ELFT>::create())
       Add(Sec);
     if (auto *Sec = MipsReginfoSection<ELFT>::create())
       Add(Sec);
   }
 
   if (Config->HasDynSymTab) {
     InX::DynSymTab = make<SymbolTableSection<ELFT>>(*InX::DynStrTab);
     Add(InX::DynSymTab);
 
     In<ELFT>::VerSym = make<VersionTableSection<ELFT>>();
     Add(In<ELFT>::VerSym);
 
     if (!Config->VersionDefinitions.empty()) {
       In<ELFT>::VerDef = make<VersionDefinitionSection<ELFT>>();
       Add(In<ELFT>::VerDef);
     }
 
     In<ELFT>::VerNeed = make<VersionNeedSection<ELFT>>();
     Add(In<ELFT>::VerNeed);
 
     if (Config->GnuHash) {
       InX::GnuHashTab = make<GnuHashTableSection>();
       Add(InX::GnuHashTab);
     }
 
     if (Config->SysvHash) {
       InX::HashTab = make<HashTableSection>();
       Add(InX::HashTab);
     }
 
     Add(InX::Dynamic);
     Add(InX::DynStrTab);
     Add(InX::RelaDyn);
   }
 
   // Add .got. MIPS' .got is so different from the other archs,
   // it has its own class.
   if (Config->EMachine == EM_MIPS) {
     InX::MipsGot = make<MipsGotSection>();
     Add(InX::MipsGot);
   } else {
     InX::Got = make<GotSection>();
     Add(InX::Got);
   }
 
   InX::GotPlt = make<GotPltSection>();
   Add(InX::GotPlt);
   InX::IgotPlt = make<IgotPltSection>();
   Add(InX::IgotPlt);
 
   if (Config->GdbIndex) {
     InX::GdbIndex = createGdbIndex<ELFT>();
     Add(InX::GdbIndex);
   }
 
   // We always need to add rel[a].plt to output if it has entries.
   // Even for static linking it can contain R_[*]_IRELATIVE relocations.
   InX::RelaPlt = make<RelocationSection<ELFT>>(
       Config->IsRela ? ".rela.plt" : ".rel.plt", false /*Sort*/);
   Add(InX::RelaPlt);
 
   // The RelaIplt immediately follows .rel.plt (.rel.dyn for ARM) to ensure
   // that the IRelative relocations are processed last by the dynamic loader.
   // We cannot place the iplt section in .rel.dyn when Android relocation
   // packing is enabled because that would cause a section type mismatch.
   // However, because the Android dynamic loader reads .rel.plt after .rel.dyn,
   // we can get the desired behaviour by placing the iplt section in .rel.plt.
   InX::RelaIplt = make<RelocationSection<ELFT>>(
       (Config->EMachine == EM_ARM && !Config->AndroidPackDynRelocs)
           ? ".rel.dyn"
           : InX::RelaPlt->Name,
       false /*Sort*/);
   Add(InX::RelaIplt);
 
   InX::Plt = make<PltSection>(Target->PltHeaderSize);
   Add(InX::Plt);
   InX::Iplt = make<PltSection>(0);
   Add(InX::Iplt);
 
   if (!Config->Relocatable) {
     if (Config->EhFrameHdr) {
       InX::EhFrameHdr = make<EhFrameHeader>();
       Add(InX::EhFrameHdr);
     }
     InX::EhFrame = make<EhFrameSection>();
     Add(InX::EhFrame);
   }
 
   if (InX::SymTab)
     Add(InX::SymTab);
   Add(InX::ShStrTab);
   if (InX::StrTab)
     Add(InX::StrTab);
 
   if (Config->EMachine == EM_ARM && !Config->Relocatable)
     // Add a sentinel to terminate .ARM.exidx. It helps an unwinder
     // to find the exact address range of the last entry.
     Add(make<ARMExidxSentinelSection>());
 }
 
 // The main function of the writer.
 template <class ELFT> void Writer<ELFT>::run() {
   // Create linker-synthesized sections such as .got or .plt.
   // Such sections are of type input section.
   createSyntheticSections<ELFT>();
 
   if (!Config->Relocatable)
     combineEhFrameSections<ELFT>();
 
   // We want to process linker script commands. When SECTIONS command
   // is given we let it create sections.
   Script->processSectionCommands();
 
   // Linker scripts controls how input sections are assigned to output sections.
   // Input sections that were not handled by scripts are called "orphans", and
   // they are assigned to output sections by the default rule. Process that.
   Script->addOrphanSections();
 
   if (Config->Discard != DiscardPolicy::All)
     copyLocalSymbols();
 
   if (Config->CopyRelocs)
     addSectionSymbols();
 
   // Now that we have a complete set of output sections. This function
   // completes section contents. For example, we need to add strings
   // to the string table, and add entries to .got and .plt.
   // finalizeSections does that.
   finalizeSections();
   if (errorCount())
     return;
 
   Script->assignAddresses();
 
   // If -compressed-debug-sections is specified, we need to compress
   // .debug_* sections. Do it right now because it changes the size of
   // output sections.
   for (OutputSection *Sec : OutputSections)
     Sec->maybeCompress<ELFT>();
 
   Script->allocateHeaders(Phdrs);
 
   // Remove empty PT_LOAD to avoid causing the dynamic linker to try to mmap a
   // 0 sized region. This has to be done late since only after assignAddresses
   // we know the size of the sections.
   removeEmptyPTLoad();
 
   if (!Config->OFormatBinary)
     assignFileOffsets();
   else
     assignFileOffsetsBinary();
 
   setPhdrs();
 
   if (Config->Relocatable) {
     for (OutputSection *Sec : OutputSections)
       Sec->Addr = 0;
   }
 
   // It does not make sense try to open the file if we have error already.
   if (errorCount())
     return;
   // Write the result down to a file.
   openFile();
   if (errorCount())
     return;
 
   if (!Config->OFormatBinary) {
     writeTrapInstr();
     writeHeader();
     writeSections();
   } else {
     writeSectionsBinary();
   }
 
   // Backfill .note.gnu.build-id section content. This is done at last
   // because the content is usually a hash value of the entire output file.
   writeBuildId();
   if (errorCount())
     return;
 
   // Handle -Map option.
   writeMapFile();
   if (errorCount())
     return;
 
   if (auto E = Buffer->commit())
     error("failed to write to the output file: " + toString(std::move(E)));
 }
 
 static bool shouldKeepInSymtab(SectionBase *Sec, StringRef SymName,
                                const Symbol &B) {
   if (B.isFile() || B.isSection())
     return false;
 
   // If sym references a section in a discarded group, don't keep it.
   if (Sec == &InputSection::Discarded)
     return false;
 
   if (Config->Discard == DiscardPolicy::None)
     return true;
 
   // In ELF assembly .L symbols are normally discarded by the assembler.
   // If the assembler fails to do so, the linker discards them if
   // * --discard-locals is used.
   // * The symbol is in a SHF_MERGE section, which is normally the reason for
   //   the assembler keeping the .L symbol.
   if (!SymName.startswith(".L") && !SymName.empty())
     return true;
 
   if (Config->Discard == DiscardPolicy::Locals)
     return false;
 
   return !Sec || !(Sec->Flags & SHF_MERGE);
 }
 
 static bool includeInSymtab(const Symbol &B) {
   if (!B.isLocal() && !B.IsUsedInRegularObj)
     return false;
 
   if (auto *D = dyn_cast<Defined>(&B)) {
     // Always include absolute symbols.
     SectionBase *Sec = D->Section;
     if (!Sec)
       return true;
     Sec = Sec->Repl;
     // Exclude symbols pointing to garbage-collected sections.
     if (isa<InputSectionBase>(Sec) && !Sec->Live)
       return false;
     if (auto *S = dyn_cast<MergeInputSection>(Sec))
       if (!S->getSectionPiece(D->Value)->Live)
         return false;
     return true;
   }
   return B.Used;
 }
 
 // Local symbols are not in the linker's symbol table. This function scans
 // each object file's symbol table to copy local symbols to the output.
 template <class ELFT> void Writer<ELFT>::copyLocalSymbols() {
   if (!InX::SymTab)
     return;
   for (InputFile *File : ObjectFiles) {
     ObjFile<ELFT> *F = cast<ObjFile<ELFT>>(File);
     for (Symbol *B : F->getLocalSymbols()) {
       if (!B->isLocal())
         fatal(toString(F) +
               ": broken object: getLocalSymbols returns a non-local symbol");
       auto *DR = dyn_cast<Defined>(B);
 
       // No reason to keep local undefined symbol in symtab.
       if (!DR)
         continue;
       if (!includeInSymtab(*B))
         continue;
 
       SectionBase *Sec = DR->Section;
       if (!shouldKeepInSymtab(Sec, B->getName(), *B))
         continue;
       InX::SymTab->addSymbol(B);
     }
   }
 }
 
 template <class ELFT> void Writer<ELFT>::addSectionSymbols() {
   // Create a section symbol for each output section so that we can represent
   // relocations that point to the section. If we know that no relocation is
   // referring to a section (that happens if the section is a synthetic one), we
   // don't create a section symbol for that section.
   for (BaseCommand *Base : Script->SectionCommands) {
     auto *Sec = dyn_cast<OutputSection>(Base);
     if (!Sec)
       continue;
     auto I = llvm::find_if(Sec->SectionCommands, [](BaseCommand *Base) {
       if (auto *ISD = dyn_cast<InputSectionDescription>(Base))
         return !ISD->Sections.empty();
       return false;
     });
     if (I == Sec->SectionCommands.end())
       continue;
     InputSection *IS = cast<InputSectionDescription>(*I)->Sections[0];
 
     // Relocations are not using REL[A] section symbols.
     if (IS->Type == SHT_REL || IS->Type == SHT_RELA)
       continue;
 
     // Unlike other synthetic sections, mergeable output sections contain data
     // copied from input sections, and there may be a relocation pointing to its
     // contents if -r or -emit-reloc are given.
     if (isa<SyntheticSection>(IS) && !(IS->Flags & SHF_MERGE))
       continue;
 
     auto *Sym =
         make<Defined>(IS->File, "", STB_LOCAL, /*StOther=*/0, STT_SECTION,
                       /*Value=*/0, /*Size=*/0, IS);
     InX::SymTab->addSymbol(Sym);
   }
 }
 
 // Today's loaders have a feature to make segments read-only after
 // processing dynamic relocations to enhance security. PT_GNU_RELRO
 // is defined for that.
 //
 // This function returns true if a section needs to be put into a
 // PT_GNU_RELRO segment.
 static bool isRelroSection(const OutputSection *Sec) {
   if (!Config->ZRelro)
     return false;
 
   uint64_t Flags = Sec->Flags;
 
   // Non-allocatable or non-writable sections don't need RELRO because
   // they are not writable or not even mapped to memory in the first place.
   // RELRO is for sections that are essentially read-only but need to
   // be writable only at process startup to allow dynamic linker to
   // apply relocations.
   if (!(Flags & SHF_ALLOC) || !(Flags & SHF_WRITE))
     return false;
 
   // Once initialized, TLS data segments are used as data templates
   // for a thread-local storage. For each new thread, runtime
   // allocates memory for a TLS and copy templates there. No thread
   // are supposed to use templates directly. Thus, it can be in RELRO.
   if (Flags & SHF_TLS)
     return true;
 
   // .init_array, .preinit_array and .fini_array contain pointers to
   // functions that are executed on process startup or exit. These
   // pointers are set by the static linker, and they are not expected
   // to change at runtime. But if you are an attacker, you could do
   // interesting things by manipulating pointers in .fini_array, for
   // example. So they are put into RELRO.
   uint32_t Type = Sec->Type;
   if (Type == SHT_INIT_ARRAY || Type == SHT_FINI_ARRAY ||
       Type == SHT_PREINIT_ARRAY)
     return true;
 
   // .got contains pointers to external symbols. They are resolved by
   // the dynamic linker when a module is loaded into memory, and after
   // that they are not expected to change. So, it can be in RELRO.
   if (InX::Got && Sec == InX::Got->getParent())
     return true;
 
   // .got.plt contains pointers to external function symbols. They are
   // by default resolved lazily, so we usually cannot put it into RELRO.
   // However, if "-z now" is given, the lazy symbol resolution is
   // disabled, which enables us to put it into RELRO.
   if (Sec == InX::GotPlt->getParent())
     return Config->ZNow;
 
   // .dynamic section contains data for the dynamic linker, and
   // there's no need to write to it at runtime, so it's better to put
   // it into RELRO.
   if (Sec == InX::Dynamic->getParent())
     return true;
 
   // Sections with some special names are put into RELRO. This is a
   // bit unfortunate because section names shouldn't be significant in
   // ELF in spirit. But in reality many linker features depend on
   // magic section names.
   StringRef S = Sec->Name;
   return S == ".data.rel.ro" || S == ".bss.rel.ro" || S == ".ctors" ||
          S == ".dtors" || S == ".jcr" || S == ".eh_frame" ||
          S == ".openbsd.randomdata";
 }
 
 // We compute a rank for each section. The rank indicates where the
 // section should be placed in the file.  Instead of using simple
 // numbers (0,1,2...), we use a series of flags. One for each decision
 // point when placing the section.
 // Using flags has two key properties:
 // * It is easy to check if a give branch was taken.
 // * It is easy two see how similar two ranks are (see getRankProximity).
 enum RankFlags {
   RF_NOT_ADDR_SET = 1 << 16,
   RF_NOT_INTERP = 1 << 15,
   RF_NOT_ALLOC = 1 << 14,
   RF_WRITE = 1 << 13,
   RF_EXEC_WRITE = 1 << 12,
   RF_EXEC = 1 << 11,
   RF_NON_TLS_BSS = 1 << 10,
   RF_NON_TLS_BSS_RO = 1 << 9,
   RF_NOT_TLS = 1 << 8,
   RF_BSS = 1 << 7,
   RF_PPC_NOT_TOCBSS = 1 << 6,
   RF_PPC_OPD = 1 << 5,
   RF_PPC_TOCL = 1 << 4,
   RF_PPC_TOC = 1 << 3,
   RF_PPC_BRANCH_LT = 1 << 2,
   RF_MIPS_GPREL = 1 << 1,
   RF_MIPS_NOT_GOT = 1 << 0
 };
 
 static unsigned getSectionRank(const OutputSection *Sec) {
   unsigned Rank = 0;
 
   // We want to put section specified by -T option first, so we
   // can start assigning VA starting from them later.
   if (Config->SectionStartMap.count(Sec->Name))
     return Rank;
   Rank |= RF_NOT_ADDR_SET;
 
   // Put .interp first because some loaders want to see that section
   // on the first page of the executable file when loaded into memory.
   if (Sec->Name == ".interp")
     return Rank;
   Rank |= RF_NOT_INTERP;
 
   // Allocatable sections go first to reduce the total PT_LOAD size and
   // so debug info doesn't change addresses in actual code.
   if (!(Sec->Flags & SHF_ALLOC))
     return Rank | RF_NOT_ALLOC;
 
   // Sort sections based on their access permission in the following
   // order: R, RX, RWX, RW.  This order is based on the following
   // considerations:
   // * Read-only sections come first such that they go in the
   //   PT_LOAD covering the program headers at the start of the file.
   // * Read-only, executable sections come next, unless the
   //   -no-rosegment option is used.
   // * Writable, executable sections follow such that .plt on
   //   architectures where it needs to be writable will be placed
   //   between .text and .data.
   // * Writable sections come last, such that .bss lands at the very
   //   end of the last PT_LOAD.
   bool IsExec = Sec->Flags & SHF_EXECINSTR;
   bool IsWrite = Sec->Flags & SHF_WRITE;
 
   if (IsExec) {
     if (IsWrite)
       Rank |= RF_EXEC_WRITE;
     else if (!Config->SingleRoRx)
       Rank |= RF_EXEC;
   } else {
     if (IsWrite)
       Rank |= RF_WRITE;
   }
 
   // If we got here we know that both A and B are in the same PT_LOAD.
 
   bool IsTls = Sec->Flags & SHF_TLS;
   bool IsNoBits = Sec->Type == SHT_NOBITS;
 
   // The first requirement we have is to put (non-TLS) nobits sections last. The
   // reason is that the only thing the dynamic linker will see about them is a
   // p_memsz that is larger than p_filesz. Seeing that it zeros the end of the
   // PT_LOAD, so that has to correspond to the nobits sections.
   bool IsNonTlsNoBits = IsNoBits && !IsTls;
   if (IsNonTlsNoBits)
     Rank |= RF_NON_TLS_BSS;
 
   // We place nobits RelRo sections before plain r/w ones, and non-nobits RelRo
   // sections after r/w ones, so that the RelRo sections are contiguous.
   bool IsRelRo = isRelroSection(Sec);
   if (IsNonTlsNoBits && !IsRelRo)
     Rank |= RF_NON_TLS_BSS_RO;
   if (!IsNonTlsNoBits && IsRelRo)
     Rank |= RF_NON_TLS_BSS_RO;
 
   // The TLS initialization block needs to be a single contiguous block in a R/W
   // PT_LOAD, so stick TLS sections directly before the other RelRo R/W
   // sections. The TLS NOBITS sections are placed here as they don't take up
   // virtual address space in the PT_LOAD.
   if (!IsTls)
     Rank |= RF_NOT_TLS;
 
   // Within the TLS initialization block, the non-nobits sections need to appear
   // first.
   if (IsNoBits)
     Rank |= RF_BSS;
 
   // Some architectures have additional ordering restrictions for sections
   // within the same PT_LOAD.
   if (Config->EMachine == EM_PPC64) {
     // PPC64 has a number of special SHT_PROGBITS+SHF_ALLOC+SHF_WRITE sections
     // that we would like to make sure appear is a specific order to maximize
     // their coverage by a single signed 16-bit offset from the TOC base
     // pointer. Conversely, the special .tocbss section should be first among
     // all SHT_NOBITS sections. This will put it next to the loaded special
     // PPC64 sections (and, thus, within reach of the TOC base pointer).
     StringRef Name = Sec->Name;
     if (Name != ".tocbss")
       Rank |= RF_PPC_NOT_TOCBSS;
 
     if (Name == ".opd")
       Rank |= RF_PPC_OPD;
 
     if (Name == ".toc1")
       Rank |= RF_PPC_TOCL;
 
     if (Name == ".toc")
       Rank |= RF_PPC_TOC;
 
     if (Name == ".branch_lt")
       Rank |= RF_PPC_BRANCH_LT;
   }
   if (Config->EMachine == EM_MIPS) {
     // All sections with SHF_MIPS_GPREL flag should be grouped together
     // because data in these sections is addressable with a gp relative address.
     if (Sec->Flags & SHF_MIPS_GPREL)
       Rank |= RF_MIPS_GPREL;
 
     if (Sec->Name != ".got")
       Rank |= RF_MIPS_NOT_GOT;
   }
 
   return Rank;
 }
 
 static bool compareSections(const BaseCommand *ACmd, const BaseCommand *BCmd) {
   const OutputSection *A = cast<OutputSection>(ACmd);
   const OutputSection *B = cast<OutputSection>(BCmd);
   if (A->SortRank != B->SortRank)
     return A->SortRank < B->SortRank;
   if (!(A->SortRank & RF_NOT_ADDR_SET))
     return Config->SectionStartMap.lookup(A->Name) <
            Config->SectionStartMap.lookup(B->Name);
   return false;
 }
 
 void PhdrEntry::add(OutputSection *Sec) {
   LastSec = Sec;
   if (!FirstSec)
     FirstSec = Sec;
   p_align = std::max(p_align, Sec->Alignment);
   if (p_type == PT_LOAD)
     Sec->PtLoad = this;
+  if (Sec->LMAExpr)
+    ASectionHasLMA = true;
 }
 
 // The beginning and the ending of .rel[a].plt section are marked
 // with __rel[a]_iplt_{start,end} symbols if it is a statically linked
 // executable. The runtime needs these symbols in order to resolve
 // all IRELATIVE relocs on startup. For dynamic executables, we don't
 // need these symbols, since IRELATIVE relocs are resolved through GOT
 // and PLT. For details, see http://www.airs.com/blog/archives/403.
 template <class ELFT> void Writer<ELFT>::addRelIpltSymbols() {
   if (!Config->Static)
     return;
   StringRef S = Config->IsRela ? "__rela_iplt_start" : "__rel_iplt_start";
   addOptionalRegular(S, InX::RelaIplt, 0, STV_HIDDEN, STB_WEAK);
 
   S = Config->IsRela ? "__rela_iplt_end" : "__rel_iplt_end";
   addOptionalRegular(S, InX::RelaIplt, -1, STV_HIDDEN, STB_WEAK);
 }
 
 template <class ELFT>
 void Writer<ELFT>::forEachRelSec(std::function<void(InputSectionBase &)> Fn) {
   // Scan all relocations. Each relocation goes through a series
   // of tests to determine if it needs special treatment, such as
   // creating GOT, PLT, copy relocations, etc.
   // Note that relocations for non-alloc sections are directly
   // processed by InputSection::relocateNonAlloc.
   for (InputSectionBase *IS : InputSections)
     if (IS->Live && isa<InputSection>(IS) && (IS->Flags & SHF_ALLOC))
       Fn(*IS);
   for (EhInputSection *ES : InX::EhFrame->Sections)
     Fn(*ES);
 }
 
 // This function generates assignments for predefined symbols (e.g. _end or
 // _etext) and inserts them into the commands sequence to be processed at the
 // appropriate time. This ensures that the value is going to be correct by the
 // time any references to these symbols are processed and is equivalent to
 // defining these symbols explicitly in the linker script.
 template <class ELFT> void Writer<ELFT>::setReservedSymbolSections() {
   if (ElfSym::GlobalOffsetTable) {
     // The _GLOBAL_OFFSET_TABLE_ symbol is defined by target convention to
     // be at some offset from the base of the .got section, usually 0 or the end
     // of the .got
     InputSection *GotSection = InX::MipsGot ? cast<InputSection>(InX::MipsGot)
                                             : cast<InputSection>(InX::Got);
     ElfSym::GlobalOffsetTable->Section = GotSection;
   }
 
   PhdrEntry *Last = nullptr;
   PhdrEntry *LastRO = nullptr;
 
   for (PhdrEntry *P : Phdrs) {
     if (P->p_type != PT_LOAD)
       continue;
     Last = P;
     if (!(P->p_flags & PF_W))
       LastRO = P;
   }
 
   if (LastRO) {
     // _etext is the first location after the last read-only loadable segment.
     if (ElfSym::Etext1)
       ElfSym::Etext1->Section = LastRO->LastSec;
     if (ElfSym::Etext2)
       ElfSym::Etext2->Section = LastRO->LastSec;
   }
 
   if (Last) {
     // _edata points to the end of the last mapped initialized section.
     OutputSection *Edata = nullptr;
     for (OutputSection *OS : OutputSections) {
       if (OS->Type != SHT_NOBITS)
         Edata = OS;
       if (OS == Last->LastSec)
         break;
     }
 
     if (ElfSym::Edata1)
       ElfSym::Edata1->Section = Edata;
     if (ElfSym::Edata2)
       ElfSym::Edata2->Section = Edata;
 
     // _end is the first location after the uninitialized data region.
     if (ElfSym::End1)
       ElfSym::End1->Section = Last->LastSec;
     if (ElfSym::End2)
       ElfSym::End2->Section = Last->LastSec;
   }
 
   if (ElfSym::Bss)
     ElfSym::Bss->Section = findSection(".bss");
 
   // Setup MIPS _gp_disp/__gnu_local_gp symbols which should
   // be equal to the _gp symbol's value.
   if (ElfSym::MipsGp) {
     // Find GP-relative section with the lowest address
     // and use this address to calculate default _gp value.
     for (OutputSection *OS : OutputSections) {
       if (OS->Flags & SHF_MIPS_GPREL) {
         ElfSym::MipsGp->Section = OS;
         ElfSym::MipsGp->Value = 0x7ff0;
         break;
       }
     }
   }
 }
 
 // We want to find how similar two ranks are.
 // The more branches in getSectionRank that match, the more similar they are.
 // Since each branch corresponds to a bit flag, we can just use
 // countLeadingZeros.
 static int getRankProximityAux(OutputSection *A, OutputSection *B) {
   return countLeadingZeros(A->SortRank ^ B->SortRank);
 }
 
 static int getRankProximity(OutputSection *A, BaseCommand *B) {
   if (auto *Sec = dyn_cast<OutputSection>(B))
     if (Sec->Live)
       return getRankProximityAux(A, Sec);
   return -1;
 }
 
 // When placing orphan sections, we want to place them after symbol assignments
 // so that an orphan after
 //   begin_foo = .;
 //   foo : { *(foo) }
 //   end_foo = .;
 // doesn't break the intended meaning of the begin/end symbols.
 // We don't want to go over sections since findOrphanPos is the
 // one in charge of deciding the order of the sections.
 // We don't want to go over changes to '.', since doing so in
 //  rx_sec : { *(rx_sec) }
 //  . = ALIGN(0x1000);
 //  /* The RW PT_LOAD starts here*/
 //  rw_sec : { *(rw_sec) }
 // would mean that the RW PT_LOAD would become unaligned.
 static bool shouldSkip(BaseCommand *Cmd) {
   if (isa<OutputSection>(Cmd))
     return false;
   if (auto *Assign = dyn_cast<SymbolAssignment>(Cmd))
     return Assign->Name != ".";
   return true;
 }
 
 // We want to place orphan sections so that they share as much
 // characteristics with their neighbors as possible. For example, if
 // both are rw, or both are tls.
 template <typename ELFT>
 static std::vector<BaseCommand *>::iterator
 findOrphanPos(std::vector<BaseCommand *>::iterator B,
               std::vector<BaseCommand *>::iterator E) {
   OutputSection *Sec = cast<OutputSection>(*E);
 
   // Find the first element that has as close a rank as possible.
   auto I = std::max_element(B, E, [=](BaseCommand *A, BaseCommand *B) {
     return getRankProximity(Sec, A) < getRankProximity(Sec, B);
   });
   if (I == E)
     return E;
 
   // Consider all existing sections with the same proximity.
   int Proximity = getRankProximity(Sec, *I);
   for (; I != E; ++I) {
     auto *CurSec = dyn_cast<OutputSection>(*I);
     if (!CurSec || !CurSec->Live)
       continue;
     if (getRankProximity(Sec, CurSec) != Proximity ||
         Sec->SortRank < CurSec->SortRank)
       break;
   }
 
   auto IsLiveSection = [](BaseCommand *Cmd) {
     auto *OS = dyn_cast<OutputSection>(Cmd);
     return OS && OS->Live;
   };
 
   auto J = std::find_if(llvm::make_reverse_iterator(I),
                         llvm::make_reverse_iterator(B), IsLiveSection);
   I = J.base();
 
   // As a special case, if the orphan section is the last section, put
   // it at the very end, past any other commands.
   // This matches bfd's behavior and is convenient when the linker script fully
   // specifies the start of the file, but doesn't care about the end (the non
   // alloc sections for example).
   auto NextSec = std::find_if(I, E, IsLiveSection);
   if (NextSec == E)
     return E;
 
   while (I != E && shouldSkip(*I))
     ++I;
   return I;
 }
 
 // If no layout was provided by linker script, we want to apply default
 // sorting for special input sections and handle --symbol-ordering-file.
 template <class ELFT> void Writer<ELFT>::sortInputSections() {
   assert(!Script->HasSectionsCommand);
 
   // Sort input sections by priority using the list provided
   // by --symbol-ordering-file.
   DenseMap<SectionBase *, int> Order = buildSectionOrder();
   if (!Order.empty())
     for (BaseCommand *Base : Script->SectionCommands)
       if (auto *Sec = dyn_cast<OutputSection>(Base))
         if (Sec->Live)
           Sec->sort([&](InputSectionBase *S) { return Order.lookup(S); });
 
   // Sort input sections by section name suffixes for
   // __attribute__((init_priority(N))).
   if (OutputSection *Sec = findSection(".init_array"))
     Sec->sortInitFini();
   if (OutputSection *Sec = findSection(".fini_array"))
     Sec->sortInitFini();
 
   // Sort input sections by the special rule for .ctors and .dtors.
   if (OutputSection *Sec = findSection(".ctors"))
     Sec->sortCtorsDtors();
   if (OutputSection *Sec = findSection(".dtors"))
     Sec->sortCtorsDtors();
 }
 
 template <class ELFT> void Writer<ELFT>::sortSections() {
   Script->adjustSectionsBeforeSorting();
 
   // Don't sort if using -r. It is not necessary and we want to preserve the
   // relative order for SHF_LINK_ORDER sections.
   if (Config->Relocatable)
     return;
 
   for (BaseCommand *Base : Script->SectionCommands)
     if (auto *Sec = dyn_cast<OutputSection>(Base))
       Sec->SortRank = getSectionRank(Sec);
 
   if (!Script->HasSectionsCommand) {
     sortInputSections();
 
     // We know that all the OutputSections are contiguous in this case.
     auto E = Script->SectionCommands.end();
     auto I = Script->SectionCommands.begin();
     auto IsSection = [](BaseCommand *Base) { return isa<OutputSection>(Base); };
     I = std::find_if(I, E, IsSection);
     E = std::find_if(llvm::make_reverse_iterator(E),
                      llvm::make_reverse_iterator(I), IsSection)
             .base();
     std::stable_sort(I, E, compareSections);
     return;
   }
 
   // Orphan sections are sections present in the input files which are
   // not explicitly placed into the output file by the linker script.
   //
   // The sections in the linker script are already in the correct
   // order. We have to figuere out where to insert the orphan
   // sections.
   //
   // The order of the sections in the script is arbitrary and may not agree with
   // compareSections. This means that we cannot easily define a strict weak
   // ordering. To see why, consider a comparison of a section in the script and
   // one not in the script. We have a two simple options:
   // * Make them equivalent (a is not less than b, and b is not less than a).
   //   The problem is then that equivalence has to be transitive and we can
   //   have sections a, b and c with only b in a script and a less than c
   //   which breaks this property.
   // * Use compareSectionsNonScript. Given that the script order doesn't have
   //   to match, we can end up with sections a, b, c, d where b and c are in the
   //   script and c is compareSectionsNonScript less than b. In which case d
   //   can be equivalent to c, a to b and d < a. As a concrete example:
   //   .a (rx) # not in script
   //   .b (rx) # in script
   //   .c (ro) # in script
   //   .d (ro) # not in script
   //
   // The way we define an order then is:
   // *  Sort only the orphan sections. They are in the end right now.
   // *  Move each orphan section to its preferred position. We try
   //    to put each section in the last position where it it can share
   //    a PT_LOAD.
   //
   // There is some ambiguity as to where exactly a new entry should be
   // inserted, because Commands contains not only output section
   // commands but also other types of commands such as symbol assignment
   // expressions. There's no correct answer here due to the lack of the
   // formal specification of the linker script. We use heuristics to
   // determine whether a new output command should be added before or
   // after another commands. For the details, look at shouldSkip
   // function.
 
   auto I = Script->SectionCommands.begin();
   auto E = Script->SectionCommands.end();
   auto NonScriptI = std::find_if(I, E, [](BaseCommand *Base) {
     if (auto *Sec = dyn_cast<OutputSection>(Base))
       return Sec->Live && Sec->SectionIndex == INT_MAX;
     return false;
   });
 
   // Sort the orphan sections.
   std::stable_sort(NonScriptI, E, compareSections);
 
   // As a horrible special case, skip the first . assignment if it is before any
   // section. We do this because it is common to set a load address by starting
   // the script with ". = 0xabcd" and the expectation is that every section is
   // after that.
   auto FirstSectionOrDotAssignment =
       std::find_if(I, E, [](BaseCommand *Cmd) { return !shouldSkip(Cmd); });
   if (FirstSectionOrDotAssignment != E &&
       isa<SymbolAssignment>(**FirstSectionOrDotAssignment))
     ++FirstSectionOrDotAssignment;
   I = FirstSectionOrDotAssignment;
 
   while (NonScriptI != E) {
     auto Pos = findOrphanPos<ELFT>(I, NonScriptI);
     OutputSection *Orphan = cast<OutputSection>(*NonScriptI);
 
     // As an optimization, find all sections with the same sort rank
     // and insert them with one rotate.
     unsigned Rank = Orphan->SortRank;
     auto End = std::find_if(NonScriptI + 1, E, [=](BaseCommand *Cmd) {
       return cast<OutputSection>(Cmd)->SortRank != Rank;
     });
     std::rotate(Pos, NonScriptI, End);
     NonScriptI = End;
   }
 
   Script->adjustSectionsAfterSorting();
 }
 
 static bool compareByFilePosition(InputSection *A, InputSection *B) {
   // Synthetic, i. e. a sentinel section, should go last.
   if (A->kind() == InputSectionBase::Synthetic ||
       B->kind() == InputSectionBase::Synthetic)
     return A->kind() != InputSectionBase::Synthetic;
   InputSection *LA = A->getLinkOrderDep();
   InputSection *LB = B->getLinkOrderDep();
   OutputSection *AOut = LA->getParent();
   OutputSection *BOut = LB->getParent();
   if (AOut != BOut)
     return AOut->SectionIndex < BOut->SectionIndex;
   return LA->OutSecOff < LB->OutSecOff;
 }
 
 // This function is used by the --merge-exidx-entries to detect duplicate
 // .ARM.exidx sections. It is Arm only.
 //
 // The .ARM.exidx section is of the form:
 // | PREL31 offset to function | Unwind instructions for function |
 // where the unwind instructions are either a small number of unwind
 // instructions inlined into the table entry, the special CANT_UNWIND value of
 // 0x1 or a PREL31 offset into a .ARM.extab Section that contains unwind
 // instructions.
 //
 // We return true if all the unwind instructions in the .ARM.exidx entries of
 // Cur can be merged into the last entry of Prev.
 static bool isDuplicateArmExidxSec(InputSection *Prev, InputSection *Cur) {
 
   // References to .ARM.Extab Sections have bit 31 clear and are not the
   // special EXIDX_CANTUNWIND bit-pattern.
   auto IsExtabRef = [](uint32_t Unwind) {
     return (Unwind & 0x80000000) == 0 && Unwind != 0x1;
   };
 
   struct ExidxEntry {
     ulittle32_t Fn;
     ulittle32_t Unwind;
   };
 
   // Get the last table Entry from the previous .ARM.exidx section.
   const ExidxEntry &PrevEntry = *reinterpret_cast<const ExidxEntry *>(
       Prev->Data.data() + Prev->getSize() - sizeof(ExidxEntry));
   if (IsExtabRef(PrevEntry.Unwind))
     return false;
 
   // We consider the unwind instructions of an .ARM.exidx table entry
   // a duplicate if the previous unwind instructions if:
   // - Both are the special EXIDX_CANTUNWIND.
   // - Both are the same inline unwind instructions.
   // We do not attempt to follow and check links into .ARM.extab tables as
   // consecutive identical entries are rare and the effort to check that they
   // are identical is high.
 
   if (isa<SyntheticSection>(Cur))
     // Exidx sentinel section has implicit EXIDX_CANTUNWIND;
     return PrevEntry.Unwind == 0x1;
 
   ArrayRef<const ExidxEntry> Entries(
       reinterpret_cast<const ExidxEntry *>(Cur->Data.data()),
       Cur->getSize() / sizeof(ExidxEntry));
   for (const ExidxEntry &Entry : Entries)
     if (IsExtabRef(Entry.Unwind) || Entry.Unwind != PrevEntry.Unwind)
       return false;
   // All table entries in this .ARM.exidx Section can be merged into the
   // previous Section.
   return true;
 }
 
 template <class ELFT> void Writer<ELFT>::resolveShfLinkOrder() {
   for (OutputSection *Sec : OutputSections) {
     if (!(Sec->Flags & SHF_LINK_ORDER))
       continue;
 
     // Link order may be distributed across several InputSectionDescriptions
     // but sort must consider them all at once.
     std::vector<InputSection **> ScriptSections;
     std::vector<InputSection *> Sections;
     for (BaseCommand *Base : Sec->SectionCommands) {
       if (auto *ISD = dyn_cast<InputSectionDescription>(Base)) {
         for (InputSection *&IS : ISD->Sections) {
           ScriptSections.push_back(&IS);
           Sections.push_back(IS);
         }
       }
     }
     std::stable_sort(Sections.begin(), Sections.end(), compareByFilePosition);
 
     if (!Config->Relocatable && Config->EMachine == EM_ARM &&
         Sec->Type == SHT_ARM_EXIDX) {
 
       if (!Sections.empty() && isa<ARMExidxSentinelSection>(Sections.back())) {
         assert(Sections.size() >= 2 &&
                "We should create a sentinel section only if there are "
                "alive regular exidx sections.");
         // The last executable section is required to fill the sentinel.
         // Remember it here so that we don't have to find it again.
         auto *Sentinel = cast<ARMExidxSentinelSection>(Sections.back());
         Sentinel->Highest = Sections[Sections.size() - 2]->getLinkOrderDep();
       }
 
       if (Config->MergeArmExidx) {
         // The EHABI for the Arm Architecture permits consecutive identical
         // table entries to be merged. We use a simple implementation that
         // removes a .ARM.exidx Input Section if it can be merged into the
         // previous one. This does not require any rewriting of InputSection
         // contents but misses opportunities for fine grained deduplication
         // where only a subset of the InputSection contents can be merged.
         int Cur = 1;
         int Prev = 0;
         // The last one is a sentinel entry which should not be removed.
         int N = Sections.size() - 1;
         while (Cur < N) {
           if (isDuplicateArmExidxSec(Sections[Prev], Sections[Cur]))
             Sections[Cur] = nullptr;
           else
             Prev = Cur;
           ++Cur;
         }
       }
     }
 
     for (int I = 0, N = Sections.size(); I < N; ++I)
       *ScriptSections[I] = Sections[I];
 
     // Remove the Sections we marked as duplicate earlier.
     for (BaseCommand *Base : Sec->SectionCommands)
       if (auto *ISD = dyn_cast<InputSectionDescription>(Base))
         ISD->Sections.erase(
             std::remove(ISD->Sections.begin(), ISD->Sections.end(), nullptr),
             ISD->Sections.end());
   }
 }
 
 static void applySynthetic(const std::vector<SyntheticSection *> &Sections,
                            std::function<void(SyntheticSection *)> Fn) {
   for (SyntheticSection *SS : Sections)
     if (SS && SS->getParent() && !SS->empty())
       Fn(SS);
 }
 
 // In order to allow users to manipulate linker-synthesized sections,
 // we had to add synthetic sections to the input section list early,
 // even before we make decisions whether they are needed. This allows
 // users to write scripts like this: ".mygot : { .got }".
 //
 // Doing it has an unintended side effects. If it turns out that we
 // don't need a .got (for example) at all because there's no
 // relocation that needs a .got, we don't want to emit .got.
 //
 // To deal with the above problem, this function is called after
 // scanRelocations is called to remove synthetic sections that turn
 // out to be empty.
 static void removeUnusedSyntheticSections() {
   // All input synthetic sections that can be empty are placed after
   // all regular ones. We iterate over them all and exit at first
   // non-synthetic.
   for (InputSectionBase *S : llvm::reverse(InputSections)) {
     SyntheticSection *SS = dyn_cast<SyntheticSection>(S);
     if (!SS)
       return;
     OutputSection *OS = SS->getParent();
     if (!SS->empty() || !OS)
       continue;
 
     std::vector<BaseCommand *>::iterator Empty = OS->SectionCommands.end();
     for (auto I = OS->SectionCommands.begin(), E = OS->SectionCommands.end();
          I != E; ++I) {
       BaseCommand *B = *I;
       if (auto *ISD = dyn_cast<InputSectionDescription>(B)) {
         llvm::erase_if(ISD->Sections,
                        [=](InputSection *IS) { return IS == SS; });
         if (ISD->Sections.empty())
           Empty = I;
       }
     }
     if (Empty != OS->SectionCommands.end())
       OS->SectionCommands.erase(Empty);
 
     // If there are no other sections in the output section, remove it from the
     // output.
     if (OS->SectionCommands.empty())
       OS->Live = false;
   }
 }
 
 // Returns true if a symbol can be replaced at load-time by a symbol
 // with the same name defined in other ELF executable or DSO.
 static bool computeIsPreemptible(const Symbol &B) {
   assert(!B.isLocal());
   // Only symbols that appear in dynsym can be preempted.
   if (!B.includeInDynsym())
     return false;
 
   // Only default visibility symbols can be preempted.
   if (B.Visibility != STV_DEFAULT)
     return false;
 
   // At this point copy relocations have not been created yet, so any
   // symbol that is not defined locally is preemptible.
   if (!B.isDefined())
     return true;
 
   // If we have a dynamic list it specifies which local symbols are preemptible.
   if (Config->HasDynamicList)
     return false;
 
   if (!Config->Shared)
     return false;
 
   // -Bsymbolic means that definitions are not preempted.
   if (Config->Bsymbolic || (Config->BsymbolicFunctions && B.isFunc()))
     return false;
   return true;
 }
 
 // Create output section objects and add them to OutputSections.
 template <class ELFT> void Writer<ELFT>::finalizeSections() {
   Out::DebugInfo = findSection(".debug_info");
   Out::PreinitArray = findSection(".preinit_array");
   Out::InitArray = findSection(".init_array");
   Out::FiniArray = findSection(".fini_array");
 
   // The linker needs to define SECNAME_start, SECNAME_end and SECNAME_stop
   // symbols for sections, so that the runtime can get the start and end
   // addresses of each section by section name. Add such symbols.
   if (!Config->Relocatable) {
     addStartEndSymbols();
     for (BaseCommand *Base : Script->SectionCommands)
       if (auto *Sec = dyn_cast<OutputSection>(Base))
         addStartStopSymbols(Sec);
   }
 
   // Add _DYNAMIC symbol. Unlike GNU gold, our _DYNAMIC symbol has no type.
   // It should be okay as no one seems to care about the type.
   // Even the author of gold doesn't remember why gold behaves that way.
   // https://sourceware.org/ml/binutils/2002-03/msg00360.html
   if (InX::DynSymTab)
     Symtab->addRegular("_DYNAMIC", STV_HIDDEN, STT_NOTYPE, 0 /*Value*/,
                        /*Size=*/0, STB_WEAK, InX::Dynamic,
                        /*File=*/nullptr);
 
   // Define __rel[a]_iplt_{start,end} symbols if needed.
   addRelIpltSymbols();
 
   // This responsible for splitting up .eh_frame section into
   // pieces. The relocation scan uses those pieces, so this has to be
   // earlier.
   applySynthetic({InX::EhFrame},
                  [](SyntheticSection *SS) { SS->finalizeContents(); });
 
   for (Symbol *S : Symtab->getSymbols())
     S->IsPreemptible |= computeIsPreemptible(*S);
 
   // Scan relocations. This must be done after every symbol is declared so that
   // we can correctly decide if a dynamic relocation is needed.
   if (!Config->Relocatable)
     forEachRelSec(scanRelocations<ELFT>);
 
   if (InX::Plt && !InX::Plt->empty())
     InX::Plt->addSymbols();
   if (InX::Iplt && !InX::Iplt->empty())
     InX::Iplt->addSymbols();
 
   // Now that we have defined all possible global symbols including linker-
   // synthesized ones. Visit all symbols to give the finishing touches.
   for (Symbol *Sym : Symtab->getSymbols()) {
     if (!includeInSymtab(*Sym))
       continue;
     if (InX::SymTab)
       InX::SymTab->addSymbol(Sym);
 
     if (InX::DynSymTab && Sym->includeInDynsym()) {
       InX::DynSymTab->addSymbol(Sym);
       if (auto *SS = dyn_cast<SharedSymbol>(Sym))
         if (cast<SharedFile<ELFT>>(Sym->File)->IsNeeded)
           In<ELFT>::VerNeed->addSymbol(SS);
     }
   }
 
   // Do not proceed if there was an undefined symbol.
   if (errorCount())
     return;
 
   removeUnusedSyntheticSections();
 
   sortSections();
   Script->removeEmptyCommands();
 
   // Now that we have the final list, create a list of all the
   // OutputSections for convenience.
   for (BaseCommand *Base : Script->SectionCommands)
     if (auto *Sec = dyn_cast<OutputSection>(Base))
       OutputSections.push_back(Sec);
 
   // Prefer command line supplied address over other constraints.
   for (OutputSection *Sec : OutputSections) {
     auto I = Config->SectionStartMap.find(Sec->Name);
     if (I != Config->SectionStartMap.end())
       Sec->AddrExpr = [=] { return I->second; };
   }
 
   // This is a bit of a hack. A value of 0 means undef, so we set it
   // to 1 t make __ehdr_start defined. The section number is not
   // particularly relevant.
   Out::ElfHeader->SectionIndex = 1;
 
   unsigned I = 1;
   for (OutputSection *Sec : OutputSections) {
     Sec->SectionIndex = I++;
     Sec->ShName = InX::ShStrTab->addString(Sec->Name);
   }
 
   // Binary and relocatable output does not have PHDRS.
   // The headers have to be created before finalize as that can influence the
   // image base and the dynamic section on mips includes the image base.
   if (!Config->Relocatable && !Config->OFormatBinary) {
     Phdrs = Script->hasPhdrsCommands() ? Script->createPhdrs() : createPhdrs();
     addPtArmExid(Phdrs);
     Out::ProgramHeaders->Size = sizeof(Elf_Phdr) * Phdrs.size();
   }
 
   // Some symbols are defined in term of program headers. Now that we
   // have the headers, we can find out which sections they point to.
   setReservedSymbolSections();
 
   // Dynamic section must be the last one in this list and dynamic
   // symbol table section (DynSymTab) must be the first one.
   applySynthetic(
       {InX::DynSymTab,   InX::Bss,          InX::BssRelRo, InX::GnuHashTab,
        InX::HashTab,     InX::SymTab,       InX::ShStrTab, InX::StrTab,
        In<ELFT>::VerDef, InX::DynStrTab,    InX::Got,      InX::MipsGot,
        InX::IgotPlt,     InX::GotPlt,       InX::RelaDyn,  InX::RelaIplt,
        InX::RelaPlt,     InX::Plt,          InX::Iplt,     InX::EhFrameHdr,
        In<ELFT>::VerSym, In<ELFT>::VerNeed, InX::Dynamic},
       [](SyntheticSection *SS) { SS->finalizeContents(); });
 
   if (!Script->HasSectionsCommand && !Config->Relocatable)
     fixSectionAlignments();
 
   // After link order processing .ARM.exidx sections can be deduplicated, which
   // needs to be resolved before any other address dependent operation.
   resolveShfLinkOrder();
 
   // Some architectures need to generate content that depends on the address
   // of InputSections. For example some architectures use small displacements
   // for jump instructions that is is the linker's responsibility for creating
   // range extension thunks for. As the generation of the content may also
   // alter InputSection addresses we must converge to a fixed point.
   if (Target->NeedsThunks || Config->AndroidPackDynRelocs) {
     ThunkCreator TC;
     AArch64Err843419Patcher A64P;
     bool Changed;
     do {
       Script->assignAddresses();
       Changed = false;
       if (Target->NeedsThunks)
         Changed |= TC.createThunks(OutputSections);
       if (Config->FixCortexA53Errata843419) {
         if (Changed)
           Script->assignAddresses();
         Changed |= A64P.createFixes();
       }
       if (InX::MipsGot)
         InX::MipsGot->updateAllocSize();
       Changed |= InX::RelaDyn->updateAllocSize();
     } while (Changed);
   }
 
   // Fill other section headers. The dynamic table is finalized
   // at the end because some tags like RELSZ depend on result
   // of finalizing other sections.
   for (OutputSection *Sec : OutputSections)
     Sec->finalize<ELFT>();
 
   // createThunks may have added local symbols to the static symbol table
   applySynthetic({InX::SymTab},
                  [](SyntheticSection *SS) { SS->postThunkContents(); });
 }
 
 // The linker is expected to define SECNAME_start and SECNAME_end
 // symbols for a few sections. This function defines them.
 template <class ELFT> void Writer<ELFT>::addStartEndSymbols() {
   auto Define = [&](StringRef Start, StringRef End, OutputSection *OS) {
     // These symbols resolve to the image base if the section does not exist.
     // A special value -1 indicates end of the section.
     if (OS) {
       addOptionalRegular(Start, OS, 0);
       addOptionalRegular(End, OS, -1);
     } else {
       if (Config->Pic)
         OS = Out::ElfHeader;
       addOptionalRegular(Start, OS, 0);
       addOptionalRegular(End, OS, 0);
     }
   };
 
   Define("__preinit_array_start", "__preinit_array_end", Out::PreinitArray);
   Define("__init_array_start", "__init_array_end", Out::InitArray);
   Define("__fini_array_start", "__fini_array_end", Out::FiniArray);
 
   if (OutputSection *Sec = findSection(".ARM.exidx"))
     Define("__exidx_start", "__exidx_end", Sec);
 }
 
 // If a section name is valid as a C identifier (which is rare because of
 // the leading '.'), linkers are expected to define __start_<secname> and
 // __stop_<secname> symbols. They are at beginning and end of the section,
 // respectively. This is not requested by the ELF standard, but GNU ld and
 // gold provide the feature, and used by many programs.
 template <class ELFT>
 void Writer<ELFT>::addStartStopSymbols(OutputSection *Sec) {
   StringRef S = Sec->Name;
   if (!isValidCIdentifier(S))
     return;
   addOptionalRegular(Saver.save("__start_" + S), Sec, 0, STV_DEFAULT);
   addOptionalRegular(Saver.save("__stop_" + S), Sec, -1, STV_DEFAULT);
 }
 
 static bool needsPtLoad(OutputSection *Sec) {
   if (!(Sec->Flags & SHF_ALLOC))
     return false;
 
   // Don't allocate VA space for TLS NOBITS sections. The PT_TLS PHDR is
   // responsible for allocating space for them, not the PT_LOAD that
   // contains the TLS initialization image.
   if (Sec->Flags & SHF_TLS && Sec->Type == SHT_NOBITS)
     return false;
   return true;
 }
 
 // Linker scripts are responsible for aligning addresses. Unfortunately, most
 // linker scripts are designed for creating two PT_LOADs only, one RX and one
 // RW. This means that there is no alignment in the RO to RX transition and we
 // cannot create a PT_LOAD there.
 static uint64_t computeFlags(uint64_t Flags) {
   if (Config->Omagic)
     return PF_R | PF_W | PF_X;
   if (Config->SingleRoRx && !(Flags & PF_W))
     return Flags | PF_X;
   return Flags;
 }
 
 // Decide which program headers to create and which sections to include in each
 // one.
 template <class ELFT> std::vector<PhdrEntry *> Writer<ELFT>::createPhdrs() {
   std::vector<PhdrEntry *> Ret;
   auto AddHdr = [&](unsigned Type, unsigned Flags) -> PhdrEntry * {
     Ret.push_back(make<PhdrEntry>(Type, Flags));
     return Ret.back();
   };
 
   // The first phdr entry is PT_PHDR which describes the program header itself.
   AddHdr(PT_PHDR, PF_R)->add(Out::ProgramHeaders);
 
   // PT_INTERP must be the second entry if exists.
   if (OutputSection *Cmd = findSection(".interp"))
     AddHdr(PT_INTERP, Cmd->getPhdrFlags())->add(Cmd);
 
   // Add the first PT_LOAD segment for regular output sections.
   uint64_t Flags = computeFlags(PF_R);
   PhdrEntry *Load = AddHdr(PT_LOAD, Flags);
 
   // Add the headers. We will remove them if they don't fit.
   Load->add(Out::ElfHeader);
   Load->add(Out::ProgramHeaders);
 
   for (OutputSection *Sec : OutputSections) {
     if (!(Sec->Flags & SHF_ALLOC))
       break;
     if (!needsPtLoad(Sec))
       continue;
 
     // Segments are contiguous memory regions that has the same attributes
     // (e.g. executable or writable). There is one phdr for each segment.
     // Therefore, we need to create a new phdr when the next section has
     // different flags or is loaded at a discontiguous address using AT linker
     // script command.
     uint64_t NewFlags = computeFlags(Sec->getPhdrFlags());
-    if (Sec->LMAExpr || Flags != NewFlags) {
+    if ((Sec->LMAExpr && Load->ASectionHasLMA) ||
+        Sec->MemRegion != Load->FirstSec->MemRegion || Flags != NewFlags) {
+
       Load = AddHdr(PT_LOAD, NewFlags);
       Flags = NewFlags;
     }
 
     Load->add(Sec);
   }
 
   // Add a TLS segment if any.
   PhdrEntry *TlsHdr = make<PhdrEntry>(PT_TLS, PF_R);
   for (OutputSection *Sec : OutputSections)
     if (Sec->Flags & SHF_TLS)
       TlsHdr->add(Sec);
   if (TlsHdr->FirstSec)
     Ret.push_back(TlsHdr);
 
   // Add an entry for .dynamic.
   if (InX::DynSymTab)
     AddHdr(PT_DYNAMIC, InX::Dynamic->getParent()->getPhdrFlags())
         ->add(InX::Dynamic->getParent());
 
   // PT_GNU_RELRO includes all sections that should be marked as
   // read-only by dynamic linker after proccessing relocations.
   // Current dynamic loaders only support one PT_GNU_RELRO PHDR, give
   // an error message if more than one PT_GNU_RELRO PHDR is required.
   PhdrEntry *RelRo = make<PhdrEntry>(PT_GNU_RELRO, PF_R);
   bool InRelroPhdr = false;
   bool IsRelroFinished = false;
   for (OutputSection *Sec : OutputSections) {
     if (!needsPtLoad(Sec))
       continue;
     if (isRelroSection(Sec)) {
       InRelroPhdr = true;
       if (!IsRelroFinished)
         RelRo->add(Sec);
       else
         error("section: " + Sec->Name + " is not contiguous with other relro" +
               " sections");
     } else if (InRelroPhdr) {
       InRelroPhdr = false;
       IsRelroFinished = true;
     }
   }
   if (RelRo->FirstSec)
     Ret.push_back(RelRo);
 
   // PT_GNU_EH_FRAME is a special section pointing on .eh_frame_hdr.
   if (!InX::EhFrame->empty() && InX::EhFrameHdr && InX::EhFrame->getParent() &&
       InX::EhFrameHdr->getParent())
     AddHdr(PT_GNU_EH_FRAME, InX::EhFrameHdr->getParent()->getPhdrFlags())
         ->add(InX::EhFrameHdr->getParent());
 
   // PT_OPENBSD_RANDOMIZE is an OpenBSD-specific feature. That makes
   // the dynamic linker fill the segment with random data.
   if (OutputSection *Cmd = findSection(".openbsd.randomdata"))
     AddHdr(PT_OPENBSD_RANDOMIZE, Cmd->getPhdrFlags())->add(Cmd);
 
   // PT_GNU_STACK is a special section to tell the loader to make the
   // pages for the stack non-executable. If you really want an executable
   // stack, you can pass -z execstack, but that's not recommended for
   // security reasons.
   unsigned Perm;
   if (Config->ZExecstack)
     Perm = PF_R | PF_W | PF_X;
   else
     Perm = PF_R | PF_W;
   AddHdr(PT_GNU_STACK, Perm)->p_memsz = Config->ZStackSize;
 
   // PT_OPENBSD_WXNEEDED is a OpenBSD-specific header to mark the executable
   // is expected to perform W^X violations, such as calling mprotect(2) or
   // mmap(2) with PROT_WRITE | PROT_EXEC, which is prohibited by default on
   // OpenBSD.
   if (Config->ZWxneeded)
     AddHdr(PT_OPENBSD_WXNEEDED, PF_X);
 
   // Create one PT_NOTE per a group of contiguous .note sections.
   PhdrEntry *Note = nullptr;
   for (OutputSection *Sec : OutputSections) {
     if (Sec->Type == SHT_NOTE) {
       if (!Note || Sec->LMAExpr)
         Note = AddHdr(PT_NOTE, PF_R);
       Note->add(Sec);
     } else {
       Note = nullptr;
     }
   }
   return Ret;
 }
 
 template <class ELFT>
 void Writer<ELFT>::addPtArmExid(std::vector<PhdrEntry *> &Phdrs) {
   if (Config->EMachine != EM_ARM)
     return;
   auto I = llvm::find_if(OutputSections, [](OutputSection *Cmd) {
     return Cmd->Type == SHT_ARM_EXIDX;
   });
   if (I == OutputSections.end())
     return;
 
   // PT_ARM_EXIDX is the ARM EHABI equivalent of PT_GNU_EH_FRAME
   PhdrEntry *ARMExidx = make<PhdrEntry>(PT_ARM_EXIDX, PF_R);
   ARMExidx->add(*I);
   Phdrs.push_back(ARMExidx);
 }
 
 // The first section of each PT_LOAD, the first section in PT_GNU_RELRO and the
 // first section after PT_GNU_RELRO have to be page aligned so that the dynamic
 // linker can set the permissions.
 template <class ELFT> void Writer<ELFT>::fixSectionAlignments() {
   auto PageAlign = [](OutputSection *Cmd) {
     if (Cmd && !Cmd->AddrExpr)
       Cmd->AddrExpr = [=] {
         return alignTo(Script->getDot(), Config->MaxPageSize);
       };
   };
 
   for (const PhdrEntry *P : Phdrs)
     if (P->p_type == PT_LOAD && P->FirstSec)
       PageAlign(P->FirstSec);
 
   for (const PhdrEntry *P : Phdrs) {
     if (P->p_type != PT_GNU_RELRO)
       continue;
     if (P->FirstSec)
       PageAlign(P->FirstSec);
     // Find the first section after PT_GNU_RELRO. If it is in a PT_LOAD we
     // have to align it to a page.
     auto End = OutputSections.end();
     auto I = std::find(OutputSections.begin(), End, P->LastSec);
     if (I == End || (I + 1) == End)
       continue;
     OutputSection *Cmd = (*(I + 1));
     if (needsPtLoad(Cmd))
       PageAlign(Cmd);
   }
 }
 
 // Adjusts the file alignment for a given output section and returns
 // its new file offset. The file offset must be the same with its
 // virtual address (modulo the page size) so that the loader can load
 // executables without any address adjustment.
 static uint64_t getFileAlignment(uint64_t Off, OutputSection *Cmd) {
   OutputSection *First = Cmd->PtLoad ? Cmd->PtLoad->FirstSec : nullptr;
   // The first section in a PT_LOAD has to have congruent offset and address
   // module the page size.
   if (Cmd == First)
     return alignTo(Off, std::max<uint64_t>(Cmd->Alignment, Config->MaxPageSize),
                    Cmd->Addr);
 
   // For SHT_NOBITS we don't want the alignment of the section to impact the
   // offset of the sections that follow. Since nothing seems to care about the
   // sh_offset of the SHT_NOBITS section itself, just ignore it.
   if (Cmd->Type == SHT_NOBITS)
     return Off;
 
   // If the section is not in a PT_LOAD, we just have to align it.
   if (!Cmd->PtLoad)
     return alignTo(Off, Cmd->Alignment);
 
   // If two sections share the same PT_LOAD the file offset is calculated
   // using this formula: Off2 = Off1 + (VA2 - VA1).
   return First->Offset + Cmd->Addr - First->Addr;
 }
 
 static uint64_t setOffset(OutputSection *Cmd, uint64_t Off) {
   Off = getFileAlignment(Off, Cmd);
   Cmd->Offset = Off;
 
   // For SHT_NOBITS we should not count the size.
   if (Cmd->Type == SHT_NOBITS)
     return Off;
 
   return Off + Cmd->Size;
 }
 
 template <class ELFT> void Writer<ELFT>::assignFileOffsetsBinary() {
   uint64_t Off = 0;
   for (OutputSection *Sec : OutputSections)
     if (Sec->Flags & SHF_ALLOC)
       Off = setOffset(Sec, Off);
   FileSize = alignTo(Off, Config->Wordsize);
 }
 
 // Assign file offsets to output sections.
 template <class ELFT> void Writer<ELFT>::assignFileOffsets() {
   uint64_t Off = 0;
   Off = setOffset(Out::ElfHeader, Off);
   Off = setOffset(Out::ProgramHeaders, Off);
 
   PhdrEntry *LastRX = nullptr;
   for (PhdrEntry *P : Phdrs)
     if (P->p_type == PT_LOAD && (P->p_flags & PF_X))
       LastRX = P;
 
   for (OutputSection *Sec : OutputSections) {
     Off = setOffset(Sec, Off);
     if (Script->HasSectionsCommand)
       continue;
     // If this is a last section of the last executable segment and that
     // segment is the last loadable segment, align the offset of the
     // following section to avoid loading non-segments parts of the file.
     if (LastRX && LastRX->LastSec == Sec)
       Off = alignTo(Off, Target->PageSize);
   }
 
   SectionHeaderOff = alignTo(Off, Config->Wordsize);
   FileSize = SectionHeaderOff + (OutputSections.size() + 1) * sizeof(Elf_Shdr);
 }
 
 // Finalize the program headers. We call this function after we assign
 // file offsets and VAs to all sections.
 template <class ELFT> void Writer<ELFT>::setPhdrs() {
   for (PhdrEntry *P : Phdrs) {
     OutputSection *First = P->FirstSec;
     OutputSection *Last = P->LastSec;
     if (First) {
       P->p_filesz = Last->Offset - First->Offset;
       if (Last->Type != SHT_NOBITS)
         P->p_filesz += Last->Size;
       P->p_memsz = Last->Addr + Last->Size - First->Addr;
       P->p_offset = First->Offset;
       P->p_vaddr = First->Addr;
       if (!P->HasLMA)
         P->p_paddr = First->getLMA();
     }
     if (P->p_type == PT_LOAD)
       P->p_align = std::max<uint64_t>(P->p_align, Config->MaxPageSize);
     else if (P->p_type == PT_GNU_RELRO) {
       P->p_align = 1;
       // The glibc dynamic loader rounds the size down, so we need to round up
       // to protect the last page. This is a no-op on FreeBSD which always
       // rounds up.
       P->p_memsz = alignTo(P->p_memsz, Target->PageSize);
     }
 
     // The TLS pointer goes after PT_TLS. At least glibc will align it,
     // so round up the size to make sure the offsets are correct.
     if (P->p_type == PT_TLS) {
       Out::TlsPhdr = P;
       if (P->p_memsz)
         P->p_memsz = alignTo(P->p_memsz, P->p_align);
     }
   }
 }
 
 // The entry point address is chosen in the following ways.
 //
 // 1. the '-e' entry command-line option;
 // 2. the ENTRY(symbol) command in a linker control script;
 // 3. the value of the symbol _start, if present;
 // 4. the number represented by the entry symbol, if it is a number;
 // 5. the address of the first byte of the .text section, if present;
 // 6. the address 0.
 template <class ELFT> uint64_t Writer<ELFT>::getEntryAddr() {
   // Case 1, 2 or 3
   if (Symbol *B = Symtab->find(Config->Entry))
     return B->getVA();
 
   // Case 4
   uint64_t Addr;
   if (to_integer(Config->Entry, Addr))
     return Addr;
 
   // Case 5
   if (OutputSection *Sec = findSection(".text")) {
     if (Config->WarnMissingEntry)
       warn("cannot find entry symbol " + Config->Entry + "; defaulting to 0x" +
            utohexstr(Sec->Addr));
     return Sec->Addr;
   }
 
   // Case 6
   if (Config->WarnMissingEntry)
     warn("cannot find entry symbol " + Config->Entry +
          "; not setting start address");
   return 0;
 }
 
 static uint16_t getELFType() {
   if (Config->Pic)
     return ET_DYN;
   if (Config->Relocatable)
     return ET_REL;
   return ET_EXEC;
 }
 
 template <class ELFT> void Writer<ELFT>::writeHeader() {
   uint8_t *Buf = Buffer->getBufferStart();
   memcpy(Buf, "\177ELF", 4);
 
   // Write the ELF header.
   auto *EHdr = reinterpret_cast<Elf_Ehdr *>(Buf);
   EHdr->e_ident[EI_CLASS] = Config->Is64 ? ELFCLASS64 : ELFCLASS32;
   EHdr->e_ident[EI_DATA] = Config->IsLE ? ELFDATA2LSB : ELFDATA2MSB;
   EHdr->e_ident[EI_VERSION] = EV_CURRENT;
   EHdr->e_ident[EI_OSABI] = Config->OSABI;
   EHdr->e_type = getELFType();
   EHdr->e_machine = Config->EMachine;
   EHdr->e_version = EV_CURRENT;
   EHdr->e_entry = getEntryAddr();
   EHdr->e_shoff = SectionHeaderOff;
   EHdr->e_flags = Config->EFlags;
   EHdr->e_ehsize = sizeof(Elf_Ehdr);
   EHdr->e_phnum = Phdrs.size();
   EHdr->e_shentsize = sizeof(Elf_Shdr);
   EHdr->e_shnum = OutputSections.size() + 1;
   EHdr->e_shstrndx = InX::ShStrTab->getParent()->SectionIndex;
 
   if (!Config->Relocatable) {
     EHdr->e_phoff = sizeof(Elf_Ehdr);
     EHdr->e_phentsize = sizeof(Elf_Phdr);
   }
 
   // Write the program header table.
   auto *HBuf = reinterpret_cast<Elf_Phdr *>(Buf + EHdr->e_phoff);
   for (PhdrEntry *P : Phdrs) {
     HBuf->p_type = P->p_type;
     HBuf->p_flags = P->p_flags;
     HBuf->p_offset = P->p_offset;
     HBuf->p_vaddr = P->p_vaddr;
     HBuf->p_paddr = P->p_paddr;
     HBuf->p_filesz = P->p_filesz;
     HBuf->p_memsz = P->p_memsz;
     HBuf->p_align = P->p_align;
     ++HBuf;
   }
 
   // Write the section header table. Note that the first table entry is null.
   auto *SHdrs = reinterpret_cast<Elf_Shdr *>(Buf + EHdr->e_shoff);
   for (OutputSection *Sec : OutputSections)
     Sec->writeHeaderTo<ELFT>(++SHdrs);
 }
 
 // Open a result file.
 template <class ELFT> void Writer<ELFT>::openFile() {
   if (!Config->Is64 && FileSize > UINT32_MAX) {
     error("output file too large: " + Twine(FileSize) + " bytes");
     return;
   }
 
   unlinkAsync(Config->OutputFile);
   unsigned Flags = 0;
   if (!Config->Relocatable)
     Flags = FileOutputBuffer::F_executable;
   Expected<std::unique_ptr<FileOutputBuffer>> BufferOrErr =
       FileOutputBuffer::create(Config->OutputFile, FileSize, Flags);
 
   if (!BufferOrErr)
     error("failed to open " + Config->OutputFile + ": " +
           llvm::toString(BufferOrErr.takeError()));
   else
     Buffer = std::move(*BufferOrErr);
 }
 
 template <class ELFT> void Writer<ELFT>::writeSectionsBinary() {
   uint8_t *Buf = Buffer->getBufferStart();
   for (OutputSection *Sec : OutputSections)
     if (Sec->Flags & SHF_ALLOC)
       Sec->writeTo<ELFT>(Buf + Sec->Offset);
 }
 
 static void fillTrap(uint8_t *I, uint8_t *End) {
   for (; I + 4 <= End; I += 4)
     memcpy(I, &Target->TrapInstr, 4);
 }
 
 // Fill the last page of executable segments with trap instructions
 // instead of leaving them as zero. Even though it is not required by any
 // standard, it is in general a good thing to do for security reasons.
 //
 // We'll leave other pages in segments as-is because the rest will be
 // overwritten by output sections.
 template <class ELFT> void Writer<ELFT>::writeTrapInstr() {
   if (Script->HasSectionsCommand)
     return;
 
   // Fill the last page.
   uint8_t *Buf = Buffer->getBufferStart();
   for (PhdrEntry *P : Phdrs)
     if (P->p_type == PT_LOAD && (P->p_flags & PF_X))
       fillTrap(Buf + alignDown(P->p_offset + P->p_filesz, Target->PageSize),
                Buf + alignTo(P->p_offset + P->p_filesz, Target->PageSize));
 
   // Round up the file size of the last segment to the page boundary iff it is
   // an executable segment to ensure that other tools don't accidentally
   // trim the instruction padding (e.g. when stripping the file).
   PhdrEntry *Last = nullptr;
   for (PhdrEntry *P : Phdrs)
     if (P->p_type == PT_LOAD)
       Last = P;
 
   if (Last && (Last->p_flags & PF_X))
     Last->p_memsz = Last->p_filesz = alignTo(Last->p_filesz, Target->PageSize);
 }
 
 // Write section contents to a mmap'ed file.
 template <class ELFT> void Writer<ELFT>::writeSections() {
   uint8_t *Buf = Buffer->getBufferStart();
 
   // PPC64 needs to process relocations in the .opd section
   // before processing relocations in code-containing sections.
   if (auto *OpdCmd = findSection(".opd")) {
     Out::Opd = OpdCmd;
     Out::OpdBuf = Buf + Out::Opd->Offset;
     OpdCmd->template writeTo<ELFT>(Buf + Out::Opd->Offset);
   }
 
   OutputSection *EhFrameHdr = nullptr;
   if (InX::EhFrameHdr && !InX::EhFrameHdr->empty())
     EhFrameHdr = InX::EhFrameHdr->getParent();
 
   // In -r or -emit-relocs mode, write the relocation sections first as in
   // ELf_Rel targets we might find out that we need to modify the relocated
   // section while doing it.
   for (OutputSection *Sec : OutputSections)
     if (Sec->Type == SHT_REL || Sec->Type == SHT_RELA)
       Sec->writeTo<ELFT>(Buf + Sec->Offset);
 
   for (OutputSection *Sec : OutputSections)
     if (Sec != Out::Opd && Sec != EhFrameHdr && Sec->Type != SHT_REL &&
         Sec->Type != SHT_RELA)
       Sec->writeTo<ELFT>(Buf + Sec->Offset);
 
   // The .eh_frame_hdr depends on .eh_frame section contents, therefore
   // it should be written after .eh_frame is written.
   if (EhFrameHdr)
     EhFrameHdr->writeTo<ELFT>(Buf + EhFrameHdr->Offset);
 }
 
 template <class ELFT> void Writer<ELFT>::writeBuildId() {
   if (!InX::BuildId || !InX::BuildId->getParent())
     return;
 
   // Compute a hash of all sections of the output file.
   uint8_t *Start = Buffer->getBufferStart();
   uint8_t *End = Start + FileSize;
   InX::BuildId->writeBuildId({Start, End});
 }
 
 template void elf::writeResult<ELF32LE>();
 template void elf::writeResult<ELF32BE>();
 template void elf::writeResult<ELF64LE>();
 template void elf::writeResult<ELF64BE>();
Index: vendor/lld/dist-release_60/ELF/Writer.h
===================================================================
--- vendor/lld/dist-release_60/ELF/Writer.h	(revision 328744)
+++ vendor/lld/dist-release_60/ELF/Writer.h	(revision 328745)
@@ -1,63 +1,70 @@
 //===- Writer.h -------------------------------------------------*- C++ -*-===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLD_ELF_WRITER_H
 #define LLD_ELF_WRITER_H
 
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/StringRef.h"
 #include <cstdint>
 #include <memory>
 
 namespace lld {
 namespace elf {
 class InputFile;
 class OutputSection;
 class InputSectionBase;
 template <class ELFT> class ObjFile;
 class SymbolTable;
 template <class ELFT> void writeResult();
 template <class ELFT> void markLive();
 
 // This describes a program header entry.
 // Each contains type, access flags and range of output sections that will be
 // placed in it.
 struct PhdrEntry {
   PhdrEntry(unsigned Type, unsigned Flags) : p_type(Type), p_flags(Flags) {}
   void add(OutputSection *Sec);
 
   uint64_t p_paddr = 0;
   uint64_t p_vaddr = 0;
   uint64_t p_memsz = 0;
   uint64_t p_filesz = 0;
   uint64_t p_offset = 0;
   uint32_t p_align = 0;
   uint32_t p_type = 0;
   uint32_t p_flags = 0;
 
   OutputSection *FirstSec = nullptr;
   OutputSection *LastSec = nullptr;
   bool HasLMA = false;
+
+  // True if one of the sections in this program header has a LMA specified via
+  // linker script: AT(addr). We never allow 2 or more sections with LMA in the
+  // same program header.
+  bool ASectionHasLMA = false;
+
+  uint64_t LMAOffset = 0;
 };
 
 void addReservedSymbols();
 llvm::StringRef getOutputSectionName(InputSectionBase *S);
 
 template <class ELFT> uint32_t calcMipsEFlags();
 
 uint8_t getMipsFpAbiFlag(uint8_t OldFlag, uint8_t NewFlag,
                          llvm::StringRef FileName);
 
 bool isMipsN32Abi(const InputFile *F);
 bool isMicroMips();
 bool isMipsR6();
 } // namespace elf
 } // namespace lld
 
 #endif
Index: vendor/lld/dist-release_60/test/ELF/linkerscript/at3.s
===================================================================
--- vendor/lld/dist-release_60/test/ELF/linkerscript/at3.s	(nonexistent)
+++ vendor/lld/dist-release_60/test/ELF/linkerscript/at3.s	(revision 328745)
@@ -0,0 +1,38 @@
+# REQUIRES: x86
+# RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %s -o %t.o
+# RUN: echo "MEMORY {                                  \
+# RUN:   FOO   (ax) : ORIGIN = 0x1000, LENGTH = 0x100  \
+# RUN:   BAR   (ax) : ORIGIN = 0x2000, LENGTH = 0x100  \
+# RUN:   ZED   (ax) : ORIGIN = 0x3000, LENGTH = 0x100  \
+# RUN:   FLASH (ax) : ORIGIN = 0x6000, LENGTH = 0x200  \
+# RUN: }                                               \
+# RUN: SECTIONS {                                      \
+# RUN:  .foo1 : { *(.foo1) }            > FOO AT>FLASH \
+# RUN:  .foo2 : { *(.foo2) BYTE(0x42) } > BAR AT>FLASH \
+# RUN:  .foo3 : { *(.foo3) }            > ZED AT>FLASH \
+# RUN: }" > %t.script
+# RUN: ld.lld %t.o --script %t.script -o %t
+# RUN: llvm-readelf -sections -program-headers %t | FileCheck %s
+
+# CHECK: .foo1             PROGBITS        0000000000001000 001000
+# CHECK: .foo2             PROGBITS        0000000000002000 002000
+# CHECK: .foo3             PROGBITS        0000000000003000 003000
+
+# CHECK: Program Headers:
+# CHECK-NOT: LOAD
+
+# CHECK:      Type  Offset   VirtAddr           PhysAddr
+# CHECK-NEXT: LOAD  0x001000 0x0000000000001000 0x0000000000006000
+# CHECK-NEXT: LOAD  0x002000 0x0000000000002000 0x0000000000006008
+# CHECK-NEXT: LOAD  0x003000 0x0000000000003000 0x0000000000006011
+
+# CHECK-NOT: LOAD
+
+.section .foo1, "a"
+.quad 0
+
+.section .foo2, "ax"
+.quad 0
+
+.section .foo3, "ax"
+.quad 0

Property changes on: vendor/lld/dist-release_60/test/ELF/linkerscript/at3.s
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+FreeBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Index: vendor/lld/dist-release_60/test/ELF/linkerscript/merge-header-load.s
===================================================================
--- vendor/lld/dist-release_60/test/ELF/linkerscript/merge-header-load.s	(nonexistent)
+++ vendor/lld/dist-release_60/test/ELF/linkerscript/merge-header-load.s	(revision 328745)
@@ -0,0 +1,21 @@
+# REQUIRES: x86
+# RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %s -o %t.o
+# RUN: echo "SECTIONS {                  \
+# RUN:  . = 0xffffffff80000200;          \
+# RUN:  .text : AT (0x4200) { *(.text) } \
+# RUN: }" > %t.script
+# RUN: ld.lld %t.o --script %t.script -o %t
+# RUN: llvm-readelf -program-headers %t | FileCheck %s
+
+# Test that we put the header in the first PT_LOAD. We used to create a PT_LOAD
+# just for it and it would have a different virtual to physical address delta.
+
+# CHECK: Program Headers:
+# CHECK:      Type  Offset   VirtAddr           PhysAddr
+# CHECK-NEXT: PHDR  0x000040 0xffffffff80000040 0x0000000000004040
+# CHECK-NEXT: LOAD  0x000000 0xffffffff80000000 0x0000000000004000
+# CHECK-NOT:  LOAD
+
+.global _start
+_start:
+nop

Property changes on: vendor/lld/dist-release_60/test/ELF/linkerscript/merge-header-load.s
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+FreeBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property