Index: head/share/man/man9/bhnd.9 =================================================================== --- head/share/man/man9/bhnd.9 (revision 326291) +++ head/share/man/man9/bhnd.9 (revision 326292) @@ -1,2644 +1,2651 @@ .\" Copyright (c) 2015-2016 Landon Fuller .\" Copyright (c) 2017 The FreeBSD Foundation .\" All rights reserved. .\" .\" Portions of this documentation were written by Landon Fuller .\" under sponsorship from the FreeBSD Foundation. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" .\" $FreeBSD$ .\" .Dd November 9, 2017 .Dt BHND 9 .Os .Sh NAME .Nm bhnd .Nd BHND driver programming interface .Sh SYNOPSIS .In dev/bhnd/bhnd.h .\" .Ss Bus Resource Functions .Ft int .Fo bhnd_activate_resource .Fa "device_t dev" "int type" "int rid" "struct bhnd_resource *r" .Fc .Ft "struct bhnd_resource *" .Fo bhnd_alloc_resource .Fa "device_t dev" "int type" "int *rid" "rman_res_t start" "rman_res_t end" .Fa "rman_res_t count" "u_int flags" .Fc .Ft "struct bhnd_resource *" .Fo bhnd_alloc_resource_any .Fa "device_t dev" "int type" "int *rid" "u_int flags" .Fc .Ft int .Fo bhnd_alloc_resources .Fa "device_t dev" "struct resource_spec *rs" "struct bhnd_resource **res" .Fc .Ft int .Fo bhnd_deactivate_resource .Fa "device_t dev" "int type" "int rid" "struct bhnd_resource *r" .Fc .Ft int .Fo bhnd_release_resource .Fa "device_t dev" "int type" "int rid" "struct bhnd_resource *r" .Fc .Ft void .Fo bhnd_release_resources .Fa "device_t dev" "const struct resource_spec *rs" .Fa "struct bhnd_resource **res" .Fc .\" .Ss "Bus Space Functions" .Ft void .Fo bhnd_bus_barrier .Fa "struct bhnd_resource *r" "bus_size_t offset" .Fa "bus_size_t length" "int flags" .Fc .Ft uint8_t .Fn bhnd_bus_read_1 "struct bhnd_resource *r" "bus_size_t offset" .Ft uint16_t .Fn bhnd_bus_read_2 "struct bhnd_resource *r" "bus_size_t offset" .Ft uint32_t .Fn bhnd_bus_read_4 "struct bhnd_resource *r" "bus_size_t offset" .Ft void .Fo bhnd_bus_read_multi_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_multi_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_multi_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_multi_stream_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_multi_stream_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_multi_stream_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_region_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_region_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_region_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_region_stream_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_region_stream_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_read_region_stream_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fn bhnd_bus_read_stream_1 "struct bhnd_resource *r" "bus_size_t offset" .Ft void .Fn bhnd_bus_read_stream_2 "struct bhnd_resource *r" "bus_size_t offset" .Ft uint32_t .Fn bhnd_bus_read_stream_4 "struct bhnd_resource *r" "bus_size_t offset" .Ft void .Fo bhnd_bus_set_multi_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t value" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_set_multi_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t value" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_set_multi_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t value" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_set_region_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t value" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_set_region_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t value" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_set_region_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t value" .Fa "bus_size_t count" .Fc .Ft void .Fn bhnd_bus_write_1 "struct bhnd_resource *r" "uint8_t value" .Ft void .Fn bhnd_bus_write_2 "struct bhnd_resource *r" "uint16_t value" .Ft void .Fn bhnd_bus_write_4 "struct bhnd_resource *r" "uint32_t value" .Ft void .Fo bhnd_bus_write_multi_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_multi_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_multi_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_multi_stream_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_multi_stream_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_multi_stream_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_region_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_region_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_region_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_region_stream_1 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_region_stream_2 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fo bhnd_bus_write_region_stream_4 .Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" .Fa "bus_size_t count" .Fc .Ft void .Fn bhnd_bus_write_stream_1 "struct bhnd_resource *r" "uint8_t value" .Ft void .Fn bhnd_bus_write_stream_2 "struct bhnd_resource *r" "uint16_t value" .Ft void .Fn bhnd_bus_write_stream_4 "struct bhnd_resource *r" "uint32_t value" .\" .Ss "Device Configuration Functions" .Ft int .Fn bhnd_read_ioctl "device_t dev" "uint16_t *ioctl" .Ft int .Fn bhnd_write_ioctl "device_t dev" "uint16_t value" "uint16_t mask" .Ft int .Fn bhnd_read_iost "device_t dev" "uint16_t *iost" .Ft uint32_t .Fo bhnd_read_config .Fa "device_t dev" "bus_size_t offset" "void *value" "u_int width" .Fc .Ft int .Fo bhnd_write_config .Fa "device_t dev" "bus_size_t offset" "const void *value" "u_int width" .Fc .Ft int -.Fn bhnd_reset_hw "device_t dev" "uint16_t ioctl" +.Fn bhnd_reset_hw "device_t dev" "uint16_t ioctl" "uint16_t reset_ioctl" .Ft int -.Fn bhnd_suspend_hw "device_t dev" +.Fn bhnd_suspend_hw "device_t dev" "uint16_t ioctl" .Ft bool .Fn bhnd_is_hw_suspended "device_t dev" .\" .Ss "Device Information Functions" .Ft bhnd_attach_type .Fo bhnd_get_attach_type .Fa "device_t dev" .Fc .Ft "const struct bhnd_chipid *" .Fo bhnd_get_chipid .Fa "device_t dev" .Fc .Ft bhnd_devclass_t .Fo bhnd_get_class .Fa "device_t dev" .Fc .Ft u_int .Fo bhnd_get_core_index .Fa "device_t dev" .Fc .Ft "struct bhnd_core_info" .Fo bhnd_get_core_info .Fa "device_t dev" .Fc .Ft int .Fo bhnd_get_core_unit .Fa "device_t dev" .Fc .Ft uint16_t .Fo bhnd_get_device .Fa "device_t dev" .Fc .Ft const char * .Fo bhnd_get_device_name .Fa "device_t dev" .Fc .Ft uint8_t .Fo bhnd_get_hwrev .Fa "device_t dev" .Fc .Ft uint16_t .Fo bhnd_get_vendor .Fa "device_t dev" .Fc .Ft const char * .Fo bhnd_get_vendor_name .Fa "device_t dev" .Fc .Ft int .Fo bhnd_read_board_info .Fa "device_t dev" "struct bhnd_board_info *info" .Fc .\" .Ss "Device Matching Functions" .Ft bool .Fo bhnd_board_matches .Fa "const struct bhnd_board_info *board" "const struct bhnd_board_match *desc" .Fc .Ft device_t .Fo bhnd_bus_match_child .Fa "device_t bus" "const struct bhnd_core_match *desc" .Fc .Ft bool .Fo bhnd_chip_matches .Fa "const struct bhnd_chipid *chip" "const struct bhnd_chip_match *desc" .Fc .Ft "struct bhnd_core_match" .Fo bhnd_core_get_match_desc .Fa "const struct bhnd_core_info *core" .Fc .Ft bool .Fo bhnd_core_matches .Fa "const struct bhnd_core_info *core" "const struct bhnd_core_match *desc" .Fc .Ft bool .Fo bhnd_cores_equal .Fa "const struct bhnd_core_info *lhs" "const struct bhnd_core_info *rhs" .Fc .Ft bool .Fo bhnd_hwrev_matches .Fa "uint16_t hwrev" "const struct bhnd_hwrev_match *desc" .Fc .Ft "const struct bhnd_core_info *" .Fo bhnd_match_core .Fa "const struct bhnd_core_info *cores" "u_int num_cores" .Fa "const struct bhnd_core_match *desc" .Fc .\" .Ss "Device Table Functions" .Ft "const struct bhnd_device *" .Fo bhnd_device_lookup .Fa "device_t dev" "const struct bhnd_device *table" "size_t entry_size" .Fc .Ft bool .Fo bhnd_device_matches .Fa "device_t dev" "const struct bhnd_device_match *desc" .Fc .Ft uint32_t .Fo bhnd_device_quirks .Fa "device_t dev" "const struct bhnd_device *table" "size_t entry_size" .Fc .Fo BHND_BOARD_QUIRK .Fa "board" "flags" .Fc .Fo BHND_CHIP_QUIRK .Fa "chip" "hwrev" "flags" .Fc .Fo BHND_CORE_QUIRK .Fa "hwrev" "flags" .Fc .Fo BHND_DEVICE .Fa "vendor" "device" "desc" "quirks" "..." .Fc .Fo BHND_DEVICE_IS_END .Fa "struct bhnd_device *d" .Fc .Fo BHND_DEVICE_QUIRK_IS_END .Fa "struct bhnd_device_quirk *q" .Fc .Fo BHND_PKG_QUIRK .Fa "chip" "pkg" "flags" .Fc .Bd -literal struct bhnd_device_quirk { struct bhnd_device_match desc; uint32_t quirks; }; .Ed .Bd -literal struct bhnd_device { const struct bhnd_device_match core; const char *desc; const struct bhnd_device_quirk *quirks_table; uint32_t device_flags; }; .Ed .Bd -literal enum { BHND_DF_ANY = 0, BHND_DF_HOSTB = (1 << 0), BHND_DF_SOC = (1 << 1), BHND_DF_ADAPTER = (1 << 2) }; .Ed .Bd -literal #define BHND_DEVICE_END { { BHND_MATCH_ANY }, NULL, NULL, 0 } .Ed .Bd -literal #define BHND_DEVICE_QUIRK_END { { BHND_MATCH_ANY }, 0 } .Ed .\" .Ss "DMA Address Translation Functions" .Ft int .Fo bhnd_get_dma_translation .Fa "device_t dev" "u_int width" "uint32_t flags" "bus_dma_tag_t *dmat" .Fa "struct bhnd_dma_translation *translation" .Fc .Bd -literal struct bhnd_dma_translation { bhnd_addr_t base_addr; bhnd_addr_t addr_mask; bhnd_addr_t addrext_mask; uint32_t flags; }; .Ed .Bd -literal typedef enum { BHND_DMA_ADDR_30BIT = 30, BHND_DMA_ADDR_32BIT = 32, BHND_DMA_ADDR_64BIT = 64 } bhnd_dma_addrwidth; .Ed .Bd -literal enum bhnd_dma_translation_flags { BHND_DMA_TRANSLATION_PHYSMAP = (1<<0), BHND_DMA_TRANSLATION_BYTESWAPPED = (1<<1) }; .Ed .\" .Ss "Interrupt Functions" .Ft u_int .Fo bhnd_get_intr_count .Fa "device_t dev" .Fc .Ft int .Fo bhnd_get_intr_ivec .Fa "device_t dev" "u_int intr" "u_int *ivec" .Fc .Ft int .Fo bhnd_map_intr .Fa "device_t dev" "u_int intr" "rman_res_t *irq" .Fc .Ft void .Fo bhnd_unmap_intr .Fa "device_t dev" "rman_res_t irq" .Fc .\" .Ss "NVRAM Functions" .Ft int .Fo bhnd_nvram_getvar .Fa "device_t dev" "const char *name" "void *buf" "size_t *len" .Fa "bhnd_nvram_type type" .Fc .Ft int .Fo bhnd_nvram_getvar_array .Fa "device_t dev" "const char *name" "void *buf" "size_t size" .Fa "bhnd_nvram_type type" .Fc .Ft int .Fo bhnd_nvram_getvar_int .Fa "device_t dev" "const char *name" "void *value" "int width" .Fc .Ft int .Fn bhnd_nvram_getvar_int8 "device_t dev" "const char *name" "int8_t *value" .Ft int .Fn bhnd_nvram_getvar_int16 "device_t dev" "const char *name" "int16_t *value" .Ft int .Fn bhnd_nvram_getvar_int32 "device_t dev" "const char *name" "int32_t *value" .Ft int .Fo bhnd_nvram_getvar_uint .Fa "device_t dev" "const char *name" "void *value" "int width" .Fc .Ft int .Fo bhnd_nvram_getvar_uint8 .Fa "device_t dev" "const char *name" "uint8_t *value" .Fc .Ft int .Fo bhnd_nvram_getvar_uint16 .Fa "device_t dev" "const char *name" "uint16_t *value" .Fc .Ft int .Fo bhnd_nvram_getvar_uint32 .Fa "device_t dev" "const char *name" "uint32_t *value" .Fc .Ft int .Fo bhnd_nvram_getvar_str .Fa "device_t dev" "const char *name" "char *buf" "size_t len" "size_t *rlen" .Fc .Ft "const char *" .Fo bhnd_nvram_string_array_next .Fa "const char *inp" "size_t ilen" "const char *prev" "size_t *olen" .Fc .Bd -literal typedef enum { BHND_NVRAM_TYPE_UINT8 = 0, BHND_NVRAM_TYPE_UINT16 = 1, BHND_NVRAM_TYPE_UINT32 = 2, BHND_NVRAM_TYPE_UINT64 = 3, BHND_NVRAM_TYPE_INT8 = 4, BHND_NVRAM_TYPE_INT16 = 5, BHND_NVRAM_TYPE_INT32 = 6, BHND_NVRAM_TYPE_INT64 = 7, BHND_NVRAM_TYPE_CHAR = 8, BHND_NVRAM_TYPE_STRING = 9, BHND_NVRAM_TYPE_BOOL = 10, BHND_NVRAM_TYPE_NULL = 11, BHND_NVRAM_TYPE_DATA = 12 BHND_NVRAM_TYPE_UINT8_ARRAY = 16, BHND_NVRAM_TYPE_UINT16_ARRAY = 17, BHND_NVRAM_TYPE_UINT32_ARRAY = 18, BHND_NVRAM_TYPE_UINT64_ARRAY = 19, BHND_NVRAM_TYPE_INT8_ARRAY = 20, BHND_NVRAM_TYPE_INT16_ARRAY = 21, BHND_NVRAM_TYPE_INT32_ARRAY = 22, BHND_NVRAM_TYPE_INT64_ARRAY = 23, BHND_NVRAM_TYPE_CHAR_ARRAY = 24, BHND_NVRAM_TYPE_STRING_ARRAY = 25, BHND_NVRAM_TYPE_BOOL_ARRAY = 26 } bhnd_nvram_type; .Ed .\" .Ss "Port/Region Functions" .Ft int .Fo bhnd_decode_port_rid .Fa "device_t dev" "int type" "int rid" "bhnd_port_type *port_type" .Fa "u_int *port" "u_int *region" .Fc .Ft u_int .Fo bhnd_get_port_count .Fa "device_t dev" "bhnd_port_type type" .Fc .Ft int .Fo bhnd_get_port_rid .Fa "device_t dev" "bhnd_port_type type" "u_int port" "u_int region" .Fc .Ft int .Fo bhnd_get_region_addr .Fa "device_t dev" "bhnd_port_type port_type" "u_int port" "u_int region" .Fa "bhnd_addr_t *region_addr" "bhnd_size_t *region_size" .Fc .Ft u_int .Fo bhnd_get_region_count .Fa "device_t dev" "bhnd_port_type type" "u_int port" .Fc .Ft bool .Fo bhnd_is_region_valid .Fa "device_t dev" "bhnd_port_type type" "u_int port" "u_int region" .Fc .Bd -literal typedef enum { BHND_PORT_DEVICE = 0, BHND_PORT_BRIDGE = 1, BHND_PORT_AGENT = 2 } bhnd_port_type; .Ed .\" .Ss "Power Management Functions" .Ft int .Fo bhnd_alloc_pmu .Fa "device_t dev" .Fc .Ft int .Fo bhnd_release_pmu .Fa "device_t dev" .Fc .Ft int .Fo bhnd_enable_clocks .Fa "device_t dev" "uint32_t clocks" .Fc .Ft int .Fo bhnd_request_clock .Fa "device_t dev" "bhnd_clock clock" .Fc .Ft int .Fo bhnd_get_clock_freq .Fa "device_t dev" "bhnd_clock clock" "u_int *freq" .Fc .Ft int .Fo bhnd_get_clock_latency .Fa "device_t dev" "bhnd_clock clock" "u_int *latency" .Fc .Ft int .Fo bhnd_request_ext_rsrc .Fa "device_t dev" "u_int rsrc" .Fc .Ft int .Fo bhnd_release_ext_rsrc .Fa "device_t dev" "u_int rsrc" .Fc .Bd -literal typedef enum { BHND_CLOCK_DYN = (1 << 0), BHND_CLOCK_ILP = (1 << 1), BHND_CLOCK_ALP = (1 << 2), BHND_CLOCK_HT = (1 << 3) } bhnd_clock; .Ed .\" .Ss "Service Provider Functions" .Ft int .Fo bhnd_register_provider .Fa "device_t dev" "bhnd_service_t service" .Fc .Ft int .Fo bhnd_deregister_provider .Fa "device_t dev" "bhnd_service_t service" .Fc .Ft device_t .Fo bhnd_retain_provider .Fa "device_t dev" "bhnd_service_t service" .Fc .Ft void .Fo bhnd_release_provider .Fa "device_t dev" "device_t provider" "bhnd_service_t service" .Fc .Bd -literal typedef enum { BHND_SERVICE_CHIPC, BHND_SERVICE_PWRCTL, BHND_SERVICE_PMU, BHND_SERVICE_NVRAM, BHND_SERVICE_GPIO, BHND_SERVICE_ANY = 1000 } bhnd_service_t; .Ed .\" .Ss "Utility Functions" .Ft "bhnd_erom_class_t *" .Fo bhnd_driver_get_erom_class .Fa "driver_t *driver" .Fc .Ft bhnd_devclass_t .Fo bhnd_find_core_class .Fa "uint16_t vendor" "uint16_t device" .Fc .Ft "const char *" .Fo bhnd_find_core_name .Fa "uint16_t vendor" "uint16_t device" .Fc .Ft bhnd_devclass_t .Fo bhnd_core_class .Fa "const struct bhnd_core_info *ci" .Fc .Ft "const char *" .Fo bhnd_core_name .Fa "const struct bhnd_core_info *ci" .Fc .Ft int .Fo bhnd_format_chip_id .Fa "char *buffer" "size_t size" "uint16_t chip_id" .Fc .Ft void .Fo bhnd_set_custom_core_desc .Fa "device_t dev" "const char *dev_name" .Fc .Ft void .Fo bhnd_set_default_core_desc .Fa "device_t dev" .Fc .Ft "const char *" .Fo bhnd_vendor_name .Fa "uint16_t vendor" .Fc .Bd -literal #define BHND_CHIPID_MAX_NAMELEN 32 .Ed .\" .Sh DESCRIPTION .Nm provides a unified bus and driver programming interface for the on-chip interconnects and IP cores found in Broadcom Home Networking Division (BHND) devices. .Pp The BHND device family consists of MIPS/ARM SoCs (System On a Chip) and host-connected chipsets based on a common library of Broadcom IP cores, connected via one of two on-chip backplane (hardware bus) architectures. .Pp Hardware designed prior to 2009 used Broadcom's .Dq SSB backplane architecture, based on Sonics Silicon's interconnect IP. Each core on the Sonics backplane vends a 4 KiB register block, containing both device-specific CSRs, and SSB-specific per-core device management (enable/reset/etc) registers. .Pp Subsequent hardware is based on Broadcom's .Dq BCMA backplane, based on ARM's AMBA IP. The IP cores used in earlier SSB-based devices were adapted for compatibility with the new backplane, with additional .Dq wrapper cores providing per-core device management functions in place of the SSB per-core management registers. .Pp When BHND hardware is used as a host-connected peripheral (e.g., in a PCI Wi-Fi card), the on-chip peripheral controller core is configured to operate as an endpoint device, bridging access to the SoC hardware: .Pp .Bl -dash -offset indent .It Host access to SoC address space is provided via a set of register windows (e.g., a set of configurable windows into SoC address space mapped via PCI BARs) .It DMA is supported by the bridge core's sparse mapping of host address space into the backplane address space. These address regions may be used as a target for the on-chip DMA engine. .It Any backplane interrupt vectors routed to the bridge core may be mapped by the bridge to host interrupts (e.g., PCI INTx/MSI/MSI-X). .El .Pp The .Nm driver programming interface \(em and .Xr bhndb 4 host bridge drivers \(em support the implementation of common drivers for Broadcom IP cores, whether attached via a BHND host bridge, or via the native SoC backplane. .\" .Ss "Bus Resource Functions" The bhnd_resource functions are wrappers for the standard .Vt "struct resource" bus APIs, providing support for .Vt SYS_RES_MEMORY resources that, on .Xr bhndb 4 bridged chipsets, may require on-demand remapping of address windows prior to accessing bus memory. .Pp These functions are primarily used in the implementation of BHND platform device drivers that, on host-connected peripherals, must share a small set of register windows during initial setup and teardown. .Pp BHND peripherals are designed to not require register window remapping during normal operation, and most drivers may safely use the standard .Vt struct resource APIs directly. .Pp The .Fn bhnd_activate_resource function activates a previously allocated resource. .Pp The arguments are as follows: .Bl -tag -width indent .It Fa dev The device holding ownership of the allocated resource. .It Fa type The type of the resource. .It Fa rid The bus-specific handle that identifies the resource being activated. .It Fa r A pointer to the resource returned by .Fn bhnd_alloc_resource . .El .Pp The .Fn bhnd_alloc_resource function allocates a resource from a device's parent .Xr bhnd 4 bus. .Pp The arguments are as follows: .Bl -tag -width indent .It Fa dev The device requesting resource ownership. .It Fa type The type of resource to allocate. This may be any type supported by the standard .Xr bus_alloc_resource 9 function. .It Fa rid The bus-specific handle identifying the resource being allocated. .It Fa start The start address of the resource. .It Fa end The end address of the resource. .It Fa count The size of the resource. .It Fa flags The flags for the resource to be allocated. These may be any values supported by the standard .Xr bus_alloc_resource 9 function. .El .Pp To request that the bus supply the resource's default .Fa start , .Fa end , and .Fa count values, pass .Fa start and .Fa end values of 0ul and ~0ul respectively, and a .Fa count of 1. .Pp The .Fn bhnd_alloc_resource_any function is a convenience wrapper for .Fn bhnd_alloc_resource , using the resource's default .Fa start , .Fa end , and .Fa count values. .Pp The arguments are as follows: .Bl -tag -width indent .It Fa dev The device requesting resource ownership. .It Fa type The type of resource to allocate. This may be any type supported by the standard .Xr bus_alloc_resource 9 function. .It Fa rid The bus-specific handle identifying the resource being allocated. .It Fa flags The flags for the resource to be allocated. These may be any values supported by the standard .Xr bus_alloc_resource 9 function. .El .Pp The .Fn bhnd_alloc_resources function allocates resources defined in resource specification from a device's parent .Xr bhnd 4 bus. .Pp The arguments are as follows: .Bl -tag -width indent .It Fa dev The device requesting ownership of the resources. .It Fa rs A standard bus resource specification. If all requested resources, are successfully allocated, this will be updated with the allocated resource identifiers. .It Fa res If all requested resources are successfully allocated, this will be populated with the allocated .Vt "struct bhnd_resource" instances. .El .Pp The .Fn bhnd_deactivate_resource function deactivates a resource previously activated by. .Fn bhnd_activate_resource . The arguments are as follows: .Bl -tag -width indent .It Fa dev The device holding ownership of the activated resource. .It Fa type The type of the resource. .It Fa rid The bus-specific handle identifying the resource. .It Fa r A pointer to the resource returned by bhnd_alloc_resource. .El .Pp The .Fn bhnd_release_resource function frees a resource previously returned by .Fn bhnd_alloc_resource . The arguments are as follows: .Bl -tag -width indent .It Fa dev The device holding ownership of the resource. .It Fa type The type of the resource. .It Fa rid The bus-specific handle identifying the resource. .It Fa r A pointer to the resource returned by bhnd_alloc_resource. .El .Pp The .Fn bhnd_release_resources function frees resources previously returned by .Fn bhnd_alloc_resources . The arguments are as follows: .Bl -tag -width indent .It Fa dev The device that owns the resources. .It Fa rs A standard bus resource specification previously initialized by .Fn bhnd_alloc_resources . .It Fa res The resources to be released. .El .Pp The .Vt bhnd_resource structure contains the following fields: .Bl -tag -width "direct" .It Fa res A pointer to the bus .Vt struct resource . .It Fa direct If true, the resource requires bus window remapping before it is MMIO accessible. .El .Pp .\" .Ss "Bus Space Functions" The bhnd_bus_space functions wrap their equivalent .Xr bus_space 9 counterparts, and provide support for accessing bus memory via .Vt "struct bhnd_resource". .Pp .Bl -ohang -offset indent -compact .It Fn bhnd_bus_barrier .It Fn bhnd_bus_[read|write]_[1|2|4] .It Fn bhnd_bus_[read_multi|write_multi]_[1|2|4] .It Fn bhnd_bus_[read_multi_stream|write_multi_stream]_[1|2|4] .It Fn bhnd_bus_[read_region|write_region]_[1|2|4] .It Fn bhnd_bus_[read_region_stream|write_region_stream]_[1|2|4] .It Fn bhnd_bus_[read_stream|write_stream]_[1|2|4] .It Fn bhnd_bus_[set_multi|set_stream]_[1|2|4] .El .Pp Drivers that do not rely on .Vt "struct bhnd_resource" should use the standard .Vt struct resource and .Xr bus_space 9 APIs directly. .\" .Ss "Device Configuration Functions" The .Fn bhnd_read_ioctl function is used to read the I/O control register value of device .Fa dev , returning the current value in .Fa ioctl . .Pp The .Fn bhnd_write_ioctl function is used to modify the I/O control register of .Fa dev . The new value of the register is computed by updating any bits set in .Fa mask to .Fa value . The following I/O control flags are supported: .Bl -tag -width ".Dv BHND_IOCTL_CLK_FORCE" -offset indent .It Dv BHND_IOCTL_BIST Initiate a built-in self-test (BIST). Must be cleared after BIST results are read via the IOST (I/O Status) register. .It Dv BHND_IOCTL_PME Enable posting of power management events by the core. .It Dv BHND_IOCTL_CLK_FORCE Force disable of clock gating, resulting in all clocks being distributed within the core. Should be set when asserting/deasserting reset to ensure the reset signal fully propagates to the entire core. .It Dv BHND_IOCTL_CLK_EN If cleared, the core clock will be disabled. Should be set during normal operation, and cleared when the core is held in reset. .It Dv BHND_IOCTL_CFLAGS The mask of IOCTL bits reserved for additional core-specific I/O control flags. .El .Pp The .Fn bhnd_read_iost function is used to read the I/O status register of device .Fa dev , returning the current value in .Fa iost . The following I/O status flags are supported: .Bl -tag -width ".Dv BHND_IOST_BIST_DONE" -offset indent .It Dv BHND_IOST_BIST_DONE Set upon BIST completion. Will be cleared when the .Dv BHND_IOCTL_BIST flag of the I/O control register is cleared using .Fn bhnd_write_ioctl . .It Dv BHND_IOST_BIST_FAIL Set upon detection of a BIST error; the value is unspecified if BIST has not completed and .Dv BHND_IOST_BIST_DONE is not also set. .It Dv BHND_IOST_CLK Set if the core has required that clocked be ungated, or cleared otherwise. The value is undefined if a core does not support clock gating. .It Dv BHND_IOST_DMA64 Set if this core supports 64-bit DMA. .It Dv BHND_IOST_CFLAGS The mask of IOST bits reserved for additional core-specific I/O status flags. .El .Pp The .Fn bhnd_read_config function is used to read a data item of .Fa width bytes at .Fa offset from the backplane-specific agent/config space of the device .Fa dev . .Pp The .Fn bhnd_write_config function is used to write a data item of .Fa width bytes with .Fa value at .Fa offset from the backplane-specific agent/config space of the device .Fa dev . The requested .Fa width must be one of 1, 2, or 4 bytes. .Pp The agent/config space accessible via .Fn bhnd_read_config and .Fn bhnd_write_config is backplane-specific, and these functions should only be used for functionality that is not available via another .Nm function. .Pp The .Fn bhnd_suspend_hw function transitions the device .Fa dev to a low power .Dq RESET -state. +state, writing +.Fa ioctl +to the I/O control flags of +.Fa dev . The hardware may be brought out of this state using .Fn bhnd_reset_hw . .Pp The .Fn bhnd_reset_hw function first transitions the device .Fa dev -to a low power RESET state, and then brings the device out of RESET, writing +to a low power RESET state, writing +.Fa ioctl_reset +to the I/O control flags +of +.Fa dev , +and then brings the device out of RESET, writing .Fa ioctl -to the I/O control flags of -.Fa dev . +to the device's I/O control flags. .Pp The .Fn bhnd_is_hw_suspended function returns .Dv true if the device .Fa dev is currently held in a RESET state, or is otherwise not clocked. Otherwise, it returns .Dv false . .Pp Any outstanding per-device PMU requests made using .Fn bhnd_enable_clocks , .Fn bhnd_request_clock , or .Fn bhnd_request_ext_rsrc will be released automatically upon placing a device into a RESET state. .Ss "Device Information Functions" The .Fn bhnd_get_attach_type function returns the attachment type of the parent .Xr bhnd 4 bus of device .Fa dev . .Pp The following attachment types are supported: .Bl -hang -width ".Dv BHND_ATTACH_ADAPTER" -offset indent .It Dv BHND_ATTACH_ADAPTER The bus is resident on a bridged adapter, such as a PCI Wi-Fi device. .It Dv BHND_ATTACH_NATIVE The bus is resident on the native host, such as the primary or secondary bus of an embedded SoC. .El .Pp The .Fn bhnd_get_chipid function returns chip information from the parent .Xr bhnd 4 bus of device .Fa dev . The returned .Vt bhnd_chipid struct contains the following fields: .Pp .Bl -tag -width "enum_addr" -offset indent .It Fa chip_id The chip identifier. .It Fa chip_rev The chip's hardware revision. .It Fa chip_pkg The chip's semiconductor package identifier. .Pp Several different physical semiconductor package variants may exist for a given chip, each of which may require driver workarounds for hardware errata, unpopulated components, etc. .It Fa chip_type The interconnect architecture used by this chip. .It Fa enum_addr The backplane enumeration address. On SSB devices, this will be the base address of the first SSB core. On BCMA devices, this will be the address of the enumeration ROM (EROM) core. .It Fa ncores The number of cores on the chip backplane, or 0 if unknown. .El .Pp The following constants are defined for known .Fa chip_type values: .Bl -tag -width ".Dv BHND_CHIPTYPE_BCMA_ALT" -offset indent -compact .It Dv BHND_CHIPTYPE_SIBA SSB interconnect. .It Dv BHND_CHIPTYPE_BCMA BCMA interconnect. .It Dv BHND_CHIPTYPE_BCMA_ALT BCMA-compatible variant found in Broadcom Northstar ARM SoCs. .It Dv BHND_CHIPTYPE_UBUS UBUS interconnect. This BCMA-derived interconnect is found in Broadcom BCM33xx DOCSIS SoCs, and BCM63xx xDSL SoCs. UBUS is not currently supported by .Xr bhnd 4 . .El .Pp Additional symbolic constants for known .Fa chip_id , .Fa chip_pkg , and .Fa chip_type values are defined in .In dev/bhnd/bhnd_ids.h . .Pp The .Fn bhnd_get_class function returns the BHND class of device .Fa dev , if the device's .Em vendor and .Em device identifiers are recognized. Otherwise, returns .Dv BHND_DEVCLASS_OTHER . .Pp One of the following device classes will be returned: .Pp .Bl -tag -width ".Dv BHND_DEVCLASS_SOC_ROUTER" -offset indent -compact .It Dv BHND_DEVCLASS_CC ChipCommon I/O Controller .It Dv BHND_DEVCLASS_CC_B ChipCommon Auxiliary Controller .It Dv BHND_DEVCLASS_PMU PMU Controller .It Dv BHND_DEVCLASS_PCI PCI Host/Device Bridge .It Dv BHND_DEVCLASS_PCIE PCIe Host/Device Bridge .It Dv BHND_DEVCLASS_PCCARD PCMCIA Host/Device Bridge .It Dv BHND_DEVCLASS_RAM Internal RAM/SRAM .It Dv BHND_DEVCLASS_MEMC Memory Controller .It Dv BHND_DEVCLASS_ENET IEEE 802.3 MAC/PHY .It Dv BHND_DEVCLASS_ENET_MAC IEEE 802.3 MAC .It Dv BHND_DEVCLASS_ENET_PHY IEEE 802.3 PHY .It Dv BHND_DEVCLASS_WLAN IEEE 802.11 MAC/PHY/Radio .It Dv BHND_DEVCLASS_WLAN_MAC IEEE 802.11 MAC .It Dv BHND_DEVCLASS_WLAN_PHY IEEE 802.11 PHY .It Dv BHND_DEVCLASS_CPU CPU Core .It Dv BHND_DEVCLASS_SOC_ROUTER Interconnect Router .It Dv BHND_DEVCLASS_SOC_BRIDGE Interconnect Host Bridge .It Dv BHND_DEVCLASS_EROM Device Enumeration ROM .It Dv BHND_DEVCLASS_NVRAM NVRAM/Flash Controller .It Dv BHND_DEVCLASS_USB_HOST USB Host Controller .It Dv BHND_DEVCLASS_USB_DEV USB Device Controller .It Dv BHND_DEVCLASS_USB_DUAL USB Host/Device Controller .It Dv BHND_DEVCLASS_OTHER Other / Unknown .It Dv BHND_DEVCLASS_INVALID Invalid Class .El .Pp The .Fn bhnd_get_core_info function returns the core information for device .Fa dev . The returned .Vt bhnd_core_info structure contains the following fields: .Pp .Bl -tag -width "core_idx" -offset indent -compact .It Fa vendor Vendor identifier (JEP-106, ARM 4-bit continuation encoded) .It Fa device Device identifier .It Fa hwrev Hardware revision .It Fa core_idx Core index .It Fa unit Core unit .El .Pp Symbolic constants for common vendor and device identifiers are defined in .In dev/bhnd/bhnd_ids.h . Common vendor identifiers include: .Pp .Bl -tag -width ".Dv BHND_MFGID_MIPS" -offset indent -compact .It Dv BHND_MFGID_ARM ARM .It Dv BHND_MFGID_BCM Broadcom .It Dv BHND_MFGID_MIPS MIPS .El .Pp The .Fn bhnd_get_core_index , .Fn bhnd_get_core_unit , .Fn bhnd_get_device , .Fn bhnd_get_hwrev , and .Fn bhnd_get_vendor functions are convenience wrappers for .Fn bhnd_get_core_info , returning, respect the .Fa core_idx , .Fa core_unit , .Fa device , .Fa hwrev , or .Fa vendor field from the .Vt bhnd_core_info structure. .Pp The .Fn bhnd_get_device_name function returns a human readable name for device .Fa dev . .Pp The .Fn bhnd_get_vendor_name function returns a human readable name for the vendor of device .Fa dev . .Pp The .Fn bhnd_read_board_info function attempts to read the board information for device .Fa dev . The board information will be returned in the location pointed to by .Fa info on success. .Pp The .Vt bhnd_board_info structure contains the following fields: .Pp .Bl -tag -width "board_srom_rev" -offset indent .It Fa board_vendor Vendor ID of the board manufacturer (PCI-SIG assigned). .It Fa board_type Device ID. This is generally a Broadcom-assigned globally unique identifier. .It Fa board_rev Board revision. .It Fa board_srom_rev Board SROM format revision. .It Fa board_flags Board flags (1) .It Fa board_flags2 Board flags (2) .It Fa board_flags3 Board flags (3) .El .Pp On PCI devices, the .Fa board_vendor and .Fa board_type fields default to the PCI Subsystem Vendor ID and PCI Subsystem ID, unless overridden in device NVRAM. .Pp Symbolic constants for common board flags are defined in .In dev/bhnd/bhnd_ids.h . .Pp .Ss "Device Matching Functions" The bhnd device matching functions are used to match against core, chip, and board-level device attributes. Match requirements are specified using the .Vt "struct bhnd_board_match" , .Vt "struct bhnd_chip_match" , .Vt "struct bhnd_core_match" , .Vt "struct bhnd_device_match" , and .Vt "struct bhnd_hwrev_match" match descriptor structures. .Pp The .Fn bhnd_board_matches function returns .Dv true if .Fa board matches the board match descriptor .Fa desc . Otherwise, it returns .Dv false . .Pp The .Fn bhnd_chip_matches function returns .Dv true if .Fa chip matches the chip match descriptor .Fa desc . Otherwise, it returns .Dv false . .Pp The .Fn bhnd_core_matches function returns .Dv true if .Fa core matches the core match descriptor .Fa desc . Otherwise, it returns .Dv false . .Pp The .Fn bhnd_device_matches function returns .Dv true if the device .Fa dev matches the device match descriptor .Fa desc . Otherwise, it returns .Dv false . .Pp The .Fn bhnd_hwrev_matches function returns .Dv true if .Fa hwrev matches the hwrev match descriptor .Fa desc . Otherwise, it returns .Dv false . .Pp The .Fn bhnd_bus_match_child function returns the first child device of .Fa bus that matches the device match descriptor .Fa desc . If no matching child is found, .Dv NULL is returned. .Pp The .Fn bhnd_core_get_match_desc function returns an equality match descriptor for the core info in .Fa core . The returned descriptor will match only on core attributes identical to those defined by .Fa core . .Pp The .Fn bhnd_cores_equal function is a convenience wrapper for .Fn bhnd_core_matches and .Fn bhnd_core_get_match_desc . This function returns .Dv true if the .Vt bhnd_core_info structures .Fa lhs and .Fa rhs are equal. Otherwise, it returns .Dv false . .Pp The .Fn bhnd_match_core function returns a pointer to the first entry in the array .Fa cores of length .Fa num_cores that matches .Fa desc . If no matching core is found, .Dv NULL is returned. .Pp A .Vt bhnd_board_match match descriptor may be initialized using one or more of the following macros: .Pp .Bl -tag -width "Fn BHND_MATCH_BOARD_VENDOR vendor" -offset indent .It Fn BHND_MATCH_BOARD_VENDOR "vendor" Match on boards with a vendor equal to .Fa vendor . .It Fn BHND_MATCH_BOARD_TYPE "type" Match on boards with a type equal to .Dv "BHND_BOARD_ ##" .Fa type .It Fn BHND_MATCH_SROMREV "sromrev" Match on boards with a sromrev that matches .Dv "BHND_HWREV_ ##" .Fa sromrev . .It Fn BHND_MATCH_BOARD_REV "hwrev" Match on boards with hardware revisions that match .Dv "BHND_ ##" .Fa hwrev . .It Fn BHND_MATCH_BOARD "vendor" "type" A convenience wrapper for .Fn BHND_MATCH_BOARD_VENDOR and .Fn BHND_MATCH_BOARD_TYPE . .El .Pp For example: .Bd -literal -offset indent struct bhnd_board_match board_desc = { BHND_MATCH_BOARD_VENDOR(BHND_MFGID_BROADCOM), BHND_MATCH_BOARD_TYPE(BCM94360X52C), BHND_MATCH_BOARD_REV(HWREV_ANY), BHND_MATCH_SROMREV(RANGE(0, 10)) }; .Ed .Pp A .Vt bhnd_chip_match match descriptor may be initialized using one or more of the following macros: .Pp .Bl -tag -width "Fn BHND_MATCH_CHIP_IPR id pkg hwrev" -offset indent .It Fn BHND_MATCH_CHIP_ID "id" Match on chips with an ID equal to .Dv "BHND_CHIPID_ ##" .Fa id .It Fn BHND_MATCH_CHIP_REV "hwrev" Match on chips with hardware revisions that match .Dv "BHND_ ##" .Fa hwrev . .It Fn BHND_MATCH_CHIP_PKG "pkg" Match on chips with a package ID equal to .Dv "BHND_PKGID_ ##" .Fa pkg .It Fn BHND_MATCH_CHIP_TYPE "type" Match on chips with a chip type equal to .Dv "BHND_CHIPTYPE_ ##" .Fa type .It Fn BHND_MATCH_CHIP_IP "id" "pkg" A convenience wrapper for .Fn BHND_MATCH_CHIP_ID and .Fn BHND_MATCH_CHIP_PKG . .It Fn BHND_MATCH_CHIP_IPR "id" "pkg" "hwrev" A convenience wrapper for .Fn BHND_MATCH_CHIP_ID , .Fn BHND_MATCH_CHIP_PKG , and .Fn BHND_MATCH_CHIP_REV . .It Fn BHND_MATCH_CHIP_IR "id" "hwrev" A convenience wrapper for .Fn BHND_MATCH_CHIP_ID and .Fn BHND_MATCH_CHIP_REV . .El .Pp For example: .Bd -literal -offset indent struct bhnd_chip_match chip_desc = { BHND_MATCH_CHIP_IP(BCM4329, BCM4329_289PIN), BHND_MATCH_CHIP_TYPE(SIBA) }; .Ed .Pp A .Vt bhnd_core_match match descriptor may be initialized using one or more of the following macros: .Pp .Bl -tag -width "Fn BHND_MATCH_CORE_VENDOR vendor" -offset indent .It Fn BHND_MATCH_CORE_VENDOR "vendor" Match on cores with a vendor ID equal to .Fa vendor .It Fn BHND_MATCH_CORE_ID "id" Match on cores with a device ID equal to .Fa id .It Fn BHND_MATCH_CORE_REV "hwrev" Match on cores with hardware revisions that match .Dv "BHND_ ##" .Fa hwrev . .It Fn BHND_MATCH_CORE_CLASS "class" Match on cores with a core device class equal to .Fa class .It Fn BHND_MATCH_CORE_IDX "idx" Match on cores with a core index equal to .Fa idx .It Fn BHND_MATCH_CORE_UNIT "unit" Match on cores with a core unit equal to .Fa unit .It Fn BHND_MATCH_CORE "vendor" "id" A convenience wrapper for .Fn BHND_MATCH_CORE_VENDOR and .Fn BHND_MATCH_CORE_ID . .El .Pp For example: .Bd -literal -offset indent struct bhnd_core_match core_desc = { BHND_MATCH_CORE(BHND_MFGID_BROADCOM, BHND_COREID_CC), BHND_MATCH_CORE_REV(HWREV_RANGE(0, 10)) }; .Ed .Pp The .Vt bhnd_device_match match descriptor supports matching on all board, chip, and core attributes, and may be initialized using any of the .Vt bhnd_board_match , .Vt bhnd_chip_match , or .Vt bhnd_core_match macros. .Pp For example: .Bd -literal -offset indent struct bhnd_device_match device_desc = { BHND_MATCH_CHIP_IP(BCM4329, BCM4329_289PIN), BHND_MATCH_BOARD_VENDOR(BHND_MFGID_BROADCOM), BHND_MATCH_BOARD_TYPE(BCM94329AGB), BHND_MATCH_CORE(BHND_MFGID_BROADCOM, BHND_COREID_CC), }; .Ed .Pp A .Vt bhnd_hwrev_match match descriptor may be initialized using one of the following macros: .Pp .Bl -tag -width "Fn BHND_HWREV_RANGE start end" -offset indent -compact .It Dv BHND_HWREV_ANY Matches any hardware revision. .It Fn BHND_HWREV_EQ "hwrev" Matches any hardware revision equal to .Fa hwrev .It Fn BHND_HWREV_GTE "hwrev" Matches any hardware revision greater than or equal to .Fa hwrev .It Fn BHND_HWREV_LTE "hwrev" Matches any hardware revision less than or equal to .Fa hwrev .It Fn BHND_HWREV_RANGE "start" "end" Matches any hardware revision within an inclusive range. If .Dv BHND_HWREV_INVALID is specified as the .Fa end value, will match on any revision equal to or greater than .Fa start .El .\" .Ss "Device Table Functions" The bhnd device table functions are used to query device and quirk tables. .Pp The .Fn bhnd_device_lookup function returns a pointer to the first entry in device table .Fa table that matches the device .Fa dev . The table entry size is specified by .Fa entry_size . .Pp The .Fn bhnd_device_quirks function scan the device table .Fa table for all quirk entries that match the device .Fa dev , returning the bitwise OR of all matching quirk flags. The table entry size is specified by .Fa entry_size . .Pp The .Vt bhnd_device structure contains the following fields: .Bl -tag -width "quirks_table" -offset indent -compact .It Fa core A .Vt bhnd_device_match descriptor. .It Fa desc A verbose device description suitable for use with .Xr device_set_desc 9 , or .Dv NULL . .It Fa quirks_table The quirks table for this device, or .Dv NULL . .It Fa device_flags The device flags required when matching this entry. .El .Pp The following device flags are supported: .Bl -tag -width ".Dv BHND_DF_ADAPTER" -offset indent -compact .It Dv BHND_DF_ANY Match on any device. .It Dv BHND_DF_HOSTB Match only if the device is the .Xr bhndb 4 host bridge. Implies .Dv BHND_DF_ADAPTER . .It Dv BHND_DF_SOC Match only if the device is attached to a native SoC backplane. .It Dv BHND_DF_ADAPTER Match only if the device is attached to a .Xr bhndb 4 bridged backplane. .El .Pp A .Vt bhnd_device table entry may be initialized using one of the following macros: .Pp .Bl -ohang -offset indent .It Fn BHND_DEVICE "vendor" "device" "desc" "quirks" "flags" Match on devices with a vendor ID equal to .Dv BHND_MFGID_ ## .Fa vendor and a core device ID equal to .Dv BHND_COREID_ ## .Fa device . .Pp The device's verbose description is specified by the .Fa desc argument, a pointer to the device-specific quirks table is specified by the .Fa quirks argument, and any required device flags may be provided in .Fa flags . The optional .Fa flags argument defaults to .Dv BHND_DF_ANY if omitted. .It Dv BHND_DEVICE_END Terminate the .Vt bhnd_device table. .El .Pp For example: .Bd -literal -offset indent struct bhnd_device bhnd_usb11_devices[] = { BHND_DEVICE(BCM, USB, "Broadcom USB1.1 Controller", bhnd_usb11_quirks), BHND_DEVICE_END }; .Ed .Pp The .Vt bhnd_device_quirk structure contains the following fields: .Bl -tag -width "quirks_table" -offset indent -compact .It Fa desc A .Vt bhnd_device_match descriptor. .It Fa quirks Applicable quirk flags. .El .Pp A bhnd_device_quirk table entry may be initialized using one of the following convenience macros: .Bl -tag -width "Fn BHND_CHIP_QUIRK chip hwrev flags" -offset indent .It Fn BHND_BOARD_QUIRK "board" "flags" Set quirk flags .Fa flags on devices with a board type equal to .Dv BHND_BOARD_ ## .Fa board . .It Fn BHND_CHIP_QUIRK "chip" "hwrev" "flags" Set quirk flags .Fa flags on devices with a chip ID equal to .Dv BHND_CHIPID_BCM ## .Fa chip and chip hardware revision that matches .Dv BHND_ ## .Fa hwrev . .It Fn BHND_PKG_QUIRK "chip" "pkg" flags" Set quirk flags .Fa flags on devices with a chip ID equal to .Dv BHND_CHIPID_BCM ## .Fa chip and chip package equal to .Dv BHND_ ## chip ## .Fa pkg . .It Fn BHND_CORE_QUIRK "hwrev" flags" Set quirk flags .Fa flags on devices with a core hardware revision that matches .Dv BHND_ ## .Fa hwrev . .El For example: .Bd -literal -offset indent struct bhnd_device_quirk bhnd_usb11_quirks[] = { BHND_DEVICE(BCM, USB, "Broadcom USB1.1 Controller", bhnd_usb11_quirks), BHND_DEVICE_END }; .Ed .Ss "DMA Address Translation Functions" The .Fn bhnd_get_dma_translation function is used to request a DMA address translation descriptor suitable for use with a maximum DMA address width of .Fa width , with support for the requested translation .Fa flags . .Pp If a suitable DMA address translation descriptor is found, it will be stored in .Fa translation , and a bus DMA tag specifying the DMA translation's address restrictions will be stored in .Fa dmat . The .Fa translation and .Fa dmat arguments may be .Dv NULL if the translation descriptor or DMA tag are not desired. .Pp The following DMA translation flags are supported: .Bl -ohang -width ".Dv BHND_DMA_TRANSLATION_BYTESWAPPED" -offset indent .It Dv BHND_DMA_TRANSLATION_PHYSMAP The translation remaps the device's physical address space. .Pp This is used in conjunction with .Dv BHND_DMA_TRANSLATION_BYTESWAPPED to define a DMA translation that provides byteswapped access to physical memory on big-endian MIPS SoCs. .It Dv BHND_DMA_TRANSLATION_BYTESWAPPED The translation provides a byte-swapped mapping; write requests will be byte-swapped before being written to memory, and read requests will be byte-swapped before being returned. .Pp This is primarily used to perform efficient byte swapping of DMA data on embedded MIPS SoCs executing in big-endian mode. .El .Pp The following symbolic constants are defined for common DMA address widths: .Pp .Bl -tag -width ".Dv BHND_DMA_ADDR_64BIT" -offset indent -compact .It Dv BHND_DMA_ADDR_30BIT 30-bit DMA .It Dv BHND_DMA_ADDR_32BIT 32-bit DMA .It Dv BHND_DMA_ADDR_64BIT 64-bit DMA .El .Pp The .Vt bhnd_dma_translation structure contains the following fields: .Bl -tag -width "addrext_mask" .It Fa base_addr Host-to-device physical address translation. This may be added to a host physical address to produce a device DMA address. .It Fa addr_mask Device-addressable address mask. This defines the device DMA address range, and excludes any bits reserved for mapping the address within the translation window at .Fa base_addr . .It Fa addrext_mask Device-addressable extended address mask. If a the per-core BHND DMA engine supports the 'addrext' control field, it can be used to provide address bits excluded by .Fa addr_mask . .Pp Support for DMA extended address changes \(em including coordination with the core providing device-to-host DMA address translation \(em is handled transparently by the DMA engine. .Pp For example, on PCI Wi-Fi devices, the Wi-Fi core's DMA engine will (in effect) update the PCI host bridge core's DMA .Dv sbtopcitranslation base address to map the target address prior to performing a DMA transaction. .It Fa flags Translation flags. .El .\" .Ss "Interrupt Functions" The .Fn bhnd_get_intr_count function is used to determine the number of backplane interrupt lines assigned to the device .Fa dev . Interrupt line identifiers are allocated in monotonically increasing order, starting with 0. .Pp The .Fn bhnd_get_intr_ivec function is used to determine the backplane interrupt vector assigned to interrupt line .Fa intr on the device .Fa dev , writing the result to .Fa ivec . Interrupt vector assignments are backplane-specific: On BCMA devices, this function returns the OOB bus line assigned to the interrupt. On SIBA devices, it returns the target OCP slave flag number assigned to the interrupt. .Pp The .Fn bhnd_map_intr function is used to map interrupt line .Fa intr assigned to device .Fa dev to an IRQ number, writing the result to .Fa irq . Until unmapped, this IRQ may be used when allocating a resource of type SYS_RES_IRQ. .Pp Ownership of the interrupt mapping is assumed by the caller, and must be explicitly released using .Fa bhnd_unmap_intr . .Pp The .Fn bhnd_unmap_intr function is used to unmap bus IRQ .Fa irq previously mapped using .Fn bhnd_map_intr by the device .Fa dev . .\" .Ss "NVRAM Functions" The .Fn bhnd_nvram_getvar function is used to read the value of NVRAM variable .Fa name from the NVRAM provider(s) registered with the parent .Xr bhnd 4 bus of device .Fa dev , coerced to the desired data representation .Fa type , written to the buffer specified by .Fa buf . .Pp Before the call, the maximum capacity of .Fa buf is specified by .Fa len . After a successful call \(em or if .Er ENOMEM is returned \(em the size of the available data will be written to .Fa len . The size of the desired data representation can be determined by calling .Fn bhnd_nvram_getvar with a .Dv NULL argument for .Fa buf . .Pp The following NVRAM data types are supported: .Pp .Bl -tag -width ".Dv BHND_NVRAM_TYPE_UINT64_ARRAY" -offset indent -compact .It Dv BHND_NVRAM_TYPE_UINT8 unsigned 8-bit integer .It Dv BHND_NVRAM_TYPE_UINT16 unsigned 16-bit integer .It Dv BHND_NVRAM_TYPE_UINT32 unsigned 32-bit integer .It Dv BHND_NVRAM_TYPE_UINT64 signed 64-bit integer .It Dv BHND_NVRAM_TYPE_INT8 signed 8-bit integer .It Dv BHND_NVRAM_TYPE_INT16 signed 16-bit integer .It Dv BHND_NVRAM_TYPE_INT32 signed 32-bit integer .It Dv BHND_NVRAM_TYPE_INT64 signed 64-bit integer .It Dv BHND_NVRAM_TYPE_CHAR UTF-8 character .It Dv BHND_NVRAM_TYPE_STRING UTF-8 NUL-terminated string .It Dv BHND_NVRAM_TYPE_BOOL uint8 boolean value .It Dv BHND_NVRAM_TYPE_NULL NULL (empty) value .It Dv BHND_NVRAM_TYPE_DATA opaque octet string .It Dv BHND_NVRAM_TYPE_UINT8_ARRAY array of uint8 integers .It Dv BHND_NVRAM_TYPE_UINT16_ARRAY array of uint16 integers .It Dv BHND_NVRAM_TYPE_UINT32_ARRAY array of uint32 integers .It Dv BHND_NVRAM_TYPE_UINT64_ARRAY array of uint64 integers .It Dv BHND_NVRAM_TYPE_INT8_ARRAY array of int8 integers .It Dv BHND_NVRAM_TYPE_INT16_ARRAY array of int16 integers .It Dv BHND_NVRAM_TYPE_INT32_ARRAY array of int32 integers .It Dv BHND_NVRAM_TYPE_INT64_ARRAY array of int64 integers .It Dv BHND_NVRAM_TYPE_CHAR_ARRAY array of UTF-8 characters .It Dv BHND_NVRAM_TYPE_STRING_ARRAY array of UTF-8 NUL-terminated strings .It Dv BHND_NVRAM_TYPE_BOOL_ARRAY array of uint8 boolean values .El .Pp The .Fn bhnd_nvram_getvar_array , .Fn bhnd_nvram_getvar_int , .Fn bhnd_nvram_getvar_int8 , .Fn bhnd_nvram_getvar_int16 , .Fn bhnd_nvram_getvar_int32 , .Fn bhnd_nvram_getvar_uint , .Fn bhnd_nvram_getvar_uint8 , .Fn bhnd_nvram_getvar_uint16 , .Fn bhnd_nvram_getvar_uint32 , and .Fn bhnd_nvram_getvar_str functions are convenience wrappers for .Fn bhnd_nvram_getvar . .Pp The .Fn bhnd_nvram_getvar_array function returns either a value of exactly .Fa size in .Fa buf , or returns an error code of .Er ENXIO if the data representation is not exactly .Fa size in length. .Pp The .Fn bhnd_nvram_getvar_int and .Fn bhnd_nvram_getvar_uint functions return the value of NVRAM variable .Fa name , coerced to a signed or unsigned integer type of .Fa width (1, 2, or 4 bytes). .Pp The .Fn bhnd_nvram_getvar_int8 , .Fn bhnd_nvram_getvar_int16 , .Fn bhnd_nvram_getvar_int32 , .Fn bhnd_nvram_getvar_uint , .Fn bhnd_nvram_getvar_uint8 , .Fn bhnd_nvram_getvar_uint16 , and .Fn bhnd_nvram_getvar_uint32 functions return the value of NVRAM variable .Fa name , coerced to a signed or unsigned 8, 16, or 32-bit integer type. .Pp The .Fn bhnd_nvram_getvar_str functions return the value of NVRAM variable .Fa name , coerced to a NUL-terminated string. .Pp The .Fn bhnd_nvram_string_array_next function iterates over all strings in the .Fa inp .Dv BHND_NVRAM_TYPE_STRING_ARRAY value. The size of .Fa inp , including any terminating NUL character(s), is specified using the .Fa ilen argument. The .Fa prev argument should be either a string pointer previously returned by .Fn bhnd_nvram_string_array_next , or .Dv NULL to begin iteration. If .Fa prev is not .Dv NULL , the .Fa olen argument must be a pointer to the length previously returned by .Fn bhnd_nvram_string_array_next . On success, the next string element's length will be written to this pointer. .\" .Ss "Port/Region Functions" Per-device interconnect memory mappings are identified by a combination of .Em port type , .Em port number , and .Em region number . Port and memory region identifiers are allocated in monotonically increasing order for each .Em port type , starting with 0. .Pp The following port types are supported: .Bl -tag -width ".Dv BHND_PORT_DEVICE" -offset indent .It Dv BHND_PORT_DEVICE Device memory. The device's control/status registers are always mapped by the first device port and region, and will be assigned a .Dv SYS_RES_MEMORY resource ID of 0. .It Dv BHND_PORT_BRIDGE Bridge memory. .It Dv BHND_PORT_AGENT Interconnect agent/wrapper. .El .Pp The .Fn bhnd_decode_port_rid function is used to decode the resource ID .Fa rid assigned to device .Fa dev , of resource type .Fa type , writing the port type to .Fa port_type , port number to .Fa port , and region number to .Fa region . .Pp The .Fn bhnd_get_port_count function returns the number of ports of type .Fa type assigned to device .Fa dev . .Pp The .Fn bhnd_get_port_rid function returns the resource ID for the .Dv SYS_RES_MEMORY resource mapping the .Fa port of .Fa type and .Fa region on device .Fa dev , or -1 if the port or region are invalid, or do not have an assigned resource ID. .Pp The .Fn bhnd_get_region_addr function is used to determine the base address and size of the memory .Fa region on .Fa port of .Fa type assigned to .Fa dev . The region's base device address will be written to .Fa region_addr , and the region size to .Fa region_size . .Pp The .Fn bhnd_get_region_count function returns the number of memory regions mapped to .Fa port of .Fa type on device .Fa dev . .Pp The .Fn bhnd_is_region_valid function returns .Dv true if .Fa region is a valid region mapped by .Fa port of .Fa type on device .Fa dev . .\" .Ss "Power Management Functions" Drivers must ask the parent .Xr bhnd 4 bus to allocate device PMU state using .Fn bhnd_alloc_pmu before calling any another bhnd PMU functions. .Pp The .Fn bhnd_alloc_pmu function is used to allocate per-device PMU state and enable PMU request handling for device .Fa dev . The memory region containing the device's PMU register block must be allocated using .Xr bus_alloc_resource 9 or .Fn bhnd_alloc_resource before calling .Fn bhnd_alloc_pmu , and must not be released until after calling .Fn bhnd_release_pmu . .Pp On all supported BHND hardware, the PMU register block is mapped by the device's control/status registers in the first device port and region. .Pp The .Fn bhnd_release_pmu function releases the per-device PMU state previously allocated for device .Fa dev using .Fn bhnd_alloc_pmu . Any outstanding clock and external resource requests will be discarded upon release of the device PMU state. .Pp The .Fn bhnd_enable_clocks function is used to request that .Fa clocks be powered up and routed to the backplane on behalf of device .Fa dev . This will power any clock sources required (e.g., XTAL, PLL, etc) and wait until the requested clocks are stable. If the request succeeds, any previous clock requests issued by .Fa dev will be discarded. .Pp The following clocks are supported, and may be combined using bitwise OR to request multiple clocks: .Pp .Bl -tag -width ".Dv BHND_CLOCK_DYN" -offset indent .It BHND_CLOCK_DYN Dynamically select an appropriate clock source based on all outstanding clock requests by any device attached to the parent .Xr bhnd 4 bus. .It BHND_CLOCK_ILP Idle Low-Power (ILP) Clock. May be used if no register access is required, or long request latency is acceptable. .It BHND_CLOCK_ALP Active Low-Power (ALP) Clock. Supports low-latency register access and low-rate DMA. .It BHND_CLOCK_HT High Throughput (HT) Clock. Supports high bus throughput and lowest-latency register access. .El .Pp The .Fn bhnd_request_clock function is used to request that .Fa clock (or faster) be powered up and routed to device .Fa dev . .Pp The .Fn bhnd_get_clock_freq function is used to request the current clock frequency of .Fa clock , writing the frequency in Hz to .Fa freq . .Pp The .Fn bhnd_get_clock_latency function is used to determine the transition latency required for .Fa clock , writing the latency in microseconds to .Fa latency . The .Dv BHND_CLOCK_HT latency value is suitable for use as the D11 Wi-Fi core .Em fastpwrup_dly value. .Pp The .Fn bhnd_request_ext_rsrc function is used to request that the external PMU-managed resource assigned to device .Fa dev , identified by device-specific identifier .Fa rsrc , be powered up. .Pp The .Fn bhnd_release_ext_rsrc function releases any outstanding requests by device .Fa dev for the PMU-managed resource identified by device-specific identifier .Fa rsrc . If an external resource is shared by multiple devices, it will not be powered down until all device requests are released. .\" .Ss "Service Provider Functions" The .Fn bhnd_register_provider function is used to register device .Fa dev as a provider for platform .Fa service with the parent .Xr bhnd 4 bus. .Pp The following service types are supported: .Bl -tag -width ".Dv BHND_SERVICE_INVALID" -offset indent .It Dv BHND_SERVICE_CHIPC ChipCommon service. The providing device must implement the bhnd_chipc interface. .It Dv BHND_SERVICE_PWRCTL Legacy PWRCTL service. The providing device must implement the bhnd_pwrctl interface. .It Dv BHND_SERVICE_PMU PMU service. The providing device must implement the bhnd_pmu interface. .It Dv BHND_SERVICE_NVRAM NVRAM service. The providing device must implement the bhnd_nvram interface. .It Dv BHND_SERVICE_GPIO GPIO service. The providing device must implement the standard .Xr gpio 4 interface. .It Dv BHND_SERVICE_ANY Matches on any service type. May be used with .Fn bhnd_deregister_provider to remove all service provider registrations for a device. .El .Pp The .Fn bhnd_deregister_provider function attempts to remove provider registration for the device .Fa dev and .Fa service . If a .Fa service argument of .Dv BHND_SERVICE_ANY is specified, this function will attempt to remove .Em all service provider registrations for .Fa dev . .Pp The .Fn bhnd_retain_provider function retains and returns a reference to the provider registered for .Fa service with the parent .Xr bhnd 4 bus of devce .Fa dev , if available. On success, the caller is responsible for releasing this provider reference using .Fn bhnd_release_provider . The service provider is guaranteed to remain available until the provider reference is released. .Pp The .Fn bhnd_release_provider function releases a reference to a .Fa provider for .Fa service , previously retained by device .Fa dev using .Fn bhnd_retain_provider . .\" .Ss "Utility Functions" The .Fn bhnd_driver_get_erom_class function returns the .Xr bhnd_erom 9 class for the device enumeration table format used by .Xr bhnd 4 bus driver instance .Fa driver . If the driver does not support .Xr bhnd_erom 9 device enumeration, .Dv NULL is returned. .Pp The .Fn bhnd_find_core_class function looks up the BHND class, if known, for the BHND vendor ID .Fa vendor and device ID .Fa device . .Pp The .Fn bhnd_find_core_name function is used to fetch the human-readable name, if known, for the BHND core with a vendor ID of .Fa vendor and device ID of .Fa device . .Pp The .Fn bhnd_core_class and .Fn bhnd_core_name functions are convenience wrappers for .Fn bhnd_find_core_class and .Fn bhnd_find_core_name , that use the .Fa vendor and .Fa device fields of the core info structure .Fa ci . .Pp The .Fn bhnd_format_chip_id function writes a NUL-terminated human-readable representation of the BHND .Fa chip_id value to the specified .Fa buffer with a capacity of .Fa size . No more than .Fa size-1 characters will be written, with the .Fa size'th character set to '\\0'. A buffer size of .Dv BHND_CHIPID_MAX_NAMELEN is sufficient for any string representation produced using .Fn bhnd_format_chip_id . .Pp The .Fn bhnd_set_custom_core_desc function uses the .Xr bhnd 4 device identification of .Fa dev , overriding the core name with the specified .Fa dev_name , to populate the device's verbose description using .Xr device_set_desc . .Pp The .Fn bhnd_set_default_core_desc function uses the .Xr bhnd 4 device identification of .Fa dev to populate the device's verbose description using .Xr device_set_desc . .Pp The .Fn bhnd_vendor_name function returns the human-readable name for the JEP-106, ARM 4-bit continuation encoded manufacturer ID .Fa vendor , if known. .\" .Sh RETURN VALUES .Ss Bus Resource Functions The .Fn bhnd_activate_resource , .Fn bhnd_alloc_resources , .Fn bhnd_deactivate_resource , and .Fn bhnd_release_resource functions return 0 on success, otherwise an appropriate error code is returned. .Pp The .Fn bhnd_alloc_resource and .Fn bhnd_alloc_resource_any functions return a pointer to .Vt "struct resource" on success, a null pointer otherwise. .\" .Ss "Device Configuration Functions" .Pp The .Fn bhnd_read_config and .Fn bhnd_write_config functions return 0 on success, or one of the following values on error: .Bl -tag -width Er .It Bq Er EINVAL The device is not a direct child of the .Xr bhnd 4 bus .It Bq Er EINVAL The requested width is not one of 1, 2, or 4 bytes. .It Bq Er ENODEV Accessing agent/config space for the device is unsupported. .It Bq Er EFAULT The requested offset or width exceeds the bounds of the mapped agent/config space. .El .Pp The .Fn bhnd_read_ioctl , .Fn bhnd_write_ioctl , .Fn bhnd_read_iost , .Fn bhnd_reset_hw , and .Fn bhnd_suspend_hw functions return 0 on success, otherwise an appropriate error code is returned. .\" .Ss "Device Information Functions" .Pp The .Fn bhnd_read_board_info function returns 0 on success, otherwise an appropriate error code is returned. .\" .Ss "DMA Address Translation Functions" The .Fn bhnd_get_dma_translation function returns 0 on success, or one of the following values on error: .Bl -tag -width Er .It Bq Er ENODEV DMA is not supported. .It Bq Er ENOENT No DMA translation matching the requested address width and translation flags is available. .El .Pp If fetching the requested DMA address translation otherwise fails, an appropriate error code will be returned. .\" .Ss "Interrupt Functions" .Pp The .Fn bhnd_get_intr_ivec function returns 0 on success, or .Er ENXIO if the requested interrupt line exceeds the number of interrupt lines assigned to the device. .Pp The .Fn bhnd_map_intr function returns 0 on success, otherwise an appropriate error code is returned. .\" .Ss "NVRAM Functions" The .Fn bhnd_nvram_getvar , .Fn bhnd_nvram_getvar_array , .Fn bhnd_nvram_getvar_int , .Fn bhnd_nvram_getvar_int8 , .Fn bhnd_nvram_getvar_int16 , .Fn bhnd_nvram_getvar_int32 , .Fn bhnd_nvram_getvar_uint , .Fn bhnd_nvram_getvar_uint8 , .Fn bhnd_nvram_getvar_uint16 , and .Fn bhnd_nvram_getvar_uint32 functions return 0 on success, or one of the following values on error: .Bl -tag -width Er .It Bq Er ENODEV If an NVRAM provider has not been registered with the bus. .It Bq Er ENOENT The requested variable was not found. .It Bq Er ENOMEM If the buffer of size is too small to hold the requested value. .It Bq Er EOPNOTSUPP If the value's native type is incompatible with and cannot be coerced to the requested type. .It Bq Er ERANGE If value coercion would overflow (or underflow) the requested type .El .Pp If reading the variable otherwise fails, an appropriate error code will be returned. .\" .Ss "Port/Region Functions" The .Fn bhnd_decode_port_rid function returns 0 on success, or an appropriate error code if no matching port/region is found. .Pp The .Fn bhnd_get_port_rid function returns the resource ID for the requested port and region, or -1 if the port or region are invalid, or do not have an assigned resource ID. .Pp The .Fn bhnd_get_region_addr function returns 0 on success, or an appropriate error code if no matching port/region is found. .\" .Ss "PMU Functions" The .Fn bhnd_alloc_pmu function returns 0 on success, otherwise an appropriate error code is returned. .Pp The .Fn bhnd_release_pmu function returns 0 on success, otherwise an appropriate error code is returned, and the core state will be left unmodified. .Pp The .Fn bhnd_enable_clocks and .Fn bhnd_request_clock functions return 0 on success, or one of the following values on error: .Bl -tag -width Er .It Bq Er ENODEV An unsupported clock was requested. .It Bq Er ENXIO No PMU or PWRCTL provider has been registered with the bus. .El .Pp The .Fn bhnd_get_clock_freq function returns 0 on success, or .Er ENODEV if the frequency for the specified clock is not available. .Pp The .Fn bhnd_get_clock_latency function returns 0 on success, or .Er ENODEV if the transition latency for the specified clock is not available. .Pp The .Fn bhnd_request_ext_rsrc and .Fn bhnd_release_ext_rsrc functions return 0 on success, otherwise an appropriate error code is returned. .Pp .\" .Ss "Service Provider Functions" The .Fn bhnd_register_provider function returns 0 on success, .Er EEXIST if an entry for service already exists, or an appropriate error code if service registration otherwise fails. .Pp The .Fn bhnd_deregister_provider function returns 0 on success, or .Er EBUSY if active references to the service provider exist. .Pp The .Fn bhnd_retain_provider function returns a pointer to .Vt "device_t" on success, a null pointer if the requested provider is not registered. .\" .Ss "Utility Functions" .Pp The .Fn bhnd_format_chip_id function returns the total number of bytes written on success, or a negative integer on failure. .\" .Sh SEE ALSO .Xr bhnd 4 .Xr bhnd_erom 9 .Sh AUTHORS .An -nosplit The .Nm driver programming interface and this manual page were written by .An Landon Fuller Aq Mt landonf@FreeBSD.org . Index: head/sys/dev/bhnd/bcma/bcma.c =================================================================== --- head/sys/dev/bhnd/bcma/bcma.c (revision 326291) +++ head/sys/dev/bhnd/bcma/bcma.c (revision 326292) @@ -1,763 +1,761 @@ /*- * Copyright (c) 2015-2016 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include "bcma_dmp.h" #include "bcma_eromreg.h" #include "bcma_eromvar.h" #include "bcmavar.h" /* RID used when allocating EROM table */ #define BCMA_EROM_RID 0 static bhnd_erom_class_t * bcma_get_erom_class(driver_t *driver) { return (&bcma_erom_parser); } int bcma_probe(device_t dev) { device_set_desc(dev, "BCMA BHND bus"); return (BUS_PROBE_DEFAULT); } /** * Default bcma(4) bus driver implementation of DEVICE_ATTACH(). * * This implementation initializes internal bcma(4) state and performs * bus enumeration, and must be called by subclassing drivers in * DEVICE_ATTACH() before any other bus methods. */ int bcma_attach(device_t dev) { int error; /* Enumerate children */ if ((error = bcma_add_children(dev))) { device_delete_children(dev); return (error); } return (0); } int bcma_detach(device_t dev) { return (bhnd_generic_detach(dev)); } static device_t bcma_add_child(device_t dev, u_int order, const char *name, int unit) { struct bcma_devinfo *dinfo; device_t child; child = device_add_child_ordered(dev, order, name, unit); if (child == NULL) return (NULL); if ((dinfo = bcma_alloc_dinfo(dev)) == NULL) { device_delete_child(dev, child); return (NULL); } device_set_ivars(child, dinfo); return (child); } static void bcma_child_deleted(device_t dev, device_t child) { struct bhnd_softc *sc; struct bcma_devinfo *dinfo; sc = device_get_softc(dev); /* Call required bhnd(4) implementation */ bhnd_generic_child_deleted(dev, child); /* Free bcma device info */ if ((dinfo = device_get_ivars(child)) != NULL) bcma_free_dinfo(dev, child, dinfo); device_set_ivars(child, NULL); } static int bcma_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) { const struct bcma_devinfo *dinfo; const struct bhnd_core_info *ci; dinfo = device_get_ivars(child); ci = &dinfo->corecfg->core_info; switch (index) { case BHND_IVAR_VENDOR: *result = ci->vendor; return (0); case BHND_IVAR_DEVICE: *result = ci->device; return (0); case BHND_IVAR_HWREV: *result = ci->hwrev; return (0); case BHND_IVAR_DEVICE_CLASS: *result = bhnd_core_class(ci); return (0); case BHND_IVAR_VENDOR_NAME: *result = (uintptr_t) bhnd_vendor_name(ci->vendor); return (0); case BHND_IVAR_DEVICE_NAME: *result = (uintptr_t) bhnd_core_name(ci); return (0); case BHND_IVAR_CORE_INDEX: *result = ci->core_idx; return (0); case BHND_IVAR_CORE_UNIT: *result = ci->unit; return (0); case BHND_IVAR_PMU_INFO: *result = (uintptr_t) dinfo->pmu_info; return (0); default: return (ENOENT); } } static int bcma_write_ivar(device_t dev, device_t child, int index, uintptr_t value) { struct bcma_devinfo *dinfo; dinfo = device_get_ivars(child); switch (index) { case BHND_IVAR_VENDOR: case BHND_IVAR_DEVICE: case BHND_IVAR_HWREV: case BHND_IVAR_DEVICE_CLASS: case BHND_IVAR_VENDOR_NAME: case BHND_IVAR_DEVICE_NAME: case BHND_IVAR_CORE_INDEX: case BHND_IVAR_CORE_UNIT: return (EINVAL); case BHND_IVAR_PMU_INFO: dinfo->pmu_info = (void *)value; return (0); default: return (ENOENT); } } static struct resource_list * bcma_get_resource_list(device_t dev, device_t child) { struct bcma_devinfo *dinfo = device_get_ivars(child); return (&dinfo->resources); } static int bcma_read_iost(device_t dev, device_t child, uint16_t *iost) { uint32_t value; int error; if ((error = bhnd_read_config(child, BCMA_DMP_IOSTATUS, &value, 4))) return (error); /* Return only the bottom 16 bits */ *iost = (value & BCMA_DMP_IOST_MASK); return (0); } static int bcma_read_ioctl(device_t dev, device_t child, uint16_t *ioctl) { uint32_t value; int error; if ((error = bhnd_read_config(child, BCMA_DMP_IOCTRL, &value, 4))) return (error); /* Return only the bottom 16 bits */ *ioctl = (value & BCMA_DMP_IOCTRL_MASK); return (0); } static int bcma_write_ioctl(device_t dev, device_t child, uint16_t value, uint16_t mask) { struct bcma_devinfo *dinfo; struct bhnd_resource *r; uint32_t ioctl; if (device_get_parent(child) != dev) return (EINVAL); dinfo = device_get_ivars(child); if ((r = dinfo->res_agent) == NULL) return (ENODEV); /* Write new value */ ioctl = bhnd_bus_read_4(r, BCMA_DMP_IOCTRL); ioctl &= ~(BCMA_DMP_IOCTRL_MASK & mask); ioctl |= (value & mask); bhnd_bus_write_4(r, BCMA_DMP_IOCTRL, ioctl); /* Perform read-back and wait for completion */ bhnd_bus_read_4(r, BCMA_DMP_IOCTRL); DELAY(10); return (0); } static bool bcma_is_hw_suspended(device_t dev, device_t child) { uint32_t rst; uint16_t ioctl; int error; /* Is core held in RESET? */ error = bhnd_read_config(child, BCMA_DMP_RESETCTRL, &rst, 4); if (error) { device_printf(child, "error reading HW reset state: %d\n", error); return (true); } if (rst & BCMA_DMP_RC_RESET) return (true); /* Is core clocked? */ error = bhnd_read_ioctl(child, &ioctl); if (error) { device_printf(child, "error reading HW ioctl register: %d\n", error); return (true); } if (!(ioctl & BHND_IOCTL_CLK_EN)) return (true); return (false); } static int -bcma_reset_hw(device_t dev, device_t child, uint16_t ioctl) +bcma_reset_hw(device_t dev, device_t child, uint16_t ioctl, + uint16_t reset_ioctl) { - struct bcma_devinfo *dinfo; - struct bhnd_core_pmu_info *pm; - struct bhnd_resource *r; - int error; + struct bcma_devinfo *dinfo; + struct bhnd_resource *r; + uint16_t clkflags; + int error; if (device_get_parent(child) != dev) return (EINVAL); dinfo = device_get_ivars(child); - pm = dinfo->pmu_info; - /* We require exclusive control over BHND_IOCTL_CLK_EN and - * BHND_IOCTL_CLK_FORCE. */ - if (ioctl & (BHND_IOCTL_CLK_EN | BHND_IOCTL_CLK_FORCE)) + /* We require exclusive control over BHND_IOCTL_CLK_(EN|FORCE) */ + clkflags = BHND_IOCTL_CLK_EN | BHND_IOCTL_CLK_FORCE; + if (ioctl & clkflags) return (EINVAL); /* Can't suspend the core without access to the agent registers */ if ((r = dinfo->res_agent) == NULL) return (ENODEV); /* Place core into known RESET state */ - if ((error = BHND_BUS_SUSPEND_HW(dev, child))) + if ((error = bhnd_suspend_hw(child, reset_ioctl))) return (error); /* * Leaving the core in reset: * - Set the caller's IOCTL flags * - Enable clocks * - Force clock distribution to ensure propagation throughout the * core. */ - error = bhnd_write_ioctl(child, - ioctl | BHND_IOCTL_CLK_EN | BHND_IOCTL_CLK_FORCE, UINT16_MAX); - if (error) + if ((error = bhnd_write_ioctl(child, ioctl | clkflags, UINT16_MAX))) return (error); /* Bring the core out of reset */ if ((error = bcma_dmp_write_reset(child, dinfo, 0x0))) return (error); /* Disable forced clock gating (leaving clock enabled) */ error = bhnd_write_ioctl(child, 0x0, BHND_IOCTL_CLK_FORCE); if (error) return (error); return (0); } static int -bcma_suspend_hw(device_t dev, device_t child) +bcma_suspend_hw(device_t dev, device_t child, uint16_t ioctl) { struct bcma_devinfo *dinfo; struct bhnd_resource *r; - uint32_t rst; + uint16_t clkflags; int error; if (device_get_parent(child) != dev) return (EINVAL); dinfo = device_get_ivars(child); + /* We require exclusive control over BHND_IOCTL_CLK_(EN|FORCE) */ + clkflags = BHND_IOCTL_CLK_EN | BHND_IOCTL_CLK_FORCE; + if (ioctl & clkflags) + return (EINVAL); + /* Can't suspend the core without access to the agent registers */ if ((r = dinfo->res_agent) == NULL) return (ENODEV); /* Wait for any pending reset operations to clear */ if ((error = bcma_dmp_wait_reset(child, dinfo))) return (error); - /* Already in reset? */ - rst = bhnd_bus_read_4(r, BCMA_DMP_RESETCTRL); - if (rst & BCMA_DMP_RC_RESET) - return (0); - - /* Put core into reset */ + /* Put core into reset (if not already in reset) */ if ((error = bcma_dmp_write_reset(child, dinfo, BCMA_DMP_RC_RESET))) return (error); - /* Clear core flags */ - if ((error = bhnd_write_ioctl(child, 0x0, UINT16_MAX))) + /* Write core flags (and clear CLK_EN/CLK_FORCE) */ + if ((error = bhnd_write_ioctl(child, ioctl, ~clkflags))) return (error); return (0); } static int bcma_read_config(device_t dev, device_t child, bus_size_t offset, void *value, u_int width) { struct bcma_devinfo *dinfo; struct bhnd_resource *r; /* Must be a directly attached child core */ if (device_get_parent(child) != dev) return (EINVAL); /* Fetch the agent registers */ dinfo = device_get_ivars(child); if ((r = dinfo->res_agent) == NULL) return (ENODEV); /* Verify bounds */ if (offset > rman_get_size(r->res)) return (EFAULT); if (rman_get_size(r->res) - offset < width) return (EFAULT); switch (width) { case 1: *((uint8_t *)value) = bhnd_bus_read_1(r, offset); return (0); case 2: *((uint16_t *)value) = bhnd_bus_read_2(r, offset); return (0); case 4: *((uint32_t *)value) = bhnd_bus_read_4(r, offset); return (0); default: return (EINVAL); } } static int bcma_write_config(device_t dev, device_t child, bus_size_t offset, const void *value, u_int width) { struct bcma_devinfo *dinfo; struct bhnd_resource *r; /* Must be a directly attached child core */ if (device_get_parent(child) != dev) return (EINVAL); /* Fetch the agent registers */ dinfo = device_get_ivars(child); if ((r = dinfo->res_agent) == NULL) return (ENODEV); /* Verify bounds */ if (offset > rman_get_size(r->res)) return (EFAULT); if (rman_get_size(r->res) - offset < width) return (EFAULT); switch (width) { case 1: bhnd_bus_write_1(r, offset, *(const uint8_t *)value); return (0); case 2: bhnd_bus_write_2(r, offset, *(const uint16_t *)value); return (0); case 4: bhnd_bus_write_4(r, offset, *(const uint32_t *)value); return (0); default: return (EINVAL); } } static u_int bcma_get_port_count(device_t dev, device_t child, bhnd_port_type type) { struct bcma_devinfo *dinfo; /* delegate non-bus-attached devices to our parent */ if (device_get_parent(child) != dev) return (BHND_BUS_GET_PORT_COUNT(device_get_parent(dev), child, type)); dinfo = device_get_ivars(child); switch (type) { case BHND_PORT_DEVICE: return (dinfo->corecfg->num_dev_ports); case BHND_PORT_BRIDGE: return (dinfo->corecfg->num_bridge_ports); case BHND_PORT_AGENT: return (dinfo->corecfg->num_wrapper_ports); default: device_printf(dev, "%s: unknown type (%d)\n", __func__, type); return (0); } } static u_int bcma_get_region_count(device_t dev, device_t child, bhnd_port_type type, u_int port_num) { struct bcma_devinfo *dinfo; struct bcma_sport_list *ports; struct bcma_sport *port; /* delegate non-bus-attached devices to our parent */ if (device_get_parent(child) != dev) return (BHND_BUS_GET_REGION_COUNT(device_get_parent(dev), child, type, port_num)); dinfo = device_get_ivars(child); ports = bcma_corecfg_get_port_list(dinfo->corecfg, type); STAILQ_FOREACH(port, ports, sp_link) { if (port->sp_num == port_num) return (port->sp_num_maps); } /* not found */ return (0); } static int bcma_get_port_rid(device_t dev, device_t child, bhnd_port_type port_type, u_int port_num, u_int region_num) { struct bcma_devinfo *dinfo; struct bcma_map *map; struct bcma_sport_list *ports; struct bcma_sport *port; dinfo = device_get_ivars(child); ports = bcma_corecfg_get_port_list(dinfo->corecfg, port_type); STAILQ_FOREACH(port, ports, sp_link) { if (port->sp_num != port_num) continue; STAILQ_FOREACH(map, &port->sp_maps, m_link) if (map->m_region_num == region_num) return map->m_rid; } return -1; } static int bcma_decode_port_rid(device_t dev, device_t child, int type, int rid, bhnd_port_type *port_type, u_int *port_num, u_int *region_num) { struct bcma_devinfo *dinfo; struct bcma_map *map; struct bcma_sport_list *ports; struct bcma_sport *port; dinfo = device_get_ivars(child); /* Ports are always memory mapped */ if (type != SYS_RES_MEMORY) return (EINVAL); /* Starting with the most likely device list, search all three port * lists */ bhnd_port_type types[] = { BHND_PORT_DEVICE, BHND_PORT_AGENT, BHND_PORT_BRIDGE }; for (int i = 0; i < nitems(types); i++) { ports = bcma_corecfg_get_port_list(dinfo->corecfg, types[i]); STAILQ_FOREACH(port, ports, sp_link) { STAILQ_FOREACH(map, &port->sp_maps, m_link) { if (map->m_rid != rid) continue; *port_type = port->sp_type; *port_num = port->sp_num; *region_num = map->m_region_num; return (0); } } } return (ENOENT); } static int bcma_get_region_addr(device_t dev, device_t child, bhnd_port_type port_type, u_int port_num, u_int region_num, bhnd_addr_t *addr, bhnd_size_t *size) { struct bcma_devinfo *dinfo; struct bcma_map *map; struct bcma_sport_list *ports; struct bcma_sport *port; dinfo = device_get_ivars(child); ports = bcma_corecfg_get_port_list(dinfo->corecfg, port_type); /* Search the port list */ STAILQ_FOREACH(port, ports, sp_link) { if (port->sp_num != port_num) continue; STAILQ_FOREACH(map, &port->sp_maps, m_link) { if (map->m_region_num != region_num) continue; /* Found! */ *addr = map->m_base; *size = map->m_size; return (0); } } return (ENOENT); } /** * Default bcma(4) bus driver implementation of BHND_BUS_GET_INTR_COUNT(). */ u_int bcma_get_intr_count(device_t dev, device_t child) { struct bcma_devinfo *dinfo; /* delegate non-bus-attached devices to our parent */ if (device_get_parent(child) != dev) return (BHND_BUS_GET_INTR_COUNT(device_get_parent(dev), child)); dinfo = device_get_ivars(child); return (dinfo->num_intrs); } /** * Default bcma(4) bus driver implementation of BHND_BUS_GET_INTR_IVEC(). */ int bcma_get_intr_ivec(device_t dev, device_t child, u_int intr, u_int *ivec) { struct bcma_devinfo *dinfo; struct bcma_intr *desc; /* delegate non-bus-attached devices to our parent */ if (device_get_parent(child) != dev) { return (BHND_BUS_GET_INTR_IVEC(device_get_parent(dev), child, intr, ivec)); } dinfo = device_get_ivars(child); STAILQ_FOREACH(desc, &dinfo->intrs, i_link) { if (desc->i_sel == intr) { *ivec = desc->i_busline; return (0); } } /* Not found */ return (ENXIO); } /** * Scan the device enumeration ROM table, adding all valid discovered cores to * the bus. * * @param bus The bcma bus. */ int bcma_add_children(device_t bus) { bhnd_erom_t *erom; struct bcma_erom *bcma_erom; struct bhnd_erom_io *eio; const struct bhnd_chipid *cid; struct bcma_corecfg *corecfg; struct bcma_devinfo *dinfo; device_t child; int error; cid = BHND_BUS_GET_CHIPID(bus, bus); corecfg = NULL; /* Allocate our EROM parser */ eio = bhnd_erom_iores_new(bus, BCMA_EROM_RID); erom = bhnd_erom_alloc(&bcma_erom_parser, cid, eio); if (erom == NULL) { bhnd_erom_io_fini(eio); return (ENODEV); } /* Add all cores. */ bcma_erom = (struct bcma_erom *)erom; while ((error = bcma_erom_next_corecfg(bcma_erom, &corecfg)) == 0) { /* Add the child device */ child = BUS_ADD_CHILD(bus, 0, NULL, -1); if (child == NULL) { error = ENXIO; goto cleanup; } /* Initialize device ivars */ dinfo = device_get_ivars(child); if ((error = bcma_init_dinfo(bus, child, dinfo, corecfg))) goto cleanup; /* The dinfo instance now owns the corecfg value */ corecfg = NULL; /* If pins are floating or the hardware is otherwise * unpopulated, the device shouldn't be used. */ if (bhnd_is_hw_disabled(child)) device_disable(child); /* Issue bus callback for fully initialized child. */ BHND_BUS_CHILD_ADDED(bus, child); } /* EOF while parsing cores is expected */ if (error == ENOENT) error = 0; cleanup: bhnd_erom_free(erom); if (corecfg != NULL) bcma_free_corecfg(corecfg); if (error) device_delete_children(bus); return (error); } static device_method_t bcma_methods[] = { /* Device interface */ DEVMETHOD(device_probe, bcma_probe), DEVMETHOD(device_attach, bcma_attach), DEVMETHOD(device_detach, bcma_detach), /* Bus interface */ DEVMETHOD(bus_add_child, bcma_add_child), DEVMETHOD(bus_child_deleted, bcma_child_deleted), DEVMETHOD(bus_read_ivar, bcma_read_ivar), DEVMETHOD(bus_write_ivar, bcma_write_ivar), DEVMETHOD(bus_get_resource_list, bcma_get_resource_list), /* BHND interface */ DEVMETHOD(bhnd_bus_get_erom_class, bcma_get_erom_class), DEVMETHOD(bhnd_bus_read_ioctl, bcma_read_ioctl), DEVMETHOD(bhnd_bus_write_ioctl, bcma_write_ioctl), DEVMETHOD(bhnd_bus_read_iost, bcma_read_iost), DEVMETHOD(bhnd_bus_is_hw_suspended, bcma_is_hw_suspended), DEVMETHOD(bhnd_bus_reset_hw, bcma_reset_hw), DEVMETHOD(bhnd_bus_suspend_hw, bcma_suspend_hw), DEVMETHOD(bhnd_bus_read_config, bcma_read_config), DEVMETHOD(bhnd_bus_write_config, bcma_write_config), DEVMETHOD(bhnd_bus_get_port_count, bcma_get_port_count), DEVMETHOD(bhnd_bus_get_region_count, bcma_get_region_count), DEVMETHOD(bhnd_bus_get_port_rid, bcma_get_port_rid), DEVMETHOD(bhnd_bus_decode_port_rid, bcma_decode_port_rid), DEVMETHOD(bhnd_bus_get_region_addr, bcma_get_region_addr), DEVMETHOD(bhnd_bus_get_intr_count, bcma_get_intr_count), DEVMETHOD(bhnd_bus_get_intr_ivec, bcma_get_intr_ivec), DEVMETHOD_END }; DEFINE_CLASS_1(bhnd, bcma_driver, bcma_methods, sizeof(struct bcma_softc), bhnd_driver); MODULE_VERSION(bcma, 1); MODULE_DEPEND(bcma, bhnd, 1, 1, 1); Index: head/sys/dev/bhnd/bcma/bcma_subr.c =================================================================== --- head/sys/dev/bhnd/bcma/bcma_subr.c (revision 326291) +++ head/sys/dev/bhnd/bcma/bcma_subr.c (revision 326292) @@ -1,605 +1,612 @@ /*- * Copyright (c) 2015-2016 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include "bcma_dmp.h" #include "bcmavar.h" /* Return the resource ID for a device's agent register allocation */ #define BCMA_AGENT_RID(_dinfo) \ (BCMA_AGENT_RID_BASE + BCMA_DINFO_COREIDX(_dinfo)) /** * Allocate and initialize new core config structure. * * @param core_index Core index on the bus. * @param core_unit Core unit number. * @param vendor Core designer. * @param device Core identifier (e.g. part number). * @param hwrev Core revision. */ struct bcma_corecfg * bcma_alloc_corecfg(u_int core_index, int core_unit, uint16_t vendor, uint16_t device, uint8_t hwrev) { struct bcma_corecfg *cfg; cfg = malloc(sizeof(*cfg), M_BHND, M_NOWAIT); if (cfg == NULL) return NULL; cfg->core_info = (struct bhnd_core_info) { .vendor = vendor, .device = device, .hwrev = hwrev, .core_idx = core_index, .unit = core_unit }; STAILQ_INIT(&cfg->master_ports); cfg->num_master_ports = 0; STAILQ_INIT(&cfg->dev_ports); cfg->num_dev_ports = 0; STAILQ_INIT(&cfg->bridge_ports); cfg->num_bridge_ports = 0; STAILQ_INIT(&cfg->wrapper_ports); cfg->num_wrapper_ports = 0; return (cfg); } /** * Deallocate the given core config and any associated resources. * * @param corecfg Core info to be deallocated. */ void bcma_free_corecfg(struct bcma_corecfg *corecfg) { struct bcma_mport *mport, *mnext; struct bcma_sport *sport, *snext; STAILQ_FOREACH_SAFE(mport, &corecfg->master_ports, mp_link, mnext) { free(mport, M_BHND); } STAILQ_FOREACH_SAFE(sport, &corecfg->dev_ports, sp_link, snext) { bcma_free_sport(sport); } STAILQ_FOREACH_SAFE(sport, &corecfg->bridge_ports, sp_link, snext) { bcma_free_sport(sport); } STAILQ_FOREACH_SAFE(sport, &corecfg->wrapper_ports, sp_link, snext) { bcma_free_sport(sport); } free(corecfg, M_BHND); } /** * Return the @p cfg port list for @p type. * * @param cfg The core configuration. * @param type The requested port type. */ struct bcma_sport_list * bcma_corecfg_get_port_list(struct bcma_corecfg *cfg, bhnd_port_type type) { switch (type) { case BHND_PORT_DEVICE: return (&cfg->dev_ports); break; case BHND_PORT_BRIDGE: return (&cfg->bridge_ports); break; case BHND_PORT_AGENT: return (&cfg->wrapper_ports); break; default: return (NULL); } } /** * Populate the resource list and bcma_map RIDs using the maps defined on * @p ports. * * @param bus The requesting bus device. * @param dinfo The device info instance to be initialized. * @param ports The set of ports to be enumerated */ static void bcma_dinfo_init_port_resource_info(device_t bus, struct bcma_devinfo *dinfo, struct bcma_sport_list *ports) { struct bcma_map *map; struct bcma_sport *port; bhnd_addr_t end; STAILQ_FOREACH(port, ports, sp_link) { STAILQ_FOREACH(map, &port->sp_maps, m_link) { /* * Create the corresponding device resource list entry. * * We necessarily skip registration if the region's * device memory range is not representable via * rman_res_t. * * When rman_res_t is migrated to uintmax_t, any * range should be representable. */ end = map->m_base + map->m_size; if (map->m_base <= RM_MAX_END && end <= RM_MAX_END) { map->m_rid = resource_list_add_next( &dinfo->resources, SYS_RES_MEMORY, map->m_base, end, map->m_size); } else if (bootverbose) { device_printf(bus, "core%u %s%u.%u: region %llx-%llx extends " "beyond supported addressable range\n", dinfo->corecfg->core_info.core_idx, bhnd_port_type_name(port->sp_type), port->sp_num, map->m_region_num, (unsigned long long) map->m_base, (unsigned long long) end); } } } } /** * Allocate the per-core agent register block for a device info structure. * * If an agent0.0 region is not defined on @p dinfo, the device info * agent resource is set to NULL and 0 is returned. * * @param bus The requesting bus device. * @param child The bcma child device. * @param dinfo The device info associated with @p child * * @retval 0 success * @retval non-zero resource allocation failed. */ static int bcma_dinfo_init_agent(device_t bus, device_t child, struct bcma_devinfo *dinfo) { bhnd_addr_t addr; bhnd_size_t size; rman_res_t r_start, r_count, r_end; int error; KASSERT(dinfo->res_agent == NULL, ("double allocation of agent")); /* Verify that the agent register block exists and is * mappable */ if (bhnd_get_port_rid(child, BHND_PORT_AGENT, 0, 0) == -1) return (0); /* nothing to do */ /* Fetch the address of the agent register block */ error = bhnd_get_region_addr(child, BHND_PORT_AGENT, 0, 0, &addr, &size); if (error) { device_printf(bus, "failed fetching agent register block " "address for core %u\n", BCMA_DINFO_COREIDX(dinfo)); return (error); } /* Allocate the resource */ r_start = addr; r_count = size; r_end = r_start + r_count - 1; dinfo->rid_agent = BCMA_AGENT_RID(dinfo); dinfo->res_agent = BHND_BUS_ALLOC_RESOURCE(bus, bus, SYS_RES_MEMORY, &dinfo->rid_agent, r_start, r_end, r_count, RF_ACTIVE|RF_SHAREABLE); if (dinfo->res_agent == NULL) { device_printf(bus, "failed allocating agent register block for " "core %u\n", BCMA_DINFO_COREIDX(dinfo)); return (ENXIO); } return (0); } /** * Populate the list of interrupts for a device info structure * previously initialized via bcma_dinfo_alloc_agent(). * * If an agent0.0 region is not mapped on @p dinfo, the OOB interrupt bank is * assumed to be unavailable and 0 is returned. * * @param bus The requesting bus device. * @param dinfo The device info instance to be initialized. */ static int bcma_dinfo_init_intrs(device_t bus, device_t child, struct bcma_devinfo *dinfo) { uint32_t dmpcfg, oobw; /* Agent block must be mapped */ if (dinfo->res_agent == NULL) return (0); /* Agent must support OOB */ dmpcfg = bhnd_bus_read_4(dinfo->res_agent, BCMA_DMP_CONFIG); if (!BCMA_DMP_GET_FLAG(dmpcfg, BCMA_DMP_CFG_OOB)) return (0); /* Fetch width of the OOB interrupt bank */ oobw = bhnd_bus_read_4(dinfo->res_agent, BCMA_DMP_OOB_OUTWIDTH(BCMA_OOB_BANK_INTR)); if (oobw > BCMA_OOB_NUM_SEL) { device_printf(bus, "ignoring invalid OOBOUTWIDTH for core %u: " "%#x\n", BCMA_DINFO_COREIDX(dinfo), oobw); return (0); } /* Fetch OOBSEL busline values and populate list of interrupt * descriptors */ for (uint32_t sel = 0; sel < oobw; sel++) { struct bcma_intr *intr; uint32_t selout; uint8_t line; if (dinfo->num_intrs == UINT_MAX) return (ENOMEM); selout = bhnd_bus_read_4(dinfo->res_agent, BCMA_DMP_OOBSELOUT( BCMA_OOB_BANK_INTR, sel)); line = (selout >> BCMA_DMP_OOBSEL_SHIFT(sel)) & BCMA_DMP_OOBSEL_BUSLINE_MASK; intr = bcma_alloc_intr(BCMA_OOB_BANK_INTR, sel, line); if (intr == NULL) { device_printf(bus, "failed allocating interrupt " "descriptor %#x for core %u\n", sel, BCMA_DINFO_COREIDX(dinfo)); return (ENOMEM); } STAILQ_INSERT_HEAD(&dinfo->intrs, intr, i_link); dinfo->num_intrs++; } return (0); } /** * Allocate and return a new empty device info structure. * * @param bus The requesting bus device. * * @retval NULL if allocation failed. */ struct bcma_devinfo * bcma_alloc_dinfo(device_t bus) { struct bcma_devinfo *dinfo; dinfo = malloc(sizeof(struct bcma_devinfo), M_BHND, M_NOWAIT|M_ZERO); if (dinfo == NULL) return (NULL); dinfo->corecfg = NULL; dinfo->res_agent = NULL; dinfo->rid_agent = -1; STAILQ_INIT(&dinfo->intrs); dinfo->num_intrs = 0; resource_list_init(&dinfo->resources); return (dinfo); } /** * Initialize a device info structure previously allocated via * bcma_alloc_dinfo, assuming ownership of the provided core * configuration. * * @param bus The requesting bus device. * @param child The bcma child device. * @param dinfo The device info associated with @p child * @param corecfg Device core configuration; ownership of this value * will be assumed by @p dinfo. * * @retval 0 success * @retval non-zero initialization failed. */ int bcma_init_dinfo(device_t bus, device_t child, struct bcma_devinfo *dinfo, struct bcma_corecfg *corecfg) { struct bcma_intr *intr; int error; KASSERT(dinfo->corecfg == NULL, ("dinfo previously initialized")); /* Save core configuration value */ dinfo->corecfg = corecfg; /* The device ports must always be initialized first to ensure that * rid 0 maps to the first device port */ bcma_dinfo_init_port_resource_info(bus, dinfo, &corecfg->dev_ports); bcma_dinfo_init_port_resource_info(bus, dinfo, &corecfg->bridge_ports); bcma_dinfo_init_port_resource_info(bus, dinfo, &corecfg->wrapper_ports); /* Now that we've defined the port resources, we can map the device's * agent registers (if any) */ if ((error = bcma_dinfo_init_agent(bus, child, dinfo))) goto failed; /* With agent registers mapped, we can populate the device's interrupt * descriptors */ if ((error = bcma_dinfo_init_intrs(bus, child, dinfo))) goto failed; /* Finally, map the interrupt descriptors */ STAILQ_FOREACH(intr, &dinfo->intrs, i_link) { /* Already mapped? */ if (intr->i_mapped) continue; /* Map the interrupt */ error = BHND_BUS_MAP_INTR(bus, child, intr->i_sel, &intr->i_irq); if (error) { device_printf(bus, "failed mapping interrupt line %u " "for core %u: %d\n", intr->i_sel, BCMA_DINFO_COREIDX(dinfo), error); goto failed; } intr->i_mapped = true; /* Add to resource list */ intr->i_rid = resource_list_add_next(&dinfo->resources, SYS_RES_IRQ, intr->i_irq, intr->i_irq, 1); } return (0); failed: /* Owned by the caller on failure */ dinfo->corecfg = NULL; return (error); } /** * Deallocate the given device info structure and any associated resources. * * @param bus The requesting bus device. * @param dinfo Device info to be deallocated. */ void bcma_free_dinfo(device_t bus, device_t child, struct bcma_devinfo *dinfo) { struct bcma_intr *intr, *inext; resource_list_free(&dinfo->resources); if (dinfo->corecfg != NULL) bcma_free_corecfg(dinfo->corecfg); /* Release agent resource, if any */ if (dinfo->res_agent != NULL) { bhnd_release_resource(bus, SYS_RES_MEMORY, dinfo->rid_agent, dinfo->res_agent); } /* Clean up interrupt descriptors */ STAILQ_FOREACH_SAFE(intr, &dinfo->intrs, i_link, inext) { STAILQ_REMOVE(&dinfo->intrs, intr, bcma_intr, i_link); /* Release our IRQ mapping */ if (intr->i_mapped) { BHND_BUS_UNMAP_INTR(bus, child, intr->i_irq); intr->i_mapped = false; } bcma_free_intr(intr); } free(dinfo, M_BHND); } /** * Allocate and initialize a new interrupt descriptor. * * @param bank OOB bank. * @param sel OOB selector. * @param line OOB bus line. */ struct bcma_intr * bcma_alloc_intr(uint8_t bank, uint8_t sel, uint8_t line) { struct bcma_intr *intr; if (bank >= BCMA_OOB_NUM_BANKS) return (NULL); if (sel >= BCMA_OOB_NUM_SEL) return (NULL); if (line >= BCMA_OOB_NUM_BUSLINES) return (NULL); intr = malloc(sizeof(*intr), M_BHND, M_NOWAIT); if (intr == NULL) return (NULL); intr->i_bank = bank; intr->i_sel = sel; intr->i_busline = line; intr->i_mapped = false; intr->i_irq = 0; return (intr); } /** * Deallocate all resources associated with the given interrupt descriptor. * * @param intr Interrupt descriptor to be deallocated. */ void bcma_free_intr(struct bcma_intr *intr) { KASSERT(!intr->i_mapped, ("interrupt %u still mapped", intr->i_sel)); free(intr, M_BHND); } /** * Allocate and initialize new slave port descriptor. * * @param port_num Per-core port number. * @param port_type Port type. */ struct bcma_sport * bcma_alloc_sport(bcma_pid_t port_num, bhnd_port_type port_type) { struct bcma_sport *sport; sport = malloc(sizeof(struct bcma_sport), M_BHND, M_NOWAIT); if (sport == NULL) return NULL; sport->sp_num = port_num; sport->sp_type = port_type; sport->sp_num_maps = 0; STAILQ_INIT(&sport->sp_maps); return sport; } /** * Deallocate all resources associated with the given port descriptor. * * @param sport Port descriptor to be deallocated. */ void bcma_free_sport(struct bcma_sport *sport) { struct bcma_map *map, *mapnext; STAILQ_FOREACH_SAFE(map, &sport->sp_maps, m_link, mapnext) { free(map, M_BHND); } free(sport, M_BHND); } /** * Given a bcma(4) child's device info, spin waiting for the device's DMP * resetstatus register to clear. * * @param child The bcma(4) child device. * @param dinfo The @p child device info. * * @retval 0 success * @retval ENODEV if @p dinfo does not map an agent register resource. * @retval ETIMEDOUT if timeout occurs */ int bcma_dmp_wait_reset(device_t child, struct bcma_devinfo *dinfo) { uint32_t rst; if (dinfo->res_agent == NULL) return (ENODEV); /* 300us should be long enough, but there are references to this * requiring up to 10ms when performing reset of an 80211 core * after a MAC PSM microcode watchdog event. */ for (int i = 0; i < 10000; i += 10) { rst = bhnd_bus_read_4(dinfo->res_agent, BCMA_DMP_RESETSTATUS); if (rst == 0) return (0); DELAY(10); } device_printf(child, "BCMA_DMP_RESETSTATUS timeout\n"); return (ETIMEDOUT); } /** * Set the bcma(4) child's DMP resetctrl register value, and then wait * for all backplane operations to complete. * * @param child The bcma(4) child device. * @param dinfo The @p child device info. * @param value The new ioctrl value to set. * * @retval 0 success * @retval ENODEV if @p dinfo does not map an agent register resource. * @retval ETIMEDOUT if timeout occurs waiting for reset completion */ int bcma_dmp_write_reset(device_t child, struct bcma_devinfo *dinfo, uint32_t value) { + uint32_t rst; + if (dinfo->res_agent == NULL) return (ENODEV); + + /* Already in requested reset state? */ + rst = bhnd_bus_read_4(dinfo->res_agent, BCMA_DMP_RESETCTRL); + if (rst == value) + return (0); bhnd_bus_write_4(dinfo->res_agent, BCMA_DMP_RESETCTRL, value); bhnd_bus_read_4(dinfo->res_agent, BCMA_DMP_RESETCTRL); /* read-back */ DELAY(10); return (bcma_dmp_wait_reset(child, dinfo)); } Index: head/sys/dev/bhnd/bhnd.h =================================================================== --- head/sys/dev/bhnd/bhnd.h (revision 326291) +++ head/sys/dev/bhnd/bhnd.h (revision 326292) @@ -1,1736 +1,1740 @@ /*- * Copyright (c) 2015-2016 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. * * $FreeBSD$ */ #ifndef _BHND_BHND_H_ #define _BHND_BHND_H_ #include #include #include #include #include #include "bhnd_ids.h" #include "bhnd_types.h" #include "bhnd_erom_types.h" #include "bhnd_debug.h" #include "bhnd_bus_if.h" #include "bhnd_match.h" #include "nvram/bhnd_nvram.h" extern devclass_t bhnd_devclass; extern devclass_t bhnd_hostb_devclass; extern devclass_t bhnd_nvram_devclass; #define BHND_CHIPID_MAX_NAMELEN 32 /**< maximum buffer required for a bhnd_format_chip_id() */ /** * bhnd child instance variables */ enum bhnd_device_vars { BHND_IVAR_VENDOR, /**< Designer's JEP-106 manufacturer ID. */ BHND_IVAR_DEVICE, /**< Part number */ BHND_IVAR_HWREV, /**< Core revision */ BHND_IVAR_DEVICE_CLASS, /**< Core class (@sa bhnd_devclass_t) */ BHND_IVAR_VENDOR_NAME, /**< Core vendor name */ BHND_IVAR_DEVICE_NAME, /**< Core name */ BHND_IVAR_CORE_INDEX, /**< Bus-assigned core number */ BHND_IVAR_CORE_UNIT, /**< Bus-assigned core unit number, assigned sequentially (starting at 0) for each vendor/device pair. */ BHND_IVAR_PMU_INFO, /**< Internal bus-managed PMU state */ }; /** * bhnd device probe priority bands. */ enum { BHND_PROBE_ROOT = 0, /**< Nexus or host bridge */ BHND_PROBE_BUS = 1000, /**< Buses and bridges */ BHND_PROBE_CPU = 2000, /**< CPU devices */ BHND_PROBE_INTERRUPT = 3000, /**< Interrupt controllers. */ BHND_PROBE_TIMER = 4000, /**< Timers and clocks. */ BHND_PROBE_RESOURCE = 5000, /**< Resource discovery (including NVRAM/SPROM) */ BHND_PROBE_DEFAULT = 6000, /**< Default device priority */ }; /** * Constants defining fine grained ordering within a BHND_PROBE_* priority band. * * Example: * @code * BHND_PROBE_BUS + BHND_PROBE_ORDER_FIRST * @endcode */ enum { BHND_PROBE_ORDER_FIRST = 0, BHND_PROBE_ORDER_EARLY = 25, BHND_PROBE_ORDER_MIDDLE = 50, BHND_PROBE_ORDER_LATE = 75, BHND_PROBE_ORDER_LAST = 100 }; /** * Per-core IOCTL flags common to all bhnd(4) cores. */ enum { BHND_IOCTL_BIST = 0x8000, /**< Initiate a built-in self-test (BIST). Must be cleared after BIST results are read via BHND_IOST_BIST_* */ BHND_IOCTL_PME = 0x4000, /**< Enable posting of power management events by the core. */ BHND_IOCTL_CFLAGS = 0x3FFC, /**< Reserved for core-specific ioctl flags. */ BHND_IOCTL_CLK_FORCE = 0x0002, /**< Force disable of clock gating, resulting in all clocks being distributed within the core. Should be set when asserting/deasserting reset to ensure the reset signal fully propagates to the entire core. */ BHND_IOCTL_CLK_EN = 0x0001, /**< If cleared, the core clock will be disabled. Should be set during normal operation, and cleared when the core is held in reset. */ }; /** * Per-core IOST flags common to all bhnd(4) cores. */ enum { BHND_IOST_BIST_DONE = 0x8000, /**< Set upon BIST completion (see BHND_IOCTL_BIST), and cleared if 0 is written to BHND_IOCTL_BIST. */ BHND_IOST_BIST_FAIL = 0x4000, /**< Set upon detection of a BIST error; the value is unspecified if BIST has not completed and BHND_IOST_BIST_DONE is not set. */ BHND_IOST_CLK = 0x2000, /**< Set if the core has requested that gated clocks be enabled, or cleared otherwise. The value is undefined if a core does not support clock gating. */ BHND_IOST_DMA64 = 0x1000, /**< Set if this core supports 64-bit DMA */ BHND_IOST_CFLAGS = 0x0FFC, /**< Reserved for core-specific status flags. */ }; /* * Simplified accessors for bhnd device ivars */ #define BHND_ACCESSOR(var, ivar, type) \ __BUS_ACCESSOR(bhnd, var, BHND, ivar, type) BHND_ACCESSOR(vendor, VENDOR, uint16_t); BHND_ACCESSOR(device, DEVICE, uint16_t); BHND_ACCESSOR(hwrev, HWREV, uint8_t); BHND_ACCESSOR(class, DEVICE_CLASS, bhnd_devclass_t); BHND_ACCESSOR(vendor_name, VENDOR_NAME, const char *); BHND_ACCESSOR(device_name, DEVICE_NAME, const char *); BHND_ACCESSOR(core_index, CORE_INDEX, u_int); BHND_ACCESSOR(core_unit, CORE_UNIT, int); BHND_ACCESSOR(pmu_info, PMU_INFO, void *); #undef BHND_ACCESSOR /** * A bhnd(4) board descriptor. */ struct bhnd_board_info { uint16_t board_vendor; /**< PCI-SIG vendor ID (even on non-PCI * devices). * * On PCI devices, this will generally * be the subsystem vendor ID, but the * value may be overridden in device * NVRAM. */ uint16_t board_type; /**< Board type (See BHND_BOARD_*) * * On PCI devices, this will generally * be the subsystem device ID, but the * value may be overridden in device * NVRAM. */ uint16_t board_rev; /**< Board revision. */ uint8_t board_srom_rev; /**< Board SROM format revision */ uint32_t board_flags; /**< Board flags (see BHND_BFL_*) */ uint32_t board_flags2; /**< Board flags 2 (see BHND_BFL2_*) */ uint32_t board_flags3; /**< Board flags 3 (see BHND_BFL3_*) */ }; /** * Chip Identification * * This is read from the ChipCommon ID register; on earlier bhnd(4) devices * where ChipCommon is unavailable, known values must be supplied. */ struct bhnd_chipid { uint16_t chip_id; /**< chip id (BHND_CHIPID_*) */ uint8_t chip_rev; /**< chip revision */ uint8_t chip_pkg; /**< chip package (BHND_PKGID_*) */ uint8_t chip_type; /**< chip type (BHND_CHIPTYPE_*) */ bhnd_addr_t enum_addr; /**< chip_type-specific enumeration * address; either the siba(4) base * core register block, or the bcma(4) * EROM core address. */ uint8_t ncores; /**< number of cores, if known. 0 if * not available. */ }; /** * A bhnd(4) core descriptor. */ struct bhnd_core_info { uint16_t vendor; /**< JEP-106 vendor (BHND_MFGID_*) */ uint16_t device; /**< device */ uint16_t hwrev; /**< hardware revision */ u_int core_idx; /**< bus-assigned core index */ int unit; /**< bus-assigned core unit */ }; /** * bhnd(4) DMA address widths. */ typedef enum { BHND_DMA_ADDR_30BIT = 30, /**< 30-bit DMA */ BHND_DMA_ADDR_32BIT = 32, /**< 32-bit DMA */ BHND_DMA_ADDR_64BIT = 64, /**< 64-bit DMA */ } bhnd_dma_addrwidth; /** * Convert an address width (in bits) to its corresponding mask. */ #define BHND_DMA_ADDR_BITMASK(_width) \ ((_width >= 64) ? ~0ULL : \ (_width == 0) ? 0x0 : \ ((1ULL << (_width)) - 1)) \ /** * bhnd(4) DMA address translation descriptor. */ struct bhnd_dma_translation { /** * Host-to-device physical address translation. * * This may be added to the host physical address to produce a device * DMA address. */ bhnd_addr_t base_addr; /** * Device-addressable address mask. * * This defines the device's DMA address range, excluding any bits * reserved for mapping the address to the base_addr. */ bhnd_addr_t addr_mask; /** * Device-addressable extended address mask. * * If a per-core bhnd(4) DMA engine supports the 'addrext' control * field, it can be used to provide address bits excluded by addr_mask. * * Support for DMA extended address changes – including coordination * with the core providing DMA translation – is handled transparently by * the DMA engine. For example, on PCI(e) Wi-Fi chipsets, the Wi-Fi * core DMA engine will (in effect) update the PCI core's DMA * sbtopcitranslation base address to map the full address prior to * performing a DMA transaction. */ bhnd_addr_t addrext_mask; /** * Translation flags (see bhnd_dma_translation_flags). */ uint32_t flags; }; #define BHND_DMA_TRANSLATION_TABLE_END { 0, 0, 0, 0 } #define BHND_DMA_IS_TRANSLATION_TABLE_END(_dt) \ ((_dt)->base_addr == 0 && (_dt)->addr_mask == 0 && \ (_dt)->addrext_mask == 0 && (_dt)->flags == 0) /** * bhnd(4) DMA address translation flags. */ enum bhnd_dma_translation_flags { /** * The translation remaps the device's physical address space. * * This is used in conjunction with BHND_DMA_TRANSLATION_BYTESWAPPED to * define a DMA translation that provides byteswapped access to * physical memory on big-endian MIPS SoCs. */ BHND_DMA_TRANSLATION_PHYSMAP = (1<<0), /** * Provides a byte-swapped mapping; write requests will be byte-swapped * before being written to memory, and read requests will be * byte-swapped before being returned. * * This is primarily used to perform efficient byte swapping of DMA * data on embedded MIPS SoCs executing in big-endian mode. */ BHND_DMA_TRANSLATION_BYTESWAPPED = (1<<1), }; /** * A bhnd(4) bus resource. * * This provides an abstract interface to per-core resources that may require * bus-level remapping of address windows prior to access. */ struct bhnd_resource { struct resource *res; /**< the system resource. */ bool direct; /**< false if the resource requires * bus window remapping before it * is MMIO accessible. */ }; /** Wrap the active resource @p _r in a bhnd_resource structure */ #define BHND_DIRECT_RESOURCE(_r) ((struct bhnd_resource) { \ .res = (_r), \ .direct = true, \ }) /** * Device quirk table descriptor. */ struct bhnd_device_quirk { struct bhnd_device_match desc; /**< device match descriptor */ uint32_t quirks; /**< quirk flags */ }; #define BHND_CORE_QUIRK(_rev, _flags) \ {{ BHND_MATCH_CORE_REV(_rev) }, (_flags) } #define BHND_CHIP_QUIRK(_chip, _rev, _flags) \ {{ BHND_MATCH_CHIP_IR(BCM ## _chip, _rev) }, (_flags) } #define BHND_PKG_QUIRK(_chip, _pkg, _flags) \ {{ BHND_MATCH_CHIP_IP(BCM ## _chip, BCM ## _chip ## _pkg) }, (_flags) } #define BHND_BOARD_QUIRK(_board, _flags) \ {{ BHND_MATCH_BOARD_TYPE(_board) }, \ (_flags) } #define BHND_DEVICE_QUIRK_END { { BHND_MATCH_ANY }, 0 } #define BHND_DEVICE_QUIRK_IS_END(_q) \ (((_q)->desc.m.match_flags == 0) && (_q)->quirks == 0) enum { BHND_DF_ANY = 0, BHND_DF_HOSTB = (1<<0), /**< core is serving as the bus' host * bridge. implies BHND_DF_ADAPTER */ BHND_DF_SOC = (1<<1), /**< core is attached to a native bus (BHND_ATTACH_NATIVE) */ BHND_DF_ADAPTER = (1<<2), /**< core is attached to a bridged * adapter (BHND_ATTACH_ADAPTER) */ }; /** Device probe table descriptor */ struct bhnd_device { const struct bhnd_device_match core; /**< core match descriptor */ const char *desc; /**< device description, or NULL. */ const struct bhnd_device_quirk *quirks_table; /**< quirks table for this device, or NULL */ uint32_t device_flags; /**< required BHND_DF_* flags */ }; #define _BHND_DEVICE(_vendor, _device, _desc, _quirks, \ _flags, ...) \ { { BHND_MATCH_CORE(BHND_MFGID_ ## _vendor, \ BHND_COREID_ ## _device) }, _desc, _quirks, \ _flags } #define BHND_DEVICE(_vendor, _device, _desc, _quirks, ...) \ _BHND_DEVICE(_vendor, _device, _desc, _quirks, \ ## __VA_ARGS__, 0) #define BHND_DEVICE_END { { BHND_MATCH_ANY }, NULL, NULL, 0 } #define BHND_DEVICE_IS_END(_d) \ (BHND_MATCH_IS_ANY(&(_d)->core) && (_d)->desc == NULL) /** * bhnd device sort order. */ typedef enum { BHND_DEVICE_ORDER_ATTACH, /**< sort by bhnd(4) device attach order; child devices should be probed/attached in this order */ BHND_DEVICE_ORDER_DETACH, /**< sort by bhnd(4) device detach order; child devices should be detached, suspended, and shutdown in this order */ } bhnd_device_order; /** * A registry of bhnd service providers. */ struct bhnd_service_registry { STAILQ_HEAD(,bhnd_service_entry) entries; /**< registered services */ struct mtx lock; /**< state lock */ }; /** * bhnd service provider flags. */ enum { BHND_SPF_INHERITED = (1<<0), /**< service provider reference was inherited from a parent bus, and should be deregistered when the last active reference is released */ }; const char *bhnd_vendor_name(uint16_t vendor); const char *bhnd_port_type_name(bhnd_port_type port_type); const char *bhnd_nvram_src_name(bhnd_nvram_src nvram_src); const char *bhnd_find_core_name(uint16_t vendor, uint16_t device); bhnd_devclass_t bhnd_find_core_class(uint16_t vendor, uint16_t device); const char *bhnd_core_name(const struct bhnd_core_info *ci); bhnd_devclass_t bhnd_core_class(const struct bhnd_core_info *ci); int bhnd_format_chip_id(char *buffer, size_t size, uint16_t chip_id); device_t bhnd_bus_match_child(device_t bus, const struct bhnd_core_match *desc); device_t bhnd_bus_find_child(device_t bus, bhnd_devclass_t class, int unit); int bhnd_bus_get_children(device_t bus, device_t **devlistp, int *devcountp, bhnd_device_order order); void bhnd_bus_free_children(device_t *devlist); int bhnd_bus_probe_children(device_t bus); int bhnd_sort_devices(device_t *devlist, size_t devcount, bhnd_device_order order); device_t bhnd_find_bridge_root(device_t dev, devclass_t bus_class); const struct bhnd_core_info *bhnd_match_core( const struct bhnd_core_info *cores, u_int num_cores, const struct bhnd_core_match *desc); const struct bhnd_core_info *bhnd_find_core( const struct bhnd_core_info *cores, u_int num_cores, bhnd_devclass_t class); struct bhnd_core_match bhnd_core_get_match_desc( const struct bhnd_core_info *core); bool bhnd_cores_equal( const struct bhnd_core_info *lhs, const struct bhnd_core_info *rhs); bool bhnd_core_matches( const struct bhnd_core_info *core, const struct bhnd_core_match *desc); bool bhnd_chip_matches( const struct bhnd_chipid *chipid, const struct bhnd_chip_match *desc); bool bhnd_board_matches( const struct bhnd_board_info *info, const struct bhnd_board_match *desc); bool bhnd_hwrev_matches(uint16_t hwrev, const struct bhnd_hwrev_match *desc); bool bhnd_device_matches(device_t dev, const struct bhnd_device_match *desc); const struct bhnd_device *bhnd_device_lookup(device_t dev, const struct bhnd_device *table, size_t entry_size); uint32_t bhnd_device_quirks(device_t dev, const struct bhnd_device *table, size_t entry_size); struct bhnd_core_info bhnd_get_core_info(device_t dev); int bhnd_alloc_resources(device_t dev, struct resource_spec *rs, struct bhnd_resource **res); void bhnd_release_resources(device_t dev, const struct resource_spec *rs, struct bhnd_resource **res); struct bhnd_chipid bhnd_parse_chipid(uint32_t idreg, bhnd_addr_t enum_addr); int bhnd_chipid_fixed_ncores( const struct bhnd_chipid *cid, uint16_t chipc_hwrev, uint8_t *ncores); int bhnd_read_chipid(device_t dev, struct resource_spec *rs, bus_size_t chipc_offset, struct bhnd_chipid *result); void bhnd_set_custom_core_desc(device_t dev, const char *name); void bhnd_set_default_core_desc(device_t dev); void bhnd_set_default_bus_desc(device_t dev, const struct bhnd_chipid *chip_id); int bhnd_nvram_getvar_str(device_t dev, const char *name, char *buf, size_t len, size_t *rlen); int bhnd_nvram_getvar_uint(device_t dev, const char *name, void *value, int width); int bhnd_nvram_getvar_uint8(device_t dev, const char *name, uint8_t *value); int bhnd_nvram_getvar_uint16(device_t dev, const char *name, uint16_t *value); int bhnd_nvram_getvar_uint32(device_t dev, const char *name, uint32_t *value); int bhnd_nvram_getvar_int(device_t dev, const char *name, void *value, int width); int bhnd_nvram_getvar_int8(device_t dev, const char *name, int8_t *value); int bhnd_nvram_getvar_int16(device_t dev, const char *name, int16_t *value); int bhnd_nvram_getvar_int32(device_t dev, const char *name, int32_t *value); int bhnd_nvram_getvar_array(device_t dev, const char *name, void *buf, size_t count, bhnd_nvram_type type); int bhnd_service_registry_init( struct bhnd_service_registry *bsr); int bhnd_service_registry_fini( struct bhnd_service_registry *bsr); int bhnd_service_registry_add( struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service, uint32_t flags); int bhnd_service_registry_remove( struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service); device_t bhnd_service_registry_retain( struct bhnd_service_registry *bsr, bhnd_service_t service); bool bhnd_service_registry_release( struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service); int bhnd_bus_generic_register_provider( device_t dev, device_t child, device_t provider, bhnd_service_t service); int bhnd_bus_generic_deregister_provider( device_t dev, device_t child, device_t provider, bhnd_service_t service); device_t bhnd_bus_generic_retain_provider(device_t dev, device_t child, bhnd_service_t service); void bhnd_bus_generic_release_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service); int bhnd_bus_generic_sr_register_provider( device_t dev, device_t child, device_t provider, bhnd_service_t service); int bhnd_bus_generic_sr_deregister_provider( device_t dev, device_t child, device_t provider, bhnd_service_t service); device_t bhnd_bus_generic_sr_retain_provider(device_t dev, device_t child, bhnd_service_t service); void bhnd_bus_generic_sr_release_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service); bool bhnd_bus_generic_is_hw_disabled(device_t dev, device_t child); bool bhnd_bus_generic_is_region_valid(device_t dev, device_t child, bhnd_port_type type, u_int port, u_int region); int bhnd_bus_generic_get_nvram_var(device_t dev, device_t child, const char *name, void *buf, size_t *size, bhnd_nvram_type type); const struct bhnd_chipid *bhnd_bus_generic_get_chipid(device_t dev, device_t child); int bhnd_bus_generic_get_dma_translation( device_t dev, device_t child, u_int width, uint32_t flags, bus_dma_tag_t *dmat, struct bhnd_dma_translation *translation); int bhnd_bus_generic_read_board_info(device_t dev, device_t child, struct bhnd_board_info *info); struct bhnd_resource *bhnd_bus_generic_alloc_resource (device_t dev, device_t child, int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags); int bhnd_bus_generic_release_resource (device_t dev, device_t child, int type, int rid, struct bhnd_resource *r); int bhnd_bus_generic_activate_resource (device_t dev, device_t child, int type, int rid, struct bhnd_resource *r); int bhnd_bus_generic_deactivate_resource (device_t dev, device_t child, int type, int rid, struct bhnd_resource *r); uintptr_t bhnd_bus_generic_get_intr_domain(device_t dev, device_t child, bool self); /** * Return the bhnd(4) bus driver's device enumeration parser class * * @param driver A bhnd bus driver instance. */ static inline bhnd_erom_class_t * bhnd_driver_get_erom_class(driver_t *driver) { return (BHND_BUS_GET_EROM_CLASS(driver)); } /** * Return the active host bridge core for the bhnd bus, if any, or NULL if * not found. * * @param dev A bhnd bus device. */ static inline device_t bhnd_bus_find_hostb_device(device_t dev) { return (BHND_BUS_FIND_HOSTB_DEVICE(dev)); } /** * Register a provider for a given @p service. * * @param dev The device to register as a service provider * with its parent bus. * @param service The service for which @p dev will be registered. * * @retval 0 success * @retval EEXIST if an entry for @p service already exists. * @retval non-zero if registering @p dev otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_register_provider(device_t dev, bhnd_service_t service) { return (BHND_BUS_REGISTER_PROVIDER(device_get_parent(dev), dev, dev, service)); } /** * Attempt to remove a service provider registration for @p dev. * * @param dev The device to be deregistered as a service provider. * @param service The service for which @p dev will be deregistered, or * BHND_SERVICE_INVALID to remove all service registrations * for @p dev. * * @retval 0 success * @retval EBUSY if active references to @p dev exist; @see * bhnd_retain_provider() and bhnd_release_provider(). */ static inline int bhnd_deregister_provider(device_t dev, bhnd_service_t service) { return (BHND_BUS_DEREGISTER_PROVIDER(device_get_parent(dev), dev, dev, service)); } /** * Retain and return a reference to the registered @p service provider, if any. * * @param dev The requesting device. * @param service The service for which a provider should be returned. * * On success, the caller assumes ownership the returned provider, and * is responsible for releasing this reference via * BHND_BUS_RELEASE_PROVIDER(). * * @retval device_t success * @retval NULL if no provider is registered for @p service. */ static inline device_t bhnd_retain_provider(device_t dev, bhnd_service_t service) { return (BHND_BUS_RETAIN_PROVIDER(device_get_parent(dev), dev, service)); } /** * Release a reference to a provider device previously returned by * bhnd_retain_provider(). * * @param dev The requesting device. * @param provider The provider to be released. * @param service The service for which @p provider was previously retained. */ static inline void bhnd_release_provider(device_t dev, device_t provider, bhnd_service_t service) { return (BHND_BUS_RELEASE_PROVIDER(device_get_parent(dev), dev, provider, service)); } /** * Return true if the hardware components required by @p dev are known to be * unpopulated or otherwise unusable. * * In some cases, enumerated devices may have pins that are left floating, or * the hardware may otherwise be non-functional; this method allows a parent * device to explicitly specify if a successfully enumerated @p dev should * be disabled. * * @param dev A bhnd bus child device. */ static inline bool bhnd_is_hw_disabled(device_t dev) { return (BHND_BUS_IS_HW_DISABLED(device_get_parent(dev), dev)); } /** * Return the BHND chip identification info for the bhnd bus. * * @param dev A bhnd bus child device. */ static inline const struct bhnd_chipid * bhnd_get_chipid(device_t dev) { return (BHND_BUS_GET_CHIPID(device_get_parent(dev), dev)); }; /** * Read the current value of a bhnd(4) device's per-core I/O control register. * * @param dev The bhnd bus child device to be queried. * @param[out] ioctl On success, the I/O control register value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If reading the IOCTL register otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_read_ioctl(device_t dev, uint16_t *ioctl) { return (BHND_BUS_READ_IOCTL(device_get_parent(dev), dev, ioctl)); } /** * Write @p value and @p mask to a bhnd(4) device's per-core I/O control * register. * * @param dev The bhnd bus child device for which the IOCTL register will be * written. * @param value The value to be written (see BHND_IOCTL_*). * @param mask Only the bits defined by @p mask will be updated from @p value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If writing the IOCTL register otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_write_ioctl(device_t dev, uint16_t value, uint16_t mask) { return (BHND_BUS_WRITE_IOCTL(device_get_parent(dev), dev, value, mask)); } /** * Read the current value of a bhnd(4) device's per-core I/O status register. * * @param dev The bhnd bus child device to be queried. * @param[out] iost On success, the I/O status register value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If reading the IOST register otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_read_iost(device_t dev, uint16_t *iost) { return (BHND_BUS_READ_IOST(device_get_parent(dev), dev, iost)); } /** * Return true if the given bhnd device's hardware is currently held * in a RESET state or otherwise not clocked (BHND_IOCTL_CLK_EN). * * @param dev The device to query. * * @retval true If @p dev is held in RESET or not clocked (BHND_IOCTL_CLK_EN), * or an error occured determining @p dev's hardware state. * @retval false If @p dev is clocked and is not held in RESET. */ static inline bool bhnd_is_hw_suspended(device_t dev) { return (BHND_BUS_IS_HW_SUSPENDED(device_get_parent(dev), dev)); } /** - * Place the bhnd(4) device's hardware into a reset state, and then bring the - * hardware out of reset with BHND_IOCTL_CLK_EN and @p ioctl flags set. + * Place the bhnd(4) device's hardware into a low-power RESET state with + * the @p reset_ioctl I/O control flags set, and then bring the hardware out of + * RESET with the @p ioctl I/O control flags set. * - * Any clock or resource PMU requests previously made by @p dev will be + * Any clock or resource PMU requests previously made by @p child will be * invalidated. * * @param dev The device to be reset. - * @param ioctl Device-specific core ioctl flags to be supplied on reset - * (see BHND_IOCTL_*). + * @param ioctl Device-specific I/O control flags to be set when bringing + * the core out of its RESET state (see BHND_IOCTL_*). + * @param reset_ioctl Device-specific I/O control flags to be set when placing + * the core into its RESET state. * * @retval 0 success * @retval non-zero error */ static inline int -bhnd_reset_hw(device_t dev, uint16_t ioctl) +bhnd_reset_hw(device_t dev, uint16_t ioctl, uint16_t reset_ioctl) { - return (BHND_BUS_RESET_HW(device_get_parent(dev), dev, ioctl)); + return (BHND_BUS_RESET_HW(device_get_parent(dev), dev, ioctl, + reset_ioctl)); } /** * Suspend @p child's hardware in a low-power reset state. * * Any clock or resource PMU requests previously made by @p dev will be * invalidated. * * The hardware may be brought out of reset via bhnd_reset_hw(). * * @param dev The device to be suspended. * * @retval 0 success * @retval non-zero error */ static inline int -bhnd_suspend_hw(device_t dev) +bhnd_suspend_hw(device_t dev, uint16_t ioctl) { - return (BHND_BUS_SUSPEND_HW(device_get_parent(dev), dev)); + return (BHND_BUS_SUSPEND_HW(device_get_parent(dev), dev, ioctl)); } /** * Return the BHND attachment type of the parent bhnd bus. * * @param dev A bhnd bus child device. * * @retval BHND_ATTACH_ADAPTER if the bus is resident on a bridged adapter, * such as a WiFi chipset. * @retval BHND_ATTACH_NATIVE if the bus provides hardware services (clock, * CPU, etc) to a directly attached native host. */ static inline bhnd_attach_type bhnd_get_attach_type (device_t dev) { return (BHND_BUS_GET_ATTACH_TYPE(device_get_parent(dev), dev)); } /** * Find the best available DMA address translation capable of mapping a * physical host address to a BHND DMA device address of @p width with * @p flags. * * @param dev A bhnd bus child device. * @param width The address width within which the translation window must * reside (see BHND_DMA_ADDR_*). * @param flags Required translation flags (see BHND_DMA_TRANSLATION_*). * @param[out] dmat On success, will be populated with a DMA tag specifying the * @p translation DMA address restrictions. This argment may be NULL if the DMA * tag is not desired. * the set of valid host DMA addresses reachable via @p translation. * @param[out] translation On success, will be populated with a DMA address * translation descriptor for @p child. This argment may be NULL if the * descriptor is not desired. * * @retval 0 success * @retval ENODEV If DMA is not supported. * @retval ENOENT If no DMA translation matching @p width and @p flags is * available. * @retval non-zero If determining the DMA address translation for @p child * otherwise fails, a regular unix error code will be returned. */ static inline int bhnd_get_dma_translation(device_t dev, u_int width, uint32_t flags, bus_dma_tag_t *dmat, struct bhnd_dma_translation *translation) { return (BHND_BUS_GET_DMA_TRANSLATION(device_get_parent(dev), dev, width, flags, dmat, translation)); } /** * Attempt to read the BHND board identification from the bhnd bus. * * This relies on NVRAM access, and will fail if a valid NVRAM device cannot * be found, or is not yet attached. * * @param dev The bhnd device requesting board info. * @param[out] info On success, will be populated with the bhnd(4) device's * board information. * * @retval 0 success * @retval ENODEV No valid NVRAM source could be found. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ static inline int bhnd_read_board_info(device_t dev, struct bhnd_board_info *info) { return (BHND_BUS_READ_BOARD_INFO(device_get_parent(dev), dev, info)); } /** * Return the number of interrupt lines assigned to @p dev. * * @param dev A bhnd bus child device. */ static inline u_int bhnd_get_intr_count(device_t dev) { return (BHND_BUS_GET_INTR_COUNT(device_get_parent(dev), dev)); } /** * Get the backplane interrupt vector of the @p intr line attached to @p dev. * * @param dev A bhnd bus child device. * @param intr The index of the interrupt line being queried. * @param[out] ivec On success, the assigned hardware interrupt vector will be * written to this pointer. * * On bcma(4) devices, this returns the OOB bus line assigned to the * interrupt. * * On siba(4) devices, this returns the target OCP slave flag number assigned * to the interrupt. * * @retval 0 success * @retval ENXIO If @p intr exceeds the number of interrupt lines * assigned to @p child. */ static inline int bhnd_get_intr_ivec(device_t dev, u_int intr, u_int *ivec) { return (BHND_BUS_GET_INTR_IVEC(device_get_parent(dev), dev, intr, ivec)); } /** * Map the given @p intr to an IRQ number; until unmapped, this IRQ may be used * to allocate a resource of type SYS_RES_IRQ. * * On success, the caller assumes ownership of the interrupt mapping, and * is responsible for releasing the mapping via bhnd_unmap_intr(). * * @param dev The requesting device. * @param intr The interrupt being mapped. * @param[out] irq On success, the bus interrupt value mapped for @p intr. * * @retval 0 If an interrupt was assigned. * @retval non-zero If mapping an interrupt otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_map_intr(device_t dev, u_int intr, rman_res_t *irq) { return (BHND_BUS_MAP_INTR(device_get_parent(dev), dev, intr, irq)); } /** * Unmap an bus interrupt previously mapped via bhnd_map_intr(). * * @param dev The requesting device. * @param irq The interrupt value being unmapped. */ static inline void bhnd_unmap_intr(device_t dev, rman_res_t irq) { return (BHND_BUS_UNMAP_INTR(device_get_parent(dev), dev, irq)); } /** * Allocate and enable per-core PMU request handling for @p child. * * The region containing the core's PMU register block (if any) must be * allocated via bus_alloc_resource(9) (or bhnd_alloc_resource) before * calling bhnd_alloc_pmu(), and must not be released until after * calling bhnd_release_pmu(). * * @param dev The requesting bhnd device. * * @retval 0 success * @retval non-zero If allocating PMU request state otherwise fails, a * regular unix error code will be returned. */ static inline int bhnd_alloc_pmu(device_t dev) { return (BHND_BUS_ALLOC_PMU(device_get_parent(dev), dev)); } /** * Release any per-core PMU resources allocated for @p child. Any outstanding * PMU requests are are discarded. * * @param dev The requesting bhnd device. * * @retval 0 success * @retval non-zero If releasing PMU request state otherwise fails, a * regular unix error code will be returned, and * the core state will be left unmodified. */ static inline int bhnd_release_pmu(device_t dev) { return (BHND_BUS_RELEASE_PMU(device_get_parent(dev), dev)); } /** * Return the transition latency required for @p clock in microseconds, if * known. * * The BHND_CLOCK_HT latency value is suitable for use as the D11 core's * 'fastpwrup_dly' value. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before querying PMU clocks. * * @param dev The requesting bhnd device. * @param clock The clock to be queried for transition latency. * @param[out] latency On success, the transition latency of @p clock in * microseconds. * * @retval 0 success * @retval ENODEV If the transition latency for @p clock is not available. */ static inline int bhnd_get_clock_latency(device_t dev, bhnd_clock clock, u_int *latency) { return (BHND_BUS_GET_CLOCK_LATENCY(device_get_parent(dev), dev, clock, latency)); } /** * Return the frequency for @p clock in Hz, if known. * * @param dev The requesting bhnd device. * @param clock The clock to be queried. * @param[out] freq On success, the frequency of @p clock in Hz. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before querying PMU clocks. * * @retval 0 success * @retval ENODEV If the frequency for @p clock is not available. */ static inline int bhnd_get_clock_freq(device_t dev, bhnd_clock clock, u_int *freq) { return (BHND_BUS_GET_CLOCK_FREQ(device_get_parent(dev), dev, clock, freq)); } /** * Request that @p clock (or faster) be routed to @p dev. * * @note A driver must ask the bhnd bus to allocate clock request state * via bhnd_alloc_pmu() before it can request clock resources. * * @note Any outstanding PMU clock requests will be discarded upon calling * BHND_BUS_RESET_HW() or BHND_BUS_SUSPEND_HW(). * * @param dev The bhnd(4) device to which @p clock should be routed. * @param clock The requested clock source. * * @retval 0 success * @retval ENODEV If an unsupported clock was requested. * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable, */ static inline int bhnd_request_clock(device_t dev, bhnd_clock clock) { return (BHND_BUS_REQUEST_CLOCK(device_get_parent(dev), dev, clock)); } /** * Request that @p clocks be powered on behalf of @p dev. * * This will power any clock sources (e.g. XTAL, PLL, etc) required for * @p clocks and wait until they are ready, discarding any previous * requests by @p dev. * * @note A driver must ask the bhnd bus to allocate clock request state * via bhnd_alloc_pmu() before it can request clock resources. * * @note Any outstanding PMU clock requests will be discarded upon calling * BHND_BUS_RESET_HW() or BHND_BUS_SUSPEND_HW(). * * @param dev The requesting bhnd(4) device. * @param clocks The clock(s) to be enabled. * * @retval 0 success * @retval ENODEV If an unsupported clock was requested. * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. */ static inline int bhnd_enable_clocks(device_t dev, uint32_t clocks) { return (BHND_BUS_ENABLE_CLOCKS(device_get_parent(dev), dev, clocks)); } /** * Power up an external PMU-managed resource assigned to @p dev. * * @note A driver must ask the bhnd bus to allocate PMU request state * via bhnd_alloc_pmu() before it can request PMU resources. * * @note Any outstanding PMU resource requests will be released upon calling * bhnd_reset_hw() or bhnd_suspend_hw(). * * @param dev The requesting bhnd(4) device. * @param rsrc The core-specific external resource identifier. * * @retval 0 success * @retval ENODEV If the PMU does not support @p rsrc. * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. */ static inline int bhnd_request_ext_rsrc(device_t dev, u_int rsrc) { return (BHND_BUS_REQUEST_EXT_RSRC(device_get_parent(dev), dev, rsrc)); } /** * Power down an external PMU-managed resource assigned to @p dev. * * A driver must ask the bhnd bus to allocate PMU request state * via bhnd_alloc_pmu() before it can request PMU resources. * * @param dev The requesting bhnd(4) device. * @param rsrc The core-specific external resource identifier. * * @retval 0 success * @retval ENODEV If the PMU does not support @p rsrc. * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. */ static inline int bhnd_release_ext_rsrc(device_t dev, u_int rsrc) { return (BHND_BUS_RELEASE_EXT_RSRC(device_get_parent(dev), dev, rsrc)); } /** * Read @p width bytes at @p offset from the bus-specific agent/config * space of @p dev. * * @param dev The bhnd device for which @p offset should be read. * @param offset The offset to be read. * @param[out] value On success, the will be set to the @p width value read * at @p offset. * @param width The size of the access. Must be 1, 2 or 4 bytes. * * The exact behavior of this method is bus-specific. In the case of * bcma(4), this method provides access to the first agent port of @p child. * * @note Device drivers should only use this API for functionality * that is not available via another bhnd(4) function. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval EINVAL If @p width is not one of 1, 2, or 4 bytes. * @retval ENODEV If accessing agent/config space for @p child is unsupported. * @retval EFAULT If reading @p width at @p offset exceeds the bounds of * the mapped agent/config space for @p child. */ static inline uint32_t bhnd_read_config(device_t dev, bus_size_t offset, void *value, u_int width) { return (BHND_BUS_READ_CONFIG(device_get_parent(dev), dev, offset, value, width)); } /** * Write @p width bytes at @p offset to the bus-specific agent/config * space of @p dev. * * @param dev The bhnd device for which @p offset should be read. * @param offset The offset to be written. * @param value A pointer to the value to be written. * @param width The size of @p value. Must be 1, 2 or 4 bytes. * * The exact behavior of this method is bus-specific. In the case of * bcma(4), this method provides access to the first agent port of @p child. * * @note Device drivers should only use this API for functionality * that is not available via another bhnd(4) function. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval EINVAL If @p width is not one of 1, 2, or 4 bytes. * @retval ENODEV If accessing agent/config space for @p child is unsupported. * @retval EFAULT If reading @p width at @p offset exceeds the bounds of * the mapped agent/config space for @p child. */ static inline int bhnd_write_config(device_t dev, bus_size_t offset, const void *value, u_int width) { return (BHND_BUS_WRITE_CONFIG(device_get_parent(dev), dev, offset, value, width)); } /** * Read an NVRAM variable, coerced to the requested @p type. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] buf A buffer large enough to hold @p len bytes. On * success, the requested value will be written to * this buffer. This argment may be NULL if * the value is not desired. * @param[in,out] len The maximum capacity of @p buf. On success, * will be set to the actual size of the requested * value. * @param type The desired data representation to be written * to @p buf. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval ENOMEM If a buffer of @p size is too small to hold the * requested value. * @retval EOPNOTSUPP If the value cannot be coerced to @p type. * @retval ERANGE If value coercion would overflow @p type. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ static inline int bhnd_nvram_getvar(device_t dev, const char *name, void *buf, size_t *len, bhnd_nvram_type type) { return (BHND_BUS_GET_NVRAM_VAR(device_get_parent(dev), dev, name, buf, len, type)); } /** * Allocate a resource from a device's parent bhnd(4) bus. * * @param dev The device requesting resource ownership. * @param type The type of resource to allocate. This may be any type supported * by the standard bus APIs. * @param rid The bus-specific handle identifying the resource being allocated. * @param start The start address of the resource. * @param end The end address of the resource. * @param count The size of the resource. * @param flags The flags for the resource to be allocated. These may be any * values supported by the standard bus APIs. * * To request the resource's default addresses, pass @p start and * @p end values of @c 0 and @c ~0, respectively, and * a @p count of @c 1. * * @retval NULL The resource could not be allocated. * @retval resource The allocated resource. */ static inline struct bhnd_resource * bhnd_alloc_resource(device_t dev, int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) { return BHND_BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, type, rid, start, end, count, flags); } /** * Allocate a resource from a device's parent bhnd(4) bus, using the * resource's default start, end, and count values. * * @param dev The device requesting resource ownership. * @param type The type of resource to allocate. This may be any type supported * by the standard bus APIs. * @param rid The bus-specific handle identifying the resource being allocated. * @param flags The flags for the resource to be allocated. These may be any * values supported by the standard bus APIs. * * @retval NULL The resource could not be allocated. * @retval resource The allocated resource. */ static inline struct bhnd_resource * bhnd_alloc_resource_any(device_t dev, int type, int *rid, u_int flags) { return bhnd_alloc_resource(dev, type, rid, 0, ~0, 1, flags); } /** * Activate a previously allocated bhnd resource. * * @param dev The device holding ownership of the allocated resource. * @param type The type of the resource. * @param rid The bus-specific handle identifying the resource. * @param r A pointer to the resource returned by bhnd_alloc_resource or * BHND_BUS_ALLOC_RESOURCE. * * @retval 0 success * @retval non-zero an error occurred while activating the resource. */ static inline int bhnd_activate_resource(device_t dev, int type, int rid, struct bhnd_resource *r) { return BHND_BUS_ACTIVATE_RESOURCE(device_get_parent(dev), dev, type, rid, r); } /** * Deactivate a previously activated bhnd resource. * * @param dev The device holding ownership of the activated resource. * @param type The type of the resource. * @param rid The bus-specific handle identifying the resource. * @param r A pointer to the resource returned by bhnd_alloc_resource or * BHND_BUS_ALLOC_RESOURCE. * * @retval 0 success * @retval non-zero an error occurred while activating the resource. */ static inline int bhnd_deactivate_resource(device_t dev, int type, int rid, struct bhnd_resource *r) { return BHND_BUS_DEACTIVATE_RESOURCE(device_get_parent(dev), dev, type, rid, r); } /** * Free a resource allocated by bhnd_alloc_resource(). * * @param dev The device holding ownership of the resource. * @param type The type of the resource. * @param rid The bus-specific handle identifying the resource. * @param r A pointer to the resource returned by bhnd_alloc_resource or * BHND_ALLOC_RESOURCE. * * @retval 0 success * @retval non-zero an error occurred while activating the resource. */ static inline int bhnd_release_resource(device_t dev, int type, int rid, struct bhnd_resource *r) { return BHND_BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, type, rid, r); } /** * Return true if @p region_num is a valid region on @p port_num of * @p type attached to @p dev. * * @param dev A bhnd bus child device. * @param type The port type being queried. * @param port The port number being queried. * @param region The region number being queried. */ static inline bool bhnd_is_region_valid(device_t dev, bhnd_port_type type, u_int port, u_int region) { return (BHND_BUS_IS_REGION_VALID(device_get_parent(dev), dev, type, port, region)); } /** * Return the number of ports of type @p type attached to @p def. * * @param dev A bhnd bus child device. * @param type The port type being queried. */ static inline u_int bhnd_get_port_count(device_t dev, bhnd_port_type type) { return (BHND_BUS_GET_PORT_COUNT(device_get_parent(dev), dev, type)); } /** * Return the number of memory regions mapped to @p child @p port of * type @p type. * * @param dev A bhnd bus child device. * @param port The port number being queried. * @param type The port type being queried. */ static inline u_int bhnd_get_region_count(device_t dev, bhnd_port_type type, u_int port) { return (BHND_BUS_GET_REGION_COUNT(device_get_parent(dev), dev, type, port)); } /** * Return the resource-ID for a memory region on the given device port. * * @param dev A bhnd bus child device. * @param type The port type. * @param port The port identifier. * @param region The identifier of the memory region on @p port. * * @retval int The RID for the given @p port and @p region on @p device. * @retval -1 No such port/region found. */ static inline int bhnd_get_port_rid(device_t dev, bhnd_port_type type, u_int port, u_int region) { return BHND_BUS_GET_PORT_RID(device_get_parent(dev), dev, type, port, region); } /** * Decode a port / region pair on @p dev defined by @p rid. * * @param dev A bhnd bus child device. * @param type The resource type. * @param rid The resource identifier. * @param[out] port_type The decoded port type. * @param[out] port The decoded port identifier. * @param[out] region The decoded region identifier. * * @retval 0 success * @retval non-zero No matching port/region found. */ static inline int bhnd_decode_port_rid(device_t dev, int type, int rid, bhnd_port_type *port_type, u_int *port, u_int *region) { return BHND_BUS_DECODE_PORT_RID(device_get_parent(dev), dev, type, rid, port_type, port, region); } /** * Get the address and size of @p region on @p port. * * @param dev A bhnd bus child device. * @param port_type The port type. * @param port The port identifier. * @param region The identifier of the memory region on @p port. * @param[out] region_addr The region's base address. * @param[out] region_size The region's size. * * @retval 0 success * @retval non-zero No matching port/region found. */ static inline int bhnd_get_region_addr(device_t dev, bhnd_port_type port_type, u_int port, u_int region, bhnd_addr_t *region_addr, bhnd_size_t *region_size) { return BHND_BUS_GET_REGION_ADDR(device_get_parent(dev), dev, port_type, port, region, region_addr, region_size); } /* * bhnd bus-level equivalents of the bus_(read|write|set|barrier|...) * macros (compatible with bhnd_resource). * * Generated with bhnd/tools/bus_macro.sh */ #define bhnd_bus_barrier(r, o, l, f) \ ((r)->direct) ? \ bus_barrier((r)->res, (o), (l), (f)) : \ BHND_BUS_BARRIER( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (l), (f)) #define bhnd_bus_read_1(r, o) \ ((r)->direct) ? \ bus_read_1((r)->res, (o)) : \ BHND_BUS_READ_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o)) #define bhnd_bus_read_multi_1(r, o, d, c) \ ((r)->direct) ? \ bus_read_multi_1((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_region_1(r, o, d, c) \ ((r)->direct) ? \ bus_read_region_1((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_1(r, o, v) \ ((r)->direct) ? \ bus_write_1((r)->res, (o), (v)) : \ BHND_BUS_WRITE_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v)) #define bhnd_bus_write_multi_1(r, o, d, c) \ ((r)->direct) ? \ bus_write_multi_1((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_region_1(r, o, d, c) \ ((r)->direct) ? \ bus_write_region_1((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_stream_1(r, o) \ ((r)->direct) ? \ bus_read_stream_1((r)->res, (o)) : \ BHND_BUS_READ_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o)) #define bhnd_bus_read_multi_stream_1(r, o, d, c) \ ((r)->direct) ? \ bus_read_multi_stream_1((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_region_stream_1(r, o, d, c) \ ((r)->direct) ? \ bus_read_region_stream_1((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_stream_1(r, o, v) \ ((r)->direct) ? \ bus_write_stream_1((r)->res, (o), (v)) : \ BHND_BUS_WRITE_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v)) #define bhnd_bus_write_multi_stream_1(r, o, d, c) \ ((r)->direct) ? \ bus_write_multi_stream_1((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_region_stream_1(r, o, d, c) \ ((r)->direct) ? \ bus_write_region_stream_1((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_set_multi_1(r, o, v, c) \ ((r)->direct) ? \ bus_set_multi_1((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_MULTI_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c)) #define bhnd_bus_set_region_1(r, o, v, c) \ ((r)->direct) ? \ bus_set_region_1((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_REGION_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c)) #define bhnd_bus_read_2(r, o) \ ((r)->direct) ? \ bus_read_2((r)->res, (o)) : \ BHND_BUS_READ_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o)) #define bhnd_bus_read_multi_2(r, o, d, c) \ ((r)->direct) ? \ bus_read_multi_2((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_region_2(r, o, d, c) \ ((r)->direct) ? \ bus_read_region_2((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_2(r, o, v) \ ((r)->direct) ? \ bus_write_2((r)->res, (o), (v)) : \ BHND_BUS_WRITE_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v)) #define bhnd_bus_write_multi_2(r, o, d, c) \ ((r)->direct) ? \ bus_write_multi_2((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_region_2(r, o, d, c) \ ((r)->direct) ? \ bus_write_region_2((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_stream_2(r, o) \ ((r)->direct) ? \ bus_read_stream_2((r)->res, (o)) : \ BHND_BUS_READ_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o)) #define bhnd_bus_read_multi_stream_2(r, o, d, c) \ ((r)->direct) ? \ bus_read_multi_stream_2((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_region_stream_2(r, o, d, c) \ ((r)->direct) ? \ bus_read_region_stream_2((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_stream_2(r, o, v) \ ((r)->direct) ? \ bus_write_stream_2((r)->res, (o), (v)) : \ BHND_BUS_WRITE_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v)) #define bhnd_bus_write_multi_stream_2(r, o, d, c) \ ((r)->direct) ? \ bus_write_multi_stream_2((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_region_stream_2(r, o, d, c) \ ((r)->direct) ? \ bus_write_region_stream_2((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_set_multi_2(r, o, v, c) \ ((r)->direct) ? \ bus_set_multi_2((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_MULTI_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c)) #define bhnd_bus_set_region_2(r, o, v, c) \ ((r)->direct) ? \ bus_set_region_2((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_REGION_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c)) #define bhnd_bus_read_4(r, o) \ ((r)->direct) ? \ bus_read_4((r)->res, (o)) : \ BHND_BUS_READ_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o)) #define bhnd_bus_read_multi_4(r, o, d, c) \ ((r)->direct) ? \ bus_read_multi_4((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_region_4(r, o, d, c) \ ((r)->direct) ? \ bus_read_region_4((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_4(r, o, v) \ ((r)->direct) ? \ bus_write_4((r)->res, (o), (v)) : \ BHND_BUS_WRITE_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v)) #define bhnd_bus_write_multi_4(r, o, d, c) \ ((r)->direct) ? \ bus_write_multi_4((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_region_4(r, o, d, c) \ ((r)->direct) ? \ bus_write_region_4((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_stream_4(r, o) \ ((r)->direct) ? \ bus_read_stream_4((r)->res, (o)) : \ BHND_BUS_READ_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o)) #define bhnd_bus_read_multi_stream_4(r, o, d, c) \ ((r)->direct) ? \ bus_read_multi_stream_4((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_region_stream_4(r, o, d, c) \ ((r)->direct) ? \ bus_read_region_stream_4((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_stream_4(r, o, v) \ ((r)->direct) ? \ bus_write_stream_4((r)->res, (o), (v)) : \ BHND_BUS_WRITE_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v)) #define bhnd_bus_write_multi_stream_4(r, o, d, c) \ ((r)->direct) ? \ bus_write_multi_stream_4((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_region_stream_4(r, o, d, c) \ ((r)->direct) ? \ bus_write_region_stream_4((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_set_multi_4(r, o, v, c) \ ((r)->direct) ? \ bus_set_multi_4((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_MULTI_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c)) #define bhnd_bus_set_region_4(r, o, v, c) \ ((r)->direct) ? \ bus_set_region_4((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_REGION_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c)) #endif /* _BHND_BHND_H_ */ Index: head/sys/dev/bhnd/bhnd_bus_if.m =================================================================== --- head/sys/dev/bhnd/bhnd_bus_if.m (revision 326291) +++ head/sys/dev/bhnd/bhnd_bus_if.m (revision 326292) @@ -1,1642 +1,1650 @@ #- # Copyright (c) 2015-2016 Landon Fuller # Copyright (c) 2017 The FreeBSD Foundation # All rights reserved. # # Portions of this software were developed by Landon Fuller # under sponsorship from the FreeBSD Foundation. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. # IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER # CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE # USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # # $FreeBSD$ #include #include #include #include #include INTERFACE bhnd_bus; # # bhnd(4) bus interface # HEADER { /* forward declarations */ struct bhnd_board_info; struct bhnd_core_info; struct bhnd_chipid; struct bhnd_dma_translation; struct bhnd_devinfo; struct bhnd_resource; } CODE { #include #include static bhnd_erom_class_t * bhnd_bus_null_get_erom_class(driver_t *driver) { return (NULL); } static struct bhnd_chipid * bhnd_bus_null_get_chipid(device_t dev, device_t child) { panic("bhnd_bus_get_chipid unimplemented"); } static int bhnd_bus_null_read_ioctl(device_t dev, device_t child, uint16_t *ioctl) { panic("bhnd_bus_read_ioctl unimplemented"); } static int bhnd_bus_null_write_ioctl(device_t dev, device_t child, uint16_t value, uint16_t mask) { panic("bhnd_bus_write_ioctl unimplemented"); } static int bhnd_bus_null_read_iost(device_t dev, device_t child, uint16_t *iost) { panic("bhnd_bus_read_iost unimplemented"); } static bool bhnd_bus_null_is_hw_suspended(device_t dev, device_t child) { panic("bhnd_bus_is_hw_suspended unimplemented"); } static int - bhnd_bus_null_reset_hw(device_t dev, device_t child, uint16_t ioctl) + bhnd_bus_null_reset_hw(device_t dev, device_t child, uint16_t ioctl, + uint16_t reset_ioctl) { panic("bhnd_bus_reset_hw unimplemented"); } static int bhnd_bus_null_suspend_hw(device_t dev, device_t child) { panic("bhnd_bus_suspend_hw unimplemented"); } static bhnd_attach_type bhnd_bus_null_get_attach_type(device_t dev, device_t child) { panic("bhnd_bus_get_attach_type unimplemented"); } static int bhnd_bus_null_read_board_info(device_t dev, device_t child, struct bhnd_board_info *info) { panic("bhnd_bus_read_boardinfo unimplemented"); } static void bhnd_bus_null_child_added(device_t dev, device_t child) { } static int bhnd_bus_null_alloc_pmu(device_t dev, device_t child) { panic("bhnd_bus_alloc_pmu unimplemented"); } static int bhnd_bus_null_release_pmu(device_t dev, device_t child) { panic("bhnd_bus_release_pmu unimplemented"); } static int bhnd_bus_null_get_clock_latency(device_t dev, device_t child, bhnd_clock clock, u_int *latency) { panic("bhnd_pmu_get_clock_latency unimplemented"); } static int bhnd_bus_null_get_clock_freq(device_t dev, device_t child, bhnd_clock clock, u_int *freq) { panic("bhnd_pmu_get_clock_freq unimplemented"); } static int bhnd_bus_null_request_clock(device_t dev, device_t child, bhnd_clock clock) { panic("bhnd_bus_request_clock unimplemented"); } static int bhnd_bus_null_enable_clocks(device_t dev, device_t child, uint32_t clocks) { panic("bhnd_bus_enable_clocks unimplemented"); } static int bhnd_bus_null_request_ext_rsrc(device_t dev, device_t child, u_int rsrc) { panic("bhnd_bus_request_ext_rsrc unimplemented"); } static int bhnd_bus_null_release_ext_rsrc(device_t dev, device_t child, u_int rsrc) { panic("bhnd_bus_release_ext_rsrc unimplemented"); } static int bhnd_bus_null_read_config(device_t dev, device_t child, bus_size_t offset, void *value, u_int width) { panic("bhnd_bus_null_read_config unimplemented"); } static void bhnd_bus_null_write_config(device_t dev, device_t child, bus_size_t offset, void *value, u_int width) { panic("bhnd_bus_null_write_config unimplemented"); } static device_t bhnd_bus_null_find_hostb_device(device_t dev) { return (NULL); } static struct bhnd_service_registry * bhnd_bus_null_get_service_registry(device_t dev) { panic("bhnd_bus_get_service_registry unimplemented"); } static bool bhnd_bus_null_is_hw_disabled(device_t dev, device_t child) { panic("bhnd_bus_is_hw_disabled unimplemented"); } static int bhnd_bus_null_get_probe_order(device_t dev, device_t child) { panic("bhnd_bus_get_probe_order unimplemented"); } static uintptr_t bhnd_bus_null_get_intr_domain(device_t dev, device_t child, bool self) { /* Unsupported */ return (0); } static u_int bhnd_bus_null_get_intr_count(device_t dev, device_t child) { return (0); } static int bhnd_bus_null_get_intr_ivec(device_t dev, device_t child, u_int intr, u_int *ivec) { panic("bhnd_bus_get_intr_ivec unimplemented"); } static int bhnd_bus_null_map_intr(device_t dev, device_t child, u_int intr, rman_res_t *irq) { panic("bhnd_bus_map_intr unimplemented"); } static int bhnd_bus_null_unmap_intr(device_t dev, device_t child, rman_res_t irq) { panic("bhnd_bus_unmap_intr unimplemented"); } static int bhnd_bus_null_get_port_rid(device_t dev, device_t child, bhnd_port_type port_type, u_int port, u_int region) { return (-1); } static int bhnd_bus_null_decode_port_rid(device_t dev, device_t child, int type, int rid, bhnd_port_type *port_type, u_int *port, u_int *region) { return (ENOENT); } static int bhnd_bus_null_get_region_addr(device_t dev, device_t child, bhnd_port_type type, u_int port, u_int region, bhnd_addr_t *addr, bhnd_size_t *size) { return (ENOENT); } static int bhnd_bus_null_get_nvram_var(device_t dev, device_t child, const char *name, void *buf, size_t *size, bhnd_nvram_type type) { return (ENODEV); } } /** * Return the bhnd(4) bus driver's device enumeration parser class. * * @param driver The bhnd bus driver instance. */ STATICMETHOD bhnd_erom_class_t * get_erom_class { driver_t *driver; } DEFAULT bhnd_bus_null_get_erom_class; /** * Register a shared bus @p provider for a given @p service. * * @param dev The parent of @p child. * @param child The requesting child device. * @param provider The service provider to register. * @param service The service for which @p provider will be registered. * * @retval 0 success * @retval EEXIST if an entry for @p service already exists. * @retval non-zero if registering @p provider otherwise fails, a regular * unix error code will be returned. */ METHOD int register_provider { device_t dev; device_t child; device_t provider; bhnd_service_t service; } DEFAULT bhnd_bus_generic_register_provider; /** * Attempt to remove the @p service provider registration for @p provider. * * @param dev The parent of @p child. * @param child The requesting child device. * @param provider The service provider to be deregistered. * @param service The service for which @p provider will be deregistered, * or BHND_SERVICE_INVALID to remove all service * registrations for @p provider. * * @retval 0 success * @retval EBUSY if active references to @p provider exist; @see * BHND_BUS_RETAIN_PROVIDER() and * BHND_BUS_RELEASE_PROVIDER(). */ METHOD int deregister_provider { device_t dev; device_t child; device_t provider; bhnd_service_t service; } DEFAULT bhnd_bus_generic_deregister_provider; /** * Retain and return a reference to the registered @p service provider, if any. * * @param dev The parent of @p child. * @param child The requesting child device. * @param service The service for which a provider should be returned. * * On success, the caller assumes ownership the returned provider, and * is responsible for releasing this reference via * BHND_BUS_RELEASE_PROVIDER(). * * @retval device_t success * @retval NULL if no provider is registered for @p service. */ METHOD device_t retain_provider { device_t dev; device_t child; bhnd_service_t service; } DEFAULT bhnd_bus_generic_retain_provider; /** * Release a reference to a service provider previously returned by * BHND_BUS_RETAIN_PROVIDER(). * * @param dev The parent of @p child. * @param child The requesting child device. * @param provider The provider to be released. * @param service The service for which @p provider was previously * retained. */ METHOD void release_provider { device_t dev; device_t child; device_t provider; bhnd_service_t service; } DEFAULT bhnd_bus_generic_release_provider; /** * Return a struct bhnd_service_registry. * * Used by drivers which use bhnd_bus_generic_sr_register_provider() etc. * to implement service provider registration. It should return a service * registry that may be used to resolve provider requests from @p child. * * @param dev The parent of @p child. * @param child The requesting child device. */ METHOD struct bhnd_service_registry * get_service_registry { device_t dev; device_t child; } DEFAULT bhnd_bus_null_get_service_registry; /** * Return the active host bridge core for the bhnd bus, if any. * * @param dev The bhnd bus device. * * @retval device_t if a hostb device exists * @retval NULL if no hostb device is found. */ METHOD device_t find_hostb_device { device_t dev; } DEFAULT bhnd_bus_null_find_hostb_device; /** * Return true if the hardware components required by @p child are unpopulated * or otherwise unusable. * * In some cases, enumerated devices may have pins that are left floating, or * the hardware may otherwise be non-functional; this method allows a parent * device to explicitly specify if a successfully enumerated @p child should * be disabled. * * @param dev The device whose child is being examined. * @param child The child device. */ METHOD bool is_hw_disabled { device_t dev; device_t child; } DEFAULT bhnd_bus_null_is_hw_disabled; /** * Return the probe (and attach) order for @p child. * * All devices on the bhnd(4) bus will be probed, attached, or resumed in * ascending order; they will be suspended, shutdown, and detached in * descending order. * * The following device methods will be dispatched in ascending probe order * by the bus: * * - DEVICE_PROBE() * - DEVICE_ATTACH() * - DEVICE_RESUME() * * The following device methods will be dispatched in descending probe order * by the bus: * * - DEVICE_SHUTDOWN() * - DEVICE_DETACH() * - DEVICE_SUSPEND() * * @param dev The device whose child is being examined. * @param child The child device. * * Refer to BHND_PROBE_* and BHND_PROBE_ORDER_* for the standard set of * priorities. */ METHOD int get_probe_order { device_t dev; device_t child; } DEFAULT bhnd_bus_null_get_probe_order; /** * Return the BHND chip identification for the parent bus. * * @param dev The device whose child is being examined. * @param child The child device. */ METHOD const struct bhnd_chipid * get_chipid { device_t dev; device_t child; } DEFAULT bhnd_bus_null_get_chipid; /** * Return the BHND attachment type of the parent bus. * * @param dev The device whose child is being examined. * @param child The child device. * * @retval BHND_ATTACH_ADAPTER if the bus is resident on a bridged adapter, * such as a WiFi chipset. * @retval BHND_ATTACH_NATIVE if the bus provides hardware services (clock, * CPU, etc) to a directly attached native host. */ METHOD bhnd_attach_type get_attach_type { device_t dev; device_t child; } DEFAULT bhnd_bus_null_get_attach_type; /** * Find the best available DMA address translation capable of mapping a * physical host address to a BHND DMA device address of @p width with * @p flags. * * @param dev The parent of @p child. * @param child The bhnd device requesting the DMA address translation. * @param width The address width within which the translation window must * reside (see BHND_DMA_ADDR_*). * @param flags Required translation flags (see BHND_DMA_TRANSLATION_*). * @param[out] dmat On success, will be populated with a DMA tag specifying the * @p translation DMA address restrictions. This argment may be NULL if the DMA * tag is not desired. * the set of valid host DMA addresses reachable via @p translation. * @param[out] translation On success, will be populated with a DMA address * translation descriptor for @p child. This argment may be NULL if the * descriptor is not desired. * * @retval 0 success * @retval ENODEV If DMA is not supported. * @retval ENOENT If no DMA translation matching @p width and @p flags is * available. * @retval non-zero If determining the DMA address translation for @p child * otherwise fails, a regular unix error code will be returned. */ METHOD int get_dma_translation { device_t dev; device_t child; u_int width; uint32_t flags; bus_dma_tag_t *dmat; struct bhnd_dma_translation *translation; } DEFAULT bhnd_bus_generic_get_dma_translation; /** * Attempt to read the BHND board identification from the parent bus. * * This relies on NVRAM access, and will fail if a valid NVRAM device cannot * be found, or is not yet attached. * * @param dev The parent of @p child. * @param child The bhnd device requesting board info. * @param[out] info On success, will be populated with the bhnd(4) device's * board information. * * @retval 0 success * @retval ENODEV No valid NVRAM source could be found. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ METHOD int read_board_info { device_t dev; device_t child; struct bhnd_board_info *info; } DEFAULT bhnd_bus_null_read_board_info; /** * Notify a bhnd bus that a child was added. * * This method must be called by concrete bhnd(4) driver impementations * after @p child's bus state is fully initialized. * * @param dev The bhnd bus whose child is being added. * @param child The child added to @p dev. */ METHOD void child_added { device_t dev; device_t child; } DEFAULT bhnd_bus_null_child_added; /** * Read the current value of @p child's I/O control register. * * @param dev The bhnd bus parent of @p child. * @param child The bhnd device for which the I/O control register should be * read. * @param[out] ioctl On success, the I/O control register value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If reading the IOCTL register otherwise fails, a regular * unix error code will be returned. */ METHOD int read_ioctl { device_t dev; device_t child; uint16_t *ioctl; } DEFAULT bhnd_bus_null_read_ioctl; /** * Write @p value with @p mask to @p child's I/O control register. * * @param dev The bhnd bus parent of @p child. * @param child The bhnd device for which the I/O control register should * be updated. * @param value The value to be written (see also BHND_IOCTL_*). * @param mask Only the bits defined by @p mask will be updated from @p value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If writing the IOCTL register otherwise fails, a regular * unix error code will be returned. */ METHOD int write_ioctl { device_t dev; device_t child; uint16_t value; uint16_t mask; } DEFAULT bhnd_bus_null_write_ioctl; /** * Read the current value of @p child's I/O status register. * * @param dev The bhnd bus parent of @p child. * @param child The bhnd device for which the I/O status register should be * read. * @param[out] iost On success, the I/O status register value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If reading the IOST register otherwise fails, a regular * unix error code will be returned. */ METHOD int read_iost { device_t dev; device_t child; uint16_t *iost; } DEFAULT bhnd_bus_null_read_iost; /** * Return true if the given bhnd device's hardware is currently held * in a RESET state or otherwise not clocked (BHND_IOCTL_CLK_EN). * * @param dev The bhnd bus parent of @p child. * @param child The device to query. * * @retval true If @p child is held in RESET or not clocked (BHND_IOCTL_CLK_EN), * or an error occured determining @p child's hardware state. * @retval false If @p child is clocked and is not held in RESET. */ METHOD bool is_hw_suspended { device_t dev; device_t child; } DEFAULT bhnd_bus_null_is_hw_suspended; /** - * Place the bhnd(4) device's hardware into a reset state, and then bring the - * hardware out of reset with BHND_IOCTL_CLK_EN and @p ioctl flags set. + * Place the bhnd(4) device's hardware into a low-power RESET state with + * the @p reset_ioctl I/O control flags set, and then bring the hardware out of + * RESET with the @p ioctl I/O control flags set. * * Any clock or resource PMU requests previously made by @p child will be * invalidated. * * @param dev The bhnd bus parent of @p child. * @param child The device to be reset. - * @param ioctl Device-specific core ioctl flags to be supplied on reset - * (see BHND_IOCTL_*). + * @param ioctl Device-specific I/O control flags to be set when bringing + * the core out of its RESET state (see BHND_IOCTL_*). + * @param reset_ioctl Device-specific I/O control flags to be set when placing + * the core into its RESET state. * * @retval 0 success * @retval non-zero error */ METHOD int reset_hw { device_t dev; device_t child; uint16_t ioctl; + uint16_t reset_ioctl; } DEFAULT bhnd_bus_null_reset_hw; /** - * Suspend @p child's hardware in a low-power reset state. + * Suspend @p child's hardware in a low-power RESET state. * * Any clock or resource PMU requests previously made by @p dev will be * invalidated. * - * The hardware may be brought out of reset via bhnd_reset_hw(). + * The hardware may be brought out of RESET via bhnd_reset_hw(). * * @param dev The bhnd bus parent of @p child. * @param dev The device to be suspended. + * @param ioctl Device-specific I/O control flags to be set when placing + * the core into its RESET state (see BHND_IOCTL_*). * * @retval 0 success * @retval non-zero error */ METHOD int suspend_hw { device_t dev; device_t child; + uint16_t ioctl; } DEFAULT bhnd_bus_null_suspend_hw; /** * Allocate per-core PMU resources and enable PMU request handling for @p child. * * The region containing the core's PMU register block (if any) must be * allocated via bus_alloc_resource(9) (or bhnd_alloc_resource) before * calling BHND_BUS_ALLOC_PMU(), and must not be released until after * calling BHND_BUS_RELEASE_PMU(). * * @param dev The parent of @p child. * @param child The requesting bhnd device. * * @retval 0 success * @retval non-zero if enabling per-core PMU request handling fails, a * regular unix error code will be returned. */ METHOD int alloc_pmu { device_t dev; device_t child; } DEFAULT bhnd_bus_null_alloc_pmu; /** * Release per-core PMU resources allocated for @p child. Any * outstanding PMU requests are discarded. * * @param dev The parent of @p child. * @param child The requesting bhnd device. */ METHOD int release_pmu { device_t dev; device_t child; } DEFAULT bhnd_bus_null_release_pmu; /** * Return the transition latency required for @p clock in microseconds, if * known. * * The BHND_CLOCK_HT latency value is suitable for use as the D11 core's * 'fastpwrup_dly' value. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before querying PMU clocks. * * @param dev The parent of @p child. * @param child The requesting bhnd device. * @param clock The clock to be queried for transition latency. * @param[out] latency On success, the transition latency of @p clock in * microseconds. * * @retval 0 success * @retval ENODEV If the transition latency for @p clock is not available. */ METHOD int get_clock_latency { device_t dev; device_t child; bhnd_clock clock; u_int *latency; } DEFAULT bhnd_bus_null_get_clock_latency; /** * Return the frequency for @p clock in Hz, if known. * * @param dev The parent of @p child. * @param child The requesting bhnd device. * @param clock The clock to be queried. * @param[out] freq On success, the frequency of @p clock in Hz. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before querying PMU clocks. * * @retval 0 success * @retval ENODEV If the frequency for @p clock is not available. */ METHOD int get_clock_freq { device_t dev; device_t child; bhnd_clock clock; u_int *freq; } DEFAULT bhnd_bus_null_get_clock_freq; /** * Request that @p clock (or faster) be routed to @p child. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before it can request clock resources. * * @note Any outstanding PMU clock requests will be discarded upon calling * BHND_BUS_RESET_HW() or BHND_BUS_SUSPEND_HW(). * * @param dev The parent of @p child. * @param child The bhnd device requesting @p clock. * @param clock The requested clock source. * * @retval 0 success * @retval ENODEV If an unsupported clock was requested. * @retval ETIMEDOUT If the clock request succeeds, but the clock is not * detected as ready within the PMU's maximum transition * delay. This should not occur in normal operation. */ METHOD int request_clock { device_t dev; device_t child; bhnd_clock clock; } DEFAULT bhnd_bus_null_request_clock; /** * Request that @p clocks be powered on behalf of @p child. * * This will power on clock sources (e.g. XTAL, PLL, etc) required for * @p clocks and wait until they are ready, discarding any previous * requests by @p child. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before it can request clock resources. * * @note Any outstanding PMU clock requests will be discarded upon calling * BHND_BUS_RESET_HW() or BHND_BUS_SUSPEND_HW(). * * @param dev The parent of @p child. * @param child The bhnd device requesting @p clock. * @param clock The requested clock source. * * @retval 0 success * @retval ENODEV If an unsupported clock was requested. * @retval ETIMEDOUT If the clock request succeeds, but the clock is not * detected as ready within the PMU's maximum transition * delay. This should not occur in normal operation. */ METHOD int enable_clocks { device_t dev; device_t child; uint32_t clocks; } DEFAULT bhnd_bus_null_enable_clocks; /** * Power up an external PMU-managed resource assigned to @p child. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before it can request PMU resources. * * @note Any outstanding PMU resource requests will be released upon calling * BHND_BUS_RESET_HW() or BHND_BUS_SUSPEND_HW(). * * @param dev The parent of @p child. * @param child The bhnd device requesting @p rsrc. * @param rsrc The core-specific external resource identifier. * * @retval 0 success * @retval ENODEV If the PMU does not support @p rsrc. * @retval ETIMEDOUT If the clock request succeeds, but the clock is not * detected as ready within the PMU's maximum transition * delay. This should not occur in normal operation. */ METHOD int request_ext_rsrc { device_t dev; device_t child; u_int rsrc; } DEFAULT bhnd_bus_null_request_ext_rsrc; /** * Power down an external PMU-managed resource assigned to @p child. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before it can request PMU resources. * * @param dev The parent of @p child. * @param child The bhnd device requesting @p rsrc. * @param rsrc The core-specific external resource number. * * @retval 0 success * @retval ENODEV If the PMU does not support @p rsrc. * @retval ETIMEDOUT If the clock request succeeds, but the clock is not * detected as ready within the PMU's maximum transition * delay. This should not occur in normal operation. */ METHOD int release_ext_rsrc { device_t dev; device_t child; u_int rsrc; } DEFAULT bhnd_bus_null_release_ext_rsrc; /** * Read @p width bytes at @p offset from the bus-specific agent/config * space of @p child. * * @param dev The parent of @p child. * @param child The bhnd device for which @p offset should be read. * @param offset The offset to be read. * @param[out] value On success, the bytes read at @p offset. * @param width The size of the access. Must be 1, 2 or 4 bytes. * * The exact behavior of this method is bus-specific. On a bcma(4) bus, this * method provides access to the first agent port of @p child; on a siba(4) bus, * this method provides access to the core's CFG0 register block. * * @note Device drivers should only use this API for functionality * that is not available via another bhnd(4) function. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval EINVAL If @p width is not one of 1, 2, or 4 bytes. * @retval ENODEV If accessing agent/config space for @p child is unsupported. * @retval EFAULT If reading @p width at @p offset exceeds the bounds of * the mapped agent/config space for @p child. */ METHOD int read_config { device_t dev; device_t child; bus_size_t offset; void *value; u_int width; } DEFAULT bhnd_bus_null_read_config; /** * Read @p width bytes at @p offset from the bus-specific agent/config * space of @p child. * * @param dev The parent of @p child. * @param child The bhnd device for which @p offset should be read. * @param offset The offset to be written. * @param value A pointer to the value to be written. * @param width The size of @p value. Must be 1, 2 or 4 bytes. * * The exact behavior of this method is bus-specific. In the case of * bcma(4), this method provides access to the first agent port of @p child. * * @note Device drivers should only use this API for functionality * that is not available via another bhnd(4) function. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval EINVAL If @p width is not one of 1, 2, or 4 bytes. * @retval ENODEV If accessing agent/config space for @p child is unsupported. * @retval EFAULT If reading @p width at @p offset exceeds the bounds of * the mapped agent/config space for @p child. */ METHOD int write_config { device_t dev; device_t child; bus_size_t offset; const void *value; u_int width; } DEFAULT bhnd_bus_null_write_config; /** * Allocate a bhnd resource. * * This method's semantics are functionally identical to the bus API of the same * name; refer to BUS_ALLOC_RESOURCE for complete documentation. */ METHOD struct bhnd_resource * alloc_resource { device_t dev; device_t child; int type; int *rid; rman_res_t start; rman_res_t end; rman_res_t count; u_int flags; } DEFAULT bhnd_bus_generic_alloc_resource; /** * Release a bhnd resource. * * This method's semantics are functionally identical to the bus API of the same * name; refer to BUS_RELEASE_RESOURCE for complete documentation. */ METHOD int release_resource { device_t dev; device_t child; int type; int rid; struct bhnd_resource *res; } DEFAULT bhnd_bus_generic_release_resource; /** * Activate a bhnd resource. * * This method's semantics are functionally identical to the bus API of the same * name; refer to BUS_ACTIVATE_RESOURCE for complete documentation. */ METHOD int activate_resource { device_t dev; device_t child; int type; int rid; struct bhnd_resource *r; } DEFAULT bhnd_bus_generic_activate_resource; /** * Deactivate a bhnd resource. * * This method's semantics are functionally identical to the bus API of the same * name; refer to BUS_DEACTIVATE_RESOURCE for complete documentation. */ METHOD int deactivate_resource { device_t dev; device_t child; int type; int rid; struct bhnd_resource *r; } DEFAULT bhnd_bus_generic_deactivate_resource; /** * Return the interrupt domain. * * This globally unique value may be used as the interrupt controller 'xref' * on targets that support INTRNG. * * @param dev The device whose child is being examined. * @param child The child device. * @param self If true, return @p child's interrupt domain, rather than the * domain in which @p child resides. * * On Non-OFW targets, this should either return: * - The pointer address of a device that can uniquely identify @p child's * interrupt domain (e.g., the bhnd bus' device_t address), or * - 0 if unsupported by the bus. * * On OFW (including FDT) targets, this should return the @p child's iparent * property's xref if @p self is false, the child's own node xref value if * @p self is true, or 0 if no interrupt parent is found. */ METHOD uintptr_t get_intr_domain { device_t dev; device_t child; bool self; } DEFAULT bhnd_bus_null_get_intr_domain; /** * Return the number of interrupt lines assigned to @p child. * * @param dev The bhnd device whose child is being examined. * @param child The child device. */ METHOD u_int get_intr_count { device_t dev; device_t child; } DEFAULT bhnd_bus_null_get_intr_count; /** * Get the backplane interrupt vector of the @p intr line attached to @p child. * * @param dev The device whose child is being examined. * @param child The child device. * @param intr The index of the interrupt line being queried. * @param[out] ivec On success, the assigned hardware interrupt vector will be * written to this pointer. * * On bcma(4) devices, this returns the OOB bus line assigned to the * interrupt. * * On siba(4) devices, this returns the target OCP slave flag number assigned * to the interrupt. * * @retval 0 success * @retval ENXIO If @p intr exceeds the number of interrupt lines * assigned to @p child. */ METHOD int get_intr_ivec { device_t dev; device_t child; u_int intr; u_int *ivec; } DEFAULT bhnd_bus_null_get_intr_ivec; /** * Map the given @p intr to an IRQ number; until unmapped, this IRQ may be used * to allocate a resource of type SYS_RES_IRQ. * * On success, the caller assumes ownership of the interrupt mapping, and * is responsible for releasing the mapping via BHND_BUS_UNMAP_INTR(). * * @param dev The bhnd bus device. * @param child The requesting child device. * @param intr The interrupt being mapped. * @param[out] irq On success, the bus interrupt value mapped for @p intr. * * @retval 0 If an interrupt was assigned. * @retval non-zero If mapping an interrupt otherwise fails, a regular * unix error code will be returned. */ METHOD int map_intr { device_t dev; device_t child; u_int intr; rman_res_t *irq; } DEFAULT bhnd_bus_null_map_intr; /** * Unmap an bus interrupt previously mapped via BHND_BUS_MAP_INTR(). * * @param dev The bhnd bus device. * @param child The requesting child device. * @param intr The interrupt number being unmapped. This is equivalent to the * bus resource ID for the interrupt. */ METHOD void unmap_intr { device_t dev; device_t child; rman_res_t irq; } DEFAULT bhnd_bus_null_unmap_intr; /** * Return true if @p region_num is a valid region on @p port_num of * @p type attached to @p child. * * @param dev The device whose child is being examined. * @param child The child device. * @param type The port type being queried. * @param port_num The port number being queried. * @param region_num The region number being queried. */ METHOD bool is_region_valid { device_t dev; device_t child; bhnd_port_type type; u_int port_num; u_int region_num; }; /** * Return the number of ports of type @p type attached to @p child. * * @param dev The device whose child is being examined. * @param child The child device. * @param type The port type being queried. */ METHOD u_int get_port_count { device_t dev; device_t child; bhnd_port_type type; }; /** * Return the number of memory regions mapped to @p child @p port of * type @p type. * * @param dev The device whose child is being examined. * @param child The child device. * @param port The port number being queried. * @param type The port type being queried. */ METHOD u_int get_region_count { device_t dev; device_t child; bhnd_port_type type; u_int port; }; /** * Return the SYS_RES_MEMORY resource-ID for a port/region pair attached to * @p child. * * @param dev The bus device. * @param child The bhnd child. * @param port_type The port type. * @param port_num The index of the child interconnect port. * @param region_num The index of the port-mapped address region. * * @retval -1 No such port/region found. */ METHOD int get_port_rid { device_t dev; device_t child; bhnd_port_type port_type; u_int port_num; u_int region_num; } DEFAULT bhnd_bus_null_get_port_rid; /** * Decode a port / region pair on @p child defined by @p type and @p rid. * * @param dev The bus device. * @param child The bhnd child. * @param type The resource type. * @param rid The resource ID. * @param[out] port_type The port's type. * @param[out] port The port identifier. * @param[out] region The identifier of the memory region on @p port. * * @retval 0 success * @retval non-zero No matching type/rid found. */ METHOD int decode_port_rid { device_t dev; device_t child; int type; int rid; bhnd_port_type *port_type; u_int *port; u_int *region; } DEFAULT bhnd_bus_null_decode_port_rid; /** * Get the address and size of @p region on @p port. * * @param dev The bus device. * @param child The bhnd child. * @param port_type The port type. * @param port The port identifier. * @param region The identifier of the memory region on @p port. * @param[out] region_addr The region's base address. * @param[out] region_size The region's size. * * @retval 0 success * @retval non-zero No matching port/region found. */ METHOD int get_region_addr { device_t dev; device_t child; bhnd_port_type port_type; u_int port; u_int region; bhnd_addr_t *region_addr; bhnd_size_t *region_size; } DEFAULT bhnd_bus_null_get_region_addr; /** * Read an NVRAM variable. * * It is the responsibility of the bus to delegate this request to * the appropriate NVRAM child device, or to a parent bus implementation. * * @param dev The bus device. * @param child The requesting device. * @param name The NVRAM variable name. * @param[out] buf On success, the requested value will be written * to this buffer. This argment may be NULL if * the value is not desired. * @param[in,out] size The capacity of @p buf. On success, will be set * to the actual size of the requested value. * @param type The data type to be written to @p buf. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENOMEM If @p buf is non-NULL and a buffer of @p size is too * small to hold the requested value. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the @p name's data type cannot be coerced to @p type. * @retval ERANGE If value coercion would overflow @p type. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ METHOD int get_nvram_var { device_t dev; device_t child; const char *name; void *buf; size_t *size; bhnd_nvram_type type; } DEFAULT bhnd_bus_null_get_nvram_var; /** An implementation of bus_read_1() compatible with bhnd_resource */ METHOD uint8_t read_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; } /** An implementation of bus_read_2() compatible with bhnd_resource */ METHOD uint16_t read_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; } /** An implementation of bus_read_4() compatible with bhnd_resource */ METHOD uint32_t read_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; } /** An implementation of bus_write_1() compatible with bhnd_resource */ METHOD void write_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t value; } /** An implementation of bus_write_2() compatible with bhnd_resource */ METHOD void write_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t value; } /** An implementation of bus_write_4() compatible with bhnd_resource */ METHOD void write_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t value; } /** An implementation of bus_read_stream_1() compatible with bhnd_resource */ METHOD uint8_t read_stream_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; } /** An implementation of bus_read_stream_2() compatible with bhnd_resource */ METHOD uint16_t read_stream_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; } /** An implementation of bus_read_stream_4() compatible with bhnd_resource */ METHOD uint32_t read_stream_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; } /** An implementation of bus_write_stream_1() compatible with bhnd_resource */ METHOD void write_stream_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t value; } /** An implementation of bus_write_stream_2() compatible with bhnd_resource */ METHOD void write_stream_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t value; } /** An implementation of bus_write_stream_4() compatible with bhnd_resource */ METHOD void write_stream_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t value; } /** An implementation of bus_read_multi_1() compatible with bhnd_resource */ METHOD void read_multi_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_read_multi_2() compatible with bhnd_resource */ METHOD void read_multi_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_read_multi_4() compatible with bhnd_resource */ METHOD void read_multi_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_write_multi_1() compatible with bhnd_resource */ METHOD void write_multi_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_write_multi_2() compatible with bhnd_resource */ METHOD void write_multi_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_write_multi_4() compatible with bhnd_resource */ METHOD void write_multi_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_read_multi_stream_1() compatible * bhnd_resource */ METHOD void read_multi_stream_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_read_multi_stream_2() compatible * bhnd_resource */ METHOD void read_multi_stream_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_read_multi_stream_4() compatible * bhnd_resource */ METHOD void read_multi_stream_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_write_multi_stream_1() compatible * bhnd_resource */ METHOD void write_multi_stream_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_write_multi_stream_2() compatible with * bhnd_resource */ METHOD void write_multi_stream_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_write_multi_stream_4() compatible with * bhnd_resource */ METHOD void write_multi_stream_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_set_multi_1() compatible with bhnd_resource */ METHOD void set_multi_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t value; bus_size_t count; } /** An implementation of bus_set_multi_2() compatible with bhnd_resource */ METHOD void set_multi_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t value; bus_size_t count; } /** An implementation of bus_set_multi_4() compatible with bhnd_resource */ METHOD void set_multi_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t value; bus_size_t count; } /** An implementation of bus_set_region_1() compatible with bhnd_resource */ METHOD void set_region_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t value; bus_size_t count; } /** An implementation of bus_set_region_2() compatible with bhnd_resource */ METHOD void set_region_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t value; bus_size_t count; } /** An implementation of bus_set_region_4() compatible with bhnd_resource */ METHOD void set_region_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t value; bus_size_t count; } /** An implementation of bus_read_region_1() compatible with bhnd_resource */ METHOD void read_region_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_read_region_2() compatible with bhnd_resource */ METHOD void read_region_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_read_region_4() compatible with bhnd_resource */ METHOD void read_region_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_read_region_stream_1() compatible with * bhnd_resource */ METHOD void read_region_stream_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_read_region_stream_2() compatible with * bhnd_resource */ METHOD void read_region_stream_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_read_region_stream_4() compatible with * bhnd_resource */ METHOD void read_region_stream_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_write_region_1() compatible with bhnd_resource */ METHOD void write_region_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_write_region_2() compatible with bhnd_resource */ METHOD void write_region_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_write_region_4() compatible with bhnd_resource */ METHOD void write_region_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_write_region_stream_1() compatible with * bhnd_resource */ METHOD void write_region_stream_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_write_region_stream_2() compatible with * bhnd_resource */ METHOD void write_region_stream_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_write_region_stream_4() compatible with * bhnd_resource */ METHOD void write_region_stream_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_barrier() compatible with bhnd_resource */ METHOD void barrier { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; bus_size_t length; int flags; } Index: head/sys/dev/bhnd/cores/usb/bhnd_usb.c =================================================================== --- head/sys/dev/bhnd/cores/usb/bhnd_usb.c (revision 326291) +++ head/sys/dev/bhnd/cores/usb/bhnd_usb.c (revision 326292) @@ -1,500 +1,500 @@ /*- * Copyright (c) 2010, Aleksandr Rybalko * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice unmodified, this list of conditions, and the following * disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); /* * Ported version of BroadCom USB core driver from ZRouter project */ #include #include #include #include #include #include #include #include #include #include #include #include #include "bhnd_usbvar.h" /****************************** Variables ************************************/ static const struct bhnd_device bhnd_usb_devs[] = { BHND_DEVICE(BCM, USB20H, "USB2.0 Host core", NULL), BHND_DEVICE_END }; /****************************** Prototypes ***********************************/ static int bhnd_usb_attach(device_t); static int bhnd_usb_probe(device_t); static device_t bhnd_usb_add_child(device_t dev, u_int order, const char *name, int unit); static int bhnd_usb_print_all_resources(device_t dev); static int bhnd_usb_print_child(device_t bus, device_t child); static struct resource * bhnd_usb_alloc_resource(device_t bus, device_t child, int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags); static int bhnd_usb_release_resource(device_t dev, device_t child, int type, int rid, struct resource *r); static struct resource_list * bhnd_usb_get_reslist(device_t dev, device_t child); static int bhnd_usb_probe(device_t dev) { const struct bhnd_device *id; id = bhnd_device_lookup(dev, bhnd_usb_devs, sizeof(bhnd_usb_devs[0])); if (id == NULL) return (ENXIO); device_set_desc(dev, id->desc); return (BUS_PROBE_DEFAULT); } static int bhnd_usb_attach(device_t dev) { struct bhnd_usb_softc *sc; int rid; uint32_t tmp; int tries, err; sc = device_get_softc(dev); - bhnd_reset_hw(dev, 0); + bhnd_reset_hw(dev, 0, 0); /* * Allocate the resources which the parent bus has already * determined for us. * XXX: There are few windows (usually 2), RID should be chip-specific */ rid = 0; sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (sc->sc_mem == NULL) { BHND_ERROR_DEV(dev, "unable to allocate memory"); return (ENXIO); } sc->sc_bt = rman_get_bustag(sc->sc_mem); sc->sc_bh = rman_get_bushandle(sc->sc_mem); sc->sc_maddr = rman_get_start(sc->sc_mem); sc->sc_msize = rman_get_size(sc->sc_mem); rid = 0; sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE); if (sc->sc_irq == NULL) { BHND_ERROR_DEV(dev, "unable to allocate IRQ"); return (ENXIO); } sc->sc_irqn = rman_get_start(sc->sc_irq); sc->mem_rman.rm_start = sc->sc_maddr; sc->mem_rman.rm_end = sc->sc_maddr + sc->sc_msize - 1; sc->mem_rman.rm_type = RMAN_ARRAY; sc->mem_rman.rm_descr = "BHND USB core I/O memory addresses"; if (rman_init(&sc->mem_rman) != 0 || rman_manage_region(&sc->mem_rman, sc->mem_rman.rm_start, sc->mem_rman.rm_end) != 0) { panic("%s: sc->mem_rman", __func__); } /* TODO: macros for registers */ bus_write_4(sc->sc_mem, 0x200, 0x7ff); DELAY(100); #define OHCI_CONTROL 0x04 bus_write_4(sc->sc_mem, OHCI_CONTROL, 0); if ( bhnd_get_device(dev) == BHND_COREID_USB20H) { uint32_t rev = bhnd_get_hwrev(dev); BHND_INFO_DEV(dev, "USB HOST 2.0 setup for rev %d", rev); if (rev == 1/* ? == 2 */) { /* SiBa code */ /* Change Flush control reg */ tmp = bus_read_4(sc->sc_mem, 0x400) & ~0x8; bus_write_4(sc->sc_mem, 0x400, tmp); tmp = bus_read_4(sc->sc_mem, 0x400); BHND_DEBUG_DEV(dev, "USB20H fcr: 0x%x", tmp); /* Change Shim control reg */ tmp = bus_read_4(sc->sc_mem, 0x304) & ~0x100; bus_write_4(sc->sc_mem, 0x304, tmp); tmp = bus_read_4(sc->sc_mem, 0x304); BHND_DEBUG_DEV(dev, "USB20H shim: 0x%x", tmp); } else if (rev >= 5) { /* BCMA code */ err = bhnd_alloc_pmu(dev); if(err) { BHND_ERROR_DEV(dev, "can't alloc pmu: %d", err); return (err); } err = bhnd_request_ext_rsrc(dev, 1); if(err) { BHND_ERROR_DEV(dev, "can't req ext: %d", err); return (err); } /* Take out of resets */ bus_write_4(sc->sc_mem, 0x200, 0x4ff); DELAY(25); bus_write_4(sc->sc_mem, 0x200, 0x6ff); DELAY(25); /* Make sure digital and AFE are locked in USB PHY */ bus_write_4(sc->sc_mem, 0x524, 0x6b); DELAY(50); bus_read_4(sc->sc_mem, 0x524); DELAY(50); bus_write_4(sc->sc_mem, 0x524, 0xab); DELAY(50); bus_read_4(sc->sc_mem, 0x524); DELAY(50); bus_write_4(sc->sc_mem, 0x524, 0x2b); DELAY(50); bus_read_4(sc->sc_mem, 0x524); DELAY(50); bus_write_4(sc->sc_mem, 0x524, 0x10ab); DELAY(50); bus_read_4(sc->sc_mem, 0x524); tries = 10000; for (;;) { DELAY(10); tmp = bus_read_4(sc->sc_mem, 0x528); if (tmp & 0xc000) break; if (--tries != 0) continue; tmp = bus_read_4(sc->sc_mem, 0x528); BHND_ERROR_DEV(dev, "USB20H mdio_rddata 0x%08x", tmp); } /* XXX: Puzzle code */ bus_write_4(sc->sc_mem, 0x528, 0x80000000); bus_read_4(sc->sc_mem, 0x314); DELAY(265); bus_write_4(sc->sc_mem, 0x200, 0x7ff); DELAY(10); /* Take USB and HSIC out of non-driving modes */ bus_write_4(sc->sc_mem, 0x510, 0); } } bus_generic_probe(dev); if (bhnd_get_device(dev) == BHND_COREID_USB20H && ( bhnd_get_hwrev(dev) > 0)) bhnd_usb_add_child(dev, 0, "ehci", -1); bhnd_usb_add_child(dev, 1, "ohci", -1); bus_generic_attach(dev); return (0); } static struct resource * bhnd_usb_alloc_resource(device_t bus, device_t child, int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) { struct resource *rv; struct resource_list *rl; struct resource_list_entry *rle; int passthrough, isdefault, needactivate; struct bhnd_usb_softc *sc = device_get_softc(bus); isdefault = RMAN_IS_DEFAULT_RANGE(start,end); passthrough = (device_get_parent(child) != bus); needactivate = flags & RF_ACTIVE; rle = NULL; if (!passthrough && isdefault) { BHND_INFO_DEV(bus, "trying allocate def %d - %d for %s", type, *rid, device_get_nameunit(child) ); rl = BUS_GET_RESOURCE_LIST(bus, child); rle = resource_list_find(rl, type, *rid); if (rle == NULL) return (NULL); if (rle->res != NULL) panic("%s: resource entry is busy", __func__); start = rle->start; end = rle->end; count = rle->count; } else { BHND_INFO_DEV(bus, "trying allocate %d - %d (%jx-%jx) for %s", type, *rid, start, end, device_get_nameunit(child) ); } /* * If the request is for a resource which we manage, * attempt to satisfy the allocation ourselves. */ if (type == SYS_RES_MEMORY) { rv = rman_reserve_resource(&sc->mem_rman, start, end, count, flags, child); if (rv == NULL) { BHND_ERROR_DEV(bus, "could not reserve resource"); return (0); } rman_set_rid(rv, *rid); if (needactivate && bus_activate_resource(child, type, *rid, rv)) { BHND_ERROR_DEV(bus, "could not activate resource"); rman_release_resource(rv); return (0); } return (rv); } /* * Pass the request to the parent. */ return (bus_generic_rl_alloc_resource(bus, child, type, rid, start, end, count, flags)); } static struct resource_list * bhnd_usb_get_reslist(device_t dev, device_t child) { struct bhnd_usb_devinfo *sdi; sdi = device_get_ivars(child); return (&sdi->sdi_rl); } static int bhnd_usb_release_resource(device_t dev, device_t child, int type, int rid, struct resource *r) { struct bhnd_usb_softc *sc; struct resource_list_entry *rle; bool passthrough; int error; sc = device_get_softc(dev); passthrough = (device_get_parent(child) != dev); /* Delegate to our parent device's bus if the requested resource type * isn't handled locally. */ if (type != SYS_RES_MEMORY) { return (bus_generic_rl_release_resource(dev, child, type, rid, r)); } /* Deactivate resources */ if (rman_get_flags(r) & RF_ACTIVE) { error = BUS_DEACTIVATE_RESOURCE(dev, child, type, rid, r); if (error) return (error); } if ((error = rman_release_resource(r))) return (error); if (!passthrough) { /* Clean resource list entry */ rle = resource_list_find(BUS_GET_RESOURCE_LIST(dev, child), type, rid); if (rle != NULL) rle->res = NULL; } return (0); } static int bhnd_usb_print_all_resources(device_t dev) { struct bhnd_usb_devinfo *sdi; struct resource_list *rl; int retval; retval = 0; sdi = device_get_ivars(dev); rl = &sdi->sdi_rl; if (STAILQ_FIRST(rl)) retval += printf(" at"); retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%jx"); retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); return (retval); } static int bhnd_usb_print_child(device_t bus, device_t child) { int retval = 0; retval += bus_print_child_header(bus, child); retval += bhnd_usb_print_all_resources(child); if (device_get_flags(child)) retval += printf(" flags %#x", device_get_flags(child)); retval += printf(" on %s\n", device_get_nameunit(bus)); return (retval); } static device_t bhnd_usb_add_child(device_t dev, u_int order, const char *name, int unit) { struct bhnd_usb_softc *sc; struct bhnd_usb_devinfo *sdi; device_t child; int error; sc = device_get_softc(dev); sdi = malloc(sizeof(struct bhnd_usb_devinfo), M_DEVBUF, M_NOWAIT|M_ZERO); if (sdi == NULL) return (NULL); resource_list_init(&sdi->sdi_rl); sdi->sdi_irq_mapped = false; if (strncmp(name, "ohci", 4) == 0) { sdi->sdi_maddr = sc->sc_maddr + 0x000; sdi->sdi_msize = 0x200; } else if (strncmp(name, "ehci", 4) == 0) { sdi->sdi_maddr = sc->sc_maddr + 0x000; sdi->sdi_msize = 0x1000; } else { panic("Unknown subdevice"); } /* Map the child's IRQ */ if ((error = bhnd_map_intr(dev, 0, &sdi->sdi_irq))) { BHND_ERROR_DEV(dev, "could not map %s interrupt: %d", name, error); goto failed; } sdi->sdi_irq_mapped = true; BHND_INFO_DEV(dev, "%s: irq=%ju maddr=0x%jx", name, sdi->sdi_irq, sdi->sdi_maddr); /* * Add memory window and irq to child's resource list. */ resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, 0, sdi->sdi_maddr, sdi->sdi_maddr + sdi->sdi_msize - 1, sdi->sdi_msize); resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, 0, sdi->sdi_irq, sdi->sdi_irq, 1); child = device_add_child_ordered(dev, order, name, unit); if (child == NULL) { BHND_ERROR_DEV(dev, "could not add %s", name); goto failed; } device_set_ivars(child, sdi); return (child); failed: if (sdi->sdi_irq_mapped) bhnd_unmap_intr(dev, sdi->sdi_irq); resource_list_free(&sdi->sdi_rl); free(sdi, M_DEVBUF); return (NULL); } static void bhnd_usb_child_deleted(device_t dev, device_t child) { struct bhnd_usb_devinfo *dinfo; if ((dinfo = device_get_ivars(child)) == NULL) return; if (dinfo->sdi_irq_mapped) bhnd_unmap_intr(dev, dinfo->sdi_irq); resource_list_free(&dinfo->sdi_rl); free(dinfo, M_DEVBUF); } static device_method_t bhnd_usb_methods[] = { /* Device interface */ DEVMETHOD(device_attach, bhnd_usb_attach), DEVMETHOD(device_probe, bhnd_usb_probe), /* Bus interface */ DEVMETHOD(bus_add_child, bhnd_usb_add_child), DEVMETHOD(bus_child_deleted, bhnd_usb_child_deleted), DEVMETHOD(bus_alloc_resource, bhnd_usb_alloc_resource), DEVMETHOD(bus_get_resource_list, bhnd_usb_get_reslist), DEVMETHOD(bus_print_child, bhnd_usb_print_child), DEVMETHOD(bus_release_resource, bhnd_usb_release_resource), /* Bus interface: generic part */ DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), DEVMETHOD_END }; static devclass_t bhnd_usb_devclass; DEFINE_CLASS_0(bhnd_usb, bhnd_usb_driver, bhnd_usb_methods, sizeof(struct bhnd_usb_softc)); DRIVER_MODULE(bhnd_usb, bhnd, bhnd_usb_driver, bhnd_usb_devclass, 0, 0); MODULE_VERSION(bhnd_usb, 1); Index: head/sys/dev/bhnd/siba/siba.c =================================================================== --- head/sys/dev/bhnd/siba/siba.c (revision 326291) +++ head/sys/dev/bhnd/siba/siba.c (revision 326292) @@ -1,1486 +1,1497 @@ /*- * Copyright (c) 2015-2016 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include "sibareg.h" #include "sibavar.h" static bhnd_erom_class_t * siba_get_erom_class(driver_t *driver) { return (&siba_erom_parser); } int siba_probe(device_t dev) { device_set_desc(dev, "SIBA BHND bus"); return (BUS_PROBE_DEFAULT); } /** * Default siba(4) bus driver implementation of DEVICE_ATTACH(). * * This implementation initializes internal siba(4) state and performs * bus enumeration, and must be called by subclassing drivers in * DEVICE_ATTACH() before any other bus methods. */ int siba_attach(device_t dev) { struct siba_softc *sc; int error; sc = device_get_softc(dev); sc->dev = dev; SIBA_LOCK_INIT(sc); /* Enumerate children */ if ((error = siba_add_children(dev))) { device_delete_children(dev); SIBA_LOCK_DESTROY(sc); return (error); } return (0); } int siba_detach(device_t dev) { struct siba_softc *sc; int error; sc = device_get_softc(dev); if ((error = bhnd_generic_detach(dev))) return (error); SIBA_LOCK_DESTROY(sc); return (0); } int siba_resume(device_t dev) { return (bhnd_generic_resume(dev)); } int siba_suspend(device_t dev) { return (bhnd_generic_suspend(dev)); } static int siba_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) { struct siba_softc *sc; const struct siba_devinfo *dinfo; const struct bhnd_core_info *cfg; sc = device_get_softc(dev); dinfo = device_get_ivars(child); cfg = &dinfo->core_id.core_info; switch (index) { case BHND_IVAR_VENDOR: *result = cfg->vendor; return (0); case BHND_IVAR_DEVICE: *result = cfg->device; return (0); case BHND_IVAR_HWREV: *result = cfg->hwrev; return (0); case BHND_IVAR_DEVICE_CLASS: *result = bhnd_core_class(cfg); return (0); case BHND_IVAR_VENDOR_NAME: *result = (uintptr_t) bhnd_vendor_name(cfg->vendor); return (0); case BHND_IVAR_DEVICE_NAME: *result = (uintptr_t) bhnd_core_name(cfg); return (0); case BHND_IVAR_CORE_INDEX: *result = cfg->core_idx; return (0); case BHND_IVAR_CORE_UNIT: *result = cfg->unit; return (0); case BHND_IVAR_PMU_INFO: SIBA_LOCK(sc); switch (dinfo->pmu_state) { case SIBA_PMU_NONE: *result = (uintptr_t)NULL; SIBA_UNLOCK(sc); return (0); case SIBA_PMU_BHND: *result = (uintptr_t)dinfo->pmu.bhnd_info; SIBA_UNLOCK(sc); return (0); case SIBA_PMU_PWRCTL: panic("bhnd_get_pmu_info() called with " "SIBA_PMU_PWRCTL"); return (ENXIO); } panic("invalid PMU state: %d", dinfo->pmu_state); return (ENXIO); default: return (ENOENT); } } static int siba_write_ivar(device_t dev, device_t child, int index, uintptr_t value) { struct siba_softc *sc; struct siba_devinfo *dinfo; sc = device_get_softc(dev); dinfo = device_get_ivars(child); switch (index) { case BHND_IVAR_VENDOR: case BHND_IVAR_DEVICE: case BHND_IVAR_HWREV: case BHND_IVAR_DEVICE_CLASS: case BHND_IVAR_VENDOR_NAME: case BHND_IVAR_DEVICE_NAME: case BHND_IVAR_CORE_INDEX: case BHND_IVAR_CORE_UNIT: return (EINVAL); case BHND_IVAR_PMU_INFO: SIBA_LOCK(sc); switch (dinfo->pmu_state) { case SIBA_PMU_NONE: case SIBA_PMU_BHND: dinfo->pmu.bhnd_info = (void *)value; dinfo->pmu_state = SIBA_PMU_BHND; SIBA_UNLOCK(sc); return (0); case SIBA_PMU_PWRCTL: panic("bhnd_set_pmu_info() called with " "SIBA_PMU_PWRCTL"); return (ENXIO); } panic("invalid PMU state: %d", dinfo->pmu_state); return (ENXIO); default: return (ENOENT); } } static struct resource_list * siba_get_resource_list(device_t dev, device_t child) { struct siba_devinfo *dinfo = device_get_ivars(child); return (&dinfo->resources); } /* BHND_BUS_ALLOC_PMU() */ static int siba_alloc_pmu(device_t dev, device_t child) { struct siba_softc *sc; struct siba_devinfo *dinfo; device_t pwrctl; int error; if (device_get_parent(child) != dev) return (EINVAL); sc = device_get_softc(dev); dinfo = device_get_ivars(child); pwrctl = bhnd_retain_provider(child, BHND_SERVICE_PWRCTL); /* Unless this is a legacy PWRCTL chipset, defer to bhnd(4)'s PMU * implementation */ if (pwrctl == NULL) { if ((error = bhnd_generic_alloc_pmu(dev, child))) return (error); KASSERT(dinfo->pmu_state == SIBA_PMU_BHND, ("unexpected PMU state: %d", dinfo->pmu_state)); return (0); } /* This is a legacy PWRCTL chipset; we need to map all bhnd(4) bus PMU * to PWRCTL operations ourselves.*/ SIBA_LOCK(sc); /* Per-core PMU state already allocated? */ if (dinfo->pmu_state != SIBA_PMU_NONE) { panic("duplicate PMU allocation for %s", device_get_nameunit(child)); } /* Update the child's PMU allocation state, and transfer ownership of * the PWRCTL provider reference */ dinfo->pmu_state = SIBA_PMU_PWRCTL; dinfo->pmu.pwrctl = pwrctl; SIBA_UNLOCK(sc); return (0); } /* BHND_BUS_RELEASE_PMU() */ static int siba_release_pmu(device_t dev, device_t child) { struct siba_softc *sc; struct siba_devinfo *dinfo; device_t pwrctl; int error; if (device_get_parent(child) != dev) return (EINVAL); sc = device_get_softc(dev); dinfo = device_get_ivars(child); SIBA_LOCK(sc); switch(dinfo->pmu_state) { case SIBA_PMU_NONE: panic("pmu over-release for %s", device_get_nameunit(child)); SIBA_UNLOCK(sc); return (ENXIO); case SIBA_PMU_BHND: SIBA_UNLOCK(sc); return (bhnd_generic_release_pmu(dev, child)); case SIBA_PMU_PWRCTL: /* Requesting BHND_CLOCK_DYN releases any outstanding clock * reservations */ pwrctl = dinfo->pmu.pwrctl; error = bhnd_pwrctl_request_clock(pwrctl, child, BHND_CLOCK_DYN); if (error) { SIBA_UNLOCK(sc); return (error); } /* Clean up the child's PMU state */ dinfo->pmu_state = SIBA_PMU_NONE; dinfo->pmu.pwrctl = NULL; SIBA_UNLOCK(sc); /* Release the provider reference */ bhnd_release_provider(child, pwrctl, BHND_SERVICE_PWRCTL); return (0); } panic("invalid PMU state: %d", dinfo->pmu_state); } /* BHND_BUS_GET_CLOCK_LATENCY() */ static int siba_get_clock_latency(device_t dev, device_t child, bhnd_clock clock, u_int *latency) { struct siba_softc *sc; struct siba_devinfo *dinfo; int error; if (device_get_parent(child) != dev) return (EINVAL); sc = device_get_softc(dev); dinfo = device_get_ivars(child); SIBA_LOCK(sc); switch(dinfo->pmu_state) { case SIBA_PMU_NONE: panic("no active PMU request state"); SIBA_UNLOCK(sc); return (ENXIO); case SIBA_PMU_BHND: SIBA_UNLOCK(sc); return (bhnd_generic_get_clock_latency(dev, child, clock, latency)); case SIBA_PMU_PWRCTL: error = bhnd_pwrctl_get_clock_latency(dinfo->pmu.pwrctl, clock, latency); SIBA_UNLOCK(sc); return (error); } panic("invalid PMU state: %d", dinfo->pmu_state); } /* BHND_BUS_GET_CLOCK_FREQ() */ static int siba_get_clock_freq(device_t dev, device_t child, bhnd_clock clock, u_int *freq) { struct siba_softc *sc; struct siba_devinfo *dinfo; int error; if (device_get_parent(child) != dev) return (EINVAL); sc = device_get_softc(dev); dinfo = device_get_ivars(child); SIBA_LOCK(sc); switch(dinfo->pmu_state) { case SIBA_PMU_NONE: panic("no active PMU request state"); SIBA_UNLOCK(sc); return (ENXIO); case SIBA_PMU_BHND: SIBA_UNLOCK(sc); return (bhnd_generic_get_clock_freq(dev, child, clock, freq)); case SIBA_PMU_PWRCTL: error = bhnd_pwrctl_get_clock_freq(dinfo->pmu.pwrctl, clock, freq); SIBA_UNLOCK(sc); return (error); } panic("invalid PMU state: %d", dinfo->pmu_state); } /* BHND_BUS_REQUEST_EXT_RSRC() */ static int siba_request_ext_rsrc(device_t dev, device_t child, u_int rsrc) { struct siba_softc *sc; struct siba_devinfo *dinfo; if (device_get_parent(child) != dev) return (EINVAL); sc = device_get_softc(dev); dinfo = device_get_ivars(child); SIBA_LOCK(sc); switch(dinfo->pmu_state) { case SIBA_PMU_NONE: panic("no active PMU request state"); SIBA_UNLOCK(sc); return (ENXIO); case SIBA_PMU_BHND: SIBA_UNLOCK(sc); return (bhnd_generic_request_ext_rsrc(dev, child, rsrc)); case SIBA_PMU_PWRCTL: /* HW does not support per-core external resources */ SIBA_UNLOCK(sc); return (ENODEV); } panic("invalid PMU state: %d", dinfo->pmu_state); } /* BHND_BUS_RELEASE_EXT_RSRC() */ static int siba_release_ext_rsrc(device_t dev, device_t child, u_int rsrc) { struct siba_softc *sc; struct siba_devinfo *dinfo; if (device_get_parent(child) != dev) return (EINVAL); sc = device_get_softc(dev); dinfo = device_get_ivars(child); SIBA_LOCK(sc); switch(dinfo->pmu_state) { case SIBA_PMU_NONE: panic("no active PMU request state"); SIBA_UNLOCK(sc); return (ENXIO); case SIBA_PMU_BHND: SIBA_UNLOCK(sc); return (bhnd_generic_release_ext_rsrc(dev, child, rsrc)); case SIBA_PMU_PWRCTL: /* HW does not support per-core external resources */ SIBA_UNLOCK(sc); return (ENODEV); } panic("invalid PMU state: %d", dinfo->pmu_state); } /* BHND_BUS_REQUEST_CLOCK() */ static int siba_request_clock(device_t dev, device_t child, bhnd_clock clock) { struct siba_softc *sc; struct siba_devinfo *dinfo; int error; if (device_get_parent(child) != dev) return (EINVAL); sc = device_get_softc(dev); dinfo = device_get_ivars(child); SIBA_LOCK(sc); switch(dinfo->pmu_state) { case SIBA_PMU_NONE: panic("no active PMU request state"); SIBA_UNLOCK(sc); return (ENXIO); case SIBA_PMU_BHND: SIBA_UNLOCK(sc); return (bhnd_generic_request_clock(dev, child, clock)); case SIBA_PMU_PWRCTL: error = bhnd_pwrctl_request_clock(dinfo->pmu.pwrctl, child, clock); SIBA_UNLOCK(sc); return (error); } panic("invalid PMU state: %d", dinfo->pmu_state); } /* BHND_BUS_ENABLE_CLOCKS() */ static int siba_enable_clocks(device_t dev, device_t child, uint32_t clocks) { struct siba_softc *sc; struct siba_devinfo *dinfo; if (device_get_parent(child) != dev) return (EINVAL); sc = device_get_softc(dev); dinfo = device_get_ivars(child); SIBA_LOCK(sc); switch(dinfo->pmu_state) { case SIBA_PMU_NONE: panic("no active PMU request state"); SIBA_UNLOCK(sc); return (ENXIO); case SIBA_PMU_BHND: SIBA_UNLOCK(sc); return (bhnd_generic_enable_clocks(dev, child, clocks)); case SIBA_PMU_PWRCTL: SIBA_UNLOCK(sc); /* All (supported) clocks are already enabled by default */ clocks &= ~(BHND_CLOCK_DYN | BHND_CLOCK_ILP | BHND_CLOCK_ALP | BHND_CLOCK_HT); if (clocks != 0) { device_printf(dev, "%s requested unknown clocks: %#x\n", device_get_nameunit(child), clocks); return (ENODEV); } return (0); } panic("invalid PMU state: %d", dinfo->pmu_state); } static int siba_read_iost(device_t dev, device_t child, uint16_t *iost) { uint32_t tmhigh; int error; error = bhnd_read_config(child, SIBA_CFG0_TMSTATEHIGH, &tmhigh, 4); if (error) return (error); *iost = (SIBA_REG_GET(tmhigh, TMH_SISF)); return (0); } static int siba_read_ioctl(device_t dev, device_t child, uint16_t *ioctl) { uint32_t ts_low; int error; if ((error = bhnd_read_config(child, SIBA_CFG0_TMSTATELOW, &ts_low, 4))) return (error); *ioctl = (SIBA_REG_GET(ts_low, TML_SICF)); return (0); } static int siba_write_ioctl(device_t dev, device_t child, uint16_t value, uint16_t mask) { struct siba_devinfo *dinfo; struct bhnd_resource *r; uint32_t ts_low, ts_mask; if (device_get_parent(child) != dev) return (EINVAL); /* Fetch CFG0 mapping */ dinfo = device_get_ivars(child); if ((r = dinfo->cfg_res[0]) == NULL) return (ENODEV); /* Mask and set TMSTATELOW core flag bits */ ts_mask = (mask << SIBA_TML_SICF_SHIFT) & SIBA_TML_SICF_MASK; ts_low = (value << SIBA_TML_SICF_SHIFT) & ts_mask; - return (siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, - ts_low, ts_mask)); + siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, + ts_low, ts_mask); + return (0); } static bool siba_is_hw_suspended(device_t dev, device_t child) { uint32_t ts_low; uint16_t ioctl; int error; /* Fetch target state */ error = bhnd_read_config(child, SIBA_CFG0_TMSTATELOW, &ts_low, 4); if (error) { device_printf(child, "error reading HW reset state: %d\n", error); return (true); } /* Is core held in RESET? */ if (ts_low & SIBA_TML_RESET) return (true); + /* Is target reject enabled? */ + if (ts_low & SIBA_TML_REJ_MASK) + return (true); + /* Is core clocked? */ ioctl = SIBA_REG_GET(ts_low, TML_SICF); if (!(ioctl & BHND_IOCTL_CLK_EN)) return (true); return (false); } static int -siba_reset_hw(device_t dev, device_t child, uint16_t ioctl) +siba_reset_hw(device_t dev, device_t child, uint16_t ioctl, + uint16_t reset_ioctl) { struct siba_devinfo *dinfo; struct bhnd_resource *r; uint32_t ts_low, imstate; + uint16_t clkflags; int error; if (device_get_parent(child) != dev) return (EINVAL); dinfo = device_get_ivars(child); /* Can't suspend the core without access to the CFG0 registers */ if ((r = dinfo->cfg_res[0]) == NULL) return (ENODEV); - /* We require exclusive control over BHND_IOCTL_CLK_EN and - * BHND_IOCTL_CLK_FORCE. */ - if (ioctl & (BHND_IOCTL_CLK_EN | BHND_IOCTL_CLK_FORCE)) + /* We require exclusive control over BHND_IOCTL_CLK_(EN|FORCE) */ + clkflags = BHND_IOCTL_CLK_EN | BHND_IOCTL_CLK_FORCE; + if (ioctl & clkflags) return (EINVAL); /* Place core into known RESET state */ - if ((error = BHND_BUS_SUSPEND_HW(dev, child))) + if ((error = bhnd_suspend_hw(child, reset_ioctl))) return (error); - /* Leaving the core in reset, set the caller's IOCTL flags and - * enable the core's clocks. */ - ts_low = (ioctl | BHND_IOCTL_CLK_EN | BHND_IOCTL_CLK_FORCE) << - SIBA_TML_SICF_SHIFT; - error = siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, - ts_low, SIBA_TML_SICF_MASK); - if (error) - return (error); + /* Set RESET, clear REJ, set the caller's IOCTL flags, and + * force clocks to ensure the signal propagates throughout the + * core. */ + ts_low = SIBA_TML_RESET | + (ioctl << SIBA_TML_SICF_SHIFT) | + (BHND_IOCTL_CLK_EN << SIBA_TML_SICF_SHIFT) | + (BHND_IOCTL_CLK_FORCE << SIBA_TML_SICF_SHIFT); + siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, + ts_low, UINT32_MAX); + /* Clear any target errors */ if (bhnd_bus_read_4(r, SIBA_CFG0_TMSTATEHIGH) & SIBA_TMH_SERR) { - error = siba_write_target_state(child, dinfo, - SIBA_CFG0_TMSTATEHIGH, 0, SIBA_TMH_SERR); - if (error) - return (error); + siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATEHIGH, + 0x0, SIBA_TMH_SERR); } /* Clear any initiator errors */ imstate = bhnd_bus_read_4(r, SIBA_CFG0_IMSTATE); if (imstate & (SIBA_IM_IBE|SIBA_IM_TO)) { - error = siba_write_target_state(child, dinfo, SIBA_CFG0_IMSTATE, - 0, SIBA_IM_IBE|SIBA_IM_TO); - if (error) - return (error); + siba_write_target_state(child, dinfo, SIBA_CFG0_IMSTATE, 0x0, + SIBA_IM_IBE|SIBA_IM_TO); } /* Release from RESET while leaving clocks forced, ensuring the * signal propagates throughout the core */ - error = siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, - 0x0, SIBA_TML_RESET); - if (error) - return (error); + siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, 0x0, + SIBA_TML_RESET); /* The core should now be active; we can clear the BHND_IOCTL_CLK_FORCE * bit and allow the core to manage clock gating. */ - error = siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, - 0x0, (BHND_IOCTL_CLK_FORCE << SIBA_TML_SICF_SHIFT)); - if (error) - return (error); + siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, 0x0, + (BHND_IOCTL_CLK_FORCE << SIBA_TML_SICF_SHIFT)); return (0); } static int -siba_suspend_hw(device_t dev, device_t child) +siba_suspend_hw(device_t dev, device_t child, uint16_t ioctl) { struct siba_softc *sc; struct siba_devinfo *dinfo; struct bhnd_resource *r; - uint32_t idl, ts_low; - uint16_t ioctl; + uint32_t idl, ts_low, ts_mask; + uint16_t cflags, clkflags; int error; if (device_get_parent(child) != dev) return (EINVAL); sc = device_get_softc(dev); dinfo = device_get_ivars(child); /* Can't suspend the core without access to the CFG0 registers */ if ((r = dinfo->cfg_res[0]) == NULL) return (ENODEV); + /* We require exclusive control over BHND_IOCTL_CLK_(EN|FORCE) */ + clkflags = BHND_IOCTL_CLK_EN | BHND_IOCTL_CLK_FORCE; + if (ioctl & clkflags) + return (EINVAL); + /* Already in RESET? */ ts_low = bhnd_bus_read_4(r, SIBA_CFG0_TMSTATELOW); - if (ts_low & SIBA_TML_RESET) { - /* Clear IOCTL flags, ensuring the clock is disabled */ - return (siba_write_target_state(child, dinfo, - SIBA_CFG0_TMSTATELOW, 0x0, SIBA_TML_SICF_MASK)); + if (ts_low & SIBA_TML_RESET) + return (0); + /* If clocks are already disabled, we can place the core directly + * into RESET|REJ while setting the caller's IOCTL flags. */ + cflags = SIBA_REG_GET(ts_low, TML_SICF); + if (!(cflags & BHND_IOCTL_CLK_EN)) { + ts_low = SIBA_TML_RESET | SIBA_TML_REJ | + (ioctl << SIBA_TML_SICF_SHIFT); + ts_mask = SIBA_TML_RESET | SIBA_TML_REJ | SIBA_TML_SICF_MASK; + + siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, + ts_low, ts_mask); return (0); } - /* If clocks are already disabled, we can put the core directly - * into RESET */ - ioctl = SIBA_REG_GET(ts_low, TML_SICF); - if (!(ioctl & BHND_IOCTL_CLK_EN)) { - /* Set RESET and clear IOCTL flags */ - return (siba_write_target_state(child, dinfo, - SIBA_CFG0_TMSTATELOW, - SIBA_TML_RESET, - SIBA_TML_RESET | SIBA_TML_SICF_MASK)); - } - - /* Reject any further target backplane transactions */ - error = siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, + /* Reject further transactions reaching this core */ + siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, SIBA_TML_REJ, SIBA_TML_REJ); + + /* Wait for transaction busy flag to clear for all transactions + * initiated by this core */ + error = siba_wait_target_state(child, dinfo, SIBA_CFG0_TMSTATEHIGH, + 0x0, SIBA_TMH_BUSY, 100000); if (error) return (error); /* If this is an initiator core, we need to reject initiator * transactions too. */ idl = bhnd_bus_read_4(r, SIBA_CFG0_IDLOW); if (idl & SIBA_IDL_INIT) { - error = siba_write_target_state(child, dinfo, SIBA_CFG0_IMSTATE, + /* Reject further initiator transactions */ + siba_write_target_state(child, dinfo, SIBA_CFG0_IMSTATE, SIBA_IM_RJ, SIBA_IM_RJ); + + /* Wait for initiator busy flag to clear */ + error = siba_wait_target_state(child, dinfo, SIBA_CFG0_IMSTATE, + 0x0, SIBA_IM_BY, 100000); if (error) return (error); } - /* Put the core into RESET|REJECT, forcing clocks to ensure the RESET - * signal propagates throughout the core, leaving REJECT asserted. */ - ts_low = SIBA_TML_RESET; - ts_low |= (BHND_IOCTL_CLK_EN | BHND_IOCTL_CLK_FORCE) << - SIBA_TML_SICF_SHIFT; + /* Put the core into RESET, set the caller's IOCTL flags, and + * force clocks to ensure the RESET signal propagates throughout the + * core. */ + ts_low = SIBA_TML_RESET | + (ioctl << SIBA_TML_SICF_SHIFT) | + (BHND_IOCTL_CLK_EN << SIBA_TML_SICF_SHIFT) | + (BHND_IOCTL_CLK_FORCE << SIBA_TML_SICF_SHIFT); + ts_mask = SIBA_TML_RESET | + SIBA_TML_SICF_MASK; - error = siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, - ts_low, ts_low); + siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, ts_low, + ts_mask); if (error) return (error); /* Give RESET ample time */ DELAY(10); - /* Leaving core in reset, disable all clocks, clear REJ flags and - * IOCTL state */ - error = siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, - SIBA_TML_RESET, - SIBA_TML_RESET | SIBA_TML_REJ | SIBA_TML_SICF_MASK); - if (error) - return (error); - /* Clear previously asserted initiator reject */ if (idl & SIBA_IDL_INIT) { - error = siba_write_target_state(child, dinfo, SIBA_CFG0_IMSTATE, - 0, SIBA_IM_RJ); - if (error) - return (error); + siba_write_target_state(child, dinfo, SIBA_CFG0_IMSTATE, 0x0, + SIBA_IM_RJ); } + /* Disable all clocks, leaving RESET and REJ asserted */ + siba_write_target_state(child, dinfo, SIBA_CFG0_TMSTATELOW, 0x0, + (BHND_IOCTL_CLK_EN | BHND_IOCTL_CLK_FORCE) << SIBA_TML_SICF_SHIFT); + /* - * Core is now in RESET, with clocks disabled and REJ not asserted. + * Core is now in RESET. * * If the core holds any PWRCTL clock reservations, we need to release * those now. This emulates the standard bhnd(4) PMU behavior of RESET * automatically clearing clkctl */ SIBA_LOCK(sc); if (dinfo->pmu_state == SIBA_PMU_PWRCTL) { error = bhnd_pwrctl_request_clock(dinfo->pmu.pwrctl, child, BHND_CLOCK_DYN); SIBA_UNLOCK(sc); if (error) { device_printf(child, "failed to release clock request: " "%d", error); return (error); } return (0); } else { SIBA_UNLOCK(sc); return (0); } } static int siba_read_config(device_t dev, device_t child, bus_size_t offset, void *value, u_int width) { struct siba_devinfo *dinfo; rman_res_t r_size; /* Must be directly attached */ if (device_get_parent(child) != dev) return (EINVAL); /* CFG0 registers must be available */ dinfo = device_get_ivars(child); if (dinfo->cfg_res[0] == NULL) return (ENODEV); /* Offset must fall within CFG0 */ r_size = rman_get_size(dinfo->cfg_res[0]->res); if (r_size < offset || r_size - offset < width) return (EFAULT); switch (width) { case 1: *((uint8_t *)value) = bhnd_bus_read_1(dinfo->cfg_res[0], offset); return (0); case 2: *((uint16_t *)value) = bhnd_bus_read_2(dinfo->cfg_res[0], offset); return (0); case 4: *((uint32_t *)value) = bhnd_bus_read_4(dinfo->cfg_res[0], offset); return (0); default: return (EINVAL); } } static int siba_write_config(device_t dev, device_t child, bus_size_t offset, const void *value, u_int width) { struct siba_devinfo *dinfo; struct bhnd_resource *r; rman_res_t r_size; /* Must be directly attached */ if (device_get_parent(child) != dev) return (EINVAL); /* CFG0 registers must be available */ dinfo = device_get_ivars(child); if ((r = dinfo->cfg_res[0]) == NULL) return (ENODEV); /* Offset must fall within CFG0 */ r_size = rman_get_size(r->res); if (r_size < offset || r_size - offset < width) return (EFAULT); switch (width) { case 1: bhnd_bus_write_1(r, offset, *(const uint8_t *)value); return (0); case 2: bhnd_bus_write_2(r, offset, *(const uint8_t *)value); return (0); case 4: bhnd_bus_write_4(r, offset, *(const uint8_t *)value); return (0); default: return (EINVAL); } } static u_int siba_get_port_count(device_t dev, device_t child, bhnd_port_type type) { struct siba_devinfo *dinfo; /* delegate non-bus-attached devices to our parent */ if (device_get_parent(child) != dev) return (BHND_BUS_GET_PORT_COUNT(device_get_parent(dev), child, type)); dinfo = device_get_ivars(child); return (siba_port_count(&dinfo->core_id, type)); } static u_int siba_get_region_count(device_t dev, device_t child, bhnd_port_type type, u_int port) { struct siba_devinfo *dinfo; /* delegate non-bus-attached devices to our parent */ if (device_get_parent(child) != dev) return (BHND_BUS_GET_REGION_COUNT(device_get_parent(dev), child, type, port)); dinfo = device_get_ivars(child); return (siba_port_region_count(&dinfo->core_id, type, port)); } static int siba_get_port_rid(device_t dev, device_t child, bhnd_port_type port_type, u_int port_num, u_int region_num) { struct siba_devinfo *dinfo; struct siba_addrspace *addrspace; struct siba_cfg_block *cfg; /* delegate non-bus-attached devices to our parent */ if (device_get_parent(child) != dev) return (BHND_BUS_GET_PORT_RID(device_get_parent(dev), child, port_type, port_num, region_num)); dinfo = device_get_ivars(child); /* Look for a matching addrspace entry */ addrspace = siba_find_addrspace(dinfo, port_type, port_num, region_num); if (addrspace != NULL) return (addrspace->sa_rid); /* Try the config blocks */ cfg = siba_find_cfg_block(dinfo, port_type, port_num, region_num); if (cfg != NULL) return (cfg->cb_rid); /* Not found */ return (-1); } static int siba_decode_port_rid(device_t dev, device_t child, int type, int rid, bhnd_port_type *port_type, u_int *port_num, u_int *region_num) { struct siba_devinfo *dinfo; /* delegate non-bus-attached devices to our parent */ if (device_get_parent(child) != dev) return (BHND_BUS_DECODE_PORT_RID(device_get_parent(dev), child, type, rid, port_type, port_num, region_num)); dinfo = device_get_ivars(child); /* Ports are always memory mapped */ if (type != SYS_RES_MEMORY) return (EINVAL); /* Look for a matching addrspace entry */ for (u_int i = 0; i < dinfo->core_id.num_addrspace; i++) { if (dinfo->addrspace[i].sa_rid != rid) continue; *port_type = BHND_PORT_DEVICE; *port_num = siba_addrspace_device_port(i); *region_num = siba_addrspace_device_region(i); return (0); } /* Try the config blocks */ for (u_int i = 0; i < dinfo->core_id.num_cfg_blocks; i++) { if (dinfo->cfg[i].cb_rid != rid) continue; *port_type = BHND_PORT_AGENT; *port_num = siba_cfg_agent_port(i); *region_num = siba_cfg_agent_region(i); return (0); } /* Not found */ return (ENOENT); } static int siba_get_region_addr(device_t dev, device_t child, bhnd_port_type port_type, u_int port_num, u_int region_num, bhnd_addr_t *addr, bhnd_size_t *size) { struct siba_devinfo *dinfo; struct siba_addrspace *addrspace; struct siba_cfg_block *cfg; /* delegate non-bus-attached devices to our parent */ if (device_get_parent(child) != dev) { return (BHND_BUS_GET_REGION_ADDR(device_get_parent(dev), child, port_type, port_num, region_num, addr, size)); } dinfo = device_get_ivars(child); /* Look for a matching addrspace */ addrspace = siba_find_addrspace(dinfo, port_type, port_num, region_num); if (addrspace != NULL) { *addr = addrspace->sa_base; *size = addrspace->sa_size - addrspace->sa_bus_reserved; return (0); } /* Look for a matching cfg block */ cfg = siba_find_cfg_block(dinfo, port_type, port_num, region_num); if (cfg != NULL) { *addr = cfg->cb_base; *size = cfg->cb_size; return (0); } /* Not found */ return (ENOENT); } /** * Default siba(4) bus driver implementation of BHND_BUS_GET_INTR_COUNT(). */ u_int siba_get_intr_count(device_t dev, device_t child) { struct siba_devinfo *dinfo; /* delegate non-bus-attached devices to our parent */ if (device_get_parent(child) != dev) return (BHND_BUS_GET_INTR_COUNT(device_get_parent(dev), child)); dinfo = device_get_ivars(child); if (!dinfo->intr_en) { /* No interrupts */ return (0); } else { /* One assigned interrupt */ return (1); } } /** * Default siba(4) bus driver implementation of BHND_BUS_GET_INTR_IVEC(). */ int siba_get_intr_ivec(device_t dev, device_t child, u_int intr, u_int *ivec) { struct siba_devinfo *dinfo; /* delegate non-bus-attached devices to our parent */ if (device_get_parent(child) != dev) return (BHND_BUS_GET_INTR_IVEC(device_get_parent(dev), child, intr, ivec)); /* Must be a valid interrupt ID */ if (intr >= siba_get_intr_count(dev, child)) return (ENXIO); KASSERT(intr == 0, ("invalid ivec %u", intr)); dinfo = device_get_ivars(child); KASSERT(dinfo->intr_en, ("core does not have an interrupt assigned")); *ivec = dinfo->intr.flag; return (0); } /** * Register all address space mappings for @p di. * * @param dev The siba bus device. * @param di The device info instance on which to register all address * space entries. * @param r A resource mapping the enumeration table block for @p di. */ static int siba_register_addrspaces(device_t dev, struct siba_devinfo *di, struct bhnd_resource *r) { struct siba_core_id *cid; uint32_t addr; uint32_t size; int error; cid = &di->core_id; /* Register the device address space entries */ for (uint8_t i = 0; i < di->core_id.num_addrspace; i++) { uint32_t adm; u_int adm_offset; uint32_t bus_reserved; /* Determine the register offset */ adm_offset = siba_admatch_offset(i); if (adm_offset == 0) { device_printf(dev, "addrspace %hhu is unsupported", i); return (ENODEV); } /* Fetch the address match register value */ adm = bhnd_bus_read_4(r, adm_offset); /* Parse the value */ if ((error = siba_parse_admatch(adm, &addr, &size))) { device_printf(dev, "failed to decode address " " match register value 0x%x\n", adm); return (error); } /* If this is the device's core/enumeration addrespace, * reserve the Sonics configuration register blocks for the * use of our bus. */ bus_reserved = 0; if (i == SIBA_CORE_ADDRSPACE) bus_reserved = cid->num_cfg_blocks * SIBA_CFG_SIZE; /* Append the region info */ error = siba_append_dinfo_region(di, i, addr, size, bus_reserved); if (error) return (error); } return (0); } /** * Register all interrupt descriptors for @p dinfo. Must be called after * configuration blocks have been mapped. * * @param dev The siba bus device. * @param child The siba child device. * @param dinfo The device info instance on which to register all interrupt * descriptor entries. * @param r A resource mapping the enumeration table block for @p di. */ static int siba_register_interrupts(device_t dev, device_t child, struct siba_devinfo *dinfo, struct bhnd_resource *r) { uint32_t tpsflag; int error; /* Is backplane interrupt distribution enabled for this core? */ tpsflag = bhnd_bus_read_4(r, SB0_REG_ABS(SIBA_CFG0_TPSFLAG)); if ((tpsflag & SIBA_TPS_F0EN0) == 0) { dinfo->intr_en = false; return (0); } /* Have one interrupt */ dinfo->intr_en = true; dinfo->intr.flag = SIBA_REG_GET(tpsflag, TPS_NUM0); dinfo->intr.mapped = false; dinfo->intr.irq = 0; dinfo->intr.rid = -1; /* Map the interrupt */ error = BHND_BUS_MAP_INTR(dev, child, 0 /* single intr is always 0 */, &dinfo->intr.irq); if (error) { device_printf(dev, "failed mapping interrupt line for core %u: " "%d\n", dinfo->core_id.core_info.core_idx, error); return (error); } dinfo->intr.mapped = true; /* Update the resource list */ dinfo->intr.rid = resource_list_add_next(&dinfo->resources, SYS_RES_IRQ, dinfo->intr.irq, dinfo->intr.irq, 1); return (0); } /** * Map per-core configuration blocks for @p dinfo. * * @param dev The siba bus device. * @param dinfo The device info instance on which to map all per-core * configuration blocks. */ static int siba_map_cfg_resources(device_t dev, struct siba_devinfo *dinfo) { struct siba_addrspace *addrspace; rman_res_t r_start, r_count, r_end; uint8_t num_cfg; int rid; num_cfg = dinfo->core_id.num_cfg_blocks; if (num_cfg > SIBA_MAX_CFG) { device_printf(dev, "config block count %hhu out of range\n", num_cfg); return (ENXIO); } /* Fetch the core register address space */ addrspace = siba_find_addrspace(dinfo, BHND_PORT_DEVICE, 0, 0); if (addrspace == NULL) { device_printf(dev, "missing device registers\n"); return (ENXIO); } /* * Map the per-core configuration blocks */ for (uint8_t i = 0; i < num_cfg; i++) { /* Add to child's resource list */ r_start = addrspace->sa_base + SIBA_CFG_OFFSET(i); r_count = SIBA_CFG_SIZE; r_end = r_start + r_count - 1; rid = resource_list_add_next(&dinfo->resources, SYS_RES_MEMORY, r_start, r_end, r_count); /* Initialize config block descriptor */ dinfo->cfg[i] = ((struct siba_cfg_block) { .cb_base = r_start, .cb_size = SIBA_CFG_SIZE, .cb_rid = rid }); /* Map the config resource for bus-level access */ dinfo->cfg_rid[i] = SIBA_CFG_RID(dinfo, i); dinfo->cfg_res[i] = BHND_BUS_ALLOC_RESOURCE(dev, dev, SYS_RES_MEMORY, &dinfo->cfg_rid[i], r_start, r_end, r_count, RF_ACTIVE|RF_SHAREABLE); if (dinfo->cfg_res[i] == NULL) { device_printf(dev, "failed to allocate SIBA_CFG%hhu\n", i); return (ENXIO); } } return (0); } static device_t siba_add_child(device_t dev, u_int order, const char *name, int unit) { struct siba_devinfo *dinfo; device_t child; child = device_add_child_ordered(dev, order, name, unit); if (child == NULL) return (NULL); if ((dinfo = siba_alloc_dinfo(dev)) == NULL) { device_delete_child(dev, child); return (NULL); } device_set_ivars(child, dinfo); return (child); } static void siba_child_deleted(device_t dev, device_t child) { struct bhnd_softc *sc; struct siba_devinfo *dinfo; sc = device_get_softc(dev); /* Call required bhnd(4) implementation */ bhnd_generic_child_deleted(dev, child); /* Free siba device info */ if ((dinfo = device_get_ivars(child)) != NULL) siba_free_dinfo(dev, child, dinfo); device_set_ivars(child, NULL); } /** * Scan the core table and add all valid discovered cores to * the bus. * * @param dev The siba bus device. */ int siba_add_children(device_t dev) { const struct bhnd_chipid *chipid; struct siba_core_id *cores; struct bhnd_resource *r; device_t *children; int rid; int error; cores = NULL; r = NULL; chipid = BHND_BUS_GET_CHIPID(dev, dev); /* Allocate our temporary core and device table */ cores = malloc(sizeof(*cores) * chipid->ncores, M_BHND, M_WAITOK); children = malloc(sizeof(*children) * chipid->ncores, M_BHND, M_WAITOK | M_ZERO); /* * Add child devices for all discovered cores. * * On bridged devices, we'll exhaust our available register windows if * we map config blocks on unpopulated/disabled cores. To avoid this, we * defer mapping of the per-core siba(4) config blocks until all cores * have been enumerated and otherwise configured. */ for (u_int i = 0; i < chipid->ncores; i++) { struct siba_devinfo *dinfo; device_t child; uint32_t idhigh, idlow; rman_res_t r_count, r_end, r_start; /* Map the core's register block */ rid = 0; r_start = SIBA_CORE_ADDR(i); r_count = SIBA_CORE_SIZE; r_end = r_start + SIBA_CORE_SIZE - 1; r = bhnd_alloc_resource(dev, SYS_RES_MEMORY, &rid, r_start, r_end, r_count, RF_ACTIVE); if (r == NULL) { error = ENXIO; goto failed; } /* Read the core info */ idhigh = bhnd_bus_read_4(r, SB0_REG_ABS(SIBA_CFG0_IDHIGH)); idlow = bhnd_bus_read_4(r, SB0_REG_ABS(SIBA_CFG0_IDLOW)); cores[i] = siba_parse_core_id(idhigh, idlow, i, 0); /* Determine and set unit number */ for (u_int j = 0; j < i; j++) { struct bhnd_core_info *cur = &cores[i].core_info; struct bhnd_core_info *prev = &cores[j].core_info; if (prev->vendor == cur->vendor && prev->device == cur->device) cur->unit++; } /* Add the child device */ child = BUS_ADD_CHILD(dev, 0, NULL, -1); if (child == NULL) { error = ENXIO; goto failed; } children[i] = child; /* Initialize per-device bus info */ if ((dinfo = device_get_ivars(child)) == NULL) { error = ENXIO; goto failed; } if ((error = siba_init_dinfo(dev, dinfo, &cores[i]))) goto failed; /* Register the core's address space(s). */ if ((error = siba_register_addrspaces(dev, dinfo, r))) goto failed; /* Register the core's interrupts */ if ((error = siba_register_interrupts(dev, child, dinfo, r))) goto failed; /* Unmap the core's register block */ bhnd_release_resource(dev, SYS_RES_MEMORY, rid, r); r = NULL; /* If pins are floating or the hardware is otherwise * unpopulated, the device shouldn't be used. */ if (bhnd_is_hw_disabled(child)) device_disable(child); } /* Map all valid core's config register blocks and perform interrupt * assignment */ for (u_int i = 0; i < chipid->ncores; i++) { struct siba_devinfo *dinfo; device_t child; child = children[i]; /* Skip if core is disabled */ if (bhnd_is_hw_disabled(child)) continue; dinfo = device_get_ivars(child); /* Map the core's config blocks */ if ((error = siba_map_cfg_resources(dev, dinfo))) goto failed; /* Issue bus callback for fully initialized child. */ BHND_BUS_CHILD_ADDED(dev, child); } free(cores, M_BHND); free(children, M_BHND); return (0); failed: for (u_int i = 0; i < chipid->ncores; i++) { if (children[i] == NULL) continue; device_delete_child(dev, children[i]); } free(cores, M_BHND); free(children, M_BHND); if (r != NULL) bhnd_release_resource(dev, SYS_RES_MEMORY, rid, r); return (error); } static device_method_t siba_methods[] = { /* Device interface */ DEVMETHOD(device_probe, siba_probe), DEVMETHOD(device_attach, siba_attach), DEVMETHOD(device_detach, siba_detach), DEVMETHOD(device_resume, siba_resume), DEVMETHOD(device_suspend, siba_suspend), /* Bus interface */ DEVMETHOD(bus_add_child, siba_add_child), DEVMETHOD(bus_child_deleted, siba_child_deleted), DEVMETHOD(bus_read_ivar, siba_read_ivar), DEVMETHOD(bus_write_ivar, siba_write_ivar), DEVMETHOD(bus_get_resource_list, siba_get_resource_list), /* BHND interface */ DEVMETHOD(bhnd_bus_get_erom_class, siba_get_erom_class), DEVMETHOD(bhnd_bus_alloc_pmu, siba_alloc_pmu), DEVMETHOD(bhnd_bus_release_pmu, siba_release_pmu), DEVMETHOD(bhnd_bus_request_clock, siba_request_clock), DEVMETHOD(bhnd_bus_enable_clocks, siba_enable_clocks), DEVMETHOD(bhnd_bus_request_ext_rsrc, siba_request_ext_rsrc), DEVMETHOD(bhnd_bus_release_ext_rsrc, siba_release_ext_rsrc), DEVMETHOD(bhnd_bus_get_clock_freq, siba_get_clock_freq), DEVMETHOD(bhnd_bus_get_clock_latency, siba_get_clock_latency), DEVMETHOD(bhnd_bus_read_ioctl, siba_read_ioctl), DEVMETHOD(bhnd_bus_write_ioctl, siba_write_ioctl), DEVMETHOD(bhnd_bus_read_iost, siba_read_iost), DEVMETHOD(bhnd_bus_is_hw_suspended, siba_is_hw_suspended), DEVMETHOD(bhnd_bus_reset_hw, siba_reset_hw), DEVMETHOD(bhnd_bus_suspend_hw, siba_suspend_hw), DEVMETHOD(bhnd_bus_read_config, siba_read_config), DEVMETHOD(bhnd_bus_write_config, siba_write_config), DEVMETHOD(bhnd_bus_get_port_count, siba_get_port_count), DEVMETHOD(bhnd_bus_get_region_count, siba_get_region_count), DEVMETHOD(bhnd_bus_get_port_rid, siba_get_port_rid), DEVMETHOD(bhnd_bus_decode_port_rid, siba_decode_port_rid), DEVMETHOD(bhnd_bus_get_region_addr, siba_get_region_addr), DEVMETHOD(bhnd_bus_get_intr_count, siba_get_intr_count), DEVMETHOD(bhnd_bus_get_intr_ivec, siba_get_intr_ivec), DEVMETHOD_END }; DEFINE_CLASS_1(bhnd, siba_driver, siba_methods, sizeof(struct siba_softc), bhnd_driver); MODULE_VERSION(siba, 1); MODULE_DEPEND(siba, bhnd, 1, 1, 1); Index: head/sys/dev/bhnd/siba/siba_subr.c =================================================================== --- head/sys/dev/bhnd/siba/siba_subr.c (revision 326291) +++ head/sys/dev/bhnd/siba/siba_subr.c (revision 326292) @@ -1,706 +1,696 @@ /*- * Copyright (c) 2015-2016 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include "sibareg.h" #include "sibavar.h" /** * Map a siba(4) OCP vendor code to its corresponding JEDEC JEP-106 vendor * code. * * @param ocp_vendor An OCP vendor code. * @return The BHND_MFGID constant corresponding to @p ocp_vendor, or * BHND_MFGID_INVALID if the OCP vendor is unknown. */ uint16_t siba_get_bhnd_mfgid(uint16_t ocp_vendor) { switch (ocp_vendor) { case OCP_VENDOR_BCM: return (BHND_MFGID_BCM); default: return (BHND_MFGID_INVALID); } } /** * Parse the SIBA_IDH_* fields from the per-core identification * registers, returning a siba_core_id representation. * * @param idhigh The SIBA_R0_IDHIGH register. * @param idlow The SIBA_R0_IDLOW register. * @param core_id The core id (index) to include in the result. * @param unit The unit number to include in the result. */ struct siba_core_id siba_parse_core_id(uint32_t idhigh, uint32_t idlow, u_int core_idx, int unit) { uint16_t ocp_vendor; uint8_t sonics_rev; uint8_t num_addrspace; uint8_t num_cfg; ocp_vendor = SIBA_REG_GET(idhigh, IDH_VENDOR); sonics_rev = SIBA_REG_GET(idlow, IDL_SBREV); num_addrspace = SIBA_REG_GET(idlow, IDL_NRADDR) + 1 /* + enum block */; /* Determine the number of sonics config register blocks */ num_cfg = SIBA_CFG_NUM_2_2; if (sonics_rev >= SIBA_IDL_SBREV_2_3) num_cfg = SIBA_CFG_NUM_2_3; return (struct siba_core_id) { .core_info = { .vendor = siba_get_bhnd_mfgid(ocp_vendor), .device = SIBA_REG_GET(idhigh, IDH_DEVICE), .hwrev = SIBA_IDH_CORE_REV(idhigh), .core_idx = core_idx, .unit = unit }, .sonics_vendor = ocp_vendor, .sonics_rev = sonics_rev, .num_addrspace = num_addrspace, .num_cfg_blocks = num_cfg }; } /** * Allocate and return a new empty device info structure. * * @param bus The requesting bus device. * * @retval NULL if allocation failed. */ struct siba_devinfo * siba_alloc_dinfo(device_t bus) { struct siba_devinfo *dinfo; dinfo = malloc(sizeof(struct siba_devinfo), M_BHND, M_NOWAIT|M_ZERO); if (dinfo == NULL) return NULL; for (u_int i = 0; i < nitems(dinfo->cfg); i++) { dinfo->cfg[i] = ((struct siba_cfg_block){ .cb_base = 0, .cb_size = 0, .cb_rid = -1, }); dinfo->cfg_res[i] = NULL; dinfo->cfg_rid[i] = -1; } resource_list_init(&dinfo->resources); dinfo->pmu_state = SIBA_PMU_NONE; dinfo->intr_en = false; return dinfo; } /** * Initialize a device info structure previously allocated via * siba_alloc_dinfo, copying the provided core id. * * @param dev The requesting bus device. * @param dinfo The device info instance. * @param core Device core info. * * @retval 0 success * @retval non-zero initialization failed. */ int siba_init_dinfo(device_t dev, struct siba_devinfo *dinfo, const struct siba_core_id *core_id) { dinfo->core_id = *core_id; return (0); } /** * Map an addrspace index to its corresponding bhnd(4) BHND_PORT_DEVICE port * number. * * @param addrspace Address space index. */ u_int siba_addrspace_device_port(u_int addrspace) { /* The first addrspace is always mapped to device0; the remainder * are mapped to device1 */ if (addrspace == 0) return (0); else return (1); } /** * Map an addrspace index to its corresponding bhnd(4) BHND_PORT_DEVICE port * region number. * * @param addrspace Address space index. */ u_int siba_addrspace_device_region(u_int addrspace) { /* The first addrspace is always mapped to device0.0; the remainder * are mapped to device1.0 + (n - 1) */ if (addrspace == 0) return (0); else return (addrspace - 1); } /** * Map an config block index to its corresponding bhnd(4) BHND_PORT_AGENT port * number. * * @param cfg Config block index. */ u_int siba_cfg_agent_port(u_int cfg) { /* Always agent0 */ return (0); } /** * Map an config block index to its corresponding bhnd(4) BHND_PORT_AGENT port * region number. * * @param cfg Config block index. */ u_int siba_cfg_agent_region(u_int cfg) { /* Always agent0. */ return (cfg); } /** * Return the number of bhnd(4) ports to advertise for the given * @p core_id and @p port_type. * * Refer to the siba_addrspace_index() and siba_cfg_index() functions for * information on siba's mapping of bhnd(4) port and region identifiers. * * @param core_id The siba core info. * @param port_type The bhnd(4) port type. */ u_int siba_port_count(struct siba_core_id *core_id, bhnd_port_type port_type) { switch (port_type) { case BHND_PORT_DEVICE: /* 0, 1, or 2 ports */ return (min(core_id->num_addrspace, 2)); case BHND_PORT_AGENT: /* One agent port maps all configuration blocks */ if (core_id->num_cfg_blocks > 0) return (1); /* Do not advertise an agent port if there are no configuration * register blocks */ return (0); default: return (0); } } /** * Return true if @p port of @p port_type is defined by @p core_id, false * otherwise. * * @param core_id The siba core info. * @param port_type The bhnd(4) port type. * @param port The bhnd(4) port number. */ bool siba_is_port_valid(struct siba_core_id *core_id, bhnd_port_type port_type, u_int port) { /* Verify the index against the port count */ if (siba_port_count(core_id, port_type) <= port) return (false); return (true); } /** * Return the number of bhnd(4) regions to advertise for @p core_id on the * @p port of @p port_type. * * @param core_id The siba core info. * @param port_type The bhnd(4) port type. */ u_int siba_port_region_count(struct siba_core_id *core_id, bhnd_port_type port_type, u_int port) { /* The port must exist */ if (!siba_is_port_valid(core_id, port_type, port)) return (0); switch (port_type) { case BHND_PORT_DEVICE: /* The first address space, if any, is mapped to device0.0 */ if (port == 0) return (min(core_id->num_addrspace, 1)); /* All remaining address spaces are mapped to device0.(n - 1) */ if (port == 1 && core_id->num_addrspace >= 2) return (core_id->num_addrspace - 1); break; case BHND_PORT_AGENT: /* All config blocks are mapped to a single port */ if (port == 0) return (core_id->num_cfg_blocks); break; default: break; } /* Validated above */ panic("siba_is_port_valid() returned true for unknown %s.%u port", bhnd_port_type_name(port_type), port); } /** * Map a bhnd(4) type/port/region triplet to its associated config block index, * if any. * * We map config registers to port/region identifiers as follows: * * [port].[region] [cfg register block] * agent0.0 0 * agent0.1 1 * * @param num_addrspace The number of available siba address spaces. * @param port_type The bhnd(4) port type. * @param port The bhnd(4) port number. * @param region The bhnd(4) port region. * @param addridx On success, the corresponding addrspace index. * * @retval 0 success * @retval ENOENT if the given type/port/region cannot be mapped to a * siba config register block. */ int siba_cfg_index(struct siba_core_id *core_id, bhnd_port_type port_type, u_int port, u_int region, u_int *cfgidx) { /* Config blocks are mapped to agent ports */ if (port_type != BHND_PORT_AGENT) return (ENOENT); /* Port must be valid */ if (!siba_is_port_valid(core_id, port_type, port)) return (ENOENT); if (region >= core_id->num_cfg_blocks) return (ENOENT); if (region >= SIBA_MAX_CFG) return (ENOENT); /* Found */ *cfgidx = region; return (0); } /** * Map an bhnd(4) type/port/region triplet to its associated config block * entry, if any. * * The only supported port type is BHND_PORT_DEVICE. * * @param dinfo The device info to search for a matching address space. * @param type The bhnd(4) port type. * @param port The bhnd(4) port number. * @param region The bhnd(4) port region. */ struct siba_cfg_block * siba_find_cfg_block(struct siba_devinfo *dinfo, bhnd_port_type type, u_int port, u_int region) { u_int cfgidx; int error; /* Map to addrspace index */ error = siba_cfg_index(&dinfo->core_id, type, port, region, &cfgidx); if (error) return (NULL); /* Found */ return (&dinfo->cfg[cfgidx]); } /** * Map a bhnd(4) type/port/region triplet to its associated address space * index, if any. * * For compatibility with bcma(4), we map address spaces to port/region * identifiers as follows: * * [port] [addrspace] * device0.0 0 * device1.0 1 * device1.1 2 * device1.2 3 * * @param core_id The siba core info. * @param port_type The bhnd(4) port type. * @param port The bhnd(4) port number. * @param region The bhnd(4) port region. * @param addridx On success, the corresponding addrspace index. * * @retval 0 success * @retval ENOENT if the given type/port/region cannot be mapped to a * siba address space. */ int siba_addrspace_index(struct siba_core_id *core_id, bhnd_port_type port_type, u_int port, u_int region, u_int *addridx) { u_int idx; /* Address spaces are always device ports */ if (port_type != BHND_PORT_DEVICE) return (ENOENT); /* Port must be valid */ if (!siba_is_port_valid(core_id, port_type, port)) return (ENOENT); if (port == 0) idx = region; else if (port == 1) idx = region + 1; else return (ENOENT); if (idx >= core_id->num_addrspace) return (ENOENT); /* Found */ *addridx = idx; return (0); } /** * Map an bhnd(4) type/port/region triplet to its associated address space * entry, if any. * * The only supported port type is BHND_PORT_DEVICE. * * @param dinfo The device info to search for a matching address space. * @param type The bhnd(4) port type. * @param port The bhnd(4) port number. * @param region The bhnd(4) port region. */ struct siba_addrspace * siba_find_addrspace(struct siba_devinfo *dinfo, bhnd_port_type type, u_int port, u_int region) { u_int addridx; int error; /* Map to addrspace index */ error = siba_addrspace_index(&dinfo->core_id, type, port, region, &addridx); if (error) return (NULL); /* Found */ if (addridx >= SIBA_MAX_ADDRSPACE) return (NULL); return (&dinfo->addrspace[addridx]); } /** * Append an address space entry to @p dinfo. * * @param dinfo The device info entry to update. * @param addridx The address space index. * @param base The mapping's base address. * @param size The mapping size. * @param bus_reserved Number of bytes to reserve in @p size for bus use * when registering the resource list entry. This is used to reserve bus * access to the core's SIBA_CFG* register blocks. * * @retval 0 success * @retval non-zero An error occurred appending the entry. */ int siba_append_dinfo_region(struct siba_devinfo *dinfo, uint8_t addridx, uint32_t base, uint32_t size, uint32_t bus_reserved) { struct siba_addrspace *sa; rman_res_t r_size; /* Verify that base + size will not overflow */ if (size > 0 && UINT32_MAX - (size - 1) < base) return (ERANGE); /* Verify that size - bus_reserved will not underflow */ if (size < bus_reserved) return (ERANGE); /* Must not be 0-length */ if (size == 0) return (EINVAL); /* Must not exceed addrspace array size */ if (addridx >= nitems(dinfo->addrspace)) return (EINVAL); /* Initialize new addrspace entry */ sa = &dinfo->addrspace[addridx]; sa->sa_base = base; sa->sa_size = size; sa->sa_bus_reserved = bus_reserved; /* Populate the resource list */ r_size = size - bus_reserved; sa->sa_rid = resource_list_add_next(&dinfo->resources, SYS_RES_MEMORY, base, base + (r_size - 1), r_size); return (0); } /** * Deallocate the given device info structure and any associated resources. * * @param dev The requesting bus device. * @param child The siba child device. * @param dinfo Device info associated with @p child to be deallocated. */ void siba_free_dinfo(device_t dev, device_t child, struct siba_devinfo *dinfo) { resource_list_free(&dinfo->resources); /* Free all mapped configuration blocks */ for (u_int i = 0; i < nitems(dinfo->cfg); i++) { if (dinfo->cfg_res[i] == NULL) continue; bhnd_release_resource(dev, SYS_RES_MEMORY, dinfo->cfg_rid[i], dinfo->cfg_res[i]); dinfo->cfg_res[i] = NULL; dinfo->cfg_rid[i] = -1; } /* Unmap the core's interrupt */ if (dinfo->intr_en && dinfo->intr.mapped) { BHND_BUS_UNMAP_INTR(dev, child, dinfo->intr.irq); dinfo->intr.mapped = false; } free(dinfo, M_BHND); } /** * Return the core-enumeration-relative offset for the @p addrspace * SIBA_R0_ADMATCH* register. * * @param addrspace The address space index. * * @retval non-zero success * @retval 0 the given @p addrspace index is not supported. */ u_int siba_admatch_offset(uint8_t addrspace) { switch (addrspace) { case 0: return SB0_REG_ABS(SIBA_CFG0_ADMATCH0); case 1: return SB0_REG_ABS(SIBA_CFG0_ADMATCH1); case 2: return SB0_REG_ABS(SIBA_CFG0_ADMATCH2); case 3: return SB0_REG_ABS(SIBA_CFG0_ADMATCH3); default: return (0); } } /** * Parse a SIBA_R0_ADMATCH* register. * * @param addrspace The address space index. * @param am The address match register value to be parsed. * @param[out] addr The parsed address. * @param[out] size The parsed size. * * @retval 0 success * @retval non-zero a parse error occurred. */ int siba_parse_admatch(uint32_t am, uint32_t *addr, uint32_t *size) { u_int am_type; /* Negative encoding is not supported. This is not used on any * currently known devices*/ if (am & SIBA_AM_ADNEG) return (EINVAL); /* Extract the base address and size */ am_type = SIBA_REG_GET(am, AM_TYPE); switch (am_type) { case 0: *addr = am & SIBA_AM_BASE0_MASK; *size = 1 << (SIBA_REG_GET(am, AM_ADINT0) + 1); break; case 1: *addr = am & SIBA_AM_BASE1_MASK; *size = 1 << (SIBA_REG_GET(am, AM_ADINT1) + 1); break; case 2: *addr = am & SIBA_AM_BASE2_MASK; *size = 1 << (SIBA_REG_GET(am, AM_ADINT2) + 1); break; default: return (EINVAL); } return (0); } /** - * Write @p value to @p dev's CFG0 target/initiator state register and - * wait for completion. + * Write @p value to @p dev's CFG0 target/initiator state register, performing + * required read-back and waiting for completion. * * @param dev The siba(4) child device. - * @param reg The state register to write (e.g. SIBA_CFG0_TMSTATELOW, - * SIBA_CFG0_IMSTATE) + * @param reg The CFG0 state register to write (e.g. SIBA_CFG0_TMSTATELOW, + * SIBA_CFG0_IMSTATE) * @param value The value to write to @p reg. * @param mask The mask of bits to be included from @p value. - * - * @retval 0 success. - * @retval ENODEV if SIBA_CFG0 is not mapped by @p dinfo. - * @retval ETIMEDOUT if a timeout occurs prior to SIBA_TMH_BUSY clearing. */ -int +void siba_write_target_state(device_t dev, struct siba_devinfo *dinfo, bus_size_t reg, uint32_t value, uint32_t mask) { struct bhnd_resource *r; uint32_t rval; - /* Must have a CFG0 block */ - if ((r = dinfo->cfg_res[0]) == NULL) - return (ENODEV); + r = dinfo->cfg_res[0]; - /* Verify the register offset falls within CFG register block */ - if (reg > SIBA_CFG_SIZE-4) - return (EFAULT); + KASSERT(r != NULL, ("%s missing CFG0 mapping", + device_get_nameunit(dev))); + KASSERT(reg <= SIBA_CFG_SIZE-4, ("%s invalid CFG0 register offset %#jx", + device_get_nameunit(dev), (uintmax_t)reg)); - for (int i = 0; i < 300; i += 10) { - rval = bhnd_bus_read_4(r, reg); - rval &= ~mask; - rval |= (value & mask); + rval = bhnd_bus_read_4(r, reg); + rval &= ~mask; + rval |= (value & mask); - bhnd_bus_write_4(r, reg, rval); - bhnd_bus_read_4(r, reg); /* read-back */ - DELAY(1); - - /* If the write has completed, wait for target busy state - * to clear */ - rval = bhnd_bus_read_4(r, reg); - if ((rval & mask) == (value & mask)) - return (siba_wait_target_busy(dev, dinfo, 100000)); - - DELAY(10); - } - - return (ETIMEDOUT); + bhnd_bus_write_4(r, reg, rval); + bhnd_bus_read_4(r, reg); /* read-back */ + DELAY(1); } /** - * Spin for up to @p usec waiting for SIBA_TMH_BUSY to clear in - * @p dev's SIBA_CFG0_TMSTATEHIGH register. + * Spin for up to @p usec waiting for @p dev's CFG0 target/initiator state + * register value to be equal to @p value after applying @p mask bits to both + * values. * * @param dev The siba(4) child device to wait on. * @param dinfo The @p dev's device info + * @param reg The state register to read (e.g. SIBA_CFG0_TMSTATEHIGH, + * SIBA_CFG0_IMSTATE) + * @param value The value against which @p reg will be compared. + * @param mask The mask to be applied when comparing @p value with @p reg. + * @param usec The maximum number of microseconds to wait for completion. * * @retval 0 if SIBA_TMH_BUSY is cleared prior to the @p usec timeout. * @retval ENODEV if SIBA_CFG0 is not mapped by @p dinfo. - * @retval ETIMEDOUT if a timeout occurs prior to SIBA_TMH_BUSY clearing. + * @retval ETIMEDOUT if a timeout occurs. */ int -siba_wait_target_busy(device_t dev, struct siba_devinfo *dinfo, int usec) +siba_wait_target_state(device_t dev, struct siba_devinfo *dinfo, bus_size_t reg, + uint32_t value, uint32_t mask, u_int usec) { struct bhnd_resource *r; - uint32_t ts_high; + uint32_t rval; if ((r = dinfo->cfg_res[0]) == NULL) return (ENODEV); + value &= mask; for (int i = 0; i < usec; i += 10) { - ts_high = bhnd_bus_read_4(r, SIBA_CFG0_TMSTATEHIGH); - if (!(ts_high & SIBA_TMH_BUSY)) + rval = bhnd_bus_read_4(r, reg); + if ((rval & mask) == value) return (0); DELAY(10); } - device_printf(dev, "SIBA_TMH_BUSY wait timeout\n"); return (ETIMEDOUT); } Index: head/sys/dev/bhnd/siba/sibavar.h =================================================================== --- head/sys/dev/bhnd/siba/sibavar.h (revision 326291) +++ head/sys/dev/bhnd/siba/sibavar.h (revision 326292) @@ -1,233 +1,234 @@ /*- * Copyright (c) 2015-2016 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. * * $FreeBSD$ */ #ifndef _SIBA_SIBAVAR_H_ #define _SIBA_SIBAVAR_H_ #include #include #include #include #include #include #include #include "siba.h" /* * Internal definitions shared by siba(4) driver implementations. */ struct siba_addrspace; struct siba_cfg_block; struct siba_devinfo; struct siba_core_id; struct siba_softc; int siba_probe(device_t dev); int siba_attach(device_t dev); int siba_detach(device_t dev); int siba_resume(device_t dev); int siba_suspend(device_t dev); u_int siba_get_intr_count(device_t dev, device_t child); int siba_get_intr_ivec(device_t dev, device_t child, u_int intr, u_int *ivec); uint16_t siba_get_bhnd_mfgid(uint16_t ocp_vendor); struct siba_core_id siba_parse_core_id(uint32_t idhigh, uint32_t idlow, u_int core_idx, int unit); int siba_add_children(device_t bus); struct siba_devinfo *siba_alloc_dinfo(device_t dev); int siba_init_dinfo(device_t dev, struct siba_devinfo *dinfo, const struct siba_core_id *core_id); void siba_free_dinfo(device_t dev, device_t child, struct siba_devinfo *dinfo); u_int siba_port_count(struct siba_core_id *core_id, bhnd_port_type port_type); bool siba_is_port_valid(struct siba_core_id *core_id, bhnd_port_type port_type, u_int port); u_int siba_port_region_count( struct siba_core_id *core_id, bhnd_port_type port_type, u_int port); int siba_cfg_index(struct siba_core_id *core_id, bhnd_port_type type, u_int port, u_int region, u_int *cfgidx); int siba_addrspace_index(struct siba_core_id *core_id, bhnd_port_type type, u_int port, u_int region, u_int *addridx); u_int siba_addrspace_device_port(u_int addrspace); u_int siba_addrspace_device_region(u_int addrspace); u_int siba_cfg_agent_port(u_int cfg); u_int siba_cfg_agent_region(u_int cfg); struct siba_addrspace *siba_find_addrspace(struct siba_devinfo *dinfo, bhnd_port_type type, u_int port, u_int region); struct siba_cfg_block *siba_find_cfg_block(struct siba_devinfo *dinfo, bhnd_port_type type, u_int port, u_int region); int siba_append_dinfo_region(struct siba_devinfo *dinfo, uint8_t sid, uint32_t base, uint32_t size, uint32_t bus_reserved); u_int siba_admatch_offset(uint8_t addrspace); int siba_parse_admatch(uint32_t am, uint32_t *addr, uint32_t *size); -int siba_write_target_state(device_t dev, +void siba_write_target_state(device_t dev, struct siba_devinfo *dinfo, bus_size_t reg, uint32_t value, uint32_t mask); -int siba_wait_target_busy(device_t child, - struct siba_devinfo *dinfo, int usec); +int siba_wait_target_state(device_t dev, + struct siba_devinfo *dinfo, bus_size_t reg, + uint32_t value, uint32_t mask, u_int usec); /* Sonics configuration register blocks */ #define SIBA_CFG_NUM_2_2 1 /**< sonics <= 2.2 maps SIBA_CFG0. */ #define SIBA_CFG_NUM_2_3 2 /**< sonics <= 2.3 maps SIBA_CFG0 and SIBA_CFG1 */ #define SIBA_MAX_CFG SIBA_CFG_NUM_2_3 /**< maximum number of supported config register blocks */ #define SIBA_CFG_RID_BASE 100 /**< base resource ID for SIBA_CFG* register allocations */ #define SIBA_CFG_RID(_dinfo, _cfg) \ (SIBA_CFG_RID_BASE + (_cfg) + \ (_dinfo->core_id.core_info.core_idx * SIBA_MAX_CFG)) /* Sonics/OCP address space mappings */ #define SIBA_CORE_ADDRSPACE 0 /**< Address space mapping the primary device registers */ #define SIBA_MAX_ADDRSPACE 4 /**< Maximum number of Sonics/OCP * address space mappings for a * single core. */ /* bhnd(4) (port,region) representation of siba address space mappings */ #define SIBA_MAX_PORT 2 /**< maximum number of advertised * bhnd(4) ports */ /** siba(4) address space descriptor */ struct siba_addrspace { uint32_t sa_base; /**< base address */ uint32_t sa_size; /**< size */ int sa_rid; /**< bus resource id */ uint32_t sa_bus_reserved;/**< number of bytes at high end of * address space reserved for the bus */ }; /** siba(4) config block descriptor */ struct siba_cfg_block { uint32_t cb_base; /**< base address */ uint32_t cb_size; /**< size */ int cb_rid; /**< bus resource id */ }; /** siba(4) backplane interrupt flag descriptor */ struct siba_intr { u_int flag; /**< backplane flag # */ bool mapped; /**< if an irq has been mapped */ int rid; /**< bus resource id, or -1 if unassigned */ rman_res_t irq; /**< the mapped bus irq, if any */ }; /** * siba(4) per-core identification info. */ struct siba_core_id { struct bhnd_core_info core_info; /**< standard bhnd(4) core info */ uint16_t sonics_vendor; /**< OCP vendor identifier used to generate * the JEDEC-106 bhnd(4) vendor identifier. */ uint8_t sonics_rev; /**< sonics backplane revision code */ uint8_t num_addrspace; /**< number of address ranges mapped to this core. */ uint8_t num_cfg_blocks; /**< number of Sonics configuration register blocks mapped to the core's enumeration space */ }; /** * siba(4) per-core PMU allocation state. */ typedef enum { SIBA_PMU_NONE, /**< If the core has not yet allocated PMU state */ SIBA_PMU_BHND, /**< If standard bhnd(4) PMU support should be used */ SIBA_PMU_PWRCTL, /**< If legacy PWRCTL PMU support should be used */ } siba_pmu_state; /** * siba(4) per-device info */ struct siba_devinfo { struct resource_list resources; /**< per-core memory regions. */ struct siba_core_id core_id; /**< core identification info */ struct siba_addrspace addrspace[SIBA_MAX_ADDRSPACE]; /**< memory map descriptors */ struct siba_cfg_block cfg[SIBA_MAX_CFG]; /**< config block descriptors */ struct siba_intr intr; /**< interrupt flag descriptor, if any */ bool intr_en; /**< if true, core has an assigned interrupt flag */ struct bhnd_resource *cfg_res[SIBA_MAX_CFG]; /**< bus-mapped config block registers */ int cfg_rid[SIBA_MAX_CFG]; /**< bus-mapped config block resource IDs */ siba_pmu_state pmu_state; /**< per-core PMU state */ union { void *bhnd_info; /**< if SIBA_PMU_BHND, bhnd(4)-managed per-core PMU info. */ device_t pwrctl; /**< if SIBA_PMU_PWRCTL, legacy PWRCTL provider. */ } pmu; }; /** siba(4) per-instance state */ struct siba_softc { struct bhnd_softc bhnd_sc; /**< bhnd state */ device_t dev; /**< siba device */ struct mtx mtx; /**< state mutex */ }; #define SIBA_LOCK_INIT(sc) \ mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), NULL, MTX_DEF) #define SIBA_LOCK(sc) mtx_lock(&(sc)->mtx) #define SIBA_UNLOCK(sc) mtx_unlock(&(sc)->mtx) #define SIBA_LOCK_ASSERT(sc, what) mtx_assert(&(sc)->mtx, what) #define SIBA_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx) #endif /* _SIBA_SIBAVAR_H_ */