Index: head/share/man/man4/Makefile =================================================================== --- head/share/man/man4/Makefile (revision 326290) +++ head/share/man/man4/Makefile (revision 326291) @@ -1,985 +1,988 @@ # @(#)Makefile 8.1 (Berkeley) 6/18/93 # $FreeBSD$ .include PACKAGE=runtime-manuals MAN= aac.4 \ aacraid.4 \ acpi.4 \ ${_acpi_asus.4} \ ${_acpi_asus_wmi.4} \ ${_acpi_dock.4} \ ${_acpi_fujitsu.4} \ ${_acpi_hp.4} \ ${_acpi_ibm.4} \ ${_acpi_panasonic.4} \ ${_acpi_rapidstart.4} \ ${_acpi_sony.4} \ acpi_thermal.4 \ ${_acpi_toshiba.4} \ acpi_video.4 \ ${_acpi_wmi.4} \ ada.4 \ adm6996fc.4 \ adv.4 \ adw.4 \ ae.4 \ ${_aesni.4} \ age.4 \ agp.4 \ aha.4 \ ahc.4 \ ahci.4 \ ahd.4 \ ${_aibs.4} \ aio.4 \ alc.4 \ ale.4 \ alpm.4 \ altera_atse.4 \ altera_avgen.4 \ altera_jtag_uart.4 \ altera_sdcard.4 \ altq.4 \ amdpm.4 \ ${_amdsbwd.4} \ ${_amdsmb.4} \ ${_amdsmn.4} \ ${_amdtemp.4} \ ${_bxe.4} \ amr.4 \ an.4 \ ${_aout.4} \ ${_apic.4} \ arcmsr.4 \ ${_armv8crypto.4} \ ${_asmc.4} \ ata.4 \ ath.4 \ ath_ahb.4 \ ath_hal.4 \ ath_pci.4 \ atkbd.4 \ atkbdc.4 \ atp.4 \ ${_atf_test_case.4} \ ${_atrtc.4} \ ${_attimer.4} \ audit.4 \ auditpipe.4 \ aue.4 \ axe.4 \ axge.4 \ bce.4 \ bcma.4 \ bfe.4 \ bge.4 \ ${_bhyve.4} \ bhnd.4 \ + bhnd_chipc.4 \ + bhnd_pmu.4 \ bhndb.4 \ + bhndb_pci.4 \ bktr.4 \ blackhole.4 \ bnxt.4 \ bpf.4 \ bridge.4 \ bt.4 \ bwi.4 \ bwn.4 \ ${_bytgpio.4} \ capsicum.4 \ cardbus.4 \ carp.4 \ cas.4 \ cc_cdg.4 \ cc_chd.4 \ cc_cubic.4 \ cc_dctcp.4 \ cc_hd.4 \ cc_htcp.4 \ cc_newreno.4 \ cc_vegas.4 \ ${_ccd.4} \ ccr.4 \ cd.4 \ cdce.4 \ cfi.4 \ cfumass.4 \ ch.4 \ chromebook_platform.4 \ ciss.4 \ cloudabi.4 \ cm.4 \ cmx.4 \ ${_coretemp.4} \ ${_cpuctl.4} \ cpufreq.4 \ crypto.4 \ ctl.4 \ cue.4 \ cxgb.4 \ cxgbe.4 \ cxgbev.4 \ cy.4 \ cyapa.4 \ da.4 \ dc.4 \ dcons.4 \ dcons_crom.4 \ ddb.4 \ de.4 \ devctl.4 \ disc.4 \ divert.4 \ ${_dpms.4} \ dpt.4 \ ds1307.4 \ ds3231.4 \ ${_dtrace_provs} \ dummynet.4 \ ed.4 \ edsc.4 \ ehci.4 \ em.4 \ ena.4 \ enc.4 \ epair.4 \ esp.4 \ est.4 \ et.4 \ etherswitch.4 \ eventtimers.4 \ exca.4 \ e6060sw.4 \ fd.4 \ fdc.4 \ fdt.4 \ fdtbus.4 \ ffclock.4 \ filemon.4 \ firewire.4 \ fpa.4 \ full.4 \ fwe.4 \ fwip.4 \ fwohci.4 \ fxp.4 \ gbde.4 \ gdb.4 \ gem.4 \ geom.4 \ geom_fox.4 \ geom_linux_lvm.4 \ geom_map.4 \ geom_uzip.4 \ gif.4 \ gpio.4 \ gpioiic.4 \ gpioled.4 \ gre.4 \ h_ertt.4 \ hifn.4 \ hme.4 \ hpet.4 \ ${_hpt27xx.4} \ ${_hptiop.4} \ ${_hptmv.4} \ ${_hptnr.4} \ ${_hptrr.4} \ ${_hv_kvp.4} \ ${_hv_netvsc.4} \ ${_hv_storvsc.4} \ ${_hv_utils.4} \ ${_hv_vmbus.4} \ ${_hv_vss.4} \ hwpmc.4 \ ichsmb.4 \ ${_ichwd.4} \ icmp.4 \ icmp6.4 \ ida.4 \ if_ipsec.4 \ ifmib.4 \ ig4.4 \ igmp.4 \ iic.4 \ iicbb.4 \ iicbus.4 \ iicsmb.4 \ iir.4 \ inet.4 \ inet6.4 \ intpm.4 \ intro.4 \ ${_io.4} \ ${_ioat.4} \ ip.4 \ ip6.4 \ ipfirewall.4 \ ipheth.4 \ ${_ipmi.4} \ ips.4 \ ipsec.4 \ ipw.4 \ ipwfw.4 \ isci.4 \ isl.4 \ ismt.4 \ isp.4 \ ispfw.4 \ iwi.4 \ iwifw.4 \ iwm.4 \ iwmfw.4 \ iwn.4 \ iwnfw.4 \ ixgb.4 \ ixgbe.4 \ ixl.4 \ ixlv.4 \ jedec_ts.4 \ jme.4 \ joy.4 \ kbdmux.4 \ keyboard.4 \ kld.4 \ ksyms.4 \ ksz8995ma.4 \ ktr.4 \ kue.4 \ lagg.4 \ le.4 \ led.4 \ lge.4 \ ${_linux.4} \ liquidio.4 \ lm75.4 \ lmc.4 \ lo.4 \ lp.4 \ lpbb.4 \ lpt.4 \ mac.4 \ mac_biba.4 \ mac_bsdextended.4 \ mac_ifoff.4 \ mac_lomac.4 \ mac_mls.4 \ mac_none.4 \ mac_partition.4 \ mac_portacl.4 \ mac_seeotheruids.4 \ mac_stub.4 \ mac_test.4 \ malo.4 \ md.4 \ mdio.4 \ me.4 \ mem.4 \ meteor.4 \ mfi.4 \ miibus.4 \ mk48txx.4 \ mld.4 \ mlx.4 \ mlx4en.4 \ mlx5en.4 \ mly.4 \ mmc.4 \ mmcsd.4 \ mn.4 \ mod_cc.4 \ mos.4 \ mouse.4 \ mpr.4 \ mps.4 \ mpt.4 \ mrsas.4 \ msk.4 \ mtio.4 \ multicast.4 \ mvs.4 \ mwl.4 \ mwlfw.4 \ mxge.4 \ my.4 \ nand.4 \ nandsim.4 \ ncr.4 \ ncv.4 \ ${_ndis.4} \ net80211.4 \ netfpga10g_nf10bmac.4 \ netgraph.4 \ netintro.4 \ netmap.4 \ ${_nfe.4} \ ${_nfsmb.4} \ ng_async.4 \ ngatmbase.4 \ ng_atmllc.4 \ ng_bpf.4 \ ng_bridge.4 \ ng_bt3c.4 \ ng_btsocket.4 \ ng_car.4 \ ng_ccatm.4 \ ng_cisco.4 \ ng_deflate.4 \ ng_device.4 \ nge.4 \ ng_echo.4 \ ng_eiface.4 \ ng_etf.4 \ ng_ether.4 \ ng_ether_echo.4 \ ng_frame_relay.4 \ ng_gif.4 \ ng_gif_demux.4 \ ng_h4.4 \ ng_hci.4 \ ng_hole.4 \ ng_hub.4 \ ng_iface.4 \ ng_ipfw.4 \ ng_ip_input.4 \ ng_ksocket.4 \ ng_l2cap.4 \ ng_l2tp.4 \ ng_lmi.4 \ ng_mppc.4 \ ng_nat.4 \ ng_netflow.4 \ ng_one2many.4 \ ng_patch.4 \ ng_ppp.4 \ ng_pppoe.4 \ ng_pptpgre.4 \ ng_pred1.4 \ ng_rfc1490.4 \ ng_socket.4 \ ng_source.4 \ ng_split.4 \ ng_sppp.4 \ ng_sscfu.4 \ ng_sscop.4 \ ng_tag.4 \ ng_tcpmss.4 \ ng_tee.4 \ ng_tty.4 \ ng_ubt.4 \ ng_UI.4 \ ng_uni.4 \ ng_vjc.4 \ ng_vlan.4 \ nmdm.4 \ nsp.4 \ ${_ntb.4} \ ${_ntb_hw_intel.4} \ ${_ntb_hw_plx.4} \ ${_ntb_transport.4} \ ${_if_ntb.4} \ null.4 \ numa.4 \ ${_nvd.4} \ ${_nvme.4} \ ${_nvram.4} \ ${_nvram2env.4} \ ${_nxge.4} \ oce.4 \ ohci.4 \ orm.4 \ ow.4 \ ow_temp.4 \ owc.4 \ ${_padlock.4} \ pass.4 \ pccard.4 \ pccbb.4 \ pcf.4 \ pci.4 \ pcib.4 \ pcic.4 \ pcm.4 \ pcn.4 \ ${_pf.4} \ ${_pflog.4} \ ${_pfsync.4} \ pim.4 \ pms.4 \ polling.4 \ ppbus.4 \ ppc.4 \ ppi.4 \ procdesc.4 \ proto.4 \ psm.4 \ pst.4 \ pt.4 \ pts.4 \ pty.4 \ puc.4 \ ${_qlxge.4} \ ${_qlxgb.4} \ ${_qlxgbe.4} \ ${_qlnxe.4} \ ral.4 \ random.4 \ rc.4 \ rctl.4 \ re.4 \ rgephy.4 \ rights.4 \ rl.4 \ rndtest.4 \ route.4 \ rp.4 \ rtwn.4 \ rtwnfw.4 \ rtwn_pci.4 \ rue.4 \ sa.4 \ safe.4 \ sbp.4 \ sbp_targ.4 \ scc.4 \ sched_4bsd.4 \ sched_ule.4 \ screen.4 \ scsi.4 \ sctp.4 \ sdhci.4 \ sem.4 \ send.4 \ ses.4 \ sf.4 \ ${_sfxge.4} \ sge.4 \ siba.4 \ siftr.4 \ siis.4 \ simplebus.4 \ sio.4 \ sis.4 \ sk.4 \ smb.4 \ smbus.4 \ smp.4 \ smsc.4 \ sn.4 \ snd_ad1816.4 \ snd_als4000.4 \ snd_atiixp.4 \ snd_cmi.4 \ snd_cs4281.4 \ snd_csa.4 \ snd_ds1.4 \ snd_emu10k1.4 \ snd_emu10kx.4 \ snd_envy24.4 \ snd_envy24ht.4 \ snd_es137x.4 \ snd_ess.4 \ snd_fm801.4 \ snd_gusc.4 \ snd_hda.4 \ snd_hdspe.4 \ snd_ich.4 \ snd_maestro3.4 \ snd_maestro.4 \ snd_mss.4 \ snd_neomagic.4 \ snd_sbc.4 \ snd_solo.4 \ snd_spicds.4 \ snd_t4dwave.4 \ snd_uaudio.4 \ snd_via8233.4 \ snd_via82c686.4 \ snd_vibes.4 \ snp.4 \ ${_spkr.4} \ splash.4 \ sppp.4 \ ste.4 \ stf.4 \ stg.4 \ stge.4 \ sym.4 \ syncache.4 \ syncer.4 \ syscons.4 \ sysmouse.4 \ tap.4 \ targ.4 \ tcp.4 \ tdfx.4 \ terasic_mtl.4 \ termios.4 \ textdump.4 \ ti.4 \ timecounters.4 \ tl.4 \ ${_tpm.4} \ trm.4 \ tty.4 \ tun.4 \ twa.4 \ twe.4 \ tws.4 \ tx.4 \ txp.4 \ udp.4 \ udplite.4 \ ure.4 \ vale.4 \ vga.4 \ vge.4 \ viapm.4 \ ${_viawd.4} \ ${_virtio.4} \ ${_virtio_balloon.4} \ ${_virtio_blk.4} \ ${_virtio_console.4} \ ${_virtio_random.4} \ ${_virtio_scsi.4} \ vkbd.4 \ vlan.4 \ vxlan.4 \ ${_vmx.4} \ vpo.4 \ vr.4 \ vt.4 \ vte.4 \ ${_vtnet.4} \ ${_vxge.4} \ watchdog.4 \ wb.4 \ ${_wbwd.4} \ wi.4 \ witness.4 \ wlan.4 \ wlan_acl.4 \ wlan_amrr.4 \ wlan_ccmp.4 \ wlan_tkip.4 \ wlan_wep.4 \ wlan_xauth.4 \ wmt.4 \ ${_wpi.4} \ wsp.4 \ xe.4 \ ${_xen.4} \ xhci.4 \ xl.4 \ ${_xnb.4} \ xpt.4 \ zero.4 MLINKS= ae.4 if_ae.4 MLINKS+=age.4 if_age.4 MLINKS+=agp.4 agpgart.4 MLINKS+=alc.4 if_alc.4 MLINKS+=ale.4 if_ale.4 MLINKS+=altera_atse.4 atse.4 MLINKS+=altera_sdcard.4 altera_sdcardc.4 MLINKS+=altq.4 ALTQ.4 MLINKS+=ath.4 if_ath.4 MLINKS+=ath_pci.4 if_ath_pci.4 MLINKS+=an.4 if_an.4 MLINKS+=aue.4 if_aue.4 MLINKS+=axe.4 if_axe.4 MLINKS+=bce.4 if_bce.4 MLINKS+=bfe.4 if_bfe.4 MLINKS+=bge.4 if_bge.4 MLINKS+=bktr.4 brooktree.4 MLINKS+=bnxt.4 if_bnxt.4 MLINKS+=bridge.4 if_bridge.4 MLINKS+=bwi.4 if_bwi.4 MLINKS+=bwn.4 if_bwn.4 MLINKS+=${_bxe.4} ${_if_bxe.4} MLINKS+=cas.4 if_cas.4 MLINKS+=cdce.4 if_cdce.4 MLINKS+=cfi.4 cfid.4 MLINKS+=cloudabi.4 cloudabi64.4 MLINKS+=crypto.4 cryptodev.4 MLINKS+=cue.4 if_cue.4 MLINKS+=cxgb.4 if_cxgb.4 MLINKS+=cxgbe.4 if_cxgbe.4 \ cxgbe.4 vcxgbe.4 \ cxgbe.4 if_vcxgbe.4 \ cxgbe.4 cxl.4 \ cxgbe.4 if_cxl.4 \ cxgbe.4 vcxl.4 \ cxgbe.4 if_vcxl.4 \ cxgbe.4 cc.4 \ cxgbe.4 if_cc.4 \ cxgbe.4 vcc.4 \ cxgbe.4 if_vcc.4 MLINKS+=cxgbev.4 if_cxgbev.4 \ cxgbev.4 cxlv.4 \ cxgbev.4 if_cxlv.4 \ cxgbev.4 ccv.4 \ cxgbev.4 if_ccv.4 MLINKS+=dc.4 if_dc.4 MLINKS+=de.4 if_de.4 MLINKS+=disc.4 if_disc.4 MLINKS+=ed.4 if_ed.4 MLINKS+=edsc.4 if_edsc.4 MLINKS+=em.4 if_em.4 MLINKS+=enc.4 if_enc.4 MLINKS+=epair.4 if_epair.4 MLINKS+=et.4 if_et.4 MLINKS+=fd.4 stderr.4 \ fd.4 stdin.4 \ fd.4 stdout.4 MLINKS+=fdt.4 FDT.4 MLINKS+=firewire.4 ieee1394.4 MLINKS+=fwe.4 if_fwe.4 MLINKS+=fwip.4 if_fwip.4 MLINKS+=fxp.4 if_fxp.4 MLINKS+=gem.4 if_gem.4 MLINKS+=geom.4 GEOM.4 MLINKS+=gif.4 if_gif.4 MLINKS+=gpio.4 gpiobus.4 MLINKS+=gre.4 if_gre.4 MLINKS+=hme.4 if_hme.4 MLINKS+=hpet.4 acpi_hpet.4 MLINKS+=${_hptrr.4} ${_rr232x.4} MLINKS+=${_attimer.4} ${_i8254.4} MLINKS+=ip.4 rawip.4 MLINKS+=ipfirewall.4 ipaccounting.4 \ ipfirewall.4 ipacct.4 \ ipfirewall.4 ipfw.4 MLINKS+=ipheth.4 if_ipheth.4 MLINKS+=ipw.4 if_ipw.4 MLINKS+=iwi.4 if_iwi.4 MLINKS+=iwm.4 if_iwm.4 MLINKS+=iwn.4 if_iwn.4 MLINKS+=ixgb.4 if_ixgb.4 MLINKS+=ixgbe.4 ix.4 MLINKS+=ixgbe.4 if_ix.4 MLINKS+=ixgbe.4 if_ixgbe.4 MLINKS+=ixl.4 if_ixl.4 MLINKS+=ixlv.4 if_ixlv.4 MLINKS+=jme.4 if_jme.4 MLINKS+=kue.4 if_kue.4 MLINKS+=lagg.4 trunk.4 MLINKS+=lagg.4 if_lagg.4 MLINKS+=le.4 if_le.4 MLINKS+=lge.4 if_lge.4 MLINKS+=lmc.4 if_lmc.4 MLINKS+=lo.4 loop.4 MLINKS+=lp.4 plip.4 MLINKS+=malo.4 if_malo.4 MLINKS+=md.4 vn.4 MLINKS+=mem.4 kmem.4 MLINKS+=mfi.4 mfi_linux.4 \ mfi.4 mfip.4 MLINKS+=mlx5en.4 mce.4 MLINKS+=mn.4 if_mn.4 MLINKS+=mos.4 if_mos.4 MLINKS+=msk.4 if_msk.4 MLINKS+=mwl.4 if_mwl.4 MLINKS+=mxge.4 if_mxge.4 MLINKS+=my.4 if_my.4 MLINKS+=${_ndis.4} ${_if_ndis.4} MLINKS+=netfpga10g_nf10bmac.4 if_nf10bmac.4 MLINKS+=netintro.4 net.4 \ netintro.4 networking.4 MLINKS+=${_nfe.4} ${_if_nfe.4} MLINKS+=nge.4 if_nge.4 MLINKS+=${_nxge.4} ${_if_nxge.4} MLINKS+=ow.4 onewire.4 MLINKS+=pccbb.4 cbb.4 MLINKS+=pcm.4 snd.4 \ pcm.4 sound.4 MLINKS+=pcn.4 if_pcn.4 MLINKS+=pms.4 pmspcv.4 MLINKS+=ral.4 if_ral.4 MLINKS+=re.4 if_re.4 MLINKS+=rl.4 if_rl.4 MLINKS+=rtwn_pci.4 if_rtwn_pci.4 MLINKS+=rue.4 if_rue.4 MLINKS+=scsi.4 CAM.4 \ scsi.4 cam.4 \ scsi.4 scbus.4 \ scsi.4 SCSI.4 MLINKS+=sf.4 if_sf.4 MLINKS+=sge.4 if_sge.4 MLINKS+=sis.4 if_sis.4 MLINKS+=sk.4 if_sk.4 MLINKS+=smp.4 SMP.4 MLINKS+=smsc.4 if_smsc.4 MLINKS+=sn.4 if_sn.4 MLINKS+=snd_envy24.4 snd_ak452x.4 MLINKS+=snd_sbc.4 snd_sb16.4 \ snd_sbc.4 snd_sb8.4 MLINKS+=${_spkr.4} ${_speaker.4} MLINKS+=splash.4 screensaver.4 MLINKS+=ste.4 if_ste.4 MLINKS+=stf.4 if_stf.4 MLINKS+=stge.4 if_stge.4 MLINKS+=syncache.4 syncookies.4 MLINKS+=syscons.4 sc.4 MLINKS+=tap.4 if_tap.4 MLINKS+=tdfx.4 tdfx_linux.4 MLINKS+=ti.4 if_ti.4 MLINKS+=tl.4 if_tl.4 MLINKS+=tun.4 if_tun.4 MLINKS+=tx.4 if_tx.4 MLINKS+=txp.4 if_txp.4 MLINKS+=ure.4 if_ure.4 MLINKS+=vge.4 if_vge.4 MLINKS+=vlan.4 if_vlan.4 MLINKS+=vxlan.4 if_vxlan.4 MLINKS+=${_vmx.4} ${_if_vmx.4} MLINKS+=vpo.4 imm.4 MLINKS+=vr.4 if_vr.4 MLINKS+=vte.4 if_vte.4 MLINKS+=${_vtnet.4} ${_if_vtnet.4} MLINKS+=${_vxge.4} ${_if_vxge.4} MLINKS+=watchdog.4 SW_WATCHDOG.4 MLINKS+=wb.4 if_wb.4 MLINKS+=wi.4 if_wi.4 MLINKS+=${_wpi.4} ${_if_wpi.4} MLINKS+=xe.4 if_xe.4 MLINKS+=xl.4 if_xl.4 .if ${MACHINE_CPUARCH} == "aarch64" _armv8crypto.4= armv8crypto.4 .endif .if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" _acpi_asus.4= acpi_asus.4 _acpi_asus_wmi.4= acpi_asus_wmi.4 _acpi_dock.4= acpi_dock.4 _acpi_fujitsu.4=acpi_fujitsu.4 _acpi_hp.4= acpi_hp.4 _acpi_ibm.4= acpi_ibm.4 _acpi_panasonic.4=acpi_panasonic.4 _acpi_rapidstart.4=acpi_rapidstart.4 _acpi_sony.4= acpi_sony.4 _acpi_toshiba.4=acpi_toshiba.4 _acpi_wmi.4= acpi_wmi.4 _aesni.4= aesni.4 _aout.4= aout.4 _apic.4= apic.4 _atrtc.4= atrtc.4 _attimer.4= attimer.4 _aibs.4= aibs.4 _amdsbwd.4= amdsbwd.4 _amdsmb.4= amdsmb.4 _amdsmn.4= amdsmn.4 _amdtemp.4= amdtemp.4 _asmc.4= asmc.4 _bxe.4= bxe.4 _bytgpio.4= bytgpio.4 _coretemp.4= coretemp.4 _cpuctl.4= cpuctl.4 _dpms.4= dpms.4 _hpt27xx.4= hpt27xx.4 _hptiop.4= hptiop.4 _hptmv.4= hptmv.4 _hptnr.4= hptnr.4 _hptrr.4= hptrr.4 _hv_kvp.4= hv_kvp.4 _hv_netvsc.4= hv_netvsc.4 _hv_storvsc.4= hv_storvsc.4 _hv_utils.4= hv_utils.4 _hv_vmbus.4= hv_vmbus.4 _hv_vss.4= hv_vss.4 _i8254.4= i8254.4 _ichwd.4= ichwd.4 _if_bxe.4= if_bxe.4 _if_ndis.4= if_ndis.4 _if_nfe.4= if_nfe.4 _if_nxge.4= if_nxge.4 _if_urtw.4= if_urtw.4 _if_vmx.4= if_vmx.4 _if_vtnet.4= if_vtnet.4 _if_vxge.4= if_vxge.4 _if_wpi.4= if_wpi.4 _ipmi.4= ipmi.4 _io.4= io.4 _linux.4= linux.4 _ndis.4= ndis.4 _nfe.4= nfe.4 _nfsmb.4= nfsmb.4 _nvd.4= nvd.4 _nvme.4= nvme.4 _nvram.4= nvram.4 _nxge.4= nxge.4 _virtio.4= virtio.4 _virtio_balloon.4=virtio_balloon.4 _virtio_blk.4= virtio_blk.4 _virtio_console.4=virtio_console.4 _virtio_random.4= virtio_random.4 _virtio_scsi.4= virtio_scsi.4 _vmx.4= vmx.4 _vtnet.4= vtnet.4 _vxge.4= vxge.4 _padlock.4= padlock.4 _rr232x.4= rr232x.4 _speaker.4= speaker.4 _spkr.4= spkr.4 _tpm.4= tpm.4 _urtw.4= urtw.4 _viawd.4= viawd.4 _wbwd.4= wbwd.4 _wpi.4= wpi.4 _xen.4= xen.4 _xnb.4= xnb.4 .endif .if ${MACHINE_CPUARCH} == "amd64" _if_ntb.4= if_ntb.4 _ioat.4= ioat.4 _ntb.4= ntb.4 _ntb_hw_intel.4= ntb_hw_intel.4 _ntb_hw_plx.4= ntb_hw_plx.4 _ntb_transport.4=ntb_transport.4 _qlxge.4= qlxge.4 _qlxgb.4= qlxgb.4 _qlxgbe.4= qlxgbe.4 _qlnxe.4= qlnxe.4 _sfxge.4= sfxge.4 MLINKS+=qlxge.4 if_qlxge.4 MLINKS+=qlxgb.4 if_qlxgb.4 MLINKS+=qlxgbe.4 if_qlxgbe.4 MLINKS+=qlnxe.4 if_qlnxe.4 MLINKS+=sfxge.4 if_sfxge.4 .if ${MK_BHYVE} != "no" _bhyve.4= bhyve.4 .endif .endif .if ${MACHINE_CPUARCH} == "mips" _nvram2env.4= nvram2env.4 .endif .if exists(${.CURDIR}/man4.${MACHINE_CPUARCH}) SUBDIR= man4.${MACHINE_CPUARCH} .endif .if ${MK_BLUETOOTH} != "no" MAN+= ng_bluetooth.4 .endif .if ${MK_CCD} != "no" _ccd.4= ccd.4 .endif .if ${MK_CDDL} != "no" _dtrace_provs= dtrace_io.4 \ dtrace_ip.4 \ dtrace_lockstat.4 \ dtrace_proc.4 \ dtrace_sched.4 \ dtrace_tcp.4 \ dtrace_udp.4 .endif .if ${MK_ISCSI} != "no" MAN+= cfiscsi.4 MAN+= iscsi.4 MAN+= iscsi_initiator.4 MAN+= iser.4 .endif .if ${MK_OFED} != "no" MAN+= mlx4ib.4 MAN+= mlx5ib.4 .endif .if ${MK_TESTS} != "no" ATF= ${SRCTOP}/contrib/atf .PATH: ${ATF}/doc _atf_test_case.4= atf-test-case.4 .endif .if ${MK_PF} != "no" _pf.4= pf.4 _pflog.4= pflog.4 _pfsync.4= pfsync.4 .endif .if ${MK_USB} != "no" MAN+= \ otus.4 \ otusfw.4 \ rsu.4 \ rsufw.4 \ rtwn_usb.4 \ rum.4 \ run.4 \ runfw.4 \ u3g.4 \ uark.4 \ uart.4 \ uath.4 \ ubsa.4 \ ubsec.4 \ ubser.4 \ ubtbcmfw.4 \ uchcom.4 \ ucom.4 \ ucycom.4 \ udav.4 \ udbp.4 \ udl.4 \ uep.4 \ ufm.4 \ ufoma.4 \ uftdi.4 \ ugen.4 \ ugold.4 \ uhci.4 \ uhid.4 \ uhso.4 \ uipaq.4 \ ukbd.4 \ uled.4 \ ulpt.4 \ umass.4 \ umcs.4 \ umct.4 \ umodem.4 \ umoscom.4 \ ums.4 \ unix.4 \ upgt.4 \ uplcom.4 \ ural.4 \ urio.4 \ urndis.4 \ ${_urtw.4} \ usb.4 \ usb_quirk.4 \ usb_template.4 \ usfs.4 \ uslcom.4 \ uvisor.4 \ uvscom.4 \ zyd.4 MLINKS+=otus.4 if_otus.4 MLINKS+=rsu.4 if_rsu.4 MLINKS+=rtwn_usb.4 if_rtwn_usb.4 MLINKS+=rum.4 if_rum.4 MLINKS+=run.4 if_run.4 MLINKS+=u3g.4 u3gstub.4 MLINKS+=uath.4 if_uath.4 MLINKS+=udav.4 if_udav.4 MLINKS+=upgt.4 if_upgt.4 MLINKS+=ural.4 if_ural.4 MLINKS+=urndis.4 if_urndis.4 MLINKS+=${_urtw.4} ${_if_urtw.4} MLINKS+=zyd.4 if_zyd.4 .endif .include Index: head/share/man/man4/bcma.4 =================================================================== --- head/share/man/man4/bcma.4 (revision 326290) +++ head/share/man/man4/bcma.4 (revision 326291) @@ -1,78 +1,79 @@ .\" Copyright (c) 2015 Landon Fuller .\" Copyright (c) 2010 Weongyo Jeong .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" .\" $FreeBSD$ .\" .Dd June 3, 2016 .Dt BCMA 4 .Os .Sh NAME .Nm bcma .Nd Broadcom AMBA Backplane driver .Sh SYNOPSIS -To compile this driver into the kernel, -place the following lines in your kernel configuration file: +To compile this driver into the kernel, add the following lines to the +kernel configuration file: .Bd -ragged -offset indent .Cd "device bhnd" .Cd "device bcma" .Ed .Pp -Alternatively, to load the driver as a module at boot time, -place the following line in +To load the driver as a module at boot, add this line to .Xr loader.conf 5 : .Bd -literal -offset indent bcma_load="YES" .Ed .Sh DESCRIPTION The .Nm driver provides .Xr bhnd 4 support for devices using the ARM AMBA-based backplane architecture found -in later Broadcom Home Networking Division's (HND) wireless chipsets and -embedded systems. +in later Broadcom Home Networking Division's network chipsets and embedded +systems. .Pp A common interconnect connects all of the backplane's functional blocks. These functional blocks, known as cores, use the ARM AMBA AXI or APB interface to communicate with devices attached to the interconnect. .Pp The IP cores used in .Xr siba 4 devices were adapted by Broadcom for compatibility with the new interconnect. .Sh SEE ALSO -.Xr bhnd 4 +.Xr bhnd 4 , +.Xr intro 4 , +.Xr siba 4 .Sh HISTORY The .Nm device driver first appeared in .Fx 11.0 . .Sh AUTHORS .An -nosplit The .Nm driver was written by .An Landon Fuller Aq Mt landonf@FreeBSD.org . Index: head/share/man/man4/bhnd.4 =================================================================== --- head/share/man/man4/bhnd.4 (revision 326290) +++ head/share/man/man4/bhnd.4 (revision 326291) @@ -1,83 +1,83 @@ .\" Copyright (c) 2015 Landon Fuller .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" .\" $FreeBSD$ .\" .Dd June 3, 2016 .Dt BHND 4 .Os .Sh NAME .Nm bhnd .Nd Broadcom Home Networking Division interconnect bus .Sh SYNOPSIS -To compile this driver into the kernel, -place the following lines in your kernel configuration file: +To compile this driver into the kernel, add the following lines to the +kernel configuration file: .Bd -ragged -offset indent .Cd "device bhnd" .Ed .Pp -Alternatively, to load the driver as a module at boot time, -place the following line in +To load the driver as a module at boot, add this line to .Xr loader.conf 5 : .Bd -literal -offset indent bhnd_load="YES" .Ed .Sh DESCRIPTION The .Nm driver provides a unified kernel bus interface to the on-chip interconnects used in Broadcom Home Networking Division (HND) devices. .Pp The Broadcom HND device family consists of SoCs (System On a Chip) and host-connected chipsets based on a common library of Broadcom IP cores connected via an internal hardware bus architecture. Drivers for these cores are implemented against the unified .Nm interface. .Pp The Sonic Inc. Silicon Backplane used in earlier HND devices is supported by the .Xr siba 4 BHND driver. .Pp The ARM AMBA-based interconnect used in later HND devices is supported by the .Xr bcma 4 BHND driver. .Sh SEE ALSO .Xr bcma 4 , .Xr bhndb 4 , +.Xr intro 4 , .Xr siba 4 .Sh HISTORY The .Nm device driver first appeared in .Fx 11.0 . .Sh AUTHORS .An -nosplit The .Nm driver was written by .An Landon Fuller Aq Mt landonf@FreeBSD.org . Index: head/share/man/man4/bhnd_chipc.4 =================================================================== --- head/share/man/man4/bhnd_chipc.4 (nonexistent) +++ head/share/man/man4/bhnd_chipc.4 (revision 326291) @@ -0,0 +1,81 @@ +.\" Copyright (c) 2017 The FreeBSD Foundation +.\" All rights reserved. +.\" +.\" This documentation was written by Landon Fuller under sponsorship from +.\" the FreeBSD Foundation. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD$ +.\" +.Dd October 16, 2017 +.Dt BHND_CHIPC 4 +.Os +.Sh NAME +.Nm bhnd_chipc +.Nd Broadcom Home Networking Division ChipCommon Driver +.Sh SYNOPSIS +To compile this driver into the kernel, add this line to the +kernel configuration file: +.Bd -ragged -offset indent +.Cd "device bhnd" +.Ed +.Pp +To compile driver support for all additional devices found in embedded systems, +add the following additional lines to the kernel configuration file: +.Bd -ragged -offset indent +.Cd "device cfi" +.Cd "device gpio" +.Cd "device spibus" +.Cd "device uart" +.Ed +.Pp +To load the driver as a module at boot, add this line to +.Xr loader.conf 5 : +.Bd -literal -offset indent +bhnd_load="YES" +.Ed +.Sh DESCRIPTION +The +.Nm +driver supports the ChipCommon core found in Broadcom Home Networking +Division network chipsets and embedded systems. +.Pp +The ChipCommon core provides an interface to common hardware facilities, +including device identification, UARTs, CFI and SPI flash, One-time Programmable +(OTP) Memory, and GPIO. +.Sh SEE ALSO +.Xr bhnd 4 , +.Xr intro 4 +.Sh HISTORY +The +.Nm +device driver first appeared in +.Fx 11.0 . +.Sh AUTHORS +.An -nosplit +The +.Nm +driver was written by +.An Landon Fuller Aq Mt landonf@FreeBSD.org , +and +.An Michael Zhilin Aq Mt mizhka@FreeBSD.org . Property changes on: head/share/man/man4/bhnd_chipc.4 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/share/man/man4/bhnd_pmu.4 =================================================================== --- head/share/man/man4/bhnd_pmu.4 (nonexistent) +++ head/share/man/man4/bhnd_pmu.4 (revision 326291) @@ -0,0 +1,74 @@ +.\" Copyright (c) 2017 The FreeBSD Foundation +.\" All rights reserved. +.\" +.\" This documentation was written by Landon Fuller under sponsorship from +.\" the FreeBSD Foundation. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD$ +.\" +.Dd October 16, 2017 +.Dt BHND_PMU 4 +.Os +.Sh NAME +.Nm bhnd_pmu +.Nd Broadcom Home Networking Division PMU Driver +.Sh SYNOPSIS +To compile this driver into the kernel, add this line to the +kernel configuration file: +.Bd -ragged -offset indent +.Cd "device bhnd" +.Ed +.Pp +To load the driver as a module at boot, add this line to +.Xr loader.conf 5 : +.Bd -literal -offset indent +bhnd_load="YES" +.Ed +.Sh DESCRIPTION +The +.Nm +driver supports the Power Management Unit (PMU) found in Broadcom Home +Networking Division network chipsets and embedded systems. +.Pp +The PMU provides a hardware interface for managing the device's clock and power +topology. +.Sh SEE ALSO +.Xr bhnd 4 , +.Xr intro 4 +.Sh HISTORY +The +.Nm +device driver first appeared in +.Fx 12.0 . +.Sh AUTHORS +.An -nosplit +The +.Nm +driver was derived from Broadcom's ISC-licensed Linux PMU drivers, and was +ported to +.Fx +and +.Xr bhnd 4 +by +.An Landon Fuller Aq Mt landonf@FreeBSD.org . Property changes on: head/share/man/man4/bhnd_pmu.4 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/share/man/man4/bhndb.4 =================================================================== --- head/share/man/man4/bhndb.4 (revision 326290) +++ head/share/man/man4/bhndb.4 (revision 326291) @@ -1,72 +1,80 @@ -.\" Copyright (c) 2015 Landon Fuller +.\" Copyright (c) 2015 Landon Fuller +.\" Copyright (c) 2017 The FreeBSD Foundation .\" All rights reserved. .\" +.\" Portions of this documentation were written by Landon Fuller +.\" under sponsorship from the FreeBSD Foundation. +.\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" .\" $FreeBSD$ .\" -.Dd June 3, 2016 +.Dd October 16th, 2017 .Dt BHNDB 4 .Os .Sh NAME .Nm bhndb .Nd Broadcom Home Networking Division interconnect bridge driver .Sh SYNOPSIS -To compile this driver into the kernel, -place the following lines in your kernel configuration file: +To compile this driver into the kernel, add the following lines to the +kernel configuration file: .Bd -ragged -offset indent .Cd "device bhnd" .Cd "device bhndb" .Ed .Pp -Alternatively, to load the driver as a module at boot time, -place the following line in +To load the driver as a module at boot, add this line to .Xr loader.conf 5 : .Bd -literal -offset indent bhndb_load="YES" -bhndb_pci_load="YES" .Ed .Sh DESCRIPTION The .Nm -driver supports +driver provides .Xr bhnd 4 -host bridge cores such as those used by Broadcom HND PCI, -PCMCIA, and SDIO network adapters. +host bridge support for Broadcom Home Networking Division's wireless chipsets +and network adapters. +.Pp +To enable use for PCI/PCIe systems, see the +.Xr bhndb_pci 4 +driver. .Sh SEE ALSO .Xr bhnd 4 , -.Xr bwn 4 +.Xr bhndb_pci 4 , +.Xr bwn 4 , +.Xr intro 4 .Sh HISTORY The .Nm device driver first appeared in .Fx 11.0 . .Sh AUTHORS .An -nosplit The .Nm driver was written by .An Landon Fuller Aq Mt landonf@FreeBSD.org . .Sh CAVEATS The .Nm driver does not currently support PCMCIA or SDIO devices. Index: head/share/man/man4/bhndb_pci.4 =================================================================== --- head/share/man/man4/bhndb_pci.4 (nonexistent) +++ head/share/man/man4/bhndb_pci.4 (revision 326291) @@ -0,0 +1,75 @@ +.\" Copyright (c) 2015 Landon Fuller +.\" Copyright (c) 2017 The FreeBSD Foundation +.\" All rights reserved. +.\" +.\" Portions of this documentation were written by Landon Fuller +.\" under sponsorship from the FreeBSD Foundation. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD$ +.\" +.Dd October 16, 2017 +.Dt BHNDB_PCI 4 +.Os +.Sh NAME +.Nm bhndb_pci +.Nd Broadcom Home Networking Division PCI host bridge driver +.Sh SYNOPSIS +To compile this driver into the kernel, add the following lines to the +kernel configuration file: +.Bd -ragged -offset indent +.Cd "device bhnd" +.Cd "device bhndb" +.Cd "device bhndb_pci" +.Cd "device pci" +.Ed +.Pp +To load the driver as a module at boot, add this line to +.Xr loader.conf 5 : +.Bd -literal -offset indent +bhndb_pci_load="YES" +.Ed +.Sh DESCRIPTION +The +.Nm +driver provides +.Xr bhndb 4 +support for the PCI and PCIe host bridge cores found in Broadcom Home Networking +Division's wireless chipsets and network adapters. +.Sh SEE ALSO +.Xr bhnd 4 , +.Xr bhndb 4 , +.Xr bwn 4 , +.Xr intro 4 , +.Xr pci 4 +.Sh HISTORY +The +.Nm +device driver first appeared in +.Fx 11.0 . +.Sh AUTHORS +.An -nosplit +The +.Nm +driver was written by +.An Landon Fuller Aq Mt landonf@FreeBSD.org . Property changes on: head/share/man/man4/bhndb_pci.4 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/share/man/man4/siba.4 =================================================================== --- head/share/man/man4/siba.4 (revision 326290) +++ head/share/man/man4/siba.4 (revision 326291) @@ -1,93 +1,93 @@ .\" Copyright (c) 2010 Weongyo Jeong .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" .\" $FreeBSD$ .\" .Dd September 13, 2017 .Dt SIBA 4 .Os .Sh NAME .Nm siba .Nd Sonic Inc. Silicon Backplane driver .Sh SYNOPSIS -To compile this driver into the kernel, -place the following lines in your kernel configuration file: +To compile this driver into the kernel, add the following lines to the +kernel configuration file: .Bd -ragged -offset indent .Cd "device bhnd" .Cd "device siba" .Ed .Pp -Alternatively, to load the driver as a module at boot time, -place the following line in +To load the driver as a module at boot, add this line to .Xr loader.conf 5 : .Bd -literal -offset indent siba_load="YES" .Ed .Sh DESCRIPTION The .Nm driver provides .Xr bhnd 4 support for devices based on the Sonic Inc. Silicon Backplane, an interblock communications architecture found in earlier Broadcom Home Networking Division wireless chipsets and embedded systems. .Pp A common interconnect connects all of the Silicon Backplane's functional blocks. These functional blocks, known as cores, use the Open Core Protocol (OCP) interface to communicate with agents attached to the Silicon Backplane. .Pp Each core can have an initiator agent that passes read and write requests onto the system backplane and a target agent that returns responses to those requests. Not all cores contain both an initiator and a target agent. Initiator agents are present in cores that contain host interfaces (PCI, PCMCIA), embedded processors (MIPS), or DMA processors associated with communications cores. .Sh SEE ALSO .Xr bcma 4 , -.Xr bhnd 4 +.Xr bhnd 4 , +.Xr intro 4 .Sh HISTORY The .Nm device driver first appeared in .Fx 8.0 . The driver was rewritten for .Fx 11.0 to support the common Broadcom .Xr bhnd 4 bus interface. .Sh AUTHORS .An -nosplit The .Nm driver was originally written by .An Bruce M. Simpson Aq Mt bms@FreeBSD.org and .An Weongyo Jeong Aq Mt weongyo@FreeBSD.org . The driver was rewritten for .Fx 11.0 by .An Landon Fuller Aq Mt landonf@FreeBSD.org . Index: head/share/man/man9/Makefile =================================================================== --- head/share/man/man9/Makefile (revision 326290) +++ head/share/man/man9/Makefile (revision 326291) @@ -1,2090 +1,2210 @@ # $FreeBSD$ .include PACKAGE=runtime-manuals MAN= accept_filter.9 \ accf_data.9 \ accf_dns.9 \ accf_http.9 \ acl.9 \ alq.9 \ altq.9 \ atomic.9 \ + bhnd.9 \ + bhnd_erom.9 \ bios.9 \ bitset.9 \ boot.9 \ bpf.9 \ buf.9 \ buf_ring.9 \ BUF_ISLOCKED.9 \ BUF_LOCK.9 \ BUF_LOCKFREE.9 \ BUF_LOCKINIT.9 \ BUF_RECURSED.9 \ BUF_TIMELOCK.9 \ BUF_UNLOCK.9 \ bus_activate_resource.9 \ BUS_ADD_CHILD.9 \ bus_adjust_resource.9 \ bus_alloc_resource.9 \ BUS_BIND_INTR.9 \ bus_child_present.9 \ BUS_CHILD_DELETED.9 \ BUS_CHILD_DETACHED.9 \ BUS_CONFIG_INTR.9 \ BUS_DESCRIBE_INTR.9 \ bus_dma.9 \ bus_generic_attach.9 \ bus_generic_detach.9 \ bus_generic_new_pass.9 \ bus_generic_print_child.9 \ bus_generic_read_ivar.9 \ bus_generic_shutdown.9 \ BUS_GET_CPUS.9 \ bus_get_resource.9 \ bus_map_resource.9 \ BUS_NEW_PASS.9 \ BUS_PRINT_CHILD.9 \ BUS_READ_IVAR.9 \ BUS_RESCAN.9 \ bus_release_resource.9 \ bus_set_pass.9 \ bus_set_resource.9 \ BUS_SETUP_INTR.9 \ bus_space.9 \ byteorder.9 \ casuword.9 \ cd.9 \ cnv.9 \ condvar.9 \ config_intrhook.9 \ contigmalloc.9 \ copy.9 \ counter.9 \ cpuset.9 \ cr_cansee.9 \ critical_enter.9 \ cr_seeothergids.9 \ cr_seeotheruids.9 \ crypto.9 \ CTASSERT.9 \ DB_COMMAND.9 \ DECLARE_GEOM_CLASS.9 \ DECLARE_MODULE.9 \ DELAY.9 \ devclass.9 \ devclass_find.9 \ devclass_get_device.9 \ devclass_get_devices.9 \ devclass_get_drivers.9 \ devclass_get_maxunit.9 \ devclass_get_name.9 \ devclass_get_softc.9 \ dev_clone.9 \ devfs_set_cdevpriv.9 \ device.9 \ device_add_child.9 \ DEVICE_ATTACH.9 \ device_delete_child.9 \ DEVICE_DETACH.9 \ device_enable.9 \ device_find_child.9 \ device_get_children.9 \ device_get_devclass.9 \ device_get_driver.9 \ device_get_ivars.9 \ device_get_name.9 \ device_get_parent.9 \ device_get_softc.9 \ device_get_state.9 \ device_get_sysctl.9 \ device_get_unit.9 \ DEVICE_IDENTIFY.9 \ device_printf.9 \ DEVICE_PROBE.9 \ device_probe_and_attach.9 \ device_quiet.9 \ device_set_desc.9 \ device_set_driver.9 \ device_set_flags.9 \ DEVICE_SHUTDOWN.9 \ DEV_MODULE.9 \ devstat.9 \ devtoname.9 \ disk.9 \ dnv.9 \ domain.9 \ dpcpu.9 \ drbr.9 \ driver.9 \ DRIVER_MODULE.9 \ EVENTHANDLER.9 \ eventtimers.9 \ extattr.9 \ fail.9 \ fetch.9 \ firmware.9 \ fpu_kern.9 \ g_access.9 \ g_attach.9 \ g_bio.9 \ g_consumer.9 \ g_data.9 \ get_cyclecount.9 \ getenv.9 \ getnewvnode.9 \ g_event.9 \ g_geom.9 \ g_provider.9 \ g_provider_by_name.9 \ groupmember.9 \ g_wither_geom.9 \ hash.9 \ hashinit.9 \ hexdump.9 \ hhook.9 \ ieee80211.9 \ ieee80211_amrr.9 \ ieee80211_beacon.9 \ ieee80211_bmiss.9 \ ieee80211_crypto.9 \ ieee80211_ddb.9 \ ieee80211_input.9 \ ieee80211_node.9 \ ieee80211_output.9 \ ieee80211_proto.9 \ ieee80211_radiotap.9 \ ieee80211_regdomain.9 \ ieee80211_scan.9 \ ieee80211_vap.9 \ iflibdd.9 \ iflibdi.9 \ iflibtxrx.9 \ ifnet.9 \ inittodr.9 \ insmntque.9 \ intro.9 \ ithread.9 \ KASSERT.9 \ kern_testfrwk.9 \ kernacc.9 \ kernel_mount.9 \ khelp.9 \ kobj.9 \ kproc.9 \ kqueue.9 \ kthread.9 \ ktr.9 \ lock.9 \ locking.9 \ LOCK_PROFILING.9 \ mac.9 \ make_dev.9 \ malloc.9 \ mbchain.9 \ mbuf.9 \ mbuf_tags.9 \ MD5.9 \ mdchain.9 \ memcchr.9 \ memguard.9 \ microseq.9 \ microtime.9 \ microuptime.9 \ mi_switch.9 \ mod_cc.9 \ module.9 \ MODULE_DEPEND.9 \ MODULE_VERSION.9 \ mtx_pool.9 \ mutex.9 \ namei.9 \ netisr.9 \ nv.9 \ osd.9 \ owll.9 \ own.9 \ panic.9 \ pbuf.9 \ PCBGROUP.9 \ p_candebug.9 \ p_cansee.9 \ pci.9 \ PCI_IOV_ADD_VF.9 \ PCI_IOV_INIT.9 \ pci_iov_schema.9 \ PCI_IOV_UNINIT.9 \ pfil.9 \ pfind.9 \ pget.9 \ pgfind.9 \ PHOLD.9 \ physio.9 \ pmap.9 \ pmap_activate.9 \ pmap_clear_modify.9 \ pmap_copy.9 \ pmap_enter.9 \ pmap_extract.9 \ pmap_growkernel.9 \ pmap_init.9 \ pmap_is_modified.9 \ pmap_is_prefaultable.9 \ pmap_map.9 \ pmap_mincore.9 \ pmap_object_init_pt.9 \ pmap_page_exists_quick.9 \ pmap_page_init.9 \ pmap_pinit.9 \ pmap_protect.9 \ pmap_qenter.9 \ pmap_quick_enter_page.9 \ pmap_release.9 \ pmap_remove.9 \ pmap_resident_count.9 \ pmap_unwire.9 \ pmap_zero_page.9 \ printf.9 \ prison_check.9 \ priv.9 \ proc_rwmem.9 \ pseudofs.9 \ psignal.9 \ random.9 \ random_harvest.9 \ redzone.9 \ refcount.9 \ resettodr.9 \ resource_int_value.9 \ rijndael.9 \ rman.9 \ rmlock.9 \ rtalloc.9 \ rtentry.9 \ runqueue.9 \ rwlock.9 \ sbuf.9 \ scheduler.9 \ SDT.9 \ securelevel_gt.9 \ selrecord.9 \ sema.9 \ sf_buf.9 \ sglist.9 \ shm_map.9 \ signal.9 \ sleep.9 \ sleepqueue.9 \ socket.9 \ stack.9 \ store.9 \ style.9 \ swi.9 \ sx.9 \ SYSCALL_MODULE.9 \ sysctl.9 \ sysctl_add_oid.9 \ sysctl_ctx_init.9 \ SYSINIT.9 \ taskqueue.9 \ tcp_functions.9 \ thread_exit.9 \ time.9 \ timeout.9 \ tvtohz.9 \ ucred.9 \ uidinfo.9 \ uio.9 \ unr.9 \ vaccess.9 \ vaccess_acl_nfs4.9 \ vaccess_acl_posix1e.9 \ vcount.9 \ vflush.9 \ VFS.9 \ vfs_busy.9 \ VFS_CHECKEXP.9 \ vfsconf.9 \ VFS_FHTOVP.9 \ vfs_getnewfsid.9 \ vfs_getopt.9 \ vfs_getvfs.9 \ VFS_MOUNT.9 \ vfs_mountedfrom.9 \ VFS_QUOTACTL.9 \ VFS_ROOT.9 \ vfs_rootmountalloc.9 \ VFS_SET.9 \ VFS_STATFS.9 \ vfs_suser.9 \ VFS_SYNC.9 \ vfs_timestamp.9 \ vfs_unbusy.9 \ VFS_UNMOUNT.9 \ vfs_unmountall.9 \ VFS_VGET.9 \ vget.9 \ vgone.9 \ vhold.9 \ vinvalbuf.9 \ vm_fault_prefault.9 \ vm_map.9 \ vm_map_check_protection.9 \ vm_map_create.9 \ vm_map_delete.9 \ vm_map_entry_resize_free.9 \ vm_map_find.9 \ vm_map_findspace.9 \ vm_map_inherit.9 \ vm_map_init.9 \ vm_map_insert.9 \ vm_map_lock.9 \ vm_map_lookup.9 \ vm_map_madvise.9 \ vm_map_max.9 \ vm_map_protect.9 \ vm_map_remove.9 \ vm_map_simplify_entry.9 \ vm_map_stack.9 \ vm_map_submap.9 \ vm_map_sync.9 \ vm_map_wire.9 \ vm_page_alloc.9 \ vm_page_bits.9 \ vm_page_busy.9 \ vm_page_deactivate.9 \ vm_page_dontneed.9 \ vm_page_aflag.9 \ vm_page_free.9 \ vm_page_grab.9 \ vm_page_hold.9 \ vm_page_insert.9 \ vm_page_lookup.9 \ vm_page_rename.9 \ vm_page_wire.9 \ vm_set_page_size.9 \ vmem.9 \ vn_fullpath.9 \ vn_isdisk.9 \ vnet.9 \ vnode.9 \ VOP_ACCESS.9 \ VOP_ACLCHECK.9 \ VOP_ADVISE.9 \ VOP_ADVLOCK.9 \ VOP_ALLOCATE.9 \ VOP_ATTRIB.9 \ VOP_BWRITE.9 \ VOP_CREATE.9 \ VOP_FSYNC.9 \ VOP_GETACL.9 \ VOP_GETEXTATTR.9 \ VOP_GETPAGES.9 \ VOP_INACTIVE.9 \ VOP_IOCTL.9 \ VOP_LINK.9 \ VOP_LISTEXTATTR.9 \ VOP_LOCK.9 \ VOP_LOOKUP.9 \ VOP_OPENCLOSE.9 \ VOP_PATHCONF.9 \ VOP_PRINT.9 \ VOP_RDWR.9 \ VOP_READDIR.9 \ VOP_READLINK.9 \ VOP_REALLOCBLKS.9 \ VOP_REMOVE.9 \ VOP_RENAME.9 \ VOP_REVOKE.9 \ VOP_SETACL.9 \ VOP_SETEXTATTR.9 \ VOP_STRATEGY.9 \ VOP_VPTOCNP.9 \ VOP_VPTOFH.9 \ vref.9 \ vrefcnt.9 \ vrele.9 \ vslock.9 \ watchdog.9 \ zone.9 MLINKS= unr.9 alloc_unr.9 \ unr.9 alloc_unrl.9 \ unr.9 alloc_unr_specific.9 \ unr.9 clear_unrhdr.9 \ unr.9 delete_unrhdr.9 \ unr.9 free_unr.9 \ unr.9 new_unrhdr.9 MLINKS+=accept_filter.9 accept_filt_add.9 \ accept_filter.9 accept_filt_del.9 \ accept_filter.9 accept_filt_generic_mod_event.9 \ accept_filter.9 accept_filt_get.9 MLINKS+=alq.9 ALQ.9 \ alq.9 alq_close.9 \ alq.9 alq_flush.9 \ alq.9 alq_get.9 \ alq.9 alq_getn.9 \ alq.9 alq_open.9 \ alq.9 alq_open_flags.9 \ alq.9 alq_post.9 \ alq.9 alq_post_flags.9 \ alq.9 alq_write.9 \ alq.9 alq_writen.9 MLINKS+=altq.9 ALTQ.9 MLINKS+=atomic.9 atomic_add.9 \ atomic.9 atomic_clear.9 \ atomic.9 atomic_cmpset.9 \ atomic.9 atomic_fetchadd.9 \ atomic.9 atomic_load.9 \ atomic.9 atomic_readandclear.9 \ atomic.9 atomic_set.9 \ atomic.9 atomic_store.9 \ atomic.9 atomic_subtract.9 \ atomic.9 atomic_swap.9 \ atomic.9 atomic_testandset.9 +MLINKS+=bhnd.9 BHND_MATCH_BOARD_TYPE.9 \ + bhnd.9 BHND_MATCH_BOARD_VENDOR.9 \ + bhnd.9 BHND_MATCH_CHIP_ID.9 \ + bhnd.9 BHND_MATCH_CHIP_PKG.9 \ + bhnd.9 BHND_MATCH_CHIP_REV.9 \ + bhnd.9 BHND_MATCH_CORE_ID.9 \ + bhnd.9 BHND_MATCH_CORE_VENDOR.9 \ + bhnd.9 bhnd_activate_resource.9 \ + bhnd.9 bhnd_alloc_pmu.9 \ + bhnd.9 bhnd_alloc_resource.9 \ + bhnd.9 bhnd_alloc_resource_any.9 \ + bhnd.9 bhnd_alloc_resources.9 \ + bhnd.9 bhnd_board_matches.9 \ + bhnd.9 bhnd_bus_match_child.9 \ + bhnd.9 bhnd_bus_read_1.9 \ + bhnd.9 bhnd_bus_read_2.9 \ + bhnd.9 bhnd_bus_read_4.9 \ + bhnd.9 bhnd_bus_read_stream_1.9 \ + bhnd.9 bhnd_bus_read_stream_2.9 \ + bhnd.9 bhnd_bus_read_stream_4.9 \ + bhnd.9 bhnd_bus_write_1.9 \ + bhnd.9 bhnd_bus_write_2.9 \ + bhnd.9 bhnd_bus_write_4.9 \ + bhnd.9 bhnd_bus_write_stream_1.9 \ + bhnd.9 bhnd_bus_write_stream_2.9 \ + bhnd.9 bhnd_bus_write_stream_4.9 \ + bhnd.9 bhnd_chip_matches.9 \ + bhnd.9 bhnd_core_class.9 \ + bhnd.9 bhnd_core_get_match_desc.9 \ + bhnd.9 bhnd_core_matches.9 \ + bhnd.9 bhnd_core_name.9 \ + bhnd.9 bhnd_cores_equal.9 \ + bhnd.9 bhnd_deactivate_resource.9 \ + bhnd.9 bhnd_decode_port_rid.9 \ + bhnd.9 bhnd_deregister_provider.9 \ + bhnd.9 bhnd_device_lookup.9 \ + bhnd.9 bhnd_device_matches.9 \ + bhnd.9 bhnd_device_quirks.9 \ + bhnd.9 bhnd_driver_get_erom_class.9 \ + bhnd.9 bhnd_enable_clocks.9 \ + bhnd.9 bhnd_find_core_class.9 \ + bhnd.9 bhnd_find_core_name.9 \ + bhnd.9 bhnd_format_chip_id.9 \ + bhnd.9 bhnd_get_attach_type.9 \ + bhnd.9 bhnd_get_chipid.9 \ + bhnd.9 bhnd_get_class.9 \ + bhnd.9 bhnd_get_clock_freq.9 \ + bhnd.9 bhnd_get_clock_latency.9 \ + bhnd.9 bhnd_get_core_index.9 \ + bhnd.9 bhnd_get_core_info.9 \ + bhnd.9 bhnd_get_core_unit.9 \ + bhnd.9 bhnd_get_device.9 \ + bhnd.9 bhnd_get_device_name.9 \ + bhnd.9 bhnd_get_dma_translation.9 \ + bhnd.9 bhnd_get_hwrev.9 \ + bhnd.9 bhnd_get_intr_count.9 \ + bhnd.9 bhnd_get_intr_ivec.9 \ + bhnd.9 bhnd_get_port_count.9 \ + bhnd.9 bhnd_get_port_rid.9 \ + bhnd.9 bhnd_get_region_addr.9 \ + bhnd.9 bhnd_get_region_count.9 \ + bhnd.9 bhnd_get_vendor.9 \ + bhnd.9 bhnd_get_vendor_name.9 \ + bhnd.9 bhnd_hwrev_matches.9 \ + bhnd.9 bhnd_is_hw_suspended.9 \ + bhnd.9 bhnd_is_region_valid.9 \ + bhnd.9 bhnd_map_intr.9 \ + bhnd.9 bhnd_match_core.9 \ + bhnd.9 bhnd_nvram_getvar.9 \ + bhnd.9 bhnd_nvram_getvar_array.9 \ + bhnd.9 bhnd_nvram_getvar_int.9 \ + bhnd.9 bhnd_nvram_getvar_int16.9 \ + bhnd.9 bhnd_nvram_getvar_int32.9 \ + bhnd.9 bhnd_nvram_getvar_int8.9 \ + bhnd.9 bhnd_nvram_getvar_str.9 \ + bhnd.9 bhnd_nvram_getvar_uint.9 \ + bhnd.9 bhnd_nvram_getvar_uint16.9 \ + bhnd.9 bhnd_nvram_getvar_uint32.9 \ + bhnd.9 bhnd_nvram_getvar_uint8.9 \ + bhnd.9 bhnd_nvram_string_array_next.9 \ + bhnd.9 bhnd_read_board_info.9 \ + bhnd.9 bhnd_read_config.9 \ + bhnd.9 bhnd_read_ioctl.9 \ + bhnd.9 bhnd_read_iost.9 \ + bhnd.9 bhnd_register_provider.9 \ + bhnd.9 bhnd_release_ext_rsrc.9 \ + bhnd.9 bhnd_release_pmu.9 \ + bhnd.9 bhnd_release_provider.9 \ + bhnd.9 bhnd_release_resource.9 \ + bhnd.9 bhnd_release_resources.9 \ + bhnd.9 bhnd_request_clock.9 \ + bhnd.9 bhnd_request_ext_rsrc.9 \ + bhnd.9 bhnd_reset_hw.9 \ + bhnd.9 bhnd_retain_provider.9 \ + bhnd.9 bhnd_set_custom_core_desc.9 \ + bhnd.9 bhnd_set_default_core_desc.9 \ + bhnd.9 bhnd_suspend_hw.9 \ + bhnd.9 bhnd_unmap_intr.9 \ + bhnd.9 bhnd_vendor_name.9 \ + bhnd.9 bhnd_write_config.9 \ + bhnd.9 bhnd_write_ioctl.9 +MLINKS+=bhnd_erom.9 bhnd_erom_alloc.9 \ + bhnd_erom.9 bhnd_erom_dump.9 \ + bhnd_erom.9 bhnd_erom_fini_static.9 \ + bhnd_erom.9 bhnd_erom_free.9 \ + bhnd_erom.9 bhnd_erom_free_core_table.9 \ + bhnd_erom.9 bhnd_erom_get_core_table.9 \ + bhnd_erom.9 bhnd_erom_init_static.9 \ + bhnd_erom.9 bhnd_erom_io.9 \ + bhnd_erom.9 bhnd_erom_io_fini.9 \ + bhnd_erom.9 bhnd_erom_io_map.9 \ + bhnd_erom.9 bhnd_erom_io_read.9 \ + bhnd_erom.9 bhnd_erom_iobus_init.9 \ + bhnd_erom.9 bhnd_erom_iores_new.9 \ + bhnd_erom.9 bhnd_erom_lookup_core.9 \ + bhnd_erom.9 bhnd_erom_lookup_core_addr.9 \ + bhnd_erom.9 bhnd_erom_probe.9 \ + bhnd_erom.9 bhnd_erom_probe_driver_classes.9 MLINKS+=bitset.9 BITSET_DEFINE.9 \ bitset.9 BITSET_T_INITIALIZER.9 \ bitset.9 BITSET_FSET.9 \ bitset.9 BIT_CLR.9 \ bitset.9 BIT_COPY.9 \ bitset.9 BIT_ISSET.9 \ bitset.9 BIT_SET.9 \ bitset.9 BIT_ZERO.9 \ bitset.9 BIT_FILL.9 \ bitset.9 BIT_SETOF.9 \ bitset.9 BIT_EMPTY.9 \ bitset.9 BIT_ISFULLSET.9 \ bitset.9 BIT_FFS.9 \ bitset.9 BIT_COUNT.9 \ bitset.9 BIT_SUBSET.9 \ bitset.9 BIT_OVERLAP.9 \ bitset.9 BIT_CMP.9 \ bitset.9 BIT_OR.9 \ bitset.9 BIT_AND.9 \ bitset.9 BIT_NAND.9 \ bitset.9 BIT_CLR_ATOMIC.9 \ bitset.9 BIT_SET_ATOMIC.9 \ bitset.9 BIT_SET_ATOMIC_ACQ.9 \ bitset.9 BIT_AND_ATOMIC.9 \ bitset.9 BIT_OR_ATOMIC.9 \ bitset.9 BIT_COPY_STORE_REL.9 MLINKS+=bpf.9 bpfattach.9 \ bpf.9 bpfattach2.9 \ bpf.9 bpfdetach.9 \ bpf.9 bpf_filter.9 \ bpf.9 bpf_mtap.9 \ bpf.9 bpf_mtap2.9 \ bpf.9 bpf_tap.9 \ bpf.9 bpf_validate.9 MLINKS+=buf.9 bp.9 MLINKS+=buf_ring.9 buf_ring_alloc.9 \ buf_ring.9 buf_ring_free.9 \ buf_ring.9 buf_ring_enqueue.9 \ buf_ring.9 buf_ring_enqueue_bytes.9 \ buf_ring.9 buf_ring_dequeue_mc.9 \ buf_ring.9 buf_ring_dequeue_sc.9 \ buf_ring.9 buf_ring_count.9 \ buf_ring.9 buf_ring_empty.9 \ buf_ring.9 buf_ring_full.9 \ buf_ring.9 buf_ring_peek.9 MLINKS+=bus_activate_resource.9 bus_deactivate_resource.9 MLINKS+=bus_alloc_resource.9 bus_alloc_resource_any.9 MLINKS+=BUS_BIND_INTR.9 bus_bind_intr.9 MLINKS+=BUS_DESCRIBE_INTR.9 bus_describe_intr.9 MLINKS+=bus_dma.9 busdma.9 \ bus_dma.9 bus_dmamap_create.9 \ bus_dma.9 bus_dmamap_destroy.9 \ bus_dma.9 bus_dmamap_load.9 \ bus_dma.9 bus_dmamap_load_bio.9 \ bus_dma.9 bus_dmamap_load_ccb.9 \ bus_dma.9 bus_dmamap_load_mbuf.9 \ bus_dma.9 bus_dmamap_load_mbuf_sg.9 \ bus_dma.9 bus_dmamap_load_uio.9 \ bus_dma.9 bus_dmamap_sync.9 \ bus_dma.9 bus_dmamap_unload.9 \ bus_dma.9 bus_dmamem_alloc.9 \ bus_dma.9 bus_dmamem_free.9 \ bus_dma.9 bus_dma_tag_create.9 \ bus_dma.9 bus_dma_tag_destroy.9 MLINKS+=bus_generic_read_ivar.9 bus_generic_write_ivar.9 MLINKS+=BUS_GET_CPUS.9 bus_get_cpus.9 MLINKS+=bus_map_resource.9 bus_unmap_resource.9 \ bus_map_resource.9 resource_init_map_request.9 MLINKS+=BUS_READ_IVAR.9 BUS_WRITE_IVAR.9 MLINKS+=BUS_SETUP_INTR.9 bus_setup_intr.9 \ BUS_SETUP_INTR.9 BUS_TEARDOWN_INTR.9 \ BUS_SETUP_INTR.9 bus_teardown_intr.9 MLINKS+=bus_space.9 bus_space_alloc.9 \ bus_space.9 bus_space_barrier.9 \ bus_space.9 bus_space_copy_region_1.9 \ bus_space.9 bus_space_copy_region_2.9 \ bus_space.9 bus_space_copy_region_4.9 \ bus_space.9 bus_space_copy_region_8.9 \ bus_space.9 bus_space_copy_region_stream_1.9 \ bus_space.9 bus_space_copy_region_stream_2.9 \ bus_space.9 bus_space_copy_region_stream_4.9 \ bus_space.9 bus_space_copy_region_stream_8.9 \ bus_space.9 bus_space_free.9 \ bus_space.9 bus_space_map.9 \ bus_space.9 bus_space_read_1.9 \ bus_space.9 bus_space_read_2.9 \ bus_space.9 bus_space_read_4.9 \ bus_space.9 bus_space_read_8.9 \ bus_space.9 bus_space_read_multi_1.9 \ bus_space.9 bus_space_read_multi_2.9 \ bus_space.9 bus_space_read_multi_4.9 \ bus_space.9 bus_space_read_multi_8.9 \ bus_space.9 bus_space_read_multi_stream_1.9 \ bus_space.9 bus_space_read_multi_stream_2.9 \ bus_space.9 bus_space_read_multi_stream_4.9 \ bus_space.9 bus_space_read_multi_stream_8.9 \ bus_space.9 bus_space_read_region_1.9 \ bus_space.9 bus_space_read_region_2.9 \ bus_space.9 bus_space_read_region_4.9 \ bus_space.9 bus_space_read_region_8.9 \ bus_space.9 bus_space_read_region_stream_1.9 \ bus_space.9 bus_space_read_region_stream_2.9 \ bus_space.9 bus_space_read_region_stream_4.9 \ bus_space.9 bus_space_read_region_stream_8.9 \ bus_space.9 bus_space_read_stream_1.9 \ bus_space.9 bus_space_read_stream_2.9 \ bus_space.9 bus_space_read_stream_4.9 \ bus_space.9 bus_space_read_stream_8.9 \ bus_space.9 bus_space_set_multi_1.9 \ bus_space.9 bus_space_set_multi_2.9 \ bus_space.9 bus_space_set_multi_4.9 \ bus_space.9 bus_space_set_multi_8.9 \ bus_space.9 bus_space_set_multi_stream_1.9 \ bus_space.9 bus_space_set_multi_stream_2.9 \ bus_space.9 bus_space_set_multi_stream_4.9 \ bus_space.9 bus_space_set_multi_stream_8.9 \ bus_space.9 bus_space_set_region_1.9 \ bus_space.9 bus_space_set_region_2.9 \ bus_space.9 bus_space_set_region_4.9 \ bus_space.9 bus_space_set_region_8.9 \ bus_space.9 bus_space_set_region_stream_1.9 \ bus_space.9 bus_space_set_region_stream_2.9 \ bus_space.9 bus_space_set_region_stream_4.9 \ bus_space.9 bus_space_set_region_stream_8.9 \ bus_space.9 bus_space_subregion.9 \ bus_space.9 bus_space_unmap.9 \ bus_space.9 bus_space_write_1.9 \ bus_space.9 bus_space_write_2.9 \ bus_space.9 bus_space_write_4.9 \ bus_space.9 bus_space_write_8.9 \ bus_space.9 bus_space_write_multi_1.9 \ bus_space.9 bus_space_write_multi_2.9 \ bus_space.9 bus_space_write_multi_4.9 \ bus_space.9 bus_space_write_multi_8.9 \ bus_space.9 bus_space_write_multi_stream_1.9 \ bus_space.9 bus_space_write_multi_stream_2.9 \ bus_space.9 bus_space_write_multi_stream_4.9 \ bus_space.9 bus_space_write_multi_stream_8.9 \ bus_space.9 bus_space_write_region_1.9 \ bus_space.9 bus_space_write_region_2.9 \ bus_space.9 bus_space_write_region_4.9 \ bus_space.9 bus_space_write_region_8.9 \ bus_space.9 bus_space_write_region_stream_1.9 \ bus_space.9 bus_space_write_region_stream_2.9 \ bus_space.9 bus_space_write_region_stream_4.9 \ bus_space.9 bus_space_write_region_stream_8.9 \ bus_space.9 bus_space_write_stream_1.9 \ bus_space.9 bus_space_write_stream_2.9 \ bus_space.9 bus_space_write_stream_4.9 \ bus_space.9 bus_space_write_stream_8.9 MLINKS+=byteorder.9 be16dec.9 \ byteorder.9 be16enc.9 \ byteorder.9 be16toh.9 \ byteorder.9 be32dec.9 \ byteorder.9 be32enc.9 \ byteorder.9 be32toh.9 \ byteorder.9 be64dec.9 \ byteorder.9 be64enc.9 \ byteorder.9 be64toh.9 \ byteorder.9 bswap16.9 \ byteorder.9 bswap32.9 \ byteorder.9 bswap64.9 \ byteorder.9 htobe16.9 \ byteorder.9 htobe32.9 \ byteorder.9 htobe64.9 \ byteorder.9 htole16.9 \ byteorder.9 htole32.9 \ byteorder.9 htole64.9 \ byteorder.9 le16dec.9 \ byteorder.9 le16enc.9 \ byteorder.9 le16toh.9 \ byteorder.9 le32dec.9 \ byteorder.9 le32enc.9 \ byteorder.9 le32toh.9 \ byteorder.9 le64dec.9 \ byteorder.9 le64enc.9 \ byteorder.9 le64toh.9 MLINKS+=cnv.9 cnvlist.9 \ cnv.9 cnvlist_free_binary.9 \ cnv.9 cnvlist_free_bool.9 \ cnv.9 cnvlist_free_bool_array.9 \ cnv.9 cnvlist_free_descriptor.9 \ cnv.9 cnvlist_free_descriptor_array.9 \ cnv.9 cnvlist_free_null.9 \ cnv.9 cnvlist_free_number.9 \ cnv.9 cnvlist_free_number_array.9 \ cnv.9 cnvlist_free_nvlist.9 \ cnv.9 cnvlist_free_nvlist_array.9 \ cnv.9 cnvlist_free_string.9 \ cnv.9 cnvlist_free_string_array.9 \ cnv.9 cnvlist_get_binary.9 \ cnv.9 cnvlist_get_bool.9 \ cnv.9 cnvlist_get_bool_array.9 \ cnv.9 cnvlist_get_descriptor.9 \ cnv.9 cnvlist_get_descriptor_array.9 \ cnv.9 cnvlist_get_number.9 \ cnv.9 cnvlist_get_number_array.9 \ cnv.9 cnvlist_get_nvlist.9 \ cnv.9 cnvlist_get_nvlist_array.9 \ cnv.9 cnvlist_get_string.9 \ cnv.9 cnvlist_get_string_array.9 \ cnv.9 cnvlist_take_binary.9 \ cnv.9 cnvlist_take_bool.9 \ cnv.9 cnvlist_take_bool_array.9 \ cnv.9 cnvlist_take_descriptor.9 \ cnv.9 cnvlist_take_descriptor_array.9 \ cnv.9 cnvlist_take_number.9 \ cnv.9 cnvlist_take_number_array.9 \ cnv.9 cnvlist_take_nvlist.9 \ cnv.9 cnvlist_take_nvlist_array.9 \ cnv.9 cnvlist_take_string.9 \ cnv.9 cnvlist_take_string_array.9 MLINKS+=condvar.9 cv_broadcast.9 \ condvar.9 cv_broadcastpri.9 \ condvar.9 cv_destroy.9 \ condvar.9 cv_init.9 \ condvar.9 cv_signal.9 \ condvar.9 cv_timedwait.9 \ condvar.9 cv_timedwait_sig.9 \ condvar.9 cv_timedwait_sig_sbt.9 \ condvar.9 cv_wait.9 \ condvar.9 cv_wait_sig.9 \ condvar.9 cv_wait_unlock.9 \ condvar.9 cv_wmesg.9 MLINKS+=config_intrhook.9 config_intrhook_disestablish.9 \ config_intrhook.9 config_intrhook_establish.9 \ config_intrhook.9 config_intrhook_oneshot.9 MLINKS+=contigmalloc.9 contigfree.9 MLINKS+=casuword.9 casueword.9 \ casuword.9 casueword32.9 \ casuword.9 casuword32.9 MLINKS+=copy.9 copyin.9 \ copy.9 copyin_nofault.9 \ copy.9 copyinstr.9 \ copy.9 copyout.9 \ copy.9 copyout_nofault.9 \ copy.9 copystr.9 MLINKS+=counter.9 counter_u64_alloc.9 \ counter.9 counter_u64_free.9 \ counter.9 counter_u64_add.9 \ counter.9 counter_enter.9 \ counter.9 counter_exit.9 \ counter.9 counter_u64_add_protected.9 \ counter.9 counter_u64_fetch.9 \ counter.9 counter_u64_zero.9 \ counter.9 SYSCTL_COUNTER_U64.9 \ counter.9 SYSCTL_ADD_COUNTER_U64.9 \ counter.9 SYSCTL_COUNTER_U64_ARRAY.9 \ counter.9 SYSCTL_ADD_COUNTER_U64_ARRAY.9 MLINKS+=cpuset.9 CPUSET_T_INITIALIZER.9 \ cpuset.9 CPUSET_FSET.9 \ cpuset.9 CPU_CLR.9 \ cpuset.9 CPU_COPY.9 \ cpuset.9 CPU_ISSET.9 \ cpuset.9 CPU_SET.9 \ cpuset.9 CPU_ZERO.9 \ cpuset.9 CPU_FILL.9 \ cpuset.9 CPU_SETOF.9 \ cpuset.9 CPU_EMPTY.9 \ cpuset.9 CPU_ISFULLSET.9 \ cpuset.9 CPU_FFS.9 \ cpuset.9 CPU_COUNT.9 \ cpuset.9 CPU_SUBSET.9 \ cpuset.9 CPU_OVERLAP.9 \ cpuset.9 CPU_CMP.9 \ cpuset.9 CPU_OR.9 \ cpuset.9 CPU_AND.9 \ cpuset.9 CPU_NAND.9 \ cpuset.9 CPU_CLR_ATOMIC.9 \ cpuset.9 CPU_SET_ATOMIC.9 \ cpuset.9 CPU_SET_ATOMIC_ACQ.9 \ cpuset.9 CPU_AND_ATOMIC.9 \ cpuset.9 CPU_OR_ATOMIC.9 \ cpuset.9 CPU_COPY_STORE_REL.9 MLINKS+=critical_enter.9 critical.9 \ critical_enter.9 critical_exit.9 MLINKS+=crypto.9 crypto_dispatch.9 \ crypto.9 crypto_done.9 \ crypto.9 crypto_freereq.9 \ crypto.9 crypto_freesession.9 \ crypto.9 crypto_get_driverid.9 \ crypto.9 crypto_getreq.9 \ crypto.9 crypto_kdispatch.9 \ crypto.9 crypto_kdone.9 \ crypto.9 crypto_kregister.9 \ crypto.9 crypto_newsession.9 \ crypto.9 crypto_register.9 \ crypto.9 crypto_unblock.9 \ crypto.9 crypto_unregister.9 \ crypto.9 crypto_unregister_all.9 MLINKS+=DB_COMMAND.9 DB_SHOW_ALL_COMMAND.9 \ DB_COMMAND.9 DB_SHOW_COMMAND.9 MLINKS+=dev_clone.9 drain_dev_clone_events.9 MLINKS+=devfs_set_cdevpriv.9 devfs_clear_cdevpriv.9 \ devfs_set_cdevpriv.9 devfs_get_cdevpriv.9 MLINKS+=device_add_child.9 device_add_child_ordered.9 MLINKS+=device_enable.9 device_disable.9 \ device_enable.9 device_is_enabled.9 MLINKS+=device_get_ivars.9 device_set_ivars.9 MLINKS+=device_get_name.9 device_get_nameunit.9 MLINKS+=device_get_state.9 device_busy.9 \ device_get_state.9 device_is_alive.9 \ device_get_state.9 device_is_attached.9 \ device_get_state.9 device_unbusy.9 MLINKS+=device_get_sysctl.9 device_get_sysctl_ctx.9 \ device_get_sysctl.9 device_get_sysctl_tree.9 MLINKS+=device_quiet.9 device_is_quiet.9 \ device_quiet.9 device_verbose.9 MLINKS+=device_set_desc.9 device_get_desc.9 \ device_set_desc.9 device_set_desc_copy.9 MLINKS+=device_set_flags.9 device_get_flags.9 MLINKS+=devstat.9 devicestat.9 \ devstat.9 devstat_add_entry.9 \ devstat.9 devstat_end_transaction.9 \ devstat.9 devstat_remove_entry.9 \ devstat.9 devstat_start_transaction.9 MLINKS+=disk.9 disk_add_alias.9 \ disk.9 disk_alloc.9 \ disk.9 disk_create.9 \ disk.9 disk_destroy.9 \ disk.9 disk_gone.9 \ disk.9 disk_resize.9 MLINKS+=dnv.9 dnvlist.9 \ dnv.9 dnvlist_get_binary.9 \ dnv.9 dnvlist_get_bool.9 \ dnv.9 dnvlist_get_descriptor.9 \ dnv.9 dnvlist_get_number.9 \ dnv.9 dnvlist_get_nvlist.9 \ dnv.9 dnvlist_get_string.9 \ dnv.9 dnvlist_take_binary.9 \ dnv.9 dnvlist_take_bool.9 \ dnv.9 dnvlist_take_descriptor.9 \ dnv.9 dnvlist_take_number.9 \ dnv.9 dnvlist_take_nvlist.9 \ dnv.9 dnvlist_take_string.9 MLINKS+=domain.9 DOMAIN_SET.9 \ domain.9 domain_add.9 \ domain.9 pfctlinput.9 \ domain.9 pfctlinput2.9 \ domain.9 pffinddomain.9 \ domain.9 pffindproto.9 \ domain.9 pffindtype.9 MLINKS+=drbr.9 drbr_free.9 \ drbr.9 drbr_enqueue.9 \ drbr.9 drbr_dequeue.9 \ drbr.9 drbr_dequeue_cond.9 \ drbr.9 drbr_flush.9 \ drbr.9 drbr_empty.9 \ drbr.9 drbr_inuse.9 \ drbr.9 drbr_stats_update.9 MLINKS+=DRIVER_MODULE.9 DRIVER_MODULE_ORDERED.9 \ DRIVER_MODULE.9 EARLY_DRIVER_MODULE.9 \ DRIVER_MODULE.9 EARLY_DRIVER_MODULE_ORDERED.9 MLINKS+=EVENTHANDLER.9 EVENTHANDLER_DECLARE.9 \ EVENTHANDLER.9 EVENTHANDLER_DEFINE.9 \ EVENTHANDLER.9 EVENTHANDLER_DEREGISTER.9 \ EVENTHANDLER.9 eventhandler_deregister.9 \ EVENTHANDLER.9 eventhandler_find_list.9 \ EVENTHANDLER.9 EVENTHANDLER_INVOKE.9 \ EVENTHANDLER.9 eventhandler_prune_list.9 \ EVENTHANDLER.9 EVENTHANDLER_REGISTER.9 \ EVENTHANDLER.9 eventhandler_register.9 MLINKS+=eventtimers.9 et_register.9 \ eventtimers.9 et_deregister.9 \ eventtimers.9 et_ban.9 \ eventtimers.9 et_find.9 \ eventtimers.9 et_free.9 \ eventtimers.9 et_init.9 \ eventtimers.9 ET_LOCK.9 \ eventtimers.9 ET_UNLOCK.9 \ eventtimers.9 et_start.9 \ eventtimers.9 et_stop.9 MLINKS+=fail.9 KFAIL_POINT_CODE.9 \ fail.9 KFAIL_POINT_ERROR.9 \ fail.9 KFAIL_POINT_GOTO.9 \ fail.9 KFAIL_POINT_RETURN.9 \ fail.9 KFAIL_POINT_RETURN_VOID.9 MLINKS+=fetch.9 fubyte.9 \ fetch.9 fuswintr.9 \ fetch.9 fuword.9 \ fetch.9 fuword16.9 \ fetch.9 fuword32.9 \ fetch.9 fuword64.9 \ fetch.9 fueword.9 \ fetch.9 fueword32.9 \ fetch.9 fueword64.9 MLINKS+=firmware.9 firmware_get.9 \ firmware.9 firmware_put.9 \ firmware.9 firmware_register.9 \ firmware.9 firmware_unregister.9 MLINKS+=fpu_kern.9 fpu_kern_alloc_ctx.9 \ fpu_kern.9 fpu_kern_free_ctx.9 \ fpu_kern.9 fpu_kern_enter.9 \ fpu_kern.9 fpu_kern_leave.9 \ fpu_kern.9 fpu_kern_thread.9 \ fpu_kern.9 is_fpu_kern_thread.9 MLINKS+=g_attach.9 g_detach.9 MLINKS+=g_bio.9 g_alloc_bio.9 \ g_bio.9 g_clone_bio.9 \ g_bio.9 g_destroy_bio.9 \ g_bio.9 g_duplicate_bio.9 \ g_bio.9 g_new_bio.9 \ g_bio.9 g_print_bio.9 \ g_bio.9 g_reset_bio.9 MLINKS+=g_consumer.9 g_destroy_consumer.9 \ g_consumer.9 g_new_consumer.9 MLINKS+=g_data.9 g_read_data.9 \ g_data.9 g_write_data.9 MLINKS+=getenv.9 freeenv.9 \ getenv.9 getenv_int.9 \ getenv.9 getenv_long.9 \ getenv.9 getenv_string.9 \ getenv.9 getenv_quad.9 \ getenv.9 getenv_uint.9 \ getenv.9 getenv_ulong.9 \ getenv.9 kern_getenv.9 \ getenv.9 kern_setenv.9 \ getenv.9 kern_unsetenv.9 \ getenv.9 setenv.9 \ getenv.9 testenv.9 \ getenv.9 unsetenv.9 MLINKS+=g_event.9 g_cancel_event.9 \ g_event.9 g_post_event.9 \ g_event.9 g_waitfor_event.9 MLINKS+=g_geom.9 g_destroy_geom.9 \ g_geom.9 g_new_geomf.9 MLINKS+=g_provider.9 g_destroy_provider.9 \ g_provider.9 g_error_provider.9 \ g_provider.9 g_new_providerf.9 MLINKS+=hash.9 hash32.9 \ hash.9 hash32_buf.9 \ hash.9 hash32_str.9 \ hash.9 hash32_stre.9 \ hash.9 hash32_strn.9 \ hash.9 hash32_strne.9 \ hash.9 jenkins_hash.9 \ hash.9 jenkins_hash32.9 MLINKS+=hashinit.9 hashdestroy.9 \ hashinit.9 hashinit_flags.9 \ hashinit.9 phashinit.9 MLINKS+=hhook.9 hhook_head_register.9 \ hhook.9 hhook_head_deregister.9 \ hhook.9 hhook_head_deregister_lookup.9 \ hhook.9 hhook_run_hooks.9 \ hhook.9 HHOOKS_RUN_IF.9 \ hhook.9 HHOOKS_RUN_LOOKUP_IF.9 MLINKS+=ieee80211.9 ieee80211_ifattach.9 \ ieee80211.9 ieee80211_ifdetach.9 MLINKS+=ieee80211_amrr.9 ieee80211_amrr_choose.9 \ ieee80211_amrr.9 ieee80211_amrr_cleanup.9 \ ieee80211_amrr.9 ieee80211_amrr_init.9 \ ieee80211_amrr.9 ieee80211_amrr_node_init.9 \ ieee80211_amrr.9 ieee80211_amrr_setinterval.9 \ ieee80211_amrr.9 ieee80211_amrr_tx_complete.9 \ ieee80211_amrr.9 ieee80211_amrr_tx_update.9 MLINKS+=ieee80211_beacon.9 ieee80211_beacon_alloc.9 \ ieee80211_beacon.9 ieee80211_beacon_notify.9 \ ieee80211_beacon.9 ieee80211_beacon_update.9 MLINKS+=ieee80211_bmiss.9 ieee80211_beacon_miss.9 MLINKS+=ieee80211_crypto.9 ieee80211_crypto_available.9 \ ieee80211_crypto.9 ieee80211_crypto_decap.9 \ ieee80211_crypto.9 ieee80211_crypto_delglobalkeys.9 \ ieee80211_crypto.9 ieee80211_crypto_delkey.9 \ ieee80211_crypto.9 ieee80211_crypto_demic.9 \ ieee80211_crypto.9 ieee80211_crypto_encap.9 \ ieee80211_crypto.9 ieee80211_crypto_enmic.9 \ ieee80211_crypto.9 ieee80211_crypto_newkey.9 \ ieee80211_crypto.9 ieee80211_crypto_register.9 \ ieee80211_crypto.9 ieee80211_crypto_reload_keys.9 \ ieee80211_crypto.9 ieee80211_crypto_setkey.9 \ ieee80211_crypto.9 ieee80211_crypto_unregister.9 \ ieee80211_crypto.9 ieee80211_key_update_begin.9 \ ieee80211_crypto.9 ieee80211_key_update_end.9 \ ieee80211_crypto.9 ieee80211_notify_michael_failure.9 \ ieee80211_crypto.9 ieee80211_notify_replay_failure.9 MLINKS+=ieee80211_input.9 ieee80211_input_all.9 MLINKS+=ieee80211_node.9 ieee80211_dump_node.9 \ ieee80211_node.9 ieee80211_dump_nodes.9 \ ieee80211_node.9 ieee80211_find_rxnode.9 \ ieee80211_node.9 ieee80211_find_rxnode_withkey.9 \ ieee80211_node.9 ieee80211_free_node.9 \ ieee80211_node.9 ieee80211_iterate_nodes.9 \ ieee80211_node.9 ieee80211_ref_node.9 \ ieee80211_node.9 ieee80211_unref_node.9 MLINKS+=ieee80211_output.9 ieee80211_process_callback.9 \ ieee80211_output.9 M_SEQNO_GET.9 \ ieee80211_output.9 M_WME_GETAC.9 MLINKS+=ieee80211_proto.9 ieee80211_new_state.9 \ ieee80211_proto.9 ieee80211_resume_all.9 \ ieee80211_proto.9 ieee80211_start_all.9 \ ieee80211_proto.9 ieee80211_stop_all.9 \ ieee80211_proto.9 ieee80211_suspend_all.9 \ ieee80211_proto.9 ieee80211_waitfor_parent.9 MLINKS+=ieee80211_radiotap.9 ieee80211_radiotap_active.9 \ ieee80211_radiotap.9 ieee80211_radiotap_active_vap.9 \ ieee80211_radiotap.9 ieee80211_radiotap_attach.9 \ ieee80211_radiotap.9 ieee80211_radiotap_tx.9 \ ieee80211_radiotap.9 radiotap.9 MLINKS+=ieee80211_regdomain.9 ieee80211_alloc_countryie.9 \ ieee80211_regdomain.9 ieee80211_init_channels.9 \ ieee80211_regdomain.9 ieee80211_sort_channels.9 MLINKS+=ieee80211_scan.9 ieee80211_add_scan.9 \ ieee80211_scan.9 ieee80211_bg_scan.9 \ ieee80211_scan.9 ieee80211_cancel_scan.9 \ ieee80211_scan.9 ieee80211_cancel_scan_any.9 \ ieee80211_scan.9 ieee80211_check_scan.9 \ ieee80211_scan.9 ieee80211_check_scan_current.9 \ ieee80211_scan.9 ieee80211_flush.9 \ ieee80211_scan.9 ieee80211_probe_curchan.9 \ ieee80211_scan.9 ieee80211_scan_assoc_fail.9 \ ieee80211_scan.9 ieee80211_scan_done.9 \ ieee80211_scan.9 ieee80211_scan_dump_channels.9 \ ieee80211_scan.9 ieee80211_scan_flush.9 \ ieee80211_scan.9 ieee80211_scan_iterate.9 \ ieee80211_scan.9 ieee80211_scan_next.9 \ ieee80211_scan.9 ieee80211_scan_timeout.9 \ ieee80211_scan.9 ieee80211_scanner_get.9 \ ieee80211_scan.9 ieee80211_scanner_register.9 \ ieee80211_scan.9 ieee80211_scanner_unregister.9 \ ieee80211_scan.9 ieee80211_scanner_unregister_all.9 \ ieee80211_scan.9 ieee80211_start_scan.9 MLINKS+=ieee80211_vap.9 ieee80211_vap_attach.9 \ ieee80211_vap.9 ieee80211_vap_detach.9 \ ieee80211_vap.9 ieee80211_vap_setup.9 MLINKS+=iflibdd.9 ifdi_attach_pre.9 \ iflibdd.9 ifdi_attach_post.9 \ iflibdd.9 ifdi_detach.9 \ iflibdd.9 ifdi_get_counter.9 \ iflibdd.9 ifdi_i2c_req.9 \ iflibdd.9 ifdi_init.9 \ iflibdd.9 ifdi_intr_enable.9 \ iflibdd.9 ifdi_intr_disable.9 \ iflibdd.9 ifdi_led_func.9 \ iflibdd.9 ifdi_link_intr_enable.9 \ iflibdd.9 ifdi_media_set.9 \ iflibdd.9 ifdi_media_status.9 \ iflibdd.9 ifdi_media_change.9 \ iflibdd.9 ifdi_mtu_set.9 \ iflibdd.9 ifdi_multi_set.9 \ iflibdd.9 ifdi_promisc_set.9 \ iflibdd.9 ifdi_queues_alloc.9 \ iflibdd.9 ifdi_queues_free.9 \ iflibdd.9 ifdi_queue_intr_enable.9 \ iflibdd.9 ifdi_resume.9 \ iflibdd.9 ifdi_rxq_setup.9 \ iflibdd.9 ifdi_stop.9 \ iflibdd.9 ifdi_suspend.9 \ iflibdd.9 ifdi_sysctl_int_delay.9 \ iflibdd.9 ifdi_timer.9 \ iflibdd.9 ifdi_txq_setup.9 \ iflibdd.9 ifdi_update_admin_status.9 \ iflibdd.9 ifdi_vf_add.9 \ iflibdd.9 ifdi_vflr_handle.9 \ iflibdd.9 ifdi_vlan_register.9 \ iflibdd.9 ifdi_vlan_unregister.9 \ iflibdd.9 ifdi_watchdog_reset.9 \ iflibdd.9 iov_init.9 \ iflibdd.9 iov_uinit.9 MLINKS+=iflibdi.9 iflib_add_int_delay_sysctl.9 \ iflibdi.9 iflib_device_attach.9 \ iflibdi.9 iflib_device_deregister.9 \ iflibdi.9 iflib_device_detach.9 \ iflibdi.9 iflib_device_suspend.9 \ iflibdi.9 iflib_device_register.9 \ iflibdi.9 iflib_device_resume.9 \ iflibdi.9 iflib_led_create.9 \ iflibdi.9 iflib_irq_alloc.9 \ iflibdi.9 iflib_irq_alloc_generic.9 \ iflibdi.9 iflib_link_intr_deferred.9 \ iflibdi.9 iflib_link_state_change.9 \ iflibdi.9 iflib_rx_intr_deferred.9 \ iflibdi.9 iflib_tx_intr_deferred.9 MLINKS+=iflibtxrx.9 isc_rxd_available.9 \ iflibtxrx.9 isc_rxd_refill.9 \ iflibtxrx.9 isc_rxd_flush.9 \ iflibtxrx.9 isc_rxd_pkt_get.9 \ iflibtxrx.9 isc_txd_credits_update.9 \ iflibtxrx.9 isc_txd_encap.9 \ iflibtxrx.9 isc_txd_flush.9 MLINKS+=ifnet.9 if_addmulti.9 \ ifnet.9 if_alloc.9 \ ifnet.9 if_allmulti.9 \ ifnet.9 if_attach.9 \ ifnet.9 if_data.9 \ ifnet.9 IF_DEQUEUE.9 \ ifnet.9 if_delmulti.9 \ ifnet.9 if_detach.9 \ ifnet.9 if_down.9 \ ifnet.9 if_findmulti.9 \ ifnet.9 if_free.9 \ ifnet.9 if_free_type.9 \ ifnet.9 if_up.9 \ ifnet.9 ifa_free.9 \ ifnet.9 ifa_ifwithaddr.9 \ ifnet.9 ifa_ifwithdstaddr.9 \ ifnet.9 ifa_ifwithnet.9 \ ifnet.9 ifa_ref.9 \ ifnet.9 ifaddr.9 \ ifnet.9 ifaddr_byindex.9 \ ifnet.9 ifaof_ifpforaddr.9 \ ifnet.9 ifioctl.9 \ ifnet.9 ifpromisc.9 \ ifnet.9 ifqueue.9 \ ifnet.9 ifunit.9 \ ifnet.9 ifunit_ref.9 MLINKS+=insmntque.9 insmntque1.9 MLINKS+=ithread.9 ithread_add_handler.9 \ ithread.9 ithread_create.9 \ ithread.9 ithread_destroy.9 \ ithread.9 ithread_priority.9 \ ithread.9 ithread_remove_handler.9 \ ithread.9 ithread_schedule.9 MLINKS+=kernacc.9 useracc.9 MLINKS+=kernel_mount.9 free_mntarg.9 \ kernel_mount.9 kernel_vmount.9 \ kernel_mount.9 mount_arg.9 \ kernel_mount.9 mount_argb.9 \ kernel_mount.9 mount_argf.9 \ kernel_mount.9 mount_argsu.9 MLINKS+=khelp.9 khelp_add_hhook.9 \ khelp.9 KHELP_DECLARE_MOD.9 \ khelp.9 KHELP_DECLARE_MOD_UMA.9 \ khelp.9 khelp_destroy_osd.9 \ khelp.9 khelp_get_id.9 \ khelp.9 khelp_get_osd.9 \ khelp.9 khelp_init_osd.9 \ khelp.9 khelp_remove_hhook.9 MLINKS+=kobj.9 DEFINE_CLASS.9 \ kobj.9 kobj_class_compile.9 \ kobj.9 kobj_class_compile_static.9 \ kobj.9 kobj_class_free.9 \ kobj.9 kobj_create.9 \ kobj.9 kobj_delete.9 \ kobj.9 kobj_init.9 \ kobj.9 kobj_init_static.9 MLINKS+=kproc.9 kproc_create.9 \ kproc.9 kproc_exit.9 \ kproc.9 kproc_kthread_add.9 \ kproc.9 kproc_resume.9 \ kproc.9 kproc_shutdown.9 \ kproc.9 kproc_start.9 \ kproc.9 kproc_suspend.9 \ kproc.9 kproc_suspend_check.9 \ kproc.9 kthread_create.9 MLINKS+=kqueue.9 knlist_add.9 \ kqueue.9 knlist_clear.9 \ kqueue.9 knlist_delete.9 \ kqueue.9 knlist_destroy.9 \ kqueue.9 knlist_empty.9 \ kqueue.9 knlist_init.9 \ kqueue.9 knlist_init_mtx.9 \ kqueue.9 knlist_init_rw_reader.9 \ kqueue.9 knlist_remove.9 \ kqueue.9 knlist_remove_inevent.9 \ kqueue.9 knote_fdclose.9 \ kqueue.9 KNOTE_LOCKED.9 \ kqueue.9 KNOTE_UNLOCKED.9 \ kqueue.9 kqfd_register.9 \ kqueue.9 kqueue_add_filteropts.9 \ kqueue.9 kqueue_del_filteropts.9 MLINKS+=kthread.9 kthread_add.9 \ kthread.9 kthread_exit.9 \ kthread.9 kthread_resume.9 \ kthread.9 kthread_shutdown.9 \ kthread.9 kthread_start.9 \ kthread.9 kthread_suspend.9 \ kthread.9 kthread_suspend_check.9 MLINKS+=ktr.9 CTR0.9 \ ktr.9 CTR1.9 \ ktr.9 CTR2.9 \ ktr.9 CTR3.9 \ ktr.9 CTR4.9 \ ktr.9 CTR5.9 \ ktr.9 CTR6.9 MLINKS+=lock.9 lockdestroy.9 \ lock.9 lockinit.9 \ lock.9 lockmgr.9 \ lock.9 lockmgr_args.9 \ lock.9 lockmgr_args_rw.9 \ lock.9 lockmgr_assert.9 \ lock.9 lockmgr_disown.9 \ lock.9 lockmgr_printinfo.9 \ lock.9 lockmgr_recursed.9 \ lock.9 lockmgr_rw.9 \ lock.9 lockstatus.9 MLINKS+=LOCK_PROFILING.9 MUTEX_PROFILING.9 MLINKS+=make_dev.9 destroy_dev.9 \ make_dev.9 destroy_dev_drain.9 \ make_dev.9 destroy_dev_sched.9 \ make_dev.9 destroy_dev_sched_cb.9 \ make_dev.9 dev_depends.9 \ make_dev.9 make_dev_alias.9 \ make_dev.9 make_dev_alias_p.9 \ make_dev.9 make_dev_cred.9 \ make_dev.9 make_dev_credf.9 \ make_dev.9 make_dev_p.9 \ make_dev.9 make_dev_s.9 MLINKS+=malloc.9 free.9 \ malloc.9 MALLOC_DECLARE.9 \ malloc.9 MALLOC_DEFINE.9 \ malloc.9 realloc.9 \ malloc.9 reallocf.9 MLINKS+=mbchain.9 mb_detach.9 \ mbchain.9 mb_done.9 \ mbchain.9 mb_fixhdr.9 \ mbchain.9 mb_init.9 \ mbchain.9 mb_initm.9 \ mbchain.9 mb_put_int64be.9 \ mbchain.9 mb_put_int64le.9 \ mbchain.9 mb_put_mbuf.9 \ mbchain.9 mb_put_mem.9 \ mbchain.9 mb_put_uint16be.9 \ mbchain.9 mb_put_uint16le.9 \ mbchain.9 mb_put_uint32be.9 \ mbchain.9 mb_put_uint32le.9 \ mbchain.9 mb_put_uint8.9 \ mbchain.9 mb_put_uio.9 \ mbchain.9 mb_reserve.9 MLINKS+=\ mbuf.9 m_adj.9 \ mbuf.9 m_align.9 \ mbuf.9 M_ALIGN.9 \ mbuf.9 m_append.9 \ mbuf.9 m_apply.9 \ mbuf.9 m_cat.9 \ mbuf.9 m_catpkt.9 \ mbuf.9 MCHTYPE.9 \ mbuf.9 MCLGET.9 \ mbuf.9 m_collapse.9 \ mbuf.9 m_copyback.9 \ mbuf.9 m_copydata.9 \ mbuf.9 m_copym.9 \ mbuf.9 m_copypacket.9 \ mbuf.9 m_copyup.9 \ mbuf.9 m_defrag.9 \ mbuf.9 m_devget.9 \ mbuf.9 m_dup.9 \ mbuf.9 m_dup_pkthdr.9 \ mbuf.9 MEXTADD.9 \ mbuf.9 m_fixhdr.9 \ mbuf.9 m_free.9 \ mbuf.9 m_freem.9 \ mbuf.9 MGET.9 \ mbuf.9 m_get.9 \ mbuf.9 m_get2.9 \ mbuf.9 m_getjcl.9 \ mbuf.9 m_getcl.9 \ mbuf.9 MGETHDR.9 \ mbuf.9 m_gethdr.9 \ mbuf.9 m_getm.9 \ mbuf.9 m_getptr.9 \ mbuf.9 MH_ALIGN.9 \ mbuf.9 M_LEADINGSPACE.9 \ mbuf.9 m_length.9 \ mbuf.9 M_MOVE_PKTHDR.9 \ mbuf.9 m_move_pkthdr.9 \ mbuf.9 M_PREPEND.9 \ mbuf.9 m_prepend.9 \ mbuf.9 m_pulldown.9 \ mbuf.9 m_pullup.9 \ mbuf.9 m_split.9 \ mbuf.9 mtod.9 \ mbuf.9 M_TRAILINGSPACE.9 \ mbuf.9 m_unshare.9 \ mbuf.9 M_WRITABLE.9 MLINKS+=\ mbuf_tags.9 m_tag_alloc.9 \ mbuf_tags.9 m_tag_copy.9 \ mbuf_tags.9 m_tag_copy_chain.9 \ mbuf_tags.9 m_tag_delete.9 \ mbuf_tags.9 m_tag_delete_chain.9 \ mbuf_tags.9 m_tag_delete_nonpersistent.9 \ mbuf_tags.9 m_tag_find.9 \ mbuf_tags.9 m_tag_first.9 \ mbuf_tags.9 m_tag_free.9 \ mbuf_tags.9 m_tag_get.9 \ mbuf_tags.9 m_tag_init.9 \ mbuf_tags.9 m_tag_locate.9 \ mbuf_tags.9 m_tag_next.9 \ mbuf_tags.9 m_tag_prepend.9 \ mbuf_tags.9 m_tag_unlink.9 MLINKS+=MD5.9 MD5Init.9 \ MD5.9 MD5Transform.9 MLINKS+=mdchain.9 md_append_record.9 \ mdchain.9 md_done.9 \ mdchain.9 md_get_int64.9 \ mdchain.9 md_get_int64be.9 \ mdchain.9 md_get_int64le.9 \ mdchain.9 md_get_mbuf.9 \ mdchain.9 md_get_mem.9 \ mdchain.9 md_get_uint16.9 \ mdchain.9 md_get_uint16be.9 \ mdchain.9 md_get_uint16le.9 \ mdchain.9 md_get_uint32.9 \ mdchain.9 md_get_uint32be.9 \ mdchain.9 md_get_uint32le.9 \ mdchain.9 md_get_uint8.9 \ mdchain.9 md_get_uio.9 \ mdchain.9 md_initm.9 \ mdchain.9 md_next_record.9 MLINKS+=microtime.9 bintime.9 \ microtime.9 getbintime.9 \ microtime.9 getmicrotime.9 \ microtime.9 getnanotime.9 \ microtime.9 nanotime.9 MLINKS+=microuptime.9 binuptime.9 \ microuptime.9 getbinuptime.9 \ microuptime.9 getmicrouptime.9 \ microuptime.9 getnanouptime.9 \ microuptime.9 getsbinuptime.9 \ microuptime.9 nanouptime.9 \ microuptime.9 sbinuptime.9 MLINKS+=mi_switch.9 cpu_switch.9 \ mi_switch.9 cpu_throw.9 MLINKS+=mod_cc.9 CCV.9 \ mod_cc.9 DECLARE_CC_MODULE.9 MLINKS+=mtx_pool.9 mtx_pool_alloc.9 \ mtx_pool.9 mtx_pool_create.9 \ mtx_pool.9 mtx_pool_destroy.9 \ mtx_pool.9 mtx_pool_find.9 \ mtx_pool.9 mtx_pool_lock.9 \ mtx_pool.9 mtx_pool_lock_spin.9 \ mtx_pool.9 mtx_pool_unlock.9 \ mtx_pool.9 mtx_pool_unlock_spin.9 MLINKS+=mutex.9 mtx_assert.9 \ mutex.9 mtx_destroy.9 \ mutex.9 mtx_init.9 \ mutex.9 mtx_initialized.9 \ mutex.9 mtx_lock.9 \ mutex.9 mtx_lock_flags.9 \ mutex.9 mtx_lock_spin.9 \ mutex.9 mtx_lock_spin_flags.9 \ mutex.9 mtx_owned.9 \ mutex.9 mtx_recursed.9 \ mutex.9 mtx_sleep.9 \ mutex.9 MTX_SYSINIT.9 \ mutex.9 mtx_trylock.9 \ mutex.9 mtx_trylock_flags.9 \ mutex.9 mtx_trylock_spin.9 \ mutex.9 mtx_trylock_spin_flags.9 \ mutex.9 mtx_unlock.9 \ mutex.9 mtx_unlock_flags.9 \ mutex.9 mtx_unlock_spin.9 \ mutex.9 mtx_unlock_spin_flags.9 MLINKS+=namei.9 NDFREE.9 \ namei.9 NDINIT.9 MLINKS+=netisr.9 netisr_clearqdrops.9 \ netisr.9 netisr_default_flow2cpu.9 \ netisr.9 netisr_dispatch.9 \ netisr.9 netisr_dispatch_src.9 \ netisr.9 netisr_get_cpucount.9 \ netisr.9 netisr_get_cpuid.9 \ netisr.9 netisr_getqdrops.9 \ netisr.9 netisr_getqlimit.9 \ netisr.9 netisr_queue.9 \ netisr.9 netisr_queue_src.9 \ netisr.9 netisr_register.9 \ netisr.9 netisr_setqlimit.9 \ netisr.9 netisr_unregister.9 MLINKS+=nv.9 libnv.9 \ nv.9 nvlist.9 \ nv.9 nvlist_add_binary.9 \ nv.9 nvlist_add_bool.9 \ nv.9 nvlist_add_bool_array.9 \ nv.9 nvlist_add_descriptor.9 \ nv.9 nvlist_add_descriptor_array.9 \ nv.9 nvlist_add_null.9 \ nv.9 nvlist_add_number.9 \ nv.9 nvlist_add_number_array.9 \ nv.9 nvlist_add_nvlist.9 \ nv.9 nvlist_add_nvlist_array.9 \ nv.9 nvlist_add_string.9 \ nv.9 nvlist_add_stringf.9 \ nv.9 nvlist_add_stringv.9 \ nv.9 nvlist_add_string_array.9 \ nv.9 nvlist_clone.9 \ nv.9 nvlist_create.9 \ nv.9 nvlist_destroy.9 \ nv.9 nvlist_dump.9 \ nv.9 nvlist_empty.9 \ nv.9 nvlist_error.9 \ nv.9 nvlist_exists.9 \ nv.9 nvlist_exists_binary.9 \ nv.9 nvlist_exists_bool.9 \ nv.9 nvlist_exists_bool_array.9 \ nv.9 nvlist_exists_descriptor.9 \ nv.9 nvlist_exists_descriptor_array.9 \ nv.9 nvlist_exists_null.9 \ nv.9 nvlist_exists_number.9 \ nv.9 nvlist_exists_number_array.9 \ nv.9 nvlist_exists_nvlist.9 \ nv.9 nvlist_exists_nvlist_array.9 \ nv.9 nvlist_exists_string.9 \ nv.9 nvlist_exists_type.9 \ nv.9 nvlist_fdump.9 \ nv.9 nvlist_flags.9 \ nv.9 nvlist_free.9 \ nv.9 nvlist_free_binary.9 \ nv.9 nvlist_free_bool.9 \ nv.9 nvlist_free_bool_array.9 \ nv.9 nvlist_free_descriptor.9 \ nv.9 nvlist_free_descriptor_array.9 \ nv.9 nvlist_free_null.9 \ nv.9 nvlist_free_number.9 \ nv.9 nvlist_free_number_array.9 \ nv.9 nvlist_free_nvlist.9 \ nv.9 nvlist_free_nvlist_array.9 \ nv.9 nvlist_free_string.9 \ nv.9 nvlist_free_string_array.9 \ nv.9 nvlist_free_type.9 \ nv.9 nvlist_get_binary.9 \ nv.9 nvlist_get_bool.9 \ nv.9 nvlist_get_bool_array.9 \ nv.9 nvlist_get_descriptor.9 \ nv.9 nvlist_get_descriptor_array.9 \ nv.9 nvlist_get_number.9 \ nv.9 nvlist_get_number_array.9 \ nv.9 nvlist_get_nvlist.9 \ nv.9 nvlist_get_nvlist_array.9 \ nv.9 nvlist_get_parent.9 \ nv.9 nvlist_get_string.9 \ nv.9 nvlist_get_string_array.9 \ nv.9 nvlist_move_binary.9 \ nv.9 nvlist_move_descriptor.9 \ nv.9 nvlist_move_descriptor_array.9 \ nv.9 nvlist_move_nvlist.9 \ nv.9 nvlist_move_nvlist_array.9 \ nv.9 nvlist_move_string.9 \ nv.9 nvlist_move_string_array.9 \ nv.9 nvlist_next.9 \ nv.9 nvlist_pack.9 \ nv.9 nvlist_recv.9 \ nv.9 nvlist_send.9 \ nv.9 nvlist_set_error.9 \ nv.9 nvlist_size.9 \ nv.9 nvlist_take_binary.9 \ nv.9 nvlist_take_bool.9 \ nv.9 nvlist_take_bool_array.9 \ nv.9 nvlist_take_descriptor.9 \ nv.9 nvlist_take_descriptor_array.9 \ nv.9 nvlist_take_number.9 \ nv.9 nvlist_take_number_array.9 \ nv.9 nvlist_take_nvlist.9 \ nv.9 nvlist_take_nvlist_array.9 \ nv.9 nvlist_take_string.9 \ nv.9 nvlist_take_string_array.9 \ nv.9 nvlist_unpack.9 \ nv.9 nvlist_xfer.9 MLINKS+=osd.9 osd_call.9 \ osd.9 osd_del.9 \ osd.9 osd_deregister.9 \ osd.9 osd_exit.9 \ osd.9 osd_get.9 \ osd.9 osd_register.9 \ osd.9 osd_set.9 MLINKS+=panic.9 vpanic.9 MLINKS+=pbuf.9 getpbuf.9 \ pbuf.9 relpbuf.9 \ pbuf.9 trypbuf.9 MLINKS+=PCBGROUP.9 in_pcbgroup_byhash.9 \ PCBGROUP.9 in_pcbgroup_byinpcb.9 \ PCBGROUP.9 in_pcbgroup_destroy.9 \ PCBGROUP.9 in_pcbgroup_enabled.9 \ PCBGROUP.9 in_pcbgroup_init.9 \ PCBGROUP.9 in_pcbgroup_remove.9 \ PCBGROUP.9 in_pcbgroup_update.9 \ PCBGROUP.9 in_pcbgroup_update_mbuf.9 \ PCBGROUP.9 in6_pcbgroup_byhash.9 MLINKS+=pci.9 pci_alloc_msi.9 \ pci.9 pci_alloc_msix.9 \ pci.9 pci_disable_busmaster.9 \ pci.9 pci_disable_io.9 \ pci.9 pci_enable_busmaster.9 \ pci.9 pci_enable_io.9 \ pci.9 pci_find_bsf.9 \ pci.9 pci_find_cap.9 \ pci.9 pci_find_dbsf.9 \ pci.9 pci_find_device.9 \ pci.9 pci_find_extcap.9 \ pci.9 pci_find_htcap.9 \ pci.9 pci_find_pcie_root_port.9 \ pci.9 pci_get_id.9 \ pci.9 pci_get_max_read_req.9 \ pci.9 pci_get_powerstate.9 \ pci.9 pci_get_vpd_ident.9 \ pci.9 pci_get_vpd_readonly.9 \ pci.9 pci_iov_attach.9 \ pci.9 pci_iov_attach_name.9 \ pci.9 pci_iov_detach.9 \ pci.9 pci_msi_count.9 \ pci.9 pci_msix_count.9 \ pci.9 pci_msix_pba_bar.9 \ pci.9 pci_msix_table_bar.9 \ pci.9 pci_pending_msix.9 \ pci.9 pci_read_config.9 \ pci.9 pci_release_msi.9 \ pci.9 pci_remap_msix.9 \ pci.9 pci_restore_state.9 \ pci.9 pci_save_state.9 \ pci.9 pci_set_powerstate.9 \ pci.9 pci_set_max_read_req.9 \ pci.9 pci_write_config.9 \ pci.9 pcie_adjust_config.9 \ pci.9 pcie_flr.9 \ pci.9 pcie_max_completion_timeout.9 \ pci.9 pcie_read_config.9 \ pci.9 pcie_wait_for_pending_transactions.9 \ pci.9 pcie_write_config.9 MLINKS+=pci_iov_schema.9 pci_iov_schema_alloc_node.9 \ pci_iov_schema.9 pci_iov_schema_add_bool.9 \ pci_iov_schema.9 pci_iov_schema_add_string.9 \ pci_iov_schema.9 pci_iov_schema_add_uint8.9 \ pci_iov_schema.9 pci_iov_schema_add_uint16.9 \ pci_iov_schema.9 pci_iov_schema_add_uint32.9 \ pci_iov_schema.9 pci_iov_schema_add_uint64.9 \ pci_iov_schema.9 pci_iov_schema_add_unicast_mac.9 MLINKS+=pfil.9 pfil_add_hook.9 \ pfil.9 pfil_head_register.9 \ pfil.9 pfil_head_unregister.9 \ pfil.9 pfil_hook_get.9 \ pfil.9 pfil_remove_hook.9 \ pfil.9 pfil_rlock.9 \ pfil.9 pfil_run_hooks.9 \ pfil.9 pfil_runlock.9 \ pfil.9 pfil_wlock.9 \ pfil.9 pfil_wunlock.9 MLINKS+=pfind.9 zpfind.9 MLINKS+=PHOLD.9 PRELE.9 \ PHOLD.9 _PHOLD.9 \ PHOLD.9 _PRELE.9 \ PHOLD.9 PROC_ASSERT_HELD.9 \ PHOLD.9 PROC_ASSERT_NOT_HELD.9 MLINKS+=pmap_copy.9 pmap_copy_page.9 MLINKS+=pmap_extract.9 pmap_extract_and_hold.9 MLINKS+=pmap_init.9 pmap_init2.9 MLINKS+=pmap_is_modified.9 pmap_ts_referenced.9 MLINKS+=pmap_pinit.9 pmap_pinit0.9 \ pmap_pinit.9 pmap_pinit2.9 MLINKS+=pmap_qenter.9 pmap_qremove.9 MLINKS+=pmap_quick_enter_page.9 pmap_quick_remove_page.9 MLINKS+=pmap_remove.9 pmap_remove_all.9 \ pmap_remove.9 pmap_remove_pages.9 MLINKS+=pmap_resident_count.9 pmap_wired_count.9 MLINKS+=pmap_zero_page.9 pmap_zero_area.9 MLINKS+=printf.9 log.9 \ printf.9 tprintf.9 \ printf.9 uprintf.9 MLINKS+=priv.9 priv_check.9 \ priv.9 priv_check_cred.9 MLINKS+=proc_rwmem.9 proc_readmem.9 \ proc_rwmem.9 proc_writemem.9 MLINKS+=psignal.9 gsignal.9 \ psignal.9 pgsignal.9 \ psignal.9 tdsignal.9 MLINKS+=random.9 arc4rand.9 \ random.9 arc4random.9 \ random.9 read_random.9 \ random.9 read_random_uio.9 \ random.9 srandom.9 MLINKS+=random_harvest.9 random_harvest_direct.9 \ random_harvest.9 random_harvest_fast.9 \ random_harvest.9 random_harvest_queue.9 MLINKS+=refcount.9 refcount_acquire.9 \ refcount.9 refcount_init.9 \ refcount.9 refcount_release.9 MLINKS+=resource_int_value.9 resource_long_value.9 \ resource_int_value.9 resource_string_value.9 MLINKS+=rman.9 rman_activate_resource.9 \ rman.9 rman_adjust_resource.9 \ rman.9 rman_deactivate_resource.9 \ rman.9 rman_fini.9 \ rman.9 rman_first_free_region.9 \ rman.9 rman_get_bushandle.9 \ rman.9 rman_get_bustag.9 \ rman.9 rman_get_device.9 \ rman.9 rman_get_end.9 \ rman.9 rman_get_flags.9 \ rman.9 rman_get_mapping.9 \ rman.9 rman_get_rid.9 \ rman.9 rman_get_size.9 \ rman.9 rman_get_start.9 \ rman.9 rman_get_virtual.9 \ rman.9 rman_init.9 \ rman.9 rman_init_from_resource.9 \ rman.9 rman_is_region_manager.9 \ rman.9 rman_last_free_region.9 \ rman.9 rman_make_alignment_flags.9 \ rman.9 rman_manage_region.9 \ rman.9 rman_release_resource.9 \ rman.9 rman_reserve_resource.9 \ rman.9 rman_reserve_resource_bound.9 \ rman.9 rman_set_bushandle.9 \ rman.9 rman_set_bustag.9 \ rman.9 rman_set_mapping.9 \ rman.9 rman_set_rid.9 \ rman.9 rman_set_virtual.9 MLINKS+=rmlock.9 rm_assert.9 \ rmlock.9 rm_destroy.9 \ rmlock.9 rm_init.9 \ rmlock.9 rm_init_flags.9 \ rmlock.9 rm_rlock.9 \ rmlock.9 rm_runlock.9 \ rmlock.9 rm_sleep.9 \ rmlock.9 RM_SYSINIT.9 \ rmlock.9 RM_SYSINIT_FLAGS.9 \ rmlock.9 rm_try_rlock.9 \ rmlock.9 rm_wlock.9 \ rmlock.9 rm_wowned.9 \ rmlock.9 rm_wunlock.9 MLINKS+=rtalloc.9 rtalloc1.9 \ rtalloc.9 rtalloc_ign.9 \ rtalloc.9 RT_ADDREF.9 \ rtalloc.9 RT_LOCK.9 \ rtalloc.9 RT_REMREF.9 \ rtalloc.9 RT_RTFREE.9 \ rtalloc.9 RT_UNLOCK.9 \ rtalloc.9 RTFREE_LOCKED.9 \ rtalloc.9 RTFREE.9 \ rtalloc.9 rtfree.9 \ rtalloc.9 rtalloc1_fib.9 \ rtalloc.9 rtalloc_ign_fib.9 \ rtalloc.9 rtalloc_fib.9 MLINKS+=runqueue.9 choosethread.9 \ runqueue.9 procrunnable.9 \ runqueue.9 remrunqueue.9 \ runqueue.9 setrunqueue.9 MLINKS+=rwlock.9 rw_assert.9 \ rwlock.9 rw_destroy.9 \ rwlock.9 rw_downgrade.9 \ rwlock.9 rw_init.9 \ rwlock.9 rw_init_flags.9 \ rwlock.9 rw_initialized.9 \ rwlock.9 rw_rlock.9 \ rwlock.9 rw_runlock.9 \ rwlock.9 rw_unlock.9 \ rwlock.9 rw_sleep.9 \ rwlock.9 RW_SYSINIT.9 \ rwlock.9 RW_SYSINIT_FLAGS.9 \ rwlock.9 rw_try_rlock.9 \ rwlock.9 rw_try_upgrade.9 \ rwlock.9 rw_try_wlock.9 \ rwlock.9 rw_wlock.9 \ rwlock.9 rw_wowned.9 \ rwlock.9 rw_wunlock.9 MLINKS+=sbuf.9 sbuf_bcat.9 \ sbuf.9 sbuf_bcopyin.9 \ sbuf.9 sbuf_bcpy.9 \ sbuf.9 sbuf_cat.9 \ sbuf.9 sbuf_clear.9 \ sbuf.9 sbuf_clear_flags.9 \ sbuf.9 sbuf_copyin.9 \ sbuf.9 sbuf_cpy.9 \ sbuf.9 sbuf_data.9 \ sbuf.9 sbuf_delete.9 \ sbuf.9 sbuf_done.9 \ sbuf.9 sbuf_error.9 \ sbuf.9 sbuf_finish.9 \ sbuf.9 sbuf_get_flags.9 \ sbuf.9 sbuf_hexdump.9 \ sbuf.9 sbuf_len.9 \ sbuf.9 sbuf_new.9 \ sbuf.9 sbuf_new_auto.9 \ sbuf.9 sbuf_new_for_sysctl.9 \ sbuf.9 sbuf_printf.9 \ sbuf.9 sbuf_putc.9 \ sbuf.9 sbuf_set_drain.9 \ sbuf.9 sbuf_set_flags.9 \ sbuf.9 sbuf_setpos.9 \ sbuf.9 sbuf_start_section.9 \ sbuf.9 sbuf_end_section.9 \ sbuf.9 sbuf_trim.9 \ sbuf.9 sbuf_vprintf.9 MLINKS+=scheduler.9 curpriority_cmp.9 \ scheduler.9 maybe_resched.9 \ scheduler.9 propagate_priority.9 \ scheduler.9 resetpriority.9 \ scheduler.9 roundrobin.9 \ scheduler.9 roundrobin_interval.9 \ scheduler.9 schedclock.9 \ scheduler.9 schedcpu.9 \ scheduler.9 sched_setup.9 \ scheduler.9 setrunnable.9 \ scheduler.9 updatepri.9 MLINKS+=SDT.9 SDT_PROVIDER_DECLARE.9 \ SDT.9 SDT_PROVIDER_DEFINE.9 \ SDT.9 SDT_PROBE_DECLARE.9 \ SDT.9 SDT_PROBE_DEFINE.9 \ SDT.9 SDT_PROBE.9 MLINKS+=securelevel_gt.9 securelevel_ge.9 MLINKS+=selrecord.9 seldrain.9 \ selrecord.9 selwakeup.9 MLINKS+=sema.9 sema_destroy.9 \ sema.9 sema_init.9 \ sema.9 sema_post.9 \ sema.9 sema_timedwait.9 \ sema.9 sema_trywait.9 \ sema.9 sema_value.9 \ sema.9 sema_wait.9 MLINKS+=sf_buf.9 sf_buf_alloc.9 \ sf_buf.9 sf_buf_free.9 \ sf_buf.9 sf_buf_kva.9 \ sf_buf.9 sf_buf_page.9 MLINKS+=sglist.9 sglist_alloc.9 \ sglist.9 sglist_append.9 \ sglist.9 sglist_append_bio.9 \ sglist.9 sglist_append_mbuf.9 \ sglist.9 sglist_append_phys.9 \ sglist.9 sglist_append_sglist.9 \ sglist.9 sglist_append_uio.9 \ sglist.9 sglist_append_user.9 \ sglist.9 sglist_append_vmpages.9 \ sglist.9 sglist_build.9 \ sglist.9 sglist_clone.9 \ sglist.9 sglist_consume_uio.9 \ sglist.9 sglist_count.9 \ sglist.9 sglist_count_vmpages.9 \ sglist.9 sglist_free.9 \ sglist.9 sglist_hold.9 \ sglist.9 sglist_init.9 \ sglist.9 sglist_join.9 \ sglist.9 sglist_length.9 \ sglist.9 sglist_reset.9 \ sglist.9 sglist_slice.9 \ sglist.9 sglist_split.9 MLINKS+=shm_map.9 shm_unmap.9 MLINKS+=signal.9 cursig.9 \ signal.9 execsigs.9 \ signal.9 issignal.9 \ signal.9 killproc.9 \ signal.9 pgsigio.9 \ signal.9 postsig.9 \ signal.9 SETSETNEQ.9 \ signal.9 SETSETOR.9 \ signal.9 SIGADDSET.9 \ signal.9 SIG_CONTSIGMASK.9 \ signal.9 SIGDELSET.9 \ signal.9 SIGEMPTYSET.9 \ signal.9 sigexit.9 \ signal.9 SIGFILLSET.9 \ signal.9 siginit.9 \ signal.9 SIGISEMPTY.9 \ signal.9 SIGISMEMBER.9 \ signal.9 SIGNOTEMPTY.9 \ signal.9 signotify.9 \ signal.9 SIGPENDING.9 \ signal.9 SIGSETAND.9 \ signal.9 SIGSETCANTMASK.9 \ signal.9 SIGSETEQ.9 \ signal.9 SIGSETNAND.9 \ signal.9 SIG_STOPSIGMASK.9 \ signal.9 trapsignal.9 MLINKS+=sleep.9 msleep.9 \ sleep.9 msleep_sbt.9 \ sleep.9 msleep_spin.9 \ sleep.9 msleep_spin_sbt.9 \ sleep.9 pause.9 \ sleep.9 pause_sbt.9 \ sleep.9 tsleep.9 \ sleep.9 tsleep_sbt.9 \ sleep.9 wakeup.9 \ sleep.9 wakeup_one.9 MLINKS+=sleepqueue.9 init_sleepqueues.9 \ sleepqueue.9 sleepq_abort.9 \ sleepqueue.9 sleepq_add.9 \ sleepqueue.9 sleepq_alloc.9 \ sleepqueue.9 sleepq_broadcast.9 \ sleepqueue.9 sleepq_free.9 \ sleepqueue.9 sleepq_lookup.9 \ sleepqueue.9 sleepq_lock.9 \ sleepqueue.9 sleepq_release.9 \ sleepqueue.9 sleepq_remove.9 \ sleepqueue.9 sleepq_set_timeout.9 \ sleepqueue.9 sleepq_set_timeout_sbt.9 \ sleepqueue.9 sleepq_signal.9 \ sleepqueue.9 sleepq_sleepcnt.9 \ sleepqueue.9 sleepq_timedwait.9 \ sleepqueue.9 sleepq_timedwait_sig.9 \ sleepqueue.9 sleepq_type.9 \ sleepqueue.9 sleepq_wait.9 \ sleepqueue.9 sleepq_wait_sig.9 MLINKS+=socket.9 soabort.9 \ socket.9 soaccept.9 \ socket.9 sobind.9 \ socket.9 socheckuid.9 \ socket.9 soclose.9 \ socket.9 soconnect.9 \ socket.9 socreate.9 \ socket.9 sodisconnect.9 \ socket.9 sodupsockaddr.9 \ socket.9 sofree.9 \ socket.9 sogetopt.9 \ socket.9 sohasoutofband.9 \ socket.9 solisten.9 \ socket.9 solisten_proto.9 \ socket.9 solisten_proto_check.9 \ socket.9 sonewconn.9 \ socket.9 sooptcopyin.9 \ socket.9 sooptcopyout.9 \ socket.9 sopoll.9 \ socket.9 sopoll_generic.9 \ socket.9 soreceive.9 \ socket.9 soreceive_dgram.9 \ socket.9 soreceive_generic.9 \ socket.9 soreceive_stream.9 \ socket.9 soreserve.9 \ socket.9 sorflush.9 \ socket.9 sosend.9 \ socket.9 sosend_dgram.9 \ socket.9 sosend_generic.9 \ socket.9 sosetopt.9 \ socket.9 soshutdown.9 \ socket.9 sotoxsocket.9 \ socket.9 soupcall_clear.9 \ socket.9 soupcall_set.9 \ socket.9 sowakeup.9 MLINKS+=stack.9 stack_copy.9 \ stack.9 stack_create.9 \ stack.9 stack_destroy.9 \ stack.9 stack_print.9 \ stack.9 stack_print_ddb.9 \ stack.9 stack_print_short.9 \ stack.9 stack_print_short_ddb.9 \ stack.9 stack_put.9 \ stack.9 stack_save.9 \ stack.9 stack_sbuf_print.9 \ stack.9 stack_sbuf_print_ddb.9 \ stack.9 stack_zero.9 MLINKS+=store.9 subyte.9 \ store.9 suswintr.9 \ store.9 suword.9 \ store.9 suword16.9 \ store.9 suword32.9 \ store.9 suword64.9 MLINKS+=swi.9 swi_add.9 \ swi.9 swi_remove.9 \ swi.9 swi_sched.9 MLINKS+=sx.9 sx_assert.9 \ sx.9 sx_destroy.9 \ sx.9 sx_downgrade.9 \ sx.9 sx_init.9 \ sx.9 sx_init_flags.9 \ sx.9 sx_sleep.9 \ sx.9 sx_slock.9 \ sx.9 sx_slock_sig.9 \ sx.9 sx_sunlock.9 \ sx.9 SX_SYSINIT.9 \ sx.9 SX_SYSINIT_FLAGS.9 \ sx.9 sx_try_slock.9 \ sx.9 sx_try_upgrade.9 \ sx.9 sx_try_xlock.9 \ sx.9 sx_unlock.9 \ sx.9 sx_xholder.9 \ sx.9 sx_xlock.9 \ sx.9 sx_xlock_sig.9 \ sx.9 sx_xlocked.9 \ sx.9 sx_xunlock.9 MLINKS+=sysctl.9 SYSCTL_DECL.9 \ sysctl.9 SYSCTL_ADD_INT.9 \ sysctl.9 SYSCTL_ADD_LONG.9 \ sysctl.9 SYSCTL_ADD_NODE.9 \ sysctl.9 SYSCTL_ADD_NODE_WITH_LABEL.9 \ sysctl.9 SYSCTL_ADD_OPAQUE.9 \ sysctl.9 SYSCTL_ADD_PROC.9 \ sysctl.9 SYSCTL_ADD_QUAD.9 \ sysctl.9 SYSCTL_ADD_ROOT_NODE.9 \ sysctl.9 SYSCTL_ADD_S8.9 \ sysctl.9 SYSCTL_ADD_S16.9 \ sysctl.9 SYSCTL_ADD_S32.9 \ sysctl.9 SYSCTL_ADD_S64.9 \ sysctl.9 SYSCTL_ADD_STRING.9 \ sysctl.9 SYSCTL_ADD_STRUCT.9 \ sysctl.9 SYSCTL_ADD_U8.9 \ sysctl.9 SYSCTL_ADD_U16.9 \ sysctl.9 SYSCTL_ADD_U32.9 \ sysctl.9 SYSCTL_ADD_U64.9 \ sysctl.9 SYSCTL_ADD_UAUTO.9 \ sysctl.9 SYSCTL_ADD_UINT.9 \ sysctl.9 SYSCTL_ADD_ULONG.9 \ sysctl.9 SYSCTL_ADD_UQUAD.9 \ sysctl.9 SYSCTL_CHILDREN.9 \ sysctl.9 SYSCTL_STATIC_CHILDREN.9 \ sysctl.9 SYSCTL_NODE_CHILDREN.9 \ sysctl.9 SYSCTL_PARENT.9 \ sysctl.9 SYSCTL_INT.9 \ sysctl.9 SYSCTL_INT_WITH_LABEL.9 \ sysctl.9 SYSCTL_LONG.9 \ sysctl.9 SYSCTL_NODE.9 \ sysctl.9 SYSCTL_NODE_WITH_LABEL.9 \ sysctl.9 SYSCTL_OPAQUE.9 \ sysctl.9 SYSCTL_PROC.9 \ sysctl.9 SYSCTL_QUAD.9 \ sysctl.9 SYSCTL_ROOT_NODE.9 \ sysctl.9 SYSCTL_S8.9 \ sysctl.9 SYSCTL_S16.9 \ sysctl.9 SYSCTL_S32.9 \ sysctl.9 SYSCTL_S64.9 \ sysctl.9 SYSCTL_STRING.9 \ sysctl.9 SYSCTL_STRUCT.9 \ sysctl.9 SYSCTL_U8.9 \ sysctl.9 SYSCTL_U16.9 \ sysctl.9 SYSCTL_U32.9 \ sysctl.9 SYSCTL_U64.9 \ sysctl.9 SYSCTL_UINT.9 \ sysctl.9 SYSCTL_ULONG.9 \ sysctl.9 SYSCTL_UQUAD.9 MLINKS+=sysctl_add_oid.9 sysctl_move_oid.9 \ sysctl_add_oid.9 sysctl_remove_oid.9 \ sysctl_add_oid.9 sysctl_remove_name.9 MLINKS+=sysctl_ctx_init.9 sysctl_ctx_entry_add.9 \ sysctl_ctx_init.9 sysctl_ctx_entry_del.9 \ sysctl_ctx_init.9 sysctl_ctx_entry_find.9 \ sysctl_ctx_init.9 sysctl_ctx_free.9 MLINKS+=SYSINIT.9 SYSUNINIT.9 MLINKS+=taskqueue.9 TASK_INIT.9 \ taskqueue.9 TASK_INITIALIZER.9 \ taskqueue.9 taskqueue_block.9 \ taskqueue.9 taskqueue_cancel.9 \ taskqueue.9 taskqueue_cancel_timeout.9 \ taskqueue.9 taskqueue_create.9 \ taskqueue.9 taskqueue_create_fast.9 \ taskqueue.9 TASKQUEUE_DECLARE.9 \ taskqueue.9 TASKQUEUE_DEFINE.9 \ taskqueue.9 TASKQUEUE_DEFINE_THREAD.9 \ taskqueue.9 taskqueue_drain.9 \ taskqueue.9 taskqueue_drain_all.9 \ taskqueue.9 taskqueue_drain_timeout.9 \ taskqueue.9 taskqueue_enqueue.9 \ taskqueue.9 taskqueue_enqueue_timeout.9 \ taskqueue.9 TASKQUEUE_FAST_DEFINE.9 \ taskqueue.9 TASKQUEUE_FAST_DEFINE_THREAD.9 \ taskqueue.9 taskqueue_free.9 \ taskqueue.9 taskqueue_member.9 \ taskqueue.9 taskqueue_run.9 \ taskqueue.9 taskqueue_set_callback.9 \ taskqueue.9 taskqueue_start_threads.9 \ taskqueue.9 taskqueue_start_threads_pinned.9 \ taskqueue.9 taskqueue_unblock.9 \ taskqueue.9 TIMEOUT_TASK_INIT.9 MLINKS+=tcp_functions.9 register_tcp_functions.9 \ tcp_functions.9 register_tcp_functions_as_name.9 \ tcp_functions.9 register_tcp_functions_as_names.9 \ tcp_functions.9 deregister_tcp_functions.9 MLINKS+=time.9 boottime.9 \ time.9 time_second.9 \ time.9 time_uptime.9 MLINKS+=timeout.9 callout.9 \ timeout.9 callout_active.9 \ timeout.9 callout_async_drain.9 \ timeout.9 callout_deactivate.9 \ timeout.9 callout_drain.9 \ timeout.9 callout_handle_init.9 \ timeout.9 callout_init.9 \ timeout.9 callout_init_mtx.9 \ timeout.9 callout_init_rm.9 \ timeout.9 callout_init_rw.9 \ timeout.9 callout_pending.9 \ timeout.9 callout_reset.9 \ timeout.9 callout_reset_curcpu.9 \ timeout.9 callout_reset_on.9 \ timeout.9 callout_reset_sbt.9 \ timeout.9 callout_reset_sbt_curcpu.9 \ timeout.9 callout_reset_sbt_on.9 \ timeout.9 callout_schedule.9 \ timeout.9 callout_schedule_curcpu.9 \ timeout.9 callout_schedule_on.9 \ timeout.9 callout_schedule_sbt.9 \ timeout.9 callout_schedule_sbt_curcpu.9 \ timeout.9 callout_schedule_sbt_on.9 \ timeout.9 callout_stop.9 \ timeout.9 callout_when.9 \ timeout.9 untimeout.9 MLINKS+=ucred.9 cred_update_thread.9 \ ucred.9 crcopy.9 \ ucred.9 crcopysafe.9 \ ucred.9 crdup.9 \ ucred.9 crfree.9 \ ucred.9 crget.9 \ ucred.9 crhold.9 \ ucred.9 crsetgroups.9 \ ucred.9 cru2x.9 MLINKS+=uidinfo.9 uifind.9 \ uidinfo.9 uifree.9 \ uidinfo.9 uihashinit.9 \ uidinfo.9 uihold.9 MLINKS+=uio.9 uiomove.9 \ uio.9 uiomove_frombuf.9 \ uio.9 uiomove_nofault.9 .if ${MK_USB} != "no" MAN+= usbdi.9 MLINKS+=usbdi.9 usbd_do_request.9 \ usbdi.9 usbd_do_request_flags.9 \ usbdi.9 usbd_errstr.9 \ usbdi.9 usbd_lookup_id_by_info.9 \ usbdi.9 usbd_lookup_id_by_uaa.9 \ usbdi.9 usbd_transfer_clear_stall.9 \ usbdi.9 usbd_transfer_drain.9 \ usbdi.9 usbd_transfer_pending.9 \ usbdi.9 usbd_transfer_poll.9 \ usbdi.9 usbd_transfer_setup.9 \ usbdi.9 usbd_transfer_start.9 \ usbdi.9 usbd_transfer_stop.9 \ usbdi.9 usbd_transfer_submit.9 \ usbdi.9 usbd_transfer_unsetup.9 \ usbdi.9 usbd_xfer_clr_flag.9 \ usbdi.9 usbd_xfer_frame_data.9 \ usbdi.9 usbd_xfer_frame_len.9 \ usbdi.9 usbd_xfer_get_frame.9 \ usbdi.9 usbd_xfer_get_priv.9 \ usbdi.9 usbd_xfer_is_stalled.9 \ usbdi.9 usbd_xfer_max_framelen.9 \ usbdi.9 usbd_xfer_max_frames.9 \ usbdi.9 usbd_xfer_max_len.9 \ usbdi.9 usbd_xfer_set_flag.9 \ usbdi.9 usbd_xfer_set_frame_data.9 \ usbdi.9 usbd_xfer_set_frame_len.9 \ usbdi.9 usbd_xfer_set_frame_offset.9 \ usbdi.9 usbd_xfer_set_frames.9 \ usbdi.9 usbd_xfer_set_interval.9 \ usbdi.9 usbd_xfer_set_priv.9 \ usbdi.9 usbd_xfer_set_stall.9 \ usbdi.9 usbd_xfer_set_timeout.9 \ usbdi.9 usbd_xfer_softc.9 \ usbdi.9 usbd_xfer_state.9 \ usbdi.9 usbd_xfer_status.9 \ usbdi.9 usb_fifo_alloc_buffer.9 \ usbdi.9 usb_fifo_attach.9 \ usbdi.9 usb_fifo_detach.9 \ usbdi.9 usb_fifo_free_buffer.9 \ usbdi.9 usb_fifo_get_data.9 \ usbdi.9 usb_fifo_get_data_buffer.9 \ usbdi.9 usb_fifo_get_data_error.9 \ usbdi.9 usb_fifo_get_data_linear.9 \ usbdi.9 usb_fifo_put_bytes_max.9 \ usbdi.9 usb_fifo_put_data.9 \ usbdi.9 usb_fifo_put_data_buffer.9 \ usbdi.9 usb_fifo_put_data_error.9 \ usbdi.9 usb_fifo_put_data_linear.9 \ usbdi.9 usb_fifo_reset.9 \ usbdi.9 usb_fifo_softc.9 \ usbdi.9 usb_fifo_wakeup.9 .endif MLINKS+=vcount.9 count_dev.9 MLINKS+=vfsconf.9 vfs_modevent.9 \ vfsconf.9 vfs_register.9 \ vfsconf.9 vfs_unregister.9 MLINKS+=vfs_getopt.9 vfs_copyopt.9 \ vfs_getopt.9 vfs_filteropt.9 \ vfs_getopt.9 vfs_flagopt.9 \ vfs_getopt.9 vfs_getopts.9 \ vfs_getopt.9 vfs_scanopt.9 \ vfs_getopt.9 vfs_setopt.9 \ vfs_getopt.9 vfs_setopt_part.9 \ vfs_getopt.9 vfs_setopts.9 MLINKS+=vhold.9 vdrop.9 \ vhold.9 vdropl.9 \ vhold.9 vholdl.9 MLINKS+=vmem.9 vmem_add.9 \ vmem.9 vmem_alloc.9 \ vmem.9 vmem_create.9 \ vmem.9 vmem_destroy.9 \ vmem.9 vmem_free.9 \ vmem.9 vmem_xalloc.9 \ vmem.9 vmem_xfree.9 MLINKS+=vm_map_lock.9 vm_map_lock_downgrade.9 \ vm_map_lock.9 vm_map_lock_read.9 \ vm_map_lock.9 vm_map_lock_upgrade.9 \ vm_map_lock.9 vm_map_trylock.9 \ vm_map_lock.9 vm_map_trylock_read.9 \ vm_map_lock.9 vm_map_unlock.9 \ vm_map_lock.9 vm_map_unlock_read.9 MLINKS+=vm_map_lookup.9 vm_map_lookup_done.9 MLINKS+=vm_map_max.9 vm_map_min.9 \ vm_map_max.9 vm_map_pmap.9 MLINKS+=vm_map_stack.9 vm_map_growstack.9 MLINKS+=vm_map_wire.9 vm_map_unwire.9 MLINKS+=vm_page_bits.9 vm_page_clear_dirty.9 \ vm_page_bits.9 vm_page_dirty.9 \ vm_page_bits.9 vm_page_is_valid.9 \ vm_page_bits.9 vm_page_set_invalid.9 \ vm_page_bits.9 vm_page_set_validclean.9 \ vm_page_bits.9 vm_page_test_dirty.9 \ vm_page_bits.9 vm_page_undirty.9 \ vm_page_bits.9 vm_page_zero_invalid.9 MLINKS+=vm_page_busy.9 vm_page_busied.9 \ vm_page_busy.9 vm_page_busy_downgrade.9 \ vm_page_busy.9 vm_page_busy_sleep.9 \ vm_page_busy.9 vm_page_sbusied.9 \ vm_page_busy.9 vm_page_sbusy.9 \ vm_page_busy.9 vm_page_sleep_if_busy.9 \ vm_page_busy.9 vm_page_sunbusy.9 \ vm_page_busy.9 vm_page_trysbusy.9 \ vm_page_busy.9 vm_page_tryxbusy.9 \ vm_page_busy.9 vm_page_xbusied.9 \ vm_page_busy.9 vm_page_xbusy.9 \ vm_page_busy.9 vm_page_xunbusy.9 \ vm_page_busy.9 vm_page_assert_sbusied.9 \ vm_page_busy.9 vm_page_assert_unbusied.9 \ vm_page_busy.9 vm_page_assert_xbusied.9 MLINKS+=vm_page_aflag.9 vm_page_aflag_clear.9 \ vm_page_aflag.9 vm_page_aflag_set.9 \ vm_page_aflag.9 vm_page_reference.9 MLINKS+=vm_page_free.9 vm_page_free_toq.9 \ vm_page_free.9 vm_page_free_zero.9 \ vm_page_free.9 vm_page_try_to_free.9 MLINKS+=vm_page_hold.9 vm_page_unhold.9 MLINKS+=vm_page_insert.9 vm_page_remove.9 MLINKS+=vm_page_wire.9 vm_page_unwire.9 MLINKS+=VOP_ACCESS.9 VOP_ACCESSX.9 MLINKS+=VOP_ATTRIB.9 VOP_GETATTR.9 \ VOP_ATTRIB.9 VOP_SETATTR.9 MLINKS+=VOP_CREATE.9 VOP_MKDIR.9 \ VOP_CREATE.9 VOP_MKNOD.9 \ VOP_CREATE.9 VOP_SYMLINK.9 MLINKS+=VOP_GETPAGES.9 VOP_PUTPAGES.9 MLINKS+=VOP_INACTIVE.9 VOP_RECLAIM.9 MLINKS+=VOP_LOCK.9 vn_lock.9 \ VOP_LOCK.9 VOP_ISLOCKED.9 \ VOP_LOCK.9 VOP_UNLOCK.9 MLINKS+=VOP_OPENCLOSE.9 VOP_CLOSE.9 \ VOP_OPENCLOSE.9 VOP_OPEN.9 MLINKS+=VOP_RDWR.9 VOP_READ.9 \ VOP_RDWR.9 VOP_WRITE.9 MLINKS+=VOP_REMOVE.9 VOP_RMDIR.9 MLINKS+=vnet.9 vimage.9 MLINKS+=vref.9 VREF.9 \ vref.9 vrefl.9 MLINKS+=vrele.9 vput.9 \ vrele.9 vunref.9 MLINKS+=vslock.9 vsunlock.9 MLINKS+=zone.9 uma.9 \ zone.9 uma_zalloc.9 \ zone.9 uma_zalloc_arg.9 \ zone.9 uma_zcreate.9 \ zone.9 uma_zdestroy.9 \ zone.9 uma_zfree.9 \ zone.9 uma_zfree_arg.9 \ zone.9 uma_zone_get_cur.9 \ zone.9 uma_zone_get_max.9 \ zone.9 uma_zone_set_max.9 \ zone.9 uma_zone_set_warning.9 \ zone.9 uma_zone_set_maxaction.9 .include Index: head/share/man/man9/bhnd.9 =================================================================== --- head/share/man/man9/bhnd.9 (nonexistent) +++ head/share/man/man9/bhnd.9 (revision 326291) @@ -0,0 +1,2644 @@ +.\" Copyright (c) 2015-2016 Landon Fuller +.\" Copyright (c) 2017 The FreeBSD Foundation +.\" All rights reserved. +.\" +.\" Portions of this documentation were written by Landon Fuller +.\" under sponsorship from the FreeBSD Foundation. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD$ +.\" +.Dd November 9, 2017 +.Dt BHND 9 +.Os +.Sh NAME +.Nm bhnd +.Nd BHND driver programming interface +.Sh SYNOPSIS +.In dev/bhnd/bhnd.h +.\" +.Ss Bus Resource Functions +.Ft int +.Fo bhnd_activate_resource +.Fa "device_t dev" "int type" "int rid" "struct bhnd_resource *r" +.Fc +.Ft "struct bhnd_resource *" +.Fo bhnd_alloc_resource +.Fa "device_t dev" "int type" "int *rid" "rman_res_t start" "rman_res_t end" +.Fa "rman_res_t count" "u_int flags" +.Fc +.Ft "struct bhnd_resource *" +.Fo bhnd_alloc_resource_any +.Fa "device_t dev" "int type" "int *rid" "u_int flags" +.Fc +.Ft int +.Fo bhnd_alloc_resources +.Fa "device_t dev" "struct resource_spec *rs" "struct bhnd_resource **res" +.Fc +.Ft int +.Fo bhnd_deactivate_resource +.Fa "device_t dev" "int type" "int rid" "struct bhnd_resource *r" +.Fc +.Ft int +.Fo bhnd_release_resource +.Fa "device_t dev" "int type" "int rid" "struct bhnd_resource *r" +.Fc +.Ft void +.Fo bhnd_release_resources +.Fa "device_t dev" "const struct resource_spec *rs" +.Fa "struct bhnd_resource **res" +.Fc +.\" +.Ss "Bus Space Functions" +.Ft void +.Fo bhnd_bus_barrier +.Fa "struct bhnd_resource *r" "bus_size_t offset" +.Fa "bus_size_t length" "int flags" +.Fc +.Ft uint8_t +.Fn bhnd_bus_read_1 "struct bhnd_resource *r" "bus_size_t offset" +.Ft uint16_t +.Fn bhnd_bus_read_2 "struct bhnd_resource *r" "bus_size_t offset" +.Ft uint32_t +.Fn bhnd_bus_read_4 "struct bhnd_resource *r" "bus_size_t offset" +.Ft void +.Fo bhnd_bus_read_multi_1 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_read_multi_2 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_read_multi_4 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_read_multi_stream_1 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_read_multi_stream_2 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_read_multi_stream_4 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_read_region_1 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_read_region_2 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_read_region_4 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_read_region_stream_1 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_read_region_stream_2 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_read_region_stream_4 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fn bhnd_bus_read_stream_1 "struct bhnd_resource *r" "bus_size_t offset" +.Ft void +.Fn bhnd_bus_read_stream_2 "struct bhnd_resource *r" "bus_size_t offset" +.Ft uint32_t +.Fn bhnd_bus_read_stream_4 "struct bhnd_resource *r" "bus_size_t offset" +.Ft void +.Fo bhnd_bus_set_multi_1 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t value" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_set_multi_2 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t value" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_set_multi_4 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t value" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_set_region_1 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t value" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_set_region_2 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t value" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_set_region_4 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t value" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fn bhnd_bus_write_1 "struct bhnd_resource *r" "uint8_t value" +.Ft void +.Fn bhnd_bus_write_2 "struct bhnd_resource *r" "uint16_t value" +.Ft void +.Fn bhnd_bus_write_4 "struct bhnd_resource *r" "uint32_t value" +.Ft void +.Fo bhnd_bus_write_multi_1 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_write_multi_2 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_write_multi_4 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_write_multi_stream_1 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_write_multi_stream_2 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_write_multi_stream_4 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_write_region_1 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_write_region_2 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_write_region_4 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_write_region_stream_1 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint8_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_write_region_stream_2 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint16_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fo bhnd_bus_write_region_stream_4 +.Fa "struct bhnd_resource *r" "bus_size_t offset" "uint32_t *datap" +.Fa "bus_size_t count" +.Fc +.Ft void +.Fn bhnd_bus_write_stream_1 "struct bhnd_resource *r" "uint8_t value" +.Ft void +.Fn bhnd_bus_write_stream_2 "struct bhnd_resource *r" "uint16_t value" +.Ft void +.Fn bhnd_bus_write_stream_4 "struct bhnd_resource *r" "uint32_t value" +.\" +.Ss "Device Configuration Functions" +.Ft int +.Fn bhnd_read_ioctl "device_t dev" "uint16_t *ioctl" +.Ft int +.Fn bhnd_write_ioctl "device_t dev" "uint16_t value" "uint16_t mask" +.Ft int +.Fn bhnd_read_iost "device_t dev" "uint16_t *iost" +.Ft uint32_t +.Fo bhnd_read_config +.Fa "device_t dev" "bus_size_t offset" "void *value" "u_int width" +.Fc +.Ft int +.Fo bhnd_write_config +.Fa "device_t dev" "bus_size_t offset" "const void *value" "u_int width" +.Fc +.Ft int +.Fn bhnd_reset_hw "device_t dev" "uint16_t ioctl" +.Ft int +.Fn bhnd_suspend_hw "device_t dev" +.Ft bool +.Fn bhnd_is_hw_suspended "device_t dev" +.\" +.Ss "Device Information Functions" +.Ft bhnd_attach_type +.Fo bhnd_get_attach_type +.Fa "device_t dev" +.Fc +.Ft "const struct bhnd_chipid *" +.Fo bhnd_get_chipid +.Fa "device_t dev" +.Fc +.Ft bhnd_devclass_t +.Fo bhnd_get_class +.Fa "device_t dev" +.Fc +.Ft u_int +.Fo bhnd_get_core_index +.Fa "device_t dev" +.Fc +.Ft "struct bhnd_core_info" +.Fo bhnd_get_core_info +.Fa "device_t dev" +.Fc +.Ft int +.Fo bhnd_get_core_unit +.Fa "device_t dev" +.Fc +.Ft uint16_t +.Fo bhnd_get_device +.Fa "device_t dev" +.Fc +.Ft const char * +.Fo bhnd_get_device_name +.Fa "device_t dev" +.Fc +.Ft uint8_t +.Fo bhnd_get_hwrev +.Fa "device_t dev" +.Fc +.Ft uint16_t +.Fo bhnd_get_vendor +.Fa "device_t dev" +.Fc +.Ft const char * +.Fo bhnd_get_vendor_name +.Fa "device_t dev" +.Fc +.Ft int +.Fo bhnd_read_board_info +.Fa "device_t dev" "struct bhnd_board_info *info" +.Fc +.\" +.Ss "Device Matching Functions" +.Ft bool +.Fo bhnd_board_matches +.Fa "const struct bhnd_board_info *board" "const struct bhnd_board_match *desc" +.Fc +.Ft device_t +.Fo bhnd_bus_match_child +.Fa "device_t bus" "const struct bhnd_core_match *desc" +.Fc +.Ft bool +.Fo bhnd_chip_matches +.Fa "const struct bhnd_chipid *chip" "const struct bhnd_chip_match *desc" +.Fc +.Ft "struct bhnd_core_match" +.Fo bhnd_core_get_match_desc +.Fa "const struct bhnd_core_info *core" +.Fc +.Ft bool +.Fo bhnd_core_matches +.Fa "const struct bhnd_core_info *core" "const struct bhnd_core_match *desc" +.Fc +.Ft bool +.Fo bhnd_cores_equal +.Fa "const struct bhnd_core_info *lhs" "const struct bhnd_core_info *rhs" +.Fc +.Ft bool +.Fo bhnd_hwrev_matches +.Fa "uint16_t hwrev" "const struct bhnd_hwrev_match *desc" +.Fc +.Ft "const struct bhnd_core_info *" +.Fo bhnd_match_core +.Fa "const struct bhnd_core_info *cores" "u_int num_cores" +.Fa "const struct bhnd_core_match *desc" +.Fc +.\" +.Ss "Device Table Functions" +.Ft "const struct bhnd_device *" +.Fo bhnd_device_lookup +.Fa "device_t dev" "const struct bhnd_device *table" "size_t entry_size" +.Fc +.Ft bool +.Fo bhnd_device_matches +.Fa "device_t dev" "const struct bhnd_device_match *desc" +.Fc +.Ft uint32_t +.Fo bhnd_device_quirks +.Fa "device_t dev" "const struct bhnd_device *table" "size_t entry_size" +.Fc +.Fo BHND_BOARD_QUIRK +.Fa "board" "flags" +.Fc +.Fo BHND_CHIP_QUIRK +.Fa "chip" "hwrev" "flags" +.Fc +.Fo BHND_CORE_QUIRK +.Fa "hwrev" "flags" +.Fc +.Fo BHND_DEVICE +.Fa "vendor" "device" "desc" "quirks" "..." +.Fc +.Fo BHND_DEVICE_IS_END +.Fa "struct bhnd_device *d" +.Fc +.Fo BHND_DEVICE_QUIRK_IS_END +.Fa "struct bhnd_device_quirk *q" +.Fc +.Fo BHND_PKG_QUIRK +.Fa "chip" "pkg" "flags" +.Fc +.Bd -literal +struct bhnd_device_quirk { + struct bhnd_device_match desc; + uint32_t quirks; +}; +.Ed +.Bd -literal +struct bhnd_device { + const struct bhnd_device_match core; + const char *desc; + const struct bhnd_device_quirk *quirks_table; + uint32_t device_flags; +}; +.Ed +.Bd -literal +enum { + BHND_DF_ANY = 0, + BHND_DF_HOSTB = (1 << 0), + BHND_DF_SOC = (1 << 1), + BHND_DF_ADAPTER = (1 << 2) +}; +.Ed +.Bd -literal +#define BHND_DEVICE_END { { BHND_MATCH_ANY }, NULL, NULL, 0 } +.Ed +.Bd -literal +#define BHND_DEVICE_QUIRK_END { { BHND_MATCH_ANY }, 0 } +.Ed +.\" +.Ss "DMA Address Translation Functions" +.Ft int +.Fo bhnd_get_dma_translation +.Fa "device_t dev" "u_int width" "uint32_t flags" "bus_dma_tag_t *dmat" +.Fa "struct bhnd_dma_translation *translation" +.Fc +.Bd -literal +struct bhnd_dma_translation { + bhnd_addr_t base_addr; + bhnd_addr_t addr_mask; + bhnd_addr_t addrext_mask; + uint32_t flags; +}; +.Ed +.Bd -literal +typedef enum { + BHND_DMA_ADDR_30BIT = 30, + BHND_DMA_ADDR_32BIT = 32, + BHND_DMA_ADDR_64BIT = 64 +} bhnd_dma_addrwidth; +.Ed +.Bd -literal +enum bhnd_dma_translation_flags { + BHND_DMA_TRANSLATION_PHYSMAP = (1<<0), + BHND_DMA_TRANSLATION_BYTESWAPPED = (1<<1) +}; +.Ed +.\" +.Ss "Interrupt Functions" +.Ft u_int +.Fo bhnd_get_intr_count +.Fa "device_t dev" +.Fc +.Ft int +.Fo bhnd_get_intr_ivec +.Fa "device_t dev" "u_int intr" "u_int *ivec" +.Fc +.Ft int +.Fo bhnd_map_intr +.Fa "device_t dev" "u_int intr" "rman_res_t *irq" +.Fc +.Ft void +.Fo bhnd_unmap_intr +.Fa "device_t dev" "rman_res_t irq" +.Fc +.\" +.Ss "NVRAM Functions" +.Ft int +.Fo bhnd_nvram_getvar +.Fa "device_t dev" "const char *name" "void *buf" "size_t *len" +.Fa "bhnd_nvram_type type" +.Fc +.Ft int +.Fo bhnd_nvram_getvar_array +.Fa "device_t dev" "const char *name" "void *buf" "size_t size" +.Fa "bhnd_nvram_type type" +.Fc +.Ft int +.Fo bhnd_nvram_getvar_int +.Fa "device_t dev" "const char *name" "void *value" "int width" +.Fc +.Ft int +.Fn bhnd_nvram_getvar_int8 "device_t dev" "const char *name" "int8_t *value" +.Ft int +.Fn bhnd_nvram_getvar_int16 "device_t dev" "const char *name" "int16_t *value" +.Ft int +.Fn bhnd_nvram_getvar_int32 "device_t dev" "const char *name" "int32_t *value" +.Ft int +.Fo bhnd_nvram_getvar_uint +.Fa "device_t dev" "const char *name" "void *value" "int width" +.Fc +.Ft int +.Fo bhnd_nvram_getvar_uint8 +.Fa "device_t dev" "const char *name" "uint8_t *value" +.Fc +.Ft int +.Fo bhnd_nvram_getvar_uint16 +.Fa "device_t dev" "const char *name" "uint16_t *value" +.Fc +.Ft int +.Fo bhnd_nvram_getvar_uint32 +.Fa "device_t dev" "const char *name" "uint32_t *value" +.Fc +.Ft int +.Fo bhnd_nvram_getvar_str +.Fa "device_t dev" "const char *name" "char *buf" "size_t len" "size_t *rlen" +.Fc +.Ft "const char *" +.Fo bhnd_nvram_string_array_next +.Fa "const char *inp" "size_t ilen" "const char *prev" "size_t *olen" +.Fc +.Bd -literal +typedef enum { + BHND_NVRAM_TYPE_UINT8 = 0, + BHND_NVRAM_TYPE_UINT16 = 1, + BHND_NVRAM_TYPE_UINT32 = 2, + BHND_NVRAM_TYPE_UINT64 = 3, + BHND_NVRAM_TYPE_INT8 = 4, + BHND_NVRAM_TYPE_INT16 = 5, + BHND_NVRAM_TYPE_INT32 = 6, + BHND_NVRAM_TYPE_INT64 = 7, + BHND_NVRAM_TYPE_CHAR = 8, + BHND_NVRAM_TYPE_STRING = 9, + BHND_NVRAM_TYPE_BOOL = 10, + BHND_NVRAM_TYPE_NULL = 11, + BHND_NVRAM_TYPE_DATA = 12 + BHND_NVRAM_TYPE_UINT8_ARRAY = 16, + BHND_NVRAM_TYPE_UINT16_ARRAY = 17, + BHND_NVRAM_TYPE_UINT32_ARRAY = 18, + BHND_NVRAM_TYPE_UINT64_ARRAY = 19, + BHND_NVRAM_TYPE_INT8_ARRAY = 20, + BHND_NVRAM_TYPE_INT16_ARRAY = 21, + BHND_NVRAM_TYPE_INT32_ARRAY = 22, + BHND_NVRAM_TYPE_INT64_ARRAY = 23, + BHND_NVRAM_TYPE_CHAR_ARRAY = 24, + BHND_NVRAM_TYPE_STRING_ARRAY = 25, + BHND_NVRAM_TYPE_BOOL_ARRAY = 26 +} bhnd_nvram_type; +.Ed +.\" +.Ss "Port/Region Functions" +.Ft int +.Fo bhnd_decode_port_rid +.Fa "device_t dev" "int type" "int rid" "bhnd_port_type *port_type" +.Fa "u_int *port" "u_int *region" +.Fc +.Ft u_int +.Fo bhnd_get_port_count +.Fa "device_t dev" "bhnd_port_type type" +.Fc +.Ft int +.Fo bhnd_get_port_rid +.Fa "device_t dev" "bhnd_port_type type" "u_int port" "u_int region" +.Fc +.Ft int +.Fo bhnd_get_region_addr +.Fa "device_t dev" "bhnd_port_type port_type" "u_int port" "u_int region" +.Fa "bhnd_addr_t *region_addr" "bhnd_size_t *region_size" +.Fc +.Ft u_int +.Fo bhnd_get_region_count +.Fa "device_t dev" "bhnd_port_type type" "u_int port" +.Fc +.Ft bool +.Fo bhnd_is_region_valid +.Fa "device_t dev" "bhnd_port_type type" "u_int port" "u_int region" +.Fc +.Bd -literal +typedef enum { + BHND_PORT_DEVICE = 0, + BHND_PORT_BRIDGE = 1, + BHND_PORT_AGENT = 2 +} bhnd_port_type; +.Ed +.\" +.Ss "Power Management Functions" +.Ft int +.Fo bhnd_alloc_pmu +.Fa "device_t dev" +.Fc +.Ft int +.Fo bhnd_release_pmu +.Fa "device_t dev" +.Fc +.Ft int +.Fo bhnd_enable_clocks +.Fa "device_t dev" "uint32_t clocks" +.Fc +.Ft int +.Fo bhnd_request_clock +.Fa "device_t dev" "bhnd_clock clock" +.Fc +.Ft int +.Fo bhnd_get_clock_freq +.Fa "device_t dev" "bhnd_clock clock" "u_int *freq" +.Fc +.Ft int +.Fo bhnd_get_clock_latency +.Fa "device_t dev" "bhnd_clock clock" "u_int *latency" +.Fc +.Ft int +.Fo bhnd_request_ext_rsrc +.Fa "device_t dev" "u_int rsrc" +.Fc +.Ft int +.Fo bhnd_release_ext_rsrc +.Fa "device_t dev" "u_int rsrc" +.Fc +.Bd -literal +typedef enum { + BHND_CLOCK_DYN = (1 << 0), + BHND_CLOCK_ILP = (1 << 1), + BHND_CLOCK_ALP = (1 << 2), + BHND_CLOCK_HT = (1 << 3) +} bhnd_clock; +.Ed +.\" +.Ss "Service Provider Functions" +.Ft int +.Fo bhnd_register_provider +.Fa "device_t dev" "bhnd_service_t service" +.Fc +.Ft int +.Fo bhnd_deregister_provider +.Fa "device_t dev" "bhnd_service_t service" +.Fc +.Ft device_t +.Fo bhnd_retain_provider +.Fa "device_t dev" "bhnd_service_t service" +.Fc +.Ft void +.Fo bhnd_release_provider +.Fa "device_t dev" "device_t provider" "bhnd_service_t service" +.Fc +.Bd -literal +typedef enum { + BHND_SERVICE_CHIPC, + BHND_SERVICE_PWRCTL, + BHND_SERVICE_PMU, + BHND_SERVICE_NVRAM, + BHND_SERVICE_GPIO, + BHND_SERVICE_ANY = 1000 +} bhnd_service_t; +.Ed +.\" +.Ss "Utility Functions" +.Ft "bhnd_erom_class_t *" +.Fo bhnd_driver_get_erom_class +.Fa "driver_t *driver" +.Fc +.Ft bhnd_devclass_t +.Fo bhnd_find_core_class +.Fa "uint16_t vendor" "uint16_t device" +.Fc +.Ft "const char *" +.Fo bhnd_find_core_name +.Fa "uint16_t vendor" "uint16_t device" +.Fc +.Ft bhnd_devclass_t +.Fo bhnd_core_class +.Fa "const struct bhnd_core_info *ci" +.Fc +.Ft "const char *" +.Fo bhnd_core_name +.Fa "const struct bhnd_core_info *ci" +.Fc +.Ft int +.Fo bhnd_format_chip_id +.Fa "char *buffer" "size_t size" "uint16_t chip_id" +.Fc +.Ft void +.Fo bhnd_set_custom_core_desc +.Fa "device_t dev" "const char *dev_name" +.Fc +.Ft void +.Fo bhnd_set_default_core_desc +.Fa "device_t dev" +.Fc +.Ft "const char *" +.Fo bhnd_vendor_name +.Fa "uint16_t vendor" +.Fc +.Bd -literal +#define BHND_CHIPID_MAX_NAMELEN 32 +.Ed +.\" +.Sh DESCRIPTION +.Nm +provides a unified bus and driver programming interface for the +on-chip interconnects and IP cores found in Broadcom Home Networking Division +(BHND) devices. +.Pp +The BHND device family consists of MIPS/ARM SoCs (System On a Chip) and +host-connected chipsets based on a common library of Broadcom IP cores, +connected via one of two on-chip backplane (hardware bus) architectures. +.Pp +Hardware designed prior to 2009 used Broadcom's +.Dq SSB +backplane architecture, based on Sonics Silicon's interconnect IP. +Each core on the Sonics backplane vends a 4 KiB register block, containing both +device-specific CSRs, and SSB-specific per-core device management +(enable/reset/etc) registers. +.Pp +Subsequent hardware is based on Broadcom's +.Dq BCMA +backplane, based on ARM's AMBA IP. +The IP cores used in earlier SSB-based devices were adapted for compatibility +with the new backplane, with additional +.Dq wrapper +cores providing per-core device management functions in place of the SSB +per-core management registers. +.Pp +When BHND hardware is used as a host-connected peripheral (e.g., in a PCI Wi-Fi +card), the on-chip peripheral controller core is configured to operate as +an endpoint device, bridging access to the SoC hardware: +.Pp +.Bl -dash -offset indent +.It +Host access to SoC address space is provided via a set of register windows +(e.g., a set of configurable windows into SoC address space mapped via PCI BARs) +.It +DMA is supported by the bridge core's sparse mapping of host address space into +the backplane address space. +These address regions may be used as a target for the on-chip DMA engine. +.It +Any backplane interrupt vectors routed to the bridge core may be mapped by the +bridge to host interrupts (e.g., PCI INTx/MSI/MSI-X). +.El +.Pp +The +.Nm +driver programming interface \(em and +.Xr bhndb 4 +host bridge drivers \(em support the implementation of common drivers for +Broadcom IP cores, whether attached via a BHND host bridge, or via the native +SoC backplane. +.\" +.Ss "Bus Resource Functions" +The bhnd_resource functions are wrappers for the standard +.Vt "struct resource" +bus APIs, providing support for +.Vt SYS_RES_MEMORY +resources that, on +.Xr bhndb 4 +bridged chipsets, may require on-demand remapping of address windows +prior to accessing bus memory. +.Pp +These functions are primarily used in the implementation of BHND platform device +drivers that, on host-connected peripherals, must share a small set of register +windows during initial setup and teardown. +.Pp +BHND peripherals are designed to not require register window remapping +during normal operation, and most drivers may safely use the standard +.Vt struct resource +APIs directly. +.Pp +The +.Fn bhnd_activate_resource +function activates a previously allocated resource. +.Pp +The arguments are as follows: +.Bl -tag -width indent +.It Fa dev +The device holding ownership of the allocated resource. +.It Fa type +The type of the resource. +.It Fa rid +The bus-specific handle that identifies the resource being activated. +.It Fa r +A pointer to the resource returned by +.Fn bhnd_alloc_resource . +.El +.Pp +The +.Fn bhnd_alloc_resource +function allocates a resource from a device's parent +.Xr bhnd 4 +bus. +.Pp +The arguments are as follows: +.Bl -tag -width indent +.It Fa dev +The device requesting resource ownership. +.It Fa type +The type of resource to allocate. +This may be any type supported by the standard +.Xr bus_alloc_resource 9 +function. +.It Fa rid +The bus-specific handle identifying the resource being allocated. +.It Fa start +The start address of the resource. +.It Fa end +The end address of the resource. +.It Fa count +The size of the resource. +.It Fa flags +The flags for the resource to be allocated. +These may be any values supported by the standard +.Xr bus_alloc_resource 9 +function. +.El +.Pp +To request that the bus supply the resource's default +.Fa start , +.Fa end , +and +.Fa count +values, pass +.Fa start +and +.Fa end +values of 0ul and ~0ul respectively, and a +.Fa count +of 1. +.Pp +The +.Fn bhnd_alloc_resource_any +function is a convenience wrapper for +.Fn bhnd_alloc_resource , +using the resource's default +.Fa start , +.Fa end , +and +.Fa count +values. +.Pp +The arguments are as follows: +.Bl -tag -width indent +.It Fa dev +The device requesting resource ownership. +.It Fa type +The type of resource to allocate. +This may be any type supported by the standard +.Xr bus_alloc_resource 9 +function. +.It Fa rid +The bus-specific handle identifying the resource being allocated. +.It Fa flags +The flags for the resource to be allocated. +These may be any values supported by the standard +.Xr bus_alloc_resource 9 +function. +.El +.Pp +The +.Fn bhnd_alloc_resources +function allocates resources defined in resource specification from a device's +parent +.Xr bhnd 4 +bus. +.Pp +The arguments are as follows: +.Bl -tag -width indent +.It Fa dev +The device requesting ownership of the resources. +.It Fa rs +A standard bus resource specification. If all requested resources, are +successfully allocated, this will be updated with the allocated resource +identifiers. +.It Fa res +If all requested resources are successfully allocated, this will be populated +with the allocated +.Vt "struct bhnd_resource" +instances. +.El +.Pp +The +.Fn bhnd_deactivate_resource +function deactivates a resource previously activated by. +.Fn bhnd_activate_resource . +The arguments are as follows: +.Bl -tag -width indent +.It Fa dev +The device holding ownership of the activated resource. +.It Fa type +The type of the resource. +.It Fa rid +The bus-specific handle identifying the resource. +.It Fa r +A pointer to the resource returned by bhnd_alloc_resource. +.El +.Pp +The +.Fn bhnd_release_resource +function frees a resource previously returned by +.Fn bhnd_alloc_resource . +The arguments are as follows: +.Bl -tag -width indent +.It Fa dev +The device holding ownership of the resource. +.It Fa type +The type of the resource. +.It Fa rid +The bus-specific handle identifying the resource. +.It Fa r +A pointer to the resource returned by bhnd_alloc_resource. +.El +.Pp +The +.Fn bhnd_release_resources +function frees resources previously returned by +.Fn bhnd_alloc_resources . +The arguments are as follows: +.Bl -tag -width indent +.It Fa dev +The device that owns the resources. +.It Fa rs +A standard bus resource specification previously initialized by +.Fn bhnd_alloc_resources . +.It Fa res +The resources to be released. +.El +.Pp +The +.Vt bhnd_resource +structure contains the following fields: +.Bl -tag -width "direct" +.It Fa res +A pointer to the bus +.Vt struct resource . +.It Fa direct +If true, the resource requires bus window remapping before it is MMIO +accessible. +.El +.Pp +.\" +.Ss "Bus Space Functions" +The bhnd_bus_space functions wrap their equivalent +.Xr bus_space 9 +counterparts, and provide support for accessing bus memory via +.Vt "struct bhnd_resource". +.Pp +.Bl -ohang -offset indent -compact +.It Fn bhnd_bus_barrier +.It Fn bhnd_bus_[read|write]_[1|2|4] +.It Fn bhnd_bus_[read_multi|write_multi]_[1|2|4] +.It Fn bhnd_bus_[read_multi_stream|write_multi_stream]_[1|2|4] +.It Fn bhnd_bus_[read_region|write_region]_[1|2|4] +.It Fn bhnd_bus_[read_region_stream|write_region_stream]_[1|2|4] +.It Fn bhnd_bus_[read_stream|write_stream]_[1|2|4] +.It Fn bhnd_bus_[set_multi|set_stream]_[1|2|4] +.El +.Pp +Drivers that do not rely on +.Vt "struct bhnd_resource" +should use the standard +.Vt struct resource +and +.Xr bus_space 9 +APIs directly. +.\" +.Ss "Device Configuration Functions" +The +.Fn bhnd_read_ioctl +function is used to read the I/O control register value of device +.Fa dev , +returning the current value in +.Fa ioctl . +.Pp +The +.Fn bhnd_write_ioctl +function is used to modify the I/O control register of +.Fa dev . +The new value of the register is computed by updating any bits set in +.Fa mask +to +.Fa value . +The following I/O control flags are supported: +.Bl -tag -width ".Dv BHND_IOCTL_CLK_FORCE" -offset indent +.It Dv BHND_IOCTL_BIST +Initiate a built-in self-test (BIST). +Must be cleared after BIST results are read via the IOST (I/O Status) register. +.It Dv BHND_IOCTL_PME +Enable posting of power management events by the core. +.It Dv BHND_IOCTL_CLK_FORCE +Force disable of clock gating, resulting in all clocks being distributed within +the core. +Should be set when asserting/deasserting reset to ensure the reset signal fully +propagates to the entire core. +.It Dv BHND_IOCTL_CLK_EN +If cleared, the core clock will be disabled. +Should be set during normal operation, and cleared when the core is held in +reset. +.It Dv BHND_IOCTL_CFLAGS +The mask of IOCTL bits reserved for additional core-specific I/O control flags. +.El +.Pp +The +.Fn bhnd_read_iost +function is used to read the I/O status register of device +.Fa dev , +returning the current value in +.Fa iost . +The following I/O status flags are supported: +.Bl -tag -width ".Dv BHND_IOST_BIST_DONE" -offset indent +.It Dv BHND_IOST_BIST_DONE +Set upon BIST completion. +Will be cleared when the +.Dv BHND_IOCTL_BIST +flag of the I/O control register is cleared using +.Fn bhnd_write_ioctl . +.It Dv BHND_IOST_BIST_FAIL +Set upon detection of a BIST error; the value is unspecified if BIST has not +completed and +.Dv BHND_IOST_BIST_DONE +is not also set. +.It Dv BHND_IOST_CLK +Set if the core has required that clocked be ungated, or cleared otherwise. +The value is undefined if a core does not support clock gating. +.It Dv BHND_IOST_DMA64 +Set if this core supports 64-bit DMA. +.It Dv BHND_IOST_CFLAGS +The mask of IOST bits reserved for additional core-specific I/O status flags. +.El +.Pp +The +.Fn bhnd_read_config +function is used to read a data item of +.Fa width +bytes at +.Fa offset +from the backplane-specific agent/config space of the device +.Fa dev . +.Pp +The +.Fn bhnd_write_config +function is used to write a data item of +.Fa width +bytes with +.Fa value +at +.Fa offset +from the backplane-specific agent/config space of the device +.Fa dev . +The requested +.Fa width +must be one of 1, 2, or 4 bytes. +.Pp +The agent/config space accessible via +.Fn bhnd_read_config +and +.Fn bhnd_write_config +is backplane-specific, and these functions should only be used for functionality +that is not available via another +.Nm +function. +.Pp +The +.Fn bhnd_suspend_hw +function transitions the device +.Fa dev +to a low power +.Dq RESET +state. +The hardware may be brought out of this state using +.Fn bhnd_reset_hw . +.Pp +The +.Fn bhnd_reset_hw +function first transitions the device +.Fa dev +to a low power RESET state, and then brings the device out of RESET, writing +.Fa ioctl +to the I/O control flags of +.Fa dev . +.Pp +The +.Fn bhnd_is_hw_suspended +function returns +.Dv true +if the device +.Fa dev +is currently held in a RESET state, or is otherwise not clocked. +Otherwise, it returns +.Dv false . +.Pp +Any outstanding per-device PMU requests made using +.Fn bhnd_enable_clocks , +.Fn bhnd_request_clock , +or +.Fn bhnd_request_ext_rsrc +will be released automatically upon placing a device into a RESET state. +.Ss "Device Information Functions" +The +.Fn bhnd_get_attach_type +function returns the attachment type of the parent +.Xr bhnd 4 +bus of device +.Fa dev . +.Pp +The following attachment types are supported: +.Bl -hang -width ".Dv BHND_ATTACH_ADAPTER" -offset indent +.It Dv BHND_ATTACH_ADAPTER +The bus is resident on a bridged adapter, such as a PCI Wi-Fi device. +.It Dv BHND_ATTACH_NATIVE +The bus is resident on the native host, such as the primary or secondary bus of +an embedded SoC. +.El +.Pp +The +.Fn bhnd_get_chipid +function returns chip information from the parent +.Xr bhnd 4 +bus of device +.Fa dev . +The returned +.Vt bhnd_chipid +struct contains the following fields: +.Pp +.Bl -tag -width "enum_addr" -offset indent +.It Fa chip_id +The chip identifier. +.It Fa chip_rev +The chip's hardware revision. +.It Fa chip_pkg +The chip's semiconductor package identifier. +.Pp +Several different physical semiconductor package variants may exist for a given +chip, each of which may require driver workarounds for hardware errata, +unpopulated components, etc. +.It Fa chip_type +The interconnect architecture used by this chip. +.It Fa enum_addr +The backplane enumeration address. +On SSB devices, this will be the base address of the first SSB core. +On BCMA devices, this will be the address of the enumeration ROM (EROM) core. +.It Fa ncores +The number of cores on the chip backplane, or 0 if unknown. +.El +.Pp +The following constants are defined for known +.Fa chip_type +values: +.Bl -tag -width ".Dv BHND_CHIPTYPE_BCMA_ALT" -offset indent -compact +.It Dv BHND_CHIPTYPE_SIBA +SSB interconnect. +.It Dv BHND_CHIPTYPE_BCMA +BCMA interconnect. +.It Dv BHND_CHIPTYPE_BCMA_ALT +BCMA-compatible variant found in Broadcom Northstar ARM SoCs. +.It Dv BHND_CHIPTYPE_UBUS +UBUS interconnect. +This BCMA-derived interconnect is found in Broadcom BCM33xx DOCSIS SoCs, and +BCM63xx xDSL SoCs. +UBUS is not currently supported by +.Xr bhnd 4 . +.El +.Pp +Additional symbolic constants for known +.Fa chip_id , +.Fa chip_pkg , +and +.Fa chip_type +values are defined in +.In dev/bhnd/bhnd_ids.h . +.Pp +The +.Fn bhnd_get_class +function returns the BHND class of device +.Fa dev , +if the device's +.Em vendor +and +.Em device +identifiers are recognized. +Otherwise, returns +.Dv BHND_DEVCLASS_OTHER . +.Pp +One of the following device classes will be returned: +.Pp +.Bl -tag -width ".Dv BHND_DEVCLASS_SOC_ROUTER" -offset indent -compact +.It Dv BHND_DEVCLASS_CC +ChipCommon I/O Controller +.It Dv BHND_DEVCLASS_CC_B +ChipCommon Auxiliary Controller +.It Dv BHND_DEVCLASS_PMU +PMU Controller +.It Dv BHND_DEVCLASS_PCI +PCI Host/Device Bridge +.It Dv BHND_DEVCLASS_PCIE +PCIe Host/Device Bridge +.It Dv BHND_DEVCLASS_PCCARD +PCMCIA Host/Device Bridge +.It Dv BHND_DEVCLASS_RAM +Internal RAM/SRAM +.It Dv BHND_DEVCLASS_MEMC +Memory Controller +.It Dv BHND_DEVCLASS_ENET +IEEE 802.3 MAC/PHY +.It Dv BHND_DEVCLASS_ENET_MAC +IEEE 802.3 MAC +.It Dv BHND_DEVCLASS_ENET_PHY +IEEE 802.3 PHY +.It Dv BHND_DEVCLASS_WLAN +IEEE 802.11 MAC/PHY/Radio +.It Dv BHND_DEVCLASS_WLAN_MAC +IEEE 802.11 MAC +.It Dv BHND_DEVCLASS_WLAN_PHY +IEEE 802.11 PHY +.It Dv BHND_DEVCLASS_CPU +CPU Core +.It Dv BHND_DEVCLASS_SOC_ROUTER +Interconnect Router +.It Dv BHND_DEVCLASS_SOC_BRIDGE +Interconnect Host Bridge +.It Dv BHND_DEVCLASS_EROM +Device Enumeration ROM +.It Dv BHND_DEVCLASS_NVRAM +NVRAM/Flash Controller +.It Dv BHND_DEVCLASS_USB_HOST +USB Host Controller +.It Dv BHND_DEVCLASS_USB_DEV +USB Device Controller +.It Dv BHND_DEVCLASS_USB_DUAL +USB Host/Device Controller +.It Dv BHND_DEVCLASS_OTHER +Other / Unknown +.It Dv BHND_DEVCLASS_INVALID +Invalid Class +.El +.Pp +The +.Fn bhnd_get_core_info +function returns the core information for device +.Fa dev . +The returned +.Vt bhnd_core_info +structure contains the following fields: +.Pp +.Bl -tag -width "core_idx" -offset indent -compact +.It Fa vendor +Vendor identifier (JEP-106, ARM 4-bit continuation encoded) +.It Fa device +Device identifier +.It Fa hwrev +Hardware revision +.It Fa core_idx +Core index +.It Fa unit +Core unit +.El +.Pp +Symbolic constants for common vendor and device identifiers are defined in +.In dev/bhnd/bhnd_ids.h . +Common vendor identifiers include: +.Pp +.Bl -tag -width ".Dv BHND_MFGID_MIPS" -offset indent -compact +.It Dv BHND_MFGID_ARM +ARM +.It Dv BHND_MFGID_BCM +Broadcom +.It Dv BHND_MFGID_MIPS +MIPS +.El +.Pp +The +.Fn bhnd_get_core_index , +.Fn bhnd_get_core_unit , +.Fn bhnd_get_device , +.Fn bhnd_get_hwrev , +and +.Fn bhnd_get_vendor +functions are convenience wrappers for +.Fn bhnd_get_core_info , +returning, respect the +.Fa core_idx , +.Fa core_unit , +.Fa device , +.Fa hwrev , +or +.Fa vendor +field from the +.Vt bhnd_core_info +structure. +.Pp +The +.Fn bhnd_get_device_name +function returns a human readable name for device +.Fa dev . +.Pp +The +.Fn bhnd_get_vendor_name +function returns a human readable name for the vendor of device +.Fa dev . +.Pp +The +.Fn bhnd_read_board_info +function attempts to read the board information for device +.Fa dev . +The board information will be returned in the location pointed to by +.Fa info +on success. +.Pp +The +.Vt bhnd_board_info +structure contains the following fields: +.Pp +.Bl -tag -width "board_srom_rev" -offset indent +.It Fa board_vendor +Vendor ID of the board manufacturer (PCI-SIG assigned). +.It Fa board_type +Device ID. +This is generally a Broadcom-assigned globally unique identifier. +.It Fa board_rev +Board revision. +.It Fa board_srom_rev +Board SROM format revision. +.It Fa board_flags +Board flags (1) +.It Fa board_flags2 +Board flags (2) +.It Fa board_flags3 +Board flags (3) +.El +.Pp +On PCI devices, the +.Fa board_vendor +and +.Fa board_type +fields default to the PCI Subsystem Vendor ID and PCI Subsystem ID, unless +overridden in device NVRAM. +.Pp +Symbolic constants for common board flags are defined in +.In dev/bhnd/bhnd_ids.h . +.Pp +.Ss "Device Matching Functions" +The bhnd device matching functions are used to match against core, chip, and +board-level device attributes. +Match requirements are specified using the +.Vt "struct bhnd_board_match" , +.Vt "struct bhnd_chip_match" , +.Vt "struct bhnd_core_match" , +.Vt "struct bhnd_device_match" , +and +.Vt "struct bhnd_hwrev_match" +match descriptor structures. +.Pp +The +.Fn bhnd_board_matches +function returns +.Dv true +if +.Fa board +matches the board match descriptor +.Fa desc . +Otherwise, it returns +.Dv false . +.Pp +The +.Fn bhnd_chip_matches +function returns +.Dv true +if +.Fa chip +matches the chip match descriptor +.Fa desc . +Otherwise, it returns +.Dv false . +.Pp +The +.Fn bhnd_core_matches +function returns +.Dv true +if +.Fa core +matches the core match descriptor +.Fa desc . +Otherwise, it returns +.Dv false . +.Pp +The +.Fn bhnd_device_matches +function returns +.Dv true +if the device +.Fa dev +matches the device match descriptor +.Fa desc . +Otherwise, it returns +.Dv false . +.Pp +The +.Fn bhnd_hwrev_matches +function returns +.Dv true +if +.Fa hwrev +matches the hwrev match descriptor +.Fa desc . +Otherwise, it returns +.Dv false . +.Pp +The +.Fn bhnd_bus_match_child +function returns the first child device of +.Fa bus +that matches the device match descriptor +.Fa desc . +If no matching child is found, +.Dv NULL +is returned. +.Pp +The +.Fn bhnd_core_get_match_desc +function returns an equality match descriptor for the core info in +.Fa core . +The returned descriptor will match only on core attributes identical to those +defined by +.Fa core . +.Pp +The +.Fn bhnd_cores_equal +function is a convenience wrapper for +.Fn bhnd_core_matches +and +.Fn bhnd_core_get_match_desc . +This function returns +.Dv true +if the +.Vt bhnd_core_info +structures +.Fa lhs +and +.Fa rhs +are equal. +Otherwise, it returns +.Dv false . +.Pp +The +.Fn bhnd_match_core +function returns a pointer to the first entry in the array +.Fa cores +of length +.Fa num_cores +that matches +.Fa desc . +If no matching core is found, +.Dv NULL +is returned. +.Pp +A +.Vt bhnd_board_match +match descriptor may be initialized using one or more of the following macros: +.Pp +.Bl -tag -width "Fn BHND_MATCH_BOARD_VENDOR vendor" -offset indent +.It Fn BHND_MATCH_BOARD_VENDOR "vendor" +Match on boards with a vendor equal to +.Fa vendor . +.It Fn BHND_MATCH_BOARD_TYPE "type" +Match on boards with a type equal to +.Dv "BHND_BOARD_ ##" +.Fa type +.It Fn BHND_MATCH_SROMREV "sromrev" +Match on boards with a sromrev that matches +.Dv "BHND_HWREV_ ##" +.Fa sromrev . +.It Fn BHND_MATCH_BOARD_REV "hwrev" +Match on boards with hardware revisions that match +.Dv "BHND_ ##" +.Fa hwrev . +.It Fn BHND_MATCH_BOARD "vendor" "type" +A convenience wrapper for +.Fn BHND_MATCH_BOARD_VENDOR +and +.Fn BHND_MATCH_BOARD_TYPE . +.El +.Pp +For example: +.Bd -literal -offset indent +struct bhnd_board_match board_desc = { + BHND_MATCH_BOARD_VENDOR(BHND_MFGID_BROADCOM), + BHND_MATCH_BOARD_TYPE(BCM94360X52C), + BHND_MATCH_BOARD_REV(HWREV_ANY), + BHND_MATCH_SROMREV(RANGE(0, 10)) +}; +.Ed +.Pp +A +.Vt bhnd_chip_match +match descriptor may be initialized using one or more of the following macros: +.Pp +.Bl -tag -width "Fn BHND_MATCH_CHIP_IPR id pkg hwrev" -offset indent +.It Fn BHND_MATCH_CHIP_ID "id" +Match on chips with an ID equal to +.Dv "BHND_CHIPID_ ##" +.Fa id +.It Fn BHND_MATCH_CHIP_REV "hwrev" +Match on chips with hardware revisions that match +.Dv "BHND_ ##" +.Fa hwrev . +.It Fn BHND_MATCH_CHIP_PKG "pkg" +Match on chips with a package ID equal to +.Dv "BHND_PKGID_ ##" +.Fa pkg +.It Fn BHND_MATCH_CHIP_TYPE "type" +Match on chips with a chip type equal to +.Dv "BHND_CHIPTYPE_ ##" +.Fa type +.It Fn BHND_MATCH_CHIP_IP "id" "pkg" +A convenience wrapper for +.Fn BHND_MATCH_CHIP_ID +and +.Fn BHND_MATCH_CHIP_PKG . +.It Fn BHND_MATCH_CHIP_IPR "id" "pkg" "hwrev" +A convenience wrapper for +.Fn BHND_MATCH_CHIP_ID , +.Fn BHND_MATCH_CHIP_PKG , +and +.Fn BHND_MATCH_CHIP_REV . +.It Fn BHND_MATCH_CHIP_IR "id" "hwrev" +A convenience wrapper for +.Fn BHND_MATCH_CHIP_ID +and +.Fn BHND_MATCH_CHIP_REV . +.El +.Pp +For example: +.Bd -literal -offset indent +struct bhnd_chip_match chip_desc = { + BHND_MATCH_CHIP_IP(BCM4329, BCM4329_289PIN), + BHND_MATCH_CHIP_TYPE(SIBA) +}; +.Ed +.Pp +A +.Vt bhnd_core_match +match descriptor may be initialized using one or more of the following macros: +.Pp +.Bl -tag -width "Fn BHND_MATCH_CORE_VENDOR vendor" -offset indent +.It Fn BHND_MATCH_CORE_VENDOR "vendor" +Match on cores with a vendor ID equal to +.Fa vendor +.It Fn BHND_MATCH_CORE_ID "id" +Match on cores with a device ID equal to +.Fa id +.It Fn BHND_MATCH_CORE_REV "hwrev" +Match on cores with hardware revisions that match +.Dv "BHND_ ##" +.Fa hwrev . +.It Fn BHND_MATCH_CORE_CLASS "class" +Match on cores with a core device class equal to +.Fa class +.It Fn BHND_MATCH_CORE_IDX "idx" +Match on cores with a core index equal to +.Fa idx +.It Fn BHND_MATCH_CORE_UNIT "unit" +Match on cores with a core unit equal to +.Fa unit +.It Fn BHND_MATCH_CORE "vendor" "id" +A convenience wrapper for +.Fn BHND_MATCH_CORE_VENDOR +and +.Fn BHND_MATCH_CORE_ID . +.El +.Pp +For example: +.Bd -literal -offset indent +struct bhnd_core_match core_desc = { + BHND_MATCH_CORE(BHND_MFGID_BROADCOM, BHND_COREID_CC), + BHND_MATCH_CORE_REV(HWREV_RANGE(0, 10)) +}; +.Ed +.Pp +The +.Vt bhnd_device_match +match descriptor supports matching on all board, chip, and core attributes, +and may be initialized using any of the +.Vt bhnd_board_match , +.Vt bhnd_chip_match , +or +.Vt bhnd_core_match +macros. +.Pp +For example: +.Bd -literal -offset indent +struct bhnd_device_match device_desc = { + BHND_MATCH_CHIP_IP(BCM4329, BCM4329_289PIN), + BHND_MATCH_BOARD_VENDOR(BHND_MFGID_BROADCOM), + BHND_MATCH_BOARD_TYPE(BCM94329AGB), + BHND_MATCH_CORE(BHND_MFGID_BROADCOM, BHND_COREID_CC), +}; +.Ed +.Pp +A +.Vt bhnd_hwrev_match +match descriptor may be initialized using one of the following macros: +.Pp +.Bl -tag -width "Fn BHND_HWREV_RANGE start end" -offset indent -compact +.It Dv BHND_HWREV_ANY +Matches any hardware revision. +.It Fn BHND_HWREV_EQ "hwrev" +Matches any hardware revision equal to +.Fa hwrev +.It Fn BHND_HWREV_GTE "hwrev" +Matches any hardware revision greater than or equal to +.Fa hwrev +.It Fn BHND_HWREV_LTE "hwrev" +Matches any hardware revision less than or equal to +.Fa hwrev +.It Fn BHND_HWREV_RANGE "start" "end" +Matches any hardware revision within an inclusive range. +If +.Dv BHND_HWREV_INVALID +is specified as the +.Fa end +value, will match on any revision equal to or greater than +.Fa start +.El +.\" +.Ss "Device Table Functions" +The bhnd device table functions are used to query device and +quirk tables. +.Pp +The +.Fn bhnd_device_lookup +function returns a pointer to the first entry in device table +.Fa table +that matches the device +.Fa dev . +The table entry size is specified by +.Fa entry_size . +.Pp +The +.Fn bhnd_device_quirks +function scan the device table +.Fa table +for all quirk entries that match the device +.Fa dev , +returning the bitwise OR of all matching quirk flags. +The table entry size is specified by +.Fa entry_size . +.Pp +The +.Vt bhnd_device +structure contains the following fields: +.Bl -tag -width "quirks_table" -offset indent -compact +.It Fa core +A +.Vt bhnd_device_match +descriptor. +.It Fa desc +A verbose device description suitable for use with +.Xr device_set_desc 9 , +or +.Dv NULL . +.It Fa quirks_table +The quirks table for this device, or +.Dv NULL . +.It Fa device_flags +The device flags required when matching this entry. +.El +.Pp +The following device flags are supported: +.Bl -tag -width ".Dv BHND_DF_ADAPTER" -offset indent -compact +.It Dv BHND_DF_ANY +Match on any device. +.It Dv BHND_DF_HOSTB +Match only if the device is the +.Xr bhndb 4 +host bridge. +Implies +.Dv BHND_DF_ADAPTER . +.It Dv BHND_DF_SOC +Match only if the device is attached to a native SoC backplane. +.It Dv BHND_DF_ADAPTER +Match only if the device is attached to a +.Xr bhndb 4 +bridged backplane. +.El +.Pp +A +.Vt bhnd_device +table entry may be initialized using one of the following macros: +.Pp +.Bl -ohang -offset indent +.It Fn BHND_DEVICE "vendor" "device" "desc" "quirks" "flags" +Match on devices with a vendor ID equal to +.Dv BHND_MFGID_ ## +.Fa vendor +and a core device ID equal to +.Dv BHND_COREID_ ## +.Fa device . +.Pp +The device's verbose description is specified by the +.Fa desc +argument, a pointer to the device-specific quirks table is specified by the +.Fa quirks +argument, and any required device flags may be provided in +.Fa flags . +The optional +.Fa flags +argument defaults to +.Dv BHND_DF_ANY +if omitted. +.It Dv BHND_DEVICE_END +Terminate the +.Vt bhnd_device +table. +.El +.Pp +For example: +.Bd -literal -offset indent +struct bhnd_device bhnd_usb11_devices[] = { + BHND_DEVICE(BCM, USB, "Broadcom USB1.1 Controller", + bhnd_usb11_quirks), + BHND_DEVICE_END +}; +.Ed +.Pp +The +.Vt bhnd_device_quirk +structure contains the following fields: +.Bl -tag -width "quirks_table" -offset indent -compact +.It Fa desc +A +.Vt bhnd_device_match +descriptor. +.It Fa quirks +Applicable quirk flags. +.El +.Pp +A bhnd_device_quirk table entry may be initialized using one of the following +convenience macros: +.Bl -tag -width "Fn BHND_CHIP_QUIRK chip hwrev flags" -offset indent +.It Fn BHND_BOARD_QUIRK "board" "flags" +Set quirk flags +.Fa flags +on devices with a board type equal to +.Dv BHND_BOARD_ ## +.Fa board . +.It Fn BHND_CHIP_QUIRK "chip" "hwrev" "flags" +Set quirk flags +.Fa flags +on devices with a chip ID equal to +.Dv BHND_CHIPID_BCM ## +.Fa chip +and chip hardware revision that matches +.Dv BHND_ ## +.Fa hwrev . +.It Fn BHND_PKG_QUIRK "chip" "pkg" flags" +Set quirk flags +.Fa flags +on devices with a chip ID equal to +.Dv BHND_CHIPID_BCM ## +.Fa chip +and chip package equal to +.Dv BHND_ ## chip ## +.Fa pkg . +.It Fn BHND_CORE_QUIRK "hwrev" flags" +Set quirk flags +.Fa flags +on devices with a core hardware revision that matches +.Dv BHND_ ## +.Fa hwrev . +.El +For example: +.Bd -literal -offset indent +struct bhnd_device_quirk bhnd_usb11_quirks[] = { + BHND_DEVICE(BCM, USB, "Broadcom USB1.1 Controller", + bhnd_usb11_quirks), + BHND_DEVICE_END +}; +.Ed +.Ss "DMA Address Translation Functions" +The +.Fn bhnd_get_dma_translation +function is used to request a DMA address translation descriptor suitable +for use with a maximum DMA address width of +.Fa width , +with support for the requested translation +.Fa flags . +.Pp +If a suitable DMA address translation descriptor is found, it will be stored in +.Fa translation , +and a bus DMA tag specifying the DMA translation's address restrictions will +be stored in +.Fa dmat . +The +.Fa translation +and +.Fa dmat +arguments may be +.Dv NULL +if the translation descriptor or DMA tag are not desired. +.Pp +The following DMA translation flags are supported: +.Bl -ohang -width ".Dv BHND_DMA_TRANSLATION_BYTESWAPPED" -offset indent +.It Dv BHND_DMA_TRANSLATION_PHYSMAP +The translation remaps the device's physical address space. +.Pp +This is used in conjunction with +.Dv BHND_DMA_TRANSLATION_BYTESWAPPED +to define a DMA translation that provides byteswapped access to physical memory +on big-endian MIPS SoCs. +.It Dv BHND_DMA_TRANSLATION_BYTESWAPPED +The translation provides a byte-swapped mapping; write requests will be +byte-swapped before being written to memory, and read requests will be +byte-swapped before being returned. +.Pp +This is primarily used to perform efficient byte swapping of DMA data on +embedded MIPS SoCs executing in big-endian mode. +.El +.Pp +The following symbolic constants are defined for common DMA address widths: +.Pp +.Bl -tag -width ".Dv BHND_DMA_ADDR_64BIT" -offset indent -compact +.It Dv BHND_DMA_ADDR_30BIT +30-bit DMA +.It Dv BHND_DMA_ADDR_32BIT +32-bit DMA +.It Dv BHND_DMA_ADDR_64BIT +64-bit DMA +.El +.Pp +The +.Vt bhnd_dma_translation +structure contains the following fields: +.Bl -tag -width "addrext_mask" +.It Fa base_addr +Host-to-device physical address translation. +This may be added to a host physical address to produce a device DMA address. +.It Fa addr_mask +Device-addressable address mask. +This defines the device DMA address range, and excludes any bits reserved for +mapping the address within the translation window at +.Fa base_addr . +.It Fa addrext_mask +Device-addressable extended address mask. +If a the per-core BHND DMA engine supports the 'addrext' control field, it can +be used to provide address bits excluded by +.Fa addr_mask . +.Pp +Support for DMA extended address changes \(em including coordination with the +core providing device-to-host DMA address translation \(em is handled +transparently by the DMA engine. +.Pp +For example, on PCI Wi-Fi devices, the Wi-Fi core's DMA engine will (in effect) +update the PCI host bridge core's DMA +.Dv sbtopcitranslation +base address to map the target address prior to performing a DMA transaction. +.It Fa flags +Translation flags. +.El +.\" +.Ss "Interrupt Functions" +The +.Fn bhnd_get_intr_count +function is used to determine the number of backplane interrupt lines assigned +to the device +.Fa dev . +Interrupt line identifiers are allocated in monotonically increasing order, +starting with 0. +.Pp +The +.Fn bhnd_get_intr_ivec +function is used to determine the backplane interrupt vector assigned to +interrupt line +.Fa intr +on the device +.Fa dev , +writing the result to +.Fa ivec . +Interrupt vector assignments are backplane-specific: On BCMA devices, this +function returns the OOB bus line assigned to the interrupt. +On SIBA devices, it returns the target OCP slave flag number assigned to the +interrupt. +.Pp +The +.Fn bhnd_map_intr +function is used to map interrupt line +.Fa intr +assigned to device +.Fa dev +to an IRQ number, writing the result to +.Fa irq . +Until unmapped, this IRQ may be used when allocating a resource of type +SYS_RES_IRQ. +.Pp +Ownership of the interrupt mapping is assumed by the caller, and must be +explicitly released using +.Fa bhnd_unmap_intr . +.Pp +The +.Fn bhnd_unmap_intr +function is used to unmap bus IRQ +.Fa irq +previously mapped using +.Fn bhnd_map_intr +by the device +.Fa dev . +.\" +.Ss "NVRAM Functions" +The +.Fn bhnd_nvram_getvar +function is used to read the value of NVRAM variable +.Fa name +from the NVRAM provider(s) registered with the parent +.Xr bhnd 4 +bus of device +.Fa dev , +coerced to the desired data representation +.Fa type , +written to the buffer specified by +.Fa buf . +.Pp +Before the call, the maximum capacity of +.Fa buf +is specified by +.Fa len . +After a successful call \(em or if +.Er ENOMEM +is returned \(em the size of the available data will be written to +.Fa len . +The size of the desired data representation can be determined by calling +.Fn bhnd_nvram_getvar +with a +.Dv NULL +argument for +.Fa buf . +.Pp +The following NVRAM data types are supported: +.Pp +.Bl -tag -width ".Dv BHND_NVRAM_TYPE_UINT64_ARRAY" -offset indent -compact +.It Dv BHND_NVRAM_TYPE_UINT8 +unsigned 8-bit integer +.It Dv BHND_NVRAM_TYPE_UINT16 +unsigned 16-bit integer +.It Dv BHND_NVRAM_TYPE_UINT32 +unsigned 32-bit integer +.It Dv BHND_NVRAM_TYPE_UINT64 +signed 64-bit integer +.It Dv BHND_NVRAM_TYPE_INT8 +signed 8-bit integer +.It Dv BHND_NVRAM_TYPE_INT16 +signed 16-bit integer +.It Dv BHND_NVRAM_TYPE_INT32 +signed 32-bit integer +.It Dv BHND_NVRAM_TYPE_INT64 +signed 64-bit integer +.It Dv BHND_NVRAM_TYPE_CHAR +UTF-8 character +.It Dv BHND_NVRAM_TYPE_STRING +UTF-8 NUL-terminated string +.It Dv BHND_NVRAM_TYPE_BOOL +uint8 boolean value +.It Dv BHND_NVRAM_TYPE_NULL +NULL (empty) value +.It Dv BHND_NVRAM_TYPE_DATA +opaque octet string +.It Dv BHND_NVRAM_TYPE_UINT8_ARRAY +array of uint8 integers +.It Dv BHND_NVRAM_TYPE_UINT16_ARRAY +array of uint16 integers +.It Dv BHND_NVRAM_TYPE_UINT32_ARRAY +array of uint32 integers +.It Dv BHND_NVRAM_TYPE_UINT64_ARRAY +array of uint64 integers +.It Dv BHND_NVRAM_TYPE_INT8_ARRAY +array of int8 integers +.It Dv BHND_NVRAM_TYPE_INT16_ARRAY +array of int16 integers +.It Dv BHND_NVRAM_TYPE_INT32_ARRAY +array of int32 integers +.It Dv BHND_NVRAM_TYPE_INT64_ARRAY +array of int64 integers +.It Dv BHND_NVRAM_TYPE_CHAR_ARRAY +array of UTF-8 characters +.It Dv BHND_NVRAM_TYPE_STRING_ARRAY +array of UTF-8 NUL-terminated strings +.It Dv BHND_NVRAM_TYPE_BOOL_ARRAY +array of uint8 boolean values +.El +.Pp +The +.Fn bhnd_nvram_getvar_array , +.Fn bhnd_nvram_getvar_int , +.Fn bhnd_nvram_getvar_int8 , +.Fn bhnd_nvram_getvar_int16 , +.Fn bhnd_nvram_getvar_int32 , +.Fn bhnd_nvram_getvar_uint , +.Fn bhnd_nvram_getvar_uint8 , +.Fn bhnd_nvram_getvar_uint16 , +.Fn bhnd_nvram_getvar_uint32 , +and +.Fn bhnd_nvram_getvar_str +functions are convenience wrappers for +.Fn bhnd_nvram_getvar . +.Pp +The +.Fn bhnd_nvram_getvar_array +function returns either a value of exactly +.Fa size +in +.Fa buf , +or returns an error code of +.Er ENXIO +if the data representation is not exactly +.Fa size +in length. +.Pp +The +.Fn bhnd_nvram_getvar_int +and +.Fn bhnd_nvram_getvar_uint +functions return the value of NVRAM variable +.Fa name , +coerced to a signed or unsigned integer +type of +.Fa width +(1, 2, or 4 bytes). +.Pp +The +.Fn bhnd_nvram_getvar_int8 , +.Fn bhnd_nvram_getvar_int16 , +.Fn bhnd_nvram_getvar_int32 , +.Fn bhnd_nvram_getvar_uint , +.Fn bhnd_nvram_getvar_uint8 , +.Fn bhnd_nvram_getvar_uint16 , +and +.Fn bhnd_nvram_getvar_uint32 +functions return the value of NVRAM variable +.Fa name , +coerced to a signed or unsigned 8, 16, or 32-bit integer type. +.Pp +The +.Fn bhnd_nvram_getvar_str +functions return the value of NVRAM variable +.Fa name , +coerced to a NUL-terminated string. +.Pp +The +.Fn bhnd_nvram_string_array_next +function iterates over all strings in the +.Fa inp +.Dv BHND_NVRAM_TYPE_STRING_ARRAY +value. +The size of +.Fa inp , +including any terminating NUL character(s), is specified using the +.Fa ilen +argument. +The +.Fa prev +argument should be either a string pointer previously returned by +.Fn bhnd_nvram_string_array_next , +or +.Dv NULL +to begin iteration. +If +.Fa prev is not +.Dv NULL , +the +.Fa olen +argument must be a pointer to the length previously returned by +.Fn bhnd_nvram_string_array_next . +On success, the next string element's length will be written to this pointer. +.\" +.Ss "Port/Region Functions" +Per-device interconnect memory mappings are identified by a combination of +.Em port type , +.Em port number , +and +.Em region number . +Port and memory region identifiers are allocated in monotonically increasing +order for each +.Em port type , +starting with 0. +.Pp +The following port types are supported: +.Bl -tag -width ".Dv BHND_PORT_DEVICE" -offset indent +.It Dv BHND_PORT_DEVICE +Device memory. +The device's control/status registers are always mapped by the first device port +and region, and will be assigned a +.Dv SYS_RES_MEMORY +resource ID of 0. +.It Dv BHND_PORT_BRIDGE +Bridge memory. +.It Dv BHND_PORT_AGENT +Interconnect agent/wrapper. +.El +.Pp +The +.Fn bhnd_decode_port_rid +function is used to decode the resource ID +.Fa rid +assigned to device +.Fa dev , +of resource type +.Fa type , +writing the port type to +.Fa port_type , +port number to +.Fa port , +and region number +to +.Fa region . +.Pp +The +.Fn bhnd_get_port_count +function returns the number of ports of type +.Fa type +assigned to device +.Fa dev . +.Pp +The +.Fn bhnd_get_port_rid +function returns the resource ID for the +.Dv SYS_RES_MEMORY +resource mapping the +.Fa port +of +.Fa type +and +.Fa region +on device +.Fa dev , +or -1 if the port or region are invalid, or do not have an assigned resource ID. +.Pp +The +.Fn bhnd_get_region_addr +function is used to determine the base address and size of the memory +.Fa region +on +.Fa port +of +.Fa type +assigned to +.Fa dev . +The region's base device address will be written to +.Fa region_addr , +and the region size to +.Fa region_size . +.Pp +The +.Fn bhnd_get_region_count +function returns the number of memory regions mapped to +.Fa port +of +.Fa type +on device +.Fa dev . +.Pp +The +.Fn bhnd_is_region_valid +function returns +.Dv true +if +.Fa region +is a valid region mapped by +.Fa port +of +.Fa type +on device +.Fa dev . +.\" +.Ss "Power Management Functions" +Drivers must ask the parent +.Xr bhnd 4 +bus to allocate device PMU state using +.Fn bhnd_alloc_pmu +before calling any another bhnd PMU functions. +.Pp +The +.Fn bhnd_alloc_pmu +function is used to allocate per-device PMU state and enable PMU request +handling for device +.Fa dev . +The memory region containing the device's PMU register block must be allocated +using +.Xr bus_alloc_resource 9 +or +.Fn bhnd_alloc_resource +before calling +.Fn bhnd_alloc_pmu , +and must not be released until after calling +.Fn bhnd_release_pmu . +.Pp +On all supported BHND hardware, the PMU register block is mapped by the device's +control/status registers in the first device port and region. +.Pp +The +.Fn bhnd_release_pmu +function releases the per-device PMU state previously allocated for device +.Fa dev +using +.Fn bhnd_alloc_pmu . +Any outstanding clock and external resource requests will be discarded upon +release of the device PMU state. +.Pp +The +.Fn bhnd_enable_clocks +function is used to request that +.Fa clocks +be powered up and routed to the backplane on behalf of device +.Fa dev . +This will power any clock sources required (e.g., XTAL, PLL, etc) and wait until +the requested clocks are stable. +If the request succeeds, any previous clock requests issued by +.Fa dev +will be discarded. +.Pp +The following clocks are supported, and may be combined using bitwise OR to +request multiple clocks: +.Pp +.Bl -tag -width ".Dv BHND_CLOCK_DYN" -offset indent +.It BHND_CLOCK_DYN +Dynamically select an appropriate clock source based on all outstanding clock +requests by any device attached to the parent +.Xr bhnd 4 +bus. +.It BHND_CLOCK_ILP +Idle Low-Power (ILP) Clock. +May be used if no register access is required, or long request latency is +acceptable. +.It BHND_CLOCK_ALP +Active Low-Power (ALP) Clock. +Supports low-latency register access and low-rate DMA. +.It BHND_CLOCK_HT +High Throughput (HT) Clock. +Supports high bus throughput and lowest-latency register access. +.El +.Pp +The +.Fn bhnd_request_clock +function is used to request that +.Fa clock +(or faster) be powered up and routed to device +.Fa dev . +.Pp +The +.Fn bhnd_get_clock_freq +function is used to request the current clock frequency of +.Fa clock , +writing the frequency in Hz to +.Fa freq . +.Pp +The +.Fn bhnd_get_clock_latency +function is used to determine the transition latency required for +.Fa clock , +writing the latency in microseconds to +.Fa latency . +The +.Dv BHND_CLOCK_HT +latency value is suitable for use as the D11 Wi-Fi core +.Em fastpwrup_dly +value. +.Pp +The +.Fn bhnd_request_ext_rsrc +function is used to request that the external PMU-managed resource assigned to +device +.Fa dev , +identified by device-specific identifier +.Fa rsrc , +be powered up. +.Pp +The +.Fn bhnd_release_ext_rsrc +function releases any outstanding requests by device +.Fa dev +for the PMU-managed resource identified by device-specific identifier +.Fa rsrc . +If an external resource is shared by multiple devices, it will not be powered +down until all device requests are released. +.\" +.Ss "Service Provider Functions" +The +.Fn bhnd_register_provider +function is used to register device +.Fa dev +as a provider for platform +.Fa service +with the parent +.Xr bhnd 4 +bus. +.Pp +The following service types are supported: +.Bl -tag -width ".Dv BHND_SERVICE_INVALID" -offset indent +.It Dv BHND_SERVICE_CHIPC +ChipCommon service. +The providing device must implement the bhnd_chipc interface. +.It Dv BHND_SERVICE_PWRCTL +Legacy PWRCTL service. +The providing device must implement the bhnd_pwrctl interface. +.It Dv BHND_SERVICE_PMU +PMU service. +The providing device must implement the bhnd_pmu interface. +.It Dv BHND_SERVICE_NVRAM +NVRAM service. +The providing device must implement the bhnd_nvram interface. +.It Dv BHND_SERVICE_GPIO +GPIO service. +The providing device must implement the standard +.Xr gpio 4 +interface. +.It Dv BHND_SERVICE_ANY +Matches on any service type. +May be used with +.Fn bhnd_deregister_provider +to remove all service provider registrations for a device. +.El +.Pp +The +.Fn bhnd_deregister_provider +function attempts to remove provider registration for the device +.Fa dev +and +.Fa service . +If a +.Fa service +argument of +.Dv BHND_SERVICE_ANY +is specified, this function will attempt to remove +.Em all service provider registrations for +.Fa dev . +.Pp +The +.Fn bhnd_retain_provider +function retains and returns a reference to the provider registered for +.Fa service +with the parent +.Xr bhnd 4 +bus of devce +.Fa dev , +if available. +On success, the caller is responsible for releasing this provider reference +using +.Fn bhnd_release_provider . +The service provider is guaranteed to remain available until the provider +reference is released. +.Pp +The +.Fn bhnd_release_provider +function releases a reference to a +.Fa provider +for +.Fa service , +previously retained by device +.Fa dev +using +.Fn bhnd_retain_provider . +.\" +.Ss "Utility Functions" +The +.Fn bhnd_driver_get_erom_class +function returns the +.Xr bhnd_erom 9 +class for the device enumeration table format used by +.Xr bhnd 4 +bus driver instance +.Fa driver . +If the driver does not support +.Xr bhnd_erom 9 +device enumeration, +.Dv NULL +is returned. +.Pp +The +.Fn bhnd_find_core_class +function looks up the BHND class, if known, for the BHND vendor ID +.Fa vendor +and device ID +.Fa device . +.Pp +The +.Fn bhnd_find_core_name +function is used to fetch the human-readable name, if known, for the BHND core +with a vendor ID of +.Fa vendor +and device ID of +.Fa device . +.Pp +The +.Fn bhnd_core_class +and +.Fn bhnd_core_name +functions are convenience wrappers for +.Fn bhnd_find_core_class +and +.Fn bhnd_find_core_name , +that use the +.Fa vendor +and +.Fa device +fields of the core info structure +.Fa ci . +.Pp +The +.Fn bhnd_format_chip_id +function writes a NUL-terminated human-readable representation of the BHND +.Fa chip_id +value to the specified +.Fa buffer +with a capacity of +.Fa size . +No more than +.Fa size-1 +characters will be written, with the +.Fa size'th +character set to '\\0'. +A buffer size of +.Dv BHND_CHIPID_MAX_NAMELEN +is sufficient for any string representation produced using +.Fn bhnd_format_chip_id . +.Pp +The +.Fn bhnd_set_custom_core_desc +function uses the +.Xr bhnd 4 +device identification of +.Fa dev , +overriding the core name with the specified +.Fa dev_name , +to populate the device's verbose description using +.Xr device_set_desc . +.Pp +The +.Fn bhnd_set_default_core_desc +function uses the +.Xr bhnd 4 +device identification of +.Fa dev +to populate the device's verbose description using +.Xr device_set_desc . +.Pp +The +.Fn bhnd_vendor_name +function returns the human-readable name for the JEP-106, ARM 4-bit +continuation encoded manufacturer ID +.Fa vendor , +if known. +.\" +.Sh RETURN VALUES +.Ss Bus Resource Functions +The +.Fn bhnd_activate_resource , +.Fn bhnd_alloc_resources , +.Fn bhnd_deactivate_resource , +and +.Fn bhnd_release_resource +functions return 0 on success, otherwise an appropriate error code is returned. +.Pp +The +.Fn bhnd_alloc_resource +and +.Fn bhnd_alloc_resource_any +functions return a pointer to +.Vt "struct resource" +on success, a null pointer otherwise. +.\" +.Ss "Device Configuration Functions" +.Pp +The +.Fn bhnd_read_config +and +.Fn bhnd_write_config +functions return 0 on success, or one of the following values on error: +.Bl -tag -width Er +.It Bq Er EINVAL +The device is not a direct child of the +.Xr bhnd 4 +bus +.It Bq Er EINVAL +The requested width is not one of 1, 2, or 4 bytes. +.It Bq Er ENODEV +Accessing agent/config space for the device is unsupported. +.It Bq Er EFAULT +The requested offset or width exceeds the bounds of the mapped agent/config +space. +.El +.Pp +The +.Fn bhnd_read_ioctl , +.Fn bhnd_write_ioctl , +.Fn bhnd_read_iost , +.Fn bhnd_reset_hw , +and +.Fn bhnd_suspend_hw +functions return 0 on success, otherwise an appropriate error code is returned. +.\" +.Ss "Device Information Functions" +.Pp +The +.Fn bhnd_read_board_info +function returns 0 on success, otherwise an appropriate error code is returned. +.\" +.Ss "DMA Address Translation Functions" +The +.Fn bhnd_get_dma_translation +function returns 0 on success, or one of the following values on error: +.Bl -tag -width Er +.It Bq Er ENODEV +DMA is not supported. +.It Bq Er ENOENT +No DMA translation matching the requested address width and translation flags +is available. +.El +.Pp +If fetching the requested DMA address translation otherwise fails, an +appropriate error code will be returned. +.\" +.Ss "Interrupt Functions" +.Pp +The +.Fn bhnd_get_intr_ivec +function returns +0 on success, or +.Er ENXIO +if the requested interrupt line exceeds the number of interrupt lines assigned +to the device. +.Pp +The +.Fn bhnd_map_intr +function returns 0 on success, otherwise an appropriate error code is returned. +.\" +.Ss "NVRAM Functions" +The +.Fn bhnd_nvram_getvar , +.Fn bhnd_nvram_getvar_array , +.Fn bhnd_nvram_getvar_int , +.Fn bhnd_nvram_getvar_int8 , +.Fn bhnd_nvram_getvar_int16 , +.Fn bhnd_nvram_getvar_int32 , +.Fn bhnd_nvram_getvar_uint , +.Fn bhnd_nvram_getvar_uint8 , +.Fn bhnd_nvram_getvar_uint16 , +and +.Fn bhnd_nvram_getvar_uint32 +functions return 0 on success, or one of the following values on error: +.Bl -tag -width Er +.It Bq Er ENODEV +If an NVRAM provider has not been registered with the bus. +.It Bq Er ENOENT +The requested variable was not found. +.It Bq Er ENOMEM +If the buffer of size is too small to hold the requested value. +.It Bq Er EOPNOTSUPP +If the value's native type is incompatible with and cannot be coerced to the +requested type. +.It Bq Er ERANGE +If value coercion would overflow (or underflow) the requested type +.El +.Pp +If reading the variable otherwise fails, an appropriate error code will be +returned. +.\" +.Ss "Port/Region Functions" +The +.Fn bhnd_decode_port_rid +function returns +0 on success, or an appropriate error code if no matching port/region is found. +.Pp +The +.Fn bhnd_get_port_rid +function returns the resource ID for the requested port and region, +or -1 if the port or region are invalid, or do not have an assigned resource ID. +.Pp +The +.Fn bhnd_get_region_addr +function returns +0 on success, or an appropriate error code if no matching port/region is found. +.\" +.Ss "PMU Functions" +The +.Fn bhnd_alloc_pmu +function returns 0 on success, otherwise an appropriate error code is returned. +.Pp +The +.Fn bhnd_release_pmu +function returns 0 on success, otherwise an appropriate error code is returned, +and the core state will be left unmodified. +.Pp +The +.Fn bhnd_enable_clocks +and +.Fn bhnd_request_clock +functions return 0 on success, or one of the following values on error: +.Bl -tag -width Er +.It Bq Er ENODEV +An unsupported clock was requested. +.It Bq Er ENXIO +No PMU or PWRCTL provider has been registered with the bus. +.El +.Pp +The +.Fn bhnd_get_clock_freq +function returns 0 on success, or +.Er ENODEV +if the frequency for the specified clock is not available. +.Pp +The +.Fn bhnd_get_clock_latency +function returns 0 on success, or +.Er ENODEV +if the transition latency for the specified clock is not available. +.Pp +The +.Fn bhnd_request_ext_rsrc +and +.Fn bhnd_release_ext_rsrc +functions return 0 on success, otherwise an appropriate error code is returned. +.Pp +.\" +.Ss "Service Provider Functions" +The +.Fn bhnd_register_provider +function returns 0 on success, +.Er EEXIST +if an entry for service already exists, or an appropriate error code if +service registration otherwise fails. +.Pp +The +.Fn bhnd_deregister_provider +function returns 0 on success, or +.Er EBUSY +if active references to the service provider exist. +.Pp +The +.Fn bhnd_retain_provider +function returns a pointer to +.Vt "device_t" +on success, a null pointer if the requested provider is not registered. +.\" +.Ss "Utility Functions" +.Pp +The +.Fn bhnd_format_chip_id +function returns the total number of bytes written on success, or a negative +integer on failure. +.\" +.Sh SEE ALSO +.Xr bhnd 4 +.Xr bhnd_erom 9 +.Sh AUTHORS +.An -nosplit +The +.Nm +driver programming interface and this manual page were written by +.An Landon Fuller Aq Mt landonf@FreeBSD.org . Property changes on: head/share/man/man9/bhnd.9 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/share/man/man9/bhnd_erom.9 =================================================================== --- head/share/man/man9/bhnd_erom.9 (nonexistent) +++ head/share/man/man9/bhnd_erom.9 (revision 326291) @@ -0,0 +1,488 @@ +.\" Copyright (c) 2015-2016 Landon Fuller +.\" Copyright (c) 2017 The FreeBSD Foundation +.\" All rights reserved. +.\" +.\" Portions of this documentation were written by Landon Fuller +.\" under sponsorship from the FreeBSD Foundation. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD$ +.\" +.Dd November 9, 2017 +.Dt BHND_EROM 9 +.Os +.Sh NAME +.Nm bhnd_erom , +.Nm bhnd_erom_alloc , +.Nm bhnd_erom_dump , +.Nm bhnd_erom_fini_static , +.Nm bhnd_erom_free , +.Nm bhnd_erom_free_core_table , +.Nm bhnd_erom_get_core_table , +.Nm bhnd_erom_init_static , +.Nm bhnd_erom_io , +.Nm bhnd_erom_io_fini , +.Nm bhnd_erom_io_map , +.Nm bhnd_erom_io_read , +.Nm bhnd_erom_iobus_init , +.Nm bhnd_erom_iores_new , +.Nm bhnd_erom_lookup_core , +.Nm bhnd_erom_lookup_core_addr , +.Nm bhnd_erom_probe , +.Nm bhnd_erom_probe_driver_classes +.Nd BHND device enumeration table parsing +.Sh SYNOPSIS +.In dev/bhnd/bhnd.h +.In dev/bhnd/bhnd_erom.h +.\" +.Vt typedef struct bhnd_erom bhnd_erom_t ; +.Vt typedef struct kobj_class bhnd_erom_class_t ; +.Vt typedef struct bhnd_erom_static bhnd_erom_static_t ; +.Ft int +.Fo bhnd_erom_probe +.Fa "bhnd_erom_class_t *cls" +.Fa "struct bhnd_erom_io *eio" +.Fa "const struct bhnd_chipid *hint" +.Fa "struct bhnd_chipid *cid" +.Fc +.Ft bhnd_erom_class_t * +.Fo bhnd_erom_probe_driver_classes +.Fa "devclass_t bus_devclass" +.Fa "struct bhnd_erom_io *eio" +.Fa "const struct bhnd_chipid *hint" +.Fa "struct bhnd_chipid *cid" +.Fc +.Ft bhnd_erom_t * +.Fo bhnd_erom_alloc +.Fa "bhnd_erom_class_t *cls" +.Fa "const struct bhnd_chipid *cid" +.Fa "struct bhnd_erom_io *eio" +.Fc +.Ft void +.Fo bhnd_erom_free +.Fa "bhnd_erom_t *erom" +.Fc +.Ft int +.Fo bhnd_erom_init_static +.Fa "bhnd_erom_class_t *cls" +.Fa "bhnd_erom_t *erom" +.Fa "size_t esize" +.Fa "const struct bhnd_chipid *cid" +.Fa "struct bhnd_erom_io *eio" +.Fc +.Ft void +.Fo bhnd_erom_fini_static +.Fa "bhnd_erom_t *erom" +.Fc +.Ft int +.Fo bhnd_erom_dump +.Fa "bhnd_erom_t *erom" +.Fc +.Ft int +.Fo bhnd_erom_get_core_table +.Fa "bhnd_erom_t *erom" +.Fa "struct bhnd_core_info **cores" +.Fa "u_int *num_cores" +.Fc +.Ft void +.Fo bhnd_erom_free_core_table +.Fa "bhnd_erom_t *erom" +.Fa "struct bhnd_core_info *cores" +.Fc +.Ft int +.Fo bhnd_erom_lookup_core +.Fa "bhnd_erom_t *erom" +.Fa "const struct bhnd_core_match *desc" +.Fa "struct bhnd_core_info *core" +.Fc +.Ft int +.Fo bhnd_erom_lookup_core_addr +.Fa "bhnd_erom_t *erom" +.Fa "const struct bhnd_core_match *desc" +.Fa "bhnd_port_type type" +.Fa "u_int port" +.Fa "u_int region" +.Fa "struct bhnd_core_info *core" +.Fa "bhnd_addr_t *addr" +.Fa "bhnd_size_t *size" +.Fc +.\" +.Ss Bus Space I/O +.Ft struct bhnd_erom_io * +.Fo bhnd_erom_iores_new +.Fa "device_t dev" +.Fa "int rid" +.Fc +.Ft int +.Fo bhnd_erom_iobus_init +.Fa "struct bhnd_erom_iobus *iobus" +.Fa "bhnd_addr_t addr" +.Fa "bhnd_size_t size" +.Fa "bus_space_tag_t bst" +.Fa "bus_space_handle_t bsh" +.Fc +.Ft void +.Fo bhnd_erom_io_fini +.Fa "struct bhnd_erom_io *eio" +.Fc +.Ft int +.Fo bhnd_erom_io_map +.Fa "struct bhnd_erom_io *eio" +.Fa "bhnd_addr_t addr" +.Fa "bhnd_size_t size" +.Fc +.Ft uint32_t +.Fo bhnd_erom_io_read +.Fa "struct bhnd_erom_io *eio" +.Fa "bhnd_size_t offset" +.Fa "u_int width" +.Fc +.In dev/bhnd/bhnd_eromvar.h +.Bd -literal +struct bhnd_erom_io { + bhnd_erom_io_map_t *map; + bhnd_erom_io_read_t *read; + bhnd_erom_io_fini_t *fini; +}; +.Ed +.Ft typedef int +.Fo \*(lpbhnd_erom_io_map_t\*(rp +.Fa "struct bhnd_erom_io *eio" +.Fa "bhnd_addr_t addr" +.Fa "bhnd_size_t size" +.Fc +.Ft typedef uint32_t +.Fo \*(lpbhnd_erom_io_read_t\*(rp +.Fa "struct bhnd_erom_io *eio" +.Fa "bhnd_size_t offset" +.Fa "u_int width" +.Fc +.Ft typedef void +.Fo "\*(lpbhnd_erom_io_fini_t\*(rp +.Fa "struct bhnd_erom_io *eio" +.Fc +.\" +.Sh DESCRIPTION +The +.Nm +framework provides a common parser interface to the BHND device enumeration +table formats supported by +.Xr bhnd 4 +bus drivers. +.Pp +The +.Fn bhnd_erom_probe +function is used to identify a +.Xr bhnd 4 +bus device and determine whether the erom class +.Fa cls +is capable of parsing its device enumeration table. +If successful, the probed chip identification is written to the location +pointed to by +.Fa cid . +.Pp +A pointer to a bus I/O instance mapping the device registers of the first +hardware core must be provided using the +.Fa eio +argument. +The registers can be mapped using +.Xr bhnd_erom_io_map 9 . +.Pp +On devices that do not provide standard +.Xr bhnd_chipc 4 +chip identification registers via the first hardware core, a pointer to chip +information for the device must be specified using the +.Fa hint +argument. +Otherwise, the +.Fa hint +argument should be +.Dv NULL . +.Pp +The +.Fn bhnd_erom_probe_driver_classes +function is a convenience wrapper for +.Fn bhnd_erom_probe . +This function will iterate over all drivers instances in the device class +.Fa bus_devclass , +using +.Xr bhnd_driver_get_erom_class 9 +to fetch each driver's erom class and probe the hardware core mapped by +.Fa eio . +A pointer to the erom class with the highest probe priority is returned on +success. +If there are no successful probe results from the erom classes, +.Dv NULL +is returned. +.Pp +The +.Fn bhnd_erom_alloc +function allocates and returns a new parser instance of the device enumeration +class +.Fa cls +for the chip identified by +.Fa cid , +using the bus I/O instance +.Fa eio +to map and read the device table. +On success, the returned +.Vt bhnd_erom_t +assumes ownership of +.Fa eio . +.Pp +The +.Fn bhnd_erom_free +function releases all resources held by an erom parser successfully allocated +using +.Fn bhnd_erom_alloc . +.Pp +Clients can manage the allocation of memory themselves with +.Fn bhnd_erom_init_static . +This is useful in cases like performing device enumeration before +.Xr malloc 9 +initialization. +.Fn bhnd_erom_init_static +is called with +.Fa erom +set to a pointer to the memory for the instance, and the total available bytes +in +.Fa esize . +.Pp +The +.Vt bhnd_erom_static +structure is large enough to statically allocate any supported parser class +instance state. +Pointers to a +.Vt bhnd_erom_static +structure can be cast to +.Vt bhnd_erom_t . +.Pp +The +.Fn bhnd_erom_fini_static +function releases all resources held by an erom parser successfully +initialized using +.Fn bhnd_erom_init_static . +.Pp +The +.Fn bhnd_erom_dump +function enumerates and prints all device table entries in +.Fa erom . +.Pp +The +.Fn bhnd_erom_get_core_table +function enumerates all device table entries in +.Fa erom , +returning a table of core information structures in +.Fa cores +and the count in +.Fa num_cores . +The memory allocated for the table must be freed using +.Fn bhnd_erom_free_core_table . +.Pp +The +.Fn bhnd_erom_free_core_table +function frees any memory allocated in a previous call to +.Fn bhnd_erom_get_core_table . +.Pp +The +.Fn bhnd_erom_lookup_core +function locates the first device table entry in +.Fa erom +that matches core match descriptor +.Fa desc , +writing the core information of the matching entry to +.Fa core . +.Pp +The +.Fn bhnd_erom_lookup_core_addr +function locates the first device table entry in +.Fa erom +that matches core match descriptor +.Fa desc , +fetching the base address and size of the memory region +.Fa region +mapped to the port +.Fa port +of type +.Fa type . +On success, the core information of the matching entry is written to +.Fa core , +the base address of the port region is written to +.Fa addr , +and the total size of the port region is written to +.Fa size . +If the core information is not desired, set +.Fa core +to +.Dv NULL . +.Ss Bus Space I/O +.Pp +The +.Vt bhnd_erom_io +structure provides a set of I/O callbacks used by +.Nm +to map and read the device enumeration table. +Clients may either use the existing +.Fn bhnd_erom_iores_new +or +.Fn bhnd_erom_iobus_init +functions to allocate a bus I/O instance, or implement the +.Vt bhnd_erom_io +callbacks directly. +.Pp +The +.Vt bhnd_erom_io +structure contains these required fields: +.Pp +.Bl -tag -width "read" -offset indent +.It Fa map +A function implementing +.Fn bhnd_erom_io_map . +.It Fa read +A function implementing +.Fn bhnd_erom_io_read . +.It Fa fini +A function implementing +.Fn bhnd_erom_io_fini . +.El +.Pp +The +.Fn bhnd_erom_iores_new +function allocates and returns a new bus I/O instance that will perform mapping +by using +.Xr bhnd_alloc_resource 9 +to allocate +.Dv SYS_RES_MEMORY +bus resources on demand from the device +.Fa dev +using a resource ID of +.Fa rid . +.Pp +The +.Fn bhnd_erom_iobus_init +function initializes a caller-allocated bus I/O instance +.Fa iobus +that will perform bus I/O using the bus space tag +.Fa bst +and handle +.Fa bsh . +The base address and total size mapped by +.Fa bsh +should be specified using the +.Fa addr +and +.Fa size +arguments. +.Pp +The +.Fn bhnd_erom_io_fini +function frees all resources held by the bus I/O instance +.Fa eio . +.Pp +The +.Fn bhnd_erom_io_map +function is used to request that the bus I/O instance +.Fa eio +map +.Xr bhnd 4 +bus space at bus address +.Fa addr +with a mapping of size +.Fa size . +.Pp +The +.Fn bhnd_erom_io_read +function is used to read a data item of +.Fa width +bytes from the bus I/O instance +.Fa eio +at +.Fa offset , +relative to the bus address previously mapped using +.Fn bhnd_erom_io_map . +.Pp +The +.Fa width +must be one of 1, 2, or 4 bytes. +.Pp +.Sh RETURN VALUES +The +.Fn bhnd_erom_probe +function returns a standard +.Xr DEVICE_PROBE 9 +result. +.Pp +A return value equal to or less than zero indicates success. +Values greater than zero indicates an error, and will be an appropriate error +code. +For values less than or equal to zero, the erom class returning the highest +value should be used to parse the erom table. +.Er ENXIO +is returned if the device is not supported by the parser. +.Pp +The +.Fn bhnd_erom_probe_driver_classes +function returns a pointer to the probed +.Vt bhnd_erom_class_t +instance on success, a null pointer otherwise. +.Pp +The +.Fn bhnd_erom_alloc +function returns a pointer to +.Vt bhnd_erom_t +on success, or +.Dv NULL +if an error occurred allocating or initializing the EROM parser. +.Pp +The +.Fn bhnd_erom_init_static +function returns 0 on success, +.Er ENOMEM +if the allocation size is smaller than required by the erom class, or +an appropriate error code if initialization otherwise fails. +.Pp +The +.Fn bhnd_erom_lookup_core +function returns 0 on success, +.Er ENOENT +if no matching core is found, or an appropriate error code if parsing the device +table otherwise fails. +.Pp +The +.Fn bhnd_erom_dump , +.Fn bhnd_erom_get_core_table , +.Fn bhnd_erom_iobus_init , +.Fn bhnd_erom_io_map , +functions return 0 on success, otherwise an appropriate error code is returned. +.Sh SEE ALSO +.Xr bhnd 4 , +.Xr bhnd 9 , +.Xr bhnd_alloc_resource 9 +.Xr bhnd_driver_get_erom_class 9 +.Xr bus_space 9 +.Sh AUTHORS +.An -nosplit +The +.Nm +framework and this manual page were written by +.An Landon Fuller Aq Mt landonf@FreeBSD.org . Property changes on: head/share/man/man9/bhnd_erom.9 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dev/bhnd/bhnd.h =================================================================== --- head/sys/dev/bhnd/bhnd.h (revision 326290) +++ head/sys/dev/bhnd/bhnd.h (revision 326291) @@ -1,1738 +1,1736 @@ /*- * Copyright (c) 2015-2016 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. * * $FreeBSD$ */ #ifndef _BHND_BHND_H_ #define _BHND_BHND_H_ #include #include #include #include #include #include "bhnd_ids.h" #include "bhnd_types.h" #include "bhnd_erom_types.h" #include "bhnd_debug.h" #include "bhnd_bus_if.h" #include "bhnd_match.h" #include "nvram/bhnd_nvram.h" extern devclass_t bhnd_devclass; extern devclass_t bhnd_hostb_devclass; extern devclass_t bhnd_nvram_devclass; #define BHND_CHIPID_MAX_NAMELEN 32 /**< maximum buffer required for a bhnd_format_chip_id() */ /** * bhnd child instance variables */ enum bhnd_device_vars { BHND_IVAR_VENDOR, /**< Designer's JEP-106 manufacturer ID. */ BHND_IVAR_DEVICE, /**< Part number */ BHND_IVAR_HWREV, /**< Core revision */ BHND_IVAR_DEVICE_CLASS, /**< Core class (@sa bhnd_devclass_t) */ BHND_IVAR_VENDOR_NAME, /**< Core vendor name */ BHND_IVAR_DEVICE_NAME, /**< Core name */ BHND_IVAR_CORE_INDEX, /**< Bus-assigned core number */ BHND_IVAR_CORE_UNIT, /**< Bus-assigned core unit number, assigned sequentially (starting at 0) for each vendor/device pair. */ BHND_IVAR_PMU_INFO, /**< Internal bus-managed PMU state */ }; /** * bhnd device probe priority bands. */ enum { BHND_PROBE_ROOT = 0, /**< Nexus or host bridge */ BHND_PROBE_BUS = 1000, /**< Buses and bridges */ BHND_PROBE_CPU = 2000, /**< CPU devices */ BHND_PROBE_INTERRUPT = 3000, /**< Interrupt controllers. */ BHND_PROBE_TIMER = 4000, /**< Timers and clocks. */ BHND_PROBE_RESOURCE = 5000, /**< Resource discovery (including NVRAM/SPROM) */ BHND_PROBE_DEFAULT = 6000, /**< Default device priority */ }; /** * Constants defining fine grained ordering within a BHND_PROBE_* priority band. * * Example: * @code * BHND_PROBE_BUS + BHND_PROBE_ORDER_FIRST * @endcode */ enum { BHND_PROBE_ORDER_FIRST = 0, BHND_PROBE_ORDER_EARLY = 25, BHND_PROBE_ORDER_MIDDLE = 50, BHND_PROBE_ORDER_LATE = 75, BHND_PROBE_ORDER_LAST = 100 }; /** * Per-core IOCTL flags common to all bhnd(4) cores. */ enum { BHND_IOCTL_BIST = 0x8000, /**< Initiate a built-in self-test (BIST). Must be cleared after BIST results are read via BHND_IOST_BIST_* */ BHND_IOCTL_PME = 0x4000, /**< Enable posting of power management events by the core. */ BHND_IOCTL_CFLAGS = 0x3FFC, /**< Reserved for core-specific ioctl flags. */ BHND_IOCTL_CLK_FORCE = 0x0002, /**< Force disable of clock gating, resulting in all clocks being distributed within the core. Should be set when asserting/deasserting reset to ensure the reset signal fully propagates to the entire core. */ BHND_IOCTL_CLK_EN = 0x0001, /**< If cleared, the core clock will be disabled. Should be set during normal operation, and cleared when the core is held in reset. */ }; /** * Per-core IOST flags common to all bhnd(4) cores. */ enum { BHND_IOST_BIST_DONE = 0x8000, /**< Set upon BIST completion (see BHND_IOCTL_BIST), and cleared if 0 is written to BHND_IOCTL_BIST. */ BHND_IOST_BIST_FAIL = 0x4000, /**< Set upon detection of a BIST error; the value is unspecified if BIST has not completed and BHND_IOST_BIST_DONE is not set. */ BHND_IOST_CLK = 0x2000, /**< Set if the core has requested that gated clocks be enabled, or cleared otherwise. The value is undefined if a core does not support clock gating. */ BHND_IOST_DMA64 = 0x1000, /**< Set if this core supports 64-bit DMA */ BHND_IOST_CFLAGS = 0x0FFC, /**< Reserved for core-specific status flags. */ }; /* * Simplified accessors for bhnd device ivars */ #define BHND_ACCESSOR(var, ivar, type) \ __BUS_ACCESSOR(bhnd, var, BHND, ivar, type) BHND_ACCESSOR(vendor, VENDOR, uint16_t); BHND_ACCESSOR(device, DEVICE, uint16_t); BHND_ACCESSOR(hwrev, HWREV, uint8_t); BHND_ACCESSOR(class, DEVICE_CLASS, bhnd_devclass_t); BHND_ACCESSOR(vendor_name, VENDOR_NAME, const char *); BHND_ACCESSOR(device_name, DEVICE_NAME, const char *); BHND_ACCESSOR(core_index, CORE_INDEX, u_int); BHND_ACCESSOR(core_unit, CORE_UNIT, int); BHND_ACCESSOR(pmu_info, PMU_INFO, void *); #undef BHND_ACCESSOR /** * A bhnd(4) board descriptor. */ struct bhnd_board_info { uint16_t board_vendor; /**< PCI-SIG vendor ID (even on non-PCI * devices). * * On PCI devices, this will generally * be the subsystem vendor ID, but the * value may be overridden in device * NVRAM. */ uint16_t board_type; /**< Board type (See BHND_BOARD_*) * * On PCI devices, this will generally * be the subsystem device ID, but the * value may be overridden in device * NVRAM. */ uint16_t board_rev; /**< Board revision. */ uint8_t board_srom_rev; /**< Board SROM format revision */ uint32_t board_flags; /**< Board flags (see BHND_BFL_*) */ uint32_t board_flags2; /**< Board flags 2 (see BHND_BFL2_*) */ uint32_t board_flags3; /**< Board flags 3 (see BHND_BFL3_*) */ }; /** * Chip Identification * * This is read from the ChipCommon ID register; on earlier bhnd(4) devices * where ChipCommon is unavailable, known values must be supplied. */ struct bhnd_chipid { uint16_t chip_id; /**< chip id (BHND_CHIPID_*) */ uint8_t chip_rev; /**< chip revision */ uint8_t chip_pkg; /**< chip package (BHND_PKGID_*) */ uint8_t chip_type; /**< chip type (BHND_CHIPTYPE_*) */ bhnd_addr_t enum_addr; /**< chip_type-specific enumeration * address; either the siba(4) base * core register block, or the bcma(4) * EROM core address. */ uint8_t ncores; /**< number of cores, if known. 0 if * not available. */ }; /** * A bhnd(4) core descriptor. */ struct bhnd_core_info { uint16_t vendor; /**< JEP-106 vendor (BHND_MFGID_*) */ uint16_t device; /**< device */ uint16_t hwrev; /**< hardware revision */ u_int core_idx; /**< bus-assigned core index */ int unit; /**< bus-assigned core unit */ }; /** * bhnd(4) DMA address widths. */ typedef enum { BHND_DMA_ADDR_30BIT = 30, /**< 30-bit DMA */ BHND_DMA_ADDR_32BIT = 32, /**< 32-bit DMA */ BHND_DMA_ADDR_64BIT = 64, /**< 64-bit DMA */ } bhnd_dma_addrwidth; /** * Convert an address width (in bits) to its corresponding mask. */ #define BHND_DMA_ADDR_BITMASK(_width) \ ((_width >= 64) ? ~0ULL : \ (_width == 0) ? 0x0 : \ ((1ULL << (_width)) - 1)) \ /** * bhnd(4) DMA address translation descriptor. */ struct bhnd_dma_translation { /** * Host-to-device physical address translation. * * This may be added to the host physical address to produce a device * DMA address. */ bhnd_addr_t base_addr; /** * Device-addressable address mask. * * This defines the device's DMA address range, excluding any bits * reserved for mapping the address to the base_addr. */ bhnd_addr_t addr_mask; /** * Device-addressable extended address mask. * * If a per-core bhnd(4) DMA engine supports the 'addrext' control * field, it can be used to provide address bits excluded by addr_mask. * * Support for DMA extended address changes – including coordination * with the core providing DMA translation – is handled transparently by * the DMA engine. For example, on PCI(e) Wi-Fi chipsets, the Wi-Fi * core DMA engine will (in effect) update the PCI core's DMA * sbtopcitranslation base address to map the full address prior to * performing a DMA transaction. */ bhnd_addr_t addrext_mask; /** - * Translation flags (see bhnd_dma_translation_flags) + * Translation flags (see bhnd_dma_translation_flags). */ uint32_t flags; }; #define BHND_DMA_TRANSLATION_TABLE_END { 0, 0, 0, 0 } #define BHND_DMA_IS_TRANSLATION_TABLE_END(_dt) \ ((_dt)->base_addr == 0 && (_dt)->addr_mask == 0 && \ (_dt)->addrext_mask == 0 && (_dt)->flags == 0) /** * bhnd(4) DMA address translation flags. */ enum bhnd_dma_translation_flags { /** * The translation remaps the device's physical address space. * * This is used in conjunction with BHND_DMA_TRANSLATION_BYTESWAPPED to * define a DMA translation that provides byteswapped access to * physical memory on big-endian MIPS SoCs. */ BHND_DMA_TRANSLATION_PHYSMAP = (1<<0), /** * Provides a byte-swapped mapping; write requests will be byte-swapped * before being written to memory, and read requests will be * byte-swapped before being returned. * * This is primarily used to perform efficient byte swapping of DMA * data on embedded MIPS SoCs executing in big-endian mode. */ BHND_DMA_TRANSLATION_BYTESWAPPED = (1<<1), }; /** * A bhnd(4) bus resource. * * This provides an abstract interface to per-core resources that may require * bus-level remapping of address windows prior to access. */ struct bhnd_resource { struct resource *res; /**< the system resource. */ bool direct; /**< false if the resource requires * bus window remapping before it * is MMIO accessible. */ }; /** Wrap the active resource @p _r in a bhnd_resource structure */ #define BHND_DIRECT_RESOURCE(_r) ((struct bhnd_resource) { \ .res = (_r), \ .direct = true, \ }) /** * Device quirk table descriptor. */ struct bhnd_device_quirk { struct bhnd_device_match desc; /**< device match descriptor */ uint32_t quirks; /**< quirk flags */ }; #define BHND_CORE_QUIRK(_rev, _flags) \ {{ BHND_MATCH_CORE_REV(_rev) }, (_flags) } #define BHND_CHIP_QUIRK(_chip, _rev, _flags) \ {{ BHND_MATCH_CHIP_IR(BCM ## _chip, _rev) }, (_flags) } #define BHND_PKG_QUIRK(_chip, _pkg, _flags) \ {{ BHND_MATCH_CHIP_IP(BCM ## _chip, BCM ## _chip ## _pkg) }, (_flags) } #define BHND_BOARD_QUIRK(_board, _flags) \ {{ BHND_MATCH_BOARD_TYPE(_board) }, \ (_flags) } #define BHND_DEVICE_QUIRK_END { { BHND_MATCH_ANY }, 0 } #define BHND_DEVICE_QUIRK_IS_END(_q) \ (((_q)->desc.m.match_flags == 0) && (_q)->quirks == 0) enum { BHND_DF_ANY = 0, BHND_DF_HOSTB = (1<<0), /**< core is serving as the bus' host * bridge. implies BHND_DF_ADAPTER */ BHND_DF_SOC = (1<<1), /**< core is attached to a native bus (BHND_ATTACH_NATIVE) */ BHND_DF_ADAPTER = (1<<2), /**< core is attached to a bridged * adapter (BHND_ATTACH_ADAPTER) */ }; /** Device probe table descriptor */ struct bhnd_device { const struct bhnd_device_match core; /**< core match descriptor */ const char *desc; /**< device description, or NULL. */ const struct bhnd_device_quirk *quirks_table; /**< quirks table for this device, or NULL */ uint32_t device_flags; /**< required BHND_DF_* flags */ }; #define _BHND_DEVICE(_vendor, _device, _desc, _quirks, \ _flags, ...) \ { { BHND_MATCH_CORE(BHND_MFGID_ ## _vendor, \ BHND_COREID_ ## _device) }, _desc, _quirks, \ _flags } #define BHND_DEVICE(_vendor, _device, _desc, _quirks, ...) \ _BHND_DEVICE(_vendor, _device, _desc, _quirks, \ ## __VA_ARGS__, 0) #define BHND_DEVICE_END { { BHND_MATCH_ANY }, NULL, NULL, 0 } #define BHND_DEVICE_IS_END(_d) \ (BHND_MATCH_IS_ANY(&(_d)->core) && (_d)->desc == NULL) /** * bhnd device sort order. */ typedef enum { BHND_DEVICE_ORDER_ATTACH, /**< sort by bhnd(4) device attach order; child devices should be probed/attached in this order */ BHND_DEVICE_ORDER_DETACH, /**< sort by bhnd(4) device detach order; child devices should be detached, suspended, and shutdown in this order */ } bhnd_device_order; /** * A registry of bhnd service providers. */ struct bhnd_service_registry { STAILQ_HEAD(,bhnd_service_entry) entries; /**< registered services */ struct mtx lock; /**< state lock */ }; /** * bhnd service provider flags. */ enum { BHND_SPF_INHERITED = (1<<0), /**< service provider reference was inherited from a parent bus, and should be deregistered when the last active reference is released */ }; const char *bhnd_vendor_name(uint16_t vendor); const char *bhnd_port_type_name(bhnd_port_type port_type); const char *bhnd_nvram_src_name(bhnd_nvram_src nvram_src); const char *bhnd_find_core_name(uint16_t vendor, uint16_t device); bhnd_devclass_t bhnd_find_core_class(uint16_t vendor, uint16_t device); const char *bhnd_core_name(const struct bhnd_core_info *ci); bhnd_devclass_t bhnd_core_class(const struct bhnd_core_info *ci); int bhnd_format_chip_id(char *buffer, size_t size, uint16_t chip_id); device_t bhnd_bus_match_child(device_t bus, const struct bhnd_core_match *desc); device_t bhnd_bus_find_child(device_t bus, bhnd_devclass_t class, int unit); int bhnd_bus_get_children(device_t bus, device_t **devlistp, int *devcountp, bhnd_device_order order); void bhnd_bus_free_children(device_t *devlist); int bhnd_bus_probe_children(device_t bus); int bhnd_sort_devices(device_t *devlist, size_t devcount, bhnd_device_order order); device_t bhnd_find_bridge_root(device_t dev, devclass_t bus_class); const struct bhnd_core_info *bhnd_match_core( const struct bhnd_core_info *cores, u_int num_cores, const struct bhnd_core_match *desc); const struct bhnd_core_info *bhnd_find_core( const struct bhnd_core_info *cores, u_int num_cores, bhnd_devclass_t class); struct bhnd_core_match bhnd_core_get_match_desc( const struct bhnd_core_info *core); bool bhnd_cores_equal( const struct bhnd_core_info *lhs, const struct bhnd_core_info *rhs); bool bhnd_core_matches( const struct bhnd_core_info *core, const struct bhnd_core_match *desc); bool bhnd_chip_matches( const struct bhnd_chipid *chipid, const struct bhnd_chip_match *desc); bool bhnd_board_matches( const struct bhnd_board_info *info, const struct bhnd_board_match *desc); bool bhnd_hwrev_matches(uint16_t hwrev, const struct bhnd_hwrev_match *desc); bool bhnd_device_matches(device_t dev, const struct bhnd_device_match *desc); const struct bhnd_device *bhnd_device_lookup(device_t dev, const struct bhnd_device *table, size_t entry_size); uint32_t bhnd_device_quirks(device_t dev, const struct bhnd_device *table, size_t entry_size); struct bhnd_core_info bhnd_get_core_info(device_t dev); int bhnd_alloc_resources(device_t dev, struct resource_spec *rs, struct bhnd_resource **res); void bhnd_release_resources(device_t dev, const struct resource_spec *rs, struct bhnd_resource **res); struct bhnd_chipid bhnd_parse_chipid(uint32_t idreg, bhnd_addr_t enum_addr); int bhnd_chipid_fixed_ncores( const struct bhnd_chipid *cid, uint16_t chipc_hwrev, uint8_t *ncores); int bhnd_read_chipid(device_t dev, struct resource_spec *rs, bus_size_t chipc_offset, struct bhnd_chipid *result); void bhnd_set_custom_core_desc(device_t dev, const char *name); void bhnd_set_default_core_desc(device_t dev); void bhnd_set_default_bus_desc(device_t dev, const struct bhnd_chipid *chip_id); int bhnd_nvram_getvar_str(device_t dev, const char *name, char *buf, size_t len, size_t *rlen); int bhnd_nvram_getvar_uint(device_t dev, const char *name, void *value, int width); int bhnd_nvram_getvar_uint8(device_t dev, const char *name, uint8_t *value); int bhnd_nvram_getvar_uint16(device_t dev, const char *name, uint16_t *value); int bhnd_nvram_getvar_uint32(device_t dev, const char *name, uint32_t *value); int bhnd_nvram_getvar_int(device_t dev, const char *name, void *value, int width); int bhnd_nvram_getvar_int8(device_t dev, const char *name, int8_t *value); int bhnd_nvram_getvar_int16(device_t dev, const char *name, int16_t *value); int bhnd_nvram_getvar_int32(device_t dev, const char *name, int32_t *value); int bhnd_nvram_getvar_array(device_t dev, const char *name, void *buf, size_t count, bhnd_nvram_type type); int bhnd_service_registry_init( struct bhnd_service_registry *bsr); int bhnd_service_registry_fini( struct bhnd_service_registry *bsr); int bhnd_service_registry_add( struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service, uint32_t flags); int bhnd_service_registry_remove( struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service); device_t bhnd_service_registry_retain( struct bhnd_service_registry *bsr, bhnd_service_t service); bool bhnd_service_registry_release( struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service); int bhnd_bus_generic_register_provider( device_t dev, device_t child, device_t provider, bhnd_service_t service); int bhnd_bus_generic_deregister_provider( device_t dev, device_t child, device_t provider, bhnd_service_t service); device_t bhnd_bus_generic_retain_provider(device_t dev, device_t child, bhnd_service_t service); void bhnd_bus_generic_release_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service); int bhnd_bus_generic_sr_register_provider( device_t dev, device_t child, device_t provider, bhnd_service_t service); int bhnd_bus_generic_sr_deregister_provider( device_t dev, device_t child, device_t provider, bhnd_service_t service); device_t bhnd_bus_generic_sr_retain_provider(device_t dev, device_t child, bhnd_service_t service); void bhnd_bus_generic_sr_release_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service); bool bhnd_bus_generic_is_hw_disabled(device_t dev, device_t child); bool bhnd_bus_generic_is_region_valid(device_t dev, device_t child, bhnd_port_type type, u_int port, u_int region); int bhnd_bus_generic_get_nvram_var(device_t dev, device_t child, const char *name, void *buf, size_t *size, bhnd_nvram_type type); const struct bhnd_chipid *bhnd_bus_generic_get_chipid(device_t dev, device_t child); int bhnd_bus_generic_get_dma_translation( device_t dev, device_t child, u_int width, uint32_t flags, bus_dma_tag_t *dmat, struct bhnd_dma_translation *translation); int bhnd_bus_generic_read_board_info(device_t dev, device_t child, struct bhnd_board_info *info); struct bhnd_resource *bhnd_bus_generic_alloc_resource (device_t dev, device_t child, int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags); int bhnd_bus_generic_release_resource (device_t dev, device_t child, int type, int rid, struct bhnd_resource *r); int bhnd_bus_generic_activate_resource (device_t dev, device_t child, int type, int rid, struct bhnd_resource *r); int bhnd_bus_generic_deactivate_resource (device_t dev, device_t child, int type, int rid, struct bhnd_resource *r); uintptr_t bhnd_bus_generic_get_intr_domain(device_t dev, device_t child, bool self); /** * Return the bhnd(4) bus driver's device enumeration parser class * * @param driver A bhnd bus driver instance. */ static inline bhnd_erom_class_t * bhnd_driver_get_erom_class(driver_t *driver) { return (BHND_BUS_GET_EROM_CLASS(driver)); } /** * Return the active host bridge core for the bhnd bus, if any, or NULL if * not found. * * @param dev A bhnd bus device. */ static inline device_t bhnd_bus_find_hostb_device(device_t dev) { return (BHND_BUS_FIND_HOSTB_DEVICE(dev)); } /** * Register a provider for a given @p service. * * @param dev The device to register as a service provider * with its parent bus. * @param service The service for which @p dev will be registered. * * @retval 0 success * @retval EEXIST if an entry for @p service already exists. * @retval non-zero if registering @p dev otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_register_provider(device_t dev, bhnd_service_t service) { return (BHND_BUS_REGISTER_PROVIDER(device_get_parent(dev), dev, dev, service)); } /** * Attempt to remove a service provider registration for @p dev. * * @param dev The device to be deregistered as a service provider. * @param service The service for which @p dev will be deregistered, or * BHND_SERVICE_INVALID to remove all service registrations * for @p dev. * * @retval 0 success * @retval EBUSY if active references to @p dev exist; @see * bhnd_retain_provider() and bhnd_release_provider(). */ static inline int bhnd_deregister_provider(device_t dev, bhnd_service_t service) { return (BHND_BUS_DEREGISTER_PROVIDER(device_get_parent(dev), dev, dev, service)); } /** * Retain and return a reference to the registered @p service provider, if any. * * @param dev The requesting device. * @param service The service for which a provider should be returned. * * On success, the caller assumes ownership the returned provider, and * is responsible for releasing this reference via * BHND_BUS_RELEASE_PROVIDER(). * * @retval device_t success * @retval NULL if no provider is registered for @p service. */ static inline device_t bhnd_retain_provider(device_t dev, bhnd_service_t service) { return (BHND_BUS_RETAIN_PROVIDER(device_get_parent(dev), dev, service)); } /** * Release a reference to a provider device previously returned by * bhnd_retain_provider(). * * @param dev The requesting device. * @param provider The provider to be released. * @param service The service for which @p provider was previously retained. */ static inline void bhnd_release_provider(device_t dev, device_t provider, bhnd_service_t service) { return (BHND_BUS_RELEASE_PROVIDER(device_get_parent(dev), dev, provider, service)); } /** * Return true if the hardware components required by @p dev are known to be * unpopulated or otherwise unusable. * * In some cases, enumerated devices may have pins that are left floating, or * the hardware may otherwise be non-functional; this method allows a parent * device to explicitly specify if a successfully enumerated @p dev should * be disabled. * * @param dev A bhnd bus child device. */ static inline bool bhnd_is_hw_disabled(device_t dev) { return (BHND_BUS_IS_HW_DISABLED(device_get_parent(dev), dev)); } /** * Return the BHND chip identification info for the bhnd bus. * * @param dev A bhnd bus child device. */ static inline const struct bhnd_chipid * bhnd_get_chipid(device_t dev) { return (BHND_BUS_GET_CHIPID(device_get_parent(dev), dev)); }; /** * Read the current value of a bhnd(4) device's per-core I/O control register. * * @param dev The bhnd bus child device to be queried. * @param[out] ioctl On success, the I/O control register value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If reading the IOCTL register otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_read_ioctl(device_t dev, uint16_t *ioctl) { return (BHND_BUS_READ_IOCTL(device_get_parent(dev), dev, ioctl)); } /** * Write @p value and @p mask to a bhnd(4) device's per-core I/O control * register. * * @param dev The bhnd bus child device for which the IOCTL register will be * written. * @param value The value to be written (see BHND_IOCTL_*). * @param mask Only the bits defined by @p mask will be updated from @p value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If writing the IOCTL register otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_write_ioctl(device_t dev, uint16_t value, uint16_t mask) { return (BHND_BUS_WRITE_IOCTL(device_get_parent(dev), dev, value, mask)); } /** * Read the current value of a bhnd(4) device's per-core I/O status register. * * @param dev The bhnd bus child device to be queried. * @param[out] iost On success, the I/O status register value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If reading the IOST register otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_read_iost(device_t dev, uint16_t *iost) { return (BHND_BUS_READ_IOST(device_get_parent(dev), dev, iost)); } /** * Return true if the given bhnd device's hardware is currently held * in a RESET state or otherwise not clocked (BHND_IOCTL_CLK_EN). * * @param dev The device to query. * * @retval true If @p dev is held in RESET or not clocked (BHND_IOCTL_CLK_EN), * or an error occured determining @p dev's hardware state. * @retval false If @p dev is clocked and is not held in RESET. */ static inline bool bhnd_is_hw_suspended(device_t dev) { return (BHND_BUS_IS_HW_SUSPENDED(device_get_parent(dev), dev)); } /** * Place the bhnd(4) device's hardware into a reset state, and then bring the * hardware out of reset with BHND_IOCTL_CLK_EN and @p ioctl flags set. * * Any clock or resource PMU requests previously made by @p dev will be * invalidated. * * @param dev The device to be reset. * @param ioctl Device-specific core ioctl flags to be supplied on reset * (see BHND_IOCTL_*). * * @retval 0 success * @retval non-zero error */ static inline int bhnd_reset_hw(device_t dev, uint16_t ioctl) { return (BHND_BUS_RESET_HW(device_get_parent(dev), dev, ioctl)); } /** * Suspend @p child's hardware in a low-power reset state. * * Any clock or resource PMU requests previously made by @p dev will be * invalidated. * * The hardware may be brought out of reset via bhnd_reset_hw(). * * @param dev The device to be suspended. * * @retval 0 success * @retval non-zero error */ static inline int bhnd_suspend_hw(device_t dev) { return (BHND_BUS_SUSPEND_HW(device_get_parent(dev), dev)); } /** * Return the BHND attachment type of the parent bhnd bus. * * @param dev A bhnd bus child device. * * @retval BHND_ATTACH_ADAPTER if the bus is resident on a bridged adapter, * such as a WiFi chipset. * @retval BHND_ATTACH_NATIVE if the bus provides hardware services (clock, * CPU, etc) to a directly attached native host. */ static inline bhnd_attach_type bhnd_get_attach_type (device_t dev) { return (BHND_BUS_GET_ATTACH_TYPE(device_get_parent(dev), dev)); } /** * Find the best available DMA address translation capable of mapping a * physical host address to a BHND DMA device address of @p width with * @p flags. * * @param dev A bhnd bus child device. * @param width The address width within which the translation window must * reside (see BHND_DMA_ADDR_*). * @param flags Required translation flags (see BHND_DMA_TRANSLATION_*). * @param[out] dmat On success, will be populated with a DMA tag specifying the * @p translation DMA address restrictions. This argment may be NULL if the DMA * tag is not desired. * the set of valid host DMA addresses reachable via @p translation. * @param[out] translation On success, will be populated with a DMA address * translation descriptor for @p child. This argment may be NULL if the * descriptor is not desired. * * @retval 0 success * @retval ENODEV If DMA is not supported. * @retval ENOENT If no DMA translation matching @p width and @p flags is * available. * @retval non-zero If determining the DMA address translation for @p child * otherwise fails, a regular unix error code will be returned. */ static inline int bhnd_get_dma_translation(device_t dev, u_int width, uint32_t flags, bus_dma_tag_t *dmat, struct bhnd_dma_translation *translation) { return (BHND_BUS_GET_DMA_TRANSLATION(device_get_parent(dev), dev, width, flags, dmat, translation)); } /** * Attempt to read the BHND board identification from the bhnd bus. * * This relies on NVRAM access, and will fail if a valid NVRAM device cannot * be found, or is not yet attached. * - * @param dev The parent of @p child. - * @param child The bhnd device requesting board info. + * @param dev The bhnd device requesting board info. * @param[out] info On success, will be populated with the bhnd(4) device's * board information. * * @retval 0 success * @retval ENODEV No valid NVRAM source could be found. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ static inline int bhnd_read_board_info(device_t dev, struct bhnd_board_info *info) { return (BHND_BUS_READ_BOARD_INFO(device_get_parent(dev), dev, info)); } /** * Return the number of interrupt lines assigned to @p dev. * * @param dev A bhnd bus child device. */ static inline u_int bhnd_get_intr_count(device_t dev) { return (BHND_BUS_GET_INTR_COUNT(device_get_parent(dev), dev)); } /** * Get the backplane interrupt vector of the @p intr line attached to @p dev. * * @param dev A bhnd bus child device. * @param intr The index of the interrupt line being queried. * @param[out] ivec On success, the assigned hardware interrupt vector will be * written to this pointer. * * On bcma(4) devices, this returns the OOB bus line assigned to the * interrupt. * * On siba(4) devices, this returns the target OCP slave flag number assigned * to the interrupt. * * @retval 0 success * @retval ENXIO If @p intr exceeds the number of interrupt lines * assigned to @p child. */ static inline int bhnd_get_intr_ivec(device_t dev, u_int intr, u_int *ivec) { return (BHND_BUS_GET_INTR_IVEC(device_get_parent(dev), dev, intr, ivec)); } /** * Map the given @p intr to an IRQ number; until unmapped, this IRQ may be used * to allocate a resource of type SYS_RES_IRQ. * * On success, the caller assumes ownership of the interrupt mapping, and * is responsible for releasing the mapping via bhnd_unmap_intr(). * * @param dev The requesting device. * @param intr The interrupt being mapped. * @param[out] irq On success, the bus interrupt value mapped for @p intr. * * @retval 0 If an interrupt was assigned. * @retval non-zero If mapping an interrupt otherwise fails, a regular * unix error code will be returned. */ static inline int bhnd_map_intr(device_t dev, u_int intr, rman_res_t *irq) { return (BHND_BUS_MAP_INTR(device_get_parent(dev), dev, intr, irq)); } /** * Unmap an bus interrupt previously mapped via bhnd_map_intr(). * * @param dev The requesting device. - * @param intr The interrupt number being unmapped. This is equivalent to the - * bus resource ID for the interrupt. + * @param irq The interrupt value being unmapped. */ static inline void bhnd_unmap_intr(device_t dev, rman_res_t irq) { return (BHND_BUS_UNMAP_INTR(device_get_parent(dev), dev, irq)); } /** * Allocate and enable per-core PMU request handling for @p child. * * The region containing the core's PMU register block (if any) must be * allocated via bus_alloc_resource(9) (or bhnd_alloc_resource) before * calling bhnd_alloc_pmu(), and must not be released until after * calling bhnd_release_pmu(). * * @param dev The requesting bhnd device. * * @retval 0 success * @retval non-zero If allocating PMU request state otherwise fails, a * regular unix error code will be returned. */ static inline int bhnd_alloc_pmu(device_t dev) { return (BHND_BUS_ALLOC_PMU(device_get_parent(dev), dev)); } /** * Release any per-core PMU resources allocated for @p child. Any outstanding * PMU requests are are discarded. * * @param dev The requesting bhnd device. * * @retval 0 success * @retval non-zero If releasing PMU request state otherwise fails, a * regular unix error code will be returned, and * the core state will be left unmodified. */ static inline int bhnd_release_pmu(device_t dev) { return (BHND_BUS_RELEASE_PMU(device_get_parent(dev), dev)); } /** * Return the transition latency required for @p clock in microseconds, if * known. * * The BHND_CLOCK_HT latency value is suitable for use as the D11 core's * 'fastpwrup_dly' value. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before querying PMU clocks. * * @param dev The requesting bhnd device. * @param clock The clock to be queried for transition latency. * @param[out] latency On success, the transition latency of @p clock in * microseconds. * * @retval 0 success * @retval ENODEV If the transition latency for @p clock is not available. */ static inline int bhnd_get_clock_latency(device_t dev, bhnd_clock clock, u_int *latency) { return (BHND_BUS_GET_CLOCK_LATENCY(device_get_parent(dev), dev, clock, latency)); } /** * Return the frequency for @p clock in Hz, if known. * * @param dev The requesting bhnd device. * @param clock The clock to be queried. * @param[out] freq On success, the frequency of @p clock in Hz. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before querying PMU clocks. * * @retval 0 success * @retval ENODEV If the frequency for @p clock is not available. */ static inline int bhnd_get_clock_freq(device_t dev, bhnd_clock clock, u_int *freq) { return (BHND_BUS_GET_CLOCK_FREQ(device_get_parent(dev), dev, clock, freq)); } /** * Request that @p clock (or faster) be routed to @p dev. * * @note A driver must ask the bhnd bus to allocate clock request state * via bhnd_alloc_pmu() before it can request clock resources. * * @note Any outstanding PMU clock requests will be discarded upon calling * BHND_BUS_RESET_HW() or BHND_BUS_SUSPEND_HW(). * * @param dev The bhnd(4) device to which @p clock should be routed. * @param clock The requested clock source. * * @retval 0 success * @retval ENODEV If an unsupported clock was requested. * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable, */ static inline int bhnd_request_clock(device_t dev, bhnd_clock clock) { return (BHND_BUS_REQUEST_CLOCK(device_get_parent(dev), dev, clock)); } /** * Request that @p clocks be powered on behalf of @p dev. * * This will power any clock sources (e.g. XTAL, PLL, etc) required for * @p clocks and wait until they are ready, discarding any previous * requests by @p dev. * * @note A driver must ask the bhnd bus to allocate clock request state * via bhnd_alloc_pmu() before it can request clock resources. * * @note Any outstanding PMU clock requests will be discarded upon calling * BHND_BUS_RESET_HW() or BHND_BUS_SUSPEND_HW(). * * @param dev The requesting bhnd(4) device. * @param clocks The clock(s) to be enabled. * * @retval 0 success * @retval ENODEV If an unsupported clock was requested. * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. */ static inline int bhnd_enable_clocks(device_t dev, uint32_t clocks) { return (BHND_BUS_ENABLE_CLOCKS(device_get_parent(dev), dev, clocks)); } /** * Power up an external PMU-managed resource assigned to @p dev. * * @note A driver must ask the bhnd bus to allocate PMU request state * via bhnd_alloc_pmu() before it can request PMU resources. * * @note Any outstanding PMU resource requests will be released upon calling * bhnd_reset_hw() or bhnd_suspend_hw(). * * @param dev The requesting bhnd(4) device. * @param rsrc The core-specific external resource identifier. * * @retval 0 success * @retval ENODEV If the PMU does not support @p rsrc. * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. */ static inline int bhnd_request_ext_rsrc(device_t dev, u_int rsrc) { return (BHND_BUS_REQUEST_EXT_RSRC(device_get_parent(dev), dev, rsrc)); } /** * Power down an external PMU-managed resource assigned to @p dev. * * A driver must ask the bhnd bus to allocate PMU request state * via bhnd_alloc_pmu() before it can request PMU resources. * * @param dev The requesting bhnd(4) device. * @param rsrc The core-specific external resource identifier. * * @retval 0 success * @retval ENODEV If the PMU does not support @p rsrc. * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. */ static inline int bhnd_release_ext_rsrc(device_t dev, u_int rsrc) { return (BHND_BUS_RELEASE_EXT_RSRC(device_get_parent(dev), dev, rsrc)); } /** * Read @p width bytes at @p offset from the bus-specific agent/config * space of @p dev. * * @param dev The bhnd device for which @p offset should be read. * @param offset The offset to be read. * @param[out] value On success, the will be set to the @p width value read * at @p offset. * @param width The size of the access. Must be 1, 2 or 4 bytes. * * The exact behavior of this method is bus-specific. In the case of * bcma(4), this method provides access to the first agent port of @p child. * * @note Device drivers should only use this API for functionality * that is not available via another bhnd(4) function. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval EINVAL If @p width is not one of 1, 2, or 4 bytes. * @retval ENODEV If accessing agent/config space for @p child is unsupported. * @retval EFAULT If reading @p width at @p offset exceeds the bounds of * the mapped agent/config space for @p child. */ static inline uint32_t bhnd_read_config(device_t dev, bus_size_t offset, void *value, u_int width) { return (BHND_BUS_READ_CONFIG(device_get_parent(dev), dev, offset, value, width)); } /** * Write @p width bytes at @p offset to the bus-specific agent/config * space of @p dev. * * @param dev The bhnd device for which @p offset should be read. * @param offset The offset to be written. * @param value A pointer to the value to be written. * @param width The size of @p value. Must be 1, 2 or 4 bytes. * * The exact behavior of this method is bus-specific. In the case of * bcma(4), this method provides access to the first agent port of @p child. * * @note Device drivers should only use this API for functionality * that is not available via another bhnd(4) function. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval EINVAL If @p width is not one of 1, 2, or 4 bytes. * @retval ENODEV If accessing agent/config space for @p child is unsupported. * @retval EFAULT If reading @p width at @p offset exceeds the bounds of * the mapped agent/config space for @p child. */ static inline int bhnd_write_config(device_t dev, bus_size_t offset, const void *value, u_int width) { return (BHND_BUS_WRITE_CONFIG(device_get_parent(dev), dev, offset, value, width)); } /** * Read an NVRAM variable, coerced to the requested @p type. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] buf A buffer large enough to hold @p len bytes. On * success, the requested value will be written to * this buffer. This argment may be NULL if * the value is not desired. * @param[in,out] len The maximum capacity of @p buf. On success, * will be set to the actual size of the requested * value. * @param type The desired data representation to be written * to @p buf. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval ENOMEM If a buffer of @p size is too small to hold the * requested value. * @retval EOPNOTSUPP If the value cannot be coerced to @p type. * @retval ERANGE If value coercion would overflow @p type. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ static inline int bhnd_nvram_getvar(device_t dev, const char *name, void *buf, size_t *len, bhnd_nvram_type type) { return (BHND_BUS_GET_NVRAM_VAR(device_get_parent(dev), dev, name, buf, len, type)); } /** * Allocate a resource from a device's parent bhnd(4) bus. * * @param dev The device requesting resource ownership. * @param type The type of resource to allocate. This may be any type supported * by the standard bus APIs. * @param rid The bus-specific handle identifying the resource being allocated. * @param start The start address of the resource. * @param end The end address of the resource. * @param count The size of the resource. * @param flags The flags for the resource to be allocated. These may be any * values supported by the standard bus APIs. * * To request the resource's default addresses, pass @p start and * @p end values of @c 0 and @c ~0, respectively, and * a @p count of @c 1. * * @retval NULL The resource could not be allocated. * @retval resource The allocated resource. */ static inline struct bhnd_resource * bhnd_alloc_resource(device_t dev, int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) { return BHND_BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, type, rid, start, end, count, flags); } /** * Allocate a resource from a device's parent bhnd(4) bus, using the * resource's default start, end, and count values. * * @param dev The device requesting resource ownership. * @param type The type of resource to allocate. This may be any type supported * by the standard bus APIs. * @param rid The bus-specific handle identifying the resource being allocated. * @param flags The flags for the resource to be allocated. These may be any * values supported by the standard bus APIs. * * @retval NULL The resource could not be allocated. * @retval resource The allocated resource. */ static inline struct bhnd_resource * bhnd_alloc_resource_any(device_t dev, int type, int *rid, u_int flags) { return bhnd_alloc_resource(dev, type, rid, 0, ~0, 1, flags); } /** * Activate a previously allocated bhnd resource. * * @param dev The device holding ownership of the allocated resource. * @param type The type of the resource. * @param rid The bus-specific handle identifying the resource. * @param r A pointer to the resource returned by bhnd_alloc_resource or * BHND_BUS_ALLOC_RESOURCE. * * @retval 0 success * @retval non-zero an error occurred while activating the resource. */ static inline int bhnd_activate_resource(device_t dev, int type, int rid, struct bhnd_resource *r) { return BHND_BUS_ACTIVATE_RESOURCE(device_get_parent(dev), dev, type, rid, r); } /** * Deactivate a previously activated bhnd resource. * * @param dev The device holding ownership of the activated resource. * @param type The type of the resource. * @param rid The bus-specific handle identifying the resource. * @param r A pointer to the resource returned by bhnd_alloc_resource or * BHND_BUS_ALLOC_RESOURCE. * * @retval 0 success * @retval non-zero an error occurred while activating the resource. */ static inline int bhnd_deactivate_resource(device_t dev, int type, int rid, struct bhnd_resource *r) { return BHND_BUS_DEACTIVATE_RESOURCE(device_get_parent(dev), dev, type, rid, r); } /** * Free a resource allocated by bhnd_alloc_resource(). * * @param dev The device holding ownership of the resource. * @param type The type of the resource. * @param rid The bus-specific handle identifying the resource. * @param r A pointer to the resource returned by bhnd_alloc_resource or * BHND_ALLOC_RESOURCE. * * @retval 0 success * @retval non-zero an error occurred while activating the resource. */ static inline int bhnd_release_resource(device_t dev, int type, int rid, struct bhnd_resource *r) { return BHND_BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, type, rid, r); } /** * Return true if @p region_num is a valid region on @p port_num of * @p type attached to @p dev. * * @param dev A bhnd bus child device. * @param type The port type being queried. - * @param port_num The port number being queried. - * @param region_num The region number being queried. + * @param port The port number being queried. + * @param region The region number being queried. */ static inline bool -bhnd_is_region_valid(device_t dev, bhnd_port_type type, u_int port_num, - u_int region_num) +bhnd_is_region_valid(device_t dev, bhnd_port_type type, u_int port, + u_int region) { return (BHND_BUS_IS_REGION_VALID(device_get_parent(dev), dev, type, - port_num, region_num)); + port, region)); } /** * Return the number of ports of type @p type attached to @p def. * * @param dev A bhnd bus child device. * @param type The port type being queried. */ static inline u_int bhnd_get_port_count(device_t dev, bhnd_port_type type) { return (BHND_BUS_GET_PORT_COUNT(device_get_parent(dev), dev, type)); } /** * Return the number of memory regions mapped to @p child @p port of * type @p type. * * @param dev A bhnd bus child device. * @param port The port number being queried. * @param type The port type being queried. */ static inline u_int bhnd_get_region_count(device_t dev, bhnd_port_type type, u_int port) { return (BHND_BUS_GET_REGION_COUNT(device_get_parent(dev), dev, type, port)); } /** * Return the resource-ID for a memory region on the given device port. * * @param dev A bhnd bus child device. * @param type The port type. * @param port The port identifier. * @param region The identifier of the memory region on @p port. * * @retval int The RID for the given @p port and @p region on @p device. * @retval -1 No such port/region found. */ static inline int bhnd_get_port_rid(device_t dev, bhnd_port_type type, u_int port, u_int region) { return BHND_BUS_GET_PORT_RID(device_get_parent(dev), dev, type, port, region); } /** * Decode a port / region pair on @p dev defined by @p rid. * * @param dev A bhnd bus child device. * @param type The resource type. * @param rid The resource identifier. * @param[out] port_type The decoded port type. * @param[out] port The decoded port identifier. * @param[out] region The decoded region identifier. * * @retval 0 success * @retval non-zero No matching port/region found. */ static inline int bhnd_decode_port_rid(device_t dev, int type, int rid, bhnd_port_type *port_type, u_int *port, u_int *region) { return BHND_BUS_DECODE_PORT_RID(device_get_parent(dev), dev, type, rid, port_type, port, region); } /** * Get the address and size of @p region on @p port. * * @param dev A bhnd bus child device. * @param port_type The port type. * @param port The port identifier. * @param region The identifier of the memory region on @p port. * @param[out] region_addr The region's base address. * @param[out] region_size The region's size. * * @retval 0 success * @retval non-zero No matching port/region found. */ static inline int bhnd_get_region_addr(device_t dev, bhnd_port_type port_type, u_int port, u_int region, bhnd_addr_t *region_addr, bhnd_size_t *region_size) { return BHND_BUS_GET_REGION_ADDR(device_get_parent(dev), dev, port_type, port, region, region_addr, region_size); } /* * bhnd bus-level equivalents of the bus_(read|write|set|barrier|...) * macros (compatible with bhnd_resource). * * Generated with bhnd/tools/bus_macro.sh */ #define bhnd_bus_barrier(r, o, l, f) \ ((r)->direct) ? \ bus_barrier((r)->res, (o), (l), (f)) : \ BHND_BUS_BARRIER( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (l), (f)) #define bhnd_bus_read_1(r, o) \ ((r)->direct) ? \ bus_read_1((r)->res, (o)) : \ BHND_BUS_READ_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o)) #define bhnd_bus_read_multi_1(r, o, d, c) \ ((r)->direct) ? \ bus_read_multi_1((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_region_1(r, o, d, c) \ ((r)->direct) ? \ bus_read_region_1((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_1(r, o, v) \ ((r)->direct) ? \ bus_write_1((r)->res, (o), (v)) : \ BHND_BUS_WRITE_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v)) #define bhnd_bus_write_multi_1(r, o, d, c) \ ((r)->direct) ? \ bus_write_multi_1((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_region_1(r, o, d, c) \ ((r)->direct) ? \ bus_write_region_1((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_stream_1(r, o) \ ((r)->direct) ? \ bus_read_stream_1((r)->res, (o)) : \ BHND_BUS_READ_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o)) #define bhnd_bus_read_multi_stream_1(r, o, d, c) \ ((r)->direct) ? \ bus_read_multi_stream_1((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_region_stream_1(r, o, d, c) \ ((r)->direct) ? \ bus_read_region_stream_1((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_stream_1(r, o, v) \ ((r)->direct) ? \ bus_write_stream_1((r)->res, (o), (v)) : \ BHND_BUS_WRITE_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v)) #define bhnd_bus_write_multi_stream_1(r, o, d, c) \ ((r)->direct) ? \ bus_write_multi_stream_1((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_region_stream_1(r, o, d, c) \ ((r)->direct) ? \ bus_write_region_stream_1((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_STREAM_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_set_multi_1(r, o, v, c) \ ((r)->direct) ? \ bus_set_multi_1((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_MULTI_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c)) #define bhnd_bus_set_region_1(r, o, v, c) \ ((r)->direct) ? \ bus_set_region_1((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_REGION_1( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c)) #define bhnd_bus_read_2(r, o) \ ((r)->direct) ? \ bus_read_2((r)->res, (o)) : \ BHND_BUS_READ_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o)) #define bhnd_bus_read_multi_2(r, o, d, c) \ ((r)->direct) ? \ bus_read_multi_2((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_region_2(r, o, d, c) \ ((r)->direct) ? \ bus_read_region_2((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_2(r, o, v) \ ((r)->direct) ? \ bus_write_2((r)->res, (o), (v)) : \ BHND_BUS_WRITE_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v)) #define bhnd_bus_write_multi_2(r, o, d, c) \ ((r)->direct) ? \ bus_write_multi_2((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_region_2(r, o, d, c) \ ((r)->direct) ? \ bus_write_region_2((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_stream_2(r, o) \ ((r)->direct) ? \ bus_read_stream_2((r)->res, (o)) : \ BHND_BUS_READ_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o)) #define bhnd_bus_read_multi_stream_2(r, o, d, c) \ ((r)->direct) ? \ bus_read_multi_stream_2((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_region_stream_2(r, o, d, c) \ ((r)->direct) ? \ bus_read_region_stream_2((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_stream_2(r, o, v) \ ((r)->direct) ? \ bus_write_stream_2((r)->res, (o), (v)) : \ BHND_BUS_WRITE_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v)) #define bhnd_bus_write_multi_stream_2(r, o, d, c) \ ((r)->direct) ? \ bus_write_multi_stream_2((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_region_stream_2(r, o, d, c) \ ((r)->direct) ? \ bus_write_region_stream_2((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_STREAM_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_set_multi_2(r, o, v, c) \ ((r)->direct) ? \ bus_set_multi_2((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_MULTI_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c)) #define bhnd_bus_set_region_2(r, o, v, c) \ ((r)->direct) ? \ bus_set_region_2((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_REGION_2( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c)) #define bhnd_bus_read_4(r, o) \ ((r)->direct) ? \ bus_read_4((r)->res, (o)) : \ BHND_BUS_READ_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o)) #define bhnd_bus_read_multi_4(r, o, d, c) \ ((r)->direct) ? \ bus_read_multi_4((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_region_4(r, o, d, c) \ ((r)->direct) ? \ bus_read_region_4((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_4(r, o, v) \ ((r)->direct) ? \ bus_write_4((r)->res, (o), (v)) : \ BHND_BUS_WRITE_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v)) #define bhnd_bus_write_multi_4(r, o, d, c) \ ((r)->direct) ? \ bus_write_multi_4((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_region_4(r, o, d, c) \ ((r)->direct) ? \ bus_write_region_4((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_stream_4(r, o) \ ((r)->direct) ? \ bus_read_stream_4((r)->res, (o)) : \ BHND_BUS_READ_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o)) #define bhnd_bus_read_multi_stream_4(r, o, d, c) \ ((r)->direct) ? \ bus_read_multi_stream_4((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_MULTI_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_read_region_stream_4(r, o, d, c) \ ((r)->direct) ? \ bus_read_region_stream_4((r)->res, (o), (d), (c)) : \ BHND_BUS_READ_REGION_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_stream_4(r, o, v) \ ((r)->direct) ? \ bus_write_stream_4((r)->res, (o), (v)) : \ BHND_BUS_WRITE_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v)) #define bhnd_bus_write_multi_stream_4(r, o, d, c) \ ((r)->direct) ? \ bus_write_multi_stream_4((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_MULTI_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_write_region_stream_4(r, o, d, c) \ ((r)->direct) ? \ bus_write_region_stream_4((r)->res, (o), (d), (c)) : \ BHND_BUS_WRITE_REGION_STREAM_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (d), (c)) #define bhnd_bus_set_multi_4(r, o, v, c) \ ((r)->direct) ? \ bus_set_multi_4((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_MULTI_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c)) #define bhnd_bus_set_region_4(r, o, v, c) \ ((r)->direct) ? \ bus_set_region_4((r)->res, (o), (v), (c)) : \ BHND_BUS_SET_REGION_4( \ device_get_parent(rman_get_device((r)->res)), \ rman_get_device((r)->res), (r), (o), (v), (c)) #endif /* _BHND_BHND_H_ */ Index: head/sys/dev/bhnd/bhnd_bus_if.m =================================================================== --- head/sys/dev/bhnd/bhnd_bus_if.m (revision 326290) +++ head/sys/dev/bhnd/bhnd_bus_if.m (revision 326291) @@ -1,1642 +1,1642 @@ #- # Copyright (c) 2015-2016 Landon Fuller # Copyright (c) 2017 The FreeBSD Foundation # All rights reserved. # # Portions of this software were developed by Landon Fuller # under sponsorship from the FreeBSD Foundation. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. # IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER # CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE # USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # # $FreeBSD$ #include #include #include #include #include INTERFACE bhnd_bus; # # bhnd(4) bus interface # HEADER { /* forward declarations */ struct bhnd_board_info; struct bhnd_core_info; struct bhnd_chipid; struct bhnd_dma_translation; struct bhnd_devinfo; struct bhnd_resource; } CODE { #include #include static bhnd_erom_class_t * bhnd_bus_null_get_erom_class(driver_t *driver) { return (NULL); } static struct bhnd_chipid * bhnd_bus_null_get_chipid(device_t dev, device_t child) { panic("bhnd_bus_get_chipid unimplemented"); } static int bhnd_bus_null_read_ioctl(device_t dev, device_t child, uint16_t *ioctl) { panic("bhnd_bus_read_ioctl unimplemented"); } static int bhnd_bus_null_write_ioctl(device_t dev, device_t child, uint16_t value, uint16_t mask) { panic("bhnd_bus_write_ioctl unimplemented"); } static int bhnd_bus_null_read_iost(device_t dev, device_t child, uint16_t *iost) { panic("bhnd_bus_read_iost unimplemented"); } static bool bhnd_bus_null_is_hw_suspended(device_t dev, device_t child) { panic("bhnd_bus_is_hw_suspended unimplemented"); } static int bhnd_bus_null_reset_hw(device_t dev, device_t child, uint16_t ioctl) { panic("bhnd_bus_reset_hw unimplemented"); } static int bhnd_bus_null_suspend_hw(device_t dev, device_t child) { panic("bhnd_bus_suspend_hw unimplemented"); } static bhnd_attach_type bhnd_bus_null_get_attach_type(device_t dev, device_t child) { panic("bhnd_bus_get_attach_type unimplemented"); } static int bhnd_bus_null_read_board_info(device_t dev, device_t child, struct bhnd_board_info *info) { panic("bhnd_bus_read_boardinfo unimplemented"); } static void bhnd_bus_null_child_added(device_t dev, device_t child) { } static int bhnd_bus_null_alloc_pmu(device_t dev, device_t child) { panic("bhnd_bus_alloc_pmu unimplemented"); } static int bhnd_bus_null_release_pmu(device_t dev, device_t child) { panic("bhnd_bus_release_pmu unimplemented"); } static int bhnd_bus_null_get_clock_latency(device_t dev, device_t child, bhnd_clock clock, u_int *latency) { panic("bhnd_pmu_get_clock_latency unimplemented"); } static int bhnd_bus_null_get_clock_freq(device_t dev, device_t child, bhnd_clock clock, u_int *freq) { panic("bhnd_pmu_get_clock_freq unimplemented"); } static int bhnd_bus_null_request_clock(device_t dev, device_t child, bhnd_clock clock) { panic("bhnd_bus_request_clock unimplemented"); } static int bhnd_bus_null_enable_clocks(device_t dev, device_t child, uint32_t clocks) { panic("bhnd_bus_enable_clocks unimplemented"); } static int bhnd_bus_null_request_ext_rsrc(device_t dev, device_t child, u_int rsrc) { panic("bhnd_bus_request_ext_rsrc unimplemented"); } static int bhnd_bus_null_release_ext_rsrc(device_t dev, device_t child, u_int rsrc) { panic("bhnd_bus_release_ext_rsrc unimplemented"); } static int bhnd_bus_null_read_config(device_t dev, device_t child, bus_size_t offset, void *value, u_int width) { panic("bhnd_bus_null_read_config unimplemented"); } static void bhnd_bus_null_write_config(device_t dev, device_t child, bus_size_t offset, void *value, u_int width) { panic("bhnd_bus_null_write_config unimplemented"); } static device_t bhnd_bus_null_find_hostb_device(device_t dev) { return (NULL); } static struct bhnd_service_registry * bhnd_bus_null_get_service_registry(device_t dev) { panic("bhnd_bus_get_service_registry unimplemented"); } static bool bhnd_bus_null_is_hw_disabled(device_t dev, device_t child) { panic("bhnd_bus_is_hw_disabled unimplemented"); } static int bhnd_bus_null_get_probe_order(device_t dev, device_t child) { panic("bhnd_bus_get_probe_order unimplemented"); } static uintptr_t bhnd_bus_null_get_intr_domain(device_t dev, device_t child, bool self) { /* Unsupported */ return (0); } static u_int bhnd_bus_null_get_intr_count(device_t dev, device_t child) { return (0); } static int bhnd_bus_null_get_intr_ivec(device_t dev, device_t child, u_int intr, u_int *ivec) { panic("bhnd_bus_get_intr_ivec unimplemented"); } static int bhnd_bus_null_map_intr(device_t dev, device_t child, u_int intr, rman_res_t *irq) { panic("bhnd_bus_map_intr unimplemented"); } static int bhnd_bus_null_unmap_intr(device_t dev, device_t child, rman_res_t irq) { panic("bhnd_bus_unmap_intr unimplemented"); } static int bhnd_bus_null_get_port_rid(device_t dev, device_t child, bhnd_port_type port_type, u_int port, u_int region) { return (-1); } static int bhnd_bus_null_decode_port_rid(device_t dev, device_t child, int type, int rid, bhnd_port_type *port_type, u_int *port, u_int *region) { return (ENOENT); } static int bhnd_bus_null_get_region_addr(device_t dev, device_t child, bhnd_port_type type, u_int port, u_int region, bhnd_addr_t *addr, bhnd_size_t *size) { return (ENOENT); } static int bhnd_bus_null_get_nvram_var(device_t dev, device_t child, const char *name, void *buf, size_t *size, bhnd_nvram_type type) { return (ENODEV); } } /** * Return the bhnd(4) bus driver's device enumeration parser class. * * @param driver The bhnd bus driver instance. */ STATICMETHOD bhnd_erom_class_t * get_erom_class { driver_t *driver; } DEFAULT bhnd_bus_null_get_erom_class; /** * Register a shared bus @p provider for a given @p service. * * @param dev The parent of @p child. * @param child The requesting child device. * @param provider The service provider to register. * @param service The service for which @p provider will be registered. * * @retval 0 success * @retval EEXIST if an entry for @p service already exists. * @retval non-zero if registering @p provider otherwise fails, a regular * unix error code will be returned. */ METHOD int register_provider { device_t dev; device_t child; device_t provider; bhnd_service_t service; } DEFAULT bhnd_bus_generic_register_provider; /** * Attempt to remove the @p service provider registration for @p provider. * * @param dev The parent of @p child. * @param child The requesting child device. * @param provider The service provider to be deregistered. * @param service The service for which @p provider will be deregistered, * or BHND_SERVICE_INVALID to remove all service * registrations for @p provider. * * @retval 0 success * @retval EBUSY if active references to @p provider exist; @see * BHND_BUS_RETAIN_PROVIDER() and * BHND_BUS_RELEASE_PROVIDER(). */ METHOD int deregister_provider { device_t dev; device_t child; device_t provider; bhnd_service_t service; } DEFAULT bhnd_bus_generic_deregister_provider; /** * Retain and return a reference to the registered @p service provider, if any. * * @param dev The parent of @p child. * @param child The requesting child device. * @param service The service for which a provider should be returned. * * On success, the caller assumes ownership the returned provider, and * is responsible for releasing this reference via * BHND_BUS_RELEASE_PROVIDER(). * * @retval device_t success * @retval NULL if no provider is registered for @p service. */ METHOD device_t retain_provider { device_t dev; device_t child; bhnd_service_t service; } DEFAULT bhnd_bus_generic_retain_provider; /** * Release a reference to a service provider previously returned by * BHND_BUS_RETAIN_PROVIDER(). * * @param dev The parent of @p child. * @param child The requesting child device. * @param provider The provider to be released. * @param service The service for which @p provider was previously * retained. */ METHOD void release_provider { device_t dev; device_t child; device_t provider; bhnd_service_t service; } DEFAULT bhnd_bus_generic_release_provider; /** * Return a struct bhnd_service_registry. * * Used by drivers which use bhnd_bus_generic_sr_register_provider() etc. * to implement service provider registration. It should return a service * registry that may be used to resolve provider requests from @p child. * * @param dev The parent of @p child. * @param child The requesting child device. */ METHOD struct bhnd_service_registry * get_service_registry { device_t dev; device_t child; } DEFAULT bhnd_bus_null_get_service_registry; /** * Return the active host bridge core for the bhnd bus, if any. * * @param dev The bhnd bus device. * * @retval device_t if a hostb device exists * @retval NULL if no hostb device is found. */ METHOD device_t find_hostb_device { device_t dev; } DEFAULT bhnd_bus_null_find_hostb_device; /** * Return true if the hardware components required by @p child are unpopulated * or otherwise unusable. * * In some cases, enumerated devices may have pins that are left floating, or * the hardware may otherwise be non-functional; this method allows a parent * device to explicitly specify if a successfully enumerated @p child should * be disabled. * * @param dev The device whose child is being examined. * @param child The child device. */ METHOD bool is_hw_disabled { device_t dev; device_t child; } DEFAULT bhnd_bus_null_is_hw_disabled; /** * Return the probe (and attach) order for @p child. * * All devices on the bhnd(4) bus will be probed, attached, or resumed in * ascending order; they will be suspended, shutdown, and detached in * descending order. * * The following device methods will be dispatched in ascending probe order * by the bus: * * - DEVICE_PROBE() * - DEVICE_ATTACH() * - DEVICE_RESUME() * * The following device methods will be dispatched in descending probe order * by the bus: * * - DEVICE_SHUTDOWN() * - DEVICE_DETACH() * - DEVICE_SUSPEND() * * @param dev The device whose child is being examined. * @param child The child device. * * Refer to BHND_PROBE_* and BHND_PROBE_ORDER_* for the standard set of * priorities. */ METHOD int get_probe_order { device_t dev; device_t child; } DEFAULT bhnd_bus_null_get_probe_order; /** * Return the BHND chip identification for the parent bus. * * @param dev The device whose child is being examined. * @param child The child device. */ METHOD const struct bhnd_chipid * get_chipid { device_t dev; device_t child; } DEFAULT bhnd_bus_null_get_chipid; /** * Return the BHND attachment type of the parent bus. * * @param dev The device whose child is being examined. * @param child The child device. * * @retval BHND_ATTACH_ADAPTER if the bus is resident on a bridged adapter, * such as a WiFi chipset. * @retval BHND_ATTACH_NATIVE if the bus provides hardware services (clock, * CPU, etc) to a directly attached native host. */ METHOD bhnd_attach_type get_attach_type { device_t dev; device_t child; } DEFAULT bhnd_bus_null_get_attach_type; /** * Find the best available DMA address translation capable of mapping a * physical host address to a BHND DMA device address of @p width with * @p flags. * * @param dev The parent of @p child. * @param child The bhnd device requesting the DMA address translation. * @param width The address width within which the translation window must * reside (see BHND_DMA_ADDR_*). * @param flags Required translation flags (see BHND_DMA_TRANSLATION_*). * @param[out] dmat On success, will be populated with a DMA tag specifying the * @p translation DMA address restrictions. This argment may be NULL if the DMA * tag is not desired. * the set of valid host DMA addresses reachable via @p translation. * @param[out] translation On success, will be populated with a DMA address * translation descriptor for @p child. This argment may be NULL if the * descriptor is not desired. * * @retval 0 success * @retval ENODEV If DMA is not supported. * @retval ENOENT If no DMA translation matching @p width and @p flags is * available. * @retval non-zero If determining the DMA address translation for @p child * otherwise fails, a regular unix error code will be returned. */ METHOD int get_dma_translation { device_t dev; device_t child; u_int width; uint32_t flags; bus_dma_tag_t *dmat; struct bhnd_dma_translation *translation; } DEFAULT bhnd_bus_generic_get_dma_translation; /** * Attempt to read the BHND board identification from the parent bus. * * This relies on NVRAM access, and will fail if a valid NVRAM device cannot * be found, or is not yet attached. * * @param dev The parent of @p child. * @param child The bhnd device requesting board info. * @param[out] info On success, will be populated with the bhnd(4) device's * board information. * * @retval 0 success * @retval ENODEV No valid NVRAM source could be found. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ METHOD int read_board_info { device_t dev; device_t child; struct bhnd_board_info *info; } DEFAULT bhnd_bus_null_read_board_info; /** * Notify a bhnd bus that a child was added. * * This method must be called by concrete bhnd(4) driver impementations * after @p child's bus state is fully initialized. * * @param dev The bhnd bus whose child is being added. * @param child The child added to @p dev. */ METHOD void child_added { device_t dev; device_t child; } DEFAULT bhnd_bus_null_child_added; /** * Read the current value of @p child's I/O control register. * * @param dev The bhnd bus parent of @p child. * @param child The bhnd device for which the I/O control register should be * read. * @param[out] ioctl On success, the I/O control register value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If reading the IOCTL register otherwise fails, a regular * unix error code will be returned. */ METHOD int read_ioctl { device_t dev; device_t child; uint16_t *ioctl; } DEFAULT bhnd_bus_null_read_ioctl; /** * Write @p value with @p mask to @p child's I/O control register. * * @param dev The bhnd bus parent of @p child. * @param child The bhnd device for which the I/O control register should * be updated. * @param value The value to be written (see also BHND_IOCTL_*). * @param mask Only the bits defined by @p mask will be updated from @p value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If writing the IOCTL register otherwise fails, a regular * unix error code will be returned. */ METHOD int write_ioctl { device_t dev; device_t child; uint16_t value; uint16_t mask; } DEFAULT bhnd_bus_null_write_ioctl; /** * Read the current value of @p child's I/O status register. * * @param dev The bhnd bus parent of @p child. * @param child The bhnd device for which the I/O status register should be * read. * @param[out] iost On success, the I/O status register value. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval ENODEV If agent/config space for @p child is unavailable. * @retval non-zero If reading the IOST register otherwise fails, a regular * unix error code will be returned. */ METHOD int read_iost { device_t dev; device_t child; uint16_t *iost; } DEFAULT bhnd_bus_null_read_iost; /** * Return true if the given bhnd device's hardware is currently held * in a RESET state or otherwise not clocked (BHND_IOCTL_CLK_EN). * * @param dev The bhnd bus parent of @p child. * @param child The device to query. * * @retval true If @p child is held in RESET or not clocked (BHND_IOCTL_CLK_EN), * or an error occured determining @p child's hardware state. * @retval false If @p child is clocked and is not held in RESET. */ METHOD bool is_hw_suspended { device_t dev; device_t child; } DEFAULT bhnd_bus_null_is_hw_suspended; /** * Place the bhnd(4) device's hardware into a reset state, and then bring the * hardware out of reset with BHND_IOCTL_CLK_EN and @p ioctl flags set. * * Any clock or resource PMU requests previously made by @p child will be * invalidated. * * @param dev The bhnd bus parent of @p child. * @param child The device to be reset. * @param ioctl Device-specific core ioctl flags to be supplied on reset * (see BHND_IOCTL_*). * * @retval 0 success * @retval non-zero error */ METHOD int reset_hw { device_t dev; device_t child; uint16_t ioctl; } DEFAULT bhnd_bus_null_reset_hw; /** * Suspend @p child's hardware in a low-power reset state. * * Any clock or resource PMU requests previously made by @p dev will be * invalidated. * * The hardware may be brought out of reset via bhnd_reset_hw(). * - * @param dev The bhnd bus parent of @P child. + * @param dev The bhnd bus parent of @p child. * @param dev The device to be suspended. * * @retval 0 success * @retval non-zero error */ METHOD int suspend_hw { device_t dev; device_t child; } DEFAULT bhnd_bus_null_suspend_hw; /** * Allocate per-core PMU resources and enable PMU request handling for @p child. * * The region containing the core's PMU register block (if any) must be * allocated via bus_alloc_resource(9) (or bhnd_alloc_resource) before * calling BHND_BUS_ALLOC_PMU(), and must not be released until after * calling BHND_BUS_RELEASE_PMU(). * * @param dev The parent of @p child. * @param child The requesting bhnd device. * * @retval 0 success * @retval non-zero if enabling per-core PMU request handling fails, a * regular unix error code will be returned. */ METHOD int alloc_pmu { device_t dev; device_t child; } DEFAULT bhnd_bus_null_alloc_pmu; /** * Release per-core PMU resources allocated for @p child. Any * outstanding PMU requests are discarded. * * @param dev The parent of @p child. * @param child The requesting bhnd device. */ METHOD int release_pmu { device_t dev; device_t child; } DEFAULT bhnd_bus_null_release_pmu; /** * Return the transition latency required for @p clock in microseconds, if * known. * * The BHND_CLOCK_HT latency value is suitable for use as the D11 core's * 'fastpwrup_dly' value. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before querying PMU clocks. * * @param dev The parent of @p child. * @param child The requesting bhnd device. * @param clock The clock to be queried for transition latency. * @param[out] latency On success, the transition latency of @p clock in * microseconds. * * @retval 0 success * @retval ENODEV If the transition latency for @p clock is not available. */ METHOD int get_clock_latency { device_t dev; device_t child; bhnd_clock clock; u_int *latency; } DEFAULT bhnd_bus_null_get_clock_latency; /** * Return the frequency for @p clock in Hz, if known. * * @param dev The parent of @p child. * @param child The requesting bhnd device. * @param clock The clock to be queried. * @param[out] freq On success, the frequency of @p clock in Hz. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before querying PMU clocks. * * @retval 0 success * @retval ENODEV If the frequency for @p clock is not available. */ METHOD int get_clock_freq { device_t dev; device_t child; bhnd_clock clock; u_int *freq; } DEFAULT bhnd_bus_null_get_clock_freq; /** * Request that @p clock (or faster) be routed to @p child. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before it can request clock resources. * * @note Any outstanding PMU clock requests will be discarded upon calling * BHND_BUS_RESET_HW() or BHND_BUS_SUSPEND_HW(). * * @param dev The parent of @p child. * @param child The bhnd device requesting @p clock. * @param clock The requested clock source. * * @retval 0 success * @retval ENODEV If an unsupported clock was requested. * @retval ETIMEDOUT If the clock request succeeds, but the clock is not * detected as ready within the PMU's maximum transition * delay. This should not occur in normal operation. */ METHOD int request_clock { device_t dev; device_t child; bhnd_clock clock; } DEFAULT bhnd_bus_null_request_clock; /** * Request that @p clocks be powered on behalf of @p child. * * This will power on clock sources (e.g. XTAL, PLL, etc) required for * @p clocks and wait until they are ready, discarding any previous * requests by @p child. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before it can request clock resources. * * @note Any outstanding PMU clock requests will be discarded upon calling * BHND_BUS_RESET_HW() or BHND_BUS_SUSPEND_HW(). * * @param dev The parent of @p child. * @param child The bhnd device requesting @p clock. * @param clock The requested clock source. * * @retval 0 success * @retval ENODEV If an unsupported clock was requested. * @retval ETIMEDOUT If the clock request succeeds, but the clock is not * detected as ready within the PMU's maximum transition * delay. This should not occur in normal operation. */ METHOD int enable_clocks { device_t dev; device_t child; uint32_t clocks; } DEFAULT bhnd_bus_null_enable_clocks; /** * Power up an external PMU-managed resource assigned to @p child. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before it can request PMU resources. * * @note Any outstanding PMU resource requests will be released upon calling * BHND_BUS_RESET_HW() or BHND_BUS_SUSPEND_HW(). * * @param dev The parent of @p child. * @param child The bhnd device requesting @p rsrc. * @param rsrc The core-specific external resource identifier. * * @retval 0 success * @retval ENODEV If the PMU does not support @p rsrc. * @retval ETIMEDOUT If the clock request succeeds, but the clock is not * detected as ready within the PMU's maximum transition * delay. This should not occur in normal operation. */ METHOD int request_ext_rsrc { device_t dev; device_t child; u_int rsrc; } DEFAULT bhnd_bus_null_request_ext_rsrc; /** * Power down an external PMU-managed resource assigned to @p child. * * @note A driver must ask the bhnd bus to allocate PMU request state * via BHND_BUS_ALLOC_PMU() before it can request PMU resources. * * @param dev The parent of @p child. * @param child The bhnd device requesting @p rsrc. * @param rsrc The core-specific external resource number. * * @retval 0 success * @retval ENODEV If the PMU does not support @p rsrc. * @retval ETIMEDOUT If the clock request succeeds, but the clock is not * detected as ready within the PMU's maximum transition * delay. This should not occur in normal operation. */ METHOD int release_ext_rsrc { device_t dev; device_t child; u_int rsrc; } DEFAULT bhnd_bus_null_release_ext_rsrc; /** * Read @p width bytes at @p offset from the bus-specific agent/config * space of @p child. * * @param dev The parent of @p child. * @param child The bhnd device for which @p offset should be read. * @param offset The offset to be read. * @param[out] value On success, the bytes read at @p offset. * @param width The size of the access. Must be 1, 2 or 4 bytes. * * The exact behavior of this method is bus-specific. On a bcma(4) bus, this * method provides access to the first agent port of @p child; on a siba(4) bus, * this method provides access to the core's CFG0 register block. * * @note Device drivers should only use this API for functionality * that is not available via another bhnd(4) function. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval EINVAL If @p width is not one of 1, 2, or 4 bytes. * @retval ENODEV If accessing agent/config space for @p child is unsupported. * @retval EFAULT If reading @p width at @p offset exceeds the bounds of * the mapped agent/config space for @p child. */ METHOD int read_config { device_t dev; device_t child; bus_size_t offset; void *value; u_int width; } DEFAULT bhnd_bus_null_read_config; /** * Read @p width bytes at @p offset from the bus-specific agent/config * space of @p child. * * @param dev The parent of @p child. * @param child The bhnd device for which @p offset should be read. * @param offset The offset to be written. * @param value A pointer to the value to be written. * @param width The size of @p value. Must be 1, 2 or 4 bytes. * * The exact behavior of this method is bus-specific. In the case of * bcma(4), this method provides access to the first agent port of @p child. * * @note Device drivers should only use this API for functionality * that is not available via another bhnd(4) function. * * @retval 0 success * @retval EINVAL If @p child is not a direct child of @p dev. * @retval EINVAL If @p width is not one of 1, 2, or 4 bytes. * @retval ENODEV If accessing agent/config space for @p child is unsupported. * @retval EFAULT If reading @p width at @p offset exceeds the bounds of * the mapped agent/config space for @p child. */ METHOD int write_config { device_t dev; device_t child; bus_size_t offset; const void *value; u_int width; } DEFAULT bhnd_bus_null_write_config; /** * Allocate a bhnd resource. * * This method's semantics are functionally identical to the bus API of the same * name; refer to BUS_ALLOC_RESOURCE for complete documentation. */ METHOD struct bhnd_resource * alloc_resource { device_t dev; device_t child; int type; int *rid; rman_res_t start; rman_res_t end; rman_res_t count; u_int flags; } DEFAULT bhnd_bus_generic_alloc_resource; /** * Release a bhnd resource. * * This method's semantics are functionally identical to the bus API of the same * name; refer to BUS_RELEASE_RESOURCE for complete documentation. */ METHOD int release_resource { device_t dev; device_t child; int type; int rid; struct bhnd_resource *res; } DEFAULT bhnd_bus_generic_release_resource; /** * Activate a bhnd resource. * * This method's semantics are functionally identical to the bus API of the same * name; refer to BUS_ACTIVATE_RESOURCE for complete documentation. */ METHOD int activate_resource { device_t dev; device_t child; int type; int rid; struct bhnd_resource *r; } DEFAULT bhnd_bus_generic_activate_resource; /** * Deactivate a bhnd resource. * * This method's semantics are functionally identical to the bus API of the same * name; refer to BUS_DEACTIVATE_RESOURCE for complete documentation. */ METHOD int deactivate_resource { device_t dev; device_t child; int type; int rid; struct bhnd_resource *r; } DEFAULT bhnd_bus_generic_deactivate_resource; /** * Return the interrupt domain. * * This globally unique value may be used as the interrupt controller 'xref' * on targets that support INTRNG. * * @param dev The device whose child is being examined. * @param child The child device. - * @parem self If true, return @p child's interrupt domain, rather than the + * @param self If true, return @p child's interrupt domain, rather than the * domain in which @p child resides. * * On Non-OFW targets, this should either return: * - The pointer address of a device that can uniquely identify @p child's * interrupt domain (e.g., the bhnd bus' device_t address), or * - 0 if unsupported by the bus. * * On OFW (including FDT) targets, this should return the @p child's iparent * property's xref if @p self is false, the child's own node xref value if * @p self is true, or 0 if no interrupt parent is found. */ METHOD uintptr_t get_intr_domain { device_t dev; device_t child; bool self; } DEFAULT bhnd_bus_null_get_intr_domain; /** * Return the number of interrupt lines assigned to @p child. * * @param dev The bhnd device whose child is being examined. * @param child The child device. */ METHOD u_int get_intr_count { device_t dev; device_t child; } DEFAULT bhnd_bus_null_get_intr_count; /** * Get the backplane interrupt vector of the @p intr line attached to @p child. * * @param dev The device whose child is being examined. * @param child The child device. * @param intr The index of the interrupt line being queried. * @param[out] ivec On success, the assigned hardware interrupt vector will be * written to this pointer. * * On bcma(4) devices, this returns the OOB bus line assigned to the * interrupt. * * On siba(4) devices, this returns the target OCP slave flag number assigned * to the interrupt. * * @retval 0 success * @retval ENXIO If @p intr exceeds the number of interrupt lines * assigned to @p child. */ METHOD int get_intr_ivec { device_t dev; device_t child; u_int intr; u_int *ivec; } DEFAULT bhnd_bus_null_get_intr_ivec; /** * Map the given @p intr to an IRQ number; until unmapped, this IRQ may be used * to allocate a resource of type SYS_RES_IRQ. * * On success, the caller assumes ownership of the interrupt mapping, and * is responsible for releasing the mapping via BHND_BUS_UNMAP_INTR(). * * @param dev The bhnd bus device. * @param child The requesting child device. * @param intr The interrupt being mapped. * @param[out] irq On success, the bus interrupt value mapped for @p intr. * * @retval 0 If an interrupt was assigned. * @retval non-zero If mapping an interrupt otherwise fails, a regular * unix error code will be returned. */ METHOD int map_intr { device_t dev; device_t child; u_int intr; rman_res_t *irq; } DEFAULT bhnd_bus_null_map_intr; /** * Unmap an bus interrupt previously mapped via BHND_BUS_MAP_INTR(). * * @param dev The bhnd bus device. * @param child The requesting child device. * @param intr The interrupt number being unmapped. This is equivalent to the * bus resource ID for the interrupt. */ METHOD void unmap_intr { device_t dev; device_t child; rman_res_t irq; } DEFAULT bhnd_bus_null_unmap_intr; /** * Return true if @p region_num is a valid region on @p port_num of * @p type attached to @p child. * * @param dev The device whose child is being examined. * @param child The child device. * @param type The port type being queried. * @param port_num The port number being queried. * @param region_num The region number being queried. */ METHOD bool is_region_valid { device_t dev; device_t child; bhnd_port_type type; u_int port_num; u_int region_num; }; /** * Return the number of ports of type @p type attached to @p child. * * @param dev The device whose child is being examined. * @param child The child device. * @param type The port type being queried. */ METHOD u_int get_port_count { device_t dev; device_t child; bhnd_port_type type; }; /** * Return the number of memory regions mapped to @p child @p port of * type @p type. * * @param dev The device whose child is being examined. * @param child The child device. * @param port The port number being queried. * @param type The port type being queried. */ METHOD u_int get_region_count { device_t dev; device_t child; bhnd_port_type type; u_int port; }; /** * Return the SYS_RES_MEMORY resource-ID for a port/region pair attached to * @p child. * * @param dev The bus device. * @param child The bhnd child. * @param port_type The port type. * @param port_num The index of the child interconnect port. * @param region_num The index of the port-mapped address region. * * @retval -1 No such port/region found. */ METHOD int get_port_rid { device_t dev; device_t child; bhnd_port_type port_type; u_int port_num; u_int region_num; } DEFAULT bhnd_bus_null_get_port_rid; /** * Decode a port / region pair on @p child defined by @p type and @p rid. * * @param dev The bus device. * @param child The bhnd child. * @param type The resource type. * @param rid The resource ID. * @param[out] port_type The port's type. * @param[out] port The port identifier. * @param[out] region The identifier of the memory region on @p port. * * @retval 0 success * @retval non-zero No matching type/rid found. */ METHOD int decode_port_rid { device_t dev; device_t child; int type; int rid; bhnd_port_type *port_type; u_int *port; u_int *region; } DEFAULT bhnd_bus_null_decode_port_rid; /** * Get the address and size of @p region on @p port. * * @param dev The bus device. * @param child The bhnd child. * @param port_type The port type. * @param port The port identifier. * @param region The identifier of the memory region on @p port. * @param[out] region_addr The region's base address. * @param[out] region_size The region's size. * * @retval 0 success * @retval non-zero No matching port/region found. */ METHOD int get_region_addr { device_t dev; device_t child; bhnd_port_type port_type; u_int port; u_int region; bhnd_addr_t *region_addr; bhnd_size_t *region_size; } DEFAULT bhnd_bus_null_get_region_addr; /** * Read an NVRAM variable. * * It is the responsibility of the bus to delegate this request to * the appropriate NVRAM child device, or to a parent bus implementation. * * @param dev The bus device. * @param child The requesting device. * @param name The NVRAM variable name. * @param[out] buf On success, the requested value will be written * to this buffer. This argment may be NULL if * the value is not desired. * @param[in,out] size The capacity of @p buf. On success, will be set * to the actual size of the requested value. * @param type The data type to be written to @p buf. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENOMEM If @p buf is non-NULL and a buffer of @p size is too * small to hold the requested value. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the @p name's data type cannot be coerced to @p type. * @retval ERANGE If value coercion would overflow @p type. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ METHOD int get_nvram_var { device_t dev; device_t child; const char *name; void *buf; size_t *size; bhnd_nvram_type type; } DEFAULT bhnd_bus_null_get_nvram_var; /** An implementation of bus_read_1() compatible with bhnd_resource */ METHOD uint8_t read_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; } /** An implementation of bus_read_2() compatible with bhnd_resource */ METHOD uint16_t read_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; } /** An implementation of bus_read_4() compatible with bhnd_resource */ METHOD uint32_t read_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; } /** An implementation of bus_write_1() compatible with bhnd_resource */ METHOD void write_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t value; } /** An implementation of bus_write_2() compatible with bhnd_resource */ METHOD void write_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t value; } /** An implementation of bus_write_4() compatible with bhnd_resource */ METHOD void write_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t value; } /** An implementation of bus_read_stream_1() compatible with bhnd_resource */ METHOD uint8_t read_stream_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; } /** An implementation of bus_read_stream_2() compatible with bhnd_resource */ METHOD uint16_t read_stream_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; } /** An implementation of bus_read_stream_4() compatible with bhnd_resource */ METHOD uint32_t read_stream_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; } /** An implementation of bus_write_stream_1() compatible with bhnd_resource */ METHOD void write_stream_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t value; } /** An implementation of bus_write_stream_2() compatible with bhnd_resource */ METHOD void write_stream_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t value; } /** An implementation of bus_write_stream_4() compatible with bhnd_resource */ METHOD void write_stream_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t value; } /** An implementation of bus_read_multi_1() compatible with bhnd_resource */ METHOD void read_multi_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_read_multi_2() compatible with bhnd_resource */ METHOD void read_multi_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_read_multi_4() compatible with bhnd_resource */ METHOD void read_multi_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_write_multi_1() compatible with bhnd_resource */ METHOD void write_multi_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_write_multi_2() compatible with bhnd_resource */ METHOD void write_multi_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_write_multi_4() compatible with bhnd_resource */ METHOD void write_multi_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_read_multi_stream_1() compatible * bhnd_resource */ METHOD void read_multi_stream_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_read_multi_stream_2() compatible * bhnd_resource */ METHOD void read_multi_stream_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_read_multi_stream_4() compatible * bhnd_resource */ METHOD void read_multi_stream_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_write_multi_stream_1() compatible * bhnd_resource */ METHOD void write_multi_stream_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_write_multi_stream_2() compatible with * bhnd_resource */ METHOD void write_multi_stream_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_write_multi_stream_4() compatible with * bhnd_resource */ METHOD void write_multi_stream_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_set_multi_1() compatible with bhnd_resource */ METHOD void set_multi_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t value; bus_size_t count; } /** An implementation of bus_set_multi_2() compatible with bhnd_resource */ METHOD void set_multi_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t value; bus_size_t count; } /** An implementation of bus_set_multi_4() compatible with bhnd_resource */ METHOD void set_multi_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t value; bus_size_t count; } /** An implementation of bus_set_region_1() compatible with bhnd_resource */ METHOD void set_region_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t value; bus_size_t count; } /** An implementation of bus_set_region_2() compatible with bhnd_resource */ METHOD void set_region_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t value; bus_size_t count; } /** An implementation of bus_set_region_4() compatible with bhnd_resource */ METHOD void set_region_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t value; bus_size_t count; } /** An implementation of bus_read_region_1() compatible with bhnd_resource */ METHOD void read_region_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_read_region_2() compatible with bhnd_resource */ METHOD void read_region_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_read_region_4() compatible with bhnd_resource */ METHOD void read_region_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_read_region_stream_1() compatible with * bhnd_resource */ METHOD void read_region_stream_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_read_region_stream_2() compatible with * bhnd_resource */ METHOD void read_region_stream_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_read_region_stream_4() compatible with * bhnd_resource */ METHOD void read_region_stream_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_write_region_1() compatible with bhnd_resource */ METHOD void write_region_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_write_region_2() compatible with bhnd_resource */ METHOD void write_region_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_write_region_4() compatible with bhnd_resource */ METHOD void write_region_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_write_region_stream_1() compatible with * bhnd_resource */ METHOD void write_region_stream_1 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint8_t *datap; bus_size_t count; } /** An implementation of bus_write_region_stream_2() compatible with * bhnd_resource */ METHOD void write_region_stream_2 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint16_t *datap; bus_size_t count; } /** An implementation of bus_write_region_stream_4() compatible with * bhnd_resource */ METHOD void write_region_stream_4 { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; uint32_t *datap; bus_size_t count; } /** An implementation of bus_barrier() compatible with bhnd_resource */ METHOD void barrier { device_t dev; device_t child; struct bhnd_resource *r; bus_size_t offset; bus_size_t length; int flags; } Index: head/sys/dev/bhnd/bhnd_erom.c =================================================================== --- head/sys/dev/bhnd/bhnd_erom.c (revision 326290) +++ head/sys/dev/bhnd/bhnd_erom.c (revision 326291) @@ -1,486 +1,487 @@ /*- * Copyright (c) 2016 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include static int bhnd_erom_iores_map(struct bhnd_erom_io *eio, bhnd_addr_t addr, bhnd_size_t size); static uint32_t bhnd_erom_iores_read(struct bhnd_erom_io *eio, bhnd_size_t offset, u_int width); static void bhnd_erom_iores_fini(struct bhnd_erom_io *eio); static int bhnd_erom_iobus_map(struct bhnd_erom_io *eio, bhnd_addr_t addr, bhnd_size_t size); static uint32_t bhnd_erom_iobus_read(struct bhnd_erom_io *eio, bhnd_size_t offset, u_int width); /** * An implementation of bhnd_erom_io that manages mappings via * bhnd_alloc_resource() and bhnd_release_resource(). */ struct bhnd_erom_iores { struct bhnd_erom_io eio; device_t owner; /**< device from which we'll allocate resources */ int owner_rid; /**< rid to use when allocating new mappings */ struct bhnd_resource *mapped; /**< current mapping, or NULL */ int mapped_rid; /**< resource ID of current mapping, or -1 */ }; /** * Fetch the device enumeration parser class from all bhnd(4)-compatible drivers * registered for @p bus_devclass, probe @p eio for supporting parser classes, * and return the best available supporting enumeration parser class. * * @param bus_devclass The bus device class to be queried for * bhnd(4)-compatible drivers. * @param eio An erom bus I/O instance, configured with a * mapping of the first bus core. * @param hint Identification hint used to identify the device. * If the chipset supports standard chip * identification registers within the first core, * this parameter should be NULL. * @param[out] cid On success, the probed chip identifier. * * @retval non-NULL on success, the best available EROM class. * @retval NULL if no erom class returned a successful probe result for * @p eio. */ bhnd_erom_class_t * bhnd_erom_probe_driver_classes(devclass_t bus_devclass, struct bhnd_erom_io *eio, const struct bhnd_chipid *hint, struct bhnd_chipid *cid) { driver_t **drivers; int drv_count; bhnd_erom_class_t *erom_cls; int error, prio, result; erom_cls = NULL; prio = 0; /* Fetch all available drivers */ error = devclass_get_drivers(bus_devclass, &drivers, &drv_count); if (error) { printf("error fetching bhnd(4) drivers for %s: %d\n", devclass_get_name(bus_devclass), error); return (NULL); } /* Enumerate the drivers looking for the best available EROM class */ for (int i = 0; i < drv_count; i++) { struct bhnd_chipid pcid; bhnd_erom_class_t *cls; /* The default implementation of BHND_BUS_GET_EROM_CLASS() * returns NULL if unimplemented; this should always be safe * to call on arbitrary drivers */ cls = bhnd_driver_get_erom_class(drivers[i]); if (cls == NULL) continue; kobj_class_compile(cls); /* Probe the bus */ result = bhnd_erom_probe(cls, eio, hint, &pcid); /* The parser did not match if an error was returned */ if (result > 0) continue; /* Check for a new highest priority match */ if (erom_cls == NULL || result > prio) { prio = result; *cid = pcid; erom_cls = cls; } /* Terminate immediately on BUS_PROBE_SPECIFIC */ if (result == BUS_PROBE_SPECIFIC) break; } return (erom_cls); } /** * Allocate and return a new device enumeration table parser. * * @param cls The parser class for which an instance will be * allocated. * @param eio The bus I/O callbacks to use when reading the device * enumeration table. * @param cid The device's chip identifier. * * @retval non-NULL success * @retval NULL if an error occured allocating or initializing the * EROM parser. */ bhnd_erom_t * bhnd_erom_alloc(bhnd_erom_class_t *cls, const struct bhnd_chipid *cid, struct bhnd_erom_io *eio) { bhnd_erom_t *erom; int error; erom = (bhnd_erom_t *)kobj_create((kobj_class_t)cls, M_BHND, M_WAITOK|M_ZERO); if ((error = BHND_EROM_INIT(erom, cid, eio))) { printf("error initializing %s parser at %#jx: %d\n", cls->name, (uintmax_t)cid->enum_addr, error); kobj_delete((kobj_t)erom, M_BHND); return (NULL); } return (erom); } /** * Perform static initialization of a device enumeration table parser. * * This may be used to initialize a caller-allocated erom instance state * during early boot, prior to malloc availability. * * @param cls The parser class for which an instance will be * allocated. * @param erom The erom parser instance to initialize. * @param esize The total available number of bytes allocated for * @p erom. If this is less than is required by @p cls, * ENOMEM will be returned. * @param cid The device's chip identifier. * @param eio The bus I/O callbacks to use when reading the device * enumeration table. * * @retval 0 success * @retval ENOMEM if @p esize is smaller than required by @p cls. * @retval non-zero if an error occurs initializing the EROM parser, * a regular unix error code will be returned. */ int bhnd_erom_init_static(bhnd_erom_class_t *cls, bhnd_erom_t *erom, size_t esize, const struct bhnd_chipid *cid, struct bhnd_erom_io *eio) { kobj_class_t kcls; kcls = (kobj_class_t)cls; /* Verify allocation size */ if (kcls->size > esize) return (ENOMEM); /* Perform instance initialization */ kobj_init_static((kobj_t)erom, kcls); return (BHND_EROM_INIT(erom, cid, eio)); } /** * Release any resources held by a @p erom parser previously * initialized via bhnd_erom_init_static(). * * @param erom An erom parser instance previously initialized via * bhnd_erom_init_static(). */ void bhnd_erom_fini_static(bhnd_erom_t *erom) { return (BHND_EROM_FINI(erom)); } /** * Release all resources held by a @p erom parser previously * allocated via bhnd_erom_alloc(). * * @param erom An erom parser instance previously allocated via * bhnd_erom_alloc(). */ void bhnd_erom_free(bhnd_erom_t *erom) { BHND_EROM_FINI(erom); kobj_delete((kobj_t)erom, M_BHND); } /** * Attempt to map @p size bytes at @p addr, replacing any existing * @p eio mapping. * * @param eio I/O instance state. * @param addr The address to be mapped. * @param size The number of bytes to be mapped at @p addr. * * @retval 0 success * @retval non-zero if mapping @p addr otherwise fails, a regular * unix error code should be returned. */ int bhnd_erom_io_map(struct bhnd_erom_io *eio, bhnd_addr_t addr, bhnd_size_t size) { return (eio->map(eio, addr, size)); } /** * Read a 1, 2, or 4 byte data item from @p eio, at the given @p offset * relative to @p eio's current mapping. * * @param eio erom I/O callbacks * @param offset read offset. * @param width item width (1, 2, or 4 bytes). */ uint32_t bhnd_erom_io_read(struct bhnd_erom_io *eio, bhnd_size_t offset, u_int width) { return (eio->read(eio, offset, width)); } /** * Free all resources held by @p eio. */ void bhnd_erom_io_fini(struct bhnd_erom_io *eio) { if (eio->fini != NULL) return (eio->fini(eio)); } /** * Allocate, initialize, and return a new I/O instance that will perform * mapping by allocating SYS_RES_MEMORY resources from @p dev using @p rid. * * @param dev The device to pass to bhnd_alloc_resource() and * bhnd_release_resource() functions. * @param rid The resource ID to be used when allocating memory resources. */ struct bhnd_erom_io * bhnd_erom_iores_new(device_t dev, int rid) { struct bhnd_erom_iores *iores; iores = malloc(sizeof(*iores), M_BHND, M_WAITOK | M_ZERO); iores->eio.map = bhnd_erom_iores_map; iores->eio.read = bhnd_erom_iores_read; iores->eio.fini = bhnd_erom_iores_fini; iores->owner = dev; iores->owner_rid = rid; iores->mapped = NULL; iores->mapped_rid = -1; return (&iores->eio); } static int bhnd_erom_iores_map(struct bhnd_erom_io *eio, bhnd_addr_t addr, bhnd_size_t size) { struct bhnd_erom_iores *iores; iores = (struct bhnd_erom_iores *)eio; /* Sanity check the addr/size */ if (size == 0) return (EINVAL); if (BHND_ADDR_MAX - size < addr) return (EINVAL); /* would overflow */ /* Check for an existing mapping */ if (iores->mapped) { /* If already mapped, nothing else to do */ if (rman_get_start(iores->mapped->res) == addr && rman_get_size(iores->mapped->res) == size) { return (0); } /* Otherwise, we need to drop the existing mapping */ bhnd_release_resource(iores->owner, SYS_RES_MEMORY, iores->mapped_rid, iores->mapped); iores->mapped = NULL; iores->mapped_rid = -1; } /* Try to allocate the new mapping */ iores->mapped_rid = iores->owner_rid; iores->mapped = bhnd_alloc_resource(iores->owner, SYS_RES_MEMORY, &iores->mapped_rid, addr, addr+size-1, size, RF_ACTIVE|RF_SHAREABLE); if (iores->mapped == NULL) { iores->mapped_rid = -1; return (ENXIO); } return (0); } static uint32_t bhnd_erom_iores_read(struct bhnd_erom_io *eio, bhnd_size_t offset, u_int width) { struct bhnd_erom_iores *iores = (struct bhnd_erom_iores *)eio; if (iores->mapped == NULL) panic("read with invalid mapping"); switch (width) { case 1: return (bhnd_bus_read_1(iores->mapped, offset)); case 2: return (bhnd_bus_read_2(iores->mapped, offset)); case 4: return (bhnd_bus_read_4(iores->mapped, offset)); default: panic("invalid width %u", width); } } static void bhnd_erom_iores_fini(struct bhnd_erom_io *eio) { struct bhnd_erom_iores *iores = (struct bhnd_erom_iores *)eio; /* Release any mapping */ if (iores->mapped) { bhnd_release_resource(iores->owner, SYS_RES_MEMORY, iores->mapped_rid, iores->mapped); iores->mapped = NULL; iores->mapped_rid = -1; } free(eio, M_BHND); } /** * Initialize an I/O instance that will perform mapping directly from the * given bus space tag and handle. * + * @param iobus The I/O instance to be initialized. * @param addr The base address mapped by @p bsh. * @param size The total size mapped by @p bsh. * @param bst Bus space tag for @p bsh. * @param bsh Bus space handle mapping the full bus enumeration space. * * @retval 0 success * @retval non-zero if initializing @p iobus otherwise fails, a regular * unix error code will be returned. */ int bhnd_erom_iobus_init(struct bhnd_erom_iobus *iobus, bhnd_addr_t addr, bhnd_size_t size, bus_space_tag_t bst, bus_space_handle_t bsh) { iobus->eio.map = bhnd_erom_iobus_map; iobus->eio.read = bhnd_erom_iobus_read; iobus->eio.fini = NULL; iobus->addr = addr; iobus->size = size; iobus->bst = bst; iobus->bsh = bsh; iobus->mapped = false; return (0); } static int bhnd_erom_iobus_map(struct bhnd_erom_io *eio, bhnd_addr_t addr, bhnd_size_t size) { struct bhnd_erom_iobus *iobus = (struct bhnd_erom_iobus *)eio; /* Sanity check the addr/size */ if (size == 0) return (EINVAL); /* addr+size must not overflow */ if (BHND_ADDR_MAX - size < addr) return (EINVAL); /* addr/size must fit within our bus tag's mapping */ if (addr < iobus->addr || size > iobus->size) return (ENXIO); if (iobus->size - (addr - iobus->addr) < size) return (ENXIO); /* The new addr offset and size must be representible as a bus_size_t */ if ((addr - iobus->addr) > BUS_SPACE_MAXSIZE) return (ENXIO); if (size > BUS_SPACE_MAXSIZE) return (ENXIO); iobus->offset = addr - iobus->addr; iobus->limit = size; iobus->mapped = true; return (0); } static uint32_t bhnd_erom_iobus_read(struct bhnd_erom_io *eio, bhnd_size_t offset, u_int width) { struct bhnd_erom_iobus *iobus = (struct bhnd_erom_iobus *)eio; if (!iobus->mapped) panic("no active mapping"); if (iobus->limit < width || iobus->limit - width < offset) panic("invalid offset %#jx", offset); switch (width) { case 1: return (bus_space_read_1(iobus->bst, iobus->bsh, iobus->offset + offset)); case 2: return (bus_space_read_2(iobus->bst, iobus->bsh, iobus->offset + offset)); case 4: return (bus_space_read_4(iobus->bst, iobus->bsh, iobus->offset + offset)); default: panic("invalid width %u", width); } } Index: head/sys/dev/bhnd/bhnd_subr.c =================================================================== --- head/sys/dev/bhnd/bhnd_subr.c (revision 326290) +++ head/sys/dev/bhnd/bhnd_subr.c (revision 326291) @@ -1,2495 +1,2508 @@ /*- * Copyright (c) 2015-2016 Landon Fuller * Copyright (c) 2017 The FreeBSD Foundation * All rights reserved. * * Portions of this software were developed by Landon Fuller * under sponsorship from the FreeBSD Foundation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include "nvram/bhnd_nvram.h" #include "bhnd_chipc_if.h" #include "bhnd_nvram_if.h" #include "bhnd_nvram_map.h" #include "bhndreg.h" #include "bhndvar.h" #include "bhnd_private.h" static void bhnd_service_registry_free_entry( struct bhnd_service_entry *entry); static int compare_ascending_probe_order(const void *lhs, const void *rhs); static int compare_descending_probe_order(const void *lhs, const void *rhs); /* BHND core device description table. */ static const struct bhnd_core_desc { uint16_t vendor; uint16_t device; bhnd_devclass_t class; const char *desc; } bhnd_core_descs[] = { #define BHND_CDESC(_mfg, _cid, _cls, _desc) \ { BHND_MFGID_ ## _mfg, BHND_COREID_ ## _cid, \ BHND_DEVCLASS_ ## _cls, _desc } BHND_CDESC(BCM, CC, CC, "ChipCommon I/O Controller"), BHND_CDESC(BCM, ILINE20, OTHER, "iLine20 HPNA"), BHND_CDESC(BCM, SRAM, RAM, "SRAM"), BHND_CDESC(BCM, SDRAM, RAM, "SDRAM"), BHND_CDESC(BCM, PCI, PCI, "PCI Bridge"), BHND_CDESC(BCM, MIPS, CPU, "BMIPS CPU"), BHND_CDESC(BCM, ENET, ENET_MAC, "Fast Ethernet MAC"), BHND_CDESC(BCM, CODEC, OTHER, "V.90 Modem Codec"), BHND_CDESC(BCM, USB, USB_DUAL, "USB 1.1 Device/Host Controller"), BHND_CDESC(BCM, ADSL, OTHER, "ADSL Core"), BHND_CDESC(BCM, ILINE100, OTHER, "iLine100 HPNA"), BHND_CDESC(BCM, IPSEC, OTHER, "IPsec Accelerator"), BHND_CDESC(BCM, UTOPIA, OTHER, "UTOPIA ATM Core"), BHND_CDESC(BCM, PCMCIA, PCCARD, "PCMCIA Bridge"), BHND_CDESC(BCM, SOCRAM, RAM, "Internal Memory"), BHND_CDESC(BCM, MEMC, MEMC, "MEMC SDRAM Controller"), BHND_CDESC(BCM, OFDM, OTHER, "OFDM PHY"), BHND_CDESC(BCM, EXTIF, OTHER, "External Interface"), BHND_CDESC(BCM, D11, WLAN, "802.11 MAC/PHY/Radio"), BHND_CDESC(BCM, APHY, WLAN_PHY, "802.11a PHY"), BHND_CDESC(BCM, BPHY, WLAN_PHY, "802.11b PHY"), BHND_CDESC(BCM, GPHY, WLAN_PHY, "802.11g PHY"), BHND_CDESC(BCM, MIPS33, CPU, "BMIPS33 CPU"), BHND_CDESC(BCM, USB11H, USB_HOST, "USB 1.1 Host Controller"), BHND_CDESC(BCM, USB11D, USB_DEV, "USB 1.1 Device Controller"), BHND_CDESC(BCM, USB20H, USB_HOST, "USB 2.0 Host Controller"), BHND_CDESC(BCM, USB20D, USB_DEV, "USB 2.0 Device Controller"), BHND_CDESC(BCM, SDIOH, OTHER, "SDIO Host Controller"), BHND_CDESC(BCM, ROBO, OTHER, "RoboSwitch"), BHND_CDESC(BCM, ATA100, OTHER, "Parallel ATA Controller"), BHND_CDESC(BCM, SATAXOR, OTHER, "SATA DMA/XOR Controller"), BHND_CDESC(BCM, GIGETH, ENET_MAC, "Gigabit Ethernet MAC"), BHND_CDESC(BCM, PCIE, PCIE, "PCIe Bridge"), BHND_CDESC(BCM, NPHY, WLAN_PHY, "802.11n 2x2 PHY"), BHND_CDESC(BCM, SRAMC, MEMC, "SRAM Controller"), BHND_CDESC(BCM, MINIMAC, OTHER, "MINI MAC/PHY"), BHND_CDESC(BCM, ARM11, CPU, "ARM1176 CPU"), BHND_CDESC(BCM, ARM7S, CPU, "ARM7TDMI-S CPU"), BHND_CDESC(BCM, LPPHY, WLAN_PHY, "802.11a/b/g PHY"), BHND_CDESC(BCM, PMU, PMU, "PMU"), BHND_CDESC(BCM, SSNPHY, WLAN_PHY, "802.11n Single-Stream PHY"), BHND_CDESC(BCM, SDIOD, OTHER, "SDIO Device Core"), BHND_CDESC(BCM, ARMCM3, CPU, "ARM Cortex-M3 CPU"), BHND_CDESC(BCM, HTPHY, WLAN_PHY, "802.11n 4x4 PHY"), BHND_CDESC(MIPS,MIPS74K, CPU, "MIPS74k CPU"), BHND_CDESC(BCM, GMAC, ENET_MAC, "Gigabit MAC core"), BHND_CDESC(BCM, DMEMC, MEMC, "DDR1/DDR2 Memory Controller"), BHND_CDESC(BCM, PCIERC, OTHER, "PCIe Root Complex"), BHND_CDESC(BCM, OCP, SOC_BRIDGE, "OCP to OCP Bridge"), BHND_CDESC(BCM, SC, OTHER, "Shared Common Core"), BHND_CDESC(BCM, AHB, SOC_BRIDGE, "OCP to AHB Bridge"), BHND_CDESC(BCM, SPIH, OTHER, "SPI Host Controller"), BHND_CDESC(BCM, I2S, OTHER, "I2S Digital Audio Interface"), BHND_CDESC(BCM, DMEMS, MEMC, "SDR/DDR1 Memory Controller"), BHND_CDESC(BCM, UBUS_SHIM, OTHER, "BCM6362/UBUS WLAN SHIM"), BHND_CDESC(BCM, PCIE2, PCIE, "PCIe Bridge (Gen2)"), BHND_CDESC(ARM, APB_BRIDGE, SOC_BRIDGE, "BP135 AMBA3 AXI to APB Bridge"), BHND_CDESC(ARM, PL301, SOC_ROUTER, "PL301 AMBA3 Interconnect"), BHND_CDESC(ARM, EROM, EROM, "PL366 Device Enumeration ROM"), BHND_CDESC(ARM, OOB_ROUTER, OTHER, "PL367 OOB Interrupt Router"), BHND_CDESC(ARM, AXI_UNMAPPED, OTHER, "Unmapped Address Ranges"), BHND_CDESC(BCM, 4706_CC, CC, "ChipCommon I/O Controller"), BHND_CDESC(BCM, NS_PCIE2, PCIE, "PCIe Bridge (Gen2)"), BHND_CDESC(BCM, NS_DMA, OTHER, "DMA engine"), BHND_CDESC(BCM, NS_SDIO, OTHER, "SDIO 3.0 Host Controller"), BHND_CDESC(BCM, NS_USB20H, USB_HOST, "USB 2.0 Host Controller"), BHND_CDESC(BCM, NS_USB30H, USB_HOST, "USB 3.0 Host Controller"), BHND_CDESC(BCM, NS_A9JTAG, OTHER, "ARM Cortex A9 JTAG Interface"), BHND_CDESC(BCM, NS_DDR23_MEMC, MEMC, "Denali DDR2/DD3 Memory Controller"), BHND_CDESC(BCM, NS_ROM, NVRAM, "System ROM"), BHND_CDESC(BCM, NS_NAND, NVRAM, "NAND Flash Controller"), BHND_CDESC(BCM, NS_QSPI, NVRAM, "QSPI Flash Controller"), BHND_CDESC(BCM, NS_CC_B, CC_B, "ChipCommon B Auxiliary I/O Controller"), BHND_CDESC(BCM, 4706_SOCRAM, RAM, "Internal Memory"), BHND_CDESC(BCM, IHOST_ARMCA9, CPU, "ARM Cortex A9 CPU"), BHND_CDESC(BCM, 4706_GMAC_CMN, ENET, "Gigabit MAC (Common)"), BHND_CDESC(BCM, 4706_GMAC, ENET_MAC, "Gigabit MAC"), BHND_CDESC(BCM, AMEMC, MEMC, "Denali DDR1/DDR2 Memory Controller"), #undef BHND_CDESC /* Derived from inspection of the BCM4331 cores that provide PrimeCell * IDs. Due to lack of documentation, the surmised device name/purpose * provided here may be incorrect. */ { BHND_MFGID_ARM, BHND_PRIMEID_EROM, BHND_DEVCLASS_OTHER, "PL364 Device Enumeration ROM" }, { BHND_MFGID_ARM, BHND_PRIMEID_SWRAP, BHND_DEVCLASS_OTHER, "PL368 Device Management Interface" }, { BHND_MFGID_ARM, BHND_PRIMEID_MWRAP, BHND_DEVCLASS_OTHER, "PL369 Device Management Interface" }, { 0, 0, 0, NULL } }; static const struct bhnd_device_quirk bhnd_chipc_clkctl_quirks[]; static const struct bhnd_device_quirk bhnd_pcmcia_clkctl_quirks[]; /** * Device table entries for core-specific CLKCTL quirk lookup. */ static const struct bhnd_device bhnd_clkctl_devices[] = { BHND_DEVICE(BCM, CC, NULL, bhnd_chipc_clkctl_quirks), BHND_DEVICE(BCM, PCMCIA, NULL, bhnd_pcmcia_clkctl_quirks), BHND_DEVICE_END, }; /** ChipCommon CLKCTL quirks */ static const struct bhnd_device_quirk bhnd_chipc_clkctl_quirks[] = { /* HTAVAIL/ALPAVAIL are bitswapped in chipc's CLKCTL */ BHND_CHIP_QUIRK(4328, HWREV_ANY, BHND_CLKCTL_QUIRK_CCS0), BHND_CHIP_QUIRK(5354, HWREV_ANY, BHND_CLKCTL_QUIRK_CCS0), BHND_DEVICE_QUIRK_END }; /** PCMCIA CLKCTL quirks */ static const struct bhnd_device_quirk bhnd_pcmcia_clkctl_quirks[] = { /* HTAVAIL/ALPAVAIL are bitswapped in pcmcia's CLKCTL */ BHND_CHIP_QUIRK(4328, HWREV_ANY, BHND_CLKCTL_QUIRK_CCS0), BHND_CHIP_QUIRK(5354, HWREV_ANY, BHND_CLKCTL_QUIRK_CCS0), BHND_DEVICE_QUIRK_END }; /** * Return the name for a given JEP106 manufacturer ID. * * @param vendor A JEP106 Manufacturer ID, including the non-standard ARM 4-bit * JEP106 continuation code. */ const char * bhnd_vendor_name(uint16_t vendor) { switch (vendor) { case BHND_MFGID_ARM: return "ARM"; case BHND_MFGID_BCM: return "Broadcom"; case BHND_MFGID_MIPS: return "MIPS"; default: return "unknown"; } } /** * Return the name of a port type. + * + * @param port_type The port type to look up. */ const char * bhnd_port_type_name(bhnd_port_type port_type) { switch (port_type) { case BHND_PORT_DEVICE: return ("device"); case BHND_PORT_BRIDGE: return ("bridge"); case BHND_PORT_AGENT: return ("agent"); default: return "unknown"; } } /** * Return the name of an NVRAM source. + * + * @param nvram_src The NVRAM source type to look up. */ const char * bhnd_nvram_src_name(bhnd_nvram_src nvram_src) { switch (nvram_src) { case BHND_NVRAM_SRC_FLASH: return ("flash"); case BHND_NVRAM_SRC_OTP: return ("OTP"); case BHND_NVRAM_SRC_SPROM: return ("SPROM"); case BHND_NVRAM_SRC_UNKNOWN: return ("none"); default: return ("unknown"); } } static const struct bhnd_core_desc * bhnd_find_core_desc(uint16_t vendor, uint16_t device) { for (u_int i = 0; bhnd_core_descs[i].desc != NULL; i++) { if (bhnd_core_descs[i].vendor != vendor) continue; if (bhnd_core_descs[i].device != device) continue; return (&bhnd_core_descs[i]); } return (NULL); } /** * Return a human-readable name for a BHND core. * - * @param vendor The core designer's JEDEC-106 Manufacturer ID + * @param vendor The core designer's JEDEC-106 Manufacturer ID. * @param device The core identifier. */ const char * bhnd_find_core_name(uint16_t vendor, uint16_t device) { const struct bhnd_core_desc *desc; if ((desc = bhnd_find_core_desc(vendor, device)) == NULL) return ("unknown"); return desc->desc; } /** * Return the device class for a BHND core. * - * @param vendor The core designer's JEDEC-106 Manufacturer ID + * @param vendor The core designer's JEDEC-106 Manufacturer ID. * @param device The core identifier. */ bhnd_devclass_t bhnd_find_core_class(uint16_t vendor, uint16_t device) { const struct bhnd_core_desc *desc; if ((desc = bhnd_find_core_desc(vendor, device)) == NULL) return (BHND_DEVCLASS_OTHER); return desc->class; } /** * Return a human-readable name for a BHND core. * * @param ci The core's info record. */ const char * bhnd_core_name(const struct bhnd_core_info *ci) { return bhnd_find_core_name(ci->vendor, ci->device); } /** * Return the device class for a BHND core. * * @param ci The core's info record. */ bhnd_devclass_t bhnd_core_class(const struct bhnd_core_info *ci) { return bhnd_find_core_class(ci->vendor, ci->device); } /** * Write a human readable name representation of the given * BHND_CHIPID_* constant to @p buffer. * * @param buffer Output buffer, or NULL to compute the required size. * @param size Capacity of @p buffer, in bytes. * @param chip_id Chip ID to be formatted. * - * @return Returns the required number of bytes on success, or a negative - * integer on failure. No more than @p size-1 characters be written, with - * the @p size'th set to '\0'. + * @return The required number of bytes on success, or a negative integer on + * failure. No more than @p size-1 characters be written, with the @p size'th + * set to '\0'. * * @sa BHND_CHIPID_MAX_NAMELEN */ int bhnd_format_chip_id(char *buffer, size_t size, uint16_t chip_id) { /* All hex formatted IDs are within the range of 0x4000-0x9C3F (40000-1) */ if (chip_id >= 0x4000 && chip_id <= 0x9C3F) return (snprintf(buffer, size, "BCM%hX", chip_id)); else return (snprintf(buffer, size, "BCM%hu", chip_id)); } /** - * Initialize a core info record with data from from a bhnd-attached @p dev. + * Return a core info record populated from a bhnd-attached @p dev. * * @param dev A bhnd device. - * @param core The record to be initialized. + * + * @return A core info record for @p dev. */ struct bhnd_core_info bhnd_get_core_info(device_t dev) { return (struct bhnd_core_info) { .vendor = bhnd_get_vendor(dev), .device = bhnd_get_device(dev), .hwrev = bhnd_get_hwrev(dev), .core_idx = bhnd_get_core_index(dev), .unit = bhnd_get_core_unit(dev) }; } /** * Find a @p class child device with @p unit on @p bus. * * @param bus The bhnd-compatible bus to be searched. * @param class The device class to match on. * @param unit The core unit number; specify -1 to return the first match * regardless of unit number. * * @retval device_t if a matching child device is found. * @retval NULL if no matching child device is found. */ device_t bhnd_bus_find_child(device_t bus, bhnd_devclass_t class, int unit) { struct bhnd_core_match md = { BHND_MATCH_CORE_CLASS(class), BHND_MATCH_CORE_UNIT(unit) }; if (unit == -1) md.m.match.core_unit = 0; return bhnd_bus_match_child(bus, &md); } /** * Find the first child device on @p bus that matches @p desc. * * @param bus The bhnd-compatible bus to be searched. * @param desc A match descriptor. * * @retval device_t if a matching child device is found. * @retval NULL if no matching child device is found. */ device_t bhnd_bus_match_child(device_t bus, const struct bhnd_core_match *desc) { device_t *devlistp; device_t match; int devcnt; int error; error = device_get_children(bus, &devlistp, &devcnt); if (error != 0) return (NULL); match = NULL; for (int i = 0; i < devcnt; i++) { struct bhnd_core_info ci = bhnd_get_core_info(devlistp[i]); if (bhnd_core_matches(&ci, desc)) { match = devlistp[i]; goto done; } } done: free(devlistp, M_TEMP); return match; } /** * Retrieve an ordered list of all device instances currently connected to * @p bus, returning a pointer to the array in @p devlistp and the count * in @p ndevs. * * The memory allocated for the table must be freed via * bhnd_bus_free_children(). * * @param bus The bhnd-compatible bus to be queried. * @param[out] devlist The array of devices. * @param[out] devcount The number of devices in @p devlistp * @param order The order in which devices will be returned * in @p devlist. * * @retval 0 success * @retval non-zero if an error occurs, a regular unix error code will * be returned. */ int bhnd_bus_get_children(device_t bus, device_t **devlist, int *devcount, bhnd_device_order order) { int error; /* Fetch device array */ if ((error = device_get_children(bus, devlist, devcount))) return (error); /* Perform requested sorting */ if ((error = bhnd_sort_devices(*devlist, *devcount, order))) { bhnd_bus_free_children(*devlist); return (error); } return (0); } /** * Free any memory allocated in a previous call to bhnd_bus_get_children(). * * @param devlist The device array returned by bhnd_bus_get_children(). */ void bhnd_bus_free_children(device_t *devlist) { free(devlist, M_TEMP); } /** * Perform in-place sorting of an array of bhnd device instances. * * @param devlist An array of bhnd devices. * @param devcount The number of devices in @p devs. * @param order The sort order to be used. + * + * @retval 0 success + * @retval EINVAL if the sort order is unknown. */ int bhnd_sort_devices(device_t *devlist, size_t devcount, bhnd_device_order order) { int (*compare)(const void *, const void *); switch (order) { case BHND_DEVICE_ORDER_ATTACH: compare = compare_ascending_probe_order; break; case BHND_DEVICE_ORDER_DETACH: compare = compare_descending_probe_order; break; default: printf("unknown sort order: %d\n", order); return (EINVAL); } qsort(devlist, devcount, sizeof(*devlist), compare); return (0); } /* * Ascending comparison of bhnd device's probe order. */ static int compare_ascending_probe_order(const void *lhs, const void *rhs) { device_t ldev, rdev; int lorder, rorder; ldev = (*(const device_t *) lhs); rdev = (*(const device_t *) rhs); lorder = BHND_BUS_GET_PROBE_ORDER(device_get_parent(ldev), ldev); rorder = BHND_BUS_GET_PROBE_ORDER(device_get_parent(rdev), rdev); if (lorder < rorder) { return (-1); } else if (lorder > rorder) { return (1); } else { return (0); } } /* * Descending comparison of bhnd device's probe order. */ static int compare_descending_probe_order(const void *lhs, const void *rhs) { return (compare_ascending_probe_order(rhs, lhs)); } /** * Call device_probe_and_attach() for each of the bhnd bus device's * children, in bhnd attach order. * * @param bus The bhnd-compatible bus for which all children should be probed * and attached. */ int bhnd_bus_probe_children(device_t bus) { device_t *devs; int ndevs; int error; /* Fetch children in attach order */ error = bhnd_bus_get_children(bus, &devs, &ndevs, BHND_DEVICE_ORDER_ATTACH); if (error) return (error); /* Probe and attach all children */ for (int i = 0; i < ndevs; i++) { device_t child = devs[i]; device_probe_and_attach(child); } bhnd_bus_free_children(devs); return (0); } /** * Walk up the bhnd device hierarchy to locate the root device * to which the bhndb bridge is attached. * * This can be used from within bhnd host bridge drivers to locate the * actual upstream host device. * * @param dev A bhnd device. * @param bus_class The expected bus (e.g. "pci") to which the bridge root * should be attached. * * @retval device_t if a matching parent device is found. - * @retval NULL @p dev is not attached via a bhndb bus - * @retval NULL no parent device is attached via @p bus_class. + * @retval NULL if @p dev is not attached via a bhndb bus. + * @retval NULL if no parent device is attached via @p bus_class. */ device_t bhnd_find_bridge_root(device_t dev, devclass_t bus_class) { devclass_t bhndb_class; device_t parent; KASSERT(device_get_devclass(device_get_parent(dev)) == bhnd_devclass, ("%s not a bhnd device", device_get_nameunit(dev))); bhndb_class = devclass_find("bhndb"); /* Walk the device tree until we hit a bridge */ parent = dev; while ((parent = device_get_parent(parent)) != NULL) { if (device_get_devclass(parent) == bhndb_class) break; } /* No bridge? */ if (parent == NULL) return (NULL); /* Search for a parent attached to the expected bus class */ while ((parent = device_get_parent(parent)) != NULL) { device_t bus; bus = device_get_parent(parent); if (bus != NULL && device_get_devclass(bus) == bus_class) return (parent); } /* Not found */ return (NULL); } /** * Find the first core in @p cores that matches @p desc. * * @param cores The table to search. * @param num_cores The length of @p cores. * @param desc A match descriptor. * * @retval bhnd_core_info if a matching core is found. * @retval NULL if no matching core is found. */ const struct bhnd_core_info * bhnd_match_core(const struct bhnd_core_info *cores, u_int num_cores, const struct bhnd_core_match *desc) { for (u_int i = 0; i < num_cores; i++) { if (bhnd_core_matches(&cores[i], desc)) return &cores[i]; } return (NULL); } /** * Find the first core in @p cores with the given @p class. * * @param cores The table to search. * @param num_cores The length of @p cores. - * @param desc A match descriptor. + * @param class The device class to match on. * - * @retval bhnd_core_info if a matching core is found. + * @retval non-NULL if a matching core is found. * @retval NULL if no matching core is found. */ const struct bhnd_core_info * bhnd_find_core(const struct bhnd_core_info *cores, u_int num_cores, bhnd_devclass_t class) { struct bhnd_core_match md = { BHND_MATCH_CORE_CLASS(class) }; return bhnd_match_core(cores, num_cores, &md); } /** * Create an equality match descriptor for @p core. * * @param core The core info to be matched on. - * @param desc On return, will be populated with a match descriptor for @p core. + * + * @return an equality match descriptor for @p core. */ struct bhnd_core_match bhnd_core_get_match_desc(const struct bhnd_core_info *core) { return ((struct bhnd_core_match) { BHND_MATCH_CORE_VENDOR(core->vendor), BHND_MATCH_CORE_ID(core->device), BHND_MATCH_CORE_REV(HWREV_EQ(core->hwrev)), BHND_MATCH_CORE_CLASS(bhnd_core_class(core)), BHND_MATCH_CORE_IDX(core->core_idx), BHND_MATCH_CORE_UNIT(core->unit) }); } /** - * Return true if the @p lhs is equal to @p rhs + * Return true if the @p lhs is equal to @p rhs. * * @param lhs The first bhnd core descriptor to compare. * @param rhs The second bhnd core descriptor to compare. * * @retval true if @p lhs is equal to @p rhs * @retval false if @p lhs is not equal to @p rhs */ bool bhnd_cores_equal(const struct bhnd_core_info *lhs, const struct bhnd_core_info *rhs) { struct bhnd_core_match md; /* Use an equality match descriptor to perform the comparison */ md = bhnd_core_get_match_desc(rhs); return (bhnd_core_matches(lhs, &md)); } /** * Return true if the @p core matches @p desc. * * @param core A bhnd core descriptor. * @param desc A match descriptor to compare against @p core. * - * @retval true if @p core matches @p match + * @retval true if @p core matches @p match. * @retval false if @p core does not match @p match. */ bool bhnd_core_matches(const struct bhnd_core_info *core, const struct bhnd_core_match *desc) { if (desc->m.match.core_vendor && desc->core_vendor != core->vendor) return (false); if (desc->m.match.core_id && desc->core_id != core->device) return (false); if (desc->m.match.core_unit && desc->core_unit != core->unit) return (false); if (desc->m.match.core_rev && !bhnd_hwrev_matches(core->hwrev, &desc->core_rev)) return (false); if (desc->m.match.core_idx && desc->core_idx != core->core_idx) return (false); if (desc->m.match.core_class && desc->core_class != bhnd_core_class(core)) return (false); return true; } /** * Return true if the @p chip matches @p desc. * * @param chip A bhnd chip identifier. * @param desc A match descriptor to compare against @p chip. * - * @retval true if @p chip matches @p match + * @retval true if @p chip matches @p match. * @retval false if @p chip does not match @p match. */ bool bhnd_chip_matches(const struct bhnd_chipid *chip, const struct bhnd_chip_match *desc) { if (desc->m.match.chip_id && chip->chip_id != desc->chip_id) return (false); if (desc->m.match.chip_pkg && chip->chip_pkg != desc->chip_pkg) return (false); if (desc->m.match.chip_rev && !bhnd_hwrev_matches(chip->chip_rev, &desc->chip_rev)) return (false); if (desc->m.match.chip_type && chip->chip_type != desc->chip_type) return (false); return (true); } /** * Return true if the @p board matches @p desc. * * @param board The bhnd board info. * @param desc A match descriptor to compare against @p board. * - * @retval true if @p chip matches @p match + * @retval true if @p chip matches @p match. * @retval false if @p chip does not match @p match. */ bool bhnd_board_matches(const struct bhnd_board_info *board, const struct bhnd_board_match *desc) { if (desc->m.match.board_srom_rev && !bhnd_hwrev_matches(board->board_srom_rev, &desc->board_srom_rev)) return (false); if (desc->m.match.board_vendor && board->board_vendor != desc->board_vendor) return (false); if (desc->m.match.board_type && board->board_type != desc->board_type) return (false); if (desc->m.match.board_rev && !bhnd_hwrev_matches(board->board_rev, &desc->board_rev)) return (false); return (true); } /** * Return true if the @p hwrev matches @p desc. * * @param hwrev A bhnd hardware revision. * @param desc A match descriptor to compare against @p core. * - * @retval true if @p hwrev matches @p match + * @retval true if @p hwrev matches @p match. * @retval false if @p hwrev does not match @p match. */ bool bhnd_hwrev_matches(uint16_t hwrev, const struct bhnd_hwrev_match *desc) { if (desc->start != BHND_HWREV_INVALID && desc->start > hwrev) return false; if (desc->end != BHND_HWREV_INVALID && desc->end < hwrev) return false; return true; } /** * Return true if the @p dev matches @p desc. * * @param dev A bhnd device. * @param desc A match descriptor to compare against @p dev. * - * @retval true if @p dev matches @p match + * @retval true if @p dev matches @p match. * @retval false if @p dev does not match @p match. */ bool bhnd_device_matches(device_t dev, const struct bhnd_device_match *desc) { struct bhnd_core_info core; const struct bhnd_chipid *chip; struct bhnd_board_info board; device_t parent; int error; /* Construct individual match descriptors */ struct bhnd_core_match m_core = { _BHND_CORE_MATCH_COPY(desc) }; struct bhnd_chip_match m_chip = { _BHND_CHIP_MATCH_COPY(desc) }; struct bhnd_board_match m_board = { _BHND_BOARD_MATCH_COPY(desc) }; /* Fetch and match core info */ if (m_core.m.match_flags) { /* Only applicable to bhnd-attached cores */ parent = device_get_parent(dev); if (device_get_devclass(parent) != bhnd_devclass) { device_printf(dev, "attempting to match core " "attributes against non-core device\n"); return (false); } core = bhnd_get_core_info(dev); if (!bhnd_core_matches(&core, &m_core)) return (false); } /* Fetch and match chip info */ if (m_chip.m.match_flags) { chip = bhnd_get_chipid(dev); if (!bhnd_chip_matches(chip, &m_chip)) return (false); } /* Fetch and match board info. * * This is not available until after NVRAM is up; earlier device * matches should not include board requirements */ if (m_board.m.match_flags) { if ((error = bhnd_read_board_info(dev, &board))) { device_printf(dev, "failed to read required board info " "during device matching: %d\n", error); return (false); } if (!bhnd_board_matches(&board, &m_board)) return (false); } /* All matched */ return (true); } /** * Search @p table for an entry matching @p dev. * * @param dev A bhnd device to match against @p table. * @param table The device table to search. * @param entry_size The @p table entry size, in bytes. * - * @retval bhnd_device the first matching device, if any. + * @retval non-NULL the first matching device, if any. * @retval NULL if no matching device is found in @p table. */ const struct bhnd_device * bhnd_device_lookup(device_t dev, const struct bhnd_device *table, size_t entry_size) { const struct bhnd_device *entry; device_t hostb, parent; bhnd_attach_type attach_type; uint32_t dflags; parent = device_get_parent(dev); hostb = bhnd_bus_find_hostb_device(parent); attach_type = bhnd_get_attach_type(dev); for (entry = table; !BHND_DEVICE_IS_END(entry); entry = (const struct bhnd_device *) ((const char *) entry + entry_size)) { /* match core info */ if (!bhnd_device_matches(dev, &entry->core)) continue; /* match device flags */ dflags = entry->device_flags; /* hostb implies BHND_ATTACH_ADAPTER requirement */ if (dflags & BHND_DF_HOSTB) dflags |= BHND_DF_ADAPTER; if (dflags & BHND_DF_ADAPTER) if (attach_type != BHND_ATTACH_ADAPTER) continue; if (dflags & BHND_DF_HOSTB) if (dev != hostb) continue; if (dflags & BHND_DF_SOC) if (attach_type != BHND_ATTACH_NATIVE) continue; /* device found */ return (entry); } /* not found */ return (NULL); } /** * Scan the device @p table for all quirk flags applicable to @p dev. * * @param dev A bhnd device to match against @p table. * @param table The device table to search. + * @param entry_size The @p table entry size, in bytes. * - * @return returns all matching quirk flags. + * @return all matching quirk flags. */ uint32_t bhnd_device_quirks(device_t dev, const struct bhnd_device *table, size_t entry_size) { const struct bhnd_device *dent; const struct bhnd_device_quirk *qent, *qtable; uint32_t quirks; /* Locate the device entry */ if ((dent = bhnd_device_lookup(dev, table, entry_size)) == NULL) return (0); /* Quirks table is optional */ qtable = dent->quirks_table; if (qtable == NULL) return (0); /* Collect matching device quirk entries */ quirks = 0; for (qent = qtable; !BHND_DEVICE_QUIRK_IS_END(qent); qent++) { if (bhnd_device_matches(dev, &qent->desc)) quirks |= qent->quirks; } return (quirks); } /** * Allocate bhnd(4) resources defined in @p rs from a parent bus. * * @param dev The device requesting ownership of the resources. * @param rs A standard bus resource specification. This will be updated * with the allocated resource's RIDs. * @param res On success, the allocated bhnd resources. * * @retval 0 success * @retval non-zero if allocation of any non-RF_OPTIONAL resource fails, * all allocated resources will be released and a regular * unix error code will be returned. */ int bhnd_alloc_resources(device_t dev, struct resource_spec *rs, struct bhnd_resource **res) { /* Initialize output array */ for (u_int i = 0; rs[i].type != -1; i++) res[i] = NULL; for (u_int i = 0; rs[i].type != -1; i++) { res[i] = bhnd_alloc_resource_any(dev, rs[i].type, &rs[i].rid, rs[i].flags); /* Clean up all allocations on failure */ if (res[i] == NULL && !(rs[i].flags & RF_OPTIONAL)) { bhnd_release_resources(dev, rs, res); return (ENXIO); } } return (0); } /** * Release bhnd(4) resources defined in @p rs from a parent bus. * * @param dev The device that owns the resources. * @param rs A standard bus resource specification previously initialized * by @p bhnd_alloc_resources. * @param res The bhnd resources to be released. */ void bhnd_release_resources(device_t dev, const struct resource_spec *rs, struct bhnd_resource **res) { for (u_int i = 0; rs[i].type != -1; i++) { if (res[i] == NULL) continue; bhnd_release_resource(dev, rs[i].type, rs[i].rid, res[i]); res[i] = NULL; } } /** * Parse the CHIPC_ID_* fields from the ChipCommon CHIPC_ID * register, returning its bhnd_chipid representation. * * @param idreg The CHIPC_ID register value. * @param enum_addr The enumeration address to include in the result. * * @warning * On early siba(4) devices, the ChipCommon core does not provide * a valid CHIPC_ID_NUMCORE field. On these ChipCommon revisions * (see CHIPC_NCORES_MIN_HWREV()), this function will parse and return * an invalid `ncores` value. */ struct bhnd_chipid bhnd_parse_chipid(uint32_t idreg, bhnd_addr_t enum_addr) { struct bhnd_chipid result; /* Fetch the basic chip info */ result.chip_id = CHIPC_GET_BITS(idreg, CHIPC_ID_CHIP); result.chip_pkg = CHIPC_GET_BITS(idreg, CHIPC_ID_PKG); result.chip_rev = CHIPC_GET_BITS(idreg, CHIPC_ID_REV); result.chip_type = CHIPC_GET_BITS(idreg, CHIPC_ID_BUS); result.ncores = CHIPC_GET_BITS(idreg, CHIPC_ID_NUMCORE); result.enum_addr = enum_addr; return (result); } /** * Determine the correct core count for a chip identification value that * may contain an invalid core count. * * On some early siba(4) devices (see CHIPC_NCORES_MIN_HWREV()), the ChipCommon * core does not provide a valid CHIPC_ID_NUMCORE field. * * @param cid The chip identification to be queried. * @param chipc_hwrev The hardware revision of the ChipCommon core from which * @p cid was parsed. * @param[out] ncores On success, will be set to the correct core count. * * @retval 0 If the core count is already correct, or was mapped to a * a correct value. * @retval EINVAL If the core count is incorrect, but the chip was not * recognized. */ int bhnd_chipid_fixed_ncores(const struct bhnd_chipid *cid, uint16_t chipc_hwrev, uint8_t *ncores) { /* bcma(4), and most siba(4) devices */ if (CHIPC_NCORES_MIN_HWREV(chipc_hwrev)) { *ncores = cid->ncores; return (0); } /* broken siba(4) chipsets */ switch (cid->chip_id) { case BHND_CHIPID_BCM4306: *ncores = 6; break; case BHND_CHIPID_BCM4704: *ncores = 9; break; case BHND_CHIPID_BCM5365: /* * BCM5365 does support ID_NUMCORE in at least * some of its revisions, but for unknown * reasons, Broadcom's drivers always exclude * the ChipCommon revision (0x5) used by BCM5365 * from the set of revisions supporting * ID_NUMCORE, and instead supply a fixed value. * * Presumably, at least some of these devices * shipped with a broken ID_NUMCORE value. */ *ncores = 7; break; default: return (EINVAL); } return (0); } /** * Allocate the resource defined by @p rs via @p dev, use it * to read the ChipCommon ID register relative to @p chipc_offset, * then release the resource. * * @param dev The device owning @p rs. * @param rs A resource spec that encompasses the ChipCommon register block. * @param chipc_offset The offset of the ChipCommon registers within @p rs. - * @param[out] result the chip identification data. + * @param[out] result The chip identification data. * * @retval 0 success * @retval non-zero if the ChipCommon identification data could not be read. */ int bhnd_read_chipid(device_t dev, struct resource_spec *rs, bus_size_t chipc_offset, struct bhnd_chipid *result) { struct resource *res; bhnd_addr_t enum_addr; uint32_t reg; uint8_t chip_type; int error, rid, rtype; rid = rs->rid; rtype = rs->type; error = 0; /* Allocate the ChipCommon window resource and fetch the chipid data */ res = bus_alloc_resource_any(dev, rtype, &rid, RF_ACTIVE); if (res == NULL) { device_printf(dev, "failed to allocate bhnd chipc resource\n"); return (ENXIO); } /* Fetch the basic chip info */ reg = bus_read_4(res, chipc_offset + CHIPC_ID); chip_type = CHIPC_GET_BITS(reg, CHIPC_ID_BUS); /* Fetch the EROMPTR */ if (BHND_CHIPTYPE_HAS_EROM(chip_type)) { enum_addr = bus_read_4(res, chipc_offset + CHIPC_EROMPTR); } else if (chip_type == BHND_CHIPTYPE_SIBA) { /* siba(4) uses the ChipCommon base address as the enumeration * address */ enum_addr = BHND_DEFAULT_CHIPC_ADDR; } else { device_printf(dev, "unknown chip type %hhu\n", chip_type); error = ENODEV; goto cleanup; } *result = bhnd_parse_chipid(reg, enum_addr); /* Fix the core count on early siba(4) devices */ if (chip_type == BHND_CHIPTYPE_SIBA) { uint32_t idh; uint16_t chipc_hwrev; /* * We need the ChipCommon revision to determine whether * the ncore field is valid. * * We can safely assume the siba IDHIGH register is mapped * within the chipc register block. */ idh = bus_read_4(res, SB0_REG_ABS(SIBA_CFG0_IDHIGH)); chipc_hwrev = SIBA_IDH_CORE_REV(idh); error = bhnd_chipid_fixed_ncores(result, chipc_hwrev, &result->ncores); if (error) goto cleanup; } cleanup: /* Clean up */ bus_release_resource(dev, rtype, rid, res); return (error); } /** * Allocate and return a new per-core PMU clock control/status (clkctl) * instance for @p dev. * * @param dev The bhnd(4) core device mapped by @p r. * @param pmu_dev The bhnd(4) PMU device, implmenting the bhnd_pmu_if * interface. The caller is responsible for ensuring that * this reference remains valid for the lifetime of the * returned clkctl instance. * @param r A resource mapping the core's clock control register * (see BHND_CLK_CTL_ST). The caller is responsible for * ensuring that this resource remains valid for the * lifetime of the returned clkctl instance. * @param offset The offset to the clock control register within @p r. * @param max_latency The PMU's maximum state transition latency in * microseconds; this upper bound will be used to busy-wait * on PMU state transitions. * * @retval non-NULL success * @retval NULL if allocation fails. * */ struct bhnd_core_clkctl * bhnd_alloc_core_clkctl(device_t dev, device_t pmu_dev, struct bhnd_resource *r, bus_size_t offset, u_int max_latency) { struct bhnd_core_clkctl *clkctl; clkctl = malloc(sizeof(*clkctl), M_BHND, M_ZERO | M_NOWAIT); if (clkctl == NULL) return (NULL); clkctl->cc_dev = dev; clkctl->cc_pmu_dev = pmu_dev; clkctl->cc_res = r; clkctl->cc_res_offset = offset; clkctl->cc_max_latency = max_latency; clkctl->cc_quirks = bhnd_device_quirks(dev, bhnd_clkctl_devices, sizeof(bhnd_clkctl_devices[0])); BHND_CLKCTL_LOCK_INIT(clkctl); return (clkctl); } /** * Free a clkctl instance previously allocated via bhnd_alloc_core_clkctl(). * * @param clkctl The clkctl instance to be freed. */ void bhnd_free_core_clkctl(struct bhnd_core_clkctl *clkctl) { BHND_CLKCTL_LOCK_DESTROY(clkctl); free(clkctl, M_BHND); } /** * Wait for the per-core clock status to be equal to @p value after * applying @p mask, timing out after the maximum transition latency is reached. * * @param clkctl Per-core clkctl state to be queryied. * @param value Value to wait for. * @param mask Mask to apply prior to value comparison. * * @retval 0 success * @retval ETIMEDOUT if the PMU's maximum transition delay is reached before * the clock status matches @p value and @p mask. */ int bhnd_core_clkctl_wait(struct bhnd_core_clkctl *clkctl, uint32_t value, uint32_t mask) { uint32_t clkst; BHND_CLKCTL_LOCK_ASSERT(clkctl, MA_OWNED); /* Bitswapped HTAVAIL/ALPAVAIL work-around */ if (clkctl->cc_quirks & BHND_CLKCTL_QUIRK_CCS0) { uint32_t fmask, fval; fmask = mask & ~(BHND_CCS_HTAVAIL | BHND_CCS_ALPAVAIL); fval = value & ~(BHND_CCS_HTAVAIL | BHND_CCS_ALPAVAIL); if (mask & BHND_CCS_HTAVAIL) fmask |= BHND_CCS0_HTAVAIL; if (value & BHND_CCS_HTAVAIL) fval |= BHND_CCS0_HTAVAIL; if (mask & BHND_CCS_ALPAVAIL) fmask |= BHND_CCS0_ALPAVAIL; if (value & BHND_CCS_ALPAVAIL) fval |= BHND_CCS0_ALPAVAIL; mask = fmask; value = fval; } for (u_int i = 0; i < clkctl->cc_max_latency; i += 10) { clkst = bhnd_bus_read_4(clkctl->cc_res, clkctl->cc_res_offset); if ((clkst & mask) == (value & mask)) return (0); DELAY(10); } device_printf(clkctl->cc_dev, "clkst wait timeout (value=%#x, " "mask=%#x)\n", value, mask); return (ETIMEDOUT); } /** * Read an NVRAM variable's NUL-terminated string value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] buf A buffer large enough to hold @p len bytes. On * success, the NUL-terminated string value will be * written to this buffer. This argment may be NULL if * the value is not desired. * @param len The maximum capacity of @p buf. * @param[out] rlen On success, will be set to the actual size of * the requested value (including NUL termination). This * argment may be NULL if the size is not desired. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval ENOMEM If @p buf is non-NULL and a buffer of @p len is too * small to hold the requested value. * @retval EFTYPE If the variable data cannot be coerced to a valid * string representation. * @retval ERANGE If value coercion would overflow @p type. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_str(device_t dev, const char *name, char *buf, size_t len, size_t *rlen) { size_t larg; int error; larg = len; error = bhnd_nvram_getvar(dev, name, buf, &larg, BHND_NVRAM_TYPE_STRING); if (rlen != NULL) *rlen = larg; return (error); } /** * Read an NVRAM variable's unsigned integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * @param width The output integer type width (1, 2, or * 4 bytes). * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid unsigned integer representation. * @retval ERANGE If value coercion would overflow (or underflow) an * unsigned representation of the given @p width. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_uint(device_t dev, const char *name, void *value, int width) { bhnd_nvram_type type; size_t len; switch (width) { case 1: type = BHND_NVRAM_TYPE_UINT8; break; case 2: type = BHND_NVRAM_TYPE_UINT16; break; case 4: type = BHND_NVRAM_TYPE_UINT32; break; default: device_printf(dev, "unsupported NVRAM integer width: %d\n", width); return (EINVAL); } len = width; return (bhnd_nvram_getvar(dev, name, value, &len, type)); } /** * Read an NVRAM variable's unsigned 8-bit integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid unsigned integer representation. * @retval ERANGE If value coercion would overflow (or underflow) uint8_t. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_uint8(device_t dev, const char *name, uint8_t *value) { return (bhnd_nvram_getvar_uint(dev, name, value, sizeof(*value))); } /** * Read an NVRAM variable's unsigned 16-bit integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid unsigned integer representation. * @retval ERANGE If value coercion would overflow (or underflow) * uint16_t. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_uint16(device_t dev, const char *name, uint16_t *value) { return (bhnd_nvram_getvar_uint(dev, name, value, sizeof(*value))); } /** * Read an NVRAM variable's unsigned 32-bit integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid unsigned integer representation. * @retval ERANGE If value coercion would overflow (or underflow) * uint32_t. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_uint32(device_t dev, const char *name, uint32_t *value) { return (bhnd_nvram_getvar_uint(dev, name, value, sizeof(*value))); } /** * Read an NVRAM variable's signed integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * @param width The output integer type width (1, 2, or * 4 bytes). * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid integer representation. * @retval ERANGE If value coercion would overflow (or underflow) an * signed representation of the given @p width. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_int(device_t dev, const char *name, void *value, int width) { bhnd_nvram_type type; size_t len; switch (width) { case 1: type = BHND_NVRAM_TYPE_INT8; break; case 2: type = BHND_NVRAM_TYPE_INT16; break; case 4: type = BHND_NVRAM_TYPE_INT32; break; default: device_printf(dev, "unsupported NVRAM integer width: %d\n", width); return (EINVAL); } len = width; return (bhnd_nvram_getvar(dev, name, value, &len, type)); } /** * Read an NVRAM variable's signed 8-bit integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid integer representation. * @retval ERANGE If value coercion would overflow (or underflow) int8_t. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_int8(device_t dev, const char *name, int8_t *value) { return (bhnd_nvram_getvar_int(dev, name, value, sizeof(*value))); } /** * Read an NVRAM variable's signed 16-bit integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid integer representation. * @retval ERANGE If value coercion would overflow (or underflow) * int16_t. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_int16(device_t dev, const char *name, int16_t *value) { return (bhnd_nvram_getvar_int(dev, name, value, sizeof(*value))); } /** * Read an NVRAM variable's signed 32-bit integer value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] value On success, the requested value will be written * to this pointer. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval EFTYPE If the variable data cannot be coerced to a * a valid integer representation. * @retval ERANGE If value coercion would overflow (or underflow) * int32_t. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_int32(device_t dev, const char *name, int32_t *value) { return (bhnd_nvram_getvar_int(dev, name, value, sizeof(*value))); } /** * Read an NVRAM variable's array value. * * @param dev A bhnd bus child device. * @param name The NVRAM variable name. * @param[out] buf A buffer large enough to hold @p size bytes. * On success, the requested value will be written * to this buffer. * @param[in,out] size The required number of bytes to write to * @p buf. * @param type The desired array element data representation. * * @retval 0 success * @retval ENOENT The requested variable was not found. * @retval ENODEV No valid NVRAM source could be found. * @retval ENXIO If less than @p size bytes are available. * @retval ENOMEM If a buffer of @p size is too small to hold the * requested value. * @retval EFTYPE If the variable data cannot be coerced to a * a valid instance of @p type. * @retval ERANGE If value coercion would overflow (or underflow) a * representation of @p type. * @retval non-zero If reading @p name otherwise fails, a regular unix * error code will be returned. */ int bhnd_nvram_getvar_array(device_t dev, const char *name, void *buf, size_t size, bhnd_nvram_type type) { size_t nbytes; int error; /* Attempt read */ nbytes = size; if ((error = bhnd_nvram_getvar(dev, name, buf, &nbytes, type))) return (error); /* Verify that the expected number of bytes were fetched */ if (nbytes < size) return (ENXIO); return (0); } /** * Initialize a service provider registry. * * @param bsr The service registry to initialize. * * @retval 0 success * @retval non-zero if an error occurs initializing the service registry, * a regular unix error code will be returned. */ int bhnd_service_registry_init(struct bhnd_service_registry *bsr) { STAILQ_INIT(&bsr->entries); mtx_init(&bsr->lock, "bhnd_service_registry lock", NULL, MTX_DEF); return (0); } /** * Release all resources held by @p bsr. * * @param bsr A service registry instance previously successfully * initialized via bhnd_service_registry_init(). * * @retval 0 success * @retval EBUSY if active references to service providers registered * with @p bsr exist. */ int bhnd_service_registry_fini(struct bhnd_service_registry *bsr) { struct bhnd_service_entry *entry, *enext; /* Remove everthing we can */ mtx_lock(&bsr->lock); STAILQ_FOREACH_SAFE(entry, &bsr->entries, link, enext) { if (entry->refs > 0) continue; STAILQ_REMOVE(&bsr->entries, entry, bhnd_service_entry, link); free(entry, M_BHND); } if (!STAILQ_EMPTY(&bsr->entries)) { mtx_unlock(&bsr->lock); return (EBUSY); } mtx_unlock(&bsr->lock); mtx_destroy(&bsr->lock); return (0); } /** * Register a @p provider for the given @p service. * * @param bsr Service registry to be modified. * @param provider Service provider to register. * @param service Service for which @p provider will be registered. * @param flags Service provider flags (see BHND_SPF_*). * * @retval 0 success * @retval EEXIST if an entry for @p service already exists. * @retval EINVAL if @p service is BHND_SERVICE_ANY. * @retval non-zero if registering @p provider otherwise fails, a regular * unix error code will be returned. */ int bhnd_service_registry_add(struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service, uint32_t flags) { struct bhnd_service_entry *entry; if (service == BHND_SERVICE_ANY) return (EINVAL); mtx_lock(&bsr->lock); /* Is a service provider already registered? */ STAILQ_FOREACH(entry, &bsr->entries, link) { if (entry->service == service) { mtx_unlock(&bsr->lock); return (EEXIST); } } /* Initialize and insert our new entry */ entry = malloc(sizeof(*entry), M_BHND, M_NOWAIT); if (entry == NULL) { mtx_unlock(&bsr->lock); return (ENOMEM); } entry->provider = provider; entry->service = service; entry->flags = flags; refcount_init(&entry->refs, 0); STAILQ_INSERT_HEAD(&bsr->entries, entry, link); mtx_unlock(&bsr->lock); return (0); } /** * Free an unreferenced registry entry. * * @param entry The entry to be deallocated. */ static void bhnd_service_registry_free_entry(struct bhnd_service_entry *entry) { KASSERT(entry->refs == 0, ("provider has active references")); free(entry, M_BHND); } /** * Attempt to remove the @p service provider registration for @p provider. * * @param bsr The service registry to be modified. * @param provider The service provider to be deregistered. * @param service The service for which @p provider will be deregistered, * or BHND_SERVICE_ANY to remove all service * registrations for @p provider. * * @retval 0 success - * @retval EBUSY if active references to @p provider exist; @see + * @retval EBUSY if active references to @p provider exist; see * bhnd_service_registry_retain() and * bhnd_service_registry_release(). */ int bhnd_service_registry_remove(struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service) { struct bhnd_service_entry *entry, *enext; mtx_lock(&bsr->lock); #define BHND_PROV_MATCH(_e) \ ((_e)->provider == provider && \ (service == BHND_SERVICE_ANY || (_e)->service == service)) /* Validate matching provider entries before making any * modifications */ STAILQ_FOREACH(entry, &bsr->entries, link) { /* Skip non-matching entries */ if (!BHND_PROV_MATCH(entry)) continue; /* Entry is in use? */ if (entry->refs > 0) { mtx_unlock(&bsr->lock); return (EBUSY); } } /* We can now safely remove matching entries */ STAILQ_FOREACH_SAFE(entry, &bsr->entries, link, enext) { /* Skip non-matching entries */ if (!BHND_PROV_MATCH(entry)) continue; /* Remove from list */ STAILQ_REMOVE(&bsr->entries, entry, bhnd_service_entry, link); /* Free provider entry */ bhnd_service_registry_free_entry(entry); } #undef BHND_PROV_MATCH mtx_unlock(&bsr->lock); return (0); } /** * Retain and return a reference to a registered @p service provider, if any. * * @param bsr The service registry to be queried. * @param service The service for which a provider should be returned. * * On success, the caller assumes ownership the returned provider, and * is responsible for releasing this reference via * bhnd_service_registry_release(). * * @retval device_t success * @retval NULL if no provider is registered for @p service. */ device_t bhnd_service_registry_retain(struct bhnd_service_registry *bsr, bhnd_service_t service) { struct bhnd_service_entry *entry; mtx_lock(&bsr->lock); STAILQ_FOREACH(entry, &bsr->entries, link) { if (entry->service != service) continue; /* With a live refcount, entry is gauranteed to remain alive * after we release our lock */ refcount_acquire(&entry->refs); mtx_unlock(&bsr->lock); return (entry->provider); } mtx_unlock(&bsr->lock); /* Not found */ return (NULL); } /** * Release a reference to a service provider previously returned by * bhnd_service_registry_retain(). * * If this is the last reference to an inherited service provider registration - * (@see BHND_SPF_INHERITED), the registration will also be removed, and + * (see BHND_SPF_INHERITED), the registration will also be removed, and * true will be returned. * * @param bsr The service registry from which @p provider * was returned. * @param provider The provider to be released. * @param service The service for which @p provider was previously * retained. * @retval true The inherited service provider registration was removed; * the caller should release its own reference to the * provider. * @retval false The service provider was not inherited, or active * references to the provider remain. + * + * @see BHND_SPF_INHERITED */ bool bhnd_service_registry_release(struct bhnd_service_registry *bsr, device_t provider, bhnd_service_t service) { struct bhnd_service_entry *entry; /* Exclusive lock, as we need to prevent any new references to the * entry from being taken if it's to be removed */ mtx_lock(&bsr->lock); STAILQ_FOREACH(entry, &bsr->entries, link) { bool removed; if (entry->provider != provider) continue; if (entry->service != service) continue; if (refcount_release(&entry->refs) && (entry->flags & BHND_SPF_INHERITED)) { /* If an inherited entry is no longer actively * referenced, remove the local registration and inform * the caller. */ STAILQ_REMOVE(&bsr->entries, entry, bhnd_service_entry, link); bhnd_service_registry_free_entry(entry); removed = true; } else { removed = false; } mtx_unlock(&bsr->lock); return (removed); } /* Caller owns a reference, but no such provider is registered? */ panic("invalid service provider reference"); } /** * Using the bhnd(4) bus-level core information and a custom core name, * populate @p dev's device description. * * @param dev A bhnd-bus attached device. - * @param dev_name The core's name (e.g. "SDIO Device Core") + * @param dev_name The core's name (e.g. "SDIO Device Core"). */ void bhnd_set_custom_core_desc(device_t dev, const char *dev_name) { const char *vendor_name; char *desc; vendor_name = bhnd_get_vendor_name(dev); asprintf(&desc, M_BHND, "%s %s, rev %hhu", vendor_name, dev_name, bhnd_get_hwrev(dev)); if (desc != NULL) { device_set_desc_copy(dev, desc); free(desc, M_BHND); } else { device_set_desc(dev, dev_name); } } /** * Using the bhnd(4) bus-level core information, populate @p dev's device * description. * * @param dev A bhnd-bus attached device. */ void bhnd_set_default_core_desc(device_t dev) { bhnd_set_custom_core_desc(dev, bhnd_get_device_name(dev)); } /** * Using the bhnd @p chip_id, populate the bhnd(4) bus @p dev's device * description. * * @param dev A bhnd-bus attached device. + * @param chip_id The chip identification. */ void bhnd_set_default_bus_desc(device_t dev, const struct bhnd_chipid *chip_id) { const char *bus_name; char *desc; char chip_name[BHND_CHIPID_MAX_NAMELEN]; /* Determine chip type's bus name */ switch (chip_id->chip_type) { case BHND_CHIPTYPE_SIBA: bus_name = "SIBA bus"; break; case BHND_CHIPTYPE_BCMA: case BHND_CHIPTYPE_BCMA_ALT: bus_name = "BCMA bus"; break; case BHND_CHIPTYPE_UBUS: bus_name = "UBUS bus"; break; default: bus_name = "Unknown Type"; break; } /* Format chip name */ bhnd_format_chip_id(chip_name, sizeof(chip_name), chip_id->chip_id); /* Format and set device description */ asprintf(&desc, M_BHND, "%s %s", chip_name, bus_name); if (desc != NULL) { device_set_desc_copy(dev, desc); free(desc, M_BHND); } else { device_set_desc(dev, bus_name); } } /** * Helper function for implementing BHND_BUS_REGISTER_PROVIDER(). * * This implementation delegates the request to the BHND_BUS_REGISTER_PROVIDER() * method on the parent of @p dev. If no parent exists, the implementation * will return an error. */ int bhnd_bus_generic_register_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service) { device_t parent = device_get_parent(dev); if (parent != NULL) { return (BHND_BUS_REGISTER_PROVIDER(parent, child, provider, service)); } return (ENXIO); } /** * Helper function for implementing BHND_BUS_DEREGISTER_PROVIDER(). * * This implementation delegates the request to the * BHND_BUS_DEREGISTER_PROVIDER() method on the parent of @p dev. If no parent * exists, the implementation will panic. */ int bhnd_bus_generic_deregister_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service) { device_t parent = device_get_parent(dev); if (parent != NULL) { return (BHND_BUS_DEREGISTER_PROVIDER(parent, child, provider, service)); } panic("missing BHND_BUS_DEREGISTER_PROVIDER()"); } /** * Helper function for implementing BHND_BUS_RETAIN_PROVIDER(). * * This implementation delegates the request to the * BHND_BUS_DEREGISTER_PROVIDER() method on the parent of @p dev. If no parent * exists, the implementation will return NULL. */ device_t bhnd_bus_generic_retain_provider(device_t dev, device_t child, bhnd_service_t service) { device_t parent = device_get_parent(dev); if (parent != NULL) { return (BHND_BUS_RETAIN_PROVIDER(parent, child, service)); } return (NULL); } /** * Helper function for implementing BHND_BUS_RELEASE_PROVIDER(). * * This implementation delegates the request to the * BHND_BUS_DEREGISTER_PROVIDER() method on the parent of @p dev. If no parent * exists, the implementation will panic. */ void bhnd_bus_generic_release_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service) { device_t parent = device_get_parent(dev); if (parent != NULL) { return (BHND_BUS_RELEASE_PROVIDER(parent, child, provider, service)); } panic("missing BHND_BUS_RELEASE_PROVIDER()"); } /** * Helper function for implementing BHND_BUS_REGISTER_PROVIDER(). * * This implementation uses the bhnd_service_registry_add() function to * do most of the work. It calls BHND_BUS_GET_SERVICE_REGISTRY() to find * a suitable service registry to edit. */ int bhnd_bus_generic_sr_register_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service) { struct bhnd_service_registry *bsr; bsr = BHND_BUS_GET_SERVICE_REGISTRY(dev, child); KASSERT(bsr != NULL, ("NULL service registry")); return (bhnd_service_registry_add(bsr, provider, service, 0)); } /** * Helper function for implementing BHND_BUS_DEREGISTER_PROVIDER(). * * This implementation uses the bhnd_service_registry_remove() function to * do most of the work. It calls BHND_BUS_GET_SERVICE_REGISTRY() to find * a suitable service registry to edit. */ int bhnd_bus_generic_sr_deregister_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service) { struct bhnd_service_registry *bsr; bsr = BHND_BUS_GET_SERVICE_REGISTRY(dev, child); KASSERT(bsr != NULL, ("NULL service registry")); return (bhnd_service_registry_remove(bsr, provider, service)); } /** * Helper function for implementing BHND_BUS_RETAIN_PROVIDER(). * * This implementation uses the bhnd_service_registry_retain() function to * do most of the work. It calls BHND_BUS_GET_SERVICE_REGISTRY() to find * a suitable service registry. * * If a local provider for the service is not available, and a parent device is * available, this implementation will attempt to fetch and locally register * a service provider reference from the parent of @p dev. */ device_t bhnd_bus_generic_sr_retain_provider(device_t dev, device_t child, bhnd_service_t service) { struct bhnd_service_registry *bsr; device_t parent, provider; int error; bsr = BHND_BUS_GET_SERVICE_REGISTRY(dev, child); KASSERT(bsr != NULL, ("NULL service registry")); /* * Attempt to fetch a service provider reference from either the local * service registry, or if not found, from our parent. * * If we fetch a provider from our parent, we register the provider * with the local service registry to prevent conflicting local * registrations from being added. */ while (1) { /* Check the local service registry first */ provider = bhnd_service_registry_retain(bsr, service); if (provider != NULL) return (provider); /* Otherwise, try to delegate to our parent (if any) */ if ((parent = device_get_parent(dev)) == NULL) return (NULL); provider = BHND_BUS_RETAIN_PROVIDER(parent, dev, service); if (provider == NULL) return (NULL); /* Register the inherited service registration with the local * registry */ error = bhnd_service_registry_add(bsr, provider, service, BHND_SPF_INHERITED); if (error) { BHND_BUS_RELEASE_PROVIDER(parent, dev, provider, service); if (error == EEXIST) { /* A valid service provider was registered * concurrently; retry fetching from the local * registry */ continue; } device_printf(dev, "failed to register service " "provider: %d\n", error); return (NULL); } } } /** * Helper function for implementing BHND_BUS_RELEASE_PROVIDER(). * * This implementation uses the bhnd_service_registry_release() function to * do most of the work. It calls BHND_BUS_GET_SERVICE_REGISTRY() to find * a suitable service registry. */ void bhnd_bus_generic_sr_release_provider(device_t dev, device_t child, device_t provider, bhnd_service_t service) { struct bhnd_service_registry *bsr; bsr = BHND_BUS_GET_SERVICE_REGISTRY(dev, child); KASSERT(bsr != NULL, ("NULL service registry")); /* Release the provider reference; if the refcount hits zero on an * inherited reference, true will be returned, and we need to drop * our own bus reference to the provider */ if (!bhnd_service_registry_release(bsr, provider, service)) return; /* Drop our reference to the borrowed provider */ BHND_BUS_RELEASE_PROVIDER(device_get_parent(dev), dev, provider, service); } /** * Helper function for implementing BHND_BUS_IS_HW_DISABLED(). * * If a parent device is available, this implementation delegates the * request to the BHND_BUS_IS_HW_DISABLED() method on the parent of @p dev. * * If no parent device is available (i.e. on a the bus root), the hardware * is assumed to be usable and false is returned. */ bool bhnd_bus_generic_is_hw_disabled(device_t dev, device_t child) { if (device_get_parent(dev) != NULL) return (BHND_BUS_IS_HW_DISABLED(device_get_parent(dev), child)); return (false); } /** * Helper function for implementing BHND_BUS_GET_CHIPID(). * * This implementation delegates the request to the BHND_BUS_GET_CHIPID() * method on the parent of @p dev. If no parent exists, the implementation * will panic. */ const struct bhnd_chipid * bhnd_bus_generic_get_chipid(device_t dev, device_t child) { if (device_get_parent(dev) != NULL) return (BHND_BUS_GET_CHIPID(device_get_parent(dev), child)); panic("missing BHND_BUS_GET_CHIPID()"); } /** * Helper function for implementing BHND_BUS_GET_DMA_TRANSLATION(). * * If a parent device is available, this implementation delegates the * request to the BHND_BUS_GET_DMA_TRANSLATION() method on the parent of @p dev. * * If no parent device is available, this implementation will panic. */ int bhnd_bus_generic_get_dma_translation(device_t dev, device_t child, u_int width, uint32_t flags, bus_dma_tag_t *dmat, struct bhnd_dma_translation *translation) { if (device_get_parent(dev) != NULL) { return (BHND_BUS_GET_DMA_TRANSLATION(device_get_parent(dev), child, width, flags, dmat, translation)); } panic("missing BHND_BUS_GET_DMA_TRANSLATION()"); } /* nvram board_info population macros for bhnd_bus_generic_read_board_info() */ #define BHND_GV(_dest, _name) \ bhnd_nvram_getvar_uint(child, BHND_NVAR_ ## _name, &_dest, \ sizeof(_dest)) #define REQ_BHND_GV(_dest, _name) do { \ if ((error = BHND_GV(_dest, _name))) { \ device_printf(dev, \ "error reading " __STRING(_name) ": %d\n", error); \ return (error); \ } \ } while(0) #define OPT_BHND_GV(_dest, _name, _default) do { \ if ((error = BHND_GV(_dest, _name))) { \ if (error != ENOENT) { \ device_printf(dev, \ "error reading " \ __STRING(_name) ": %d\n", error); \ return (error); \ } \ _dest = _default; \ } \ } while(0) /** * Helper function for implementing BHND_BUS_READ_BOARDINFO(). * * This implementation populates @p info with information from NVRAM, * defaulting board_vendor and board_type fields to 0 if the * requested variables cannot be found. * * This behavior is correct for most SoCs, but must be overridden on * bridged (PCI, PCMCIA, etc) devices to produce a complete bhnd_board_info * result. */ int bhnd_bus_generic_read_board_info(device_t dev, device_t child, struct bhnd_board_info *info) { int error; OPT_BHND_GV(info->board_vendor, BOARDVENDOR, 0); OPT_BHND_GV(info->board_type, BOARDTYPE, 0); /* srom >= 2 */ REQ_BHND_GV(info->board_rev, BOARDREV); OPT_BHND_GV(info->board_srom_rev,SROMREV, 0); /* missing in some SoC NVRAM */ REQ_BHND_GV(info->board_flags, BOARDFLAGS); OPT_BHND_GV(info->board_flags2, BOARDFLAGS2, 0); /* srom >= 4 */ OPT_BHND_GV(info->board_flags3, BOARDFLAGS3, 0); /* srom >= 11 */ return (0); } #undef BHND_GV #undef BHND_GV_REQ #undef BHND_GV_OPT /** * Helper function for implementing BHND_BUS_GET_NVRAM_VAR(). * * This implementation searches @p dev for a usable NVRAM child device. * * If no usable child device is found on @p dev, the request is delegated to * the BHND_BUS_GET_NVRAM_VAR() method on the parent of @p dev. */ int bhnd_bus_generic_get_nvram_var(device_t dev, device_t child, const char *name, void *buf, size_t *size, bhnd_nvram_type type) { device_t nvram; device_t parent; /* Make sure we're holding Giant for newbus */ GIANT_REQUIRED; /* Look for a directly-attached NVRAM child */ if ((nvram = device_find_child(dev, "bhnd_nvram", -1)) != NULL) return BHND_NVRAM_GETVAR(nvram, name, buf, size, type); /* Try to delegate to parent */ if ((parent = device_get_parent(dev)) == NULL) return (ENODEV); return (BHND_BUS_GET_NVRAM_VAR(device_get_parent(dev), child, name, buf, size, type)); } /** * Helper function for implementing BHND_BUS_ALLOC_RESOURCE(). * * This implementation of BHND_BUS_ALLOC_RESOURCE() delegates allocation * of the underlying resource to BUS_ALLOC_RESOURCE(), and activation * to @p dev's BHND_BUS_ACTIVATE_RESOURCE(). */ struct bhnd_resource * bhnd_bus_generic_alloc_resource(device_t dev, device_t child, int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) { struct bhnd_resource *br; struct resource *res; int error; br = NULL; res = NULL; /* Allocate the real bus resource (without activating it) */ res = BUS_ALLOC_RESOURCE(dev, child, type, rid, start, end, count, (flags & ~RF_ACTIVE)); if (res == NULL) return (NULL); /* Allocate our bhnd resource wrapper. */ br = malloc(sizeof(struct bhnd_resource), M_BHND, M_NOWAIT); if (br == NULL) goto failed; br->direct = false; br->res = res; /* Attempt activation */ if (flags & RF_ACTIVE) { error = BHND_BUS_ACTIVATE_RESOURCE(dev, child, type, *rid, br); if (error) goto failed; } return (br); failed: if (res != NULL) BUS_RELEASE_RESOURCE(dev, child, type, *rid, res); free(br, M_BHND); return (NULL); } /** * Helper function for implementing BHND_BUS_RELEASE_RESOURCE(). * * This implementation of BHND_BUS_RELEASE_RESOURCE() delegates release of * the backing resource to BUS_RELEASE_RESOURCE(). */ int bhnd_bus_generic_release_resource(device_t dev, device_t child, int type, int rid, struct bhnd_resource *r) { int error; if ((error = BUS_RELEASE_RESOURCE(dev, child, type, rid, r->res))) return (error); free(r, M_BHND); return (0); } /** * Helper function for implementing BHND_BUS_ACTIVATE_RESOURCE(). * * This implementation of BHND_BUS_ACTIVATE_RESOURCE() first calls the * BHND_BUS_ACTIVATE_RESOURCE() method of the parent of @p dev. * * If this fails, and if @p dev is the direct parent of @p child, standard * resource activation is attempted via bus_activate_resource(). This enables * direct use of the bhnd(4) resource APIs on devices that may not be attached * to a parent bhnd bus or bridge. */ int bhnd_bus_generic_activate_resource(device_t dev, device_t child, int type, int rid, struct bhnd_resource *r) { int error; bool passthrough; passthrough = (device_get_parent(child) != dev); /* Try to delegate to the parent */ if (device_get_parent(dev) != NULL) { error = BHND_BUS_ACTIVATE_RESOURCE(device_get_parent(dev), child, type, rid, r); } else { error = ENODEV; } /* If bhnd(4) activation has failed and we're the child's direct * parent, try falling back on standard resource activation. */ if (error && !passthrough) { error = bus_activate_resource(child, type, rid, r->res); if (!error) r->direct = true; } return (error); } /** * Helper function for implementing BHND_BUS_DEACTIVATE_RESOURCE(). * * This implementation of BHND_BUS_ACTIVATE_RESOURCE() simply calls the * BHND_BUS_ACTIVATE_RESOURCE() method of the parent of @p dev. */ int bhnd_bus_generic_deactivate_resource(device_t dev, device_t child, int type, int rid, struct bhnd_resource *r) { if (device_get_parent(dev) != NULL) return (BHND_BUS_DEACTIVATE_RESOURCE(device_get_parent(dev), child, type, rid, r)); return (EINVAL); } /** * Helper function for implementing BHND_BUS_GET_INTR_DOMAIN(). * * This implementation simply returns the address of nearest bhnd(4) bus, * which may be @p dev; this behavior may be incompatible with FDT/OFW targets. */ uintptr_t bhnd_bus_generic_get_intr_domain(device_t dev, device_t child, bool self) { return ((uintptr_t)dev); } Index: head/sys/dev/bhnd/nvram/bhnd_nvram_subr.c =================================================================== --- head/sys/dev/bhnd/nvram/bhnd_nvram_subr.c (revision 326290) +++ head/sys/dev/bhnd/nvram/bhnd_nvram_subr.c (revision 326291) @@ -1,1105 +1,1107 @@ /*- * Copyright (c) 2015-2016 Landon Fuller * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any * redistribution must be conditioned upon including a substantially * similar Disclaimer requirement for further binary redistribution. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGES. */ #include __FBSDID("$FreeBSD$"); #include #ifdef _KERNEL #include #include #include #include #include #include #else /* !_KERNEL */ #include #include #include #include #include #include #include #include #include #endif /* _KERNEL */ #include "bhnd_nvram_io.h" #include "bhnd_nvram_private.h" #include "bhnd_nvram_value.h" #include "bhnd_nvram_map_data.h" /* * Common NVRAM/SPROM support, including NVRAM variable map * lookup. */ #ifdef _KERNEL MALLOC_DEFINE(M_BHND_NVRAM, "bhnd_nvram", "bhnd nvram data"); #endif /* * CRC-8 lookup table used to checksum SPROM and NVRAM data via * bhnd_nvram_crc8(). * * Generated with following parameters: * polynomial: CRC-8 (x^8 + x^7 + x^6 + x^4 + x^2 + 1) * reflected bits: false * reversed: true */ const uint8_t bhnd_nvram_crc8_tab[] = { 0x00, 0xf7, 0xb9, 0x4e, 0x25, 0xd2, 0x9c, 0x6b, 0x4a, 0xbd, 0xf3, 0x04, 0x6f, 0x98, 0xd6, 0x21, 0x94, 0x63, 0x2d, 0xda, 0xb1, 0x46, 0x08, 0xff, 0xde, 0x29, 0x67, 0x90, 0xfb, 0x0c, 0x42, 0xb5, 0x7f, 0x88, 0xc6, 0x31, 0x5a, 0xad, 0xe3, 0x14, 0x35, 0xc2, 0x8c, 0x7b, 0x10, 0xe7, 0xa9, 0x5e, 0xeb, 0x1c, 0x52, 0xa5, 0xce, 0x39, 0x77, 0x80, 0xa1, 0x56, 0x18, 0xef, 0x84, 0x73, 0x3d, 0xca, 0xfe, 0x09, 0x47, 0xb0, 0xdb, 0x2c, 0x62, 0x95, 0xb4, 0x43, 0x0d, 0xfa, 0x91, 0x66, 0x28, 0xdf, 0x6a, 0x9d, 0xd3, 0x24, 0x4f, 0xb8, 0xf6, 0x01, 0x20, 0xd7, 0x99, 0x6e, 0x05, 0xf2, 0xbc, 0x4b, 0x81, 0x76, 0x38, 0xcf, 0xa4, 0x53, 0x1d, 0xea, 0xcb, 0x3c, 0x72, 0x85, 0xee, 0x19, 0x57, 0xa0, 0x15, 0xe2, 0xac, 0x5b, 0x30, 0xc7, 0x89, 0x7e, 0x5f, 0xa8, 0xe6, 0x11, 0x7a, 0x8d, 0xc3, 0x34, 0xab, 0x5c, 0x12, 0xe5, 0x8e, 0x79, 0x37, 0xc0, 0xe1, 0x16, 0x58, 0xaf, 0xc4, 0x33, 0x7d, 0x8a, 0x3f, 0xc8, 0x86, 0x71, 0x1a, 0xed, 0xa3, 0x54, 0x75, 0x82, 0xcc, 0x3b, 0x50, 0xa7, 0xe9, 0x1e, 0xd4, 0x23, 0x6d, 0x9a, 0xf1, 0x06, 0x48, 0xbf, 0x9e, 0x69, 0x27, 0xd0, 0xbb, 0x4c, 0x02, 0xf5, 0x40, 0xb7, 0xf9, 0x0e, 0x65, 0x92, 0xdc, 0x2b, 0x0a, 0xfd, 0xb3, 0x44, 0x2f, 0xd8, 0x96, 0x61, 0x55, 0xa2, 0xec, 0x1b, 0x70, 0x87, 0xc9, 0x3e, 0x1f, 0xe8, 0xa6, 0x51, 0x3a, 0xcd, 0x83, 0x74, 0xc1, 0x36, 0x78, 0x8f, 0xe4, 0x13, 0x5d, 0xaa, 0x8b, 0x7c, 0x32, 0xc5, 0xae, 0x59, 0x17, 0xe0, 0x2a, 0xdd, 0x93, 0x64, 0x0f, 0xf8, 0xb6, 0x41, 0x60, 0x97, 0xd9, 0x2e, 0x45, 0xb2, 0xfc, 0x0b, 0xbe, 0x49, 0x07, 0xf0, 0x9b, 0x6c, 0x22, 0xd5, 0xf4, 0x03, 0x4d, 0xba, 0xd1, 0x26, 0x68, 0x9f }; /** * Return a human readable name for @p type. * * @param type The type to query. */ const char * bhnd_nvram_type_name(bhnd_nvram_type type) { switch (type) { case BHND_NVRAM_TYPE_UINT8: return ("uint8"); case BHND_NVRAM_TYPE_UINT16: return ("uint16"); case BHND_NVRAM_TYPE_UINT32: return ("uint32"); case BHND_NVRAM_TYPE_UINT64: return ("uint64"); case BHND_NVRAM_TYPE_CHAR: return ("char"); case BHND_NVRAM_TYPE_INT8: return ("int8"); case BHND_NVRAM_TYPE_INT16: return ("int16"); case BHND_NVRAM_TYPE_INT32: return ("int32"); case BHND_NVRAM_TYPE_INT64: return ("int64"); case BHND_NVRAM_TYPE_STRING: return ("string"); case BHND_NVRAM_TYPE_BOOL: return ("bool"); case BHND_NVRAM_TYPE_NULL: return ("null"); case BHND_NVRAM_TYPE_DATA: return ("data"); case BHND_NVRAM_TYPE_UINT8_ARRAY: return ("uint8[]"); case BHND_NVRAM_TYPE_UINT16_ARRAY: return ("uint16[]"); case BHND_NVRAM_TYPE_UINT32_ARRAY: return ("uint32[]"); case BHND_NVRAM_TYPE_UINT64_ARRAY: return ("uint64[]"); case BHND_NVRAM_TYPE_INT8_ARRAY: return ("int8[]"); case BHND_NVRAM_TYPE_INT16_ARRAY: return ("int16[]"); case BHND_NVRAM_TYPE_INT32_ARRAY: return ("int32[]"); case BHND_NVRAM_TYPE_INT64_ARRAY: return ("int64[]"); case BHND_NVRAM_TYPE_CHAR_ARRAY: return ("char[]"); case BHND_NVRAM_TYPE_STRING_ARRAY: return ("string[]"); case BHND_NVRAM_TYPE_BOOL_ARRAY: return ("bool[]"); } /* Quiesce gcc4.2 */ BHND_NV_PANIC("bhnd nvram type %u unknown", type); } /** * Return true if @p type is a signed integer type, false otherwise. * * Will return false for all array types. * * @param type The type to query. */ bool bhnd_nvram_is_signed_type(bhnd_nvram_type type) { switch (type) { case BHND_NVRAM_TYPE_INT8: case BHND_NVRAM_TYPE_INT16: case BHND_NVRAM_TYPE_INT32: case BHND_NVRAM_TYPE_INT64: BHND_NV_ASSERT(bhnd_nvram_is_int_type(type), ("non-int type?")); return (true); case BHND_NVRAM_TYPE_CHAR: case BHND_NVRAM_TYPE_UINT8: case BHND_NVRAM_TYPE_UINT16: case BHND_NVRAM_TYPE_UINT32: case BHND_NVRAM_TYPE_UINT64: case BHND_NVRAM_TYPE_STRING: case BHND_NVRAM_TYPE_BOOL: case BHND_NVRAM_TYPE_NULL: case BHND_NVRAM_TYPE_DATA: case BHND_NVRAM_TYPE_UINT8_ARRAY: case BHND_NVRAM_TYPE_UINT16_ARRAY: case BHND_NVRAM_TYPE_UINT32_ARRAY: case BHND_NVRAM_TYPE_UINT64_ARRAY: case BHND_NVRAM_TYPE_INT8_ARRAY: case BHND_NVRAM_TYPE_INT16_ARRAY: case BHND_NVRAM_TYPE_INT32_ARRAY: case BHND_NVRAM_TYPE_INT64_ARRAY: case BHND_NVRAM_TYPE_CHAR_ARRAY: case BHND_NVRAM_TYPE_STRING_ARRAY: case BHND_NVRAM_TYPE_BOOL_ARRAY: return (false); } /* Quiesce gcc4.2 */ BHND_NV_PANIC("bhnd nvram type %u unknown", type); } /** * Return true if @p type is an unsigned integer type, false otherwise. * * @param type The type to query. * * @return Will return false for all array types. * @return Will return true for BHND_NVRAM_TYPE_CHAR. */ bool bhnd_nvram_is_unsigned_type(bhnd_nvram_type type) { /* If an integer type, must be either signed or unsigned */ if (!bhnd_nvram_is_int_type(type)) return (false); return (!bhnd_nvram_is_signed_type(type)); } /** * Return true if bhnd_nvram_is_signed_type() or bhnd_nvram_is_unsigned_type() * returns true for @p type. * * @param type The type to query. */ bool bhnd_nvram_is_int_type(bhnd_nvram_type type) { switch (type) { case BHND_NVRAM_TYPE_UINT8: case BHND_NVRAM_TYPE_UINT16: case BHND_NVRAM_TYPE_UINT32: case BHND_NVRAM_TYPE_UINT64: case BHND_NVRAM_TYPE_INT8: case BHND_NVRAM_TYPE_INT16: case BHND_NVRAM_TYPE_INT32: case BHND_NVRAM_TYPE_INT64: return (true); case BHND_NVRAM_TYPE_CHAR: case BHND_NVRAM_TYPE_STRING: case BHND_NVRAM_TYPE_BOOL: case BHND_NVRAM_TYPE_NULL: case BHND_NVRAM_TYPE_DATA: case BHND_NVRAM_TYPE_UINT8_ARRAY: case BHND_NVRAM_TYPE_UINT16_ARRAY: case BHND_NVRAM_TYPE_UINT32_ARRAY: case BHND_NVRAM_TYPE_UINT64_ARRAY: case BHND_NVRAM_TYPE_INT8_ARRAY: case BHND_NVRAM_TYPE_INT16_ARRAY: case BHND_NVRAM_TYPE_INT32_ARRAY: case BHND_NVRAM_TYPE_INT64_ARRAY: case BHND_NVRAM_TYPE_CHAR_ARRAY: case BHND_NVRAM_TYPE_STRING_ARRAY: case BHND_NVRAM_TYPE_BOOL_ARRAY: return (false); } /* Quiesce gcc4.2 */ BHND_NV_PANIC("bhnd nvram type %u unknown", type); } /** * Return true if @p type is an array type, false otherwise. * * @param type The type to query. */ bool bhnd_nvram_is_array_type(bhnd_nvram_type type) { switch (type) { case BHND_NVRAM_TYPE_UINT8: case BHND_NVRAM_TYPE_UINT16: case BHND_NVRAM_TYPE_UINT32: case BHND_NVRAM_TYPE_UINT64: case BHND_NVRAM_TYPE_INT8: case BHND_NVRAM_TYPE_INT16: case BHND_NVRAM_TYPE_INT32: case BHND_NVRAM_TYPE_INT64: case BHND_NVRAM_TYPE_CHAR: case BHND_NVRAM_TYPE_STRING: case BHND_NVRAM_TYPE_BOOL: case BHND_NVRAM_TYPE_NULL: case BHND_NVRAM_TYPE_DATA: return (false); case BHND_NVRAM_TYPE_UINT8_ARRAY: case BHND_NVRAM_TYPE_UINT16_ARRAY: case BHND_NVRAM_TYPE_UINT32_ARRAY: case BHND_NVRAM_TYPE_UINT64_ARRAY: case BHND_NVRAM_TYPE_INT8_ARRAY: case BHND_NVRAM_TYPE_INT16_ARRAY: case BHND_NVRAM_TYPE_INT32_ARRAY: case BHND_NVRAM_TYPE_INT64_ARRAY: case BHND_NVRAM_TYPE_CHAR_ARRAY: case BHND_NVRAM_TYPE_STRING_ARRAY: case BHND_NVRAM_TYPE_BOOL_ARRAY: return (true); } /* Quiesce gcc4.2 */ BHND_NV_PANIC("bhnd nvram type %u unknown", type); } /** * If @p type is an array type, return the base element type. Otherwise, * returns @p type. * * @param type The type to query. */ bhnd_nvram_type bhnd_nvram_base_type(bhnd_nvram_type type) { switch (type) { case BHND_NVRAM_TYPE_UINT8: case BHND_NVRAM_TYPE_UINT16: case BHND_NVRAM_TYPE_UINT32: case BHND_NVRAM_TYPE_UINT64: case BHND_NVRAM_TYPE_INT8: case BHND_NVRAM_TYPE_INT16: case BHND_NVRAM_TYPE_INT32: case BHND_NVRAM_TYPE_INT64: case BHND_NVRAM_TYPE_CHAR: case BHND_NVRAM_TYPE_STRING: case BHND_NVRAM_TYPE_BOOL: case BHND_NVRAM_TYPE_NULL: case BHND_NVRAM_TYPE_DATA: return (type); case BHND_NVRAM_TYPE_UINT8_ARRAY: return (BHND_NVRAM_TYPE_UINT8); case BHND_NVRAM_TYPE_UINT16_ARRAY: return (BHND_NVRAM_TYPE_UINT16); case BHND_NVRAM_TYPE_UINT32_ARRAY: return (BHND_NVRAM_TYPE_UINT32); case BHND_NVRAM_TYPE_UINT64_ARRAY: return (BHND_NVRAM_TYPE_UINT64); case BHND_NVRAM_TYPE_INT8_ARRAY: return (BHND_NVRAM_TYPE_INT8); case BHND_NVRAM_TYPE_INT16_ARRAY: return (BHND_NVRAM_TYPE_INT16); case BHND_NVRAM_TYPE_INT32_ARRAY: return (BHND_NVRAM_TYPE_INT32); case BHND_NVRAM_TYPE_INT64_ARRAY: return (BHND_NVRAM_TYPE_INT64); case BHND_NVRAM_TYPE_CHAR_ARRAY: return (BHND_NVRAM_TYPE_CHAR); case BHND_NVRAM_TYPE_STRING_ARRAY: return (BHND_NVRAM_TYPE_STRING); case BHND_NVRAM_TYPE_BOOL_ARRAY: return (BHND_NVRAM_TYPE_BOOL); } /* Quiesce gcc4.2 */ BHND_NV_PANIC("bhnd nvram type %u unknown", type); } /** * Return the raw data type used to represent values of @p type, or return * @p type is @p type is not a complex type. * * @param type The type to query. */ bhnd_nvram_type bhnd_nvram_raw_type(bhnd_nvram_type type) { switch (type) { case BHND_NVRAM_TYPE_CHAR: return (BHND_NVRAM_TYPE_UINT8); case BHND_NVRAM_TYPE_CHAR_ARRAY: return (BHND_NVRAM_TYPE_UINT8_ARRAY); case BHND_NVRAM_TYPE_BOOL: { _Static_assert(sizeof(bhnd_nvram_bool_t) == sizeof(uint8_t), "bhnd_nvram_bool_t must be uint8-representable"); return (BHND_NVRAM_TYPE_UINT8); } case BHND_NVRAM_TYPE_BOOL_ARRAY: return (BHND_NVRAM_TYPE_UINT8_ARRAY); case BHND_NVRAM_TYPE_DATA: return (BHND_NVRAM_TYPE_UINT8_ARRAY); case BHND_NVRAM_TYPE_STRING: case BHND_NVRAM_TYPE_STRING_ARRAY: return (BHND_NVRAM_TYPE_UINT8_ARRAY); case BHND_NVRAM_TYPE_UINT8: case BHND_NVRAM_TYPE_UINT16: case BHND_NVRAM_TYPE_UINT32: case BHND_NVRAM_TYPE_UINT64: case BHND_NVRAM_TYPE_INT8: case BHND_NVRAM_TYPE_INT16: case BHND_NVRAM_TYPE_INT32: case BHND_NVRAM_TYPE_INT64: case BHND_NVRAM_TYPE_NULL: case BHND_NVRAM_TYPE_UINT8_ARRAY: case BHND_NVRAM_TYPE_UINT16_ARRAY: case BHND_NVRAM_TYPE_UINT32_ARRAY: case BHND_NVRAM_TYPE_UINT64_ARRAY: case BHND_NVRAM_TYPE_INT8_ARRAY: case BHND_NVRAM_TYPE_INT16_ARRAY: case BHND_NVRAM_TYPE_INT32_ARRAY: case BHND_NVRAM_TYPE_INT64_ARRAY: return (type); } /* Quiesce gcc4.2 */ BHND_NV_PANIC("bhnd nvram type %u unknown", type); } /** * Return the size, in bytes, of a single element of @p type, or 0 * if @p type is a variable-width type. * * @param type The type to query. */ size_t bhnd_nvram_type_width(bhnd_nvram_type type) { switch (type) { case BHND_NVRAM_TYPE_STRING: case BHND_NVRAM_TYPE_STRING_ARRAY: case BHND_NVRAM_TYPE_DATA: return (0); case BHND_NVRAM_TYPE_NULL: return (0); case BHND_NVRAM_TYPE_BOOL: case BHND_NVRAM_TYPE_BOOL_ARRAY: return (sizeof(bhnd_nvram_bool_t)); case BHND_NVRAM_TYPE_CHAR: case BHND_NVRAM_TYPE_CHAR_ARRAY: case BHND_NVRAM_TYPE_UINT8: case BHND_NVRAM_TYPE_UINT8_ARRAY: case BHND_NVRAM_TYPE_INT8: case BHND_NVRAM_TYPE_INT8_ARRAY: return (sizeof(uint8_t)); case BHND_NVRAM_TYPE_UINT16: case BHND_NVRAM_TYPE_UINT16_ARRAY: case BHND_NVRAM_TYPE_INT16: case BHND_NVRAM_TYPE_INT16_ARRAY: return (sizeof(uint16_t)); case BHND_NVRAM_TYPE_UINT32: case BHND_NVRAM_TYPE_UINT32_ARRAY: case BHND_NVRAM_TYPE_INT32: case BHND_NVRAM_TYPE_INT32_ARRAY: return (sizeof(uint32_t)); case BHND_NVRAM_TYPE_UINT64: case BHND_NVRAM_TYPE_UINT64_ARRAY: case BHND_NVRAM_TYPE_INT64: case BHND_NVRAM_TYPE_INT64_ARRAY: return (sizeof(uint64_t)); } /* Quiesce gcc4.2 */ BHND_NV_PANIC("bhnd nvram type %u unknown", type); } /** * Return the native host alignment for values of @p type. * * @param type The type to query. */ size_t bhnd_nvram_type_host_align(bhnd_nvram_type type) { switch (type) { case BHND_NVRAM_TYPE_CHAR: case BHND_NVRAM_TYPE_CHAR_ARRAY: case BHND_NVRAM_TYPE_DATA: case BHND_NVRAM_TYPE_STRING: case BHND_NVRAM_TYPE_STRING_ARRAY: return (_Alignof(uint8_t)); case BHND_NVRAM_TYPE_BOOL: case BHND_NVRAM_TYPE_BOOL_ARRAY: { _Static_assert(sizeof(bhnd_nvram_bool_t) == sizeof(uint8_t), "bhnd_nvram_bool_t must be uint8-representable"); return (_Alignof(uint8_t)); } case BHND_NVRAM_TYPE_NULL: return (1); case BHND_NVRAM_TYPE_UINT8: case BHND_NVRAM_TYPE_UINT8_ARRAY: return (_Alignof(uint8_t)); case BHND_NVRAM_TYPE_UINT16: case BHND_NVRAM_TYPE_UINT16_ARRAY: return (_Alignof(uint16_t)); case BHND_NVRAM_TYPE_UINT32: case BHND_NVRAM_TYPE_UINT32_ARRAY: return (_Alignof(uint32_t)); case BHND_NVRAM_TYPE_UINT64: case BHND_NVRAM_TYPE_UINT64_ARRAY: return (_Alignof(uint64_t)); case BHND_NVRAM_TYPE_INT8: case BHND_NVRAM_TYPE_INT8_ARRAY: return (_Alignof(int8_t)); case BHND_NVRAM_TYPE_INT16: case BHND_NVRAM_TYPE_INT16_ARRAY: return (_Alignof(int16_t)); case BHND_NVRAM_TYPE_INT32: case BHND_NVRAM_TYPE_INT32_ARRAY: return (_Alignof(int32_t)); case BHND_NVRAM_TYPE_INT64: case BHND_NVRAM_TYPE_INT64_ARRAY: return (_Alignof(int64_t)); } /* Quiesce gcc4.2 */ BHND_NV_PANIC("bhnd nvram type %u unknown", type); } /** - * Iterate over all strings in the @p inp string array (@see - * BHNF_NVRAM_TYPE_STRING_ARRAY). + * Iterate over all strings in the @p inp string array (see + * BHND_NVRAM_TYPE_STRING_ARRAY). * * @param inp The string array to be iterated. This must be a * buffer of one or more NUL-terminated strings. * @param ilen The size, in bytes, of @p inp, including any * terminating NUL character(s). * @param prev The pointer previously returned by * bhnd_nvram_string_array_next(), or NULL to begin * iteration. * @param[in,out] olen If @p prev is non-NULL, @p olen must be a * pointer to the length previously returned by * bhnd_nvram_string_array_next(). On success, will * be set to the next element's length, in bytes. * * @retval non-NULL A reference to the next NUL-terminated string * @retval NULL If the end of the string array is reached. + * + * @see BHND_NVRAM_TYPE_STRING_ARRAY */ const char * bhnd_nvram_string_array_next(const char *inp, size_t ilen, const char *prev, size_t *olen) { return (bhnd_nvram_value_array_next(inp, ilen, BHND_NVRAM_TYPE_STRING_ARRAY, prev, olen)); } /* used by bhnd_nvram_find_vardefn() */ static int bhnd_nvram_find_vardefn_compare(const void *key, const void *rhs) { const struct bhnd_nvram_vardefn *r = rhs; return (strcmp((const char *)key, r->name)); } /** * Find and return the variable definition for @p varname, if any. * * @param varname variable name * * @retval bhnd_nvram_vardefn If a valid definition for @p varname is found. * @retval NULL If no definition for @p varname is found. */ const struct bhnd_nvram_vardefn * bhnd_nvram_find_vardefn(const char *varname) { return (bsearch(varname, bhnd_nvram_vardefns, bhnd_nvram_num_vardefns, sizeof(bhnd_nvram_vardefns[0]), bhnd_nvram_find_vardefn_compare)); } /** * Return the variable ID for a variable definition. * * @param defn Variable definition previously returned by * bhnd_nvram_find_vardefn() or bhnd_nvram_get_vardefn(). */ size_t bhnd_nvram_get_vardefn_id(const struct bhnd_nvram_vardefn *defn) { BHND_NV_ASSERT( defn >= bhnd_nvram_vardefns && defn <= &bhnd_nvram_vardefns[bhnd_nvram_num_vardefns-1], ("invalid variable definition pointer %p", defn)); return (defn - bhnd_nvram_vardefns); } /** * Return the variable definition with the given @p id, or NULL * if no such variable ID is defined. * * @param id variable ID. * * @retval bhnd_nvram_vardefn If a valid definition for @p id is found. * @retval NULL If no definition for @p id is found. */ const struct bhnd_nvram_vardefn * bhnd_nvram_get_vardefn(size_t id) { if (id >= bhnd_nvram_num_vardefns) return (NULL); return (&bhnd_nvram_vardefns[id]); } /** * Validate an NVRAM variable name. * * Scans for special characters (path delimiters, value delimiters, path * alias prefixes), returning false if the given name cannot be used * as a relative NVRAM key. * * @param name A relative NVRAM variable name to validate. * * @retval true If @p name is a valid relative NVRAM key. * @retval false If @p name should not be used as a relative NVRAM key. */ bool bhnd_nvram_validate_name(const char *name) { /* Reject path-prefixed variable names */ if (bhnd_nvram_trim_path_name(name) != name) return (false); /* Reject device path alias declarations (devpath[1-9][0-9]*.*\0) */ if (strncmp(name, "devpath", strlen("devpath")) == 0) { const char *p; char *endp; /* Check for trailing [1-9][0-9]* */ p = name + strlen("devpath"); strtoul(p, &endp, 10); if (endp != p) return (false); } /* Scan for [^A-Za-z_0-9] */ for (const char *p = name; *p != '\0'; p++) { switch (*p) { /* [0-9_] */ case '0': case '1': case '2': case '3': case '4': case '5': case '6': case '7': case '8': case '9': case '_': break; /* [A-Za-z] */ default: if (!bhnd_nv_isalpha(*p)) return (false); break; } } return (true); } /** * Parses the string in the optionally NUL-terminated @p str to as an integer * value of @p otype, accepting any integer format supported by the standard * strtoul(). * * - Any leading whitespace in @p str -- as defined by the equivalent of * calling isspace_l() with an ASCII locale -- will be ignored. * - A @p str may be prefixed with a single optional '+' or '-' sign denoting * signedness. * - A hexadecimal @p str may include an '0x' or '0X' prefix, denoting that a * base 16 integer follows. * - An octal @p str may include a '0' prefix, denoting that an octal integer * follows. * * If a @p base of 0 is specified, the base will be determined according * to the string's initial prefix, as per strtoul()'s documented behavior. * * When parsing a base 16 integer to a signed representation, if no explicit * sign prefix is given, the string will be parsed as the raw two's complement * representation of the signed integer value. * * @param str The string to be parsed. * @param maxlen The maximum number of bytes to be read in * @p str. * @param base The input string's base (2-36), or 0. * @param[out] nbytes On success or failure, will be set to the total * number of parsed bytes. If the total number of * bytes is not desired, a NULL pointer may be * provided. * @param[out] outp On success, the parsed integer value will be * written to @p outp. This argment may be NULL if * the value is not desired. * @param[in,out] olen The capacity of @p outp. On success, will be set * to the actual size of the requested value. * @param otype The integer type to be parsed. * * @retval 0 success * @retval EINVAL if an invalid @p base is specified. * @retval EINVAL if an unsupported (or non-integer) @p otype is * specified. * @retval ENOMEM If @p outp is non-NULL and a buffer of @p olen is too * small to hold the requested value. * @retval EFTYPE if @p str cannot be parsed as an integer of @p base. * @retval ERANGE If the integer parsed from @p str is too large to be * represented as a value of @p otype. */ int bhnd_nvram_parse_int(const char *str, size_t maxlen, u_int base, size_t *nbytes, void *outp, size_t *olen, bhnd_nvram_type otype) { uint64_t value; uint64_t carry_max, value_max; uint64_t type_max; size_t limit, local_nbytes; size_t ndigits; bool negative, sign, twos_compl; /* Must be an integer type */ if (!bhnd_nvram_is_int_type(otype)) return (EINVAL); /* Determine output byte limit */ if (outp != NULL) limit = *olen; else limit = 0; /* We always need a byte count. If the caller provides a NULL nbytes, * track our position in a stack variable */ if (nbytes == NULL) nbytes = &local_nbytes; value = 0; ndigits = 0; *nbytes = 0; negative = false; sign = false; /* Validate the specified base */ if (base != 0 && !(base >= 2 && base <= 36)) return (EINVAL); /* Skip any leading whitespace */ for (; *nbytes < maxlen; (*nbytes)++) { if (!bhnd_nv_isspace(str[*nbytes])) break; } /* Empty string? */ if (*nbytes == maxlen) return (EFTYPE); /* Parse and skip sign */ if (str[*nbytes] == '-') { negative = true; sign = true; (*nbytes)++; } else if (str[*nbytes] == '+') { sign = true; (*nbytes)++; } /* Truncated after sign character? */ if (*nbytes == maxlen) return (EFTYPE); /* Identify (or validate) hex base, skipping 0x/0X prefix */ if (base == 16 || base == 0) { /* Check for (and skip) 0x/0X prefix */ if (maxlen - *nbytes >= 2 && str[*nbytes] == '0' && (str[*nbytes+1] == 'x' || str[*nbytes+1] == 'X')) { base = 16; (*nbytes) += 2; } } /* Truncated after hex prefix? */ if (*nbytes == maxlen) return (EFTYPE); /* Differentiate decimal/octal by looking for a leading 0 */ if (base == 0) { if (str[*nbytes] == '0') { base = 8; } else { base = 10; } } /* Only enable twos-compliment signed integer parsing enabled if the * input is base 16, and no explicit sign prefix was provided */ if (!sign && base == 16) twos_compl = true; else twos_compl = false; /* Determine the maximum value representable by the requested type */ switch (otype) { case BHND_NVRAM_TYPE_CHAR: case BHND_NVRAM_TYPE_UINT8: type_max = (uint64_t)UINT8_MAX; break; case BHND_NVRAM_TYPE_UINT16: type_max = (uint64_t)UINT16_MAX; break; case BHND_NVRAM_TYPE_UINT32: type_max = (uint64_t)UINT32_MAX; break; case BHND_NVRAM_TYPE_UINT64: type_max = (uint64_t)UINT64_MAX; break; case BHND_NVRAM_TYPE_INT8: if (twos_compl) type_max = (uint64_t)UINT8_MAX; else if (negative) type_max = -(uint64_t)INT8_MIN; else type_max = (uint64_t)INT8_MAX; break; case BHND_NVRAM_TYPE_INT16: if (twos_compl) type_max = (uint64_t)UINT16_MAX; else if (negative) type_max = -(uint64_t)INT16_MIN; else type_max = (uint64_t)INT16_MAX; break; case BHND_NVRAM_TYPE_INT32: if (twos_compl) type_max = (uint64_t)UINT32_MAX; else if (negative) type_max = -(uint64_t)INT32_MIN; else type_max = (uint64_t)INT32_MAX; break; case BHND_NVRAM_TYPE_INT64: if (twos_compl) type_max = (uint64_t)UINT64_MAX; else if (negative) type_max = -(uint64_t)INT64_MIN; else type_max = (uint64_t)INT64_MAX; break; default: BHND_NV_LOG("unsupported integer type: %d\n", otype); return (EINVAL); } /* The maximum value after which an additional carry would overflow */ value_max = type_max / (uint64_t)base; /* The maximum carry value given a value equal to value_max */ carry_max = type_max % (uint64_t)base; /* Consume input until we hit maxlen or a non-digit character */ for (; *nbytes < maxlen; (*nbytes)++) { u_long carry; char c; /* Parse carry value */ c = str[*nbytes]; if (bhnd_nv_isdigit(c)) { carry = c - '0'; } else if (bhnd_nv_isxdigit(c)) { if (bhnd_nv_isupper(c)) carry = (c - 'A') + 10; else carry = (c - 'a') + 10; } else { /* Hit first non-digit character */ break; } /* If carry is outside the base, it's not a valid digit * in the current parse context; consider it a non-digit * character */ if (carry >= (uint64_t)base) break; /* Increment count of parsed digits */ ndigits++; if (value > value_max) { /* -Any- carry value would overflow */ return (ERANGE); } else if (value == value_max && carry > carry_max) { /* -This- carry value would overflow */ return (ERANGE); } value *= (uint64_t)base; value += carry; } /* If we hit a non-digit character before parsing the first digit, * we hit an empty integer string. */ if (ndigits == 0) return (EFTYPE); if (negative) value = -value; /* Provide (and verify) required length */ *olen = bhnd_nvram_type_width(otype); if (outp == NULL) return (0); else if (limit < *olen) return (ENOMEM); /* Provide result */ switch (otype) { case BHND_NVRAM_TYPE_CHAR: case BHND_NVRAM_TYPE_UINT8: *(uint8_t *)outp = (uint8_t)value; break; case BHND_NVRAM_TYPE_UINT16: *(uint16_t *)outp = (uint16_t)value; break; case BHND_NVRAM_TYPE_UINT32: *(uint32_t *)outp = (uint32_t)value; break; case BHND_NVRAM_TYPE_UINT64: *(uint64_t *)outp = (uint64_t)value; break; case BHND_NVRAM_TYPE_INT8: *(int8_t *)outp = (int8_t)(int64_t)value; break; case BHND_NVRAM_TYPE_INT16: *(int16_t *)outp = (int16_t)(int64_t)value; break; case BHND_NVRAM_TYPE_INT32: *(int32_t *)outp = (int32_t)(int64_t)value; break; case BHND_NVRAM_TYPE_INT64: *(int64_t *)outp = (int64_t)value; break; default: /* unreachable */ BHND_NV_PANIC("unhandled type %d\n", otype); } return (0); } /** * Trim leading path (pci/1/1) or path alias (0:) prefix from @p name, if any, * returning a pointer to the start of the relative variable name. * * @par Examples * * - "/foo" -> "foo" * - "dev/pci/foo" -> "foo" * - "0:foo" -> "foo" * - "foo" -> "foo" * * @param name The string to be trimmed. * * @return A pointer to the start of the relative variable name in @p name. */ const char * bhnd_nvram_trim_path_name(const char *name) { char *endp; /* path alias prefix? (0:varname) */ if (bhnd_nv_isdigit(*name)) { /* Parse '0...:' alias prefix, if it exists */ strtoul(name, &endp, 10); if (endp != name && *endp == ':') { /* Variable name follows 0: prefix */ return (endp+1); } } /* device path prefix? (pci/1/1/varname) */ if ((endp = strrchr(name, '/')) != NULL) { /* Variable name follows the final path separator '/' */ return (endp+1); } /* variable name is not prefixed */ return (name); } /** * Parse a 'name=value' string. * * @param env The string to be parsed. * @param env_len The length of @p envp. * @param delim The delimiter used in @p envp. This will generally be '='. * @param[out] name If not NULL, a pointer to the name string. This argument * may be NULL. * @param[out] name_len On success, the length of the name substring. This * argument may be NULL. * @param[out] value On success, a pointer to the value substring. This argument * may be NULL. * @param[out] value_len On success, the length of the value substring. This * argument may be NULL. * * @retval 0 success * @retval EINVAL if parsing @p envp fails. */ int bhnd_nvram_parse_env(const char *env, size_t env_len, char delim, const char **name, size_t *name_len, const char **value, size_t *value_len) { const char *p; /* Name */ if ((p = memchr(env, delim, env_len)) == NULL) { BHND_NV_LOG("delimiter '%c' not found in '%.*s'\n", delim, BHND_NV_PRINT_WIDTH(env_len), env); return (EINVAL); } /* Name */ if (name != NULL) *name = env; if (name_len != NULL) *name_len = p - env; /* Skip delim */ p++; /* Value */ if (value != NULL) *value = p; if (value_len != NULL) *value_len = env_len - (p - env); return (0); } /** * Parse a field value, returning the actual pointer to the first * non-whitespace character and the total size of the field. * * @param[in,out] inp The field string to parse. Will be updated to point * at the first non-whitespace character found. * @param ilen The length of @p inp, in bytes. * @param delim The field delimiter to search for. * * @return Returns the actual size of the field data. */ size_t bhnd_nvram_parse_field(const char **inp, size_t ilen, char delim) { const char *p, *sp; /* Skip any leading whitespace */ for (sp = *inp; (size_t)(sp-*inp) < ilen && bhnd_nv_isspace(*sp); sp++) continue; *inp = sp; /* Find the last field character */ for (p = *inp; (size_t)(p - *inp) < ilen; p++) { if (*p == delim || *p == '\0') break; } return (p - *inp); } /** * Parse a field value, returning the actual pointer to the first * non-whitespace character and the total size of the field, minus * any trailing whitespace. * * @param[in,out] inp The field string to parse. Will be updated to point * at the first non-whitespace character found. * @param ilen The length of the parsed field, in bytes, excluding the * field elimiter and any trailing whitespace. * @param delim The field delimiter to search for. * * @return Returns the actual size of the field data. */ size_t bhnd_nvram_trim_field(const char **inp, size_t ilen, char delim) { const char *sp; size_t plen; plen = bhnd_nvram_parse_field(inp, ilen, delim); /* Trim trailing whitespace */ sp = *inp; while (plen > 0) { if (!bhnd_nv_isspace(*(sp + plen - 1))) break; plen--; } return (plen); }