Index: head/share/man/man4/fdt.4 =================================================================== --- head/share/man/man4/fdt.4 (revision 325825) +++ head/share/man/man4/fdt.4 (revision 325826) @@ -1,192 +1,192 @@ .\" .\" Copyright (c) 2010 The FreeBSD Foundation .\" All rights reserved. .\" .\" This software was developed by Semihalf under sponsorship from .\" the FreeBSD Foundation. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" .\" $FreeBSD$ .\" .Dd July 12, 2010 .Dt FDT 4 .Os .Sh NAME .Nm fdt .Nd Flattened Device Tree support .Sh SYNOPSIS .Cd "options FDT" .Cd "makeoptions FDT_DTS_FILE=.dts" .Cd "options FDT_DTB_STATIC" .Sh DESCRIPTION .Em Flattened Device Tree is a mechanism for describing computer hardware resources, which cannot be probed or self enumerated, in a uniform and portable way. The primary consumers of this technology are .Em embedded systems, where a lot of designs are based on similar chips, but have different assignment of pins, memory layout, addresses bindings, interrupts routing and other resources. .Pp Configuration data, which cannot be self discovered in run-time, has to be supplied from external source. The concept of a flattened device tree is a platform and architecture independent approach for resolving such problems. The idea is inherited from Open Firmware IEEE 1275 device-tree notion, and has been successfully adopted by the embedded industry. The scheme works in the following way: .Bl -bullet .It Hardware platform resources are .Em manually described in a human readable text source format, where all non self-enumerating information is gathered. .It This source description is converted .Em (compiled) into a binary object i.e. a flattened device tree .Em blob which is passed to the kernel at boot time. .It The kernel (driver) learns about hardware resources details and dependencies from this [externally supplied] blob, which eliminates the need for embedding any information about the underlying platform hardware resources in the kernel. .It The flattened device tree mechanism in principle does not depend on any particular first-stage bootloader or firmware features. The only overall requirement for the environment is to provide a complete device tree description to the kernel. .El .Pp The .Nm layer allows any platform code in the kernel to retrieve information about hardware resources from a unified origin, which brings advantages to the embedded applications (eliminates hard-coded configuration approach, enforces code to be data driven and extensible) leading to easier porting and maintenance. .Sh DEFINITIONS .Bl -tag -width Ar .It Va Device tree source (DTS) The device tree source is a text file which describes hardware resources of a computer system in a human-readable form, with certain hierarchical structure (a tree). The default location for DTS files in the .Fx source repository is -.Pa sys/boot/fdt/dts +.Pa sys/dts directory. .It Va Device tree blob (DTB) The textual device tree description (DTS file) is first converted (compiled) into a binary object (the device tree blob) i.e. the DTB, which is handed over to the final consumer (typically kernel) for parsing and processing of its contents. .It Va Device tree compiler (DTC) A utility program executed on the host, which transforms (compiles) a textual description of a device tree (DTS) into a binary object (DTB). .It Va Device tree bindings While the device tree textual description and the binary object are media to convey the hardware configuration information, an actual meaning and interpretation of the contents are defined by the device tree .Pa bindings . They are certain conventions describing definitions (encoding) of particular nodes in a device tree and their properties, allowed values, ranges and so on. Such reference conventions were provided by the legacy Open Firmware bindings, further supplemented by the ePAPR specification. .El .Sh "BUILDING THE WORLD" In order for the system to support .Nm it is required that .Fx world be built with the .Pa WITH_FDT build knob supplied either via .Xr src.conf 5 or command line defined with -D. .Pp This creates the user space .Pa dtc compiler and enables .Nm support in .Xr loader 8 . .Sh "BUILDING KERNEL" There is a couple of options for managing .Nm support at the .Fx kernel level. .Bl -tag -width Ar .It Va options FDT The primary option for enabling .Nm support in the kernel. It covers all low-level and infrastructure parts of .Nm kernel support, which primarily are the .Xr fdtbus 4 and .Xr simplebus 4 drivers, as well as helper routines and libraries. .It Va makeoptions FDT_DTS_FILE=.dts Specifies a preferred (default) device tree source (DTS) file for a given kernel. The indicated DTS file will be converted (compiled) into a binary form along with building the kernel itself. The DTS file name is relative to the default location of DTS sources i.e. -.Pa sys/boot/fdt/dts . +.Pa sys/dts . This makeoption is not mandatory unless FDT_DTB_STATIC is also defined (see below). .It Va options FDT_DTB_STATIC Typically, the device tree blob (DTB) is a stand-alone file, physically separate from the kernel, but this option lets statically embed a DTB file into a kernel image. Note that when this is specified the FDT_DTS_FILE makeoption becomes mandatory (as there needs to be a DTS file specified in order to embed it into the kernel image). .El .Sh SEE ALSO .Xr fdtbus 4 , .Xr openfirm 4 , .Xr simplebus 4 .Sh STANDARDS IEEE Std 1275: IEEE Standard for Boot (Initialization Configuration) Firmware: Core Requirements and Practices .Pq Vt Open Firmware . .Pp Power.org Standard for Embedded Power Architecture Platform Requirements .Pq Vt ePAPR . .Sh HISTORY The .Nm support first appeared in .Fx 9.0 . .Sh AUTHORS The .Nm support was developed by Semihalf under sponsorship from the FreeBSD Foundation. This manual page was written by .An Rafal Jaworowski . Index: head/share/man/man4/gpioiic.4 =================================================================== --- head/share/man/man4/gpioiic.4 (revision 325825) +++ head/share/man/man4/gpioiic.4 (revision 325826) @@ -1,171 +1,171 @@ .\" Copyright (c) 2013, Luiz Otavio O Souza .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" .\" $FreeBSD$ .\" .Dd May 14, 2014 .Dt GPIOIIC 4 .Os .Sh NAME .Nm gpioiic .Nd GPIO I2C bit-banging device driver .Sh SYNOPSIS To compile this driver into the kernel, place the following lines in your kernel configuration file: .Bd -ragged -offset indent .Cd "device gpio" .Cd "device gpioiic" .Cd "device iic" .Cd "device iicbb" .Cd "device iicbus" .Ed .Sh DESCRIPTION The .Nm driver provides an IIC bit-banging interface using two GPIO pins for the SCL and SDA on the .Nm gpiobus . .Nm implements an open collector kind of output, as recommended by the standard, when driving the pins on the .Nm gpiobus , i.e, they are never switched to the logical value of '1', or they are '0' or simply open (Hi-Z/tri-state). So the pullup resistors are required so .Nm can work. .Pp On a .Xr device.hints 5 based system, like .Li MIPS , these values are configurable for the .Nm : .Bl -tag -width ".Va hint.gpioiic.%d.atXXX" .It Va hint.gpioiic.%d.at The .Nm gpiobus you are attaching to. Normally just gpiobus0. .It Va hint.gpioiic.%d.pins This is a bitmask of the pins on the .Nm gpiobus that are to be used for SCLOCK and SDATA from the GPIO IIC bit-banging bus. To configure pin 0 and 7, use the bitmask of 0b10000001 and convert it to a hexadecimal value of 0x0081. Please note that this mask should only ever have two bits set (any other bits - i.e., pins - will be ignored). .It Va hint.gpioiic.%d.scl Indicates which bit in the .Va hint.gpioiic.%d.pins should be used as the SCLOCK source. Optional, defaults to 0. .It Va hint.gpioiic.%d.sda Indicates which bit in the .Va hint.gpioiic.%d.pins should be used as the SDATA source. Optional, defaults to 1. .El .Pp On a .Xr FDT 4 based system, like .Li ARM , the DTS part for a .Nm gpioiic device usually looks like: .Bd -literal gpio: gpio { gpio-controller; ... gpioiic0 { compatible = "gpioiic"; /* * Attach to GPIO pins 21 and 22. Set them * initially as inputs. */ gpios = <&gpio 21 1 0 &gpio 22 1 0>; scl = <0>; /* GPIO pin 21 - optional */ sda = <1>; /* GPIO pin 22 - optional */ /* This is an example of a gpioiic child. */ gpioiic-child0 { compatible = "lm75"; i2c-address = <0x4f>; }; }; }; .Ed .Pp Where: .Bl -tag -width ".Va compatible" .It Va compatible Should always be set to "gpioiic". .It Va gpios The .Va gpios property indicates which GPIO pins should be used for SCLOCK and SDATA on the GPIO IIC bit-banging bus. For more details about the .Va gpios property, please consult -.Pa /usr/src/sys/boot/fdt/dts/bindings-gpio.txt . +.Pa /usr/src/sys/dts/bindings-gpio.txt . .It Va scl The .Va scl option indicates which bit in the .Va gpios should be used as the SCLOCK source. Optional, defaults to 0. .It Va sda The .Va sda option indicates which bit in the .Va gpios should be used as the SDATA source. Optional, defaults to 1. .El .Sh SEE ALSO .Xr fdt 4 , .Xr gpio 4 , .Xr gpioled 4 , .Xr iic 4 , .Xr iicbb 4 , .Xr iicbus 4 .Sh HISTORY The .Nm manual page first appeared in .Fx 10.1 . .Sh AUTHORS This manual page was written by .An Luiz Otavio O Souza . Index: head/share/man/man4/gpioled.4 =================================================================== --- head/share/man/man4/gpioled.4 (revision 325825) +++ head/share/man/man4/gpioled.4 (revision 325826) @@ -1,158 +1,158 @@ .\" Copyright (c) 2013, Luiz Otavio O Souza .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" .\" $FreeBSD$ .\" .Dd July 30, 2016 .Dt GPIOLED 4 .Os .Sh NAME .Nm gpioled .Nd GPIO LED generic device driver .Sh SYNOPSIS To compile this driver into the kernel, place the following lines in your kernel configuration file: .Bd -ragged -offset indent .Cd "device gpio" .Cd "device gpioled" .Ed .Sh DESCRIPTION The .Nm driver provides glue to attach a .Xr led 4 compatible device to a GPIO pin. Each LED in the system has a .Pa name which is used to export a device as .Pa /dev/led/ . The GPIO pin can then be controlled by writing to this device as described in .Xr led 4 . .Pp On a .Xr device.hints 5 based system, like .Li MIPS , these values are configurable for .Nm : .Bl -tag -width ".Va hint.gpioiic.%d.atXXX" .It Va hint.gpioled.%d.at The gpiobus you are attaching to. Normally assigned to gpiobus0. .It Va hint.gpioled.%d.name Arbitrary name of device in .Pa /dev/led/ to create for .Xr led 4 . .It Va hint.gpioled.%d.pins Which pin on the GPIO interface to map to this instance. Please note that this mask should only ever have one bit set (any other bits - i.e., pins - will be ignored). .It Va hint.gpioled.%d.invert If set to 1, the pin will be set to 0 to light the LED, and 1 to clear it. .El .Pp On a .Xr FDT 4 based system, like .Li ARM , the DTS part for a .Nm gpioled device usually looks like: .Bd -literal gpio: gpio { gpio-controller; ... led0 { compatible = "gpioled"; gpios = <&gpio 16 2 0>; /* GPIO pin 16. */ name = "ok"; }; led1 { compatible = "gpioled"; gpios = <&gpio 17 2 0>; /* GPIO pin 17. */ name = "user-led1"; }; }; .Ed .Pp Optionally, you can choose to combine all the LEDs under a single .Dq gpio-leds compatible node: .Bd -literal simplebus0 { ... leds { compatible = "gpio-leds"; led0 { gpios = <&gpio 16 2 0>; name = "ok" }; led1 { gpios = <&gpio 17 2 0>; name = "user-led1" }; }; }; .Ed .Pp Both methods are equally supported and it is possible to have the LEDs defined with any sort of mix between the methods. The only restriction is that a GPIO pin cannot be mapped by two different (gpio)leds. .Pp For more details about the .Va gpios property, please consult -.Pa /usr/src/sys/boot/fdt/dts/bindings-gpio.txt . +.Pa /usr/src/sys/dts/bindings-gpio.txt . .Pp The property .Va name is the arbitrary name of the device in .Pa /dev/led/ to create for .Xr led 4 . .Sh SEE ALSO .Xr fdt 4 , .Xr gpio 4 , .Xr gpioiic 4 , .Xr led 4 .Sh HISTORY The .Nm manual page first appeared in .Fx 10.1 . .Sh AUTHORS This manual page was written by .An Luiz Otavio O Souza . Index: head/share/man/man4/owc.4 =================================================================== --- head/share/man/man4/owc.4 (revision 325825) +++ head/share/man/man4/owc.4 (revision 325826) @@ -1,95 +1,95 @@ .\" .\" Copyright (c) 2015 M. Warner Losh .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. The name of the author may not be used to endorse or promote products .\" derived from this software without specific prior written permission. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" .\" $FreeBSD$ .\" .Dd July 20, 2015 .Dt OWC 4 .Os .Sh NAME .Nm owc .Nd Dallas Semiconductor 1-Wire Controller .Sh SYNOPSIS .Cd device owc .Sh DESCRIPTION The .Nm module implements Dallas Semiconductor 1-Wire signaling. It attaches the .Xr ow 4 driver 1-Wire bus protocol. The .Nm device implements the Link Layer of the 1-Wire bus protocol stack. .Pp Bit banging a pin on a .Xr gpiobus 4 is the only supported controller. Both standard and overdrive transfer timings are implemented. Strong pull-up functionality needed to support parasitic mode is not implemented. .Pp To enable 1-Wire for FDT systems requires modifying the DTS for your board to add something like: .Bd -literal / { ... onewire { compatible = "w1-gpio"; gpios = <&gpio 4 1>; }; ... }; .Ed .Pp The gpios property describes the GPIO pin the 1-Wire bus is connected to. For more details about the .Va gpios property, please consult -.Pa /usr/src/sys/boot/fdt/dts/bindings-gpio.txt . +.Pa /usr/src/sys/dts/bindings-gpio.txt . .Sh SEE ALSO .Xr gpiobus 4 , .Xr ow 4 , .Xr ow_temp 4 , .Xr owll 9 , .Xr own 9 .Sh LEGAL .Tn 1-Wire is a registered trademark of Maxim Integrated Products, Inc. .Sh HISTORY The .Nm driver first appeared in .Fx 11.0 . .Sh AUTHORS The .Nm device driver and this manual page were written by .An Warner Losh . .Sh CAVEATS The gpio driver implements timing by busy waiting, which can cause a high load on slower systems. .Sh BUGS Overdrive mode has not actually been tested. Index: head/sys/boot/fdt/dts/Makefile.inc =================================================================== --- head/sys/boot/fdt/dts/Makefile.inc (revision 325825) +++ head/sys/boot/fdt/dts/Makefile.inc (nonexistent) @@ -1,10 +0,0 @@ -# $FreeBSD$ - -SYSDIR?=${.CURDIR}/../../../.. - -test-dts: -.for dts in ${DTS} - @env MACHINE=`basename ${.CURDIR}` ${SYSDIR}/tools/fdt/make_dtb.sh ${SYSDIR} ${dts} /tmp - -.endfor - Property changes on: head/sys/boot/fdt/dts/Makefile.inc ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/bindings-mpp.txt =================================================================== --- head/sys/boot/fdt/dts/bindings-mpp.txt (revision 325825) +++ head/sys/boot/fdt/dts/bindings-mpp.txt (nonexistent) @@ -1,50 +0,0 @@ -$FreeBSD$ - -* Multi purpose pin (MPP) configuration. - -Required properties: - -- pin-map : array of pin configurations. Each pin is defined by 2 cells, - respectively: . Pins not specified in the pin-map property - are assumed to have default value of = 0, which means GPIO. - - - pin : pin number. - - - function : function ID of the pin according to the assignment tables in - User Manual. Each pin can have many possible functions depending on the - MPP unit incarnation. - -- pin-count: number of the physical MPP connections on the SOC (depending on - the model it can be 24-50, or possibly else in future devices). - -Example: - - mpp@10000 { - #pin-cells = <2>; - compatible = "mrvl,mpp"; - reg = <0x10000 0x34>; - pin-count= <50>; - pin-map = < - 0 1 /* MPP[0]: NF_IO[2] */ - 1 1 /* MPP[1]: NF_IO[3] */ - 2 1 /* MPP[2]: NF_IO[4] */ - 3 1 /* MPP[3]: NF_IO[5] */ - 4 1 /* MPP[4]: NF_IO[6] */ - 5 1 /* MPP[5]: NF_IO[7] */ - 6 1 /* MPP[6]: SYSRST_OUTn */ - 7 2 /* MPP[7]: SPI_SCn */ - 8 1 /* MPP[8]: TW_SDA */ - 9 1 /* MPP[9]: TW_SCK */ - 10 3 /* MPP[10]: UA0_TXD */ - 11 3 /* MPP[11]: UA0_RXD */ - 12 1 /* MPP[12]: SD_CLK */ - 13 1 /* MPP[13]: SD_CMD */ - 14 1 /* MPP[14]: SD_D[0] */ - 15 1 /* MPP[15]: SD_D[1] */ - 16 1 /* MPP[16]: SD_D[2] */ - 17 1 /* MPP[17]: SD_D[3] */ - 18 1 /* MPP[18]: NF_IO[0] */ - 19 1 /* MPP[19]: NF_IO[1] */ - 20 5 /* MPP[20]: SATA1_AC */ - 21 5 >; /* MPP[21]: SATA0_AC */ - }; Property changes on: head/sys/boot/fdt/dts/bindings-mpp.txt ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/bindings-gpio.txt =================================================================== --- head/sys/boot/fdt/dts/bindings-gpio.txt (revision 325825) +++ head/sys/boot/fdt/dts/bindings-gpio.txt (nonexistent) @@ -1,101 +0,0 @@ -$FreeBSD$ - -GPIO configuration. -=================== - -1. Properties for GPIO Controllers - -1.1 #gpio-cells - -Property: #gpio-cells - -Value type: - -Description: The #gpio-cells property defines the number of cells required - to encode a gpio specifier. - - -1.2 gpio-controller - -Property: gpio-controller - -Value type: - -Description: The presence of a gpio-controller property defines a node as a - GPIO controller node. - - -1.3 pin-count - -Property: pin-count - -Value type: - -Description: The pin-count property defines the number of GPIO pins. - - -1.4 Example - - GPIO: gpio@10100 { - #gpio-cells = <3>; - compatible = "mrvl,gpio"; - reg = <0x10100 0x20>; - gpio-controller; - interrupts = <6 7 8 9>; - interrupt-parent = <&PIC>; - pin-count = <50> - }; - -2. Properties for GPIO consumer nodes. - -2.1 gpios - -Property: gpios - -Value type: encoded as arbitrary number of GPIO - specifiers. - -Description: The gpios property of a device node defines the GPIO or GPIOs - that are used by the device. The value of the gpios property - consists of an arbitrary number of GPIO specifiers. - - The first cell of the GPIO specifier is phandle of the node's - parent GPIO controller and remaining cells are defined by the - binding describing the GPIO parent, typically include - information like pin number, direction and various flags. - -Example: - gpios = <&GPIO 0 1 0 /* GPIO[0]: IN, NONE */ - &GPIO 1 2 0>; /* GPIO[1]: OUT, NONE */ - - -3. "mrvl,gpio" controller GPIO specifier - - - - -pin: 0-MAX GPIO pin number. - -dir: - 1 IN Input direction. - 2 OUT Output direction. - -flags: - 0x0000---- IN_NONE - 0x0001---- IN_POL_LOW Polarity low (active-low). - 0x0002---- IN_IRQ_EDGE Interrupt, edge triggered. - 0x0004---- IN_IRQ_LEVEL Interrupt, level triggered. - - 0x----0000 OUT_NONE - 0x----0001 OUT_BLINK Blink on the pin. - 0x----0002 OUT_OPEN_DRAIN Open drain output line. - 0x----0004 OUT_OPEN_SRC Open source output line. - - -Example: - gpios = <&GPIO 0 1 0x00000000 /* GPIO[0]: IN */ - &GPIO 1 2 0x00000000 /* GPIO[1]: OUT */ - &GPIO 2 1 0x00020000 /* GPIO[2]: IN, IRQ (edge) */ - &GPIO 3 1 0x00040000 /* GPIO[3]: IN, IRQ (level) */ - ... - &GPIO 10 2 0x00000001>; /* GPIO[10]: OUT, blink */ Property changes on: head/sys/boot/fdt/dts/bindings-gpio.txt ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/bindings-localbus.txt =================================================================== --- head/sys/boot/fdt/dts/bindings-localbus.txt (revision 325825) +++ head/sys/boot/fdt/dts/bindings-localbus.txt (nonexistent) @@ -1,83 +0,0 @@ -$FreeBSD$ - -Marvell Device bus (localbus) configuration. -============================================ - -1. Properties for localbus nodes - -1.1 ranges - -Property: ranges - -Value type: encoded as arbitrary number of localbus - nodes specifiers. - -Description: ranges property defines values used for mapping devices - connected to localbus, in Marvell devices it is used also for - setting decoding windows. - - a) child node address-cells: - - first cell: number of bank (chip select) - - second cell: (Marvell devices) Target ID for decoding - windows setup - - b) parent node address cells: - - address offset: used with parent's node base address to - specify base address of mapped device - - c) child node size-cells: - - size: defines amount of memory that should be reserved for - device - -1.2 bank-count - -Property: bank-count - -Value type: - -Description: The bank_count property defines maximum number of banks on - localbus node. Bank is most often interpreted as device chip - select, but may also describe another device (e.g. SPI flash). - -1.3 Example - - localbus@0 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "mrvl,lbc"; - bank-count = <5>; - - /* This reflects CPU decode windows setup. */ - ranges = <0x0 0x2f 0xb2200000 0x00100000 - 0x1 0x3e 0xb2100000 0x00100000 - 0x2 0x3d 0xb0000000 0x02000000 - 0x3 0x3b 0xb2000000 0x00100000>; - }; - -2. Properties for localbus consumer nodes: - -2.1 reg - -Property: reg - -Value type: - -Description: A standard property required for localbus child nodes. Defines - the device memory region. - - a) first cell: number of bank (chip select) - - b) address offset: used with address offset from parent's ranges - for corresponding bank to specify base address of - the device - - c) size: defines size of the device memory region - -2.2 Example - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x00100000>; - }; Property changes on: head/sys/boot/fdt/dts/bindings-localbus.txt ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/Makefile =================================================================== --- head/sys/boot/fdt/dts/Makefile (revision 325825) +++ head/sys/boot/fdt/dts/Makefile (nonexistent) @@ -1,5 +0,0 @@ -# $FreeBSD$ - -SUBDIR=arm arm64 mips powerpc - -.include Property changes on: head/sys/boot/fdt/dts/Makefile ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/tegra20-paz00.dts =================================================================== --- head/sys/boot/fdt/dts/arm/tegra20-paz00.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/tegra20-paz00.dts (nonexistent) @@ -1,58 +0,0 @@ -/*- - * Copyright (c) 2011 The FreeBSD Foundation - * Copyright (c) 2012 Andrew Turner - * All rights reserved. - * - * Developed by Damjan Marion - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ -/dts-v1/; - -/include/ "tegra20.dtsi" - -/ { - model = "Toshiba AC100 / Dynabook AZ"; - - aliases { - serial0 = &serial0; - soc = &SOC; - }; - - memory { - device_type = "memory"; - reg = < 0x00000000 0x20000000 >; /* 512MB RAM at 0x0 */ - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; - - SOC: tegra20@0 { - serial0: serial@70006000 { - }; - }; -}; - Property changes on: head/sys/boot/fdt/dts/arm/tegra20-paz00.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/sam9260ek.dts =================================================================== --- head/sys/boot/fdt/dts/arm/sam9260ek.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/sam9260ek.dts (nonexistent) @@ -1,37 +0,0 @@ -/* - * SAM9260EK eval board - Warner Losh public domain - * - * $FreeBSD$ - */ -/dts-v1/; -#include "sam9260ek_common.dtsi" - -/ { - model = "Atmel at91sam9260ek"; - compatible = "atmel,at91sam9260ek", "atmel,at91sam9260", "atmel,at91sam9"; - - leds { - compatible = "gpio-leds"; - - ds1 { - label = "ds1"; - gpios = <&pioA 9 0>; - linux,default-trigger = "heartbeat"; - }; - - ds5 { - label = "ds5"; - gpios = <&pioA 6 1>; - }; - }; - - aliases { - dbgu = &dbgu; - }; - - - chosen { - stdin = "dbgu"; - stdout = "dbgu"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/sam9260ek.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/exynos5250-arndale.dts =================================================================== --- head/sys/boot/fdt/dts/arm/exynos5250-arndale.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/exynos5250-arndale.dts (nonexistent) @@ -1,57 +0,0 @@ -/*- - * Copyright (c) 2013 Ruslan Bukin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/include/ "exynos5250.dtsi" - -/ { - model = "Arndale Board"; - - memory { - device_type = "memory"; - reg = < 0x40000000 0x80000000 >; /* 2G */ - }; - - SOC: Exynos5@0 { - - pad0: pad@11400000 { - status = "okay"; - }; - - serial2: serial@12C20000 { - status = "okay"; - }; - - }; - - chosen { - stdin = &serial2; - stdout = &serial2; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/exynos5250-arndale.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/sheevaplug.dts =================================================================== --- head/sys/boot/fdt/dts/arm/sheevaplug.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/sheevaplug.dts (nonexistent) @@ -1,253 +0,0 @@ -/* - * Copyright (c) 2010 The FreeBSD Foundation - * All rights reserved. - * - * This software was developed by Semihalf under sponsorship from - * the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Marvell SheevaPlug Device Tree Source. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "mrvl,SheevaPlug"; - compatible = "SheevaPlug"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - mpp = &MPP; - serial0 = &serial0; - serial1 = &serial1; - soc = &SOC; - sram = &SRAM; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,88FR131"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x20000000>; // 512M at 0x0 - }; - - localbus@0 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "mrvl,lbc"; - bank-count = <3>; - - /* This reflects CPU decode windows setup. */ - ranges = <0x0 0x2f 0xf9300000 0x00100000>; - - nand@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "mrvl,nfc"; - reg = <0x0 0x0 0x00100000>; - bank-width = <2>; - device-width = <1>; - - slice@0 { - reg = <0x0 0x200000>; - label = "u-boot"; - read-only; - }; - - slice@200000 { - reg = <0x200000 0x1fe00000>; - label = "root"; - }; - }; - }; - - SOC: soc88f6281@f1000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0xf1000000 0x00100000>; - bus-frequency = <0>; - - PIC: pic@20200 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x20200 0x3c>; - compatible = "mrvl,pic"; - }; - - timer@20300 { - compatible = "mrvl,timer"; - reg = <0x20300 0x30>; - interrupts = <1>; - interrupt-parent = <&PIC>; - mrvl,has-wdt; - }; - - MPP: mpp@10000 { - #pin-cells = <2>; - compatible = "mrvl,mpp"; - reg = <0x10000 0x34>; - pin-count = <50>; - pin-map = < - 0 1 /* MPP[0]: NF_IO[2] */ - 1 1 /* MPP[1]: NF_IO[3] */ - 2 1 /* MPP[2]: NF_IO[4] */ - 3 1 /* MPP[3]: NF_IO[5] */ - 4 1 /* MPP[4]: NF_IO[6] */ - 5 1 /* MPP[5]: NF_IO[7] */ - 6 1 /* MPP[6]: SYSRST_OUTn */ - 8 2 /* MPP[8]: UA0_RTS */ - 9 2 /* MPP[9]: UA0_CTS */ - 10 3 /* MPP[10]: UA0_TXD */ - 11 3 /* MPP[11]: UA0_RXD */ - 12 1 /* MPP[12]: SD_CLK */ - 13 1 /* MPP[13]: SD_CMD */ - 14 1 /* MPP[14]: SD_D[0] */ - 15 1 /* MPP[15]: SD_D[1] */ - 16 1 /* MPP[16]: SD_D[2] */ - 17 1 /* MPP[17]: SD_D[3] */ - 18 1 /* MPP[18]: NF_IO[0] */ - 19 1 /* MPP[19]: NF_IO[1] */ - 29 1 >; /* MPP[29]: TSMP[9] */ - }; - - GPIO: gpio@10100 { - #gpio-cells = <3>; - compatible = "mrvl,gpio"; - reg = <0x10100 0x20>; - gpio-controller; - interrupts = <35 36 37 38 39 40 41>; - interrupt-parent = <&PIC>; - }; - - rtc@10300 { - compatible = "mrvl,rtc"; - reg = <0x10300 0x08>; - }; - - twsi@11000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,twsi"; - reg = <0x11000 0x20>; - interrupts = <43>; - interrupt-parent = <&PIC>; - }; - - enet0: ethernet@72000 { - #address-cells = <1>; - #size-cells = <1>; - model = "V2"; - compatible = "mrvl,ge"; - reg = <0x72000 0x2000>; - ranges = <0x0 0x72000 0x2000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <12 13 14 11 46>; - interrupt-parent = <&PIC>; - phy-handle = <&phy0>; - - mdio@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,mdio"; - - phy0: ethernet-phy@0 { - reg = <0x0>; - }; - }; - }; - - serial0: serial@12000 { - compatible = "ns16550"; - reg = <0x12000 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <33>; - interrupt-parent = <&PIC>; - }; - - serial1: serial@12100 { - compatible = "ns16550"; - reg = <0x12100 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <34>; - interrupt-parent = <&PIC>; - }; - - crypto@30000 { - compatible = "mrvl,cesa"; - reg = <0x30000 0x1000 /* tdma base reg chan 0 */ - 0x3D000 0x1000>; /* cesa base reg chan 0 */ - interrupts = <22>; - interrupt-parent = <&PIC>; - - sram-handle = <&SRAM>; - }; - - usb@50000 { - compatible = "mrvl,usb-ehci", "usb-ehci"; - reg = <0x50000 0x1000>; - interrupts = <48 19>; - interrupt-parent = <&PIC>; - }; - - xor@60000 { - compatible = "mrvl,xor"; - reg = <0x60000 0x1000>; - interrupts = <5 6 7 8>; - interrupt-parent = <&PIC>; - }; - }; - - SRAM: sram@fd000000 { - compatible = "mrvl,cesa-sram"; - reg = <0xfd000000 0x00100000>; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/sheevaplug.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/bcm2835.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/bcm2835.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/bcm2835.dtsi (nonexistent) @@ -1,505 +0,0 @@ -/* - * Copyright (c) 2012 Oleksandr Tymoshenko - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/ { - #address-cells = <1>; - #size-cells = <1>; - - cpus { - cpu@0 { - compatible = "arm,1176jzf-s"; - }; - }; - - - SOC: axi { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x20000000 0x01000000>; - ranges = <0 0x20000000 0x01000000>; - - intc: interrupt-controller { - compatible = "broadcom,bcm2835-armctrl-ic", - "broadcom,bcm2708-armctrl-ic"; - reg = <0xB200 0x200>; - - interrupt-controller; - #interrupt-cells = <1>; - - /* Bank 0 - * 0: ARM_TIMER - * 1: ARM_MAILBOX - * 2: ARM_DOORBELL_0 - * 3: ARM_DOORBELL_1 - * 4: VPU0_HALTED - * 5: VPU1_HALTED - * 6: ILLEGAL_TYPE0 - * 7: ILLEGAL_TYPE1 - */ - - /* Bank 1 - * 0: TIMER0 16: DMA0 - * 1: TIMER1 17: DMA1 - * 2: TIMER2 18: VC_DMA2 - * 3: TIMER3 19: VC_DMA3 - * 4: CODEC0 20: DMA4 - * 5: CODEC1 21: DMA5 - * 6: CODEC2 22: DMA6 - * 7: VC_JPEG 23: DMA7 - * 8: ISP 24: DMA8 - * 9: VC_USB 25: DMA9 - * 10: VC_3D 26: DMA10 - * 11: TRANSPOSER 27: DMA11 - * 12: MULTICORESYNC0 28: DMA12 - * 13: MULTICORESYNC1 29: AUX - * 14: MULTICORESYNC2 30: ARM - * 15: MULTICORESYNC3 31: VPUDMA - */ - - /* Bank 2 - * 0: HOSTPORT 16: SMI - * 1: VIDEOSCALER 17: GPIO0 - * 2: CCP2TX 18: GPIO1 - * 3: SDC 19: GPIO2 - * 4: DSI0 20: GPIO3 - * 5: AVE 21: VC_I2C - * 6: CAM0 22: VC_SPI - * 7: CAM1 23: VC_I2SPCM - * 8: HDMI0 24: VC_SDIO - * 9: HDMI1 25: VC_UART - * 10: PIXELVALVE1 26: SLIMBUS - * 11: I2CSPISLV 27: VEC - * 12: DSI1 28: CPG - * 13: PWA0 29: RNG - * 14: PWA1 30: VC_ARASANSDIO - * 15: CPR 31: AVSPMON - */ - }; - - timer { - compatible = "broadcom,bcm2835-system-timer", - "broadcom,bcm2708-system-timer"; - reg = <0x3000 0x1000>; - interrupts = <8 9 10 11>; - interrupt-parent = <&intc>; - - clock-frequency = <1000000>; - }; - - armtimer { - /* Not AMBA compatible */ - compatible = "broadcom,bcm2835-sp804", "arm,sp804"; - reg = <0xB400 0x24>; - interrupts = <0>; - interrupt-parent = <&intc>; - }; - - watchdog0 { - compatible = "broadcom,bcm2835-wdt", - "broadcom,bcm2708-wdt"; - reg = <0x10001c 0x0c>; /* 0x1c, 0x20, 0x24 */ - }; - - gpio: gpio { - compatible = "broadcom,bcm2835-gpio", - "broadcom,bcm2708-gpio"; - reg = <0x200000 0xb0>; - - /* Unusual arrangement of interrupts - * (determined by testing) - * 17: Bank 0 (GPIOs 0-31) - * 19: Bank 1 (GPIOs 32-53) - * 18: Bank 2 - * 20: All banks (GPIOs 0-53) - */ - interrupts = <57 59 58 60>; - interrupt-parent = <&intc>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - - pinctrl-names = "default"; - pinctrl-0 = <&pins_reserved>; - - /* Pins that can short 3.3V to GND in output mode: 46-47 - * Pins used by VideoCore: 48-53 - */ - broadcom,read-only = <46>, <47>, <48>, <49>, <50>, - <51>, <52>, <53>; - - /* BSC0 */ - pins_bsc0_a: bsc0_a { - broadcom,pins = <0>, <1>; - }; - - pins_bsc0_b: bsc0_b { - broadcom,pins = <28>, <29>; - }; - - pins_bsc0_c: bsc0_c { - broadcom,pins = <44>, <45>; - }; - - /* BSC1 */ - pins_bsc1_a: bsc1_a { - broadcom,pins = <2>, <3>; - }; - - pins_bsc1_b: bsc1_b { - broadcom,pins = <44>, <45>; - }; - - /* GPCLK0 */ - pins_gpclk0_a: gpclk0_a { - broadcom,pins = <4>; - }; - - pins_gpclk0_b: gpclk0_b { - broadcom,pins = <20>; - }; - - pins_gpclk0_c: gpclk0_c { - broadcom,pins = <32>; - }; - - pins_gpclk0_d: gpclk0_d { - broadcom,pins = <34>; - }; - - /* GPCLK1 */ - pins_gpclk1_a: gpclk1_a { - broadcom,pins = <5>; - }; - - pins_gpclk1_b: gpclk1_b { - broadcom,pins = <21>; - }; - - pins_gpclk1_c: gpclk1_c { - broadcom,pins = <42>; - }; - - pins_gpclk1_d: gpclk1_d { - broadcom,pins = <44>; - }; - - /* GPCLK2 */ - pins_gpclk2_a: gpclk2_a { - broadcom,pins = <6>; - }; - - pins_gpclk2_b: gpclk2_b { - broadcom,pins = <43>; - }; - - /* SPI0 */ - pins_spi0_a: spi0_a { - broadcom,pins = <7>, <8>, <9>, <10>, <11>; - }; - - pins_spi0_b: spi0_b { - broadcom,pins = <35>, <36>, <37>, <38>, <39>; - }; - - /* PWM */ - pins_pwm0_a: pwm0_a { - broadcom,pins = <12>; - }; - - pins_pwm0_b: pwm0_b { - broadcom,pins = <18>; - }; - - pins_pwm0_c: pwm0_c { - broadcom,pins = <40>; - }; - - pins_pwm1_a: pwm1_a { - broadcom,pins = <13>; - }; - - pins_pwm1_b: pwm1_b { - broadcom,pins = <19>; - }; - - pins_pwm1_c: pwm1_c { - broadcom,pins = <41>; - }; - - pins_pwm1_d: pwm1_d { - broadcom,pins = <45>; - }; - - /* UART0 */ - pins_uart0_a: uart0_a { - broadcom,pins = <14>, <15>; - }; - - pins_uart0_b: uart0_b { - broadcom,pins = <32>, <33>; - }; - - pins_uart0_c: uart0_c { - broadcom,pins = <36>, <37>; - }; - - pins_uart0_fc_a: uart0_fc_a { - broadcom,pins = <16>, <17>; - }; - - pins_uart0_fc_b: uart0_fc_b { - broadcom,pins = <30>, <31>; - }; - - pins_uart0_fc_c: uart0_fc_c { - broadcom,pins = <39>, <38>; - }; - - /* PCM */ - pins_pcm_a: pcm_a { - broadcom,pins = <18>, <19>, <20>, <21>; - }; - - pins_pcm_b: pcm_b { - broadcom,pins = <28>, <29>, <30>, <31>; - }; - - /* Secondary Address Bus */ - pins_sm_addr_a: sm_addr_a { - broadcom,pins = <5>, <4>, <3>, <2>, <1>, <0>; - }; - - pins_sm_addr_b: sm_addr_b { - broadcom,pins = <33>, <32>, <31>, <30>, <29>, - <28>; - }; - - pins_sm_ctl_a: sm_ctl_a { - broadcom,pins = <6>, <7>; - }; - - pins_sm_ctl_b: sm_ctl_b { - broadcom,pins = <34>, <35>; - }; - - pins_sm_data_8bit_a: sm_data_8bit_a { - broadcom,pins = <8>, <9>, <10>, <11>, <12>, - <13>, <14>, <15>; - }; - - pins_sm_data_8bit_b: sm_data_8bit_b { - broadcom,pins = <36>, <37>, <38>, <39>, <40>, - <41>, <42>, <43>; - }; - - pins_sm_data_16bit: sm_data_16bit { - broadcom,pins = <16>, <17>, <18>, <19>, <20>, - <21>, <22>, <23>; - }; - - pins_sm_data_18bit: sm_data_18bit { - broadcom,pins = <24>, <25>; - }; - - /* BSCSL */ - pins_bscsl: bscsl { - broadcom,pins = <18>, <19>; - }; - - /* SPISL */ - pins_spisl: spisl { - broadcom,pins = <18>, <19>, <20>, <21>; - }; - - /* SPI1 */ - pins_spi1: spi1 { - broadcom,pins = <16>, <17>, <18>, <19>, <20>, - <21>; - }; - - /* UART1 */ - pins_uart1_a: uart1_a { - broadcom,pins = <14>, <15>; - }; - - pins_uart1_b: uart1_b { - broadcom,pins = <32>, <33>; - }; - - pins_uart1_c: uart1_c { - broadcom,pins = <40>, <41>; - }; - - pins_uart1_fc_a: uart1_fc_a { - broadcom,pins = <16>, <17>; - }; - - pins_uart1_fc_b: uart1_fc_b { - broadcom,pins = <30>, <31>; - }; - - pins_uart1_fc_c: uart1_fc_c { - broadcom,pins = <43>, <42>; - }; - - /* SPI2 */ - pins_spi2: spi2 { - broadcom,pins = <40>, <41>, <42>, <43>, <44>, - <45>; - }; - - /* ARM JTAG */ - pins_arm_jtag_trst: arm_jtag_trst { - broadcom,pins = <22>; - }; - - pins_arm_jtag_a: arm_jtag_a { - broadcom,pins = <4>, <5>, <6>, <12>, <13>; - }; - - pins_arm_jtag_b: arm_jtag_b { - broadcom,pins = <23>, <24>, <25>, <26>, <27>; - }; - - /* Reserved */ - pins_reserved: reserved { - broadcom,pins = <48>, <49>, <50>, <51>, <52>, - <53>; - }; - }; - - rng { - compatible = "broadcom,bcm2835-rng", - "broadcom,bcm2708-rng"; - reg = <0x104000 0x20>; - interrupts = <69>; - interrupt-parent = <&intc>; - }; - - bsc0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "broadcom,bcm2835-bsc", - "broadcom,bcm2708-bsc"; - reg = <0x205000 0x20>; - interrupts = <61>; - interrupt-parent = <&intc>; - }; - - bsc1 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "broadcom,bcm2835-bsc", - "broadcom,bcm2708-bsc"; - reg = <0x804000 0x20>; - interrupts = <61>; - interrupt-parent = <&intc>; - }; - - spi0 { - compatible = "broadcom,bcm2835-spi", - "broadcom,bcm2708-spi"; - reg = <0x204000 0x20>; - interrupts = <62>; - interrupt-parent = <&intc>; - }; - - dma: dma { - compatible = "broadcom,bcm2835-dma", - "broadcom,bcm2708-dma"; - reg = <0x7000 0x1000>, <0xE05000 0x1000>; - interrupts = <24 25 26 27 28 29 30 31 32 33 34 35 36>; - interrupt-parent = <&intc>; - - broadcom,channels = <0x7f35>; - }; - - vc_mbox: mbox { - compatible = "broadcom,bcm2835-mbox", - "broadcom,bcm2708-mbox"; - reg = <0xB880 0x40>; - interrupts = <1>; - interrupt-parent = <&intc>; - - /* Channels - * 0: Power - * 1: Frame buffer - * 2: Virtual UART - * 3: VCHIQ - * 4: LEDs - * 5: Buttons - * 6: Touch screen - */ - }; - - sdhci { - compatible = "broadcom,bcm2835-sdhci", - "broadcom,bcm2708-sdhci"; - reg = <0x300000 0x100>; - interrupts = <70>; - interrupt-parent = <&intc>; - - clock-frequency = <50000000>; /* Set by VideoCore */ - }; - - uart0: uart0 { - compatible = "broadcom,bcm2835-uart", - "broadcom,bcm2708-uart", "arm,pl011", - "arm,primecell"; - reg = <0x201000 0x1000>; - interrupts = <65>; - interrupt-parent = <&intc>; - - clock-frequency = <3000000>; /* Set by VideoCore */ - reg-shift = <2>; - }; - - vchiq: vchiq { - compatible = "broadcom,bcm2835-vchiq"; - reg = <0xB800 0x50>; - interrupts = <2>; - interrupt-parent = <&intc>; - cache-line-size = <32>; - }; - - usb { - compatible = "broadcom,bcm2835-usb", - "broadcom,bcm2708-usb", - "synopsys,designware-hs-otg2"; - reg = <0x980000 0x20000>; - interrupts = <17>; - interrupt-parent = <&intc>; - #address-cells = <1>; - #size-cells = <0>; - }; - - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/bcm2835.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/rt1310a.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/rt1310a.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/rt1310a.dtsi (nonexistent) @@ -1,159 +0,0 @@ -/* - * Copyright (c) 2011 Jakub Klama - * Copyright (c) 2015 Hiroki Mori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Ralink RT1310A Device Tree Source. - * - * $FreeBSD$ - */ - -/ { - compatible = "ralink,rt1310a-soc"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - serial0 = &serial0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,926EJ-S"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x40000000 0x1000000>; // 16M at 0x40000000 - }; - - localbus@1f000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0x1f000000 0x400000>; - }; - - ahb@19C00000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0x19C00000 0xE0000>; - bus-frequency = <13000000>; - - PIC: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x40000 0x20000>; - compatible = "rt,pic"; - }; - - fvmdio@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fv,mdio"; - reg = <0x80000 0x20000>; - }; - - enet0:fv_mac0@80000 { - compatible = "fv,ethernet"; - reg = <0x80000 0x20000>; - interrupts = <7>; - interrupt-parent = <&PIC>; - - }; - - enet1:fv_mac1@A0000 { - compatible = "fv,ethernet"; - reg = <0xA0000 0x20000>; - interrupts = <8>; - interrupt-parent = <&PIC>; - }; - - }; - - apb@1E800000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0x1E800000 0x800000>; - bus-frequency = <75000000>; - - timer@000000 { - compatible = "rt,timer"; - reg = <0x0 0x10 - 0x10 0x10 - 0x20 0x10 - 0x30 0x10>; - interrupts = <3 4 5>; - interrupt-parent = <&PIC>; - }; - - rtc@20000 { - compatible = "rt,rtc"; - interrupts = <6>; - reg = <0x20000 0x20000>; - }; - - serial0: serial@40000 { - compatible = "ns16550"; - reg = <0x40000 0x20000>; - interrupts = <1>; - reg-shift = <2>; - clock-frequency = <6758400>; - current-speed = <38400>; - interrupt-parent = <&PIC>; - }; - - gpio0: gpio@A0000 { - compatible = "ralink,rt1310-gpio"; - gpio-controller; - #gpio-cells = <2>; - interrupts = <8>; - reg = <0xA0000 0x20000>; - }; - }; - - -/* - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -*/ -}; - Property changes on: head/sys/boot/fdt/dts/arm/rt1310a.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/bcm2836.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/bcm2836.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/bcm2836.dtsi (nonexistent) @@ -1,498 +0,0 @@ -/* - * Copyright (c) 2012 Oleksandr Tymoshenko - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/ { - #address-cells = <1>; - #size-cells = <1>; - - timer { - compatible = "arm,armv7-timer"; - clock-frequency = <19200000>; - interrupts = <0 1 3 2>; - interrupt-parent = <&local_intc>; - }; - - SOC: axi { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x3f000000 0x01000000>; - ranges = <0 0x3f000000 0x01000000>, - <0x40000000 0x40000000 0x00001000>; - - local_intc: local_intc { - compatible = "brcm,bcm2836-l1-intc"; - reg = <0x40000000 0x100>; - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&local_intc>; - }; - - intc: interrupt-controller { - compatible = "broadcom,bcm2835-armctrl-ic", - "broadcom,bcm2708-armctrl-ic"; - reg = <0xB200 0x200>; - interrupt-parent = <&local_intc>; - interrupts = <8>; - - interrupt-controller; - #interrupt-cells = <1>; - - /* Bank 0 - * 0: ARM_TIMER - * 1: ARM_MAILBOX - * 2: ARM_DOORBELL_0 - * 3: ARM_DOORBELL_1 - * 4: VPU0_HALTED - * 5: VPU1_HALTED - * 6: ILLEGAL_TYPE0 - * 7: ILLEGAL_TYPE1 - */ - - /* Bank 1 - * 0: TIMER0 16: DMA0 - * 1: TIMER1 17: DMA1 - * 2: TIMER2 18: VC_DMA2 - * 3: TIMER3 19: VC_DMA3 - * 4: CODEC0 20: DMA4 - * 5: CODEC1 21: DMA5 - * 6: CODEC2 22: DMA6 - * 7: VC_JPEG 23: DMA7 - * 8: ISP 24: DMA8 - * 9: VC_USB 25: DMA9 - * 10: VC_3D 26: DMA10 - * 11: TRANSPOSER 27: DMA11 - * 12: MULTICORESYNC0 28: DMA12 - * 13: MULTICORESYNC1 29: AUX - * 14: MULTICORESYNC2 30: ARM - * 15: MULTICORESYNC3 31: VPUDMA - */ - - /* Bank 2 - * 0: HOSTPORT 16: SMI - * 1: VIDEOSCALER 17: GPIO0 - * 2: CCP2TX 18: GPIO1 - * 3: SDC 19: GPIO2 - * 4: DSI0 20: GPIO3 - * 5: AVE 21: VC_I2C - * 6: CAM0 22: VC_SPI - * 7: CAM1 23: VC_I2SPCM - * 8: HDMI0 24: VC_SDIO - * 9: HDMI1 25: VC_UART - * 10: PIXELVALVE1 26: SLIMBUS - * 11: I2CSPISLV 27: VEC - * 12: DSI1 28: CPG - * 13: PWA0 29: RNG - * 14: PWA1 30: VC_ARASANSDIO - * 15: CPR 31: AVSPMON - */ - }; - - watchdog0 { - compatible = "broadcom,bcm2835-wdt", - "broadcom,bcm2708-wdt"; - reg = <0x10001c 0x0c>; /* 0x1c, 0x20, 0x24 */ - }; - - gpio: gpio { - compatible = "broadcom,bcm2835-gpio", - "broadcom,bcm2708-gpio"; - reg = <0x200000 0xb0>; - - /* Unusual arrangement of interrupts - * (determined by testing) - * 17: Bank 0 (GPIOs 0-31) - * 19: Bank 1 (GPIOs 32-53) - * 18: Bank 2 - * 20: All banks (GPIOs 0-53) - */ - interrupts = <57 59 58 60>; - interrupt-parent = <&intc>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - - pinctrl-names = "default"; - pinctrl-0 = <&pins_reserved>; - - /* Pins that can short 3.3V to GND in output mode: 46 - * Pins used by VideoCore: 48-53 - */ - broadcom,read-only = <46>, <48>, <49>, <50>, - <51>, <52>, <53>; - - /* BSC0 */ - pins_bsc0_a: bsc0_a { - broadcom,pins = <0>, <1>; - }; - - pins_bsc0_b: bsc0_b { - broadcom,pins = <28>, <29>; - }; - - pins_bsc0_c: bsc0_c { - broadcom,pins = <44>, <45>; - }; - - /* BSC1 */ - pins_bsc1_a: bsc1_a { - broadcom,pins = <2>, <3>; - }; - - pins_bsc1_b: bsc1_b { - broadcom,pins = <44>, <45>; - }; - - /* GPCLK0 */ - pins_gpclk0_a: gpclk0_a { - broadcom,pins = <4>; - }; - - pins_gpclk0_b: gpclk0_b { - broadcom,pins = <20>; - }; - - pins_gpclk0_c: gpclk0_c { - broadcom,pins = <32>; - }; - - pins_gpclk0_d: gpclk0_d { - broadcom,pins = <34>; - }; - - /* GPCLK1 */ - pins_gpclk1_a: gpclk1_a { - broadcom,pins = <5>; - }; - - pins_gpclk1_b: gpclk1_b { - broadcom,pins = <21>; - }; - - pins_gpclk1_c: gpclk1_c { - broadcom,pins = <42>; - }; - - pins_gpclk1_d: gpclk1_d { - broadcom,pins = <44>; - }; - - /* GPCLK2 */ - pins_gpclk2_a: gpclk2_a { - broadcom,pins = <6>; - }; - - pins_gpclk2_b: gpclk2_b { - broadcom,pins = <43>; - }; - - /* SPI0 */ - pins_spi0_a: spi0_a { - broadcom,pins = <7>, <8>, <9>, <10>, <11>; - }; - - pins_spi0_b: spi0_b { - broadcom,pins = <35>, <36>, <37>, <38>, <39>; - }; - - /* PWM */ - pins_pwm0_a: pwm0_a { - broadcom,pins = <12>; - }; - - pins_pwm0_b: pwm0_b { - broadcom,pins = <18>; - }; - - pins_pwm0_c: pwm0_c { - broadcom,pins = <40>; - }; - - pins_pwm1_a: pwm1_a { - broadcom,pins = <13>; - }; - - pins_pwm1_b: pwm1_b { - broadcom,pins = <19>; - }; - - pins_pwm1_c: pwm1_c { - broadcom,pins = <41>; - }; - - pins_pwm1_d: pwm1_d { - broadcom,pins = <45>; - }; - - /* UART0 */ - pins_uart0_a: uart0_a { - broadcom,pins = <14>, <15>; - }; - - pins_uart0_b: uart0_b { - broadcom,pins = <32>, <33>; - }; - - pins_uart0_c: uart0_c { - broadcom,pins = <36>, <37>; - }; - - pins_uart0_fc_a: uart0_fc_a { - broadcom,pins = <16>, <17>; - }; - - pins_uart0_fc_b: uart0_fc_b { - broadcom,pins = <30>, <31>; - }; - - pins_uart0_fc_c: uart0_fc_c { - broadcom,pins = <39>, <38>; - }; - - /* PCM */ - pins_pcm_a: pcm_a { - broadcom,pins = <18>, <19>, <20>, <21>; - }; - - pins_pcm_b: pcm_b { - broadcom,pins = <28>, <29>, <30>, <31>; - }; - - /* Secondary Address Bus */ - pins_sm_addr_a: sm_addr_a { - broadcom,pins = <5>, <4>, <3>, <2>, <1>, <0>; - }; - - pins_sm_addr_b: sm_addr_b { - broadcom,pins = <33>, <32>, <31>, <30>, <29>, - <28>; - }; - - pins_sm_ctl_a: sm_ctl_a { - broadcom,pins = <6>, <7>; - }; - - pins_sm_ctl_b: sm_ctl_b { - broadcom,pins = <34>, <35>; - }; - - pins_sm_data_8bit_a: sm_data_8bit_a { - broadcom,pins = <8>, <9>, <10>, <11>, <12>, - <13>, <14>, <15>; - }; - - pins_sm_data_8bit_b: sm_data_8bit_b { - broadcom,pins = <36>, <37>, <38>, <39>, <40>, - <41>, <42>, <43>; - }; - - pins_sm_data_16bit: sm_data_16bit { - broadcom,pins = <16>, <17>, <18>, <19>, <20>, - <21>, <22>, <23>; - }; - - pins_sm_data_18bit: sm_data_18bit { - broadcom,pins = <24>, <25>; - }; - - /* BSCSL */ - pins_bscsl: bscsl { - broadcom,pins = <18>, <19>; - }; - - /* SPISL */ - pins_spisl: spisl { - broadcom,pins = <18>, <19>, <20>, <21>; - }; - - /* SPI1 */ - pins_spi1: spi1 { - broadcom,pins = <16>, <17>, <18>, <19>, <20>, - <21>; - }; - - /* UART1 */ - pins_uart1_a: uart1_a { - broadcom,pins = <14>, <15>; - }; - - pins_uart1_b: uart1_b { - broadcom,pins = <32>, <33>; - }; - - pins_uart1_c: uart1_c { - broadcom,pins = <40>, <41>; - }; - - pins_uart1_fc_a: uart1_fc_a { - broadcom,pins = <16>, <17>; - }; - - pins_uart1_fc_b: uart1_fc_b { - broadcom,pins = <30>, <31>; - }; - - pins_uart1_fc_c: uart1_fc_c { - broadcom,pins = <43>, <42>; - }; - - /* SPI2 */ - pins_spi2: spi2 { - broadcom,pins = <40>, <41>, <42>, <43>, <44>, - <45>; - }; - - /* ARM JTAG */ - pins_arm_jtag_trst: arm_jtag_trst { - broadcom,pins = <22>; - }; - - pins_arm_jtag_a: arm_jtag_a { - broadcom,pins = <4>, <5>, <6>, <12>, <13>; - }; - - pins_arm_jtag_b: arm_jtag_b { - broadcom,pins = <23>, <24>, <25>, <26>, <27>; - }; - - /* Reserved */ - pins_reserved: reserved { - broadcom,pins = <48>, <49>, <50>, <51>, <52>, - <53>; - }; - }; - - rng { - compatible = "broadcom,bcm2835-rng", - "broadcom,bcm2708-rng"; - reg = <0x104000 0x20>; - interrupts = <69>; - interrupt-parent = <&intc>; - }; - - bsc0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "broadcom,bcm2835-bsc", - "broadcom,bcm2708-bsc"; - reg = <0x205000 0x20>; - interrupts = <61>; - interrupt-parent = <&intc>; - }; - - bsc1 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "broadcom,bcm2835-bsc", - "broadcom,bcm2708-bsc"; - reg = <0x804000 0x20>; - interrupts = <61>; - interrupt-parent = <&intc>; - }; - - spi0 { - compatible = "broadcom,bcm2835-spi", - "broadcom,bcm2708-spi"; - reg = <0x204000 0x20>; - interrupts = <62>; - interrupt-parent = <&intc>; - }; - - dma: dma { - compatible = "broadcom,bcm2835-dma", - "broadcom,bcm2708-dma"; - reg = <0x7000 0x1000>, <0xE05000 0x1000>; - interrupts = <24 25 26 27 28 29 30 31 32 33 34 35 36>; - interrupt-parent = <&intc>; - - broadcom,channels = <0x7f35>; - }; - - vc_mbox: mbox { - compatible = "broadcom,bcm2835-mbox", - "broadcom,bcm2708-mbox"; - reg = <0xB880 0x40>; - interrupts = <1>; - interrupt-parent = <&intc>; - - /* Channels - * 0: Power - * 1: Frame buffer - * 2: Virtual UART - * 3: VCHIQ - * 4: LEDs - * 5: Buttons - * 6: Touch screen - */ - }; - - sdhci { - compatible = "broadcom,bcm2835-sdhci", - "broadcom,bcm2708-sdhci"; - reg = <0x300000 0x100>; - interrupts = <70>; - interrupt-parent = <&intc>; - - clock-frequency = <250000000>; /* Set by VideoCore */ - }; - - uart0: uart0 { - compatible = "broadcom,bcm2835-uart", - "broadcom,bcm2708-uart", "arm,pl011", - "arm,primecell"; - reg = <0x201000 0x1000>; - interrupts = <65>; - interrupt-parent = <&intc>; - - clock-frequency = <3000000>; /* Set by VideoCore */ - reg-shift = <2>; - }; - - vchiq: vchiq { - compatible = "broadcom,bcm2835-vchiq"; - reg = <0xB800 0x50>; - interrupts = <2>; - interrupt-parent = <&intc>; - cache-line-size = <32>; - }; - - usb { - compatible = "broadcom,bcm2835-usb", - "broadcom,bcm2708-usb", - "synopsys,designware-hs-otg2"; - reg = <0x980000 0x20000>; - interrupts = <17>; - interrupt-parent = <&intc>; - #address-cells = <1>; - #size-cells = <0>; - }; - - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/bcm2836.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/a83t.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/a83t.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/a83t.dtsi (nonexistent) @@ -1,290 +0,0 @@ -/*- - * Copyright (c) 2016 Jared McNeill - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/ { - cpus { - cpu@0 { - clocks = <&c0_cpux_clk>; - clock-latency = <2000000>; - }; - - cpu@100 { - clocks = <&c1_cpux_clk>; - clock-latency = <2000000>; - }; - }; - - pmu { - compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu"; - - /* Cluster 0 only */ - interrupts = , - , - , - ; - }; - - clocks { - pll_c0cpux: clk@01c20000 { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a83t-pllcpux-clk"; - reg = <0x01c20000 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll_c0cpux"; - }; - - pll_c1cpux: clk@01c20004 { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a83t-pllcpux-clk"; - reg = <0x01c20004 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll_c1cpux"; - }; - - c0_cpux_clk: c0clk@01c20050 { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a83t-c0cpu-clk"; - reg = <0x01c20050 0x4>; - clocks = <&osc24M>, <&pll_c0cpux>; - clock-output-names = "c0_cpux"; - }; - - c1_cpux_clk: c1clk@01c20050 { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a83t-c1cpu-clk"; - reg = <0x01c20050 0x4>; - clocks = <&osc24M>, <&pll_c1cpux>; - clock-output-names = "c1_cpux"; - }; - - /* cpus_clk compatible in gnu dt is incorrect */ - cpus_clk: clk@01f01400 { - compatible = "allwinner,sun8i-a83t-cpus-clk"; - }; - - pll_hsic: clk@01c20044 { - #clock-cells = <0>; - compatible = "allwinner,sun9i-a80-pll4-clk"; - reg = <0x01c20044 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll_hsic"; - }; - - usb_clk: clk@01c200cc { - #clock-cells = <1>; - #reset-cells = <1>; - compatible = "allwinner,sun8i-a83t-usb-clk"; - reg = <0x01c200cc 0x4>; - clocks = <&osc24M>, <&pll_hsic>; - clock-indices = <8>, <9>, - <10>, <11>, - <16>; - clock-output-names = "usb_phy0", "usb_phy1", - "usb_hsic_pll", "usb_hsic_12m", - "usb_ohci0"; - }; - - mii_phy_tx_clk: clk@1 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "mii_phy_tx"; - }; - - emac_int_tx_clk: clk@2 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "emac_int_tx"; - }; - - emac_tx_clk: clk@01c00030 { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a83t-emac-clk"; - reg = <0x01c00030 0x4>; - clocks = <&mii_phy_tx_clk>, <&emac_int_tx_clk>; - clock-output-names = "emac_tx"; - }; - }; - - soc { - nmi_intc: interrupt-controller@01f00c0c { - compatible = "allwinner,sun6i-a31-sc-nmi"; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x01f00c0c 0x38>; - interrupts = ; - }; - - i2c0: i2c@01c2ac00 { - compatible = "allwinner,sun8i-a83t-i2c"; - reg = <0x01c2ac00 0x400>; - interrupts = ; - clocks = <&bus_gates 96>; - resets = <&apb2_reset 0>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c1: i2c@01c2b000 { - compatible = "allwinner,sun8i-a83t-i2c"; - reg = <0x01c2b000 0x400>; - interrupts = ; - clocks = <&bus_gates 97>; - resets = <&apb2_reset 1>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c2: i2c@01c2b400 { - compatible = "allwinner,sun8i-a83t-i2c"; - reg = <0x01c2b400 0x400>; - interrupts = ; - clocks = <&bus_gates 98>; - resets = <&apb2_reset 2>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - usbphy: phy@01c19400 { - compatible = "allwinner,sun8i-a83t-usb-phy"; - reg = <0x01c19400 0x2c>, - <0x01c1a800 0x4>, - <0x01c1b800 0x4>; - clocks = <&usb_clk 8>, - <&usb_clk 9>, - <&usb_clk 10>, - <&usb_clk 11>; - clock-names = "usb0_phy", - "usb1_phy", - "hsic_pll", - "hsic_12m"; - resets = <&usb_clk 0>, - <&usb_clk 1>, - <&usb_clk 2>; - reset-names = "usb0_reset", - "usb1_reset", - "usb2_reset"; - status = "disabled"; - #phy-cells = <1>; - }; - - ehci0: usb@01c1a000 { - compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci"; - reg = <0x01c1a000 0x100>; - interrupts = ; - clocks = <&bus_gates 26>; - resets = <&ahb_reset 26>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - ehci1: usb@01c1b000 { - compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci"; - reg = <0x01c1b000 0x100>; - interrupts = ; - clocks = <&bus_gates 27>; - resets = <&ahb_reset 27>; - phys = <&usbphy 2>; - phy-names = "usb"; - status = "disabled"; - }; - - emac: ethernet@01c30000 { - compatible = "allwinner,sun8i-a83t-emac"; - reg = <0x01c30000 0x100>; - interrupts = ; - interrupt-names = "macirq"; - clocks = <&bus_gates 17>, <&emac_tx_clk>; - clock-names = "ahb", "tx"; - resets = <&ahb_reset 17>; - reset-names = "ahb"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - sid: eeprom@01c14000 { - compatible = "allwinner,sun8i-a83t-sid"; - reg = <0x01c14000 0x400>; - }; - - rtp: rtp@01f04000 { - compatible = "allwinner,sun8i-a83t-ts"; - reg = <0x01f04000 0x400>; - interrupts = ; - #thermal-sensor-cells = <0>; - }; - }; -}; - -&pio { - mmc2_8bit_pins: mmc2_8bit { - allwinner,pins = "PC5", "PC6", "PC8", - "PC9", "PC10", "PC11", - "PC12", "PC13", "PC14", - "PC15", "PC16"; - allwinner,function = "mmc2"; - allwinner,drive = ; - allwinner,pull = ; - }; - - emac_pins_rgmii_a: emac_rgmii@0 { - allwinner,pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", - "PD11", "PD12", "PD13", "PD14", - "PD18", "PD19", "PD20", "PD21", "PD22", "PD23"; - allwinner,function = "emac"; - allwinner,drive = ; - allwinner,pull = ; - }; - - i2c0_pins_a: i2c0@0 { - allwinner,pins = "PH0", "PH1"; - allwinner,function = "i2c0"; - allwinner,drive = ; - allwinner,pull = ; - }; - - i2c1_pins_a: i2c1@0 { - allwinner,pins = "PH2", "PH3"; - allwinner,function = "i2c1"; - allwinner,drive = ; - allwinner,pull = ; - }; - - i2c2_pins_a: i2c2@0 { - allwinner,pins = "PH4", "PH5"; - allwinner,function = "i2c2"; - allwinner,drive = ; - allwinner,pull = ; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/a83t.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/rpi2.dts =================================================================== --- head/sys/boot/fdt/dts/arm/rpi2.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/rpi2.dts (nonexistent) @@ -1,412 +0,0 @@ -/* - * Copyright (c) 2012 Oleksandr Tymoshenko - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ -/dts-v1/; - -/include/ "bcm2836.dtsi" - -/ { - model = "Raspberry Pi 2 Model B"; - compatible = "brcm,bcm2836"; - - memreserve = <0x08000000 0x08000000>; /* Set by VideoCore */ - - cpus { - #address-cells = <1>; - #size-cells = <0>; - cpu@0 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <0xf00>; /* CPU ID=0xf00 */ - clock-frequency = <800000000>; /* 800MHz */ - }; - cpu@1 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <0xf01>; /* CPU ID=0xf01 */ - clock-frequency = <800000000>; /* 800MHz */ - }; - cpu@2 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <0xf02>; /* CPU ID=0xf02 */ - clock-frequency = <800000000>; /* 800MHz */ - }; - cpu@3 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <0xf03>; /* CPU ID=0xf03 */ - clock-frequency = <800000000>; /* 800MHz */ - }; - }; - - memory { - device_type = "memory"; - reg = <0 0x8000000>; /* 128MB, Set by VideoCore */ - - }; - - system { - revision = <0>; /* Set by VideoCore */ - serial = <0 0>; /* Set by VideoCore */ - }; - - axi { - gpio: gpio { - /* BSC0 */ - pins_bsc0_a: bsc0_a { - broadcom,function = "ALT0"; - }; - - pins_bsc0_b: bsc0_b { - broadcom,function = "ALT0"; - }; - - pins_bsc0_c: bsc0_c { - broadcom,function = "ALT1"; - }; - - /* BSC1 */ - pins_bsc1_a: bsc1_a { - broadcom,function = "ALT0"; - }; - - pins_bsc1_b: bsc1_b { - broadcom,function = "ALT2"; - }; - - /* GPCLK0 */ - pins_gpclk0_a: gpclk0_a { - broadcom,function = "ALT0"; - }; - - pins_gpclk0_b: gpclk0_b { - broadcom,function = "ALT5"; - }; - - pins_gpclk0_c: gpclk0_c { - broadcom,function = "ALT0"; - }; - - pins_gpclk0_d: gpclk0_d { - broadcom,function = "ALT0"; - }; - - /* GPCLK1 */ - pins_gpclk1_a: gpclk1_a { - broadcom,function = "ALT0"; - }; - - pins_gpclk1_b: gpclk1_b { - broadcom,function = "ALT5"; - }; - - pins_gpclk1_c: gpclk1_c { - broadcom,function = "ALT0"; - }; - - pins_gpclk1_d: gpclk1_d { - broadcom,function = "ALT0"; - }; - - /* GPCLK2 */ - pins_gpclk2_a: gpclk2_a { - broadcom,function = "ALT0"; - }; - - pins_gpclk2_b: gpclk2_b { - broadcom,function = "ALT0"; - }; - - /* SPI0 */ - pins_spi0_a: spi0_a { - broadcom,function = "ALT0"; - }; - - pins_spi0_b: spi0_b { - broadcom,function = "ALT0"; - }; - - /* PWM */ - pins_pwm0_a: pwm0_a { - broadcom,function = "ALT0"; - }; - - pins_pwm0_b: pwm0_b { - broadcom,function = "ALT5"; - }; - - pins_pwm0_c: pwm0_c { - broadcom,function = "ALT0"; - }; - - pins_pwm1_a: pwm1_a { - broadcom,function = "ALT0"; - }; - - pins_pwm1_b: pwm1_b { - broadcom,function = "ALT5"; - }; - - pins_pwm1_c: pwm1_c { - broadcom,function = "ALT0"; - }; - - pins_pwm1_d: pwm1_d { - broadcom,function = "ALT0"; - }; - - /* UART0 */ - pins_uart0_a: uart0_a { - broadcom,function = "ALT0"; - }; - - pins_uart0_b: uart0_b { - broadcom,function = "ALT3"; - }; - - pins_uart0_c: uart0_c { - broadcom,function = "ALT2"; - }; - - pins_uart0_fc_a: uart0_fc_a { - broadcom,function = "ALT3"; - }; - - pins_uart0_fc_b: uart0_fc_b { - broadcom,function = "ALT3"; - }; - - pins_uart0_fc_c: uart0_fc_c { - broadcom,function = "ALT2"; - }; - - /* PCM */ - pins_pcm_a: pcm_a { - broadcom,function = "ALT0"; - }; - - pins_pcm_b: pcm_b { - broadcom,function = "ALT2"; - }; - - /* Secondary Address Bus */ - pins_sm_addr_a: sm_addr_a { - broadcom,function = "ALT1"; - }; - - pins_sm_addr_b: sm_addr_b { - broadcom,function = "ALT1"; - }; - - pins_sm_ctl_a: sm_ctl_a { - broadcom,function = "ALT1"; - }; - - pins_sm_ctl_b: sm_ctl_b { - broadcom,function = "ALT1"; - }; - - pins_sm_data_8bit_a: sm_data_8bit_a { - broadcom,function = "ALT1"; - }; - - pins_sm_data_8bit_b: sm_data_8bit_b { - broadcom,function = "ALT1"; - }; - - pins_sm_data_16bit: sm_data_16bit { - broadcom,function = "ALT1"; - }; - - pins_sm_data_18bit: sm_data_18bit { - broadcom,function = "ALT1"; - }; - - /* BSCSL */ - pins_bscsl: bscsl { - broadcom,function = "ALT3"; - }; - - /* SPISL */ - pins_spisl: spisl { - broadcom,function = "ALT3"; - }; - - /* SPI1 */ - pins_spi1: spi1 { - broadcom,function = "ALT4"; - }; - - /* UART1 */ - pins_uart1_a: uart1_a { - broadcom,function = "ALT5"; - }; - - pins_uart1_b: uart1_b { - broadcom,function = "ALT5"; - }; - - pins_uart1_c: uart1_c { - broadcom,function = "ALT5"; - }; - - pins_uart1_fc_a: uart1_fc_a { - broadcom,function = "ALT5"; - }; - - pins_uart1_fc_b: uart1_fc_b { - broadcom,function = "ALT5"; - }; - - pins_uart1_fc_c: uart1_fc_c { - broadcom,function = "ALT5"; - }; - - /* SPI2 */ - pins_spi2: spi2 { - broadcom,function = "ALT4"; - }; - - /* ARM JTAG */ - pins_arm_jtag_trst: arm_jtag_trst { - broadcom,function = "ALT4"; - }; - - pins_arm_jtag_a: arm_jtag_a { - broadcom,function = "ALT5"; - }; - - pins_arm_jtag_b: arm_jtag_b { - broadcom,function = "ALT4"; - }; - - /* Reserved */ - pins_reserved: reserved { - broadcom,function = "ALT3"; - }; - }; - usb { - hub { - compatible = "usb,hub", "usb,device"; - reg = <0x00000001>; - #address-cells = <1>; - #size-cells = <0>; - ethernet: ethernet { - compatible = "net,ethernet", - "usb,device"; - reg = <0x00000001>; - mac-address = [00 00 00 00 00 00]; - }; - }; - - }; - }; - - display { - compatible = "broadcom,bcm2835-fb", "broadcom,bcm2708-fb"; - - broadcom,vc-mailbox = <&vc_mbox>; - broadcom,vc-channel = <1>; - - broadcom,width = <0>; /* Set by VideoCore */ - broadcom,height = <0>; /* Set by VideoCore */ - broadcom,depth = <0>; /* Set by VideoCore */ - }; - - rpi_ft5406 { - compatible = "rpi,rpi-ft5406"; - status = "okay"; - }; - - leds { - compatible = "gpio-leds"; - - pwr { - label = "pwr"; - gpios = <&gpio 35 0>; - }; - - act { - label = "act"; - gpios = <&gpio 47 0>; - }; - }; - - power: regulator { - compatible = "broadcom,bcm2835-power-mgr", - "broadcom,bcm2708-power-mgr", - "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - broadcom,vc-mailbox = <&vc_mbox>; - broadcom,vc-channel = <0>; - - regulator-name = "VideoCore"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on = <1>; - - sd_card_power: regulator@0 { - compatible = "broadcom,bcm2835-power-dev", - "broadcom,bcm2708-power-dev"; - reg = <0>; - - vin-supply = <&power>; - regulator-name = "SD Card"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - /* This is for the controller itself, not the root port */ - usb_hcd_power: regulator@3 { - compatible = "broadcom,bcm2835-power-dev", - "broadcom,bcm2708-power-dev"; - reg = <3>; - - vin-supply = <&power>; - regulator-name = "USB HCD"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - }; - - aliases { - uart0 = &uart0; - ethernet0 = ðernet; - }; - - chosen { - bootargs = ""; /* Set by VideoCore */ - stdin = "uart0"; - stdout = "uart0"; - }; - - __overrides__ { - cache_line_size = <&vchiq>, "cache-line-size:0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/rpi2.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/armada-38x.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/armada-38x.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/armada-38x.dtsi (nonexistent) @@ -1,664 +0,0 @@ -/* - * Device Tree Include file for Marvell Armada 38x family of SoCs. - * - * Copyright (C) 2014 Marvell - * - * Lior Amsalem - * Gregory CLEMENT - * Thomas Petazzoni - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * $FreeBSD$ - */ - -#include "skeleton.dtsi" -#include -#include - -#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) - -/ { - model = "Marvell Armada 38x family SoC"; - compatible = "marvell,armada380"; - - aliases { - gpio0 = &gpio0; - gpio1 = &gpio1; - serial0 = &uart0; - serial1 = &uart1; - sram0 = &SRAM0; - sram1 = &SRAM1; - }; - - pmu { - compatible = "arm,cortex-a9-pmu"; - interrupts-extended = <&mpic 3>; - }; - - SRAM0: sram@f1100000 { - compatible = "mrvl,cesa-sram"; - reg = <0xf1100000 0x0010000>; - }; - - SRAM1: sram@f1110000 { - compatible = "mrvl,cesa-sram"; - reg = <0xf1110000 0x0010000>; - }; - - soc { - compatible = "marvell,armada380-mbus", "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - controller = <&mbusc>; - interrupt-parent = <&gic>; - pcie-mem-aperture = <0xe0000000 0x8000000>; - pcie-io-aperture = <0xe8000000 0x100000>; - - bootrom { - compatible = "marvell,bootrom"; - reg = ; - }; - - devbus-bootcs { - compatible = "marvell,mvebu-devbus"; - reg = ; - ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&coreclk 0>; - status = "disabled"; - }; - - devbus-cs0 { - compatible = "marvell,mvebu-devbus"; - reg = ; - ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&coreclk 0>; - status = "disabled"; - }; - - devbus-cs1 { - compatible = "marvell,mvebu-devbus"; - reg = ; - ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&coreclk 0>; - status = "disabled"; - }; - - devbus-cs2 { - compatible = "marvell,mvebu-devbus"; - reg = ; - ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&coreclk 0>; - status = "disabled"; - }; - - devbus-cs3 { - compatible = "marvell,mvebu-devbus"; - reg = ; - ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&coreclk 0>; - status = "disabled"; - }; - - internal-regs { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>; - - crypto@90000 { - compatible = "mrvl,cesa"; - reg = <0x90000 0x1000 /* tdma base reg chan 0 */ - 0x9D000 0x1000>; /* cesa base reg chan 0 */ - interrupts = ; - interrupt-parent = <&gic>; - sram-handle = <&SRAM0>; - status = "disabled"; - }; - - crypto@92000 { - compatible = "mrvl,cesa"; - reg = <0x92000 0x1000 /* tdma base reg chan 1 */ - 0x9F000 0x1000>; /* cesa base reg chan 1 */ - interrupts = ; - interrupt-parent = <&gic>; - sram-handle = <&SRAM1>; - status = "disabled"; - }; - - L2: cache-controller@8000 { - compatible = "arm,pl310-cache"; - reg = <0x8000 0x1000>; - cache-unified; - cache-level = <2>; - arm,double-linefill-incr = <1>; - arm,double-linefill-wrap = <0>; - arm,double-linefill = <1>; - prefetch-data = <1>; - }; - - scu@c000 { - compatible = "arm,cortex-a9-scu"; - reg = <0xc000 0x58>; - }; - - timer@c200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0xc200 0x20>; - interrupts = ; - clocks = <&coreclk 2>; - }; - - timer@c600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0xc600 0x20>; - interrupts = ; - clocks = <&coreclk 2>; - }; - - gic: interrupt-controller@d000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #size-cells = <0>; - interrupt-controller; - reg = <0xd000 0x1000>, - <0xc100 0x100>; - }; - - spi0: spi@10600 { - compatible = "marvell,armada-380-spi", - "marvell,orion-spi"; - reg = <0x10600 0x50>; - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - interrupts = ; - clocks = <&coreclk 0>; - status = "disabled"; - }; - - spi1: spi@10680 { - compatible = "marvell,armada-380-spi", - "marvell,orion-spi"; - reg = <0x10680 0x50>; - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - interrupts = ; - clocks = <&coreclk 0>; - status = "disabled"; - }; - - i2c0: i2c@11000 { - compatible = "marvell,mv64xxx-i2c"; - reg = <0x11000 0x20>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = ; - timeout-ms = <1000>; - clocks = <&coreclk 0>; - status = "disabled"; - }; - - i2c1: i2c@11100 { - compatible = "marvell,mv64xxx-i2c"; - reg = <0x11100 0x20>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = ; - timeout-ms = <1000>; - clocks = <&coreclk 0>; - status = "disabled"; - }; - - uart0: serial@12000 { - compatible = "snps,dw-apb-uart"; - reg = <0x12000 0x100>; - reg-shift = <2>; - interrupts = ; - reg-io-width = <1>; - clocks = <&coreclk 0>; - status = "disabled"; - }; - - uart1: serial@12100 { - compatible = "snps,dw-apb-uart"; - reg = <0x12100 0x100>; - reg-shift = <2>; - interrupts = ; - reg-io-width = <1>; - clocks = <&coreclk 0>; - status = "disabled"; - }; - - pinctrl: pinctrl@18000 { - reg = <0x18000 0x20>; - - ge0_rgmii_pins: ge-rgmii-pins-0 { - marvell,pins = "mpp6", "mpp7", "mpp8", - "mpp9", "mpp10", "mpp11", - "mpp12", "mpp13", "mpp14", - "mpp15", "mpp16", "mpp17"; - marvell,function = "ge0"; - }; - - ge1_rgmii_pins: ge-rgmii-pins-1 { - marvell,pins = "mpp21", "mpp27", "mpp28", - "mpp29", "mpp30", "mpp31", - "mpp32", "mpp37", "mpp38", - "mpp39", "mpp40", "mpp41"; - marvell,function = "ge1"; - }; - - i2c0_pins: i2c-pins-0 { - marvell,pins = "mpp2", "mpp3"; - marvell,function = "i2c0"; - }; - - mdio_pins: mdio-pins { - marvell,pins = "mpp4", "mpp5"; - marvell,function = "ge"; - }; - - ref_clk0_pins: ref-clk-pins-0 { - marvell,pins = "mpp45"; - marvell,function = "ref"; - }; - - ref_clk1_pins: ref-clk-pins-1 { - marvell,pins = "mpp46"; - marvell,function = "ref"; - }; - - spi0_pins: spi-pins-0 { - marvell,pins = "mpp22", "mpp23", "mpp24", - "mpp25"; - marvell,function = "spi0"; - }; - - spi1_pins: spi-pins-1 { - marvell,pins = "mpp56", "mpp57", "mpp58", - "mpp59"; - marvell,function = "spi1"; - }; - - uart0_pins: uart-pins-0 { - marvell,pins = "mpp0", "mpp1"; - marvell,function = "ua0"; - }; - - uart1_pins: uart-pins-1 { - marvell,pins = "mpp19", "mpp20"; - marvell,function = "ua1"; - }; - - sdhci_pins: sdhci-pins { - marvell,pins = "mpp48", "mpp49", "mpp50", - "mpp52", "mpp53", "mpp54", - "mpp55", "mpp57", "mpp58", - "mpp59"; - marvell,function = "sd0"; - }; - - sata0_pins: sata-pins-0 { - marvell,pins = "mpp20"; - marvell,function = "sata0"; - }; - - sata1_pins: sata-pins-1 { - marvell,pins = "mpp19"; - marvell,function = "sata1"; - }; - - sata2_pins: sata-pins-2 { - marvell,pins = "mpp47"; - marvell,function = "sata2"; - }; - - sata3_pins: sata-pins-3 { - marvell,pins = "mpp44"; - marvell,function = "sata3"; - }; - }; - - gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = , - , - , - ; - }; - - gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; - ngpios = <28>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = , - , - , - ; - }; - - system-controller@18200 { - compatible = "marvell,armada-380-system-controller", - "marvell,armada-370-xp-system-controller"; - reg = <0x18200 0x100>; - }; - - gateclk: clock-gating-control@18220 { - compatible = "marvell,armada-380-gating-clock"; - reg = <0x18220 0x4>; - clocks = <&coreclk 0>; - #clock-cells = <1>; - }; - - coreclk: mvebu-sar@18600 { - compatible = "marvell,armada-380-core-clock"; - reg = <0x18600 0x04>; - #clock-cells = <1>; - }; - - mbusc: mbus-controller@20000 { - compatible = "marvell,mbus-controller"; - reg = <0x20000 0x100>, <0x20180 0x20>; - }; - - mpic: interrupt-controller@20a00 { - compatible = "marvell,mpic"; - reg = <0x20a00 0x2d0>, <0x21870 0x300>; - #interrupt-cells = <1>; - #size-cells = <1>; - interrupt-controller; - msi-controller; - interrupts = ; - }; - - timer@20300 { - compatible = "marvell,armada-380-timer", - "marvell,armada-xp-timer"; - reg = <0x20300 0x30>, <0x21040 0x30>; - interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, - <&mpic 5>, - <&mpic 6>; - clocks = <&coreclk 2>, <&refclk>; - clock-names = "nbclk", "fixed"; - }; - - watchdog@20300 { - compatible = "marvell,armada-380-wdt"; - reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>; - clocks = <&coreclk 2>, <&refclk>; - clock-names = "nbclk", "fixed"; - }; - - cpurst@20800 { - compatible = "marvell,armada-370-cpu-reset"; - reg = <0x20800 0x10>; - }; - - mpcore-soc-ctrl@20d20 { - compatible = "marvell,armada-380-mpcore-soc-ctrl"; - reg = <0x20d20 0x6c>; - }; - - coherency-fabric@21010 { - compatible = "marvell,armada-380-coherency-fabric"; - reg = <0x21010 0x1c>; - }; - - pmsu@22000 { - compatible = "marvell,armada-380-pmsu"; - reg = <0x22000 0x1000>; - }; - - eth1: ethernet@30000 { - compatible = "marvell,armada-370-neta"; - reg = <0x30000 0x4000>; - interrupts-extended = <&mpic 10>; - clocks = <&gateclk 3>; - status = "disabled"; - }; - - eth2: ethernet@34000 { - compatible = "marvell,armada-370-neta"; - reg = <0x34000 0x4000>; - interrupts-extended = <&mpic 12>; - clocks = <&gateclk 2>; - status = "disabled"; - }; - - usb@58000 { - compatible = "marvell,orion-ehci"; - reg = <0x58000 0x500>; - interrupts = ; - clocks = <&gateclk 18>; - status = "disabled"; - }; - - xor@60800 { - compatible = "marvell,orion-xor"; - reg = <0x60800 0x100 - 0x60a00 0x100>; - clocks = <&gateclk 22>; - status = "okay"; - - xor00 { - interrupts = ; - dmacap,memcpy; - dmacap,xor; - }; - xor01 { - interrupts = ; - dmacap,memcpy; - dmacap,xor; - dmacap,memset; - }; - }; - - xor@60900 { - compatible = "marvell,orion-xor"; - reg = <0x60900 0x100 - 0x60b00 0x100>; - clocks = <&gateclk 28>; - status = "okay"; - - xor10 { - interrupts = ; - dmacap,memcpy; - dmacap,xor; - }; - xor11 { - interrupts = ; - dmacap,memcpy; - dmacap,xor; - dmacap,memset; - }; - }; - - eth0: ethernet@70000 { - compatible = "marvell,armada-370-neta"; - reg = <0x70000 0x4000>; - interrupts-extended = <&mpic 8>; - clocks = <&gateclk 4>; - status = "disabled"; - }; - - mdio: mdio@72004 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "marvell,orion-mdio"; - reg = <0x72004 0x4>; - clocks = <&gateclk 4>; - }; - - rtc@a3800 { - compatible = "marvell,armada-380-rtc"; - reg = <0xa3800 0x20>, <0x184a0 0x0c>; - reg-names = "rtc", "rtc-soc"; - interrupts = ; - }; - - sata@a8000 { - compatible = "marvell,armada-380-ahci"; - reg = <0xa8000 0x2000>; - interrupts = ; - clocks = <&gateclk 15>; - status = "disabled"; - }; - - bm: bm@c8000 { - compatible = "marvell,armada-380-neta-bm"; - reg = <0xc8000 0xac>; - clocks = <&gateclk 13>; - internal-mem = <&bm_bppi>; - status = "disabled"; - }; - - sata@e0000 { - compatible = "marvell,armada-380-ahci"; - reg = <0xe0000 0x2000>; - interrupts = ; - clocks = <&gateclk 30>; - status = "disabled"; - }; - - coredivclk: clock@e4250 { - compatible = "marvell,armada-380-corediv-clock"; - reg = <0xe4250 0xc>; - #clock-cells = <1>; - clocks = <&mainpll>; - clock-output-names = "nand"; - }; - - thermal@e8078 { - compatible = "marvell,armada380-thermal"; - reg = <0xe4078 0x4>, <0xe4074 0x4>; - status = "okay"; - }; - - flash@d0000 { - compatible = "marvell,armada370-nand"; - reg = <0xd0000 0x54>; - #address-cells = <1>; - #size-cells = <1>; - interrupts = ; - clocks = <&coredivclk 0>; - status = "disabled"; - }; - - sdhci@d8000 { - compatible = "marvell,armada-380-sdhci"; - reg-names = "sdhci", "mbus", "conf-sdio3"; - reg = <0xd8000 0x1000>, - <0xdc000 0x100>, - <0x18454 0x4>; - interrupts = ; - clocks = <&gateclk 17>; - mrvl,clk-delay-cycles = <0x1F>; - status = "disabled"; - }; - - usb3@f0000 { - compatible = "marvell,armada-380-xhci"; - reg = <0xf0000 0x4000>,<0xf4000 0x4000>; - interrupts = ; - clocks = <&gateclk 9>; - status = "disabled"; - }; - - usb3@f8000 { - compatible = "marvell,armada-380-xhci"; - reg = <0xf8000 0x4000>,<0xfc000 0x4000>; - interrupts = ; - clocks = <&gateclk 10>; - status = "disabled"; - }; - }; - - bm_bppi: bm-bppi { - compatible = "mmio-sram"; - reg = ; - ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&gateclk 13>; - no-memory-wc; - status = "disabled"; - }; - }; - - clocks { - /* 2 GHz fixed main PLL */ - mainpll: mainpll { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <1000000000>; - }; - - /* 25 MHz reference crystal */ - refclk: oscillator { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/armada-38x.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/armada-388.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/armada-388.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/armada-388.dtsi (nonexistent) @@ -1,72 +0,0 @@ -/* - * Device Tree Include file for Marvell Armada 388 SoC. - * - * Copyright (C) 2015 Marvell - * - * Gregory CLEMENT - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * - * The main difference with the Armada 385 is that the 388 can handle two more - * SATA ports. So we can reuse the dtsi of the Armada 385, override the pinctrl - * property and the name of the SoC, and add the second SATA host which control - * the 2 other ports. - * - * $FreeBSD$ - */ - -#include "armada-385.dtsi" - -/ { - model = "Marvell Armada 388 family SoC"; - compatible = "marvell,armada388", "marvell,armada385", - "marvell,armada380"; - - soc { - internal-regs { - pinctrl@18000 { - compatible = "marvell,mv88f6828-pinctrl"; - }; - - sata@e0000 { - compatible = "marvell,armada-380-ahci"; - reg = <0xe0000 0x2000>; - interrupts = ; - clocks = <&gateclk 30>; - status = "disabled"; - }; - - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/armada-388.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/armada-385.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/armada-385.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/armada-385.dtsi (nonexistent) @@ -1,200 +0,0 @@ -/* - * Device Tree Include file for Marvell Armada 385 SoC. - * - * Copyright (C) 2014 Marvell - * - * Lior Amsalem - * Gregory CLEMENT - * Thomas Petazzoni - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * $FreeBSD$ - */ - -#include "armada-38x.dtsi" - -/ { - model = "Marvell Armada 385 family SoC"; - compatible = "marvell,armada385", "marvell,armada380"; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - enable-method = "marvell,armada-380-smp"; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <0>; - }; - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <1>; - }; - }; - - soc { - internal-regs { - pinctrl@18000 { - compatible = "marvell,mv88f6820-pinctrl"; - }; - }; - - pcie-controller { - compatible = "marvell,armada-370-pcie"; - status = "disabled"; - device_type = "pci"; - - #address-cells = <3>; - #size-cells = <2>; - - msi-parent = <&mpic>; - bus-range = <0x00 0xff>; - - ranges = - <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 - 0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 - 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 - 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 - 0x82000000 0x0 0xf1200000 MBUS_ID(0x08, 0xe8) 0xf1200000 0 0x00100000 /* Port 0 MEM */ - 0x81000000 0x0 0xf1300000 MBUS_ID(0x08, 0xe0) 0xf1300000 0 0x00100000 /* Port 0 IO */ - 0x82000000 0x0 0xf1400000 MBUS_ID(0x04, 0xe8) 0xf1400000 0 0x00100000 /* Port 1 MEM */ - 0x81000000 0x0 0xf1500000 MBUS_ID(0x04, 0xe0) 0xf1500000 0 0x00100000 /* Port 1 IO */ - 0x82000000 0x0 0xf1600000 MBUS_ID(0x04, 0xd8) 0xf1600000 0 0x00100000 /* Port 2 MEM */ - 0x81000000 0x0 0xf1700000 MBUS_ID(0x04, 0xd0) 0xf1700000 0 0x00100000 /* Port 2 IO */ - 0x82000000 0x0 0xf1800000 MBUS_ID(0x04, 0xb8) 0xf1800000 0 0x00100000 /* Port 3 MEM */ - 0x81000000 0x0 0xf1900000 MBUS_ID(0x04, 0xb0) 0xf1900000 0 0x00100000 /* Port 3 IO */ - >; - - /* - * This port can be either x4 or x1. When - * configured in x4 by the bootloader, then - * pcie@4,0 is not available. - */ - pcie@1,0 { - compatible = "mrvl,pcie"; - device_type = "pci"; - assigned-addresses = <0x82000800 0 0x80000 0 0x2000>; - reg = <0x0 0x0 0x80000 0x0 0x2000>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <3>; - bus-range = <0 255>; - ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1200000 0x0 0x00100000 - 0x81000000 0x0 0x0 0x81000000 0x0 0xf1300000 0x0 0x00100000>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - interrupt-parent = <&gic>; - marvell,pcie-port = <0>; - marvell,pcie-lane = <0>; - clocks = <&gateclk 8>; - status = "disabled"; - }; - - /* x1 port */ - pcie@2,0 { - compatible = "mrvl,pcie"; - device_type = "pci"; - assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; - reg = <0x0 0x0 0x40000 0x0 0x2000>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <3>; - bus-range = <0 255>; - ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1400000 0x0 0x00100000 - 0x81000000 0x0 0x0 0x81000000 0x0 0xf1500000 0x0 0x00100000>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - interrupt-parent = <&gic>; - marvell,pcie-port = <1>; - marvell,pcie-lane = <0>; - clocks = <&gateclk 5>; - status = "disabled"; - }; - - /* x1 port */ - pcie@3,0 { - compatible = "mrvl,pcie"; - device_type = "pci"; - assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; - reg = <0x0 0x0 0x44000 0x0 0x2000>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <3>; - bus-range = <0 255>; - ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1600000 0x0 0x00100000 - 0x81000000 0x0 0x0 0x81000000 0x0 0xf1700000 0x0 0x00100000>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; - interrupt-parent = <&gic>; - marvell,pcie-port = <2>; - marvell,pcie-lane = <0>; - clocks = <&gateclk 6>; - status = "disabled"; - }; - - /* - * x1 port only available when pcie@1,0 is - * configured as a x1 port - */ - pcie@4,0 { - compatible = "mrvl,pcie"; - device_type = "pci"; - assigned-addresses = <0x82000800 0 0x48000 0 0x2000>; - reg = <0x0 0x0 0x48000 0x0 0x2000>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <3>; - bus-range = <0 255>; - ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1800000 0x0 0x00100000 - 0x81000000 0x0 0x0 0x81000000 0x0 0xf1900000 0x0 0x00100000>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; - interrupt-parent = <&gic>; - marvell,pcie-port = <3>; - marvell,pcie-lane = <0>; - clocks = <&gateclk 7>; - status = "disabled"; - }; - }; - }; - -}; Property changes on: head/sys/boot/fdt/dts/arm/armada-385.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/armada-380.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/armada-380.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/armada-380.dtsi (nonexistent) @@ -1,163 +0,0 @@ -/* - * Device Tree Include file for Marvell Armada 380 SoC. - * - * Copyright (C) 2014 Marvell - * - * Lior Amsalem - * Gregory CLEMENT - * Thomas Petazzoni - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * $FreeBSD$ - */ - -#include "armada-38x.dtsi" - -/ { - model = "Marvell Armada 380 family SoC"; - compatible = "marvell,armada380"; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - enable-method = "marvell,armada-380-smp"; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <0>; - }; - }; - - soc { - internal-regs { - pinctrl@18000 { - compatible = "marvell,mv88f6810-pinctrl"; - }; - }; - - pcie-controller { - compatible = "marvell,armada-370-pcie"; - status = "disabled"; - device_type = "pci"; - - #address-cells = <3>; - #size-cells = <2>; - - msi-parent = <&mpic>; - bus-range = <0x00 0xff>; - - ranges = - <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 - 0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 - 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 - 0x82000000 0x0 0xf1200000 MBUS_ID(0x08, 0xe8) 0xf1200000 0 0x00100000 /* Port 0 MEM */ - 0x81000000 0x0 0xf1300000 MBUS_ID(0x08, 0xe0) 0xf1300000 0 0x00100000 /* Port 0 IO */ - 0x82000000 0x0 0xf1400000 MBUS_ID(0x04, 0xe8) 0xf1400000 0 0x00100000 /* Port 1 MEM */ - 0x81000000 0x0 0xf1500000 MBUS_ID(0x04, 0xe0) 0xf1500000 0 0x00100000 /* Port 1 IO */ - 0x82000000 0x0 0xf1600000 MBUS_ID(0x04, 0xd8) 0xf1600000 0 0x00100000 /* Port 2 MEM */ - 0x81000000 0x0 0xf1700000 MBUS_ID(0x04, 0xd0) 0xf1700000 0 0x00100000 /* Port 2 IO */ - >; - - /* x1 port */ - pcie@1,0 { - compatible = "mrvl,pcie"; - device_type = "pci"; - assigned-addresses = <0x82000800 0 0x80000 0 0x2000>; - reg = <0x0 0x0 0x80000 0x0 0x2000>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <3>; - bus-range = <0 255>; - ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1200000 0x0 0x00100000 - 0x81000000 0x0 0x0 0x81000000 0x0 0xf1300000 0x0 0x00100000>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - interrupt-parent = <&gic>; - marvell,pcie-port = <0>; - marvell,pcie-lane = <0>; - clocks = <&gateclk 8>; - status = "disabled"; - }; - - /* x1 port */ - pcie@2,0 { - compatible = "mrvl,pcie"; - device_type = "pci"; - assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; - reg = <0x0 0x0 0x40000 0x0 0x2000>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <3>; - bus-range = <0 255>; - ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1400000 0x0 0x00100000 - 0x81000000 0x0 0x0 0x81000000 0x0 0xf1500000 0x0 0x00100000>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - interrupt-parent = <&gic>; - marvell,pcie-port = <1>; - marvell,pcie-lane = <0>; - clocks = <&gateclk 5>; - status = "disabled"; - }; - - /* x1 port */ - pcie@3,0 { - compatible = "mrvl,pcie"; - device_type = "pci"; - assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; - reg = <0x0 0x0 0x44000 0x0 0x2000>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <3>; - bus-range = <0 255>; - ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1600000 0x0 0x00100000 - 0x81000000 0x0 0x0 0x81000000 0x0 0xf1700000 0x0 0x00100000>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; - interrupt-parent = <&gic>; - marvell,pcie-port = <2>; - marvell,pcie-lane = <0>; - clocks = <&gateclk 6>; - status = "disabled"; - }; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/armada-380.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/db78100.dts =================================================================== --- head/sys/boot/fdt/dts/arm/db78100.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/db78100.dts (nonexistent) @@ -1,332 +0,0 @@ -/* - * Copyright (c) 2010 The FreeBSD Foundation - * All rights reserved. - * - * This software was developed by Semihalf under sponsorship from - * the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Marvell DB-78100 Device Tree Source. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "mrvl,DB-78100"; - compatible = "DB-78100-BP", "DB-78100-BP-A"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - serial0 = &serial0; - serial1 = &serial1; - mpp = &MPP; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,88FR571"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x20000000>; // 512M at 0x0 - }; - - localbus@0 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "mrvl,lbc"; - bank-count = <5>; - - /* This reflects CPU decode windows setup. */ - ranges = <0x0 0x2f 0xf9300000 0x00100000 - 0x1 0x3e 0xf9400000 0x00100000 - 0x2 0x3d 0xf9500000 0x02000000 - 0x3 0x3b 0xfb500000 0x00100000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x00100000>; - }; - - led@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "led"; - reg = <0x1 0x0 0x00100000>; - }; - - nor@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x2 0x0 0x02000000>; - }; - - nand@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "mrvl,nfc"; - reg = <0x3 0x0 0x00100000>; - }; - }; - - soc78100@f1000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0xf1000000 0x00100000>; - bus-frequency = <0>; - - PIC: pic@20200 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x20200 0x3c>; - compatible = "mrvl,pic"; - }; - - timer@20300 { - compatible = "mrvl,timer"; - reg = <0x20300 0x30>; - interrupts = <8>; - interrupt-parent = <&PIC>; - mrvl,has-wdt; - }; - - MPP: mpp@10000 { - #pin-cells = <2>; - compatible = "mrvl,mpp"; - reg = <0x10000 0x34>; - pin-count = <50>; - pin-map = < - 0 2 /* MPP[0]: GE1_TXCLK */ - 1 2 /* MPP[1]: GE1_TXCTL */ - 2 2 /* MPP[2]: GE1_RXCTL */ - 3 2 /* MPP[3]: GE1_RXCLK */ - 4 2 /* MPP[4]: GE1_TXD[0] */ - 5 2 /* MPP[5]: GE1_TXD[1] */ - 6 2 /* MPP[6]: GE1_TXD[2] */ - 7 2 /* MPP[7]: GE1_TXD[3] */ - 8 2 /* MPP[8]: GE1_RXD[0] */ - 9 2 /* MPP[9]: GE1_RXD[1] */ - 10 2 /* MPP[10]: GE1_RXD[2] */ - 11 2 /* MPP[11]: GE1_RXD[3] */ - 13 3 /* MPP[13]: SYSRST_OUTn */ - 14 3 /* MPP[14]: SATA1_ACTn */ - 15 3 /* MPP[15]: SATA0_ACTn */ - 16 4 /* MPP[16]: UA2_TXD */ - 17 4 /* MPP[17]: UA2_RXD */ - 18 3 /* MPP[18]: */ - 19 3 /* MPP[19]: */ - 20 3 /* MPP[20]: */ - 21 3 /* MPP[21]: */ - 22 4 /* MPP[22]: UA3_TXD */ - 23 4 >; /* MPP[21]: UA3_RXD */ - }; - - GPIO: gpio@10100 { - #gpio-cells = <3>; - compatible = "mrvl,gpio"; - reg = <0x10100 0x20>; - gpio-controller; - interrupts = <56 57 58 59>; - interrupt-parent = <&PIC>; - }; - - rtc@10300 { - compatible = "mrvl,rtc"; - reg = <0x10300 0x08>; - }; - - twsi@11000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,twsi"; - reg = <0x11000 0x20>; - interrupts = <2>; - interrupt-parent = <&PIC>; - }; - - twsi@11100 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,twsi"; - reg = <0x11100 0x20>; - interrupts = <3>; - interrupt-parent = <&PIC>; - }; - - enet0: ethernet@72000 { - #address-cells = <1>; - #size-cells = <1>; - model = "V2"; - compatible = "mrvl,ge"; - reg = <0x72000 0x2000>; - ranges = <0x0 0x72000 0x2000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <41 42 43 40 70>; - interrupt-parent = <&PIC>; - phy-handle = <&phy0>; - - mdio@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,mdio"; - - phy0: ethernet-phy@0 { - reg = <0x8>; - }; - phy1: ethernet-phy@1 { - reg = <0x9>; - }; - }; - }; - - enet1: ethernet@76000 { - #address-cells = <1>; - #size-cells = <1>; - model = "V2"; - compatible = "mrvl,ge"; - reg = <0x76000 0x2000>; - ranges = <0x0 0x76000 0x2000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <45 46 47 44 70>; - interrupt-parent = <&PIC>; - phy-handle = <&phy1>; - }; - - serial0: serial@12000 { - compatible = "ns16550"; - reg = <0x12000 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <12>; - interrupt-parent = <&PIC>; - }; - - serial1: serial@12100 { - compatible = "ns16550"; - reg = <0x12100 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <13>; - interrupt-parent = <&PIC>; - }; - - usb@50000 { - compatible = "mrvl,usb-ehci", "usb-ehci"; - reg = <0x50000 0x1000>; - interrupts = <72 16>; - interrupt-parent = <&PIC>; - }; - - usb@51000 { - compatible = "mrvl,usb-ehci", "usb-ehci"; - reg = <0x51000 0x1000>; - interrupts = <72 17>; - interrupt-parent = <&PIC>; - }; - - usb@52000 { - compatible = "mrvl,usb-ehci", "usb-ehci"; - reg = <0x52000 0x1000>; - interrupts = <72 18>; - interrupt-parent = <&PIC>; - }; - - xor@60000 { - compatible = "mrvl,xor"; - reg = <0x60000 0x1000>; - interrupts = <22 23>; - interrupt-parent = <&PIC>; - }; - - crypto@90000 { - compatible = "mrvl,cesa"; - reg = <0x90000 0x1000 /* tdma base reg chan 0 */ - 0x9D000 0x1000>; /* cesa base reg chan 0 */ - interrupts = <19>; - interrupt-parent = <&PIC>; - }; - - sata@a0000 { - compatible = "mrvl,sata"; - reg = <0xa0000 0x6000>; - interrupts = <26>; - interrupt-parent = <&PIC>; - }; - }; - - pci0: pcie@f1040000 { - compatible = "mrvl,pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xf1040000 0x2000>; - bus-range = <0 255>; - ranges = <0x02000000 0x0 0xf2000000 0xf2000000 0x0 0x04000000 - 0x01000000 0x0 0x00000000 0xf1100000 0x0 0x00100000>; - clock-frequency = <33333333>; - interrupt-parent = <&PIC>; - interrupts = <68>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x1 */ - 0x0800 0x0 0x0 0x1 &PIC 0x20 - 0x0800 0x0 0x0 0x2 &PIC 0x21 - 0x0800 0x0 0x0 0x3 &PIC 0x22 - 0x0800 0x0 0x0 0x4 &PIC 0x23 - >; - }; - - sram@fd000000 { - compatible = "mrvl,cesa-sram"; - reg = <0xfd000000 0x00100000>; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/db78100.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/zybo.dts =================================================================== --- head/sys/boot/fdt/dts/arm/zybo.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/zybo.dts (nonexistent) @@ -1,69 +0,0 @@ -/*- - * Copyright (c) 2016 The FreeBSD Foundation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ -/dts-v1/; -/include/ "zynq-7000.dtsi" - -/ { - model = "zybo"; - compatible = "digilent,zybo", "xlnx,zynq-7000"; - - memory { - // First megabyte isn't accessible by all interconnect masters. - device_type = "memory"; - reg = <0x100000 0x1ff00000>; /* 511MB RAM at 0x100000 */ - }; - - chosen { - stdin = &uart1; - stdout = &uart1; - }; -}; - -&slcr { - clock-frequency = <50000000>; // 50Mhz PS_CLK -}; - -&global_timer { - clock-frequency = <325000000>; // 325Mhz -}; - -&uart1 { - status = "okay"; -}; - -ð0 { - status = "okay"; -}; - -&sdhci0 { - status = "okay"; -}; - -&ehci0 { - status = "okay"; -}; Property changes on: head/sys/boot/fdt/dts/arm/zybo.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/sun8i-a83t-sinovoip-bpi-m3.dts =================================================================== --- head/sys/boot/fdt/dts/arm/sun8i-a83t-sinovoip-bpi-m3.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/sun8i-a83t-sinovoip-bpi-m3.dts (nonexistent) @@ -1,81 +0,0 @@ -/* - * Copyright 2016 Vishnu Patekar - * Vishnu Patekar - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * $FreeBSD$ - */ - -/dts-v1/; -#include "sun8i-a83t.dtsi" -#include "sunxi-common-regulators.dtsi" - -/ { - model = "Sinovoip BananaPi M3 v1.2"; - compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; - vmmc-supply = <®_vcc3v0>; - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ - bus-width = <4>; - cd-inverted; - status = "okay"; -}; - -&r_rsb { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_b>; - status = "okay"; -}; Property changes on: head/sys/boot/fdt/dts/arm/sun8i-a83t-sinovoip-bpi-m3.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/armada-388-gp.dts =================================================================== --- head/sys/boot/fdt/dts/arm/armada-388-gp.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/armada-388-gp.dts (nonexistent) @@ -1,425 +0,0 @@ -/* - * Device Tree file for Marvell Armada 385 development board - * (RD-88F6820-GP) - * - * Copyright (C) 2014 Marvell - * - * Gregory CLEMENT - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * $FreeBSD$ - */ - -/dts-v1/; -#include "armada-388.dtsi" -#include - -/ { - model = "Marvell Armada 385 GP"; - compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380"; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x80000000>; /* 2 GB */ - }; - - soc { - ranges = ; - - internal-regs { - crypto@90000 { - status = "okay"; - }; - crypto@92000 { - status = "okay"; - }; - - spi@10600 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pins>; - status = "okay"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,m25p128", "jedec,spi-nor"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <50000000>; - m25p,fast-read; - }; - }; - - i2c@11000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "okay"; - clock-frequency = <100000>; - /* - * The EEPROM located at adresse 54 is needed - * for the boot - DO NOT ERASE IT - - */ - - expander0: pca9555@20 { - compatible = "nxp,pca9555"; - pinctrl-names = "default"; - pinctrl-0 = <&pca0_pins>; - interrupt-parent = <&gpio0>; - interrupts = <18 IRQ_TYPE_EDGE_FALLING>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x20>; - }; - - expander1: pca9555@21 { - compatible = "nxp,pca9555"; - pinctrl-names = "default"; - interrupt-parent = <&gpio0>; - interrupts = <18 IRQ_TYPE_EDGE_FALLING>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x21>; - }; - - }; - - serial@12000 { - /* - * Exported on the micro USB connector CON16 - * through an FTDI - */ - - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; - }; - - /* GE1 CON15 */ - ethernet@30000 { - pinctrl-names = "default"; - pinctrl-0 = <&ge1_rgmii_pins>; - status = "okay"; - phy = <&phy1>; - phy-mode = "rgmii-id"; - }; - - /* CON4 */ - usb@58000 { - vcc-supply = <®_usb2_0_vbus>; - status = "okay"; - }; - - /* GE0 CON1 */ - ethernet@70000 { - pinctrl-names = "default"; - /* - * The Reference Clock 0 is used to provide a - * clock to the PHY - */ - pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; - status = "okay"; - phy = <&phy0>; - phy-mode = "rgmii-id"; - }; - - - mdio@72004 { - pinctrl-names = "default"; - pinctrl-0 = <&mdio_pins>; - - phy0: ethernet-phy@1 { - reg = <1>; - }; - - phy1: ethernet-phy@0 { - reg = <0>; - }; - }; - - sata@a8000 { - pinctrl-names = "default"; - pinctrl-0 = <&sata0_pins>, <&sata1_pins>; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - sata0: sata-port@0 { - reg = <0>; - target-supply = <®_5v_sata0>; - }; - - sata1: sata-port@1 { - reg = <1>; - target-supply = <®_5v_sata1>; - }; - }; - - sata@e0000 { - pinctrl-names = "default"; - pinctrl-0 = <&sata2_pins>, <&sata3_pins>; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - sata2: sata-port@0 { - reg = <0>; - target-supply = <®_5v_sata2>; - }; - - sata3: sata-port@1 { - reg = <1>; - target-supply = <®_5v_sata3>; - }; - }; - - sdhci@d8000 { - pinctrl-names = "default"; - pinctrl-0 = <&sdhci_pins>; - cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>; - no-1-8-v; - wp-inverted; - bus-width = <8>; - status = "okay"; - }; - - /* CON5 */ - usb3@f0000 { - vcc-supply = <®_usb2_1_vbus>; - status = "okay"; - }; - - /* CON7 */ - usb3@f8000 { - vcc-supply = <®_usb3_vbus>; - status = "okay"; - }; - }; - - gpio-fan { - compatible = "gpio-fan"; - gpios = <&expander1 3 GPIO_ACTIVE_HIGH>; - gpio-fan,speed-map = < 0 0 - 3000 1>; - }; - pcie-controller { - status = "okay"; - /* - * One PCIe units is accessible through - * standard PCIe slot on the board. - */ - pcie@1,0 { - /* Port 0, Lane 0 */ - status = "okay"; - }; - - /* - * The two other PCIe units are accessible - * through mini PCIe slot on the board. - */ - pcie@2,0 { - /* Port 1, Lane 0 */ - status = "okay"; - }; - pcie@3,0 { - /* Port 2, Lane 0 */ - status = "okay"; - }; - }; - }; - - - reg_usb3_vbus: usb3-vbus { - compatible = "regulator-fixed"; - regulator-name = "usb3-vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-always-on; - gpio = <&expander1 15 GPIO_ACTIVE_HIGH>; - }; - - reg_usb2_0_vbus: v5-vbus0 { - compatible = "regulator-fixed"; - regulator-name = "v5.0-vbus0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-always-on; - gpio = <&expander1 14 GPIO_ACTIVE_HIGH>; - }; - - reg_usb2_1_vbus: v5-vbus1 { - compatible = "regulator-fixed"; - regulator-name = "v5.0-vbus1"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-always-on; - gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; - }; - - reg_usb2_1_vbus: v5-vbus1 { - compatible = "regulator-fixed"; - regulator-name = "v5.0-vbus1"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-always-on; - gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; - }; - - reg_sata0: pwr-sata0 { - compatible = "regulator-fixed"; - regulator-name = "pwr_en_sata0"; - enable-active-high; - regulator-always-on; - - }; - - reg_5v_sata0: v5-sata0 { - compatible = "regulator-fixed"; - regulator-name = "v5.0-sata0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - vin-supply = <®_sata0>; - }; - - reg_12v_sata0: v12-sata0 { - compatible = "regulator-fixed"; - regulator-name = "v12.0-sata0"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-always-on; - vin-supply = <®_sata0>; - }; - - reg_sata1: pwr-sata1 { - regulator-name = "pwr_en_sata1"; - compatible = "regulator-fixed"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - enable-active-high; - regulator-always-on; - gpio = <&expander0 3 GPIO_ACTIVE_HIGH>; - }; - - reg_5v_sata1: v5-sata1 { - compatible = "regulator-fixed"; - regulator-name = "v5.0-sata1"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - vin-supply = <®_sata1>; - }; - - reg_12v_sata1: v12-sata1 { - compatible = "regulator-fixed"; - regulator-name = "v12.0-sata1"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-always-on; - vin-supply = <®_sata1>; - }; - - reg_sata2: pwr-sata2 { - compatible = "regulator-fixed"; - regulator-name = "pwr_en_sata2"; - enable-active-high; - regulator-always-on; - gpio = <&expander0 11 GPIO_ACTIVE_HIGH>; - }; - - reg_5v_sata2: v5-sata2 { - compatible = "regulator-fixed"; - regulator-name = "v5.0-sata2"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - vin-supply = <®_sata2>; - }; - - reg_12v_sata2: v12-sata2 { - compatible = "regulator-fixed"; - regulator-name = "v12.0-sata2"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-always-on; - vin-supply = <®_sata2>; - }; - - reg_sata3: pwr-sata3 { - compatible = "regulator-fixed"; - regulator-name = "pwr_en_sata3"; - enable-active-high; - regulator-always-on; - gpio = <&expander0 12 GPIO_ACTIVE_HIGH>; - }; - - reg_5v_sata3: v5-sata3 { - compatible = "regulator-fixed"; - regulator-name = "v5.0-sata3"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - vin-supply = <®_sata3>; - }; - - reg_12v_sata3: v12-sata3 { - compatible = "regulator-fixed"; - regulator-name = "v12.0-sata3"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-always-on; - vin-supply = <®_sata3>; - }; -}; - -&pinctrl { - pca0_pins: pca0_pins { - marvell,pins = "mpp18"; - marvell,function = "gpio"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/armada-388-gp.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/zynq-7000.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/zynq-7000.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/zynq-7000.dtsi (nonexistent) @@ -1,229 +0,0 @@ -/*- - * Copyright (c) 2016 The FreeBSD Foundation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/ { - compatible = "xlnx,zynq-7000"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&GIC>; - - // Reserve first half megabyte because it is not accessible to all - // bus masters. - memreserve = <0x00000000 0x00080000>; - - // Zynq PS System registers. - // - ps7sys@f8000000 { - device_type = "soc"; - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0xf8000000 0xf10000>; - - // SLCR block - slcr: slcr@7000 { - compatible = "xlnx,zy7_slcr"; - reg = <0x0 0x1000>; - }; - - // Interrupt controller - GIC: gic { - compatible = "arm,gic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <3>; - reg = <0xf01000 0x1000>, // distributer registers - <0xf00100 0x0100>; // CPU if registers - }; - - // L2 cache controller - pl310@f02000 { - compatible = "arm,pl310"; - reg = <0xf02000 0x1000>; - interrupts = <0 2 4>; - interrupt-parent = <&GIC>; - }; - - // Device Config - devcfg: devcfg@7000 { - compatible = "xlnx,zy7_devcfg"; - reg = <0x7000 0x1000>; - interrupts = <0 8 4>; - interrupt-parent = <&GIC>; - }; - - // triple timer counters0,1 - ttc0: ttc@1000 { - compatible = "xlnx,ttc"; - reg = <0x1000 0x1000>; - }; - - ttc1: ttc@2000 { - compatible = "xlnx,ttc"; - reg = <0x2000 0x1000>; - }; - - // ARM Cortex A9 TWD Timer - global_timer: timer@f00600 { - compatible = "arm,mpcore-timers"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xf00200 0x100>, // Global Timer Regs - <0xf00600 0x20>; // Private Timer Regs - interrupts = <1 11 1>, <1 13 1>; - interrupt-parent = <&GIC>; - }; - - // system watch-dog timer - swdt@5000 { - device_type = "watchdog"; - compatible = "xlnx,zy7_wdt"; - reg = <0x5000 0x1000>; - interrupts = <0 9 1>; - interrupt-parent = <&GIC>; - }; - - scuwdt@f00620 { - device_type = "watchdog"; - compatible = "arm,mpcore_wdt"; - reg = <0xf00620 0x20>; - interrupts = <1 14 1>; - interrupt-parent = <&GIC>; - reset = <1>; - }; - - }; // pssys@f8000000 - - // Zynq PS I/O Peripheral registers. - // - ps7io@e0000000 { - device_type = "soc"; - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0xe0000000 0x300000>; - - // UART controllers - uart0: uart@0000 { - device_type = "serial"; - compatible = "cadence,uart"; - status = "disabled"; - reg = <0x0000 0x1000>; - interrupts = <0 27 4>; - interrupt-parent = <&GIC>; - clock-frequency = <50000000>; - }; - - uart1: uart@1000 { - device_type = "serial"; - compatible = "cadence,uart"; - status = "disabled"; - reg = <0x1000 0x1000>; - interrupts = <0 50 4>; - interrupt-parent = <&GIC>; - clock-frequency = <50000000>; - }; - - // USB controllers - ehci0: ehci@2000 { - compatible = "xlnx,zy7_ehci"; - status = "disabled"; - reg = <0x2000 0x1000>; - interrupts = <0 21 4>; - interrupt-parent = <&GIC>; - }; - - ehci1: ehci@3000 { - compatible = "xlnx,zy7_ehci"; - status = "disabled"; - reg = <0x3000 0x1000>; - interrupts = <0 44 4>; - interrupt-parent = <&GIC>; - }; - - // GPIO controller - gpio: gpio@a000 { - compatible = "xlnx,zy7_gpio"; - reg = <0xa000 0x1000>; - interrupts = <0 20 4>; - interrupt-parent = <&GIC>; - }; - - // Gigabit Ethernet controllers - eth0: eth@b000 { - device_type = "network"; - compatible = "cadence,gem"; - status = "disabled"; - reg = <0xb000 0x1000>; - interrupts = <0 22 4>; - interrupt-parent = <&GIC>; - ref-clock-num = <0>; - }; - - eth1: eth@c000 { - device_type = "network"; - compatible = "cadence,gem"; - status = "disabled"; - reg = <0xc000 0x1000>; - interrupts = <0 45 4>; - interrupt-parent = <&GIC>; - ref-clock-num = <1>; - }; - - // Quad-SPI controller - qspi0: qspi@d000 { - compatible = "xlnx,zy7_qspi"; - status = "disabled"; - reg = <0xd000 0x1000>; - interrupts = <0 19 4>; - interrupt-parent = <&GIC>; - spi-clock = <50000000>; - }; - - // SDIO controllers - sdhci0: sdhci@100000 { - compatible = "xlnx,zy7_sdhci"; - status = "disabled"; - reg = <0x100000 0x1000>; - interrupts = <0 24 4>; - interrupt-parent = <&GIC>; - max-frequency = <50000000>; - }; - - sdhci1: sdhci@101000 { - compatible = "xlnx,zy7_sdhci"; - status = "disabled"; - reg = <0x101000 0x1000>; - interrupts = <0 47 4>; - interrupt-parent = <&GIC>; - max-frequency = <50000000>; - }; - - }; // ps7io@e0000000 -}; - Property changes on: head/sys/boot/fdt/dts/arm/zynq-7000.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/orangepi-plus-2e.dts =================================================================== --- head/sys/boot/fdt/dts/arm/orangepi-plus-2e.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/orangepi-plus-2e.dts (nonexistent) @@ -1,119 +0,0 @@ -/*- - * Copyright (c) 2016 Jared McNeill - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#include "sun8i-h3-orangepi-plus.dts" -#include "h3.dtsi" - -/ { - model = "Xunlong Orange Pi Plus 2E"; - compatible = "xunlong,orangepi-plus-2e", "allwinner,sun8i-h3"; - - reg_gmac_3v3: gmac-3v3 { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&emac_phy_reset_pin>; - regulator-name = "gmac-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <100000>; - enable-active-high; - gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; - }; -}; - -&pio { - emac_phy_reset_pin: emac_phy_reset_pin@0 { - allwinner,pins = "PD6"; - allwinner,function = "gpio_out"; - allwinner,drive = <10>; - }; - - codec_pa_pin: codec_pa_pin@0 { - allwinner,pins = "PA16"; - allwinner,function = "gpio_out"; - allwinner,drive = <10>; - }; -}; - -&emac { - pinctrl-names = "default"; - pinctrl-0 = <&emac_pins_rgmii_a>; - phy-supply = <®_gmac_3v3>; - phy-mode = "rgmii"; - phy = <&phy1>; - - allwinner,leds-active-low; - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&ehci2 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; -}; - -&r_i2c { - status = "okay"; - - vdd_cpu: regulator@65 { - compatible = "silergy,sy8106a"; - reg = <0x65>; - - regulator-name = "vdd-cpu"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-ramp-delay = <200>; - regulator-boot-on; - regulator-always-on; - }; -}; - -/* &codec { */ -/* pinctrl-names = "default"; */ -/* pinctrl-0 = <&codec_pa_pin>; */ -/* allwinner,pa-gpios = <&pio 0 16 GPIO_ACTIVE_HIGH>; /\* PA16 *\/ */ -/* status = "okay"; */ -/* }; */ - -&cpu0 { - cpu-supply = <&vdd_cpu>; - operating-points = < - /* kHz uV */ - 1296000 1340000 - 1200000 1320000 - 1008000 1200000 - 816000 1100000 - 648000 1040000 - >; -}; Property changes on: head/sys/boot/fdt/dts/arm/orangepi-plus-2e.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/db88f5182.dts =================================================================== --- head/sys/boot/fdt/dts/arm/db88f5182.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/db88f5182.dts (nonexistent) @@ -1,223 +0,0 @@ -/* - * Copyright (c) 2010 The FreeBSD Foundation - * All rights reserved. - * - * This software was developed by Semihalf under sponsorship from - * the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Marvell DB-88F5182 Device Tree Source. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "mrvl,DB-88F5182"; - compatible = "DB-88F5182-BP", "DB-88F5182-BP-A"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - serial0 = &serial0; - serial1 = &serial1; - mpp = &MPP; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,88FR531"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x08000000>; // 128M at 0x0 - }; - - localbus@f1000000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "mrvl,lbc"; - - /* This reflects CPU decode windows setup. */ - ranges = <0x0 0x0f 0xf9300000 0x00100000 - 0x1 0x1e 0xfa000000 0x00100000 - 0x2 0x1d 0xfa100000 0x02000000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x00100000>; - bank-width = <2>; - device-width = <1>; - }; - - led@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "led"; - reg = <0x1 0x0 0x00100000>; - }; - - nor@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x2 0x0 0x02000000>; - bank-width = <2>; - device-width = <1>; - }; - }; - - soc88f5182@f1000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0xf1000000 0x00100000>; - bus-frequency = <0>; - - PIC: pic@20200 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x20200 0x3c>; - compatible = "mrvl,pic"; - }; - - timer@20300 { - compatible = "mrvl,timer"; - reg = <0x20300 0x30>; - interrupts = <0>; - interrupt-parent = <&PIC>; - mrvl,has-wdt; - }; - - MPP: mpp@10000 { - #pin-cells = <2>; - compatible = "mrvl,mpp"; - reg = <0x10000 0x54>; - pin-count = <20>; - pin-map = < - 0 3 /* MPP[0]: GPIO[0] */ - 2 2 /* MPP[2]: PCI_REQn[3] */ - 3 2 /* MPP[3]: PCI_GNTn[3] */ - 4 2 /* MPP[4]: PCI_REQn[4] */ - 5 2 /* MPP[5]: PCI_GNTn[4] */ - 6 5 /* MPP[6]: SATA0_ACT */ - 7 5 /* MPP[7]: SATA1_ACT */ - 12 5 /* MPP[12]: SATA0_PRESENT */ - 13 5 /* MPP[13]: SATA1_PRESENT */ - 14 4 /* MPP[14]: NAND Flash REn[2] */ - 15 4 /* MPP[15]: NAND Flash WEn[2] */ - 16 0 /* MPP[16]: UA1_RXD */ - 17 0 /* MPP[17]: UA1_TXD */ - 18 0 /* MPP[18]: UA1_CTS */ - 19 0 >; /* MPP[19]: UA1_RTS */ - }; - - GPIO: gpio@10100 { - #gpio-cells = <3>; - compatible = "mrvl,gpio"; - reg = <0x10100 0x20>; - gpio-controller; - interrupts = <6 7 8 9>; - interrupt-parent = <&PIC>; - }; - - twsi@11000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,twsi"; - reg = <0x11000 0x20>; - interrupts = <43>; - interrupt-parent = <&PIC>; - }; - - enet0: ethernet@72000 { - #address-cells = <1>; - #size-cells = <1>; - model = "V1"; - compatible = "mrvl,ge"; - reg = <0x72000 0x2000>; - ranges = <0x0 0x72000 0x2000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <18 19 20 21 22>; - interrupt-parent = <&PIC>; - }; - - serial0: serial@12000 { - compatible = "ns16550"; - reg = <0x12000 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <3>; - interrupt-parent = <&PIC>; - }; - - serial1: serial@12100 { - compatible = "ns16550"; - reg = <0x12100 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <4>; - interrupt-parent = <&PIC>; - }; - - usb@50000 { - compatible = "mrvl,usb-ehci", "usb-ehci"; - reg = <0x50000 0x1000>; - interrupts = <17 16>; - interrupt-parent = <&PIC>; - }; - - idma@60000 { - compatible = "mrvl,idma"; - reg = <0x60000 0x1000>; - interrupts = <24 25 26 27 23>; - interrupt-parent = <&PIC>; - }; - - sata@80000 { - compatible = "mrvl,sata"; - reg = <0x80000 0x6000>; - interrupts = <29>; - interrupt-parent = <&PIC>; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/db88f5182.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/db88f5281.dts =================================================================== --- head/sys/boot/fdt/dts/arm/db88f5281.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/db88f5281.dts (nonexistent) @@ -1,227 +0,0 @@ -/* - * Copyright (c) 2010 The FreeBSD Foundation - * All rights reserved. - * - * This software was developed by Semihalf under sponsorship from - * the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Marvell DB-88F5281 Device Tree Source. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "mrvl,DB-88F5281"; - compatible = "DB-88F5281-BP", "DB-88F5281-BP-A"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - serial0 = &serial0; - serial1 = &serial1; - mpp = &MPP; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,88FR531"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x08000000>; // 128M at 0x0 - }; - - localbus@f1000000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "mrvl,lbc"; - - /* This reflects CPU decode windows setup. */ - ranges = <0x0 0x0f 0xf9300000 0x00100000 - 0x1 0x1e 0xfa000000 0x00100000 - 0x2 0x1d 0xfa100000 0x02000000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x00100000>; - bank-width = <2>; - device-width = <1>; - }; - - led@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "led"; - reg = <0x1 0x0 0x00100000>; - }; - - nor@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x2 0x0 0x02000000>; - bank-width = <2>; - device-width = <1>; - }; - }; - - soc88f5281@f1000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0xf1000000 0x00100000>; - bus-frequency = <0>; - - PIC: pic@20200 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x20200 0x3c>; - compatible = "mrvl,pic"; - }; - - timer@20300 { - compatible = "mrvl,timer"; - reg = <0x20300 0x30>; - interrupts = <0>; - interrupt-parent = <&PIC>; - mrvl,has-wdt; - }; - - MPP: mpp@10000 { - #pin-cells = <2>; - compatible = "mrvl,mpp"; - reg = <0x10000 0x54>; - pin-count = <20>; - pin-map = < - 0 3 /* MPP[0]: GPIO[0] */ - 2 2 /* MPP[2]: PCI_REQn[3] */ - 3 2 /* MPP[3]: PCI_GNTn[3] */ - 4 2 /* MPP[4]: PCI_REQn[4] */ - 5 2 /* MPP[5]: PCI_GNTn[4] */ - 6 3 /* MPP[6]: */ - 7 3 /* MPP[7]: */ - 8 3 /* MPP[8]: */ - 9 3 /* MPP[9]: */ - 14 4 /* MPP[14]: NAND Flash REn[2] */ - 15 4 /* MPP[15]: NAND Flash WEn[2] */ - 16 0 /* MPP[16]: UA1_RXD */ - 17 0 /* MPP[17]: UA1_TXD */ - 18 0 /* MPP[18]: UA1_CTS */ - 19 0 >; /* MPP[19]: UA1_RTS */ - }; - - GPIO: gpio@10100 { - #gpio-cells = <3>; - compatible = "mrvl,gpio"; - reg = <0x10100 0x20>; - gpio-controller; - interrupts = <6 7 8 9>; - interrupt-parent = <&PIC>; - }; - - twsi@11000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,twsi"; - reg = <0x11000 0x20>; - interrupts = <43>; - interrupt-parent = <&PIC>; - }; - - enet0: ethernet@72000 { - #address-cells = <1>; - #size-cells = <1>; - model = "V1"; - compatible = "mrvl,ge"; - reg = <0x72000 0x2000>; - ranges = <0x0 0x72000 0x2000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <18 19 20 21 22>; - interrupt-parent = <&PIC>; - phy-handle = <&phy0>; - - mdio@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,mdio"; - - phy0: ethernet-phy@0 { - reg = <0x8>; - }; - }; - }; - - serial0: serial@12000 { - compatible = "ns16550"; - reg = <0x12000 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <3>; - interrupt-parent = <&PIC>; - }; - - serial1: serial@12100 { - compatible = "ns16550"; - reg = <0x12100 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <4>; - interrupt-parent = <&PIC>; - }; - - usb@50000 { - compatible = "mrvl,usb-ehci", "usb-ehci"; - reg = <0x50000 0x1000>; - interrupts = <17 16>; - interrupt-parent = <&PIC>; - }; - - idma@60000 { - compatible = "mrvl,idma"; - reg = <0x60000 0x1000>; - interrupts = <24 25 26 27 23>; - interrupt-parent = <&PIC>; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/db88f5281.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/db88f6281.dts =================================================================== --- head/sys/boot/fdt/dts/arm/db88f6281.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/db88f6281.dts (nonexistent) @@ -1,299 +0,0 @@ -/* - * Copyright (c) 2009-2010 The FreeBSD Foundation - * All rights reserved. - * - * This software was developed by Semihalf under sponsorship from - * the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Marvell DB-88F6281 Device Tree Source. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "mrvl,DB-88F6281"; - compatible = "DB-88F6281-BP", "DB-88F6281-BP-A"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - mpp = &MPP; - pci0 = &pci0; - serial0 = &serial0; - serial1 = &serial1; - soc = &SOC; - sram = &SRAM; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,88FR131"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x20000000>; // 512M at 0x0 - }; - - localbus@0 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "mrvl,lbc"; - bank-count = <3>; - - /* This reflects CPU decode windows setup. */ - ranges = <0x0 0x2f 0xf9300000 0x00100000>; - - nand@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "mrvl,nfc"; - reg = <0x0 0x0 0x00100000>; - bank-width = <2>; - device-width = <1>; - - slice@0 { - reg = <0x0 0x200000>; - label = "u-boot"; - read-only; - }; - - slice@200000 { - reg = <0x200000 0x7e00000>; - label = "root"; - }; - }; - }; - - SOC: soc88f6281@f1000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0xf1000000 0x00100000>; - bus-frequency = <0>; - - PIC: pic@20200 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x20200 0x3c>; - compatible = "mrvl,pic"; - }; - - timer@20300 { - compatible = "mrvl,timer"; - reg = <0x20300 0x30>; - interrupts = <1>; - interrupt-parent = <&PIC>; - mrvl,has-wdt; - }; - - MPP: mpp@10000 { - #pin-cells = <2>; - compatible = "mrvl,mpp"; - reg = <0x10000 0x34>; - pin-count = <50>; - pin-map = < - 0 1 /* MPP[0]: NF_IO[2] */ - 1 1 /* MPP[1]: NF_IO[3] */ - 2 1 /* MPP[2]: NF_IO[4] */ - 3 1 /* MPP[3]: NF_IO[5] */ - 4 1 /* MPP[4]: NF_IO[6] */ - 5 1 /* MPP[5]: NF_IO[7] */ - 6 1 /* MPP[6]: SYSRST_OUTn */ - 7 2 /* MPP[7]: SPI_SCn */ - 8 1 /* MPP[8]: TW_SDA */ - 9 1 /* MPP[9]: TW_SCK */ - 10 3 /* MPP[10]: UA0_TXD */ - 11 3 /* MPP[11]: UA0_RXD */ - 12 1 /* MPP[12]: SD_CLK */ - 13 1 /* MPP[13]: SD_CMD */ - 14 1 /* MPP[14]: SD_D[0] */ - 15 1 /* MPP[15]: SD_D[1] */ - 16 1 /* MPP[16]: SD_D[2] */ - 17 1 /* MPP[17]: SD_D[3] */ - 18 1 /* MPP[18]: NF_IO[0] */ - 19 1 /* MPP[19]: NF_IO[1] */ - 20 5 /* MPP[20]: SATA1_AC */ - 21 5 >; /* MPP[21]: SATA0_AC */ - }; - - GPIO: gpio@10100 { - #gpio-cells = <3>; - compatible = "mrvl,gpio"; - reg = <0x10100 0x20>; - gpio-controller; - interrupts = <35 36 37 38 39 40 41>; - interrupt-parent = <&PIC>; - }; - - rtc@10300 { - compatible = "mrvl,rtc"; - reg = <0x10300 0x08>; - }; - - twsi@11000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,twsi"; - reg = <0x11000 0x20>; - interrupts = <43>; - interrupt-parent = <&PIC>; - }; - - enet0: ethernet@72000 { - #address-cells = <1>; - #size-cells = <1>; - model = "V2"; - compatible = "mrvl,ge"; - reg = <0x72000 0x2000>; - ranges = <0x0 0x72000 0x2000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <12 13 14 11 46>; - interrupt-parent = <&PIC>; - phy-handle = <&phy0>; - - mdio@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,mdio"; - - phy0: ethernet-phy@0 { - reg = <0x8>; - }; - }; - }; - - serial0: serial@12000 { - compatible = "ns16550"; - reg = <0x12000 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <33>; - interrupt-parent = <&PIC>; - }; - - serial1: serial@12100 { - compatible = "ns16550"; - reg = <0x12100 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <34>; - interrupt-parent = <&PIC>; - }; - - crypto@30000 { - compatible = "mrvl,cesa"; - reg = <0x30000 0x1000 /* tdma base reg chan 0 */ - 0x3D000 0x1000>; /* cesa base reg chan 0 */ - interrupts = <22>; - interrupt-parent = <&PIC>; - - sram-handle = <&SRAM>; - }; - - usb@50000 { - compatible = "mrvl,usb-ehci", "usb-ehci"; - reg = <0x50000 0x1000>; - interrupts = <48 19>; - interrupt-parent = <&PIC>; - }; - - xor@60000 { - compatible = "mrvl,xor"; - reg = <0x60000 0x1000>; - interrupts = <5 6 7 8>; - interrupt-parent = <&PIC>; - }; - - sata@80000 { - compatible = "mrvl,sata"; - reg = <0x80000 0x6000>; - interrupts = <21>; - interrupt-parent = <&PIC>; - }; - }; - - SRAM: sram@fd000000 { - compatible = "mrvl,cesa-sram"; - reg = <0xfd000000 0x00100000>; - }; - - pci0: pcie@f1040000 { - compatible = "mrvl,pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xf1040000 0x2000>; - bus-range = <0 255>; - ranges = <0x02000000 0x0 0xf1300000 0xf1300000 0x0 0x04000000 - 0x01000000 0x0 0x00000000 0xf1100000 0x0 0x00100000>; - clock-frequency = <33333333>; - interrupt-parent = <&PIC>; - interrupts = <44>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x1 */ - 0x0800 0x0 0x0 0x1 &PIC 0x9 - 0x0800 0x0 0x0 0x2 &PIC 0x9 - 0x0800 0x0 0x0 0x3 &PIC 0x9 - 0x0800 0x0 0x0 0x4 &PIC 0x9 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xf1300000 - 0x02000000 0x0 0xf1300000 - 0x0 0x04000000 - - 0x01000000 0x0 0x0 - 0x01000000 0x0 0x0 - 0x0 0x00100000>; - }; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/db88f6281.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/imx6.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/imx6.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/imx6.dtsi (nonexistent) @@ -1,464 +0,0 @@ -/* - * Copyright (c) 2013 Ian Lepore - * Copyright (c) 2012 The FreeBSD Foundation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Freescale i.MX6 Common Device Tree Source. - * There are enough differences between the Solo, Dual, Quad, and *-lite - * flavors of this SoC that eventually we will need a finer-grained breakdown - * of some of this stuff. For now this file works for all of them. I think. - * - * $FreeBSD$ - */ - -/ { - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,MCIMX6"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x8000>; - i-cache-size = <0x8000>; - /* TODO: describe L2 cache also */ - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - aliases { - soc = &SOC; - }; - - SOC: soc@00000000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&gic>; - ranges = <0x00000000 0x00000000 0x10000000>; - - gic: generic-interrupt-controller@00a00100 { - compatible = "arm,gic"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0x00a01000 0x00001000 - 0x00a00100 0x00000100>; - }; - - mp_tmr0@00a00200 { - compatible = "arm,mpcore-timers"; - reg = <0x00a00200 0x100 - 0x00a00600 0x100>; - interrupts = <27 29>; - interrupt-parent = <&gic>; - }; - - l2-cache@00a02000 { - compatible = "arm,pl310-cache", "arm,pl310"; - reg = <0xa02000 0x1000>; - interrupts = <124>; - cache-level = <0x2>; - interrupt-parent = < &gic >; - }; - - aips@02000000 { /* AIPS1 */ - compatible = "fsl,aips-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&gic>; - reg = <0x02000000 0x00100000>; - ranges; - - /* Required by many devices, so better to stay first */ - clks: ccm@020c4000 { - compatible = "fsl,imx6q-ccm"; - reg = <0x020c4000 0x4000>; - interrupts = <119 120>; - }; - - /* System Reset Controller */ - src: src@4006E000 { - compatible = "fsl,imx6-src"; - reg = <0x020D8000 0x100>; - }; - - sdma: sdma@020ec000 { - compatible = "fsl,imx6q-sdma"; - reg = <0x020ec000 0x4000>; - interrupt-parent = <&gic>; - interrupts = <34>; - status = "disabled"; - }; - - anatop: anatop@020c8000 { - compatible = "fsl,imx6q-anatop"; - reg = <0x020c8000 0x1000>; - interrupt-parent = <&gic>; - interrupts = <49>; - }; - - gpt: timer@02098000 { - compatible = "fsl,imx6q-gpt", "fsl,imx51-gpt"; - reg = <0x02098000 0x4000>; - interrupt-parent = <&gic>; - interrupts = <87>; - }; - - iomux@020e0000 { - compatible = "fsl,imx6q-iomuxc"; - reg = <0x020e0000 0x4000>; - interrupt-parent = <&gic>; - interrupts = <32>; - }; - - gpio1: gpio@0209c000 { - compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; - reg = <0x0209c000 0x4000>; - interrupts = < 98 99 >; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - status = "disabled"; - }; - - gpio2: gpio@020a0000 { - compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; - reg = <0x020a0000 0x4000>; - interrupts = < 100 101 >; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - status = "disabled"; - }; - - gpio3: gpio@020a4000 { - compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; - reg = <0x020a4000 0x4000>; - interrupts = < 102 103 >; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - status = "disabled"; - }; - - gpio4: gpio@020a8000 { - compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; - reg = <0x020a8000 0x4000>; - interrupts = < 104 105 >; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - status = "disabled"; - }; - - gpio5: gpio@020ac000 { - compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; - reg = <0x020ac000 0x4000>; - interrupts = < 106 107 >; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - status = "disabled"; - }; - - gpio6: gpio@020b0000 { - compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; - reg = <0x020b0000 0x4000>; - interrupts = < 108 109 >; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - status = "disabled"; - }; - - gpio7: gpio@020b4000 { - compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; - reg = <0x020b4000 0x4000>; - interrupts = < 110 111 >; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - status = "disabled"; - }; - - uart1: serial@02020000 { - compatible = "fsl,imx6q-uart"; - reg = <0x02020000 0x4000>; - interrupt-parent = <&gic>; - interrupts = <58>; - clock-frequency = <80000000>; - status = "disabled"; - }; - - uart2: serial@021e8000 { - compatible = "fsl,imx6q-uart"; - reg = <0x021e8000 0x4000>; - interrupt-parent = <&gic>; - interrupts = <59>; - clock-frequency = <80000000>; - status = "disabled"; - }; - - uart3: serial@021ec000 { - compatible = "fsl,imx6q-uart"; - reg = <0x021ec000 0x4000>; - interrupt-parent = <&gic>; - interrupts = <60>; - clock-frequency = <80000000>; - status = "disabled"; - }; - - uart4: serial@021f0000 { - compatible = "fsl,imx6q-uart"; - reg = <0x021f0000 0x4000>; - interrupt-parent = <&gic>; - interrupts = <61>; - clock-frequency = <80000000>; - status = "disabled"; - }; - - uart5: serial@021f4000 { - compatible = "fsl,imx6q-uart"; - reg = <0x021f4000 0x4000>; - interrupt-parent = <&gic>; - interrupts = <62>; - clock-frequency = <80000000>; - status = "disabled"; - }; - - usbphy1: usbphy@020c9000 { - compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; - reg = <0x020c9000 0x1000>; - interrupts = <44>; - status = "disabled"; - }; - - usbphy2: usbphy@020ca000 { - compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; - reg = <0x020ca000 0x1000>; - interrupts = <45>; - status = "disabled"; - }; - - ecspi1: ecspi@02008000 { - compatible = "fsl,imx6q-ecspi"; - reg = <0x02008000 0x4000>; - interrupts = < 63 >; - status = "disabled"; - }; - - ecspi2: ecspi@0200C000 { - compatible = "fsl,imx6q-ecspi"; - reg = <0x0200C000 0x4000>; - interrupts = < 64 >; - status = "disabled"; - }; - - ecspi3: ecspi@02010000 { - compatible = "fsl,imx6q-ecspi"; - reg = <0x02010000 0x4000>; - interrupts = < 65 >; - status = "disabled"; - }; - - ecspi4: ecspi@02014000 { - compatible = "fsl,imx6q-ecspi"; - reg = <0x02014000 0x4000>; - interrupts = < 66 >; - status = "disabled"; - }; - - ecspi5: ecspi@02018000 { - compatible = "fsl,imx6q-ecspi"; - reg = <0x02018000 0x4000>; - interrupts = < 67 >; - status = "disabled"; - }; - - ssi1: ssi@02028000 { - compatible = "fsl,imx6q-ssi"; - reg = <0x02028000 0x4000>; - interrupts = < 78 >; - dmas = <&sdma 37 1 0>, - <&sdma 38 1 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - ssi2: ssi@0202C000 { - compatible = "fsl,imx6q-ssi"; - reg = <0x0202C000 0x4000>; - interrupts = < 79 >; - status = "disabled"; - }; - - ssi3: ssi@02030000 { - compatible = "fsl,imx6q-ssi"; - reg = <0x02030000 0x4000>; - interrupts = < 80 >; - status = "disabled"; - }; - }; - - aips@02100000 { /* AIPS2 */ - compatible = "fsl,aips-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&gic>; - reg = <0x02100000 0x00100000>; - ranges; - - i2c1: i2c@021a0000 { - compatible = "fsl,imx6q-i2c"; - reg = <0x021a0000 0x4000>; - interrupts = < 68 >; - status = "disabled"; - }; - - i2c2: i2c@021a4000 { - compatible = "fsl,imx6q-i2c"; - reg = <0x021a4000 0x4000>; - interrupts = < 69 >; - status = "disabled"; - }; - - i2c3: i2c@021ac000 { - compatible = "fsl,imx6q-i2c"; - reg = <0x021a8000 0x4000>; - interrupts = < 70 >; - status = "disabled"; - }; - - fec1: ethernet@02188000 { - compatible = "fsl,imx6q-fec"; - reg = <0x02188000 0x4000>; - interrupts = <150 151>; - status = "disabled"; - }; - - usbotg1: usb@02184000 { - compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; - reg = <0x02184000 0x200>; - interrupts = <75>; - fsl,usbphy = <&usbphy1>; - fsl,usbmisc = <&usbmisc 0>; - status = "disabled"; - }; - - usbh1: usb@02184200 { - compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; - reg = <0x02184200 0x200>; - interrupts = <72>; - fsl,usbphy = <&usbphy2>; - fsl,usbmisc = <&usbmisc 1>; - status = "disabled"; - }; - - usbh2: usb@02184400 { - compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; - reg = <0x02184400 0x200>; - interrupts = <73>; - fsl,usbmisc = <&usbmisc 2>; - status = "disabled"; - }; - - usbh3: usb@02184600 { - compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; - reg = <0x02184600 0x200>; - interrupts = <74>; - fsl,usbmisc = <&usbmisc 3>; - status = "disabled"; - }; - - usbmisc: usbmisc@02184800 { - #index-cells = <1>; - compatible = "fsl,imx6q-usbmisc"; - reg = <0x02184800 0x200>; - // Not disabled on purpose. - }; - - usdhc1: usdhc@02190000 { - compatible = "fsl,imx6q-usdhc"; - reg = <0x02190000 0x4000>; - interrupt-parent = <&gic>; - interrupts = <54>; - cd-gpios = <&gpio1 2 0>; - bus-width = <0x4>; - status ="disabled"; - }; - - usdhc2: usdhc@02194000 { - compatible = "fsl,imx6q-usdhc"; - reg = <0x02194000 0x4000>; - interrupt-parent = <&gic>; - interrupts = <55>; - non-removable; - bus-width = <0x4>; - status ="disabled"; - }; - - usdhc3: usdhc@02198000 { - compatible = "fsl,imx6q-usdhc"; - reg = <0x02198000 0x4000>; - interrupt-parent = <&gic>; - interrupts = <56>; - cd-gpios = <&gpio3 9 0>; - bus-width = <0x4>; - status ="disabled"; - }; - - usdhc4: usdhc@0219c000 { - compatible = "fsl,imx6q-usdhc"; - reg = <0x0219c000 0x4000>; - interrupt-parent = <&gic>; - interrupts = <57>; - bus-width = <0x4>; - status ="disabled"; - }; - - ocotp0: ocotp@021bc000 { - compatible = "fsl,imx6q-ocotp"; - reg = <0x021bc000 0x4000>; - }; - - audmux: audmux@021d8000 { - compatible = "fsl,imx6q-audmux"; - reg = <0x021d8000 0x4000>; - status = "disabled"; - }; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/imx6.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/exynos5420-arndale-octa.dts =================================================================== --- head/sys/boot/fdt/dts/arm/exynos5420-arndale-octa.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/exynos5420-arndale-octa.dts (nonexistent) @@ -1,70 +0,0 @@ -/*- - * Copyright (c) 2014 Ruslan Bukin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/include/ "exynos5420.dtsi" - -/ { - model = "Arndale Octa Board"; - - memory { - device_type = "memory"; - reg = < 0x20000000 0x7f200000 >; /* 2G */ - }; - - SOC: Exynos5@0 { - serial3: serial@12C30000 { - status = "okay"; - }; - - usb@12110000 { - status = "okay"; - }; - - mmc2: dwmmc@12220000 { - status = "okay"; - num-slots = <1>; - supports-highspeed; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; - bus-frequency = <50000000>; - - slot@0 { - reg = <0>; - bus-width = <4>; - }; - }; - }; - - chosen { - stdin = &serial3; - stdout = &serial3; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/exynos5420-arndale-octa.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/trimslice.dts =================================================================== --- head/sys/boot/fdt/dts/arm/trimslice.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/trimslice.dts (nonexistent) @@ -1,143 +0,0 @@ -/*- - * Copyright (c) 2011 The FreeBSD Foundation - * All rights reserved. - * - * Developed by Damjan Marion - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "CompuLab TrimSlice"; - compatible = "compulab,trimslice", "nvidia,tegra20"; - #address-cells = <1>; - #size-cells = <1>; - - interrupt-parent = <&GIC>; - - aliases { - serial0 = &serial0; - soc = &SOC; - }; - - memory { - device_type = "memory"; - reg = < 0x00000000 0x40000000 >; /* 1GB RAM at 0x0 */ - }; - - - SOC: tegra20@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges; - bus-frequency = <0>; - - GIC: interrupt-controller@50041000 { - compatible = "arm,gic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = < 0x50041000 0x1000 >, /* Distributor Registers */ - < 0x50040100 0x0100 >; /* CPU Interface Registers */ - }; - mp_tmr@50040200 { - compatible = "arm,mpcore-timers"; - clock-frequency = < 50040200 >; - #address-cells = <1>; - #size-cells = <0>; - reg = < 0x50040200 0x100 >, /* Global Timer Registers */ - < 0x50040600 0x100 >; /* Private Timer Registers */ - interrupts = < 27 29 >; - interrupt-parent = < &GIC >; - }; - - tmr1@60005000 { - compatible = "nvidia,tegra2-timer"; - reg = <0x60005000 0x8>; - interrupts = < 32 >; - interrupt-parent = <&GIC>; - }; - - tmr2@60005008 { - compatible = "nvidia,tegra2-timer"; - reg = <0x60005008 0x8>; - interrupts = < 33 >; - interrupt-parent = <&GIC>; - }; - - tmrus@60005010 { - compatible = "nvidia,tegra2-timestamp"; - reg = <0x60005010 0x8>; - }; - - tmr3@60005050 { - compatible = "nvidia,tegra2-timer"; - reg = <0x60005050 0x8>; - interrupts = < 73 >; - interrupt-parent = <&GIC>; - }; - - tmr4@60005058 { - compatible = "nvidia,tegra2-timer"; - reg = <0x60005058 0x8>; - interrupts = < 74 >; - interrupt-parent = <&GIC>; - }; - - serial0: serial@70006000 { - compatible = "ns16550"; - reg = <0x70006000 0x40>; - reg-shift = <2>; - interrupts = < 68 >; - interrupt-parent = <&GIC>; - clock-frequency = < 215654400 >; - }; - - serial1: serial@70006040 { - compatible = "ns16550"; - reg = <0x70006040 0x40>; - reg-shift = <2>; - interrupts = < 69 >; - interrupt-parent = <&GIC>; - clock-frequency = < 215654400 >; - }; - - serial2: serial@70006200 { - compatible = "ns16550"; - reg = <0x70006200 0x100>; - reg-shift = <2>; - interrupts = < 78 >; - interrupt-parent = <&GIC>; - clock-frequency = < 215654400 >; - }; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/trimslice.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/sun8i-a83t.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/sun8i-a83t.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/sun8i-a83t.dtsi (nonexistent) @@ -1,510 +0,0 @@ -/* - * Copyright 2015 Vishnu Patekar - * - * Vishnu Patekar - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * $FreeBSD$ - */ - -#include "skeleton.dtsi" - -#include - -#include - -/ { - interrupt-parent = <&gic>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <0>; - }; - - cpu@1 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <1>; - }; - - cpu@2 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <2>; - }; - - cpu@3 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <3>; - }; - - cpu@100 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <0x100>; - }; - - cpu@101 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <0x101>; - }; - - cpu@102 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <0x102>; - }; - - cpu@103 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <0x103>; - }; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = , - , - , - ; - }; - - clocks { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - /* TODO: PRCM block has a mux for this. */ - osc24M: osc24M_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "osc24M"; - }; - - /* - * This is called "internal OSC" in some places. - * It is an internal RC-based oscillator. - * TODO: Its controls are in the PRCM block. - */ - osc16M: osc16M_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <16000000>; - clock-output-names = "osc16M"; - }; - - osc16Md512: osc16Md512_clk { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <512>; - clock-mult = <1>; - clocks = <&osc16M>; - clock-output-names = "osc16M-d512"; - }; - - pll6: clk@01c20028 { - #clock-cells = <0>; - compatible = "allwinner,sun9i-a80-pll4-clk"; - reg = <0x01c20028 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll6"; - }; - - pll6d2: pll6d2_clk { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <2>; - clock-mult = <1>; - clocks = <&pll6>; - clock-output-names = "pll6d2"; - }; - - ahb1: clk@01c20054 { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a83t-ahb1-clk"; - reg = <0x01c20054 0x4>; - clocks = <&osc16Md512>, <&osc24M>, <&pll6>, <&pll6>; - clock-output-names = "ahb1"; - }; - - apb1: apb1_clk@01c20054 { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a83t-apb1-clk"; - reg = <0x01c20054 0x4>; - clocks = <&ahb1>; - clock-output-names = "apb1"; - }; - - apb2: clk@01c20058 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-apb1-clk"; - reg = <0x01c20058 0x4>; - clocks = <&osc16Md512>, <&osc24M>, <&pll6>, <&pll6>; - clock-output-names = "apb2"; - }; - - ahb2: clk@01c2005c { - #clock-cells = <0>; - compatible = "allwinner,sun8i-h3-ahb2-clk"; - reg = <0x01c2005c 0x4>; - clocks = <&ahb1>, <&pll6d2>; - clock-output-names = "ahb2"; - }; - - bus_gates: clk@01c20060 { - #clock-cells = <1>; - compatible = "allwinner,sun8i-a83t-bus-gates-clk"; - reg = <0x01c20060 0x10>; - clocks = <&ahb1>, <&ahb2>, <&apb1>, <&apb2>; - clock-names = "ahb1", "ahb2", "apb1", "apb2"; - clock-indices = <1>, <5>, <6>, - <8>, <9>, <10>, - <13>, <14>, <17>, - <19>, <20>, - <21>, <24>, - <26>, <27>, - <29>, <32>, - <36>, <37>, - <40>, <43>, - <44>, <52>, <53>, - <54>, <65>, - <69>, <76>, <77>, - <78>, <79>, <96>, - <97>, <98>, - <112>, <113>, - <114>, <115>, - <116>; - clock-output-names = "bus_mipidsi", "bus_ss", "bus_dma", - "bus_mmc0", "bus_mmc1", "bus_mmc2", - "bus_nand", "bus_sdram", "bus_emac", - "bus_hstimer", "bus_spi0", - "bus_spi1", "bus_usb_otg", - "bus_ehci0", "bus_ehci1", - "bus_ohci0", "bus_ve", - "bus_lcd0", "bus_lcd1", - "bus_csi", "bus_hdmi", - "bus_de", "bus_gpu", "bus_msgbox", - "bus_spinlock", "bus_spdif", - "bus_pio", "bus_i2s0", "bus_i2s1", - "bus_i2s2", "bus_tdm", "bus_i2c0", - "bus_i2c1", "bus_i2c2", - "bus_uart0", "bus_uart1", - "bus_uart2", "bus_uart3", - "bus_uart4"; - }; - - mmc0_clk: clk@01c20088 { - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c20088 0x4>; - clocks = <&osc24M>, <&pll6>; - clock-output-names = "mmc0", - "mmc0_output", - "mmc0_sample"; - }; - - mmc1_clk: clk@01c2008c { - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c2008c 0x4>; - clocks = <&osc24M>, <&pll6>; - clock-output-names = "mmc1", - "mmc1_output", - "mmc1_sample"; - }; - - mmc2_clk: clk@01c20090 { - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c20090 0x4>; - clocks = <&osc24M>, <&pll6>; - clock-output-names = "mmc2", - "mmc2_output", - "mmc2_sample"; - }; - - cpus_clk: clk@01f01400 { - compatible = "allwinner,sun9i-a80-cpus-clk"; - reg = <0x01f01400 0x4>; - #clock-cells = <0>; - clocks = <&osc16Md512>, <&osc24M>, <&pll6>, <&osc16M>; - clock-output-names = "cpus"; - }; - - ahb0: ahb0_clk { - compatible = "fixed-factor-clock"; - #clock-cells = <0>; - clock-div = <1>; - clock-mult = <1>; - clocks = <&cpus_clk>; - clock-output-names = "ahb0"; - }; - - apb0: clk@01f0140c { - compatible = "allwinner,sun8i-a23-apb0-clk"; - reg = <0x01f0140c 0x4>; - #clock-cells = <0>; - clocks = <&ahb0>; - clock-output-names = "apb0"; - }; - - apb0_gates: clk@01f01428 { - compatible = "allwinner,sun8i-a83t-apb0-gates-clk"; - reg = <0x01f01428 0x4>; - #clock-cells = <1>; - clocks = <&apb0>; - clock-indices = <0>, <1>, - <2>, <3>, - <4>, <6>, <7>; - clock-output-names = "apb0_pio", "apb0_ir", - "apb0_timer", "apb0_rsb", - "apb0_uart", "apb0_i2c0", "apb0_twd"; - }; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - mmc0: mmc@01c0f000 { - compatible = "allwinner,sun5i-a13-mmc"; - reg = <0x01c0f000 0x1000>; - clocks = <&bus_gates 8>, - <&mmc0_clk 0>, - <&mmc0_clk 1>, - <&mmc0_clk 2>; - clock-names = "ahb", - "mmc", - "output", - "sample"; - resets = <&ahb_reset 8>; - reset-names = "ahb"; - interrupts = ; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc1: mmc@01c10000 { - compatible = "allwinner,sun5i-a13-mmc"; - reg = <0x01c10000 0x1000>; - clocks = <&bus_gates 9>, - <&mmc1_clk 0>, - <&mmc1_clk 1>, - <&mmc1_clk 2>; - clock-names = "ahb", - "mmc", - "output", - "sample"; - resets = <&ahb_reset 9>; - reset-names = "ahb"; - interrupts = ; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc2: mmc@01c11000 { - compatible = "allwinner,sun5i-a13-mmc"; - reg = <0x01c11000 0x1000>; - clocks = <&bus_gates 10>, - <&mmc2_clk 0>, - <&mmc2_clk 1>, - <&mmc2_clk 2>; - clock-names = "ahb", - "mmc", - "output", - "sample"; - resets = <&ahb_reset 10>; - reset-names = "ahb"; - interrupts = ; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - pio: pinctrl@01c20800 { - compatible = "allwinner,sun8i-a83t-pinctrl"; - interrupts = , - , - ; - reg = <0x01c20800 0x400>; - clocks = <&bus_gates 69>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <3>; - #gpio-cells = <3>; - - mmc0_pins_a: mmc0@0 { - allwinner,pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; - allwinner,function = "mmc0"; - allwinner,drive = ; - allwinner,pull = ; - }; - - mmc0_cd_pin_reference_design: mmc0_cd_pin@0 { - allwinner,pins = "PF6"; - allwinner,function = "gpio_in"; - allwinner,drive = ; - allwinner,pull = ; - }; - - uart0_pins_a: uart0@0 { - allwinner,pins = "PF2", "PF4"; - allwinner,function = "uart0"; - allwinner,drive = ; - allwinner,pull = ; - }; - - uart0_pins_b: uart0@1 { - allwinner,pins = "PB9", "PB10"; - allwinner,function = "uart0"; - allwinner,drive = ; - allwinner,pull = ; - }; - }; - - ahb_reset: reset@01c202c0 { - reg = <0x01c202c0 0xc>; - compatible = "allwinner,sun6i-a31-clock-reset"; - #reset-cells = <1>; - }; - - apb1_reset: reset@01c202d0 { - reg = <0x01c202d0 0x4>; - compatible = "allwinner,sun6i-a31-clock-reset"; - #reset-cells = <1>; - }; - - apb2_reset: reset@01c202d8 { - reg = <0x01c202d8 0x4>; - compatible = "allwinner,sun6i-a31-clock-reset"; - #reset-cells = <1>; - }; - - timer@01c20c00 { - compatible = "allwinner,sun4i-a10-timer"; - reg = <0x01c20c00 0xa0>; - interrupts = , - ; - clocks = <&osc24M>; - }; - - watchdog@01c20ca0 { - compatible = "allwinner,sun6i-a31-wdt"; - reg = <0x01c20ca0 0x20>; - interrupts = ; - clocks = <&osc24M>; - }; - - uart0: serial@01c28000 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28000 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&bus_gates 112>; - resets = <&apb2_reset 16>; - status = "disabled"; - }; - - gic: interrupt-controller@01c81000 { - compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; - reg = <0x01c81000 0x1000>, - <0x01c82000 0x1000>, - <0x01c84000 0x2000>, - <0x01c86000 0x2000>; - interrupt-controller; - #interrupt-cells = <3>; - interrupts = ; - }; - - apb0_reset: reset@01f014b0 { - reg = <0x01f014b0 0x4>; - compatible = "allwinner,sun6i-a31-clock-reset"; - #reset-cells = <1>; - }; - - r_pio: pinctrl@01f02c00 { - compatible = "allwinner,sun8i-a83t-r-pinctrl"; - reg = <0x01f02c00 0x400>; - interrupts = ; - clocks = <&apb0_gates 0>; - resets = <&apb0_reset 0>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <3>; - #gpio-cells = <3>; - - r_rsb_pins: r_rsb { - allwinner,pins = "PL0", "PL1"; - allwinner,function = "s_rsb"; - allwinner,drive = ; - allwinner,pull = ; - }; - }; - - r_rsb: i2c@01f03400 { - compatible = "allwinner,sun8i-a23-rsb"; - reg = <0x01f03400 0x400>; - interrupts = ; - clocks = <&apb0_gates 3>; - clock-frequency = <3000000>; - resets = <&apb0_reset 3>; - pinctrl-names = "default"; - pinctrl-0 = <&r_rsb_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/sun8i-a83t.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/Makefile =================================================================== --- head/sys/boot/fdt/dts/arm/Makefile (revision 325825) +++ head/sys/boot/fdt/dts/arm/Makefile (nonexistent) @@ -1,7 +0,0 @@ -# $FreeBSD$ - -DTS!=ls *.dts - -all: test-dts - -.include Property changes on: head/sys/boot/fdt/dts/arm/Makefile ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/armada-38x-solidrun-microsom.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/armada-38x-solidrun-microsom.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/armada-38x-solidrun-microsom.dtsi (nonexistent) @@ -1,130 +0,0 @@ -/* - * Device Tree file for SolidRun Armada 38x Microsom - * - * Copyright (C) 2015 Russell King - * - * This board is in development; the contents of this file work with - * the A1 rev 2.0 of the board, which does not represent final - * production board. Things will change, don't expect this file to - * remain compatible info the future. - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This file is distributed in the hope that it will be useful - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * $FreeBSD$ - */ -#include -#include - -/ { - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; /* 256 MB */ - }; - - soc { - ranges = ; - - internal-regs { - ethernet@70000 { - pinctrl-0 = <&ge0_rgmii_pins>; - pinctrl-names = "default"; - phy = <&phy_dedicated>; - phy-mode = "rgmii-id"; - buffer-manager = <&bm>; - bm,pool-long = <0>; - bm,pool-short = <1>; - status = "okay"; - }; - - mdio@72004 { - /* - * Add the phy clock here, so the phy can be - * accessed to read its IDs prior to binding - * with the driver. - */ - pinctrl-0 = <&mdio_pins µsom_phy_clk_pins>; - pinctrl-names = "default"; - - phy_dedicated: ethernet-phy@0 { - /* - * Annoyingly, the marvell phy driver - * configures the LED register, rather - * than preserving reset-loaded setting. - * We undo that rubbish here. - */ - marvell,reg-init = <3 16 0 0x101e>; - reg = <0>; - }; - }; - - pinctrl@18000 { - microsom_phy_clk_pins: microsom-phy-clk-pins { - marvell,pins = "mpp45"; - marvell,function = "ref"; - }; - }; - - rtc@a3800 { - /* - * If the rtc doesn't work, run "date reset" - * twice in u-boot. - */ - status = "okay"; - }; - - serial@12000 { - pinctrl-0 = <&uart0_pins>; - pinctrl-names = "default"; - status = "okay"; - }; - - bm@c8000 { - status = "okay"; - }; - }; - - bm-bppi { - status = "okay"; - }; - - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/armada-38x-solidrun-microsom.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/dockstar.dts =================================================================== --- head/sys/boot/fdt/dts/arm/dockstar.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/dockstar.dts (nonexistent) @@ -1,241 +0,0 @@ -/* - * Copyright (c) 2010 The FreeBSD Foundation - * All rights reserved. - * - * This software was developed by Semihalf under sponsorship from - * the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Seagate DockStar (Marvell SheevaPlug based) Device Tree Source. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "seagate,DockStar"; - compatible = "DockStar"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - mpp = &MPP; - serial0 = &serial0; - serial1 = &serial1; - soc = &SOC; - sram = &SRAM; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,88FR131"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x8000000>; // 128M at 0x0 - }; - - localbus@f1000000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "mrvl,lbc"; - - /* This reflects CPU decode windows setup for NAND access. */ - ranges = <0x0 0x2f 0xf9300000 0x00100000>; - - nand@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "mrvl,nfc"; - reg = <0x0 0x0 0x00100000>; - bank-width = <2>; - device-width = <1>; - }; - }; - - SOC: soc88f6281@f1000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0xf1000000 0x00100000>; - bus-frequency = <0>; - - PIC: pic@20200 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x20200 0x3c>; - compatible = "mrvl,pic"; - }; - - timer@20300 { - compatible = "mrvl,timer"; - reg = <0x20300 0x30>; - interrupts = <1>; - interrupt-parent = <&PIC>; - mrvl,has-wdt; - }; - - MPP: mpp@10000 { - #pin-cells = <2>; - compatible = "mrvl,mpp"; - reg = <0x10000 0x34>; - pin-count = <50>; - pin-map = < - 0 1 /* MPP[0]: NF_IO[2] */ - 1 1 /* MPP[1]: NF_IO[3] */ - 2 1 /* MPP[2]: NF_IO[4] */ - 3 1 /* MPP[3]: NF_IO[5] */ - 4 1 /* MPP[4]: NF_IO[6] */ - 5 1 /* MPP[5]: NF_IO[7] */ - 6 1 /* MPP[6]: SYSRST_OUTn */ - 8 2 /* MPP[8]: UA0_RTS */ - 9 2 /* MPP[9]: UA0_CTS */ - 10 3 /* MPP[10]: UA0_TXD */ - 11 3 /* MPP[11]: UA0_RXD */ - 12 1 /* MPP[12]: SD_CLK */ - 13 1 /* MPP[13]: SD_CMD */ - 14 1 /* MPP[14]: SD_D[0] */ - 15 1 /* MPP[15]: SD_D[1] */ - 16 1 /* MPP[16]: SD_D[2] */ - 17 1 /* MPP[17]: SD_D[3] */ - 18 1 /* MPP[18]: NF_IO[0] */ - 19 1 /* MPP[19]: NF_IO[1] */ - 29 1 >; /* MPP[29]: TSMP[9] */ - }; - - GPIO: gpio@10100 { - #gpio-cells = <3>; - compatible = "mrvl,gpio"; - reg = <0x10100 0x20>; - gpio-controller; - interrupts = <35 36 37 38 39 40 41>; - interrupt-parent = <&PIC>; - }; - - rtc@10300 { - compatible = "mrvl,rtc"; - reg = <0x10300 0x08>; - }; - - twsi@11000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,twsi"; - reg = <0x11000 0x20>; - interrupts = <43>; - interrupt-parent = <&PIC>; - }; - - enet0: ethernet@72000 { - #address-cells = <1>; - #size-cells = <1>; - model = "V2"; - compatible = "mrvl,ge"; - reg = <0x72000 0x2000>; - ranges = <0x0 0x72000 0x2000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <12 13 14 11 46>; - interrupt-parent = <&PIC>; - phy-handle = <&phy0>; - - mdio@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,mdio"; - - phy0: ethernet-phy@0 { - reg = <0x0>; - }; - }; - }; - - serial0: serial@12000 { - compatible = "ns16550"; - reg = <0x12000 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <33>; - interrupt-parent = <&PIC>; - }; - - serial1: serial@12100 { - compatible = "ns16550"; - reg = <0x12100 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <34>; - interrupt-parent = <&PIC>; - }; - - crypto@30000 { - compatible = "mrvl,cesa"; - reg = <0x30000 0x1000 /* tdma base reg chan 0 */ - 0x3D000 0x1000>; /* cesa base reg chan 0 */ - interrupts = <22>; - interrupt-parent = <&PIC>; - - sram-handle = <&SRAM>; - }; - - usb@50000 { - compatible = "mrvl,usb-ehci", "usb-ehci"; - reg = <0x50000 0x1000>; - interrupts = <48 19>; - interrupt-parent = <&PIC>; - }; - - xor@60000 { - compatible = "mrvl,xor"; - reg = <0x60000 0x1000>; - interrupts = <5 6 7 8>; - interrupt-parent = <&PIC>; - }; - }; - - SRAM: sram@fd000000 { - compatible = "mrvl,cesa-sram"; - reg = <0xfd000000 0x00100000>; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/dockstar.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/rk3188-radxa-lite.dts =================================================================== --- head/sys/boot/fdt/dts/arm/rk3188-radxa-lite.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/rk3188-radxa-lite.dts (nonexistent) @@ -1,63 +0,0 @@ -/*- - * Copyright (c) 2014 Ganbold Tsagaankhuu - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/include/ "rk3188.dtsi" - -/ { - model = "Radxa RadxaRock Lite"; - - memory { - device_type = "memory"; - reg = < 0x60000000 0x40000000 >; /* 1GB RAM */ - }; - - aliases { - soc = &SOC; - }; - - SOC: rk3188 { - - uart2: serial@20064000 { - status = "okay"; - }; - - mmc@10214000 { - status = "okay"; - }; - - }; - - chosen { - bootargs = "-v"; - stdin = &uart2; - stdout = &uart2; - }; -}; - Property changes on: head/sys/boot/fdt/dts/arm/rk3188-radxa-lite.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/socfpga_cyclone5_sockit_sdmmc.dts =================================================================== --- head/sys/boot/fdt/dts/arm/socfpga_cyclone5_sockit_sdmmc.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/socfpga_cyclone5_sockit_sdmmc.dts (nonexistent) @@ -1,74 +0,0 @@ -/*- - * Copyright (c) 2017 Ruslan Bukin - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* /dts-v1/; */ -#include "socfpga_cyclone5_sockit.dts" - -/ { - model = "Terasic SoCkit"; - compatible = "altr,socfpga-cyclone5", "altr,socfpga"; - - /* Reserve first page for secondary CPU trampoline code */ - memreserve = < 0x00000000 0x1000 >; - - soc { - /* Local timer */ - timer@fffec600 { - clock-frequency = <200000000>; - }; - - /* Global timer */ - global_timer: timer@fffec200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0xfffec200 0x20>; - interrupts = <1 11 0xf04>; - clock-frequency = <200000000>; - }; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -}; - -&mmc0 { - bus-frequency = <25000000>; -}; - -&uart0 { - clock-frequency = <100000000>; -}; - -&uart1 { - status = "disabled"; -}; Property changes on: head/sys/boot/fdt/dts/arm/socfpga_cyclone5_sockit_sdmmc.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/dreamplug-1001.dts =================================================================== --- head/sys/boot/fdt/dts/arm/dreamplug-1001.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/dreamplug-1001.dts (nonexistent) @@ -1,320 +0,0 @@ -/* - * Copyright (c) 2013 Ian Lepore - * Copyright (c) 2010 The FreeBSD Foundation - * All rights reserved. - * - * This software substantially based on work developed by Semihalf - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * GlobalScale Technologies DreamPlug Device Tree Source. - * - * This source is for version 10 revision 01 units with NOR SPI flash. - * These units are marked "1001" on the serial number label. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "GlobalScale Technologies Dreamplug v1001"; - compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - mpp = &MPP; - serial0 = &serial0; - serial1 = &serial1; - soc = &SOC; - sram = &SRAM; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,88FR131"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - - }; - - memory { - device_type = "memory"; - reg = <0x0 0x20000000>; // 512M at 0x0 - }; - - localbus@0 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "mrvl,lbc"; - bank-count = <1>; - - /* This reflects CPU decode windows setup. */ - ranges = <0x0 0x1e 0xfa000000 0x00100000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x00100000>; - bank-width = <2>; - device-width = <1>; - }; - }; - - SOC: soc88f6281@f1000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0xf1000000 0x00100000>; - bus-frequency = <0>; - - PIC: pic@20200 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x20200 0x3c>; - compatible = "mrvl,pic"; - }; - - timer@20300 { - compatible = "mrvl,timer"; - reg = <0x20300 0x30>; - interrupts = <1>; - interrupt-parent = <&PIC>; - mrvl,has-wdt; - }; - - MPP: mpp@10000 { - #pin-cells = <2>; - compatible = "mrvl,mpp"; - reg = <0x10000 0x34>; - pin-count = <50>; - pin-map = < - 0 2 /* MPP[ 0]: SPI_SCn */ - 1 2 /* MPP[ 1]: SPI_MOSI */ - 2 2 /* MPP[ 2]: SPI_SCK */ - 3 2 /* MPP[ 3]: SPI_MISO */ - 4 1 /* MPP[ 4]: NF_IO[6] */ - 5 1 /* MPP[ 5]: NF_IO[7] */ - 6 1 /* MPP[ 6]: SYSRST_OUTn */ - 7 0 /* MPP[ 7]: GPO[7] */ - 8 1 /* MPP[ 8]: TW_SDA */ - 9 1 /* MPP[ 9]: TW_SCK */ - 10 3 /* MPP[10]: UA0_TXD */ - 11 3 /* MPP[11]: US0_RXD */ - 12 1 /* MPP[12]: SD_CLK */ - 13 1 /* MPP[13]: SD_CMD */ - 14 1 /* MPP[14]: SD_D[0] */ - 15 1 /* MPP[15]: SD_D[1] */ - 16 1 /* MPP[16]: SD_D[2] */ - 17 1 /* MPP[17]: SD_D[3] */ - 18 1 /* MPP[18]: NF_IO[0] */ - 19 1 /* MPP[19]: NF_IO[1] */ - 20 3 /* MPP[20]: GE1[ 0] */ - 21 3 /* MPP[21]: GE1[ 1] */ - 22 3 /* MPP[22]: GE1[ 2] */ - 23 3 /* MPP[23]: GE1[ 3] */ - 24 3 /* MPP[24]: GE1[ 4] */ - 25 3 /* MPP[25]: GE1[ 5] */ - 26 3 /* MPP[26]: GE1[ 6] */ - 27 3 /* MPP[27]: GE1[ 7] */ - 28 3 /* MPP[28]: GE1[ 8] */ - 29 3 /* MPP[29]: GE1[ 9] */ - 30 3 /* MPP[30]: GE1[10] */ - 31 3 /* MPP[31]: GE1[11] */ - 32 3 /* MPP[32]: GE1[12] */ - 33 3 /* MPP[33]: GE1[13] */ - 34 3 /* MPP[34]: GE1[14] */ - 35 3 /* MPP[35]: GE1[15] */ - 36 0 /* MPP[36]: GPIO[36] */ - 37 0 /* MPP[37]: GPIO[37] */ - 38 0 /* MPP[38]: GPIO[38] */ - 39 0 /* MPP[39]: GPIO[39] */ - 40 2 /* MPP[40]: TDM_SPI_SCK */ - 41 2 /* MPP[41]: TDM_SPI_MISO */ - 42 2 /* MPP[42]: TDM_SPI_MOSI */ - 43 0 /* MPP[43]: GPIO[43] */ - 44 0 /* MPP[44]: GPIO[44] */ - 45 0 /* MPP[45]: GPIO[45] */ - 46 0 /* MPP[46]: GPIO[46] */ - 47 0 /* MPP[47]: GPIO[47] */ - 48 0 /* MPP[48]: GPIO[48] */ - 49 0 /* MPP[49]: GPIO[49] */ - >; - }; - - GPIO: gpio@10100 { - #gpio-cells = <3>; - compatible = "mrvl,gpio"; - reg = <0x10100 0x20>; - gpio-controller; - interrupts = <35 36 37 38 39 40 41>; - interrupt-parent = <&PIC>; - pin-count = <50>; - }; - - gpioled@0 { - compatible = "mrvl,gpioled"; - - gpios = <&GPIO 47 2 0 /* GPIO[47] BT LED: OUT */ - &GPIO 48 2 0 /* GPIO[48] WLAN LED: OUT */ - &GPIO 49 2 0>; /* GPIO[49] WLAN AP LED: OUT */ - }; - - rtc@10300 { - compatible = "mrvl,rtc"; - reg = <0x10300 0x08>; - }; - - twsi@11000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,twsi"; - reg = <0x11000 0x20>; - interrupts = <43>; - interrupt-parent = <&PIC>; - }; - - enet0: ethernet@72000 { - #address-cells = <1>; - #size-cells = <1>; - model = "V2"; - compatible = "mrvl,ge"; - reg = <0x72000 0x2000>; - ranges = <0x0 0x72000 0x2000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <12 13 14 11 46>; - interrupt-parent = <&PIC>; - phy-handle = <&phy0>; - - mdio@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,mdio"; - - phy0: ethernet-phy@0 { - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - reg = <0x1>; - }; - }; - }; - - enet1: ethernet@76000 { - #address-cells = <1>; - #size-cells = <1>; - model = "V2"; - compatible = "mrvl,ge"; - reg = <0x76000 0x02000>; - ranges = <0x0 0x76000 0x2000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <16 17 18 15 47>; - interrupt-parent = <&PIC>; - phy-handle = <&phy1>; - }; - - serial0: serial@12000 { - compatible = "ns16550"; - reg = <0x12000 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <33>; - interrupt-parent = <&PIC>; - }; - - serial1: serial@12100 { - compatible = "ns16550"; - reg = <0x12100 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <34>; - interrupt-parent = <&PIC>; - }; - - crypto@30000 { - compatible = "mrvl,cesa"; - reg = <0x30000 0x1000 /* tdma base reg chan 0 */ - 0x3D000 0x1000>; /* cesa base reg chan 0 */ - interrupts = <22>; - interrupt-parent = <&PIC>; - - sram-handle = <&SRAM>; - }; - - usb@50000 { - compatible = "mrvl,usb-ehci", "usb-ehci"; - reg = <0x50000 0x1000>; - interrupts = <48 19>; - interrupt-parent = <&PIC>; - }; - - xor@60000 { - compatible = "mrvl,xor"; - reg = <0x60000 0x1000>; - interrupts = <5 6 7 8>; - interrupt-parent = <&PIC>; - }; - - sata@80000 { - compatible = "mrvl,sata"; - reg = <0x80000 0x6000>; - interrupts = <21>; - interrupt-parent = <&PIC>; - }; - - sdio@90000 { - compatible = "mrvl,sdio"; - reg = <0x90000 0x134>; - interrupts = <28>; - interrupt-parent = <&PIC>; - }; - }; - - SRAM: sram@fd000000 { - compatible = "mrvl,cesa-sram"; - reg = <0xfd000000 0x00100000>; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; - -}; Property changes on: head/sys/boot/fdt/dts/arm/dreamplug-1001.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/exynos5250-snow.dts =================================================================== --- head/sys/boot/fdt/dts/arm/exynos5250-snow.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/exynos5250-snow.dts (nonexistent) @@ -1,82 +0,0 @@ -/*- - * Copyright (c) 2014 Ruslan Bukin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/include/ "exynos5250.dtsi" - -/ { - model = "Samsung Chromebook"; - - memory { - device_type = "memory"; - reg = < 0x40000000 0x80000000 >; /* 2G */ - }; - - SOC: Exynos5@0 { - - pad0: pad@11400000 { - status = "okay"; - }; - - fimd0: fimd@14400000 { - status = "okay"; - - panel-size = < 1366 768 >; - panel-hsync = < 80 32 48 >; - panel-vsync = < 14 5 3 >; - panel-clk-div = < 17 >; - panel-backlight-pin = < 25 >; - }; - - i2c4: i2c@12CA0000 { - status = "okay"; - }; - - keyboard-controller { - compatible = "google,mkbp-keyb"; - google,key-rows = <8>; - google,key-columns = <13>; - freebsd,intr-gpio = <146>; - }; - - usbdrd_phy0: phy@12100000 { - vbus-supply = < 155 >; - }; - }; - - i2c-arbitrator { - freebsd,our-gpio = <177>; - freebsd,ec-gpio = <168>; - }; - - chosen { - stdin = &serial2; - stdout = &serial2; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/exynos5250-snow.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/odroidc1.dts =================================================================== --- head/sys/boot/fdt/dts/arm/odroidc1.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/odroidc1.dts (nonexistent) @@ -1,396 +0,0 @@ -/*- - * Copyright (c) 2015 John Wehle - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * The ordering of certain devices is significant (e.g. usb depends on - * usb-phy which depends on gpio, also the timer should appear early on - * to provide a reasonably accurate DELAY implementation). - * - * Both usb-phys devices must be configured to prevent the usb controller - * from hanging during initialization. - */ - -/dts-v1/; - -/memreserve/ 0x7900000 0x00600000; /* 6MB frame buffer */ - -#include "meson8b.dtsi" - -/ { - model = "hardkernel,odroid-c1"; - compatible = "hardkernel,odroid-c1", "amlogic,s805"; - - #address-cells = <1>; - #size-cells = <1>; - - aliases { - soc = &soc; - screen = &screen; - uart0 = &uart_AO; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x40000000>; /* 1GB RAM */ - }; - - soc: soc { - device_type = "soc"; - bus-frequency = <0>; - - scu: scu@c4300000 { - compatible = "arm,cortex-a5-scu"; - reg = <0xc4300000 0x1000>; - }; - - cpuconfig: cpuconfig@d901ff80 { - compatible = "amlogic,aml8726-cpuconfig"; - reg = <0xd901ff80 16>; - }; - - ccm@c1104140 { - compatible = "amlogic,aml8726-ccm"; - reg = <0xc1104140 20>; /* cbus 0x1050 */ - - functions = "ethernet", "i2c", "rng", "sdio", "sdxc", - "uart-a", "uart-b", "uart-c", - "usb-a", "usb-b"; - }; - - pinctrl@c11080b0 { - compatible = "amlogic,aml8726-pinctrl"; - reg = <0xc11080b0 40>, /* mux */ - <0xc11080e8 24>, /* pu/pd */ - <0xc1108120 24>, /* pull enable */ - <0xc8100014 4>, /* ao mux */ - <0xc810002c 4>, /* ao pu/pd */ - <0xc810002c 4>; /* ao pull enable */ - - /* - * Currently only pin muxing that deviates - * from the power on default of gpio is - * specified here. - */ - - pinctrl-names = "default"; - pinctrl-0 = <&pins_uartao &pins_ethernet &pins_hdmi>; - - pins_ethernet: ethernet { - amlogic,pins = "ref_clk", - "tx_clk", "tx_en", - "tx_d0", "tx_d1", - "tx_d2", "tx_d3", - "rx_clk", "rx_dv", - "rx_d0", "rx_d1", - "rx_d2", "rx_d3", - "mdc", "mdio"; - amlogic,function = "ethernet"; - }; - - pins_hdmi: hdmi { - amlogic,pins = "cec", "hpd", - "scl", "sda"; - amlogic,function = "hdmi"; - }; - - pins_sdio_b: sdio_b { - amlogic,pins = "clk", "cmd", - "d0", "d1", - "d2", "d3"; - amlogic,function = "sdio-b"; - amlogic,pull = "up"; - }; - - pins_sdxc_b: sdxc_b { - amlogic,pins = "clk", "cmd", - "d0", "d1", - "d2", "d3"; - amlogic,function = "sdxc-b"; - amlogic,pull = "up"; - }; - - pins_sdio_c: sdio_c { - amlogic,pins = "clk", "cmd", - "d0", "d1", - "d2", "d3"; - amlogic,function = "sdio-c"; - amlogic,pull = "up"; - }; - - pins_sdxc_c: sdxc_c { - amlogic,pins = "clk", "cmd", - "d0", "d1", - "d2", "d3", - "d4", "d5", - "d6", "d7"; - amlogic,function = "sdxc-c"; - amlogic,pull = "up"; - }; - - pins_i2c_a: i2c_a { - amlogic,pins = "scl", "sda"; - amlogic,function = "i2c-a"; - }; - - pins_i2c_b: i2c_b { - amlogic,pins = "scl", "sda"; - amlogic,function = "i2c-b"; - }; - - pins_uarta: uarta { - amlogic,pins = "tx", "rx", "cts", "rts"; - amlogic,function = "uart-a"; - }; - - pins_uartb: uartb { - - /* - * gpiox18 appears to have special - * meaning to the bootloader making - * hardware handshaking unavailable. - */ - - amlogic,pins = "tx", "rx"; - amlogic,function = "uart-b"; - }; - - pins_uartc: uartc { - amlogic,pins = "tx", "rx", "cts", "rts"; - amlogic,function = "uart-c"; - }; - - pins_uartao: uartao { - amlogic,pins = "tx", "rx"; - amlogic,function = "uart-ao"; - }; - }; - - rtc@c8100740 { - compatible = "amlogic,aml8726-rtc"; - reg = <0xc8100740 20>; /* aobus 0x1d0 */ - interrupts = <0 72 1>; - }; - - clkmsr: clkmsr@c1108758 { - compatible = "amlogic,aml8726-clkmsr"; - reg = <0xc1108758 16>; /* cbus 0x21d6 */ - - clocks = <&clk81>; - }; - - gpioao: gpio@c8100024 { - /* gpio unit 7 */ - compatible = "amlogic,aml8726-gpio"; - reg = <0xc8100024 4>, /* oen aobus 0x9 */ - <0xc8100024 4>, /* out */ - <0xc8100028 4>; /* in */ - - gpio-controller; - #gpio-cells = <1>; - pin-count = <14>; - }; - - gpio3: gpio@c1108054 { - compatible = "amlogic,aml8726-gpio"; - reg = <0xc1108054 4>, /* oen cbus 0x2015 */ - <0xc1108058 4>, /* out */ - <0xc110805c 4>; /* in */ - - gpio-controller; - #gpio-cells = <1>; - pin-count = <32>; - }; - - gpio5: gpio@c110806c { - compatible = "amlogic,aml8726-gpio"; - reg = <0xc110806c 4>, /* oen cbus 0x201b */ - <0xc1108070 4>, /* out */ - <0xc1108074 4>; /* in */ - - gpio-controller; - #gpio-cells = <1>; - pin-count = <32>; - }; - - mmc@c1108c20 { - compatible = "amlogic,aml8726-mmc"; - reg = <0xc1108c20 32>; /* cbus 0x2308 */ - interrupts = <0 28 1>; - - clocks = <&clk81>; - - pinctrl-names = "default"; - pinctrl-0 = <&pins_sdio_b>; - - /* - * Ordering is significant. - * - * mmc-vselect low sets first voltage - * mmc-vselect high sets second voltage - * - * If mmc-vselect is not present, then - * only one voltage should be specified. - */ - mmc-voltages = "3.3", "1.8"; - mmc-vselect = <&gpioao 3>; /* gpioao_3 */ - - mmc-pwr-en = <&gpio5 31 0>; /* card_8 */ - ins-detect = <&gpio5 29 0>; /* card_6 */ - }; - - sdxc@c1108e00 { - compatible = "amlogic,aml8726-sdxc-m8"; - clock-frequency = <1275000000>; - reg = <0xc1108e00 60>; /* cbus 0x2380 */ - interrupts = <0 78 1>; - - pinctrl-names = "default"; - pinctrl-0 = <&pins_sdxc_c>; - - mmc-voltages = "1.8"; - - mmc-rst = <&gpio3 9 0>; /* boot_9 emmc-rst */ - }; - - rng@c1108100 { - compatible = "amlogic,aml8726-rng"; - reg = <0xc1108100 8>; /* cbus 0x2040 */ - }; - - usb-phy@c1108800 { - /* usb-a phy */ - compatible = "amlogic,aml8726-m8-usb-phy"; - reg = <0xc1108800 32>; /* cbus 0x2200 */ - - usb-pwr-en = <&gpioao 5 1>; /* gpioao_5 vbus */ - }; - - usb-phy@c1108820 { - /* usb-b phy */ - compatible = "amlogic,aml8726-m8-usb-phy"; - reg = <0xc1108820 32>; /* cbus 0x2208 */ - - force-aca = "true"; - usb-hub-rst = <&gpioao 4 0>; /* gpioao_4 hub-rst */ - }; - - usb@c9040000 { - /* usb-a */ - compatible = "synopsys,designware-hs-otg2"; - reg = <0xc9040000 0x40000>; /* ahbbus 0x40000*/ - interrupts = <0 30 4>; - #address-cells = <1>; - #size-cells = <0>; - - dr_mode = "host"; - }; - - usb@c90c0000 { - /* usb-b */ - compatible = "synopsys,designware-hs-otg2"; - reg = <0xc90c0000 0x40000>; /* ahbbus 0xc0000 */ - interrupts = <0 31 4>; - #address-cells = <1>; - #size-cells = <0>; - - dr_mode = "host"; - }; - - eth@c9410000 { - /* ethernet */ - compatible = "amlogic,meson6-dwmac"; - reg = <0xc9410000 0x2000>; /* ahbbus 0x410000 */ - interrupts = <0 8 1>; - #address-cells = <1>; - #size-cells = <0>; - - eth-phy-rst = <&gpio3 23 0>; /* gpioh_4 phy-rst */ - }; - - screen: fb@c8006020 { - device_type = "display"; - compatible = "amlogic,aml8726-fb"; - reg = <0xc8006048 12>, /* CANVAS */ - <0xc1106800 1024>, /* VIU */ - <0xc1107400 1024>; /* VPP */ - interrupts = <0 2 1>, - <0 3 1>, - <0 12 1>, - <0 13 1>; - - address = <0x7900000>; /* match memreserve */ - width = <720>; - height = <480>; - depth = <24>; - linebytes = <2160>; - }; - }; - - leds { - compatible = "gpio-leds"; - - sys_led { - gpios = <&gpioao 13>; /* gpioao_13 sys_led */ - label = "sys_led"; - }; - }; - - chosen { - stdin = "uart0"; - stdout = "uart0"; - }; -}; - -&clk81 { - clock-frequency = <0>; -}; - -&uart_AO { - status = "okay"; - current-speed = <115200>; -}; - -&uart_A { - status = "okay"; -}; - -&uart_B { - status = "okay"; -}; - -&uart_C { - status = "okay"; -}; - -&i2c_A { - status = "okay"; -}; - -&i2c_B { - status = "okay"; -}; Property changes on: head/sys/boot/fdt/dts/arm/odroidc1.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/pandaboard.dts =================================================================== --- head/sys/boot/fdt/dts/arm/pandaboard.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/pandaboard.dts (nonexistent) @@ -1,31 +0,0 @@ -/*- - * Copyright (c) 2015 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - - -#include "omap4-panda.dts" -#include "pandaboard-common.dtsi" Property changes on: head/sys/boot/fdt/dts/arm/pandaboard.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/rpi.dts =================================================================== --- head/sys/boot/fdt/dts/arm/rpi.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/rpi.dts (nonexistent) @@ -1,401 +0,0 @@ -/* - * Copyright (c) 2012 Oleksandr Tymoshenko - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ -/dts-v1/; - -/include/ "bcm2835.dtsi" - -/ { - model = "Raspberry Pi (BCM2835)"; - compatible = "raspberrypi,model-a", "raspberrypi,model-b", - "broadcom,bcm2835-vc", "broadcom,bcm2708-vc"; - - memreserve = <0x08000000 0x08000000>; /* Set by VideoCore */ - - cpus { - #address-cells = <1>; - #size-cells = <0>; - cpu@0 { - compatible = "arm,1176jzf-s"; - device_type = "cpu"; - reg = <0>; /* CPU ID=0 */ - clock-frequency = <700000000>; /* 700MHz */ - }; - }; - - memory { - device_type = "memory"; - reg = <0 0x8000000>; /* 128MB, Set by VideoCore */ - - }; - - system { - revision = <0>; /* Set by VideoCore */ - serial = <0 0>; /* Set by VideoCore */ - }; - - axi { - gpio: gpio { - /* BSC0 */ - pins_bsc0_a: bsc0_a { - broadcom,function = "ALT0"; - }; - - pins_bsc0_b: bsc0_b { - broadcom,function = "ALT0"; - }; - - pins_bsc0_c: bsc0_c { - broadcom,function = "ALT1"; - }; - - /* BSC1 */ - pins_bsc1_a: bsc1_a { - broadcom,function = "ALT0"; - }; - - pins_bsc1_b: bsc1_b { - broadcom,function = "ALT2"; - }; - - /* GPCLK0 */ - pins_gpclk0_a: gpclk0_a { - broadcom,function = "ALT0"; - }; - - pins_gpclk0_b: gpclk0_b { - broadcom,function = "ALT5"; - }; - - pins_gpclk0_c: gpclk0_c { - broadcom,function = "ALT0"; - }; - - pins_gpclk0_d: gpclk0_d { - broadcom,function = "ALT0"; - }; - - /* GPCLK1 */ - pins_gpclk1_a: gpclk1_a { - broadcom,function = "ALT0"; - }; - - pins_gpclk1_b: gpclk1_b { - broadcom,function = "ALT5"; - }; - - pins_gpclk1_c: gpclk1_c { - broadcom,function = "ALT0"; - }; - - pins_gpclk1_d: gpclk1_d { - broadcom,function = "ALT0"; - }; - - /* GPCLK2 */ - pins_gpclk2_a: gpclk2_a { - broadcom,function = "ALT0"; - }; - - pins_gpclk2_b: gpclk2_b { - broadcom,function = "ALT0"; - }; - - /* SPI0 */ - pins_spi0_a: spi0_a { - broadcom,function = "ALT0"; - }; - - pins_spi0_b: spi0_b { - broadcom,function = "ALT0"; - }; - - /* PWM */ - pins_pwm0_a: pwm0_a { - broadcom,function = "ALT0"; - }; - - pins_pwm0_b: pwm0_b { - broadcom,function = "ALT5"; - }; - - pins_pwm0_c: pwm0_c { - broadcom,function = "ALT0"; - }; - - pins_pwm1_a: pwm1_a { - broadcom,function = "ALT0"; - }; - - pins_pwm1_b: pwm1_b { - broadcom,function = "ALT5"; - }; - - pins_pwm1_c: pwm1_c { - broadcom,function = "ALT0"; - }; - - pins_pwm1_d: pwm1_d { - broadcom,function = "ALT0"; - }; - - /* UART0 */ - pins_uart0_a: uart0_a { - broadcom,function = "ALT0"; - }; - - pins_uart0_b: uart0_b { - broadcom,function = "ALT3"; - }; - - pins_uart0_c: uart0_c { - broadcom,function = "ALT2"; - }; - - pins_uart0_fc_a: uart0_fc_a { - broadcom,function = "ALT3"; - }; - - pins_uart0_fc_b: uart0_fc_b { - broadcom,function = "ALT3"; - }; - - pins_uart0_fc_c: uart0_fc_c { - broadcom,function = "ALT2"; - }; - - /* PCM */ - pins_pcm_a: pcm_a { - broadcom,function = "ALT0"; - }; - - pins_pcm_b: pcm_b { - broadcom,function = "ALT2"; - }; - - /* Secondary Address Bus */ - pins_sm_addr_a: sm_addr_a { - broadcom,function = "ALT1"; - }; - - pins_sm_addr_b: sm_addr_b { - broadcom,function = "ALT1"; - }; - - pins_sm_ctl_a: sm_ctl_a { - broadcom,function = "ALT1"; - }; - - pins_sm_ctl_b: sm_ctl_b { - broadcom,function = "ALT1"; - }; - - pins_sm_data_8bit_a: sm_data_8bit_a { - broadcom,function = "ALT1"; - }; - - pins_sm_data_8bit_b: sm_data_8bit_b { - broadcom,function = "ALT1"; - }; - - pins_sm_data_16bit: sm_data_16bit { - broadcom,function = "ALT1"; - }; - - pins_sm_data_18bit: sm_data_18bit { - broadcom,function = "ALT1"; - }; - - /* BSCSL */ - pins_bscsl: bscsl { - broadcom,function = "ALT3"; - }; - - /* SPISL */ - pins_spisl: spisl { - broadcom,function = "ALT3"; - }; - - /* SPI1 */ - pins_spi1: spi1 { - broadcom,function = "ALT4"; - }; - - /* UART1 */ - pins_uart1_a: uart1_a { - broadcom,function = "ALT5"; - }; - - pins_uart1_b: uart1_b { - broadcom,function = "ALT5"; - }; - - pins_uart1_c: uart1_c { - broadcom,function = "ALT5"; - }; - - pins_uart1_fc_a: uart1_fc_a { - broadcom,function = "ALT5"; - }; - - pins_uart1_fc_b: uart1_fc_b { - broadcom,function = "ALT5"; - }; - - pins_uart1_fc_c: uart1_fc_c { - broadcom,function = "ALT5"; - }; - - /* SPI2 */ - pins_spi2: spi2 { - broadcom,function = "ALT4"; - }; - - /* ARM JTAG */ - pins_arm_jtag_trst: arm_jtag_trst { - broadcom,function = "ALT4"; - }; - - pins_arm_jtag_a: arm_jtag_a { - broadcom,function = "ALT5"; - }; - - pins_arm_jtag_b: arm_jtag_b { - broadcom,function = "ALT4"; - }; - - /* Reserved */ - pins_reserved: reserved { - broadcom,function = "ALT3"; - }; - }; - usb { - hub { - compatible = "usb,hub", "usb,device"; - reg = <0x00000001>; - #address-cells = <1>; - #size-cells = <0>; - ethernet: ethernet { - compatible = "net,ethernet", - "usb,device"; - reg = <0x00000001>; - mac-address = [00 00 00 00 00 00]; - }; - }; - - }; - - - }; - - display { - compatible = "broadcom,bcm2835-fb", "broadcom,bcm2708-fb"; - - broadcom,vc-mailbox = <&vc_mbox>; - broadcom,vc-channel = <1>; - - broadcom,width = <0>; /* Set by VideoCore */ - broadcom,height = <0>; /* Set by VideoCore */ - broadcom,depth = <0>; /* Set by VideoCore */ - }; - - rpi_ft5406 { - compatible = "rpi,rpi-ft5406"; - status = "okay"; - }; - - leds { - compatible = "gpio-leds"; - - ok { - label = "ok"; - gpios = <&gpio 16 1>; - - /* Don't change this - it configures - * how the led driver determines if - * the led is on or off when it loads. - */ - default-state = "keep"; - - /* This is the real default state. */ - linux,default-trigger = "default-on"; - }; - }; - - power: regulator { - compatible = "broadcom,bcm2835-power-mgr", - "broadcom,bcm2708-power-mgr", - "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - broadcom,vc-mailbox = <&vc_mbox>; - broadcom,vc-channel = <0>; - - regulator-name = "VideoCore"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on = <1>; - - sd_card_power: regulator@0 { - compatible = "broadcom,bcm2835-power-dev", - "broadcom,bcm2708-power-dev"; - reg = <0>; - - vin-supply = <&power>; - regulator-name = "SD Card"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - /* This is for the controller itself, not the root port */ - usb_hcd_power: regulator@3 { - compatible = "broadcom,bcm2835-power-dev", - "broadcom,bcm2708-power-dev"; - reg = <3>; - - vin-supply = <&power>; - regulator-name = "USB HCD"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - }; - - aliases { - uart0 = &uart0; - ethernet0 = ðernet; - }; - - chosen { - bootargs = ""; /* Set by VideoCore */ - stdin = "uart0"; - stdout = "uart0"; - }; - - __overrides__ { - cache_line_size = <&vchiq>, "cache-line-size:0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/rpi.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/ea3250.dts =================================================================== --- head/sys/boot/fdt/dts/arm/ea3250.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/ea3250.dts (nonexistent) @@ -1,270 +0,0 @@ -/* - * Copyright (c) 2011 Jakub Klama - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Embedded Artists LPC3250-Kit Device Tree Source. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "ea,LPC3250-KIT"; - compatible = "LPC3250-KIT"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - soc = &soc; - serial4 = &serial4; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,926EJ-S"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x80000000 0x4000000>; // 64M at 0x80000000 - }; - - soc: ahb7@40000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0x40000000 0x10000000>; - bus-frequency = <13000000>; - - pwr@4000 { - compatible = "lpc,pwr"; - reg = <0x4000 0x4000>; - }; - - PIC: pic@8000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x8000 0xc000>; - compatible = "lpc,pic"; - }; - - timer@44000 { - compatible = "lpc,timer"; - reg = <0x44000 0x4000 - 0x4c000 0x4000>; - interrupts = <16 17>; - interrupt-parent = <&PIC>; - }; - - rtc@24000 { - compatible = "lpc,rtc"; - reg = <0x24000 0x4000>; - interrupts = <52>; - interrupt-parent = <&PIC>; - }; - - serial0: serial@14000 { - compatible = "lpc,hsuart"; - status = "disabled"; - reg = <0x14000 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <26>; - interrupt-parent = <&PIC>; - }; - - serial1: serial@18000 { - compatible = "lpc,hsuart"; - status = "disabled"; - reg = <0x18000 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <25>; - interrupt-parent = <&PIC>; - }; - - serial2: serial@80000 { - compatible = "lpc,uart"; - status = "disabled"; - reg = <0x80000 0x20>; - reg-shift = <2>; - clock-frequency = <13000000>; - interrupts = <7>; - interrupt-parent = <&PIC>; - }; - - serial3: serial@88000 { - compatible = "lpc,uart"; - status = "disabled"; - reg = <0x88000 0x20>; - reg-shift = <2>; - clock-frequency = <13000000>; - interrupts = <8>; - interrupt-parent = <&PIC>; - }; - - serial4: serial@90000 { - compatible = "lpc,uart"; - reg = <0x90000 0x20>; - reg-shift = <2>; - clock-frequency = <13000000>; - current-speed = <115200>; - interrupts = <9>; - interrupt-parent = <&PIC>; - }; - - serial5: serial@98000 { - compatible = "lpc,uart"; - status = "disabled"; - reg = <0x98000 0x20>; - reg-shift = <2>; - clock-frequency = <13000000>; - interrupts = <10>; - interrupt-parent = <&PIC>; - }; - - serial6: serial@1c000 { - compatible = "lpc,uart"; - status = "disabled"; - reg = <0x1c000 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <24>; - interrupt-parent = <&PIC>; - }; - - gpio@28000 { - compatible = "lpc,gpio"; - reg = <0x28000 0x4000>; - }; - }; - - ahb6@30000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0x30000000 0x10000000>; - - dmac@1000000 { - compatible = "lpc,dmac"; - reg = <0x1000000 0x20000>; - interrupts = <28>; - interrupt-parent = <&PIC>; - }; - - usb@1020000 { - compatible = "lpc,usb-ohci", "usb-ohci"; - reg = <0x1020000 0x20000>; - interrupts = <59>; - interrupt-parent = <&PIC>; - }; - - lpcfb@1040000 { - compatible = "lpc,fb"; - reg = <0x1040000 0x20000>; - interrupts = <14>; - interrupt-parent = <&PIC>; - - /* Screen parameters: */ - is-tft = <1>; - horizontal-resolution = <240>; - vertical-resolution = <320>; - bits-per-pixel = <16>; - pixel-clock = <121654>; - left-margin = <28>; - right-margin = <10>; - upper-margin = <2>; - lower-margin = <2>; - hsync-len = <3>; - vsync-len = <2>; - }; - - lpe@1060000 { - compatible = "lpc,ethernet"; - reg = <0x1060000 0x20000>; - interrupts = <29>; - interrupt-parent = <&PIC>; - local-mac-address = [ 00 1a f1 01 1f 23 ]; - - mdio@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "lpc,mdio"; - - phy0: ethernet-phy@0 { - reg = <0x0>; - }; - }; - - }; - }; - - ahb5@20000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0x20000000 0x10000000>; - - spi0@84000 { - compatible = "lpc,spi"; - reg = <0x84000 0x4000>; - interrupts = <20>; - interrupt-parent = <&PIC>; - }; - - spi1@8c000 { - compatible = "lpc,spi"; - status = "disabled"; - reg = <0x8c000 0x4000>; - interrupts = <21>; - interrupt-parent = <&PIC>; - }; - - lpcmmc@98000 { - compatible = "lpc,mmc"; - reg = <0x98000 0x4000>; - interrupts = <15 13>; - interrupt-parent = <&PIC>; - }; - }; - - chosen { - stdin = "serial4"; - stdout = "serial4"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/ea3250.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/wandboard-dual.dts =================================================================== --- head/sys/boot/fdt/dts/arm/wandboard-dual.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/wandboard-dual.dts (nonexistent) @@ -1,83 +0,0 @@ -/* - * Copyright (c) 2013 Ian Lepore - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Wandboard Dual. - * - * $FreeBSD$ - */ - -/dts-v1/; -/include/ "imx6.dtsi" - -/ { - #address-cells = <1>; - #size-cells = <1>; - - model = "Wandboard Dual"; - compatible = "wand,imx6d-wandboard", "fsl,imx6d"; - - memory { - reg = <0x10000000 0x40000000>; /* RAM 1GB */ - }; - - SOC: soc@00000000 { - aips@02000000 { /* AIPS1 */ - gpio@0209c000 { status = "okay"; }; - gpio@020a0000 { status = "okay"; }; - gpio@020a4000 { status = "okay"; }; - gpio@020a8000 { status = "okay"; }; - gpio@020ac000 { status = "okay"; }; - gpio@020b0000 { status = "okay"; }; - gpio@020b4000 { status = "okay"; }; - console:serial@02020000 { status = "okay"; }; - serial@021e8000 { status = "disabled"; }; - serial@021ec000 { status = "disabled"; }; - serial@021f0000 { status = "disabled"; }; - serial@021f4000 { status = "disabled"; }; - usbphy@020c9000 { status = "okay"; }; - usbphy@020ca000 { status = "okay"; }; - }; - aips@02100000 { /* AIPS2 */ - ethernet@02188000 { - status = "okay"; - phy-mode = "rgmii"; - phy-disable-preamble; - }; - usb@02184000 { status = "okay"; }; - usb@02184200 { status = "okay"; }; - usb@02184400 { status = "disabled"; }; - usb@02184600 { status = "disabled"; }; - usdhc@02190000 { status = "okay"; }; - usdhc@02194000 { status = "disabled"; }; - usdhc@02198000 { status = "okay"; }; - usdhc@0219c000 { status = "disabled"; }; - }; - }; - - chosen { - stdin = &console; - stdout = &console; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/wandboard-dual.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/db78460.dts =================================================================== --- head/sys/boot/fdt/dts/arm/db78460.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/db78460.dts (nonexistent) @@ -1,323 +0,0 @@ -/* - * Copyright (c) 2010 The FreeBSD Foundation - * Copyright (c) 2010-2011 Semihalf - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Marvell DB-78460 Device Tree Source. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "mrvl,DB-78460"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - serial0 = &serial0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,88VS584"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <200000000>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x80000000>; // 2G at 0x0 - }; - - soc78460@d0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0xd0000000 0x00100000>; - bus-frequency = <0>; - - - MPIC: mpic@20a00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x20a00 0x500 0x21870 0x58 0x20400 0x100>; - compatible = "mrvl,mpic"; - }; - - rtc@10300 { - compatible = "mrvl,rtc"; - reg = <0x10300 0x08>; - }; - - timer@21840 { - compatible = "mrvl,timer"; - reg = <0x21840 0x30>; - interrupts = <5>; - interrupt-parent = <&MPIC>; - mrvl,has-wdt; - }; - - twsi@11000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,twsi"; - reg = <0x11000 0x20>; - interrupts = <31>; - interrupt-parent = <&MPIC>; - }; - - twsi@11100 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,twsi"; - reg = <0x11100 0x20>; - interrupts = <32>; - interrupt-parent = <&MPIC>; - }; - - serial0: serial@12000 { - compatible = "snps,dw-apb-uart"; - reg = <0x12000 0x20>; - reg-shift = <2>; - current-speed = <115200>; - clock-frequency = <0>; - interrupts = <41>; - interrupt-parent = <&MPIC>; - }; - - serial1: serial@12100 { - compatible = "snps,dw-apb-uart"; - reg = <0x12100 0x20>; - reg-shift = <2>; - current-speed = <115200>; - clock-frequency = <0>; - interrupts = <42>; - interrupt-parent = <&MPIC>; - }; - - serial2: serial@12200 { - compatible = "snps,dw-apb-uart"; - reg = <0x12200 0x20>; - reg-shift = <2>; - current-speed = <115200>; - clock-frequency = <0>; - interrupts = <43>; - interrupt-parent = <&MPIC>; - }; - - serial3: serial@12300 { - compatible = "snps,dw-apb-uart"; - reg = <0x12300 0x20>; - reg-shift = <2>; - current-speed = <115200>; - clock-frequency = <0>; - interrupts = <44>; - interrupt-parent = <&MPIC>; - }; - - MPP: mpp@10000 { - #pin-cells = <2>; - compatible = "mrvl,mpp"; - reg = <0x18000 0x34>; - pin-count = <68>; - pin-map = < - 0 1 /* MPP[0]: GE1_TXCLK */ - 1 1 /* MPP[1]: GE1_TXCTL */ - 2 1 /* MPP[2]: GE1_RXCTL */ - 3 1 /* MPP[3]: GE1_RXCLK */ - 4 1 /* MPP[4]: GE1_TXD[0] */ - 5 1 /* MPP[5]: GE1_TXD[1] */ - 6 1 /* MPP[6]: GE1_TXD[2] */ - 7 1 /* MPP[7]: GE1_TXD[3] */ - 8 1 /* MPP[8]: GE1_RXD[0] */ - 9 1 /* MPP[9]: GE1_RXD[1] */ - 10 1 /* MPP[10]: GE1_RXD[2] */ - 11 1 /* MPP[11]: GE1_RXD[3] */ - 12 2 /* MPP[13]: SYSRST_OUTn */ - 13 2 /* MPP[13]: SYSRST_OUTn */ - 14 2 /* MPP[14]: SATA1_ACTn */ - 15 2 /* MPP[15]: SATA0_ACTn */ - 16 2 /* MPP[16]: UA2_TXD */ - 17 2 /* MPP[17]: UA2_RXD */ - 18 2 /* MPP[18]: */ - 19 2 /* MPP[19]: */ - 20 2 /* MPP[20]: */ - 21 2 /* MPP[21]: */ - 22 2 /* MPP[22]: UA3_TXD */ - 23 2 - 24 0 - 25 0 - 26 0 - 27 0 - 28 4 - 29 0 - 30 1 - 31 1 - 32 1 - 33 1 - 34 1 - 35 1 - 36 1 - 37 1 - 38 1 - 39 1 - 40 0 - 41 3 - 42 1 - 43 1 - 44 2 - 45 2 - 46 4 - 47 3 - 48 0 - 49 1 - 50 1 - 51 1 - 52 1 - 53 1 - 54 1 - 55 1 - 56 1 - 57 0 - 58 1 - 59 1 - 60 1 - 61 1 - 62 1 - 63 1 - 64 1 - 65 1 - 66 1 - 67 2 >; - }; - - usb@50000 { - compatible = "mrvl,usb-ehci", "usb-ehci"; - reg = <0x50000 0x1000>; - interrupts = <124 45>; - interrupt-parent = <&MPIC>; - }; - - usb@51000 { - compatible = "mrvl,usb-ehci", "usb-ehci"; - reg = <0x51000 0x1000>; - interrupts = <124 46>; - interrupt-parent = <&MPIC>; - }; - - usb@52000 { - compatible = "mrvl,usb-ehci", "usb-ehci"; - reg = <0x52000 0x1000>; - interrupts = <124 47>; - interrupt-parent = <&MPIC>; - }; - - enet0: ethernet@72000 { - #address-cells = <1>; - #size-cells = <1>; - model = "V2"; - compatible = "mrvl,ge"; - reg = <0x72000 0x2000>; - ranges = <0x0 0x72000 0x2000>; - local-mac-address = [ 00 04 01 07 84 60 ]; - interrupts = <67 68 122 >; - interrupt-parent = <&MPIC>; - phy-handle = <&phy0>; - has-neta; - - mdio@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,mdio"; - - phy0: ethernet-phy@0 { - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - reg = <0x1>; - }; - phy2: ethernet-phy@2 { - reg = <0x19>; - }; - phy3: ethernet-phy@3 { - reg = <0x1b>; - }; - }; - }; - - sata@A0000 { - compatible = "mrvl,sata"; - reg = <0xA0000 0x6000>; - interrupts = <55>; - interrupt-parent = <&MPIC>; - }; - }; - - pci0: pcie@d0040000 { - compatible = "mrvl,pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xd0040000 0x2000>; - bus-range = <0 255>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xa0000000 0x0 0x08000000>; - clock-frequency = <33333333>; - interrupt-parent = <&MPIC>; - interrupts = <120>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - 0x0800 0x0 0x0 0x1 &MPIC 0x3A - 0x0800 0x0 0x0 0x2 &MPIC 0x3A - 0x0800 0x0 0x0 0x3 &MPIC 0x3A - 0x0800 0x0 0x0 0x4 &MPIC 0x3A - >; - }; - - sram@ffff0000 { - compatible = "mrvl,cesa-sram"; - reg = <0xffff0000 0x00010000>; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - stddbg = "serial0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/db78460.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/sun8i-h3-nanopi-neo.dts =================================================================== --- head/sys/boot/fdt/dts/arm/sun8i-h3-nanopi-neo.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/sun8i-h3-nanopi-neo.dts (nonexistent) @@ -1,128 +0,0 @@ -/* - * Copyright (C) 2016 James Pettigrew - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * $FreeBSD$ - */ - -/dts-v1/; -#include "sun8i-h3.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include -#include -#include - -/ { - model = "FriendlyARM NanoPi NEO"; - compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&leds_opc>, <&leds_r_opc>; - - pwr_led { - label = "nanopi:green:pwr"; - gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - - status_led { - label = "nanopi:blue:status"; - gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; - }; - }; -}; - -&ehci3 { - status = "okay"; -}; - -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ - cd-inverted; - status = "okay"; -}; - -&ohci3 { - status = "okay"; -}; - -&pio { - leds_opc: led_pins@0 { - allwinner,pins = "PA10"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; -}; - -&r_pio { - leds_r_opc: led_pins@0 { - allwinner,pins = "PL10"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; - status = "okay"; -}; - -&usbphy { - /* USB VBUS is always on */ - status = "okay"; -}; Property changes on: head/sys/boot/fdt/dts/arm/sun8i-h3-nanopi-neo.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/vybrid-colibri-vf50.dts =================================================================== --- head/sys/boot/fdt/dts/arm/vybrid-colibri-vf50.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/vybrid-colibri-vf50.dts (nonexistent) @@ -1,82 +0,0 @@ -/*- - * Copyright (c) 2014 Ruslan Bukin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/include/ "vybrid.dtsi" - -/ { - model = "Toradex Colibri VF50"; - - memory { - device_type = "memory"; - reg = < 0x80000000 0x08000000 >; /* 128MB RAM */ - }; - - SOC: vybrid { - serial0: serial@40027000 { - status = "okay"; - }; - - fec1: ethernet@400D1000 { - status = "okay"; - iomux_config = < 54 0x103192 - 55 0x103193 - 56 0x103191 - 57 0x103191 - 58 0x103191 - 59 0x103191 - 60 0x103192 - 61 0x103192 - 62 0x103192 - 0 0x103191 >; - }; - - sai3: sai@40032000 { - status = "okay"; - }; - - i2c0: i2c@40066000 { - status = "okay"; - }; - - adc0: adc@4003B000 { - status = "okay"; - }; - - edma1: edma@40098000 { - status = "okay"; - }; - }; - - chosen { - bootargs = "-v"; - stdin = "serial0"; - stdout = "serial0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/vybrid-colibri-vf50.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/wandboard-quad.dts =================================================================== --- head/sys/boot/fdt/dts/arm/wandboard-quad.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/wandboard-quad.dts (nonexistent) @@ -1,83 +0,0 @@ -/* - * Copyright (c) 2013 Ian Lepore - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Wandboard Quad. - * - * $FreeBSD$ - */ - -/dts-v1/; -/include/ "imx6.dtsi" - -/ { - #address-cells = <1>; - #size-cells = <1>; - - model = "Wandboard Quad"; - compatible = "wand,imx6q-wandboard", "fsl,imx6q"; - - memory { - reg = <0x10000000 0x80000000>; /* RAM 2GB */ - }; - - SOC: soc@00000000 { - aips@02000000 { /* AIPS1 */ - gpio@0209c000 { status = "okay"; }; - gpio@020a0000 { status = "okay"; }; - gpio@020a4000 { status = "okay"; }; - gpio@020a8000 { status = "okay"; }; - gpio@020ac000 { status = "okay"; }; - gpio@020b0000 { status = "okay"; }; - gpio@020b4000 { status = "okay"; }; - console:serial@02020000 { status = "okay"; }; - serial@021e8000 { status = "disabled"; }; - serial@021ec000 { status = "disabled"; }; - serial@021f0000 { status = "disabled"; }; - serial@021f4000 { status = "disabled"; }; - usbphy@020c9000 { status = "okay"; }; - usbphy@020ca000 { status = "okay"; }; - }; - aips@02100000 { /* AIPS2 */ - ethernet@02188000 { - status = "okay"; - phy-mode = "rgmii"; - phy-disable-preamble; - }; - usb@02184000 { status = "okay"; }; - usb@02184200 { status = "okay"; }; - usb@02184400 { status = "disabled"; }; - usb@02184600 { status = "disabled"; }; - usdhc@02190000 { status = "okay"; }; - usdhc@02194000 { status = "disabled"; }; - usdhc@02198000 { status = "okay"; }; - usdhc@0219c000 { status = "disabled"; }; - }; - }; - - chosen { - stdin = &console; - stdout = &console; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/wandboard-quad.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/zedboard.dts =================================================================== --- head/sys/boot/fdt/dts/arm/zedboard.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/zedboard.dts (nonexistent) @@ -1,71 +0,0 @@ -/*- - * Copyright (c) 2016 The FreeBSD Foundation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ -/dts-v1/; -/include/ "zynq-7000.dtsi" - -/ { - model = "zedboard"; - compatible = "digilent,zedboard", "xlnx,zynq-7000"; - - memory { - // First megabyte isn't accessible by all interconnect masters. - device_type = "memory"; - reg = <0x100000 0x1ff00000>; /* 511MB RAM at 0x100000 */ - }; - - chosen { - stdin = &uart1; - stdout = &uart1; - }; -}; - -&slcr { - clock-frequency = <33333333>; // 33Mhz PS_CLK -}; - -&global_timer { - clock-frequency = <333333333>; // 333Mhz -}; - -&uart1 { - status = "okay"; -}; - -ð0 { - status = "okay"; -}; - -&sdhci0 { - status = "okay"; -}; - -&ehci0 { - status = "okay"; - phy_vbus_ext; -}; - Property changes on: head/sys/boot/fdt/dts/arm/zedboard.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/tegra124-jetson-tk1-fbsd.dts =================================================================== --- head/sys/boot/fdt/dts/arm/tegra124-jetson-tk1-fbsd.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/tegra124-jetson-tk1-fbsd.dts (nonexistent) @@ -1,48 +0,0 @@ -/*- - * Copyright (c) 2016 Michal Meloun - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#include "tegra124-jetson-tk1.dts" - -/ { - chosen { - stdin = &uartd; - stdout = &uartd; - }; - - memory { -/* reg = <0x0 0x80000000 0x0 0x80000000>; */ - reg = <0x0 0x80000000 0x0 0x70000000>; - }; - usb@70090000 { - freebsd,clock-xusb-gate = <&tegra_car 143>; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/tegra124-jetson-tk1-fbsd.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/tegra20.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/tegra20.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/tegra20.dtsi (nonexistent) @@ -1,74 +0,0 @@ -/*- - * Copyright (c) 2011 The FreeBSD Foundation - * Copyright (c) 2012 Andrew Turner - * All rights reserved. - * - * Developed by Damjan Marion - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/ { - compatible = "compal,paz00", "nvidia,tegra20"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&GIC>; - - SOC: tegra20@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges; - bus-frequency = <0>; - - GIC: interrupt-controller@50041000 { - compatible = "arm,gic"; - reg = < 0x50041000 0x1000 >, /* Distributor Registers */ - < 0x50040100 0x0100 >; /* CPU Interface Registers */ - interrupt-controller; - #interrupt-cells = <1>; - }; - - mp_tmr@50040200 { - compatible = "arm,mpcore-timers"; - clock-frequency = < 50040200 >; - #address-cells = <1>; - #size-cells = <0>; - reg = < 0x50040200 0x100 >, /* Global Timer Registers */ - < 0x50040600 0x100 >; /* Private Timer Registers */ - interrupts = < 27 29 >; - interrupt-parent = <&GIC>; - }; - - serial@70006000 { - compatible = "ns16550"; - reg = <0x70006000 0x40>; - reg-shift = <2>; - interrupts = < 68 >; - interrupt-parent = <&GIC>; - clock-frequency = < 215654400 >; - }; - }; -}; - Property changes on: head/sys/boot/fdt/dts/arm/tegra20.dtsi ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/ts7800.dts =================================================================== --- head/sys/boot/fdt/dts/arm/ts7800.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/ts7800.dts (nonexistent) @@ -1,161 +0,0 @@ -/* - * Copyright (c) 2010 The FreeBSD Foundation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Technologic Systems TS-7800 Device Tree Source. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "mrvl,TS-7800"; - compatible = "DB-88F5182-BP", "DB-88F5182-BP-A"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &mge0; - serial0 = &serial0; - serial1 = &serial1; - mpp = &MPP; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,88FR531"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x08000000>; // 128M at 0x0 - }; - - localbus@f1000000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "mrvl,lbc"; - - /* This reflects CPU decode windows setup. */ - ranges = <0x0 0x0f 0xf9300000 0x00100000 - 0x1 0x1e 0xfa000000 0x00100000 - 0x2 0x1d 0xfa100000 0x02000000>; - }; - - soc88f5182@f1000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0xf1000000 0x00100000>; - bus-frequency = <0>; - - PIC: pic@20200 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x20200 0x3c>; - compatible = "mrvl,pic"; - }; - - timer@20300 { - compatible = "mrvl,timer"; - reg = <0x20300 0x30>; - interrupts = <0>; - interrupt-parent = <&PIC>; - mrvl,has-wdt; - }; - - MPP: mpp@10000 { - #pin-cells = <2>; - compatible = "mrvl,mpp"; - reg = <0x10000 0x54>; - pin-count = <20>; - pin-map = < - 16 0 /* MPP[16]: UA1_RXD */ - 17 0 /* MPP[17]: UA1_TXD */ - 19 0 >; /* MPP[19]: UA1_RTS */ - }; - - mge0: ethernet@72000 { - #address-cells = <1>; - #size-cells = <1>; - model = "V1"; - compatible = "mrvl,ge"; - reg = <0x72000 0x2000>; - ranges = <0x0 0x72000 0x2000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <18 19 20 21 22>; - interrupt-parent = <&PIC>; - - phy-handle = <&phy0>; - - mdio@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,mdio"; - - phy0: ethernet-phy@0 { - reg = <0x0>; - }; - }; - }; - - serial0: serial@12000 { - compatible = "ns16550"; - reg = <0x12000 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <3>; - interrupt-parent = <&PIC>; - }; - - serial1: serial@12100 { - compatible = "ns16550"; - reg = <0x12100 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <4>; - interrupt-parent = <&PIC>; - }; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/ts7800.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/xpowers-axp209.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/xpowers-axp209.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/xpowers-axp209.dtsi (nonexistent) @@ -1,33 +0,0 @@ -/*- - * Copyright (c) 2016 Emmanuel Vadot - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - - -&axp209 { - gpio-controller; - #gpio-cells = <1>; -}; Property changes on: head/sys/boot/fdt/dts/arm/xpowers-axp209.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/imx53x.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/imx53x.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/imx53x.dtsi (nonexistent) @@ -1,714 +0,0 @@ -/* - * Copyright (c) 2012 The FreeBSD Foundation - * Copyright (c) 2013 Rui Paulo - * All rights reserved. - * - * This software was developed by Semihalf under sponsorship from - * the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Freescale i.MX535 Device Tree Source. - * - * $FreeBSD$ - */ - -/ { - #address-cells = <1>; - #size-cells = <1>; - - aliases { - soc = &SOC; - }; - - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,MCIMX535"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x8000>; - i-cache-size = <0x8000>; - l2-cache-line-size = <32>; - l2-cache-line = <0x40000>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - localbus@0fffc000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - - /* This reflects CPU decode windows setup. */ - ranges; - - tzic: tz-interrupt-controller@0fffc000 { - compatible = "fsl,imx53-tzic", "fsl,tzic"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0x0fffc000 0x00004000>; - }; - /* - * 40000000 40000FFF 4K Debug ROM - * 40001000 40001FFF 4K ETB - * 40002000 40002FFF 4K ETM - * 40003000 40003FFF 4K TPIU - * 40004000 40004FFF 4K CTI0 - * 40005000 40005FFF 4K CTI1 - * 40006000 40006FFF 4K CTI2 - * 40007000 40007FFF 4K CTI3 - * 40008000 40008FFF 4K ARM Debug Unit - * - * 0FFFC000 0FFFCFFF 0x4000 TZIC - */ - }; - - SOC: soc@50000000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&tzic>; - ranges; - - aips@50000000 { /* AIPS1 */ - compatible = "fsl,aips-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&tzic>; - ranges; - - /* Required by many devices, so better to stay first */ - /* 53FD4000 0x4000 CCM */ - clock@53fd4000 { - compatible = "fsl,imx53-ccm"; - /* 63F80000 0x4000 DPLLIP1 */ - /* 63F84000 0x4000 DPLLIP2 */ - /* 63F88000 0x4000 DPLLIP3 */ - reg = <0x53fd4000 0x4000 - 0x63F80000 0x4000 - 0x63F84000 0x4000 - 0x63F88000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <71 72>; - status = "disabled"; - }; - - /* - * GPIO modules moved up - to have it attached for - * drivers which rely on GPIO - */ - /* 53F84000 0x4000 GPIO1 */ - gpio1: gpio@53f84000 { - compatible = "fsl,imx53-gpio"; - reg = <0x53f84000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <50 51 42 43 44 45 46 47 48 49>; - /* TODO: use <> also */ - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - /* 53F88000 0x4000 GPIO2 */ - gpio2: gpio@53f88000 { - compatible = "fsl,imx53-gpio"; - reg = <0x53f88000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <52 53>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - /* 53F8C000 0x4000 GPIO3 */ - gpio3: gpio@53f8c000 { - compatible = "fsl,imx53-gpio"; - reg = <0x53f8c000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <54 55>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - /* 53F90000 0x4000 GPIO4 */ - gpio4: gpio@53f90000 { - compatible = "fsl,imx53-gpio"; - reg = <0x53f90000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <56 57>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - /* 53FDC000 0x4000 GPIO5 */ - gpio5: gpio@53fdc000 { - compatible = "fsl,imx53-gpio"; - reg = <0x53fdc000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <103 104>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - /* 53FE0000 0x4000 GPIO6 */ - gpio6: gpio@53fe0000 { - compatible = "fsl,imx53-gpio"; - reg = <0x53fe0000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <105 106>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - /* 53FE4000 0x4000 GPIO5 */ - gpio7: gpio@53fe4000 { - compatible = "fsl,imx53-gpio"; - reg = <0x53fe4000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <107 108>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - spba@50000000 { - compatible = "fsl,spba-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&tzic>; - ranges; - - /* 50004000 0x4000 ESDHC 1 */ - esdhc@50004000 { - compatible = "fsl,imx53-esdhc"; - reg = <0x50004000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <1>; - status = "disabled"; - }; - - /* 50008000 0x4000 ESDHC 2 */ - esdhc@50008000 { - compatible = "fsl,imx53-esdhc"; - reg = <0x50008000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <2>; - status = "disabled"; - }; - - /* 5000C000 0x4000 UART 3 */ - uart3: serial@5000c000 { - compatible = "fsl,imx53-uart", "fsl,imx-uart"; - reg = <0x5000c000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <33>; - status = "disabled"; - }; - - /* 50010000 0x4000 eCSPI1 */ - ecspi@50010000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx53-ecspi"; - reg = <0x50010000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <36>; - status = "disabled"; - }; - - /* 50014000 0x4000 SSI2 irq30 */ - SSI2: ssi@50014000 { - compatible = "fsl,imx53-ssi"; - reg = <0x50014000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <30>; - status = "disabled"; - }; - - /* 50020000 0x4000 ESDHC 3 */ - esdhc@50020000 { - compatible = "fsl,imx53-esdhc"; - reg = <0x50020000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <3>; - status = "disabled"; - }; - - /* 50024000 0x4000 ESDHC 4 */ - esdhc@50024000 { - compatible = "fsl,imx53-esdhc"; - reg = <0x50024000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <4>; - status = "disabled"; - }; - - /* 50028000 0x4000 SPDIF */ - /* 91 SPDIF */ - - pata@50030000 { - compatible = "fsl,imx53-ata"; - reg = <0x50030000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <70>; - status = "disabled"; - }; - - /* 50034000 0x4000 SLM */ - /* 50038000 0x4000 HSI2C */ - /* 64 HS-I2C */ - /* 5003C000 0x4000 SPBA */ - }; - - usbphy0: usbphy@0 { - compatible = "usb-nop-xceiv"; - status = "okay"; - }; - - usbphy1: usbphy@1 { - compatible = "usb-nop-xceiv"; - status = "okay"; - }; - - usbotg: usb@53f80000 { - compatible = "fsl,imx53-usb", "fsl,imx27-usb"; - reg = <0x53f80000 0x0200>; - interrupts = <18>; - fsl,usbphy = <&usbphy0>; - status = "disabled"; - }; - - usbh1: usb@53f80200 { - compatible = "fsl,imx53-usb", "fsl,imx27-usb"; - reg = <0x53f80200 0x0200>; - interrupts = <14>; - fsl,usbphy = <&usbphy1>; - status = "disabled"; - }; - - usbh2: usb@53f80400 { - compatible = "fsl,imx53-usb", "fsl,imx27-usb"; - reg = <0x53f80400 0x0200>; - interrupts = <16>; - status = "disabled"; - }; - - usbh3: usb@53f80600 { - compatible = "fsl,imx53-usb", "fsl,imx27-usb"; - reg = <0x53f80600 0x0200>; - interrupts = <17>; - status = "disabled"; - }; - - usbmisc: usbmisc@53f80800 { - #index-cells = <1>; - compatible = "fsl,imx53-usbmisc"; - reg = <0x53f80800 0x200>; - }; - - /* 53F98000 0x4000 WDOG1 */ - wdog@53f98000 { - compatible = "fsl,imx53-wdt"; - reg = <0x53f98000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <58>; - status = "disabled"; - }; - - /* 53F9C000 0x4000 WDOG2 (TZ) */ - wdog@53f9c000 { - compatible = "fsl,imx53-wdt"; - reg = <0x53f9c000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <59>; - status = "disabled"; - }; - - /* 53F94000 0x4000 KPP */ - keyboard@53f94000 { - compatible = "fsl,imx53-kpp"; - reg = <0x53f94000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <60>; - status = "disabled"; - }; - - /* 53FA0000 0x4000 GPT */ - timer@53fa0000 { - compatible = "fsl,imx53-gpt"; - reg = <0x53fa0000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <39>; - status = "disabled"; - }; - - /* 53FA4000 0x4000 SRTC */ - - rtc@53fa4000 { - compatible = "fsl,imx53-srtc"; - reg = <0x53fa4000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <24 25>; - status = "disabled"; - }; - - /* 53FA8000 0x4000 IOMUXC */ - iomux@53fa8000 { - compatible = "fsl,imx53-iomux"; - reg = <0x53fa8000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <7>; - }; - - /* 53FAC000 0x4000 EPIT1 */ - epit1: timer@53fac000 { - compatible = "fsl,imx53-epit"; - reg = <0x53fac000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <40>; - status = "disabled"; - }; - - /* 53FB0000 0x4000 EPIT2 */ - epit2: timer@53fb0000 { - compatible = "fsl,imx53-epit"; - reg = <0x53fb0000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <41>; - status = "disabled"; - }; - - /* 53FB4000 0x4000 PWM1 */ - pwm@53fb4000 { - compatible = "fsl,imx53-pwm"; - reg = <0x53fb4000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <61>; - status = "disabled"; - }; - - /* 53FB8000 0x4000 PWM2 */ - pwm@53fb8000 { - compatible = "fsl,imx53-pwm"; - reg = <0x53fb8000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <94>; - status = "disabled"; - }; - - /* 53FBC000 0x4000 UART 1 */ - uart1: serial@53fbc000 { - compatible = "fsl,imx53-uart", "fsl,imx-uart"; - reg = <0x53fbc000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <31>; - status = "disabled"; - }; - - /* 53FC0000 0x4000 UART 2 */ - uart2: serial@53fc0000 { - compatible = "fsl,imx53-uart", "fsl,imx-uart"; - reg = <0x53fc0000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <32>; - status = "disabled"; - }; - - /* 53FF0000 0x4000 UART 4 */ - uart4: serial@53ff0000 { - compatible = "fsl,imx53-uart", "fsl,imx-uart"; - reg = <0x53ff0000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <13>; - status = "disabled"; - }; - - /* 53FD0000 0x4000 SRC */ - reset@53fd0000 { - compatible = "fsl,imx53-src"; - reg = <0x53fd0000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <75>; - status = "disabled"; - }; - /* 53FD8000 0x4000 GPC */ - power@53fd8000 { - compatible = "fsl,imx53-gpc"; - reg = <0x53fd8000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <73 74>; - status = "disabled"; - }; - i2c@53fec000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx1-i2c", - "fsl,imx-i2c"; - reg = <0x53fec000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <64>; - status = "disabled"; - }; - }; - - aips@60000000 { /* AIPS2 */ - compatible = "fsl,aips-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&tzic>; - ranges; - - /* 63F90000 0x4000 UART 5 */ - uart5: serial@63f90000 { - compatible = "fsl,imx53-uart", "fsl,imx-uart"; - reg = <0x63f90000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <32>; - status = "disabled"; - }; - - /* 63F94000 0x4000 AHBMAX */ - /* 63F98000 0x4000 IIM */ - /* - * 69 IIM Interrupt request to the processor. - * Indicates to the processor that program or - * explicit. - */ - /* 63F9C000 0x4000 CSU */ - /* - * 27 CSU Interrupt Request 1. Indicates to the - * processor that one or more alarm inputs were. - */ - - /* 63FA0000 0x4000 TIGERP_PLATFORM_NE_32K_256K */ - /* irq76 Neon Monitor Interrupt */ - /* irq77 Performance Unit Interrupt */ - /* irq78 CTI IRQ */ - /* irq79 Debug Interrupt, Cross-Trigger Interface 1 */ - /* irq80 Debug Interrupt, Cross-Trigger Interface 1 */ - /* irq89 Debug Interrupt, Cross-Trigger Interface 2 */ - /* irq98 Debug Interrupt, Cross-Trigger Interface 3 */ - - /* 63FA4000 0x4000 OWIRE irq88 */ - /* 63FA8000 0x4000 FIRI irq93 */ - /* 63FAC000 0x4000 eCSPI2 */ - ecspi@63fac000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx53-ecspi"; - reg = <0x63fac000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <37>; - status = "disabled"; - }; - - /* 63FB0000 0x4000 SDMA */ - sdma@63fb0000 { - compatible = "fsl,imx53-sdma"; - reg = <0x63fb0000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <6>; - }; - - /* 63FB4000 0x4000 SCC */ - /* 21 SCC Security Monitor High Priority Interrupt. */ - /* 22 SCC Secure (TrustZone) Interrupt. */ - /* 23 SCC Regular (Non-Secure) Interrupt. */ - - /* 63FB8000 0x4000 ROMCP */ - /* 63FBC000 0x4000 RTIC */ - /* - * 26 RTIC RTIC (Trust Zone) Interrupt Request. - * Indicates that the RTIC has completed hashing the - */ - - /* 63FC0000 0x4000 CSPI */ - cspi@63fc0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx53-cspi"; - reg = <0x63fc0000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <38>; - status = "disabled"; - }; - - /* 63FC4000 0x4000 I2C2 */ - i2c@63fc4000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx1-i2c", "fsl,imx-i2c"; - reg = <0x63fc4000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <63>; - status = "disabled"; - }; - - /* 63FC8000 0x4000 I2C1 */ - i2c@63fc8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx1-i2c", "fsl,imx-i2c"; - reg = <0x63fc8000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <62>; - status = "disabled"; - }; - - /* 63FCC000 0x4000 SSI1 */ - /* 29 SSI1 SSI-1 Interrupt Request */ - SSI1: ssi@63fcc000 { - compatible = "fsl,imx53-ssi"; - reg = <0x63fcc000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <29>; - status = "disabled"; - }; - - /* 63FD0000 0x4000 AUDMUX */ - audmux@63fd4000 { - compatible = "fsl,imx53-audmux"; - reg = <0x63fd4000 0x4000>; - status = "disabled"; - }; - - /* 63FD8000 0x4000 EXTMC */ - /* 8 EXTMC (NFC) */ - /* 15 EXTMC */ - /* 97 EXTMC Boot sequence completed interrupt */ - /* - * 101 EMI Indicates all pages have been transferred - * to NFC during an auto program operation. - */ - - /* 83FE4000 0x4000 SIM */ - /* 67 SIM intr composed of oef, xte, sdi1, and sdi0 */ - /* 68 SIM intr composed of tc, etc, tfe, and rdrf */ - - /* 63FD_C000 0x4000 apb2ip_pl301_2x2 */ - /* 63FE_0000 0x4000 apb2ip_pl301_4x1 */ - /* 63FE4000 0x4000 MLB */ - /* 63FE8000 0x4000 SSI3 */ - /* 96 SSI3 SSI-3 Interrupt Request */ - SSI3: ssi@63fe8000 { - compatible = "fsl,imx51-ssi"; - reg = <0x63fe8000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <96>; - status = "disabled"; - }; - - /* 63FEC000 0x4000 FEC */ - ethernet@63fec000 { - compatible = "fsl,imx53-fec"; - reg = <0x63fec000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <87>; - status = "disabled"; - }; - - /* 63FF0000 0x4000 TVE */ - /* 92 TVE */ - /* 63FF4000 0x4000 VPU */ - /* 9 VPU */ - /* 100 VPU Idle interrupt from VPU */ - - /* 63FF8000 0x4000 SAHARA */ - /* 19 SAHARA SAHARA host 0 (TrustZone) Intr */ - /* 20 SAHARA SAHARA host 1 (non-TrustZone) Intr */ - }; - }; - - localbus@10000000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - sata@10000000 { - compatible = "fsl,imx53-ata"; - reg = <0x10000000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <28>; - status = "disabled"; - }; - - vga: ipu3@1E000000 { - compatible = "fsl,ipu3"; - reg = < - 0x1E000000 0x08000 /* CM */ - 0x1E008000 0x08000 /* IDMAC */ - 0x1E018000 0x08000 /* DP */ - 0x1E020000 0x08000 /* IC */ - 0x1E028000 0x08000 /* IRT */ - 0x1E030000 0x08000 /* CSI0 */ - 0x1E038000 0x08000 /* CSI1 */ - 0x1E040000 0x08000 /* DI0 */ - 0x1E048000 0x08000 /* DI1 */ - 0x1E050000 0x08000 /* SMFC */ - 0x1E058000 0x08000 /* DC */ - 0x1E060000 0x08000 /* DMFC */ - 0x1E068000 0x08000 /* VDI */ - 0x1F000000 0x20000 /* CPMEM */ - 0x1F020000 0x20000 /* LUT */ - 0x1F040000 0x20000 /* SRM */ - 0x1F060000 0x20000 /* TPM */ - 0x1F080000 0x20000 /* DCTMPL */ - >; - interrupt-parent = <&tzic>; - interrupts = < - 10 /* IPUEX Error */ - 11 /* IPUEX Sync */ - >; - status = "disabled"; - }; - }; -}; - -/* - -TODO: Not mapped interrupts - -5 DAP -84 GPU2D (OpenVG) general interrupt -85 GPU2D (OpenVG) busy signal (for S/W power gating feasibility) -12 GPU3D -102 GPU3D Idle interrupt from GPU3D (for S/W power gating) -90 SJC -*/ Property changes on: head/sys/boot/fdt/dts/arm/imx53x.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/efikamx.dts =================================================================== --- head/sys/boot/fdt/dts/arm/efikamx.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/efikamx.dts (nonexistent) @@ -1,128 +0,0 @@ -/* - * Copyright (c) 2012 The FreeBSD Foundation - * All rights reserved. - * - * This software was developed by Semihalf under sponsorship from - * the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Freescale i.MX515 Device Tree Source. - * - * $FreeBSD$ - */ - -/dts-v1/; -/include/ "imx51x.dtsi" - -/ { - model = "Genesi Efika MX"; - compatible = "genesi,imx51-efikamx", "fsl,imx51"; - - memory { - /* RAM 512M */ - reg = <0x90000000 0x20000000>; - }; - - localbus@5e000000 { - ipu3@5e000000 { - status = "okay"; - }; - }; - - soc@70000000 { - aips@70000000 { - spba@70000000 { - esdhc@70004000 { - clock-frequency = <216000000>; - status = "okay"; - }; - esdhc@70008000 { - clock-frequency = <216000000>; - status = "okay"; - }; - SSI2: ssi@70014000 { - status = "okay"; - }; - }; - timer@73fa0000 { - status = "okay"; - }; - - /* UART1, console */ - UART1: serial@73fbc000 { - status = "okay"; - clock-frequency = <3000000>; /* XXX */ - }; - - clock@73fd4000 { - status = "okay"; - }; - gpio@73f84000 { - status = "okay"; - }; - gpio@73f88000 { - status = "okay"; - }; - gpio@73f8c000 { - status = "okay"; - }; - gpio@73f90000 { - status = "okay"; - }; - usb@73f80000 /* OTG */ { - status = "okay"; - }; - usb@73f80200 /* Host 1 */ { - status = "okay"; - }; - wdog@73f98000 { - status = "okay"; - }; - }; - aips@80000000 { - i2c@83fc4000 { - status = "okay"; - }; - i2c@83fc8000 { - status = "okay"; - }; - audmux@83fd4000 { - status = "okay"; - }; - ide@83fe0000 { - status = "okay"; - }; - }; - }; - - aliases { - UART1 = &UART1; - SSI2 = &SSI2; - }; - - chosen { - bootargs = "-v"; - stdin = "UART1"; - stdout = "UART1"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/efikamx.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/exynos5420.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/exynos5420.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/exynos5420.dtsi (nonexistent) @@ -1,112 +0,0 @@ -/*- - * Copyright (c) 2014 Ruslan Bukin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/include/ "exynos5.dtsi" - -/ { - compatible = "samsung,exynos5420", "samsung,exynos5"; - - SOC: Exynos5@0 { - - pmu_system_controller: system-controller@10040000 { - compatible = "samsung,exynos5420-pmu"; - status = "okay"; - }; - - pad0: pad@11400000 { - compatible = "samsung,exynos5420-padctrl"; - status = "okay"; - reg = <0x13400000 0x1000>, - <0x13410000 0x1000>, - <0x14000000 0x1000>, - <0x14010000 0x1000>, - <0x03860000 0x1000>; - interrupts = < 77 110 78 82 79 >; - interrupt-parent = <&GIC>; - }; - - serial0: serial@12C00000 { - clock-frequency = < 50000000 >; - }; - - serial1: serial@12C10000 { - clock-frequency = < 50000000 >; - }; - - serial2: serial@12C20000 { - clock-frequency = < 50000000 >; - }; - - serial3: serial@12C30000 { - clock-frequency = < 50000000 >; - }; - - usbdrd_phy0: phy@12100000 { - status = "okay"; - }; - - usbdrd_phy1: phy@12500000 { - status = "okay"; - }; - - xhci@12000000 { - status = "okay"; - }; - - xhci@12400000 { - status = "okay"; - }; - - mmc0: dwmmc@12200000 { - compatible = "samsung,exynos5420-dw-mshc-smu"; - reg = <0x12200000 0x10000>; - interrupts = <107>; - interrupt-parent = <&GIC>; - fifo-depth = <0x40>; - status = "disabled"; - }; - - mmc1: dwmmc@12210000 { - compatible = "samsung,exynos5420-dw-mshc-smu"; - reg = <0x12210000 0x10000>; - interrupts = <108>; - interrupt-parent = <&GIC>; - fifo-depth = <0x40>; - status = "disabled"; - }; - - mmc2: dwmmc@12220000 { - compatible = "samsung,exynos5420-dw-mshc"; - reg = <0x12220000 0x10000>; - interrupts = <109>; - interrupt-parent = <&GIC>; - fifo-depth = <0x40>; - status = "disabled"; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/exynos5420.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/exynos5.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/exynos5.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/exynos5.dtsi (nonexistent) @@ -1,337 +0,0 @@ -/*- - * Copyright (c) 2013-2014 Ruslan Bukin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/ { - compatible = "samsung,exynos5"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&GIC>; - - aliases { - soc = &SOC; - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - clk0 = &clk0; - dp0 = &dp0; - fimd0 = &fimd0; - }; - - SOC: Exynos5@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges; - bus-frequency = <0>; - - pmu_system_controller: system-controller@10040000 { - reg = <0x10040000 0x5000>; - status = "disabled"; - }; - - GIC: interrupt-controller@10481000 { - compatible = "arm,gic"; - reg = < 0x10481000 0x1000 >, /* Distributor Registers */ - < 0x10482000 0x2000 >; /* CPU Interface Registers */ - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - }; - - combiner: interrupt-controller@10440000 { - compatible = "exynos,combiner"; - reg = <0x10440000 0x1000>; - interrupts = < 32 33 34 35 36 37 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 >; - interrupt-parent = <&GIC>; - }; - - clk0: clk@10010000 { - compatible = "exynos,clk"; - reg = < 0x10020000 0x20000 >; - }; - - mct { - compatible = "exynos,mct"; - reg = < 0x101C0000 0x1000 >; - clock-frequency = <24000000>; - }; - - generic_timer { - compatible = "arm,armv7-timer"; - clock-frequency = <24000000>; - interrupts = < 29 30 27 26 >; - interrupt-parent = <&GIC>; - }; - - pwm { - compatible = "samsung,s3c24x0-timer"; - reg = <0x12DD0000 0x1000>; - interrupts = < 71 >; - interrupt-parent = <&GIC>; - clock-frequency = <24000000>; - }; - - pad0: pad@11400000 { - status = "disabled"; - }; - - usbdrd_phy0: phy@12100000 { - compatible = "samsung,exynos5420-usbdrd-phy"; - status = "disabled"; - reg = <0x12100000 0x100>; - samsung,pmu-syscon = <&pmu_system_controller>; - }; - - usbdrd_phy1: phy@12500000 { - compatible = "samsung,exynos5420-usbdrd-phy"; - status = "disabled"; - reg = <0x12500000 0x100>; - samsung,pmu-syscon = <&pmu_system_controller>; - }; - - xhci@12000000 { - compatible = "samsung,exynos5250-dwusb3"; - status = "disabled"; - reg = <0x12000000 0x1000>, - <0x1200c100 0x1000>; - interrupts = < 104 >; - interrupt-parent = <&GIC>; - }; - - xhci@12400000 { - compatible = "samsung,exynos5250-dwusb3"; - status = "disabled"; - reg = <0x12400000 0x1000>, - <0x1240c100 0x1000>; - interrupts = < 105 >; - interrupt-parent = <&GIC>; - }; - - usb@12110000 { - compatible = "exynos,usb-ehci", "usb-ehci"; - status = "disabled"; - reg = <0x12110000 0x1000>, /* EHCI */ - <0x12130000 0x1000>, /* EHCI host ctrl */ - <0x10050230 0x10>; /* Sysreg */ - interrupts = < 103 >; - interrupt-parent = <&GIC>; - }; - - usb@12120000 { - compatible = "exynos,usb-ohci", "usb-ohci"; - status = "disabled"; - reg = <0x12120000 0x10000>; - interrupts = < 103 >; - interrupt-parent = <&GIC>; - }; - - sdhci@12200000 { - compatible = "sdhci_generic"; - status = "disabled"; - reg = <0x12200000 0x1000>; - interrupts = <107>; - interrupt-parent = <&GIC>; - max-frequency = <24000000>; /* TODO: verify freq */ - }; - - sdhci@12210000 { - compatible = "sdhci_generic"; - status = "disabled"; - reg = <0x12210000 0x1000>; - interrupts = <108>; - interrupt-parent = <&GIC>; - max-frequency = <24000000>; - }; - - sdhci@12220000 { - compatible = "sdhci_generic"; - status = "disabled"; - reg = <0x12220000 0x1000>; - interrupts = <109>; - interrupt-parent = <&GIC>; - max-frequency = <24000000>; - }; - - sdhci@12230000 { - compatible = "sdhci_generic"; - status = "disabled"; - reg = <0x12230000 0x1000>; - interrupts = <110>; - interrupt-parent = <&GIC>; - max-frequency = <24000000>; - }; - - serial0: serial@12C00000 { - compatible = "exynos"; - status = "disabled"; - reg = <0x12C00000 0x100>; - interrupts = < 83 >; - interrupt-parent = <&GIC>; - clock-frequency = < 100000000 >; - current-speed = <115200>; - }; - - serial1: serial@12C10000 { - compatible = "exynos"; - status = "disabled"; - reg = <0x12C10000 0x100>; - interrupts = < 84 >; - interrupt-parent = <&GIC>; - clock-frequency = < 100000000 >; - current-speed = <115200>; - }; - - serial2: serial@12C20000 { - compatible = "exynos"; - status = "disabled"; - reg = <0x12C20000 0x100>; - interrupts = < 85 >; - interrupt-parent = <&GIC>; - clock-frequency = < 100000000 >; - current-speed = <115200>; - }; - - serial3: serial@12C30000 { - compatible = "exynos"; - status = "disabled"; - reg = <0x12C30000 0x100>; - interrupts = < 86 >; - interrupt-parent = <&GIC>; - clock-frequency = < 100000000 >; - current-speed = <115200>; - }; - - spi0: spi@12d20000 { - compatible = "samsung,exynos5-spi"; - status = "disabled"; - reg = <0x12d20000 0x100>; - interrupts = < 100 >; - interrupt-parent = <&GIC>; - }; - - spi1: spi@12d30000 { - compatible = "samsung,exynos5-spi"; - status = "disabled"; - reg = <0x12d30000 0x100>; - interrupts = < 101 >; - interrupt-parent = <&GIC>; - }; - - spi2: spi@12d40000 { - compatible = "samsung,exynos5-spi"; - status = "disabled"; - reg = <0x12d40000 0x100>; - interrupts = < 102 >; - interrupt-parent = <&GIC>; - }; - - i2c0: i2c@12C60000 { - compatible = "exynos,i2c"; - status = "disabled"; - reg = <0x12C60000 0x10000>; - interrupts = < 88 >; - interrupt-parent = <&GIC>; - }; - - i2c1: i2c@12C70000 { - compatible = "exynos,i2c"; - status = "disabled"; - reg = <0x12C70000 0x10000>; - interrupts = < 89 >; - interrupt-parent = <&GIC>; - }; - - i2c2: i2c@12C80000 { - compatible = "exynos,i2c"; - status = "disabled"; - reg = <0x12C80000 0x10000>; - interrupts = < 90 >; - interrupt-parent = <&GIC>; - }; - - i2c3: i2c@12C90000 { - compatible = "exynos,i2c"; - status = "disabled"; - reg = <0x12C90000 0x10000>; - interrupts = < 91 >; - interrupt-parent = <&GIC>; - }; - - i2c4: i2c@12CA0000 { - compatible = "exynos,i2c"; - status = "disabled"; - reg = <0x12CA0000 0x10000>; - interrupts = < 92 >; - interrupt-parent = <&GIC>; - }; - - i2c5: i2c@12CB0000 { - compatible = "exynos,i2c"; - status = "disabled"; - reg = <0x12CB0000 0x10000>; - interrupts = < 93 >; - interrupt-parent = <&GIC>; - }; - - i2c6: i2c@12CC0000 { - compatible = "exynos,i2c"; - status = "disabled"; - reg = <0x12CC0000 0x10000>; - interrupts = < 94 >; - interrupt-parent = <&GIC>; - }; - - i2c7: i2c@12CD0000 { - compatible = "exynos,i2c"; - status = "disabled"; - reg = <0x12CD0000 0x10000>; - interrupts = < 95 >; - interrupt-parent = <&GIC>; - }; - - fimd0: fimd@14400000 { - compatible = "exynos,fimd"; - status = "disabled"; - reg = < 0x14400000 0x10000 >, /* fimd */ - < 0x14420000 0x10000 >, /* disp */ - < 0x10050000 0x220 >; /* sysreg */ - interrupt-parent = <&GIC>; - }; - - dp0: dp@145B0000 { - compatible = "exynos,dp"; - status = "disabled"; - reg = < 0x145B0000 0x10000 >; - interrupt-parent = <&GIC>; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/exynos5.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/vsatv102-m6.dts =================================================================== --- head/sys/boot/fdt/dts/arm/vsatv102-m6.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/vsatv102-m6.dts (nonexistent) @@ -1,309 +0,0 @@ -/*- - * Copyright (c) 2013-2015 John Wehle - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * The ordering of certain devices is significant (e.g. usb depends on - * usb-phy which depends on gpio, also the timer should appear early on - * to provide a reasonably accurate DELAY implementation). - * - * Both usb-phys devices must be configured to prevent the usb controller - * from hanging during initialization. - */ - -/dts-v1/; - -/memreserve/ 0x84900000 0x00600000; /* 6MB frame buffer */ - -#include "meson6.dtsi" - -/ { - /* - * My development unit visually appears to be a Visson ATV-102 - * and the specs for both my unit and the Visson ATV-102 say - * the SoC is an aml8726-m3. However the uboot prompt says - * m6_mbx_v1, the RTC is located on SECBUS2 instead of AOBUS, - * and there are two cores so it seems my unit is a newer - * version using the later processor. - */ - - model = "visson,atv-102"; - compatible = "visson,atv-102", "amlogic,meson6"; - - #address-cells = <1>; - #size-cells = <1>; - - aliases { - soc = &soc; - screen = &screen; - uart0 = &uart_AO; - }; - - memory { - device_type = "memory"; - reg = <0x80000000 0x40000000>; /* 1GB RAM */ - }; - - soc: soc { - device_type = "soc"; - bus-frequency = <0>; - - pic: pic@c1109a40 { - device_type = "interrupt-controller"; - compatible = "amlogic,aml8726-pic"; - reg = <0xc1109a40 128>; /* cbus 0x2690 */ - - interrupt-controller; - #interrupt-cells = <3>; - }; - - scu: scu@c4300000 { - compatible = "arm,cortex-a9-scu"; - reg = <0xc4300000 0x1000>; - }; - - cpuconfig: cpuconfig@d901ff80 { - compatible = "amlogic,aml8726-cpuconfig"; - reg = <0xd901ff80 8>; - }; - - ccm@c1104140 { - compatible = "amlogic,aml8726-ccm"; - reg = <0xc1104140 20>; /* cbus 0x1050 */ - - functions = "ethernet", "i2c", "rng", "sdio", - "uart-a", "uart-b", "uart-c", - "usb-a", "usb-b"; - }; - - pinctrl: pinctrl@c11080b0 { - compatible = "amlogic,aml8726-pinctrl"; - reg = <0xc11080b0 40>, /* mux */ - <0xc11080e8 24>, /* pu/pd */ - <0xc11080e8 24>, /* pull enable */ - <0xc8100014 4>, /* ao mux */ - <0xc810002c 4>, /* ao pu/pd */ - <0xc810002c 4>; /* ao pull enable */ - - /* - * Currently only pin muxing that deviates - * from the power on default of gpio is - * specified here. - */ - - pinctrl-names = "default"; - pinctrl-0 = <&pins_uartao &pins_ethernet &pins_hdmi>; - - pins_ethernet: ethernet { - amlogic,pins = "ref_clk_in", - "tx_clk", "tx_en", - "tx_d0", "tx_d1", - "tx_d2", "tx_d3", - "rx_clk", "rx_dv", - "rx_d0", "rx_d1", - "rx_d2", "rx_d3", - "mdc", "mdio"; - amlogic,function = "ethernet"; - }; - - pins_hdmi: hdmi { - amlogic,pins = "cec", "hpd", - "scl", "sda"; - amlogic,function = "hdmi"; - }; - - pins_sdio_b: sdio_b { - amlogic,pins = "clk", "cmd", - "d0", "d1", - "d2", "d3"; - amlogic,function = "sdio-b"; - }; - - pins_uartao: uartao { - amlogic,pins = "tx", "rx"; - amlogic,function = "uart-ao"; - }; - }; - - rtc@da004340 { - compatible = "amlogic,aml8726-rtc"; - reg = <0xda004340 20>; /* secbus2 0xd0 */ - interrupts = <0 72 1>; /* AM_IRQ2(8) */ - }; - - clkmsr: clkmsr@c1108758 { - compatible = "amlogic,aml8726-clkmsr"; - reg = <0xc1108758 16>; /* cbus 0x21d6 */ - - clocks = <&clk81>; - }; - - gpioao: gpio@c8100024 { - /* gpio unit 7 */ - compatible = "amlogic,aml8726-gpio"; - reg = <0xc8100024 4>, /* oen aobus 0x9 */ - <0xc8100024 4>, /* out */ - <0xc8100028 4>; /* in */ - - gpio-controller; - #gpio-cells = <1>; - pin-count = <12>; - }; - - gpio5: gpio@c110806c { - compatible = "amlogic,aml8726-gpio"; - reg = <0xc110806c 4>, /* oen cbus 0x201b */ - <0xc1108070 4>, /* out */ - <0xc1108074 4>; /* in */ - - gpio-controller; - #gpio-cells = <1>; - pin-count = <32>; - }; - - gpio6: gpio@c1108020 { - compatible = "amlogic,aml8726-gpio"; - reg = <0xc1108020 4>, /* oen cbus 0x2008 */ - <0xc1108024 4>, /* out */ - <0xc1108028 4>; /* in */ - - gpio-controller; - #gpio-cells = <1>; - pin-count = <29>; - }; - - mmc@c1108c20 { - compatible = "amlogic,aml8726-mmc"; - reg = <0xc1108c20 32>; /* cbus 0x2308 */ - interrupts = <0 28 1>; /* AM_IRQ0(28) */ - - clocks = <&clk81>; - - pinctrl-names = "default"; - pinctrl-0 = <&pins_sdio_b>; - - mmc-voltages = "3.3"; - - mmc-pwr-en = <&gpio5 31 0>; /* card_8 */ - ins-detect = <&gpio5 29 0>; /* card_6 */ - }; - - rng@c1108100 { - compatible = "amlogic,aml8726-rng"; - reg = <0xc1108100 8>; /* cbus 0x2040 */ - }; - - usb-phy@c1108400 { - /* usb-a phy */ - compatible = "amlogic,aml8726-m6-usb-phy"; - reg = <0xc1108400 32>; /* cbus 0x2100 */ - }; - - usb-phy@c1108420 { - /* usb-b phy */ - compatible = "amlogic,aml8726-m6-usb-phy"; - reg = <0xc1108420 32>; /* cbus 0x2108 */ - - usb-pwr-en = <&gpioao 3 1>, /* gpioao_3 vbus */ - <&gpio6 11 0>; /* gpioe_11 wifi */ - }; - - usb@c9040000 { - /* usb-a */ - compatible = "synopsys,designware-hs-otg2"; - reg = <0xc9040000 0x40000>; /* ahbbus 0x40000*/ - interrupts = <0 30 4>; /* AM_IRQ0(30) */ - #address-cells = <1>; - #size-cells = <0>; - }; - - usb@c90c0000 { - /* usb-b */ - compatible = "synopsys,designware-hs-otg2"; - reg = <0xc90c0000 0x40000>; /* ahbbus 0xc0000 */ - interrupts = <0 31 4>; /* AM_IRQ0(31) */ - #address-cells = <1>; - #size-cells = <0>; - - dr_mode = "host"; - }; - - eth@c9410000 { - /* ethernet */ - compatible = "snps,dwmac"; - reg = <0xc9410000 0x2000>; /* ahbbus 0x410000 */ - interrupts = <0 8 1>; /* AM_IRQ0(8) */ - #address-cells = <1>; - #size-cells = <0>; - - eth-phy-rst = <&gpio5 15 0>; /* gpioy_15 phy-rst */ - }; - - screen: fb@c8006324 { - device_type = "display"; - compatible = "amlogic,aml8726-fb"; - reg = <0xc8006324 12>, /* CANVAS */ - <0xc1106800 1024>, /* VIU */ - <0xc1107400 1024>; /* VPP */ - interrupts = <0 2 1>, /* AM_IRQ0(2) */ - <0 3 1>, /* AM_IRQ0(3) */ - <0 12 1>, /* AM_IRQ0(12) */ - <0 13 1>; /* AM_IRQ0(13) */ - - address = <0x84900000>; /* match memreserve */ - width = <720>; - height = <480>; - depth = <24>; - linebytes = <2160>; - }; - }; - - leds { - compatible = "gpio-leds"; - - sys_led { - gpios = <&gpioao 2>; /* gpioao_2 sys_led */ - label = "sys_led"; - - default-state = "on"; - }; - }; - - chosen { - stdin = "uart0"; - stdout = "uart0"; - }; -}; - -&clk81 { - clock-frequency = <0>; -}; - -&uart_AO { - status = "okay"; - current-speed = <115200>; -}; Property changes on: head/sys/boot/fdt/dts/arm/vsatv102-m6.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/wandboard-solo.dts =================================================================== --- head/sys/boot/fdt/dts/arm/wandboard-solo.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/wandboard-solo.dts (nonexistent) @@ -1,83 +0,0 @@ -/* - * Copyright (c) 2013 Ian Lepore - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Wandboard Solo. - * - * $FreeBSD$ - */ - -/dts-v1/; -/include/ "imx6.dtsi" - -/ { - #address-cells = <1>; - #size-cells = <1>; - - model = "Wandboard Solo"; - compatible = "wand,imx6s-wandboard", "fsl,imx6s"; - - memory { - reg = <0x10000000 0x20000000>; /* RAM 512M */ - }; - - SOC: soc@00000000 { - aips@02000000 { /* AIPS1 */ - gpio@0209c000 { status = "okay"; }; - gpio@020a0000 { status = "okay"; }; - gpio@020a4000 { status = "okay"; }; - gpio@020a8000 { status = "okay"; }; - gpio@020ac000 { status = "okay"; }; - gpio@020b0000 { status = "okay"; }; - gpio@020b4000 { status = "okay"; }; - console:serial@02020000 { status = "okay"; }; - serial@021e8000 { status = "disabled"; }; - serial@021ec000 { status = "disabled"; }; - serial@021f0000 { status = "disabled"; }; - serial@021f4000 { status = "disabled"; }; - usbphy@020c9000 { status = "okay"; }; - usbphy@020ca000 { status = "okay"; }; - }; - aips@02100000 { /* AIPS2 */ - ethernet@02188000 { - status = "okay"; - phy-mode = "rgmii"; - phy-disable-preamble; - }; - usb@02184000 { status = "okay"; }; - usb@02184200 { status = "okay"; }; - usb@02184400 { status = "disabled"; }; - usb@02184600 { status = "disabled"; }; - usdhc@02190000 { status = "okay"; }; - usdhc@02194000 { status = "disabled"; }; - usdhc@02198000 { status = "okay"; }; - usdhc@0219c000 { status = "disabled"; }; - }; - }; - - chosen { - stdin = &console; - stdout = &console; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/wandboard-solo.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/pandaboard-common.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/pandaboard-common.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/pandaboard-common.dtsi (nonexistent) @@ -1,53 +0,0 @@ -/*- - * Copyright (c) 2015 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -&mmc1 { - non-removable; /* XXX need real solution */ -}; - -&mmc5 { - status = "disabled"; -}; - -/ { - ocp { - global-timer@48240600 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0x48240200 0x20>; - interrupts = ; - }; - - elm: elm@48078000 { - interrupts = ; - }; - }; - chosen { - stdin = "serial2"; - stdout = "serial2"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/pandaboard-common.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/rk3188.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/rk3188.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/rk3188.dtsi (nonexistent) @@ -1,254 +0,0 @@ -/*- - * Copyright (c) 2013 Ganbold Tsagaankhuu - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/ { - compatible = "rockchip,rk3188"; - #address-cells = <1>; - #size-cells = <1>; - - interrupt-parent = <&GIC>; - - aliases { - soc = &SOC; - }; - - SOC: rk3188 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges; - bus-frequency = <0>; - - GIC: interrupt-controller@1013d000 { - compatible = "arm,gic"; - reg = <0x1013d000 0x1000>, /* Distributor Registers */ - <0x1013c100 0x0100>; /* CPU Interface Registers */ - interrupt-controller; - #interrupt-cells = <1>; - }; - - pmu@20004000 { - compatible = "rockchip,rk30xx-pmu"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x20004000 0x100>; - }; - - grf@20008000 { - compatible = "rockchip,rk30xx-grf"; - #address-cells = <1>; - #size-cells = <1>; - reg = < 0x20008000 0x2000 >; - }; - - mp_tmr@1013c600 { - compatible = "arm,mpcore-timers"; - #address-cells = <1>; - #size-cells = <0>; - clock-frequency = < 148500000 >; - reg = <0x1013c200 0x100>, /* Global Timer Regs */ - <0x1013c600 0x20>; /* Private Timer Regs */ - interrupts = < 27 29 >; - interrupt-parent = <&GIC>; - }; - - timer@20038000 { - compatible = "rockchip,rk30xx-timer"; - reg = <0x20038000 0x20>; - interrupts = <76>; - clock-frequency = <24000000>; - status = "disabled"; - }; - - timer@20038020 { - compatible = "rockchip,rk30xx-timer"; - reg = <0x20038020 0x20>; - interrupts = <77>; - clock-frequency = <24000000>; - status = "disabled"; - }; - - timer@20038060 { - compatible = "rockchip,rk30xx-timer"; - reg = <0x20038060 0x20>; - interrupts = <91>; - clock-frequency = <24000000>; - status = "disabled"; - }; - - timer@20038080 { - compatible = "rockchip,rk30xx-timer"; - reg = <0x20038080 0x20>; - interrupts = <92>; - clock-frequency = <24000000>; - status = "disabled"; - }; - - timer@200380a0 { - compatible = "rockchip,rk30xx-timer"; - reg = <0x200380a0 0x20>; - interrupts = <96>; - clock-frequency = <24000000>; - status = "disabled"; - }; - - watchdog@2004c000 { - compatible = "rockchip,rk30xx-wdt"; - reg = <0x2004c000 0x100>; - clock-frequency = < 66000000 >; - }; - - gpio0: gpio@2000a000 { - compatible = "rockchip,rk30xx-gpio"; - gpio-controller; - #gpio-cells = <2>; - reg = <0x2000a000 0x100>; - interrupts = <86>; - interrupt-parent = <&GIC>; - }; - - gpio1: gpio@2003c000 { - compatible = "rockchip,rk30xx-gpio"; - gpio-controller; - #gpio-cells = <2>; - reg = <0x2003c000 0x100>; - interrupts = <87>; - interrupt-parent = <&GIC>; - }; - - gpio2: gpio@2003e000 { - compatible = "rockchip,rk30xx-gpio"; - gpio-controller; - #gpio-cells = <2>; - reg = <0x2003e000 0x100>; - interrupts = <88>; - interrupt-parent = <&GIC>; - }; - - gpio3: gpio@20080000 { - compatible = "rockchip,rk30xx-gpio"; - gpio-controller; - #gpio-cells = <2>; - reg = <0x20080000 0x100>; - interrupts = <89>; - interrupt-parent = <&GIC>; - }; - - usb0: usb@10180000 { - compatible = "synopsys,designware-hs-otg2"; - reg = <0x10180000 0x40000>; - interrupts = <48>; - interrupt-parent = <&GIC>; - #address-cells = <1>; - #size-cells = <0>; - }; - - usb1: usb@101c0000 { - compatible = "synopsys,designware-hs-otg2"; - reg = <0x101c0000 0x40000>; - interrupts = < 49 >; - interrupt-parent = <&GIC>; - #address-cells = <1>; - #size-cells = <0>; - gpios = <&gpio0 3 2 2>; - }; - - uart0: serial@10124000 { - compatible = "snps,dw-apb-uart"; - reg = <0x10124000 0x400>; - reg-shift = <2>; - interrupts = <66>; - interrupt-parent = <&GIC>; - current-speed = <115200>; - clock-frequency = < 24000000 >; - broken-txfifo = <1>; - status = "disabled"; - }; - - uart1: serial@10126000 { - compatible = "snps,dw-apb-uart"; - reg = <0x10126000 0x400>; - reg-shift = <2>; - interrupts = <67>; - interrupt-parent = <&GIC>; - current-speed = <115200>; - clock-frequency = < 24000000 >; - broken-txfifo = <1>; - status = "disabled"; - }; - - uart2: serial@20064000 { - compatible = "snps,dw-apb-uart"; - reg = <0x20064000 0x400>; - reg-shift = <2>; - interrupts = <68>; - interrupt-parent = <&GIC>; - current-speed = <115200>; - clock-frequency = < 24000000 >; - broken-txfifo = <1>; - status = "disabled"; - }; - - uart3: serial@20068000 { - compatible = "snps,dw-apb-uart"; - reg = <0x20068000 0x400>; - reg-shift = <2>; - interrupts = <69>; - interrupt-parent = <&GIC>; - current-speed = <115200>; - clock-frequency = < 24000000 >; - broken-txfifo = <1>; - status = "disabled"; - }; - - mmc@10214000 { - compatible = "rockchip,rk2928-dw-mshc"; - reg = <0x10214000 0x1000>; - interrupts = <55>; - #address-cells = <1>; - #size-cells = <0>; - bus-frequency = <48000000>; /* TODO: verify freq */ - fifo-depth = <0x40>; - num-slots = <1>; - status = "disabled"; - }; - - mmc@10218000 { - compatible = "rockchip,rk2928-dw-mshc"; - reg = <0x10218000 0x1000>; - interrupts = <56>; - #address-cells = <1>; - #size-cells = <0>; - bus-frequency = <48000000>; /* TODO: verify freq */ - fifo-depth = <0x40>; - num-slots = <1>; - status = "disabled"; - }; - }; -}; - Property changes on: head/sys/boot/fdt/dts/arm/rk3188.dtsi ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/socfpga_cyclone5_sockit_beri_sdmmc.dts =================================================================== --- head/sys/boot/fdt/dts/arm/socfpga_cyclone5_sockit_beri_sdmmc.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/socfpga_cyclone5_sockit_beri_sdmmc.dts (nonexistent) @@ -1,153 +0,0 @@ -/*- - * Copyright (c) 2017 Ruslan Bukin - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* /dts-v1/; */ -#include "socfpga_cyclone5_sockit.dts" - -/ { - model = "Terasic SoCkit"; - compatible = "altr,socfpga-cyclone5", "altr,socfpga"; - - memreserve = < 0x00000000 0x1000 >, /* SMP trampoline */ - < 0x00001000 0x1000 >, /* virtio block */ - < 0x00002000 0x1000 >; /* virtio net */ - - soc { - /* Local timer */ - timer@fffec600 { - clock-frequency = <200000000>; - }; - - /* Global timer */ - global_timer: timer@fffec200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0xfffec200 0x20>; - interrupts = <1 11 0xf04>; - clock-frequency = <200000000>; - }; - - beri_mem0: mem@d0000000 { - compatible = "sri-cambridge,beri-mem"; - reg = <0xd0000000 0x10000000>; /* 256mb */ - status = "okay"; - }; - - pio0: pio@c0020000 { - compatible = "altr,pio"; - reg = <0xc0020000 0x1000>; /* recv */ - interrupts = < 76 >; - status = "okay"; - }; - - pio1: pio@c0021000 { - compatible = "altr,pio"; - reg = <0xc0021000 0x1000>; /* send */ - interrupts = < 82 >; /* not in use on arm side */ - status = "okay"; - }; - - pio2: pio@c0022000 { - compatible = "altr,pio"; - reg = <0xc0022000 0x1000>; /* recv */ - interrupts = < 77 >; - status = "okay"; - }; - - pio3: pio@c0023000 { - compatible = "altr,pio"; - reg = <0xc0023000 0x1000>; /* send */ - interrupts = < 83 >; /* not in use on arm side */ - status = "okay"; - }; - - beri_vtblk: vtblk@00001000 { - compatible = "sri-cambridge,beri-vtblk"; - reg = <0x00001000 0x1000>; - pio-recv = <&pio0>; - pio-send = <&pio1>; - beri-mem = <&beri_mem0>; - status = "okay"; - }; - - beri_vtnet: vtnet@00002000 { - compatible = "sri-cambridge,beri-vtnet"; - reg = <0x00002000 0x1000>; - pio-recv = <&pio2>; - pio-send = <&pio3>; - beri-mem = <&beri_mem0>; - status = "okay"; - }; - - beri_debug: ring@c0000000 { - compatible = "sri-cambridge,beri-ring"; - reg = <0xc0000000 0x3000>; - interrupts = < 72 73 >; - device_name = "beri_debug"; - data_size = <0x1000>; - data_read = <0x0>; - data_write = <0x1000>; - control_read = <0x2000>; - control_write = <0x2010>; - status = "okay"; - }; - - beri_console: ring@c0004000 { - compatible = "sri-cambridge,beri-ring"; - reg = <0xc0004000 0x3000>; - interrupts = < 74 75 >; - device_name = "beri_console"; - data_size = <0x1000>; - data_read = <0x0>; - data_write = <0x1000>; - control_read = <0x2000>; - control_write = <0x2010>; - status = "okay"; - }; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -}; - -&mmc0 { - bus-frequency = <25000000>; -}; - -&uart0 { - clock-frequency = <100000000>; -}; - -&uart1 { - status = "disabled"; -}; Property changes on: head/sys/boot/fdt/dts/arm/socfpga_cyclone5_sockit_beri_sdmmc.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/nanopi-neo.dts =================================================================== --- head/sys/boot/fdt/dts/arm/nanopi-neo.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/nanopi-neo.dts (nonexistent) @@ -1,69 +0,0 @@ -/*- - * Copyright (c) 2016 Jared McNeill - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#include "sun8i-h3-nanopi-neo.dts" -#include "h3.dtsi" - -/ { - vdd_cpu: reg_cpux_vset { - compatible = "regulator-gpio"; - - regulator-name = "cpux-supply"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1300000>; - regulator-boot-on; - - gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* GPIOL6 */ - states = <1300000 0x1 - 1100000 0x0>; - - enable-active-high; - }; -}; - -&emac { - phy = <&phy1>; - phy-mode = "mii"; - allwinner,use-internal-phy; - allwinner,leds-active-low; - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; - operating-points = < - /* kHz uV */ - 1008000 1300000 - 816000 1100000 - 480000 1100000 - >; -}; Property changes on: head/sys/boot/fdt/dts/arm/nanopi-neo.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/h3.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/h3.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/h3.dtsi (nonexistent) @@ -1,107 +0,0 @@ -/*- - * Copyright (c) 2016 Jared McNeill - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/ { - cpus { - cpu0: cpu@0 { - clocks = <&ccu CLK_CPUX>; - clock-latency = <2000000>; - }; - }; - - soc { - emac: ethernet@1c30000 { - compatible = "allwinner,sun8i-h3-emac"; - reg = <0x01c30000 0x104>, <0x01c00030 0x4>; - reg-names = "emac", "syscon"; - interrupts = ; - resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>; - reset-names = "ahb", "ephy"; - clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>; - clock-names = "ahb", "ephy"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - r_i2c: i2c@1f02400 { - compatible = "allwinner,sun6i-a31-i2c"; - reg = <0x01f02400 0x400>; - interrupts = ; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - sid: eeprom@1c14000 { - compatible = "allwinner,sun8i-a83t-sid"; - reg = <0x01c14000 0x400>; - }; - - rtp: rtp@1c25000 { - compatible = "allwinner,sun8i-h3-ts"; - reg = <0x01c25000 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; - clock-names = "ahb", "ths"; - resets = <&ccu RST_BUS_THS 8>; - #thermal-sensor-cells = <0>; - }; - - /* codec: codec@01c22c00 { */ - /* compatible = "allwinner,sun8i-h3-codec"; */ - /* reg = <0x01c22c00 0x100>, <0x01f015c0 0x4>; */ - /* reg-names = "codec", "pr"; */ - /* interrupts = ; */ - /* clocks = <&ccu CLK_BUS_CODEC>, <&codec_clk>; */ - /* clock-names = "ahb", "codec"; */ - /* resets = <&ahb_rst 128>; */ - /* reset-names = "ahb"; */ - /* dmas = <&dma 15>, <&dma 15>; */ - /* dma-names = "rx", "tx"; */ - /* status = "disabled"; */ - /* }; */ - - }; -}; - -&pio { - emac_pins_rgmii_a: emac_rgmii@0 { - allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", - "PD7", "PD8", "PD9", "PD10", "PD12", "PD13", - "PD15", "PD16", "PD17"; - allwinner,function = "emac"; - allwinner,drive = <40>; - }; - - emac_phy_reset_pin: emac_phy_reset_pin@0 { - allwinner,pins = "PD6"; - allwinner,function = "gpio_out"; - allwinner,drive = <10>; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/h3.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/exynos5420-peach-pit.dts =================================================================== --- head/sys/boot/fdt/dts/arm/exynos5420-peach-pit.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/exynos5420-peach-pit.dts (nonexistent) @@ -1,87 +0,0 @@ -/*- - * Copyright (c) 2014 Ruslan Bukin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/include/ "exynos5420.dtsi" - -/ { - model = "Chromebook Peach Pit"; - - memory { - device_type = "memory"; - reg = < 0x20000000 0xdf000000 >; /* 3.5G */ - }; - - SOC: Exynos5@0 { - - fimd0: fimd@14400000 { - status = "okay"; - - panel-size = < 1366 768 >; - panel-hsync = < 80 32 48 >; - panel-vsync = < 14 5 3 >; - panel-clk-div = < 17 >; - panel-backlight-pin = < 25 >; - }; - - spi2: spi@12d40000 { - status = "okay"; - }; - - keyboard-controller { - compatible = "google,mkbp-keyb"; - google,key-rows = <8>; - google,key-columns = <13>; - freebsd,intr-gpio = < 21 >; - }; - - usbdrd_phy0: phy@12100000 { - vbus-supply = < 217 >; - }; - - usbdrd_phy1: phy@12500000 { - vbus-supply = < 218 >; - }; - - mmc2: dwmmc@12220000 { - status = "okay"; - num-slots = <1>; - supports-highspeed; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; - bus-frequency = <50000000>; - - slot@0 { - reg = <0>; - bus-width = <4>; - }; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/exynos5420-peach-pit.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/vybrid-cosmic.dts =================================================================== --- head/sys/boot/fdt/dts/arm/vybrid-cosmic.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/vybrid-cosmic.dts (nonexistent) @@ -1,86 +0,0 @@ -/*- - * Copyright (c) 2013-2014 Ruslan Bukin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/include/ "vybrid.dtsi" - -/ { - model = "Cosmic Board"; - - memory { - device_type = "memory"; - reg = < 0x80000000 0x10000000 >; /* 256MB RAM */ - }; - - SOC: vybrid { - serial1: serial@40028000 { - status = "okay"; - }; - - fec1: ethernet@400D1000 { - status = "okay"; - iomux_config = < 54 0x103192 - 55 0x103193 - 56 0x103191 - 57 0x103191 - 58 0x103191 - 59 0x103191 - 60 0x103192 - 61 0x103192 - 62 0x103192 - 0 0x203191 >; - }; - - esai: esai@40062000 { - status = "okay"; - }; - - edma1: edma@40098000 { - status = "okay"; - }; - - tcon0: tcon@4003D000 { - status = "okay"; - }; - - dcu0: dcu4@40058000 { - status = "okay"; - }; - - adc0: adc@4003B000 { - status = "okay"; - }; - }; - - chosen { - bootargs = "-v"; - stdin = "serial1"; - stdout = "serial1"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/vybrid-cosmic.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/hl201.dts =================================================================== --- head/sys/boot/fdt/dts/arm/hl201.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/hl201.dts (nonexistent) @@ -1,44 +0,0 @@ -/* - * Hot-e HL-201 - Warner Losh public domain - * - * $FreeBSD$ - */ -/dts-v1/; - -/* - * The following is a white lie. The HL-201 is a stripped down version of - * the SAM9G20EK board with a video output chip. - */ -#include "at91sam9g20ek_common.dtsi" - -/ { - model = "Thinlinx HL201"; - compatible = "thinlinx,hl201", "atmel,at91sam9g20ek", "atmel,at91sam9g20", "atmel,at91sam9"; - - leds { - compatible = "gpio-leds"; - - ds1 { - label = "ds1"; - gpios = <&pioA 9 0>; - linux,default-trigger = "heartbeat"; - }; - - ds5 { - label = "ds5"; - gpios = <&pioA 6 1>; - }; - }; - - /* Missing: one wire serial number, video chip */ - - aliases { - dbgu = &dbgu; - }; - - - chosen { - stdin = "dbgu"; - stdout = "dbgu"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/hl201.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/armada-385-db-ap.dts =================================================================== --- head/sys/boot/fdt/dts/arm/armada-385-db-ap.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/armada-385-db-ap.dts (nonexistent) @@ -1,275 +0,0 @@ -/* - * Device Tree file for Marvell Armada 385 Access Point Development board - * (DB-88F6820-AP) - * - * Copyright (C) 2014 Marvell - * - * Nadav Haklai - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * $FreeBSD$ - */ - -/dts-v1/; -#include "armada-385.dtsi" - -#include - -/ { - model = "Marvell Armada 385 Access Point Development Board"; - compatible = "marvell,a385-db-ap", "marvell,armada385", "marvell,armada380"; - - chosen { - stdout-path = "serial1"; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x80000000>; /* 2GB */ - }; - - soc { - ranges = ; - - internal-regs { - i2c0: i2c@11000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "okay"; - - /* - * This bus is wired to two EEPROM - * sockets, one of which holding the - * board ID used by the bootloader. - * Erasing this EEPROM's content will - * brick the board. - * Use this bus with caution. - */ - }; - - mdio@72004 { - pinctrl-names = "default"; - pinctrl-0 = <&mdio_pins>; - - phy0: ethernet-phy@1 { - reg = <1>; - }; - - phy1: ethernet-phy@4 { - reg = <4>; - }; - - phy2: ethernet-phy@6 { - reg = <6>; - }; - }; - - /* UART0 is exposed through the JP8 connector */ - uart0: serial@12000 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; - }; - - /* - * UART1 is exposed through a FTDI chip - * wired to the mini-USB connector - */ - uart1: serial@12100 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pins>; - status = "okay"; - }; - - pinctrl@18000 { - xhci0_vbus_pins: xhci0-vbus-pins { - marvell,pins = "mpp44"; - marvell,function = "gpio"; - }; - }; - - /* CON3 */ - ethernet@30000 { - status = "okay"; - phy = <&phy2>; - phy-mode = "sgmii"; - buffer-manager = <&bm>; - bm,pool-long = <1>; - bm,pool-short = <3>; - }; - - /* CON2 */ - ethernet@34000 { - status = "okay"; - phy = <&phy1>; - phy-mode = "sgmii"; - buffer-manager = <&bm>; - bm,pool-long = <2>; - bm,pool-short = <3>; - }; - - usb@58000 { - status = "okay"; - }; - - /* CON4 */ - ethernet@70000 { - pinctrl-names = "default"; - - /* - * The Reference Clock 0 is used to - * provide a clock to the PHY - */ - pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; - status = "okay"; - phy = <&phy0>; - phy-mode = "rgmii-id"; - buffer-manager = <&bm>; - bm,pool-long = <0>; - bm,pool-short = <3>; - }; - - crypto@90000 { - status = "okay"; - }; - - crypto@92000 { - status = "okay"; - }; - - bm@c8000 { - status = "okay"; - }; - - nfc: flash@d0000 { - status = "okay"; - num-cs = <1>; - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; - marvell,nand-keep-config; - marvell,nand-enable-arbiter; - nand-on-flash-bbt; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "U-Boot"; - reg = <0x00000000 0x00800000>; - read-only; - }; - - partition@800000 { - label = "uImage"; - reg = <0x00800000 0x00400000>; - read-only; - }; - - partition@c00000 { - label = "Root"; - reg = <0x00c00000 0x3f400000>; - }; - }; - }; - - usb3@f0000 { - status = "okay"; - usb-phy = <&usb3_phy>; - }; - }; - - bm-bppi { - status = "okay"; - }; - - pcie-controller { - status = "okay"; - - /* - * The three PCIe units are accessible through - * standard mini-PCIe slots on the board. - */ - pcie@1,0 { - /* Port 0, Lane 0 */ - status = "okay"; - }; - - pcie@2,0 { - /* Port 1, Lane 0 */ - status = "okay"; - }; - - pcie@3,0 { - /* Port 2, Lane 0 */ - status = "okay"; - }; - }; - }; - - usb3_phy: usb3_phy { - compatible = "usb-nop-xceiv"; - vcc-supply = <®_xhci0_vbus>; - }; - - reg_xhci0_vbus: xhci0-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&xhci0_vbus_pins>; - regulator-name = "xhci0-vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; - }; -}; - -&spi1 { - pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins>; - status = "okay"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,m25p128", "jedec,spi-nor"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <54000000>; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/armada-385-db-ap.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/rk3188-radxa.dts =================================================================== --- head/sys/boot/fdt/dts/arm/rk3188-radxa.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/rk3188-radxa.dts (nonexistent) @@ -1,63 +0,0 @@ -/*- - * Copyright (c) 2013 Ganbold Tsagaankhuu - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/include/ "rk3188.dtsi" - -/ { - model = "Radxa RadxaRock"; - - memory { - device_type = "memory"; - reg = < 0x60000000 0x80000000 >; /* 2GB RAM */ - }; - - aliases { - soc = &SOC; - }; - - SOC: rk3188 { - - uart2: serial@20064000 { - status = "okay"; - }; - - mmc@10214000 { - status = "okay"; - }; - - }; - - chosen { - bootargs = "-v"; - stdin = &uart2; - stdout = &uart2; - }; -}; - Property changes on: head/sys/boot/fdt/dts/arm/rk3188-radxa.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/pandaboard-es.dts =================================================================== --- head/sys/boot/fdt/dts/arm/pandaboard-es.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/pandaboard-es.dts (nonexistent) @@ -1,31 +0,0 @@ -/*- - * Copyright (c) 2015 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - - -#include "omap4-panda-es.dts" -#include "pandaboard-common.dtsi" Property changes on: head/sys/boot/fdt/dts/arm/pandaboard-es.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/armada-388-clearfog.dts =================================================================== --- head/sys/boot/fdt/dts/arm/armada-388-clearfog.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/armada-388-clearfog.dts (nonexistent) @@ -1,459 +0,0 @@ -/* - * Device Tree file for SolidRun Clearfog revision A1 rev 2.0 (88F6828) - * - * Copyright (C) 2015 Russell King - * - * This board is in development; the contents of this file work with - * the A1 rev 2.0 of the board, which does not represent final - * production board. Things will change, don't expect this file to - * remain compatible info the future. - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This file is distributed in the hope that it will be useful - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * $FreeBSD$ - */ - -/dts-v1/; -#include "armada-388.dtsi" -#include "armada-38x-solidrun-microsom.dtsi" - -/ { - model = "SolidRun Clearfog A1"; - compatible = "solidrun,clearfog-a1", "marvell,armada388", - "marvell,armada385", "marvell,armada380"; - - aliases { - /* So that mvebu u-boot can update the MAC addresses */ - ethernet1 = ð0; - ethernet2 = ð1; - ethernet3 = ð2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - soc { - internal-regs { - ethernet@30000 { - phy-mode = "sgmii"; - buffer-manager = <&bm>; - bm,pool-long = <2>; - bm,pool-short = <1>; - status = "okay"; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - ethernet@34000 { - phy-mode = "sgmii"; - buffer-manager = <&bm>; - bm,pool-long = <3>; - bm,pool-short = <1>; - status = "okay"; - managed = "in-band-status"; - }; - - i2c@11000 { - /* Is there anything on this? */ - clock-frequency = <100000>; - pinctrl-0 = <&i2c0_pins>; - pinctrl-names = "default"; - status = "okay"; - - /* - * PCA9655 GPIO expander, up to 1MHz clock. - * 0-CON3 CLKREQ# - * 1-CON3 PERST# - * 2-CON2 PERST# - * 3-CON3 W_DISABLE - * 4-CON2 CLKREQ# - * 5-USB3 overcurrent - * 6-USB3 power - * 7-CON2 W_DISABLE - * 8-JP4 P1 - * 9-JP4 P4 - * 10-JP4 P5 - * 11-m.2 DEVSLP - * 12-SFP_LOS - * 13-SFP_TX_FAULT - * 14-SFP_TX_DISABLE - * 15-SFP_MOD_DEF0 - */ - expander0: gpio-expander@20 { - /* - * This is how it should be: - * compatible = "onnn,pca9655", - * "nxp,pca9555"; - * but you can't do this because of - * the way I2C works. - */ - compatible = "nxp,pca9555"; - gpio-controller; - #gpio-cells = <2>; - reg = <0x20>; - - pcie1_0_clkreq { - gpio-hog; - gpios = <0 GPIO_ACTIVE_LOW>; - input; - line-name = "pcie1.0-clkreq"; - }; - pcie1_0_w_disable { - gpio-hog; - gpios = <3 GPIO_ACTIVE_LOW>; - output-low; - line-name = "pcie1.0-w-disable"; - }; - pcie2_0_clkreq { - gpio-hog; - gpios = <4 GPIO_ACTIVE_LOW>; - input; - line-name = "pcie2.0-clkreq"; - }; - pcie2_0_w_disable { - gpio-hog; - gpios = <7 GPIO_ACTIVE_LOW>; - output-low; - line-name = "pcie2.0-w-disable"; - }; - usb3_ilimit { - gpio-hog; - gpios = <5 GPIO_ACTIVE_LOW>; - input; - line-name = "usb3-current-limit"; - }; - usb3_power { - gpio-hog; - gpios = <6 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "usb3-power"; - }; - m2_devslp { - gpio-hog; - gpios = <11 GPIO_ACTIVE_HIGH>; - output-low; - line-name = "m.2 devslp"; - }; - sfp_los { - /* SFP loss of signal */ - gpio-hog; - gpios = <12 GPIO_ACTIVE_HIGH>; - input; - line-name = "sfp-los"; - }; - sfp_tx_fault { - /* SFP laser fault */ - gpio-hog; - gpios = <13 GPIO_ACTIVE_HIGH>; - input; - line-name = "sfp-tx-fault"; - }; - sfp_tx_disable { - /* SFP transmit disable */ - gpio-hog; - gpios = <14 GPIO_ACTIVE_HIGH>; - output-low; - line-name = "sfp-tx-disable"; - }; - sfp_mod_def0 { - /* SFP module present */ - gpio-hog; - gpios = <15 GPIO_ACTIVE_LOW>; - input; - line-name = "sfp-mod-def0"; - }; - }; - - /* The MCP3021 is 100kHz clock only */ - mikrobus_adc: mcp3021@4c { - compatible = "microchip,mcp3021"; - reg = <0x4c>; - }; - - /* Also something at 0x64 */ - }; - - i2c@11100 { - /* - * Routed to SFP, mikrobus, and PCIe. - * SFP limits this to 100kHz, and requires - * an AT24C01A/02/04 with address pins tied - * low, which takes addresses 0x50 and 0x51. - * Mikrobus doesn't specify beyond an I2C - * bus being present. - * PCIe uses ARP to assign addresses, or - * 0x63-0x64. - */ - clock-frequency = <100000>; - pinctrl-0 = <&clearfog_i2c1_pins>; - pinctrl-names = "default"; - status = "okay"; - }; - - pinctrl@18000 { - clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins { - marvell,pins = "mpp46"; - marvell,function = "ref"; - }; - clearfog_dsa0_pins: clearfog-dsa0-pins { - marvell,pins = "mpp23", "mpp41"; - marvell,function = "gpio"; - }; - clearfog_i2c1_pins: i2c1-pins { - /* SFP, PCIe, mSATA, mikrobus */ - marvell,pins = "mpp26", "mpp27"; - marvell,function = "i2c1"; - }; - clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins { - marvell,pins = "mpp20"; - marvell,function = "gpio"; - }; - clearfog_sdhci_pins: clearfog-sdhci-pins { - marvell,pins = "mpp21", "mpp28", - "mpp37", "mpp38", - "mpp39", "mpp40"; - marvell,function = "sd0"; - }; - clearfog_spi1_cs_pins: spi1-cs-pins { - marvell,pins = "mpp55"; - marvell,function = "spi1"; - }; - mikro_pins: mikro-pins { - /* int: mpp22 rst: mpp29 */ - marvell,pins = "mpp22", "mpp29"; - marvell,function = "gpio"; - }; - mikro_spi_pins: mikro-spi-pins { - marvell,pins = "mpp43"; - marvell,function = "spi1"; - }; - mikro_uart_pins: mikro-uart-pins { - marvell,pins = "mpp24", "mpp25"; - marvell,function = "ua1"; - }; - rear_button_pins: rear-button-pins { - marvell,pins = "mpp34"; - marvell,function = "gpio"; - }; - }; - - sata@a8000 { - /* pinctrl? */ - status = "okay"; - }; - - sata@e0000 { - /* pinctrl? */ - status = "okay"; - }; - - sdhci@d8000 { - bus-width = <4>; - cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; - no-1-8-v; - pinctrl-0 = <&clearfog_sdhci_pins - &clearfog_sdhci_cd_pins>; - pinctrl-names = "default"; - status = "okay"; - vmmc = <®_3p3v>; - wp-inverted; - }; - - serial@12100 { - /* mikrobus uart */ - pinctrl-0 = <&mikro_uart_pins>; - pinctrl-names = "default"; - status = "okay"; - }; - - usb@58000 { - /* CON3, nearest power. */ - status = "okay"; - }; - - crypto@90000 { - status = "okay"; - }; - - crypto@92000 { - status = "okay"; - }; - - usb3@f0000 { - /* CON2, nearest CPU, USB2 only. */ - status = "okay"; - }; - - usb3@f8000 { - /* CON7 */ - status = "okay"; - }; - }; - - pcie-controller { - status = "okay"; - /* - * The two PCIe units are accessible through - * the mini-PCIe connectors on the board. - */ - pcie@2,0 { - /* Port 1, Lane 0. CON3, nearest power. */ - reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>; - status = "okay"; - }; - pcie@3,0 { - /* Port 2, Lane 0. CON2, nearest CPU. */ - reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; - status = "okay"; - }; - }; - }; - - dsa@0 { - compatible = "marvell,dsa"; - dsa,ethernet = <ð1>; - dsa,mii-bus = <&mdio>; - pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>; - pinctrl-names = "default"; - #address-cells = <2>; - #size-cells = <0>; - - switch@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <4 0>; - - port@0 { - reg = <0>; - label = "lan5"; - vlangroup = <0>; - }; - - port@1 { - reg = <1>; - label = "lan4"; - vlangroup = <0>; - }; - - port@2 { - reg = <2>; - label = "lan3"; - vlangroup = <0>; - }; - - port@3 { - reg = <3>; - label = "lan2"; - vlangroup = <0>; - }; - - port@4 { - reg = <4>; - label = "lan1"; - vlangroup = <0>; - }; - - port@5 { - reg = <5>; - label = "cpu"; - vlangroup = <0>; - }; - - port@6 { - /* 88E1512 external phy */ - reg = <6>; - label = "lan6"; - vlangroup = <0>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-0 = <&rear_button_pins>; - pinctrl-names = "default"; - - button_0 { - /* The rear SW3 button */ - label = "Rear Button"; - gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; - linux,can-disable; - linux,code = ; - }; - }; -}; - -&spi1 { - /* - * We don't seem to have the W25Q32 on the - * A1 Rev 2.0 boards, so disable SPI. - * CS0: W25Q32 (doesn't appear to be present) - * CS1: - * CS2: mikrobus - */ - pinctrl-0 = <&spi1_pins - &clearfog_spi1_cs_pins - &mikro_spi_pins>; - pinctrl-names = "default"; - status = "okay"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "w25q32", "jedec,spi-nor"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <3000000>; - status = "disabled"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/armada-388-clearfog.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/annapurna-alpine.dts =================================================================== --- head/sys/boot/fdt/dts/arm/annapurna-alpine.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/annapurna-alpine.dts (nonexistent) @@ -1,268 +0,0 @@ -/*- - * Copyright (c) 2013 Ruslan Bukin - * Copyright (c) 2015 Semihalf - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "annapurna,alpine"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - serial0 = &serial0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x0>; - d-cache-line-size = <64>; // 64 bytes - i-cache-line-size = <64>; // 64 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <375000000>; - clock-frequency = <0>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x0>; - d-cache-line-size = <64>; // 64 bytes - i-cache-line-size = <64>; // 64 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <375000000>; - clock-frequency = <0>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x0>; - d-cache-line-size = <64>; // 64 bytes - i-cache-line-size = <64>; // 64 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <375000000>; - clock-frequency = <0>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x0>; - d-cache-line-size = <64>; // 64 bytes - i-cache-line-size = <64>; // 64 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <375000000>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00100000 0x7ff00000>; // 2047MB at 1MB - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0xfb000000 0x03000000>; - bus-frequency = <0>; - - MPIC: interrupt-controller { - compatible = "arm,gic"; - reg = < 0x1000 0x1000 >, /* Distributor Registers */ - < 0x2000 0x2000 >; /* CPU Interface Registers */ - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <3>; - - // In intr[2], bits[3:0] are trigger type and level flags. - // 1 = low-to-high edge triggered - // 2 = high-to-low edge triggered - // 4 = active high level-sensitive - // 8 = active low level-sensitive - // The hardware only supports active-high-level or rising-edge. - - }; - - generic_timer { - compatible = "arm,sp804"; - reg = <0x02890000 0x1000>; - interrupts = <0 9 4>; - interrupt-parent = <&MPIC>; - clock-frequency = <375000000>; - }; - - cpu_resume { - compatible = "annapurna-labs,al-cpu-resume"; - reg = <0x00ff5ec0 0x30>; - }; - - ccu { - compatible = "annapurna-labs,al-ccu"; - reg = <0x00090000 0x10000>; - io_coherency = <1>; - }; - - nb_service { - compatible = "annapurna-labs,al-nb-service"; - reg = <0x00070000 0x10000>; - interrupts = <0 32 4>, - <0 33 4>, - <0 34 4>, - <0 35 4>; - interrupt-parent = <&MPIC>; - }; - - wdt0 { - compatible = "arm,sp805", "arm,primecell"; - reg = <0x288c000 0x1000>; - interrupt-parent = <&MPIC>; - }; - - /* SerDes */ - serdes { - compatible = "annapurna-labs,al-serdes"; - reg = <0x28c0000 0x1000>; - }; - - serial0: serial@2883000 { - compatible = "ns16550"; - reg = <0x2883000 0x20>; - reg-shift = <2>; - current-speed = <115200>; - clock-frequency = <375000000>; - interrupts = <0 17 4>; - interrupt-parent = <&MPIC>; - }; - }; - - /* MSIX Configuration */ - msix: msix { - compatible = "annapurna-labs,al-msix"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xfbe00000 0x100000>; - interrupts = <0 96 1 0 159 1>; - interrupt-parent = <&MPIC>; - }; - - pcie-internal { - compatible = "annapurna-labs,al-internal-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xfbc00000 0x100000>; - interrupt-parent = <&MPIC>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0x3000 0 0 1 &MPIC 0 32 4>, // USB adapter - <0x3800 0 0 1 &MPIC 0 36 4>, - <0x4000 0 0 1 &MPIC 0 43 4>, // SATA 0 (PCIe expander) - <0x4800 0 0 1 &MPIC 0 44 1>; // SATA 1 (onboard) - msi-parent = <&msix>; - - // ranges: - // - ECAM - non prefetchable config space - // - 32 bit non prefetchable memory space - ranges = <0x00000000 0x0 0xfbc00000 0xfbc00000 0x0 0x100000 - 0x02000000 0x0 0xfe000000 0xfe000000 0x0 0x1000000>; - - bus-range = <0x00 0x00>; - }; - -// WORKAROUND: enabling PCIe controller when no card is plugged in -// leads to kernel panic because u-boot disables PCIe controller if no link -// is detected. Just be kind and compatible with Linux -/* // External PCIe Controller 0 - pcie-external0 { - compatible = "annapurna-labs,al-external-pcie"; - reg = <0xfd800000 0x00020000>; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - interrupt-parent = <&MPIC>; - interrupt-map-mask = <0x00 0 0 7>; - interrupt-map = <0x0000 0 0 1 &MPIC 0 40 4>; - - // ranges: - // Controller 0: - // - ECAM - non prefetchable config space: 2MB - // - IO - IO port space 64KB, reserve 64KB from target memory windows - // real IO address on the pci bus starts at 0x10000 - // - 32 bit non prefetchable memory space: 128MB - 64KB - - ranges = <0x00000000 0x0 0xfb600000 0xfb600000 0x0 0x00200000 - 0x01000000 0x0 0x00010000 0xe0000000 0x0 0x00010000 - 0x02000000 0x0 0xe1000000 0xe1000000 0x0 0x06f00000>; - - bus-range = <0x00 0xff>; - }; - - // External PCIe Controllers 1 - pcie-external1 { - compatible = "annapurna-labs,al-external-pcie"; - reg = <0xfd820000 0x00020000>; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - interrupt-parent = <&MPIC>; - interrupt-map-mask = <0x0 0 0 7>; - interrupt-map = <0x0000 0 0 1 &MPIC 0 41 4>; - - // ranges: - // - ECAM - non prefetchable config space: 2MB - // - IO - IO port space 64KB, reserve 64KB from target memory windows - // real IO address on the pci bus starts at 0x20000 - // - 32 bit non prefetchable memory space: 64MB - 64KB - ranges = <0x00000000 0x0 0xfb800000 0xfb800000 0x0 0x00200000 - 0x01000000 0x0 0x00020000 0xe8000000 0x0 0x00010000 - 0x02000000 0x0 0xe8100000 0xe8100000 0x0 0x02ff0000>; - - bus-range = <0x00 0xff>; - }; */ - - chosen { - stdin = "serial0"; - stdout = "serial0"; - stddbg = "serial0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/annapurna-alpine.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/meson8b.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/meson8b.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/meson8b.dtsi (nonexistent) @@ -1,79 +0,0 @@ -/*- - * Copyright (c) 2015 John Wehle - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/include/ "meson.dtsi" - -/ { - model = "Amlogic Meson8b SoC"; - compatible = "amlogic,meson8b"; - - interrupt-parent = <&gic>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a5"; - next-level-cache = <&L2>; - reg = <0x200>; - }; - - cpu@201 { - device_type = "cpu"; - compatible = "arm,cortex-a5"; - next-level-cache = <&L2>; - reg = <0x201>; - }; - - cpu@202 { - device_type = "cpu"; - compatible = "arm,cortex-a5"; - next-level-cache = <&L2>; - reg = <0x202>; - }; - - cpu@203 { - device_type = "cpu"; - compatible = "arm,cortex-a5"; - next-level-cache = <&L2>; - reg = <0x203>; - }; - }; - - clk81: clk@0 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <0>; - }; -}; - -&L2 { - interrupts = <0 143 1>; -}; Property changes on: head/sys/boot/fdt/dts/arm/meson8b.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/apalis-imx6.dts =================================================================== --- head/sys/boot/fdt/dts/arm/apalis-imx6.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/apalis-imx6.dts (nonexistent) @@ -1,102 +0,0 @@ -/* - * Copyright (c) 2014-2015 Ruslan Bukin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#include "imx6q-pinfunc.h" - -/dts-v1/; -/include/ "imx6.dtsi" - -/ { - #address-cells = <1>; - #size-cells = <1>; - - model = "Toradex Apalis i.MX6"; - compatible = "toradex,imx6q-apalis", "fsl,imx6q"; - - memory { - reg = <0x10000000 0x40000000>; /* RAM 1GB */ - }; - - SOC: soc@00000000 { - aips@02000000 { /* AIPS1 */ - iomux@020e0000 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pins_ssi>; - pins_ssi: ssi { - fsl,pins = < - MX6QDL_PAD_DISP0_DAT16__AUD5_TXC 0x130b0 - MX6QDL_PAD_DISP0_DAT17__AUD5_TXD 0x110b0 - MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x130b0 - MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 - MX6QDL_PAD_GPIO_19__CCM_CLKO1 0x130b0 - >; - }; - }; - gpio@0209c000 { status = "okay"; }; - gpio@020a0000 { status = "okay"; }; - gpio@020a4000 { status = "okay"; }; - gpio@020a8000 { status = "okay"; }; - gpio@020ac000 { status = "okay"; }; - gpio@020b0000 { status = "okay"; }; - gpio@020b4000 { status = "okay"; }; - console:serial@02020000 { status = "okay"; }; - serial@021e8000 { status = "disabled"; }; - serial@021ec000 { status = "disabled"; }; - serial@021f0000 { status = "disabled"; }; - serial@021f4000 { status = "disabled"; }; - usbphy@020c9000 { status = "okay"; }; - usbphy@020ca000 { status = "okay"; }; - ecspi@02008000 { status = "okay"; }; - ssi@02028000 { status = "okay"; }; - sdma@020ec000 { status = "okay"; }; - }; - aips@02100000 { /* AIPS2 */ - ethernet@02188000 { - status = "okay"; - phy-mode = "rgmii"; - phy-disable-preamble; - }; - usb@02184000 { status = "okay"; }; - usb@02184200 { status = "okay"; }; - usb@02184400 { status = "disabled"; }; - usb@02184600 { status = "disabled"; }; - usdhc@02190000 { status = "disabled"; }; - usdhc@02194000 { status = "okay"; }; - usdhc@02198000 { status = "disabled"; }; - usdhc@0219c000 { status = "disabled"; }; - audmux@021d8000 { status = "okay"; }; - i2c@021a0000 { status = "okay"; }; - }; - }; - - chosen { - stdin = &console; - stdout = &console; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/apalis-imx6.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/digi-ccwmx53.dts =================================================================== --- head/sys/boot/fdt/dts/arm/digi-ccwmx53.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/digi-ccwmx53.dts (nonexistent) @@ -1,153 +0,0 @@ -/* - * Copyright (c) 2012 The FreeBSD Foundation - * Copyright (c) 2013 Rui Paulo - * All rights reserved. - * - * This software was developed by Semihalf under sponsorship from - * the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Digi ConnectCore Wi-i.MX53 - * - * $FreeBSD$ - */ - -/dts-v1/; -/include/ "imx53x.dtsi" - -/ { - model = "Digi ConnectCore Wi-i.MX53"; - compatible = "digi,imx53-ccwm53", "fsl,imx53"; - - memory { - /* RAM 512M */ - reg = <0x70000000 0x10000000 - 0xB0000000 0x10000000>; - }; - - localbus@10000000 { - sata@10000000 { - status = "okay"; - }; - ipu3@1E000000 { - status = "okay"; - }; - }; - - soc@50000000 { - aips@50000000 { - spba@50000000 { - esdhc@50004000 { - clock-frequency = <216000000>; - status = "okay"; - }; - esdhc@50008000 { - clock-frequency = <216000000>; - status = "okay"; - }; - SSI2: ssi@50014000 { - status = "okay"; - }; - }; - timer@53fa0000 { - status = "okay"; - }; - /* UART1, console */ - console: serial@53fbc000 { - status = "okay"; - clock-frequency = <0>; /* won't load w/o this */ - }; - serial@53fc0000 { - status = "okay"; - clock-frequency = <0>; /* won't load w/o this */ - }; - serial@53ff0000 { - status = "okay"; - clock-frequency = <0>; /* won't load w/o this */ - }; - clock@53fd4000 { - status = "okay"; - }; - gpio@53f84000 { - status = "okay"; - }; - gpio@53f88000 { - status = "okay"; - }; - gpio@53f8c000 { - status = "okay"; - }; - gpio@53f90000 { - status = "okay"; - }; - usb@53f80000 /* OTG */ { - status = "okay"; - }; - usb@53f80200 /* Host 1 */ { - status = "okay"; - }; - wdog@53f98000 { - status = "okay"; - }; - i2c@53fec000 { - status = "okay"; - rtc@68 { - compatible = "dialog,ds9052"; - reg = <0x48>; - interrupts = <0x1 0x1 0 0>; - }; - }; - }; - aips@60000000 { - ethernet@63fec000 { - status = "okay"; - phy-mode = "rmii"; - }; - i2c@63fc4000 { - status = "okay"; - }; - i2c@63fc8000 { - status = "okay"; - }; - audmux@63fd4000 { - status = "okay"; - }; - ide@63fe0000 { - status = "okay"; - }; - serial@63f90000 { - status = "okay"; - }; - }; - }; - - aliases { - SSI2 = &SSI2; - }; - - chosen { - bootargs = "-v"; - stdin = &console; - stdout = &console; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/digi-ccwmx53.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/wzr2-g300n.dts =================================================================== --- head/sys/boot/fdt/dts/arm/wzr2-g300n.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/wzr2-g300n.dts (nonexistent) @@ -1,92 +0,0 @@ -/* - * Copyright (c) 2015 Hiroki Mori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Buffalo WZR2-G300N Device Tree Source. - * - * $FreeBSD$ - */ - -/dts-v1/; - -#include "rt1310a.dtsi" - -/ { - compatible = "WZR2-G300N", "ralink,rt1310a-soc"; - model = "WZR2-G300N"; - - flash@1f000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x1f000000 0x400000>; // 4M at 0x1f000000 - - partition@0 { - reg = <0x00000000 0x0000e000>; - label = "uboot"; - }; - partition@1 { - reg = <0x0000e000 0x00002000>; - label = "uboot_env"; - }; - partition@2 { - reg = <0x00010000 0x000f0000>; - label = "kernel"; - }; - partition@3 { - reg = <0x00100000 0x002d0000>; - label = "rootfs"; - }; - partition@4 { - reg = <0x003d0000 0x00010000>; - label = "config"; - }; - partition@5 { - reg = <0x00010000 0x003c0000>; - label = "upgrade"; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - - status { - label = "status"; - gpios = <&gpio0 4 0>; - }; - }; - - ip17x@0 { - compatible = "icplus,ip17x"; - mii-poll = <0>; - }; - -}; - -&enet0 { - local-mac-address = [ 00 1a f1 01 1f 23 ]; -}; - -&enet1 { - local-mac-address = [ 00 1a f1 01 1f 24 ]; -}; Property changes on: head/sys/boot/fdt/dts/arm/wzr2-g300n.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/exynos5250-spring.dts =================================================================== --- head/sys/boot/fdt/dts/arm/exynos5250-spring.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/exynos5250-spring.dts (nonexistent) @@ -1,78 +0,0 @@ -/*- - * Copyright (c) 2014 Ruslan Bukin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/include/ "exynos5250.dtsi" - -/ { - model = "HP Chromebook 11"; - - memory { - device_type = "memory"; - reg = < 0x40000000 0x80000000 >; /* 2G */ - }; - - SOC: Exynos5@0 { - - pad0: pad@11400000 { - status = "okay"; - }; - - fimd0: fimd@14400000 { - status = "okay"; - - panel-size = < 1366 768 >; - panel-hsync = < 80 32 48 >; - panel-vsync = < 14 5 3 >; - panel-clk-div = < 17 >; - panel-backlight-pin = < 25 >; - }; - - i2c4: i2c@12CA0000 { - status = "okay"; - }; - - keyboard-controller { - compatible = "google,mkbp-keyb"; - google,key-rows = <8>; - google,key-columns = <13>; - freebsd,intr-gpio = <146>; - }; - }; - - chosen { - stdin = &serial2; - stdout = &serial2; - }; - - hsichub@13400000 { - compatible = "smsc,usb3503"; - freebsd,reset-gpio = <172>; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/exynos5250-spring.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/versatilepb.dts =================================================================== --- head/sys/boot/fdt/dts/arm/versatilepb.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/versatilepb.dts (nonexistent) @@ -1,118 +0,0 @@ -/* - * $FreeBSD$ - */ -/dts-v1/; - -/ { - model = "ARM Versatile PB"; - #address-cells = <1>; - #size-cells = <1>; - compatible = "arm,versatile-pb"; - - amba { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - intc: interrupt-controller { - compatible = "arm,versatile-vic"; - reg = <0x10140000 0x1000>; - - interrupt-controller; - #interrupt-cells = <1>; - }; - - sic: secondary-interrupt-controller { - compatible = "arm,versatile-sic"; - reg = <0x10003000 0x28>; - - interrupt-controller; - #interrupt-cells = <1>; - }; - - uart0: uart0 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x101f1000 0x1000>; - interrupts = <12>; - interrupt-parent = <&intc>; - clock-frequency = <3000000>; - reg-shift = <2>; - }; - - uart1: uart1 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x101f2000 0x1000>; - interrupts = <13>; - interrupt-parent = <&intc>; - clock-frequency = <3000000>; - reg-shift = <2>; - }; - - uart2: uart2 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x101f3000 0x1000>; - interrupts = <14>; - interrupt-parent = <&intc>; - clock-frequency = <3000000>; - reg-shift = <2>; - }; - - timer0 { - compatible = "arm,sp804", "arm,primecell"; - reg = <0x101e2000 0x40>; - interrupts = <4>; - interrupt-parent = <&intc>; - }; - - pci0 { - - compatible = "versatile,pci"; - reg = <0x10000044 0x4 - 0x10001000 0x1000 - 0x41000000 0x01000000 - 0x42000000 0x02000000>; - }; - - net { - compatible = "smsc,lan91c111"; - reg = <0x10010000 0x10000>; - interrupts = <25>; - interrupt-parent = <&intc>; - }; - - display { - compatible = "arm,pl110", "arm,primecell"; - reg = <0x10000050 4 - 0x10120000 0x1000>; - interrupts = <16>; - interrupt-parent = <&intc>; - }; - - /* - * Cut corner here: we do not have proper interrupt - * controllers cascading so just hardwire SIC IRQ 3 - * to VIC IRQ31 - */ - kmi { - compatible = "arm,pl050", "arm,primecell"; - reg = <0x10006000 0x1000>; - interrupt-parent = <&intc>; - interrupts = <31>; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0x08000000>; /* 128MB */ - }; - - aliases { - uart0 = &uart0; - }; - - chosen { - stdin = "uart0"; - stdout = "uart0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/versatilepb.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/exynos5250.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/exynos5250.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/exynos5250.dtsi (nonexistent) @@ -1,79 +0,0 @@ -/*- - * Copyright (c) 2013-2014 Ruslan Bukin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/include/ "exynos5.dtsi" - -/ { - compatible = "samsung,exynos5250", "samsung,exynos5"; - - SOC: Exynos5@0 { - - pmu_system_controller: system-controller@10040000 { - compatible = "samsung,exynos5250-pmu"; - status = "okay"; - }; - - pad0: pad@11400000 { - compatible = "samsung,exynos5250-padctrl"; - reg = <0x11400000 0x1000>, - <0x13400000 0x1000>, - <0x10D10000 0x1000>, - <0x03860000 0x1000>; - interrupts = < 78 77 82 79 >; - interrupt-parent = <&GIC>; - }; - - serial0: serial@12C00000 { - clock-frequency = < 100000000 >; - }; - - serial1: serial@12C10000 { - clock-frequency = < 100000000 >; - }; - - serial2: serial@12C20000 { - clock-frequency = < 100000000 >; - }; - - serial3: serial@12C30000 { - clock-frequency = < 100000000 >; - }; - - usb@12110000 { - status = "okay"; - }; - - usbdrd_phy0: phy@12100000 { - status = "okay"; - }; - - xhci@12000000 { - status = "okay"; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/exynos5250.dtsi ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/socfpga_arria10_socdk_sdmmc.dts =================================================================== --- head/sys/boot/fdt/dts/arm/socfpga_arria10_socdk_sdmmc.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/socfpga_arria10_socdk_sdmmc.dts (nonexistent) @@ -1,86 +0,0 @@ -/*- - * Copyright (c) 2017 Ruslan Bukin - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; -#include "socfpga_arria10_socdk.dtsi" - -/ { - model = "Altera SOCFPGA Arria 10"; - compatible = "altr,socfpga-arria10", "altr,socfpga"; - - /* Reserve first page for secondary CPU trampoline code */ - memreserve = < 0x00000000 0x1000 >; - - soc { - /* Local timer */ - timer@ffffc600 { - clock-frequency = <200000000>; - }; - - /* Global timer */ - global_timer: timer@ffffc200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0xffffc200 0x20>; - interrupts = <1 11 0x301>; - clock-frequency = <200000000>; - }; - }; - - chosen { - stdin = "serial1"; - stdout = "serial1"; - }; -}; - -&uart1 { - clock-frequency = < 50000000 >; -}; - -&mmc { - status = "okay"; - num-slots = <1>; - cap-sd-highspeed; - broken-cd; - bus-width = <4>; - bus-frequency = <200000000>; -}; - -&i2c1 { - lcd@28 { - compatible = "newhaven,nhd-0216k3z-nsw-bbw"; - reg = <0x28>; - }; -}; - -&usb0 { - dr_mode = "host"; -}; Property changes on: head/sys/boot/fdt/dts/arm/socfpga_arria10_socdk_sdmmc.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts =================================================================== --- head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts (nonexistent) @@ -1,171 +0,0 @@ -/*- - * Copyright (c) 2016 Jared McNeill - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#include "sun8i-a83t-sinovoip-bpi-m3.dts" -#include "a83t.dtsi" - -/ { - cpus { - cpu@0 { - cpu-supply = <®_dcdc2>; - operating-points = < - /* kHz uV */ - 1200000 840000 - 1008000 840000 - 648000 840000 - 408000 840000 - >; - }; - - cpu@100 { - cpu-supply = <®_dcdc3>; - operating-points = < - /* kHz uV */ - 1200000 840000 - 1008000 840000 - 648000 840000 - 408000 840000 - >; - }; - }; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -®_ahci_5v { - gpio = <&pio 3 25 GPIO_ACTIVE_HIGH>; /* PD25 */ - status = "okay"; -}; - -&ahci_pwr_pin_a { - allwinner,pins = "PD25"; -}; - -®_usb1_vbus { - gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ - status = "okay"; -}; - -&usb1_vbus_pin_a { - allwinner,pins = "PD24"; -}; - -&usbphy { - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; -}; - -&mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_8bit_pins>; - vmmc-supply = <®_vcc3v3>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&emac { - pinctrl-names = "default"; - pinctrl-0 = <&emac_pins_rgmii_a>; - phy = <&phy1>; - phy-mode = "rgmii"; - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&emac_tx_clk { - /* EMAC transmit/receive clock delay chain values for BPI-M3 */ - tx-delay = <0x7>; - rx-delay = <0x7>; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; - status = "okay"; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; - status = "okay"; -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins_a>; - status = "okay"; -}; - -&r_rsb { - status = "okay"; - - axp81x: pmic@3a3 { - compatible = "x-powers,axp813"; - reg = <0x3a3>; - interrupt-parent = <&nmi_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - gpio-controller; - #gpio-cells = <1>; - - regulators { - reg_dcdc2: dcdc2 { - regulator-name = "dcdc2"; - }; - - reg_dcdc3: dcdc3 { - regulator-name = "dcdc3"; - }; - }; - }; -}; - -/ { - leds { - compatible = "gpio-leds"; - - green_led { - gpios = <&axp81x 0>; /* AXP PMIC GPIO0 */ - label = "green_led"; - }; - - blue_led { - gpios = <&axp81x 1>; /* AXP PMIC GPIO1 */ - label = "blue_led"; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/yyhd18-m3.dts =================================================================== --- head/sys/boot/fdt/dts/arm/yyhd18-m3.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/yyhd18-m3.dts (nonexistent) @@ -1,237 +0,0 @@ -/*- - * Copyright (c) 2015 John Wehle - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * The ordering of certain devices is significant (e.g. usb depends on - * usb-phy which depends on gpio, also the timer should appear early on - * to provide a reasonably accurate DELAY implementation). - */ - -/dts-v1/; - -/memreserve/ 0x84900000 0x00600000; /* 6MB frame buffer */ - -#include "meson3.dtsi" - -/ { - /* - * My development unit is a Yiyate Android TV Box containing - * a HD18 motherboard and an aml8726-m3 SoC ... later versions - * shipped with an aml8726-m6. Printenv in uboot shows m3-oplay - * as the boardname supplied as part of mmcargs. - */ - - model = "yiyate,hd18-m3"; - compatible = "yiyate,hd18-m3", "amlogic,meson3"; - - #address-cells = <1>; - #size-cells = <1>; - - aliases { - soc = &soc; - screen = &screen; - uart0 = &uart_AO; - }; - - memory { - device_type = "memory"; - reg = <0x80000000 0x40000000>; /* 1GB RAM */ - }; - - soc: soc { - device_type = "soc"; - bus-frequency = <0>; - - ccm@c1104140 { - compatible = "amlogic,aml8726-ccm"; - reg = <0xc1104140 20>; /* cbus 0x1050 */ - - functions = "ethernet", "i2c", "rng", "sdio", - "uart-a", "uart-b", "uart-c", - "usb-a", "usb-b"; - }; - - pinctrl: pinctrl@c11080b0 { - compatible = "amlogic,aml8726-pinctrl"; - reg = <0xc11080b0 40>, /* mux */ - <0xc11080e8 24>, /* pu/pd */ - <0xc11080e8 24>, /* pull enable */ - <0xc8100014 4>, /* ao mux */ - <0xc810002c 4>, /* ao pu/pd */ - <0xc810002c 4>; /* ao pull enable */ - - /* - * Currently only pin muxing that deviates - * from the power on default of gpio is - * specified here. - */ - - pinctrl-names = "default"; - pinctrl-0 = <&pins_uartao &pins_ethernet &pins_hdmi>; - - pins_ethernet: ethernet { - amlogic,pins = "clk_out", "tx_en", - "tx_d0", "tx_d1", - "crs_dv", "rx_err", - "rx_d0", "rx_d1", - "mdc", "mdio"; - amlogic,function = "ethernet"; - }; - - pins_hdmi: hdmi { - amlogic,pins = "cec", "hpd", - "scl", "sda"; - amlogic,function = "hdmi"; - }; - - pins_sdio_b: sdio_b { - amlogic,pins = "clk", "cmd", - "d0", "d1", - "d2", "d3"; - amlogic,function = "sdio-b"; - }; - - pins_uartao: uartao { - amlogic,pins = "tx", "rx"; - amlogic,function = "uart-ao"; - }; - }; - - rtc@c8100740 { - compatible = "amlogic,aml8726-rtc"; - reg = <0xc8100740 20>; /* aobus 0x1d0 */ - interrupts = <0 72 1>; /* AM_IRQ2(8) */ - }; - - clkmsr: clkmsr@c1108758 { - compatible = "amlogic,aml8726-clkmsr"; - reg = <0xc1108758 16>; /* cbus 0x21d6 */ - - clocks = <&clk81>; - }; - - gpio5: gpio@c110806c { - compatible = "amlogic,aml8726-gpio"; - reg = <0xc110806c 4>, /* oen cbus 0x201b */ - <0xc1108070 4>, /* out */ - <0xc1108074 4>; /* in */ - - gpio-controller; - #gpio-cells = <1>; - pin-count = <32>; - }; - - mmc@c1108c20 { - compatible = "amlogic,aml8726-mmc"; - reg = <0xc1108c20 32>; /* cbus 0x2308 */ - interrupts = <0 28 1>; /* AM_IRQ0(28) */ - - clocks = <&clk81>; - - pinctrl-names = "default"; - pinctrl-0 = <&pins_sdio_b>; - - mmc-voltages = "3.3"; - - mmc-pwr-en = <&gpio5 31 0>; /* card_8 */ - ins-detect = <&gpio5 29 0>; /* card_6 */ - }; - - rng@c1108100 { - compatible = "amlogic,aml8726-rng"; - reg = <0xc1108100 8>; /* cbus 0x2040 */ - }; - - usb-phy@c1108400 { - /* usb-a and usb-b phy */ - compatible = "amlogic,aml8726-m3-usb-phy"; - reg = <0xc1108400 32>; /* cbus 0x2100 */ - }; - - usb@c9040000 { - /* usb-a */ - compatible = "synopsys,designware-hs-otg2"; - reg = <0xc9040000 0x40000>; /* ahbbus 0x40000*/ - interrupts = <0 30 4>; /* AM_IRQ0(30) */ - #address-cells = <1>; - #size-cells = <0>; - }; - - usb@c90c0000 { - /* usb-b */ - compatible = "synopsys,designware-hs-otg2"; - reg = <0xc90c0000 0x40000>; /* ahbbus 0xc0000 */ - interrupts = <0 31 4>; /* AM_IRQ0(31) */ - #address-cells = <1>; - #size-cells = <0>; - - dr_mode = "host"; - }; - - eth@c9410000 { - /* ethernet */ - compatible = "snps,dwmac"; - reg = <0xc9410000 0x2000>; /* ahbbus 0x410000 */ - interrupts = <0 8 1>; /* AM_IRQ0(8) */ - #address-cells = <1>; - #size-cells = <0>; - }; - - screen: fb@c8001324 { - device_type = "display"; - compatible = "amlogic,aml8726-fb"; - reg = <0xc8001324 12>, /* CANVAS */ - <0xc1106800 1024>, /* VIU */ - <0xc1107400 1024>; /* VPP */ - interrupts = <0 2 1>, /* AM_IRQ0(2) */ - <0 3 1>, /* AM_IRQ0(3) */ - <0 12 1>, /* AM_IRQ0(12) */ - <0 13 1>; /* AM_IRQ0(13) */ - - address = <0x84900000>; /* match memreserve */ - width = <720>; - height = <480>; - depth = <24>; - linebytes = <2160>; - }; - }; - - chosen { - stdin = "uart0"; - stdout = "uart0"; - }; -}; - -&clk81 { - clock-frequency = <0>; -}; - -&uart_AO { - status = "okay"; - current-speed = <115200>; -}; Property changes on: head/sys/boot/fdt/dts/arm/yyhd18-m3.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/vybrid-quartz.dts =================================================================== --- head/sys/boot/fdt/dts/arm/vybrid-quartz.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/vybrid-quartz.dts (nonexistent) @@ -1,115 +0,0 @@ -/*- - * Copyright (c) 2014 Ruslan Bukin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/include/ "vybrid.dtsi" - -/ { - model = "Device Solutions Quartz Module"; - - memory { - device_type = "memory"; - reg = < 0x80000000 0x10000000 >; /* 256MB RAM */ - }; - - SOC: vybrid { - serial0: serial@40027000 { - status = "okay"; - }; - - fec1: ethernet@400D1000 { - status = "okay"; - iomux_config = < 54 0x103192 - 55 0x103193 - 56 0x103191 - 57 0x103191 - 58 0x103191 - 59 0x103191 - 60 0x103192 - 61 0x103192 - 62 0x103192 - 0 0x203191 >; - }; - - edma1: edma@40098000 { - status = "okay"; - }; - - dcu0: dcu4@40058000 { - status = "okay"; - - panel-size = < 800 480 >; - panel-hsync = < 40 48 40 >; - panel-vsync = < 29 3 13 >; - panel-clk-div = < 17 >; - panel-backlight-pin = < 25 >; - - iomux_config = < 105 0x1001c4 /* hsync */ - 106 0x1001c4 /* vsync */ - 107 0x1001e0 /* pclk */ - 108 0x1001e0 - 109 0x1001be /* de */ - 110 0x1001e0 /* r0 */ - 111 0x1001e0 - 112 0x1001e0 - 113 0x1001e0 - 114 0x1001e0 - 115 0x1001e0 - 116 0x1001e0 - 117 0x1001e0 - 118 0x1001e0 /* g0 */ - 119 0x1001e0 - 120 0x1001e0 - 121 0x1001e0 - 122 0x1001e0 - 123 0x1001e0 - 124 0x1001e0 - 125 0x1001e0 - 126 0x1001e0 /* b0 */ - 127 0x1001e0 - 128 0x1001e0 - 129 0x1001e0 - 130 0x1001e0 - 131 0x1001e0 - 132 0x1001e0 - 133 0x1001e0 - 25 0x0001be >; /* led */ - }; - - tcon0: tcon@4003D000 { - status = "okay"; - }; - }; - - chosen { - bootargs = "-v"; - stdin = "serial0"; - stdout = "serial0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/vybrid-quartz.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/vybrid.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/vybrid.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/vybrid.dtsi (nonexistent) @@ -1,497 +0,0 @@ -/*- - * Copyright (c) 2013-2014 Ruslan Bukin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/ { - model = "Freescale Vybrid Family"; - compatible = "freescale,vybrid", "fsl,mvf"; - #address-cells = <1>; - #size-cells = <1>; - - interrupt-parent = <&GIC>; - - aliases { - soc = &SOC; - serial0 = &serial0; - serial1 = &serial1; - sai0 = &sai0; - sai1 = &sai1; - sai2 = &sai2; - sai3 = &sai3; - esai = &esai; - adc0 = &adc0; - adc1 = &adc1; - edma0 = &edma0; - edma1 = &edma1; - src = &SRC; - }; - - SOC: vybrid { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges; - bus-frequency = <0>; - - SRC: src@4006E000 { - compatible = "fsl,mvf600-src"; - reg = <0x4006E000 0x100>; - }; - - mscm@40001000 { - compatible = "fsl,mvf600-mscm"; - reg = <0x40001000 0x1000>; - }; - - GIC: interrupt-controller@01c81000 { - compatible = "arm,gic"; - reg = <0x40003000 0x1000>, /* Distributor Registers */ - <0x40002100 0x100>; /* CPU Interface Registers */ - interrupt-controller; - #interrupt-cells = <1>; - }; - - anadig@40050000 { - compatible = "fsl,mvf600-anadig"; - reg = <0x40050000 0x300>; - }; - - ccm@4006b000 { - compatible = "fsl,mvf600-ccm"; - reg = <0x4006b000 0x1000>; - clock_names = "pll4"; - }; - - mp_tmr@40002100 { - compatible = "arm,mpcore-timers"; - clock-frequency = <133000000>; - #address-cells = <1>; - #size-cells = <0>; - reg = < 0x40002200 0x100 >, /* Global Timer Registers */ - < 0x40002600 0x100 >; /* Private Timer Registers */ - interrupts = < 27 29 >; - interrupt-parent = < &GIC >; - }; - - dmamux@40024000 { - compatible = "fsl,mvf600-dmamux"; - reg = <0x40024000 0x100>, - <0x40025000 0x100>, - <0x400A1000 0x100>, - <0x400A2000 0x100>; - }; - - edma0: edma@40018000 { - compatible = "fsl,mvf600-edma"; - reg = <0x40018000 0x1000>, - <0x40019000 0x1000>; /* TCD */ - interrupts = < 40 41 >; - interrupt-parent = <&GIC>; - device-id = < 0 >; - status = "disabled"; - }; - - edma1: edma@40098000 { - compatible = "fsl,mvf600-edma"; - reg = <0x40098000 0x1000>, - <0x40099000 0x1000>; /* TCD */ - interrupts = < 42 43 >; - interrupt-parent = <&GIC>; - device-id = < 1 >; - status = "disabled"; - }; - - pit@40037000 { - compatible = "fsl,mvf600-pit"; - reg = <0x40037000 0x1000>; - interrupts = < 71 >; - interrupt-parent = <&GIC>; - clock-frequency = < 24000000 >; - }; - - lptmr@40040000 { - compatible = "fsl,mvf600-lptmr"; - reg = <0x40040000 0x1000>; - interrupts = < 72 >; - interrupt-parent = <&GIC>; - clock-frequency = < 24000000 >; - }; - - iomuxc@40048000 { - compatible = "fsl,mvf600-iomuxc"; - reg = <0x40048000 0x1000>; - }; - - port@40049000 { - compatible = "fsl,mvf600-port"; - reg = <0x40049000 0x5000>; - interrupts = < 139 140 141 142 143 >; - interrupt-parent = <&GIC>; - }; - - gpio@400FF000 { - compatible = "fsl,mvf600-gpio"; - reg = <0x400FF000 0x200>; - #gpio-cells = <3>; - gpio-controller; - }; - - nand@400E0000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mvf600-nand"; - reg = <0x400E0000 0x10000>; - interrupts = < 115 >; - interrupt-parent = <&GIC>; - clock_names = "nand"; - status = "disabled"; - - partition@40000 { - reg = <0x40000 0x200000>; /* 2MB */ - label = "u-boot"; - read-only; - }; - - partition@240000 { - reg = <0x240000 0x200000>; /* 2MB */ - label = "test"; - }; - - partition@440000 { - reg = <0x440000 0xa00000>; /* 10MB */ - label = "kernel"; - }; - - partition@e40000 { - reg = <0xe40000 0x1e000000>; /* 480MB */ - label = "root"; - }; - }; - - sdhci0: sdhci@400B1000 { - compatible = "fsl,mvf600-sdhci"; - reg = <0x400B1000 0x1000>; - interrupts = < 59 >; - interrupt-parent = <&GIC>; - clock-frequency = <50000000>; - status = "disabled"; - clock_names = "esdhc0"; - }; - - sdhci1: sdhci@400B2000 { - compatible = "fsl,mvf600-sdhci"; - reg = <0x400B2000 0x1000>; - interrupts = < 60 >; - interrupt-parent = <&GIC>; - clock-frequency = <50000000>; - status = "disabled"; - clock_names = "esdhc1"; - iomux_config = < 14 0x500060 - 15 0x500060 - 16 0x500060 - 17 0x500060 - 18 0x500060 - 19 0x500060 >; - }; - - serial0: serial@40027000 { - compatible = "fsl,mvf600-uart"; - reg = <0x40027000 0x1000>; - interrupts = <93>; - interrupt-parent = <&GIC>; - current-speed = <115200>; - clock-frequency = < 24000000 >; - status = "disabled"; - }; - - serial1: serial@40028000 { - compatible = "fsl,mvf600-uart"; - reg = <0x40028000 0x1000>; - interrupts = <94>; - interrupt-parent = <&GIC>; - current-speed = <115200>; - clock-frequency = < 24000000 >; - status = "disabled"; - }; - - usb@40034000 { - compatible = "fsl,mvf600-usb-ehci", "usb-ehci"; - reg = < 0x40034000 0x1000 >, /* ehci */ - < 0x40035000 0x1000 >, /* usbc */ - < 0x40050800 0x100 >; /* phy */ - interrupts = < 107 >; - interrupt-parent = <&GIC>; - iomux_config = < 134 0x0001be - 7 0x200060 >; - }; - - usb@400b4000 { - compatible = "fsl,mvf600-usb-ehci", "usb-ehci"; - reg = < 0x400b4000 0x1000 >, /* ehci */ - < 0x400b5000 0x1000 >, /* usbc */ - < 0x40050C00 0x100 >; /* phy */ - interrupts = < 108 >; - interrupt-parent = <&GIC>; - iomux_config = < 134 0x0001be - 7 0x200060 >; - }; - - fec0: ethernet@400D0000 { - compatible = "fsl,mvf600-fec"; - reg = <0x400D0000 0x1000>; - interrupts = < 110 >; - interrupt-parent = <&GIC>; - phy-mode = "rmii"; - phy-disable-preamble; - status = "disabled"; - clock_names = "enet"; - iomux_config = < 45 0x100061 - 46 0x100061 - 47 0x100061 - 48 0x100060 - 49 0x100060 - 50 0x100060 - 51 0x100060 - 52 0x100060 - 53 0x100060 >; - }; - - fec1: ethernet@400D1000 { - compatible = "fsl,mvf600-fec"; - reg = <0x400D1000 0x1000>; - interrupts = < 111 >; - interrupt-parent = <&GIC>; - phy-mode = "rmii"; - phy-disable-preamble; - status = "disabled"; - clock_names = "enet"; - iomux_config = < 54 0x103192 - 55 0x103193 - 56 0x103191 - 57 0x103191 - 58 0x103191 - 59 0x103191 - 60 0x103192 - 61 0x103192 - 62 0x103192 >; - }; - - sai0: sai@4002F000 { - compatible = "fsl,mvf600-sai"; - reg = <0x4002F000 0x1000>; - interrupts = < 116 >; - interrupt-parent = <&GIC>; - status = "disabled"; - }; - - sai1: sai@40030000 { - compatible = "fsl,mvf600-sai"; - reg = <0x40030000 0x1000>; - interrupts = < 117 >; - interrupt-parent = <&GIC>; - status = "disabled"; - }; - - sai2: sai@40031000 { - compatible = "fsl,mvf600-sai"; - reg = <0x40031000 0x1000>; - interrupts = < 118 >; - interrupt-parent = <&GIC>; - status = "disabled"; - }; - - sai3: sai@40032000 { - compatible = "fsl,mvf600-sai"; - reg = <0x40032000 0x1000>; - interrupts = < 119 >; - interrupt-parent = <&GIC>; - status = "disabled"; - edma-controller = <&edma1>; - edma-src-receive = < 8 >; - edma-src-transmit = < 9 >; - edma-mux-group = < 1 >; - clock_names = "sai3", "cko1"; - iomux_config = < 16 0x200060 - 19 0x200060 - 21 0x200060 - 40 0x400061 >; /* CKO1 */ - }; - - esai: esai@40062000 { - compatible = "fsl,mvf600-esai"; - reg = <0x40062000 0x1000>; - interrupts = < 120 >; - interrupt-parent = <&GIC>; - status = "disabled"; - clock_names = "esai"; - iomux_config = < 45 0x400061 - 46 0x400061 - 47 0x400061 - 48 0x400060 - 49 0x400060 - 50 0x400060 - 51 0x400060 - 52 0x400060 - 78 0x3038df - 40 0x400061 >; - }; - - spi0: spi@4002C000 { - compatible = "fsl,mvf600-spi"; - reg = <0x4002C000 0x1000>; - interrupts = < 99 >; - interrupt-parent = <&GIC>; - status = "disabled"; - iomux_config = < 40 0x100061 - 41 0x100061 - 42 0x100060 - 43 0x100060 - 44 0x100061 >; - }; - - spi1: spi@4002D000 { - compatible = "fsl,mvf600-spi"; - reg = <0x4002D000 0x1000>; - interrupts = < 100 >; - interrupt-parent = <&GIC>; - status = "disabled"; - }; - - spi2: spi@400AC000 { - compatible = "fsl,mvf600-spi"; - reg = <0x400AC000 0x1000>; - interrupts = < 101 >; - interrupt-parent = <&GIC>; - status = "disabled"; - }; - - spi3: spi@400AD000 { - compatible = "fsl,mvf600-spi"; - reg = <0x400AD000 0x1000>; - interrupts = < 102 >; - interrupt-parent = <&GIC>; - status = "disabled"; - }; - - i2c0: i2c@40066000 { - compatible = "fsl,mvf600-i2c"; - reg = <0x40066000 0x1000>; - interrupts = < 103 >; - interrupt-parent = <&GIC>; - status = "disabled"; - clock_names = "ipg"; - iomux_config = < 36 0x2034d3 - 37 0x2034d3 - 207 0x1 - 208 0x1 >; - }; - - i2c1: i2c@40067000 { - compatible = "fsl,mvf600-i2c"; - reg = <0x40067000 0x1000>; - interrupts = < 104 >; - interrupt-parent = <&GIC>; - status = "disabled"; - }; - - i2c2: i2c@400E6000 { - compatible = "fsl,mvf600-i2c"; - reg = <0x400E6000 0x1000>; - interrupts = < 105 >; - interrupt-parent = <&GIC>; - status = "disabled"; - }; - - i2c3: i2c@400E7000 { - compatible = "fsl,mvf600-i2c"; - reg = <0x400E7000 0x1000>; - interrupts = < 106 >; - interrupt-parent = <&GIC>; - status = "disabled"; - }; - - adc0: adc@4003B000 { - compatible = "fsl,mvf600-adc"; - reg = <0x4003B000 0x1000>; - interrupts = < 85 >; - interrupt-parent = <&GIC>; - status = "disabled"; - }; - - adc1: adc@400BB000 { - compatible = "fsl,mvf600-adc"; - reg = <0x400BB000 0x1000>; - interrupts = < 86 >; - interrupt-parent = <&GIC>; - status = "disabled"; - }; - - tcon0: tcon@4003D000 { - compatible = "fsl,mvf600-tcon"; - reg = <0x4003D000 0x1000>; - status = "disabled"; - }; - - dcu0: dcu4@40058000 { - compatible = "fsl,mvf600-dcu4"; - reg = <0x40058000 0x7000>; - interrupts = < 62 >; - interrupt-parent = <&GIC>; - status = "disabled"; - clock_names = "dcu0"; - iomux_config = < 105 0x100044 - 106 0x100044 - 107 0x100060 - 108 0x100060 - 109 0x100060 - 110 0x100060 - 111 0x100060 - 112 0x100060 - 113 0x100060 - 114 0x100060 - 115 0x100060 - 116 0x100060 - 117 0x100060 - 118 0x100060 - 119 0x100060 - 120 0x100060 - 121 0x100060 - 122 0x100060 - 123 0x100060 - 124 0x100060 - 125 0x100060 - 126 0x100060 - 127 0x100060 - 128 0x100060 - 129 0x100060 - 130 0x100060 - 131 0x100060 - 132 0x100060 - 133 0x100060 >; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/vybrid.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/dreamplug-1001N.dts =================================================================== --- head/sys/boot/fdt/dts/arm/dreamplug-1001N.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/dreamplug-1001N.dts (nonexistent) @@ -1,341 +0,0 @@ -/* - * Copyright (c) 2013 Ian Lepore - * Copyright (c) 2010 The FreeBSD Foundation - * All rights reserved. - * - * This software substantially based on work developed by Semihalf - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * GlobalScale Technologies DreamPlug Device Tree Source. - * - * This source is for version 10 revision 01 units with NAND flash. - * These units are marked "1001N" on the serial number label. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "GlobalScale Technologies Dreamplug v1001N"; - compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - mpp = &MPP; - serial0 = &serial0; - serial1 = &serial1; - soc = &SOC; - sram = &SRAM; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,88FR131"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - - }; - - memory { - device_type = "memory"; - reg = <0x0 0x20000000>; // 512M at 0x0 - }; - - localbus@0 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "mrvl,lbc"; - bank-count = <1>; - - /* This reflects CPU decode windows setup. */ - ranges = <0x0 0x2f 0xf9300000 0x00100000>; - - nand@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "mrvl,nfc"; - reg = <0x0 0x0 0x00100000>; - bank-width = <2>; - device-width = <1>; - - // Slice info reported by builtin linux when it boots... - //[ 11.161328] 0x00000000-0x00100000 : "u-boot" - //[ 11.167431] 0x00100000-0x00500000 : "uImage" - //[ 11.173471] 0x00500000-0x20000000 : "root" - - slice@0 { - reg = <0x0 0x100000>; - label = "u-boot"; - read-only; - }; - - slice@200000 { - reg = <0x100000 0x40000>; - label = "uImage"; - }; - - slice@500000 { - reg = <0x500000 0x1FB00000>; - label = "root"; - }; - }; - }; - - SOC: soc88f6281@f1000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0xf1000000 0x00100000>; - bus-frequency = <0>; - - PIC: pic@20200 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x20200 0x3c>; - compatible = "mrvl,pic"; - }; - - timer@20300 { - compatible = "mrvl,timer"; - reg = <0x20300 0x30>; - interrupts = <1>; - interrupt-parent = <&PIC>; - mrvl,has-wdt; - }; - - MPP: mpp@10000 { - #pin-cells = <2>; - compatible = "mrvl,mpp"; - reg = <0x10000 0x34>; - pin-count = <50>; - pin-map = < - 0 1 /* MPP[ 0]: NF_IO[2] */ - 1 1 /* MPP[ 1]: NF_IO[3] */ - 2 1 /* MPP[ 2]: NF_IO[4] */ - 3 1 /* MPP[ 3]: NF_IO[5] */ - 4 1 /* MPP[ 4]: NF_IO[6] */ - 5 1 /* MPP[ 5]: NF_IO[7] */ - 6 1 /* MPP[ 6]: SYSRST_OUTn */ - 7 0 /* MPP[ 7]: GPO[7] */ - 8 1 /* MPP[ 8]: TW_SDA */ - 9 1 /* MPP[ 9]: TW_SCK */ - 10 3 /* MPP[10]: UA0_TXD */ - 11 3 /* MPP[11]: US0_RXD */ - 12 1 /* MPP[12]: SD_CLK */ - 13 1 /* MPP[13]: SD_CMD */ - 14 1 /* MPP[14]: SD_D[0] */ - 15 1 /* MPP[15]: SD_D[1] */ - 16 1 /* MPP[16]: SD_D[2] */ - 17 1 /* MPP[17]: SD_D[3] */ - 18 1 /* MPP[18]: NF_IO[0] */ - 19 1 /* MPP[19]: NF_IO[1] */ - 20 3 /* MPP[20]: GE1[ 0] */ - 21 3 /* MPP[21]: GE1[ 1] */ - 22 3 /* MPP[22]: GE1[ 2] */ - 23 3 /* MPP[23]: GE1[ 3] */ - 24 3 /* MPP[24]: GE1[ 4] */ - 25 3 /* MPP[25]: GE1[ 5] */ - 26 3 /* MPP[26]: GE1[ 6] */ - 27 3 /* MPP[27]: GE1[ 7] */ - 28 3 /* MPP[28]: GE1[ 8] */ - 29 3 /* MPP[29]: GE1[ 9] */ - 30 3 /* MPP[30]: GE1[10] */ - 31 3 /* MPP[31]: GE1[11] */ - 32 3 /* MPP[32]: GE1[12] */ - 33 3 /* MPP[33]: GE1[13] */ - 34 3 /* MPP[34]: GE1[14] */ - 35 3 /* MPP[35]: GE1[15] */ - 36 0 /* MPP[36]: GPIO[36] */ - 37 0 /* MPP[37]: GPIO[37] */ - 38 0 /* MPP[38]: GPIO[38] */ - 39 0 /* MPP[39]: GPIO[39] */ - 40 2 /* MPP[40]: TDM_SPI_SCK */ - 41 2 /* MPP[41]: TDM_SPI_MISO */ - 42 2 /* MPP[42]: TDM_SPI_MOSI */ - 43 0 /* MPP[43]: GPIO[43] */ - 44 0 /* MPP[44]: GPIO[44] */ - 45 0 /* MPP[45]: GPIO[45] */ - 46 0 /* MPP[46]: GPIO[46] */ - 47 0 /* MPP[47]: GPIO[47] */ - 48 0 /* MPP[48]: GPIO[48] */ - 49 0 /* MPP[49]: GPIO[49] */ - >; - }; - - GPIO: gpio@10100 { - #gpio-cells = <3>; - compatible = "mrvl,gpio"; - reg = <0x10100 0x20>; - gpio-controller; - interrupts = <35 36 37 38 39 40 41>; - interrupt-parent = <&PIC>; - pin-count = <50>; - }; - - gpioled@0 { - compatible = "mrvl,gpioled"; - - gpios = <&GPIO 47 2 0 /* GPIO[47] BT LED: OUT */ - &GPIO 48 2 0 /* GPIO[48] WLAN LED: OUT */ - &GPIO 49 2 0>; /* GPIO[49] WLAN AP LED: OUT */ - }; - - rtc@10300 { - compatible = "mrvl,rtc"; - reg = <0x10300 0x08>; - }; - - twsi@11000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,twsi"; - reg = <0x11000 0x20>; - interrupts = <43>; - interrupt-parent = <&PIC>; - }; - - enet0: ethernet@72000 { - #address-cells = <1>; - #size-cells = <1>; - model = "V2"; - compatible = "mrvl,ge"; - reg = <0x72000 0x2000>; - ranges = <0x0 0x72000 0x2000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <12 13 14 11 46>; - interrupt-parent = <&PIC>; - phy-handle = <&phy0>; - - mdio@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "mrvl,mdio"; - - phy0: ethernet-phy@0 { - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - reg = <0x1>; - }; - }; - }; - - enet1: ethernet@76000 { - #address-cells = <1>; - #size-cells = <1>; - model = "V2"; - compatible = "mrvl,ge"; - reg = <0x76000 0x02000>; - ranges = <0x0 0x76000 0x2000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <16 17 18 15 47>; - interrupt-parent = <&PIC>; - phy-handle = <&phy1>; - }; - - serial0: serial@12000 { - compatible = "ns16550"; - reg = <0x12000 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <33>; - interrupt-parent = <&PIC>; - }; - - serial1: serial@12100 { - compatible = "ns16550"; - reg = <0x12100 0x20>; - reg-shift = <2>; - clock-frequency = <0>; - interrupts = <34>; - interrupt-parent = <&PIC>; - }; - - crypto@30000 { - compatible = "mrvl,cesa"; - reg = <0x30000 0x1000 /* tdma base reg chan 0 */ - 0x3D000 0x1000>; /* cesa base reg chan 0 */ - interrupts = <22>; - interrupt-parent = <&PIC>; - - sram-handle = <&SRAM>; - }; - - usb@50000 { - compatible = "mrvl,usb-ehci", "usb-ehci"; - reg = <0x50000 0x1000>; - interrupts = <48 19>; - interrupt-parent = <&PIC>; - }; - - xor@60000 { - compatible = "mrvl,xor"; - reg = <0x60000 0x1000>; - interrupts = <5 6 7 8>; - interrupt-parent = <&PIC>; - }; - - sata@80000 { - compatible = "mrvl,sata"; - reg = <0x80000 0x6000>; - interrupts = <21>; - interrupt-parent = <&PIC>; - }; - - sdio@90000 { - compatible = "mrvl,sdio"; - reg = <0x90000 0x134>; - interrupts = <28>; - interrupt-parent = <&PIC>; - }; - }; - - SRAM: sram@fd000000 { - compatible = "mrvl,cesa-sram"; - reg = <0xfd000000 0x00100000>; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; - -}; Property changes on: head/sys/boot/fdt/dts/arm/dreamplug-1001N.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/sun7i-a20-hdmi.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/sun7i-a20-hdmi.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/sun7i-a20-hdmi.dtsi (nonexistent) @@ -1,97 +0,0 @@ -/*- - * Copyright (c) 2016 Jared McNeill - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/ { - clocks { - hdmi_clk: clk@01c20150 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-hdmi-clk"; - reg = <0x01c20150 0x4>; - clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; - clock-output-names = "hdmi"; - }; - - lcd0_ch0_clk: clk@01c20118 { - #clock-cells = <0>; - #reset-cells = <0>; - compatible = "allwinner,sun4i-a10-lcd-ch0-clk"; - reg = <0x01c20118 0x4>; - clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll6 2>; - clock-output-names = "lcd0_ch0"; - }; - - lcd0_ch1_clk: clk@01c2012c { - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-lcd-ch1-clk"; - reg = <0x01c2012c 0x4>; - clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; - clock-output-names = "lcd0_ch1_sclk1", - "lcd0_ch1_sclk2"; - }; - - de_be0_clk: clk@01c20104 { - #clock-cells = <0>; - #reset-cells = <0>; - compatible = "allwinner,sun4i-a10-de-be-clk"; - reg = <0x01c20104 0x4>; - clocks = <&pll3>, <&pll7>, <&pll5 1>; - clock-output-names = "de_be0"; - }; - }; - - soc@01c00000 { - hdmi: hdmi@01c16000 { - compatible = "allwinner,sun7i-a20-hdmi"; - reg = <0x01c16000 0x1000>; - clocks = <&ahb_gates 43>, <&hdmi_clk>, - <&lcd0_ch1_clk 1>; - clock-names = "ahb", "hdmi", - "lcd"; - status = "disabled"; - }; - - hdmiaudio { - compatible = "allwinner,sun7i-a20-hdmiaudio"; - status = "disabled"; - }; - - fb: fb@01e60000 { - compatible = "allwinner,sun7i-a20-fb"; - reg = <0x01e60000 0x10000>, /* DEBE0 */ - <0x01c0c000 0x1000>; /* LCD0 */ - clocks = <&ahb_gates 44>, <&dram_gates 26>, - <&de_be0_clk>, <&ahb_gates 36>, - <&lcd0_ch1_clk 0>, <&lcd0_ch1_clk 1>; - clock-names = "ahb_de_be", "dram_de_be", - "de_be", "ahb_lcd", - "lcd_ch1_sclk1", "lcd_ch1_sclk2"; - resets = <&de_be0_clk>, <&lcd0_ch0_clk>; - reset-names = "de_be", "lcd"; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm/sun7i-a20-hdmi.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/meson3.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/meson3.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/meson3.dtsi (nonexistent) @@ -1,77 +0,0 @@ -/*- - * Copyright (c) 2015 John Wehle - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * The basic single core aml8726 (aka meson) uses an Amlogic interrupt - * controller, however meson.dtsi specifies GIC (which is present on - * the multicore aml8726) so we need to override things here. - */ - -/include/ "meson.dtsi" - -/ { - model = "Amlogic Meson3 SoC"; - compatible = "amlogic,meson3"; - - interrupt-parent = <&pic>; - - pic: pic@c1109a40 { - device_type = "interrupt-controller"; - compatible = "amlogic,aml8726-pic"; - reg = <0xc1109a40 128>; /* cbus 0x2690 */ - - interrupt-controller; - #interrupt-cells = <3>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0x200>; - }; - }; - - clk81: clk@0 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <0>; - }; -}; - -&gic { - status = "disabled"; -}; - -&L2 { - interrupts = <0 61 1>; -}; Property changes on: head/sys/boot/fdt/dts/arm/meson3.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/ufw.dts =================================================================== --- head/sys/boot/fdt/dts/arm/ufw.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm/ufw.dts (nonexistent) @@ -1,319 +0,0 @@ -/*- - * Copyright (c) 2016, 2017 Rubicon Communications, LLC (Netgate) - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -#include "am33xx.dtsi" - -/ { - model = "AM335x uFW"; - compatible = "ti,am335x-ufw", "ti,am335x-ubmc", "ti,am33xx"; - - memory { - device_type = "memory"; - reg = <0x80000000 0x10000000>; /* 256 MB */ - }; - - vmmcsd_fixed: fixedregulator@0 { - compatible = "regulator-fixed"; - regulator-name = "vmmcsd_fixed"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; -}; - -&am33xx_pinmux { - pinctrl-names = "default"; - pinctrl-0 = <&clkout2_pin>; - - i2c0_pins: pinmux_i2c0_pins { - pinctrl-single,pins = < - AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ - >; - }; - - i2c1_pins: pinmux_i2c1_pins { - pinctrl-single,pins = < - AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_ctsn.i2c1_sda */ - AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_rtsn.i2c1_scl */ - >; - }; - - uart0_pins: pinmux_uart0_pins { - pinctrl-single,pins = < - AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ - AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ - >; - }; - - clkout2_pin: pinmux_clkout2_pin { - pinctrl-single,pins = < - AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ - >; - }; - - cpsw_default: cpsw_default { - pinctrl-single,pins = < - /* Slave 1 */ - AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii_1_txen */ - AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxdv.rgmii_1_rxdv */ - AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii_1_txd3 */ - AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii_1_txd2 */ - AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii_1_txd1 */ - AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii_1_txd0 */ - AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii_1_txclk */ - AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxclk.rgmii_1_rxclk */ - AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd3.rgmii_1_rxd3 */ - AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd2.rgmii_1_rxd2 */ - AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd1.rgmii_1_rxd1 */ - AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd0.rgmii_1_rxd0 */ - - /* Slave 2 */ - AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a0.rgmii_2_txen */ - AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a1.rgmii_2_rxdv */ - AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a2.rgmii_2_txd3 */ - AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a3.rgmii_2_txd2 */ - AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a4.rgmii_2_txd1 */ - AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a5.rgmii_2_txd0 */ - AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a6.rgmii_2_txclk */ - AM33XX_IOPAD(0x85c, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a7.rgmii_2_rxclk */ - AM33XX_IOPAD(0x860, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a8.rgmii_2_rxd3 */ - AM33XX_IOPAD(0x864, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a9.rgmii_2_rxd2 */ - AM33XX_IOPAD(0x868, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a10.rgmii_2_rxd1 */ - AM33XX_IOPAD(0x86c, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a11.rgmii_2_rxd0 */ - >; - }; - - cpsw_sleep: cpsw_sleep { - pinctrl-single,pins = < - /* Slave 1 reset value */ - AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) - - /* Slave 2 reset value */ - AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; - - davinci_mdio_default: davinci_mdio_default { - pinctrl-single,pins = < - /* MDIO */ - AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ - AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ - >; - }; - - davinci_mdio_sleep: davinci_mdio_sleep { - pinctrl-single,pins = < - /* MDIO reset value */ - AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) - AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; - - mmc1_pins: pinmux_mmc1_pins { - pinctrl-single,pins = < - AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ - AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ - AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ - AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ - AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */ - AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ - AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE5) /* spi0_cs1.mmc0_cd */ - >; - }; - - emmc_pins: pinmux_emmc_pins { - pinctrl-single,pins = < - AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE4) /* mcasp0_fsx.mmc1_cd */ - AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ - AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ - AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ - AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ - AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ - AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ - AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ - AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ - AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ - AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ - >; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - - status = "okay"; -}; - -&usb { - status = "okay"; -}; - -&usb_ctrl_mod { - status = "okay"; -}; - -&usb0_phy { - status = "okay"; -}; - -&usb1_phy { - status = "okay"; -}; - -&usb0 { - status = "okay"; - dr_mode = "host"; -}; - -&usb1 { - status = "okay"; - dr_mode = "host"; -}; - -&cppi41dma { - status = "okay"; -}; - -&cpsw_emac0 { - phy_id = <&davinci_mdio>, <1>; - phy-mode = "rgmii"; - dual_emac_res_vlan = <4071>; -}; - -&cpsw_emac1 { - phy_id = <&davinci_mdio>, <2>; - phy-mode = "rgmii"; - dual_emac_res_vlan = <4072>; -}; - -&mac { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&cpsw_default>; - pinctrl-1 = <&cpsw_sleep>; - active_slave = <1>; - status = "okay"; - dual_emac; - txen-skew-ps = <0>; - rxdv-skew-ps = <1400>; - rxd0-skew-ps = <1400>; - rxd1-skew-ps = <1400>; - rxd2-skew-ps = <1400>; - rxd3-skew-ps = <1400>; - txd0-skew-ps = <0>; - txd1-skew-ps = <0>; - txd2-skew-ps = <0>; - txd3-skew-ps = <0>; - rxc-skew-ps = <4400>; - txc-skew-ps = <6200>; -}; - -&davinci_mdio { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&davinci_mdio_default>; - pinctrl-1 = <&davinci_mdio_sleep>; - status = "okay"; -}; - -&aes { - status = "okay"; -}; - -&sham { - status = "okay"; -}; - -&mmc1 { - vmmc-supply = <&vmmcsd_fixed>; - pinctrl-names = "default"; - pinctrl-0 = <&mmc1_pins>; - bus-width = <4>; - non-removable; - wp-disable; - status = "okay"; -}; - -&mmc2 { - vmmc-supply = <&vmmcsd_fixed>; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_pins>; - bus-width = <8>; - ti,dual-volt; - non-removable; - status = "okay"; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - - status = "okay"; - clock-frequency = <400000>; - - baseboard_eeprom: baseboard_eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - - #address-cells = <1>; - #size-cells = <1>; - baseboard_data: baseboard_data@0 { - reg = <0 0x100>; - }; - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - - status = "okay"; -}; Property changes on: head/sys/boot/fdt/dts/arm/ufw.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/imx51x.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/imx51x.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm/imx51x.dtsi (nonexistent) @@ -1,622 +0,0 @@ -/* - * Copyright (c) 2012 The FreeBSD Foundation - * All rights reserved. - * - * This software was developed by Semihalf under sponsorship from - * the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Freescale i.MX515 Device Tree Source. - * - * $FreeBSD$ - */ - -/ { - #address-cells = <1>; - #size-cells = <1>; - - aliases { - soc = &SOC; - }; - - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "ARM,MCIMX515"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x8000>; - i-cache-size = <0x8000>; - /* TODO: describe L2 cache also */ - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - localbus@e0000000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - - /* This reflects CPU decode windows setup. */ - ranges; - - tzic: tz-interrupt-controller@e0000000 { - compatible = "fsl,imx51-tzic", "fsl,tzic"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0xe0000000 0x00004000>; - }; - /* - * 60000000 60000FFF 4K Debug ROM - * 60001000 60001FFF 4K ETB - * 60002000 60002FFF 4K ETM - * 60003000 60003FFF 4K TPIU - * 60004000 60004FFF 4K CTI0 - * 60005000 60005FFF 4K CTI1 - * 60006000 60006FFF 4K CTI2 - * 60007000 60007FFF 4K CTI3 - * 60008000 60008FFF 4K Cortex Debug Unit - * - * E0000000 E0003FFF 0x4000 TZIC - */ - }; - - SOC: soc@70000000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&tzic>; - ranges = <0x70000000 0x70000000 0x14000000>; - - aips@70000000 { /* AIPS1 */ - compatible = "fsl,aips-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&tzic>; - ranges; - - /* Required by many devices, so better to stay first */ - /* 73FD4000 0x4000 CCM */ - clock@73fd4000 { - compatible = "fsl,imx51-ccm"; - /* 83F80000 0x4000 DPLLIP1 */ - /* 83F84000 0x4000 DPLLIP2 */ - /* 83F88000 0x4000 DPLLIP3 */ - reg = <0x73fd4000 0x4000 - 0x83F80000 0x4000 - 0x83F84000 0x4000 - 0x83F88000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <71 72>; - status = "disabled"; - }; - - /* - * GPIO modules moved up - to have it attached for - * drivers which rely on GPIO - */ - /* 73F84000 0x4000 GPIO1 */ - gpio1: gpio@73f84000 { - compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; - reg = <0x73f84000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <50 51 42 43 44 45 46 47 48 49>; - /* TODO: use <> also */ - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - /* 73F88000 0x4000 GPIO2 */ - gpio2: gpio@73f88000 { - compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; - reg = <0x73f88000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <52 53>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - /* 73F8C000 0x4000 GPIO3 */ - gpio3: gpio@73f8c000 { - compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; - reg = <0x73f8c000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <54 55>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - /* 73F90000 0x4000 GPIO4 */ - gpio4: gpio@73f90000 { - compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; - reg = <0x73f90000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <56 57>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - spba@70000000 { - compatible = "fsl,spba-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&tzic>; - ranges; - - /* 70004000 0x4000 ESDHC 1 */ - esdhc@70004000 { - compatible = "fsl,imx51-esdhc"; - reg = <0x70004000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <1>; - status = "disabled"; - }; - - /* 70008000 0x4000 ESDHC 2 */ - esdhc@70008000 { - compatible = "fsl,imx51-esdhc"; - reg = <0x70008000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <2>; - status = "disabled"; - }; - - /* 7000C000 0x4000 UART 3 */ - uart3: serial@7000c000 { - compatible = "fsl,imx51-uart", "fsl,imx-uart"; - reg = <0x7000c000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <33>; - status = "disabled"; - }; - - /* 70010000 0x4000 eCSPI1 */ - ecspi@70010000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx51-ecspi"; - reg = <0x70010000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <36>; - status = "disabled"; - }; - - /* 70014000 0x4000 SSI2 irq30 */ - SSI2: ssi@70014000 { - compatible = "fsl,imx51-ssi"; - reg = <0x70014000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <30>; - status = "disabled"; - }; - - /* 70020000 0x4000 ESDHC 3 */ - esdhc@70020000 { - compatible = "fsl,imx51-esdhc"; - reg = <0x70020000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <3>; - status = "disabled"; - }; - - /* 70024000 0x4000 ESDHC 4 */ - esdhc@70024000 { - compatible = "fsl,imx51-esdhc"; - reg = <0x70024000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <4>; - status = "disabled"; - }; - - /* 70028000 0x4000 SPDIF */ - /* 91 SPDIF */ - - /* 70030000 0x4000 PATA (PORT UDMA) irq70 */ - - /* 70034000 0x4000 SLM */ - /* 70038000 0x4000 HSI2C */ /* 64 HS-I2C */ - /* 7003C000 0x4000 SPBA */ - }; - - usbphy0: usbphy@0 { - compatible = "usb-nop-xceiv"; - status = "okay"; - }; - - usbotg: usb@73f80000 { - compatible = "fsl,imx51-usb", "fsl,imx27-usb"; - reg = <0x73f80000 0x0200>; - interrupts = <18>; - fsl,usbmisc = <&usbmisc 0>; - fsl,usbphy = <&usbphy0>; - status = "disabled"; - }; - - usbh1: usb@73f80200 { - compatible = "fsl,imx51-usb", "fsl,imx27-usb"; - reg = <0x73f80200 0x0200>; - interrupts = <14>; - fsl,usbmisc = <&usbmisc 1>; - status = "disabled"; - }; - - usbh2: usb@73f80400 { - compatible = "fsl,imx51-usb", "fsl,imx27-usb"; - reg = <0x73f80400 0x0200>; - interrupts = <16>; - fsl,usbmisc = <&usbmisc 2>; - status = "disabled"; - }; - - usbh3: usb@73f80600 { - compatible = "fsl,imx51-usb", "fsl,imx27-usb"; - reg = <0x73f80600 0x0200>; - interrupts = <17>; - fsl,usbmisc = <&usbmisc 3>; - status = "disabled"; - }; - - usbmisc: usbmisc@73f80800 { - #index-cells = <1>; - compatible = "fsl,imx51-usbmisc"; - reg = <0x73f80800 0x200>; - }; - - /* 73F98000 0x4000 WDOG1 */ - wdog@73f98000 { - compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; - reg = <0x73f98000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <58>; - status = "disabled"; - }; - - /* 73F9C000 0x4000 WDOG2 (TZ) */ - wdog@73f9c000 { - compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; - reg = <0x73f9c000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <59>; - status = "disabled"; - }; - - /* 73F94000 0x4000 KPP */ - keyboard@73f94000 { - compatible = "fsl,imx51-kpp"; - reg = <0x73f94000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <60>; - status = "disabled"; - }; - - /* 73FA0000 0x4000 GPT */ - timer@73fa0000 { - compatible = "fsl,imx51-gpt"; - reg = <0x73fa0000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <39>; - status = "disabled"; - }; - - /* 73FA4000 0x4000 SRTC */ - - rtc@73fa4000 { - compatible = "fsl,imx51-srtc"; - reg = <0x73fa4000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <24 25>; - status = "disabled"; - }; - - /* 73FA8000 0x4000 IOMUXC */ - iomux@73fa8000 { - compatible = "fsl,imx51-iomux"; - reg = <0x73fa8000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <7>; - }; - - /* 73FAC000 0x4000 EPIT1 */ - epit1: timer@73fac000 { - compatible = "fsl,imx51-epit"; - reg = <0x73fac000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <40>; - status = "disabled"; - }; - - /* 73FB0000 0x4000 EPIT2 */ - epit2: timer@73fb0000 { - compatible = "fsl,imx51-epit"; - reg = <0x73fb0000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <41>; - status = "disabled"; - }; - - /* 73FB4000 0x4000 PWM1 */ - pwm@73fb4000 { - compatible = "fsl,imx51-pwm"; - reg = <0x73fb4000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <61>; - status = "disabled"; - }; - - /* 73FB8000 0x4000 PWM2 */ - pwm@73fb8000 { - compatible = "fsl,imx51-pwm"; - reg = <0x73fb8000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <94>; - status = "disabled"; - }; - - /* 73FBC000 0x4000 UART 1 */ - uart1: serial@73fbc000 { - compatible = "fsl,imx51-uart", "fsl,imx-uart"; - reg = <0x73fbc000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <31>; - status = "disabled"; - }; - - /* 73FC0000 0x4000 UART 2 */ - uart2: serial@73fc0000 { - compatible = "fsl,imx51-uart", "fsl,imx-uart"; - reg = <0x73fc0000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <32>; - status = "disabled"; - }; - - /* 73FC4000 0x4000 USBOH3 */ - /* NOTYET - usb@73fc4000 { - compatible = "fsl,imx51-otg"; - reg = <0x73fc4000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <>; - status = "disabled"; - }; - */ - /* 73FD0000 0x4000 SRC */ - reset@73fd0000 { - compatible = "fsl,imx51-src"; - reg = <0x73fd0000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <75>; - status = "disabled"; - }; - /* 73FD8000 0x4000 GPC */ - power@73fd8000 { - compatible = "fsl,imx51-gpc"; - reg = <0x73fd8000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <73 74>; - status = "disabled"; - }; - - }; - - aips@80000000 { /* AIPS2 */ - compatible = "fsl,aips-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&tzic>; - ranges; - - /* 83F94000 0x4000 AHBMAX */ - /* 83F98000 0x4000 IIM */ - /* - * 69 IIM Interrupt request to the processor. - * Indicates to the processor that program or - * explicit. - */ - /* 83F9C000 0x4000 CSU */ - /* - * 27 CSU Interrupt Request 1. Indicates to the - * processor that one or more alarm inputs were. - */ - - /* 83FA0000 0x4000 TIGERP_PLATFORM_NE_32K_256K */ - /* irq76 Neon Monitor Interrupt */ - /* irq77 Performance Unit Interrupt */ - /* irq78 CTI IRQ */ - /* irq79 Debug Interrupt, Cross-Trigger Interface 1 */ - /* irq80 Debug Interrupt, Cross-Trigger Interface 1 */ - /* irq89 Debug Interrupt, Cross-Trigger Interface 2 */ - /* irq98 Debug Interrupt, Cross-Trigger Interface 3 */ - - /* 83FA4000 0x4000 OWIRE irq88 */ - /* 83FA8000 0x4000 FIRI irq93 */ - /* 83FAC000 0x4000 eCSPI2 */ - ecspi@83fac000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx51-ecspi"; - reg = <0x83fac000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <37>; - status = "disabled"; - }; - - /* 83FB0000 0x4000 SDMA */ - sdma@83fb0000 { - compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; - reg = <0x83fb0000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <6>; - }; - - /* 83FB4000 0x4000 SCC */ - /* 21 SCC Security Monitor High Priority Interrupt. */ - /* 22 SCC Secure (TrustZone) Interrupt. */ - /* 23 SCC Regular (Non-Secure) Interrupt. */ - - /* 83FB8000 0x4000 ROMCP */ - /* 83FBC000 0x4000 RTIC */ - /* - * 26 RTIC RTIC (Trust Zone) Interrupt Request. - * Indicates that the RTIC has completed hashing the - */ - - /* 83FC0000 0x4000 CSPI */ - cspi@83fc0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; - reg = <0x83fc0000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <38>; - status = "disabled"; - }; - - /* 83FC4000 0x4000 I2C2 */ - i2c@83fc4000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx51-i2c", "fsl,imx1-i2c", "fsl,imx-i2c"; - reg = <0x83fc4000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <63>; - status = "disabled"; - }; - - /* 83FC8000 0x4000 I2C1 */ - i2c@83fc8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx51-i2c", "fsl,imx1-i2c", "fsl,imx-i2c"; - reg = <0x83fc8000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <62>; - status = "disabled"; - }; - - /* 83FCC000 0x4000 SSI1 */ - /* 29 SSI1 SSI-1 Interrupt Request */ - SSI1: ssi@83fcc000 { - compatible = "fsl,imx51-ssi"; - reg = <0x83fcc000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <29>; - status = "disabled"; - }; - - /* 83FD0000 0x4000 AUDMUX */ - audmux@83fd4000 { - compatible = "fsl,imx51-audmux"; - reg = <0x83fd4000 0x4000>; - status = "disabled"; - }; - - /* 83FD8000 0x4000 EMI1 */ - /* 8 EMI (NFC) */ - /* 15 EMI */ - /* 97 EMI Boot sequence completed interrupt */ - /* - * 101 EMI Indicates all pages have been transferred - * to NFC during an auto program operation. - */ - - /* 83FE0000 0x4000 PATA (PORT PIO) */ - /* 70 PATA Parallel ATA host controller interrupt */ - ide@83fe0000 { - compatible = "fsl,imx51-ata"; - reg = <0x83fe0000 0x4000>; - interrupt-parent = <&tzic>; - interrupts = <70>; - status = "disabled"; - }; - - /* 83FE4000 0x4000 SIM */ - /* 67 SIM intr composed of oef, xte, sdi1, and sdi0 */ - /* 68 SIM intr composed of tc, etc, tfe, and rdrf */ - - /* 83FE8000 0x4000 SSI3 */ - /* 96 SSI3 SSI-3 Interrupt Request */ - SSI3: ssi@83fe8000 { - compatible = "fsl,imx51-ssi"; - reg = <0x83fe8000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <96>; - status = "disabled"; - }; - - /* 83FEC000 0x4000 FEC */ - ethernet@83fec000 { - compatible = "fsl,imx51-fec"; - reg = <0x83fec000 0x4000>; - interrupt-parent = <&tzic>; interrupts = <87>; - status = "disabled"; - }; - - /* 83FF0000 0x4000 TVE */ - /* 92 TVE */ - /* 83FF4000 0x4000 VPU */ - /* 9 VPU */ - /* 100 VPU Idle interrupt from VPU */ - - /* 83FF8000 0x4000 SAHARA Lite */ - /* 19 SAHARA SAHARA host 0 (TrustZone) Intr Lite */ - /* 20 SAHARA SAHARA host 1 (non-TrustZone) Intr Lite */ - }; - }; - - localbus@5e000000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - - ranges; - - vga: ipu3@5e000000 { - compatible = "fsl,ipu3"; - reg = < - 0x5e000000 0x08000 /* CM */ - 0x5e008000 0x08000 /* IDMAC */ - 0x5e018000 0x08000 /* DP */ - 0x5e020000 0x08000 /* IC */ - 0x5e028000 0x08000 /* IRT */ - 0x5e030000 0x08000 /* CSI0 */ - 0x5e038000 0x08000 /* CSI1 */ - 0x5e040000 0x08000 /* DI0 */ - 0x5e048000 0x08000 /* DI1 */ - 0x5e050000 0x08000 /* SMFC */ - 0x5e058000 0x08000 /* DC */ - 0x5e060000 0x08000 /* DMFC */ - 0x5e068000 0x08000 /* VDI */ - 0x5f000000 0x20000 /* CPMEM */ - 0x5f020000 0x20000 /* LUT */ - 0x5f040000 0x20000 /* SRM */ - 0x5f060000 0x20000 /* TPM */ - 0x5f080000 0x20000 /* DCTMPL */ - >; - interrupt-parent = <&tzic>; - interrupts = < - 10 /* IPUEX Error */ - 11 /* IPUEX Sync */ - >; - status = "disabled"; - }; - }; -}; - -/* - -TODO: Not mapped interrupts - -5 DAP -84 GPU2D (OpenVG) general interrupt -85 GPU2D (OpenVG) busy signal (for S/W power gating feasibility) -12 GPU3D -102 GPU3D Idle interrupt from GPU3D (for S/W power gating) -90 SJC -*/ Property changes on: head/sys/boot/fdt/dts/arm/imx51x.dtsi ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64.dts =================================================================== --- head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64.dts (nonexistent) @@ -1,72 +0,0 @@ -/* - * Copyright (c) 2016 ARM Ltd. - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -#include "sun50i-a64-pine64-common.dtsi" - -/ { - model = "Pine64"; - compatible = "pine64,pine64", "allwinner,sun50i-a64"; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory { - reg = <0x40000000 0x20000000>; - }; -}; - -&emac { - pinctrl-names = "default"; - pinctrl-0 = <&rmii_pins>; - phy-mode = "rmii"; - phy = <&phy1>; - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-common.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-common.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-common.dtsi (nonexistent) @@ -1,82 +0,0 @@ -/* - * Copyright (c) 2016 ARM Ltd. - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * $FreeBSD$ - */ - -#include "sun50i-a64.dtsi" - -/ { - - aliases { - serial0 = &uart0; - }; - - soc { - reg_vcc3v3: vcc3v3 { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - }; -}; - -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>, <&mmc0_default_cd_pin>; - vmmc-supply = <®_vcc3v3>; - cd-gpios = <&pio 5 6 0>; - cd-inverted; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; - status = "okay"; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - status = "okay"; -}; Property changes on: head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-common.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-plus.dts =================================================================== --- head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-plus.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-plus.dts (nonexistent) @@ -1,73 +0,0 @@ -/* - * Copyright (c) 2016 ARM Ltd. - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -#include "sun50i-a64-pine64-common.dtsi" - -/ { - model = "Pine64+"; - compatible = "pine64,pine64-plus", "allwinner,sun50i-a64"; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - /* There is a model with 2GB of DRAM, but U-Boot fixes this for us. */ - memory { - reg = <0x40000000 0x40000000>; - }; -}; - -&emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - phy-mode = "rgmii"; - phy = <&phy1>; - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-plus.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm64/a64.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm64/a64.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm64/a64.dtsi (nonexistent) @@ -1,189 +0,0 @@ -/*- - * Copyright (c) 2016 Jared McNeill - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/ { - cpus { - cpu@0 { - clocks = <&cpu>; - clock-latency = <2000000>; - operating-points = < - /* kHz uV */ - 1200000 1300000 - 1008000 1200000 - 816000 1100000 - 648000 1040000 - 408000 1040000 - >; - }; - }; - - clocks { - pll_hsic: clk@01c20044 { - #clock-cells = <0>; - compatible = "allwinner,sun50i-a64-pllhsic-clk"; - reg = <0x01c20044 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll_hsic"; - }; - - usb_clk: clk@01c200cc { - #clock-cells = <1>; - #reset-cells = <1>; - compatible = "allwinner,sun8i-a83t-usb-clk"; - reg = <0x01c200cc 0x4>; - clocks = <&osc24M>, <&pll_hsic>; - clock-indices = <8>, <9>, - <10>, <11>, - <16>, <17>; - clock-output-names = "usb_phy0", "usb_phy1", - "usb_hsic_pll", "usb_hsic_12m", - "usb_otg_ohci", "usb_ohci0"; - }; - - ths_clk: clk@01c20074 { - #clock-cells = <0>; - compatible = "allwinner,sun50i-a64-ths-clk"; - reg = <0x01c20074 0x4>; - clocks = <&osc24M>; - clock-output-names = "ths"; - }; - }; - - soc { - watchdog: watchdog@01c20ca0 { - compatible = "allwinner,sun6i-a31-wdt"; - reg = <0x01c20ca0 0x20>; - interrupts = ; - clocks = <&osc24M>; - }; - - nmi_intc: interrupt-controller@01f00c0c { - compatible = "allwinner,sun6i-a31-sc-nmi"; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x01f00c0c 0x38>; - interrupts = ; - }; - - r_rsb: i2c@01f03400 { - compatible = "allwinner,sun8i-a23-rsb"; - reg = <0x01f03400 0x400>; - interrupts = ; - clock-frequency = <3000000>; - pinctrl-names = "default"; - pinctrl-0 = <&r_rsb_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - sid: eeprom@01c14000 { - compatible = "allwinner,sun8i-a83t-sid"; - reg = <0x01c14000 0x400>; - }; - - rtp: rtp@01c25000 { - compatible = "allwinner,sun50i-a64-ts"; - reg = <0x01c25000 0x400>; - interrupts = ; - clocks = <&bus_gates 72>, <&ths_clk>; - clock-names = "ahb", "ths"; - resets = <&ahb_rst 136>; - #thermal-sensor-cells = <0>; - }; - - usbphy: phy@01c19400 { - compatible = "allwinner,sun50i-a64-usb-phy"; - reg = <0x01c19400 0x24 0x01c1a800 0x4 0x01c1b800 0x4>; - reg-names = "phy_ctrl", "pmu1", "pmu2"; - clocks = <&usb_clk 8>, - <&usb_clk 9>; - clock-names = "usb0_phy", - "usb1_phy"; - resets = <&usb_clk 0>, - <&usb_clk 1>; - reset-names = "usb0_reset", - "usb1_reset"; - status = "disabled"; - #phy-cells = <1>; - }; - - ohci0: usb@01c1a400 { - compatible = "generic-ohci"; - reg = <0x01c1a400 0x100>; - interrupts = ; - clocks = <&bus_gates 28>, <&usb_clk 16>, <&usb_clk 17>; - resets = <&ahb_rst 28>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - ehci0: usb@01c1a000 { - compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci"; - reg = <0x01c1a000 0x100>; - interrupts = ; - clocks = <&bus_gates 24>; - resets = <&ahb_rst 24>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci1: usb@01c1b400 { - compatible = "generic-ohci"; - reg = <0x01c1b400 0x100>; - interrupts = ; - clocks = <&bus_gates 29>, <&usb_clk 16>, <&usb_clk 17>; - resets = <&ahb_rst 29>; - phys = <&usbphy 2>; - phy-names = "usb"; - status = "disabled"; - }; - - ehci1: usb@01c1b000 { - compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci"; - reg = <0x01c1b000 0x100>; - interrupts = ; - clocks = <&bus_gates 25>; - resets = <&ahb_rst 25>; - phys = <&usbphy 2>; - phy-names = "usb"; - status = "disabled"; - }; - }; -}; - -&pio { - r_rsb_pins: r_rsb { - allwinner,pins = "PL0", "PL1"; - allwinner,function = "s_rsb"; - allwinner,drive = ; - allwinner,pull = ; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm64/a64.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm64/pine64_plus.dts =================================================================== --- head/sys/boot/fdt/dts/arm64/pine64_plus.dts (revision 325825) +++ head/sys/boot/fdt/dts/arm64/pine64_plus.dts (nonexistent) @@ -1,101 +0,0 @@ -/*- - * Copyright (c) 2016 Jared McNeill - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#include "sun50i-a64-pine64-plus.dts" -#include "a64.dtsi" - -#include - -/ { - cpus { - cpu@0 { - cpu-supply = <®_dcdc2>; - }; - }; -}; - -&pio { - emac_phy_reset_pin_pine64_plus: emac_phy_reset_pin@0 { - allwinner,pins = "PD14"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; -}; - -&emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>, <&emac_phy_reset_pin_pine64_plus>; - phy-supply = <®_dc1dc>; - allwinner,reset-gpio = <&pio 3 14 GPIO_ACTIVE_HIGH>; - allwinner,reset-active-low; - allwinner,reset-delays-us = <0 10000 30000>; -}; - -&r_rsb { - status = "okay"; - - axp81x: pmic@3a3 { - compatible = "x-powers,axp813"; - reg = <0x3a3>; - interrupt-parent = <&nmi_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - gpio-controller; - #gpio-cells = <1>; - - regulators { - reg_dc1dc: dc1sw { - regulator-name = "dc1sw"; - }; - - reg_dcdc2: dcdc2 { - regulator-name = "dcdc2"; - }; - }; - }; -}; - -&usbphy { - status = "okay"; -}; - -&ehci0 { - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; Property changes on: head/sys/boot/fdt/dts/arm64/pine64_plus.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm64/sun50i-a64.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm64/sun50i-a64.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/arm64/sun50i-a64.dtsi (nonexistent) @@ -1,661 +0,0 @@ -/* - * Copyright (C) 2016 ARM Ltd. - * based on the Allwinner H3 dtsi: - * Copyright (C) 2015 Jens Kuske - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * $FreeBSD$ - */ - -#include -#include - -/ { - interrupt-parent = <&gic>; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - compatible = "arm,cortex-a53", "arm,armv8"; - device_type = "cpu"; - reg = <0>; - enable-method = "psci"; - }; - - cpu@1 { - compatible = "arm,cortex-a53", "arm,armv8"; - device_type = "cpu"; - reg = <1>; - enable-method = "psci"; - }; - - cpu@2 { - compatible = "arm,cortex-a53", "arm,armv8"; - device_type = "cpu"; - reg = <2>; - enable-method = "psci"; - }; - - cpu@3 { - compatible = "arm,cortex-a53", "arm,armv8"; - device_type = "cpu"; - reg = <3>; - enable-method = "psci"; - }; - }; - - psci { - compatible = "arm,psci-0.2"; - method = "smc"; - }; - - memory { - device_type = "memory"; - reg = <0x40000000 0>; - }; - - gic: interrupt-controller@1c81000 { - compatible = "arm,gic-400"; - interrupt-controller; - #interrupt-cells = <3>; - #address-cells = <0>; - - reg = <0x01c81000 0x1000>, - <0x01c82000 0x2000>, - <0x01c84000 0x2000>, - <0x01c86000 0x2000>; - interrupts = ; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - }; - - clocks { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - osc24M: osc24M_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "osc24M"; - }; - - osc32k: osc32k_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "osc32k"; - }; - - cpux: clk@1c20000 { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a23-pll1-clk"; - reg = <0x01c20000 0x4>; - clocks = <&osc24M>; - clock-output-names = "cpux"; - }; - - periph0: clk@1c20028 { - #clock-cells = <1>; - compatible = "allwinner,sun6i-a31-pll6-clk"; - reg = <0x01c20028 0x4>; - clocks = <&osc24M>; - clock-output-names = "periph0", "periph0x2"; - }; - - periph0d2: periph0d2_clk { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <2>; - clock-mult = <1>; - clocks = <&periph0 0>; - clock-output-names = "periph0d2"; - }; - - periph1: clk@1c2002c { - #clock-cells = <1>; - compatible = "allwinner,sun6i-a31-pll6-clk"; - reg = <0x01c2002c 0x4>; - clocks = <&osc24M>; - clock-output-names = "periph1", "periph1x2"; - }; - - cpu: cpu_clk@1c20050 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-cpu-clk"; - reg = <0x01c20050 0x4>; - clocks = <&osc32k>, <&osc24M>, <&cpux>, <&cpux>; - clock-output-names = "cpu"; - critical-clocks = <0>; - }; - - axi: axi_clk@1c20050 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-axi-clk"; - reg = <0x01c20050 0x4>; - clocks = <&cpu>; - clock-output-names = "axi"; - }; - - ahb1: ahb1_clk@1c20054 { - #clock-cells = <0>; - compatible = "allwinner,sun6i-a31-ahb1-clk"; - reg = <0x01c20054 0x4>; - clocks = <&osc32k>, <&osc24M>, <&axi>, <&periph0 0>; - clock-output-names = "ahb1"; - }; - - ahb2: ahb2_clk@1c2005c { - #clock-cells = <0>; - compatible = "allwinner,sun8i-h3-ahb2-clk"; - reg = <0x01c2005c 0x4>; - clocks = <&ahb1>, <&periph0d2>; - clock-output-names = "ahb2"; - }; - - apb1: apb1_clk@1c20054 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-apb0-clk"; - reg = <0x01c20054 0x4>; - clocks = <&ahb1>; - clock-output-names = "apb1"; - }; - - apb2: apb2_clk@1c20058 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-apb1-clk"; - reg = <0x01c20058 0x4>; - clocks = <&osc32k>, <&osc24M>, - <&periph0 1>, <&periph0 1>; - clock-output-names = "apb2"; - }; - - bus_gates: bus_gates_clk@1c20060 { - #clock-cells = <1>; - compatible = "allwinner,sun50i-a64-bus-gates-clk", - "allwinner,sunxi-multi-bus-gates-clk"; - reg = <0x01c20060 0x14>; - ahb1_parent { - clocks = <&ahb1>; - clock-indices = <1>, <5>, - <6>, <8>, - <9>, <10>, - <13>, <14>, - <18>, <19>, - <20>, <21>, - <23>, <24>, - <25>, <28>, - <32>, <35>, - <36>, <37>, - <40>, <43>, - <44>, <52>, - <53>, <54>, - <135>; - clock-output-names = "bus_mipidsi", "bus_ce", - "bus_dma", "bus_mmc0", - "bus_mmc1", "bus_mmc2", - "bus_nand", "bus_sdram", - "bus_ts", "bus_hstimer", - "bus_spi0", "bus_spi1", - "bus_otg", "bus_otg_ehci0", - "bus_ehci0", "bus_otg_ohci0", - "bus_ve", "bus_lcd0", - "bus_lcd1", "bus_deint", - "bus_csi", "bus_hdmi", - "bus_de", "bus_gpu", - "bus_msgbox", "bus_spinlock", - "bus_dbg"; - }; - ahb2_parent { - clocks = <&ahb2>; - clock-indices = <17>, <29>; - clock-output-names = "bus_gmac", "bus_ohci0"; - }; - apb1_parent { - clocks = <&apb1>; - clock-indices = <64>, <65>, - <69>, <72>, - <76>, <77>, - <78>; - clock-output-names = "bus_codec", "bus_spdif", - "bus_pio", "bus_ths", - "bus_i2s0", "bus_i2s1", - "bus_i2s2"; - }; - abp2_parent { - clocks = <&apb2>; - clock-indices = <96>, <97>, - <98>, <101>, - <112>, <113>, - <114>, <115>, - <116>; - clock-output-names = "bus_i2c0", "bus_i2c1", - "bus_i2c2", "bus_scr", - "bus_uart0", "bus_uart1", - "bus_uart2", "bus_uart3", - "bus_uart4"; - }; - }; - - mmc0_clk: mmc0_clk@1c20088 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-mod0-clk"; - reg = <0x01c20088 0x4>; - clocks = <&osc24M>, <&periph0 1>, <&periph1 1>; - clock-output-names = "mmc0"; - }; - - mmc1_clk: mmc1_clk@1c2008c { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-mod0-clk"; - reg = <0x01c2008c 0x4>; - clocks = <&osc24M>, <&periph0 1>, <&periph1 1>; - clock-output-names = "mmc1"; - }; - - mmc2_clk: mmc2_clk@1c20090 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-mod0-clk"; - reg = <0x01c20090 0x4>; - clocks = <&osc24M>, <&periph0 1>, <&periph1 1>; - clock-output-names = "mmc2"; - }; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - mmc0: mmc@1c0f000 { - compatible = "allwinner,sun50i-a64-mmc", - "allwinner,sun5i-a13-mmc"; - reg = <0x01c0f000 0x1000>; - clocks = <&bus_gates 8>, <&mmc0_clk>, - <&mmc0_clk>, <&mmc0_clk>; - clock-names = "ahb", "mmc", - "output", "sample"; - resets = <&ahb_rst 8>; - reset-names = "ahb"; - interrupts = ; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc1: mmc@1c10000 { - compatible = "allwinner,sun50i-a64-mmc", - "allwinner,sun5i-a13-mmc"; - reg = <0x01c10000 0x1000>; - clocks = <&bus_gates 9>, <&mmc1_clk>, - <&mmc1_clk>, <&mmc1_clk>; - clock-names = "ahb", "mmc", - "output", "sample"; - resets = <&ahb_rst 9>; - reset-names = "ahb"; - interrupts = ; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc2: mmc@1c11000 { - compatible = "allwinner,sun50i-a64-mmc", - "allwinner,sun5i-a13-mmc"; - reg = <0x01c11000 0x1000>; - clocks = <&bus_gates 10>, <&mmc2_clk>, - <&mmc2_clk>, <&mmc2_clk>; - clock-names = "ahb", "mmc", - "output", "sample"; - resets = <&ahb_rst 10>; - reset-names = "ahb"; - interrupts = ; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - pio: pinctrl@1c20800 { - compatible = "allwinner,sun50i-a64-pinctrl"; - reg = <0x01c20800 0x400>; - interrupts = , - , - ; - clocks = <&bus_gates 69>; - gpio-controller; - #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <2>; - - uart0_pins_a: uart0@0 { - allwinner,pins = "PB8", "PB9"; - allwinner,function = "uart0"; - allwinner,drive = ; - allwinner,pull = ; - }; - - uart0_pins_b: uart0@1 { - allwinner,pins = "PF2", "PF3"; - allwinner,function = "uart0"; - allwinner,drive = ; - allwinner,pull = ; - }; - - uart1_2pins: uart1_2@0 { - allwinner,pins = "PG6", "PG7"; - allwinner,function = "uart1"; - allwinner,drive = ; - allwinner,pull = ; - }; - - uart1_4pins: uart1_4@0 { - allwinner,pins = "PG6", "PG7", "PG8", "PG9"; - allwinner,function = "uart1"; - allwinner,drive = ; - allwinner,pull = ; - }; - - uart2_2pins: uart2_2@0 { - allwinner,pins = "PB0", "PB1"; - allwinner,function = "uart2"; - allwinner,drive = ; - allwinner,pull = ; - }; - - uart2_4pins: uart2_4@0 { - allwinner,pins = "PB0", "PB1", "PB2", "PB3"; - allwinner,function = "uart2"; - allwinner,drive = ; - allwinner,pull = ; - }; - - uart3_pins_a: uart3@0 { - allwinner,pins = "PD0", "PD1"; - allwinner,function = "uart3"; - allwinner,drive = ; - allwinner,pull = ; - }; - - uart3_2pins_b: uart3_2@1 { - allwinner,pins = "PH4", "PH5"; - allwinner,function = "uart3"; - allwinner,drive = ; - allwinner,pull = ; - }; - - uart3_4pins_b: uart3_4@1 { - allwinner,pins = "PH4", "PH5", "PH6", "PH7"; - allwinner,function = "uart3"; - allwinner,drive = ; - allwinner,pull = ; - }; - - uart4_2pins: uart4_2@0 { - allwinner,pins = "PD2", "PD3"; - allwinner,function = "uart4"; - allwinner,drive = ; - allwinner,pull = ; - }; - - uart4_4pins: uart4_4@0 { - allwinner,pins = "PD2", "PD3", "PD4", "PD5"; - allwinner,function = "uart4"; - allwinner,drive = ; - allwinner,pull = ; - }; - - mmc0_pins: mmc0@0 { - allwinner,pins = "PF0", "PF1", "PF2", "PF3", - "PF4", "PF5"; - allwinner,function = "mmc0"; - allwinner,drive = ; - allwinner,pull = ; - }; - - mmc0_default_cd_pin: mmc0_cd_pin@0 { - allwinner,pins = "PF6"; - allwinner,function = "gpio_in"; - allwinner,drive = ; - allwinner,pull = ; - }; - - mmc1_pins: mmc1@0 { - allwinner,pins = "PG0", "PG1", "PG2", "PG3", - "PG4", "PG5"; - allwinner,function = "mmc1"; - allwinner,drive = ; - allwinner,pull = ; - }; - - mmc2_pins: mmc2@0 { - allwinner,pins = "PC1", "PC5", "PC6", "PC8", - "PC9", "PC10"; - allwinner,function = "mmc2"; - allwinner,drive = ; - allwinner,pull = ; - }; - - i2c0_pins: i2c0_pins { - allwinner,pins = "PH0", "PH1"; - allwinner,function = "i2c0"; - allwinner,drive = ; - allwinner,pull = ; - }; - - i2c1_pins: i2c1_pins { - allwinner,pins = "PH2", "PH3"; - allwinner,function = "i2c1"; - allwinner,drive = ; - allwinner,pull = ; - }; - - i2c2_pins: i2c2_pins { - allwinner,pins = "PE14", "PE15"; - allwinner,function = "i2c2"; - allwinner,drive = ; - allwinner,pull = ; - }; - - rmii_pins: rmii_pins { - allwinner,pins = "PD10", "PD11", "PD13", "PD14", - "PD17", "PD18", "PD19", "PD20", - "PD22", "PD23"; - allwinner,function = "emac"; - allwinner,drive = ; - allwinner,pull = ; - }; - - rgmii_pins: rgmii_pins { - allwinner,pins = "PD8", "PD9", "PD10", "PD11", - "PD12", "PD13", "PD15", - "PD16", "PD17", "PD18", "PD19", - "PD20", "PD21", "PD22", "PD23"; - allwinner,function = "emac"; - allwinner,drive = ; - allwinner,pull = ; - }; - }; - - ahb_rst: reset@1c202c0 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-clock-reset"; - reg = <0x01c202c0 0xc>; - }; - - apb1_rst: reset@1c202d0 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-clock-reset"; - reg = <0x01c202d0 0x4>; - }; - - apb2_rst: reset@1c202d8 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-clock-reset"; - reg = <0x01c202d8 0x4>; - }; - - uart0: serial@1c28000 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28000 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&bus_gates 112>; - resets = <&apb2_rst 16>; - status = "disabled"; - }; - - uart1: serial@1c28400 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28400 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&bus_gates 113>; - resets = <&apb2_rst 17>; - status = "disabled"; - }; - - uart2: serial@1c28800 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28800 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&bus_gates 114>; - resets = <&apb2_rst 18>; - status = "disabled"; - }; - - uart3: serial@1c28c00 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28c00 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&bus_gates 115>; - resets = <&apb2_rst 19>; - status = "disabled"; - }; - - uart4: serial@1c29000 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c29000 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&bus_gates 116>; - resets = <&apb2_rst 20>; - status = "disabled"; - }; - - rtc: rtc@1f00000 { - compatible = "allwinner,sun6i-a31-rtc"; - reg = <0x01f00000 0x54>; - interrupts = , - ; - }; - - i2c0: i2c@1c2ac00 { - compatible = "allwinner,sun6i-a31-i2c"; - reg = <0x01c2ac00 0x400>; - interrupts = ; - clocks = <&bus_gates 96>; - resets = <&apb2_rst 0>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c1: i2c@1c2b000 { - compatible = "allwinner,sun6i-a31-i2c"; - reg = <0x01c2b000 0x400>; - interrupts = ; - clocks = <&bus_gates 97>; - resets = <&apb2_rst 1>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c2: i2c@1c2b400 { - compatible = "allwinner,sun6i-a31-i2c"; - reg = <0x01c2b400 0x400>; - interrupts = ; - clocks = <&bus_gates 98>; - resets = <&apb2_rst 2>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - emac: ethernet@1c30000 { - compatible = "allwinner,sun50i-a64-emac", - "allwinner,sun8i-h3-emac"; - reg = <0x01c30000 0x100>, <0x01c00030 0x4>; - reg-names = "emac", "syscon"; - interrupts = ; - resets = <&ahb_rst 17>; - reset-names = "ahb"; - clocks = <&bus_gates 17>; - clock-names = "ahb"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/arm64/sun50i-a64.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm64/Makefile =================================================================== --- head/sys/boot/fdt/dts/arm64/Makefile (revision 325825) +++ head/sys/boot/fdt/dts/arm64/Makefile (nonexistent) @@ -1,7 +0,0 @@ -# $FreeBSD$ - -DTS!=ls *.dts - -all: test-dts - -.include Property changes on: head/sys/boot/fdt/dts/arm64/Makefile ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/mips/fbsd-mt7621.dtsi =================================================================== --- head/sys/boot/fdt/dts/mips/fbsd-mt7621.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/mips/fbsd-mt7621.dtsi (nonexistent) @@ -1,49 +0,0 @@ -/* $FreeBSD$ */ - -&palmbus { - gpio@600 { - /* - * Mark gpio as compatible to simple-bus and override - * its #size-cells and provide a default ranges property - * so we can attach instances of our mtk_gpio_v2 driver - * to it for now. Provide exactly the same resources to - * the instances of mtk_gpio_v2. - */ - compatible = "simple-bus"; - ranges = <0x0 0x600 0x100>; - #size-cells = <1>; - - interrupt-parent = <&gic>; - - gpio0: bank@0 { - reg = <0x0 0x100>; - interrupts = <0 6 4>; - }; - - gpio1: bank@1 { - reg = <0x0 0x100>; - interrupts = <0 6 4>; - }; - - gpio2: bank@2 { - reg = <0x0 0x100>; - interrupts = <0 6 4>; - }; - }; -}; - -&xhci { - /* - * A slightly different value for reg size is needed by our - * driver for the moment - */ - reg = <0x1e1c0000 0x20000>; -}; - -&pcie { - /* - * Our driver is different that OpenWRT's, so we need slightly - * different values for the reg property - */ - reg = <0x1e140000 0x10000>; -}; Property changes on: head/sys/boot/fdt/dts/mips/fbsd-mt7621.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/mips/xlp-basic.dts =================================================================== --- head/sys/boot/fdt/dts/mips/xlp-basic.dts (revision 325825) +++ head/sys/boot/fdt/dts/mips/xlp-basic.dts (nonexistent) @@ -1,80 +0,0 @@ -/* - * Copyright (c) 2010 The FreeBSD Foundation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Netlogic Microsystems XLP8xx Device Tree Source. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "netl,XLP8XX"; - compatible = "XLP8XX"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - serial0 = &serial0; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0x18000000 0x04000000>; - bus-frequency = <0>; - - pic: pic@4000 { - compatible = "netlogic,xlp-pic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x4000 0x200>; - }; - - serial0: serial@30100 { - compatible = "ns16550"; - reg = <0x30100 0x200>; - reg-shift = <2>; - current-speed = <115200>; - clock-frequency = <133000000>; - interrupt-parent = <&pic>; - interrupts = <17>; - }; - - pci0: pci@18000000 { - compatible = "netlogic,xlp-pci", "pci"; - reg = <0xd0000000 0x10000000>; - }; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - cpumask = <0xffffffff>; - bootargs = "-v"; - }; -}; Property changes on: head/sys/boot/fdt/dts/mips/xlp-basic.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/mips/beri-sim.dts =================================================================== --- head/sys/boot/fdt/dts/mips/beri-sim.dts (revision 325825) +++ head/sys/boot/fdt/dts/mips/beri-sim.dts (nonexistent) @@ -1,160 +0,0 @@ -/*- - * Copyright (c) 2012-2013 Robert N. M. Watson - * Copyright (c) 2013 SRI International - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/* - * Device names here have been largely made up on the spot, especially for the - * "compatible" strings, and might want to be revised. - * - * For now, use 32-bit addressing as our Avalon bus is 32-bit. However, in - * the future, we should likely change to 64-bit. - */ - -/ { - model = "SRI/Cambridge BERI simulation"; - compatible = "sri-cambridge,beri-sim"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <1>; - - /* - * Secondary CPUs all start disabled and use the - * spin-table enable method. cpu-release-addr must be - * specified for each cpu other than cpu@0. Values of - * cpu-release-addr grow down from 0x100000 (kernel). - */ - status = "disabled"; - enable-method = "spin-table"; - - cpu@0 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <0 1>; - status = "okay"; - }; - -/* - cpu@1 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <1 1>; - // XXX: should we need cached prefix? - cpu-release-addr = <0xffffffff 0x800fffe0>; - }; -*/ - }; - - memory { - device_type = "memory"; - reg = <0x0 0x4000000>; // 64M at 0x0 - }; - - cpuintc: cpuintc@0 { - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - compatible = "mti,cpu-interrupt-controller"; - }; - - beripic0: beripic@7f804000 { - compatible = "sri-cambridge,beri-pic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x7f804000 0x400 - 0x7f806000 0x10 - 0x7f806080 0x10 - 0x7f806100 0x10>; - interrupts = < 2 3 4 5 6 >; - hard-interrupt-sources = <64>; - soft-interrupt-sources = <64>; - interrupt-parent = <&cpuintc>; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <1>; - - compatible = "simple-bus", "mips,mips4k"; - ranges; - - serial@7f000000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f000000 0x40>; - interrupts = <0>; - interrupt-parent = <&beripic0>; - }; - - serial@7f001000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f001000 0x40>; - }; - - serial@7f002000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f002000 0x40>; - }; - - virtio_mmio_platform0: virtio_mmio_platform@0 { - compatible = "beri,virtio_mmio_platform"; - interrupts = <1>; - interrupt-parent = <&beripic0>; - }; - - virtio_block@7f020000 { - compatible = "virtio,mmio"; - reg = <0x7f020000 0x1000>; - platform = <&virtio_mmio_platform0>; - }; - - sdcard@7f008000 { - compatible = "altera,sdcard_11_2011"; - reg = <0x7f008000 0x400>; - }; - - avgen@0x7f00a000 { - compatible = "sri-cambridge,avgen"; - reg = <0x7f00a000 0x14>; - sri-cambridge,width = <4>; - sri-cambridge,fileio = "rw"; - sri-cambridge,devname = "berirom"; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/mips/beri-sim.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/mips/fbsd-mt7628an.dtsi =================================================================== --- head/sys/boot/fdt/dts/mips/fbsd-mt7628an.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/mips/fbsd-mt7628an.dtsi (nonexistent) @@ -1,40 +0,0 @@ -/* $FreeBSD$ */ - -&palmbus { - gpio@600 { - /* - * Mark gpio as compatible to simple-bus and override - * its #size-cells and provide a default ranges property - * so we can attach instances of our mtk_gpio_v2 driver - * to it for now. Provide exactly the same resources to - * the instances of mtk_gpio_v2. - */ - compatible = "simple-bus"; - ranges = <0x0 0x600 0x100>; - #size-cells = <1>; - - gpio0: bank@0 { - reg = <0x0 0x100>; - interrupts = <6>; - }; - - gpio1: bank@1 { - reg = <0x0 0x100>; - interrupts = <6>; - }; - - gpio2: bank@2 { - reg = <0x0 0x100>; - interrupts = <6>; - }; - }; -}; - -&pcie { - /* - * Our driver is different that OpenWRT's, so we need slightly - * different values for the reg property - */ - reg = <0x10140000 0x10000>; - compatible = "mediatek,mt7628-pci"; -}; Property changes on: head/sys/boot/fdt/dts/mips/fbsd-mt7628an.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/mips/fbsd-rt3883.dtsi =================================================================== --- head/sys/boot/fdt/dts/mips/fbsd-rt3883.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/mips/fbsd-rt3883.dtsi (nonexistent) @@ -1,16 +0,0 @@ -/* $FreeBSD$ */ - -&pci { - #address-cells = <3>; - #size-cells = <2>; - ranges = < - 0x02000000 0 0x00000000 0x20000000 0 0x10000000 - 0x01000000 0 0x00000000 0x10160000 0 0x00010000 - >; - - interrupt-parent = <&cpuintc>; - interrupts = <4>; - - resets = <&rstctrl 23>; - clocks = <&clkctrl 21>; -}; Property changes on: head/sys/boot/fdt/dts/mips/fbsd-rt3883.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/mips/fbsd-mt7620a.dtsi =================================================================== --- head/sys/boot/fdt/dts/mips/fbsd-mt7620a.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/mips/fbsd-mt7620a.dtsi (nonexistent) @@ -1,9 +0,0 @@ -/* $FreeBSD$ */ - -&pcie { - /* - * Our driver is different that OpenWRT's, so we need slightly - * different values for the reg property - */ - reg = <0x10140000 0x10000>; -}; Property changes on: head/sys/boot/fdt/dts/mips/fbsd-mt7620a.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/mips/beripad-de4.dts =================================================================== --- head/sys/boot/fdt/dts/mips/beripad-de4.dts (revision 325825) +++ head/sys/boot/fdt/dts/mips/beripad-de4.dts (nonexistent) @@ -1,262 +0,0 @@ -/*- - * Copyright (c) 2012-2013 Robert N. M. Watson - * Copyright (c) 2013 SRI International - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/* - * Device names here have been largely made up on the spot, especially for the - * "compatible" strings, and might want to be revised. - * - * For now, use 32-bit addressing as our Avalon bus is 32-bit. However, in - * the future, we should likely change to 64-bit. - */ - -/ { - model = "SRI/Cambridge BeriPad (DE4)"; - compatible = "sri-cambridge,beripad-de4"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <1>; - - /* - * Secondary CPUs all start disabled and use the - * spin-table enable method. cpu-release-addr must be - * specified for each cpu other than cpu@0. Values of - * cpu-release-addr grow down from 0x100000 (kernel). - */ - status = "disabled"; - enable-method = "spin-table"; - - cpu@0 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <0 1>; - status = "okay"; - }; - -/* - cpu@1 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <1 1>; - // XXX: should we need cached prefix? - cpu-release-addr = <0xffffffff 0x800fffe0>; - }; -*/ - }; - - memory { - device_type = "memory"; - reg = <0x0 0x40000000>; // 1G at 0x0 - }; - - cpuintc: cpuintc@0 { - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - compatible = "mti,cpu-interrupt-controller"; - }; - - beripic0: beripic@7f804000 { - compatible = "sri-cambridge,beri-pic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x7f804000 0x400 - 0x7f806000 0x10 - 0x7f806080 0x10 - 0x7f806100 0x10>; - interrupts = < 2 3 4 5 6 >; - hard-interrupt-sources = <64>; - soft-interrupt-sources = <64>; - interrupt-parent = <&cpuintc>; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <1>; - - compatible = "simple-bus", "mips,mips4k"; - ranges; - - serial@7f002100 { - compatible = "ns16550"; - reg = <0x7f002100 0x20>; - reg-shift = <2>; - clock-frequency = <50000000>; - interrupts = <6>; - interrupt-parent = <&beripic0>; - }; - - serial@7f000000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f000000 0x40>; - interrupts = <0>; - interrupt-parent = <&beripic0>; - }; - - serial@7f001000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f001000 0x40>; - }; - - serial@7f002000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f002000 0x40>; - }; - - sdcard@7f008000 { - compatible = "altera,sdcard_11_2011"; - reg = <0x7f008000 0x400>; - }; - - led@7f006000 { - compatible = "sri-cambridge,de4led"; - reg = <0x7f006000 0x1>; - }; - - /* - * XXX-BZ keep flash before ethernet so that atse can read the - * Ethernet addresses for now. - */ - flash@74000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x74000000 0x4000000>; - - /* Board configuration */ - partition@0 { - reg = <0x0 0x20000>; - label = "config"; - }; - - /* Power up FPGA image */ - partition@20000 { - reg = <0x20000 0xc00000>; - label = "fpga0"; - }; - - /* Secondary FPGA image (on RE_CONFIGn button) */ - partition@C20000 { - reg = <0xc20000 0xc00000>; - label = "fpga1"; - }; - - /* Space for operating system use */ - partition@1820000 { - reg = <0x1820000 0x027c0000>; - label = "os"; - }; - - /* Second stage bootloader */ - parition@3fe0000 { - reg = <0x3fe0000 0x20000>; - label = "boot"; - }; - }; - - ethernet@7f007000 { - compatible = "altera,atse"; - // MAC, RX+RXC, TX+TXC. - reg = <0x7f007000 0x400 - 0x7f007500 0x8 - 0x7f007520 0x20 - 0x7f007400 0x8 - 0x7f007420 0x20>; - // RX, TX - interrupts = <1 2>; - interrupt-parent = <&beripic0>; - }; - - ethernet@7f005000 { - compatible = "altera,atse"; - // MAC, RX+RXC, TX+TXC. - reg = <0x7f005000 0x400 - 0x7f005500 0x8 - 0x7f005520 0x20 - 0x7f005400 0x8 - 0x7f005420 0x20>; - // RX, TX - interrupts = <11 12>; - interrupt-parent = <&beripic0>; - }; - - touchscreen@70400000 { - compatible = "sri-cambridge,mtl"; - panel-size = < 800 480 >; - reg = <0x70400000 0x1000 - 0x70000000 0x177000 - 0x70177000 0x2000>; - }; - - usb@0x7f100000 { - compatible = "nxp,usb-isp1761"; - reg = <0x7f100000 0x40000 - 0x7f140000 0x4>; - // IRQ 4 is DC, IRQ 5 is HC. - interrupts = <4 5>; - interrupt-parent = <&beripic0>; - }; - - avgen@0x7f009000 { - compatible = "sri-cambridge,avgen"; - reg = <0x7f009000 0x2>; - sri-cambridge,width = <1>; - sri-cambridge,fileio = "r"; - sri-cambridge,devname = "de4bsw"; - }; - - avgen@0x7f00a000 { - compatible = "sri-cambridge,avgen"; - reg = <0x7f00a000 0x14>; - sri-cambridge,width = <4>; - sri-cambridge,fileio = "rw"; - sri-cambridge,devname = "berirom"; - }; - - avgen@0x7f00c000 { - compatible = "sri-cambridge,avgen"; - reg = <0x7f00c000 0x8>; - sri-cambridge,width = <4>; - sri-cambridge,fileio = "rw"; - sri-cambridge,devname = "de4tempfan"; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/mips/beripad-de4.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/mips/beripad-sockit.dts =================================================================== --- head/sys/boot/fdt/dts/mips/beripad-sockit.dts (revision 325825) +++ head/sys/boot/fdt/dts/mips/beripad-sockit.dts (nonexistent) @@ -1,223 +0,0 @@ -/*- - * Copyright (c) 2012-2013 Robert N. M. Watson - * Copyright (c) 2013-2014 SRI International - * Copyright (c) 2014 Ruslan Bukin - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/* - * Device names here have been largely made up on the spot, especially for the - * "compatible" strings, and might want to be revised. - */ - -/ { - model = "SRI/Cambridge BeriPad (SoCKit)"; - compatible = "sri-cambridge,beripad-sockit"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <1>; - - /* - * Secondary CPUs all start disabled and use the - * spin-table enable method. cpu-release-addr must be - * specified for each cpu other than cpu@0. Values of - * cpu-release-addr grow down from 0x100000 (kernel). - */ - status = "disabled"; - enable-method = "spin-table"; - - cpu@0 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <0 1>; - status = "okay"; - }; - -/* - cpu@1 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <1 1>; - // XXX: should we need cached prefix? - cpu-release-addr = <0xffffffff 0x800fffe0>; - }; -*/ - }; - - memory { - device_type = "memory"; - reg = <0x0 0x10000000>; /* 256MB at 0x0 */ - }; - - cpuintc: cpuintc@0 { - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - compatible = "mti,cpu-interrupt-controller"; - }; - - beripic0: beripic@7f804000 { - compatible = "sri-cambridge,beri-pic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x0 0x7f804000 0x0 0x400 - 0x0 0x7f806000 0x0 0x10 - 0x0 0x7f806080 0x0 0x10 - 0x0 0x7f806100 0x0 0x10>; - interrupts = < 2 3 4 5 6 >; - hard-interrupt-sources = <64>; - soft-interrupt-sources = <64>; - interrupt-parent = <&cpuintc>; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - #interrupt-cells = <1>; - - compatible = "simple-bus", "mips,mips4k"; - ranges; - - pio0: pio@7f020000 { - compatible = "altr,pio"; - reg = <0x0 0x7f020000 0x0 0x1000>; /* send */ - interrupts = <4>; /* not used */ - interrupt-parent = <&beripic0>; - }; - - pio1: pio@7f021000 { - compatible = "altr,pio"; - reg = <0x0 0x7f021000 0x0 0x1000>; /* recv */ - interrupts = <10>; - interrupt-parent = <&beripic0>; - }; - - pio2: pio@7f022000 { - compatible = "altr,pio"; - reg = <0x0 0x7f022000 0x0 0x1000>; /* send */ - interrupts = <5>; /* not used */ - interrupt-parent = <&beripic0>; - }; - - pio3: pio@7f023000 { - compatible = "altr,pio"; - reg = <0x0 0x7f023000 0x0 0x1000>; /* recv */ - interrupts = <11>; - interrupt-parent = <&beripic0>; - }; - - virtio_mmio_platform0: virtio_mmio_platform@0 { - compatible = "beri,virtio_mmio_platform"; - pio-send = <&pio0>; - pio-recv = <&pio1>; - }; - - virtio_mmio_platform1: virtio_mmio_platform@1 { - compatible = "beri,virtio_mmio_platform"; - pio-send = <&pio2>; - pio-recv = <&pio3>; - }; - - virtio_block@200001000 { - compatible = "virtio,mmio"; - reg = <0x2 0x1000 0x0 0x1000>; - platform = <&virtio_mmio_platform0>; - status = "okay"; - }; - - virtio_net@200002000 { - compatible = "virtio,mmio"; - reg = <0x2 0x2000 0x0 0x1000>; - platform = <&virtio_mmio_platform1>; - status = "okay"; - }; - - serial@7f000000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x0 0x7f000000 0x0 0x40>; - interrupts = <0>; - interrupt-parent = <&beripic0>; - }; - -/* - serial@7f001000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f001000 0x40>; - }; - - serial@7f002000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f002000 0x40>; - }; -*/ - -/* - led@7f006000 { - compatible = "sri-cambridge,de4led"; - reg = <0x7f006000 0x1>; - }; -*/ - -/* - avgen@0x7f009000 { - compatible = "sri-cambridge,avgen"; - reg = <0x7f009000 0x2>; - sri-cambridge,width = <1>; - sri-cambridge,fileio = "r"; - sri-cambridge,devname = "de4bsw"; - }; -*/ - -/* - berirom@0x7f00a000 { - compatible = "sri-cambridge,berirom"; - reg = <0x7f00a000 0x1000>; - }; -*/ - -/* - avgen@0x7f00c000 { - compatible = "sri-cambridge,avgen"; - reg = <0x7f00c000 0x8>; - sri-cambridge,width = <4>; - sri-cambridge,fileio = "rw"; - sri-cambridge,devname = "de4tempfan"; - }; -*/ - }; -}; Property changes on: head/sys/boot/fdt/dts/mips/beripad-sockit.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/mips/beri-netfpga.dts =================================================================== --- head/sys/boot/fdt/dts/mips/beri-netfpga.dts (revision 325825) +++ head/sys/boot/fdt/dts/mips/beri-netfpga.dts (nonexistent) @@ -1,162 +0,0 @@ -/*- - * Copyright (c) 2012-2013 Robert N. M. Watson - * Copyright (c) 2013 SRI International - * Copyright (c) 2013-2014 Bjoern A. Zeeb - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-11-C-0249) - * ("MRC2"), as part of the DARPA MRC research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/dts-v1/; - -/* - * Device names here have been largely made up on the spot, especially for the - * "compatible" strings, and might want to be revised. - */ - -/ { - model = "SRI/Cambridge Beri (NetFPGA)"; - compatible = "sri-cambridge,beri-netfpga"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <1>; - - /* - * Secondary CPUs all start disabled and use the - * spin-table enable method. cpu-release-addr must be - * specified for each cpu other than cpu@0. Values of - * cpu-release-addr grow down from 0x100000 (kernel). - */ - status = "disabled"; - enable-method = "spin-table"; - - cpu@0 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <0 1>; - status = "okay"; - }; - -/* - cpu@1 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <1 1>; - // XXX: should we need cached prefix? - cpu-release-addr = <0xffffffff 0x800fffe0>; - }; -*/ - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0FFFFFFF>; // ~256M at 0x0 - }; - - cpuintc: cpuintc@0 { - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - compatible = "mti,cpu-interrupt-controller"; - }; - - beripic: beripic@7f804000 { - compatible = "sri-cambridge,beri-pic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x7f804000 0x400 - 0x7f806000 0x10 - 0x7f806080 0x10 - 0x7f806100 0x10>; - interrupts = < 2 3 4 5 6 >; - hard-interrupt-sources = <64>; - soft-interrupt-sources = <64>; - interrupt-parent = <&cpuintc>; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <1>; - - compatible = "simple-bus", "mips,mips4k"; - ranges; - - serial0: serial@7f000000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f000000 0x40>; -/* - interrupts = <0>; - interrupt-parent = <&beripic>; -*/ - }; - -/* - serial0: serial@7f002100 { - compatible = "ns16550"; - reg = <0x7f002100 0x20>; - reg-shift = <2>; - clock-frequency = <100000000>; - interrupts = <8>; - interrupt-parent = <&beripic>; - }; -*/ - - ethernet@7f005000 { - compatible = "netfpag10g,nf10bmac"; - // LOOP, TX, RX, INTR - reg = <0x7f005000 0x20 - 0x7f005020 0x30 - 0x7f005050 0x30 - 0x7f005100 0x10>; - // RX - interrupts = <1>; - interrupt-parent = <&beripic>; - }; - }; - - aliases { - serial0 = &serial0; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - bootargs = "-v"; - }; -}; Property changes on: head/sys/boot/fdt/dts/mips/beri-netfpga.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/mips/Makefile =================================================================== --- head/sys/boot/fdt/dts/mips/Makefile (revision 325825) +++ head/sys/boot/fdt/dts/mips/Makefile (nonexistent) @@ -1,7 +0,0 @@ -# $FreeBSD$ - -DTS!=ls *.dts - -all: test-dts - -.include Property changes on: head/sys/boot/fdt/dts/mips/Makefile ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/powerpc/p1020rdb.dts =================================================================== --- head/sys/boot/fdt/dts/powerpc/p1020rdb.dts (revision 325825) +++ head/sys/boot/fdt/dts/powerpc/p1020rdb.dts (nonexistent) @@ -1,627 +0,0 @@ -/* - * P1020 RDB Device Tree Source - * - * Copyright 2009 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/* $FreeBSD$ */ - -/dts-v1/; - -/ { - model = "fsl,P1020"; - compatible = "fsl,P1020RDB"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P1020@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,P1020@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - }; - - localbus@ffe05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus"; - reg = <0 0xffe05000 0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ - ranges = <0x0 0x0 0x0 0xef000000 0x01000000 - 0x1 0x0 0x0 0xffa00000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* This location must not be altered */ - /* 256KB for Vitesse 7385 Switch firmware */ - reg = <0x0 0x00040000>; - label = "NOR (RO) Vitesse-7385 Firmware"; - read-only; - }; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR (RO) DTB Image"; - read-only; - }; - - partition@80000 { - /* 3.5 MB for Linux Kernel Image */ - reg = <0x00080000 0x00380000>; - label = "NOR (RO) Linux Kernel Image"; - read-only; - }; - - partition@400000 { - /* 11MB for JFFS2 based Root file System */ - reg = <0x00400000 0x00b00000>; - label = "NOR (RW) JFFS2 Root File System"; - }; - - partition@f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x00f00000 0x00100000>; - label = "NOR (RO) U-Boot Image"; - read-only; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1020-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND (RO) U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND (RO) DTB Image"; - read-only; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND (RO) Linux Kernel Image"; - read-only; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND (RO) Compressed RFS Image"; - read-only; - }; - - partition@a00000 { - /* 7MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00700000>; - label = "NAND (RW) JFFS2 Root File System"; - }; - - partition@1100000 { - /* 15MB for JFFS2 based Root file System */ - reg = <0x01100000 0x00f00000>; - label = "NAND (RW) Writable User area"; - }; - }; - - L2switch@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "vitesse-7385"; - reg = <0x2 0x0 0x20000>; - }; - - }; - - soc@ffe00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p1020-immr", "simple-bus"; - ranges = <0x0 0x0 0xffe00000 0x100000>; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p1020-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <16 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,p1020-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - spi@7000 { - cell-index = <0>; - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,espi"; - reg = <0x7000 0x1000>; - interrupts = <59 0x2>; - interrupt-parent = <&mpic>; - mode = "cpu"; - - fsl_m25p80@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,espi-flash"; - reg = <0>; - linux,modalias = "fsl_m25p80"; - modal = "s25sl128b"; - spi-max-frequency = <50000000>; - mode = <0>; - - partition@0 { - /* 512KB for u-boot Bootloader Image */ - reg = <0x0 0x00080000>; - label = "SPI (RO) U-Boot Image"; - read-only; - }; - - partition@80000 { - /* 512KB for DTB Image */ - reg = <0x00080000 0x00080000>; - label = "SPI (RO) DTB Image"; - read-only; - }; - - partition@100000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00100000 0x00400000>; - label = "SPI (RO) Linux Kernel Image"; - read-only; - }; - - partition@500000 { - /* 4MB for Compressed RFS Image */ - reg = <0x00500000 0x00400000>; - label = "SPI (RO) Compressed RFS Image"; - read-only; - }; - - partition@900000 { - /* 7MB for JFFS2 based RFS */ - reg = <0x00900000 0x00700000>; - label = "SPI (RW) JFFS2 RFS"; - }; - }; - }; - - gpio: gpio-controller@f000 { - #gpio-cells = <2>; - compatible = "fsl,mpc8572-gpio"; - reg = <0xf000 0x100>; - interrupts = <47 0x2>; - interrupt-parent = <&mpic>; - gpio-controller; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,p1020-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2,256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - mdio@24000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,etsec2-mdio"; - reg = <0x24000 0x1000 0xb0030 0x4>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <3 1>; - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <2 1>; - reg = <0x1>; - }; - }; - - mdio@25000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,etsec2-tbi"; - reg = <0x25000 0x1000 0xb1030 0x4>; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "fsl,etsec2"; - fsl,num_rx_queues = <0x8>; - fsl,num_tx_queues = <0x8>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupt-parent = <&mpic>; - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - - queue-group@0 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb0000 0x1000>; - interrupts = <29 2 30 2 34 2>; - }; - - queue-group@1 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb4000 0x1000>; - interrupts = <17 2 18 2 24 2>; - }; - }; - - enet1: ethernet@b1000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "fsl,etsec2"; - fsl,num_rx_queues = <0x8>; - fsl,num_tx_queues = <0x8>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupt-parent = <&mpic>; - phy-handle = <&phy0>; - tbi-handle = <&tbi0>; - phy-connection-type = "sgmii"; - - queue-group@0 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb1000 0x1000>; - interrupts = <35 2 36 2 40 2>; - }; - - queue-group@1 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb5000 0x1000>; - interrupts = <51 2 52 2 67 2>; - }; - }; - - enet2: ethernet@b2000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "fsl,etsec2"; - fsl,num_rx_queues = <0x8>; - fsl,num_tx_queues = <0x8>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupt-parent = <&mpic>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - - queue-group@0 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb2000 0x1000>; - interrupts = <31 2 32 2 33 2>; - }; - - queue-group@1 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb6000 0x1000>; - interrupts = <25 2 26 2 27 2>; - }; - }; - - usb@22000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-usb2-dr"; - reg = <0x22000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <28 0x2>; - phy_type = "ulpi"; - }; - - /* USB2 is shared with localbus, so it must be disabled - by default. We can't put 'status = "disabled";' here - since U-Boot doesn't clear the status property when - it enables USB2. OTOH, U-Boot does create a new node - when there isn't any. So, just comment it out. - usb@23000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <46 0x2>; - phy_type = "ulpi"; - }; - */ - - sdhci@2e000 { - compatible = "fsl,p1020-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <72 0x2>; - interrupt-parent = <&mpic>; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - - crypto@30000 { - compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4", - "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 58 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0xbfe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi@41600 { - compatible = "fsl,p1020-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,p1020-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@ffe09000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe09000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <16 2>; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe0a000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <16 2>; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/powerpc/p1020rdb.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/powerpc/p2041rdb.dts =================================================================== --- head/sys/boot/fdt/dts/powerpc/p2041rdb.dts (revision 325825) +++ head/sys/boot/fdt/dts/powerpc/p2041rdb.dts (nonexistent) @@ -1,449 +0,0 @@ -/* - * P2041RDB Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/* $FreeBSD$ */ - -/include/ "p2041si.dtsi" - -/ { - model = "fsl,P2041RDB"; - compatible = "fsl,P2041RDB"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - phy_rgmii_0 = &phy_rgmii_0; - phy_rgmii_1 = &phy_rgmii_1; - phy_sgmii_2 = &phy_sgmii_2; - phy_sgmii_3 = &phy_sgmii_3; - phy_sgmii_4 = &phy_sgmii_4; - phy_sgmii_1c = &phy_sgmii_1c; - phy_sgmii_1d = &phy_sgmii_1d; - phy_sgmii_1e = &phy_sgmii_1e; - phy_sgmii_1f = &phy_sgmii_1f; - phy_xgmii_2 = &phy_xgmii_2; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000 0x80000000>; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - bman-portals@ff4000000 { - bman-portal@0 { - cpu-handle = <&cpu0>; - }; - bman-portal@4000 { - cpu-handle = <&cpu1>; - }; - bman-portal@8000 { - cpu-handle = <&cpu2>; - }; - bman-portal@c000 { - cpu-handle = <&cpu3>; - }; - bman-portal@10000 { - }; - bman-portal@14000 { - }; - bman-portal@18000 { - }; - bman-portal@1c000 { - }; - bman-portal@20000 { - }; - bman-portal@24000 { - }; - - buffer-pool@0 { - compatible = "fsl,p2041-bpool", "fsl,bpool"; - fsl,bpid = <0>; - fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; - }; - }; - - qman-portals@ff4200000 { - qportal0: qman-portal@0 { - cpu-handle = <&cpu0>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal1: qman-portal@4000 { - cpu-handle = <&cpu1>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal2: qman-portal@8000 { - cpu-handle = <&cpu2>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal3: qman-portal@c000 { - cpu-handle = <&cpu3>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal4: qman-portal@10000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal5: qman-portal@14000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal6: qman-portal@18000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal7: qman-portal@1c000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal8: qman-portal@20000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal9: qman-portal@24000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - }; - - soc: soc@ffe000000 { - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - i2c@118000 { - lm75b@48 { - compatible = "nxp,lm75a"; - reg = <0x48>; - }; - eeprom@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - rtc@68 { - compatible = "pericom,pt7c4338"; - reg = <0x68>; - }; - }; - - i2c@118100 { - eeprom@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - }; - - usb1: usb@211000 { - dr_mode = "host"; - }; - - pme: pme@316000 { - /* Commented out, use default allocation */ - /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ - }; - - qman: qman@318000 { - /* Commented out, use default allocation */ - /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ - }; - - bman: bman@31a000 { - /* Same as fsl,qman-*, use default allocation */ - /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ - }; - - fman0: fman@400000 { - enet0: ethernet@e0000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy_sgmii_2>; - phy-connection-type = "sgmii"; - }; - - mdio0: mdio@e1120 { - tbi0: tbi-phy@8 { - reg = <0x8>; - device_type = "tbi-phy"; - }; - - phy_rgmii_0: ethernet-phy@0 { - reg = <0x0>; - }; - phy_rgmii_1: ethernet-phy@1 { - reg = <0x1>; - }; - phy_sgmii_2: ethernet-phy@2 { - reg = <0x2>; - }; - phy_sgmii_3: ethernet-phy@3 { - reg = <0x3>; - }; - phy_sgmii_4: ethernet-phy@4 { - reg = <0x4>; - }; - phy_sgmii_1c: ethernet-phy@1c { - reg = <0x1c>; - }; - phy_sgmii_1d: ethernet-phy@1d { - reg = <0x1d>; - }; - phy_sgmii_1e: ethernet-phy@1e { - reg = <0x1e>; - }; - phy_sgmii_1f: ethernet-phy@1f { - reg = <0x1f>; - }; - }; - - enet1: ethernet@e2000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy_sgmii_3>; - phy-connection-type = "sgmii"; - }; - - mdio@e3120 { - tbi1: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@e4000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy_sgmii_4>; - phy-connection-type = "sgmii"; - }; - - mdio@e5120 { - tbi2: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet3: ethernet@e6000 { - tbi-handle = <&tbi3>; - phy-handle = <&phy_rgmii_1>; - phy-connection-type = "rgmii"; - }; - - mdio@e7120 { - tbi3: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet4: ethernet@e8000 { - tbi-handle = <&tbi4>; - phy-handle = <&phy_rgmii_0>; - phy-connection-type = "rgmii"; - }; - - mdio@e9120 { - tbi4: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet5: ethernet@f0000 { - /* - * phy-handle will be updated by U-Boot to - * reflect the actual slot the XAUI card is in. - */ - phy-handle = <&phy_xgmii_2>; - phy-connection-type = "xgmii"; - }; - - mdio@f1000 { - /* XAUI card in slot 2 */ - phy_xgmii_2: ethernet-phy@0 { - reg = <0x0>; - }; - }; - }; - }; - - rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xb8000000 0x04000000>; - - flash@0,0 { - compatible = "cfi-flash"; - /* - * Map 64Mb of 128MB NOR flash memory. Since highest - * line of address of NOR flash memory are set by - * FPGA, memory are divided into two pages equal to - * 64MB. One of the pages can be accessed at once. - */ - reg = <0 0 0x04000000>; - bank-width = <2>; - device-width = <2>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000 - 0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x80000000 - 0x02000000 0 0x80000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x90000000 - 0x02000000 0 0x90000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff010000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe202000 { - reg = <0xf 0xfe202000 0 0x1000>; - ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xa0000000 - 0x02000000 0 0xa0000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff020000 - 0 0x00010000>; - }; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/powerpc/p2041rdb.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/powerpc/mpc8572ds.dts =================================================================== --- head/sys/boot/fdt/dts/powerpc/mpc8572ds.dts (revision 325825) +++ head/sys/boot/fdt/dts/powerpc/mpc8572ds.dts (nonexistent) @@ -1,895 +0,0 @@ -/* - * MPC8572 DS Device Tree Source - * - * Copyright 2007-2009 Freescale Semiconductor Inc. All rights reserved - * - * Neither the name of Freescale Semiconductor, Inc nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * Freescale hereby publishes it under the following licenses: - * - * BSD License - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND - * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * GNU General Public License, version 2 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - * - * You may select the license of your choice. - *------------------------------------------------------------------ - * - * $FreeBSD$ - */ - -/dts-v1/; -/ { - model = "fsl,MPC8572DS"; - compatible = "fsl,MPC8572DS"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8572@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - - PowerPC,8572@1 { - device_type = "cpu"; - reg = <0x1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - }; - - localbus@ffe05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; - reg = <0 0xffe05000 0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0x0 0x0 0x0 0xe8000000 0x08000000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - reg = <0x0 0x03000000>; - label = "ramdisk-nor"; - read-only; - }; - - partition@3000000 { - reg = <0x03000000 0x00e00000>; - label = "diagnostic-nor"; - read-only; - }; - - partition@3e00000 { - reg = <0x03e00000 0x00200000>; - label = "dink-nor"; - read-only; - }; - - partition@4000000 { - reg = <0x04000000 0x00400000>; - label = "kernel-nor"; - read-only; - }; - - partition@4400000 { - reg = <0x04400000 0x03b00000>; - label = "jffs2-nor"; - }; - - partition@7f00000 { - reg = <0x07f00000 0x00080000>; - label = "dtb-nor"; - read-only; - }; - - partition@7f80000 { - reg = <0x07f80000 0x00080000>; - label = "u-boot-nor"; - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - reg = <0x0 0x02000000>; - label = "u-boot-nand"; - read-only; - }; - - partition@2000000 { - reg = <0x02000000 0x10000000>; - label = "jffs2-nand"; - }; - - partition@12000000 { - reg = <0x12000000 0x08000000>; - label = "ramdisk-nand"; - read-only; - }; - - partition@1a000000 { - reg = <0x1a000000 0x04000000>; - label = "kernel-nand"; - }; - - partition@1e000000 { - reg = <0x1e000000 0x01000000>; - label = "dtb-nand"; - read-only; - }; - - partition@1f000000 { - reg = <0x1f000000 0x21000000>; - label = "reserved-nand"; - }; - }; - - nand@4,0 { - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x4 0x0 0x40000>; - }; - - nand@5,0 { - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x5 0x0 0x40000>; - }; - - nand@6,0 { - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x6 0x0 0x40000>; - }; - }; - - soc8572@ffe00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0 0xffe00000 0x100000>; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8572-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - memory-controller@6000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x6000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8572-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x100000>; // L2, 1M - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0xc300 0x4>; - ranges = <0x0 0xc100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - ptp_timer: ptimer@24e00 { - compatible = "fsl,gianfar-ptp-timer"; - reg = <0x24e00 0xb0>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - ptimer-handle = < &ptp_timer >; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0x1>; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0x2>; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0x3>; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - ptimer-handle = < &ptp_timer >; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - ptimer-handle = < &ptp_timer >; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,mpc8572-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - power@e0070{ - compatible = "fsl,mpc8548-pmc"; - reg = <0xe0070 0x14>; - }; - - timer@41100 { - compatible = "fsl,mpic-global-timer"; - reg = <0x41100 0x204>; - interrupts = <0xf7 0x2>; - interrupt-parent = <&mpic>; - }; - - msi@41600 { - compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 58 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - /* PME (pattern-matcher) */ - pme@10000 { - device_type = "pme"; - compatible = "pme8572"; - reg = <0x10000 0x5000>; - interrupts = <0x39 0x2 0x40 0x2 0x41 0x2 0x42 0x2 0x43 0x2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - pci0: pcie@ffe08000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe08000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xfee20000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x11 func 0 - PCI slot 1 */ - 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 func 1 - PCI slot 1 */ - 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 func 2 - PCI slot 1 */ - 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 func 3 - PCI slot 1 */ - 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 func 4 - PCI slot 1 */ - 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 func 5 - PCI slot 1 */ - 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 func 6 - PCI slot 1 */ - 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 func 7 - PCI slot 1 */ - 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x12 func 0 - PCI slot 2 */ - 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x12 func 1 - PCI slot 2 */ - 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x12 func 2 - PCI slot 2 */ - 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x12 func 3 - PCI slot 2 */ - 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x12 func 4 - PCI slot 2 */ - 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x12 func 5 - PCI slot 2 */ - 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x12 func 6 - PCI slot 2 */ - 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x12 func 7 - PCI slot 2 */ - 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1 - - // IDSEL 0x1c USB - 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2 - 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2 - 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2 - 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2 - - // IDSEL 0x1d Audio - 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 - - // IDSEL 0x1e Legacy - 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 - 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 - 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 - - >; - - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - uli1575@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - isa@1e { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0x0 0x0 0x0 0x0>; - ranges = <0x1 0x0 0x1000000 0x0 0x0 - 0x1000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <0x1 0x20 0x2 - 0x1 0xa0 0x2 - 0x1 0x4d0 0x2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <9 2>; - interrupt-parent = <&mpic>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <0x1 0x60 0x1 0x1 0x64 0x1>; - interrupts = <1 3 12 3>; - interrupt-parent = - <&i8259>; - - keyboard@0 { - reg = <0x0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <0x1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <0x1 0x70 0x2>; - }; - - gpio@400 { - reg = <0x1 0x400 0x80>; - }; - }; - }; - }; - - }; - - pci1: pcie@ffe09000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe09000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xfee10000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0x90000000 - 0x2000000 0x0 0x90000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci2: pcie@ffe0a000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe0a000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xfee00000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/powerpc/mpc8572ds.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/powerpc/p5020si.dtsi =================================================================== --- head/sys/boot/fdt/dts/powerpc/p5020si.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/powerpc/p5020si.dtsi (nonexistent) @@ -1,1389 +0,0 @@ -/* - * P5020 Silicon Device Tree Source - * - * Copyright 2010-2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/* $FreeBSD$ */ - -/dts-v1/; - -/ { - compatible = "fsl,P5020"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - ethernet4 = &enet4; - ethernet5 = &enet5; - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - pci3 = &pci3; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - bman = &bman; - qman = &qman; - pme = &pme; - rman = &rman; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - - raideng = &raideng; - raideng_jr0 = &raideng_jr0; - raideng_jr1 = &raideng_jr1; - raideng_jr2 = &raideng_jr2; - raideng_jr3 = &raideng_jr3; - - fman0 = &fman0; - fman0_oh0 = &fman0_oh0; - fman0_oh1 = &fman0_oh1; - fman0_oh2 = &fman0_oh2; - fman0_oh3 = &fman0_oh3; - fman0_oh4 = &fman0_oh4; - fman0_oh5 = &fman0_oh5; - fman0_oh6 = &fman0_oh6; - fman0_rx0 = &fman0_rx0; - fman0_rx1 = &fman0_rx1; - fman0_rx2 = &fman0_rx2; - fman0_rx3 = &fman0_rx3; - fman0_rx4 = &fman0_rx4; - fman0_rx5 = &fman0_rx5; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e5500@0 { - device_type = "cpu"; - reg = <0>; - bus-frequency = <799999998>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e5500@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; - - dcsr: dcsr@f00000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - interrupt-parent = <&mpic>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr1>; - reg = <0x12000 0x1000>; - }; - dcsr-ddr@13000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr2>; - reg = <0x13000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; - }; - - bman-portals@ff4000000 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "fsl,bman-portals"; - ranges = <0x0 0xf 0xfde00000 0x200000>; - bman-portal@0 { - cell-index = <0x0>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x0 0x4000 0x100000 0x1000>; - interrupts = <105 2 0 0>; - }; - bman-portal@4000 { - cell-index = <0x1>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x4000 0x4000 0x101000 0x1000>; - interrupts = <107 2 0 0>; - }; - bman-portal@8000 { - cell-index = <2>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x8000 0x4000 0x102000 0x1000>; - interrupts = <109 2 0 0>; - }; - bman-portal@c000 { - cell-index = <0x3>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0xc000 0x4000 0x103000 0x1000>; - interrupts = <111 2 0 0>; - }; - bman-portal@10000 { - cell-index = <0x4>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x10000 0x4000 0x104000 0x1000>; - interrupts = <113 2 0 0>; - }; - bman-portal@14000 { - cell-index = <0x5>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x14000 0x4000 0x105000 0x1000>; - interrupts = <115 2 0 0>; - }; - bman-portal@18000 { - cell-index = <0x6>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x18000 0x4000 0x106000 0x1000>; - interrupts = <117 2 0 0>; - }; - bman-portal@1c000 { - cell-index = <0x7>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x1c000 0x4000 0x107000 0x1000>; - interrupts = <119 2 0 0>; - }; - bman-portal@20000 { - cell-index = <0x8>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x20000 0x4000 0x108000 0x1000>; - interrupts = <121 2 0 0>; - }; - bman-portal@24000 { - cell-index = <0x9>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x24000 0x4000 0x109000 0x1000>; - interrupts = <123 2 0 0>; - }; - - buffer-pool@0 { - compatible = "fsl,p5020-bpool", "fsl,bpool"; - fsl,bpid = <0>; - fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; - }; - }; - - qman-portals@ff4200000 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "fsl,qman-portals"; - ranges = <0x0 0xf 0xfdc00000 0x200000>; - qportal0: qman-portal@0 { - cell-index = <0x0>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x0 0x4000 0x100000 0x1000>; - interrupts = <104 0x2 0 0>; - fsl,qman-channel-id = <0x0>; - }; - - qportal1: qman-portal@4000 { - cell-index = <0x1>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x4000 0x4000 0x101000 0x1000>; - interrupts = <106 0x2 0 0>; - fsl,qman-channel-id = <0x1>; - }; - - qportal2: qman-portal@8000 { - cell-index = <0x2>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x8000 0x4000 0x102000 0x1000>; - interrupts = <108 0x2 0 0>; - fsl,qman-channel-id = <0x2>; - }; - - qportal3: qman-portal@c000 { - cell-index = <0x3>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0xc000 0x4000 0x103000 0x1000>; - interrupts = <110 0x2 0 0>; - fsl,qman-channel-id = <0x3>; - }; - - qportal4: qman-portal@10000 { - cell-index = <0x4>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x10000 0x4000 0x104000 0x1000>; - interrupts = <112 0x2 0 0>; - fsl,qman-channel-id = <0x4>; - }; - - qportal5: qman-portal@14000 { - cell-index = <0x5>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x14000 0x4000 0x105000 0x1000>; - interrupts = <114 0x2 0 0>; - fsl,qman-channel-id = <0x5>; - }; - - qportal6: qman-portal@18000 { - cell-index = <0x6>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x18000 0x4000 0x106000 0x1000>; - interrupts = <116 0x2 0 0>; - fsl,qman-channel-id = <0x6>; - }; - - qportal7: qman-portal@1c000 { - cell-index = <0x7>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x1c000 0x4000 0x107000 0x1000>; - interrupts = <118 0x2 0 0>; - fsl,qman-channel-id = <0x7>; - }; - - qportal8: qman-portal@20000 { - cell-index = <0x8>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x20000 0x4000 0x108000 0x1000>; - interrupts = <120 0x2 0 0>; - fsl,qman-channel-id = <0x8>; - }; - - qportal9: qman-portal@24000 { - cell-index = <0x9>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x24000 0x4000 0x109000 0x1000>; - interrupts = <122 0x2 0 0>; - fsl,qman-channel-id = <0x9>; - }; - - qpool1: qman-pool@1 { - cell-index = <1>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x21>; - }; - - qpool2: qman-pool@2 { - cell-index = <2>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x22>; - }; - - qpool3: qman-pool@3 { - cell-index = <3>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x23>; - }; - - qpool4: qman-pool@4 { - cell-index = <4>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x24>; - }; - - qpool5: qman-pool@5 { - cell-index = <5>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x25>; - }; - - qpool6: qman-pool@6 { - cell-index = <6>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x26>; - }; - - qpool7: qman-pool@7 { - cell-index = <7>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x27>; - }; - - qpool8: qman-pool@8 { - cell-index = <8>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x28>; - }; - - qpool9: qman-pool@9 { - cell-index = <9>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x29>; - }; - - qpool10: qman-pool@10 { - cell-index = <10>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2a>; - }; - - qpool11: qman-pool@11 { - cell-index = <11>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2b>; - }; - - qpool12: qman-pool@12 { - cell-index = <12>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2c>; - }; - - qpool13: qman-pool@13 { - cell-index = <13>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2d>; - }; - - qpool14: qman-pool@14 { - cell-index = <14>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2e>; - }; - - qpool15: qman-pool@15 { - cell-index = <15>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2f>; - }; - }; - - soc: soc@ffe000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - bus-frequency = <0>; // Filled out by kernel. - - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr1: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - ddr2: memory-controller@9000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x9000 0x1000>; - interrupts = <16 2 1 22>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000 - 0x11000 0x1000>; - interrupts = <16 2 1 27 - 16 2 1 26>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x4000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <4>; - reg = <0x40000 0x40000>; - compatible = "fsl,mpic", "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi0: msi@41600 { - compatible = "fsl,mpic-msi"; - reg = <0x41600 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 0 0 - 0xe1 0 0 0 - 0xe2 0 0 0 - 0xe3 0 0 0 - 0xe4 0 0 0 - 0xe5 0 0 0 - 0xe6 0 0 0 - 0xe7 0 0 0>; - }; - - msi1: msi@41800 { - compatible = "fsl,mpic-msi"; - reg = <0x41800 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe8 0 0 0 - 0xe9 0 0 0 - 0xea 0 0 0 - 0xeb 0 0 0 - 0xec 0 0 0 - 0xed 0 0 0 - 0xee 0 0 0 - 0xef 0 0 0>; - }; - - msi2: msi@41a00 { - compatible = "fsl,mpic-msi"; - reg = <0x41a00 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xf0 0 0 0 - 0xf1 0 0 0 - 0xf2 0 0 0 - 0xf3 0 0 0 - 0xf4 0 0 0 - 0xf5 0 0 0 - 0xf6 0 0 0 - 0xf7 0 0 0>; - }; - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p5020-serdes"; - reg = <0xea000 0x1000>; - }; - - dma0: dma@100300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p5020-dma", "fsl,eloplus-dma"; - reg = <0x100300 0x4>; - ranges = <0x0 0x100100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <28 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <29 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <30 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <31 2 0 0>; - }; - }; - - dma1: dma@101300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p5020-dma", "fsl,eloplus-dma"; - reg = <0x101300 0x4>; - ranges = <0x0 0x101100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <32 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <33 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <34 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <35 2 0 0>; - }; - }; - - spi@110000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,p5020-espi", "fsl,mpc8536-espi"; - reg = <0x110000 0x1000>; - interrupts = <53 0x2 0 0>; - fsl,espi-num-chipselects = <4>; - }; - - sdhc: sdhc@114000 { - compatible = "fsl,p5020-esdhc", "fsl,esdhc"; - reg = <0x114000 0x1000>; - interrupts = <48 2 0 0>; - sdhci,auto-cmd12; - clock-frequency = <0>; - }; - - i2c@118000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x118000 0x100>; - interrupts = <38 2 0 0>; - dfsrr; - }; - - i2c@118100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x118100 0x100>; - interrupts = <38 2 0 0>; - dfsrr; - }; - - i2c@119000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <2>; - compatible = "fsl-i2c"; - reg = <0x119000 0x100>; - interrupts = <39 2 0 0>; - dfsrr; - }; - - i2c@119100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <3>; - compatible = "fsl-i2c"; - reg = <0x119100 0x100>; - interrupts = <39 2 0 0>; - dfsrr; - }; - - serial0: serial@11c500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c500 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial1: serial@11c600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c600 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial2: serial@11d500 { - cell-index = <2>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d500 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - serial3: serial@11d600 { - cell-index = <3>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d600 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - gpio0: gpio@130000 { - compatible = "fsl,p5020-gpio", "fsl,qoriq-gpio"; - reg = <0x130000 0x1000>; - interrupts = <55 2 0 0>; - #gpio-cells = <2>; - gpio-controller; - }; - - rman: rman@1e0000 { - compatible = "fsl,rman"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x1e0000 0x20000>; - reg = <0x1e0000 0x20000>; - interrupts = <16 2 1 11>; /* err_irq */ - fsl,qman-channels-id = <0x62 0x63>; - - inbound-block@0 { - compatible = "fsl,rman-inbound-block"; - reg = <0x0 0x800>; - }; - global-cfg@b00 { - compatible = "fsl,rman-global-cfg"; - reg = <0xb00 0x500>; - }; - inbound-block@1000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x1000 0x800>; - }; - inbound-block@2000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x2000 0x800>; - }; - inbound-block@3000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x3000 0x800>; - }; - }; - - usb0: usb@210000 { - compatible = "fsl,p5020-usb2-mph", - "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - reg = <0x210000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <44 0x2 0 0>; - phy_type = "utmi"; - port0; - }; - - usb1: usb@211000 { - compatible = "fsl,p5020-usb2-dr", - "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - reg = <0x211000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <45 0x2 0 0>; - dr_mode = "host"; - phy_type = "utmi"; - }; - - sata@220000 { - compatible = "fsl,p5020-sata", "fsl,pq-sata-v2"; - reg = <0x220000 0x1000>; - interrupts = <68 0x2 0 0>; - }; - - sata@221000 { - compatible = "fsl,p5020-sata", "fsl,pq-sata-v2"; - reg = <0x221000 0x1000>; - interrupts = <69 0x2 0 0>; - }; - - crypto: crypto@300000 { - compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupts = <92 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <88 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <89 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <90 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <91 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.2-rtic", - "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; - }; - - sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - interrupts = <93 2 0 0>; - }; - - raideng: raideng@320000 { - compatible = "fsl,raideng-v1.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x320000 0x10000>; - ranges = <0 0x320000 0x10000>; - - raideng_jq0@1000 { - compatible = "fsl,raideng-v1.0-job-queue"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x1000 0x1000>; - ranges = <0x0 0x1000 0x1000>; - - raideng_jr0: jr@0 { - compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring"; - reg = <0x0 0x400>; - interrupts = <139 2 0 0>; - interrupt-parent = <&mpic>; - }; - - raideng_jr1: jr@400 { - compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring"; - reg = <0x400 0x400>; - interrupts = <140 2 0 0>; - interrupt-parent = <&mpic>; - }; - }; - - raideng_jq1@2000 { - compatible = "fsl,raideng-v1.0-job-queue"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x2000 0x1000>; - ranges = <0x0 0x2000 0x1000>; - - raideng_jr2: jr@0 { - compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring"; - reg = <0x0 0x400>; - interrupts = <141 2 0 0>; - interrupt-parent = <&mpic>; - }; - - raideng_jr3: jr@400 { - compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring"; - reg = <0x400 0x400>; - interrupts = <142 2 0 0>; - interrupt-parent = <&mpic>; - }; - }; - }; - - pme: pme@316000 { - compatible = "fsl,pme"; - reg = <0x316000 0x10000>; - /* "fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* "fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ - interrupts = <16 2 1 5>; - }; - - qman: qman@318000 { - compatible = "fsl,p5020-qman", "fsl,qman"; - reg = <0x318000 0x1000>; - interrupts = <16 2 1 3>; - /* Commented out, use default allocation */ - /* "fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* "fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ - }; - - bman: bman@31a000 { - compatible = "fsl,p5020-bman", "fsl,bman"; - reg = <0x31a000 0x1000>; - interrupts = <16 2 1 2>; - /* Same as "fsl,qman-*, use default allocation */ - /* "fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ - }; - - fman0: fman@400000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - compatible = "fsl,p5020-fman", "fsl,fman", "simple-bus"; - ranges = <0 0x400000 0x100000>; - reg = <0x400000 0x100000>; - clock-frequency = <0>; - interrupts = < - 96 2 0 0 - 16 2 1 1>; - - cc@0 { - compatible = "fsl,p5020-fman-cc", "fsl,fman-cc"; - }; - - parser@c7000 { - compatible = "fsl,p5020-fman-parser", "fsl,fman-parser"; - reg = <0xc7000 0x1000>; - }; - - keygen@c1000 { - compatible = "fsl,p5020-fman-keygen", "fsl,fman-keygen"; - reg = <0xc1000 0x1000>; - }; - - policer@c0000 { - compatible = "fsl,p5020-fman-policer", "fsl,fman-policer"; - reg = <0xc0000 0x1000>; - }; - - muram@0 { - compatible = "fsl,p5020-fman-muram", "fsl,fman-muram"; - reg = <0x0 0x28000>; - }; - - bmi@80000 { - compatible = "fsl,p5020-fman-bmi", "fsl,fman-bmi"; - reg = <0x80000 0x400>; - }; - - qmi@80400 { - compatible = "fsl,p5020-fman-qmi", "fsl,fman-qmi"; - reg = <0x80400 0x400>; - }; - - fman0_rx0: port@88000 { - cell-index = <0>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x88000 0x1000>; - }; - fman0_rx1: port@89000 { - cell-index = <1>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x89000 0x1000>; - }; - fman0_rx2: port@8a000 { - cell-index = <2>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8a000 0x1000>; - }; - fman0_rx3: port@8b000 { - cell-index = <3>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8b000 0x1000>; - }; - fman0_rx4: port@8c000 { - cell-index = <4>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8c000 0x1000>; - }; - fman0_rx5: port@90000 { - cell-index = <0>; - compatible = "fsl,p5020-fman-port-10g-rx", "fsl,fman-port-10g-rx"; - reg = <0x90000 0x1000>; - }; - - fman0_tx5: port@b0000 { - cell-index = <0>; - compatible = "fsl,p5020-fman-port-10g-tx", "fsl,fman-port-10g-tx"; - reg = <0xb0000 0x1000>; - fsl,qman-channel-id = <0x40>; - }; - fman0_tx0: port@a8000 { - cell-index = <0>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xa8000 0x1000>; - fsl,qman-channel-id = <0x41>; - }; - fman0_tx1: port@a9000 { - cell-index = <1>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xa9000 0x1000>; - fsl,qman-channel-id = <0x42>; - }; - fman0_tx2: port@aa000 { - cell-index = <2>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xaa000 0x1000>; - fsl,qman-channel-id = <0x43>; - }; - fman0_tx3: port@ab000 { - cell-index = <3>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xab000 0x1000>; - fsl,qman-channel-id = <0x44>; - }; - fman0_tx4: port@ac000 { - cell-index = <4>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xac000 0x1000>; - fsl,qman-channel-id = <0x45>; - }; - - fman0_oh0: port@81000 { - cell-index = <0>; - compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x81000 0x1000>; - fsl,qman-channel-id = <0x46>; - }; - fman0_oh1: port@82000 { - cell-index = <1>; - compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x82000 0x1000>; - fsl,qman-channel-id = <0x47>; - }; - fman0_oh2: port@83000 { - cell-index = <2>; - compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x83000 0x1000>; - fsl,qman-channel-id = <0x48>; - }; - fman0_oh3: port@84000 { - cell-index = <3>; - compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x84000 0x1000>; - fsl,qman-channel-id = <0x49>; - }; - fman0_oh4: port@85000 { - cell-index = <4>; - compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x85000 0x1000>; - fsl,qman-channel-id = <0x4a>; - }; - fman0_oh5: port@86000 { - cell-index = <5>; - compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x86000 0x1000>; - fsl,qman-channel-id = <0x4b>; - }; - fman0_oh6: port@87000 { - cell-index = <6>; - compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x87000 0x1000>; - }; - - enet0: ethernet@e0000 { - cell-index = <0>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe0000 0x1000>; - fsl,port-handles = <&fman0_rx0 &fman0_tx0>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio0: mdio@e1120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-mdio"; - reg = <0xe1120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet1: ethernet@e2000 { - cell-index = <1>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe2000 0x1000>; - fsl,port-handles = <&fman0_rx1 &fman0_tx1>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio@e3120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe3120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet2: ethernet@e4000 { - cell-index = <2>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe4000 0x1000>; - fsl,port-handles = <&fman0_rx2 &fman0_tx2>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio@e5120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe5120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet3: ethernet@e6000 { - cell-index = <3>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe6000 0x1000>; - fsl,port-handles = <&fman0_rx3 &fman0_tx3>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio@e7120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe7120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet4: ethernet@e8000 { - cell-index = <4>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe8000 0x1000>; - fsl,port-handles = <&fman0_rx4 &fman0_tx4>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio@e9120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe9120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet5: ethernet@f0000 { - cell-index = <0>; - compatible = "fsl,p5020-fman-10g-mac", "fsl,fman-10g-mac", "fsl,fman-xgec"; - reg = <0xf0000 0x1000>; - fsl,port-handles = <&fman0_rx5 &fman0_tx5>; - }; - - mdio@f1000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-xmdio"; - reg = <0xf1000 0x1000>; - interrupts = <100 1 0 0>; - }; - - ptp_timer0: rtc@fe000 { - compatible = "fsl,fman-rtc"; - reg = <0xfe000 0x1000>; - }; - }; - }; - - rapidio@ffe0c0000 { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; - }; - - localbus@ffe124000 { - compatible = "fsl,p5020-rev1.0-elbc", "simple-bus", "fsl,elbc"; - interrupts = < - 25 2 0 0 - 16 2 1 19 - >; - #address-cells = <2>; - #size-cells = <1>; - }; - - pci0: pcie@ffe200000 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "okay"; - #size-cells = <2>; - #address-cells = <3>; - cell-index = <0>; - bus-range = <0x0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi0>; - interrupts = <16 2 1 15>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; - }; - - pci1: pcie@ffe201000 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "disabled"; - #size-cells = <2>; - #address-cells = <3>; - cell-index = <1>; - bus-range = <0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi1>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; - }; - - pci2: pcie@ffe202000 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "okay"; - #size-cells = <2>; - #address-cells = <3>; - cell-index = <2>; - bus-range = <0x0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi2>; - interrupts = <16 2 1 13>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; - }; - }; - - pci3: pcie@ffe203000 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "disabled"; - #size-cells = <2>; - #address-cells = <3>; - cell-index = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi2>; - interrupts = <16 2 1 12>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 12>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 43 1 0 0 - 0000 0 0 2 &mpic 0 1 0 0 - 0000 0 0 3 &mpic 4 1 0 0 - 0000 0 0 4 &mpic 8 1 0 0 - >; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/powerpc/p5020si.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/powerpc/p2041si.dtsi =================================================================== --- head/sys/boot/fdt/dts/powerpc/p2041si.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/powerpc/p2041si.dtsi (nonexistent) @@ -1,1296 +0,0 @@ -/* - * P2041 Silicon Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/* $FreeBSD$ */ - -/dts-v1/; - -/ { - compatible = "fsl,P2041"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - ethernet4 = &enet4; - ethernet5 = &enet5; - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - bman = &bman; - qman = &qman; - pme = &pme; - rman = &rman; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - - fman0 = &fman0; - fman0_oh0 = &fman0_oh0; - fman0_oh1 = &fman0_oh1; - fman0_oh2 = &fman0_oh2; - fman0_oh3 = &fman0_oh3; - fman0_oh4 = &fman0_oh4; - fman0_oh5 = &fman0_oh5; - fman0_oh6 = &fman0_oh6; - fman0_rx0 = &fman0_rx0; - fman0_rx1 = &fman0_rx1; - fman0_rx2 = &fman0_rx2; - fman0_rx3 = &fman0_rx3; - fman0_rx4 = &fman0_rx4; - fman0_rx5 = &fman0_rx5; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e500mc@0 { - device_type = "cpu"; - reg = <0>; - bus-frequency = <749999996>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e500mc@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu2: PowerPC,e500mc@2 { - device_type = "cpu"; - reg = <2>; - next-level-cache = <&L2_2>; - L2_2: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu3: PowerPC,e500mc@3 { - device_type = "cpu"; - reg = <3>; - next-level-cache = <&L2_3>; - L2_3: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; - - dcsr: dcsr@f00000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - interrupt-parent = <&mpic>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr>; - reg = <0x12000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; - dcsr-cpu-sb-proxy@42000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu2>; - reg = <0x42000 0x1000>; - }; - dcsr-cpu-sb-proxy@43000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu3>; - reg = <0x43000 0x1000>; - }; - }; - - bman-portals@ff4000000 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "fsl,bman-portals"; - ranges = <0x0 0xf 0xfde00000 0x200000>; - bman-portal@0 { - cell-index = <0x0>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x0 0x4000 0x100000 0x1000>; - interrupts = <105 2 0 0>; - }; - bman-portal@4000 { - cell-index = <0x1>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x4000 0x4000 0x101000 0x1000>; - interrupts = <107 2 0 0>; - }; - bman-portal@8000 { - cell-index = <2>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x8000 0x4000 0x102000 0x1000>; - interrupts = <109 2 0 0>; - }; - bman-portal@c000 { - cell-index = <0x3>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0xc000 0x4000 0x103000 0x1000>; - interrupts = <111 2 0 0>; - }; - bman-portal@10000 { - cell-index = <0x4>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x10000 0x4000 0x104000 0x1000>; - interrupts = <113 2 0 0>; - }; - bman-portal@14000 { - cell-index = <0x5>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x14000 0x4000 0x105000 0x1000>; - interrupts = <115 2 0 0>; - }; - bman-portal@18000 { - cell-index = <0x6>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x18000 0x4000 0x106000 0x1000>; - interrupts = <117 2 0 0>; - }; - bman-portal@1c000 { - cell-index = <0x7>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x1c000 0x4000 0x107000 0x1000>; - interrupts = <119 2 0 0>; - }; - bman-portal@20000 { - cell-index = <0x8>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x20000 0x4000 0x108000 0x1000>; - interrupts = <121 2 0 0>; - }; - bman-portal@24000 { - cell-index = <0x9>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x24000 0x4000 0x109000 0x1000>; - interrupts = <123 2 0 0>; - }; - - buffer-pool@0 { - compatible = "fsl,p2041-bpool", "fsl,bpool"; - fsl,bpid = <0>; - fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; - }; - }; - - qman-portals@ff4200000 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "fsl,qman-portals"; - ranges = <0x0 0xf 0xfdc00000 0x200000>; - qportal0: qman-portal@0 { - cell-index = <0x0>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x0 0x4000 0x100000 0x1000>; - interrupts = <104 0x2 0 0>; - fsl,qman-channel-id = <0x0>; - }; - - qportal1: qman-portal@4000 { - cell-index = <0x1>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x4000 0x4000 0x101000 0x1000>; - interrupts = <106 0x2 0 0>; - fsl,qman-channel-id = <0x1>; - }; - - qportal2: qman-portal@8000 { - cell-index = <0x2>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x8000 0x4000 0x102000 0x1000>; - interrupts = <108 0x2 0 0>; - fsl,qman-channel-id = <0x2>; - }; - - qportal3: qman-portal@c000 { - cell-index = <0x3>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0xc000 0x4000 0x103000 0x1000>; - interrupts = <110 0x2 0 0>; - fsl,qman-channel-id = <0x3>; - }; - - qportal4: qman-portal@10000 { - cell-index = <0x4>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x10000 0x4000 0x104000 0x1000>; - interrupts = <112 0x2 0 0>; - fsl,qman-channel-id = <0x4>; - }; - - qportal5: qman-portal@14000 { - cell-index = <0x5>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x14000 0x4000 0x105000 0x1000>; - interrupts = <114 0x2 0 0>; - fsl,qman-channel-id = <0x5>; - }; - - qportal6: qman-portal@18000 { - cell-index = <0x6>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x18000 0x4000 0x106000 0x1000>; - interrupts = <116 0x2 0 0>; - fsl,qman-channel-id = <0x6>; - }; - - qportal7: qman-portal@1c000 { - cell-index = <0x7>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x1c000 0x4000 0x107000 0x1000>; - interrupts = <118 0x2 0 0>; - fsl,qman-channel-id = <0x7>; - }; - - qportal8: qman-portal@20000 { - cell-index = <0x8>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x20000 0x4000 0x108000 0x1000>; - interrupts = <120 0x2 0 0>; - fsl,qman-channel-id = <0x8>; - }; - - qportal9: qman-portal@24000 { - cell-index = <0x9>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x24000 0x4000 0x109000 0x1000>; - interrupts = <122 0x2 0 0>; - fsl,qman-channel-id = <0x9>; - }; - - qpool1: qman-pool@1 { - cell-index = <1>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x21>; - }; - - qpool2: qman-pool@2 { - cell-index = <2>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x22>; - }; - - qpool3: qman-pool@3 { - cell-index = <3>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x23>; - }; - - qpool4: qman-pool@4 { - cell-index = <4>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x24>; - }; - - qpool5: qman-pool@5 { - cell-index = <5>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x25>; - }; - - qpool6: qman-pool@6 { - cell-index = <6>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x26>; - }; - - qpool7: qman-pool@7 { - cell-index = <7>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x27>; - }; - - qpool8: qman-pool@8 { - cell-index = <8>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x28>; - }; - - qpool9: qman-pool@9 { - cell-index = <9>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x29>; - }; - - qpool10: qman-pool@10 { - cell-index = <10>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2a>; - }; - - qpool11: qman-pool@11 { - cell-index = <11>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2b>; - }; - - qpool12: qman-pool@12 { - cell-index = <12>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2c>; - }; - - qpool13: qman-pool@13 { - cell-index = <13>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2d>; - }; - - qpool14: qman-pool@14 { - cell-index = <14>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2e>; - }; - - qpool15: qman-pool@15 { - cell-index = <15>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2f>; - }; - }; - - soc: soc@ffe000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - bus-frequency = <0>; // Filled out by kernel. - - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000>; - interrupts = <16 2 1 27>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x4000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <4>; - reg = <0x40000 0x40000>; - compatible = "fsl,mpic", "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi0: msi@41600 { - compatible = "fsl,mpic-msi"; - reg = <0x41600 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 0 0 - 0xe1 0 0 0 - 0xe2 0 0 0 - 0xe3 0 0 0 - 0xe4 0 0 0 - 0xe5 0 0 0 - 0xe6 0 0 0 - 0xe7 0 0 0>; - }; - - msi1: msi@41800 { - compatible = "fsl,mpic-msi"; - reg = <0x41800 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe8 0 0 0 - 0xe9 0 0 0 - 0xea 0 0 0 - 0xeb 0 0 0 - 0xec 0 0 0 - 0xed 0 0 0 - 0xee 0 0 0 - 0xef 0 0 0>; - }; - - msi2: msi@41a00 { - compatible = "fsl,mpic-msi"; - reg = <0x41a00 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xf0 0 0 0 - 0xf1 0 0 0 - 0xf2 0 0 0 - 0xf3 0 0 0 - 0xf4 0 0 0 - 0xf5 0 0 0 - 0xf6 0 0 0 - 0xf7 0 0 0>; - }; - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p2041-serdes"; - reg = <0xea000 0x1000>; - }; - - dma0: dma@100300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p2041-dma", "fsl,eloplus-dma"; - reg = <0x100300 0x4>; - ranges = <0x0 0x100100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <28 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <29 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <30 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <31 2 0 0>; - }; - }; - - dma1: dma@101300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p2041-dma", "fsl,eloplus-dma"; - reg = <0x101300 0x4>; - ranges = <0x0 0x101100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <32 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <33 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <34 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <35 2 0 0>; - }; - }; - - spi@110000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,p2041-espi", "fsl,mpc8536-espi"; - reg = <0x110000 0x1000>; - interrupts = <53 0x2 0 0>; - fsl,espi-num-chipselects = <4>; - }; - - sdhc: sdhc@114000 { - compatible = "fsl,p2041-esdhc", "fsl,esdhc"; - reg = <0x114000 0x1000>; - interrupts = <48 2 0 0>; - sdhci,auto-cmd12; - clock-frequency = <0>; - }; - - i2c@118000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x118000 0x100>; - interrupts = <38 2 0 0>; - dfsrr; - }; - - i2c@118100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x118100 0x100>; - interrupts = <38 2 0 0>; - dfsrr; - }; - - i2c@119000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <2>; - compatible = "fsl-i2c"; - reg = <0x119000 0x100>; - interrupts = <39 2 0 0>; - dfsrr; - }; - - i2c@119100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <3>; - compatible = "fsl-i2c"; - reg = <0x119100 0x100>; - interrupts = <39 2 0 0>; - dfsrr; - }; - - serial0: serial@11c500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c500 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial1: serial@11c600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c600 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial2: serial@11d500 { - cell-index = <2>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d500 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - serial3: serial@11d600 { - cell-index = <3>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d600 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - gpio0: gpio@130000 { - compatible = "fsl,p2041-gpio", "fsl,qoriq-gpio"; - reg = <0x130000 0x1000>; - interrupts = <55 2 0 0>; - #gpio-cells = <2>; - gpio-controller; - }; - - rman: rman@1e0000 { - compatible = "fsl,rman"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x1e0000 0x20000>; - reg = <0x1e0000 0x20000>; - interrupts = <16 2 1 11>; /* err_irq */ - fsl,qman-channels-id = <0x62 0x63>; - - inbound-block@0 { - compatible = "fsl,rman-inbound-block"; - reg = <0x0 0x800>; - }; - global-cfg@b00 { - compatible = "fsl,rman-global-cfg"; - reg = <0xb00 0x500>; - }; - inbound-block@1000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x1000 0x800>; - }; - inbound-block@2000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x2000 0x800>; - }; - inbound-block@3000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x3000 0x800>; - }; - }; - - usb0: usb@210000 { - compatible = "fsl,p2041-usb2-mph", - "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - reg = <0x210000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <44 0x2 0 0>; - phy_type = "utmi"; - port0; - }; - - usb1: usb@211000 { - compatible = "fsl,p2041-usb2-dr", - "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - reg = <0x211000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <45 0x2 0 0>; - phy_type = "utmi"; - }; - - sata@220000 { - compatible = "fsl,p2041-sata", "fsl,pq-sata-v2"; - reg = <0x220000 0x1000>; - interrupts = <68 0x2 0 0>; - }; - - sata@221000 { - compatible = "fsl,p2041-sata", "fsl,pq-sata-v2"; - reg = <0x221000 0x1000>; - interrupts = <69 0x2 0 0>; - }; - - crypto: crypto@300000 { - compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupts = <92 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <88 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <89 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <90 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <91 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.2-rtic", - "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; - }; - - sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - interrupts = <93 2 0 0>; - }; - - pme: pme@316000 { - compatible = "fsl,pme"; - reg = <0x316000 0x10000>; - /* "fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* "fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ - interrupts = <16 2 1 5>; - }; - - qman: qman@318000 { - compatible = "fsl,p2041-qman", "fsl,qman"; - reg = <0x318000 0x1000>; - interrupts = <16 2 1 3>; - /* Commented out, use default allocation */ - /* "fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* "fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ - }; - - bman: bman@31a000 { - compatible = "fsl,p2041-bman", "fsl,bman"; - reg = <0x31a000 0x1000>; - interrupts = <16 2 1 2>; - /* Same as "fsl,qman-*, use default allocation */ - /* "fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ - }; - - fman0: fman@400000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - compatible = "fsl,p2041-fman", "fsl,fman", "simple-bus"; - ranges = <0 0x400000 0x100000>; - reg = <0x400000 0x100000>; - clock-frequency = <0>; - interrupts = < - 96 2 0 0 - 16 2 1 1>; - - cc@0 { - compatible = "fsl,p2041-fman-cc", "fsl,fman-cc"; - }; - - parser@c7000 { - compatible = "fsl,p2041-fman-parser", "fsl,fman-parser"; - reg = <0xc7000 0x1000>; - }; - - keygen@c1000 { - compatible = "fsl,p2041-fman-keygen", "fsl,fman-keygen"; - reg = <0xc1000 0x1000>; - }; - - policer@c0000 { - compatible = "fsl,p2041-fman-policer", "fsl,fman-policer"; - reg = <0xc0000 0x1000>; - }; - - muram@0 { - compatible = "fsl,p2041-fman-muram", "fsl,fman-muram"; - reg = <0x0 0x28000>; - }; - - bmi@80000 { - compatible = "fsl,p2041-fman-bmi", "fsl,fman-bmi"; - reg = <0x80000 0x400>; - }; - - qmi@80400 { - compatible = "fsl,p2041-fman-qmi", "fsl,fman-qmi"; - reg = <0x80400 0x400>; - }; - - fman0_rx0: port@88000 { - cell-index = <0>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x88000 0x1000>; - }; - fman0_rx1: port@89000 { - cell-index = <1>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x89000 0x1000>; - }; - fman0_rx2: port@8a000 { - cell-index = <2>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8a000 0x1000>; - }; - fman0_rx3: port@8b000 { - cell-index = <3>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8b000 0x1000>; - }; - fman0_rx4: port@8c000 { - cell-index = <4>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8c000 0x1000>; - }; - fman0_rx5: port@90000 { - cell-index = <0>; - compatible = "fsl,p2041-fman-port-10g-rx", "fsl,fman-port-10g-rx"; - reg = <0x90000 0x1000>; - }; - - fman0_tx5: port@b0000 { - cell-index = <0>; - compatible = "fsl,p2041-fman-port-10g-tx", "fsl,fman-port-10g-tx"; - reg = <0xb0000 0x1000>; - fsl,qman-channel-id = <0x40>; - }; - fman0_tx0: port@a8000 { - cell-index = <0>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xa8000 0x1000>; - fsl,qman-channel-id = <0x41>; - }; - fman0_tx1: port@a9000 { - cell-index = <1>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xa9000 0x1000>; - fsl,qman-channel-id = <0x42>; - }; - fman0_tx2: port@aa000 { - cell-index = <2>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xaa000 0x1000>; - fsl,qman-channel-id = <0x43>; - }; - fman0_tx3: port@ab000 { - cell-index = <3>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xab000 0x1000>; - fsl,qman-channel-id = <0x44>; - }; - fman0_tx4: port@ac000 { - cell-index = <4>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xac000 0x1000>; - fsl,qman-channel-id = <0x45>; - }; - - fman0_oh0: port@81000 { - cell-index = <0>; - compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x81000 0x1000>; - fsl,qman-channel-id = <0x46>; - }; - fman0_oh1: port@82000 { - cell-index = <1>; - compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x82000 0x1000>; - fsl,qman-channel-id = <0x47>; - }; - fman0_oh2: port@83000 { - cell-index = <2>; - compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x83000 0x1000>; - fsl,qman-channel-id = <0x48>; - }; - fman0_oh3: port@84000 { - cell-index = <3>; - compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x84000 0x1000>; - fsl,qman-channel-id = <0x49>; - }; - fman0_oh4: port@85000 { - cell-index = <4>; - compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x85000 0x1000>; - fsl,qman-channel-id = <0x4a>; - }; - fman0_oh5: port@86000 { - cell-index = <5>; - compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x86000 0x1000>; - fsl,qman-channel-id = <0x4b>; - }; - fman0_oh6: port@87000 { - cell-index = <6>; - compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x87000 0x1000>; - }; - - enet0: ethernet@e0000 { - cell-index = <0>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe0000 0x1000>; - fsl,port-handles = <&fman0_rx0 &fman0_tx0>; - }; - - mdio0: mdio@e1120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-mdio"; - reg = <0xe1120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet1: ethernet@e2000 { - cell-index = <1>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe2000 0x1000>; - fsl,port-handles = <&fman0_rx1 &fman0_tx1>; - }; - - mdio@e3120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe3120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet2: ethernet@e4000 { - cell-index = <2>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe4000 0x1000>; - fsl,port-handles = <&fman0_rx2 &fman0_tx2>; - }; - - mdio@e5120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe5120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet3: ethernet@e6000 { - cell-index = <3>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe6000 0x1000>; - fsl,port-handles = <&fman0_rx3 &fman0_tx3>; - }; - - mdio@e7120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe7120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet4: ethernet@e8000 { - cell-index = <4>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe8000 0x1000>; - fsl,port-handles = <&fman0_rx4 &fman0_tx4>; - }; - - mdio@e9120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe9120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet5: ethernet@f0000 { - cell-index = <0>; - compatible = "fsl,p2041-fman-10g-mac", "fsl,fman-10g-mac", "fsl,fman-xgec"; - reg = <0xf0000 0x1000>; - fsl,port-handles = <&fman0_rx5 &fman0_tx5>; - }; - - mdio@f1000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-xmdio"; - reg = <0xf1000 0x1000>; - interrupts = <100 1 0 0>; - }; - }; - }; - - rapidio@ffe0c0000 { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; - }; - - localbus@ffe124000 { - compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus"; - interrupts = <25 2 0 0>; - #address-cells = <2>; - #size-cells = <1>; - }; - - pci0: pcie@ffe200000 { - compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "disabled"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - fsl,msi = <&msi0>; - interrupts = <16 2 1 15>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; - }; - - pci1: pcie@ffe201000 { - compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "okay"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <33333333>; - fsl,msi = <&msi1>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; - }; - - pci2: pcie@ffe202000 { - compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "disabled"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - fsl,msi = <&msi2>; - interrupts = <16 2 1 13>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/powerpc/p2041si.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/powerpc/p3041si.dtsi =================================================================== --- head/sys/boot/fdt/dts/powerpc/p3041si.dtsi (revision 325825) +++ head/sys/boot/fdt/dts/powerpc/p3041si.dtsi (nonexistent) @@ -1,1345 +0,0 @@ -/* - * P3041 Silicon Device Tree Source - * - * Copyright 2010-2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/* $FreeBSD$ */ - -/dts-v1/; - -/ { - compatible = "fsl,P3041"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - ethernet4 = &enet4; - ethernet5 = &enet5; - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - pci3 = &pci3; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - bman = &bman; - qman = &qman; - pme = &pme; - rman = &rman; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - - fman0 = &fman0; - fman0_oh0 = &fman0_oh0; - fman0_oh1 = &fman0_oh1; - fman0_oh2 = &fman0_oh2; - fman0_oh3 = &fman0_oh3; - fman0_oh4 = &fman0_oh4; - fman0_oh5 = &fman0_oh5; - fman0_oh6 = &fman0_oh6; - fman0_rx0 = &fman0_rx0; - fman0_rx1 = &fman0_rx1; - fman0_rx2 = &fman0_rx2; - fman0_rx3 = &fman0_rx3; - fman0_rx4 = &fman0_rx4; - fman0_rx5 = &fman0_rx5; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e500mc@0 { - device_type = "cpu"; - reg = <0>; - bus-frequency = <749999996>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e500mc@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu2: PowerPC,e500mc@2 { - device_type = "cpu"; - reg = <2>; - next-level-cache = <&L2_2>; - L2_2: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu3: PowerPC,e500mc@3 { - device_type = "cpu"; - reg = <3>; - next-level-cache = <&L2_3>; - L2_3: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; - - dcsr: dcsr@f00000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - interrupt-parent = <&mpic>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p43041-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p43041-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr>; - reg = <0x12000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p43041-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p43041-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; - dcsr-cpu-sb-proxy@42000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu2>; - reg = <0x42000 0x1000>; - }; - dcsr-cpu-sb-proxy@43000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu3>; - reg = <0x43000 0x1000>; - }; - }; - - bman-portals@ff4000000 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "fsl,bman-portals"; - ranges = <0x0 0xf 0xfde00000 0x200000>; - bman-portal@0 { - cell-index = <0x0>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x0 0x4000 0x100000 0x1000>; - interrupts = <105 2 0 0>; - }; - bman-portal@4000 { - cell-index = <0x1>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x4000 0x4000 0x101000 0x1000>; - interrupts = <107 2 0 0>; - }; - bman-portal@8000 { - cell-index = <2>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x8000 0x4000 0x102000 0x1000>; - interrupts = <109 2 0 0>; - }; - bman-portal@c000 { - cell-index = <0x3>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0xc000 0x4000 0x103000 0x1000>; - interrupts = <111 2 0 0>; - }; - bman-portal@10000 { - cell-index = <0x4>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x10000 0x4000 0x104000 0x1000>; - interrupts = <113 2 0 0>; - }; - bman-portal@14000 { - cell-index = <0x5>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x14000 0x4000 0x105000 0x1000>; - interrupts = <115 2 0 0>; - }; - bman-portal@18000 { - cell-index = <0x6>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x18000 0x4000 0x106000 0x1000>; - interrupts = <117 2 0 0>; - }; - bman-portal@1c000 { - cell-index = <0x7>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x1c000 0x4000 0x107000 0x1000>; - interrupts = <119 2 0 0>; - }; - bman-portal@20000 { - cell-index = <0x8>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x20000 0x4000 0x108000 0x1000>; - interrupts = <121 2 0 0>; - }; - bman-portal@24000 { - cell-index = <0x9>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x24000 0x4000 0x109000 0x1000>; - interrupts = <123 2 0 0>; - }; - - buffer-pool@0 { - compatible = "fsl,p3041-bpool", "fsl,bpool"; - fsl,bpid = <0>; - fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; - }; - }; - - qman-portals@ff4200000 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "fsl,qman-portals"; - ranges = <0x0 0xf 0xfdc00000 0x200000>; - qportal0: qman-portal@0 { - cell-index = <0x0>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x0 0x4000 0x100000 0x1000>; - interrupts = <104 0x2 0 0>; - fsl,qman-channel-id = <0x0>; - }; - - qportal1: qman-portal@4000 { - cell-index = <0x1>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x4000 0x4000 0x101000 0x1000>; - interrupts = <106 0x2 0 0>; - fsl,qman-channel-id = <0x1>; - }; - - qportal2: qman-portal@8000 { - cell-index = <0x2>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x8000 0x4000 0x102000 0x1000>; - interrupts = <108 0x2 0 0>; - fsl,qman-channel-id = <0x2>; - }; - - qportal3: qman-portal@c000 { - cell-index = <0x3>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0xc000 0x4000 0x103000 0x1000>; - interrupts = <110 0x2 0 0>; - fsl,qman-channel-id = <0x3>; - }; - - qportal4: qman-portal@10000 { - cell-index = <0x4>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x10000 0x4000 0x104000 0x1000>; - interrupts = <112 0x2 0 0>; - fsl,qman-channel-id = <0x4>; - }; - - qportal5: qman-portal@14000 { - cell-index = <0x5>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x14000 0x4000 0x105000 0x1000>; - interrupts = <114 0x2 0 0>; - fsl,qman-channel-id = <0x5>; - }; - - qportal6: qman-portal@18000 { - cell-index = <0x6>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x18000 0x4000 0x106000 0x1000>; - interrupts = <116 0x2 0 0>; - fsl,qman-channel-id = <0x6>; - }; - - qportal7: qman-portal@1c000 { - cell-index = <0x7>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x1c000 0x4000 0x107000 0x1000>; - interrupts = <118 0x2 0 0>; - fsl,qman-channel-id = <0x7>; - }; - - qportal8: qman-portal@20000 { - cell-index = <0x8>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x20000 0x4000 0x108000 0x1000>; - interrupts = <120 0x2 0 0>; - fsl,qman-channel-id = <0x8>; - }; - - qportal9: qman-portal@24000 { - cell-index = <0x9>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x24000 0x4000 0x109000 0x1000>; - interrupts = <122 0x2 0 0>; - fsl,qman-channel-id = <0x9>; - }; - - qpool1: qman-pool@1 { - cell-index = <1>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x21>; - }; - - qpool2: qman-pool@2 { - cell-index = <2>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x22>; - }; - - qpool3: qman-pool@3 { - cell-index = <3>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x23>; - }; - - qpool4: qman-pool@4 { - cell-index = <4>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x24>; - }; - - qpool5: qman-pool@5 { - cell-index = <5>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x25>; - }; - - qpool6: qman-pool@6 { - cell-index = <6>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x26>; - }; - - qpool7: qman-pool@7 { - cell-index = <7>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x27>; - }; - - qpool8: qman-pool@8 { - cell-index = <8>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x28>; - }; - - qpool9: qman-pool@9 { - cell-index = <9>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x29>; - }; - - qpool10: qman-pool@10 { - cell-index = <10>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2a>; - }; - - qpool11: qman-pool@11 { - cell-index = <11>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2b>; - }; - - qpool12: qman-pool@12 { - cell-index = <12>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2c>; - }; - - qpool13: qman-pool@13 { - cell-index = <13>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2d>; - }; - - qpool14: qman-pool@14 { - cell-index = <14>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2e>; - }; - - qpool15: qman-pool@15 { - cell-index = <15>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2f>; - }; - }; - - soc: soc@ffe000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - bus-frequency = <0>; // Filled out by kernel. - - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000>; - interrupts = <16 2 1 27>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x4000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <4>; - reg = <0x40000 0x40000>; - compatible = "fsl,mpic", "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi0: msi@41600 { - compatible = "fsl,mpic-msi"; - reg = <0x41600 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 0 0 - 0xe1 0 0 0 - 0xe2 0 0 0 - 0xe3 0 0 0 - 0xe4 0 0 0 - 0xe5 0 0 0 - 0xe6 0 0 0 - 0xe7 0 0 0>; - }; - - msi1: msi@41800 { - compatible = "fsl,mpic-msi"; - reg = <0x41800 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe8 0 0 0 - 0xe9 0 0 0 - 0xea 0 0 0 - 0xeb 0 0 0 - 0xec 0 0 0 - 0xed 0 0 0 - 0xee 0 0 0 - 0xef 0 0 0>; - }; - - msi2: msi@41a00 { - compatible = "fsl,mpic-msi"; - reg = <0x41a00 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xf0 0 0 0 - 0xf1 0 0 0 - 0xf2 0 0 0 - 0xf3 0 0 0 - 0xf4 0 0 0 - 0xf5 0 0 0 - 0xf6 0 0 0 - 0xf7 0 0 0>; - }; - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p3041-serdes"; - reg = <0xea000 0x1000>; - }; - - dma0: dma@100300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p3041-dma", "fsl,eloplus-dma"; - reg = <0x100300 0x4>; - ranges = <0x0 0x100100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <28 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <29 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <30 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <31 2 0 0>; - }; - }; - - dma1: dma@101300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p3041-dma", "fsl,eloplus-dma"; - reg = <0x101300 0x4>; - ranges = <0x0 0x101100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <32 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <33 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <34 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <35 2 0 0>; - }; - }; - - spi@110000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,p3041-espi", "fsl,mpc8536-espi"; - reg = <0x110000 0x1000>; - interrupts = <53 0x2 0 0>; - fsl,espi-num-chipselects = <4>; - }; - - sdhc: sdhc@114000 { - compatible = "fsl,p3041-esdhc", "fsl,esdhc"; - reg = <0x114000 0x1000>; - interrupts = <48 2 0 0>; - sdhci,auto-cmd12; - clock-frequency = <0>; - }; - - i2c@118000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x118000 0x100>; - interrupts = <38 2 0 0>; - dfsrr; - }; - - i2c@118100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x118100 0x100>; - interrupts = <38 2 0 0>; - dfsrr; - }; - - i2c@119000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <2>; - compatible = "fsl-i2c"; - reg = <0x119000 0x100>; - interrupts = <39 2 0 0>; - dfsrr; - }; - - i2c@119100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <3>; - compatible = "fsl-i2c"; - reg = <0x119100 0x100>; - interrupts = <39 2 0 0>; - dfsrr; - }; - - serial0: serial@11c500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c500 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial1: serial@11c600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c600 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial2: serial@11d500 { - cell-index = <2>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d500 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - serial3: serial@11d600 { - cell-index = <3>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d600 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - gpio0: gpio@130000 { - compatible = "fsl,p3041-gpio", "fsl,qoriq-gpio"; - reg = <0x130000 0x1000>; - interrupts = <55 2 0 0>; - #gpio-cells = <2>; - gpio-controller; - }; - - rman: rman@1e0000 { - compatible = "fsl,rman"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x1e0000 0x20000>; - reg = <0x1e0000 0x20000>; - interrupts = <16 2 1 11>; /* err_irq */ - fsl,qman-channels-id = <0x62 0x63>; - - inbound-block@0 { - compatible = "fsl,rman-inbound-block"; - reg = <0x0 0x800>; - }; - global-cfg@b00 { - compatible = "fsl,rman-global-cfg"; - reg = <0xb00 0x500>; - }; - inbound-block@1000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x1000 0x800>; - }; - inbound-block@2000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x2000 0x800>; - }; - inbound-block@3000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x3000 0x800>; - }; - }; - - usb0: usb@210000 { - compatible = "fsl,p3041-usb2-mph", - "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - reg = <0x210000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <44 0x2 0 0>; - phy_type = "utmi"; - port0; - }; - - usb1: usb@211000 { - compatible = "fsl,p3041-usb2-dr", - "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - reg = <0x211000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <45 0x2 0 0>; - dr_mode = "host"; - phy_type = "utmi"; - }; - - sata@220000 { - compatible = "fsl,p3041-sata", "fsl,pq-sata-v2"; - reg = <0x220000 0x1000>; - interrupts = <68 0x2 0 0>; - }; - - sata@221000 { - compatible = "fsl,p3041-sata", "fsl,pq-sata-v2"; - reg = <0x221000 0x1000>; - interrupts = <69 0x2 0 0>; - }; - - crypto: crypto@300000 { - compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupts = <92 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <88 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <89 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <90 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <91 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.2-rtic", - "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; - }; - - sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - interrupts = <93 2 0 0>; - }; - - pme: pme@316000 { - compatible = "fsl,pme"; - reg = <0x316000 0x10000>; - /* "fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* "fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ - interrupts = <16 2 1 5>; - }; - - qman: qman@318000 { - compatible = "fsl,p3041-qman", "fsl,qman"; - reg = <0x318000 0x1000>; - interrupts = <16 2 1 3>; - /* Commented out, use default allocation */ - /* "fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* "fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ - }; - - bman: bman@31a000 { - compatible = "fsl,p3041-bman", "fsl,bman"; - reg = <0x31a000 0x1000>; - interrupts = <16 2 1 2>; - /* Same as "fsl,qman-*, use default allocation */ - /* "fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ - }; - - fman0: fman@400000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - compatible = "fsl,p3041-fman", "fsl,fman", "simple-bus"; - ranges = <0 0x400000 0x100000>; - reg = <0x400000 0x100000>; - clock-frequency = <0>; - interrupts = < - 96 2 0 0 - 16 2 1 1>; - - cc@0 { - compatible = "fsl,p3041-fman-cc", "fsl,fman-cc"; - }; - - parser@c7000 { - compatible = "fsl,p3041-fman-parser", "fsl,fman-parser"; - reg = <0xc7000 0x1000>; - }; - - keygen@c1000 { - compatible = "fsl,p3041-fman-keygen", "fsl,fman-keygen"; - reg = <0xc1000 0x1000>; - }; - - policer@c0000 { - compatible = "fsl,p3041-fman-policer", "fsl,fman-policer"; - reg = <0xc0000 0x1000>; - }; - - muram@0 { - compatible = "fsl,p3041-fman-muram", "fsl,fman-muram"; - reg = <0x0 0x28000>; - }; - - bmi@80000 { - compatible = "fsl,p3041-fman-bmi", "fsl,fman-bmi"; - reg = <0x80000 0x400>; - }; - - qmi@80400 { - compatible = "fsl,p3041-fman-qmi", "fsl,fman-qmi"; - reg = <0x80400 0x400>; - }; - - fman0_rx0: port@88000 { - cell-index = <0>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x88000 0x1000>; - }; - fman0_rx1: port@89000 { - cell-index = <1>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x89000 0x1000>; - }; - fman0_rx2: port@8a000 { - cell-index = <2>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8a000 0x1000>; - }; - fman0_rx3: port@8b000 { - cell-index = <3>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8b000 0x1000>; - }; - fman0_rx4: port@8c000 { - cell-index = <4>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8c000 0x1000>; - }; - fman0_rx5: port@90000 { - cell-index = <0>; - compatible = "fsl,p3041-fman-port-10g-rx", "fsl,fman-port-10g-rx"; - reg = <0x90000 0x1000>; - }; - - fman0_tx5: port@b0000 { - cell-index = <0>; - compatible = "fsl,p3041-fman-port-10g-tx", "fsl,fman-port-10g-tx"; - reg = <0xb0000 0x1000>; - fsl,qman-channel-id = <0x40>; - }; - fman0_tx0: port@a8000 { - cell-index = <0>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xa8000 0x1000>; - fsl,qman-channel-id = <0x41>; - }; - fman0_tx1: port@a9000 { - cell-index = <1>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xa9000 0x1000>; - fsl,qman-channel-id = <0x42>; - }; - fman0_tx2: port@aa000 { - cell-index = <2>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xaa000 0x1000>; - fsl,qman-channel-id = <0x43>; - }; - fman0_tx3: port@ab000 { - cell-index = <3>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xab000 0x1000>; - fsl,qman-channel-id = <0x44>; - }; - fman0_tx4: port@ac000 { - cell-index = <4>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xac000 0x1000>; - fsl,qman-channel-id = <0x45>; - }; - - fman0_oh0: port@81000 { - cell-index = <0>; - compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x81000 0x1000>; - fsl,qman-channel-id = <0x46>; - }; - fman0_oh1: port@82000 { - cell-index = <1>; - compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x82000 0x1000>; - fsl,qman-channel-id = <0x47>; - }; - fman0_oh2: port@83000 { - cell-index = <2>; - compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x83000 0x1000>; - fsl,qman-channel-id = <0x48>; - }; - fman0_oh3: port@84000 { - cell-index = <3>; - compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x84000 0x1000>; - fsl,qman-channel-id = <0x49>; - }; - fman0_oh4: port@85000 { - cell-index = <4>; - compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x85000 0x1000>; - fsl,qman-channel-id = <0x4a>; - }; - fman0_oh5: port@86000 { - cell-index = <5>; - compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x86000 0x1000>; - fsl,qman-channel-id = <0x4b>; - }; - fman0_oh6: port@87000 { - cell-index = <6>; - compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x87000 0x1000>; - }; - - enet0: ethernet@e0000 { - cell-index = <0>; - compatible = "fsl,p3041-fman-1g-mac", - "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe0000 0x1000>; - fsl,port-handles = <&fman0_rx0 &fman0_tx0>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio0: mdio@e1120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-mdio"; - reg = <0xe1120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet1: ethernet@e2000 { - cell-index = <1>; - compatible = "fsl,p3041-fman-1g-mac", - "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe2000 0x1000>; - fsl,port-handles = <&fman0_rx1 &fman0_tx1>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio@e3120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe3120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet2: ethernet@e4000 { - cell-index = <2>; - compatible = "fsl,p3041-fman-1g-mac", - "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe4000 0x1000>; - fsl,port-handles = <&fman0_rx2 &fman0_tx2>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio@e5120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe5120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet3: ethernet@e6000 { - cell-index = <3>; - compatible = "fsl,p3041-fman-1g-mac", - "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe6000 0x1000>; - fsl,port-handles = <&fman0_rx3 &fman0_tx3>; - }; - - mdio@e7120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe7120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet4: ethernet@e8000 { - cell-index = <4>; - compatible = "fsl,p3041-fman-1g-mac", - "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe8000 0x1000>; - fsl,port-handles = <&fman0_rx4 &fman0_tx4>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio@e9120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe9120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet5: ethernet@f0000 { - cell-index = <0>; - compatible = "fsl,p3041-fman-10g-mac", - "fsl,fman-10g-mac", "fsl,fman-xgec"; - reg = <0xf0000 0x1000>; - fsl,port-handles = <&fman0_rx5 &fman0_tx5>; - }; - - mdio@f1000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-xmdio"; - reg = <0xf1000 0x1000>; - interrupts = <100 1 0 0>; - }; - - ptp_timer0: rtc@fe000 { - compatible = "fsl,fman-rtc"; - reg = <0xfe000 0x1000>; - }; - }; - }; - - rapidio@ffe0c0000 { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; - }; - - localbus@ffe124000 { - compatible = "fsl,p3041-rev1.0-elbc", "simple-bus", "fsl,elbc"; - interrupts = < - 25 2 0 0 - 16 2 1 19 - >; - #address-cells = <2>; - #size-cells = <1>; - }; - - pci0: pcie@ffe200000 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "okay"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi0>; - interrupts = <16 2 1 15>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; - }; - - pci1: pcie@ffe201000 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "disabled"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi1>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; - }; - - pci2: pcie@ffe202000 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "okay"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi2>; - interrupts = <16 2 1 13>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; - }; - }; - - pci3: pcie@ffe203000 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "disabled"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi2>; - interrupts = <16 2 1 12>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 12>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 43 1 0 0 - 0000 0 0 2 &mpic 0 1 0 0 - 0000 0 0 3 &mpic 4 1 0 0 - 0000 0 0 4 &mpic 8 1 0 0 - >; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/powerpc/p3041si.dtsi ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/powerpc/p2020ds.dts =================================================================== --- head/sys/boot/fdt/dts/powerpc/p2020ds.dts (revision 325825) +++ head/sys/boot/fdt/dts/powerpc/p2020ds.dts (nonexistent) @@ -1,754 +0,0 @@ -/* - * P2020 DS Device Tree Source - * - * Copyright 2009 Freescale Semiconductor Inc. - * - * Neither the name of Freescale Semiconductor, Inc nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * Freescale hereby publishes it under the following licenses: - * - * BSD License - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND - * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * GNU General Public License, version 2 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - * - * You may select the license of your choice. - *------------------------------------------------------------------ - */ -/* $FreeBSD$ */ - -/dts-v1/; -/ { - model = "fsl,P2020"; - compatible = "fsl,P2020DS"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P2020@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,P2020@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - }; - - localbus@ffe05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,elbc", "simple-bus"; - reg = <0 0xffe05000 0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 - 0x1 0x0 0x0 0xe0000000 0x08000000 - 0x2 0x0 0x0 0xffa00000 0x00040000 - 0x3 0x0 0x0 0xffdf0000 0x00008000 - 0x4 0x0 0x0 0xffa40000 0x00040000 - 0x5 0x0 0x0 0xffa80000 0x00040000 - 0x6 0x0 0x0 0xffac0000 0x00040000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - - ramdisk@0 { - reg = <0x0 0x03000000>; - read-only; - }; - - diagnostic@3000000 { - reg = <0x03000000 0x00e00000>; - read-only; - }; - - dink@3e00000 { - reg = <0x03e00000 0x00200000>; - read-only; - }; - - kernel@4000000 { - reg = <0x04000000 0x00400000>; - read-only; - }; - - jffs2@4400000 { - reg = <0x04400000 0x03b00000>; - }; - - dtb@7f00000 { - reg = <0x07f00000 0x00080000>; - read-only; - }; - - u-boot@7f80000 { - reg = <0x07f80000 0x00080000>; - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - u-boot@0 { - reg = <0x0 0x02000000>; - read-only; - }; - - jffs2@2000000 { - reg = <0x02000000 0x10000000>; - }; - - ramdisk@12000000 { - reg = <0x12000000 0x08000000>; - read-only; - }; - - kernel@1a000000 { - reg = <0x1a000000 0x04000000>; - }; - - dtb@1e000000 { - reg = <0x1e000000 0x01000000>; - read-only; - }; - - empty@1f000000 { - reg = <0x1f000000 0x21000000>; - }; - }; - - nand@4,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x4 0x0 0x40000>; - }; - - nand@5,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x5 0x0 0x40000>; - }; - - nand@6,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x6 0x0 0x40000>; - }; - }; - - soc@ffe00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p2020-immr", "simple-bus"; - ranges = <0x0 0 0xffe00000 0x100000>; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p2020-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,p2020-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - spi@7000 { - compatible = "fsl,espi"; - reg = <0x7000 0x1000>; - interrupts = <59 0x2>; - interrupt-parent = <&mpic>; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,eloplus-dma"; - reg = <0xc300 0x4>; - ranges = <0x0 0xc100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - gpio: gpio-controller@f000 { - #gpio-cells = <2>; - compatible = "fsl,mpc8572-gpio"; - reg = <0xf000 0x100>; - interrupts = <47 0x2>; - interrupt-parent = <&mpic>; - gpio-controller; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,p2020-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512k - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - usb@22000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-usb2-dr"; - reg = <0x22000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <28 0x2>; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <3 1>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <3 1>; - reg = <0x1>; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <3 1>; - reg = <0x2>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - sdhci@2e000 { - compatible = "fsl,p2020-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <72 0x2>; - interrupt-parent = <&mpic>; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - - crypto@30000 { - compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4", - "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 58 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0xbfe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi@41600 { - compatible = "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,p2020-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@ffe08000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe08000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x8 0x1 - 0000 0x0 0x0 0x2 &mpic 0x9 0x1 - 0000 0x0 0x0 0x3 &mpic 0xa 0x1 - 0000 0x0 0x0 0x4 &mpic 0xb 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci1: pcie@ffe09000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe09000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - - // IDSEL 0x11 func 0 - PCI slot 1 - 0x8800 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8800 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 1 - PCI slot 1 - 0x8900 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8900 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 2 - PCI slot 1 - 0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 3 - PCI slot 1 - 0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 4 - PCI slot 1 - 0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 5 - PCI slot 1 - 0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 6 - PCI slot 1 - 0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 7 - PCI slot 1 - 0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x1d Audio - 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 - - // IDSEL 0x1e Legacy - 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 - 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 - 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 - >; - - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - uli1575@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - isa@1e { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0x0 0x0 0x0 0x0>; - ranges = <0x1 0x0 0x1000000 0x0 0x0 - 0x1000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <0x1 0x20 0x2 - 0x1 0xa0 0x2 - 0x1 0x4d0 0x2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <4 1>; - interrupt-parent = <&mpic>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <0x1 0x60 0x1 0x1 0x64 0x1>; - interrupts = <1 3 12 3>; - interrupt-parent = - <&i8259>; - - keyboard@0 { - reg = <0x0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <0x1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <0x1 0x70 0x2>; - }; - - gpio@400 { - reg = <0x1 0x400 0x80>; - }; - }; - }; - }; - - }; - - pci2: pcie@ffe0a000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe0a000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; -}; Property changes on: head/sys/boot/fdt/dts/powerpc/p2020ds.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/powerpc/p5020ds.dts =================================================================== --- head/sys/boot/fdt/dts/powerpc/p5020ds.dts (revision 325825) +++ head/sys/boot/fdt/dts/powerpc/p5020ds.dts (nonexistent) @@ -1,542 +0,0 @@ -/* - * P5020DS Device Tree Source - * - * Copyright 2010-2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/* $FreeBSD$ */ - -/include/ "p5020si.dtsi" - -/ { - model = "fsl,P5020DS"; - compatible = "fsl,P5020DS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - phy_rgmii_0 = &phy_rgmii_0; - phy_rgmii_1 = &phy_rgmii_1; - phy_sgmii_1c = &phy_sgmii_1c; - phy_sgmii_1d = &phy_sgmii_1d; - phy_sgmii_1e = &phy_sgmii_1e; - phy_sgmii_1f = &phy_sgmii_1f; - phy_xgmii_1 = &phy_xgmii_1; - phy_xgmii_2 = &phy_xgmii_2; - emi1_rgmii = &hydra_mdio_rgmii; - emi1_sgmii = &hydra_mdio_sgmii; - emi2_xgmii = &hydra_mdio_xgmii; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000 0x80000000>; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - bman-portals@ff4000000 { - bman-portal@0 { - cpu-handle = <&cpu0>; - }; - bman-portal@4000 { - cpu-handle = <&cpu1>; - }; - bman-portal@8000 { - }; - bman-portal@c000 { - }; - bman-portal@10000 { - }; - bman-portal@14000 { - }; - bman-portal@18000 { - }; - bman-portal@1c000 { - }; - bman-portal@20000 { - }; - bman-portal@24000 { - }; - - buffer-pool@0 { - compatible = "fsl,p5020-bpool", "fsl,bpool"; - fsl,bpid = <0>; - fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; - }; - }; - - qman-portals@ff4200000 { - qportal0: qman-portal@0 { - cpu-handle = <&cpu0>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal1: qman-portal@4000 { - cpu-handle = <&cpu1>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal2: qman-portal@8000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal3: qman-portal@c000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal4: qman-portal@10000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal5: qman-portal@14000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal6: qman-portal@18000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal7: qman-portal@1c000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal8: qman-portal@20000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal9: qman-portal@24000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - }; - - soc: soc@ffe000000 { - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - i2c@118100 { - eeprom@51 { - compatible = "at24,24c256"; - reg = <0x51>; - }; - eeprom@52 { - compatible = "at24,24c256"; - reg = <0x52>; - }; - }; - - i2c@119100 { - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <0x1 0x1 0 0>; - }; - }; - - pme: pme@316000 { - /* Commented out, use default allocation */ - /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ - }; - - qman: qman@318000 { - /* Commented out, use default allocation */ - /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ - }; - - bman: bman@31a000 { - /* Same as fsl,qman-*, use default allocation */ - /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ - }; - - fman0: fman@400000 { - enet0: ethernet@e0000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy_rgmii_0>; - phy-connection-type = "rgmii"; - }; - - mdio0: mdio@e1120 { - tbi0: tbi-phy@8 { - reg = <0x8>; - device_type = "tbi-phy"; - }; - - /* - * Virtual MDIO for the two on-board RGMII - * ports. The fsl,hydra-mdio-muxval property - * is already correct. - */ - hydra_mdio_rgmii: hydra-mdio-rgmii { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,hydra-mdio"; - fsl,mdio-handle = <&mdio0>; - fsl,hydra-mdio-muxval = <0x00>; - status = "disabled"; - - phy_rgmii_0: ethernet-phy@0 { - reg = <0x0>; - }; - phy_rgmii_1: ethernet-phy@1 { - reg = <0x1>; - }; - }; - - /* - * Virtual MDIO for the four-port SGMII card. - * The fsl,hydra-mdio-muxval property will be - * fixed-up by U-Boot based on the slot that - * the SGMII card is in. - * - * Note: we do not support DTSEC5 connected to - * SGMII, so this is the only SGMII node. - */ - hydra_mdio_sgmii: hydra-mdio-sgmii { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,hydra-mdio"; - fsl,mdio-handle = <&mdio0>; - fsl,hydra-mdio-muxval = <0x00>; - status = "disabled"; - - phy_sgmii_1c: ethernet-phy@1c { - reg = <0x1c>; - }; - phy_sgmii_1d: ethernet-phy@1d { - reg = <0x1d>; - }; - phy_sgmii_1e: ethernet-phy@1e { - reg = <0x1e>; - }; - phy_sgmii_1f: ethernet-phy@1f { - reg = <0x1f>; - }; - }; - }; - - enet1: ethernet@e2000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy_sgmii_1d>; - phy-connection-type = "sgmii"; - }; - - mdio@e3120 { - tbi1: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@e4000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy_sgmii_1e>; - phy-connection-type = "sgmii"; - }; - - mdio@e5120 { - tbi2: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet3: ethernet@e6000 { - tbi-handle = <&tbi3>; - phy-handle = <&phy_sgmii_1f>; - phy-connection-type = "sgmii"; - }; - - mdio@e7120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe7120 0xee0>; - interrupts = <100 1 0 0>; - - tbi3: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet4: ethernet@e8000 { - tbi-handle = <&tbi4>; - phy-handle = <&phy_rgmii_1>; - phy-connection-type = "rgmii"; - }; - - mdio@e9120 { - tbi4: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet5: ethernet@f0000 { - /* - * phy-handle will be updated by U-Boot to - * reflect the actual slot the XAUI card is in. - */ - phy-handle = <&phy_xgmii_1>; - phy-connection-type = "xgmii"; - }; - - /* - * We only support one XAUI card, so the MDIO muxing - * is set by U-Boot, and Linux never touches it. - * Therefore, we don't need a virtual MDIO node. - * However, the phy address depends on the slot, so - * only one of the ethernet-phy nodes below will be - * used. - */ - hydra_mdio_xgmii: mdio@f1000 { - status = "disabled"; - - /* XAUI card in slot 1 */ - phy_xgmii_1: ethernet-phy@4 { - reg = <0x4>; - }; - - /* XAUI card in slot 2 */ - phy_xgmii_2: ethernet-phy@0 { - reg = <0x0>; - }; - }; - }; - }; - - rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xb8000000 0x04000000>; - - flash@0,0 { - compatible = "cfi-flash"; - /* - * Map 64Mb of 128MB NOR flash memory. Since highest - * line of address of NOR flash memory are set by - * FPGA, memory are divided into two pages equal to - * 64MB. One of the pages can be accessed at once. - */ - reg = <0 0 0x04000000>; - bank-width = <2>; - device-width = <2>; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - label = "NAND U-Boot Image"; - reg = <0x0 0x02000000>; - read-only; - }; - - partition@2000000 { - label = "NAND Root File System"; - reg = <0x02000000 0x10000000>; - }; - - partition@12000000 { - label = "NAND Compressed RFS Image"; - reg = <0x12000000 0x08000000>; - }; - - partition@1a000000 { - label = "NAND Linux Kernel Image"; - reg = <0x1a000000 0x04000000>; - }; - - partition@1e000000 { - label = "NAND DTB Image"; - reg = <0x1e000000 0x01000000>; - }; - - partition@1f000000 { - label = "NAND Writable User area"; - reg = <0x1f000000 0x21000000>; - }; - }; - - board-control@3,0 { - compatible = "fsl,p5020ds-fpga", "fsl,fpga-ngpixis"; - reg = <3 0 0x30>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000 - 0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x80000000 - 0x02000000 0 0x80000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x90000000 - 0x02000000 0 0x90000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff010000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe202000 { - reg = <0xf 0xfe202000 0 0x1000>; - ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xa0000000 - 0x02000000 0 0xa0000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff020000 - 0 0x00010000>; - }; - }; - - pci3: pcie@ffe203000 { - reg = <0xf 0xfe203000 0 0x1000>; - ranges = <0x02000000 0 0xb0000000 0x0 0xb0000000 0 0x08000000 - 0x01000000 0 0x00000000 0x0 0xff030000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xb0000000 - 0x02000000 0 0xb0000000 - 0 0x08000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff030000 - 0 0x00010000>; - }; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/powerpc/p5020ds.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/powerpc/p3041ds.dts =================================================================== --- head/sys/boot/fdt/dts/powerpc/p3041ds.dts (revision 325825) +++ head/sys/boot/fdt/dts/powerpc/p3041ds.dts (nonexistent) @@ -1,546 +0,0 @@ -/* - * P3041DS Device Tree Source - * - * Copyright 2010-2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/* $FreeBSD$ */ - -/include/ "p3041si.dtsi" - -/ { - model = "fsl,P3041DS"; - compatible = "fsl,P3041DS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - phy_rgmii_0 = &phy_rgmii_0; - phy_rgmii_1 = &phy_rgmii_1; - phy_sgmii_1c = &phy_sgmii_1c; - phy_sgmii_1d = &phy_sgmii_1d; - phy_sgmii_1e = &phy_sgmii_1e; - phy_sgmii_1f = &phy_sgmii_1f; - phy_xgmii_1 = &phy_xgmii_1; - phy_xgmii_2 = &phy_xgmii_2; - emi1_rgmii = &hydra_mdio_rgmii; - emi1_sgmii = &hydra_mdio_sgmii; - emi2_xgmii = &hydra_mdio_xgmii; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000 0x80000000>; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - bman-portals@ff4000000 { - bman-portal@0 { - cpu-handle = <&cpu0>; - }; - bman-portal@4000 { - cpu-handle = <&cpu1>; - }; - bman-portal@8000 { - cpu-handle = <&cpu2>; - }; - bman-portal@c000 { - cpu-handle = <&cpu3>; - }; - bman-portal@10000 { - }; - bman-portal@14000 { - }; - bman-portal@18000 { - }; - bman-portal@1c000 { - }; - bman-portal@20000 { - }; - bman-portal@24000 { - }; - - buffer-pool@0 { - compatible = "fsl,p3041-bpool", "fsl,bpool"; - fsl,bpid = <0>; - fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; - }; - }; - - qman-portals@ff4200000 { - qportal0: qman-portal@0 { - cpu-handle = <&cpu0>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal1: qman-portal@4000 { - cpu-handle = <&cpu1>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal2: qman-portal@8000 { - cpu-handle = <&cpu2>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal3: qman-portal@c000 { - cpu-handle = <&cpu3>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal4: qman-portal@10000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal5: qman-portal@14000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal6: qman-portal@18000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal7: qman-portal@1c000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal8: qman-portal@20000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal9: qman-portal@24000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - }; - - soc: soc@ffe000000 { - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <35000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - i2c@118100 { - eeprom@51 { - compatible = "at24,24c256"; - reg = <0x51>; - }; - eeprom@52 { - compatible = "at24,24c256"; - reg = <0x52>; - }; - }; - - i2c@119100 { - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <0x1 0x1 0 0>; - }; - }; - - pme: pme@316000 { - /* Commented out, use default allocation */ - /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ - }; - - qman: qman@318000 { - /* Commented out, use default allocation */ - /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ - }; - - bman: bman@31a000 { - /* Same as fsl,qman-*, use default allocation */ - /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ - }; - - fman0: fman@400000 { - enet0: ethernet@e0000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy_rgmii_0>; - phy-connection-type = "rgmii"; - }; - - mdio0: mdio@e1120 { - tbi0: tbi-phy@8 { - reg = <0x8>; - device_type = "tbi-phy"; - }; - - /* - * Virtual MDIO for the two on-board RGMII - * ports. The fsl,hydra-mdio-muxval property - * is already correct. - */ - hydra_mdio_rgmii: hydra-mdio-rgmii { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,hydra-mdio"; - fsl,mdio-handle = <&mdio0>; - fsl,hydra-mdio-muxval = <0x00>; - status = "disabled"; - - phy_rgmii_0: ethernet-phy@0 { - reg = <0x0>; - }; - phy_rgmii_1: ethernet-phy@1 { - reg = <0x1>; - }; - }; - - /* - * Virtual MDIO for the four-port SGMII card. - * The fsl,hydra-mdio-muxval property will be - * fixed-up by U-Boot based on the slot that - * the SGMII card is in. - * - * Note: we do not support DTSEC5 connected to - * SGMII, so this is the only SGMII node. - */ - hydra_mdio_sgmii: hydra-mdio-sgmii { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,hydra-mdio"; - fsl,mdio-handle = <&mdio0>; - fsl,hydra-mdio-muxval = <0x00>; - status = "disabled"; - - phy_sgmii_1c: ethernet-phy@1c { - reg = <0x1c>; - }; - phy_sgmii_1d: ethernet-phy@1d { - reg = <0x1d>; - }; - phy_sgmii_1e: ethernet-phy@1e { - reg = <0x1e>; - }; - phy_sgmii_1f: ethernet-phy@1f { - reg = <0x1f>; - }; - }; - }; - - enet1: ethernet@e2000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy_sgmii_1d>; - phy-connection-type = "sgmii"; - }; - - mdio@e3120 { - tbi1: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@e4000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy_sgmii_1e>; - phy-connection-type = "sgmii"; - }; - - mdio@e5120 { - tbi2: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet3: ethernet@e6000 { - tbi-handle = <&tbi3>; - phy-handle = <&phy_sgmii_1f>; - phy-connection-type = "sgmii"; - }; - - mdio@e7120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe7120 0xee0>; - interrupts = <100 1 0 0>; - - tbi3: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet4: ethernet@e8000 { - tbi-handle = <&tbi4>; - phy-handle = <&phy_rgmii_1>; - phy-connection-type = "rgmii"; - }; - - mdio@e9120 { - tbi4: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet5: ethernet@f0000 { - /* - * phy-handle will be updated by U-Boot to - * reflect the actual slot the XAUI card is in. - */ - phy-handle = <&phy_xgmii_1>; - phy-connection-type = "xgmii"; - }; - - /* - * We only support one XAUI card, so the MDIO muxing - * is set by U-Boot, and Linux never touches it. - * Therefore, we don't need a virtual MDIO node. - * However, the phy address depends on the slot, so - * only one of the ethernet-phy nodes below will be - * used. - */ - hydra_mdio_xgmii: mdio@f1000 { - status = "disabled"; - - /* XAUI card in slot 1 */ - phy_xgmii_1: ethernet-phy@4 { - reg = <0x4>; - }; - - /* XAUI card in slot 2 */ - phy_xgmii_2: ethernet-phy@0 { - reg = <0x0>; - }; - }; - }; - }; - - rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xb8000000 0x04000000>; - - flash@0,0 { - compatible = "cfi-flash"; - /* - * Map 64Mb of 128MB NOR flash memory. Since highest - * line of address of NOR flash memory are set by - * FPGA, memory are divided into two pages equal to - * 64MB. One of the pages can be accessed at once. - */ - reg = <0 0 0x04000000>; - bank-width = <2>; - device-width = <2>; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - label = "NAND U-Boot Image"; - reg = <0x0 0x02000000>; - read-only; - }; - - partition@2000000 { - label = "NAND Root File System"; - reg = <0x02000000 0x10000000>; - }; - - partition@12000000 { - label = "NAND Compressed RFS Image"; - reg = <0x12000000 0x08000000>; - }; - - partition@1a000000 { - label = "NAND Linux Kernel Image"; - reg = <0x1a000000 0x04000000>; - }; - - partition@1e000000 { - label = "NAND DTB Image"; - reg = <0x1e000000 0x01000000>; - }; - - partition@1f000000 { - label = "NAND Writable User area"; - reg = <0x1f000000 0x21000000>; - }; - }; - - board-control@3,0 { - compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis"; - reg = <3 0 0x30>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000 - 0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x80000000 - 0x02000000 0 0x80000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x90000000 - 0x02000000 0 0x90000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff010000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe202000 { - reg = <0xf 0xfe202000 0 0x1000>; - ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xa0000000 - 0x02000000 0 0xa0000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff020000 - 0 0x00010000>; - }; - }; - - pci3: pcie@ffe203000 { - reg = <0xf 0xfe203000 0 0x1000>; - ranges = <0x02000000 0 0xb0000000 0x0 0xb0000000 0 0x08000000 - 0x01000000 0 0x00000000 0x0 0xff030000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xb0000000 - 0x02000000 0 0xb0000000 - 0 0x08000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff030000 - 0 0x00010000>; - }; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -}; Property changes on: head/sys/boot/fdt/dts/powerpc/p3041ds.dts ___________________________________________________________________ Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Index: head/sys/boot/fdt/dts/powerpc/Makefile =================================================================== --- head/sys/boot/fdt/dts/powerpc/Makefile (revision 325825) +++ head/sys/boot/fdt/dts/powerpc/Makefile (nonexistent) @@ -1,7 +0,0 @@ -# $FreeBSD$ - -DTS!=ls *.dts - -all: test-dts - -.include Property changes on: head/sys/boot/fdt/dts/powerpc/Makefile ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/powerpc/mpc8555cds.dts =================================================================== --- head/sys/boot/fdt/dts/powerpc/mpc8555cds.dts (revision 325825) +++ head/sys/boot/fdt/dts/powerpc/mpc8555cds.dts (nonexistent) @@ -1,443 +0,0 @@ -/* - * MPC8555 CDS Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. All rights reserved - * - * Neither the name of Freescale Semiconductor, Inc nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * Freescale hereby publishes it under the following licenses: - * - * BSD License - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND - * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * GNU General Public License, version 2 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - * - * You may select the license of your choice. - *------------------------------------------------------------------ - * - * $FreeBSD$ - */ - -/dts-v1/; - -/ { - model = "MPC8555CDS"; - compatible = "MPC8555CDS", "MPC85xxCDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8555@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // 166 MHz - clock-frequency = <0>; // 825 MHz, from uboot - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x10000000>; // 256M at 0x0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,lbc", "fsl,elbc"; - reg = <0xe0005000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0x0 0x0 0xff800000 0x00800000 - 0x1 0x0 0xff000000 0x00800000 - 0x2 0x0 0xf8000000 0x00008000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x00800000>; - bank-width = <2>; - device-width = <1>; - }; - - nor@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x1 0x0 0x00800000>; - bank-width = <2>; - device-width = <1>; - }; - - rtc@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "dallas,ds1553"; - reg = <0x2 0x0 0x00008000>; - bank-width = <1>; - device-width = <1>; - }; - }; - - soc8555@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8555-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,8555-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,8555-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@80000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-cpm", "fsl,cpm2"; - reg = <0x80000 0x20000>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x10 */ - 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x12 (Slot 1) */ - 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x13 (Slot 2) */ - 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1 - - /* IDSEL 0x14 (Slot 3) */ - 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x15 (Slot 4) */ - 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* Bus 1 (Tundra Bridge) */ - /* IDSEL 0x12 (ISA bridge) */ - 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x1000000 0x0 0x0 0xfee00000 0x0 0x00010000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - - i8259@19000 { - interrupt-controller; - device_type = "interrupt-controller"; - reg = <0x19000 0x0 0x0 0x0 0x1>; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <1>; - interrupt-parent = <&pci0>; - }; - }; - - pci1: pci@e0009000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x1000000 0x0 0x0 0xfee10000 0x0 0x00010000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0009000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; Property changes on: head/sys/boot/fdt/dts/powerpc/mpc8555cds.dts ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/conf/dtb.mk =================================================================== --- head/sys/conf/dtb.mk (revision 325825) +++ head/sys/conf/dtb.mk (revision 325826) @@ -1,84 +1,84 @@ # $FreeBSD$ # # The include file handles building and installing dtb files. # # +++ variables +++ # # DTC The Device Tree Compiler to use # # DTS List of the dts files to build and install. # # DTBDIR Base path for dtb modules [/boot/dtb] # # DTBOWN .dtb file owner. [${BINOWN}] # # DTBGRP .dtb file group. [${BINGRP}] # # DTBMODE Module file mode. [${BINMODE}] # # DESTDIR The tree where the module gets installed. [not set] # # +++ targets +++ # # install: # install the kernel module; if the Makefile # does not itself define the target install, the targets # beforeinstall and afterinstall may also be used to cause # actions immediately before and after the install target # is executed. # .include # Grab all the options for a kernel build. For backwards compat, we need to # do this after bsd.own.mk. .include "kern.opts.mk" DTC?= dtc # Search for kernel source tree in standard places. .for _dir in ${.CURDIR}/../.. ${.CURDIR}/../../.. /sys /usr/src/sys .if !defined(SYSDIR) && exists(${_dir}/kern/) SYSDIR= ${_dir:tA} .endif .endfor .if !defined(SYSDIR) || !exists(${SYSDIR}/kern/) .error "can't find kernel source tree" .endif .SUFFIXES: .dtb .dts -.PATH: ${SYSDIR}/gnu/dts/${MACHINE} ${SYSDIR}/boot/fdt/dts/${MACHINE} +.PATH: ${SYSDIR}/gnu/dts/${MACHINE} ${SYSDIR}/dts/${MACHINE} DTB=${DTS:R:S/$/.dtb/} all: ${DTB} .if defined(DTS) .export DTC .for _dts in ${DTS} ${_dts:R:S/$/.dtb/}: ${_dts} ${OP_META} @echo Generating ${.TARGET} from ${_dts} @${SYSDIR}/tools/fdt/make_dtb.sh ${SYSDIR} ${_dts} ${.OBJDIR} CLEANFILES+=${_dts:R:S/$/.dtb/} .endfor .endif .if !target(install) .if !target(realinstall) realinstall: _dtbinstall .ORDER: beforeinstall _kmodinstall _dtbinstall: # Need to create this because installkernel doesn't invoke mtree with BSD.root.mtree # to make sure the tree is setup properly. We don't recreate it to avoid duplicate # entries in the NO_ROOT case. test -d ${DESTDIR}${DTBDIR} || ${INSTALL} -d -o ${DTBOWN} -g ${DTBGRP} ${DESTDIR}${DTBDIR} .for _dtb in ${DTB} ${INSTALL} -o ${DTBOWN} -g ${DTBGRP} -m ${DTBMODE} \ ${_INSTALLFLAGS} ${_dtb} ${DESTDIR}${DTBDIR}/ .endfor .endif # !target(realinstall) .endif # !target(install) .include .include .include Index: head/sys/dts/Makefile =================================================================== --- head/sys/dts/Makefile (nonexistent) +++ head/sys/dts/Makefile (revision 325826) @@ -0,0 +1,5 @@ +# $FreeBSD$ + +SUBDIR=arm arm64 mips powerpc + +.include Property changes on: head/sys/dts/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/Makefile.inc =================================================================== --- head/sys/dts/Makefile.inc (nonexistent) +++ head/sys/dts/Makefile.inc (revision 325826) @@ -0,0 +1,10 @@ +# $FreeBSD$ + +SYSDIR?=${.CURDIR}/../../../.. + +test-dts: +.for dts in ${DTS} + @env MACHINE=`basename ${.CURDIR}` ${SYSDIR}/tools/fdt/make_dtb.sh ${SYSDIR} ${dts} /tmp + +.endfor + Property changes on: head/sys/dts/Makefile.inc ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/Makefile =================================================================== --- head/sys/dts/arm/Makefile (nonexistent) +++ head/sys/dts/arm/Makefile (revision 325826) @@ -0,0 +1,7 @@ +# $FreeBSD$ + +DTS!=ls *.dts + +all: test-dts + +.include Property changes on: head/sys/dts/arm/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/a83t.dtsi =================================================================== --- head/sys/dts/arm/a83t.dtsi (nonexistent) +++ head/sys/dts/arm/a83t.dtsi (revision 325826) @@ -0,0 +1,290 @@ +/*- + * Copyright (c) 2016 Jared McNeill + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/ { + cpus { + cpu@0 { + clocks = <&c0_cpux_clk>; + clock-latency = <2000000>; + }; + + cpu@100 { + clocks = <&c1_cpux_clk>; + clock-latency = <2000000>; + }; + }; + + pmu { + compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu"; + + /* Cluster 0 only */ + interrupts = , + , + , + ; + }; + + clocks { + pll_c0cpux: clk@01c20000 { + #clock-cells = <0>; + compatible = "allwinner,sun8i-a83t-pllcpux-clk"; + reg = <0x01c20000 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll_c0cpux"; + }; + + pll_c1cpux: clk@01c20004 { + #clock-cells = <0>; + compatible = "allwinner,sun8i-a83t-pllcpux-clk"; + reg = <0x01c20004 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll_c1cpux"; + }; + + c0_cpux_clk: c0clk@01c20050 { + #clock-cells = <0>; + compatible = "allwinner,sun8i-a83t-c0cpu-clk"; + reg = <0x01c20050 0x4>; + clocks = <&osc24M>, <&pll_c0cpux>; + clock-output-names = "c0_cpux"; + }; + + c1_cpux_clk: c1clk@01c20050 { + #clock-cells = <0>; + compatible = "allwinner,sun8i-a83t-c1cpu-clk"; + reg = <0x01c20050 0x4>; + clocks = <&osc24M>, <&pll_c1cpux>; + clock-output-names = "c1_cpux"; + }; + + /* cpus_clk compatible in gnu dt is incorrect */ + cpus_clk: clk@01f01400 { + compatible = "allwinner,sun8i-a83t-cpus-clk"; + }; + + pll_hsic: clk@01c20044 { + #clock-cells = <0>; + compatible = "allwinner,sun9i-a80-pll4-clk"; + reg = <0x01c20044 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll_hsic"; + }; + + usb_clk: clk@01c200cc { + #clock-cells = <1>; + #reset-cells = <1>; + compatible = "allwinner,sun8i-a83t-usb-clk"; + reg = <0x01c200cc 0x4>; + clocks = <&osc24M>, <&pll_hsic>; + clock-indices = <8>, <9>, + <10>, <11>, + <16>; + clock-output-names = "usb_phy0", "usb_phy1", + "usb_hsic_pll", "usb_hsic_12m", + "usb_ohci0"; + }; + + mii_phy_tx_clk: clk@1 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + clock-output-names = "mii_phy_tx"; + }; + + emac_int_tx_clk: clk@2 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "emac_int_tx"; + }; + + emac_tx_clk: clk@01c00030 { + #clock-cells = <0>; + compatible = "allwinner,sun8i-a83t-emac-clk"; + reg = <0x01c00030 0x4>; + clocks = <&mii_phy_tx_clk>, <&emac_int_tx_clk>; + clock-output-names = "emac_tx"; + }; + }; + + soc { + nmi_intc: interrupt-controller@01f00c0c { + compatible = "allwinner,sun6i-a31-sc-nmi"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x01f00c0c 0x38>; + interrupts = ; + }; + + i2c0: i2c@01c2ac00 { + compatible = "allwinner,sun8i-a83t-i2c"; + reg = <0x01c2ac00 0x400>; + interrupts = ; + clocks = <&bus_gates 96>; + resets = <&apb2_reset 0>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c1: i2c@01c2b000 { + compatible = "allwinner,sun8i-a83t-i2c"; + reg = <0x01c2b000 0x400>; + interrupts = ; + clocks = <&bus_gates 97>; + resets = <&apb2_reset 1>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c2: i2c@01c2b400 { + compatible = "allwinner,sun8i-a83t-i2c"; + reg = <0x01c2b400 0x400>; + interrupts = ; + clocks = <&bus_gates 98>; + resets = <&apb2_reset 2>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + usbphy: phy@01c19400 { + compatible = "allwinner,sun8i-a83t-usb-phy"; + reg = <0x01c19400 0x2c>, + <0x01c1a800 0x4>, + <0x01c1b800 0x4>; + clocks = <&usb_clk 8>, + <&usb_clk 9>, + <&usb_clk 10>, + <&usb_clk 11>; + clock-names = "usb0_phy", + "usb1_phy", + "hsic_pll", + "hsic_12m"; + resets = <&usb_clk 0>, + <&usb_clk 1>, + <&usb_clk 2>; + reset-names = "usb0_reset", + "usb1_reset", + "usb2_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + + ehci0: usb@01c1a000 { + compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci"; + reg = <0x01c1a000 0x100>; + interrupts = ; + clocks = <&bus_gates 26>; + resets = <&ahb_reset 26>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci1: usb@01c1b000 { + compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci"; + reg = <0x01c1b000 0x100>; + interrupts = ; + clocks = <&bus_gates 27>; + resets = <&ahb_reset 27>; + phys = <&usbphy 2>; + phy-names = "usb"; + status = "disabled"; + }; + + emac: ethernet@01c30000 { + compatible = "allwinner,sun8i-a83t-emac"; + reg = <0x01c30000 0x100>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&bus_gates 17>, <&emac_tx_clk>; + clock-names = "ahb", "tx"; + resets = <&ahb_reset 17>; + reset-names = "ahb"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + sid: eeprom@01c14000 { + compatible = "allwinner,sun8i-a83t-sid"; + reg = <0x01c14000 0x400>; + }; + + rtp: rtp@01f04000 { + compatible = "allwinner,sun8i-a83t-ts"; + reg = <0x01f04000 0x400>; + interrupts = ; + #thermal-sensor-cells = <0>; + }; + }; +}; + +&pio { + mmc2_8bit_pins: mmc2_8bit { + allwinner,pins = "PC5", "PC6", "PC8", + "PC9", "PC10", "PC11", + "PC12", "PC13", "PC14", + "PC15", "PC16"; + allwinner,function = "mmc2"; + allwinner,drive = ; + allwinner,pull = ; + }; + + emac_pins_rgmii_a: emac_rgmii@0 { + allwinner,pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", + "PD11", "PD12", "PD13", "PD14", + "PD18", "PD19", "PD20", "PD21", "PD22", "PD23"; + allwinner,function = "emac"; + allwinner,drive = ; + allwinner,pull = ; + }; + + i2c0_pins_a: i2c0@0 { + allwinner,pins = "PH0", "PH1"; + allwinner,function = "i2c0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + i2c1_pins_a: i2c1@0 { + allwinner,pins = "PH2", "PH3"; + allwinner,function = "i2c1"; + allwinner,drive = ; + allwinner,pull = ; + }; + + i2c2_pins_a: i2c2@0 { + allwinner,pins = "PH4", "PH5"; + allwinner,function = "i2c2"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; Property changes on: head/sys/dts/arm/a83t.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/annapurna-alpine.dts =================================================================== --- head/sys/dts/arm/annapurna-alpine.dts (nonexistent) +++ head/sys/dts/arm/annapurna-alpine.dts (revision 325826) @@ -0,0 +1,268 @@ +/*- + * Copyright (c) 2013 Ruslan Bukin + * Copyright (c) 2015 Semihalf + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "annapurna,alpine"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + serial0 = &serial0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + d-cache-line-size = <64>; // 64 bytes + i-cache-line-size = <64>; // 64 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <375000000>; + clock-frequency = <0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + d-cache-line-size = <64>; // 64 bytes + i-cache-line-size = <64>; // 64 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <375000000>; + clock-frequency = <0>; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + d-cache-line-size = <64>; // 64 bytes + i-cache-line-size = <64>; // 64 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <375000000>; + clock-frequency = <0>; + }; + + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + d-cache-line-size = <64>; // 64 bytes + i-cache-line-size = <64>; // 64 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <375000000>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00100000 0x7ff00000>; // 2047MB at 1MB + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xfb000000 0x03000000>; + bus-frequency = <0>; + + MPIC: interrupt-controller { + compatible = "arm,gic"; + reg = < 0x1000 0x1000 >, /* Distributor Registers */ + < 0x2000 0x2000 >; /* CPU Interface Registers */ + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <3>; + + // In intr[2], bits[3:0] are trigger type and level flags. + // 1 = low-to-high edge triggered + // 2 = high-to-low edge triggered + // 4 = active high level-sensitive + // 8 = active low level-sensitive + // The hardware only supports active-high-level or rising-edge. + + }; + + generic_timer { + compatible = "arm,sp804"; + reg = <0x02890000 0x1000>; + interrupts = <0 9 4>; + interrupt-parent = <&MPIC>; + clock-frequency = <375000000>; + }; + + cpu_resume { + compatible = "annapurna-labs,al-cpu-resume"; + reg = <0x00ff5ec0 0x30>; + }; + + ccu { + compatible = "annapurna-labs,al-ccu"; + reg = <0x00090000 0x10000>; + io_coherency = <1>; + }; + + nb_service { + compatible = "annapurna-labs,al-nb-service"; + reg = <0x00070000 0x10000>; + interrupts = <0 32 4>, + <0 33 4>, + <0 34 4>, + <0 35 4>; + interrupt-parent = <&MPIC>; + }; + + wdt0 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x288c000 0x1000>; + interrupt-parent = <&MPIC>; + }; + + /* SerDes */ + serdes { + compatible = "annapurna-labs,al-serdes"; + reg = <0x28c0000 0x1000>; + }; + + serial0: serial@2883000 { + compatible = "ns16550"; + reg = <0x2883000 0x20>; + reg-shift = <2>; + current-speed = <115200>; + clock-frequency = <375000000>; + interrupts = <0 17 4>; + interrupt-parent = <&MPIC>; + }; + }; + + /* MSIX Configuration */ + msix: msix { + compatible = "annapurna-labs,al-msix"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0xfbe00000 0x100000>; + interrupts = <0 96 1 0 159 1>; + interrupt-parent = <&MPIC>; + }; + + pcie-internal { + compatible = "annapurna-labs,al-internal-pcie"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xfbc00000 0x100000>; + interrupt-parent = <&MPIC>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0x3000 0 0 1 &MPIC 0 32 4>, // USB adapter + <0x3800 0 0 1 &MPIC 0 36 4>, + <0x4000 0 0 1 &MPIC 0 43 4>, // SATA 0 (PCIe expander) + <0x4800 0 0 1 &MPIC 0 44 1>; // SATA 1 (onboard) + msi-parent = <&msix>; + + // ranges: + // - ECAM - non prefetchable config space + // - 32 bit non prefetchable memory space + ranges = <0x00000000 0x0 0xfbc00000 0xfbc00000 0x0 0x100000 + 0x02000000 0x0 0xfe000000 0xfe000000 0x0 0x1000000>; + + bus-range = <0x00 0x00>; + }; + +// WORKAROUND: enabling PCIe controller when no card is plugged in +// leads to kernel panic because u-boot disables PCIe controller if no link +// is detected. Just be kind and compatible with Linux +/* // External PCIe Controller 0 + pcie-external0 { + compatible = "annapurna-labs,al-external-pcie"; + reg = <0xfd800000 0x00020000>; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + interrupt-parent = <&MPIC>; + interrupt-map-mask = <0x00 0 0 7>; + interrupt-map = <0x0000 0 0 1 &MPIC 0 40 4>; + + // ranges: + // Controller 0: + // - ECAM - non prefetchable config space: 2MB + // - IO - IO port space 64KB, reserve 64KB from target memory windows + // real IO address on the pci bus starts at 0x10000 + // - 32 bit non prefetchable memory space: 128MB - 64KB + + ranges = <0x00000000 0x0 0xfb600000 0xfb600000 0x0 0x00200000 + 0x01000000 0x0 0x00010000 0xe0000000 0x0 0x00010000 + 0x02000000 0x0 0xe1000000 0xe1000000 0x0 0x06f00000>; + + bus-range = <0x00 0xff>; + }; + + // External PCIe Controllers 1 + pcie-external1 { + compatible = "annapurna-labs,al-external-pcie"; + reg = <0xfd820000 0x00020000>; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + interrupt-parent = <&MPIC>; + interrupt-map-mask = <0x0 0 0 7>; + interrupt-map = <0x0000 0 0 1 &MPIC 0 41 4>; + + // ranges: + // - ECAM - non prefetchable config space: 2MB + // - IO - IO port space 64KB, reserve 64KB from target memory windows + // real IO address on the pci bus starts at 0x20000 + // - 32 bit non prefetchable memory space: 64MB - 64KB + ranges = <0x00000000 0x0 0xfb800000 0xfb800000 0x0 0x00200000 + 0x01000000 0x0 0x00020000 0xe8000000 0x0 0x00010000 + 0x02000000 0x0 0xe8100000 0xe8100000 0x0 0x02ff0000>; + + bus-range = <0x00 0xff>; + }; */ + + chosen { + stdin = "serial0"; + stdout = "serial0"; + stddbg = "serial0"; + }; +}; Property changes on: head/sys/dts/arm/annapurna-alpine.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/apalis-imx6.dts =================================================================== --- head/sys/dts/arm/apalis-imx6.dts (nonexistent) +++ head/sys/dts/arm/apalis-imx6.dts (revision 325826) @@ -0,0 +1,102 @@ +/* + * Copyright (c) 2014-2015 Ruslan Bukin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include "imx6q-pinfunc.h" + +/dts-v1/; +/include/ "imx6.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + + model = "Toradex Apalis i.MX6"; + compatible = "toradex,imx6q-apalis", "fsl,imx6q"; + + memory { + reg = <0x10000000 0x40000000>; /* RAM 1GB */ + }; + + SOC: soc@00000000 { + aips@02000000 { /* AIPS1 */ + iomux@020e0000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pins_ssi>; + pins_ssi: ssi { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT16__AUD5_TXC 0x130b0 + MX6QDL_PAD_DISP0_DAT17__AUD5_TXD 0x110b0 + MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x130b0 + MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 + MX6QDL_PAD_GPIO_19__CCM_CLKO1 0x130b0 + >; + }; + }; + gpio@0209c000 { status = "okay"; }; + gpio@020a0000 { status = "okay"; }; + gpio@020a4000 { status = "okay"; }; + gpio@020a8000 { status = "okay"; }; + gpio@020ac000 { status = "okay"; }; + gpio@020b0000 { status = "okay"; }; + gpio@020b4000 { status = "okay"; }; + console:serial@02020000 { status = "okay"; }; + serial@021e8000 { status = "disabled"; }; + serial@021ec000 { status = "disabled"; }; + serial@021f0000 { status = "disabled"; }; + serial@021f4000 { status = "disabled"; }; + usbphy@020c9000 { status = "okay"; }; + usbphy@020ca000 { status = "okay"; }; + ecspi@02008000 { status = "okay"; }; + ssi@02028000 { status = "okay"; }; + sdma@020ec000 { status = "okay"; }; + }; + aips@02100000 { /* AIPS2 */ + ethernet@02188000 { + status = "okay"; + phy-mode = "rgmii"; + phy-disable-preamble; + }; + usb@02184000 { status = "okay"; }; + usb@02184200 { status = "okay"; }; + usb@02184400 { status = "disabled"; }; + usb@02184600 { status = "disabled"; }; + usdhc@02190000 { status = "disabled"; }; + usdhc@02194000 { status = "okay"; }; + usdhc@02198000 { status = "disabled"; }; + usdhc@0219c000 { status = "disabled"; }; + audmux@021d8000 { status = "okay"; }; + i2c@021a0000 { status = "okay"; }; + }; + }; + + chosen { + stdin = &console; + stdout = &console; + }; +}; Property changes on: head/sys/dts/arm/apalis-imx6.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/armada-380.dtsi =================================================================== --- head/sys/dts/arm/armada-380.dtsi (nonexistent) +++ head/sys/dts/arm/armada-380.dtsi (revision 325826) @@ -0,0 +1,163 @@ +/* + * Device Tree Include file for Marvell Armada 380 SoC. + * + * Copyright (C) 2014 Marvell + * + * Lior Amsalem + * Gregory CLEMENT + * Thomas Petazzoni + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * $FreeBSD$ + */ + +#include "armada-38x.dtsi" + +/ { + model = "Marvell Armada 380 family SoC"; + compatible = "marvell,armada380"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "marvell,armada-380-smp"; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0>; + }; + }; + + soc { + internal-regs { + pinctrl@18000 { + compatible = "marvell,mv88f6810-pinctrl"; + }; + }; + + pcie-controller { + compatible = "marvell,armada-370-pcie"; + status = "disabled"; + device_type = "pci"; + + #address-cells = <3>; + #size-cells = <2>; + + msi-parent = <&mpic>; + bus-range = <0x00 0xff>; + + ranges = + <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 + 0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 + 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 + 0x82000000 0x0 0xf1200000 MBUS_ID(0x08, 0xe8) 0xf1200000 0 0x00100000 /* Port 0 MEM */ + 0x81000000 0x0 0xf1300000 MBUS_ID(0x08, 0xe0) 0xf1300000 0 0x00100000 /* Port 0 IO */ + 0x82000000 0x0 0xf1400000 MBUS_ID(0x04, 0xe8) 0xf1400000 0 0x00100000 /* Port 1 MEM */ + 0x81000000 0x0 0xf1500000 MBUS_ID(0x04, 0xe0) 0xf1500000 0 0x00100000 /* Port 1 IO */ + 0x82000000 0x0 0xf1600000 MBUS_ID(0x04, 0xd8) 0xf1600000 0 0x00100000 /* Port 2 MEM */ + 0x81000000 0x0 0xf1700000 MBUS_ID(0x04, 0xd0) 0xf1700000 0 0x00100000 /* Port 2 IO */ + >; + + /* x1 port */ + pcie@1,0 { + compatible = "mrvl,pcie"; + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x80000 0 0x2000>; + reg = <0x0 0x0 0x80000 0x0 0x2000>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <3>; + bus-range = <0 255>; + ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1200000 0x0 0x00100000 + 0x81000000 0x0 0x0 0x81000000 0x0 0xf1300000 0x0 0x00100000>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 8>; + status = "disabled"; + }; + + /* x1 port */ + pcie@2,0 { + compatible = "mrvl,pcie"; + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; + reg = <0x0 0x0 0x40000 0x0 0x2000>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <3>; + bus-range = <0 255>; + ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1400000 0x0 0x00100000 + 0x81000000 0x0 0x0 0x81000000 0x0 0xf1500000 0x0 0x00100000>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + marvell,pcie-port = <1>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 5>; + status = "disabled"; + }; + + /* x1 port */ + pcie@3,0 { + compatible = "mrvl,pcie"; + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; + reg = <0x0 0x0 0x44000 0x0 0x2000>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <3>; + bus-range = <0 255>; + ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1600000 0x0 0x00100000 + 0x81000000 0x0 0x0 0x81000000 0x0 0xf1700000 0x0 0x00100000>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + marvell,pcie-port = <2>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 6>; + status = "disabled"; + }; + }; + }; +}; Property changes on: head/sys/dts/arm/armada-380.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/armada-385-db-ap.dts =================================================================== --- head/sys/dts/arm/armada-385-db-ap.dts (nonexistent) +++ head/sys/dts/arm/armada-385-db-ap.dts (revision 325826) @@ -0,0 +1,275 @@ +/* + * Device Tree file for Marvell Armada 385 Access Point Development board + * (DB-88F6820-AP) + * + * Copyright (C) 2014 Marvell + * + * Nadav Haklai + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * $FreeBSD$ + */ + +/dts-v1/; +#include "armada-385.dtsi" + +#include + +/ { + model = "Marvell Armada 385 Access Point Development Board"; + compatible = "marvell,a385-db-ap", "marvell,armada385", "marvell,armada380"; + + chosen { + stdout-path = "serial1"; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x80000000>; /* 2GB */ + }; + + soc { + ranges = ; + + internal-regs { + i2c0: i2c@11000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; + + /* + * This bus is wired to two EEPROM + * sockets, one of which holding the + * board ID used by the bootloader. + * Erasing this EEPROM's content will + * brick the board. + * Use this bus with caution. + */ + }; + + mdio@72004 { + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + + phy0: ethernet-phy@1 { + reg = <1>; + }; + + phy1: ethernet-phy@4 { + reg = <4>; + }; + + phy2: ethernet-phy@6 { + reg = <6>; + }; + }; + + /* UART0 is exposed through the JP8 connector */ + uart0: serial@12000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; + }; + + /* + * UART1 is exposed through a FTDI chip + * wired to the mini-USB connector + */ + uart1: serial@12100 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; + }; + + pinctrl@18000 { + xhci0_vbus_pins: xhci0-vbus-pins { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + }; + + /* CON3 */ + ethernet@30000 { + status = "okay"; + phy = <&phy2>; + phy-mode = "sgmii"; + buffer-manager = <&bm>; + bm,pool-long = <1>; + bm,pool-short = <3>; + }; + + /* CON2 */ + ethernet@34000 { + status = "okay"; + phy = <&phy1>; + phy-mode = "sgmii"; + buffer-manager = <&bm>; + bm,pool-long = <2>; + bm,pool-short = <3>; + }; + + usb@58000 { + status = "okay"; + }; + + /* CON4 */ + ethernet@70000 { + pinctrl-names = "default"; + + /* + * The Reference Clock 0 is used to + * provide a clock to the PHY + */ + pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; + status = "okay"; + phy = <&phy0>; + phy-mode = "rgmii-id"; + buffer-manager = <&bm>; + bm,pool-long = <0>; + bm,pool-short = <3>; + }; + + crypto@90000 { + status = "okay"; + }; + + crypto@92000 { + status = "okay"; + }; + + bm@c8000 { + status = "okay"; + }; + + nfc: flash@d0000 { + status = "okay"; + num-cs = <1>; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + marvell,nand-keep-config; + marvell,nand-enable-arbiter; + nand-on-flash-bbt; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "U-Boot"; + reg = <0x00000000 0x00800000>; + read-only; + }; + + partition@800000 { + label = "uImage"; + reg = <0x00800000 0x00400000>; + read-only; + }; + + partition@c00000 { + label = "Root"; + reg = <0x00c00000 0x3f400000>; + }; + }; + }; + + usb3@f0000 { + status = "okay"; + usb-phy = <&usb3_phy>; + }; + }; + + bm-bppi { + status = "okay"; + }; + + pcie-controller { + status = "okay"; + + /* + * The three PCIe units are accessible through + * standard mini-PCIe slots on the board. + */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + + pcie@2,0 { + /* Port 1, Lane 0 */ + status = "okay"; + }; + + pcie@3,0 { + /* Port 2, Lane 0 */ + status = "okay"; + }; + }; + }; + + usb3_phy: usb3_phy { + compatible = "usb-nop-xceiv"; + vcc-supply = <®_xhci0_vbus>; + }; + + reg_xhci0_vbus: xhci0-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&xhci0_vbus_pins>; + regulator-name = "xhci0-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; + }; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p128", "jedec,spi-nor"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <54000000>; + }; +}; Property changes on: head/sys/dts/arm/armada-385-db-ap.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/armada-385.dtsi =================================================================== --- head/sys/dts/arm/armada-385.dtsi (nonexistent) +++ head/sys/dts/arm/armada-385.dtsi (revision 325826) @@ -0,0 +1,200 @@ +/* + * Device Tree Include file for Marvell Armada 385 SoC. + * + * Copyright (C) 2014 Marvell + * + * Lior Amsalem + * Gregory CLEMENT + * Thomas Petazzoni + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * $FreeBSD$ + */ + +#include "armada-38x.dtsi" + +/ { + model = "Marvell Armada 385 family SoC"; + compatible = "marvell,armada385", "marvell,armada380"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "marvell,armada-380-smp"; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0>; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <1>; + }; + }; + + soc { + internal-regs { + pinctrl@18000 { + compatible = "marvell,mv88f6820-pinctrl"; + }; + }; + + pcie-controller { + compatible = "marvell,armada-370-pcie"; + status = "disabled"; + device_type = "pci"; + + #address-cells = <3>; + #size-cells = <2>; + + msi-parent = <&mpic>; + bus-range = <0x00 0xff>; + + ranges = + <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 + 0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 + 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 + 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 + 0x82000000 0x0 0xf1200000 MBUS_ID(0x08, 0xe8) 0xf1200000 0 0x00100000 /* Port 0 MEM */ + 0x81000000 0x0 0xf1300000 MBUS_ID(0x08, 0xe0) 0xf1300000 0 0x00100000 /* Port 0 IO */ + 0x82000000 0x0 0xf1400000 MBUS_ID(0x04, 0xe8) 0xf1400000 0 0x00100000 /* Port 1 MEM */ + 0x81000000 0x0 0xf1500000 MBUS_ID(0x04, 0xe0) 0xf1500000 0 0x00100000 /* Port 1 IO */ + 0x82000000 0x0 0xf1600000 MBUS_ID(0x04, 0xd8) 0xf1600000 0 0x00100000 /* Port 2 MEM */ + 0x81000000 0x0 0xf1700000 MBUS_ID(0x04, 0xd0) 0xf1700000 0 0x00100000 /* Port 2 IO */ + 0x82000000 0x0 0xf1800000 MBUS_ID(0x04, 0xb8) 0xf1800000 0 0x00100000 /* Port 3 MEM */ + 0x81000000 0x0 0xf1900000 MBUS_ID(0x04, 0xb0) 0xf1900000 0 0x00100000 /* Port 3 IO */ + >; + + /* + * This port can be either x4 or x1. When + * configured in x4 by the bootloader, then + * pcie@4,0 is not available. + */ + pcie@1,0 { + compatible = "mrvl,pcie"; + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x80000 0 0x2000>; + reg = <0x0 0x0 0x80000 0x0 0x2000>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <3>; + bus-range = <0 255>; + ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1200000 0x0 0x00100000 + 0x81000000 0x0 0x0 0x81000000 0x0 0xf1300000 0x0 0x00100000>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 8>; + status = "disabled"; + }; + + /* x1 port */ + pcie@2,0 { + compatible = "mrvl,pcie"; + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; + reg = <0x0 0x0 0x40000 0x0 0x2000>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <3>; + bus-range = <0 255>; + ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1400000 0x0 0x00100000 + 0x81000000 0x0 0x0 0x81000000 0x0 0xf1500000 0x0 0x00100000>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + marvell,pcie-port = <1>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 5>; + status = "disabled"; + }; + + /* x1 port */ + pcie@3,0 { + compatible = "mrvl,pcie"; + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; + reg = <0x0 0x0 0x44000 0x0 0x2000>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <3>; + bus-range = <0 255>; + ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1600000 0x0 0x00100000 + 0x81000000 0x0 0x0 0x81000000 0x0 0xf1700000 0x0 0x00100000>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + marvell,pcie-port = <2>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 6>; + status = "disabled"; + }; + + /* + * x1 port only available when pcie@1,0 is + * configured as a x1 port + */ + pcie@4,0 { + compatible = "mrvl,pcie"; + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x48000 0 0x2000>; + reg = <0x0 0x0 0x48000 0x0 0x2000>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <3>; + bus-range = <0 255>; + ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1800000 0x0 0x00100000 + 0x81000000 0x0 0x0 0x81000000 0x0 0xf1900000 0x0 0x00100000>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + marvell,pcie-port = <3>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 7>; + status = "disabled"; + }; + }; + }; + +}; Property changes on: head/sys/dts/arm/armada-385.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/armada-388-clearfog.dts =================================================================== --- head/sys/dts/arm/armada-388-clearfog.dts (nonexistent) +++ head/sys/dts/arm/armada-388-clearfog.dts (revision 325826) @@ -0,0 +1,459 @@ +/* + * Device Tree file for SolidRun Clearfog revision A1 rev 2.0 (88F6828) + * + * Copyright (C) 2015 Russell King + * + * This board is in development; the contents of this file work with + * the A1 rev 2.0 of the board, which does not represent final + * production board. Things will change, don't expect this file to + * remain compatible info the future. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * $FreeBSD$ + */ + +/dts-v1/; +#include "armada-388.dtsi" +#include "armada-38x-solidrun-microsom.dtsi" + +/ { + model = "SolidRun Clearfog A1"; + compatible = "solidrun,clearfog-a1", "marvell,armada388", + "marvell,armada385", "marvell,armada380"; + + aliases { + /* So that mvebu u-boot can update the MAC addresses */ + ethernet1 = ð0; + ethernet2 = ð1; + ethernet3 = ð2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + soc { + internal-regs { + ethernet@30000 { + phy-mode = "sgmii"; + buffer-manager = <&bm>; + bm,pool-long = <2>; + bm,pool-short = <1>; + status = "okay"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + ethernet@34000 { + phy-mode = "sgmii"; + buffer-manager = <&bm>; + bm,pool-long = <3>; + bm,pool-short = <1>; + status = "okay"; + managed = "in-band-status"; + }; + + i2c@11000 { + /* Is there anything on this? */ + clock-frequency = <100000>; + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + status = "okay"; + + /* + * PCA9655 GPIO expander, up to 1MHz clock. + * 0-CON3 CLKREQ# + * 1-CON3 PERST# + * 2-CON2 PERST# + * 3-CON3 W_DISABLE + * 4-CON2 CLKREQ# + * 5-USB3 overcurrent + * 6-USB3 power + * 7-CON2 W_DISABLE + * 8-JP4 P1 + * 9-JP4 P4 + * 10-JP4 P5 + * 11-m.2 DEVSLP + * 12-SFP_LOS + * 13-SFP_TX_FAULT + * 14-SFP_TX_DISABLE + * 15-SFP_MOD_DEF0 + */ + expander0: gpio-expander@20 { + /* + * This is how it should be: + * compatible = "onnn,pca9655", + * "nxp,pca9555"; + * but you can't do this because of + * the way I2C works. + */ + compatible = "nxp,pca9555"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + + pcie1_0_clkreq { + gpio-hog; + gpios = <0 GPIO_ACTIVE_LOW>; + input; + line-name = "pcie1.0-clkreq"; + }; + pcie1_0_w_disable { + gpio-hog; + gpios = <3 GPIO_ACTIVE_LOW>; + output-low; + line-name = "pcie1.0-w-disable"; + }; + pcie2_0_clkreq { + gpio-hog; + gpios = <4 GPIO_ACTIVE_LOW>; + input; + line-name = "pcie2.0-clkreq"; + }; + pcie2_0_w_disable { + gpio-hog; + gpios = <7 GPIO_ACTIVE_LOW>; + output-low; + line-name = "pcie2.0-w-disable"; + }; + usb3_ilimit { + gpio-hog; + gpios = <5 GPIO_ACTIVE_LOW>; + input; + line-name = "usb3-current-limit"; + }; + usb3_power { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "usb3-power"; + }; + m2_devslp { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "m.2 devslp"; + }; + sfp_los { + /* SFP loss of signal */ + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + input; + line-name = "sfp-los"; + }; + sfp_tx_fault { + /* SFP laser fault */ + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + input; + line-name = "sfp-tx-fault"; + }; + sfp_tx_disable { + /* SFP transmit disable */ + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "sfp-tx-disable"; + }; + sfp_mod_def0 { + /* SFP module present */ + gpio-hog; + gpios = <15 GPIO_ACTIVE_LOW>; + input; + line-name = "sfp-mod-def0"; + }; + }; + + /* The MCP3021 is 100kHz clock only */ + mikrobus_adc: mcp3021@4c { + compatible = "microchip,mcp3021"; + reg = <0x4c>; + }; + + /* Also something at 0x64 */ + }; + + i2c@11100 { + /* + * Routed to SFP, mikrobus, and PCIe. + * SFP limits this to 100kHz, and requires + * an AT24C01A/02/04 with address pins tied + * low, which takes addresses 0x50 and 0x51. + * Mikrobus doesn't specify beyond an I2C + * bus being present. + * PCIe uses ARP to assign addresses, or + * 0x63-0x64. + */ + clock-frequency = <100000>; + pinctrl-0 = <&clearfog_i2c1_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + + pinctrl@18000 { + clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins { + marvell,pins = "mpp46"; + marvell,function = "ref"; + }; + clearfog_dsa0_pins: clearfog-dsa0-pins { + marvell,pins = "mpp23", "mpp41"; + marvell,function = "gpio"; + }; + clearfog_i2c1_pins: i2c1-pins { + /* SFP, PCIe, mSATA, mikrobus */ + marvell,pins = "mpp26", "mpp27"; + marvell,function = "i2c1"; + }; + clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins { + marvell,pins = "mpp20"; + marvell,function = "gpio"; + }; + clearfog_sdhci_pins: clearfog-sdhci-pins { + marvell,pins = "mpp21", "mpp28", + "mpp37", "mpp38", + "mpp39", "mpp40"; + marvell,function = "sd0"; + }; + clearfog_spi1_cs_pins: spi1-cs-pins { + marvell,pins = "mpp55"; + marvell,function = "spi1"; + }; + mikro_pins: mikro-pins { + /* int: mpp22 rst: mpp29 */ + marvell,pins = "mpp22", "mpp29"; + marvell,function = "gpio"; + }; + mikro_spi_pins: mikro-spi-pins { + marvell,pins = "mpp43"; + marvell,function = "spi1"; + }; + mikro_uart_pins: mikro-uart-pins { + marvell,pins = "mpp24", "mpp25"; + marvell,function = "ua1"; + }; + rear_button_pins: rear-button-pins { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; + }; + + sata@a8000 { + /* pinctrl? */ + status = "okay"; + }; + + sata@e0000 { + /* pinctrl? */ + status = "okay"; + }; + + sdhci@d8000 { + bus-width = <4>; + cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; + no-1-8-v; + pinctrl-0 = <&clearfog_sdhci_pins + &clearfog_sdhci_cd_pins>; + pinctrl-names = "default"; + status = "okay"; + vmmc = <®_3p3v>; + wp-inverted; + }; + + serial@12100 { + /* mikrobus uart */ + pinctrl-0 = <&mikro_uart_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + + usb@58000 { + /* CON3, nearest power. */ + status = "okay"; + }; + + crypto@90000 { + status = "okay"; + }; + + crypto@92000 { + status = "okay"; + }; + + usb3@f0000 { + /* CON2, nearest CPU, USB2 only. */ + status = "okay"; + }; + + usb3@f8000 { + /* CON7 */ + status = "okay"; + }; + }; + + pcie-controller { + status = "okay"; + /* + * The two PCIe units are accessible through + * the mini-PCIe connectors on the board. + */ + pcie@2,0 { + /* Port 1, Lane 0. CON3, nearest power. */ + reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + pcie@3,0 { + /* Port 2, Lane 0. CON2, nearest CPU. */ + reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + }; + }; + + dsa@0 { + compatible = "marvell,dsa"; + dsa,ethernet = <ð1>; + dsa,mii-bus = <&mdio>; + pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>; + pinctrl-names = "default"; + #address-cells = <2>; + #size-cells = <0>; + + switch@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4 0>; + + port@0 { + reg = <0>; + label = "lan5"; + vlangroup = <0>; + }; + + port@1 { + reg = <1>; + label = "lan4"; + vlangroup = <0>; + }; + + port@2 { + reg = <2>; + label = "lan3"; + vlangroup = <0>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + vlangroup = <0>; + }; + + port@4 { + reg = <4>; + label = "lan1"; + vlangroup = <0>; + }; + + port@5 { + reg = <5>; + label = "cpu"; + vlangroup = <0>; + }; + + port@6 { + /* 88E1512 external phy */ + reg = <6>; + label = "lan6"; + vlangroup = <0>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-0 = <&rear_button_pins>; + pinctrl-names = "default"; + + button_0 { + /* The rear SW3 button */ + label = "Rear Button"; + gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; + linux,can-disable; + linux,code = ; + }; + }; +}; + +&spi1 { + /* + * We don't seem to have the W25Q32 on the + * A1 Rev 2.0 boards, so disable SPI. + * CS0: W25Q32 (doesn't appear to be present) + * CS1: + * CS2: mikrobus + */ + pinctrl-0 = <&spi1_pins + &clearfog_spi1_cs_pins + &mikro_spi_pins>; + pinctrl-names = "default"; + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "w25q32", "jedec,spi-nor"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <3000000>; + status = "disabled"; + }; +}; Property changes on: head/sys/dts/arm/armada-388-clearfog.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/armada-388-gp.dts =================================================================== --- head/sys/dts/arm/armada-388-gp.dts (nonexistent) +++ head/sys/dts/arm/armada-388-gp.dts (revision 325826) @@ -0,0 +1,425 @@ +/* + * Device Tree file for Marvell Armada 385 development board + * (RD-88F6820-GP) + * + * Copyright (C) 2014 Marvell + * + * Gregory CLEMENT + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * $FreeBSD$ + */ + +/dts-v1/; +#include "armada-388.dtsi" +#include + +/ { + model = "Marvell Armada 385 GP"; + compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x80000000>; /* 2 GB */ + }; + + soc { + ranges = ; + + internal-regs { + crypto@90000 { + status = "okay"; + }; + crypto@92000 { + status = "okay"; + }; + + spi@10600 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>; + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p128", "jedec,spi-nor"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <50000000>; + m25p,fast-read; + }; + }; + + i2c@11000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; + clock-frequency = <100000>; + /* + * The EEPROM located at adresse 54 is needed + * for the boot - DO NOT ERASE IT - + */ + + expander0: pca9555@20 { + compatible = "nxp,pca9555"; + pinctrl-names = "default"; + pinctrl-0 = <&pca0_pins>; + interrupt-parent = <&gpio0>; + interrupts = <18 IRQ_TYPE_EDGE_FALLING>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x20>; + }; + + expander1: pca9555@21 { + compatible = "nxp,pca9555"; + pinctrl-names = "default"; + interrupt-parent = <&gpio0>; + interrupts = <18 IRQ_TYPE_EDGE_FALLING>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x21>; + }; + + }; + + serial@12000 { + /* + * Exported on the micro USB connector CON16 + * through an FTDI + */ + + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; + }; + + /* GE1 CON15 */ + ethernet@30000 { + pinctrl-names = "default"; + pinctrl-0 = <&ge1_rgmii_pins>; + status = "okay"; + phy = <&phy1>; + phy-mode = "rgmii-id"; + }; + + /* CON4 */ + usb@58000 { + vcc-supply = <®_usb2_0_vbus>; + status = "okay"; + }; + + /* GE0 CON1 */ + ethernet@70000 { + pinctrl-names = "default"; + /* + * The Reference Clock 0 is used to provide a + * clock to the PHY + */ + pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; + status = "okay"; + phy = <&phy0>; + phy-mode = "rgmii-id"; + }; + + + mdio@72004 { + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + + phy0: ethernet-phy@1 { + reg = <1>; + }; + + phy1: ethernet-phy@0 { + reg = <0>; + }; + }; + + sata@a8000 { + pinctrl-names = "default"; + pinctrl-0 = <&sata0_pins>, <&sata1_pins>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + sata0: sata-port@0 { + reg = <0>; + target-supply = <®_5v_sata0>; + }; + + sata1: sata-port@1 { + reg = <1>; + target-supply = <®_5v_sata1>; + }; + }; + + sata@e0000 { + pinctrl-names = "default"; + pinctrl-0 = <&sata2_pins>, <&sata3_pins>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + sata2: sata-port@0 { + reg = <0>; + target-supply = <®_5v_sata2>; + }; + + sata3: sata-port@1 { + reg = <1>; + target-supply = <®_5v_sata3>; + }; + }; + + sdhci@d8000 { + pinctrl-names = "default"; + pinctrl-0 = <&sdhci_pins>; + cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>; + no-1-8-v; + wp-inverted; + bus-width = <8>; + status = "okay"; + }; + + /* CON5 */ + usb3@f0000 { + vcc-supply = <®_usb2_1_vbus>; + status = "okay"; + }; + + /* CON7 */ + usb3@f8000 { + vcc-supply = <®_usb3_vbus>; + status = "okay"; + }; + }; + + gpio-fan { + compatible = "gpio-fan"; + gpios = <&expander1 3 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 3000 1>; + }; + pcie-controller { + status = "okay"; + /* + * One PCIe units is accessible through + * standard PCIe slot on the board. + */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + + /* + * The two other PCIe units are accessible + * through mini PCIe slot on the board. + */ + pcie@2,0 { + /* Port 1, Lane 0 */ + status = "okay"; + }; + pcie@3,0 { + /* Port 2, Lane 0 */ + status = "okay"; + }; + }; + }; + + + reg_usb3_vbus: usb3-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb3-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + gpio = <&expander1 15 GPIO_ACTIVE_HIGH>; + }; + + reg_usb2_0_vbus: v5-vbus0 { + compatible = "regulator-fixed"; + regulator-name = "v5.0-vbus0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + gpio = <&expander1 14 GPIO_ACTIVE_HIGH>; + }; + + reg_usb2_1_vbus: v5-vbus1 { + compatible = "regulator-fixed"; + regulator-name = "v5.0-vbus1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; + }; + + reg_usb2_1_vbus: v5-vbus1 { + compatible = "regulator-fixed"; + regulator-name = "v5.0-vbus1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; + }; + + reg_sata0: pwr-sata0 { + compatible = "regulator-fixed"; + regulator-name = "pwr_en_sata0"; + enable-active-high; + regulator-always-on; + + }; + + reg_5v_sata0: v5-sata0 { + compatible = "regulator-fixed"; + regulator-name = "v5.0-sata0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <®_sata0>; + }; + + reg_12v_sata0: v12-sata0 { + compatible = "regulator-fixed"; + regulator-name = "v12.0-sata0"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + vin-supply = <®_sata0>; + }; + + reg_sata1: pwr-sata1 { + regulator-name = "pwr_en_sata1"; + compatible = "regulator-fixed"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + regulator-always-on; + gpio = <&expander0 3 GPIO_ACTIVE_HIGH>; + }; + + reg_5v_sata1: v5-sata1 { + compatible = "regulator-fixed"; + regulator-name = "v5.0-sata1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <®_sata1>; + }; + + reg_12v_sata1: v12-sata1 { + compatible = "regulator-fixed"; + regulator-name = "v12.0-sata1"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + vin-supply = <®_sata1>; + }; + + reg_sata2: pwr-sata2 { + compatible = "regulator-fixed"; + regulator-name = "pwr_en_sata2"; + enable-active-high; + regulator-always-on; + gpio = <&expander0 11 GPIO_ACTIVE_HIGH>; + }; + + reg_5v_sata2: v5-sata2 { + compatible = "regulator-fixed"; + regulator-name = "v5.0-sata2"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <®_sata2>; + }; + + reg_12v_sata2: v12-sata2 { + compatible = "regulator-fixed"; + regulator-name = "v12.0-sata2"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + vin-supply = <®_sata2>; + }; + + reg_sata3: pwr-sata3 { + compatible = "regulator-fixed"; + regulator-name = "pwr_en_sata3"; + enable-active-high; + regulator-always-on; + gpio = <&expander0 12 GPIO_ACTIVE_HIGH>; + }; + + reg_5v_sata3: v5-sata3 { + compatible = "regulator-fixed"; + regulator-name = "v5.0-sata3"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <®_sata3>; + }; + + reg_12v_sata3: v12-sata3 { + compatible = "regulator-fixed"; + regulator-name = "v12.0-sata3"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + vin-supply = <®_sata3>; + }; +}; + +&pinctrl { + pca0_pins: pca0_pins { + marvell,pins = "mpp18"; + marvell,function = "gpio"; + }; +}; Property changes on: head/sys/dts/arm/armada-388-gp.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/armada-388.dtsi =================================================================== --- head/sys/dts/arm/armada-388.dtsi (nonexistent) +++ head/sys/dts/arm/armada-388.dtsi (revision 325826) @@ -0,0 +1,72 @@ +/* + * Device Tree Include file for Marvell Armada 388 SoC. + * + * Copyright (C) 2015 Marvell + * + * Gregory CLEMENT + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * + * The main difference with the Armada 385 is that the 388 can handle two more + * SATA ports. So we can reuse the dtsi of the Armada 385, override the pinctrl + * property and the name of the SoC, and add the second SATA host which control + * the 2 other ports. + * + * $FreeBSD$ + */ + +#include "armada-385.dtsi" + +/ { + model = "Marvell Armada 388 family SoC"; + compatible = "marvell,armada388", "marvell,armada385", + "marvell,armada380"; + + soc { + internal-regs { + pinctrl@18000 { + compatible = "marvell,mv88f6828-pinctrl"; + }; + + sata@e0000 { + compatible = "marvell,armada-380-ahci"; + reg = <0xe0000 0x2000>; + interrupts = ; + clocks = <&gateclk 30>; + status = "disabled"; + }; + + }; + }; +}; Property changes on: head/sys/dts/arm/armada-388.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/armada-38x-solidrun-microsom.dtsi =================================================================== --- head/sys/dts/arm/armada-38x-solidrun-microsom.dtsi (nonexistent) +++ head/sys/dts/arm/armada-38x-solidrun-microsom.dtsi (revision 325826) @@ -0,0 +1,130 @@ +/* + * Device Tree file for SolidRun Armada 38x Microsom + * + * Copyright (C) 2015 Russell King + * + * This board is in development; the contents of this file work with + * the A1 rev 2.0 of the board, which does not represent final + * production board. Things will change, don't expect this file to + * remain compatible info the future. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * $FreeBSD$ + */ +#include +#include + +/ { + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; /* 256 MB */ + }; + + soc { + ranges = ; + + internal-regs { + ethernet@70000 { + pinctrl-0 = <&ge0_rgmii_pins>; + pinctrl-names = "default"; + phy = <&phy_dedicated>; + phy-mode = "rgmii-id"; + buffer-manager = <&bm>; + bm,pool-long = <0>; + bm,pool-short = <1>; + status = "okay"; + }; + + mdio@72004 { + /* + * Add the phy clock here, so the phy can be + * accessed to read its IDs prior to binding + * with the driver. + */ + pinctrl-0 = <&mdio_pins µsom_phy_clk_pins>; + pinctrl-names = "default"; + + phy_dedicated: ethernet-phy@0 { + /* + * Annoyingly, the marvell phy driver + * configures the LED register, rather + * than preserving reset-loaded setting. + * We undo that rubbish here. + */ + marvell,reg-init = <3 16 0 0x101e>; + reg = <0>; + }; + }; + + pinctrl@18000 { + microsom_phy_clk_pins: microsom-phy-clk-pins { + marvell,pins = "mpp45"; + marvell,function = "ref"; + }; + }; + + rtc@a3800 { + /* + * If the rtc doesn't work, run "date reset" + * twice in u-boot. + */ + status = "okay"; + }; + + serial@12000 { + pinctrl-0 = <&uart0_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + + bm@c8000 { + status = "okay"; + }; + }; + + bm-bppi { + status = "okay"; + }; + + }; +}; Property changes on: head/sys/dts/arm/armada-38x-solidrun-microsom.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/armada-38x.dtsi =================================================================== --- head/sys/dts/arm/armada-38x.dtsi (nonexistent) +++ head/sys/dts/arm/armada-38x.dtsi (revision 325826) @@ -0,0 +1,664 @@ +/* + * Device Tree Include file for Marvell Armada 38x family of SoCs. + * + * Copyright (C) 2014 Marvell + * + * Lior Amsalem + * Gregory CLEMENT + * Thomas Petazzoni + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * $FreeBSD$ + */ + +#include "skeleton.dtsi" +#include +#include + +#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) + +/ { + model = "Marvell Armada 38x family SoC"; + compatible = "marvell,armada380"; + + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + serial0 = &uart0; + serial1 = &uart1; + sram0 = &SRAM0; + sram1 = &SRAM1; + }; + + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts-extended = <&mpic 3>; + }; + + SRAM0: sram@f1100000 { + compatible = "mrvl,cesa-sram"; + reg = <0xf1100000 0x0010000>; + }; + + SRAM1: sram@f1110000 { + compatible = "mrvl,cesa-sram"; + reg = <0xf1110000 0x0010000>; + }; + + soc { + compatible = "marvell,armada380-mbus", "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + controller = <&mbusc>; + interrupt-parent = <&gic>; + pcie-mem-aperture = <0xe0000000 0x8000000>; + pcie-io-aperture = <0xe8000000 0x100000>; + + bootrom { + compatible = "marvell,bootrom"; + reg = ; + }; + + devbus-bootcs { + compatible = "marvell,mvebu-devbus"; + reg = ; + ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + devbus-cs0 { + compatible = "marvell,mvebu-devbus"; + reg = ; + ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + devbus-cs1 { + compatible = "marvell,mvebu-devbus"; + reg = ; + ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + devbus-cs2 { + compatible = "marvell,mvebu-devbus"; + reg = ; + ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + devbus-cs3 { + compatible = "marvell,mvebu-devbus"; + reg = ; + ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + internal-regs { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>; + + crypto@90000 { + compatible = "mrvl,cesa"; + reg = <0x90000 0x1000 /* tdma base reg chan 0 */ + 0x9D000 0x1000>; /* cesa base reg chan 0 */ + interrupts = ; + interrupt-parent = <&gic>; + sram-handle = <&SRAM0>; + status = "disabled"; + }; + + crypto@92000 { + compatible = "mrvl,cesa"; + reg = <0x92000 0x1000 /* tdma base reg chan 1 */ + 0x9F000 0x1000>; /* cesa base reg chan 1 */ + interrupts = ; + interrupt-parent = <&gic>; + sram-handle = <&SRAM1>; + status = "disabled"; + }; + + L2: cache-controller@8000 { + compatible = "arm,pl310-cache"; + reg = <0x8000 0x1000>; + cache-unified; + cache-level = <2>; + arm,double-linefill-incr = <1>; + arm,double-linefill-wrap = <0>; + arm,double-linefill = <1>; + prefetch-data = <1>; + }; + + scu@c000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xc000 0x58>; + }; + + timer@c200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0xc200 0x20>; + interrupts = ; + clocks = <&coreclk 2>; + }; + + timer@c600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xc600 0x20>; + interrupts = ; + clocks = <&coreclk 2>; + }; + + gic: interrupt-controller@d000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #size-cells = <0>; + interrupt-controller; + reg = <0xd000 0x1000>, + <0xc100 0x100>; + }; + + spi0: spi@10600 { + compatible = "marvell,armada-380-spi", + "marvell,orion-spi"; + reg = <0x10600 0x50>; + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + interrupts = ; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + spi1: spi@10680 { + compatible = "marvell,armada-380-spi", + "marvell,orion-spi"; + reg = <0x10680 0x50>; + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + interrupts = ; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + i2c0: i2c@11000 { + compatible = "marvell,mv64xxx-i2c"; + reg = <0x11000 0x20>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + timeout-ms = <1000>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + i2c1: i2c@11100 { + compatible = "marvell,mv64xxx-i2c"; + reg = <0x11100 0x20>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + timeout-ms = <1000>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + uart0: serial@12000 { + compatible = "snps,dw-apb-uart"; + reg = <0x12000 0x100>; + reg-shift = <2>; + interrupts = ; + reg-io-width = <1>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + uart1: serial@12100 { + compatible = "snps,dw-apb-uart"; + reg = <0x12100 0x100>; + reg-shift = <2>; + interrupts = ; + reg-io-width = <1>; + clocks = <&coreclk 0>; + status = "disabled"; + }; + + pinctrl: pinctrl@18000 { + reg = <0x18000 0x20>; + + ge0_rgmii_pins: ge-rgmii-pins-0 { + marvell,pins = "mpp6", "mpp7", "mpp8", + "mpp9", "mpp10", "mpp11", + "mpp12", "mpp13", "mpp14", + "mpp15", "mpp16", "mpp17"; + marvell,function = "ge0"; + }; + + ge1_rgmii_pins: ge-rgmii-pins-1 { + marvell,pins = "mpp21", "mpp27", "mpp28", + "mpp29", "mpp30", "mpp31", + "mpp32", "mpp37", "mpp38", + "mpp39", "mpp40", "mpp41"; + marvell,function = "ge1"; + }; + + i2c0_pins: i2c-pins-0 { + marvell,pins = "mpp2", "mpp3"; + marvell,function = "i2c0"; + }; + + mdio_pins: mdio-pins { + marvell,pins = "mpp4", "mpp5"; + marvell,function = "ge"; + }; + + ref_clk0_pins: ref-clk-pins-0 { + marvell,pins = "mpp45"; + marvell,function = "ref"; + }; + + ref_clk1_pins: ref-clk-pins-1 { + marvell,pins = "mpp46"; + marvell,function = "ref"; + }; + + spi0_pins: spi-pins-0 { + marvell,pins = "mpp22", "mpp23", "mpp24", + "mpp25"; + marvell,function = "spi0"; + }; + + spi1_pins: spi-pins-1 { + marvell,pins = "mpp56", "mpp57", "mpp58", + "mpp59"; + marvell,function = "spi1"; + }; + + uart0_pins: uart-pins-0 { + marvell,pins = "mpp0", "mpp1"; + marvell,function = "ua0"; + }; + + uart1_pins: uart-pins-1 { + marvell,pins = "mpp19", "mpp20"; + marvell,function = "ua1"; + }; + + sdhci_pins: sdhci-pins { + marvell,pins = "mpp48", "mpp49", "mpp50", + "mpp52", "mpp53", "mpp54", + "mpp55", "mpp57", "mpp58", + "mpp59"; + marvell,function = "sd0"; + }; + + sata0_pins: sata-pins-0 { + marvell,pins = "mpp20"; + marvell,function = "sata0"; + }; + + sata1_pins: sata-pins-1 { + marvell,pins = "mpp19"; + marvell,function = "sata1"; + }; + + sata2_pins: sata-pins-2 { + marvell,pins = "mpp47"; + marvell,function = "sata2"; + }; + + sata3_pins: sata-pins-3 { + marvell,pins = "mpp44"; + marvell,function = "sata3"; + }; + }; + + gpio0: gpio@18100 { + compatible = "marvell,orion-gpio"; + reg = <0x18100 0x40>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = , + , + , + ; + }; + + gpio1: gpio@18140 { + compatible = "marvell,orion-gpio"; + reg = <0x18140 0x40>; + ngpios = <28>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = , + , + , + ; + }; + + system-controller@18200 { + compatible = "marvell,armada-380-system-controller", + "marvell,armada-370-xp-system-controller"; + reg = <0x18200 0x100>; + }; + + gateclk: clock-gating-control@18220 { + compatible = "marvell,armada-380-gating-clock"; + reg = <0x18220 0x4>; + clocks = <&coreclk 0>; + #clock-cells = <1>; + }; + + coreclk: mvebu-sar@18600 { + compatible = "marvell,armada-380-core-clock"; + reg = <0x18600 0x04>; + #clock-cells = <1>; + }; + + mbusc: mbus-controller@20000 { + compatible = "marvell,mbus-controller"; + reg = <0x20000 0x100>, <0x20180 0x20>; + }; + + mpic: interrupt-controller@20a00 { + compatible = "marvell,mpic"; + reg = <0x20a00 0x2d0>, <0x21870 0x300>; + #interrupt-cells = <1>; + #size-cells = <1>; + interrupt-controller; + msi-controller; + interrupts = ; + }; + + timer@20300 { + compatible = "marvell,armada-380-timer", + "marvell,armada-xp-timer"; + reg = <0x20300 0x30>, <0x21040 0x30>; + interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <&mpic 5>, + <&mpic 6>; + clocks = <&coreclk 2>, <&refclk>; + clock-names = "nbclk", "fixed"; + }; + + watchdog@20300 { + compatible = "marvell,armada-380-wdt"; + reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>; + clocks = <&coreclk 2>, <&refclk>; + clock-names = "nbclk", "fixed"; + }; + + cpurst@20800 { + compatible = "marvell,armada-370-cpu-reset"; + reg = <0x20800 0x10>; + }; + + mpcore-soc-ctrl@20d20 { + compatible = "marvell,armada-380-mpcore-soc-ctrl"; + reg = <0x20d20 0x6c>; + }; + + coherency-fabric@21010 { + compatible = "marvell,armada-380-coherency-fabric"; + reg = <0x21010 0x1c>; + }; + + pmsu@22000 { + compatible = "marvell,armada-380-pmsu"; + reg = <0x22000 0x1000>; + }; + + eth1: ethernet@30000 { + compatible = "marvell,armada-370-neta"; + reg = <0x30000 0x4000>; + interrupts-extended = <&mpic 10>; + clocks = <&gateclk 3>; + status = "disabled"; + }; + + eth2: ethernet@34000 { + compatible = "marvell,armada-370-neta"; + reg = <0x34000 0x4000>; + interrupts-extended = <&mpic 12>; + clocks = <&gateclk 2>; + status = "disabled"; + }; + + usb@58000 { + compatible = "marvell,orion-ehci"; + reg = <0x58000 0x500>; + interrupts = ; + clocks = <&gateclk 18>; + status = "disabled"; + }; + + xor@60800 { + compatible = "marvell,orion-xor"; + reg = <0x60800 0x100 + 0x60a00 0x100>; + clocks = <&gateclk 22>; + status = "okay"; + + xor00 { + interrupts = ; + dmacap,memcpy; + dmacap,xor; + }; + xor01 { + interrupts = ; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; + }; + + xor@60900 { + compatible = "marvell,orion-xor"; + reg = <0x60900 0x100 + 0x60b00 0x100>; + clocks = <&gateclk 28>; + status = "okay"; + + xor10 { + interrupts = ; + dmacap,memcpy; + dmacap,xor; + }; + xor11 { + interrupts = ; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; + }; + + eth0: ethernet@70000 { + compatible = "marvell,armada-370-neta"; + reg = <0x70000 0x4000>; + interrupts-extended = <&mpic 8>; + clocks = <&gateclk 4>; + status = "disabled"; + }; + + mdio: mdio@72004 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,orion-mdio"; + reg = <0x72004 0x4>; + clocks = <&gateclk 4>; + }; + + rtc@a3800 { + compatible = "marvell,armada-380-rtc"; + reg = <0xa3800 0x20>, <0x184a0 0x0c>; + reg-names = "rtc", "rtc-soc"; + interrupts = ; + }; + + sata@a8000 { + compatible = "marvell,armada-380-ahci"; + reg = <0xa8000 0x2000>; + interrupts = ; + clocks = <&gateclk 15>; + status = "disabled"; + }; + + bm: bm@c8000 { + compatible = "marvell,armada-380-neta-bm"; + reg = <0xc8000 0xac>; + clocks = <&gateclk 13>; + internal-mem = <&bm_bppi>; + status = "disabled"; + }; + + sata@e0000 { + compatible = "marvell,armada-380-ahci"; + reg = <0xe0000 0x2000>; + interrupts = ; + clocks = <&gateclk 30>; + status = "disabled"; + }; + + coredivclk: clock@e4250 { + compatible = "marvell,armada-380-corediv-clock"; + reg = <0xe4250 0xc>; + #clock-cells = <1>; + clocks = <&mainpll>; + clock-output-names = "nand"; + }; + + thermal@e8078 { + compatible = "marvell,armada380-thermal"; + reg = <0xe4078 0x4>, <0xe4074 0x4>; + status = "okay"; + }; + + flash@d0000 { + compatible = "marvell,armada370-nand"; + reg = <0xd0000 0x54>; + #address-cells = <1>; + #size-cells = <1>; + interrupts = ; + clocks = <&coredivclk 0>; + status = "disabled"; + }; + + sdhci@d8000 { + compatible = "marvell,armada-380-sdhci"; + reg-names = "sdhci", "mbus", "conf-sdio3"; + reg = <0xd8000 0x1000>, + <0xdc000 0x100>, + <0x18454 0x4>; + interrupts = ; + clocks = <&gateclk 17>; + mrvl,clk-delay-cycles = <0x1F>; + status = "disabled"; + }; + + usb3@f0000 { + compatible = "marvell,armada-380-xhci"; + reg = <0xf0000 0x4000>,<0xf4000 0x4000>; + interrupts = ; + clocks = <&gateclk 9>; + status = "disabled"; + }; + + usb3@f8000 { + compatible = "marvell,armada-380-xhci"; + reg = <0xf8000 0x4000>,<0xfc000 0x4000>; + interrupts = ; + clocks = <&gateclk 10>; + status = "disabled"; + }; + }; + + bm_bppi: bm-bppi { + compatible = "mmio-sram"; + reg = ; + ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&gateclk 13>; + no-memory-wc; + status = "disabled"; + }; + }; + + clocks { + /* 2 GHz fixed main PLL */ + mainpll: mainpll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1000000000>; + }; + + /* 25 MHz reference crystal */ + refclk: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + }; +}; Property changes on: head/sys/dts/arm/armada-38x.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/bcm2835.dtsi =================================================================== --- head/sys/dts/arm/bcm2835.dtsi (nonexistent) +++ head/sys/dts/arm/bcm2835.dtsi (revision 325826) @@ -0,0 +1,505 @@ +/* + * Copyright (c) 2012 Oleksandr Tymoshenko + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + cpu@0 { + compatible = "arm,1176jzf-s"; + }; + }; + + + SOC: axi { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x20000000 0x01000000>; + ranges = <0 0x20000000 0x01000000>; + + intc: interrupt-controller { + compatible = "broadcom,bcm2835-armctrl-ic", + "broadcom,bcm2708-armctrl-ic"; + reg = <0xB200 0x200>; + + interrupt-controller; + #interrupt-cells = <1>; + + /* Bank 0 + * 0: ARM_TIMER + * 1: ARM_MAILBOX + * 2: ARM_DOORBELL_0 + * 3: ARM_DOORBELL_1 + * 4: VPU0_HALTED + * 5: VPU1_HALTED + * 6: ILLEGAL_TYPE0 + * 7: ILLEGAL_TYPE1 + */ + + /* Bank 1 + * 0: TIMER0 16: DMA0 + * 1: TIMER1 17: DMA1 + * 2: TIMER2 18: VC_DMA2 + * 3: TIMER3 19: VC_DMA3 + * 4: CODEC0 20: DMA4 + * 5: CODEC1 21: DMA5 + * 6: CODEC2 22: DMA6 + * 7: VC_JPEG 23: DMA7 + * 8: ISP 24: DMA8 + * 9: VC_USB 25: DMA9 + * 10: VC_3D 26: DMA10 + * 11: TRANSPOSER 27: DMA11 + * 12: MULTICORESYNC0 28: DMA12 + * 13: MULTICORESYNC1 29: AUX + * 14: MULTICORESYNC2 30: ARM + * 15: MULTICORESYNC3 31: VPUDMA + */ + + /* Bank 2 + * 0: HOSTPORT 16: SMI + * 1: VIDEOSCALER 17: GPIO0 + * 2: CCP2TX 18: GPIO1 + * 3: SDC 19: GPIO2 + * 4: DSI0 20: GPIO3 + * 5: AVE 21: VC_I2C + * 6: CAM0 22: VC_SPI + * 7: CAM1 23: VC_I2SPCM + * 8: HDMI0 24: VC_SDIO + * 9: HDMI1 25: VC_UART + * 10: PIXELVALVE1 26: SLIMBUS + * 11: I2CSPISLV 27: VEC + * 12: DSI1 28: CPG + * 13: PWA0 29: RNG + * 14: PWA1 30: VC_ARASANSDIO + * 15: CPR 31: AVSPMON + */ + }; + + timer { + compatible = "broadcom,bcm2835-system-timer", + "broadcom,bcm2708-system-timer"; + reg = <0x3000 0x1000>; + interrupts = <8 9 10 11>; + interrupt-parent = <&intc>; + + clock-frequency = <1000000>; + }; + + armtimer { + /* Not AMBA compatible */ + compatible = "broadcom,bcm2835-sp804", "arm,sp804"; + reg = <0xB400 0x24>; + interrupts = <0>; + interrupt-parent = <&intc>; + }; + + watchdog0 { + compatible = "broadcom,bcm2835-wdt", + "broadcom,bcm2708-wdt"; + reg = <0x10001c 0x0c>; /* 0x1c, 0x20, 0x24 */ + }; + + gpio: gpio { + compatible = "broadcom,bcm2835-gpio", + "broadcom,bcm2708-gpio"; + reg = <0x200000 0xb0>; + + /* Unusual arrangement of interrupts + * (determined by testing) + * 17: Bank 0 (GPIOs 0-31) + * 19: Bank 1 (GPIOs 32-53) + * 18: Bank 2 + * 20: All banks (GPIOs 0-53) + */ + interrupts = <57 59 58 60>; + interrupt-parent = <&intc>; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_reserved>; + + /* Pins that can short 3.3V to GND in output mode: 46-47 + * Pins used by VideoCore: 48-53 + */ + broadcom,read-only = <46>, <47>, <48>, <49>, <50>, + <51>, <52>, <53>; + + /* BSC0 */ + pins_bsc0_a: bsc0_a { + broadcom,pins = <0>, <1>; + }; + + pins_bsc0_b: bsc0_b { + broadcom,pins = <28>, <29>; + }; + + pins_bsc0_c: bsc0_c { + broadcom,pins = <44>, <45>; + }; + + /* BSC1 */ + pins_bsc1_a: bsc1_a { + broadcom,pins = <2>, <3>; + }; + + pins_bsc1_b: bsc1_b { + broadcom,pins = <44>, <45>; + }; + + /* GPCLK0 */ + pins_gpclk0_a: gpclk0_a { + broadcom,pins = <4>; + }; + + pins_gpclk0_b: gpclk0_b { + broadcom,pins = <20>; + }; + + pins_gpclk0_c: gpclk0_c { + broadcom,pins = <32>; + }; + + pins_gpclk0_d: gpclk0_d { + broadcom,pins = <34>; + }; + + /* GPCLK1 */ + pins_gpclk1_a: gpclk1_a { + broadcom,pins = <5>; + }; + + pins_gpclk1_b: gpclk1_b { + broadcom,pins = <21>; + }; + + pins_gpclk1_c: gpclk1_c { + broadcom,pins = <42>; + }; + + pins_gpclk1_d: gpclk1_d { + broadcom,pins = <44>; + }; + + /* GPCLK2 */ + pins_gpclk2_a: gpclk2_a { + broadcom,pins = <6>; + }; + + pins_gpclk2_b: gpclk2_b { + broadcom,pins = <43>; + }; + + /* SPI0 */ + pins_spi0_a: spi0_a { + broadcom,pins = <7>, <8>, <9>, <10>, <11>; + }; + + pins_spi0_b: spi0_b { + broadcom,pins = <35>, <36>, <37>, <38>, <39>; + }; + + /* PWM */ + pins_pwm0_a: pwm0_a { + broadcom,pins = <12>; + }; + + pins_pwm0_b: pwm0_b { + broadcom,pins = <18>; + }; + + pins_pwm0_c: pwm0_c { + broadcom,pins = <40>; + }; + + pins_pwm1_a: pwm1_a { + broadcom,pins = <13>; + }; + + pins_pwm1_b: pwm1_b { + broadcom,pins = <19>; + }; + + pins_pwm1_c: pwm1_c { + broadcom,pins = <41>; + }; + + pins_pwm1_d: pwm1_d { + broadcom,pins = <45>; + }; + + /* UART0 */ + pins_uart0_a: uart0_a { + broadcom,pins = <14>, <15>; + }; + + pins_uart0_b: uart0_b { + broadcom,pins = <32>, <33>; + }; + + pins_uart0_c: uart0_c { + broadcom,pins = <36>, <37>; + }; + + pins_uart0_fc_a: uart0_fc_a { + broadcom,pins = <16>, <17>; + }; + + pins_uart0_fc_b: uart0_fc_b { + broadcom,pins = <30>, <31>; + }; + + pins_uart0_fc_c: uart0_fc_c { + broadcom,pins = <39>, <38>; + }; + + /* PCM */ + pins_pcm_a: pcm_a { + broadcom,pins = <18>, <19>, <20>, <21>; + }; + + pins_pcm_b: pcm_b { + broadcom,pins = <28>, <29>, <30>, <31>; + }; + + /* Secondary Address Bus */ + pins_sm_addr_a: sm_addr_a { + broadcom,pins = <5>, <4>, <3>, <2>, <1>, <0>; + }; + + pins_sm_addr_b: sm_addr_b { + broadcom,pins = <33>, <32>, <31>, <30>, <29>, + <28>; + }; + + pins_sm_ctl_a: sm_ctl_a { + broadcom,pins = <6>, <7>; + }; + + pins_sm_ctl_b: sm_ctl_b { + broadcom,pins = <34>, <35>; + }; + + pins_sm_data_8bit_a: sm_data_8bit_a { + broadcom,pins = <8>, <9>, <10>, <11>, <12>, + <13>, <14>, <15>; + }; + + pins_sm_data_8bit_b: sm_data_8bit_b { + broadcom,pins = <36>, <37>, <38>, <39>, <40>, + <41>, <42>, <43>; + }; + + pins_sm_data_16bit: sm_data_16bit { + broadcom,pins = <16>, <17>, <18>, <19>, <20>, + <21>, <22>, <23>; + }; + + pins_sm_data_18bit: sm_data_18bit { + broadcom,pins = <24>, <25>; + }; + + /* BSCSL */ + pins_bscsl: bscsl { + broadcom,pins = <18>, <19>; + }; + + /* SPISL */ + pins_spisl: spisl { + broadcom,pins = <18>, <19>, <20>, <21>; + }; + + /* SPI1 */ + pins_spi1: spi1 { + broadcom,pins = <16>, <17>, <18>, <19>, <20>, + <21>; + }; + + /* UART1 */ + pins_uart1_a: uart1_a { + broadcom,pins = <14>, <15>; + }; + + pins_uart1_b: uart1_b { + broadcom,pins = <32>, <33>; + }; + + pins_uart1_c: uart1_c { + broadcom,pins = <40>, <41>; + }; + + pins_uart1_fc_a: uart1_fc_a { + broadcom,pins = <16>, <17>; + }; + + pins_uart1_fc_b: uart1_fc_b { + broadcom,pins = <30>, <31>; + }; + + pins_uart1_fc_c: uart1_fc_c { + broadcom,pins = <43>, <42>; + }; + + /* SPI2 */ + pins_spi2: spi2 { + broadcom,pins = <40>, <41>, <42>, <43>, <44>, + <45>; + }; + + /* ARM JTAG */ + pins_arm_jtag_trst: arm_jtag_trst { + broadcom,pins = <22>; + }; + + pins_arm_jtag_a: arm_jtag_a { + broadcom,pins = <4>, <5>, <6>, <12>, <13>; + }; + + pins_arm_jtag_b: arm_jtag_b { + broadcom,pins = <23>, <24>, <25>, <26>, <27>; + }; + + /* Reserved */ + pins_reserved: reserved { + broadcom,pins = <48>, <49>, <50>, <51>, <52>, + <53>; + }; + }; + + rng { + compatible = "broadcom,bcm2835-rng", + "broadcom,bcm2708-rng"; + reg = <0x104000 0x20>; + interrupts = <69>; + interrupt-parent = <&intc>; + }; + + bsc0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "broadcom,bcm2835-bsc", + "broadcom,bcm2708-bsc"; + reg = <0x205000 0x20>; + interrupts = <61>; + interrupt-parent = <&intc>; + }; + + bsc1 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "broadcom,bcm2835-bsc", + "broadcom,bcm2708-bsc"; + reg = <0x804000 0x20>; + interrupts = <61>; + interrupt-parent = <&intc>; + }; + + spi0 { + compatible = "broadcom,bcm2835-spi", + "broadcom,bcm2708-spi"; + reg = <0x204000 0x20>; + interrupts = <62>; + interrupt-parent = <&intc>; + }; + + dma: dma { + compatible = "broadcom,bcm2835-dma", + "broadcom,bcm2708-dma"; + reg = <0x7000 0x1000>, <0xE05000 0x1000>; + interrupts = <24 25 26 27 28 29 30 31 32 33 34 35 36>; + interrupt-parent = <&intc>; + + broadcom,channels = <0x7f35>; + }; + + vc_mbox: mbox { + compatible = "broadcom,bcm2835-mbox", + "broadcom,bcm2708-mbox"; + reg = <0xB880 0x40>; + interrupts = <1>; + interrupt-parent = <&intc>; + + /* Channels + * 0: Power + * 1: Frame buffer + * 2: Virtual UART + * 3: VCHIQ + * 4: LEDs + * 5: Buttons + * 6: Touch screen + */ + }; + + sdhci { + compatible = "broadcom,bcm2835-sdhci", + "broadcom,bcm2708-sdhci"; + reg = <0x300000 0x100>; + interrupts = <70>; + interrupt-parent = <&intc>; + + clock-frequency = <50000000>; /* Set by VideoCore */ + }; + + uart0: uart0 { + compatible = "broadcom,bcm2835-uart", + "broadcom,bcm2708-uart", "arm,pl011", + "arm,primecell"; + reg = <0x201000 0x1000>; + interrupts = <65>; + interrupt-parent = <&intc>; + + clock-frequency = <3000000>; /* Set by VideoCore */ + reg-shift = <2>; + }; + + vchiq: vchiq { + compatible = "broadcom,bcm2835-vchiq"; + reg = <0xB800 0x50>; + interrupts = <2>; + interrupt-parent = <&intc>; + cache-line-size = <32>; + }; + + usb { + compatible = "broadcom,bcm2835-usb", + "broadcom,bcm2708-usb", + "synopsys,designware-hs-otg2"; + reg = <0x980000 0x20000>; + interrupts = <17>; + interrupt-parent = <&intc>; + #address-cells = <1>; + #size-cells = <0>; + }; + + }; +}; Property changes on: head/sys/dts/arm/bcm2835.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/bcm2836.dtsi =================================================================== --- head/sys/dts/arm/bcm2836.dtsi (nonexistent) +++ head/sys/dts/arm/bcm2836.dtsi (revision 325826) @@ -0,0 +1,498 @@ +/* + * Copyright (c) 2012 Oleksandr Tymoshenko + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/ { + #address-cells = <1>; + #size-cells = <1>; + + timer { + compatible = "arm,armv7-timer"; + clock-frequency = <19200000>; + interrupts = <0 1 3 2>; + interrupt-parent = <&local_intc>; + }; + + SOC: axi { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x3f000000 0x01000000>; + ranges = <0 0x3f000000 0x01000000>, + <0x40000000 0x40000000 0x00001000>; + + local_intc: local_intc { + compatible = "brcm,bcm2836-l1-intc"; + reg = <0x40000000 0x100>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&local_intc>; + }; + + intc: interrupt-controller { + compatible = "broadcom,bcm2835-armctrl-ic", + "broadcom,bcm2708-armctrl-ic"; + reg = <0xB200 0x200>; + interrupt-parent = <&local_intc>; + interrupts = <8>; + + interrupt-controller; + #interrupt-cells = <1>; + + /* Bank 0 + * 0: ARM_TIMER + * 1: ARM_MAILBOX + * 2: ARM_DOORBELL_0 + * 3: ARM_DOORBELL_1 + * 4: VPU0_HALTED + * 5: VPU1_HALTED + * 6: ILLEGAL_TYPE0 + * 7: ILLEGAL_TYPE1 + */ + + /* Bank 1 + * 0: TIMER0 16: DMA0 + * 1: TIMER1 17: DMA1 + * 2: TIMER2 18: VC_DMA2 + * 3: TIMER3 19: VC_DMA3 + * 4: CODEC0 20: DMA4 + * 5: CODEC1 21: DMA5 + * 6: CODEC2 22: DMA6 + * 7: VC_JPEG 23: DMA7 + * 8: ISP 24: DMA8 + * 9: VC_USB 25: DMA9 + * 10: VC_3D 26: DMA10 + * 11: TRANSPOSER 27: DMA11 + * 12: MULTICORESYNC0 28: DMA12 + * 13: MULTICORESYNC1 29: AUX + * 14: MULTICORESYNC2 30: ARM + * 15: MULTICORESYNC3 31: VPUDMA + */ + + /* Bank 2 + * 0: HOSTPORT 16: SMI + * 1: VIDEOSCALER 17: GPIO0 + * 2: CCP2TX 18: GPIO1 + * 3: SDC 19: GPIO2 + * 4: DSI0 20: GPIO3 + * 5: AVE 21: VC_I2C + * 6: CAM0 22: VC_SPI + * 7: CAM1 23: VC_I2SPCM + * 8: HDMI0 24: VC_SDIO + * 9: HDMI1 25: VC_UART + * 10: PIXELVALVE1 26: SLIMBUS + * 11: I2CSPISLV 27: VEC + * 12: DSI1 28: CPG + * 13: PWA0 29: RNG + * 14: PWA1 30: VC_ARASANSDIO + * 15: CPR 31: AVSPMON + */ + }; + + watchdog0 { + compatible = "broadcom,bcm2835-wdt", + "broadcom,bcm2708-wdt"; + reg = <0x10001c 0x0c>; /* 0x1c, 0x20, 0x24 */ + }; + + gpio: gpio { + compatible = "broadcom,bcm2835-gpio", + "broadcom,bcm2708-gpio"; + reg = <0x200000 0xb0>; + + /* Unusual arrangement of interrupts + * (determined by testing) + * 17: Bank 0 (GPIOs 0-31) + * 19: Bank 1 (GPIOs 32-53) + * 18: Bank 2 + * 20: All banks (GPIOs 0-53) + */ + interrupts = <57 59 58 60>; + interrupt-parent = <&intc>; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_reserved>; + + /* Pins that can short 3.3V to GND in output mode: 46 + * Pins used by VideoCore: 48-53 + */ + broadcom,read-only = <46>, <48>, <49>, <50>, + <51>, <52>, <53>; + + /* BSC0 */ + pins_bsc0_a: bsc0_a { + broadcom,pins = <0>, <1>; + }; + + pins_bsc0_b: bsc0_b { + broadcom,pins = <28>, <29>; + }; + + pins_bsc0_c: bsc0_c { + broadcom,pins = <44>, <45>; + }; + + /* BSC1 */ + pins_bsc1_a: bsc1_a { + broadcom,pins = <2>, <3>; + }; + + pins_bsc1_b: bsc1_b { + broadcom,pins = <44>, <45>; + }; + + /* GPCLK0 */ + pins_gpclk0_a: gpclk0_a { + broadcom,pins = <4>; + }; + + pins_gpclk0_b: gpclk0_b { + broadcom,pins = <20>; + }; + + pins_gpclk0_c: gpclk0_c { + broadcom,pins = <32>; + }; + + pins_gpclk0_d: gpclk0_d { + broadcom,pins = <34>; + }; + + /* GPCLK1 */ + pins_gpclk1_a: gpclk1_a { + broadcom,pins = <5>; + }; + + pins_gpclk1_b: gpclk1_b { + broadcom,pins = <21>; + }; + + pins_gpclk1_c: gpclk1_c { + broadcom,pins = <42>; + }; + + pins_gpclk1_d: gpclk1_d { + broadcom,pins = <44>; + }; + + /* GPCLK2 */ + pins_gpclk2_a: gpclk2_a { + broadcom,pins = <6>; + }; + + pins_gpclk2_b: gpclk2_b { + broadcom,pins = <43>; + }; + + /* SPI0 */ + pins_spi0_a: spi0_a { + broadcom,pins = <7>, <8>, <9>, <10>, <11>; + }; + + pins_spi0_b: spi0_b { + broadcom,pins = <35>, <36>, <37>, <38>, <39>; + }; + + /* PWM */ + pins_pwm0_a: pwm0_a { + broadcom,pins = <12>; + }; + + pins_pwm0_b: pwm0_b { + broadcom,pins = <18>; + }; + + pins_pwm0_c: pwm0_c { + broadcom,pins = <40>; + }; + + pins_pwm1_a: pwm1_a { + broadcom,pins = <13>; + }; + + pins_pwm1_b: pwm1_b { + broadcom,pins = <19>; + }; + + pins_pwm1_c: pwm1_c { + broadcom,pins = <41>; + }; + + pins_pwm1_d: pwm1_d { + broadcom,pins = <45>; + }; + + /* UART0 */ + pins_uart0_a: uart0_a { + broadcom,pins = <14>, <15>; + }; + + pins_uart0_b: uart0_b { + broadcom,pins = <32>, <33>; + }; + + pins_uart0_c: uart0_c { + broadcom,pins = <36>, <37>; + }; + + pins_uart0_fc_a: uart0_fc_a { + broadcom,pins = <16>, <17>; + }; + + pins_uart0_fc_b: uart0_fc_b { + broadcom,pins = <30>, <31>; + }; + + pins_uart0_fc_c: uart0_fc_c { + broadcom,pins = <39>, <38>; + }; + + /* PCM */ + pins_pcm_a: pcm_a { + broadcom,pins = <18>, <19>, <20>, <21>; + }; + + pins_pcm_b: pcm_b { + broadcom,pins = <28>, <29>, <30>, <31>; + }; + + /* Secondary Address Bus */ + pins_sm_addr_a: sm_addr_a { + broadcom,pins = <5>, <4>, <3>, <2>, <1>, <0>; + }; + + pins_sm_addr_b: sm_addr_b { + broadcom,pins = <33>, <32>, <31>, <30>, <29>, + <28>; + }; + + pins_sm_ctl_a: sm_ctl_a { + broadcom,pins = <6>, <7>; + }; + + pins_sm_ctl_b: sm_ctl_b { + broadcom,pins = <34>, <35>; + }; + + pins_sm_data_8bit_a: sm_data_8bit_a { + broadcom,pins = <8>, <9>, <10>, <11>, <12>, + <13>, <14>, <15>; + }; + + pins_sm_data_8bit_b: sm_data_8bit_b { + broadcom,pins = <36>, <37>, <38>, <39>, <40>, + <41>, <42>, <43>; + }; + + pins_sm_data_16bit: sm_data_16bit { + broadcom,pins = <16>, <17>, <18>, <19>, <20>, + <21>, <22>, <23>; + }; + + pins_sm_data_18bit: sm_data_18bit { + broadcom,pins = <24>, <25>; + }; + + /* BSCSL */ + pins_bscsl: bscsl { + broadcom,pins = <18>, <19>; + }; + + /* SPISL */ + pins_spisl: spisl { + broadcom,pins = <18>, <19>, <20>, <21>; + }; + + /* SPI1 */ + pins_spi1: spi1 { + broadcom,pins = <16>, <17>, <18>, <19>, <20>, + <21>; + }; + + /* UART1 */ + pins_uart1_a: uart1_a { + broadcom,pins = <14>, <15>; + }; + + pins_uart1_b: uart1_b { + broadcom,pins = <32>, <33>; + }; + + pins_uart1_c: uart1_c { + broadcom,pins = <40>, <41>; + }; + + pins_uart1_fc_a: uart1_fc_a { + broadcom,pins = <16>, <17>; + }; + + pins_uart1_fc_b: uart1_fc_b { + broadcom,pins = <30>, <31>; + }; + + pins_uart1_fc_c: uart1_fc_c { + broadcom,pins = <43>, <42>; + }; + + /* SPI2 */ + pins_spi2: spi2 { + broadcom,pins = <40>, <41>, <42>, <43>, <44>, + <45>; + }; + + /* ARM JTAG */ + pins_arm_jtag_trst: arm_jtag_trst { + broadcom,pins = <22>; + }; + + pins_arm_jtag_a: arm_jtag_a { + broadcom,pins = <4>, <5>, <6>, <12>, <13>; + }; + + pins_arm_jtag_b: arm_jtag_b { + broadcom,pins = <23>, <24>, <25>, <26>, <27>; + }; + + /* Reserved */ + pins_reserved: reserved { + broadcom,pins = <48>, <49>, <50>, <51>, <52>, + <53>; + }; + }; + + rng { + compatible = "broadcom,bcm2835-rng", + "broadcom,bcm2708-rng"; + reg = <0x104000 0x20>; + interrupts = <69>; + interrupt-parent = <&intc>; + }; + + bsc0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "broadcom,bcm2835-bsc", + "broadcom,bcm2708-bsc"; + reg = <0x205000 0x20>; + interrupts = <61>; + interrupt-parent = <&intc>; + }; + + bsc1 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "broadcom,bcm2835-bsc", + "broadcom,bcm2708-bsc"; + reg = <0x804000 0x20>; + interrupts = <61>; + interrupt-parent = <&intc>; + }; + + spi0 { + compatible = "broadcom,bcm2835-spi", + "broadcom,bcm2708-spi"; + reg = <0x204000 0x20>; + interrupts = <62>; + interrupt-parent = <&intc>; + }; + + dma: dma { + compatible = "broadcom,bcm2835-dma", + "broadcom,bcm2708-dma"; + reg = <0x7000 0x1000>, <0xE05000 0x1000>; + interrupts = <24 25 26 27 28 29 30 31 32 33 34 35 36>; + interrupt-parent = <&intc>; + + broadcom,channels = <0x7f35>; + }; + + vc_mbox: mbox { + compatible = "broadcom,bcm2835-mbox", + "broadcom,bcm2708-mbox"; + reg = <0xB880 0x40>; + interrupts = <1>; + interrupt-parent = <&intc>; + + /* Channels + * 0: Power + * 1: Frame buffer + * 2: Virtual UART + * 3: VCHIQ + * 4: LEDs + * 5: Buttons + * 6: Touch screen + */ + }; + + sdhci { + compatible = "broadcom,bcm2835-sdhci", + "broadcom,bcm2708-sdhci"; + reg = <0x300000 0x100>; + interrupts = <70>; + interrupt-parent = <&intc>; + + clock-frequency = <250000000>; /* Set by VideoCore */ + }; + + uart0: uart0 { + compatible = "broadcom,bcm2835-uart", + "broadcom,bcm2708-uart", "arm,pl011", + "arm,primecell"; + reg = <0x201000 0x1000>; + interrupts = <65>; + interrupt-parent = <&intc>; + + clock-frequency = <3000000>; /* Set by VideoCore */ + reg-shift = <2>; + }; + + vchiq: vchiq { + compatible = "broadcom,bcm2835-vchiq"; + reg = <0xB800 0x50>; + interrupts = <2>; + interrupt-parent = <&intc>; + cache-line-size = <32>; + }; + + usb { + compatible = "broadcom,bcm2835-usb", + "broadcom,bcm2708-usb", + "synopsys,designware-hs-otg2"; + reg = <0x980000 0x20000>; + interrupts = <17>; + interrupt-parent = <&intc>; + #address-cells = <1>; + #size-cells = <0>; + }; + + }; +}; Property changes on: head/sys/dts/arm/bcm2836.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/db78100.dts =================================================================== --- head/sys/dts/arm/db78100.dts (nonexistent) +++ head/sys/dts/arm/db78100.dts (revision 325826) @@ -0,0 +1,332 @@ +/* + * Copyright (c) 2010 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under sponsorship from + * the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Marvell DB-78100 Device Tree Source. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "mrvl,DB-78100"; + compatible = "DB-78100-BP", "DB-78100-BP-A"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + serial0 = &serial0; + serial1 = &serial1; + mpp = &MPP; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,88FR571"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x4000>; // L1, 16K + i-cache-size = <0x4000>; // L1, 16K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x20000000>; // 512M at 0x0 + }; + + localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "mrvl,lbc"; + bank-count = <5>; + + /* This reflects CPU decode windows setup. */ + ranges = <0x0 0x2f 0xf9300000 0x00100000 + 0x1 0x3e 0xf9400000 0x00100000 + 0x2 0x3d 0xf9500000 0x02000000 + 0x3 0x3b 0xfb500000 0x00100000>; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x00100000>; + }; + + led@1,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "led"; + reg = <0x1 0x0 0x00100000>; + }; + + nor@2,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x2 0x0 0x02000000>; + }; + + nand@3,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mrvl,nfc"; + reg = <0x3 0x0 0x00100000>; + }; + }; + + soc78100@f1000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xf1000000 0x00100000>; + bus-frequency = <0>; + + PIC: pic@20200 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x20200 0x3c>; + compatible = "mrvl,pic"; + }; + + timer@20300 { + compatible = "mrvl,timer"; + reg = <0x20300 0x30>; + interrupts = <8>; + interrupt-parent = <&PIC>; + mrvl,has-wdt; + }; + + MPP: mpp@10000 { + #pin-cells = <2>; + compatible = "mrvl,mpp"; + reg = <0x10000 0x34>; + pin-count = <50>; + pin-map = < + 0 2 /* MPP[0]: GE1_TXCLK */ + 1 2 /* MPP[1]: GE1_TXCTL */ + 2 2 /* MPP[2]: GE1_RXCTL */ + 3 2 /* MPP[3]: GE1_RXCLK */ + 4 2 /* MPP[4]: GE1_TXD[0] */ + 5 2 /* MPP[5]: GE1_TXD[1] */ + 6 2 /* MPP[6]: GE1_TXD[2] */ + 7 2 /* MPP[7]: GE1_TXD[3] */ + 8 2 /* MPP[8]: GE1_RXD[0] */ + 9 2 /* MPP[9]: GE1_RXD[1] */ + 10 2 /* MPP[10]: GE1_RXD[2] */ + 11 2 /* MPP[11]: GE1_RXD[3] */ + 13 3 /* MPP[13]: SYSRST_OUTn */ + 14 3 /* MPP[14]: SATA1_ACTn */ + 15 3 /* MPP[15]: SATA0_ACTn */ + 16 4 /* MPP[16]: UA2_TXD */ + 17 4 /* MPP[17]: UA2_RXD */ + 18 3 /* MPP[18]: */ + 19 3 /* MPP[19]: */ + 20 3 /* MPP[20]: */ + 21 3 /* MPP[21]: */ + 22 4 /* MPP[22]: UA3_TXD */ + 23 4 >; /* MPP[21]: UA3_RXD */ + }; + + GPIO: gpio@10100 { + #gpio-cells = <3>; + compatible = "mrvl,gpio"; + reg = <0x10100 0x20>; + gpio-controller; + interrupts = <56 57 58 59>; + interrupt-parent = <&PIC>; + }; + + rtc@10300 { + compatible = "mrvl,rtc"; + reg = <0x10300 0x08>; + }; + + twsi@11000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,twsi"; + reg = <0x11000 0x20>; + interrupts = <2>; + interrupt-parent = <&PIC>; + }; + + twsi@11100 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,twsi"; + reg = <0x11100 0x20>; + interrupts = <3>; + interrupt-parent = <&PIC>; + }; + + enet0: ethernet@72000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x72000 0x2000>; + ranges = <0x0 0x72000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <41 42 43 40 70>; + interrupt-parent = <&PIC>; + phy-handle = <&phy0>; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,mdio"; + + phy0: ethernet-phy@0 { + reg = <0x8>; + }; + phy1: ethernet-phy@1 { + reg = <0x9>; + }; + }; + }; + + enet1: ethernet@76000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x76000 0x2000>; + ranges = <0x0 0x76000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <45 46 47 44 70>; + interrupt-parent = <&PIC>; + phy-handle = <&phy1>; + }; + + serial0: serial@12000 { + compatible = "ns16550"; + reg = <0x12000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <12>; + interrupt-parent = <&PIC>; + }; + + serial1: serial@12100 { + compatible = "ns16550"; + reg = <0x12100 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <13>; + interrupt-parent = <&PIC>; + }; + + usb@50000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x50000 0x1000>; + interrupts = <72 16>; + interrupt-parent = <&PIC>; + }; + + usb@51000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x51000 0x1000>; + interrupts = <72 17>; + interrupt-parent = <&PIC>; + }; + + usb@52000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x52000 0x1000>; + interrupts = <72 18>; + interrupt-parent = <&PIC>; + }; + + xor@60000 { + compatible = "mrvl,xor"; + reg = <0x60000 0x1000>; + interrupts = <22 23>; + interrupt-parent = <&PIC>; + }; + + crypto@90000 { + compatible = "mrvl,cesa"; + reg = <0x90000 0x1000 /* tdma base reg chan 0 */ + 0x9D000 0x1000>; /* cesa base reg chan 0 */ + interrupts = <19>; + interrupt-parent = <&PIC>; + }; + + sata@a0000 { + compatible = "mrvl,sata"; + reg = <0xa0000 0x6000>; + interrupts = <26>; + interrupt-parent = <&PIC>; + }; + }; + + pci0: pcie@f1040000 { + compatible = "mrvl,pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xf1040000 0x2000>; + bus-range = <0 255>; + ranges = <0x02000000 0x0 0xf2000000 0xf2000000 0x0 0x04000000 + 0x01000000 0x0 0x00000000 0xf1100000 0x0 0x00100000>; + clock-frequency = <33333333>; + interrupt-parent = <&PIC>; + interrupts = <68>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x1 */ + 0x0800 0x0 0x0 0x1 &PIC 0x20 + 0x0800 0x0 0x0 0x2 &PIC 0x21 + 0x0800 0x0 0x0 0x3 &PIC 0x22 + 0x0800 0x0 0x0 0x4 &PIC 0x23 + >; + }; + + sram@fd000000 { + compatible = "mrvl,cesa-sram"; + reg = <0xfd000000 0x00100000>; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; +}; Property changes on: head/sys/dts/arm/db78100.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/db78460.dts =================================================================== --- head/sys/dts/arm/db78460.dts (nonexistent) +++ head/sys/dts/arm/db78460.dts (revision 325826) @@ -0,0 +1,323 @@ +/* + * Copyright (c) 2010 The FreeBSD Foundation + * Copyright (c) 2010-2011 Semihalf + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Marvell DB-78460 Device Tree Source. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "mrvl,DB-78460"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + serial0 = &serial0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,88VS584"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <200000000>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x80000000>; // 2G at 0x0 + }; + + soc78460@d0000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xd0000000 0x00100000>; + bus-frequency = <0>; + + + MPIC: mpic@20a00 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x20a00 0x500 0x21870 0x58 0x20400 0x100>; + compatible = "mrvl,mpic"; + }; + + rtc@10300 { + compatible = "mrvl,rtc"; + reg = <0x10300 0x08>; + }; + + timer@21840 { + compatible = "mrvl,timer"; + reg = <0x21840 0x30>; + interrupts = <5>; + interrupt-parent = <&MPIC>; + mrvl,has-wdt; + }; + + twsi@11000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,twsi"; + reg = <0x11000 0x20>; + interrupts = <31>; + interrupt-parent = <&MPIC>; + }; + + twsi@11100 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,twsi"; + reg = <0x11100 0x20>; + interrupts = <32>; + interrupt-parent = <&MPIC>; + }; + + serial0: serial@12000 { + compatible = "snps,dw-apb-uart"; + reg = <0x12000 0x20>; + reg-shift = <2>; + current-speed = <115200>; + clock-frequency = <0>; + interrupts = <41>; + interrupt-parent = <&MPIC>; + }; + + serial1: serial@12100 { + compatible = "snps,dw-apb-uart"; + reg = <0x12100 0x20>; + reg-shift = <2>; + current-speed = <115200>; + clock-frequency = <0>; + interrupts = <42>; + interrupt-parent = <&MPIC>; + }; + + serial2: serial@12200 { + compatible = "snps,dw-apb-uart"; + reg = <0x12200 0x20>; + reg-shift = <2>; + current-speed = <115200>; + clock-frequency = <0>; + interrupts = <43>; + interrupt-parent = <&MPIC>; + }; + + serial3: serial@12300 { + compatible = "snps,dw-apb-uart"; + reg = <0x12300 0x20>; + reg-shift = <2>; + current-speed = <115200>; + clock-frequency = <0>; + interrupts = <44>; + interrupt-parent = <&MPIC>; + }; + + MPP: mpp@10000 { + #pin-cells = <2>; + compatible = "mrvl,mpp"; + reg = <0x18000 0x34>; + pin-count = <68>; + pin-map = < + 0 1 /* MPP[0]: GE1_TXCLK */ + 1 1 /* MPP[1]: GE1_TXCTL */ + 2 1 /* MPP[2]: GE1_RXCTL */ + 3 1 /* MPP[3]: GE1_RXCLK */ + 4 1 /* MPP[4]: GE1_TXD[0] */ + 5 1 /* MPP[5]: GE1_TXD[1] */ + 6 1 /* MPP[6]: GE1_TXD[2] */ + 7 1 /* MPP[7]: GE1_TXD[3] */ + 8 1 /* MPP[8]: GE1_RXD[0] */ + 9 1 /* MPP[9]: GE1_RXD[1] */ + 10 1 /* MPP[10]: GE1_RXD[2] */ + 11 1 /* MPP[11]: GE1_RXD[3] */ + 12 2 /* MPP[13]: SYSRST_OUTn */ + 13 2 /* MPP[13]: SYSRST_OUTn */ + 14 2 /* MPP[14]: SATA1_ACTn */ + 15 2 /* MPP[15]: SATA0_ACTn */ + 16 2 /* MPP[16]: UA2_TXD */ + 17 2 /* MPP[17]: UA2_RXD */ + 18 2 /* MPP[18]: */ + 19 2 /* MPP[19]: */ + 20 2 /* MPP[20]: */ + 21 2 /* MPP[21]: */ + 22 2 /* MPP[22]: UA3_TXD */ + 23 2 + 24 0 + 25 0 + 26 0 + 27 0 + 28 4 + 29 0 + 30 1 + 31 1 + 32 1 + 33 1 + 34 1 + 35 1 + 36 1 + 37 1 + 38 1 + 39 1 + 40 0 + 41 3 + 42 1 + 43 1 + 44 2 + 45 2 + 46 4 + 47 3 + 48 0 + 49 1 + 50 1 + 51 1 + 52 1 + 53 1 + 54 1 + 55 1 + 56 1 + 57 0 + 58 1 + 59 1 + 60 1 + 61 1 + 62 1 + 63 1 + 64 1 + 65 1 + 66 1 + 67 2 >; + }; + + usb@50000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x50000 0x1000>; + interrupts = <124 45>; + interrupt-parent = <&MPIC>; + }; + + usb@51000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x51000 0x1000>; + interrupts = <124 46>; + interrupt-parent = <&MPIC>; + }; + + usb@52000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x52000 0x1000>; + interrupts = <124 47>; + interrupt-parent = <&MPIC>; + }; + + enet0: ethernet@72000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x72000 0x2000>; + ranges = <0x0 0x72000 0x2000>; + local-mac-address = [ 00 04 01 07 84 60 ]; + interrupts = <67 68 122 >; + interrupt-parent = <&MPIC>; + phy-handle = <&phy0>; + has-neta; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,mdio"; + + phy0: ethernet-phy@0 { + reg = <0x0>; + }; + phy1: ethernet-phy@1 { + reg = <0x1>; + }; + phy2: ethernet-phy@2 { + reg = <0x19>; + }; + phy3: ethernet-phy@3 { + reg = <0x1b>; + }; + }; + }; + + sata@A0000 { + compatible = "mrvl,sata"; + reg = <0xA0000 0x6000>; + interrupts = <55>; + interrupt-parent = <&MPIC>; + }; + }; + + pci0: pcie@d0040000 { + compatible = "mrvl,pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xd0040000 0x2000>; + bus-range = <0 255>; + ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 + 0x01000000 0x0 0x00000000 0xa0000000 0x0 0x08000000>; + clock-frequency = <33333333>; + interrupt-parent = <&MPIC>; + interrupts = <120>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + 0x0800 0x0 0x0 0x1 &MPIC 0x3A + 0x0800 0x0 0x0 0x2 &MPIC 0x3A + 0x0800 0x0 0x0 0x3 &MPIC 0x3A + 0x0800 0x0 0x0 0x4 &MPIC 0x3A + >; + }; + + sram@ffff0000 { + compatible = "mrvl,cesa-sram"; + reg = <0xffff0000 0x00010000>; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + stddbg = "serial0"; + }; +}; Property changes on: head/sys/dts/arm/db78460.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/db88f5182.dts =================================================================== --- head/sys/dts/arm/db88f5182.dts (nonexistent) +++ head/sys/dts/arm/db88f5182.dts (revision 325826) @@ -0,0 +1,223 @@ +/* + * Copyright (c) 2010 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under sponsorship from + * the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Marvell DB-88F5182 Device Tree Source. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "mrvl,DB-88F5182"; + compatible = "DB-88F5182-BP", "DB-88F5182-BP-A"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + serial0 = &serial0; + serial1 = &serial1; + mpp = &MPP; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,88FR531"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x08000000>; // 128M at 0x0 + }; + + localbus@f1000000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "mrvl,lbc"; + + /* This reflects CPU decode windows setup. */ + ranges = <0x0 0x0f 0xf9300000 0x00100000 + 0x1 0x1e 0xfa000000 0x00100000 + 0x2 0x1d 0xfa100000 0x02000000>; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x00100000>; + bank-width = <2>; + device-width = <1>; + }; + + led@1,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "led"; + reg = <0x1 0x0 0x00100000>; + }; + + nor@2,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x2 0x0 0x02000000>; + bank-width = <2>; + device-width = <1>; + }; + }; + + soc88f5182@f1000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xf1000000 0x00100000>; + bus-frequency = <0>; + + PIC: pic@20200 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x20200 0x3c>; + compatible = "mrvl,pic"; + }; + + timer@20300 { + compatible = "mrvl,timer"; + reg = <0x20300 0x30>; + interrupts = <0>; + interrupt-parent = <&PIC>; + mrvl,has-wdt; + }; + + MPP: mpp@10000 { + #pin-cells = <2>; + compatible = "mrvl,mpp"; + reg = <0x10000 0x54>; + pin-count = <20>; + pin-map = < + 0 3 /* MPP[0]: GPIO[0] */ + 2 2 /* MPP[2]: PCI_REQn[3] */ + 3 2 /* MPP[3]: PCI_GNTn[3] */ + 4 2 /* MPP[4]: PCI_REQn[4] */ + 5 2 /* MPP[5]: PCI_GNTn[4] */ + 6 5 /* MPP[6]: SATA0_ACT */ + 7 5 /* MPP[7]: SATA1_ACT */ + 12 5 /* MPP[12]: SATA0_PRESENT */ + 13 5 /* MPP[13]: SATA1_PRESENT */ + 14 4 /* MPP[14]: NAND Flash REn[2] */ + 15 4 /* MPP[15]: NAND Flash WEn[2] */ + 16 0 /* MPP[16]: UA1_RXD */ + 17 0 /* MPP[17]: UA1_TXD */ + 18 0 /* MPP[18]: UA1_CTS */ + 19 0 >; /* MPP[19]: UA1_RTS */ + }; + + GPIO: gpio@10100 { + #gpio-cells = <3>; + compatible = "mrvl,gpio"; + reg = <0x10100 0x20>; + gpio-controller; + interrupts = <6 7 8 9>; + interrupt-parent = <&PIC>; + }; + + twsi@11000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,twsi"; + reg = <0x11000 0x20>; + interrupts = <43>; + interrupt-parent = <&PIC>; + }; + + enet0: ethernet@72000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V1"; + compatible = "mrvl,ge"; + reg = <0x72000 0x2000>; + ranges = <0x0 0x72000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <18 19 20 21 22>; + interrupt-parent = <&PIC>; + }; + + serial0: serial@12000 { + compatible = "ns16550"; + reg = <0x12000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <3>; + interrupt-parent = <&PIC>; + }; + + serial1: serial@12100 { + compatible = "ns16550"; + reg = <0x12100 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <4>; + interrupt-parent = <&PIC>; + }; + + usb@50000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x50000 0x1000>; + interrupts = <17 16>; + interrupt-parent = <&PIC>; + }; + + idma@60000 { + compatible = "mrvl,idma"; + reg = <0x60000 0x1000>; + interrupts = <24 25 26 27 23>; + interrupt-parent = <&PIC>; + }; + + sata@80000 { + compatible = "mrvl,sata"; + reg = <0x80000 0x6000>; + interrupts = <29>; + interrupt-parent = <&PIC>; + }; + }; +}; Property changes on: head/sys/dts/arm/db88f5182.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/db88f5281.dts =================================================================== --- head/sys/dts/arm/db88f5281.dts (nonexistent) +++ head/sys/dts/arm/db88f5281.dts (revision 325826) @@ -0,0 +1,227 @@ +/* + * Copyright (c) 2010 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under sponsorship from + * the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Marvell DB-88F5281 Device Tree Source. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "mrvl,DB-88F5281"; + compatible = "DB-88F5281-BP", "DB-88F5281-BP-A"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + serial0 = &serial0; + serial1 = &serial1; + mpp = &MPP; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,88FR531"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x08000000>; // 128M at 0x0 + }; + + localbus@f1000000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "mrvl,lbc"; + + /* This reflects CPU decode windows setup. */ + ranges = <0x0 0x0f 0xf9300000 0x00100000 + 0x1 0x1e 0xfa000000 0x00100000 + 0x2 0x1d 0xfa100000 0x02000000>; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x00100000>; + bank-width = <2>; + device-width = <1>; + }; + + led@1,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "led"; + reg = <0x1 0x0 0x00100000>; + }; + + nor@2,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x2 0x0 0x02000000>; + bank-width = <2>; + device-width = <1>; + }; + }; + + soc88f5281@f1000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xf1000000 0x00100000>; + bus-frequency = <0>; + + PIC: pic@20200 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x20200 0x3c>; + compatible = "mrvl,pic"; + }; + + timer@20300 { + compatible = "mrvl,timer"; + reg = <0x20300 0x30>; + interrupts = <0>; + interrupt-parent = <&PIC>; + mrvl,has-wdt; + }; + + MPP: mpp@10000 { + #pin-cells = <2>; + compatible = "mrvl,mpp"; + reg = <0x10000 0x54>; + pin-count = <20>; + pin-map = < + 0 3 /* MPP[0]: GPIO[0] */ + 2 2 /* MPP[2]: PCI_REQn[3] */ + 3 2 /* MPP[3]: PCI_GNTn[3] */ + 4 2 /* MPP[4]: PCI_REQn[4] */ + 5 2 /* MPP[5]: PCI_GNTn[4] */ + 6 3 /* MPP[6]: */ + 7 3 /* MPP[7]: */ + 8 3 /* MPP[8]: */ + 9 3 /* MPP[9]: */ + 14 4 /* MPP[14]: NAND Flash REn[2] */ + 15 4 /* MPP[15]: NAND Flash WEn[2] */ + 16 0 /* MPP[16]: UA1_RXD */ + 17 0 /* MPP[17]: UA1_TXD */ + 18 0 /* MPP[18]: UA1_CTS */ + 19 0 >; /* MPP[19]: UA1_RTS */ + }; + + GPIO: gpio@10100 { + #gpio-cells = <3>; + compatible = "mrvl,gpio"; + reg = <0x10100 0x20>; + gpio-controller; + interrupts = <6 7 8 9>; + interrupt-parent = <&PIC>; + }; + + twsi@11000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,twsi"; + reg = <0x11000 0x20>; + interrupts = <43>; + interrupt-parent = <&PIC>; + }; + + enet0: ethernet@72000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V1"; + compatible = "mrvl,ge"; + reg = <0x72000 0x2000>; + ranges = <0x0 0x72000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <18 19 20 21 22>; + interrupt-parent = <&PIC>; + phy-handle = <&phy0>; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,mdio"; + + phy0: ethernet-phy@0 { + reg = <0x8>; + }; + }; + }; + + serial0: serial@12000 { + compatible = "ns16550"; + reg = <0x12000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <3>; + interrupt-parent = <&PIC>; + }; + + serial1: serial@12100 { + compatible = "ns16550"; + reg = <0x12100 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <4>; + interrupt-parent = <&PIC>; + }; + + usb@50000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x50000 0x1000>; + interrupts = <17 16>; + interrupt-parent = <&PIC>; + }; + + idma@60000 { + compatible = "mrvl,idma"; + reg = <0x60000 0x1000>; + interrupts = <24 25 26 27 23>; + interrupt-parent = <&PIC>; + }; + }; +}; Property changes on: head/sys/dts/arm/db88f5281.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/db88f6281.dts =================================================================== --- head/sys/dts/arm/db88f6281.dts (nonexistent) +++ head/sys/dts/arm/db88f6281.dts (revision 325826) @@ -0,0 +1,299 @@ +/* + * Copyright (c) 2009-2010 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under sponsorship from + * the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Marvell DB-88F6281 Device Tree Source. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "mrvl,DB-88F6281"; + compatible = "DB-88F6281-BP", "DB-88F6281-BP-A"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + mpp = &MPP; + pci0 = &pci0; + serial0 = &serial0; + serial1 = &serial1; + soc = &SOC; + sram = &SRAM; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,88FR131"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x4000>; // L1, 16K + i-cache-size = <0x4000>; // L1, 16K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x20000000>; // 512M at 0x0 + }; + + localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "mrvl,lbc"; + bank-count = <3>; + + /* This reflects CPU decode windows setup. */ + ranges = <0x0 0x2f 0xf9300000 0x00100000>; + + nand@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mrvl,nfc"; + reg = <0x0 0x0 0x00100000>; + bank-width = <2>; + device-width = <1>; + + slice@0 { + reg = <0x0 0x200000>; + label = "u-boot"; + read-only; + }; + + slice@200000 { + reg = <0x200000 0x7e00000>; + label = "root"; + }; + }; + }; + + SOC: soc88f6281@f1000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xf1000000 0x00100000>; + bus-frequency = <0>; + + PIC: pic@20200 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x20200 0x3c>; + compatible = "mrvl,pic"; + }; + + timer@20300 { + compatible = "mrvl,timer"; + reg = <0x20300 0x30>; + interrupts = <1>; + interrupt-parent = <&PIC>; + mrvl,has-wdt; + }; + + MPP: mpp@10000 { + #pin-cells = <2>; + compatible = "mrvl,mpp"; + reg = <0x10000 0x34>; + pin-count = <50>; + pin-map = < + 0 1 /* MPP[0]: NF_IO[2] */ + 1 1 /* MPP[1]: NF_IO[3] */ + 2 1 /* MPP[2]: NF_IO[4] */ + 3 1 /* MPP[3]: NF_IO[5] */ + 4 1 /* MPP[4]: NF_IO[6] */ + 5 1 /* MPP[5]: NF_IO[7] */ + 6 1 /* MPP[6]: SYSRST_OUTn */ + 7 2 /* MPP[7]: SPI_SCn */ + 8 1 /* MPP[8]: TW_SDA */ + 9 1 /* MPP[9]: TW_SCK */ + 10 3 /* MPP[10]: UA0_TXD */ + 11 3 /* MPP[11]: UA0_RXD */ + 12 1 /* MPP[12]: SD_CLK */ + 13 1 /* MPP[13]: SD_CMD */ + 14 1 /* MPP[14]: SD_D[0] */ + 15 1 /* MPP[15]: SD_D[1] */ + 16 1 /* MPP[16]: SD_D[2] */ + 17 1 /* MPP[17]: SD_D[3] */ + 18 1 /* MPP[18]: NF_IO[0] */ + 19 1 /* MPP[19]: NF_IO[1] */ + 20 5 /* MPP[20]: SATA1_AC */ + 21 5 >; /* MPP[21]: SATA0_AC */ + }; + + GPIO: gpio@10100 { + #gpio-cells = <3>; + compatible = "mrvl,gpio"; + reg = <0x10100 0x20>; + gpio-controller; + interrupts = <35 36 37 38 39 40 41>; + interrupt-parent = <&PIC>; + }; + + rtc@10300 { + compatible = "mrvl,rtc"; + reg = <0x10300 0x08>; + }; + + twsi@11000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,twsi"; + reg = <0x11000 0x20>; + interrupts = <43>; + interrupt-parent = <&PIC>; + }; + + enet0: ethernet@72000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x72000 0x2000>; + ranges = <0x0 0x72000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <12 13 14 11 46>; + interrupt-parent = <&PIC>; + phy-handle = <&phy0>; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,mdio"; + + phy0: ethernet-phy@0 { + reg = <0x8>; + }; + }; + }; + + serial0: serial@12000 { + compatible = "ns16550"; + reg = <0x12000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <33>; + interrupt-parent = <&PIC>; + }; + + serial1: serial@12100 { + compatible = "ns16550"; + reg = <0x12100 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <34>; + interrupt-parent = <&PIC>; + }; + + crypto@30000 { + compatible = "mrvl,cesa"; + reg = <0x30000 0x1000 /* tdma base reg chan 0 */ + 0x3D000 0x1000>; /* cesa base reg chan 0 */ + interrupts = <22>; + interrupt-parent = <&PIC>; + + sram-handle = <&SRAM>; + }; + + usb@50000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x50000 0x1000>; + interrupts = <48 19>; + interrupt-parent = <&PIC>; + }; + + xor@60000 { + compatible = "mrvl,xor"; + reg = <0x60000 0x1000>; + interrupts = <5 6 7 8>; + interrupt-parent = <&PIC>; + }; + + sata@80000 { + compatible = "mrvl,sata"; + reg = <0x80000 0x6000>; + interrupts = <21>; + interrupt-parent = <&PIC>; + }; + }; + + SRAM: sram@fd000000 { + compatible = "mrvl,cesa-sram"; + reg = <0xfd000000 0x00100000>; + }; + + pci0: pcie@f1040000 { + compatible = "mrvl,pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xf1040000 0x2000>; + bus-range = <0 255>; + ranges = <0x02000000 0x0 0xf1300000 0xf1300000 0x0 0x04000000 + 0x01000000 0x0 0x00000000 0xf1100000 0x0 0x00100000>; + clock-frequency = <33333333>; + interrupt-parent = <&PIC>; + interrupts = <44>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x1 */ + 0x0800 0x0 0x0 0x1 &PIC 0x9 + 0x0800 0x0 0x0 0x2 &PIC 0x9 + 0x0800 0x0 0x0 0x3 &PIC 0x9 + 0x0800 0x0 0x0 0x4 &PIC 0x9 + >; + pcie@0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x02000000 0x0 0xf1300000 + 0x02000000 0x0 0xf1300000 + 0x0 0x04000000 + + 0x01000000 0x0 0x0 + 0x01000000 0x0 0x0 + 0x0 0x00100000>; + }; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; +}; Property changes on: head/sys/dts/arm/db88f6281.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/digi-ccwmx53.dts =================================================================== --- head/sys/dts/arm/digi-ccwmx53.dts (nonexistent) +++ head/sys/dts/arm/digi-ccwmx53.dts (revision 325826) @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2012 The FreeBSD Foundation + * Copyright (c) 2013 Rui Paulo + * All rights reserved. + * + * This software was developed by Semihalf under sponsorship from + * the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Digi ConnectCore Wi-i.MX53 + * + * $FreeBSD$ + */ + +/dts-v1/; +/include/ "imx53x.dtsi" + +/ { + model = "Digi ConnectCore Wi-i.MX53"; + compatible = "digi,imx53-ccwm53", "fsl,imx53"; + + memory { + /* RAM 512M */ + reg = <0x70000000 0x10000000 + 0xB0000000 0x10000000>; + }; + + localbus@10000000 { + sata@10000000 { + status = "okay"; + }; + ipu3@1E000000 { + status = "okay"; + }; + }; + + soc@50000000 { + aips@50000000 { + spba@50000000 { + esdhc@50004000 { + clock-frequency = <216000000>; + status = "okay"; + }; + esdhc@50008000 { + clock-frequency = <216000000>; + status = "okay"; + }; + SSI2: ssi@50014000 { + status = "okay"; + }; + }; + timer@53fa0000 { + status = "okay"; + }; + /* UART1, console */ + console: serial@53fbc000 { + status = "okay"; + clock-frequency = <0>; /* won't load w/o this */ + }; + serial@53fc0000 { + status = "okay"; + clock-frequency = <0>; /* won't load w/o this */ + }; + serial@53ff0000 { + status = "okay"; + clock-frequency = <0>; /* won't load w/o this */ + }; + clock@53fd4000 { + status = "okay"; + }; + gpio@53f84000 { + status = "okay"; + }; + gpio@53f88000 { + status = "okay"; + }; + gpio@53f8c000 { + status = "okay"; + }; + gpio@53f90000 { + status = "okay"; + }; + usb@53f80000 /* OTG */ { + status = "okay"; + }; + usb@53f80200 /* Host 1 */ { + status = "okay"; + }; + wdog@53f98000 { + status = "okay"; + }; + i2c@53fec000 { + status = "okay"; + rtc@68 { + compatible = "dialog,ds9052"; + reg = <0x48>; + interrupts = <0x1 0x1 0 0>; + }; + }; + }; + aips@60000000 { + ethernet@63fec000 { + status = "okay"; + phy-mode = "rmii"; + }; + i2c@63fc4000 { + status = "okay"; + }; + i2c@63fc8000 { + status = "okay"; + }; + audmux@63fd4000 { + status = "okay"; + }; + ide@63fe0000 { + status = "okay"; + }; + serial@63f90000 { + status = "okay"; + }; + }; + }; + + aliases { + SSI2 = &SSI2; + }; + + chosen { + bootargs = "-v"; + stdin = &console; + stdout = &console; + }; +}; Property changes on: head/sys/dts/arm/digi-ccwmx53.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/dockstar.dts =================================================================== --- head/sys/dts/arm/dockstar.dts (nonexistent) +++ head/sys/dts/arm/dockstar.dts (revision 325826) @@ -0,0 +1,241 @@ +/* + * Copyright (c) 2010 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under sponsorship from + * the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Seagate DockStar (Marvell SheevaPlug based) Device Tree Source. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "seagate,DockStar"; + compatible = "DockStar"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + mpp = &MPP; + serial0 = &serial0; + serial1 = &serial1; + soc = &SOC; + sram = &SRAM; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,88FR131"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x4000>; // L1, 16K + i-cache-size = <0x4000>; // L1, 16K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x8000000>; // 128M at 0x0 + }; + + localbus@f1000000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "mrvl,lbc"; + + /* This reflects CPU decode windows setup for NAND access. */ + ranges = <0x0 0x2f 0xf9300000 0x00100000>; + + nand@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mrvl,nfc"; + reg = <0x0 0x0 0x00100000>; + bank-width = <2>; + device-width = <1>; + }; + }; + + SOC: soc88f6281@f1000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xf1000000 0x00100000>; + bus-frequency = <0>; + + PIC: pic@20200 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x20200 0x3c>; + compatible = "mrvl,pic"; + }; + + timer@20300 { + compatible = "mrvl,timer"; + reg = <0x20300 0x30>; + interrupts = <1>; + interrupt-parent = <&PIC>; + mrvl,has-wdt; + }; + + MPP: mpp@10000 { + #pin-cells = <2>; + compatible = "mrvl,mpp"; + reg = <0x10000 0x34>; + pin-count = <50>; + pin-map = < + 0 1 /* MPP[0]: NF_IO[2] */ + 1 1 /* MPP[1]: NF_IO[3] */ + 2 1 /* MPP[2]: NF_IO[4] */ + 3 1 /* MPP[3]: NF_IO[5] */ + 4 1 /* MPP[4]: NF_IO[6] */ + 5 1 /* MPP[5]: NF_IO[7] */ + 6 1 /* MPP[6]: SYSRST_OUTn */ + 8 2 /* MPP[8]: UA0_RTS */ + 9 2 /* MPP[9]: UA0_CTS */ + 10 3 /* MPP[10]: UA0_TXD */ + 11 3 /* MPP[11]: UA0_RXD */ + 12 1 /* MPP[12]: SD_CLK */ + 13 1 /* MPP[13]: SD_CMD */ + 14 1 /* MPP[14]: SD_D[0] */ + 15 1 /* MPP[15]: SD_D[1] */ + 16 1 /* MPP[16]: SD_D[2] */ + 17 1 /* MPP[17]: SD_D[3] */ + 18 1 /* MPP[18]: NF_IO[0] */ + 19 1 /* MPP[19]: NF_IO[1] */ + 29 1 >; /* MPP[29]: TSMP[9] */ + }; + + GPIO: gpio@10100 { + #gpio-cells = <3>; + compatible = "mrvl,gpio"; + reg = <0x10100 0x20>; + gpio-controller; + interrupts = <35 36 37 38 39 40 41>; + interrupt-parent = <&PIC>; + }; + + rtc@10300 { + compatible = "mrvl,rtc"; + reg = <0x10300 0x08>; + }; + + twsi@11000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,twsi"; + reg = <0x11000 0x20>; + interrupts = <43>; + interrupt-parent = <&PIC>; + }; + + enet0: ethernet@72000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x72000 0x2000>; + ranges = <0x0 0x72000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <12 13 14 11 46>; + interrupt-parent = <&PIC>; + phy-handle = <&phy0>; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,mdio"; + + phy0: ethernet-phy@0 { + reg = <0x0>; + }; + }; + }; + + serial0: serial@12000 { + compatible = "ns16550"; + reg = <0x12000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <33>; + interrupt-parent = <&PIC>; + }; + + serial1: serial@12100 { + compatible = "ns16550"; + reg = <0x12100 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <34>; + interrupt-parent = <&PIC>; + }; + + crypto@30000 { + compatible = "mrvl,cesa"; + reg = <0x30000 0x1000 /* tdma base reg chan 0 */ + 0x3D000 0x1000>; /* cesa base reg chan 0 */ + interrupts = <22>; + interrupt-parent = <&PIC>; + + sram-handle = <&SRAM>; + }; + + usb@50000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x50000 0x1000>; + interrupts = <48 19>; + interrupt-parent = <&PIC>; + }; + + xor@60000 { + compatible = "mrvl,xor"; + reg = <0x60000 0x1000>; + interrupts = <5 6 7 8>; + interrupt-parent = <&PIC>; + }; + }; + + SRAM: sram@fd000000 { + compatible = "mrvl,cesa-sram"; + reg = <0xfd000000 0x00100000>; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; +}; Property changes on: head/sys/dts/arm/dockstar.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/dreamplug-1001.dts =================================================================== --- head/sys/dts/arm/dreamplug-1001.dts (nonexistent) +++ head/sys/dts/arm/dreamplug-1001.dts (revision 325826) @@ -0,0 +1,320 @@ +/* + * Copyright (c) 2013 Ian Lepore + * Copyright (c) 2010 The FreeBSD Foundation + * All rights reserved. + * + * This software substantially based on work developed by Semihalf + * under sponsorship from the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * GlobalScale Technologies DreamPlug Device Tree Source. + * + * This source is for version 10 revision 01 units with NOR SPI flash. + * These units are marked "1001" on the serial number label. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "GlobalScale Technologies Dreamplug v1001"; + compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + mpp = &MPP; + serial0 = &serial0; + serial1 = &serial1; + soc = &SOC; + sram = &SRAM; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,88FR131"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x4000>; // L1, 16K + i-cache-size = <0x4000>; // L1, 16K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + + }; + + memory { + device_type = "memory"; + reg = <0x0 0x20000000>; // 512M at 0x0 + }; + + localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "mrvl,lbc"; + bank-count = <1>; + + /* This reflects CPU decode windows setup. */ + ranges = <0x0 0x1e 0xfa000000 0x00100000>; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x00100000>; + bank-width = <2>; + device-width = <1>; + }; + }; + + SOC: soc88f6281@f1000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xf1000000 0x00100000>; + bus-frequency = <0>; + + PIC: pic@20200 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x20200 0x3c>; + compatible = "mrvl,pic"; + }; + + timer@20300 { + compatible = "mrvl,timer"; + reg = <0x20300 0x30>; + interrupts = <1>; + interrupt-parent = <&PIC>; + mrvl,has-wdt; + }; + + MPP: mpp@10000 { + #pin-cells = <2>; + compatible = "mrvl,mpp"; + reg = <0x10000 0x34>; + pin-count = <50>; + pin-map = < + 0 2 /* MPP[ 0]: SPI_SCn */ + 1 2 /* MPP[ 1]: SPI_MOSI */ + 2 2 /* MPP[ 2]: SPI_SCK */ + 3 2 /* MPP[ 3]: SPI_MISO */ + 4 1 /* MPP[ 4]: NF_IO[6] */ + 5 1 /* MPP[ 5]: NF_IO[7] */ + 6 1 /* MPP[ 6]: SYSRST_OUTn */ + 7 0 /* MPP[ 7]: GPO[7] */ + 8 1 /* MPP[ 8]: TW_SDA */ + 9 1 /* MPP[ 9]: TW_SCK */ + 10 3 /* MPP[10]: UA0_TXD */ + 11 3 /* MPP[11]: US0_RXD */ + 12 1 /* MPP[12]: SD_CLK */ + 13 1 /* MPP[13]: SD_CMD */ + 14 1 /* MPP[14]: SD_D[0] */ + 15 1 /* MPP[15]: SD_D[1] */ + 16 1 /* MPP[16]: SD_D[2] */ + 17 1 /* MPP[17]: SD_D[3] */ + 18 1 /* MPP[18]: NF_IO[0] */ + 19 1 /* MPP[19]: NF_IO[1] */ + 20 3 /* MPP[20]: GE1[ 0] */ + 21 3 /* MPP[21]: GE1[ 1] */ + 22 3 /* MPP[22]: GE1[ 2] */ + 23 3 /* MPP[23]: GE1[ 3] */ + 24 3 /* MPP[24]: GE1[ 4] */ + 25 3 /* MPP[25]: GE1[ 5] */ + 26 3 /* MPP[26]: GE1[ 6] */ + 27 3 /* MPP[27]: GE1[ 7] */ + 28 3 /* MPP[28]: GE1[ 8] */ + 29 3 /* MPP[29]: GE1[ 9] */ + 30 3 /* MPP[30]: GE1[10] */ + 31 3 /* MPP[31]: GE1[11] */ + 32 3 /* MPP[32]: GE1[12] */ + 33 3 /* MPP[33]: GE1[13] */ + 34 3 /* MPP[34]: GE1[14] */ + 35 3 /* MPP[35]: GE1[15] */ + 36 0 /* MPP[36]: GPIO[36] */ + 37 0 /* MPP[37]: GPIO[37] */ + 38 0 /* MPP[38]: GPIO[38] */ + 39 0 /* MPP[39]: GPIO[39] */ + 40 2 /* MPP[40]: TDM_SPI_SCK */ + 41 2 /* MPP[41]: TDM_SPI_MISO */ + 42 2 /* MPP[42]: TDM_SPI_MOSI */ + 43 0 /* MPP[43]: GPIO[43] */ + 44 0 /* MPP[44]: GPIO[44] */ + 45 0 /* MPP[45]: GPIO[45] */ + 46 0 /* MPP[46]: GPIO[46] */ + 47 0 /* MPP[47]: GPIO[47] */ + 48 0 /* MPP[48]: GPIO[48] */ + 49 0 /* MPP[49]: GPIO[49] */ + >; + }; + + GPIO: gpio@10100 { + #gpio-cells = <3>; + compatible = "mrvl,gpio"; + reg = <0x10100 0x20>; + gpio-controller; + interrupts = <35 36 37 38 39 40 41>; + interrupt-parent = <&PIC>; + pin-count = <50>; + }; + + gpioled@0 { + compatible = "mrvl,gpioled"; + + gpios = <&GPIO 47 2 0 /* GPIO[47] BT LED: OUT */ + &GPIO 48 2 0 /* GPIO[48] WLAN LED: OUT */ + &GPIO 49 2 0>; /* GPIO[49] WLAN AP LED: OUT */ + }; + + rtc@10300 { + compatible = "mrvl,rtc"; + reg = <0x10300 0x08>; + }; + + twsi@11000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,twsi"; + reg = <0x11000 0x20>; + interrupts = <43>; + interrupt-parent = <&PIC>; + }; + + enet0: ethernet@72000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x72000 0x2000>; + ranges = <0x0 0x72000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <12 13 14 11 46>; + interrupt-parent = <&PIC>; + phy-handle = <&phy0>; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,mdio"; + + phy0: ethernet-phy@0 { + reg = <0x0>; + }; + + phy1: ethernet-phy@1 { + reg = <0x1>; + }; + }; + }; + + enet1: ethernet@76000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x76000 0x02000>; + ranges = <0x0 0x76000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <16 17 18 15 47>; + interrupt-parent = <&PIC>; + phy-handle = <&phy1>; + }; + + serial0: serial@12000 { + compatible = "ns16550"; + reg = <0x12000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <33>; + interrupt-parent = <&PIC>; + }; + + serial1: serial@12100 { + compatible = "ns16550"; + reg = <0x12100 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <34>; + interrupt-parent = <&PIC>; + }; + + crypto@30000 { + compatible = "mrvl,cesa"; + reg = <0x30000 0x1000 /* tdma base reg chan 0 */ + 0x3D000 0x1000>; /* cesa base reg chan 0 */ + interrupts = <22>; + interrupt-parent = <&PIC>; + + sram-handle = <&SRAM>; + }; + + usb@50000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x50000 0x1000>; + interrupts = <48 19>; + interrupt-parent = <&PIC>; + }; + + xor@60000 { + compatible = "mrvl,xor"; + reg = <0x60000 0x1000>; + interrupts = <5 6 7 8>; + interrupt-parent = <&PIC>; + }; + + sata@80000 { + compatible = "mrvl,sata"; + reg = <0x80000 0x6000>; + interrupts = <21>; + interrupt-parent = <&PIC>; + }; + + sdio@90000 { + compatible = "mrvl,sdio"; + reg = <0x90000 0x134>; + interrupts = <28>; + interrupt-parent = <&PIC>; + }; + }; + + SRAM: sram@fd000000 { + compatible = "mrvl,cesa-sram"; + reg = <0xfd000000 0x00100000>; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; + +}; Property changes on: head/sys/dts/arm/dreamplug-1001.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/dreamplug-1001N.dts =================================================================== --- head/sys/dts/arm/dreamplug-1001N.dts (nonexistent) +++ head/sys/dts/arm/dreamplug-1001N.dts (revision 325826) @@ -0,0 +1,341 @@ +/* + * Copyright (c) 2013 Ian Lepore + * Copyright (c) 2010 The FreeBSD Foundation + * All rights reserved. + * + * This software substantially based on work developed by Semihalf + * under sponsorship from the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * GlobalScale Technologies DreamPlug Device Tree Source. + * + * This source is for version 10 revision 01 units with NAND flash. + * These units are marked "1001N" on the serial number label. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "GlobalScale Technologies Dreamplug v1001N"; + compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + mpp = &MPP; + serial0 = &serial0; + serial1 = &serial1; + soc = &SOC; + sram = &SRAM; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,88FR131"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x4000>; // L1, 16K + i-cache-size = <0x4000>; // L1, 16K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + + }; + + memory { + device_type = "memory"; + reg = <0x0 0x20000000>; // 512M at 0x0 + }; + + localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "mrvl,lbc"; + bank-count = <1>; + + /* This reflects CPU decode windows setup. */ + ranges = <0x0 0x2f 0xf9300000 0x00100000>; + + nand@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mrvl,nfc"; + reg = <0x0 0x0 0x00100000>; + bank-width = <2>; + device-width = <1>; + + // Slice info reported by builtin linux when it boots... + //[ 11.161328] 0x00000000-0x00100000 : "u-boot" + //[ 11.167431] 0x00100000-0x00500000 : "uImage" + //[ 11.173471] 0x00500000-0x20000000 : "root" + + slice@0 { + reg = <0x0 0x100000>; + label = "u-boot"; + read-only; + }; + + slice@200000 { + reg = <0x100000 0x40000>; + label = "uImage"; + }; + + slice@500000 { + reg = <0x500000 0x1FB00000>; + label = "root"; + }; + }; + }; + + SOC: soc88f6281@f1000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xf1000000 0x00100000>; + bus-frequency = <0>; + + PIC: pic@20200 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x20200 0x3c>; + compatible = "mrvl,pic"; + }; + + timer@20300 { + compatible = "mrvl,timer"; + reg = <0x20300 0x30>; + interrupts = <1>; + interrupt-parent = <&PIC>; + mrvl,has-wdt; + }; + + MPP: mpp@10000 { + #pin-cells = <2>; + compatible = "mrvl,mpp"; + reg = <0x10000 0x34>; + pin-count = <50>; + pin-map = < + 0 1 /* MPP[ 0]: NF_IO[2] */ + 1 1 /* MPP[ 1]: NF_IO[3] */ + 2 1 /* MPP[ 2]: NF_IO[4] */ + 3 1 /* MPP[ 3]: NF_IO[5] */ + 4 1 /* MPP[ 4]: NF_IO[6] */ + 5 1 /* MPP[ 5]: NF_IO[7] */ + 6 1 /* MPP[ 6]: SYSRST_OUTn */ + 7 0 /* MPP[ 7]: GPO[7] */ + 8 1 /* MPP[ 8]: TW_SDA */ + 9 1 /* MPP[ 9]: TW_SCK */ + 10 3 /* MPP[10]: UA0_TXD */ + 11 3 /* MPP[11]: US0_RXD */ + 12 1 /* MPP[12]: SD_CLK */ + 13 1 /* MPP[13]: SD_CMD */ + 14 1 /* MPP[14]: SD_D[0] */ + 15 1 /* MPP[15]: SD_D[1] */ + 16 1 /* MPP[16]: SD_D[2] */ + 17 1 /* MPP[17]: SD_D[3] */ + 18 1 /* MPP[18]: NF_IO[0] */ + 19 1 /* MPP[19]: NF_IO[1] */ + 20 3 /* MPP[20]: GE1[ 0] */ + 21 3 /* MPP[21]: GE1[ 1] */ + 22 3 /* MPP[22]: GE1[ 2] */ + 23 3 /* MPP[23]: GE1[ 3] */ + 24 3 /* MPP[24]: GE1[ 4] */ + 25 3 /* MPP[25]: GE1[ 5] */ + 26 3 /* MPP[26]: GE1[ 6] */ + 27 3 /* MPP[27]: GE1[ 7] */ + 28 3 /* MPP[28]: GE1[ 8] */ + 29 3 /* MPP[29]: GE1[ 9] */ + 30 3 /* MPP[30]: GE1[10] */ + 31 3 /* MPP[31]: GE1[11] */ + 32 3 /* MPP[32]: GE1[12] */ + 33 3 /* MPP[33]: GE1[13] */ + 34 3 /* MPP[34]: GE1[14] */ + 35 3 /* MPP[35]: GE1[15] */ + 36 0 /* MPP[36]: GPIO[36] */ + 37 0 /* MPP[37]: GPIO[37] */ + 38 0 /* MPP[38]: GPIO[38] */ + 39 0 /* MPP[39]: GPIO[39] */ + 40 2 /* MPP[40]: TDM_SPI_SCK */ + 41 2 /* MPP[41]: TDM_SPI_MISO */ + 42 2 /* MPP[42]: TDM_SPI_MOSI */ + 43 0 /* MPP[43]: GPIO[43] */ + 44 0 /* MPP[44]: GPIO[44] */ + 45 0 /* MPP[45]: GPIO[45] */ + 46 0 /* MPP[46]: GPIO[46] */ + 47 0 /* MPP[47]: GPIO[47] */ + 48 0 /* MPP[48]: GPIO[48] */ + 49 0 /* MPP[49]: GPIO[49] */ + >; + }; + + GPIO: gpio@10100 { + #gpio-cells = <3>; + compatible = "mrvl,gpio"; + reg = <0x10100 0x20>; + gpio-controller; + interrupts = <35 36 37 38 39 40 41>; + interrupt-parent = <&PIC>; + pin-count = <50>; + }; + + gpioled@0 { + compatible = "mrvl,gpioled"; + + gpios = <&GPIO 47 2 0 /* GPIO[47] BT LED: OUT */ + &GPIO 48 2 0 /* GPIO[48] WLAN LED: OUT */ + &GPIO 49 2 0>; /* GPIO[49] WLAN AP LED: OUT */ + }; + + rtc@10300 { + compatible = "mrvl,rtc"; + reg = <0x10300 0x08>; + }; + + twsi@11000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,twsi"; + reg = <0x11000 0x20>; + interrupts = <43>; + interrupt-parent = <&PIC>; + }; + + enet0: ethernet@72000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x72000 0x2000>; + ranges = <0x0 0x72000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <12 13 14 11 46>; + interrupt-parent = <&PIC>; + phy-handle = <&phy0>; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,mdio"; + + phy0: ethernet-phy@0 { + reg = <0x0>; + }; + + phy1: ethernet-phy@1 { + reg = <0x1>; + }; + }; + }; + + enet1: ethernet@76000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x76000 0x02000>; + ranges = <0x0 0x76000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <16 17 18 15 47>; + interrupt-parent = <&PIC>; + phy-handle = <&phy1>; + }; + + serial0: serial@12000 { + compatible = "ns16550"; + reg = <0x12000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <33>; + interrupt-parent = <&PIC>; + }; + + serial1: serial@12100 { + compatible = "ns16550"; + reg = <0x12100 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <34>; + interrupt-parent = <&PIC>; + }; + + crypto@30000 { + compatible = "mrvl,cesa"; + reg = <0x30000 0x1000 /* tdma base reg chan 0 */ + 0x3D000 0x1000>; /* cesa base reg chan 0 */ + interrupts = <22>; + interrupt-parent = <&PIC>; + + sram-handle = <&SRAM>; + }; + + usb@50000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x50000 0x1000>; + interrupts = <48 19>; + interrupt-parent = <&PIC>; + }; + + xor@60000 { + compatible = "mrvl,xor"; + reg = <0x60000 0x1000>; + interrupts = <5 6 7 8>; + interrupt-parent = <&PIC>; + }; + + sata@80000 { + compatible = "mrvl,sata"; + reg = <0x80000 0x6000>; + interrupts = <21>; + interrupt-parent = <&PIC>; + }; + + sdio@90000 { + compatible = "mrvl,sdio"; + reg = <0x90000 0x134>; + interrupts = <28>; + interrupt-parent = <&PIC>; + }; + }; + + SRAM: sram@fd000000 { + compatible = "mrvl,cesa-sram"; + reg = <0xfd000000 0x00100000>; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; + +}; Property changes on: head/sys/dts/arm/dreamplug-1001N.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/ea3250.dts =================================================================== --- head/sys/dts/arm/ea3250.dts (nonexistent) +++ head/sys/dts/arm/ea3250.dts (revision 325826) @@ -0,0 +1,270 @@ +/* + * Copyright (c) 2011 Jakub Klama + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Embedded Artists LPC3250-Kit Device Tree Source. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "ea,LPC3250-KIT"; + compatible = "LPC3250-KIT"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + soc = &soc; + serial4 = &serial4; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,926EJ-S"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x4000>; // L1, 16K + i-cache-size = <0x4000>; // L1, 16K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x4000000>; // 64M at 0x80000000 + }; + + soc: ahb7@40000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x40000000 0x10000000>; + bus-frequency = <13000000>; + + pwr@4000 { + compatible = "lpc,pwr"; + reg = <0x4000 0x4000>; + }; + + PIC: pic@8000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x8000 0xc000>; + compatible = "lpc,pic"; + }; + + timer@44000 { + compatible = "lpc,timer"; + reg = <0x44000 0x4000 + 0x4c000 0x4000>; + interrupts = <16 17>; + interrupt-parent = <&PIC>; + }; + + rtc@24000 { + compatible = "lpc,rtc"; + reg = <0x24000 0x4000>; + interrupts = <52>; + interrupt-parent = <&PIC>; + }; + + serial0: serial@14000 { + compatible = "lpc,hsuart"; + status = "disabled"; + reg = <0x14000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <26>; + interrupt-parent = <&PIC>; + }; + + serial1: serial@18000 { + compatible = "lpc,hsuart"; + status = "disabled"; + reg = <0x18000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <25>; + interrupt-parent = <&PIC>; + }; + + serial2: serial@80000 { + compatible = "lpc,uart"; + status = "disabled"; + reg = <0x80000 0x20>; + reg-shift = <2>; + clock-frequency = <13000000>; + interrupts = <7>; + interrupt-parent = <&PIC>; + }; + + serial3: serial@88000 { + compatible = "lpc,uart"; + status = "disabled"; + reg = <0x88000 0x20>; + reg-shift = <2>; + clock-frequency = <13000000>; + interrupts = <8>; + interrupt-parent = <&PIC>; + }; + + serial4: serial@90000 { + compatible = "lpc,uart"; + reg = <0x90000 0x20>; + reg-shift = <2>; + clock-frequency = <13000000>; + current-speed = <115200>; + interrupts = <9>; + interrupt-parent = <&PIC>; + }; + + serial5: serial@98000 { + compatible = "lpc,uart"; + status = "disabled"; + reg = <0x98000 0x20>; + reg-shift = <2>; + clock-frequency = <13000000>; + interrupts = <10>; + interrupt-parent = <&PIC>; + }; + + serial6: serial@1c000 { + compatible = "lpc,uart"; + status = "disabled"; + reg = <0x1c000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <24>; + interrupt-parent = <&PIC>; + }; + + gpio@28000 { + compatible = "lpc,gpio"; + reg = <0x28000 0x4000>; + }; + }; + + ahb6@30000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x30000000 0x10000000>; + + dmac@1000000 { + compatible = "lpc,dmac"; + reg = <0x1000000 0x20000>; + interrupts = <28>; + interrupt-parent = <&PIC>; + }; + + usb@1020000 { + compatible = "lpc,usb-ohci", "usb-ohci"; + reg = <0x1020000 0x20000>; + interrupts = <59>; + interrupt-parent = <&PIC>; + }; + + lpcfb@1040000 { + compatible = "lpc,fb"; + reg = <0x1040000 0x20000>; + interrupts = <14>; + interrupt-parent = <&PIC>; + + /* Screen parameters: */ + is-tft = <1>; + horizontal-resolution = <240>; + vertical-resolution = <320>; + bits-per-pixel = <16>; + pixel-clock = <121654>; + left-margin = <28>; + right-margin = <10>; + upper-margin = <2>; + lower-margin = <2>; + hsync-len = <3>; + vsync-len = <2>; + }; + + lpe@1060000 { + compatible = "lpc,ethernet"; + reg = <0x1060000 0x20000>; + interrupts = <29>; + interrupt-parent = <&PIC>; + local-mac-address = [ 00 1a f1 01 1f 23 ]; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lpc,mdio"; + + phy0: ethernet-phy@0 { + reg = <0x0>; + }; + }; + + }; + }; + + ahb5@20000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x20000000 0x10000000>; + + spi0@84000 { + compatible = "lpc,spi"; + reg = <0x84000 0x4000>; + interrupts = <20>; + interrupt-parent = <&PIC>; + }; + + spi1@8c000 { + compatible = "lpc,spi"; + status = "disabled"; + reg = <0x8c000 0x4000>; + interrupts = <21>; + interrupt-parent = <&PIC>; + }; + + lpcmmc@98000 { + compatible = "lpc,mmc"; + reg = <0x98000 0x4000>; + interrupts = <15 13>; + interrupt-parent = <&PIC>; + }; + }; + + chosen { + stdin = "serial4"; + stdout = "serial4"; + }; +}; Property changes on: head/sys/dts/arm/ea3250.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/efikamx.dts =================================================================== --- head/sys/dts/arm/efikamx.dts (nonexistent) +++ head/sys/dts/arm/efikamx.dts (revision 325826) @@ -0,0 +1,128 @@ +/* + * Copyright (c) 2012 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under sponsorship from + * the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Freescale i.MX515 Device Tree Source. + * + * $FreeBSD$ + */ + +/dts-v1/; +/include/ "imx51x.dtsi" + +/ { + model = "Genesi Efika MX"; + compatible = "genesi,imx51-efikamx", "fsl,imx51"; + + memory { + /* RAM 512M */ + reg = <0x90000000 0x20000000>; + }; + + localbus@5e000000 { + ipu3@5e000000 { + status = "okay"; + }; + }; + + soc@70000000 { + aips@70000000 { + spba@70000000 { + esdhc@70004000 { + clock-frequency = <216000000>; + status = "okay"; + }; + esdhc@70008000 { + clock-frequency = <216000000>; + status = "okay"; + }; + SSI2: ssi@70014000 { + status = "okay"; + }; + }; + timer@73fa0000 { + status = "okay"; + }; + + /* UART1, console */ + UART1: serial@73fbc000 { + status = "okay"; + clock-frequency = <3000000>; /* XXX */ + }; + + clock@73fd4000 { + status = "okay"; + }; + gpio@73f84000 { + status = "okay"; + }; + gpio@73f88000 { + status = "okay"; + }; + gpio@73f8c000 { + status = "okay"; + }; + gpio@73f90000 { + status = "okay"; + }; + usb@73f80000 /* OTG */ { + status = "okay"; + }; + usb@73f80200 /* Host 1 */ { + status = "okay"; + }; + wdog@73f98000 { + status = "okay"; + }; + }; + aips@80000000 { + i2c@83fc4000 { + status = "okay"; + }; + i2c@83fc8000 { + status = "okay"; + }; + audmux@83fd4000 { + status = "okay"; + }; + ide@83fe0000 { + status = "okay"; + }; + }; + }; + + aliases { + UART1 = &UART1; + SSI2 = &SSI2; + }; + + chosen { + bootargs = "-v"; + stdin = "UART1"; + stdout = "UART1"; + }; +}; Property changes on: head/sys/dts/arm/efikamx.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/exynos5.dtsi =================================================================== --- head/sys/dts/arm/exynos5.dtsi (nonexistent) +++ head/sys/dts/arm/exynos5.dtsi (revision 325826) @@ -0,0 +1,337 @@ +/*- + * Copyright (c) 2013-2014 Ruslan Bukin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/ { + compatible = "samsung,exynos5"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&GIC>; + + aliases { + soc = &SOC; + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + clk0 = &clk0; + dp0 = &dp0; + fimd0 = &fimd0; + }; + + SOC: Exynos5@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + bus-frequency = <0>; + + pmu_system_controller: system-controller@10040000 { + reg = <0x10040000 0x5000>; + status = "disabled"; + }; + + GIC: interrupt-controller@10481000 { + compatible = "arm,gic"; + reg = < 0x10481000 0x1000 >, /* Distributor Registers */ + < 0x10482000 0x2000 >; /* CPU Interface Registers */ + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + + combiner: interrupt-controller@10440000 { + compatible = "exynos,combiner"; + reg = <0x10440000 0x1000>; + interrupts = < 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 >; + interrupt-parent = <&GIC>; + }; + + clk0: clk@10010000 { + compatible = "exynos,clk"; + reg = < 0x10020000 0x20000 >; + }; + + mct { + compatible = "exynos,mct"; + reg = < 0x101C0000 0x1000 >; + clock-frequency = <24000000>; + }; + + generic_timer { + compatible = "arm,armv7-timer"; + clock-frequency = <24000000>; + interrupts = < 29 30 27 26 >; + interrupt-parent = <&GIC>; + }; + + pwm { + compatible = "samsung,s3c24x0-timer"; + reg = <0x12DD0000 0x1000>; + interrupts = < 71 >; + interrupt-parent = <&GIC>; + clock-frequency = <24000000>; + }; + + pad0: pad@11400000 { + status = "disabled"; + }; + + usbdrd_phy0: phy@12100000 { + compatible = "samsung,exynos5420-usbdrd-phy"; + status = "disabled"; + reg = <0x12100000 0x100>; + samsung,pmu-syscon = <&pmu_system_controller>; + }; + + usbdrd_phy1: phy@12500000 { + compatible = "samsung,exynos5420-usbdrd-phy"; + status = "disabled"; + reg = <0x12500000 0x100>; + samsung,pmu-syscon = <&pmu_system_controller>; + }; + + xhci@12000000 { + compatible = "samsung,exynos5250-dwusb3"; + status = "disabled"; + reg = <0x12000000 0x1000>, + <0x1200c100 0x1000>; + interrupts = < 104 >; + interrupt-parent = <&GIC>; + }; + + xhci@12400000 { + compatible = "samsung,exynos5250-dwusb3"; + status = "disabled"; + reg = <0x12400000 0x1000>, + <0x1240c100 0x1000>; + interrupts = < 105 >; + interrupt-parent = <&GIC>; + }; + + usb@12110000 { + compatible = "exynos,usb-ehci", "usb-ehci"; + status = "disabled"; + reg = <0x12110000 0x1000>, /* EHCI */ + <0x12130000 0x1000>, /* EHCI host ctrl */ + <0x10050230 0x10>; /* Sysreg */ + interrupts = < 103 >; + interrupt-parent = <&GIC>; + }; + + usb@12120000 { + compatible = "exynos,usb-ohci", "usb-ohci"; + status = "disabled"; + reg = <0x12120000 0x10000>; + interrupts = < 103 >; + interrupt-parent = <&GIC>; + }; + + sdhci@12200000 { + compatible = "sdhci_generic"; + status = "disabled"; + reg = <0x12200000 0x1000>; + interrupts = <107>; + interrupt-parent = <&GIC>; + max-frequency = <24000000>; /* TODO: verify freq */ + }; + + sdhci@12210000 { + compatible = "sdhci_generic"; + status = "disabled"; + reg = <0x12210000 0x1000>; + interrupts = <108>; + interrupt-parent = <&GIC>; + max-frequency = <24000000>; + }; + + sdhci@12220000 { + compatible = "sdhci_generic"; + status = "disabled"; + reg = <0x12220000 0x1000>; + interrupts = <109>; + interrupt-parent = <&GIC>; + max-frequency = <24000000>; + }; + + sdhci@12230000 { + compatible = "sdhci_generic"; + status = "disabled"; + reg = <0x12230000 0x1000>; + interrupts = <110>; + interrupt-parent = <&GIC>; + max-frequency = <24000000>; + }; + + serial0: serial@12C00000 { + compatible = "exynos"; + status = "disabled"; + reg = <0x12C00000 0x100>; + interrupts = < 83 >; + interrupt-parent = <&GIC>; + clock-frequency = < 100000000 >; + current-speed = <115200>; + }; + + serial1: serial@12C10000 { + compatible = "exynos"; + status = "disabled"; + reg = <0x12C10000 0x100>; + interrupts = < 84 >; + interrupt-parent = <&GIC>; + clock-frequency = < 100000000 >; + current-speed = <115200>; + }; + + serial2: serial@12C20000 { + compatible = "exynos"; + status = "disabled"; + reg = <0x12C20000 0x100>; + interrupts = < 85 >; + interrupt-parent = <&GIC>; + clock-frequency = < 100000000 >; + current-speed = <115200>; + }; + + serial3: serial@12C30000 { + compatible = "exynos"; + status = "disabled"; + reg = <0x12C30000 0x100>; + interrupts = < 86 >; + interrupt-parent = <&GIC>; + clock-frequency = < 100000000 >; + current-speed = <115200>; + }; + + spi0: spi@12d20000 { + compatible = "samsung,exynos5-spi"; + status = "disabled"; + reg = <0x12d20000 0x100>; + interrupts = < 100 >; + interrupt-parent = <&GIC>; + }; + + spi1: spi@12d30000 { + compatible = "samsung,exynos5-spi"; + status = "disabled"; + reg = <0x12d30000 0x100>; + interrupts = < 101 >; + interrupt-parent = <&GIC>; + }; + + spi2: spi@12d40000 { + compatible = "samsung,exynos5-spi"; + status = "disabled"; + reg = <0x12d40000 0x100>; + interrupts = < 102 >; + interrupt-parent = <&GIC>; + }; + + i2c0: i2c@12C60000 { + compatible = "exynos,i2c"; + status = "disabled"; + reg = <0x12C60000 0x10000>; + interrupts = < 88 >; + interrupt-parent = <&GIC>; + }; + + i2c1: i2c@12C70000 { + compatible = "exynos,i2c"; + status = "disabled"; + reg = <0x12C70000 0x10000>; + interrupts = < 89 >; + interrupt-parent = <&GIC>; + }; + + i2c2: i2c@12C80000 { + compatible = "exynos,i2c"; + status = "disabled"; + reg = <0x12C80000 0x10000>; + interrupts = < 90 >; + interrupt-parent = <&GIC>; + }; + + i2c3: i2c@12C90000 { + compatible = "exynos,i2c"; + status = "disabled"; + reg = <0x12C90000 0x10000>; + interrupts = < 91 >; + interrupt-parent = <&GIC>; + }; + + i2c4: i2c@12CA0000 { + compatible = "exynos,i2c"; + status = "disabled"; + reg = <0x12CA0000 0x10000>; + interrupts = < 92 >; + interrupt-parent = <&GIC>; + }; + + i2c5: i2c@12CB0000 { + compatible = "exynos,i2c"; + status = "disabled"; + reg = <0x12CB0000 0x10000>; + interrupts = < 93 >; + interrupt-parent = <&GIC>; + }; + + i2c6: i2c@12CC0000 { + compatible = "exynos,i2c"; + status = "disabled"; + reg = <0x12CC0000 0x10000>; + interrupts = < 94 >; + interrupt-parent = <&GIC>; + }; + + i2c7: i2c@12CD0000 { + compatible = "exynos,i2c"; + status = "disabled"; + reg = <0x12CD0000 0x10000>; + interrupts = < 95 >; + interrupt-parent = <&GIC>; + }; + + fimd0: fimd@14400000 { + compatible = "exynos,fimd"; + status = "disabled"; + reg = < 0x14400000 0x10000 >, /* fimd */ + < 0x14420000 0x10000 >, /* disp */ + < 0x10050000 0x220 >; /* sysreg */ + interrupt-parent = <&GIC>; + }; + + dp0: dp@145B0000 { + compatible = "exynos,dp"; + status = "disabled"; + reg = < 0x145B0000 0x10000 >; + interrupt-parent = <&GIC>; + }; + }; +}; Property changes on: head/sys/dts/arm/exynos5.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/exynos5250-arndale.dts =================================================================== --- head/sys/dts/arm/exynos5250-arndale.dts (nonexistent) +++ head/sys/dts/arm/exynos5250-arndale.dts (revision 325826) @@ -0,0 +1,57 @@ +/*- + * Copyright (c) 2013 Ruslan Bukin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/include/ "exynos5250.dtsi" + +/ { + model = "Arndale Board"; + + memory { + device_type = "memory"; + reg = < 0x40000000 0x80000000 >; /* 2G */ + }; + + SOC: Exynos5@0 { + + pad0: pad@11400000 { + status = "okay"; + }; + + serial2: serial@12C20000 { + status = "okay"; + }; + + }; + + chosen { + stdin = &serial2; + stdout = &serial2; + }; +}; Property changes on: head/sys/dts/arm/exynos5250-arndale.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/exynos5250-snow.dts =================================================================== --- head/sys/dts/arm/exynos5250-snow.dts (nonexistent) +++ head/sys/dts/arm/exynos5250-snow.dts (revision 325826) @@ -0,0 +1,82 @@ +/*- + * Copyright (c) 2014 Ruslan Bukin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/include/ "exynos5250.dtsi" + +/ { + model = "Samsung Chromebook"; + + memory { + device_type = "memory"; + reg = < 0x40000000 0x80000000 >; /* 2G */ + }; + + SOC: Exynos5@0 { + + pad0: pad@11400000 { + status = "okay"; + }; + + fimd0: fimd@14400000 { + status = "okay"; + + panel-size = < 1366 768 >; + panel-hsync = < 80 32 48 >; + panel-vsync = < 14 5 3 >; + panel-clk-div = < 17 >; + panel-backlight-pin = < 25 >; + }; + + i2c4: i2c@12CA0000 { + status = "okay"; + }; + + keyboard-controller { + compatible = "google,mkbp-keyb"; + google,key-rows = <8>; + google,key-columns = <13>; + freebsd,intr-gpio = <146>; + }; + + usbdrd_phy0: phy@12100000 { + vbus-supply = < 155 >; + }; + }; + + i2c-arbitrator { + freebsd,our-gpio = <177>; + freebsd,ec-gpio = <168>; + }; + + chosen { + stdin = &serial2; + stdout = &serial2; + }; +}; Property changes on: head/sys/dts/arm/exynos5250-snow.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/exynos5250-spring.dts =================================================================== --- head/sys/dts/arm/exynos5250-spring.dts (nonexistent) +++ head/sys/dts/arm/exynos5250-spring.dts (revision 325826) @@ -0,0 +1,78 @@ +/*- + * Copyright (c) 2014 Ruslan Bukin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/include/ "exynos5250.dtsi" + +/ { + model = "HP Chromebook 11"; + + memory { + device_type = "memory"; + reg = < 0x40000000 0x80000000 >; /* 2G */ + }; + + SOC: Exynos5@0 { + + pad0: pad@11400000 { + status = "okay"; + }; + + fimd0: fimd@14400000 { + status = "okay"; + + panel-size = < 1366 768 >; + panel-hsync = < 80 32 48 >; + panel-vsync = < 14 5 3 >; + panel-clk-div = < 17 >; + panel-backlight-pin = < 25 >; + }; + + i2c4: i2c@12CA0000 { + status = "okay"; + }; + + keyboard-controller { + compatible = "google,mkbp-keyb"; + google,key-rows = <8>; + google,key-columns = <13>; + freebsd,intr-gpio = <146>; + }; + }; + + chosen { + stdin = &serial2; + stdout = &serial2; + }; + + hsichub@13400000 { + compatible = "smsc,usb3503"; + freebsd,reset-gpio = <172>; + }; +}; Property changes on: head/sys/dts/arm/exynos5250-spring.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/exynos5250.dtsi =================================================================== --- head/sys/dts/arm/exynos5250.dtsi (nonexistent) +++ head/sys/dts/arm/exynos5250.dtsi (revision 325826) @@ -0,0 +1,79 @@ +/*- + * Copyright (c) 2013-2014 Ruslan Bukin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/include/ "exynos5.dtsi" + +/ { + compatible = "samsung,exynos5250", "samsung,exynos5"; + + SOC: Exynos5@0 { + + pmu_system_controller: system-controller@10040000 { + compatible = "samsung,exynos5250-pmu"; + status = "okay"; + }; + + pad0: pad@11400000 { + compatible = "samsung,exynos5250-padctrl"; + reg = <0x11400000 0x1000>, + <0x13400000 0x1000>, + <0x10D10000 0x1000>, + <0x03860000 0x1000>; + interrupts = < 78 77 82 79 >; + interrupt-parent = <&GIC>; + }; + + serial0: serial@12C00000 { + clock-frequency = < 100000000 >; + }; + + serial1: serial@12C10000 { + clock-frequency = < 100000000 >; + }; + + serial2: serial@12C20000 { + clock-frequency = < 100000000 >; + }; + + serial3: serial@12C30000 { + clock-frequency = < 100000000 >; + }; + + usb@12110000 { + status = "okay"; + }; + + usbdrd_phy0: phy@12100000 { + status = "okay"; + }; + + xhci@12000000 { + status = "okay"; + }; + }; +}; Property changes on: head/sys/dts/arm/exynos5250.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/exynos5420-arndale-octa.dts =================================================================== --- head/sys/dts/arm/exynos5420-arndale-octa.dts (nonexistent) +++ head/sys/dts/arm/exynos5420-arndale-octa.dts (revision 325826) @@ -0,0 +1,70 @@ +/*- + * Copyright (c) 2014 Ruslan Bukin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/include/ "exynos5420.dtsi" + +/ { + model = "Arndale Octa Board"; + + memory { + device_type = "memory"; + reg = < 0x20000000 0x7f200000 >; /* 2G */ + }; + + SOC: Exynos5@0 { + serial3: serial@12C30000 { + status = "okay"; + }; + + usb@12110000 { + status = "okay"; + }; + + mmc2: dwmmc@12220000 { + status = "okay"; + num-slots = <1>; + supports-highspeed; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + bus-frequency = <50000000>; + + slot@0 { + reg = <0>; + bus-width = <4>; + }; + }; + }; + + chosen { + stdin = &serial3; + stdout = &serial3; + }; +}; Property changes on: head/sys/dts/arm/exynos5420-arndale-octa.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/exynos5420-peach-pit.dts =================================================================== --- head/sys/dts/arm/exynos5420-peach-pit.dts (nonexistent) +++ head/sys/dts/arm/exynos5420-peach-pit.dts (revision 325826) @@ -0,0 +1,87 @@ +/*- + * Copyright (c) 2014 Ruslan Bukin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/include/ "exynos5420.dtsi" + +/ { + model = "Chromebook Peach Pit"; + + memory { + device_type = "memory"; + reg = < 0x20000000 0xdf000000 >; /* 3.5G */ + }; + + SOC: Exynos5@0 { + + fimd0: fimd@14400000 { + status = "okay"; + + panel-size = < 1366 768 >; + panel-hsync = < 80 32 48 >; + panel-vsync = < 14 5 3 >; + panel-clk-div = < 17 >; + panel-backlight-pin = < 25 >; + }; + + spi2: spi@12d40000 { + status = "okay"; + }; + + keyboard-controller { + compatible = "google,mkbp-keyb"; + google,key-rows = <8>; + google,key-columns = <13>; + freebsd,intr-gpio = < 21 >; + }; + + usbdrd_phy0: phy@12100000 { + vbus-supply = < 217 >; + }; + + usbdrd_phy1: phy@12500000 { + vbus-supply = < 218 >; + }; + + mmc2: dwmmc@12220000 { + status = "okay"; + num-slots = <1>; + supports-highspeed; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + bus-frequency = <50000000>; + + slot@0 { + reg = <0>; + bus-width = <4>; + }; + }; + }; +}; Property changes on: head/sys/dts/arm/exynos5420-peach-pit.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/exynos5420.dtsi =================================================================== --- head/sys/dts/arm/exynos5420.dtsi (nonexistent) +++ head/sys/dts/arm/exynos5420.dtsi (revision 325826) @@ -0,0 +1,112 @@ +/*- + * Copyright (c) 2014 Ruslan Bukin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/include/ "exynos5.dtsi" + +/ { + compatible = "samsung,exynos5420", "samsung,exynos5"; + + SOC: Exynos5@0 { + + pmu_system_controller: system-controller@10040000 { + compatible = "samsung,exynos5420-pmu"; + status = "okay"; + }; + + pad0: pad@11400000 { + compatible = "samsung,exynos5420-padctrl"; + status = "okay"; + reg = <0x13400000 0x1000>, + <0x13410000 0x1000>, + <0x14000000 0x1000>, + <0x14010000 0x1000>, + <0x03860000 0x1000>; + interrupts = < 77 110 78 82 79 >; + interrupt-parent = <&GIC>; + }; + + serial0: serial@12C00000 { + clock-frequency = < 50000000 >; + }; + + serial1: serial@12C10000 { + clock-frequency = < 50000000 >; + }; + + serial2: serial@12C20000 { + clock-frequency = < 50000000 >; + }; + + serial3: serial@12C30000 { + clock-frequency = < 50000000 >; + }; + + usbdrd_phy0: phy@12100000 { + status = "okay"; + }; + + usbdrd_phy1: phy@12500000 { + status = "okay"; + }; + + xhci@12000000 { + status = "okay"; + }; + + xhci@12400000 { + status = "okay"; + }; + + mmc0: dwmmc@12200000 { + compatible = "samsung,exynos5420-dw-mshc-smu"; + reg = <0x12200000 0x10000>; + interrupts = <107>; + interrupt-parent = <&GIC>; + fifo-depth = <0x40>; + status = "disabled"; + }; + + mmc1: dwmmc@12210000 { + compatible = "samsung,exynos5420-dw-mshc-smu"; + reg = <0x12210000 0x10000>; + interrupts = <108>; + interrupt-parent = <&GIC>; + fifo-depth = <0x40>; + status = "disabled"; + }; + + mmc2: dwmmc@12220000 { + compatible = "samsung,exynos5420-dw-mshc"; + reg = <0x12220000 0x10000>; + interrupts = <109>; + interrupt-parent = <&GIC>; + fifo-depth = <0x40>; + status = "disabled"; + }; + }; +}; Property changes on: head/sys/dts/arm/exynos5420.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/h3.dtsi =================================================================== --- head/sys/dts/arm/h3.dtsi (nonexistent) +++ head/sys/dts/arm/h3.dtsi (revision 325826) @@ -0,0 +1,107 @@ +/*- + * Copyright (c) 2016 Jared McNeill + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/ { + cpus { + cpu0: cpu@0 { + clocks = <&ccu CLK_CPUX>; + clock-latency = <2000000>; + }; + }; + + soc { + emac: ethernet@1c30000 { + compatible = "allwinner,sun8i-h3-emac"; + reg = <0x01c30000 0x104>, <0x01c00030 0x4>; + reg-names = "emac", "syscon"; + interrupts = ; + resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>; + reset-names = "ahb", "ephy"; + clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>; + clock-names = "ahb", "ephy"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + r_i2c: i2c@1f02400 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01f02400 0x400>; + interrupts = ; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + sid: eeprom@1c14000 { + compatible = "allwinner,sun8i-a83t-sid"; + reg = <0x01c14000 0x400>; + }; + + rtp: rtp@1c25000 { + compatible = "allwinner,sun8i-h3-ts"; + reg = <0x01c25000 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; + clock-names = "ahb", "ths"; + resets = <&ccu RST_BUS_THS 8>; + #thermal-sensor-cells = <0>; + }; + + /* codec: codec@01c22c00 { */ + /* compatible = "allwinner,sun8i-h3-codec"; */ + /* reg = <0x01c22c00 0x100>, <0x01f015c0 0x4>; */ + /* reg-names = "codec", "pr"; */ + /* interrupts = ; */ + /* clocks = <&ccu CLK_BUS_CODEC>, <&codec_clk>; */ + /* clock-names = "ahb", "codec"; */ + /* resets = <&ahb_rst 128>; */ + /* reset-names = "ahb"; */ + /* dmas = <&dma 15>, <&dma 15>; */ + /* dma-names = "rx", "tx"; */ + /* status = "disabled"; */ + /* }; */ + + }; +}; + +&pio { + emac_pins_rgmii_a: emac_rgmii@0 { + allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", + "PD7", "PD8", "PD9", "PD10", "PD12", "PD13", + "PD15", "PD16", "PD17"; + allwinner,function = "emac"; + allwinner,drive = <40>; + }; + + emac_phy_reset_pin: emac_phy_reset_pin@0 { + allwinner,pins = "PD6"; + allwinner,function = "gpio_out"; + allwinner,drive = <10>; + }; +}; Property changes on: head/sys/dts/arm/h3.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/hl201.dts =================================================================== --- head/sys/dts/arm/hl201.dts (nonexistent) +++ head/sys/dts/arm/hl201.dts (revision 325826) @@ -0,0 +1,44 @@ +/* + * Hot-e HL-201 - Warner Losh public domain + * + * $FreeBSD$ + */ +/dts-v1/; + +/* + * The following is a white lie. The HL-201 is a stripped down version of + * the SAM9G20EK board with a video output chip. + */ +#include "at91sam9g20ek_common.dtsi" + +/ { + model = "Thinlinx HL201"; + compatible = "thinlinx,hl201", "atmel,at91sam9g20ek", "atmel,at91sam9g20", "atmel,at91sam9"; + + leds { + compatible = "gpio-leds"; + + ds1 { + label = "ds1"; + gpios = <&pioA 9 0>; + linux,default-trigger = "heartbeat"; + }; + + ds5 { + label = "ds5"; + gpios = <&pioA 6 1>; + }; + }; + + /* Missing: one wire serial number, video chip */ + + aliases { + dbgu = &dbgu; + }; + + + chosen { + stdin = "dbgu"; + stdout = "dbgu"; + }; +}; Property changes on: head/sys/dts/arm/hl201.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/imx51x.dtsi =================================================================== --- head/sys/dts/arm/imx51x.dtsi (nonexistent) +++ head/sys/dts/arm/imx51x.dtsi (revision 325826) @@ -0,0 +1,622 @@ +/* + * Copyright (c) 2012 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under sponsorship from + * the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Freescale i.MX515 Device Tree Source. + * + * $FreeBSD$ + */ + +/ { + #address-cells = <1>; + #size-cells = <1>; + + aliases { + soc = &SOC; + }; + + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,MCIMX515"; + reg = <0x0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <0x8000>; + i-cache-size = <0x8000>; + /* TODO: describe L2 cache also */ + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + localbus@e0000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + /* This reflects CPU decode windows setup. */ + ranges; + + tzic: tz-interrupt-controller@e0000000 { + compatible = "fsl,imx51-tzic", "fsl,tzic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0xe0000000 0x00004000>; + }; + /* + * 60000000 60000FFF 4K Debug ROM + * 60001000 60001FFF 4K ETB + * 60002000 60002FFF 4K ETM + * 60003000 60003FFF 4K TPIU + * 60004000 60004FFF 4K CTI0 + * 60005000 60005FFF 4K CTI1 + * 60006000 60006FFF 4K CTI2 + * 60007000 60007FFF 4K CTI3 + * 60008000 60008FFF 4K Cortex Debug Unit + * + * E0000000 E0003FFF 0x4000 TZIC + */ + }; + + SOC: soc@70000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&tzic>; + ranges = <0x70000000 0x70000000 0x14000000>; + + aips@70000000 { /* AIPS1 */ + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&tzic>; + ranges; + + /* Required by many devices, so better to stay first */ + /* 73FD4000 0x4000 CCM */ + clock@73fd4000 { + compatible = "fsl,imx51-ccm"; + /* 83F80000 0x4000 DPLLIP1 */ + /* 83F84000 0x4000 DPLLIP2 */ + /* 83F88000 0x4000 DPLLIP3 */ + reg = <0x73fd4000 0x4000 + 0x83F80000 0x4000 + 0x83F84000 0x4000 + 0x83F88000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <71 72>; + status = "disabled"; + }; + + /* + * GPIO modules moved up - to have it attached for + * drivers which rely on GPIO + */ + /* 73F84000 0x4000 GPIO1 */ + gpio1: gpio@73f84000 { + compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; + reg = <0x73f84000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <50 51 42 43 44 45 46 47 48 49>; + /* TODO: use <> also */ + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + /* 73F88000 0x4000 GPIO2 */ + gpio2: gpio@73f88000 { + compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; + reg = <0x73f88000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <52 53>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + /* 73F8C000 0x4000 GPIO3 */ + gpio3: gpio@73f8c000 { + compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; + reg = <0x73f8c000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <54 55>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + /* 73F90000 0x4000 GPIO4 */ + gpio4: gpio@73f90000 { + compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; + reg = <0x73f90000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <56 57>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + spba@70000000 { + compatible = "fsl,spba-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&tzic>; + ranges; + + /* 70004000 0x4000 ESDHC 1 */ + esdhc@70004000 { + compatible = "fsl,imx51-esdhc"; + reg = <0x70004000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <1>; + status = "disabled"; + }; + + /* 70008000 0x4000 ESDHC 2 */ + esdhc@70008000 { + compatible = "fsl,imx51-esdhc"; + reg = <0x70008000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <2>; + status = "disabled"; + }; + + /* 7000C000 0x4000 UART 3 */ + uart3: serial@7000c000 { + compatible = "fsl,imx51-uart", "fsl,imx-uart"; + reg = <0x7000c000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <33>; + status = "disabled"; + }; + + /* 70010000 0x4000 eCSPI1 */ + ecspi@70010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx51-ecspi"; + reg = <0x70010000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <36>; + status = "disabled"; + }; + + /* 70014000 0x4000 SSI2 irq30 */ + SSI2: ssi@70014000 { + compatible = "fsl,imx51-ssi"; + reg = <0x70014000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <30>; + status = "disabled"; + }; + + /* 70020000 0x4000 ESDHC 3 */ + esdhc@70020000 { + compatible = "fsl,imx51-esdhc"; + reg = <0x70020000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <3>; + status = "disabled"; + }; + + /* 70024000 0x4000 ESDHC 4 */ + esdhc@70024000 { + compatible = "fsl,imx51-esdhc"; + reg = <0x70024000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <4>; + status = "disabled"; + }; + + /* 70028000 0x4000 SPDIF */ + /* 91 SPDIF */ + + /* 70030000 0x4000 PATA (PORT UDMA) irq70 */ + + /* 70034000 0x4000 SLM */ + /* 70038000 0x4000 HSI2C */ /* 64 HS-I2C */ + /* 7003C000 0x4000 SPBA */ + }; + + usbphy0: usbphy@0 { + compatible = "usb-nop-xceiv"; + status = "okay"; + }; + + usbotg: usb@73f80000 { + compatible = "fsl,imx51-usb", "fsl,imx27-usb"; + reg = <0x73f80000 0x0200>; + interrupts = <18>; + fsl,usbmisc = <&usbmisc 0>; + fsl,usbphy = <&usbphy0>; + status = "disabled"; + }; + + usbh1: usb@73f80200 { + compatible = "fsl,imx51-usb", "fsl,imx27-usb"; + reg = <0x73f80200 0x0200>; + interrupts = <14>; + fsl,usbmisc = <&usbmisc 1>; + status = "disabled"; + }; + + usbh2: usb@73f80400 { + compatible = "fsl,imx51-usb", "fsl,imx27-usb"; + reg = <0x73f80400 0x0200>; + interrupts = <16>; + fsl,usbmisc = <&usbmisc 2>; + status = "disabled"; + }; + + usbh3: usb@73f80600 { + compatible = "fsl,imx51-usb", "fsl,imx27-usb"; + reg = <0x73f80600 0x0200>; + interrupts = <17>; + fsl,usbmisc = <&usbmisc 3>; + status = "disabled"; + }; + + usbmisc: usbmisc@73f80800 { + #index-cells = <1>; + compatible = "fsl,imx51-usbmisc"; + reg = <0x73f80800 0x200>; + }; + + /* 73F98000 0x4000 WDOG1 */ + wdog@73f98000 { + compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; + reg = <0x73f98000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <58>; + status = "disabled"; + }; + + /* 73F9C000 0x4000 WDOG2 (TZ) */ + wdog@73f9c000 { + compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; + reg = <0x73f9c000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <59>; + status = "disabled"; + }; + + /* 73F94000 0x4000 KPP */ + keyboard@73f94000 { + compatible = "fsl,imx51-kpp"; + reg = <0x73f94000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <60>; + status = "disabled"; + }; + + /* 73FA0000 0x4000 GPT */ + timer@73fa0000 { + compatible = "fsl,imx51-gpt"; + reg = <0x73fa0000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <39>; + status = "disabled"; + }; + + /* 73FA4000 0x4000 SRTC */ + + rtc@73fa4000 { + compatible = "fsl,imx51-srtc"; + reg = <0x73fa4000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <24 25>; + status = "disabled"; + }; + + /* 73FA8000 0x4000 IOMUXC */ + iomux@73fa8000 { + compatible = "fsl,imx51-iomux"; + reg = <0x73fa8000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <7>; + }; + + /* 73FAC000 0x4000 EPIT1 */ + epit1: timer@73fac000 { + compatible = "fsl,imx51-epit"; + reg = <0x73fac000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <40>; + status = "disabled"; + }; + + /* 73FB0000 0x4000 EPIT2 */ + epit2: timer@73fb0000 { + compatible = "fsl,imx51-epit"; + reg = <0x73fb0000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <41>; + status = "disabled"; + }; + + /* 73FB4000 0x4000 PWM1 */ + pwm@73fb4000 { + compatible = "fsl,imx51-pwm"; + reg = <0x73fb4000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <61>; + status = "disabled"; + }; + + /* 73FB8000 0x4000 PWM2 */ + pwm@73fb8000 { + compatible = "fsl,imx51-pwm"; + reg = <0x73fb8000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <94>; + status = "disabled"; + }; + + /* 73FBC000 0x4000 UART 1 */ + uart1: serial@73fbc000 { + compatible = "fsl,imx51-uart", "fsl,imx-uart"; + reg = <0x73fbc000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <31>; + status = "disabled"; + }; + + /* 73FC0000 0x4000 UART 2 */ + uart2: serial@73fc0000 { + compatible = "fsl,imx51-uart", "fsl,imx-uart"; + reg = <0x73fc0000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <32>; + status = "disabled"; + }; + + /* 73FC4000 0x4000 USBOH3 */ + /* NOTYET + usb@73fc4000 { + compatible = "fsl,imx51-otg"; + reg = <0x73fc4000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <>; + status = "disabled"; + }; + */ + /* 73FD0000 0x4000 SRC */ + reset@73fd0000 { + compatible = "fsl,imx51-src"; + reg = <0x73fd0000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <75>; + status = "disabled"; + }; + /* 73FD8000 0x4000 GPC */ + power@73fd8000 { + compatible = "fsl,imx51-gpc"; + reg = <0x73fd8000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <73 74>; + status = "disabled"; + }; + + }; + + aips@80000000 { /* AIPS2 */ + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&tzic>; + ranges; + + /* 83F94000 0x4000 AHBMAX */ + /* 83F98000 0x4000 IIM */ + /* + * 69 IIM Interrupt request to the processor. + * Indicates to the processor that program or + * explicit. + */ + /* 83F9C000 0x4000 CSU */ + /* + * 27 CSU Interrupt Request 1. Indicates to the + * processor that one or more alarm inputs were. + */ + + /* 83FA0000 0x4000 TIGERP_PLATFORM_NE_32K_256K */ + /* irq76 Neon Monitor Interrupt */ + /* irq77 Performance Unit Interrupt */ + /* irq78 CTI IRQ */ + /* irq79 Debug Interrupt, Cross-Trigger Interface 1 */ + /* irq80 Debug Interrupt, Cross-Trigger Interface 1 */ + /* irq89 Debug Interrupt, Cross-Trigger Interface 2 */ + /* irq98 Debug Interrupt, Cross-Trigger Interface 3 */ + + /* 83FA4000 0x4000 OWIRE irq88 */ + /* 83FA8000 0x4000 FIRI irq93 */ + /* 83FAC000 0x4000 eCSPI2 */ + ecspi@83fac000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx51-ecspi"; + reg = <0x83fac000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <37>; + status = "disabled"; + }; + + /* 83FB0000 0x4000 SDMA */ + sdma@83fb0000 { + compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; + reg = <0x83fb0000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <6>; + }; + + /* 83FB4000 0x4000 SCC */ + /* 21 SCC Security Monitor High Priority Interrupt. */ + /* 22 SCC Secure (TrustZone) Interrupt. */ + /* 23 SCC Regular (Non-Secure) Interrupt. */ + + /* 83FB8000 0x4000 ROMCP */ + /* 83FBC000 0x4000 RTIC */ + /* + * 26 RTIC RTIC (Trust Zone) Interrupt Request. + * Indicates that the RTIC has completed hashing the + */ + + /* 83FC0000 0x4000 CSPI */ + cspi@83fc0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; + reg = <0x83fc0000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <38>; + status = "disabled"; + }; + + /* 83FC4000 0x4000 I2C2 */ + i2c@83fc4000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c", "fsl,imx-i2c"; + reg = <0x83fc4000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <63>; + status = "disabled"; + }; + + /* 83FC8000 0x4000 I2C1 */ + i2c@83fc8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c", "fsl,imx-i2c"; + reg = <0x83fc8000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <62>; + status = "disabled"; + }; + + /* 83FCC000 0x4000 SSI1 */ + /* 29 SSI1 SSI-1 Interrupt Request */ + SSI1: ssi@83fcc000 { + compatible = "fsl,imx51-ssi"; + reg = <0x83fcc000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <29>; + status = "disabled"; + }; + + /* 83FD0000 0x4000 AUDMUX */ + audmux@83fd4000 { + compatible = "fsl,imx51-audmux"; + reg = <0x83fd4000 0x4000>; + status = "disabled"; + }; + + /* 83FD8000 0x4000 EMI1 */ + /* 8 EMI (NFC) */ + /* 15 EMI */ + /* 97 EMI Boot sequence completed interrupt */ + /* + * 101 EMI Indicates all pages have been transferred + * to NFC during an auto program operation. + */ + + /* 83FE0000 0x4000 PATA (PORT PIO) */ + /* 70 PATA Parallel ATA host controller interrupt */ + ide@83fe0000 { + compatible = "fsl,imx51-ata"; + reg = <0x83fe0000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <70>; + status = "disabled"; + }; + + /* 83FE4000 0x4000 SIM */ + /* 67 SIM intr composed of oef, xte, sdi1, and sdi0 */ + /* 68 SIM intr composed of tc, etc, tfe, and rdrf */ + + /* 83FE8000 0x4000 SSI3 */ + /* 96 SSI3 SSI-3 Interrupt Request */ + SSI3: ssi@83fe8000 { + compatible = "fsl,imx51-ssi"; + reg = <0x83fe8000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <96>; + status = "disabled"; + }; + + /* 83FEC000 0x4000 FEC */ + ethernet@83fec000 { + compatible = "fsl,imx51-fec"; + reg = <0x83fec000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <87>; + status = "disabled"; + }; + + /* 83FF0000 0x4000 TVE */ + /* 92 TVE */ + /* 83FF4000 0x4000 VPU */ + /* 9 VPU */ + /* 100 VPU Idle interrupt from VPU */ + + /* 83FF8000 0x4000 SAHARA Lite */ + /* 19 SAHARA SAHARA host 0 (TrustZone) Intr Lite */ + /* 20 SAHARA SAHARA host 1 (non-TrustZone) Intr Lite */ + }; + }; + + localbus@5e000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + ranges; + + vga: ipu3@5e000000 { + compatible = "fsl,ipu3"; + reg = < + 0x5e000000 0x08000 /* CM */ + 0x5e008000 0x08000 /* IDMAC */ + 0x5e018000 0x08000 /* DP */ + 0x5e020000 0x08000 /* IC */ + 0x5e028000 0x08000 /* IRT */ + 0x5e030000 0x08000 /* CSI0 */ + 0x5e038000 0x08000 /* CSI1 */ + 0x5e040000 0x08000 /* DI0 */ + 0x5e048000 0x08000 /* DI1 */ + 0x5e050000 0x08000 /* SMFC */ + 0x5e058000 0x08000 /* DC */ + 0x5e060000 0x08000 /* DMFC */ + 0x5e068000 0x08000 /* VDI */ + 0x5f000000 0x20000 /* CPMEM */ + 0x5f020000 0x20000 /* LUT */ + 0x5f040000 0x20000 /* SRM */ + 0x5f060000 0x20000 /* TPM */ + 0x5f080000 0x20000 /* DCTMPL */ + >; + interrupt-parent = <&tzic>; + interrupts = < + 10 /* IPUEX Error */ + 11 /* IPUEX Sync */ + >; + status = "disabled"; + }; + }; +}; + +/* + +TODO: Not mapped interrupts + +5 DAP +84 GPU2D (OpenVG) general interrupt +85 GPU2D (OpenVG) busy signal (for S/W power gating feasibility) +12 GPU3D +102 GPU3D Idle interrupt from GPU3D (for S/W power gating) +90 SJC +*/ Property changes on: head/sys/dts/arm/imx51x.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/imx53x.dtsi =================================================================== --- head/sys/dts/arm/imx53x.dtsi (nonexistent) +++ head/sys/dts/arm/imx53x.dtsi (revision 325826) @@ -0,0 +1,714 @@ +/* + * Copyright (c) 2012 The FreeBSD Foundation + * Copyright (c) 2013 Rui Paulo + * All rights reserved. + * + * This software was developed by Semihalf under sponsorship from + * the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Freescale i.MX535 Device Tree Source. + * + * $FreeBSD$ + */ + +/ { + #address-cells = <1>; + #size-cells = <1>; + + aliases { + soc = &SOC; + }; + + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,MCIMX535"; + reg = <0x0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <0x8000>; + i-cache-size = <0x8000>; + l2-cache-line-size = <32>; + l2-cache-line = <0x40000>; + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + localbus@0fffc000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + /* This reflects CPU decode windows setup. */ + ranges; + + tzic: tz-interrupt-controller@0fffc000 { + compatible = "fsl,imx53-tzic", "fsl,tzic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x0fffc000 0x00004000>; + }; + /* + * 40000000 40000FFF 4K Debug ROM + * 40001000 40001FFF 4K ETB + * 40002000 40002FFF 4K ETM + * 40003000 40003FFF 4K TPIU + * 40004000 40004FFF 4K CTI0 + * 40005000 40005FFF 4K CTI1 + * 40006000 40006FFF 4K CTI2 + * 40007000 40007FFF 4K CTI3 + * 40008000 40008FFF 4K ARM Debug Unit + * + * 0FFFC000 0FFFCFFF 0x4000 TZIC + */ + }; + + SOC: soc@50000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&tzic>; + ranges; + + aips@50000000 { /* AIPS1 */ + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&tzic>; + ranges; + + /* Required by many devices, so better to stay first */ + /* 53FD4000 0x4000 CCM */ + clock@53fd4000 { + compatible = "fsl,imx53-ccm"; + /* 63F80000 0x4000 DPLLIP1 */ + /* 63F84000 0x4000 DPLLIP2 */ + /* 63F88000 0x4000 DPLLIP3 */ + reg = <0x53fd4000 0x4000 + 0x63F80000 0x4000 + 0x63F84000 0x4000 + 0x63F88000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <71 72>; + status = "disabled"; + }; + + /* + * GPIO modules moved up - to have it attached for + * drivers which rely on GPIO + */ + /* 53F84000 0x4000 GPIO1 */ + gpio1: gpio@53f84000 { + compatible = "fsl,imx53-gpio"; + reg = <0x53f84000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <50 51 42 43 44 45 46 47 48 49>; + /* TODO: use <> also */ + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + /* 53F88000 0x4000 GPIO2 */ + gpio2: gpio@53f88000 { + compatible = "fsl,imx53-gpio"; + reg = <0x53f88000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <52 53>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + /* 53F8C000 0x4000 GPIO3 */ + gpio3: gpio@53f8c000 { + compatible = "fsl,imx53-gpio"; + reg = <0x53f8c000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <54 55>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + /* 53F90000 0x4000 GPIO4 */ + gpio4: gpio@53f90000 { + compatible = "fsl,imx53-gpio"; + reg = <0x53f90000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <56 57>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + /* 53FDC000 0x4000 GPIO5 */ + gpio5: gpio@53fdc000 { + compatible = "fsl,imx53-gpio"; + reg = <0x53fdc000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <103 104>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + /* 53FE0000 0x4000 GPIO6 */ + gpio6: gpio@53fe0000 { + compatible = "fsl,imx53-gpio"; + reg = <0x53fe0000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <105 106>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + /* 53FE4000 0x4000 GPIO5 */ + gpio7: gpio@53fe4000 { + compatible = "fsl,imx53-gpio"; + reg = <0x53fe4000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <107 108>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + spba@50000000 { + compatible = "fsl,spba-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&tzic>; + ranges; + + /* 50004000 0x4000 ESDHC 1 */ + esdhc@50004000 { + compatible = "fsl,imx53-esdhc"; + reg = <0x50004000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <1>; + status = "disabled"; + }; + + /* 50008000 0x4000 ESDHC 2 */ + esdhc@50008000 { + compatible = "fsl,imx53-esdhc"; + reg = <0x50008000 0x4000>; + interrupt-parent = <&tzic>; interrupts = <2>; + status = "disabled"; + }; + + /* 5000C000 0x4000 UART 3 */ + uart3: serial@5000c000 { + compatible = "fsl,imx53-uart", "fsl,imx-uart"; + reg = <0x5000c000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <33>; + status = "disabled"; + }; + + /* 50010000 0x4000 eCSPI1 */ + ecspi@50010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-ecspi"; + reg = <0x50010000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <36>; + status = "disabled"; + }; + + /* 50014000 0x4000 SSI2 irq30 */ + SSI2: ssi@50014000 { + compatible = "fsl,imx53-ssi"; + reg = <0x50014000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <30>; + status = "disabled"; + }; + + /* 50020000 0x4000 ESDHC 3 */ + esdhc@50020000 { + compatible = "fsl,imx53-esdhc"; + reg = <0x50020000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <3>; + status = "disabled"; + }; + + /* 50024000 0x4000 ESDHC 4 */ + esdhc@50024000 { + compatible = "fsl,imx53-esdhc"; + reg = <0x50024000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <4>; + status = "disabled"; + }; + + /* 50028000 0x4000 SPDIF */ + /* 91 SPDIF */ + + pata@50030000 { + compatible = "fsl,imx53-ata"; + reg = <0x50030000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <70>; + status = "disabled"; + }; + + /* 50034000 0x4000 SLM */ + /* 50038000 0x4000 HSI2C */ + /* 64 HS-I2C */ + /* 5003C000 0x4000 SPBA */ + }; + + usbphy0: usbphy@0 { + compatible = "usb-nop-xceiv"; + status = "okay"; + }; + + usbphy1: usbphy@1 { + compatible = "usb-nop-xceiv"; + status = "okay"; + }; + + usbotg: usb@53f80000 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80000 0x0200>; + interrupts = <18>; + fsl,usbphy = <&usbphy0>; + status = "disabled"; + }; + + usbh1: usb@53f80200 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80200 0x0200>; + interrupts = <14>; + fsl,usbphy = <&usbphy1>; + status = "disabled"; + }; + + usbh2: usb@53f80400 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80400 0x0200>; + interrupts = <16>; + status = "disabled"; + }; + + usbh3: usb@53f80600 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80600 0x0200>; + interrupts = <17>; + status = "disabled"; + }; + + usbmisc: usbmisc@53f80800 { + #index-cells = <1>; + compatible = "fsl,imx53-usbmisc"; + reg = <0x53f80800 0x200>; + }; + + /* 53F98000 0x4000 WDOG1 */ + wdog@53f98000 { + compatible = "fsl,imx53-wdt"; + reg = <0x53f98000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <58>; + status = "disabled"; + }; + + /* 53F9C000 0x4000 WDOG2 (TZ) */ + wdog@53f9c000 { + compatible = "fsl,imx53-wdt"; + reg = <0x53f9c000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <59>; + status = "disabled"; + }; + + /* 53F94000 0x4000 KPP */ + keyboard@53f94000 { + compatible = "fsl,imx53-kpp"; + reg = <0x53f94000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <60>; + status = "disabled"; + }; + + /* 53FA0000 0x4000 GPT */ + timer@53fa0000 { + compatible = "fsl,imx53-gpt"; + reg = <0x53fa0000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <39>; + status = "disabled"; + }; + + /* 53FA4000 0x4000 SRTC */ + + rtc@53fa4000 { + compatible = "fsl,imx53-srtc"; + reg = <0x53fa4000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <24 25>; + status = "disabled"; + }; + + /* 53FA8000 0x4000 IOMUXC */ + iomux@53fa8000 { + compatible = "fsl,imx53-iomux"; + reg = <0x53fa8000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <7>; + }; + + /* 53FAC000 0x4000 EPIT1 */ + epit1: timer@53fac000 { + compatible = "fsl,imx53-epit"; + reg = <0x53fac000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <40>; + status = "disabled"; + }; + + /* 53FB0000 0x4000 EPIT2 */ + epit2: timer@53fb0000 { + compatible = "fsl,imx53-epit"; + reg = <0x53fb0000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <41>; + status = "disabled"; + }; + + /* 53FB4000 0x4000 PWM1 */ + pwm@53fb4000 { + compatible = "fsl,imx53-pwm"; + reg = <0x53fb4000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <61>; + status = "disabled"; + }; + + /* 53FB8000 0x4000 PWM2 */ + pwm@53fb8000 { + compatible = "fsl,imx53-pwm"; + reg = <0x53fb8000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <94>; + status = "disabled"; + }; + + /* 53FBC000 0x4000 UART 1 */ + uart1: serial@53fbc000 { + compatible = "fsl,imx53-uart", "fsl,imx-uart"; + reg = <0x53fbc000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <31>; + status = "disabled"; + }; + + /* 53FC0000 0x4000 UART 2 */ + uart2: serial@53fc0000 { + compatible = "fsl,imx53-uart", "fsl,imx-uart"; + reg = <0x53fc0000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <32>; + status = "disabled"; + }; + + /* 53FF0000 0x4000 UART 4 */ + uart4: serial@53ff0000 { + compatible = "fsl,imx53-uart", "fsl,imx-uart"; + reg = <0x53ff0000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <13>; + status = "disabled"; + }; + + /* 53FD0000 0x4000 SRC */ + reset@53fd0000 { + compatible = "fsl,imx53-src"; + reg = <0x53fd0000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <75>; + status = "disabled"; + }; + /* 53FD8000 0x4000 GPC */ + power@53fd8000 { + compatible = "fsl,imx53-gpc"; + reg = <0x53fd8000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <73 74>; + status = "disabled"; + }; + i2c@53fec000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-i2c", "fsl,imx1-i2c", + "fsl,imx-i2c"; + reg = <0x53fec000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <64>; + status = "disabled"; + }; + }; + + aips@60000000 { /* AIPS2 */ + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&tzic>; + ranges; + + /* 63F90000 0x4000 UART 5 */ + uart5: serial@63f90000 { + compatible = "fsl,imx53-uart", "fsl,imx-uart"; + reg = <0x63f90000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <32>; + status = "disabled"; + }; + + /* 63F94000 0x4000 AHBMAX */ + /* 63F98000 0x4000 IIM */ + /* + * 69 IIM Interrupt request to the processor. + * Indicates to the processor that program or + * explicit. + */ + /* 63F9C000 0x4000 CSU */ + /* + * 27 CSU Interrupt Request 1. Indicates to the + * processor that one or more alarm inputs were. + */ + + /* 63FA0000 0x4000 TIGERP_PLATFORM_NE_32K_256K */ + /* irq76 Neon Monitor Interrupt */ + /* irq77 Performance Unit Interrupt */ + /* irq78 CTI IRQ */ + /* irq79 Debug Interrupt, Cross-Trigger Interface 1 */ + /* irq80 Debug Interrupt, Cross-Trigger Interface 1 */ + /* irq89 Debug Interrupt, Cross-Trigger Interface 2 */ + /* irq98 Debug Interrupt, Cross-Trigger Interface 3 */ + + /* 63FA4000 0x4000 OWIRE irq88 */ + /* 63FA8000 0x4000 FIRI irq93 */ + /* 63FAC000 0x4000 eCSPI2 */ + ecspi@63fac000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-ecspi"; + reg = <0x63fac000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <37>; + status = "disabled"; + }; + + /* 63FB0000 0x4000 SDMA */ + sdma@63fb0000 { + compatible = "fsl,imx53-sdma"; + reg = <0x63fb0000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <6>; + }; + + /* 63FB4000 0x4000 SCC */ + /* 21 SCC Security Monitor High Priority Interrupt. */ + /* 22 SCC Secure (TrustZone) Interrupt. */ + /* 23 SCC Regular (Non-Secure) Interrupt. */ + + /* 63FB8000 0x4000 ROMCP */ + /* 63FBC000 0x4000 RTIC */ + /* + * 26 RTIC RTIC (Trust Zone) Interrupt Request. + * Indicates that the RTIC has completed hashing the + */ + + /* 63FC0000 0x4000 CSPI */ + cspi@63fc0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-cspi"; + reg = <0x63fc0000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <38>; + status = "disabled"; + }; + + /* 63FC4000 0x4000 I2C2 */ + i2c@63fc4000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-i2c", "fsl,imx1-i2c", "fsl,imx-i2c"; + reg = <0x63fc4000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <63>; + status = "disabled"; + }; + + /* 63FC8000 0x4000 I2C1 */ + i2c@63fc8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-i2c", "fsl,imx1-i2c", "fsl,imx-i2c"; + reg = <0x63fc8000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <62>; + status = "disabled"; + }; + + /* 63FCC000 0x4000 SSI1 */ + /* 29 SSI1 SSI-1 Interrupt Request */ + SSI1: ssi@63fcc000 { + compatible = "fsl,imx53-ssi"; + reg = <0x63fcc000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <29>; + status = "disabled"; + }; + + /* 63FD0000 0x4000 AUDMUX */ + audmux@63fd4000 { + compatible = "fsl,imx53-audmux"; + reg = <0x63fd4000 0x4000>; + status = "disabled"; + }; + + /* 63FD8000 0x4000 EXTMC */ + /* 8 EXTMC (NFC) */ + /* 15 EXTMC */ + /* 97 EXTMC Boot sequence completed interrupt */ + /* + * 101 EMI Indicates all pages have been transferred + * to NFC during an auto program operation. + */ + + /* 83FE4000 0x4000 SIM */ + /* 67 SIM intr composed of oef, xte, sdi1, and sdi0 */ + /* 68 SIM intr composed of tc, etc, tfe, and rdrf */ + + /* 63FD_C000 0x4000 apb2ip_pl301_2x2 */ + /* 63FE_0000 0x4000 apb2ip_pl301_4x1 */ + /* 63FE4000 0x4000 MLB */ + /* 63FE8000 0x4000 SSI3 */ + /* 96 SSI3 SSI-3 Interrupt Request */ + SSI3: ssi@63fe8000 { + compatible = "fsl,imx51-ssi"; + reg = <0x63fe8000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <96>; + status = "disabled"; + }; + + /* 63FEC000 0x4000 FEC */ + ethernet@63fec000 { + compatible = "fsl,imx53-fec"; + reg = <0x63fec000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <87>; + status = "disabled"; + }; + + /* 63FF0000 0x4000 TVE */ + /* 92 TVE */ + /* 63FF4000 0x4000 VPU */ + /* 9 VPU */ + /* 100 VPU Idle interrupt from VPU */ + + /* 63FF8000 0x4000 SAHARA */ + /* 19 SAHARA SAHARA host 0 (TrustZone) Intr */ + /* 20 SAHARA SAHARA host 1 (non-TrustZone) Intr */ + }; + }; + + localbus@10000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + sata@10000000 { + compatible = "fsl,imx53-ata"; + reg = <0x10000000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <28>; + status = "disabled"; + }; + + vga: ipu3@1E000000 { + compatible = "fsl,ipu3"; + reg = < + 0x1E000000 0x08000 /* CM */ + 0x1E008000 0x08000 /* IDMAC */ + 0x1E018000 0x08000 /* DP */ + 0x1E020000 0x08000 /* IC */ + 0x1E028000 0x08000 /* IRT */ + 0x1E030000 0x08000 /* CSI0 */ + 0x1E038000 0x08000 /* CSI1 */ + 0x1E040000 0x08000 /* DI0 */ + 0x1E048000 0x08000 /* DI1 */ + 0x1E050000 0x08000 /* SMFC */ + 0x1E058000 0x08000 /* DC */ + 0x1E060000 0x08000 /* DMFC */ + 0x1E068000 0x08000 /* VDI */ + 0x1F000000 0x20000 /* CPMEM */ + 0x1F020000 0x20000 /* LUT */ + 0x1F040000 0x20000 /* SRM */ + 0x1F060000 0x20000 /* TPM */ + 0x1F080000 0x20000 /* DCTMPL */ + >; + interrupt-parent = <&tzic>; + interrupts = < + 10 /* IPUEX Error */ + 11 /* IPUEX Sync */ + >; + status = "disabled"; + }; + }; +}; + +/* + +TODO: Not mapped interrupts + +5 DAP +84 GPU2D (OpenVG) general interrupt +85 GPU2D (OpenVG) busy signal (for S/W power gating feasibility) +12 GPU3D +102 GPU3D Idle interrupt from GPU3D (for S/W power gating) +90 SJC +*/ Property changes on: head/sys/dts/arm/imx53x.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/imx6.dtsi =================================================================== --- head/sys/dts/arm/imx6.dtsi (nonexistent) +++ head/sys/dts/arm/imx6.dtsi (revision 325826) @@ -0,0 +1,464 @@ +/* + * Copyright (c) 2013 Ian Lepore + * Copyright (c) 2012 The FreeBSD Foundation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Freescale i.MX6 Common Device Tree Source. + * There are enough differences between the Solo, Dual, Quad, and *-lite + * flavors of this SoC that eventually we will need a finer-grained breakdown + * of some of this stuff. For now this file works for all of them. I think. + * + * $FreeBSD$ + */ + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,MCIMX6"; + reg = <0x0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <0x8000>; + i-cache-size = <0x8000>; + /* TODO: describe L2 cache also */ + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + aliases { + soc = &SOC; + }; + + SOC: soc@00000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&gic>; + ranges = <0x00000000 0x00000000 0x10000000>; + + gic: generic-interrupt-controller@00a00100 { + compatible = "arm,gic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x00a01000 0x00001000 + 0x00a00100 0x00000100>; + }; + + mp_tmr0@00a00200 { + compatible = "arm,mpcore-timers"; + reg = <0x00a00200 0x100 + 0x00a00600 0x100>; + interrupts = <27 29>; + interrupt-parent = <&gic>; + }; + + l2-cache@00a02000 { + compatible = "arm,pl310-cache", "arm,pl310"; + reg = <0xa02000 0x1000>; + interrupts = <124>; + cache-level = <0x2>; + interrupt-parent = < &gic >; + }; + + aips@02000000 { /* AIPS1 */ + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&gic>; + reg = <0x02000000 0x00100000>; + ranges; + + /* Required by many devices, so better to stay first */ + clks: ccm@020c4000 { + compatible = "fsl,imx6q-ccm"; + reg = <0x020c4000 0x4000>; + interrupts = <119 120>; + }; + + /* System Reset Controller */ + src: src@4006E000 { + compatible = "fsl,imx6-src"; + reg = <0x020D8000 0x100>; + }; + + sdma: sdma@020ec000 { + compatible = "fsl,imx6q-sdma"; + reg = <0x020ec000 0x4000>; + interrupt-parent = <&gic>; + interrupts = <34>; + status = "disabled"; + }; + + anatop: anatop@020c8000 { + compatible = "fsl,imx6q-anatop"; + reg = <0x020c8000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <49>; + }; + + gpt: timer@02098000 { + compatible = "fsl,imx6q-gpt", "fsl,imx51-gpt"; + reg = <0x02098000 0x4000>; + interrupt-parent = <&gic>; + interrupts = <87>; + }; + + iomux@020e0000 { + compatible = "fsl,imx6q-iomuxc"; + reg = <0x020e0000 0x4000>; + interrupt-parent = <&gic>; + interrupts = <32>; + }; + + gpio1: gpio@0209c000 { + compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; + reg = <0x0209c000 0x4000>; + interrupts = < 98 99 >; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio2: gpio@020a0000 { + compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; + reg = <0x020a0000 0x4000>; + interrupts = < 100 101 >; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio3: gpio@020a4000 { + compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; + reg = <0x020a4000 0x4000>; + interrupts = < 102 103 >; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio4: gpio@020a8000 { + compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; + reg = <0x020a8000 0x4000>; + interrupts = < 104 105 >; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio5: gpio@020ac000 { + compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; + reg = <0x020ac000 0x4000>; + interrupts = < 106 107 >; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio6: gpio@020b0000 { + compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; + reg = <0x020b0000 0x4000>; + interrupts = < 108 109 >; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + gpio7: gpio@020b4000 { + compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; + reg = <0x020b4000 0x4000>; + interrupts = < 110 111 >; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + uart1: serial@02020000 { + compatible = "fsl,imx6q-uart"; + reg = <0x02020000 0x4000>; + interrupt-parent = <&gic>; + interrupts = <58>; + clock-frequency = <80000000>; + status = "disabled"; + }; + + uart2: serial@021e8000 { + compatible = "fsl,imx6q-uart"; + reg = <0x021e8000 0x4000>; + interrupt-parent = <&gic>; + interrupts = <59>; + clock-frequency = <80000000>; + status = "disabled"; + }; + + uart3: serial@021ec000 { + compatible = "fsl,imx6q-uart"; + reg = <0x021ec000 0x4000>; + interrupt-parent = <&gic>; + interrupts = <60>; + clock-frequency = <80000000>; + status = "disabled"; + }; + + uart4: serial@021f0000 { + compatible = "fsl,imx6q-uart"; + reg = <0x021f0000 0x4000>; + interrupt-parent = <&gic>; + interrupts = <61>; + clock-frequency = <80000000>; + status = "disabled"; + }; + + uart5: serial@021f4000 { + compatible = "fsl,imx6q-uart"; + reg = <0x021f4000 0x4000>; + interrupt-parent = <&gic>; + interrupts = <62>; + clock-frequency = <80000000>; + status = "disabled"; + }; + + usbphy1: usbphy@020c9000 { + compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; + reg = <0x020c9000 0x1000>; + interrupts = <44>; + status = "disabled"; + }; + + usbphy2: usbphy@020ca000 { + compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; + reg = <0x020ca000 0x1000>; + interrupts = <45>; + status = "disabled"; + }; + + ecspi1: ecspi@02008000 { + compatible = "fsl,imx6q-ecspi"; + reg = <0x02008000 0x4000>; + interrupts = < 63 >; + status = "disabled"; + }; + + ecspi2: ecspi@0200C000 { + compatible = "fsl,imx6q-ecspi"; + reg = <0x0200C000 0x4000>; + interrupts = < 64 >; + status = "disabled"; + }; + + ecspi3: ecspi@02010000 { + compatible = "fsl,imx6q-ecspi"; + reg = <0x02010000 0x4000>; + interrupts = < 65 >; + status = "disabled"; + }; + + ecspi4: ecspi@02014000 { + compatible = "fsl,imx6q-ecspi"; + reg = <0x02014000 0x4000>; + interrupts = < 66 >; + status = "disabled"; + }; + + ecspi5: ecspi@02018000 { + compatible = "fsl,imx6q-ecspi"; + reg = <0x02018000 0x4000>; + interrupts = < 67 >; + status = "disabled"; + }; + + ssi1: ssi@02028000 { + compatible = "fsl,imx6q-ssi"; + reg = <0x02028000 0x4000>; + interrupts = < 78 >; + dmas = <&sdma 37 1 0>, + <&sdma 38 1 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + ssi2: ssi@0202C000 { + compatible = "fsl,imx6q-ssi"; + reg = <0x0202C000 0x4000>; + interrupts = < 79 >; + status = "disabled"; + }; + + ssi3: ssi@02030000 { + compatible = "fsl,imx6q-ssi"; + reg = <0x02030000 0x4000>; + interrupts = < 80 >; + status = "disabled"; + }; + }; + + aips@02100000 { /* AIPS2 */ + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&gic>; + reg = <0x02100000 0x00100000>; + ranges; + + i2c1: i2c@021a0000 { + compatible = "fsl,imx6q-i2c"; + reg = <0x021a0000 0x4000>; + interrupts = < 68 >; + status = "disabled"; + }; + + i2c2: i2c@021a4000 { + compatible = "fsl,imx6q-i2c"; + reg = <0x021a4000 0x4000>; + interrupts = < 69 >; + status = "disabled"; + }; + + i2c3: i2c@021ac000 { + compatible = "fsl,imx6q-i2c"; + reg = <0x021a8000 0x4000>; + interrupts = < 70 >; + status = "disabled"; + }; + + fec1: ethernet@02188000 { + compatible = "fsl,imx6q-fec"; + reg = <0x02188000 0x4000>; + interrupts = <150 151>; + status = "disabled"; + }; + + usbotg1: usb@02184000 { + compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; + reg = <0x02184000 0x200>; + interrupts = <75>; + fsl,usbphy = <&usbphy1>; + fsl,usbmisc = <&usbmisc 0>; + status = "disabled"; + }; + + usbh1: usb@02184200 { + compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; + reg = <0x02184200 0x200>; + interrupts = <72>; + fsl,usbphy = <&usbphy2>; + fsl,usbmisc = <&usbmisc 1>; + status = "disabled"; + }; + + usbh2: usb@02184400 { + compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; + reg = <0x02184400 0x200>; + interrupts = <73>; + fsl,usbmisc = <&usbmisc 2>; + status = "disabled"; + }; + + usbh3: usb@02184600 { + compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; + reg = <0x02184600 0x200>; + interrupts = <74>; + fsl,usbmisc = <&usbmisc 3>; + status = "disabled"; + }; + + usbmisc: usbmisc@02184800 { + #index-cells = <1>; + compatible = "fsl,imx6q-usbmisc"; + reg = <0x02184800 0x200>; + // Not disabled on purpose. + }; + + usdhc1: usdhc@02190000 { + compatible = "fsl,imx6q-usdhc"; + reg = <0x02190000 0x4000>; + interrupt-parent = <&gic>; + interrupts = <54>; + cd-gpios = <&gpio1 2 0>; + bus-width = <0x4>; + status ="disabled"; + }; + + usdhc2: usdhc@02194000 { + compatible = "fsl,imx6q-usdhc"; + reg = <0x02194000 0x4000>; + interrupt-parent = <&gic>; + interrupts = <55>; + non-removable; + bus-width = <0x4>; + status ="disabled"; + }; + + usdhc3: usdhc@02198000 { + compatible = "fsl,imx6q-usdhc"; + reg = <0x02198000 0x4000>; + interrupt-parent = <&gic>; + interrupts = <56>; + cd-gpios = <&gpio3 9 0>; + bus-width = <0x4>; + status ="disabled"; + }; + + usdhc4: usdhc@0219c000 { + compatible = "fsl,imx6q-usdhc"; + reg = <0x0219c000 0x4000>; + interrupt-parent = <&gic>; + interrupts = <57>; + bus-width = <0x4>; + status ="disabled"; + }; + + ocotp0: ocotp@021bc000 { + compatible = "fsl,imx6q-ocotp"; + reg = <0x021bc000 0x4000>; + }; + + audmux: audmux@021d8000 { + compatible = "fsl,imx6q-audmux"; + reg = <0x021d8000 0x4000>; + status = "disabled"; + }; + }; + }; +}; Property changes on: head/sys/dts/arm/imx6.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/meson3.dtsi =================================================================== --- head/sys/dts/arm/meson3.dtsi (nonexistent) +++ head/sys/dts/arm/meson3.dtsi (revision 325826) @@ -0,0 +1,77 @@ +/*- + * Copyright (c) 2015 John Wehle + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/* + * The basic single core aml8726 (aka meson) uses an Amlogic interrupt + * controller, however meson.dtsi specifies GIC (which is present on + * the multicore aml8726) so we need to override things here. + */ + +/include/ "meson.dtsi" + +/ { + model = "Amlogic Meson3 SoC"; + compatible = "amlogic,meson3"; + + interrupt-parent = <&pic>; + + pic: pic@c1109a40 { + device_type = "interrupt-controller"; + compatible = "amlogic,aml8726-pic"; + reg = <0xc1109a40 128>; /* cbus 0x2690 */ + + interrupt-controller; + #interrupt-cells = <3>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + reg = <0x200>; + }; + }; + + clk81: clk@0 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; +}; + +&gic { + status = "disabled"; +}; + +&L2 { + interrupts = <0 61 1>; +}; Property changes on: head/sys/dts/arm/meson3.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/meson8b.dtsi =================================================================== --- head/sys/dts/arm/meson8b.dtsi (nonexistent) +++ head/sys/dts/arm/meson8b.dtsi (revision 325826) @@ -0,0 +1,79 @@ +/*- + * Copyright (c) 2015 John Wehle + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/include/ "meson.dtsi" + +/ { + model = "Amlogic Meson8b SoC"; + compatible = "amlogic,meson8b"; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a5"; + next-level-cache = <&L2>; + reg = <0x200>; + }; + + cpu@201 { + device_type = "cpu"; + compatible = "arm,cortex-a5"; + next-level-cache = <&L2>; + reg = <0x201>; + }; + + cpu@202 { + device_type = "cpu"; + compatible = "arm,cortex-a5"; + next-level-cache = <&L2>; + reg = <0x202>; + }; + + cpu@203 { + device_type = "cpu"; + compatible = "arm,cortex-a5"; + next-level-cache = <&L2>; + reg = <0x203>; + }; + }; + + clk81: clk@0 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; +}; + +&L2 { + interrupts = <0 143 1>; +}; Property changes on: head/sys/dts/arm/meson8b.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/nanopi-neo.dts =================================================================== --- head/sys/dts/arm/nanopi-neo.dts (nonexistent) +++ head/sys/dts/arm/nanopi-neo.dts (revision 325826) @@ -0,0 +1,69 @@ +/*- + * Copyright (c) 2016 Jared McNeill + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include "sun8i-h3-nanopi-neo.dts" +#include "h3.dtsi" + +/ { + vdd_cpu: reg_cpux_vset { + compatible = "regulator-gpio"; + + regulator-name = "cpux-supply"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-boot-on; + + gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* GPIOL6 */ + states = <1300000 0x1 + 1100000 0x0>; + + enable-active-high; + }; +}; + +&emac { + phy = <&phy1>; + phy-mode = "mii"; + allwinner,use-internal-phy; + allwinner,leds-active-low; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; + operating-points = < + /* kHz uV */ + 1008000 1300000 + 816000 1100000 + 480000 1100000 + >; +}; Property changes on: head/sys/dts/arm/nanopi-neo.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/odroidc1.dts =================================================================== --- head/sys/dts/arm/odroidc1.dts (nonexistent) +++ head/sys/dts/arm/odroidc1.dts (revision 325826) @@ -0,0 +1,396 @@ +/*- + * Copyright (c) 2015 John Wehle + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/* + * The ordering of certain devices is significant (e.g. usb depends on + * usb-phy which depends on gpio, also the timer should appear early on + * to provide a reasonably accurate DELAY implementation). + * + * Both usb-phys devices must be configured to prevent the usb controller + * from hanging during initialization. + */ + +/dts-v1/; + +/memreserve/ 0x7900000 0x00600000; /* 6MB frame buffer */ + +#include "meson8b.dtsi" + +/ { + model = "hardkernel,odroid-c1"; + compatible = "hardkernel,odroid-c1", "amlogic,s805"; + + #address-cells = <1>; + #size-cells = <1>; + + aliases { + soc = &soc; + screen = &screen; + uart0 = &uart_AO; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x40000000>; /* 1GB RAM */ + }; + + soc: soc { + device_type = "soc"; + bus-frequency = <0>; + + scu: scu@c4300000 { + compatible = "arm,cortex-a5-scu"; + reg = <0xc4300000 0x1000>; + }; + + cpuconfig: cpuconfig@d901ff80 { + compatible = "amlogic,aml8726-cpuconfig"; + reg = <0xd901ff80 16>; + }; + + ccm@c1104140 { + compatible = "amlogic,aml8726-ccm"; + reg = <0xc1104140 20>; /* cbus 0x1050 */ + + functions = "ethernet", "i2c", "rng", "sdio", "sdxc", + "uart-a", "uart-b", "uart-c", + "usb-a", "usb-b"; + }; + + pinctrl@c11080b0 { + compatible = "amlogic,aml8726-pinctrl"; + reg = <0xc11080b0 40>, /* mux */ + <0xc11080e8 24>, /* pu/pd */ + <0xc1108120 24>, /* pull enable */ + <0xc8100014 4>, /* ao mux */ + <0xc810002c 4>, /* ao pu/pd */ + <0xc810002c 4>; /* ao pull enable */ + + /* + * Currently only pin muxing that deviates + * from the power on default of gpio is + * specified here. + */ + + pinctrl-names = "default"; + pinctrl-0 = <&pins_uartao &pins_ethernet &pins_hdmi>; + + pins_ethernet: ethernet { + amlogic,pins = "ref_clk", + "tx_clk", "tx_en", + "tx_d0", "tx_d1", + "tx_d2", "tx_d3", + "rx_clk", "rx_dv", + "rx_d0", "rx_d1", + "rx_d2", "rx_d3", + "mdc", "mdio"; + amlogic,function = "ethernet"; + }; + + pins_hdmi: hdmi { + amlogic,pins = "cec", "hpd", + "scl", "sda"; + amlogic,function = "hdmi"; + }; + + pins_sdio_b: sdio_b { + amlogic,pins = "clk", "cmd", + "d0", "d1", + "d2", "d3"; + amlogic,function = "sdio-b"; + amlogic,pull = "up"; + }; + + pins_sdxc_b: sdxc_b { + amlogic,pins = "clk", "cmd", + "d0", "d1", + "d2", "d3"; + amlogic,function = "sdxc-b"; + amlogic,pull = "up"; + }; + + pins_sdio_c: sdio_c { + amlogic,pins = "clk", "cmd", + "d0", "d1", + "d2", "d3"; + amlogic,function = "sdio-c"; + amlogic,pull = "up"; + }; + + pins_sdxc_c: sdxc_c { + amlogic,pins = "clk", "cmd", + "d0", "d1", + "d2", "d3", + "d4", "d5", + "d6", "d7"; + amlogic,function = "sdxc-c"; + amlogic,pull = "up"; + }; + + pins_i2c_a: i2c_a { + amlogic,pins = "scl", "sda"; + amlogic,function = "i2c-a"; + }; + + pins_i2c_b: i2c_b { + amlogic,pins = "scl", "sda"; + amlogic,function = "i2c-b"; + }; + + pins_uarta: uarta { + amlogic,pins = "tx", "rx", "cts", "rts"; + amlogic,function = "uart-a"; + }; + + pins_uartb: uartb { + + /* + * gpiox18 appears to have special + * meaning to the bootloader making + * hardware handshaking unavailable. + */ + + amlogic,pins = "tx", "rx"; + amlogic,function = "uart-b"; + }; + + pins_uartc: uartc { + amlogic,pins = "tx", "rx", "cts", "rts"; + amlogic,function = "uart-c"; + }; + + pins_uartao: uartao { + amlogic,pins = "tx", "rx"; + amlogic,function = "uart-ao"; + }; + }; + + rtc@c8100740 { + compatible = "amlogic,aml8726-rtc"; + reg = <0xc8100740 20>; /* aobus 0x1d0 */ + interrupts = <0 72 1>; + }; + + clkmsr: clkmsr@c1108758 { + compatible = "amlogic,aml8726-clkmsr"; + reg = <0xc1108758 16>; /* cbus 0x21d6 */ + + clocks = <&clk81>; + }; + + gpioao: gpio@c8100024 { + /* gpio unit 7 */ + compatible = "amlogic,aml8726-gpio"; + reg = <0xc8100024 4>, /* oen aobus 0x9 */ + <0xc8100024 4>, /* out */ + <0xc8100028 4>; /* in */ + + gpio-controller; + #gpio-cells = <1>; + pin-count = <14>; + }; + + gpio3: gpio@c1108054 { + compatible = "amlogic,aml8726-gpio"; + reg = <0xc1108054 4>, /* oen cbus 0x2015 */ + <0xc1108058 4>, /* out */ + <0xc110805c 4>; /* in */ + + gpio-controller; + #gpio-cells = <1>; + pin-count = <32>; + }; + + gpio5: gpio@c110806c { + compatible = "amlogic,aml8726-gpio"; + reg = <0xc110806c 4>, /* oen cbus 0x201b */ + <0xc1108070 4>, /* out */ + <0xc1108074 4>; /* in */ + + gpio-controller; + #gpio-cells = <1>; + pin-count = <32>; + }; + + mmc@c1108c20 { + compatible = "amlogic,aml8726-mmc"; + reg = <0xc1108c20 32>; /* cbus 0x2308 */ + interrupts = <0 28 1>; + + clocks = <&clk81>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_sdio_b>; + + /* + * Ordering is significant. + * + * mmc-vselect low sets first voltage + * mmc-vselect high sets second voltage + * + * If mmc-vselect is not present, then + * only one voltage should be specified. + */ + mmc-voltages = "3.3", "1.8"; + mmc-vselect = <&gpioao 3>; /* gpioao_3 */ + + mmc-pwr-en = <&gpio5 31 0>; /* card_8 */ + ins-detect = <&gpio5 29 0>; /* card_6 */ + }; + + sdxc@c1108e00 { + compatible = "amlogic,aml8726-sdxc-m8"; + clock-frequency = <1275000000>; + reg = <0xc1108e00 60>; /* cbus 0x2380 */ + interrupts = <0 78 1>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_sdxc_c>; + + mmc-voltages = "1.8"; + + mmc-rst = <&gpio3 9 0>; /* boot_9 emmc-rst */ + }; + + rng@c1108100 { + compatible = "amlogic,aml8726-rng"; + reg = <0xc1108100 8>; /* cbus 0x2040 */ + }; + + usb-phy@c1108800 { + /* usb-a phy */ + compatible = "amlogic,aml8726-m8-usb-phy"; + reg = <0xc1108800 32>; /* cbus 0x2200 */ + + usb-pwr-en = <&gpioao 5 1>; /* gpioao_5 vbus */ + }; + + usb-phy@c1108820 { + /* usb-b phy */ + compatible = "amlogic,aml8726-m8-usb-phy"; + reg = <0xc1108820 32>; /* cbus 0x2208 */ + + force-aca = "true"; + usb-hub-rst = <&gpioao 4 0>; /* gpioao_4 hub-rst */ + }; + + usb@c9040000 { + /* usb-a */ + compatible = "synopsys,designware-hs-otg2"; + reg = <0xc9040000 0x40000>; /* ahbbus 0x40000*/ + interrupts = <0 30 4>; + #address-cells = <1>; + #size-cells = <0>; + + dr_mode = "host"; + }; + + usb@c90c0000 { + /* usb-b */ + compatible = "synopsys,designware-hs-otg2"; + reg = <0xc90c0000 0x40000>; /* ahbbus 0xc0000 */ + interrupts = <0 31 4>; + #address-cells = <1>; + #size-cells = <0>; + + dr_mode = "host"; + }; + + eth@c9410000 { + /* ethernet */ + compatible = "amlogic,meson6-dwmac"; + reg = <0xc9410000 0x2000>; /* ahbbus 0x410000 */ + interrupts = <0 8 1>; + #address-cells = <1>; + #size-cells = <0>; + + eth-phy-rst = <&gpio3 23 0>; /* gpioh_4 phy-rst */ + }; + + screen: fb@c8006020 { + device_type = "display"; + compatible = "amlogic,aml8726-fb"; + reg = <0xc8006048 12>, /* CANVAS */ + <0xc1106800 1024>, /* VIU */ + <0xc1107400 1024>; /* VPP */ + interrupts = <0 2 1>, + <0 3 1>, + <0 12 1>, + <0 13 1>; + + address = <0x7900000>; /* match memreserve */ + width = <720>; + height = <480>; + depth = <24>; + linebytes = <2160>; + }; + }; + + leds { + compatible = "gpio-leds"; + + sys_led { + gpios = <&gpioao 13>; /* gpioao_13 sys_led */ + label = "sys_led"; + }; + }; + + chosen { + stdin = "uart0"; + stdout = "uart0"; + }; +}; + +&clk81 { + clock-frequency = <0>; +}; + +&uart_AO { + status = "okay"; + current-speed = <115200>; +}; + +&uart_A { + status = "okay"; +}; + +&uart_B { + status = "okay"; +}; + +&uart_C { + status = "okay"; +}; + +&i2c_A { + status = "okay"; +}; + +&i2c_B { + status = "okay"; +}; Property changes on: head/sys/dts/arm/odroidc1.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/orangepi-plus-2e.dts =================================================================== --- head/sys/dts/arm/orangepi-plus-2e.dts (nonexistent) +++ head/sys/dts/arm/orangepi-plus-2e.dts (revision 325826) @@ -0,0 +1,119 @@ +/*- + * Copyright (c) 2016 Jared McNeill + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include "sun8i-h3-orangepi-plus.dts" +#include "h3.dtsi" + +/ { + model = "Xunlong Orange Pi Plus 2E"; + compatible = "xunlong,orangepi-plus-2e", "allwinner,sun8i-h3"; + + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&emac_phy_reset_pin>; + regulator-name = "gmac-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + enable-active-high; + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; + }; +}; + +&pio { + emac_phy_reset_pin: emac_phy_reset_pin@0 { + allwinner,pins = "PD6"; + allwinner,function = "gpio_out"; + allwinner,drive = <10>; + }; + + codec_pa_pin: codec_pa_pin@0 { + allwinner,pins = "PA16"; + allwinner,function = "gpio_out"; + allwinner,drive = <10>; + }; +}; + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_pins_rgmii_a>; + phy-supply = <®_gmac_3v3>; + phy-mode = "rgmii"; + phy = <&phy1>; + + allwinner,leds-active-low; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +&ehci2 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&r_i2c { + status = "okay"; + + vdd_cpu: regulator@65 { + compatible = "silergy,sy8106a"; + reg = <0x65>; + + regulator-name = "vdd-cpu"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-ramp-delay = <200>; + regulator-boot-on; + regulator-always-on; + }; +}; + +/* &codec { */ +/* pinctrl-names = "default"; */ +/* pinctrl-0 = <&codec_pa_pin>; */ +/* allwinner,pa-gpios = <&pio 0 16 GPIO_ACTIVE_HIGH>; /\* PA16 *\/ */ +/* status = "okay"; */ +/* }; */ + +&cpu0 { + cpu-supply = <&vdd_cpu>; + operating-points = < + /* kHz uV */ + 1296000 1340000 + 1200000 1320000 + 1008000 1200000 + 816000 1100000 + 648000 1040000 + >; +}; Property changes on: head/sys/dts/arm/orangepi-plus-2e.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/pandaboard-common.dtsi =================================================================== --- head/sys/dts/arm/pandaboard-common.dtsi (nonexistent) +++ head/sys/dts/arm/pandaboard-common.dtsi (revision 325826) @@ -0,0 +1,53 @@ +/*- + * Copyright (c) 2015 Oleksandr Tymoshenko + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +&mmc1 { + non-removable; /* XXX need real solution */ +}; + +&mmc5 { + status = "disabled"; +}; + +/ { + ocp { + global-timer@48240600 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x48240200 0x20>; + interrupts = ; + }; + + elm: elm@48078000 { + interrupts = ; + }; + }; + chosen { + stdin = "serial2"; + stdout = "serial2"; + }; +}; Property changes on: head/sys/dts/arm/pandaboard-common.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/pandaboard-es.dts =================================================================== --- head/sys/dts/arm/pandaboard-es.dts (nonexistent) +++ head/sys/dts/arm/pandaboard-es.dts (revision 325826) @@ -0,0 +1,31 @@ +/*- + * Copyright (c) 2015 Oleksandr Tymoshenko + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + + +#include "omap4-panda-es.dts" +#include "pandaboard-common.dtsi" Property changes on: head/sys/dts/arm/pandaboard-es.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/pandaboard.dts =================================================================== --- head/sys/dts/arm/pandaboard.dts (nonexistent) +++ head/sys/dts/arm/pandaboard.dts (revision 325826) @@ -0,0 +1,31 @@ +/*- + * Copyright (c) 2015 Oleksandr Tymoshenko + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + + +#include "omap4-panda.dts" +#include "pandaboard-common.dtsi" Property changes on: head/sys/dts/arm/pandaboard.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/rk3188-radxa-lite.dts =================================================================== --- head/sys/dts/arm/rk3188-radxa-lite.dts (nonexistent) +++ head/sys/dts/arm/rk3188-radxa-lite.dts (revision 325826) @@ -0,0 +1,63 @@ +/*- + * Copyright (c) 2014 Ganbold Tsagaankhuu + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/include/ "rk3188.dtsi" + +/ { + model = "Radxa RadxaRock Lite"; + + memory { + device_type = "memory"; + reg = < 0x60000000 0x40000000 >; /* 1GB RAM */ + }; + + aliases { + soc = &SOC; + }; + + SOC: rk3188 { + + uart2: serial@20064000 { + status = "okay"; + }; + + mmc@10214000 { + status = "okay"; + }; + + }; + + chosen { + bootargs = "-v"; + stdin = &uart2; + stdout = &uart2; + }; +}; + Property changes on: head/sys/dts/arm/rk3188-radxa-lite.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/rk3188-radxa.dts =================================================================== --- head/sys/dts/arm/rk3188-radxa.dts (nonexistent) +++ head/sys/dts/arm/rk3188-radxa.dts (revision 325826) @@ -0,0 +1,63 @@ +/*- + * Copyright (c) 2013 Ganbold Tsagaankhuu + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/include/ "rk3188.dtsi" + +/ { + model = "Radxa RadxaRock"; + + memory { + device_type = "memory"; + reg = < 0x60000000 0x80000000 >; /* 2GB RAM */ + }; + + aliases { + soc = &SOC; + }; + + SOC: rk3188 { + + uart2: serial@20064000 { + status = "okay"; + }; + + mmc@10214000 { + status = "okay"; + }; + + }; + + chosen { + bootargs = "-v"; + stdin = &uart2; + stdout = &uart2; + }; +}; + Property changes on: head/sys/dts/arm/rk3188-radxa.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/rk3188.dtsi =================================================================== --- head/sys/dts/arm/rk3188.dtsi (nonexistent) +++ head/sys/dts/arm/rk3188.dtsi (revision 325826) @@ -0,0 +1,254 @@ +/*- + * Copyright (c) 2013 Ganbold Tsagaankhuu + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/ { + compatible = "rockchip,rk3188"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&GIC>; + + aliases { + soc = &SOC; + }; + + SOC: rk3188 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + bus-frequency = <0>; + + GIC: interrupt-controller@1013d000 { + compatible = "arm,gic"; + reg = <0x1013d000 0x1000>, /* Distributor Registers */ + <0x1013c100 0x0100>; /* CPU Interface Registers */ + interrupt-controller; + #interrupt-cells = <1>; + }; + + pmu@20004000 { + compatible = "rockchip,rk30xx-pmu"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x20004000 0x100>; + }; + + grf@20008000 { + compatible = "rockchip,rk30xx-grf"; + #address-cells = <1>; + #size-cells = <1>; + reg = < 0x20008000 0x2000 >; + }; + + mp_tmr@1013c600 { + compatible = "arm,mpcore-timers"; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = < 148500000 >; + reg = <0x1013c200 0x100>, /* Global Timer Regs */ + <0x1013c600 0x20>; /* Private Timer Regs */ + interrupts = < 27 29 >; + interrupt-parent = <&GIC>; + }; + + timer@20038000 { + compatible = "rockchip,rk30xx-timer"; + reg = <0x20038000 0x20>; + interrupts = <76>; + clock-frequency = <24000000>; + status = "disabled"; + }; + + timer@20038020 { + compatible = "rockchip,rk30xx-timer"; + reg = <0x20038020 0x20>; + interrupts = <77>; + clock-frequency = <24000000>; + status = "disabled"; + }; + + timer@20038060 { + compatible = "rockchip,rk30xx-timer"; + reg = <0x20038060 0x20>; + interrupts = <91>; + clock-frequency = <24000000>; + status = "disabled"; + }; + + timer@20038080 { + compatible = "rockchip,rk30xx-timer"; + reg = <0x20038080 0x20>; + interrupts = <92>; + clock-frequency = <24000000>; + status = "disabled"; + }; + + timer@200380a0 { + compatible = "rockchip,rk30xx-timer"; + reg = <0x200380a0 0x20>; + interrupts = <96>; + clock-frequency = <24000000>; + status = "disabled"; + }; + + watchdog@2004c000 { + compatible = "rockchip,rk30xx-wdt"; + reg = <0x2004c000 0x100>; + clock-frequency = < 66000000 >; + }; + + gpio0: gpio@2000a000 { + compatible = "rockchip,rk30xx-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x2000a000 0x100>; + interrupts = <86>; + interrupt-parent = <&GIC>; + }; + + gpio1: gpio@2003c000 { + compatible = "rockchip,rk30xx-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x2003c000 0x100>; + interrupts = <87>; + interrupt-parent = <&GIC>; + }; + + gpio2: gpio@2003e000 { + compatible = "rockchip,rk30xx-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x2003e000 0x100>; + interrupts = <88>; + interrupt-parent = <&GIC>; + }; + + gpio3: gpio@20080000 { + compatible = "rockchip,rk30xx-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20080000 0x100>; + interrupts = <89>; + interrupt-parent = <&GIC>; + }; + + usb0: usb@10180000 { + compatible = "synopsys,designware-hs-otg2"; + reg = <0x10180000 0x40000>; + interrupts = <48>; + interrupt-parent = <&GIC>; + #address-cells = <1>; + #size-cells = <0>; + }; + + usb1: usb@101c0000 { + compatible = "synopsys,designware-hs-otg2"; + reg = <0x101c0000 0x40000>; + interrupts = < 49 >; + interrupt-parent = <&GIC>; + #address-cells = <1>; + #size-cells = <0>; + gpios = <&gpio0 3 2 2>; + }; + + uart0: serial@10124000 { + compatible = "snps,dw-apb-uart"; + reg = <0x10124000 0x400>; + reg-shift = <2>; + interrupts = <66>; + interrupt-parent = <&GIC>; + current-speed = <115200>; + clock-frequency = < 24000000 >; + broken-txfifo = <1>; + status = "disabled"; + }; + + uart1: serial@10126000 { + compatible = "snps,dw-apb-uart"; + reg = <0x10126000 0x400>; + reg-shift = <2>; + interrupts = <67>; + interrupt-parent = <&GIC>; + current-speed = <115200>; + clock-frequency = < 24000000 >; + broken-txfifo = <1>; + status = "disabled"; + }; + + uart2: serial@20064000 { + compatible = "snps,dw-apb-uart"; + reg = <0x20064000 0x400>; + reg-shift = <2>; + interrupts = <68>; + interrupt-parent = <&GIC>; + current-speed = <115200>; + clock-frequency = < 24000000 >; + broken-txfifo = <1>; + status = "disabled"; + }; + + uart3: serial@20068000 { + compatible = "snps,dw-apb-uart"; + reg = <0x20068000 0x400>; + reg-shift = <2>; + interrupts = <69>; + interrupt-parent = <&GIC>; + current-speed = <115200>; + clock-frequency = < 24000000 >; + broken-txfifo = <1>; + status = "disabled"; + }; + + mmc@10214000 { + compatible = "rockchip,rk2928-dw-mshc"; + reg = <0x10214000 0x1000>; + interrupts = <55>; + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <48000000>; /* TODO: verify freq */ + fifo-depth = <0x40>; + num-slots = <1>; + status = "disabled"; + }; + + mmc@10218000 { + compatible = "rockchip,rk2928-dw-mshc"; + reg = <0x10218000 0x1000>; + interrupts = <56>; + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <48000000>; /* TODO: verify freq */ + fifo-depth = <0x40>; + num-slots = <1>; + status = "disabled"; + }; + }; +}; + Property changes on: head/sys/dts/arm/rk3188.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/rpi.dts =================================================================== --- head/sys/dts/arm/rpi.dts (nonexistent) +++ head/sys/dts/arm/rpi.dts (revision 325826) @@ -0,0 +1,401 @@ +/* + * Copyright (c) 2012 Oleksandr Tymoshenko + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +/dts-v1/; + +/include/ "bcm2835.dtsi" + +/ { + model = "Raspberry Pi (BCM2835)"; + compatible = "raspberrypi,model-a", "raspberrypi,model-b", + "broadcom,bcm2835-vc", "broadcom,bcm2708-vc"; + + memreserve = <0x08000000 0x08000000>; /* Set by VideoCore */ + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + compatible = "arm,1176jzf-s"; + device_type = "cpu"; + reg = <0>; /* CPU ID=0 */ + clock-frequency = <700000000>; /* 700MHz */ + }; + }; + + memory { + device_type = "memory"; + reg = <0 0x8000000>; /* 128MB, Set by VideoCore */ + + }; + + system { + revision = <0>; /* Set by VideoCore */ + serial = <0 0>; /* Set by VideoCore */ + }; + + axi { + gpio: gpio { + /* BSC0 */ + pins_bsc0_a: bsc0_a { + broadcom,function = "ALT0"; + }; + + pins_bsc0_b: bsc0_b { + broadcom,function = "ALT0"; + }; + + pins_bsc0_c: bsc0_c { + broadcom,function = "ALT1"; + }; + + /* BSC1 */ + pins_bsc1_a: bsc1_a { + broadcom,function = "ALT0"; + }; + + pins_bsc1_b: bsc1_b { + broadcom,function = "ALT2"; + }; + + /* GPCLK0 */ + pins_gpclk0_a: gpclk0_a { + broadcom,function = "ALT0"; + }; + + pins_gpclk0_b: gpclk0_b { + broadcom,function = "ALT5"; + }; + + pins_gpclk0_c: gpclk0_c { + broadcom,function = "ALT0"; + }; + + pins_gpclk0_d: gpclk0_d { + broadcom,function = "ALT0"; + }; + + /* GPCLK1 */ + pins_gpclk1_a: gpclk1_a { + broadcom,function = "ALT0"; + }; + + pins_gpclk1_b: gpclk1_b { + broadcom,function = "ALT5"; + }; + + pins_gpclk1_c: gpclk1_c { + broadcom,function = "ALT0"; + }; + + pins_gpclk1_d: gpclk1_d { + broadcom,function = "ALT0"; + }; + + /* GPCLK2 */ + pins_gpclk2_a: gpclk2_a { + broadcom,function = "ALT0"; + }; + + pins_gpclk2_b: gpclk2_b { + broadcom,function = "ALT0"; + }; + + /* SPI0 */ + pins_spi0_a: spi0_a { + broadcom,function = "ALT0"; + }; + + pins_spi0_b: spi0_b { + broadcom,function = "ALT0"; + }; + + /* PWM */ + pins_pwm0_a: pwm0_a { + broadcom,function = "ALT0"; + }; + + pins_pwm0_b: pwm0_b { + broadcom,function = "ALT5"; + }; + + pins_pwm0_c: pwm0_c { + broadcom,function = "ALT0"; + }; + + pins_pwm1_a: pwm1_a { + broadcom,function = "ALT0"; + }; + + pins_pwm1_b: pwm1_b { + broadcom,function = "ALT5"; + }; + + pins_pwm1_c: pwm1_c { + broadcom,function = "ALT0"; + }; + + pins_pwm1_d: pwm1_d { + broadcom,function = "ALT0"; + }; + + /* UART0 */ + pins_uart0_a: uart0_a { + broadcom,function = "ALT0"; + }; + + pins_uart0_b: uart0_b { + broadcom,function = "ALT3"; + }; + + pins_uart0_c: uart0_c { + broadcom,function = "ALT2"; + }; + + pins_uart0_fc_a: uart0_fc_a { + broadcom,function = "ALT3"; + }; + + pins_uart0_fc_b: uart0_fc_b { + broadcom,function = "ALT3"; + }; + + pins_uart0_fc_c: uart0_fc_c { + broadcom,function = "ALT2"; + }; + + /* PCM */ + pins_pcm_a: pcm_a { + broadcom,function = "ALT0"; + }; + + pins_pcm_b: pcm_b { + broadcom,function = "ALT2"; + }; + + /* Secondary Address Bus */ + pins_sm_addr_a: sm_addr_a { + broadcom,function = "ALT1"; + }; + + pins_sm_addr_b: sm_addr_b { + broadcom,function = "ALT1"; + }; + + pins_sm_ctl_a: sm_ctl_a { + broadcom,function = "ALT1"; + }; + + pins_sm_ctl_b: sm_ctl_b { + broadcom,function = "ALT1"; + }; + + pins_sm_data_8bit_a: sm_data_8bit_a { + broadcom,function = "ALT1"; + }; + + pins_sm_data_8bit_b: sm_data_8bit_b { + broadcom,function = "ALT1"; + }; + + pins_sm_data_16bit: sm_data_16bit { + broadcom,function = "ALT1"; + }; + + pins_sm_data_18bit: sm_data_18bit { + broadcom,function = "ALT1"; + }; + + /* BSCSL */ + pins_bscsl: bscsl { + broadcom,function = "ALT3"; + }; + + /* SPISL */ + pins_spisl: spisl { + broadcom,function = "ALT3"; + }; + + /* SPI1 */ + pins_spi1: spi1 { + broadcom,function = "ALT4"; + }; + + /* UART1 */ + pins_uart1_a: uart1_a { + broadcom,function = "ALT5"; + }; + + pins_uart1_b: uart1_b { + broadcom,function = "ALT5"; + }; + + pins_uart1_c: uart1_c { + broadcom,function = "ALT5"; + }; + + pins_uart1_fc_a: uart1_fc_a { + broadcom,function = "ALT5"; + }; + + pins_uart1_fc_b: uart1_fc_b { + broadcom,function = "ALT5"; + }; + + pins_uart1_fc_c: uart1_fc_c { + broadcom,function = "ALT5"; + }; + + /* SPI2 */ + pins_spi2: spi2 { + broadcom,function = "ALT4"; + }; + + /* ARM JTAG */ + pins_arm_jtag_trst: arm_jtag_trst { + broadcom,function = "ALT4"; + }; + + pins_arm_jtag_a: arm_jtag_a { + broadcom,function = "ALT5"; + }; + + pins_arm_jtag_b: arm_jtag_b { + broadcom,function = "ALT4"; + }; + + /* Reserved */ + pins_reserved: reserved { + broadcom,function = "ALT3"; + }; + }; + usb { + hub { + compatible = "usb,hub", "usb,device"; + reg = <0x00000001>; + #address-cells = <1>; + #size-cells = <0>; + ethernet: ethernet { + compatible = "net,ethernet", + "usb,device"; + reg = <0x00000001>; + mac-address = [00 00 00 00 00 00]; + }; + }; + + }; + + + }; + + display { + compatible = "broadcom,bcm2835-fb", "broadcom,bcm2708-fb"; + + broadcom,vc-mailbox = <&vc_mbox>; + broadcom,vc-channel = <1>; + + broadcom,width = <0>; /* Set by VideoCore */ + broadcom,height = <0>; /* Set by VideoCore */ + broadcom,depth = <0>; /* Set by VideoCore */ + }; + + rpi_ft5406 { + compatible = "rpi,rpi-ft5406"; + status = "okay"; + }; + + leds { + compatible = "gpio-leds"; + + ok { + label = "ok"; + gpios = <&gpio 16 1>; + + /* Don't change this - it configures + * how the led driver determines if + * the led is on or off when it loads. + */ + default-state = "keep"; + + /* This is the real default state. */ + linux,default-trigger = "default-on"; + }; + }; + + power: regulator { + compatible = "broadcom,bcm2835-power-mgr", + "broadcom,bcm2708-power-mgr", + "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + broadcom,vc-mailbox = <&vc_mbox>; + broadcom,vc-channel = <0>; + + regulator-name = "VideoCore"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on = <1>; + + sd_card_power: regulator@0 { + compatible = "broadcom,bcm2835-power-dev", + "broadcom,bcm2708-power-dev"; + reg = <0>; + + vin-supply = <&power>; + regulator-name = "SD Card"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + /* This is for the controller itself, not the root port */ + usb_hcd_power: regulator@3 { + compatible = "broadcom,bcm2835-power-dev", + "broadcom,bcm2708-power-dev"; + reg = <3>; + + vin-supply = <&power>; + regulator-name = "USB HCD"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + }; + + aliases { + uart0 = &uart0; + ethernet0 = ðernet; + }; + + chosen { + bootargs = ""; /* Set by VideoCore */ + stdin = "uart0"; + stdout = "uart0"; + }; + + __overrides__ { + cache_line_size = <&vchiq>, "cache-line-size:0"; + }; +}; Property changes on: head/sys/dts/arm/rpi.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/rpi2.dts =================================================================== --- head/sys/dts/arm/rpi2.dts (nonexistent) +++ head/sys/dts/arm/rpi2.dts (revision 325826) @@ -0,0 +1,412 @@ +/* + * Copyright (c) 2012 Oleksandr Tymoshenko + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +/dts-v1/; + +/include/ "bcm2836.dtsi" + +/ { + model = "Raspberry Pi 2 Model B"; + compatible = "brcm,bcm2836"; + + memreserve = <0x08000000 0x08000000>; /* Set by VideoCore */ + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0xf00>; /* CPU ID=0xf00 */ + clock-frequency = <800000000>; /* 800MHz */ + }; + cpu@1 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0xf01>; /* CPU ID=0xf01 */ + clock-frequency = <800000000>; /* 800MHz */ + }; + cpu@2 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0xf02>; /* CPU ID=0xf02 */ + clock-frequency = <800000000>; /* 800MHz */ + }; + cpu@3 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0xf03>; /* CPU ID=0xf03 */ + clock-frequency = <800000000>; /* 800MHz */ + }; + }; + + memory { + device_type = "memory"; + reg = <0 0x8000000>; /* 128MB, Set by VideoCore */ + + }; + + system { + revision = <0>; /* Set by VideoCore */ + serial = <0 0>; /* Set by VideoCore */ + }; + + axi { + gpio: gpio { + /* BSC0 */ + pins_bsc0_a: bsc0_a { + broadcom,function = "ALT0"; + }; + + pins_bsc0_b: bsc0_b { + broadcom,function = "ALT0"; + }; + + pins_bsc0_c: bsc0_c { + broadcom,function = "ALT1"; + }; + + /* BSC1 */ + pins_bsc1_a: bsc1_a { + broadcom,function = "ALT0"; + }; + + pins_bsc1_b: bsc1_b { + broadcom,function = "ALT2"; + }; + + /* GPCLK0 */ + pins_gpclk0_a: gpclk0_a { + broadcom,function = "ALT0"; + }; + + pins_gpclk0_b: gpclk0_b { + broadcom,function = "ALT5"; + }; + + pins_gpclk0_c: gpclk0_c { + broadcom,function = "ALT0"; + }; + + pins_gpclk0_d: gpclk0_d { + broadcom,function = "ALT0"; + }; + + /* GPCLK1 */ + pins_gpclk1_a: gpclk1_a { + broadcom,function = "ALT0"; + }; + + pins_gpclk1_b: gpclk1_b { + broadcom,function = "ALT5"; + }; + + pins_gpclk1_c: gpclk1_c { + broadcom,function = "ALT0"; + }; + + pins_gpclk1_d: gpclk1_d { + broadcom,function = "ALT0"; + }; + + /* GPCLK2 */ + pins_gpclk2_a: gpclk2_a { + broadcom,function = "ALT0"; + }; + + pins_gpclk2_b: gpclk2_b { + broadcom,function = "ALT0"; + }; + + /* SPI0 */ + pins_spi0_a: spi0_a { + broadcom,function = "ALT0"; + }; + + pins_spi0_b: spi0_b { + broadcom,function = "ALT0"; + }; + + /* PWM */ + pins_pwm0_a: pwm0_a { + broadcom,function = "ALT0"; + }; + + pins_pwm0_b: pwm0_b { + broadcom,function = "ALT5"; + }; + + pins_pwm0_c: pwm0_c { + broadcom,function = "ALT0"; + }; + + pins_pwm1_a: pwm1_a { + broadcom,function = "ALT0"; + }; + + pins_pwm1_b: pwm1_b { + broadcom,function = "ALT5"; + }; + + pins_pwm1_c: pwm1_c { + broadcom,function = "ALT0"; + }; + + pins_pwm1_d: pwm1_d { + broadcom,function = "ALT0"; + }; + + /* UART0 */ + pins_uart0_a: uart0_a { + broadcom,function = "ALT0"; + }; + + pins_uart0_b: uart0_b { + broadcom,function = "ALT3"; + }; + + pins_uart0_c: uart0_c { + broadcom,function = "ALT2"; + }; + + pins_uart0_fc_a: uart0_fc_a { + broadcom,function = "ALT3"; + }; + + pins_uart0_fc_b: uart0_fc_b { + broadcom,function = "ALT3"; + }; + + pins_uart0_fc_c: uart0_fc_c { + broadcom,function = "ALT2"; + }; + + /* PCM */ + pins_pcm_a: pcm_a { + broadcom,function = "ALT0"; + }; + + pins_pcm_b: pcm_b { + broadcom,function = "ALT2"; + }; + + /* Secondary Address Bus */ + pins_sm_addr_a: sm_addr_a { + broadcom,function = "ALT1"; + }; + + pins_sm_addr_b: sm_addr_b { + broadcom,function = "ALT1"; + }; + + pins_sm_ctl_a: sm_ctl_a { + broadcom,function = "ALT1"; + }; + + pins_sm_ctl_b: sm_ctl_b { + broadcom,function = "ALT1"; + }; + + pins_sm_data_8bit_a: sm_data_8bit_a { + broadcom,function = "ALT1"; + }; + + pins_sm_data_8bit_b: sm_data_8bit_b { + broadcom,function = "ALT1"; + }; + + pins_sm_data_16bit: sm_data_16bit { + broadcom,function = "ALT1"; + }; + + pins_sm_data_18bit: sm_data_18bit { + broadcom,function = "ALT1"; + }; + + /* BSCSL */ + pins_bscsl: bscsl { + broadcom,function = "ALT3"; + }; + + /* SPISL */ + pins_spisl: spisl { + broadcom,function = "ALT3"; + }; + + /* SPI1 */ + pins_spi1: spi1 { + broadcom,function = "ALT4"; + }; + + /* UART1 */ + pins_uart1_a: uart1_a { + broadcom,function = "ALT5"; + }; + + pins_uart1_b: uart1_b { + broadcom,function = "ALT5"; + }; + + pins_uart1_c: uart1_c { + broadcom,function = "ALT5"; + }; + + pins_uart1_fc_a: uart1_fc_a { + broadcom,function = "ALT5"; + }; + + pins_uart1_fc_b: uart1_fc_b { + broadcom,function = "ALT5"; + }; + + pins_uart1_fc_c: uart1_fc_c { + broadcom,function = "ALT5"; + }; + + /* SPI2 */ + pins_spi2: spi2 { + broadcom,function = "ALT4"; + }; + + /* ARM JTAG */ + pins_arm_jtag_trst: arm_jtag_trst { + broadcom,function = "ALT4"; + }; + + pins_arm_jtag_a: arm_jtag_a { + broadcom,function = "ALT5"; + }; + + pins_arm_jtag_b: arm_jtag_b { + broadcom,function = "ALT4"; + }; + + /* Reserved */ + pins_reserved: reserved { + broadcom,function = "ALT3"; + }; + }; + usb { + hub { + compatible = "usb,hub", "usb,device"; + reg = <0x00000001>; + #address-cells = <1>; + #size-cells = <0>; + ethernet: ethernet { + compatible = "net,ethernet", + "usb,device"; + reg = <0x00000001>; + mac-address = [00 00 00 00 00 00]; + }; + }; + + }; + }; + + display { + compatible = "broadcom,bcm2835-fb", "broadcom,bcm2708-fb"; + + broadcom,vc-mailbox = <&vc_mbox>; + broadcom,vc-channel = <1>; + + broadcom,width = <0>; /* Set by VideoCore */ + broadcom,height = <0>; /* Set by VideoCore */ + broadcom,depth = <0>; /* Set by VideoCore */ + }; + + rpi_ft5406 { + compatible = "rpi,rpi-ft5406"; + status = "okay"; + }; + + leds { + compatible = "gpio-leds"; + + pwr { + label = "pwr"; + gpios = <&gpio 35 0>; + }; + + act { + label = "act"; + gpios = <&gpio 47 0>; + }; + }; + + power: regulator { + compatible = "broadcom,bcm2835-power-mgr", + "broadcom,bcm2708-power-mgr", + "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + broadcom,vc-mailbox = <&vc_mbox>; + broadcom,vc-channel = <0>; + + regulator-name = "VideoCore"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on = <1>; + + sd_card_power: regulator@0 { + compatible = "broadcom,bcm2835-power-dev", + "broadcom,bcm2708-power-dev"; + reg = <0>; + + vin-supply = <&power>; + regulator-name = "SD Card"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + /* This is for the controller itself, not the root port */ + usb_hcd_power: regulator@3 { + compatible = "broadcom,bcm2835-power-dev", + "broadcom,bcm2708-power-dev"; + reg = <3>; + + vin-supply = <&power>; + regulator-name = "USB HCD"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + }; + + aliases { + uart0 = &uart0; + ethernet0 = ðernet; + }; + + chosen { + bootargs = ""; /* Set by VideoCore */ + stdin = "uart0"; + stdout = "uart0"; + }; + + __overrides__ { + cache_line_size = <&vchiq>, "cache-line-size:0"; + }; +}; Property changes on: head/sys/dts/arm/rpi2.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/rt1310a.dtsi =================================================================== --- head/sys/dts/arm/rt1310a.dtsi (nonexistent) +++ head/sys/dts/arm/rt1310a.dtsi (revision 325826) @@ -0,0 +1,159 @@ +/* + * Copyright (c) 2011 Jakub Klama + * Copyright (c) 2015 Hiroki Mori + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Ralink RT1310A Device Tree Source. + * + * $FreeBSD$ + */ + +/ { + compatible = "ralink,rt1310a-soc"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + serial0 = &serial0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,926EJ-S"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x4000>; // L1, 16K + i-cache-size = <0x4000>; // L1, 16K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x40000000 0x1000000>; // 16M at 0x40000000 + }; + + localbus@1f000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x1f000000 0x400000>; + }; + + ahb@19C00000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x19C00000 0xE0000>; + bus-frequency = <13000000>; + + PIC: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x40000 0x20000>; + compatible = "rt,pic"; + }; + + fvmdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fv,mdio"; + reg = <0x80000 0x20000>; + }; + + enet0:fv_mac0@80000 { + compatible = "fv,ethernet"; + reg = <0x80000 0x20000>; + interrupts = <7>; + interrupt-parent = <&PIC>; + + }; + + enet1:fv_mac1@A0000 { + compatible = "fv,ethernet"; + reg = <0xA0000 0x20000>; + interrupts = <8>; + interrupt-parent = <&PIC>; + }; + + }; + + apb@1E800000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x1E800000 0x800000>; + bus-frequency = <75000000>; + + timer@000000 { + compatible = "rt,timer"; + reg = <0x0 0x10 + 0x10 0x10 + 0x20 0x10 + 0x30 0x10>; + interrupts = <3 4 5>; + interrupt-parent = <&PIC>; + }; + + rtc@20000 { + compatible = "rt,rtc"; + interrupts = <6>; + reg = <0x20000 0x20000>; + }; + + serial0: serial@40000 { + compatible = "ns16550"; + reg = <0x40000 0x20000>; + interrupts = <1>; + reg-shift = <2>; + clock-frequency = <6758400>; + current-speed = <38400>; + interrupt-parent = <&PIC>; + }; + + gpio0: gpio@A0000 { + compatible = "ralink,rt1310-gpio"; + gpio-controller; + #gpio-cells = <2>; + interrupts = <8>; + reg = <0xA0000 0x20000>; + }; + }; + + +/* + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; +*/ +}; + Property changes on: head/sys/dts/arm/rt1310a.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/sam9260ek.dts =================================================================== --- head/sys/dts/arm/sam9260ek.dts (nonexistent) +++ head/sys/dts/arm/sam9260ek.dts (revision 325826) @@ -0,0 +1,37 @@ +/* + * SAM9260EK eval board - Warner Losh public domain + * + * $FreeBSD$ + */ +/dts-v1/; +#include "sam9260ek_common.dtsi" + +/ { + model = "Atmel at91sam9260ek"; + compatible = "atmel,at91sam9260ek", "atmel,at91sam9260", "atmel,at91sam9"; + + leds { + compatible = "gpio-leds"; + + ds1 { + label = "ds1"; + gpios = <&pioA 9 0>; + linux,default-trigger = "heartbeat"; + }; + + ds5 { + label = "ds5"; + gpios = <&pioA 6 1>; + }; + }; + + aliases { + dbgu = &dbgu; + }; + + + chosen { + stdin = "dbgu"; + stdout = "dbgu"; + }; +}; Property changes on: head/sys/dts/arm/sam9260ek.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/sheevaplug.dts =================================================================== --- head/sys/dts/arm/sheevaplug.dts (nonexistent) +++ head/sys/dts/arm/sheevaplug.dts (revision 325826) @@ -0,0 +1,253 @@ +/* + * Copyright (c) 2010 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under sponsorship from + * the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Marvell SheevaPlug Device Tree Source. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "mrvl,SheevaPlug"; + compatible = "SheevaPlug"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + mpp = &MPP; + serial0 = &serial0; + serial1 = &serial1; + soc = &SOC; + sram = &SRAM; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,88FR131"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x4000>; // L1, 16K + i-cache-size = <0x4000>; // L1, 16K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x20000000>; // 512M at 0x0 + }; + + localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "mrvl,lbc"; + bank-count = <3>; + + /* This reflects CPU decode windows setup. */ + ranges = <0x0 0x2f 0xf9300000 0x00100000>; + + nand@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mrvl,nfc"; + reg = <0x0 0x0 0x00100000>; + bank-width = <2>; + device-width = <1>; + + slice@0 { + reg = <0x0 0x200000>; + label = "u-boot"; + read-only; + }; + + slice@200000 { + reg = <0x200000 0x1fe00000>; + label = "root"; + }; + }; + }; + + SOC: soc88f6281@f1000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xf1000000 0x00100000>; + bus-frequency = <0>; + + PIC: pic@20200 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x20200 0x3c>; + compatible = "mrvl,pic"; + }; + + timer@20300 { + compatible = "mrvl,timer"; + reg = <0x20300 0x30>; + interrupts = <1>; + interrupt-parent = <&PIC>; + mrvl,has-wdt; + }; + + MPP: mpp@10000 { + #pin-cells = <2>; + compatible = "mrvl,mpp"; + reg = <0x10000 0x34>; + pin-count = <50>; + pin-map = < + 0 1 /* MPP[0]: NF_IO[2] */ + 1 1 /* MPP[1]: NF_IO[3] */ + 2 1 /* MPP[2]: NF_IO[4] */ + 3 1 /* MPP[3]: NF_IO[5] */ + 4 1 /* MPP[4]: NF_IO[6] */ + 5 1 /* MPP[5]: NF_IO[7] */ + 6 1 /* MPP[6]: SYSRST_OUTn */ + 8 2 /* MPP[8]: UA0_RTS */ + 9 2 /* MPP[9]: UA0_CTS */ + 10 3 /* MPP[10]: UA0_TXD */ + 11 3 /* MPP[11]: UA0_RXD */ + 12 1 /* MPP[12]: SD_CLK */ + 13 1 /* MPP[13]: SD_CMD */ + 14 1 /* MPP[14]: SD_D[0] */ + 15 1 /* MPP[15]: SD_D[1] */ + 16 1 /* MPP[16]: SD_D[2] */ + 17 1 /* MPP[17]: SD_D[3] */ + 18 1 /* MPP[18]: NF_IO[0] */ + 19 1 /* MPP[19]: NF_IO[1] */ + 29 1 >; /* MPP[29]: TSMP[9] */ + }; + + GPIO: gpio@10100 { + #gpio-cells = <3>; + compatible = "mrvl,gpio"; + reg = <0x10100 0x20>; + gpio-controller; + interrupts = <35 36 37 38 39 40 41>; + interrupt-parent = <&PIC>; + }; + + rtc@10300 { + compatible = "mrvl,rtc"; + reg = <0x10300 0x08>; + }; + + twsi@11000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,twsi"; + reg = <0x11000 0x20>; + interrupts = <43>; + interrupt-parent = <&PIC>; + }; + + enet0: ethernet@72000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x72000 0x2000>; + ranges = <0x0 0x72000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <12 13 14 11 46>; + interrupt-parent = <&PIC>; + phy-handle = <&phy0>; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,mdio"; + + phy0: ethernet-phy@0 { + reg = <0x0>; + }; + }; + }; + + serial0: serial@12000 { + compatible = "ns16550"; + reg = <0x12000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <33>; + interrupt-parent = <&PIC>; + }; + + serial1: serial@12100 { + compatible = "ns16550"; + reg = <0x12100 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <34>; + interrupt-parent = <&PIC>; + }; + + crypto@30000 { + compatible = "mrvl,cesa"; + reg = <0x30000 0x1000 /* tdma base reg chan 0 */ + 0x3D000 0x1000>; /* cesa base reg chan 0 */ + interrupts = <22>; + interrupt-parent = <&PIC>; + + sram-handle = <&SRAM>; + }; + + usb@50000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x50000 0x1000>; + interrupts = <48 19>; + interrupt-parent = <&PIC>; + }; + + xor@60000 { + compatible = "mrvl,xor"; + reg = <0x60000 0x1000>; + interrupts = <5 6 7 8>; + interrupt-parent = <&PIC>; + }; + }; + + SRAM: sram@fd000000 { + compatible = "mrvl,cesa-sram"; + reg = <0xfd000000 0x00100000>; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; +}; Property changes on: head/sys/dts/arm/sheevaplug.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/sinovoip-bpi-m3.dts =================================================================== --- head/sys/dts/arm/sinovoip-bpi-m3.dts (nonexistent) +++ head/sys/dts/arm/sinovoip-bpi-m3.dts (revision 325826) @@ -0,0 +1,171 @@ +/*- + * Copyright (c) 2016 Jared McNeill + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include "sun8i-a83t-sinovoip-bpi-m3.dts" +#include "a83t.dtsi" + +/ { + cpus { + cpu@0 { + cpu-supply = <®_dcdc2>; + operating-points = < + /* kHz uV */ + 1200000 840000 + 1008000 840000 + 648000 840000 + 408000 840000 + >; + }; + + cpu@100 { + cpu-supply = <®_dcdc3>; + operating-points = < + /* kHz uV */ + 1200000 840000 + 1008000 840000 + 648000 840000 + 408000 840000 + >; + }; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +®_ahci_5v { + gpio = <&pio 3 25 GPIO_ACTIVE_HIGH>; /* PD25 */ + status = "okay"; +}; + +&ahci_pwr_pin_a { + allwinner,pins = "PD25"; +}; + +®_usb1_vbus { + gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ + status = "okay"; +}; + +&usb1_vbus_pin_a { + allwinner,pins = "PD24"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; + vmmc-supply = <®_vcc3v3>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_pins_rgmii_a>; + phy = <&phy1>; + phy-mode = "rgmii"; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +&emac_tx_clk { + /* EMAC transmit/receive clock delay chain values for BPI-M3 */ + tx-delay = <0x7>; + rx-delay = <0x7>; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; +}; + +&r_rsb { + status = "okay"; + + axp81x: pmic@3a3 { + compatible = "x-powers,axp813"; + reg = <0x3a3>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + gpio-controller; + #gpio-cells = <1>; + + regulators { + reg_dcdc2: dcdc2 { + regulator-name = "dcdc2"; + }; + + reg_dcdc3: dcdc3 { + regulator-name = "dcdc3"; + }; + }; + }; +}; + +/ { + leds { + compatible = "gpio-leds"; + + green_led { + gpios = <&axp81x 0>; /* AXP PMIC GPIO0 */ + label = "green_led"; + }; + + blue_led { + gpios = <&axp81x 1>; /* AXP PMIC GPIO1 */ + label = "blue_led"; + }; + }; +}; Property changes on: head/sys/dts/arm/sinovoip-bpi-m3.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/socfpga_arria10_socdk_sdmmc.dts =================================================================== --- head/sys/dts/arm/socfpga_arria10_socdk_sdmmc.dts (nonexistent) +++ head/sys/dts/arm/socfpga_arria10_socdk_sdmmc.dts (revision 325826) @@ -0,0 +1,86 @@ +/*- + * Copyright (c) 2017 Ruslan Bukin + * All rights reserved. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 + * ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; +#include "socfpga_arria10_socdk.dtsi" + +/ { + model = "Altera SOCFPGA Arria 10"; + compatible = "altr,socfpga-arria10", "altr,socfpga"; + + /* Reserve first page for secondary CPU trampoline code */ + memreserve = < 0x00000000 0x1000 >; + + soc { + /* Local timer */ + timer@ffffc600 { + clock-frequency = <200000000>; + }; + + /* Global timer */ + global_timer: timer@ffffc200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0xffffc200 0x20>; + interrupts = <1 11 0x301>; + clock-frequency = <200000000>; + }; + }; + + chosen { + stdin = "serial1"; + stdout = "serial1"; + }; +}; + +&uart1 { + clock-frequency = < 50000000 >; +}; + +&mmc { + status = "okay"; + num-slots = <1>; + cap-sd-highspeed; + broken-cd; + bus-width = <4>; + bus-frequency = <200000000>; +}; + +&i2c1 { + lcd@28 { + compatible = "newhaven,nhd-0216k3z-nsw-bbw"; + reg = <0x28>; + }; +}; + +&usb0 { + dr_mode = "host"; +}; Property changes on: head/sys/dts/arm/socfpga_arria10_socdk_sdmmc.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/socfpga_cyclone5_sockit_beri_sdmmc.dts =================================================================== --- head/sys/dts/arm/socfpga_cyclone5_sockit_beri_sdmmc.dts (nonexistent) +++ head/sys/dts/arm/socfpga_cyclone5_sockit_beri_sdmmc.dts (revision 325826) @@ -0,0 +1,153 @@ +/*- + * Copyright (c) 2017 Ruslan Bukin + * All rights reserved. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 + * ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/* /dts-v1/; */ +#include "socfpga_cyclone5_sockit.dts" + +/ { + model = "Terasic SoCkit"; + compatible = "altr,socfpga-cyclone5", "altr,socfpga"; + + memreserve = < 0x00000000 0x1000 >, /* SMP trampoline */ + < 0x00001000 0x1000 >, /* virtio block */ + < 0x00002000 0x1000 >; /* virtio net */ + + soc { + /* Local timer */ + timer@fffec600 { + clock-frequency = <200000000>; + }; + + /* Global timer */ + global_timer: timer@fffec200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0xfffec200 0x20>; + interrupts = <1 11 0xf04>; + clock-frequency = <200000000>; + }; + + beri_mem0: mem@d0000000 { + compatible = "sri-cambridge,beri-mem"; + reg = <0xd0000000 0x10000000>; /* 256mb */ + status = "okay"; + }; + + pio0: pio@c0020000 { + compatible = "altr,pio"; + reg = <0xc0020000 0x1000>; /* recv */ + interrupts = < 76 >; + status = "okay"; + }; + + pio1: pio@c0021000 { + compatible = "altr,pio"; + reg = <0xc0021000 0x1000>; /* send */ + interrupts = < 82 >; /* not in use on arm side */ + status = "okay"; + }; + + pio2: pio@c0022000 { + compatible = "altr,pio"; + reg = <0xc0022000 0x1000>; /* recv */ + interrupts = < 77 >; + status = "okay"; + }; + + pio3: pio@c0023000 { + compatible = "altr,pio"; + reg = <0xc0023000 0x1000>; /* send */ + interrupts = < 83 >; /* not in use on arm side */ + status = "okay"; + }; + + beri_vtblk: vtblk@00001000 { + compatible = "sri-cambridge,beri-vtblk"; + reg = <0x00001000 0x1000>; + pio-recv = <&pio0>; + pio-send = <&pio1>; + beri-mem = <&beri_mem0>; + status = "okay"; + }; + + beri_vtnet: vtnet@00002000 { + compatible = "sri-cambridge,beri-vtnet"; + reg = <0x00002000 0x1000>; + pio-recv = <&pio2>; + pio-send = <&pio3>; + beri-mem = <&beri_mem0>; + status = "okay"; + }; + + beri_debug: ring@c0000000 { + compatible = "sri-cambridge,beri-ring"; + reg = <0xc0000000 0x3000>; + interrupts = < 72 73 >; + device_name = "beri_debug"; + data_size = <0x1000>; + data_read = <0x0>; + data_write = <0x1000>; + control_read = <0x2000>; + control_write = <0x2010>; + status = "okay"; + }; + + beri_console: ring@c0004000 { + compatible = "sri-cambridge,beri-ring"; + reg = <0xc0004000 0x3000>; + interrupts = < 74 75 >; + device_name = "beri_console"; + data_size = <0x1000>; + data_read = <0x0>; + data_write = <0x1000>; + control_read = <0x2000>; + control_write = <0x2010>; + status = "okay"; + }; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; +}; + +&mmc0 { + bus-frequency = <25000000>; +}; + +&uart0 { + clock-frequency = <100000000>; +}; + +&uart1 { + status = "disabled"; +}; Property changes on: head/sys/dts/arm/socfpga_cyclone5_sockit_beri_sdmmc.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/socfpga_cyclone5_sockit_sdmmc.dts =================================================================== --- head/sys/dts/arm/socfpga_cyclone5_sockit_sdmmc.dts (nonexistent) +++ head/sys/dts/arm/socfpga_cyclone5_sockit_sdmmc.dts (revision 325826) @@ -0,0 +1,74 @@ +/*- + * Copyright (c) 2017 Ruslan Bukin + * All rights reserved. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 + * ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/* /dts-v1/; */ +#include "socfpga_cyclone5_sockit.dts" + +/ { + model = "Terasic SoCkit"; + compatible = "altr,socfpga-cyclone5", "altr,socfpga"; + + /* Reserve first page for secondary CPU trampoline code */ + memreserve = < 0x00000000 0x1000 >; + + soc { + /* Local timer */ + timer@fffec600 { + clock-frequency = <200000000>; + }; + + /* Global timer */ + global_timer: timer@fffec200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0xfffec200 0x20>; + interrupts = <1 11 0xf04>; + clock-frequency = <200000000>; + }; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; +}; + +&mmc0 { + bus-frequency = <25000000>; +}; + +&uart0 { + clock-frequency = <100000000>; +}; + +&uart1 { + status = "disabled"; +}; Property changes on: head/sys/dts/arm/socfpga_cyclone5_sockit_sdmmc.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/sun7i-a20-hdmi.dtsi =================================================================== --- head/sys/dts/arm/sun7i-a20-hdmi.dtsi (nonexistent) +++ head/sys/dts/arm/sun7i-a20-hdmi.dtsi (revision 325826) @@ -0,0 +1,97 @@ +/*- + * Copyright (c) 2016 Jared McNeill + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/ { + clocks { + hdmi_clk: clk@01c20150 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-hdmi-clk"; + reg = <0x01c20150 0x4>; + clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; + clock-output-names = "hdmi"; + }; + + lcd0_ch0_clk: clk@01c20118 { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-lcd-ch0-clk"; + reg = <0x01c20118 0x4>; + clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll6 2>; + clock-output-names = "lcd0_ch0"; + }; + + lcd0_ch1_clk: clk@01c2012c { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-lcd-ch1-clk"; + reg = <0x01c2012c 0x4>; + clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; + clock-output-names = "lcd0_ch1_sclk1", + "lcd0_ch1_sclk2"; + }; + + de_be0_clk: clk@01c20104 { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-de-be-clk"; + reg = <0x01c20104 0x4>; + clocks = <&pll3>, <&pll7>, <&pll5 1>; + clock-output-names = "de_be0"; + }; + }; + + soc@01c00000 { + hdmi: hdmi@01c16000 { + compatible = "allwinner,sun7i-a20-hdmi"; + reg = <0x01c16000 0x1000>; + clocks = <&ahb_gates 43>, <&hdmi_clk>, + <&lcd0_ch1_clk 1>; + clock-names = "ahb", "hdmi", + "lcd"; + status = "disabled"; + }; + + hdmiaudio { + compatible = "allwinner,sun7i-a20-hdmiaudio"; + status = "disabled"; + }; + + fb: fb@01e60000 { + compatible = "allwinner,sun7i-a20-fb"; + reg = <0x01e60000 0x10000>, /* DEBE0 */ + <0x01c0c000 0x1000>; /* LCD0 */ + clocks = <&ahb_gates 44>, <&dram_gates 26>, + <&de_be0_clk>, <&ahb_gates 36>, + <&lcd0_ch1_clk 0>, <&lcd0_ch1_clk 1>; + clock-names = "ahb_de_be", "dram_de_be", + "de_be", "ahb_lcd", + "lcd_ch1_sclk1", "lcd_ch1_sclk2"; + resets = <&de_be0_clk>, <&lcd0_ch0_clk>; + reset-names = "de_be", "lcd"; + }; + }; +}; Property changes on: head/sys/dts/arm/sun7i-a20-hdmi.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/sun8i-a83t-sinovoip-bpi-m3.dts =================================================================== --- head/sys/dts/arm/sun8i-a83t-sinovoip-bpi-m3.dts (nonexistent) +++ head/sys/dts/arm/sun8i-a83t-sinovoip-bpi-m3.dts (revision 325826) @@ -0,0 +1,81 @@ +/* + * Copyright 2016 Vishnu Patekar + * Vishnu Patekar + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * $FreeBSD$ + */ + +/dts-v1/; +#include "sun8i-a83t.dtsi" +#include "sunxi-common-regulators.dtsi" + +/ { + model = "Sinovoip BananaPi M3 v1.2"; + compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v0>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ + bus-width = <4>; + cd-inverted; + status = "okay"; +}; + +&r_rsb { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_b>; + status = "okay"; +}; Property changes on: head/sys/dts/arm/sun8i-a83t-sinovoip-bpi-m3.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/sun8i-a83t.dtsi =================================================================== --- head/sys/dts/arm/sun8i-a83t.dtsi (nonexistent) +++ head/sys/dts/arm/sun8i-a83t.dtsi (revision 325826) @@ -0,0 +1,510 @@ +/* + * Copyright 2015 Vishnu Patekar + * + * Vishnu Patekar + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * $FreeBSD$ + */ + +#include "skeleton.dtsi" + +#include + +#include + +/ { + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0>; + }; + + cpu@1 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <1>; + }; + + cpu@2 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <2>; + }; + + cpu@3 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <3>; + }; + + cpu@100 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x100>; + }; + + cpu@101 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x101>; + }; + + cpu@102 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x102>; + }; + + cpu@103 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x103>; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + }; + + clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* TODO: PRCM block has a mux for this. */ + osc24M: osc24M_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "osc24M"; + }; + + /* + * This is called "internal OSC" in some places. + * It is an internal RC-based oscillator. + * TODO: Its controls are in the PRCM block. + */ + osc16M: osc16M_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <16000000>; + clock-output-names = "osc16M"; + }; + + osc16Md512: osc16Md512_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clock-div = <512>; + clock-mult = <1>; + clocks = <&osc16M>; + clock-output-names = "osc16M-d512"; + }; + + pll6: clk@01c20028 { + #clock-cells = <0>; + compatible = "allwinner,sun9i-a80-pll4-clk"; + reg = <0x01c20028 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll6"; + }; + + pll6d2: pll6d2_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clock-div = <2>; + clock-mult = <1>; + clocks = <&pll6>; + clock-output-names = "pll6d2"; + }; + + ahb1: clk@01c20054 { + #clock-cells = <0>; + compatible = "allwinner,sun8i-a83t-ahb1-clk"; + reg = <0x01c20054 0x4>; + clocks = <&osc16Md512>, <&osc24M>, <&pll6>, <&pll6>; + clock-output-names = "ahb1"; + }; + + apb1: apb1_clk@01c20054 { + #clock-cells = <0>; + compatible = "allwinner,sun8i-a83t-apb1-clk"; + reg = <0x01c20054 0x4>; + clocks = <&ahb1>; + clock-output-names = "apb1"; + }; + + apb2: clk@01c20058 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-apb1-clk"; + reg = <0x01c20058 0x4>; + clocks = <&osc16Md512>, <&osc24M>, <&pll6>, <&pll6>; + clock-output-names = "apb2"; + }; + + ahb2: clk@01c2005c { + #clock-cells = <0>; + compatible = "allwinner,sun8i-h3-ahb2-clk"; + reg = <0x01c2005c 0x4>; + clocks = <&ahb1>, <&pll6d2>; + clock-output-names = "ahb2"; + }; + + bus_gates: clk@01c20060 { + #clock-cells = <1>; + compatible = "allwinner,sun8i-a83t-bus-gates-clk"; + reg = <0x01c20060 0x10>; + clocks = <&ahb1>, <&ahb2>, <&apb1>, <&apb2>; + clock-names = "ahb1", "ahb2", "apb1", "apb2"; + clock-indices = <1>, <5>, <6>, + <8>, <9>, <10>, + <13>, <14>, <17>, + <19>, <20>, + <21>, <24>, + <26>, <27>, + <29>, <32>, + <36>, <37>, + <40>, <43>, + <44>, <52>, <53>, + <54>, <65>, + <69>, <76>, <77>, + <78>, <79>, <96>, + <97>, <98>, + <112>, <113>, + <114>, <115>, + <116>; + clock-output-names = "bus_mipidsi", "bus_ss", "bus_dma", + "bus_mmc0", "bus_mmc1", "bus_mmc2", + "bus_nand", "bus_sdram", "bus_emac", + "bus_hstimer", "bus_spi0", + "bus_spi1", "bus_usb_otg", + "bus_ehci0", "bus_ehci1", + "bus_ohci0", "bus_ve", + "bus_lcd0", "bus_lcd1", + "bus_csi", "bus_hdmi", + "bus_de", "bus_gpu", "bus_msgbox", + "bus_spinlock", "bus_spdif", + "bus_pio", "bus_i2s0", "bus_i2s1", + "bus_i2s2", "bus_tdm", "bus_i2c0", + "bus_i2c1", "bus_i2c2", + "bus_uart0", "bus_uart1", + "bus_uart2", "bus_uart3", + "bus_uart4"; + }; + + mmc0_clk: clk@01c20088 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-mmc-clk"; + reg = <0x01c20088 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "mmc0", + "mmc0_output", + "mmc0_sample"; + }; + + mmc1_clk: clk@01c2008c { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-mmc-clk"; + reg = <0x01c2008c 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "mmc1", + "mmc1_output", + "mmc1_sample"; + }; + + mmc2_clk: clk@01c20090 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-mmc-clk"; + reg = <0x01c20090 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "mmc2", + "mmc2_output", + "mmc2_sample"; + }; + + cpus_clk: clk@01f01400 { + compatible = "allwinner,sun9i-a80-cpus-clk"; + reg = <0x01f01400 0x4>; + #clock-cells = <0>; + clocks = <&osc16Md512>, <&osc24M>, <&pll6>, <&osc16M>; + clock-output-names = "cpus"; + }; + + ahb0: ahb0_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&cpus_clk>; + clock-output-names = "ahb0"; + }; + + apb0: clk@01f0140c { + compatible = "allwinner,sun8i-a23-apb0-clk"; + reg = <0x01f0140c 0x4>; + #clock-cells = <0>; + clocks = <&ahb0>; + clock-output-names = "apb0"; + }; + + apb0_gates: clk@01f01428 { + compatible = "allwinner,sun8i-a83t-apb0-gates-clk"; + reg = <0x01f01428 0x4>; + #clock-cells = <1>; + clocks = <&apb0>; + clock-indices = <0>, <1>, + <2>, <3>, + <4>, <6>, <7>; + clock-output-names = "apb0_pio", "apb0_ir", + "apb0_timer", "apb0_rsb", + "apb0_uart", "apb0_i2c0", "apb0_twd"; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mmc0: mmc@01c0f000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c0f000 0x1000>; + clocks = <&bus_gates 8>, + <&mmc0_clk 0>, + <&mmc0_clk 1>, + <&mmc0_clk 2>; + clock-names = "ahb", + "mmc", + "output", + "sample"; + resets = <&ahb_reset 8>; + reset-names = "ahb"; + interrupts = ; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc1: mmc@01c10000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c10000 0x1000>; + clocks = <&bus_gates 9>, + <&mmc1_clk 0>, + <&mmc1_clk 1>, + <&mmc1_clk 2>; + clock-names = "ahb", + "mmc", + "output", + "sample"; + resets = <&ahb_reset 9>; + reset-names = "ahb"; + interrupts = ; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc2: mmc@01c11000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c11000 0x1000>; + clocks = <&bus_gates 10>, + <&mmc2_clk 0>, + <&mmc2_clk 1>, + <&mmc2_clk 2>; + clock-names = "ahb", + "mmc", + "output", + "sample"; + resets = <&ahb_reset 10>; + reset-names = "ahb"; + interrupts = ; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + pio: pinctrl@01c20800 { + compatible = "allwinner,sun8i-a83t-pinctrl"; + interrupts = , + , + ; + reg = <0x01c20800 0x400>; + clocks = <&bus_gates 69>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <3>; + #gpio-cells = <3>; + + mmc0_pins_a: mmc0@0 { + allwinner,pins = "PF0", "PF1", "PF2", + "PF3", "PF4", "PF5"; + allwinner,function = "mmc0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + mmc0_cd_pin_reference_design: mmc0_cd_pin@0 { + allwinner,pins = "PF6"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + uart0_pins_a: uart0@0 { + allwinner,pins = "PF2", "PF4"; + allwinner,function = "uart0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + uart0_pins_b: uart0@1 { + allwinner,pins = "PB9", "PB10"; + allwinner,function = "uart0"; + allwinner,drive = ; + allwinner,pull = ; + }; + }; + + ahb_reset: reset@01c202c0 { + reg = <0x01c202c0 0xc>; + compatible = "allwinner,sun6i-a31-clock-reset"; + #reset-cells = <1>; + }; + + apb1_reset: reset@01c202d0 { + reg = <0x01c202d0 0x4>; + compatible = "allwinner,sun6i-a31-clock-reset"; + #reset-cells = <1>; + }; + + apb2_reset: reset@01c202d8 { + reg = <0x01c202d8 0x4>; + compatible = "allwinner,sun6i-a31-clock-reset"; + #reset-cells = <1>; + }; + + timer@01c20c00 { + compatible = "allwinner,sun4i-a10-timer"; + reg = <0x01c20c00 0xa0>; + interrupts = , + ; + clocks = <&osc24M>; + }; + + watchdog@01c20ca0 { + compatible = "allwinner,sun6i-a31-wdt"; + reg = <0x01c20ca0 0x20>; + interrupts = ; + clocks = <&osc24M>; + }; + + uart0: serial@01c28000 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28000 0x400>; + interrupts = ; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&bus_gates 112>; + resets = <&apb2_reset 16>; + status = "disabled"; + }; + + gic: interrupt-controller@01c81000 { + compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; + reg = <0x01c81000 0x1000>, + <0x01c82000 0x1000>, + <0x01c84000 0x2000>, + <0x01c86000 0x2000>; + interrupt-controller; + #interrupt-cells = <3>; + interrupts = ; + }; + + apb0_reset: reset@01f014b0 { + reg = <0x01f014b0 0x4>; + compatible = "allwinner,sun6i-a31-clock-reset"; + #reset-cells = <1>; + }; + + r_pio: pinctrl@01f02c00 { + compatible = "allwinner,sun8i-a83t-r-pinctrl"; + reg = <0x01f02c00 0x400>; + interrupts = ; + clocks = <&apb0_gates 0>; + resets = <&apb0_reset 0>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <3>; + #gpio-cells = <3>; + + r_rsb_pins: r_rsb { + allwinner,pins = "PL0", "PL1"; + allwinner,function = "s_rsb"; + allwinner,drive = ; + allwinner,pull = ; + }; + }; + + r_rsb: i2c@01f03400 { + compatible = "allwinner,sun8i-a23-rsb"; + reg = <0x01f03400 0x400>; + interrupts = ; + clocks = <&apb0_gates 3>; + clock-frequency = <3000000>; + resets = <&apb0_reset 3>; + pinctrl-names = "default"; + pinctrl-0 = <&r_rsb_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; Property changes on: head/sys/dts/arm/sun8i-a83t.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/sun8i-h3-nanopi-neo.dts =================================================================== --- head/sys/dts/arm/sun8i-h3-nanopi-neo.dts (nonexistent) +++ head/sys/dts/arm/sun8i-h3-nanopi-neo.dts (revision 325826) @@ -0,0 +1,128 @@ +/* + * Copyright (C) 2016 James Pettigrew + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * $FreeBSD$ + */ + +/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include +#include +#include + +/ { + model = "FriendlyARM NanoPi NEO"; + compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&leds_opc>, <&leds_r_opc>; + + pwr_led { + label = "nanopi:green:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + status_led { + label = "nanopi:blue:status"; + gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&ehci3 { + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ + cd-inverted; + status = "okay"; +}; + +&ohci3 { + status = "okay"; +}; + +&pio { + leds_opc: led_pins@0 { + allwinner,pins = "PA10"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&r_pio { + leds_r_opc: led_pins@0 { + allwinner,pins = "PL10"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + /* USB VBUS is always on */ + status = "okay"; +}; Property changes on: head/sys/dts/arm/sun8i-h3-nanopi-neo.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/tegra124-jetson-tk1-fbsd.dts =================================================================== --- head/sys/dts/arm/tegra124-jetson-tk1-fbsd.dts (nonexistent) +++ head/sys/dts/arm/tegra124-jetson-tk1-fbsd.dts (revision 325826) @@ -0,0 +1,48 @@ +/*- + * Copyright (c) 2016 Michal Meloun + * All rights reserved. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) + * ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include "tegra124-jetson-tk1.dts" + +/ { + chosen { + stdin = &uartd; + stdout = &uartd; + }; + + memory { +/* reg = <0x0 0x80000000 0x0 0x80000000>; */ + reg = <0x0 0x80000000 0x0 0x70000000>; + }; + usb@70090000 { + freebsd,clock-xusb-gate = <&tegra_car 143>; + }; +}; Property changes on: head/sys/dts/arm/tegra124-jetson-tk1-fbsd.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/tegra20-paz00.dts =================================================================== --- head/sys/dts/arm/tegra20-paz00.dts (nonexistent) +++ head/sys/dts/arm/tegra20-paz00.dts (revision 325826) @@ -0,0 +1,58 @@ +/*- + * Copyright (c) 2011 The FreeBSD Foundation + * Copyright (c) 2012 Andrew Turner + * All rights reserved. + * + * Developed by Damjan Marion + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +/dts-v1/; + +/include/ "tegra20.dtsi" + +/ { + model = "Toshiba AC100 / Dynabook AZ"; + + aliases { + serial0 = &serial0; + soc = &SOC; + }; + + memory { + device_type = "memory"; + reg = < 0x00000000 0x20000000 >; /* 512MB RAM at 0x0 */ + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; + + SOC: tegra20@0 { + serial0: serial@70006000 { + }; + }; +}; + Property changes on: head/sys/dts/arm/tegra20-paz00.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/tegra20.dtsi =================================================================== --- head/sys/dts/arm/tegra20.dtsi (nonexistent) +++ head/sys/dts/arm/tegra20.dtsi (revision 325826) @@ -0,0 +1,74 @@ +/*- + * Copyright (c) 2011 The FreeBSD Foundation + * Copyright (c) 2012 Andrew Turner + * All rights reserved. + * + * Developed by Damjan Marion + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/ { + compatible = "compal,paz00", "nvidia,tegra20"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&GIC>; + + SOC: tegra20@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + bus-frequency = <0>; + + GIC: interrupt-controller@50041000 { + compatible = "arm,gic"; + reg = < 0x50041000 0x1000 >, /* Distributor Registers */ + < 0x50040100 0x0100 >; /* CPU Interface Registers */ + interrupt-controller; + #interrupt-cells = <1>; + }; + + mp_tmr@50040200 { + compatible = "arm,mpcore-timers"; + clock-frequency = < 50040200 >; + #address-cells = <1>; + #size-cells = <0>; + reg = < 0x50040200 0x100 >, /* Global Timer Registers */ + < 0x50040600 0x100 >; /* Private Timer Registers */ + interrupts = < 27 29 >; + interrupt-parent = <&GIC>; + }; + + serial@70006000 { + compatible = "ns16550"; + reg = <0x70006000 0x40>; + reg-shift = <2>; + interrupts = < 68 >; + interrupt-parent = <&GIC>; + clock-frequency = < 215654400 >; + }; + }; +}; + Property changes on: head/sys/dts/arm/tegra20.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/trimslice.dts =================================================================== --- head/sys/dts/arm/trimslice.dts (nonexistent) +++ head/sys/dts/arm/trimslice.dts (revision 325826) @@ -0,0 +1,143 @@ +/*- + * Copyright (c) 2011 The FreeBSD Foundation + * All rights reserved. + * + * Developed by Damjan Marion + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "CompuLab TrimSlice"; + compatible = "compulab,trimslice", "nvidia,tegra20"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&GIC>; + + aliases { + serial0 = &serial0; + soc = &SOC; + }; + + memory { + device_type = "memory"; + reg = < 0x00000000 0x40000000 >; /* 1GB RAM at 0x0 */ + }; + + + SOC: tegra20@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + bus-frequency = <0>; + + GIC: interrupt-controller@50041000 { + compatible = "arm,gic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = < 0x50041000 0x1000 >, /* Distributor Registers */ + < 0x50040100 0x0100 >; /* CPU Interface Registers */ + }; + mp_tmr@50040200 { + compatible = "arm,mpcore-timers"; + clock-frequency = < 50040200 >; + #address-cells = <1>; + #size-cells = <0>; + reg = < 0x50040200 0x100 >, /* Global Timer Registers */ + < 0x50040600 0x100 >; /* Private Timer Registers */ + interrupts = < 27 29 >; + interrupt-parent = < &GIC >; + }; + + tmr1@60005000 { + compatible = "nvidia,tegra2-timer"; + reg = <0x60005000 0x8>; + interrupts = < 32 >; + interrupt-parent = <&GIC>; + }; + + tmr2@60005008 { + compatible = "nvidia,tegra2-timer"; + reg = <0x60005008 0x8>; + interrupts = < 33 >; + interrupt-parent = <&GIC>; + }; + + tmrus@60005010 { + compatible = "nvidia,tegra2-timestamp"; + reg = <0x60005010 0x8>; + }; + + tmr3@60005050 { + compatible = "nvidia,tegra2-timer"; + reg = <0x60005050 0x8>; + interrupts = < 73 >; + interrupt-parent = <&GIC>; + }; + + tmr4@60005058 { + compatible = "nvidia,tegra2-timer"; + reg = <0x60005058 0x8>; + interrupts = < 74 >; + interrupt-parent = <&GIC>; + }; + + serial0: serial@70006000 { + compatible = "ns16550"; + reg = <0x70006000 0x40>; + reg-shift = <2>; + interrupts = < 68 >; + interrupt-parent = <&GIC>; + clock-frequency = < 215654400 >; + }; + + serial1: serial@70006040 { + compatible = "ns16550"; + reg = <0x70006040 0x40>; + reg-shift = <2>; + interrupts = < 69 >; + interrupt-parent = <&GIC>; + clock-frequency = < 215654400 >; + }; + + serial2: serial@70006200 { + compatible = "ns16550"; + reg = <0x70006200 0x100>; + reg-shift = <2>; + interrupts = < 78 >; + interrupt-parent = <&GIC>; + clock-frequency = < 215654400 >; + }; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; +}; Property changes on: head/sys/dts/arm/trimslice.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/ts7800.dts =================================================================== --- head/sys/dts/arm/ts7800.dts (nonexistent) +++ head/sys/dts/arm/ts7800.dts (revision 325826) @@ -0,0 +1,161 @@ +/* + * Copyright (c) 2010 The FreeBSD Foundation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Technologic Systems TS-7800 Device Tree Source. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "mrvl,TS-7800"; + compatible = "DB-88F5182-BP", "DB-88F5182-BP-A"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &mge0; + serial0 = &serial0; + serial1 = &serial1; + mpp = &MPP; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,88FR531"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x08000000>; // 128M at 0x0 + }; + + localbus@f1000000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "mrvl,lbc"; + + /* This reflects CPU decode windows setup. */ + ranges = <0x0 0x0f 0xf9300000 0x00100000 + 0x1 0x1e 0xfa000000 0x00100000 + 0x2 0x1d 0xfa100000 0x02000000>; + }; + + soc88f5182@f1000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xf1000000 0x00100000>; + bus-frequency = <0>; + + PIC: pic@20200 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x20200 0x3c>; + compatible = "mrvl,pic"; + }; + + timer@20300 { + compatible = "mrvl,timer"; + reg = <0x20300 0x30>; + interrupts = <0>; + interrupt-parent = <&PIC>; + mrvl,has-wdt; + }; + + MPP: mpp@10000 { + #pin-cells = <2>; + compatible = "mrvl,mpp"; + reg = <0x10000 0x54>; + pin-count = <20>; + pin-map = < + 16 0 /* MPP[16]: UA1_RXD */ + 17 0 /* MPP[17]: UA1_TXD */ + 19 0 >; /* MPP[19]: UA1_RTS */ + }; + + mge0: ethernet@72000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V1"; + compatible = "mrvl,ge"; + reg = <0x72000 0x2000>; + ranges = <0x0 0x72000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <18 19 20 21 22>; + interrupt-parent = <&PIC>; + + phy-handle = <&phy0>; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,mdio"; + + phy0: ethernet-phy@0 { + reg = <0x0>; + }; + }; + }; + + serial0: serial@12000 { + compatible = "ns16550"; + reg = <0x12000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <3>; + interrupt-parent = <&PIC>; + }; + + serial1: serial@12100 { + compatible = "ns16550"; + reg = <0x12100 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <4>; + interrupt-parent = <&PIC>; + }; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; +}; Property changes on: head/sys/dts/arm/ts7800.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/ufw.dts =================================================================== --- head/sys/dts/arm/ufw.dts (nonexistent) +++ head/sys/dts/arm/ufw.dts (revision 325826) @@ -0,0 +1,319 @@ +/*- + * Copyright (c) 2016, 2017 Rubicon Communications, LLC (Netgate) + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +#include "am33xx.dtsi" + +/ { + model = "AM335x uFW"; + compatible = "ti,am335x-ufw", "ti,am335x-ubmc", "ti,am33xx"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + + vmmcsd_fixed: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vmmcsd_fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&am33xx_pinmux { + pinctrl-names = "default"; + pinctrl-0 = <&clkout2_pin>; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; + }; + + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_ctsn.i2c1_sda */ + AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_rtsn.i2c1_scl */ + >; + }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; + }; + + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ + >; + }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii_1_txen */ + AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxdv.rgmii_1_rxdv */ + AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii_1_txd3 */ + AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii_1_txd2 */ + AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii_1_txd1 */ + AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii_1_txd0 */ + AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii_1_txclk */ + AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxclk.rgmii_1_rxclk */ + AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd3.rgmii_1_rxd3 */ + AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd2.rgmii_1_rxd2 */ + AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd1.rgmii_1_rxd1 */ + AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd0.rgmii_1_rxd0 */ + + /* Slave 2 */ + AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a0.rgmii_2_txen */ + AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a1.rgmii_2_rxdv */ + AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a2.rgmii_2_txd3 */ + AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a3.rgmii_2_txd2 */ + AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a4.rgmii_2_txd1 */ + AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a5.rgmii_2_txd0 */ + AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a6.rgmii_2_txclk */ + AM33XX_IOPAD(0x85c, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a7.rgmii_2_rxclk */ + AM33XX_IOPAD(0x860, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a8.rgmii_2_rxd3 */ + AM33XX_IOPAD(0x864, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a9.rgmii_2_rxd2 */ + AM33XX_IOPAD(0x868, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a10.rgmii_2_rxd1 */ + AM33XX_IOPAD(0x86c, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a11.rgmii_2_rxd0 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) + + /* Slave 2 reset value */ + AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) + AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + mmc1_pins: pinmux_mmc1_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ + AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ + AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ + AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ + AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */ + AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ + AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE5) /* spi0_cs1.mmc0_cd */ + >; + }; + + emmc_pins: pinmux_emmc_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE4) /* mcasp0_fsx.mmc1_cd */ + AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ + AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ + AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ + AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ + AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ + AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ + AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ + AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ + AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ + AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ + >; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + + status = "okay"; +}; + +&usb { + status = "okay"; +}; + +&usb_ctrl_mod { + status = "okay"; +}; + +&usb0_phy { + status = "okay"; +}; + +&usb1_phy { + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; +}; + +&usb1 { + status = "okay"; + dr_mode = "host"; +}; + +&cppi41dma { + status = "okay"; +}; + +&cpsw_emac0 { + phy_id = <&davinci_mdio>, <1>; + phy-mode = "rgmii"; + dual_emac_res_vlan = <4071>; +}; + +&cpsw_emac1 { + phy_id = <&davinci_mdio>, <2>; + phy-mode = "rgmii"; + dual_emac_res_vlan = <4072>; +}; + +&mac { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cpsw_default>; + pinctrl-1 = <&cpsw_sleep>; + active_slave = <1>; + status = "okay"; + dual_emac; + txen-skew-ps = <0>; + rxdv-skew-ps = <1400>; + rxd0-skew-ps = <1400>; + rxd1-skew-ps = <1400>; + rxd2-skew-ps = <1400>; + rxd3-skew-ps = <1400>; + txd0-skew-ps = <0>; + txd1-skew-ps = <0>; + txd2-skew-ps = <0>; + txd3-skew-ps = <0>; + rxc-skew-ps = <4400>; + txc-skew-ps = <6200>; +}; + +&davinci_mdio { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&davinci_mdio_default>; + pinctrl-1 = <&davinci_mdio_sleep>; + status = "okay"; +}; + +&aes { + status = "okay"; +}; + +&sham { + status = "okay"; +}; + +&mmc1 { + vmmc-supply = <&vmmcsd_fixed>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + bus-width = <4>; + non-removable; + wp-disable; + status = "okay"; +}; + +&mmc2 { + vmmc-supply = <&vmmcsd_fixed>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_pins>; + bus-width = <8>; + ti,dual-volt; + non-removable; + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + + status = "okay"; + clock-frequency = <400000>; + + baseboard_eeprom: baseboard_eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + + #address-cells = <1>; + #size-cells = <1>; + baseboard_data: baseboard_data@0 { + reg = <0 0x100>; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + + status = "okay"; +}; Property changes on: head/sys/dts/arm/ufw.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/versatilepb.dts =================================================================== --- head/sys/dts/arm/versatilepb.dts (nonexistent) +++ head/sys/dts/arm/versatilepb.dts (revision 325826) @@ -0,0 +1,118 @@ +/* + * $FreeBSD$ + */ +/dts-v1/; + +/ { + model = "ARM Versatile PB"; + #address-cells = <1>; + #size-cells = <1>; + compatible = "arm,versatile-pb"; + + amba { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + intc: interrupt-controller { + compatible = "arm,versatile-vic"; + reg = <0x10140000 0x1000>; + + interrupt-controller; + #interrupt-cells = <1>; + }; + + sic: secondary-interrupt-controller { + compatible = "arm,versatile-sic"; + reg = <0x10003000 0x28>; + + interrupt-controller; + #interrupt-cells = <1>; + }; + + uart0: uart0 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x101f1000 0x1000>; + interrupts = <12>; + interrupt-parent = <&intc>; + clock-frequency = <3000000>; + reg-shift = <2>; + }; + + uart1: uart1 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x101f2000 0x1000>; + interrupts = <13>; + interrupt-parent = <&intc>; + clock-frequency = <3000000>; + reg-shift = <2>; + }; + + uart2: uart2 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x101f3000 0x1000>; + interrupts = <14>; + interrupt-parent = <&intc>; + clock-frequency = <3000000>; + reg-shift = <2>; + }; + + timer0 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x101e2000 0x40>; + interrupts = <4>; + interrupt-parent = <&intc>; + }; + + pci0 { + + compatible = "versatile,pci"; + reg = <0x10000044 0x4 + 0x10001000 0x1000 + 0x41000000 0x01000000 + 0x42000000 0x02000000>; + }; + + net { + compatible = "smsc,lan91c111"; + reg = <0x10010000 0x10000>; + interrupts = <25>; + interrupt-parent = <&intc>; + }; + + display { + compatible = "arm,pl110", "arm,primecell"; + reg = <0x10000050 4 + 0x10120000 0x1000>; + interrupts = <16>; + interrupt-parent = <&intc>; + }; + + /* + * Cut corner here: we do not have proper interrupt + * controllers cascading so just hardwire SIC IRQ 3 + * to VIC IRQ31 + */ + kmi { + compatible = "arm,pl050", "arm,primecell"; + reg = <0x10006000 0x1000>; + interrupt-parent = <&intc>; + interrupts = <31>; + }; + }; + + memory { + device_type = "memory"; + reg = <0 0x08000000>; /* 128MB */ + }; + + aliases { + uart0 = &uart0; + }; + + chosen { + stdin = "uart0"; + stdout = "uart0"; + }; +}; Property changes on: head/sys/dts/arm/versatilepb.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/vsatv102-m6.dts =================================================================== --- head/sys/dts/arm/vsatv102-m6.dts (nonexistent) +++ head/sys/dts/arm/vsatv102-m6.dts (revision 325826) @@ -0,0 +1,309 @@ +/*- + * Copyright (c) 2013-2015 John Wehle + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/* + * The ordering of certain devices is significant (e.g. usb depends on + * usb-phy which depends on gpio, also the timer should appear early on + * to provide a reasonably accurate DELAY implementation). + * + * Both usb-phys devices must be configured to prevent the usb controller + * from hanging during initialization. + */ + +/dts-v1/; + +/memreserve/ 0x84900000 0x00600000; /* 6MB frame buffer */ + +#include "meson6.dtsi" + +/ { + /* + * My development unit visually appears to be a Visson ATV-102 + * and the specs for both my unit and the Visson ATV-102 say + * the SoC is an aml8726-m3. However the uboot prompt says + * m6_mbx_v1, the RTC is located on SECBUS2 instead of AOBUS, + * and there are two cores so it seems my unit is a newer + * version using the later processor. + */ + + model = "visson,atv-102"; + compatible = "visson,atv-102", "amlogic,meson6"; + + #address-cells = <1>; + #size-cells = <1>; + + aliases { + soc = &soc; + screen = &screen; + uart0 = &uart_AO; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; /* 1GB RAM */ + }; + + soc: soc { + device_type = "soc"; + bus-frequency = <0>; + + pic: pic@c1109a40 { + device_type = "interrupt-controller"; + compatible = "amlogic,aml8726-pic"; + reg = <0xc1109a40 128>; /* cbus 0x2690 */ + + interrupt-controller; + #interrupt-cells = <3>; + }; + + scu: scu@c4300000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xc4300000 0x1000>; + }; + + cpuconfig: cpuconfig@d901ff80 { + compatible = "amlogic,aml8726-cpuconfig"; + reg = <0xd901ff80 8>; + }; + + ccm@c1104140 { + compatible = "amlogic,aml8726-ccm"; + reg = <0xc1104140 20>; /* cbus 0x1050 */ + + functions = "ethernet", "i2c", "rng", "sdio", + "uart-a", "uart-b", "uart-c", + "usb-a", "usb-b"; + }; + + pinctrl: pinctrl@c11080b0 { + compatible = "amlogic,aml8726-pinctrl"; + reg = <0xc11080b0 40>, /* mux */ + <0xc11080e8 24>, /* pu/pd */ + <0xc11080e8 24>, /* pull enable */ + <0xc8100014 4>, /* ao mux */ + <0xc810002c 4>, /* ao pu/pd */ + <0xc810002c 4>; /* ao pull enable */ + + /* + * Currently only pin muxing that deviates + * from the power on default of gpio is + * specified here. + */ + + pinctrl-names = "default"; + pinctrl-0 = <&pins_uartao &pins_ethernet &pins_hdmi>; + + pins_ethernet: ethernet { + amlogic,pins = "ref_clk_in", + "tx_clk", "tx_en", + "tx_d0", "tx_d1", + "tx_d2", "tx_d3", + "rx_clk", "rx_dv", + "rx_d0", "rx_d1", + "rx_d2", "rx_d3", + "mdc", "mdio"; + amlogic,function = "ethernet"; + }; + + pins_hdmi: hdmi { + amlogic,pins = "cec", "hpd", + "scl", "sda"; + amlogic,function = "hdmi"; + }; + + pins_sdio_b: sdio_b { + amlogic,pins = "clk", "cmd", + "d0", "d1", + "d2", "d3"; + amlogic,function = "sdio-b"; + }; + + pins_uartao: uartao { + amlogic,pins = "tx", "rx"; + amlogic,function = "uart-ao"; + }; + }; + + rtc@da004340 { + compatible = "amlogic,aml8726-rtc"; + reg = <0xda004340 20>; /* secbus2 0xd0 */ + interrupts = <0 72 1>; /* AM_IRQ2(8) */ + }; + + clkmsr: clkmsr@c1108758 { + compatible = "amlogic,aml8726-clkmsr"; + reg = <0xc1108758 16>; /* cbus 0x21d6 */ + + clocks = <&clk81>; + }; + + gpioao: gpio@c8100024 { + /* gpio unit 7 */ + compatible = "amlogic,aml8726-gpio"; + reg = <0xc8100024 4>, /* oen aobus 0x9 */ + <0xc8100024 4>, /* out */ + <0xc8100028 4>; /* in */ + + gpio-controller; + #gpio-cells = <1>; + pin-count = <12>; + }; + + gpio5: gpio@c110806c { + compatible = "amlogic,aml8726-gpio"; + reg = <0xc110806c 4>, /* oen cbus 0x201b */ + <0xc1108070 4>, /* out */ + <0xc1108074 4>; /* in */ + + gpio-controller; + #gpio-cells = <1>; + pin-count = <32>; + }; + + gpio6: gpio@c1108020 { + compatible = "amlogic,aml8726-gpio"; + reg = <0xc1108020 4>, /* oen cbus 0x2008 */ + <0xc1108024 4>, /* out */ + <0xc1108028 4>; /* in */ + + gpio-controller; + #gpio-cells = <1>; + pin-count = <29>; + }; + + mmc@c1108c20 { + compatible = "amlogic,aml8726-mmc"; + reg = <0xc1108c20 32>; /* cbus 0x2308 */ + interrupts = <0 28 1>; /* AM_IRQ0(28) */ + + clocks = <&clk81>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_sdio_b>; + + mmc-voltages = "3.3"; + + mmc-pwr-en = <&gpio5 31 0>; /* card_8 */ + ins-detect = <&gpio5 29 0>; /* card_6 */ + }; + + rng@c1108100 { + compatible = "amlogic,aml8726-rng"; + reg = <0xc1108100 8>; /* cbus 0x2040 */ + }; + + usb-phy@c1108400 { + /* usb-a phy */ + compatible = "amlogic,aml8726-m6-usb-phy"; + reg = <0xc1108400 32>; /* cbus 0x2100 */ + }; + + usb-phy@c1108420 { + /* usb-b phy */ + compatible = "amlogic,aml8726-m6-usb-phy"; + reg = <0xc1108420 32>; /* cbus 0x2108 */ + + usb-pwr-en = <&gpioao 3 1>, /* gpioao_3 vbus */ + <&gpio6 11 0>; /* gpioe_11 wifi */ + }; + + usb@c9040000 { + /* usb-a */ + compatible = "synopsys,designware-hs-otg2"; + reg = <0xc9040000 0x40000>; /* ahbbus 0x40000*/ + interrupts = <0 30 4>; /* AM_IRQ0(30) */ + #address-cells = <1>; + #size-cells = <0>; + }; + + usb@c90c0000 { + /* usb-b */ + compatible = "synopsys,designware-hs-otg2"; + reg = <0xc90c0000 0x40000>; /* ahbbus 0xc0000 */ + interrupts = <0 31 4>; /* AM_IRQ0(31) */ + #address-cells = <1>; + #size-cells = <0>; + + dr_mode = "host"; + }; + + eth@c9410000 { + /* ethernet */ + compatible = "snps,dwmac"; + reg = <0xc9410000 0x2000>; /* ahbbus 0x410000 */ + interrupts = <0 8 1>; /* AM_IRQ0(8) */ + #address-cells = <1>; + #size-cells = <0>; + + eth-phy-rst = <&gpio5 15 0>; /* gpioy_15 phy-rst */ + }; + + screen: fb@c8006324 { + device_type = "display"; + compatible = "amlogic,aml8726-fb"; + reg = <0xc8006324 12>, /* CANVAS */ + <0xc1106800 1024>, /* VIU */ + <0xc1107400 1024>; /* VPP */ + interrupts = <0 2 1>, /* AM_IRQ0(2) */ + <0 3 1>, /* AM_IRQ0(3) */ + <0 12 1>, /* AM_IRQ0(12) */ + <0 13 1>; /* AM_IRQ0(13) */ + + address = <0x84900000>; /* match memreserve */ + width = <720>; + height = <480>; + depth = <24>; + linebytes = <2160>; + }; + }; + + leds { + compatible = "gpio-leds"; + + sys_led { + gpios = <&gpioao 2>; /* gpioao_2 sys_led */ + label = "sys_led"; + + default-state = "on"; + }; + }; + + chosen { + stdin = "uart0"; + stdout = "uart0"; + }; +}; + +&clk81 { + clock-frequency = <0>; +}; + +&uart_AO { + status = "okay"; + current-speed = <115200>; +}; Property changes on: head/sys/dts/arm/vsatv102-m6.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/vybrid-colibri-vf50.dts =================================================================== --- head/sys/dts/arm/vybrid-colibri-vf50.dts (nonexistent) +++ head/sys/dts/arm/vybrid-colibri-vf50.dts (revision 325826) @@ -0,0 +1,82 @@ +/*- + * Copyright (c) 2014 Ruslan Bukin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/include/ "vybrid.dtsi" + +/ { + model = "Toradex Colibri VF50"; + + memory { + device_type = "memory"; + reg = < 0x80000000 0x08000000 >; /* 128MB RAM */ + }; + + SOC: vybrid { + serial0: serial@40027000 { + status = "okay"; + }; + + fec1: ethernet@400D1000 { + status = "okay"; + iomux_config = < 54 0x103192 + 55 0x103193 + 56 0x103191 + 57 0x103191 + 58 0x103191 + 59 0x103191 + 60 0x103192 + 61 0x103192 + 62 0x103192 + 0 0x103191 >; + }; + + sai3: sai@40032000 { + status = "okay"; + }; + + i2c0: i2c@40066000 { + status = "okay"; + }; + + adc0: adc@4003B000 { + status = "okay"; + }; + + edma1: edma@40098000 { + status = "okay"; + }; + }; + + chosen { + bootargs = "-v"; + stdin = "serial0"; + stdout = "serial0"; + }; +}; Property changes on: head/sys/dts/arm/vybrid-colibri-vf50.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/vybrid-cosmic.dts =================================================================== --- head/sys/dts/arm/vybrid-cosmic.dts (nonexistent) +++ head/sys/dts/arm/vybrid-cosmic.dts (revision 325826) @@ -0,0 +1,86 @@ +/*- + * Copyright (c) 2013-2014 Ruslan Bukin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/include/ "vybrid.dtsi" + +/ { + model = "Cosmic Board"; + + memory { + device_type = "memory"; + reg = < 0x80000000 0x10000000 >; /* 256MB RAM */ + }; + + SOC: vybrid { + serial1: serial@40028000 { + status = "okay"; + }; + + fec1: ethernet@400D1000 { + status = "okay"; + iomux_config = < 54 0x103192 + 55 0x103193 + 56 0x103191 + 57 0x103191 + 58 0x103191 + 59 0x103191 + 60 0x103192 + 61 0x103192 + 62 0x103192 + 0 0x203191 >; + }; + + esai: esai@40062000 { + status = "okay"; + }; + + edma1: edma@40098000 { + status = "okay"; + }; + + tcon0: tcon@4003D000 { + status = "okay"; + }; + + dcu0: dcu4@40058000 { + status = "okay"; + }; + + adc0: adc@4003B000 { + status = "okay"; + }; + }; + + chosen { + bootargs = "-v"; + stdin = "serial1"; + stdout = "serial1"; + }; +}; Property changes on: head/sys/dts/arm/vybrid-cosmic.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/vybrid-quartz.dts =================================================================== --- head/sys/dts/arm/vybrid-quartz.dts (nonexistent) +++ head/sys/dts/arm/vybrid-quartz.dts (revision 325826) @@ -0,0 +1,115 @@ +/*- + * Copyright (c) 2014 Ruslan Bukin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/include/ "vybrid.dtsi" + +/ { + model = "Device Solutions Quartz Module"; + + memory { + device_type = "memory"; + reg = < 0x80000000 0x10000000 >; /* 256MB RAM */ + }; + + SOC: vybrid { + serial0: serial@40027000 { + status = "okay"; + }; + + fec1: ethernet@400D1000 { + status = "okay"; + iomux_config = < 54 0x103192 + 55 0x103193 + 56 0x103191 + 57 0x103191 + 58 0x103191 + 59 0x103191 + 60 0x103192 + 61 0x103192 + 62 0x103192 + 0 0x203191 >; + }; + + edma1: edma@40098000 { + status = "okay"; + }; + + dcu0: dcu4@40058000 { + status = "okay"; + + panel-size = < 800 480 >; + panel-hsync = < 40 48 40 >; + panel-vsync = < 29 3 13 >; + panel-clk-div = < 17 >; + panel-backlight-pin = < 25 >; + + iomux_config = < 105 0x1001c4 /* hsync */ + 106 0x1001c4 /* vsync */ + 107 0x1001e0 /* pclk */ + 108 0x1001e0 + 109 0x1001be /* de */ + 110 0x1001e0 /* r0 */ + 111 0x1001e0 + 112 0x1001e0 + 113 0x1001e0 + 114 0x1001e0 + 115 0x1001e0 + 116 0x1001e0 + 117 0x1001e0 + 118 0x1001e0 /* g0 */ + 119 0x1001e0 + 120 0x1001e0 + 121 0x1001e0 + 122 0x1001e0 + 123 0x1001e0 + 124 0x1001e0 + 125 0x1001e0 + 126 0x1001e0 /* b0 */ + 127 0x1001e0 + 128 0x1001e0 + 129 0x1001e0 + 130 0x1001e0 + 131 0x1001e0 + 132 0x1001e0 + 133 0x1001e0 + 25 0x0001be >; /* led */ + }; + + tcon0: tcon@4003D000 { + status = "okay"; + }; + }; + + chosen { + bootargs = "-v"; + stdin = "serial0"; + stdout = "serial0"; + }; +}; Property changes on: head/sys/dts/arm/vybrid-quartz.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/vybrid.dtsi =================================================================== --- head/sys/dts/arm/vybrid.dtsi (nonexistent) +++ head/sys/dts/arm/vybrid.dtsi (revision 325826) @@ -0,0 +1,497 @@ +/*- + * Copyright (c) 2013-2014 Ruslan Bukin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/ { + model = "Freescale Vybrid Family"; + compatible = "freescale,vybrid", "fsl,mvf"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&GIC>; + + aliases { + soc = &SOC; + serial0 = &serial0; + serial1 = &serial1; + sai0 = &sai0; + sai1 = &sai1; + sai2 = &sai2; + sai3 = &sai3; + esai = &esai; + adc0 = &adc0; + adc1 = &adc1; + edma0 = &edma0; + edma1 = &edma1; + src = &SRC; + }; + + SOC: vybrid { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + bus-frequency = <0>; + + SRC: src@4006E000 { + compatible = "fsl,mvf600-src"; + reg = <0x4006E000 0x100>; + }; + + mscm@40001000 { + compatible = "fsl,mvf600-mscm"; + reg = <0x40001000 0x1000>; + }; + + GIC: interrupt-controller@01c81000 { + compatible = "arm,gic"; + reg = <0x40003000 0x1000>, /* Distributor Registers */ + <0x40002100 0x100>; /* CPU Interface Registers */ + interrupt-controller; + #interrupt-cells = <1>; + }; + + anadig@40050000 { + compatible = "fsl,mvf600-anadig"; + reg = <0x40050000 0x300>; + }; + + ccm@4006b000 { + compatible = "fsl,mvf600-ccm"; + reg = <0x4006b000 0x1000>; + clock_names = "pll4"; + }; + + mp_tmr@40002100 { + compatible = "arm,mpcore-timers"; + clock-frequency = <133000000>; + #address-cells = <1>; + #size-cells = <0>; + reg = < 0x40002200 0x100 >, /* Global Timer Registers */ + < 0x40002600 0x100 >; /* Private Timer Registers */ + interrupts = < 27 29 >; + interrupt-parent = < &GIC >; + }; + + dmamux@40024000 { + compatible = "fsl,mvf600-dmamux"; + reg = <0x40024000 0x100>, + <0x40025000 0x100>, + <0x400A1000 0x100>, + <0x400A2000 0x100>; + }; + + edma0: edma@40018000 { + compatible = "fsl,mvf600-edma"; + reg = <0x40018000 0x1000>, + <0x40019000 0x1000>; /* TCD */ + interrupts = < 40 41 >; + interrupt-parent = <&GIC>; + device-id = < 0 >; + status = "disabled"; + }; + + edma1: edma@40098000 { + compatible = "fsl,mvf600-edma"; + reg = <0x40098000 0x1000>, + <0x40099000 0x1000>; /* TCD */ + interrupts = < 42 43 >; + interrupt-parent = <&GIC>; + device-id = < 1 >; + status = "disabled"; + }; + + pit@40037000 { + compatible = "fsl,mvf600-pit"; + reg = <0x40037000 0x1000>; + interrupts = < 71 >; + interrupt-parent = <&GIC>; + clock-frequency = < 24000000 >; + }; + + lptmr@40040000 { + compatible = "fsl,mvf600-lptmr"; + reg = <0x40040000 0x1000>; + interrupts = < 72 >; + interrupt-parent = <&GIC>; + clock-frequency = < 24000000 >; + }; + + iomuxc@40048000 { + compatible = "fsl,mvf600-iomuxc"; + reg = <0x40048000 0x1000>; + }; + + port@40049000 { + compatible = "fsl,mvf600-port"; + reg = <0x40049000 0x5000>; + interrupts = < 139 140 141 142 143 >; + interrupt-parent = <&GIC>; + }; + + gpio@400FF000 { + compatible = "fsl,mvf600-gpio"; + reg = <0x400FF000 0x200>; + #gpio-cells = <3>; + gpio-controller; + }; + + nand@400E0000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mvf600-nand"; + reg = <0x400E0000 0x10000>; + interrupts = < 115 >; + interrupt-parent = <&GIC>; + clock_names = "nand"; + status = "disabled"; + + partition@40000 { + reg = <0x40000 0x200000>; /* 2MB */ + label = "u-boot"; + read-only; + }; + + partition@240000 { + reg = <0x240000 0x200000>; /* 2MB */ + label = "test"; + }; + + partition@440000 { + reg = <0x440000 0xa00000>; /* 10MB */ + label = "kernel"; + }; + + partition@e40000 { + reg = <0xe40000 0x1e000000>; /* 480MB */ + label = "root"; + }; + }; + + sdhci0: sdhci@400B1000 { + compatible = "fsl,mvf600-sdhci"; + reg = <0x400B1000 0x1000>; + interrupts = < 59 >; + interrupt-parent = <&GIC>; + clock-frequency = <50000000>; + status = "disabled"; + clock_names = "esdhc0"; + }; + + sdhci1: sdhci@400B2000 { + compatible = "fsl,mvf600-sdhci"; + reg = <0x400B2000 0x1000>; + interrupts = < 60 >; + interrupt-parent = <&GIC>; + clock-frequency = <50000000>; + status = "disabled"; + clock_names = "esdhc1"; + iomux_config = < 14 0x500060 + 15 0x500060 + 16 0x500060 + 17 0x500060 + 18 0x500060 + 19 0x500060 >; + }; + + serial0: serial@40027000 { + compatible = "fsl,mvf600-uart"; + reg = <0x40027000 0x1000>; + interrupts = <93>; + interrupt-parent = <&GIC>; + current-speed = <115200>; + clock-frequency = < 24000000 >; + status = "disabled"; + }; + + serial1: serial@40028000 { + compatible = "fsl,mvf600-uart"; + reg = <0x40028000 0x1000>; + interrupts = <94>; + interrupt-parent = <&GIC>; + current-speed = <115200>; + clock-frequency = < 24000000 >; + status = "disabled"; + }; + + usb@40034000 { + compatible = "fsl,mvf600-usb-ehci", "usb-ehci"; + reg = < 0x40034000 0x1000 >, /* ehci */ + < 0x40035000 0x1000 >, /* usbc */ + < 0x40050800 0x100 >; /* phy */ + interrupts = < 107 >; + interrupt-parent = <&GIC>; + iomux_config = < 134 0x0001be + 7 0x200060 >; + }; + + usb@400b4000 { + compatible = "fsl,mvf600-usb-ehci", "usb-ehci"; + reg = < 0x400b4000 0x1000 >, /* ehci */ + < 0x400b5000 0x1000 >, /* usbc */ + < 0x40050C00 0x100 >; /* phy */ + interrupts = < 108 >; + interrupt-parent = <&GIC>; + iomux_config = < 134 0x0001be + 7 0x200060 >; + }; + + fec0: ethernet@400D0000 { + compatible = "fsl,mvf600-fec"; + reg = <0x400D0000 0x1000>; + interrupts = < 110 >; + interrupt-parent = <&GIC>; + phy-mode = "rmii"; + phy-disable-preamble; + status = "disabled"; + clock_names = "enet"; + iomux_config = < 45 0x100061 + 46 0x100061 + 47 0x100061 + 48 0x100060 + 49 0x100060 + 50 0x100060 + 51 0x100060 + 52 0x100060 + 53 0x100060 >; + }; + + fec1: ethernet@400D1000 { + compatible = "fsl,mvf600-fec"; + reg = <0x400D1000 0x1000>; + interrupts = < 111 >; + interrupt-parent = <&GIC>; + phy-mode = "rmii"; + phy-disable-preamble; + status = "disabled"; + clock_names = "enet"; + iomux_config = < 54 0x103192 + 55 0x103193 + 56 0x103191 + 57 0x103191 + 58 0x103191 + 59 0x103191 + 60 0x103192 + 61 0x103192 + 62 0x103192 >; + }; + + sai0: sai@4002F000 { + compatible = "fsl,mvf600-sai"; + reg = <0x4002F000 0x1000>; + interrupts = < 116 >; + interrupt-parent = <&GIC>; + status = "disabled"; + }; + + sai1: sai@40030000 { + compatible = "fsl,mvf600-sai"; + reg = <0x40030000 0x1000>; + interrupts = < 117 >; + interrupt-parent = <&GIC>; + status = "disabled"; + }; + + sai2: sai@40031000 { + compatible = "fsl,mvf600-sai"; + reg = <0x40031000 0x1000>; + interrupts = < 118 >; + interrupt-parent = <&GIC>; + status = "disabled"; + }; + + sai3: sai@40032000 { + compatible = "fsl,mvf600-sai"; + reg = <0x40032000 0x1000>; + interrupts = < 119 >; + interrupt-parent = <&GIC>; + status = "disabled"; + edma-controller = <&edma1>; + edma-src-receive = < 8 >; + edma-src-transmit = < 9 >; + edma-mux-group = < 1 >; + clock_names = "sai3", "cko1"; + iomux_config = < 16 0x200060 + 19 0x200060 + 21 0x200060 + 40 0x400061 >; /* CKO1 */ + }; + + esai: esai@40062000 { + compatible = "fsl,mvf600-esai"; + reg = <0x40062000 0x1000>; + interrupts = < 120 >; + interrupt-parent = <&GIC>; + status = "disabled"; + clock_names = "esai"; + iomux_config = < 45 0x400061 + 46 0x400061 + 47 0x400061 + 48 0x400060 + 49 0x400060 + 50 0x400060 + 51 0x400060 + 52 0x400060 + 78 0x3038df + 40 0x400061 >; + }; + + spi0: spi@4002C000 { + compatible = "fsl,mvf600-spi"; + reg = <0x4002C000 0x1000>; + interrupts = < 99 >; + interrupt-parent = <&GIC>; + status = "disabled"; + iomux_config = < 40 0x100061 + 41 0x100061 + 42 0x100060 + 43 0x100060 + 44 0x100061 >; + }; + + spi1: spi@4002D000 { + compatible = "fsl,mvf600-spi"; + reg = <0x4002D000 0x1000>; + interrupts = < 100 >; + interrupt-parent = <&GIC>; + status = "disabled"; + }; + + spi2: spi@400AC000 { + compatible = "fsl,mvf600-spi"; + reg = <0x400AC000 0x1000>; + interrupts = < 101 >; + interrupt-parent = <&GIC>; + status = "disabled"; + }; + + spi3: spi@400AD000 { + compatible = "fsl,mvf600-spi"; + reg = <0x400AD000 0x1000>; + interrupts = < 102 >; + interrupt-parent = <&GIC>; + status = "disabled"; + }; + + i2c0: i2c@40066000 { + compatible = "fsl,mvf600-i2c"; + reg = <0x40066000 0x1000>; + interrupts = < 103 >; + interrupt-parent = <&GIC>; + status = "disabled"; + clock_names = "ipg"; + iomux_config = < 36 0x2034d3 + 37 0x2034d3 + 207 0x1 + 208 0x1 >; + }; + + i2c1: i2c@40067000 { + compatible = "fsl,mvf600-i2c"; + reg = <0x40067000 0x1000>; + interrupts = < 104 >; + interrupt-parent = <&GIC>; + status = "disabled"; + }; + + i2c2: i2c@400E6000 { + compatible = "fsl,mvf600-i2c"; + reg = <0x400E6000 0x1000>; + interrupts = < 105 >; + interrupt-parent = <&GIC>; + status = "disabled"; + }; + + i2c3: i2c@400E7000 { + compatible = "fsl,mvf600-i2c"; + reg = <0x400E7000 0x1000>; + interrupts = < 106 >; + interrupt-parent = <&GIC>; + status = "disabled"; + }; + + adc0: adc@4003B000 { + compatible = "fsl,mvf600-adc"; + reg = <0x4003B000 0x1000>; + interrupts = < 85 >; + interrupt-parent = <&GIC>; + status = "disabled"; + }; + + adc1: adc@400BB000 { + compatible = "fsl,mvf600-adc"; + reg = <0x400BB000 0x1000>; + interrupts = < 86 >; + interrupt-parent = <&GIC>; + status = "disabled"; + }; + + tcon0: tcon@4003D000 { + compatible = "fsl,mvf600-tcon"; + reg = <0x4003D000 0x1000>; + status = "disabled"; + }; + + dcu0: dcu4@40058000 { + compatible = "fsl,mvf600-dcu4"; + reg = <0x40058000 0x7000>; + interrupts = < 62 >; + interrupt-parent = <&GIC>; + status = "disabled"; + clock_names = "dcu0"; + iomux_config = < 105 0x100044 + 106 0x100044 + 107 0x100060 + 108 0x100060 + 109 0x100060 + 110 0x100060 + 111 0x100060 + 112 0x100060 + 113 0x100060 + 114 0x100060 + 115 0x100060 + 116 0x100060 + 117 0x100060 + 118 0x100060 + 119 0x100060 + 120 0x100060 + 121 0x100060 + 122 0x100060 + 123 0x100060 + 124 0x100060 + 125 0x100060 + 126 0x100060 + 127 0x100060 + 128 0x100060 + 129 0x100060 + 130 0x100060 + 131 0x100060 + 132 0x100060 + 133 0x100060 >; + }; + }; +}; Property changes on: head/sys/dts/arm/vybrid.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/wandboard-dual.dts =================================================================== --- head/sys/dts/arm/wandboard-dual.dts (nonexistent) +++ head/sys/dts/arm/wandboard-dual.dts (revision 325826) @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2013 Ian Lepore + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Wandboard Dual. + * + * $FreeBSD$ + */ + +/dts-v1/; +/include/ "imx6.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + + model = "Wandboard Dual"; + compatible = "wand,imx6d-wandboard", "fsl,imx6d"; + + memory { + reg = <0x10000000 0x40000000>; /* RAM 1GB */ + }; + + SOC: soc@00000000 { + aips@02000000 { /* AIPS1 */ + gpio@0209c000 { status = "okay"; }; + gpio@020a0000 { status = "okay"; }; + gpio@020a4000 { status = "okay"; }; + gpio@020a8000 { status = "okay"; }; + gpio@020ac000 { status = "okay"; }; + gpio@020b0000 { status = "okay"; }; + gpio@020b4000 { status = "okay"; }; + console:serial@02020000 { status = "okay"; }; + serial@021e8000 { status = "disabled"; }; + serial@021ec000 { status = "disabled"; }; + serial@021f0000 { status = "disabled"; }; + serial@021f4000 { status = "disabled"; }; + usbphy@020c9000 { status = "okay"; }; + usbphy@020ca000 { status = "okay"; }; + }; + aips@02100000 { /* AIPS2 */ + ethernet@02188000 { + status = "okay"; + phy-mode = "rgmii"; + phy-disable-preamble; + }; + usb@02184000 { status = "okay"; }; + usb@02184200 { status = "okay"; }; + usb@02184400 { status = "disabled"; }; + usb@02184600 { status = "disabled"; }; + usdhc@02190000 { status = "okay"; }; + usdhc@02194000 { status = "disabled"; }; + usdhc@02198000 { status = "okay"; }; + usdhc@0219c000 { status = "disabled"; }; + }; + }; + + chosen { + stdin = &console; + stdout = &console; + }; +}; Property changes on: head/sys/dts/arm/wandboard-dual.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/wandboard-quad.dts =================================================================== --- head/sys/dts/arm/wandboard-quad.dts (nonexistent) +++ head/sys/dts/arm/wandboard-quad.dts (revision 325826) @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2013 Ian Lepore + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Wandboard Quad. + * + * $FreeBSD$ + */ + +/dts-v1/; +/include/ "imx6.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + + model = "Wandboard Quad"; + compatible = "wand,imx6q-wandboard", "fsl,imx6q"; + + memory { + reg = <0x10000000 0x80000000>; /* RAM 2GB */ + }; + + SOC: soc@00000000 { + aips@02000000 { /* AIPS1 */ + gpio@0209c000 { status = "okay"; }; + gpio@020a0000 { status = "okay"; }; + gpio@020a4000 { status = "okay"; }; + gpio@020a8000 { status = "okay"; }; + gpio@020ac000 { status = "okay"; }; + gpio@020b0000 { status = "okay"; }; + gpio@020b4000 { status = "okay"; }; + console:serial@02020000 { status = "okay"; }; + serial@021e8000 { status = "disabled"; }; + serial@021ec000 { status = "disabled"; }; + serial@021f0000 { status = "disabled"; }; + serial@021f4000 { status = "disabled"; }; + usbphy@020c9000 { status = "okay"; }; + usbphy@020ca000 { status = "okay"; }; + }; + aips@02100000 { /* AIPS2 */ + ethernet@02188000 { + status = "okay"; + phy-mode = "rgmii"; + phy-disable-preamble; + }; + usb@02184000 { status = "okay"; }; + usb@02184200 { status = "okay"; }; + usb@02184400 { status = "disabled"; }; + usb@02184600 { status = "disabled"; }; + usdhc@02190000 { status = "okay"; }; + usdhc@02194000 { status = "disabled"; }; + usdhc@02198000 { status = "okay"; }; + usdhc@0219c000 { status = "disabled"; }; + }; + }; + + chosen { + stdin = &console; + stdout = &console; + }; +}; Property changes on: head/sys/dts/arm/wandboard-quad.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/wandboard-solo.dts =================================================================== --- head/sys/dts/arm/wandboard-solo.dts (nonexistent) +++ head/sys/dts/arm/wandboard-solo.dts (revision 325826) @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2013 Ian Lepore + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Wandboard Solo. + * + * $FreeBSD$ + */ + +/dts-v1/; +/include/ "imx6.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + + model = "Wandboard Solo"; + compatible = "wand,imx6s-wandboard", "fsl,imx6s"; + + memory { + reg = <0x10000000 0x20000000>; /* RAM 512M */ + }; + + SOC: soc@00000000 { + aips@02000000 { /* AIPS1 */ + gpio@0209c000 { status = "okay"; }; + gpio@020a0000 { status = "okay"; }; + gpio@020a4000 { status = "okay"; }; + gpio@020a8000 { status = "okay"; }; + gpio@020ac000 { status = "okay"; }; + gpio@020b0000 { status = "okay"; }; + gpio@020b4000 { status = "okay"; }; + console:serial@02020000 { status = "okay"; }; + serial@021e8000 { status = "disabled"; }; + serial@021ec000 { status = "disabled"; }; + serial@021f0000 { status = "disabled"; }; + serial@021f4000 { status = "disabled"; }; + usbphy@020c9000 { status = "okay"; }; + usbphy@020ca000 { status = "okay"; }; + }; + aips@02100000 { /* AIPS2 */ + ethernet@02188000 { + status = "okay"; + phy-mode = "rgmii"; + phy-disable-preamble; + }; + usb@02184000 { status = "okay"; }; + usb@02184200 { status = "okay"; }; + usb@02184400 { status = "disabled"; }; + usb@02184600 { status = "disabled"; }; + usdhc@02190000 { status = "okay"; }; + usdhc@02194000 { status = "disabled"; }; + usdhc@02198000 { status = "okay"; }; + usdhc@0219c000 { status = "disabled"; }; + }; + }; + + chosen { + stdin = &console; + stdout = &console; + }; +}; Property changes on: head/sys/dts/arm/wandboard-solo.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/wzr2-g300n.dts =================================================================== --- head/sys/dts/arm/wzr2-g300n.dts (nonexistent) +++ head/sys/dts/arm/wzr2-g300n.dts (revision 325826) @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2015 Hiroki Mori + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Buffalo WZR2-G300N Device Tree Source. + * + * $FreeBSD$ + */ + +/dts-v1/; + +#include "rt1310a.dtsi" + +/ { + compatible = "WZR2-G300N", "ralink,rt1310a-soc"; + model = "WZR2-G300N"; + + flash@1f000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x1f000000 0x400000>; // 4M at 0x1f000000 + + partition@0 { + reg = <0x00000000 0x0000e000>; + label = "uboot"; + }; + partition@1 { + reg = <0x0000e000 0x00002000>; + label = "uboot_env"; + }; + partition@2 { + reg = <0x00010000 0x000f0000>; + label = "kernel"; + }; + partition@3 { + reg = <0x00100000 0x002d0000>; + label = "rootfs"; + }; + partition@4 { + reg = <0x003d0000 0x00010000>; + label = "config"; + }; + partition@5 { + reg = <0x00010000 0x003c0000>; + label = "upgrade"; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + status { + label = "status"; + gpios = <&gpio0 4 0>; + }; + }; + + ip17x@0 { + compatible = "icplus,ip17x"; + mii-poll = <0>; + }; + +}; + +&enet0 { + local-mac-address = [ 00 1a f1 01 1f 23 ]; +}; + +&enet1 { + local-mac-address = [ 00 1a f1 01 1f 24 ]; +}; Property changes on: head/sys/dts/arm/wzr2-g300n.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/xpowers-axp209.dtsi =================================================================== --- head/sys/dts/arm/xpowers-axp209.dtsi (nonexistent) +++ head/sys/dts/arm/xpowers-axp209.dtsi (revision 325826) @@ -0,0 +1,33 @@ +/*- + * Copyright (c) 2016 Emmanuel Vadot + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + + +&axp209 { + gpio-controller; + #gpio-cells = <1>; +}; Property changes on: head/sys/dts/arm/xpowers-axp209.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/yyhd18-m3.dts =================================================================== --- head/sys/dts/arm/yyhd18-m3.dts (nonexistent) +++ head/sys/dts/arm/yyhd18-m3.dts (revision 325826) @@ -0,0 +1,237 @@ +/*- + * Copyright (c) 2015 John Wehle + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/* + * The ordering of certain devices is significant (e.g. usb depends on + * usb-phy which depends on gpio, also the timer should appear early on + * to provide a reasonably accurate DELAY implementation). + */ + +/dts-v1/; + +/memreserve/ 0x84900000 0x00600000; /* 6MB frame buffer */ + +#include "meson3.dtsi" + +/ { + /* + * My development unit is a Yiyate Android TV Box containing + * a HD18 motherboard and an aml8726-m3 SoC ... later versions + * shipped with an aml8726-m6. Printenv in uboot shows m3-oplay + * as the boardname supplied as part of mmcargs. + */ + + model = "yiyate,hd18-m3"; + compatible = "yiyate,hd18-m3", "amlogic,meson3"; + + #address-cells = <1>; + #size-cells = <1>; + + aliases { + soc = &soc; + screen = &screen; + uart0 = &uart_AO; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; /* 1GB RAM */ + }; + + soc: soc { + device_type = "soc"; + bus-frequency = <0>; + + ccm@c1104140 { + compatible = "amlogic,aml8726-ccm"; + reg = <0xc1104140 20>; /* cbus 0x1050 */ + + functions = "ethernet", "i2c", "rng", "sdio", + "uart-a", "uart-b", "uart-c", + "usb-a", "usb-b"; + }; + + pinctrl: pinctrl@c11080b0 { + compatible = "amlogic,aml8726-pinctrl"; + reg = <0xc11080b0 40>, /* mux */ + <0xc11080e8 24>, /* pu/pd */ + <0xc11080e8 24>, /* pull enable */ + <0xc8100014 4>, /* ao mux */ + <0xc810002c 4>, /* ao pu/pd */ + <0xc810002c 4>; /* ao pull enable */ + + /* + * Currently only pin muxing that deviates + * from the power on default of gpio is + * specified here. + */ + + pinctrl-names = "default"; + pinctrl-0 = <&pins_uartao &pins_ethernet &pins_hdmi>; + + pins_ethernet: ethernet { + amlogic,pins = "clk_out", "tx_en", + "tx_d0", "tx_d1", + "crs_dv", "rx_err", + "rx_d0", "rx_d1", + "mdc", "mdio"; + amlogic,function = "ethernet"; + }; + + pins_hdmi: hdmi { + amlogic,pins = "cec", "hpd", + "scl", "sda"; + amlogic,function = "hdmi"; + }; + + pins_sdio_b: sdio_b { + amlogic,pins = "clk", "cmd", + "d0", "d1", + "d2", "d3"; + amlogic,function = "sdio-b"; + }; + + pins_uartao: uartao { + amlogic,pins = "tx", "rx"; + amlogic,function = "uart-ao"; + }; + }; + + rtc@c8100740 { + compatible = "amlogic,aml8726-rtc"; + reg = <0xc8100740 20>; /* aobus 0x1d0 */ + interrupts = <0 72 1>; /* AM_IRQ2(8) */ + }; + + clkmsr: clkmsr@c1108758 { + compatible = "amlogic,aml8726-clkmsr"; + reg = <0xc1108758 16>; /* cbus 0x21d6 */ + + clocks = <&clk81>; + }; + + gpio5: gpio@c110806c { + compatible = "amlogic,aml8726-gpio"; + reg = <0xc110806c 4>, /* oen cbus 0x201b */ + <0xc1108070 4>, /* out */ + <0xc1108074 4>; /* in */ + + gpio-controller; + #gpio-cells = <1>; + pin-count = <32>; + }; + + mmc@c1108c20 { + compatible = "amlogic,aml8726-mmc"; + reg = <0xc1108c20 32>; /* cbus 0x2308 */ + interrupts = <0 28 1>; /* AM_IRQ0(28) */ + + clocks = <&clk81>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_sdio_b>; + + mmc-voltages = "3.3"; + + mmc-pwr-en = <&gpio5 31 0>; /* card_8 */ + ins-detect = <&gpio5 29 0>; /* card_6 */ + }; + + rng@c1108100 { + compatible = "amlogic,aml8726-rng"; + reg = <0xc1108100 8>; /* cbus 0x2040 */ + }; + + usb-phy@c1108400 { + /* usb-a and usb-b phy */ + compatible = "amlogic,aml8726-m3-usb-phy"; + reg = <0xc1108400 32>; /* cbus 0x2100 */ + }; + + usb@c9040000 { + /* usb-a */ + compatible = "synopsys,designware-hs-otg2"; + reg = <0xc9040000 0x40000>; /* ahbbus 0x40000*/ + interrupts = <0 30 4>; /* AM_IRQ0(30) */ + #address-cells = <1>; + #size-cells = <0>; + }; + + usb@c90c0000 { + /* usb-b */ + compatible = "synopsys,designware-hs-otg2"; + reg = <0xc90c0000 0x40000>; /* ahbbus 0xc0000 */ + interrupts = <0 31 4>; /* AM_IRQ0(31) */ + #address-cells = <1>; + #size-cells = <0>; + + dr_mode = "host"; + }; + + eth@c9410000 { + /* ethernet */ + compatible = "snps,dwmac"; + reg = <0xc9410000 0x2000>; /* ahbbus 0x410000 */ + interrupts = <0 8 1>; /* AM_IRQ0(8) */ + #address-cells = <1>; + #size-cells = <0>; + }; + + screen: fb@c8001324 { + device_type = "display"; + compatible = "amlogic,aml8726-fb"; + reg = <0xc8001324 12>, /* CANVAS */ + <0xc1106800 1024>, /* VIU */ + <0xc1107400 1024>; /* VPP */ + interrupts = <0 2 1>, /* AM_IRQ0(2) */ + <0 3 1>, /* AM_IRQ0(3) */ + <0 12 1>, /* AM_IRQ0(12) */ + <0 13 1>; /* AM_IRQ0(13) */ + + address = <0x84900000>; /* match memreserve */ + width = <720>; + height = <480>; + depth = <24>; + linebytes = <2160>; + }; + }; + + chosen { + stdin = "uart0"; + stdout = "uart0"; + }; +}; + +&clk81 { + clock-frequency = <0>; +}; + +&uart_AO { + status = "okay"; + current-speed = <115200>; +}; Property changes on: head/sys/dts/arm/yyhd18-m3.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/zedboard.dts =================================================================== --- head/sys/dts/arm/zedboard.dts (nonexistent) +++ head/sys/dts/arm/zedboard.dts (revision 325826) @@ -0,0 +1,71 @@ +/*- + * Copyright (c) 2016 The FreeBSD Foundation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +/dts-v1/; +/include/ "zynq-7000.dtsi" + +/ { + model = "zedboard"; + compatible = "digilent,zedboard", "xlnx,zynq-7000"; + + memory { + // First megabyte isn't accessible by all interconnect masters. + device_type = "memory"; + reg = <0x100000 0x1ff00000>; /* 511MB RAM at 0x100000 */ + }; + + chosen { + stdin = &uart1; + stdout = &uart1; + }; +}; + +&slcr { + clock-frequency = <33333333>; // 33Mhz PS_CLK +}; + +&global_timer { + clock-frequency = <333333333>; // 333Mhz +}; + +&uart1 { + status = "okay"; +}; + +ð0 { + status = "okay"; +}; + +&sdhci0 { + status = "okay"; +}; + +&ehci0 { + status = "okay"; + phy_vbus_ext; +}; + Property changes on: head/sys/dts/arm/zedboard.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/zybo.dts =================================================================== --- head/sys/dts/arm/zybo.dts (nonexistent) +++ head/sys/dts/arm/zybo.dts (revision 325826) @@ -0,0 +1,69 @@ +/*- + * Copyright (c) 2016 The FreeBSD Foundation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +/dts-v1/; +/include/ "zynq-7000.dtsi" + +/ { + model = "zybo"; + compatible = "digilent,zybo", "xlnx,zynq-7000"; + + memory { + // First megabyte isn't accessible by all interconnect masters. + device_type = "memory"; + reg = <0x100000 0x1ff00000>; /* 511MB RAM at 0x100000 */ + }; + + chosen { + stdin = &uart1; + stdout = &uart1; + }; +}; + +&slcr { + clock-frequency = <50000000>; // 50Mhz PS_CLK +}; + +&global_timer { + clock-frequency = <325000000>; // 325Mhz +}; + +&uart1 { + status = "okay"; +}; + +ð0 { + status = "okay"; +}; + +&sdhci0 { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; Property changes on: head/sys/dts/arm/zybo.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm/zynq-7000.dtsi =================================================================== --- head/sys/dts/arm/zynq-7000.dtsi (nonexistent) +++ head/sys/dts/arm/zynq-7000.dtsi (revision 325826) @@ -0,0 +1,229 @@ +/*- + * Copyright (c) 2016 The FreeBSD Foundation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/ { + compatible = "xlnx,zynq-7000"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&GIC>; + + // Reserve first half megabyte because it is not accessible to all + // bus masters. + memreserve = <0x00000000 0x00080000>; + + // Zynq PS System registers. + // + ps7sys@f8000000 { + device_type = "soc"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xf8000000 0xf10000>; + + // SLCR block + slcr: slcr@7000 { + compatible = "xlnx,zy7_slcr"; + reg = <0x0 0x1000>; + }; + + // Interrupt controller + GIC: gic { + compatible = "arm,gic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <3>; + reg = <0xf01000 0x1000>, // distributer registers + <0xf00100 0x0100>; // CPU if registers + }; + + // L2 cache controller + pl310@f02000 { + compatible = "arm,pl310"; + reg = <0xf02000 0x1000>; + interrupts = <0 2 4>; + interrupt-parent = <&GIC>; + }; + + // Device Config + devcfg: devcfg@7000 { + compatible = "xlnx,zy7_devcfg"; + reg = <0x7000 0x1000>; + interrupts = <0 8 4>; + interrupt-parent = <&GIC>; + }; + + // triple timer counters0,1 + ttc0: ttc@1000 { + compatible = "xlnx,ttc"; + reg = <0x1000 0x1000>; + }; + + ttc1: ttc@2000 { + compatible = "xlnx,ttc"; + reg = <0x2000 0x1000>; + }; + + // ARM Cortex A9 TWD Timer + global_timer: timer@f00600 { + compatible = "arm,mpcore-timers"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xf00200 0x100>, // Global Timer Regs + <0xf00600 0x20>; // Private Timer Regs + interrupts = <1 11 1>, <1 13 1>; + interrupt-parent = <&GIC>; + }; + + // system watch-dog timer + swdt@5000 { + device_type = "watchdog"; + compatible = "xlnx,zy7_wdt"; + reg = <0x5000 0x1000>; + interrupts = <0 9 1>; + interrupt-parent = <&GIC>; + }; + + scuwdt@f00620 { + device_type = "watchdog"; + compatible = "arm,mpcore_wdt"; + reg = <0xf00620 0x20>; + interrupts = <1 14 1>; + interrupt-parent = <&GIC>; + reset = <1>; + }; + + }; // pssys@f8000000 + + // Zynq PS I/O Peripheral registers. + // + ps7io@e0000000 { + device_type = "soc"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe0000000 0x300000>; + + // UART controllers + uart0: uart@0000 { + device_type = "serial"; + compatible = "cadence,uart"; + status = "disabled"; + reg = <0x0000 0x1000>; + interrupts = <0 27 4>; + interrupt-parent = <&GIC>; + clock-frequency = <50000000>; + }; + + uart1: uart@1000 { + device_type = "serial"; + compatible = "cadence,uart"; + status = "disabled"; + reg = <0x1000 0x1000>; + interrupts = <0 50 4>; + interrupt-parent = <&GIC>; + clock-frequency = <50000000>; + }; + + // USB controllers + ehci0: ehci@2000 { + compatible = "xlnx,zy7_ehci"; + status = "disabled"; + reg = <0x2000 0x1000>; + interrupts = <0 21 4>; + interrupt-parent = <&GIC>; + }; + + ehci1: ehci@3000 { + compatible = "xlnx,zy7_ehci"; + status = "disabled"; + reg = <0x3000 0x1000>; + interrupts = <0 44 4>; + interrupt-parent = <&GIC>; + }; + + // GPIO controller + gpio: gpio@a000 { + compatible = "xlnx,zy7_gpio"; + reg = <0xa000 0x1000>; + interrupts = <0 20 4>; + interrupt-parent = <&GIC>; + }; + + // Gigabit Ethernet controllers + eth0: eth@b000 { + device_type = "network"; + compatible = "cadence,gem"; + status = "disabled"; + reg = <0xb000 0x1000>; + interrupts = <0 22 4>; + interrupt-parent = <&GIC>; + ref-clock-num = <0>; + }; + + eth1: eth@c000 { + device_type = "network"; + compatible = "cadence,gem"; + status = "disabled"; + reg = <0xc000 0x1000>; + interrupts = <0 45 4>; + interrupt-parent = <&GIC>; + ref-clock-num = <1>; + }; + + // Quad-SPI controller + qspi0: qspi@d000 { + compatible = "xlnx,zy7_qspi"; + status = "disabled"; + reg = <0xd000 0x1000>; + interrupts = <0 19 4>; + interrupt-parent = <&GIC>; + spi-clock = <50000000>; + }; + + // SDIO controllers + sdhci0: sdhci@100000 { + compatible = "xlnx,zy7_sdhci"; + status = "disabled"; + reg = <0x100000 0x1000>; + interrupts = <0 24 4>; + interrupt-parent = <&GIC>; + max-frequency = <50000000>; + }; + + sdhci1: sdhci@101000 { + compatible = "xlnx,zy7_sdhci"; + status = "disabled"; + reg = <0x101000 0x1000>; + interrupts = <0 47 4>; + interrupt-parent = <&GIC>; + max-frequency = <50000000>; + }; + + }; // ps7io@e0000000 +}; + Property changes on: head/sys/dts/arm/zynq-7000.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm64/Makefile =================================================================== --- head/sys/dts/arm64/Makefile (nonexistent) +++ head/sys/dts/arm64/Makefile (revision 325826) @@ -0,0 +1,7 @@ +# $FreeBSD$ + +DTS!=ls *.dts + +all: test-dts + +.include Property changes on: head/sys/dts/arm64/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm64/a64.dtsi =================================================================== --- head/sys/dts/arm64/a64.dtsi (nonexistent) +++ head/sys/dts/arm64/a64.dtsi (revision 325826) @@ -0,0 +1,189 @@ +/*- + * Copyright (c) 2016 Jared McNeill + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/ { + cpus { + cpu@0 { + clocks = <&cpu>; + clock-latency = <2000000>; + operating-points = < + /* kHz uV */ + 1200000 1300000 + 1008000 1200000 + 816000 1100000 + 648000 1040000 + 408000 1040000 + >; + }; + }; + + clocks { + pll_hsic: clk@01c20044 { + #clock-cells = <0>; + compatible = "allwinner,sun50i-a64-pllhsic-clk"; + reg = <0x01c20044 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll_hsic"; + }; + + usb_clk: clk@01c200cc { + #clock-cells = <1>; + #reset-cells = <1>; + compatible = "allwinner,sun8i-a83t-usb-clk"; + reg = <0x01c200cc 0x4>; + clocks = <&osc24M>, <&pll_hsic>; + clock-indices = <8>, <9>, + <10>, <11>, + <16>, <17>; + clock-output-names = "usb_phy0", "usb_phy1", + "usb_hsic_pll", "usb_hsic_12m", + "usb_otg_ohci", "usb_ohci0"; + }; + + ths_clk: clk@01c20074 { + #clock-cells = <0>; + compatible = "allwinner,sun50i-a64-ths-clk"; + reg = <0x01c20074 0x4>; + clocks = <&osc24M>; + clock-output-names = "ths"; + }; + }; + + soc { + watchdog: watchdog@01c20ca0 { + compatible = "allwinner,sun6i-a31-wdt"; + reg = <0x01c20ca0 0x20>; + interrupts = ; + clocks = <&osc24M>; + }; + + nmi_intc: interrupt-controller@01f00c0c { + compatible = "allwinner,sun6i-a31-sc-nmi"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x01f00c0c 0x38>; + interrupts = ; + }; + + r_rsb: i2c@01f03400 { + compatible = "allwinner,sun8i-a23-rsb"; + reg = <0x01f03400 0x400>; + interrupts = ; + clock-frequency = <3000000>; + pinctrl-names = "default"; + pinctrl-0 = <&r_rsb_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + sid: eeprom@01c14000 { + compatible = "allwinner,sun8i-a83t-sid"; + reg = <0x01c14000 0x400>; + }; + + rtp: rtp@01c25000 { + compatible = "allwinner,sun50i-a64-ts"; + reg = <0x01c25000 0x400>; + interrupts = ; + clocks = <&bus_gates 72>, <&ths_clk>; + clock-names = "ahb", "ths"; + resets = <&ahb_rst 136>; + #thermal-sensor-cells = <0>; + }; + + usbphy: phy@01c19400 { + compatible = "allwinner,sun50i-a64-usb-phy"; + reg = <0x01c19400 0x24 0x01c1a800 0x4 0x01c1b800 0x4>; + reg-names = "phy_ctrl", "pmu1", "pmu2"; + clocks = <&usb_clk 8>, + <&usb_clk 9>; + clock-names = "usb0_phy", + "usb1_phy"; + resets = <&usb_clk 0>, + <&usb_clk 1>; + reset-names = "usb0_reset", + "usb1_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + + ohci0: usb@01c1a400 { + compatible = "generic-ohci"; + reg = <0x01c1a400 0x100>; + interrupts = ; + clocks = <&bus_gates 28>, <&usb_clk 16>, <&usb_clk 17>; + resets = <&ahb_rst 28>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci0: usb@01c1a000 { + compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci"; + reg = <0x01c1a000 0x100>; + interrupts = ; + clocks = <&bus_gates 24>; + resets = <&ahb_rst 24>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci1: usb@01c1b400 { + compatible = "generic-ohci"; + reg = <0x01c1b400 0x100>; + interrupts = ; + clocks = <&bus_gates 29>, <&usb_clk 16>, <&usb_clk 17>; + resets = <&ahb_rst 29>; + phys = <&usbphy 2>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci1: usb@01c1b000 { + compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci"; + reg = <0x01c1b000 0x100>; + interrupts = ; + clocks = <&bus_gates 25>; + resets = <&ahb_rst 25>; + phys = <&usbphy 2>; + phy-names = "usb"; + status = "disabled"; + }; + }; +}; + +&pio { + r_rsb_pins: r_rsb { + allwinner,pins = "PL0", "PL1"; + allwinner,function = "s_rsb"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; Property changes on: head/sys/dts/arm64/a64.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm64/pine64_plus.dts =================================================================== --- head/sys/dts/arm64/pine64_plus.dts (nonexistent) +++ head/sys/dts/arm64/pine64_plus.dts (revision 325826) @@ -0,0 +1,101 @@ +/*- + * Copyright (c) 2016 Jared McNeill + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include "sun50i-a64-pine64-plus.dts" +#include "a64.dtsi" + +#include + +/ { + cpus { + cpu@0 { + cpu-supply = <®_dcdc2>; + }; + }; +}; + +&pio { + emac_phy_reset_pin_pine64_plus: emac_phy_reset_pin@0 { + allwinner,pins = "PD14"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>, <&emac_phy_reset_pin_pine64_plus>; + phy-supply = <®_dc1dc>; + allwinner,reset-gpio = <&pio 3 14 GPIO_ACTIVE_HIGH>; + allwinner,reset-active-low; + allwinner,reset-delays-us = <0 10000 30000>; +}; + +&r_rsb { + status = "okay"; + + axp81x: pmic@3a3 { + compatible = "x-powers,axp813"; + reg = <0x3a3>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + gpio-controller; + #gpio-cells = <1>; + + regulators { + reg_dc1dc: dc1sw { + regulator-name = "dc1sw"; + }; + + reg_dcdc2: dcdc2 { + regulator-name = "dcdc2"; + }; + }; + }; +}; + +&usbphy { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; Property changes on: head/sys/dts/arm64/pine64_plus.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm64/sun50i-a64-pine64-common.dtsi =================================================================== --- head/sys/dts/arm64/sun50i-a64-pine64-common.dtsi (nonexistent) +++ head/sys/dts/arm64/sun50i-a64-pine64-common.dtsi (revision 325826) @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2016 ARM Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * $FreeBSD$ + */ + +#include "sun50i-a64.dtsi" + +/ { + + aliases { + serial0 = &uart0; + }; + + soc { + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>, <&mmc0_default_cd_pin>; + vmmc-supply = <®_vcc3v3>; + cd-gpios = <&pio 5 6 0>; + cd-inverted; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; +}; Property changes on: head/sys/dts/arm64/sun50i-a64-pine64-common.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm64/sun50i-a64-pine64-plus.dts =================================================================== --- head/sys/dts/arm64/sun50i-a64-pine64-plus.dts (nonexistent) +++ head/sys/dts/arm64/sun50i-a64-pine64-plus.dts (revision 325826) @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2016 ARM Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +#include "sun50i-a64-pine64-common.dtsi" + +/ { + model = "Pine64+"; + compatible = "pine64,pine64-plus", "allwinner,sun50i-a64"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + /* There is a model with 2GB of DRAM, but U-Boot fixes this for us. */ + memory { + reg = <0x40000000 0x40000000>; + }; +}; + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy = <&phy1>; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; Property changes on: head/sys/dts/arm64/sun50i-a64-pine64-plus.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm64/sun50i-a64-pine64.dts =================================================================== --- head/sys/dts/arm64/sun50i-a64-pine64.dts (nonexistent) +++ head/sys/dts/arm64/sun50i-a64-pine64.dts (revision 325826) @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2016 ARM Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +#include "sun50i-a64-pine64-common.dtsi" + +/ { + model = "Pine64"; + compatible = "pine64,pine64", "allwinner,sun50i-a64"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0x40000000 0x20000000>; + }; +}; + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&rmii_pins>; + phy-mode = "rmii"; + phy = <&phy1>; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; Property changes on: head/sys/dts/arm64/sun50i-a64-pine64.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/arm64/sun50i-a64.dtsi =================================================================== --- head/sys/dts/arm64/sun50i-a64.dtsi (nonexistent) +++ head/sys/dts/arm64/sun50i-a64.dtsi (revision 325826) @@ -0,0 +1,661 @@ +/* + * Copyright (C) 2016 ARM Ltd. + * based on the Allwinner H3 dtsi: + * Copyright (C) 2015 Jens Kuske + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * $FreeBSD$ + */ + +#include +#include + +/ { + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + reg = <0>; + enable-method = "psci"; + }; + + cpu@1 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + reg = <1>; + enable-method = "psci"; + }; + + cpu@2 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + reg = <2>; + enable-method = "psci"; + }; + + cpu@3 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + reg = <3>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + memory { + device_type = "memory"; + reg = <0x40000000 0>; + }; + + gic: interrupt-controller@1c81000 { + compatible = "arm,gic-400"; + interrupt-controller; + #interrupt-cells = <3>; + #address-cells = <0>; + + reg = <0x01c81000 0x1000>, + <0x01c82000 0x2000>, + <0x01c84000 0x2000>, + <0x01c86000 0x2000>; + interrupts = ; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + osc24M: osc24M_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "osc24M"; + }; + + osc32k: osc32k_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + clock-output-names = "osc32k"; + }; + + cpux: clk@1c20000 { + #clock-cells = <0>; + compatible = "allwinner,sun8i-a23-pll1-clk"; + reg = <0x01c20000 0x4>; + clocks = <&osc24M>; + clock-output-names = "cpux"; + }; + + periph0: clk@1c20028 { + #clock-cells = <1>; + compatible = "allwinner,sun6i-a31-pll6-clk"; + reg = <0x01c20028 0x4>; + clocks = <&osc24M>; + clock-output-names = "periph0", "periph0x2"; + }; + + periph0d2: periph0d2_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clock-div = <2>; + clock-mult = <1>; + clocks = <&periph0 0>; + clock-output-names = "periph0d2"; + }; + + periph1: clk@1c2002c { + #clock-cells = <1>; + compatible = "allwinner,sun6i-a31-pll6-clk"; + reg = <0x01c2002c 0x4>; + clocks = <&osc24M>; + clock-output-names = "periph1", "periph1x2"; + }; + + cpu: cpu_clk@1c20050 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-cpu-clk"; + reg = <0x01c20050 0x4>; + clocks = <&osc32k>, <&osc24M>, <&cpux>, <&cpux>; + clock-output-names = "cpu"; + critical-clocks = <0>; + }; + + axi: axi_clk@1c20050 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-axi-clk"; + reg = <0x01c20050 0x4>; + clocks = <&cpu>; + clock-output-names = "axi"; + }; + + ahb1: ahb1_clk@1c20054 { + #clock-cells = <0>; + compatible = "allwinner,sun6i-a31-ahb1-clk"; + reg = <0x01c20054 0x4>; + clocks = <&osc32k>, <&osc24M>, <&axi>, <&periph0 0>; + clock-output-names = "ahb1"; + }; + + ahb2: ahb2_clk@1c2005c { + #clock-cells = <0>; + compatible = "allwinner,sun8i-h3-ahb2-clk"; + reg = <0x01c2005c 0x4>; + clocks = <&ahb1>, <&periph0d2>; + clock-output-names = "ahb2"; + }; + + apb1: apb1_clk@1c20054 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-apb0-clk"; + reg = <0x01c20054 0x4>; + clocks = <&ahb1>; + clock-output-names = "apb1"; + }; + + apb2: apb2_clk@1c20058 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-apb1-clk"; + reg = <0x01c20058 0x4>; + clocks = <&osc32k>, <&osc24M>, + <&periph0 1>, <&periph0 1>; + clock-output-names = "apb2"; + }; + + bus_gates: bus_gates_clk@1c20060 { + #clock-cells = <1>; + compatible = "allwinner,sun50i-a64-bus-gates-clk", + "allwinner,sunxi-multi-bus-gates-clk"; + reg = <0x01c20060 0x14>; + ahb1_parent { + clocks = <&ahb1>; + clock-indices = <1>, <5>, + <6>, <8>, + <9>, <10>, + <13>, <14>, + <18>, <19>, + <20>, <21>, + <23>, <24>, + <25>, <28>, + <32>, <35>, + <36>, <37>, + <40>, <43>, + <44>, <52>, + <53>, <54>, + <135>; + clock-output-names = "bus_mipidsi", "bus_ce", + "bus_dma", "bus_mmc0", + "bus_mmc1", "bus_mmc2", + "bus_nand", "bus_sdram", + "bus_ts", "bus_hstimer", + "bus_spi0", "bus_spi1", + "bus_otg", "bus_otg_ehci0", + "bus_ehci0", "bus_otg_ohci0", + "bus_ve", "bus_lcd0", + "bus_lcd1", "bus_deint", + "bus_csi", "bus_hdmi", + "bus_de", "bus_gpu", + "bus_msgbox", "bus_spinlock", + "bus_dbg"; + }; + ahb2_parent { + clocks = <&ahb2>; + clock-indices = <17>, <29>; + clock-output-names = "bus_gmac", "bus_ohci0"; + }; + apb1_parent { + clocks = <&apb1>; + clock-indices = <64>, <65>, + <69>, <72>, + <76>, <77>, + <78>; + clock-output-names = "bus_codec", "bus_spdif", + "bus_pio", "bus_ths", + "bus_i2s0", "bus_i2s1", + "bus_i2s2"; + }; + abp2_parent { + clocks = <&apb2>; + clock-indices = <96>, <97>, + <98>, <101>, + <112>, <113>, + <114>, <115>, + <116>; + clock-output-names = "bus_i2c0", "bus_i2c1", + "bus_i2c2", "bus_scr", + "bus_uart0", "bus_uart1", + "bus_uart2", "bus_uart3", + "bus_uart4"; + }; + }; + + mmc0_clk: mmc0_clk@1c20088 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c20088 0x4>; + clocks = <&osc24M>, <&periph0 1>, <&periph1 1>; + clock-output-names = "mmc0"; + }; + + mmc1_clk: mmc1_clk@1c2008c { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c2008c 0x4>; + clocks = <&osc24M>, <&periph0 1>, <&periph1 1>; + clock-output-names = "mmc1"; + }; + + mmc2_clk: mmc2_clk@1c20090 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c20090 0x4>; + clocks = <&osc24M>, <&periph0 1>, <&periph1 1>; + clock-output-names = "mmc2"; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mmc0: mmc@1c0f000 { + compatible = "allwinner,sun50i-a64-mmc", + "allwinner,sun5i-a13-mmc"; + reg = <0x01c0f000 0x1000>; + clocks = <&bus_gates 8>, <&mmc0_clk>, + <&mmc0_clk>, <&mmc0_clk>; + clock-names = "ahb", "mmc", + "output", "sample"; + resets = <&ahb_rst 8>; + reset-names = "ahb"; + interrupts = ; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc1: mmc@1c10000 { + compatible = "allwinner,sun50i-a64-mmc", + "allwinner,sun5i-a13-mmc"; + reg = <0x01c10000 0x1000>; + clocks = <&bus_gates 9>, <&mmc1_clk>, + <&mmc1_clk>, <&mmc1_clk>; + clock-names = "ahb", "mmc", + "output", "sample"; + resets = <&ahb_rst 9>; + reset-names = "ahb"; + interrupts = ; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc2: mmc@1c11000 { + compatible = "allwinner,sun50i-a64-mmc", + "allwinner,sun5i-a13-mmc"; + reg = <0x01c11000 0x1000>; + clocks = <&bus_gates 10>, <&mmc2_clk>, + <&mmc2_clk>, <&mmc2_clk>; + clock-names = "ahb", "mmc", + "output", "sample"; + resets = <&ahb_rst 10>; + reset-names = "ahb"; + interrupts = ; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + pio: pinctrl@1c20800 { + compatible = "allwinner,sun50i-a64-pinctrl"; + reg = <0x01c20800 0x400>; + interrupts = , + , + ; + clocks = <&bus_gates 69>; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; + #interrupt-cells = <2>; + + uart0_pins_a: uart0@0 { + allwinner,pins = "PB8", "PB9"; + allwinner,function = "uart0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + uart0_pins_b: uart0@1 { + allwinner,pins = "PF2", "PF3"; + allwinner,function = "uart0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + uart1_2pins: uart1_2@0 { + allwinner,pins = "PG6", "PG7"; + allwinner,function = "uart1"; + allwinner,drive = ; + allwinner,pull = ; + }; + + uart1_4pins: uart1_4@0 { + allwinner,pins = "PG6", "PG7", "PG8", "PG9"; + allwinner,function = "uart1"; + allwinner,drive = ; + allwinner,pull = ; + }; + + uart2_2pins: uart2_2@0 { + allwinner,pins = "PB0", "PB1"; + allwinner,function = "uart2"; + allwinner,drive = ; + allwinner,pull = ; + }; + + uart2_4pins: uart2_4@0 { + allwinner,pins = "PB0", "PB1", "PB2", "PB3"; + allwinner,function = "uart2"; + allwinner,drive = ; + allwinner,pull = ; + }; + + uart3_pins_a: uart3@0 { + allwinner,pins = "PD0", "PD1"; + allwinner,function = "uart3"; + allwinner,drive = ; + allwinner,pull = ; + }; + + uart3_2pins_b: uart3_2@1 { + allwinner,pins = "PH4", "PH5"; + allwinner,function = "uart3"; + allwinner,drive = ; + allwinner,pull = ; + }; + + uart3_4pins_b: uart3_4@1 { + allwinner,pins = "PH4", "PH5", "PH6", "PH7"; + allwinner,function = "uart3"; + allwinner,drive = ; + allwinner,pull = ; + }; + + uart4_2pins: uart4_2@0 { + allwinner,pins = "PD2", "PD3"; + allwinner,function = "uart4"; + allwinner,drive = ; + allwinner,pull = ; + }; + + uart4_4pins: uart4_4@0 { + allwinner,pins = "PD2", "PD3", "PD4", "PD5"; + allwinner,function = "uart4"; + allwinner,drive = ; + allwinner,pull = ; + }; + + mmc0_pins: mmc0@0 { + allwinner,pins = "PF0", "PF1", "PF2", "PF3", + "PF4", "PF5"; + allwinner,function = "mmc0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + mmc0_default_cd_pin: mmc0_cd_pin@0 { + allwinner,pins = "PF6"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + mmc1_pins: mmc1@0 { + allwinner,pins = "PG0", "PG1", "PG2", "PG3", + "PG4", "PG5"; + allwinner,function = "mmc1"; + allwinner,drive = ; + allwinner,pull = ; + }; + + mmc2_pins: mmc2@0 { + allwinner,pins = "PC1", "PC5", "PC6", "PC8", + "PC9", "PC10"; + allwinner,function = "mmc2"; + allwinner,drive = ; + allwinner,pull = ; + }; + + i2c0_pins: i2c0_pins { + allwinner,pins = "PH0", "PH1"; + allwinner,function = "i2c0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + i2c1_pins: i2c1_pins { + allwinner,pins = "PH2", "PH3"; + allwinner,function = "i2c1"; + allwinner,drive = ; + allwinner,pull = ; + }; + + i2c2_pins: i2c2_pins { + allwinner,pins = "PE14", "PE15"; + allwinner,function = "i2c2"; + allwinner,drive = ; + allwinner,pull = ; + }; + + rmii_pins: rmii_pins { + allwinner,pins = "PD10", "PD11", "PD13", "PD14", + "PD17", "PD18", "PD19", "PD20", + "PD22", "PD23"; + allwinner,function = "emac"; + allwinner,drive = ; + allwinner,pull = ; + }; + + rgmii_pins: rgmii_pins { + allwinner,pins = "PD8", "PD9", "PD10", "PD11", + "PD12", "PD13", "PD15", + "PD16", "PD17", "PD18", "PD19", + "PD20", "PD21", "PD22", "PD23"; + allwinner,function = "emac"; + allwinner,drive = ; + allwinner,pull = ; + }; + }; + + ahb_rst: reset@1c202c0 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-clock-reset"; + reg = <0x01c202c0 0xc>; + }; + + apb1_rst: reset@1c202d0 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-clock-reset"; + reg = <0x01c202d0 0x4>; + }; + + apb2_rst: reset@1c202d8 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-clock-reset"; + reg = <0x01c202d8 0x4>; + }; + + uart0: serial@1c28000 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28000 0x400>; + interrupts = ; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&bus_gates 112>; + resets = <&apb2_rst 16>; + status = "disabled"; + }; + + uart1: serial@1c28400 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28400 0x400>; + interrupts = ; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&bus_gates 113>; + resets = <&apb2_rst 17>; + status = "disabled"; + }; + + uart2: serial@1c28800 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28800 0x400>; + interrupts = ; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&bus_gates 114>; + resets = <&apb2_rst 18>; + status = "disabled"; + }; + + uart3: serial@1c28c00 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28c00 0x400>; + interrupts = ; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&bus_gates 115>; + resets = <&apb2_rst 19>; + status = "disabled"; + }; + + uart4: serial@1c29000 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c29000 0x400>; + interrupts = ; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&bus_gates 116>; + resets = <&apb2_rst 20>; + status = "disabled"; + }; + + rtc: rtc@1f00000 { + compatible = "allwinner,sun6i-a31-rtc"; + reg = <0x01f00000 0x54>; + interrupts = , + ; + }; + + i2c0: i2c@1c2ac00 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2ac00 0x400>; + interrupts = ; + clocks = <&bus_gates 96>; + resets = <&apb2_rst 0>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c1: i2c@1c2b000 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2b000 0x400>; + interrupts = ; + clocks = <&bus_gates 97>; + resets = <&apb2_rst 1>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c2: i2c@1c2b400 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2b400 0x400>; + interrupts = ; + clocks = <&bus_gates 98>; + resets = <&apb2_rst 2>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + emac: ethernet@1c30000 { + compatible = "allwinner,sun50i-a64-emac", + "allwinner,sun8i-h3-emac"; + reg = <0x01c30000 0x100>, <0x01c00030 0x4>; + reg-names = "emac", "syscon"; + interrupts = ; + resets = <&ahb_rst 17>; + reset-names = "ahb"; + clocks = <&bus_gates 17>; + clock-names = "ahb"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; Property changes on: head/sys/dts/arm64/sun50i-a64.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/bindings-gpio.txt =================================================================== --- head/sys/dts/bindings-gpio.txt (nonexistent) +++ head/sys/dts/bindings-gpio.txt (revision 325826) @@ -0,0 +1,101 @@ +$FreeBSD$ + +GPIO configuration. +=================== + +1. Properties for GPIO Controllers + +1.1 #gpio-cells + +Property: #gpio-cells + +Value type: + +Description: The #gpio-cells property defines the number of cells required + to encode a gpio specifier. + + +1.2 gpio-controller + +Property: gpio-controller + +Value type: + +Description: The presence of a gpio-controller property defines a node as a + GPIO controller node. + + +1.3 pin-count + +Property: pin-count + +Value type: + +Description: The pin-count property defines the number of GPIO pins. + + +1.4 Example + + GPIO: gpio@10100 { + #gpio-cells = <3>; + compatible = "mrvl,gpio"; + reg = <0x10100 0x20>; + gpio-controller; + interrupts = <6 7 8 9>; + interrupt-parent = <&PIC>; + pin-count = <50> + }; + +2. Properties for GPIO consumer nodes. + +2.1 gpios + +Property: gpios + +Value type: encoded as arbitrary number of GPIO + specifiers. + +Description: The gpios property of a device node defines the GPIO or GPIOs + that are used by the device. The value of the gpios property + consists of an arbitrary number of GPIO specifiers. + + The first cell of the GPIO specifier is phandle of the node's + parent GPIO controller and remaining cells are defined by the + binding describing the GPIO parent, typically include + information like pin number, direction and various flags. + +Example: + gpios = <&GPIO 0 1 0 /* GPIO[0]: IN, NONE */ + &GPIO 1 2 0>; /* GPIO[1]: OUT, NONE */ + + +3. "mrvl,gpio" controller GPIO specifier + + + + +pin: 0-MAX GPIO pin number. + +dir: + 1 IN Input direction. + 2 OUT Output direction. + +flags: + 0x0000---- IN_NONE + 0x0001---- IN_POL_LOW Polarity low (active-low). + 0x0002---- IN_IRQ_EDGE Interrupt, edge triggered. + 0x0004---- IN_IRQ_LEVEL Interrupt, level triggered. + + 0x----0000 OUT_NONE + 0x----0001 OUT_BLINK Blink on the pin. + 0x----0002 OUT_OPEN_DRAIN Open drain output line. + 0x----0004 OUT_OPEN_SRC Open source output line. + + +Example: + gpios = <&GPIO 0 1 0x00000000 /* GPIO[0]: IN */ + &GPIO 1 2 0x00000000 /* GPIO[1]: OUT */ + &GPIO 2 1 0x00020000 /* GPIO[2]: IN, IRQ (edge) */ + &GPIO 3 1 0x00040000 /* GPIO[3]: IN, IRQ (level) */ + ... + &GPIO 10 2 0x00000001>; /* GPIO[10]: OUT, blink */ Property changes on: head/sys/dts/bindings-gpio.txt ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/bindings-localbus.txt =================================================================== --- head/sys/dts/bindings-localbus.txt (nonexistent) +++ head/sys/dts/bindings-localbus.txt (revision 325826) @@ -0,0 +1,83 @@ +$FreeBSD$ + +Marvell Device bus (localbus) configuration. +============================================ + +1. Properties for localbus nodes + +1.1 ranges + +Property: ranges + +Value type: encoded as arbitrary number of localbus + nodes specifiers. + +Description: ranges property defines values used for mapping devices + connected to localbus, in Marvell devices it is used also for + setting decoding windows. + + a) child node address-cells: + - first cell: number of bank (chip select) + - second cell: (Marvell devices) Target ID for decoding + windows setup + + b) parent node address cells: + - address offset: used with parent's node base address to + specify base address of mapped device + + c) child node size-cells: + - size: defines amount of memory that should be reserved for + device + +1.2 bank-count + +Property: bank-count + +Value type: + +Description: The bank_count property defines maximum number of banks on + localbus node. Bank is most often interpreted as device chip + select, but may also describe another device (e.g. SPI flash). + +1.3 Example + + localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "mrvl,lbc"; + bank-count = <5>; + + /* This reflects CPU decode windows setup. */ + ranges = <0x0 0x2f 0xb2200000 0x00100000 + 0x1 0x3e 0xb2100000 0x00100000 + 0x2 0x3d 0xb0000000 0x02000000 + 0x3 0x3b 0xb2000000 0x00100000>; + }; + +2. Properties for localbus consumer nodes: + +2.1 reg + +Property: reg + +Value type: + +Description: A standard property required for localbus child nodes. Defines + the device memory region. + + a) first cell: number of bank (chip select) + + b) address offset: used with address offset from parent's ranges + for corresponding bank to specify base address of + the device + + c) size: defines size of the device memory region + +2.2 Example + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x00100000>; + }; Property changes on: head/sys/dts/bindings-localbus.txt ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/bindings-mpp.txt =================================================================== --- head/sys/dts/bindings-mpp.txt (nonexistent) +++ head/sys/dts/bindings-mpp.txt (revision 325826) @@ -0,0 +1,50 @@ +$FreeBSD$ + +* Multi purpose pin (MPP) configuration. + +Required properties: + +- pin-map : array of pin configurations. Each pin is defined by 2 cells, + respectively: . Pins not specified in the pin-map property + are assumed to have default value of = 0, which means GPIO. + + - pin : pin number. + + - function : function ID of the pin according to the assignment tables in + User Manual. Each pin can have many possible functions depending on the + MPP unit incarnation. + +- pin-count: number of the physical MPP connections on the SOC (depending on + the model it can be 24-50, or possibly else in future devices). + +Example: + + mpp@10000 { + #pin-cells = <2>; + compatible = "mrvl,mpp"; + reg = <0x10000 0x34>; + pin-count= <50>; + pin-map = < + 0 1 /* MPP[0]: NF_IO[2] */ + 1 1 /* MPP[1]: NF_IO[3] */ + 2 1 /* MPP[2]: NF_IO[4] */ + 3 1 /* MPP[3]: NF_IO[5] */ + 4 1 /* MPP[4]: NF_IO[6] */ + 5 1 /* MPP[5]: NF_IO[7] */ + 6 1 /* MPP[6]: SYSRST_OUTn */ + 7 2 /* MPP[7]: SPI_SCn */ + 8 1 /* MPP[8]: TW_SDA */ + 9 1 /* MPP[9]: TW_SCK */ + 10 3 /* MPP[10]: UA0_TXD */ + 11 3 /* MPP[11]: UA0_RXD */ + 12 1 /* MPP[12]: SD_CLK */ + 13 1 /* MPP[13]: SD_CMD */ + 14 1 /* MPP[14]: SD_D[0] */ + 15 1 /* MPP[15]: SD_D[1] */ + 16 1 /* MPP[16]: SD_D[2] */ + 17 1 /* MPP[17]: SD_D[3] */ + 18 1 /* MPP[18]: NF_IO[0] */ + 19 1 /* MPP[19]: NF_IO[1] */ + 20 5 /* MPP[20]: SATA1_AC */ + 21 5 >; /* MPP[21]: SATA0_AC */ + }; Property changes on: head/sys/dts/bindings-mpp.txt ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/mips/Makefile =================================================================== --- head/sys/dts/mips/Makefile (nonexistent) +++ head/sys/dts/mips/Makefile (revision 325826) @@ -0,0 +1,7 @@ +# $FreeBSD$ + +DTS!=ls *.dts + +all: test-dts + +.include Property changes on: head/sys/dts/mips/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/mips/beri-netfpga.dts =================================================================== --- head/sys/dts/mips/beri-netfpga.dts (nonexistent) +++ head/sys/dts/mips/beri-netfpga.dts (revision 325826) @@ -0,0 +1,162 @@ +/*- + * Copyright (c) 2012-2013 Robert N. M. Watson + * Copyright (c) 2013 SRI International + * Copyright (c) 2013-2014 Bjoern A. Zeeb + * All rights reserved. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) + * ("CTSRD"), as part of the DARPA CRASH research programme. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-11-C-0249) + * ("MRC2"), as part of the DARPA MRC research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/* + * Device names here have been largely made up on the spot, especially for the + * "compatible" strings, and might want to be revised. + */ + +/ { + model = "SRI/Cambridge Beri (NetFPGA)"; + compatible = "sri-cambridge,beri-netfpga"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <1>; + + /* + * Secondary CPUs all start disabled and use the + * spin-table enable method. cpu-release-addr must be + * specified for each cpu other than cpu@0. Values of + * cpu-release-addr grow down from 0x100000 (kernel). + */ + status = "disabled"; + enable-method = "spin-table"; + + cpu@0 { + device-type = "cpu"; + compatible = "sri-cambridge,beri"; + + reg = <0 1>; + status = "okay"; + }; + +/* + cpu@1 { + device-type = "cpu"; + compatible = "sri-cambridge,beri"; + + reg = <1 1>; + // XXX: should we need cached prefix? + cpu-release-addr = <0xffffffff 0x800fffe0>; + }; +*/ + }; + + memory { + device_type = "memory"; + reg = <0x0 0x0FFFFFFF>; // ~256M at 0x0 + }; + + cpuintc: cpuintc@0 { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + compatible = "mti,cpu-interrupt-controller"; + }; + + beripic: beripic@7f804000 { + compatible = "sri-cambridge,beri-pic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x7f804000 0x400 + 0x7f806000 0x10 + 0x7f806080 0x10 + 0x7f806100 0x10>; + interrupts = < 2 3 4 5 6 >; + hard-interrupt-sources = <64>; + soft-interrupt-sources = <64>; + interrupt-parent = <&cpuintc>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <1>; + + compatible = "simple-bus", "mips,mips4k"; + ranges; + + serial0: serial@7f000000 { + compatible = "altera,jtag_uart-11_0"; + reg = <0x7f000000 0x40>; +/* + interrupts = <0>; + interrupt-parent = <&beripic>; +*/ + }; + +/* + serial0: serial@7f002100 { + compatible = "ns16550"; + reg = <0x7f002100 0x20>; + reg-shift = <2>; + clock-frequency = <100000000>; + interrupts = <8>; + interrupt-parent = <&beripic>; + }; +*/ + + ethernet@7f005000 { + compatible = "netfpag10g,nf10bmac"; + // LOOP, TX, RX, INTR + reg = <0x7f005000 0x20 + 0x7f005020 0x30 + 0x7f005050 0x30 + 0x7f005100 0x10>; + // RX + interrupts = <1>; + interrupt-parent = <&beripic>; + }; + }; + + aliases { + serial0 = &serial0; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + bootargs = "-v"; + }; +}; Property changes on: head/sys/dts/mips/beri-netfpga.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/mips/beri-sim.dts =================================================================== --- head/sys/dts/mips/beri-sim.dts (nonexistent) +++ head/sys/dts/mips/beri-sim.dts (revision 325826) @@ -0,0 +1,160 @@ +/*- + * Copyright (c) 2012-2013 Robert N. M. Watson + * Copyright (c) 2013 SRI International + * All rights reserved. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) + * ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/* + * Device names here have been largely made up on the spot, especially for the + * "compatible" strings, and might want to be revised. + * + * For now, use 32-bit addressing as our Avalon bus is 32-bit. However, in + * the future, we should likely change to 64-bit. + */ + +/ { + model = "SRI/Cambridge BERI simulation"; + compatible = "sri-cambridge,beri-sim"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <1>; + + /* + * Secondary CPUs all start disabled and use the + * spin-table enable method. cpu-release-addr must be + * specified for each cpu other than cpu@0. Values of + * cpu-release-addr grow down from 0x100000 (kernel). + */ + status = "disabled"; + enable-method = "spin-table"; + + cpu@0 { + device-type = "cpu"; + compatible = "sri-cambridge,beri"; + + reg = <0 1>; + status = "okay"; + }; + +/* + cpu@1 { + device-type = "cpu"; + compatible = "sri-cambridge,beri"; + + reg = <1 1>; + // XXX: should we need cached prefix? + cpu-release-addr = <0xffffffff 0x800fffe0>; + }; +*/ + }; + + memory { + device_type = "memory"; + reg = <0x0 0x4000000>; // 64M at 0x0 + }; + + cpuintc: cpuintc@0 { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + compatible = "mti,cpu-interrupt-controller"; + }; + + beripic0: beripic@7f804000 { + compatible = "sri-cambridge,beri-pic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x7f804000 0x400 + 0x7f806000 0x10 + 0x7f806080 0x10 + 0x7f806100 0x10>; + interrupts = < 2 3 4 5 6 >; + hard-interrupt-sources = <64>; + soft-interrupt-sources = <64>; + interrupt-parent = <&cpuintc>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <1>; + + compatible = "simple-bus", "mips,mips4k"; + ranges; + + serial@7f000000 { + compatible = "altera,jtag_uart-11_0"; + reg = <0x7f000000 0x40>; + interrupts = <0>; + interrupt-parent = <&beripic0>; + }; + + serial@7f001000 { + compatible = "altera,jtag_uart-11_0"; + reg = <0x7f001000 0x40>; + }; + + serial@7f002000 { + compatible = "altera,jtag_uart-11_0"; + reg = <0x7f002000 0x40>; + }; + + virtio_mmio_platform0: virtio_mmio_platform@0 { + compatible = "beri,virtio_mmio_platform"; + interrupts = <1>; + interrupt-parent = <&beripic0>; + }; + + virtio_block@7f020000 { + compatible = "virtio,mmio"; + reg = <0x7f020000 0x1000>; + platform = <&virtio_mmio_platform0>; + }; + + sdcard@7f008000 { + compatible = "altera,sdcard_11_2011"; + reg = <0x7f008000 0x400>; + }; + + avgen@0x7f00a000 { + compatible = "sri-cambridge,avgen"; + reg = <0x7f00a000 0x14>; + sri-cambridge,width = <4>; + sri-cambridge,fileio = "rw"; + sri-cambridge,devname = "berirom"; + }; + }; +}; Property changes on: head/sys/dts/mips/beri-sim.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/mips/beripad-de4.dts =================================================================== --- head/sys/dts/mips/beripad-de4.dts (nonexistent) +++ head/sys/dts/mips/beripad-de4.dts (revision 325826) @@ -0,0 +1,262 @@ +/*- + * Copyright (c) 2012-2013 Robert N. M. Watson + * Copyright (c) 2013 SRI International + * All rights reserved. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) + * ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/* + * Device names here have been largely made up on the spot, especially for the + * "compatible" strings, and might want to be revised. + * + * For now, use 32-bit addressing as our Avalon bus is 32-bit. However, in + * the future, we should likely change to 64-bit. + */ + +/ { + model = "SRI/Cambridge BeriPad (DE4)"; + compatible = "sri-cambridge,beripad-de4"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <1>; + + /* + * Secondary CPUs all start disabled and use the + * spin-table enable method. cpu-release-addr must be + * specified for each cpu other than cpu@0. Values of + * cpu-release-addr grow down from 0x100000 (kernel). + */ + status = "disabled"; + enable-method = "spin-table"; + + cpu@0 { + device-type = "cpu"; + compatible = "sri-cambridge,beri"; + + reg = <0 1>; + status = "okay"; + }; + +/* + cpu@1 { + device-type = "cpu"; + compatible = "sri-cambridge,beri"; + + reg = <1 1>; + // XXX: should we need cached prefix? + cpu-release-addr = <0xffffffff 0x800fffe0>; + }; +*/ + }; + + memory { + device_type = "memory"; + reg = <0x0 0x40000000>; // 1G at 0x0 + }; + + cpuintc: cpuintc@0 { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + compatible = "mti,cpu-interrupt-controller"; + }; + + beripic0: beripic@7f804000 { + compatible = "sri-cambridge,beri-pic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x7f804000 0x400 + 0x7f806000 0x10 + 0x7f806080 0x10 + 0x7f806100 0x10>; + interrupts = < 2 3 4 5 6 >; + hard-interrupt-sources = <64>; + soft-interrupt-sources = <64>; + interrupt-parent = <&cpuintc>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <1>; + + compatible = "simple-bus", "mips,mips4k"; + ranges; + + serial@7f002100 { + compatible = "ns16550"; + reg = <0x7f002100 0x20>; + reg-shift = <2>; + clock-frequency = <50000000>; + interrupts = <6>; + interrupt-parent = <&beripic0>; + }; + + serial@7f000000 { + compatible = "altera,jtag_uart-11_0"; + reg = <0x7f000000 0x40>; + interrupts = <0>; + interrupt-parent = <&beripic0>; + }; + + serial@7f001000 { + compatible = "altera,jtag_uart-11_0"; + reg = <0x7f001000 0x40>; + }; + + serial@7f002000 { + compatible = "altera,jtag_uart-11_0"; + reg = <0x7f002000 0x40>; + }; + + sdcard@7f008000 { + compatible = "altera,sdcard_11_2011"; + reg = <0x7f008000 0x400>; + }; + + led@7f006000 { + compatible = "sri-cambridge,de4led"; + reg = <0x7f006000 0x1>; + }; + + /* + * XXX-BZ keep flash before ethernet so that atse can read the + * Ethernet addresses for now. + */ + flash@74000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x74000000 0x4000000>; + + /* Board configuration */ + partition@0 { + reg = <0x0 0x20000>; + label = "config"; + }; + + /* Power up FPGA image */ + partition@20000 { + reg = <0x20000 0xc00000>; + label = "fpga0"; + }; + + /* Secondary FPGA image (on RE_CONFIGn button) */ + partition@C20000 { + reg = <0xc20000 0xc00000>; + label = "fpga1"; + }; + + /* Space for operating system use */ + partition@1820000 { + reg = <0x1820000 0x027c0000>; + label = "os"; + }; + + /* Second stage bootloader */ + parition@3fe0000 { + reg = <0x3fe0000 0x20000>; + label = "boot"; + }; + }; + + ethernet@7f007000 { + compatible = "altera,atse"; + // MAC, RX+RXC, TX+TXC. + reg = <0x7f007000 0x400 + 0x7f007500 0x8 + 0x7f007520 0x20 + 0x7f007400 0x8 + 0x7f007420 0x20>; + // RX, TX + interrupts = <1 2>; + interrupt-parent = <&beripic0>; + }; + + ethernet@7f005000 { + compatible = "altera,atse"; + // MAC, RX+RXC, TX+TXC. + reg = <0x7f005000 0x400 + 0x7f005500 0x8 + 0x7f005520 0x20 + 0x7f005400 0x8 + 0x7f005420 0x20>; + // RX, TX + interrupts = <11 12>; + interrupt-parent = <&beripic0>; + }; + + touchscreen@70400000 { + compatible = "sri-cambridge,mtl"; + panel-size = < 800 480 >; + reg = <0x70400000 0x1000 + 0x70000000 0x177000 + 0x70177000 0x2000>; + }; + + usb@0x7f100000 { + compatible = "nxp,usb-isp1761"; + reg = <0x7f100000 0x40000 + 0x7f140000 0x4>; + // IRQ 4 is DC, IRQ 5 is HC. + interrupts = <4 5>; + interrupt-parent = <&beripic0>; + }; + + avgen@0x7f009000 { + compatible = "sri-cambridge,avgen"; + reg = <0x7f009000 0x2>; + sri-cambridge,width = <1>; + sri-cambridge,fileio = "r"; + sri-cambridge,devname = "de4bsw"; + }; + + avgen@0x7f00a000 { + compatible = "sri-cambridge,avgen"; + reg = <0x7f00a000 0x14>; + sri-cambridge,width = <4>; + sri-cambridge,fileio = "rw"; + sri-cambridge,devname = "berirom"; + }; + + avgen@0x7f00c000 { + compatible = "sri-cambridge,avgen"; + reg = <0x7f00c000 0x8>; + sri-cambridge,width = <4>; + sri-cambridge,fileio = "rw"; + sri-cambridge,devname = "de4tempfan"; + }; + }; +}; Property changes on: head/sys/dts/mips/beripad-de4.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/mips/beripad-sockit.dts =================================================================== --- head/sys/dts/mips/beripad-sockit.dts (nonexistent) +++ head/sys/dts/mips/beripad-sockit.dts (revision 325826) @@ -0,0 +1,223 @@ +/*- + * Copyright (c) 2012-2013 Robert N. M. Watson + * Copyright (c) 2013-2014 SRI International + * Copyright (c) 2014 Ruslan Bukin + * All rights reserved. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) + * ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/* + * Device names here have been largely made up on the spot, especially for the + * "compatible" strings, and might want to be revised. + */ + +/ { + model = "SRI/Cambridge BeriPad (SoCKit)"; + compatible = "sri-cambridge,beripad-sockit"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <1>; + + /* + * Secondary CPUs all start disabled and use the + * spin-table enable method. cpu-release-addr must be + * specified for each cpu other than cpu@0. Values of + * cpu-release-addr grow down from 0x100000 (kernel). + */ + status = "disabled"; + enable-method = "spin-table"; + + cpu@0 { + device-type = "cpu"; + compatible = "sri-cambridge,beri"; + + reg = <0 1>; + status = "okay"; + }; + +/* + cpu@1 { + device-type = "cpu"; + compatible = "sri-cambridge,beri"; + + reg = <1 1>; + // XXX: should we need cached prefix? + cpu-release-addr = <0xffffffff 0x800fffe0>; + }; +*/ + }; + + memory { + device_type = "memory"; + reg = <0x0 0x10000000>; /* 256MB at 0x0 */ + }; + + cpuintc: cpuintc@0 { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + compatible = "mti,cpu-interrupt-controller"; + }; + + beripic0: beripic@7f804000 { + compatible = "sri-cambridge,beri-pic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x0 0x7f804000 0x0 0x400 + 0x0 0x7f806000 0x0 0x10 + 0x0 0x7f806080 0x0 0x10 + 0x0 0x7f806100 0x0 0x10>; + interrupts = < 2 3 4 5 6 >; + hard-interrupt-sources = <64>; + soft-interrupt-sources = <64>; + interrupt-parent = <&cpuintc>; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + #interrupt-cells = <1>; + + compatible = "simple-bus", "mips,mips4k"; + ranges; + + pio0: pio@7f020000 { + compatible = "altr,pio"; + reg = <0x0 0x7f020000 0x0 0x1000>; /* send */ + interrupts = <4>; /* not used */ + interrupt-parent = <&beripic0>; + }; + + pio1: pio@7f021000 { + compatible = "altr,pio"; + reg = <0x0 0x7f021000 0x0 0x1000>; /* recv */ + interrupts = <10>; + interrupt-parent = <&beripic0>; + }; + + pio2: pio@7f022000 { + compatible = "altr,pio"; + reg = <0x0 0x7f022000 0x0 0x1000>; /* send */ + interrupts = <5>; /* not used */ + interrupt-parent = <&beripic0>; + }; + + pio3: pio@7f023000 { + compatible = "altr,pio"; + reg = <0x0 0x7f023000 0x0 0x1000>; /* recv */ + interrupts = <11>; + interrupt-parent = <&beripic0>; + }; + + virtio_mmio_platform0: virtio_mmio_platform@0 { + compatible = "beri,virtio_mmio_platform"; + pio-send = <&pio0>; + pio-recv = <&pio1>; + }; + + virtio_mmio_platform1: virtio_mmio_platform@1 { + compatible = "beri,virtio_mmio_platform"; + pio-send = <&pio2>; + pio-recv = <&pio3>; + }; + + virtio_block@200001000 { + compatible = "virtio,mmio"; + reg = <0x2 0x1000 0x0 0x1000>; + platform = <&virtio_mmio_platform0>; + status = "okay"; + }; + + virtio_net@200002000 { + compatible = "virtio,mmio"; + reg = <0x2 0x2000 0x0 0x1000>; + platform = <&virtio_mmio_platform1>; + status = "okay"; + }; + + serial@7f000000 { + compatible = "altera,jtag_uart-11_0"; + reg = <0x0 0x7f000000 0x0 0x40>; + interrupts = <0>; + interrupt-parent = <&beripic0>; + }; + +/* + serial@7f001000 { + compatible = "altera,jtag_uart-11_0"; + reg = <0x7f001000 0x40>; + }; + + serial@7f002000 { + compatible = "altera,jtag_uart-11_0"; + reg = <0x7f002000 0x40>; + }; +*/ + +/* + led@7f006000 { + compatible = "sri-cambridge,de4led"; + reg = <0x7f006000 0x1>; + }; +*/ + +/* + avgen@0x7f009000 { + compatible = "sri-cambridge,avgen"; + reg = <0x7f009000 0x2>; + sri-cambridge,width = <1>; + sri-cambridge,fileio = "r"; + sri-cambridge,devname = "de4bsw"; + }; +*/ + +/* + berirom@0x7f00a000 { + compatible = "sri-cambridge,berirom"; + reg = <0x7f00a000 0x1000>; + }; +*/ + +/* + avgen@0x7f00c000 { + compatible = "sri-cambridge,avgen"; + reg = <0x7f00c000 0x8>; + sri-cambridge,width = <4>; + sri-cambridge,fileio = "rw"; + sri-cambridge,devname = "de4tempfan"; + }; +*/ + }; +}; Property changes on: head/sys/dts/mips/beripad-sockit.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/mips/fbsd-mt7620a.dtsi =================================================================== --- head/sys/dts/mips/fbsd-mt7620a.dtsi (nonexistent) +++ head/sys/dts/mips/fbsd-mt7620a.dtsi (revision 325826) @@ -0,0 +1,9 @@ +/* $FreeBSD$ */ + +&pcie { + /* + * Our driver is different that OpenWRT's, so we need slightly + * different values for the reg property + */ + reg = <0x10140000 0x10000>; +}; Property changes on: head/sys/dts/mips/fbsd-mt7620a.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/mips/fbsd-mt7621.dtsi =================================================================== --- head/sys/dts/mips/fbsd-mt7621.dtsi (nonexistent) +++ head/sys/dts/mips/fbsd-mt7621.dtsi (revision 325826) @@ -0,0 +1,49 @@ +/* $FreeBSD$ */ + +&palmbus { + gpio@600 { + /* + * Mark gpio as compatible to simple-bus and override + * its #size-cells and provide a default ranges property + * so we can attach instances of our mtk_gpio_v2 driver + * to it for now. Provide exactly the same resources to + * the instances of mtk_gpio_v2. + */ + compatible = "simple-bus"; + ranges = <0x0 0x600 0x100>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + gpio0: bank@0 { + reg = <0x0 0x100>; + interrupts = <0 6 4>; + }; + + gpio1: bank@1 { + reg = <0x0 0x100>; + interrupts = <0 6 4>; + }; + + gpio2: bank@2 { + reg = <0x0 0x100>; + interrupts = <0 6 4>; + }; + }; +}; + +&xhci { + /* + * A slightly different value for reg size is needed by our + * driver for the moment + */ + reg = <0x1e1c0000 0x20000>; +}; + +&pcie { + /* + * Our driver is different that OpenWRT's, so we need slightly + * different values for the reg property + */ + reg = <0x1e140000 0x10000>; +}; Property changes on: head/sys/dts/mips/fbsd-mt7621.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/mips/fbsd-mt7628an.dtsi =================================================================== --- head/sys/dts/mips/fbsd-mt7628an.dtsi (nonexistent) +++ head/sys/dts/mips/fbsd-mt7628an.dtsi (revision 325826) @@ -0,0 +1,40 @@ +/* $FreeBSD$ */ + +&palmbus { + gpio@600 { + /* + * Mark gpio as compatible to simple-bus and override + * its #size-cells and provide a default ranges property + * so we can attach instances of our mtk_gpio_v2 driver + * to it for now. Provide exactly the same resources to + * the instances of mtk_gpio_v2. + */ + compatible = "simple-bus"; + ranges = <0x0 0x600 0x100>; + #size-cells = <1>; + + gpio0: bank@0 { + reg = <0x0 0x100>; + interrupts = <6>; + }; + + gpio1: bank@1 { + reg = <0x0 0x100>; + interrupts = <6>; + }; + + gpio2: bank@2 { + reg = <0x0 0x100>; + interrupts = <6>; + }; + }; +}; + +&pcie { + /* + * Our driver is different that OpenWRT's, so we need slightly + * different values for the reg property + */ + reg = <0x10140000 0x10000>; + compatible = "mediatek,mt7628-pci"; +}; Property changes on: head/sys/dts/mips/fbsd-mt7628an.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/mips/fbsd-rt3883.dtsi =================================================================== --- head/sys/dts/mips/fbsd-rt3883.dtsi (nonexistent) +++ head/sys/dts/mips/fbsd-rt3883.dtsi (revision 325826) @@ -0,0 +1,16 @@ +/* $FreeBSD$ */ + +&pci { + #address-cells = <3>; + #size-cells = <2>; + ranges = < + 0x02000000 0 0x00000000 0x20000000 0 0x10000000 + 0x01000000 0 0x00000000 0x10160000 0 0x00010000 + >; + + interrupt-parent = <&cpuintc>; + interrupts = <4>; + + resets = <&rstctrl 23>; + clocks = <&clkctrl 21>; +}; Property changes on: head/sys/dts/mips/fbsd-rt3883.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/mips/xlp-basic.dts =================================================================== --- head/sys/dts/mips/xlp-basic.dts (nonexistent) +++ head/sys/dts/mips/xlp-basic.dts (revision 325826) @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2010 The FreeBSD Foundation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * Netlogic Microsystems XLP8xx Device Tree Source. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "netl,XLP8XX"; + compatible = "XLP8XX"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + serial0 = &serial0; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x18000000 0x04000000>; + bus-frequency = <0>; + + pic: pic@4000 { + compatible = "netlogic,xlp-pic"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x4000 0x200>; + }; + + serial0: serial@30100 { + compatible = "ns16550"; + reg = <0x30100 0x200>; + reg-shift = <2>; + current-speed = <115200>; + clock-frequency = <133000000>; + interrupt-parent = <&pic>; + interrupts = <17>; + }; + + pci0: pci@18000000 { + compatible = "netlogic,xlp-pci", "pci"; + reg = <0xd0000000 0x10000000>; + }; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + cpumask = <0xffffffff>; + bootargs = "-v"; + }; +}; Property changes on: head/sys/dts/mips/xlp-basic.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/powerpc/Makefile =================================================================== --- head/sys/dts/powerpc/Makefile (nonexistent) +++ head/sys/dts/powerpc/Makefile (revision 325826) @@ -0,0 +1,7 @@ +# $FreeBSD$ + +DTS!=ls *.dts + +all: test-dts + +.include Property changes on: head/sys/dts/powerpc/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/powerpc/mpc8555cds.dts =================================================================== --- head/sys/dts/powerpc/mpc8555cds.dts (nonexistent) +++ head/sys/dts/powerpc/mpc8555cds.dts (revision 325826) @@ -0,0 +1,443 @@ +/* + * MPC8555 CDS Device Tree Source + * + * Copyright 2006, 2008 Freescale Semiconductor Inc. All rights reserved + * + * Neither the name of Freescale Semiconductor, Inc nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * Freescale hereby publishes it under the following licenses: + * + * BSD License + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * GNU General Public License, version 2 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + * + * You may select the license of your choice. + *------------------------------------------------------------------ + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "MPC8555CDS"; + compatible = "MPC8555CDS", "MPC85xxCDS"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + serial0 = &serial0; + serial1 = &serial1; + pci0 = &pci0; + pci1 = &pci1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8555@0 { + device_type = "cpu"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; // 33 MHz, from uboot + bus-frequency = <0>; // 166 MHz + clock-frequency = <0>; // 825 MHz, from uboot + next-level-cache = <&L2>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x10000000>; // 256M at 0x0 + }; + + localbus@e0005000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,lbc", "fsl,elbc"; + reg = <0xe0005000 0x1000>; + interrupts = <19 2>; + interrupt-parent = <&mpic>; + + ranges = <0x0 0x0 0xff800000 0x00800000 + 0x1 0x0 0xff000000 0x00800000 + 0x2 0x0 0xf8000000 0x00008000>; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x00800000>; + bank-width = <2>; + device-width = <1>; + }; + + nor@1,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x1 0x0 0x00800000>; + bank-width = <2>; + device-width = <1>; + }; + + rtc@2,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "dallas,ds1553"; + reg = <0x2 0x0 0x00008000>; + bank-width = <1>; + device-width = <1>; + }; + }; + + soc8555@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + ranges = <0x0 0xe0000000 0x100000>; + bus-frequency = <0>; + + ecm-law@0 { + compatible = "fsl,ecm-law"; + reg = <0x0 0x1000>; + fsl,num-laws = <8>; + }; + + ecm@1000 { + compatible = "fsl,mpc8555-ecm", "fsl,ecm"; + reg = <0x1000 0x1000>; + interrupts = <17 2>; + interrupt-parent = <&mpic>; + }; + + memory-controller@2000 { + compatible = "fsl,8555-memory-controller"; + reg = <0x2000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <18 2>; + }; + + L2: l2-cache-controller@20000 { + compatible = "fsl,8555-l2-cache-controller"; + reg = <0x20000 0x1000>; + cache-line-size = <32>; // 32 bytes + cache-size = <0x40000>; // L2, 256K + interrupt-parent = <&mpic>; + interrupts = <16 2>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <43 2>; + interrupt-parent = <&mpic>; + dfsrr; + }; + + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8555-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8555-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8555-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8555-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + + enet0: ethernet@24000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <0>; + device_type = "network"; + model = "TSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + ranges = <0x0 0x24000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <29 2 30 2 34 2>; + interrupt-parent = <&mpic>; + tbi-handle = <&tbi0>; + phy-handle = <&phy0>; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x520 0x20>; + + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; + interrupts = <5 1>; + reg = <0x0>; + device_type = "ethernet-phy"; + }; + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; + interrupts = <5 1>; + reg = <0x1>; + device_type = "ethernet-phy"; + }; + tbi0: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + }; + + enet1: ethernet@25000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <1>; + device_type = "network"; + model = "TSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + ranges = <0x0 0x25000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <35 2 36 2 40 2>; + interrupt-parent = <&mpic>; + tbi-handle = <&tbi1>; + phy-handle = <&phy1>; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x520 0x20>; + + tbi1: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; // reg base, size + clock-frequency = <0>; // should we fill in in uboot? + interrupts = <42 2>; + interrupt-parent = <&mpic>; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; // reg base, size + clock-frequency = <0>; // should we fill in in uboot? + interrupts = <42 2>; + interrupt-parent = <&mpic>; + }; + + crypto@30000 { + compatible = "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x7e>; + fsl,descriptor-types-mask = <0x01010ebf>; + }; + + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x40000 0x40000>; + compatible = "chrp,open-pic"; + device_type = "open-pic"; + }; + + cpm@80000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8555-cpm", "fsl,cpm2"; + reg = <0x80000 0x20000>; + interrupts = <46 2>; + interrupt-parent = <&mpic>; + }; + }; + + pci0: pci@e0008000 { + interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; + interrupt-map = < + + /* IDSEL 0x10 */ + 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1 + 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 + 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 + 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1 + + /* IDSEL 0x11 */ + 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1 + 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 + 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 + 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1 + + /* IDSEL 0x12 (Slot 1) */ + 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1 + 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 + 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 + 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1 + + /* IDSEL 0x13 (Slot 2) */ + 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1 + 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1 + 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1 + 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1 + + /* IDSEL 0x14 (Slot 3) */ + 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1 + 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1 + 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1 + 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1 + + /* IDSEL 0x15 (Slot 4) */ + 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1 + 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1 + 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1 + 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1 + + /* Bus 1 (Tundra Bridge) */ + /* IDSEL 0x12 (ISA bridge) */ + 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1 + 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1 + 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1 + 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>; + interrupt-parent = <&mpic>; + interrupts = <24 2>; + bus-range = <0 0>; + ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x10000000 + 0x1000000 0x0 0x0 0xfee00000 0x0 0x00010000>; + clock-frequency = <66666666>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xe0008000 0x1000>; + compatible = "fsl,mpc8540-pci"; + device_type = "pci"; + + i8259@19000 { + interrupt-controller; + device_type = "interrupt-controller"; + reg = <0x19000 0x0 0x0 0x0 0x1>; + #address-cells = <0>; + #interrupt-cells = <2>; + compatible = "chrp,iic"; + interrupts = <1>; + interrupt-parent = <&pci0>; + }; + }; + + pci1: pci@e0009000 { + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + + /* IDSEL 0x15 */ + 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 + 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1 + 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1 + 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>; + interrupt-parent = <&mpic>; + interrupts = <25 2>; + bus-range = <0 0>; + ranges = <0x2000000 0x0 0x90000000 0x90000000 0x0 0x10000000 + 0x1000000 0x0 0x0 0xfee10000 0x0 0x00010000>; + clock-frequency = <66666666>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xe0009000 0x1000>; + compatible = "fsl,mpc8540-pci"; + device_type = "pci"; + }; +}; Property changes on: head/sys/dts/powerpc/mpc8555cds.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/powerpc/mpc8572ds.dts =================================================================== --- head/sys/dts/powerpc/mpc8572ds.dts (nonexistent) +++ head/sys/dts/powerpc/mpc8572ds.dts (revision 325826) @@ -0,0 +1,895 @@ +/* + * MPC8572 DS Device Tree Source + * + * Copyright 2007-2009 Freescale Semiconductor Inc. All rights reserved + * + * Neither the name of Freescale Semiconductor, Inc nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * Freescale hereby publishes it under the following licenses: + * + * BSD License + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * GNU General Public License, version 2 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + * + * You may select the license of your choice. + *------------------------------------------------------------------ + * + * $FreeBSD$ + */ + +/dts-v1/; +/ { + model = "fsl,MPC8572DS"; + compatible = "fsl,MPC8572DS"; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + ethernet3 = &enet3; + serial0 = &serial0; + serial1 = &serial1; + pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8572@0 { + device_type = "cpu"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + next-level-cache = <&L2>; + }; + + PowerPC,8572@1 { + device_type = "cpu"; + reg = <0x1>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + next-level-cache = <&L2>; + }; + }; + + memory { + device_type = "memory"; + }; + + localbus@ffe05000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; + reg = <0 0xffe05000 0 0x1000>; + interrupts = <19 2>; + interrupt-parent = <&mpic>; + + ranges = <0x0 0x0 0x0 0xe8000000 0x08000000>; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x8000000>; + bank-width = <2>; + device-width = <1>; + + partition@0 { + reg = <0x0 0x03000000>; + label = "ramdisk-nor"; + read-only; + }; + + partition@3000000 { + reg = <0x03000000 0x00e00000>; + label = "diagnostic-nor"; + read-only; + }; + + partition@3e00000 { + reg = <0x03e00000 0x00200000>; + label = "dink-nor"; + read-only; + }; + + partition@4000000 { + reg = <0x04000000 0x00400000>; + label = "kernel-nor"; + read-only; + }; + + partition@4400000 { + reg = <0x04400000 0x03b00000>; + label = "jffs2-nor"; + }; + + partition@7f00000 { + reg = <0x07f00000 0x00080000>; + label = "dtb-nor"; + read-only; + }; + + partition@7f80000 { + reg = <0x07f80000 0x00080000>; + label = "u-boot-nor"; + read-only; + }; + }; + + nand@2,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8572-fcm-nand", + "fsl,elbc-fcm-nand"; + reg = <0x2 0x0 0x40000>; + + partition@0 { + reg = <0x0 0x02000000>; + label = "u-boot-nand"; + read-only; + }; + + partition@2000000 { + reg = <0x02000000 0x10000000>; + label = "jffs2-nand"; + }; + + partition@12000000 { + reg = <0x12000000 0x08000000>; + label = "ramdisk-nand"; + read-only; + }; + + partition@1a000000 { + reg = <0x1a000000 0x04000000>; + label = "kernel-nand"; + }; + + partition@1e000000 { + reg = <0x1e000000 0x01000000>; + label = "dtb-nand"; + read-only; + }; + + partition@1f000000 { + reg = <0x1f000000 0x21000000>; + label = "reserved-nand"; + }; + }; + + nand@4,0 { + compatible = "fsl,mpc8572-fcm-nand", + "fsl,elbc-fcm-nand"; + reg = <0x4 0x0 0x40000>; + }; + + nand@5,0 { + compatible = "fsl,mpc8572-fcm-nand", + "fsl,elbc-fcm-nand"; + reg = <0x5 0x0 0x40000>; + }; + + nand@6,0 { + compatible = "fsl,mpc8572-fcm-nand", + "fsl,elbc-fcm-nand"; + reg = <0x6 0x0 0x40000>; + }; + }; + + soc8572@ffe00000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + ranges = <0x0 0 0xffe00000 0x100000>; + bus-frequency = <0>; // Filled out by uboot. + + ecm-law@0 { + compatible = "fsl,ecm-law"; + reg = <0x0 0x1000>; + fsl,num-laws = <12>; + }; + + ecm@1000 { + compatible = "fsl,mpc8572-ecm", "fsl,ecm"; + reg = <0x1000 0x1000>; + interrupts = <17 2>; + interrupt-parent = <&mpic>; + }; + + memory-controller@2000 { + compatible = "fsl,mpc8572-memory-controller"; + reg = <0x2000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <18 2>; + }; + + memory-controller@6000 { + compatible = "fsl,mpc8572-memory-controller"; + reg = <0x6000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <18 2>; + }; + + L2: l2-cache-controller@20000 { + compatible = "fsl,mpc8572-l2-cache-controller"; + reg = <0x20000 0x1000>; + cache-line-size = <32>; // 32 bytes + cache-size = <0x100000>; // L2, 1M + interrupt-parent = <&mpic>; + interrupts = <16 2>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <43 2>; + interrupt-parent = <&mpic>; + dfsrr; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <43 2>; + interrupt-parent = <&mpic>; + dfsrr; + }; + + dma@c300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; + reg = <0xc300 0x4>; + ranges = <0x0 0xc100 0x200>; + cell-index = <1>; + dma-channel@0 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <76 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <77 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <78 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <79 2>; + }; + }; + + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + + ptp_timer: ptimer@24e00 { + compatible = "fsl,gianfar-ptp-timer"; + reg = <0x24e00 0xb0>; + }; + + enet0: ethernet@24000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <0>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + ranges = <0x0 0x24000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <29 2 30 2 34 2>; + interrupt-parent = <&mpic>; + tbi-handle = <&tbi0>; + phy-handle = <&phy0>; + ptimer-handle = < &ptp_timer >; + phy-connection-type = "rgmii-id"; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x520 0x20>; + + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; + interrupts = <10 1>; + reg = <0x0>; + }; + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; + interrupts = <10 1>; + reg = <0x1>; + }; + phy2: ethernet-phy@2 { + interrupt-parent = <&mpic>; + interrupts = <10 1>; + reg = <0x2>; + }; + phy3: ethernet-phy@3 { + interrupt-parent = <&mpic>; + interrupts = <10 1>; + reg = <0x3>; + }; + + tbi0: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + }; + + enet1: ethernet@25000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + ranges = <0x0 0x25000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <35 2 36 2 40 2>; + interrupt-parent = <&mpic>; + tbi-handle = <&tbi1>; + phy-handle = <&phy1>; + ptimer-handle = < &ptp_timer >; + phy-connection-type = "rgmii-id"; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x520 0x20>; + + tbi1: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + }; + + enet2: ethernet@26000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <2>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x26000 0x1000>; + ranges = <0x0 0x26000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <31 2 32 2 33 2>; + interrupt-parent = <&mpic>; + tbi-handle = <&tbi2>; + phy-handle = <&phy2>; + ptimer-handle = < &ptp_timer >; + phy-connection-type = "rgmii-id"; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x520 0x20>; + + tbi2: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + }; + + enet3: ethernet@27000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <3>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x27000 0x1000>; + ranges = <0x0 0x27000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <37 2 38 2 39 2>; + interrupt-parent = <&mpic>; + tbi-handle = <&tbi3>; + phy-handle = <&phy3>; + phy-connection-type = "rgmii-id"; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x520 0x20>; + + tbi3: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <0>; + interrupts = <42 2>; + interrupt-parent = <&mpic>; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <0>; + interrupts = <42 2>; + interrupt-parent = <&mpic>; + }; + + global-utilities@e0000 { //global utilities block + compatible = "fsl,mpc8572-guts"; + reg = <0xe0000 0x1000>; + fsl,has-rstcr; + }; + + power@e0070{ + compatible = "fsl,mpc8548-pmc"; + reg = <0xe0070 0x14>; + }; + + timer@41100 { + compatible = "fsl,mpic-global-timer"; + reg = <0x41100 0x204>; + interrupts = <0xf7 0x2>; + interrupt-parent = <&mpic>; + }; + + msi@41600 { + compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; + reg = <0x41600 0x80>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 + 0xe1 0 + 0xe2 0 + 0xe3 0 + 0xe4 0 + 0xe5 0 + 0xe6 0 + 0xe7 0>; + interrupt-parent = <&mpic>; + }; + + crypto@30000 { + compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", + "fsl,sec2.1", "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2 58 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x9fe>; + fsl,descriptor-types-mask = <0x3ab0ebf>; + }; + + /* PME (pattern-matcher) */ + pme@10000 { + device_type = "pme"; + compatible = "pme8572"; + reg = <0x10000 0x5000>; + interrupts = <0x39 0x2 0x40 0x2 0x41 0x2 0x42 0x2 0x43 0x2>; + interrupt-parent = <&mpic>; + }; + + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x40000 0x40000>; + compatible = "chrp,open-pic"; + device_type = "open-pic"; + }; + }; + + pci0: pcie@ffe08000 { + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0 0xffe08000 0 0x1000>; + bus-range = <0 255>; + ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000 + 0x1000000 0x0 0x00000000 0 0xfee20000 0x0 0x00010000>; + clock-frequency = <33333333>; + interrupt-parent = <&mpic>; + interrupts = <24 2>; + interrupt-map-mask = <0xff00 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x11 func 0 - PCI slot 1 */ + 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 + 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 + 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 + 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 + + /* IDSEL 0x11 func 1 - PCI slot 1 */ + 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 + 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 + 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1 + 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1 + + /* IDSEL 0x11 func 2 - PCI slot 1 */ + 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 + 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1 + 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1 + 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1 + + /* IDSEL 0x11 func 3 - PCI slot 1 */ + 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1 + 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1 + 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1 + 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1 + + /* IDSEL 0x11 func 4 - PCI slot 1 */ + 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1 + 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1 + 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1 + 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1 + + /* IDSEL 0x11 func 5 - PCI slot 1 */ + 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1 + 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1 + 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1 + 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1 + + /* IDSEL 0x11 func 6 - PCI slot 1 */ + 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1 + 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1 + 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1 + 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1 + + /* IDSEL 0x11 func 7 - PCI slot 1 */ + 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1 + 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1 + 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1 + 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1 + + /* IDSEL 0x12 func 0 - PCI slot 2 */ + 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 + 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 + 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1 + 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1 + + /* IDSEL 0x12 func 1 - PCI slot 2 */ + 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1 + 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1 + 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1 + 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1 + + /* IDSEL 0x12 func 2 - PCI slot 2 */ + 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1 + 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1 + 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1 + 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1 + + /* IDSEL 0x12 func 3 - PCI slot 2 */ + 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1 + 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1 + 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1 + 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1 + + /* IDSEL 0x12 func 4 - PCI slot 2 */ + 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1 + 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1 + 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1 + 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1 + + /* IDSEL 0x12 func 5 - PCI slot 2 */ + 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1 + 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1 + 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1 + 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1 + + /* IDSEL 0x12 func 6 - PCI slot 2 */ + 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1 + 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1 + 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1 + 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1 + + /* IDSEL 0x12 func 7 - PCI slot 2 */ + 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1 + 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1 + 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1 + 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1 + + // IDSEL 0x1c USB + 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2 + 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2 + 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2 + 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2 + + // IDSEL 0x1d Audio + 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 + + // IDSEL 0x1e Legacy + 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 + 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 + + // IDSEL 0x1f IDE/SATA + 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 + 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 + + >; + + pcie@0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x2000000 0x0 0xa0000000 + 0x2000000 0x0 0xa0000000 + 0x0 0x10000000 + + 0x1000000 0x0 0x0 + 0x1000000 0x0 0x0 + 0x0 0x10000>; + uli1575@0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + #size-cells = <2>; + #address-cells = <3>; + ranges = <0x2000000 0x0 0xa0000000 + 0x2000000 0x0 0xa0000000 + 0x0 0x10000000 + + 0x1000000 0x0 0x0 + 0x1000000 0x0 0x0 + 0x0 0x10000>; + isa@1e { + device_type = "isa"; + #interrupt-cells = <2>; + #size-cells = <1>; + #address-cells = <2>; + reg = <0xf000 0x0 0x0 0x0 0x0>; + ranges = <0x1 0x0 0x1000000 0x0 0x0 + 0x1000>; + interrupt-parent = <&i8259>; + + i8259: interrupt-controller@20 { + reg = <0x1 0x20 0x2 + 0x1 0xa0 0x2 + 0x1 0x4d0 0x2>; + interrupt-controller; + device_type = "interrupt-controller"; + #address-cells = <0>; + #interrupt-cells = <2>; + compatible = "chrp,iic"; + interrupts = <9 2>; + interrupt-parent = <&mpic>; + }; + + i8042@60 { + #size-cells = <0>; + #address-cells = <1>; + reg = <0x1 0x60 0x1 0x1 0x64 0x1>; + interrupts = <1 3 12 3>; + interrupt-parent = + <&i8259>; + + keyboard@0 { + reg = <0x0>; + compatible = "pnpPNP,303"; + }; + + mouse@1 { + reg = <0x1>; + compatible = "pnpPNP,f03"; + }; + }; + + rtc@70 { + compatible = "pnpPNP,b00"; + reg = <0x1 0x70 0x2>; + }; + + gpio@400 { + reg = <0x1 0x400 0x80>; + }; + }; + }; + }; + + }; + + pci1: pcie@ffe09000 { + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0 0xffe09000 0 0x1000>; + bus-range = <0 255>; + ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000 + 0x1000000 0x0 0x00000000 0 0xfee10000 0x0 0x00010000>; + clock-frequency = <33333333>; + interrupt-parent = <&mpic>; + interrupts = <25 2>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0x0 0x0 0x1 &mpic 0x4 0x1 + 0000 0x0 0x0 0x2 &mpic 0x5 0x1 + 0000 0x0 0x0 0x3 &mpic 0x6 0x1 + 0000 0x0 0x0 0x4 &mpic 0x7 0x1 + >; + pcie@0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x2000000 0x0 0x90000000 + 0x2000000 0x0 0x90000000 + 0x0 0x10000000 + + 0x1000000 0x0 0x0 + 0x1000000 0x0 0x0 + 0x0 0x10000>; + }; + }; + + pci2: pcie@ffe0a000 { + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0 0xffe0a000 0 0x1000>; + bus-range = <0 255>; + ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000 + 0x1000000 0x0 0x00000000 0 0xfee00000 0x0 0x00010000>; + clock-frequency = <33333333>; + interrupt-parent = <&mpic>; + interrupts = <26 2>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0x0 0x0 0x1 &mpic 0x0 0x1 + 0000 0x0 0x0 0x2 &mpic 0x1 0x1 + 0000 0x0 0x0 0x3 &mpic 0x2 0x1 + 0000 0x0 0x0 0x4 &mpic 0x3 0x1 + >; + pcie@0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x2000000 0x0 0x80000000 + 0x2000000 0x0 0x80000000 + 0x0 0x10000000 + + 0x1000000 0x0 0x0 + 0x1000000 0x0 0x0 + 0x0 0x10000>; + }; + }; +}; Property changes on: head/sys/dts/powerpc/mpc8572ds.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/powerpc/p1020rdb.dts =================================================================== --- head/sys/dts/powerpc/p1020rdb.dts (nonexistent) +++ head/sys/dts/powerpc/p1020rdb.dts (revision 325826) @@ -0,0 +1,627 @@ +/* + * P1020 RDB Device Tree Source + * + * Copyright 2009 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* $FreeBSD$ */ + +/dts-v1/; + +/ { + model = "fsl,P1020"; + compatible = "fsl,P1020RDB"; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + pci0 = &pci0; + pci1 = &pci1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,P1020@0 { + device_type = "cpu"; + reg = <0x0>; + next-level-cache = <&L2>; + }; + + PowerPC,P1020@1 { + device_type = "cpu"; + reg = <0x1>; + next-level-cache = <&L2>; + }; + }; + + memory { + device_type = "memory"; + }; + + localbus@ffe05000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus"; + reg = <0 0xffe05000 0 0x1000>; + interrupts = <19 2>; + interrupt-parent = <&mpic>; + + /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ + ranges = <0x0 0x0 0x0 0xef000000 0x01000000 + 0x1 0x0 0x0 0xffa00000 0x00040000 + 0x2 0x0 0x0 0xffb00000 0x00020000>; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x1000000>; + bank-width = <2>; + device-width = <1>; + + partition@0 { + /* This location must not be altered */ + /* 256KB for Vitesse 7385 Switch firmware */ + reg = <0x0 0x00040000>; + label = "NOR (RO) Vitesse-7385 Firmware"; + read-only; + }; + + partition@40000 { + /* 256KB for DTB Image */ + reg = <0x00040000 0x00040000>; + label = "NOR (RO) DTB Image"; + read-only; + }; + + partition@80000 { + /* 3.5 MB for Linux Kernel Image */ + reg = <0x00080000 0x00380000>; + label = "NOR (RO) Linux Kernel Image"; + read-only; + }; + + partition@400000 { + /* 11MB for JFFS2 based Root file System */ + reg = <0x00400000 0x00b00000>; + label = "NOR (RW) JFFS2 Root File System"; + }; + + partition@f00000 { + /* This location must not be altered */ + /* 512KB for u-boot Bootloader Image */ + /* 512KB for u-boot Environment Variables */ + reg = <0x00f00000 0x00100000>; + label = "NOR (RO) U-Boot Image"; + read-only; + }; + }; + + nand@1,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p1020-fcm-nand", + "fsl,elbc-fcm-nand"; + reg = <0x1 0x0 0x40000>; + + partition@0 { + /* This location must not be altered */ + /* 1MB for u-boot Bootloader Image */ + reg = <0x0 0x00100000>; + label = "NAND (RO) U-Boot Image"; + read-only; + }; + + partition@100000 { + /* 1MB for DTB Image */ + reg = <0x00100000 0x00100000>; + label = "NAND (RO) DTB Image"; + read-only; + }; + + partition@200000 { + /* 4MB for Linux Kernel Image */ + reg = <0x00200000 0x00400000>; + label = "NAND (RO) Linux Kernel Image"; + read-only; + }; + + partition@600000 { + /* 4MB for Compressed Root file System Image */ + reg = <0x00600000 0x00400000>; + label = "NAND (RO) Compressed RFS Image"; + read-only; + }; + + partition@a00000 { + /* 7MB for JFFS2 based Root file System */ + reg = <0x00a00000 0x00700000>; + label = "NAND (RW) JFFS2 Root File System"; + }; + + partition@1100000 { + /* 15MB for JFFS2 based Root file System */ + reg = <0x01100000 0x00f00000>; + label = "NAND (RW) Writable User area"; + }; + }; + + L2switch@2,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "vitesse-7385"; + reg = <0x2 0x0 0x20000>; + }; + + }; + + soc@ffe00000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "fsl,p1020-immr", "simple-bus"; + ranges = <0x0 0x0 0xffe00000 0x100000>; + bus-frequency = <0>; // Filled out by uboot. + + ecm-law@0 { + compatible = "fsl,ecm-law"; + reg = <0x0 0x1000>; + fsl,num-laws = <12>; + }; + + ecm@1000 { + compatible = "fsl,p1020-ecm", "fsl,ecm"; + reg = <0x1000 0x1000>; + interrupts = <16 2>; + interrupt-parent = <&mpic>; + }; + + memory-controller@2000 { + compatible = "fsl,p1020-memory-controller"; + reg = <0x2000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <16 2>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <43 2>; + interrupt-parent = <&mpic>; + dfsrr; + rtc@68 { + compatible = "dallas,ds1339"; + reg = <0x68>; + }; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <43 2>; + interrupt-parent = <&mpic>; + dfsrr; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <0>; + interrupts = <42 2>; + interrupt-parent = <&mpic>; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <0>; + interrupts = <42 2>; + interrupt-parent = <&mpic>; + }; + + spi@7000 { + cell-index = <0>; + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,espi"; + reg = <0x7000 0x1000>; + interrupts = <59 0x2>; + interrupt-parent = <&mpic>; + mode = "cpu"; + + fsl_m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,espi-flash"; + reg = <0>; + linux,modalias = "fsl_m25p80"; + modal = "s25sl128b"; + spi-max-frequency = <50000000>; + mode = <0>; + + partition@0 { + /* 512KB for u-boot Bootloader Image */ + reg = <0x0 0x00080000>; + label = "SPI (RO) U-Boot Image"; + read-only; + }; + + partition@80000 { + /* 512KB for DTB Image */ + reg = <0x00080000 0x00080000>; + label = "SPI (RO) DTB Image"; + read-only; + }; + + partition@100000 { + /* 4MB for Linux Kernel Image */ + reg = <0x00100000 0x00400000>; + label = "SPI (RO) Linux Kernel Image"; + read-only; + }; + + partition@500000 { + /* 4MB for Compressed RFS Image */ + reg = <0x00500000 0x00400000>; + label = "SPI (RO) Compressed RFS Image"; + read-only; + }; + + partition@900000 { + /* 7MB for JFFS2 based RFS */ + reg = <0x00900000 0x00700000>; + label = "SPI (RW) JFFS2 RFS"; + }; + }; + }; + + gpio: gpio-controller@f000 { + #gpio-cells = <2>; + compatible = "fsl,mpc8572-gpio"; + reg = <0xf000 0x100>; + interrupts = <47 0x2>; + interrupt-parent = <&mpic>; + gpio-controller; + }; + + L2: l2-cache-controller@20000 { + compatible = "fsl,p1020-l2-cache-controller"; + reg = <0x20000 0x1000>; + cache-line-size = <32>; // 32 bytes + cache-size = <0x40000>; // L2,256K + interrupt-parent = <&mpic>; + interrupts = <16 2>; + }; + + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + + mdio@24000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,etsec2-mdio"; + reg = <0x24000 0x1000 0xb0030 0x4>; + + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; + interrupts = <3 1>; + reg = <0x0>; + }; + + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; + interrupts = <2 1>; + reg = <0x1>; + }; + }; + + mdio@25000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,etsec2-tbi"; + reg = <0x25000 0x1000 0xb1030 0x4>; + + tbi0: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + + enet0: ethernet@b0000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "fsl,etsec2"; + fsl,num_rx_queues = <0x8>; + fsl,num_tx_queues = <0x8>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupt-parent = <&mpic>; + fixed-link = <1 1 1000 0 0>; + phy-connection-type = "rgmii-id"; + + queue-group@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb0000 0x1000>; + interrupts = <29 2 30 2 34 2>; + }; + + queue-group@1 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb4000 0x1000>; + interrupts = <17 2 18 2 24 2>; + }; + }; + + enet1: ethernet@b1000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "fsl,etsec2"; + fsl,num_rx_queues = <0x8>; + fsl,num_tx_queues = <0x8>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupt-parent = <&mpic>; + phy-handle = <&phy0>; + tbi-handle = <&tbi0>; + phy-connection-type = "sgmii"; + + queue-group@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb1000 0x1000>; + interrupts = <35 2 36 2 40 2>; + }; + + queue-group@1 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb5000 0x1000>; + interrupts = <51 2 52 2 67 2>; + }; + }; + + enet2: ethernet@b2000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "fsl,etsec2"; + fsl,num_rx_queues = <0x8>; + fsl,num_tx_queues = <0x8>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupt-parent = <&mpic>; + phy-handle = <&phy1>; + phy-connection-type = "rgmii-id"; + + queue-group@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb2000 0x1000>; + interrupts = <31 2 32 2 33 2>; + }; + + queue-group@1 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb6000 0x1000>; + interrupts = <25 2 26 2 27 2>; + }; + }; + + usb@22000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl-usb2-dr"; + reg = <0x22000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <28 0x2>; + phy_type = "ulpi"; + }; + + /* USB2 is shared with localbus, so it must be disabled + by default. We can't put 'status = "disabled";' here + since U-Boot doesn't clear the status property when + it enables USB2. OTOH, U-Boot does create a new node + when there isn't any. So, just comment it out. + usb@23000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl-usb2-dr"; + reg = <0x23000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <46 0x2>; + phy_type = "ulpi"; + }; + */ + + sdhci@2e000 { + compatible = "fsl,p1020-esdhc", "fsl,esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <72 0x2>; + interrupt-parent = <&mpic>; + /* Filled in by U-Boot */ + clock-frequency = <0>; + }; + + crypto@30000 { + compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4", + "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2 58 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0xbfe>; + fsl,descriptor-types-mask = <0x3ab0ebf>; + }; + + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x40000 0x40000>; + compatible = "chrp,open-pic"; + device_type = "open-pic"; + }; + + msi@41600 { + compatible = "fsl,p1020-msi", "fsl,mpic-msi"; + reg = <0x41600 0x80>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 + 0xe1 0 + 0xe2 0 + 0xe3 0 + 0xe4 0 + 0xe5 0 + 0xe6 0 + 0xe7 0>; + interrupt-parent = <&mpic>; + }; + + global-utilities@e0000 { //global utilities block + compatible = "fsl,p1020-guts"; + reg = <0xe0000 0x1000>; + fsl,has-rstcr; + }; + }; + + pci0: pcie@ffe09000 { + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0 0xffe09000 0 0x1000>; + bus-range = <0 255>; + ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>; + clock-frequency = <33333333>; + interrupt-parent = <&mpic>; + interrupts = <16 2>; + pcie@0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x2000000 0x0 0xa0000000 + 0x2000000 0x0 0xa0000000 + 0x0 0x20000000 + + 0x1000000 0x0 0x0 + 0x1000000 0x0 0x0 + 0x0 0x100000>; + }; + }; + + pci1: pcie@ffe0a000 { + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0 0xffe0a000 0 0x1000>; + bus-range = <0 255>; + ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; + clock-frequency = <33333333>; + interrupt-parent = <&mpic>; + interrupts = <16 2>; + pcie@0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x2000000 0x0 0xc0000000 + 0x2000000 0x0 0xc0000000 + 0x0 0x20000000 + + 0x1000000 0x0 0x0 + 0x1000000 0x0 0x0 + 0x0 0x100000>; + }; + }; +}; Property changes on: head/sys/dts/powerpc/p1020rdb.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/powerpc/p2020ds.dts =================================================================== --- head/sys/dts/powerpc/p2020ds.dts (nonexistent) +++ head/sys/dts/powerpc/p2020ds.dts (revision 325826) @@ -0,0 +1,754 @@ +/* + * P2020 DS Device Tree Source + * + * Copyright 2009 Freescale Semiconductor Inc. + * + * Neither the name of Freescale Semiconductor, Inc nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * Freescale hereby publishes it under the following licenses: + * + * BSD License + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * GNU General Public License, version 2 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + * + * You may select the license of your choice. + *------------------------------------------------------------------ + */ +/* $FreeBSD$ */ + +/dts-v1/; +/ { + model = "fsl,P2020"; + compatible = "fsl,P2020DS"; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + serial0 = &serial0; + serial1 = &serial1; + pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,P2020@0 { + device_type = "cpu"; + reg = <0x0>; + next-level-cache = <&L2>; + }; + + PowerPC,P2020@1 { + device_type = "cpu"; + reg = <0x1>; + next-level-cache = <&L2>; + }; + }; + + memory { + device_type = "memory"; + }; + + localbus@ffe05000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,elbc", "simple-bus"; + reg = <0 0xffe05000 0 0x1000>; + interrupts = <19 2>; + interrupt-parent = <&mpic>; + + ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 + 0x1 0x0 0x0 0xe0000000 0x08000000 + 0x2 0x0 0x0 0xffa00000 0x00040000 + 0x3 0x0 0x0 0xffdf0000 0x00008000 + 0x4 0x0 0x0 0xffa40000 0x00040000 + 0x5 0x0 0x0 0xffa80000 0x00040000 + 0x6 0x0 0x0 0xffac0000 0x00040000>; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x8000000>; + bank-width = <2>; + device-width = <1>; + + ramdisk@0 { + reg = <0x0 0x03000000>; + read-only; + }; + + diagnostic@3000000 { + reg = <0x03000000 0x00e00000>; + read-only; + }; + + dink@3e00000 { + reg = <0x03e00000 0x00200000>; + read-only; + }; + + kernel@4000000 { + reg = <0x04000000 0x00400000>; + read-only; + }; + + jffs2@4400000 { + reg = <0x04400000 0x03b00000>; + }; + + dtb@7f00000 { + reg = <0x07f00000 0x00080000>; + read-only; + }; + + u-boot@7f80000 { + reg = <0x07f80000 0x00080000>; + read-only; + }; + }; + + nand@2,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,elbc-fcm-nand"; + reg = <0x2 0x0 0x40000>; + + u-boot@0 { + reg = <0x0 0x02000000>; + read-only; + }; + + jffs2@2000000 { + reg = <0x02000000 0x10000000>; + }; + + ramdisk@12000000 { + reg = <0x12000000 0x08000000>; + read-only; + }; + + kernel@1a000000 { + reg = <0x1a000000 0x04000000>; + }; + + dtb@1e000000 { + reg = <0x1e000000 0x01000000>; + read-only; + }; + + empty@1f000000 { + reg = <0x1f000000 0x21000000>; + }; + }; + + nand@4,0 { + compatible = "fsl,elbc-fcm-nand"; + reg = <0x4 0x0 0x40000>; + }; + + nand@5,0 { + compatible = "fsl,elbc-fcm-nand"; + reg = <0x5 0x0 0x40000>; + }; + + nand@6,0 { + compatible = "fsl,elbc-fcm-nand"; + reg = <0x6 0x0 0x40000>; + }; + }; + + soc@ffe00000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "fsl,p2020-immr", "simple-bus"; + ranges = <0x0 0 0xffe00000 0x100000>; + bus-frequency = <0>; // Filled out by uboot. + + ecm-law@0 { + compatible = "fsl,ecm-law"; + reg = <0x0 0x1000>; + fsl,num-laws = <12>; + }; + + ecm@1000 { + compatible = "fsl,p2020-ecm", "fsl,ecm"; + reg = <0x1000 0x1000>; + interrupts = <17 2>; + interrupt-parent = <&mpic>; + }; + + memory-controller@2000 { + compatible = "fsl,p2020-memory-controller"; + reg = <0x2000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <18 2>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <43 2>; + interrupt-parent = <&mpic>; + dfsrr; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <43 2>; + interrupt-parent = <&mpic>; + dfsrr; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <0>; + interrupts = <42 2>; + interrupt-parent = <&mpic>; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <0>; + interrupts = <42 2>; + interrupt-parent = <&mpic>; + }; + + spi@7000 { + compatible = "fsl,espi"; + reg = <0x7000 0x1000>; + interrupts = <59 0x2>; + interrupt-parent = <&mpic>; + }; + + dma@c300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,eloplus-dma"; + reg = <0xc300 0x4>; + ranges = <0x0 0xc100 0x200>; + cell-index = <1>; + dma-channel@0 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <76 2>; + }; + dma-channel@80 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <77 2>; + }; + dma-channel@100 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <78 2>; + }; + dma-channel@180 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <79 2>; + }; + }; + + gpio: gpio-controller@f000 { + #gpio-cells = <2>; + compatible = "fsl,mpc8572-gpio"; + reg = <0xf000 0x100>; + interrupts = <47 0x2>; + interrupt-parent = <&mpic>; + gpio-controller; + }; + + L2: l2-cache-controller@20000 { + compatible = "fsl,p2020-l2-cache-controller"; + reg = <0x20000 0x1000>; + cache-line-size = <32>; // 32 bytes + cache-size = <0x80000>; // L2, 512k + interrupt-parent = <&mpic>; + interrupts = <16 2>; + }; + + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + + usb@22000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl-usb2-dr"; + reg = <0x22000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <28 0x2>; + phy_type = "ulpi"; + }; + + enet0: ethernet@24000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <0>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + ranges = <0x0 0x24000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <29 2 30 2 34 2>; + interrupt-parent = <&mpic>; + tbi-handle = <&tbi0>; + phy-handle = <&phy0>; + phy-connection-type = "rgmii-id"; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x520 0x20>; + + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; + interrupts = <3 1>; + reg = <0x0>; + }; + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; + interrupts = <3 1>; + reg = <0x1>; + }; + phy2: ethernet-phy@2 { + interrupt-parent = <&mpic>; + interrupts = <3 1>; + reg = <0x2>; + }; + tbi0: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + }; + + enet1: ethernet@25000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + ranges = <0x0 0x25000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <35 2 36 2 40 2>; + interrupt-parent = <&mpic>; + tbi-handle = <&tbi1>; + phy-handle = <&phy1>; + phy-connection-type = "rgmii-id"; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x520 0x20>; + + tbi1: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + }; + + enet2: ethernet@26000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <2>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x26000 0x1000>; + ranges = <0x0 0x26000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <31 2 32 2 33 2>; + interrupt-parent = <&mpic>; + tbi-handle = <&tbi2>; + phy-handle = <&phy2>; + phy-connection-type = "rgmii-id"; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x520 0x20>; + + tbi2: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + }; + + sdhci@2e000 { + compatible = "fsl,p2020-esdhc", "fsl,esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <72 0x2>; + interrupt-parent = <&mpic>; + /* Filled in by U-Boot */ + clock-frequency = <0>; + }; + + crypto@30000 { + compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4", + "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2 58 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0xbfe>; + fsl,descriptor-types-mask = <0x3ab0ebf>; + }; + + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x40000 0x40000>; + compatible = "chrp,open-pic"; + device_type = "open-pic"; + }; + + msi@41600 { + compatible = "fsl,mpic-msi"; + reg = <0x41600 0x80>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 + 0xe1 0 + 0xe2 0 + 0xe3 0 + 0xe4 0 + 0xe5 0 + 0xe6 0 + 0xe7 0>; + interrupt-parent = <&mpic>; + }; + + global-utilities@e0000 { //global utilities block + compatible = "fsl,p2020-guts"; + reg = <0xe0000 0x1000>; + fsl,has-rstcr; + }; + }; + + pci0: pcie@ffe08000 { + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0 0xffe08000 0 0x1000>; + bus-range = <0 255>; + ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; + clock-frequency = <33333333>; + interrupt-parent = <&mpic>; + interrupts = <24 2>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0x0 0x0 0x1 &mpic 0x8 0x1 + 0000 0x0 0x0 0x2 &mpic 0x9 0x1 + 0000 0x0 0x0 0x3 &mpic 0xa 0x1 + 0000 0x0 0x0 0x4 &mpic 0xb 0x1 + >; + pcie@0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x2000000 0x0 0x80000000 + 0x2000000 0x0 0x80000000 + 0x0 0x20000000 + + 0x1000000 0x0 0x0 + 0x1000000 0x0 0x0 + 0x0 0x10000>; + }; + }; + + pci1: pcie@ffe09000 { + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0 0xffe09000 0 0x1000>; + bus-range = <0 255>; + ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; + clock-frequency = <33333333>; + interrupt-parent = <&mpic>; + interrupts = <25 2>; + interrupt-map-mask = <0xff00 0x0 0x0 0x7>; + interrupt-map = < + + // IDSEL 0x11 func 0 - PCI slot 1 + 0x8800 0x0 0x0 0x1 &i8259 0x9 0x2 + 0x8800 0x0 0x0 0x2 &i8259 0xa 0x2 + + // IDSEL 0x11 func 1 - PCI slot 1 + 0x8900 0x0 0x0 0x1 &i8259 0x9 0x2 + 0x8900 0x0 0x0 0x2 &i8259 0xa 0x2 + + // IDSEL 0x11 func 2 - PCI slot 1 + 0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2 + 0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2 + + // IDSEL 0x11 func 3 - PCI slot 1 + 0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2 + 0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2 + + // IDSEL 0x11 func 4 - PCI slot 1 + 0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2 + 0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2 + + // IDSEL 0x11 func 5 - PCI slot 1 + 0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2 + 0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2 + + // IDSEL 0x11 func 6 - PCI slot 1 + 0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2 + 0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2 + + // IDSEL 0x11 func 7 - PCI slot 1 + 0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2 + 0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2 + + // IDSEL 0x1d Audio + 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 + + // IDSEL 0x1e Legacy + 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 + 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 + + // IDSEL 0x1f IDE/SATA + 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 + 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 + >; + + pcie@0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x2000000 0x0 0xa0000000 + 0x2000000 0x0 0xa0000000 + 0x0 0x20000000 + + 0x1000000 0x0 0x0 + 0x1000000 0x0 0x0 + 0x0 0x10000>; + uli1575@0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + #size-cells = <2>; + #address-cells = <3>; + ranges = <0x2000000 0x0 0xa0000000 + 0x2000000 0x0 0xa0000000 + 0x0 0x20000000 + + 0x1000000 0x0 0x0 + 0x1000000 0x0 0x0 + 0x0 0x10000>; + isa@1e { + device_type = "isa"; + #interrupt-cells = <2>; + #size-cells = <1>; + #address-cells = <2>; + reg = <0xf000 0x0 0x0 0x0 0x0>; + ranges = <0x1 0x0 0x1000000 0x0 0x0 + 0x1000>; + interrupt-parent = <&i8259>; + + i8259: interrupt-controller@20 { + reg = <0x1 0x20 0x2 + 0x1 0xa0 0x2 + 0x1 0x4d0 0x2>; + interrupt-controller; + device_type = "interrupt-controller"; + #address-cells = <0>; + #interrupt-cells = <2>; + compatible = "chrp,iic"; + interrupts = <4 1>; + interrupt-parent = <&mpic>; + }; + + i8042@60 { + #size-cells = <0>; + #address-cells = <1>; + reg = <0x1 0x60 0x1 0x1 0x64 0x1>; + interrupts = <1 3 12 3>; + interrupt-parent = + <&i8259>; + + keyboard@0 { + reg = <0x0>; + compatible = "pnpPNP,303"; + }; + + mouse@1 { + reg = <0x1>; + compatible = "pnpPNP,f03"; + }; + }; + + rtc@70 { + compatible = "pnpPNP,b00"; + reg = <0x1 0x70 0x2>; + }; + + gpio@400 { + reg = <0x1 0x400 0x80>; + }; + }; + }; + }; + + }; + + pci2: pcie@ffe0a000 { + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0 0xffe0a000 0 0x1000>; + bus-range = <0 255>; + ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; + clock-frequency = <33333333>; + interrupt-parent = <&mpic>; + interrupts = <26 2>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0x0 0x0 0x1 &mpic 0x0 0x1 + 0000 0x0 0x0 0x2 &mpic 0x1 0x1 + 0000 0x0 0x0 0x3 &mpic 0x2 0x1 + 0000 0x0 0x0 0x4 &mpic 0x3 0x1 + >; + pcie@0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x2000000 0x0 0xc0000000 + 0x2000000 0x0 0xc0000000 + 0x0 0x20000000 + + 0x1000000 0x0 0x0 + 0x1000000 0x0 0x0 + 0x0 0x10000>; + }; + }; +}; Property changes on: head/sys/dts/powerpc/p2020ds.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/powerpc/p2041rdb.dts =================================================================== --- head/sys/dts/powerpc/p2041rdb.dts (nonexistent) +++ head/sys/dts/powerpc/p2041rdb.dts (revision 325826) @@ -0,0 +1,449 @@ +/* + * P2041RDB Device Tree Source + * + * Copyright 2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* $FreeBSD$ */ + +/include/ "p2041si.dtsi" + +/ { + model = "fsl,P2041RDB"; + compatible = "fsl,P2041RDB"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + aliases { + phy_rgmii_0 = &phy_rgmii_0; + phy_rgmii_1 = &phy_rgmii_1; + phy_sgmii_2 = &phy_sgmii_2; + phy_sgmii_3 = &phy_sgmii_3; + phy_sgmii_4 = &phy_sgmii_4; + phy_sgmii_1c = &phy_sgmii_1c; + phy_sgmii_1d = &phy_sgmii_1d; + phy_sgmii_1e = &phy_sgmii_1e; + phy_sgmii_1f = &phy_sgmii_1f; + phy_xgmii_2 = &phy_xgmii_2; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000 0x80000000>; + }; + + dcsr: dcsr@f00000000 { + ranges = <0x00000000 0xf 0x00000000 0x01008000>; + }; + + bman-portals@ff4000000 { + bman-portal@0 { + cpu-handle = <&cpu0>; + }; + bman-portal@4000 { + cpu-handle = <&cpu1>; + }; + bman-portal@8000 { + cpu-handle = <&cpu2>; + }; + bman-portal@c000 { + cpu-handle = <&cpu3>; + }; + bman-portal@10000 { + }; + bman-portal@14000 { + }; + bman-portal@18000 { + }; + bman-portal@1c000 { + }; + bman-portal@20000 { + }; + bman-portal@24000 { + }; + + buffer-pool@0 { + compatible = "fsl,p2041-bpool", "fsl,bpool"; + fsl,bpid = <0>; + fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; + }; + }; + + qman-portals@ff4200000 { + qportal0: qman-portal@0 { + cpu-handle = <&cpu0>; + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal1: qman-portal@4000 { + cpu-handle = <&cpu1>; + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal2: qman-portal@8000 { + cpu-handle = <&cpu2>; + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal3: qman-portal@c000 { + cpu-handle = <&cpu3>; + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal4: qman-portal@10000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal5: qman-portal@14000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal6: qman-portal@18000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal7: qman-portal@1c000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal8: qman-portal@20000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal9: qman-portal@24000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + }; + + soc: soc@ffe000000 { + spi@110000 { + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25sl12801"; + reg = <0>; + spi-max-frequency = <40000000>; /* input clock */ + partition@u-boot { + label = "u-boot"; + reg = <0x00000000 0x00100000>; + read-only; + }; + partition@kernel { + label = "kernel"; + reg = <0x00100000 0x00500000>; + read-only; + }; + partition@dtb { + label = "dtb"; + reg = <0x00600000 0x00100000>; + read-only; + }; + partition@fs { + label = "file system"; + reg = <0x00700000 0x00900000>; + }; + }; + }; + + i2c@118000 { + lm75b@48 { + compatible = "nxp,lm75a"; + reg = <0x48>; + }; + eeprom@50 { + compatible = "at24,24c256"; + reg = <0x50>; + }; + rtc@68 { + compatible = "pericom,pt7c4338"; + reg = <0x68>; + }; + }; + + i2c@118100 { + eeprom@50 { + compatible = "at24,24c256"; + reg = <0x50>; + }; + }; + + usb1: usb@211000 { + dr_mode = "host"; + }; + + pme: pme@316000 { + /* Commented out, use default allocation */ + /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ + /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ + }; + + qman: qman@318000 { + /* Commented out, use default allocation */ + /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ + /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ + }; + + bman: bman@31a000 { + /* Same as fsl,qman-*, use default allocation */ + /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ + }; + + fman0: fman@400000 { + enet0: ethernet@e0000 { + tbi-handle = <&tbi0>; + phy-handle = <&phy_sgmii_2>; + phy-connection-type = "sgmii"; + }; + + mdio0: mdio@e1120 { + tbi0: tbi-phy@8 { + reg = <0x8>; + device_type = "tbi-phy"; + }; + + phy_rgmii_0: ethernet-phy@0 { + reg = <0x0>; + }; + phy_rgmii_1: ethernet-phy@1 { + reg = <0x1>; + }; + phy_sgmii_2: ethernet-phy@2 { + reg = <0x2>; + }; + phy_sgmii_3: ethernet-phy@3 { + reg = <0x3>; + }; + phy_sgmii_4: ethernet-phy@4 { + reg = <0x4>; + }; + phy_sgmii_1c: ethernet-phy@1c { + reg = <0x1c>; + }; + phy_sgmii_1d: ethernet-phy@1d { + reg = <0x1d>; + }; + phy_sgmii_1e: ethernet-phy@1e { + reg = <0x1e>; + }; + phy_sgmii_1f: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + + enet1: ethernet@e2000 { + tbi-handle = <&tbi1>; + phy-handle = <&phy_sgmii_3>; + phy-connection-type = "sgmii"; + }; + + mdio@e3120 { + tbi1: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet2: ethernet@e4000 { + tbi-handle = <&tbi2>; + phy-handle = <&phy_sgmii_4>; + phy-connection-type = "sgmii"; + }; + + mdio@e5120 { + tbi2: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet3: ethernet@e6000 { + tbi-handle = <&tbi3>; + phy-handle = <&phy_rgmii_1>; + phy-connection-type = "rgmii"; + }; + + mdio@e7120 { + tbi3: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet4: ethernet@e8000 { + tbi-handle = <&tbi4>; + phy-handle = <&phy_rgmii_0>; + phy-connection-type = "rgmii"; + }; + + mdio@e9120 { + tbi4: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet5: ethernet@f0000 { + /* + * phy-handle will be updated by U-Boot to + * reflect the actual slot the XAUI card is in. + */ + phy-handle = <&phy_xgmii_2>; + phy-connection-type = "xgmii"; + }; + + mdio@f1000 { + /* XAUI card in slot 2 */ + phy_xgmii_2: ethernet-phy@0 { + reg = <0x0>; + }; + }; + }; + }; + + rapidio@ffe0c0000 { + reg = <0xf 0xfe0c0000 0 0x11000>; + + port1 { + ranges = <0 0 0xc 0x20000000 0 0x10000000>; + }; + port2 { + ranges = <0 0 0xc 0x30000000 0 0x10000000>; + }; + }; + + localbus@ffe124000 { + reg = <0xf 0xfe124000 0 0x1000>; + ranges = <0 0 0xf 0xb8000000 0x04000000>; + + flash@0,0 { + compatible = "cfi-flash"; + /* + * Map 64Mb of 128MB NOR flash memory. Since highest + * line of address of NOR flash memory are set by + * FPGA, memory are divided into two pages equal to + * 64MB. One of the pages can be accessed at once. + */ + reg = <0 0 0x04000000>; + bank-width = <2>; + device-width = <2>; + }; + }; + + pci0: pcie@ffe200000 { + reg = <0xf 0xfe200000 0 0x1000>; + ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000 + 0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0x80000000 + 0x02000000 0 0x80000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0xff000000 + 0 0x00010000>; + }; + }; + + pci1: pcie@ffe201000 { + reg = <0xf 0xfe201000 0 0x1000>; + ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000 + 0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0x90000000 + 0x02000000 0 0x90000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0xff010000 + 0 0x00010000>; + }; + }; + + pci2: pcie@ffe202000 { + reg = <0xf 0xfe202000 0 0x1000>; + ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000 + 0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0xa0000000 + 0x02000000 0 0xa0000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0xff020000 + 0 0x00010000>; + }; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; +}; Property changes on: head/sys/dts/powerpc/p2041rdb.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/powerpc/p2041si.dtsi =================================================================== --- head/sys/dts/powerpc/p2041si.dtsi (nonexistent) +++ head/sys/dts/powerpc/p2041si.dtsi (revision 325826) @@ -0,0 +1,1296 @@ +/* + * P2041 Silicon Device Tree Source + * + * Copyright 2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* $FreeBSD$ */ + +/dts-v1/; + +/ { + compatible = "fsl,P2041"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + aliases { + ccsr = &soc; + dcsr = &dcsr; + + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + ethernet3 = &enet3; + ethernet4 = &enet4; + ethernet5 = &enet5; + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; + usb0 = &usb0; + usb1 = &usb1; + dma0 = &dma0; + dma1 = &dma1; + bman = &bman; + qman = &qman; + pme = &pme; + rman = &rman; + sdhc = &sdhc; + msi0 = &msi0; + msi1 = &msi1; + msi2 = &msi2; + + crypto = &crypto; + sec_jr0 = &sec_jr0; + sec_jr1 = &sec_jr1; + sec_jr2 = &sec_jr2; + sec_jr3 = &sec_jr3; + rtic_a = &rtic_a; + rtic_b = &rtic_b; + rtic_c = &rtic_c; + rtic_d = &rtic_d; + sec_mon = &sec_mon; + + fman0 = &fman0; + fman0_oh0 = &fman0_oh0; + fman0_oh1 = &fman0_oh1; + fman0_oh2 = &fman0_oh2; + fman0_oh3 = &fman0_oh3; + fman0_oh4 = &fman0_oh4; + fman0_oh5 = &fman0_oh5; + fman0_oh6 = &fman0_oh6; + fman0_rx0 = &fman0_rx0; + fman0_rx1 = &fman0_rx1; + fman0_rx2 = &fman0_rx2; + fman0_rx3 = &fman0_rx3; + fman0_rx4 = &fman0_rx4; + fman0_rx5 = &fman0_rx5; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: PowerPC,e500mc@0 { + device_type = "cpu"; + reg = <0>; + bus-frequency = <749999996>; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu1: PowerPC,e500mc@1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2_1>; + L2_1: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu2: PowerPC,e500mc@2 { + device_type = "cpu"; + reg = <2>; + next-level-cache = <&L2_2>; + L2_2: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu3: PowerPC,e500mc@3 { + device_type = "cpu"; + reg = <3>; + next-level-cache = <&L2_3>; + L2_3: l2-cache { + next-level-cache = <&cpc>; + }; + }; + }; + + dcsr: dcsr@f00000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,dcsr", "simple-bus"; + + dcsr-epu@0 { + compatible = "fsl,dcsr-epu"; + interrupts = <52 2 0 0 + 84 2 0 0 + 85 2 0 0>; + interrupt-parent = <&mpic>; + reg = <0x0 0x1000>; + }; + dcsr-npc { + compatible = "fsl,dcsr-npc"; + reg = <0x1000 0x1000 0x1000000 0x8000>; + }; + dcsr-nxc@2000 { + compatible = "fsl,dcsr-nxc"; + reg = <0x2000 0x1000>; + }; + dcsr-corenet { + compatible = "fsl,dcsr-corenet"; + reg = <0x8000 0x1000 0xB0000 0x1000>; + }; + dcsr-dpaa@9000 { + compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa"; + reg = <0x9000 0x1000>; + }; + dcsr-ocn@11000 { + compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn"; + reg = <0x11000 0x1000>; + }; + dcsr-ddr@12000 { + compatible = "fsl,dcsr-ddr"; + dev-handle = <&ddr>; + reg = <0x12000 0x1000>; + }; + dcsr-nal@18000 { + compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal"; + reg = <0x18000 0x1000>; + }; + dcsr-rcpm@22000 { + compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm"; + reg = <0x22000 0x1000>; + }; + dcsr-cpu-sb-proxy@40000 { + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; + cpu-handle = <&cpu0>; + reg = <0x40000 0x1000>; + }; + dcsr-cpu-sb-proxy@41000 { + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; + cpu-handle = <&cpu1>; + reg = <0x41000 0x1000>; + }; + dcsr-cpu-sb-proxy@42000 { + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; + cpu-handle = <&cpu2>; + reg = <0x42000 0x1000>; + }; + dcsr-cpu-sb-proxy@43000 { + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; + cpu-handle = <&cpu3>; + reg = <0x43000 0x1000>; + }; + }; + + bman-portals@ff4000000 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "fsl,bman-portals"; + ranges = <0x0 0xf 0xfde00000 0x200000>; + bman-portal@0 { + cell-index = <0x0>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x0 0x4000 0x100000 0x1000>; + interrupts = <105 2 0 0>; + }; + bman-portal@4000 { + cell-index = <0x1>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x4000 0x4000 0x101000 0x1000>; + interrupts = <107 2 0 0>; + }; + bman-portal@8000 { + cell-index = <2>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x8000 0x4000 0x102000 0x1000>; + interrupts = <109 2 0 0>; + }; + bman-portal@c000 { + cell-index = <0x3>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0xc000 0x4000 0x103000 0x1000>; + interrupts = <111 2 0 0>; + }; + bman-portal@10000 { + cell-index = <0x4>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x10000 0x4000 0x104000 0x1000>; + interrupts = <113 2 0 0>; + }; + bman-portal@14000 { + cell-index = <0x5>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x14000 0x4000 0x105000 0x1000>; + interrupts = <115 2 0 0>; + }; + bman-portal@18000 { + cell-index = <0x6>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x18000 0x4000 0x106000 0x1000>; + interrupts = <117 2 0 0>; + }; + bman-portal@1c000 { + cell-index = <0x7>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x1c000 0x4000 0x107000 0x1000>; + interrupts = <119 2 0 0>; + }; + bman-portal@20000 { + cell-index = <0x8>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x20000 0x4000 0x108000 0x1000>; + interrupts = <121 2 0 0>; + }; + bman-portal@24000 { + cell-index = <0x9>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x24000 0x4000 0x109000 0x1000>; + interrupts = <123 2 0 0>; + }; + + buffer-pool@0 { + compatible = "fsl,p2041-bpool", "fsl,bpool"; + fsl,bpid = <0>; + fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; + }; + }; + + qman-portals@ff4200000 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "fsl,qman-portals"; + ranges = <0x0 0xf 0xfdc00000 0x200000>; + qportal0: qman-portal@0 { + cell-index = <0x0>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x0 0x4000 0x100000 0x1000>; + interrupts = <104 0x2 0 0>; + fsl,qman-channel-id = <0x0>; + }; + + qportal1: qman-portal@4000 { + cell-index = <0x1>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x4000 0x4000 0x101000 0x1000>; + interrupts = <106 0x2 0 0>; + fsl,qman-channel-id = <0x1>; + }; + + qportal2: qman-portal@8000 { + cell-index = <0x2>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x8000 0x4000 0x102000 0x1000>; + interrupts = <108 0x2 0 0>; + fsl,qman-channel-id = <0x2>; + }; + + qportal3: qman-portal@c000 { + cell-index = <0x3>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0xc000 0x4000 0x103000 0x1000>; + interrupts = <110 0x2 0 0>; + fsl,qman-channel-id = <0x3>; + }; + + qportal4: qman-portal@10000 { + cell-index = <0x4>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x10000 0x4000 0x104000 0x1000>; + interrupts = <112 0x2 0 0>; + fsl,qman-channel-id = <0x4>; + }; + + qportal5: qman-portal@14000 { + cell-index = <0x5>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x14000 0x4000 0x105000 0x1000>; + interrupts = <114 0x2 0 0>; + fsl,qman-channel-id = <0x5>; + }; + + qportal6: qman-portal@18000 { + cell-index = <0x6>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x18000 0x4000 0x106000 0x1000>; + interrupts = <116 0x2 0 0>; + fsl,qman-channel-id = <0x6>; + }; + + qportal7: qman-portal@1c000 { + cell-index = <0x7>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x1c000 0x4000 0x107000 0x1000>; + interrupts = <118 0x2 0 0>; + fsl,qman-channel-id = <0x7>; + }; + + qportal8: qman-portal@20000 { + cell-index = <0x8>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x20000 0x4000 0x108000 0x1000>; + interrupts = <120 0x2 0 0>; + fsl,qman-channel-id = <0x8>; + }; + + qportal9: qman-portal@24000 { + cell-index = <0x9>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x24000 0x4000 0x109000 0x1000>; + interrupts = <122 0x2 0 0>; + fsl,qman-channel-id = <0x9>; + }; + + qpool1: qman-pool@1 { + cell-index = <1>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x21>; + }; + + qpool2: qman-pool@2 { + cell-index = <2>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x22>; + }; + + qpool3: qman-pool@3 { + cell-index = <3>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x23>; + }; + + qpool4: qman-pool@4 { + cell-index = <4>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x24>; + }; + + qpool5: qman-pool@5 { + cell-index = <5>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x25>; + }; + + qpool6: qman-pool@6 { + cell-index = <6>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x26>; + }; + + qpool7: qman-pool@7 { + cell-index = <7>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x27>; + }; + + qpool8: qman-pool@8 { + cell-index = <8>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x28>; + }; + + qpool9: qman-pool@9 { + cell-index = <9>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x29>; + }; + + qpool10: qman-pool@10 { + cell-index = <10>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2a>; + }; + + qpool11: qman-pool@11 { + cell-index = <11>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2b>; + }; + + qpool12: qman-pool@12 { + cell-index = <12>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2c>; + }; + + qpool13: qman-pool@13 { + cell-index = <13>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2d>; + }; + + qpool14: qman-pool@14 { + cell-index = <14>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2e>; + }; + + qpool15: qman-pool@15 { + cell-index = <15>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2f>; + }; + }; + + soc: soc@ffe000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + + bus-frequency = <0>; // Filled out by kernel. + + ranges = <0x00000000 0xf 0xfe000000 0x1000000>; + reg = <0xf 0xfe000000 0 0x00001000>; + + soc-sram-error { + compatible = "fsl,soc-sram-error"; + interrupts = <16 2 1 29>; + }; + + corenet-law@0 { + compatible = "fsl,corenet-law"; + reg = <0x0 0x1000>; + fsl,num-laws = <32>; + }; + + ddr: memory-controller@8000 { + compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; + reg = <0x8000 0x1000>; + interrupts = <16 2 1 23>; + }; + + cpc: l3-cache-controller@10000 { + compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; + reg = <0x10000 0x1000>; + interrupts = <16 2 1 27>; + }; + + corenet-cf@18000 { + compatible = "fsl,corenet-cf"; + reg = <0x18000 0x1000>; + interrupts = <16 2 1 31>; + fsl,ccf-num-csdids = <32>; + fsl,ccf-num-snoopids = <32>; + }; + + iommu@20000 { + compatible = "fsl,pamu-v1.0", "fsl,pamu"; + reg = <0x20000 0x4000>; + interrupts = < + 24 2 0 0 + 16 2 1 30>; + }; + + mpic: pic@40000 { + clock-frequency = <0>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "fsl,mpic", "chrp,open-pic"; + device_type = "open-pic"; + }; + + msi0: msi@41600 { + compatible = "fsl,mpic-msi"; + reg = <0x41600 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 0 0 + 0xe1 0 0 0 + 0xe2 0 0 0 + 0xe3 0 0 0 + 0xe4 0 0 0 + 0xe5 0 0 0 + 0xe6 0 0 0 + 0xe7 0 0 0>; + }; + + msi1: msi@41800 { + compatible = "fsl,mpic-msi"; + reg = <0x41800 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe8 0 0 0 + 0xe9 0 0 0 + 0xea 0 0 0 + 0xeb 0 0 0 + 0xec 0 0 0 + 0xed 0 0 0 + 0xee 0 0 0 + 0xef 0 0 0>; + }; + + msi2: msi@41a00 { + compatible = "fsl,mpic-msi"; + reg = <0x41a00 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xf0 0 0 0 + 0xf1 0 0 0 + 0xf2 0 0 0 + 0xf3 0 0 0 + 0xf4 0 0 0 + 0xf5 0 0 0 + 0xf6 0 0 0 + 0xf7 0 0 0>; + }; + + guts: global-utilities@e0000 { + compatible = "fsl,qoriq-device-config-1.0"; + reg = <0xe0000 0xe00>; + fsl,has-rstcr; + #sleep-cells = <1>; + fsl,liodn-bits = <12>; + }; + + pins: global-utilities@e0e00 { + compatible = "fsl,qoriq-pin-control-1.0"; + reg = <0xe0e00 0x200>; + #sleep-cells = <2>; + }; + + clockgen: global-utilities@e1000 { + compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0"; + reg = <0xe1000 0x1000>; + clock-frequency = <0>; + }; + + rcpm: global-utilities@e2000 { + compatible = "fsl,qoriq-rcpm-1.0"; + reg = <0xe2000 0x1000>; + #sleep-cells = <1>; + }; + + sfp: sfp@e8000 { + compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0"; + reg = <0xe8000 0x1000>; + }; + + serdes: serdes@ea000 { + compatible = "fsl,p2041-serdes"; + reg = <0xea000 0x1000>; + }; + + dma0: dma@100300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p2041-dma", "fsl,eloplus-dma"; + reg = <0x100300 0x4>; + ranges = <0x0 0x100100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,p2041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <28 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,p2041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <29 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,p2041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <30 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,p2041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <31 2 0 0>; + }; + }; + + dma1: dma@101300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p2041-dma", "fsl,eloplus-dma"; + reg = <0x101300 0x4>; + ranges = <0x0 0x101100 0x200>; + cell-index = <1>; + dma-channel@0 { + compatible = "fsl,p2041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <32 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,p2041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <33 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,p2041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <34 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,p2041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <35 2 0 0>; + }; + }; + + spi@110000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,p2041-espi", "fsl,mpc8536-espi"; + reg = <0x110000 0x1000>; + interrupts = <53 0x2 0 0>; + fsl,espi-num-chipselects = <4>; + }; + + sdhc: sdhc@114000 { + compatible = "fsl,p2041-esdhc", "fsl,esdhc"; + reg = <0x114000 0x1000>; + interrupts = <48 2 0 0>; + sdhci,auto-cmd12; + clock-frequency = <0>; + }; + + i2c@118000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x118000 0x100>; + interrupts = <38 2 0 0>; + dfsrr; + }; + + i2c@118100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x118100 0x100>; + interrupts = <38 2 0 0>; + dfsrr; + }; + + i2c@119000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <2>; + compatible = "fsl-i2c"; + reg = <0x119000 0x100>; + interrupts = <39 2 0 0>; + dfsrr; + }; + + i2c@119100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <3>; + compatible = "fsl-i2c"; + reg = <0x119100 0x100>; + interrupts = <39 2 0 0>; + dfsrr; + }; + + serial0: serial@11c500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11c500 0x100>; + clock-frequency = <0>; + interrupts = <36 2 0 0>; + }; + + serial1: serial@11c600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11c600 0x100>; + clock-frequency = <0>; + interrupts = <36 2 0 0>; + }; + + serial2: serial@11d500 { + cell-index = <2>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11d500 0x100>; + clock-frequency = <0>; + interrupts = <37 2 0 0>; + }; + + serial3: serial@11d600 { + cell-index = <3>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11d600 0x100>; + clock-frequency = <0>; + interrupts = <37 2 0 0>; + }; + + gpio0: gpio@130000 { + compatible = "fsl,p2041-gpio", "fsl,qoriq-gpio"; + reg = <0x130000 0x1000>; + interrupts = <55 2 0 0>; + #gpio-cells = <2>; + gpio-controller; + }; + + rman: rman@1e0000 { + compatible = "fsl,rman"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e0000 0x20000>; + reg = <0x1e0000 0x20000>; + interrupts = <16 2 1 11>; /* err_irq */ + fsl,qman-channels-id = <0x62 0x63>; + + inbound-block@0 { + compatible = "fsl,rman-inbound-block"; + reg = <0x0 0x800>; + }; + global-cfg@b00 { + compatible = "fsl,rman-global-cfg"; + reg = <0xb00 0x500>; + }; + inbound-block@1000 { + compatible = "fsl,rman-inbound-block"; + reg = <0x1000 0x800>; + }; + inbound-block@2000 { + compatible = "fsl,rman-inbound-block"; + reg = <0x2000 0x800>; + }; + inbound-block@3000 { + compatible = "fsl,rman-inbound-block"; + reg = <0x3000 0x800>; + }; + }; + + usb0: usb@210000 { + compatible = "fsl,p2041-usb2-mph", + "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; + reg = <0x210000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <44 0x2 0 0>; + phy_type = "utmi"; + port0; + }; + + usb1: usb@211000 { + compatible = "fsl,p2041-usb2-dr", + "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; + reg = <0x211000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <45 0x2 0 0>; + phy_type = "utmi"; + }; + + sata@220000 { + compatible = "fsl,p2041-sata", "fsl,pq-sata-v2"; + reg = <0x220000 0x1000>; + interrupts = <68 0x2 0 0>; + }; + + sata@221000 { + compatible = "fsl,p2041-sata", "fsl,pq-sata-v2"; + reg = <0x221000 0x1000>; + interrupts = <69 0x2 0 0>; + }; + + crypto: crypto@300000 { + compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x300000 0x10000>; + ranges = <0 0x300000 0x10000>; + interrupts = <92 2 0 0>; + + sec_jr0: jr@1000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + interrupts = <88 2 0 0>; + }; + + sec_jr1: jr@2000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x2000 0x1000>; + interrupts = <89 2 0 0>; + }; + + sec_jr2: jr@3000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x3000 0x1000>; + interrupts = <90 2 0 0>; + }; + + sec_jr3: jr@4000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x4000 0x1000>; + interrupts = <91 2 0 0>; + }; + + rtic@6000 { + compatible = "fsl,sec-v4.2-rtic", + "fsl,sec-v4.0-rtic"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x6000 0x100>; + ranges = <0x0 0x6100 0xe00>; + + rtic_a: rtic-a@0 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x00 0x20 0x100 0x80>; + }; + + rtic_b: rtic-b@20 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x20 0x20 0x200 0x80>; + }; + + rtic_c: rtic-c@40 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x40 0x20 0x300 0x80>; + }; + + rtic_d: rtic-d@60 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x60 0x20 0x500 0x80>; + }; + }; + }; + + sec_mon: sec_mon@314000 { + compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; + reg = <0x314000 0x1000>; + interrupts = <93 2 0 0>; + }; + + pme: pme@316000 { + compatible = "fsl,pme"; + reg = <0x316000 0x10000>; + /* "fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ + /* "fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ + interrupts = <16 2 1 5>; + }; + + qman: qman@318000 { + compatible = "fsl,p2041-qman", "fsl,qman"; + reg = <0x318000 0x1000>; + interrupts = <16 2 1 3>; + /* Commented out, use default allocation */ + /* "fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ + /* "fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ + }; + + bman: bman@31a000 { + compatible = "fsl,p2041-bman", "fsl,bman"; + reg = <0x31a000 0x1000>; + interrupts = <16 2 1 2>; + /* Same as "fsl,qman-*, use default allocation */ + /* "fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ + }; + + fman0: fman@400000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <0>; + compatible = "fsl,p2041-fman", "fsl,fman", "simple-bus"; + ranges = <0 0x400000 0x100000>; + reg = <0x400000 0x100000>; + clock-frequency = <0>; + interrupts = < + 96 2 0 0 + 16 2 1 1>; + + cc@0 { + compatible = "fsl,p2041-fman-cc", "fsl,fman-cc"; + }; + + parser@c7000 { + compatible = "fsl,p2041-fman-parser", "fsl,fman-parser"; + reg = <0xc7000 0x1000>; + }; + + keygen@c1000 { + compatible = "fsl,p2041-fman-keygen", "fsl,fman-keygen"; + reg = <0xc1000 0x1000>; + }; + + policer@c0000 { + compatible = "fsl,p2041-fman-policer", "fsl,fman-policer"; + reg = <0xc0000 0x1000>; + }; + + muram@0 { + compatible = "fsl,p2041-fman-muram", "fsl,fman-muram"; + reg = <0x0 0x28000>; + }; + + bmi@80000 { + compatible = "fsl,p2041-fman-bmi", "fsl,fman-bmi"; + reg = <0x80000 0x400>; + }; + + qmi@80400 { + compatible = "fsl,p2041-fman-qmi", "fsl,fman-qmi"; + reg = <0x80400 0x400>; + }; + + fman0_rx0: port@88000 { + cell-index = <0>; + compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x88000 0x1000>; + }; + fman0_rx1: port@89000 { + cell-index = <1>; + compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x89000 0x1000>; + }; + fman0_rx2: port@8a000 { + cell-index = <2>; + compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x8a000 0x1000>; + }; + fman0_rx3: port@8b000 { + cell-index = <3>; + compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x8b000 0x1000>; + }; + fman0_rx4: port@8c000 { + cell-index = <4>; + compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x8c000 0x1000>; + }; + fman0_rx5: port@90000 { + cell-index = <0>; + compatible = "fsl,p2041-fman-port-10g-rx", "fsl,fman-port-10g-rx"; + reg = <0x90000 0x1000>; + }; + + fman0_tx5: port@b0000 { + cell-index = <0>; + compatible = "fsl,p2041-fman-port-10g-tx", "fsl,fman-port-10g-tx"; + reg = <0xb0000 0x1000>; + fsl,qman-channel-id = <0x40>; + }; + fman0_tx0: port@a8000 { + cell-index = <0>; + compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xa8000 0x1000>; + fsl,qman-channel-id = <0x41>; + }; + fman0_tx1: port@a9000 { + cell-index = <1>; + compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xa9000 0x1000>; + fsl,qman-channel-id = <0x42>; + }; + fman0_tx2: port@aa000 { + cell-index = <2>; + compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xaa000 0x1000>; + fsl,qman-channel-id = <0x43>; + }; + fman0_tx3: port@ab000 { + cell-index = <3>; + compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xab000 0x1000>; + fsl,qman-channel-id = <0x44>; + }; + fman0_tx4: port@ac000 { + cell-index = <4>; + compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xac000 0x1000>; + fsl,qman-channel-id = <0x45>; + }; + + fman0_oh0: port@81000 { + cell-index = <0>; + compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x81000 0x1000>; + fsl,qman-channel-id = <0x46>; + }; + fman0_oh1: port@82000 { + cell-index = <1>; + compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x82000 0x1000>; + fsl,qman-channel-id = <0x47>; + }; + fman0_oh2: port@83000 { + cell-index = <2>; + compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x83000 0x1000>; + fsl,qman-channel-id = <0x48>; + }; + fman0_oh3: port@84000 { + cell-index = <3>; + compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x84000 0x1000>; + fsl,qman-channel-id = <0x49>; + }; + fman0_oh4: port@85000 { + cell-index = <4>; + compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x85000 0x1000>; + fsl,qman-channel-id = <0x4a>; + }; + fman0_oh5: port@86000 { + cell-index = <5>; + compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x86000 0x1000>; + fsl,qman-channel-id = <0x4b>; + }; + fman0_oh6: port@87000 { + cell-index = <6>; + compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x87000 0x1000>; + }; + + enet0: ethernet@e0000 { + cell-index = <0>; + compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe0000 0x1000>; + fsl,port-handles = <&fman0_rx0 &fman0_tx0>; + }; + + mdio0: mdio@e1120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-mdio"; + reg = <0xe1120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet1: ethernet@e2000 { + cell-index = <1>; + compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe2000 0x1000>; + fsl,port-handles = <&fman0_rx1 &fman0_tx1>; + }; + + mdio@e3120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-tbi"; + reg = <0xe3120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet2: ethernet@e4000 { + cell-index = <2>; + compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe4000 0x1000>; + fsl,port-handles = <&fman0_rx2 &fman0_tx2>; + }; + + mdio@e5120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-tbi"; + reg = <0xe5120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet3: ethernet@e6000 { + cell-index = <3>; + compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe6000 0x1000>; + fsl,port-handles = <&fman0_rx3 &fman0_tx3>; + }; + + mdio@e7120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-tbi"; + reg = <0xe7120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet4: ethernet@e8000 { + cell-index = <4>; + compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe8000 0x1000>; + fsl,port-handles = <&fman0_rx4 &fman0_tx4>; + }; + + mdio@e9120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-tbi"; + reg = <0xe9120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet5: ethernet@f0000 { + cell-index = <0>; + compatible = "fsl,p2041-fman-10g-mac", "fsl,fman-10g-mac", "fsl,fman-xgec"; + reg = <0xf0000 0x1000>; + fsl,port-handles = <&fman0_rx5 &fman0_tx5>; + }; + + mdio@f1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-xmdio"; + reg = <0xf1000 0x1000>; + interrupts = <100 1 0 0>; + }; + }; + }; + + rapidio@ffe0c0000 { + compatible = "fsl,srio"; + interrupts = <16 2 1 11>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + port1 { + #address-cells = <2>; + #size-cells = <2>; + cell-index = <1>; + }; + + port2 { + #address-cells = <2>; + #size-cells = <2>; + cell-index = <2>; + }; + }; + + localbus@ffe124000 { + compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus"; + interrupts = <25 2 0 0>; + #address-cells = <2>; + #size-cells = <1>; + }; + + pci0: pcie@ffe200000 { + compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + status = "disabled"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0x0 0xff>; + clock-frequency = <33333333>; + fsl,msi = <&msi0>; + interrupts = <16 2 1 15>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 15>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 40 1 0 0 + 0000 0 0 2 &mpic 1 1 0 0 + 0000 0 0 3 &mpic 2 1 0 0 + 0000 0 0 4 &mpic 3 1 0 0 + >; + }; + }; + + pci1: pcie@ffe201000 { + compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + status = "okay"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0 0xff>; + clock-frequency = <33333333>; + fsl,msi = <&msi1>; + interrupts = <16 2 1 14>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 14>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 41 1 0 0 + 0000 0 0 2 &mpic 5 1 0 0 + 0000 0 0 3 &mpic 6 1 0 0 + 0000 0 0 4 &mpic 7 1 0 0 + >; + }; + }; + + pci2: pcie@ffe202000 { + compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + status = "disabled"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0x0 0xff>; + clock-frequency = <33333333>; + fsl,msi = <&msi2>; + interrupts = <16 2 1 13>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 13>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 42 1 0 0 + 0000 0 0 2 &mpic 9 1 0 0 + 0000 0 0 3 &mpic 10 1 0 0 + 0000 0 0 4 &mpic 11 1 0 0 + >; + }; + }; +}; Property changes on: head/sys/dts/powerpc/p2041si.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/powerpc/p3041ds.dts =================================================================== --- head/sys/dts/powerpc/p3041ds.dts (nonexistent) +++ head/sys/dts/powerpc/p3041ds.dts (revision 325826) @@ -0,0 +1,546 @@ +/* + * P3041DS Device Tree Source + * + * Copyright 2010-2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* $FreeBSD$ */ + +/include/ "p3041si.dtsi" + +/ { + model = "fsl,P3041DS"; + compatible = "fsl,P3041DS"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + aliases { + phy_rgmii_0 = &phy_rgmii_0; + phy_rgmii_1 = &phy_rgmii_1; + phy_sgmii_1c = &phy_sgmii_1c; + phy_sgmii_1d = &phy_sgmii_1d; + phy_sgmii_1e = &phy_sgmii_1e; + phy_sgmii_1f = &phy_sgmii_1f; + phy_xgmii_1 = &phy_xgmii_1; + phy_xgmii_2 = &phy_xgmii_2; + emi1_rgmii = &hydra_mdio_rgmii; + emi1_sgmii = &hydra_mdio_sgmii; + emi2_xgmii = &hydra_mdio_xgmii; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000 0x80000000>; + }; + + dcsr: dcsr@f00000000 { + ranges = <0x00000000 0xf 0x00000000 0x01008000>; + }; + + bman-portals@ff4000000 { + bman-portal@0 { + cpu-handle = <&cpu0>; + }; + bman-portal@4000 { + cpu-handle = <&cpu1>; + }; + bman-portal@8000 { + cpu-handle = <&cpu2>; + }; + bman-portal@c000 { + cpu-handle = <&cpu3>; + }; + bman-portal@10000 { + }; + bman-portal@14000 { + }; + bman-portal@18000 { + }; + bman-portal@1c000 { + }; + bman-portal@20000 { + }; + bman-portal@24000 { + }; + + buffer-pool@0 { + compatible = "fsl,p3041-bpool", "fsl,bpool"; + fsl,bpid = <0>; + fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; + }; + }; + + qman-portals@ff4200000 { + qportal0: qman-portal@0 { + cpu-handle = <&cpu0>; + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal1: qman-portal@4000 { + cpu-handle = <&cpu1>; + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal2: qman-portal@8000 { + cpu-handle = <&cpu2>; + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal3: qman-portal@c000 { + cpu-handle = <&cpu3>; + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal4: qman-portal@10000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal5: qman-portal@14000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal6: qman-portal@18000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal7: qman-portal@1c000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal8: qman-portal@20000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal9: qman-portal@24000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + }; + + soc: soc@ffe000000 { + spi@110000 { + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25sl12801"; + reg = <0>; + spi-max-frequency = <35000000>; /* input clock */ + partition@u-boot { + label = "u-boot"; + reg = <0x00000000 0x00100000>; + read-only; + }; + partition@kernel { + label = "kernel"; + reg = <0x00100000 0x00500000>; + read-only; + }; + partition@dtb { + label = "dtb"; + reg = <0x00600000 0x00100000>; + read-only; + }; + partition@fs { + label = "file system"; + reg = <0x00700000 0x00900000>; + }; + }; + }; + + i2c@118100 { + eeprom@51 { + compatible = "at24,24c256"; + reg = <0x51>; + }; + eeprom@52 { + compatible = "at24,24c256"; + reg = <0x52>; + }; + }; + + i2c@119100 { + rtc@68 { + compatible = "dallas,ds3232"; + reg = <0x68>; + interrupts = <0x1 0x1 0 0>; + }; + }; + + pme: pme@316000 { + /* Commented out, use default allocation */ + /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ + /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ + }; + + qman: qman@318000 { + /* Commented out, use default allocation */ + /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ + /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ + }; + + bman: bman@31a000 { + /* Same as fsl,qman-*, use default allocation */ + /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ + }; + + fman0: fman@400000 { + enet0: ethernet@e0000 { + tbi-handle = <&tbi0>; + phy-handle = <&phy_rgmii_0>; + phy-connection-type = "rgmii"; + }; + + mdio0: mdio@e1120 { + tbi0: tbi-phy@8 { + reg = <0x8>; + device_type = "tbi-phy"; + }; + + /* + * Virtual MDIO for the two on-board RGMII + * ports. The fsl,hydra-mdio-muxval property + * is already correct. + */ + hydra_mdio_rgmii: hydra-mdio-rgmii { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,hydra-mdio"; + fsl,mdio-handle = <&mdio0>; + fsl,hydra-mdio-muxval = <0x00>; + status = "disabled"; + + phy_rgmii_0: ethernet-phy@0 { + reg = <0x0>; + }; + phy_rgmii_1: ethernet-phy@1 { + reg = <0x1>; + }; + }; + + /* + * Virtual MDIO for the four-port SGMII card. + * The fsl,hydra-mdio-muxval property will be + * fixed-up by U-Boot based on the slot that + * the SGMII card is in. + * + * Note: we do not support DTSEC5 connected to + * SGMII, so this is the only SGMII node. + */ + hydra_mdio_sgmii: hydra-mdio-sgmii { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,hydra-mdio"; + fsl,mdio-handle = <&mdio0>; + fsl,hydra-mdio-muxval = <0x00>; + status = "disabled"; + + phy_sgmii_1c: ethernet-phy@1c { + reg = <0x1c>; + }; + phy_sgmii_1d: ethernet-phy@1d { + reg = <0x1d>; + }; + phy_sgmii_1e: ethernet-phy@1e { + reg = <0x1e>; + }; + phy_sgmii_1f: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + }; + + enet1: ethernet@e2000 { + tbi-handle = <&tbi1>; + phy-handle = <&phy_sgmii_1d>; + phy-connection-type = "sgmii"; + }; + + mdio@e3120 { + tbi1: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet2: ethernet@e4000 { + tbi-handle = <&tbi2>; + phy-handle = <&phy_sgmii_1e>; + phy-connection-type = "sgmii"; + }; + + mdio@e5120 { + tbi2: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet3: ethernet@e6000 { + tbi-handle = <&tbi3>; + phy-handle = <&phy_sgmii_1f>; + phy-connection-type = "sgmii"; + }; + + mdio@e7120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-tbi"; + reg = <0xe7120 0xee0>; + interrupts = <100 1 0 0>; + + tbi3: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet4: ethernet@e8000 { + tbi-handle = <&tbi4>; + phy-handle = <&phy_rgmii_1>; + phy-connection-type = "rgmii"; + }; + + mdio@e9120 { + tbi4: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet5: ethernet@f0000 { + /* + * phy-handle will be updated by U-Boot to + * reflect the actual slot the XAUI card is in. + */ + phy-handle = <&phy_xgmii_1>; + phy-connection-type = "xgmii"; + }; + + /* + * We only support one XAUI card, so the MDIO muxing + * is set by U-Boot, and Linux never touches it. + * Therefore, we don't need a virtual MDIO node. + * However, the phy address depends on the slot, so + * only one of the ethernet-phy nodes below will be + * used. + */ + hydra_mdio_xgmii: mdio@f1000 { + status = "disabled"; + + /* XAUI card in slot 1 */ + phy_xgmii_1: ethernet-phy@4 { + reg = <0x4>; + }; + + /* XAUI card in slot 2 */ + phy_xgmii_2: ethernet-phy@0 { + reg = <0x0>; + }; + }; + }; + }; + + rapidio@ffe0c0000 { + reg = <0xf 0xfe0c0000 0 0x11000>; + + port1 { + ranges = <0 0 0xc 0x20000000 0 0x10000000>; + }; + port2 { + ranges = <0 0 0xc 0x30000000 0 0x10000000>; + }; + }; + + localbus@ffe124000 { + reg = <0xf 0xfe124000 0 0x1000>; + ranges = <0 0 0xf 0xb8000000 0x04000000>; + + flash@0,0 { + compatible = "cfi-flash"; + /* + * Map 64Mb of 128MB NOR flash memory. Since highest + * line of address of NOR flash memory are set by + * FPGA, memory are divided into two pages equal to + * 64MB. One of the pages can be accessed at once. + */ + reg = <0 0 0x04000000>; + bank-width = <2>; + device-width = <2>; + }; + + nand@2,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,elbc-fcm-nand"; + reg = <0x2 0x0 0x40000>; + + partition@0 { + label = "NAND U-Boot Image"; + reg = <0x0 0x02000000>; + read-only; + }; + + partition@2000000 { + label = "NAND Root File System"; + reg = <0x02000000 0x10000000>; + }; + + partition@12000000 { + label = "NAND Compressed RFS Image"; + reg = <0x12000000 0x08000000>; + }; + + partition@1a000000 { + label = "NAND Linux Kernel Image"; + reg = <0x1a000000 0x04000000>; + }; + + partition@1e000000 { + label = "NAND DTB Image"; + reg = <0x1e000000 0x01000000>; + }; + + partition@1f000000 { + label = "NAND Writable User area"; + reg = <0x1f000000 0x21000000>; + }; + }; + + board-control@3,0 { + compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis"; + reg = <3 0 0x30>; + }; + }; + + pci0: pcie@ffe200000 { + reg = <0xf 0xfe200000 0 0x1000>; + ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000 + 0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0x80000000 + 0x02000000 0 0x80000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0xff000000 + 0 0x00010000>; + }; + }; + + pci1: pcie@ffe201000 { + reg = <0xf 0xfe201000 0 0x1000>; + ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000 + 0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0x90000000 + 0x02000000 0 0x90000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0xff010000 + 0 0x00010000>; + }; + }; + + pci2: pcie@ffe202000 { + reg = <0xf 0xfe202000 0 0x1000>; + ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000 + 0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0xa0000000 + 0x02000000 0 0xa0000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0xff020000 + 0 0x00010000>; + }; + }; + + pci3: pcie@ffe203000 { + reg = <0xf 0xfe203000 0 0x1000>; + ranges = <0x02000000 0 0xb0000000 0x0 0xb0000000 0 0x08000000 + 0x01000000 0 0x00000000 0x0 0xff030000 0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0xb0000000 + 0x02000000 0 0xb0000000 + 0 0x08000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0xff030000 + 0 0x00010000>; + }; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; +}; Property changes on: head/sys/dts/powerpc/p3041ds.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/powerpc/p3041si.dtsi =================================================================== --- head/sys/dts/powerpc/p3041si.dtsi (nonexistent) +++ head/sys/dts/powerpc/p3041si.dtsi (revision 325826) @@ -0,0 +1,1345 @@ +/* + * P3041 Silicon Device Tree Source + * + * Copyright 2010-2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* $FreeBSD$ */ + +/dts-v1/; + +/ { + compatible = "fsl,P3041"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + aliases { + ccsr = &soc; + dcsr = &dcsr; + + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + ethernet3 = &enet3; + ethernet4 = &enet4; + ethernet5 = &enet5; + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; + pci3 = &pci3; + usb0 = &usb0; + usb1 = &usb1; + dma0 = &dma0; + dma1 = &dma1; + bman = &bman; + qman = &qman; + pme = &pme; + rman = &rman; + sdhc = &sdhc; + msi0 = &msi0; + msi1 = &msi1; + msi2 = &msi2; + + crypto = &crypto; + sec_jr0 = &sec_jr0; + sec_jr1 = &sec_jr1; + sec_jr2 = &sec_jr2; + sec_jr3 = &sec_jr3; + rtic_a = &rtic_a; + rtic_b = &rtic_b; + rtic_c = &rtic_c; + rtic_d = &rtic_d; + sec_mon = &sec_mon; + + fman0 = &fman0; + fman0_oh0 = &fman0_oh0; + fman0_oh1 = &fman0_oh1; + fman0_oh2 = &fman0_oh2; + fman0_oh3 = &fman0_oh3; + fman0_oh4 = &fman0_oh4; + fman0_oh5 = &fman0_oh5; + fman0_oh6 = &fman0_oh6; + fman0_rx0 = &fman0_rx0; + fman0_rx1 = &fman0_rx1; + fman0_rx2 = &fman0_rx2; + fman0_rx3 = &fman0_rx3; + fman0_rx4 = &fman0_rx4; + fman0_rx5 = &fman0_rx5; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: PowerPC,e500mc@0 { + device_type = "cpu"; + reg = <0>; + bus-frequency = <749999996>; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu1: PowerPC,e500mc@1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2_1>; + L2_1: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu2: PowerPC,e500mc@2 { + device_type = "cpu"; + reg = <2>; + next-level-cache = <&L2_2>; + L2_2: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu3: PowerPC,e500mc@3 { + device_type = "cpu"; + reg = <3>; + next-level-cache = <&L2_3>; + L2_3: l2-cache { + next-level-cache = <&cpc>; + }; + }; + }; + + dcsr: dcsr@f00000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,dcsr", "simple-bus"; + + dcsr-epu@0 { + compatible = "fsl,dcsr-epu"; + interrupts = <52 2 0 0 + 84 2 0 0 + 85 2 0 0>; + interrupt-parent = <&mpic>; + reg = <0x0 0x1000>; + }; + dcsr-npc { + compatible = "fsl,dcsr-npc"; + reg = <0x1000 0x1000 0x1000000 0x8000>; + }; + dcsr-nxc@2000 { + compatible = "fsl,dcsr-nxc"; + reg = <0x2000 0x1000>; + }; + dcsr-corenet { + compatible = "fsl,dcsr-corenet"; + reg = <0x8000 0x1000 0xB0000 0x1000>; + }; + dcsr-dpaa@9000 { + compatible = "fsl,p43041-dcsr-dpaa", "fsl,dcsr-dpaa"; + reg = <0x9000 0x1000>; + }; + dcsr-ocn@11000 { + compatible = "fsl,p43041-dcsr-ocn", "fsl,dcsr-ocn"; + reg = <0x11000 0x1000>; + }; + dcsr-ddr@12000 { + compatible = "fsl,dcsr-ddr"; + dev-handle = <&ddr>; + reg = <0x12000 0x1000>; + }; + dcsr-nal@18000 { + compatible = "fsl,p43041-dcsr-nal", "fsl,dcsr-nal"; + reg = <0x18000 0x1000>; + }; + dcsr-rcpm@22000 { + compatible = "fsl,p43041-dcsr-rcpm", "fsl,dcsr-rcpm"; + reg = <0x22000 0x1000>; + }; + dcsr-cpu-sb-proxy@40000 { + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; + cpu-handle = <&cpu0>; + reg = <0x40000 0x1000>; + }; + dcsr-cpu-sb-proxy@41000 { + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; + cpu-handle = <&cpu1>; + reg = <0x41000 0x1000>; + }; + dcsr-cpu-sb-proxy@42000 { + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; + cpu-handle = <&cpu2>; + reg = <0x42000 0x1000>; + }; + dcsr-cpu-sb-proxy@43000 { + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; + cpu-handle = <&cpu3>; + reg = <0x43000 0x1000>; + }; + }; + + bman-portals@ff4000000 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "fsl,bman-portals"; + ranges = <0x0 0xf 0xfde00000 0x200000>; + bman-portal@0 { + cell-index = <0x0>; + compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; + reg = <0x0 0x4000 0x100000 0x1000>; + interrupts = <105 2 0 0>; + }; + bman-portal@4000 { + cell-index = <0x1>; + compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; + reg = <0x4000 0x4000 0x101000 0x1000>; + interrupts = <107 2 0 0>; + }; + bman-portal@8000 { + cell-index = <2>; + compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; + reg = <0x8000 0x4000 0x102000 0x1000>; + interrupts = <109 2 0 0>; + }; + bman-portal@c000 { + cell-index = <0x3>; + compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; + reg = <0xc000 0x4000 0x103000 0x1000>; + interrupts = <111 2 0 0>; + }; + bman-portal@10000 { + cell-index = <0x4>; + compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; + reg = <0x10000 0x4000 0x104000 0x1000>; + interrupts = <113 2 0 0>; + }; + bman-portal@14000 { + cell-index = <0x5>; + compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; + reg = <0x14000 0x4000 0x105000 0x1000>; + interrupts = <115 2 0 0>; + }; + bman-portal@18000 { + cell-index = <0x6>; + compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; + reg = <0x18000 0x4000 0x106000 0x1000>; + interrupts = <117 2 0 0>; + }; + bman-portal@1c000 { + cell-index = <0x7>; + compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; + reg = <0x1c000 0x4000 0x107000 0x1000>; + interrupts = <119 2 0 0>; + }; + bman-portal@20000 { + cell-index = <0x8>; + compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; + reg = <0x20000 0x4000 0x108000 0x1000>; + interrupts = <121 2 0 0>; + }; + bman-portal@24000 { + cell-index = <0x9>; + compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; + reg = <0x24000 0x4000 0x109000 0x1000>; + interrupts = <123 2 0 0>; + }; + + buffer-pool@0 { + compatible = "fsl,p3041-bpool", "fsl,bpool"; + fsl,bpid = <0>; + fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; + }; + }; + + qman-portals@ff4200000 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "fsl,qman-portals"; + ranges = <0x0 0xf 0xfdc00000 0x200000>; + qportal0: qman-portal@0 { + cell-index = <0x0>; + compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; + reg = <0x0 0x4000 0x100000 0x1000>; + interrupts = <104 0x2 0 0>; + fsl,qman-channel-id = <0x0>; + }; + + qportal1: qman-portal@4000 { + cell-index = <0x1>; + compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; + reg = <0x4000 0x4000 0x101000 0x1000>; + interrupts = <106 0x2 0 0>; + fsl,qman-channel-id = <0x1>; + }; + + qportal2: qman-portal@8000 { + cell-index = <0x2>; + compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; + reg = <0x8000 0x4000 0x102000 0x1000>; + interrupts = <108 0x2 0 0>; + fsl,qman-channel-id = <0x2>; + }; + + qportal3: qman-portal@c000 { + cell-index = <0x3>; + compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; + reg = <0xc000 0x4000 0x103000 0x1000>; + interrupts = <110 0x2 0 0>; + fsl,qman-channel-id = <0x3>; + }; + + qportal4: qman-portal@10000 { + cell-index = <0x4>; + compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; + reg = <0x10000 0x4000 0x104000 0x1000>; + interrupts = <112 0x2 0 0>; + fsl,qman-channel-id = <0x4>; + }; + + qportal5: qman-portal@14000 { + cell-index = <0x5>; + compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; + reg = <0x14000 0x4000 0x105000 0x1000>; + interrupts = <114 0x2 0 0>; + fsl,qman-channel-id = <0x5>; + }; + + qportal6: qman-portal@18000 { + cell-index = <0x6>; + compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; + reg = <0x18000 0x4000 0x106000 0x1000>; + interrupts = <116 0x2 0 0>; + fsl,qman-channel-id = <0x6>; + }; + + qportal7: qman-portal@1c000 { + cell-index = <0x7>; + compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; + reg = <0x1c000 0x4000 0x107000 0x1000>; + interrupts = <118 0x2 0 0>; + fsl,qman-channel-id = <0x7>; + }; + + qportal8: qman-portal@20000 { + cell-index = <0x8>; + compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; + reg = <0x20000 0x4000 0x108000 0x1000>; + interrupts = <120 0x2 0 0>; + fsl,qman-channel-id = <0x8>; + }; + + qportal9: qman-portal@24000 { + cell-index = <0x9>; + compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; + reg = <0x24000 0x4000 0x109000 0x1000>; + interrupts = <122 0x2 0 0>; + fsl,qman-channel-id = <0x9>; + }; + + qpool1: qman-pool@1 { + cell-index = <1>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x21>; + }; + + qpool2: qman-pool@2 { + cell-index = <2>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x22>; + }; + + qpool3: qman-pool@3 { + cell-index = <3>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x23>; + }; + + qpool4: qman-pool@4 { + cell-index = <4>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x24>; + }; + + qpool5: qman-pool@5 { + cell-index = <5>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x25>; + }; + + qpool6: qman-pool@6 { + cell-index = <6>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x26>; + }; + + qpool7: qman-pool@7 { + cell-index = <7>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x27>; + }; + + qpool8: qman-pool@8 { + cell-index = <8>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x28>; + }; + + qpool9: qman-pool@9 { + cell-index = <9>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x29>; + }; + + qpool10: qman-pool@10 { + cell-index = <10>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2a>; + }; + + qpool11: qman-pool@11 { + cell-index = <11>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2b>; + }; + + qpool12: qman-pool@12 { + cell-index = <12>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2c>; + }; + + qpool13: qman-pool@13 { + cell-index = <13>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2d>; + }; + + qpool14: qman-pool@14 { + cell-index = <14>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2e>; + }; + + qpool15: qman-pool@15 { + cell-index = <15>; + compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2f>; + }; + }; + + soc: soc@ffe000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + + bus-frequency = <0>; // Filled out by kernel. + + ranges = <0x00000000 0xf 0xfe000000 0x1000000>; + reg = <0xf 0xfe000000 0 0x00001000>; + + soc-sram-error { + compatible = "fsl,soc-sram-error"; + interrupts = <16 2 1 29>; + }; + + corenet-law@0 { + compatible = "fsl,corenet-law"; + reg = <0x0 0x1000>; + fsl,num-laws = <32>; + }; + + ddr: memory-controller@8000 { + compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; + reg = <0x8000 0x1000>; + interrupts = <16 2 1 23>; + }; + + cpc: l3-cache-controller@10000 { + compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; + reg = <0x10000 0x1000>; + interrupts = <16 2 1 27>; + }; + + corenet-cf@18000 { + compatible = "fsl,corenet-cf"; + reg = <0x18000 0x1000>; + interrupts = <16 2 1 31>; + fsl,ccf-num-csdids = <32>; + fsl,ccf-num-snoopids = <32>; + }; + + iommu@20000 { + compatible = "fsl,pamu-v1.0", "fsl,pamu"; + reg = <0x20000 0x4000>; + interrupts = < + 24 2 0 0 + 16 2 1 30>; + }; + + mpic: pic@40000 { + clock-frequency = <0>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "fsl,mpic", "chrp,open-pic"; + device_type = "open-pic"; + }; + + msi0: msi@41600 { + compatible = "fsl,mpic-msi"; + reg = <0x41600 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 0 0 + 0xe1 0 0 0 + 0xe2 0 0 0 + 0xe3 0 0 0 + 0xe4 0 0 0 + 0xe5 0 0 0 + 0xe6 0 0 0 + 0xe7 0 0 0>; + }; + + msi1: msi@41800 { + compatible = "fsl,mpic-msi"; + reg = <0x41800 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe8 0 0 0 + 0xe9 0 0 0 + 0xea 0 0 0 + 0xeb 0 0 0 + 0xec 0 0 0 + 0xed 0 0 0 + 0xee 0 0 0 + 0xef 0 0 0>; + }; + + msi2: msi@41a00 { + compatible = "fsl,mpic-msi"; + reg = <0x41a00 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xf0 0 0 0 + 0xf1 0 0 0 + 0xf2 0 0 0 + 0xf3 0 0 0 + 0xf4 0 0 0 + 0xf5 0 0 0 + 0xf6 0 0 0 + 0xf7 0 0 0>; + }; + + guts: global-utilities@e0000 { + compatible = "fsl,qoriq-device-config-1.0"; + reg = <0xe0000 0xe00>; + fsl,has-rstcr; + #sleep-cells = <1>; + fsl,liodn-bits = <12>; + }; + + pins: global-utilities@e0e00 { + compatible = "fsl,qoriq-pin-control-1.0"; + reg = <0xe0e00 0x200>; + #sleep-cells = <2>; + }; + + clockgen: global-utilities@e1000 { + compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0"; + reg = <0xe1000 0x1000>; + clock-frequency = <0>; + }; + + rcpm: global-utilities@e2000 { + compatible = "fsl,qoriq-rcpm-1.0"; + reg = <0xe2000 0x1000>; + #sleep-cells = <1>; + }; + + sfp: sfp@e8000 { + compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0"; + reg = <0xe8000 0x1000>; + }; + + serdes: serdes@ea000 { + compatible = "fsl,p3041-serdes"; + reg = <0xea000 0x1000>; + }; + + dma0: dma@100300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p3041-dma", "fsl,eloplus-dma"; + reg = <0x100300 0x4>; + ranges = <0x0 0x100100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <28 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <29 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <30 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <31 2 0 0>; + }; + }; + + dma1: dma@101300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p3041-dma", "fsl,eloplus-dma"; + reg = <0x101300 0x4>; + ranges = <0x0 0x101100 0x200>; + cell-index = <1>; + dma-channel@0 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <32 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <33 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <34 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,p3041-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <35 2 0 0>; + }; + }; + + spi@110000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,p3041-espi", "fsl,mpc8536-espi"; + reg = <0x110000 0x1000>; + interrupts = <53 0x2 0 0>; + fsl,espi-num-chipselects = <4>; + }; + + sdhc: sdhc@114000 { + compatible = "fsl,p3041-esdhc", "fsl,esdhc"; + reg = <0x114000 0x1000>; + interrupts = <48 2 0 0>; + sdhci,auto-cmd12; + clock-frequency = <0>; + }; + + i2c@118000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x118000 0x100>; + interrupts = <38 2 0 0>; + dfsrr; + }; + + i2c@118100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x118100 0x100>; + interrupts = <38 2 0 0>; + dfsrr; + }; + + i2c@119000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <2>; + compatible = "fsl-i2c"; + reg = <0x119000 0x100>; + interrupts = <39 2 0 0>; + dfsrr; + }; + + i2c@119100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <3>; + compatible = "fsl-i2c"; + reg = <0x119100 0x100>; + interrupts = <39 2 0 0>; + dfsrr; + }; + + serial0: serial@11c500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11c500 0x100>; + clock-frequency = <0>; + interrupts = <36 2 0 0>; + }; + + serial1: serial@11c600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11c600 0x100>; + clock-frequency = <0>; + interrupts = <36 2 0 0>; + }; + + serial2: serial@11d500 { + cell-index = <2>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11d500 0x100>; + clock-frequency = <0>; + interrupts = <37 2 0 0>; + }; + + serial3: serial@11d600 { + cell-index = <3>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11d600 0x100>; + clock-frequency = <0>; + interrupts = <37 2 0 0>; + }; + + gpio0: gpio@130000 { + compatible = "fsl,p3041-gpio", "fsl,qoriq-gpio"; + reg = <0x130000 0x1000>; + interrupts = <55 2 0 0>; + #gpio-cells = <2>; + gpio-controller; + }; + + rman: rman@1e0000 { + compatible = "fsl,rman"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e0000 0x20000>; + reg = <0x1e0000 0x20000>; + interrupts = <16 2 1 11>; /* err_irq */ + fsl,qman-channels-id = <0x62 0x63>; + + inbound-block@0 { + compatible = "fsl,rman-inbound-block"; + reg = <0x0 0x800>; + }; + global-cfg@b00 { + compatible = "fsl,rman-global-cfg"; + reg = <0xb00 0x500>; + }; + inbound-block@1000 { + compatible = "fsl,rman-inbound-block"; + reg = <0x1000 0x800>; + }; + inbound-block@2000 { + compatible = "fsl,rman-inbound-block"; + reg = <0x2000 0x800>; + }; + inbound-block@3000 { + compatible = "fsl,rman-inbound-block"; + reg = <0x3000 0x800>; + }; + }; + + usb0: usb@210000 { + compatible = "fsl,p3041-usb2-mph", + "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; + reg = <0x210000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <44 0x2 0 0>; + phy_type = "utmi"; + port0; + }; + + usb1: usb@211000 { + compatible = "fsl,p3041-usb2-dr", + "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; + reg = <0x211000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <45 0x2 0 0>; + dr_mode = "host"; + phy_type = "utmi"; + }; + + sata@220000 { + compatible = "fsl,p3041-sata", "fsl,pq-sata-v2"; + reg = <0x220000 0x1000>; + interrupts = <68 0x2 0 0>; + }; + + sata@221000 { + compatible = "fsl,p3041-sata", "fsl,pq-sata-v2"; + reg = <0x221000 0x1000>; + interrupts = <69 0x2 0 0>; + }; + + crypto: crypto@300000 { + compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x300000 0x10000>; + ranges = <0 0x300000 0x10000>; + interrupts = <92 2 0 0>; + + sec_jr0: jr@1000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + interrupts = <88 2 0 0>; + }; + + sec_jr1: jr@2000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x2000 0x1000>; + interrupts = <89 2 0 0>; + }; + + sec_jr2: jr@3000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x3000 0x1000>; + interrupts = <90 2 0 0>; + }; + + sec_jr3: jr@4000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x4000 0x1000>; + interrupts = <91 2 0 0>; + }; + + rtic@6000 { + compatible = "fsl,sec-v4.2-rtic", + "fsl,sec-v4.0-rtic"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x6000 0x100>; + ranges = <0x0 0x6100 0xe00>; + + rtic_a: rtic-a@0 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x00 0x20 0x100 0x80>; + }; + + rtic_b: rtic-b@20 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x20 0x20 0x200 0x80>; + }; + + rtic_c: rtic-c@40 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x40 0x20 0x300 0x80>; + }; + + rtic_d: rtic-d@60 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x60 0x20 0x500 0x80>; + }; + }; + }; + + sec_mon: sec_mon@314000 { + compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; + reg = <0x314000 0x1000>; + interrupts = <93 2 0 0>; + }; + + pme: pme@316000 { + compatible = "fsl,pme"; + reg = <0x316000 0x10000>; + /* "fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ + /* "fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ + interrupts = <16 2 1 5>; + }; + + qman: qman@318000 { + compatible = "fsl,p3041-qman", "fsl,qman"; + reg = <0x318000 0x1000>; + interrupts = <16 2 1 3>; + /* Commented out, use default allocation */ + /* "fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ + /* "fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ + }; + + bman: bman@31a000 { + compatible = "fsl,p3041-bman", "fsl,bman"; + reg = <0x31a000 0x1000>; + interrupts = <16 2 1 2>; + /* Same as "fsl,qman-*, use default allocation */ + /* "fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ + }; + + fman0: fman@400000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <0>; + compatible = "fsl,p3041-fman", "fsl,fman", "simple-bus"; + ranges = <0 0x400000 0x100000>; + reg = <0x400000 0x100000>; + clock-frequency = <0>; + interrupts = < + 96 2 0 0 + 16 2 1 1>; + + cc@0 { + compatible = "fsl,p3041-fman-cc", "fsl,fman-cc"; + }; + + parser@c7000 { + compatible = "fsl,p3041-fman-parser", "fsl,fman-parser"; + reg = <0xc7000 0x1000>; + }; + + keygen@c1000 { + compatible = "fsl,p3041-fman-keygen", "fsl,fman-keygen"; + reg = <0xc1000 0x1000>; + }; + + policer@c0000 { + compatible = "fsl,p3041-fman-policer", "fsl,fman-policer"; + reg = <0xc0000 0x1000>; + }; + + muram@0 { + compatible = "fsl,p3041-fman-muram", "fsl,fman-muram"; + reg = <0x0 0x28000>; + }; + + bmi@80000 { + compatible = "fsl,p3041-fman-bmi", "fsl,fman-bmi"; + reg = <0x80000 0x400>; + }; + + qmi@80400 { + compatible = "fsl,p3041-fman-qmi", "fsl,fman-qmi"; + reg = <0x80400 0x400>; + }; + + fman0_rx0: port@88000 { + cell-index = <0>; + compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x88000 0x1000>; + }; + fman0_rx1: port@89000 { + cell-index = <1>; + compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x89000 0x1000>; + }; + fman0_rx2: port@8a000 { + cell-index = <2>; + compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x8a000 0x1000>; + }; + fman0_rx3: port@8b000 { + cell-index = <3>; + compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x8b000 0x1000>; + }; + fman0_rx4: port@8c000 { + cell-index = <4>; + compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x8c000 0x1000>; + }; + fman0_rx5: port@90000 { + cell-index = <0>; + compatible = "fsl,p3041-fman-port-10g-rx", "fsl,fman-port-10g-rx"; + reg = <0x90000 0x1000>; + }; + + fman0_tx5: port@b0000 { + cell-index = <0>; + compatible = "fsl,p3041-fman-port-10g-tx", "fsl,fman-port-10g-tx"; + reg = <0xb0000 0x1000>; + fsl,qman-channel-id = <0x40>; + }; + fman0_tx0: port@a8000 { + cell-index = <0>; + compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xa8000 0x1000>; + fsl,qman-channel-id = <0x41>; + }; + fman0_tx1: port@a9000 { + cell-index = <1>; + compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xa9000 0x1000>; + fsl,qman-channel-id = <0x42>; + }; + fman0_tx2: port@aa000 { + cell-index = <2>; + compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xaa000 0x1000>; + fsl,qman-channel-id = <0x43>; + }; + fman0_tx3: port@ab000 { + cell-index = <3>; + compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xab000 0x1000>; + fsl,qman-channel-id = <0x44>; + }; + fman0_tx4: port@ac000 { + cell-index = <4>; + compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xac000 0x1000>; + fsl,qman-channel-id = <0x45>; + }; + + fman0_oh0: port@81000 { + cell-index = <0>; + compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x81000 0x1000>; + fsl,qman-channel-id = <0x46>; + }; + fman0_oh1: port@82000 { + cell-index = <1>; + compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x82000 0x1000>; + fsl,qman-channel-id = <0x47>; + }; + fman0_oh2: port@83000 { + cell-index = <2>; + compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x83000 0x1000>; + fsl,qman-channel-id = <0x48>; + }; + fman0_oh3: port@84000 { + cell-index = <3>; + compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x84000 0x1000>; + fsl,qman-channel-id = <0x49>; + }; + fman0_oh4: port@85000 { + cell-index = <4>; + compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x85000 0x1000>; + fsl,qman-channel-id = <0x4a>; + }; + fman0_oh5: port@86000 { + cell-index = <5>; + compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x86000 0x1000>; + fsl,qman-channel-id = <0x4b>; + }; + fman0_oh6: port@87000 { + cell-index = <6>; + compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x87000 0x1000>; + }; + + enet0: ethernet@e0000 { + cell-index = <0>; + compatible = "fsl,p3041-fman-1g-mac", + "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe0000 0x1000>; + fsl,port-handles = <&fman0_rx0 &fman0_tx0>; + ptimer-handle = <&ptp_timer0>; + }; + + mdio0: mdio@e1120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-mdio"; + reg = <0xe1120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet1: ethernet@e2000 { + cell-index = <1>; + compatible = "fsl,p3041-fman-1g-mac", + "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe2000 0x1000>; + fsl,port-handles = <&fman0_rx1 &fman0_tx1>; + ptimer-handle = <&ptp_timer0>; + }; + + mdio@e3120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-tbi"; + reg = <0xe3120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet2: ethernet@e4000 { + cell-index = <2>; + compatible = "fsl,p3041-fman-1g-mac", + "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe4000 0x1000>; + fsl,port-handles = <&fman0_rx2 &fman0_tx2>; + ptimer-handle = <&ptp_timer0>; + }; + + mdio@e5120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-tbi"; + reg = <0xe5120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet3: ethernet@e6000 { + cell-index = <3>; + compatible = "fsl,p3041-fman-1g-mac", + "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe6000 0x1000>; + fsl,port-handles = <&fman0_rx3 &fman0_tx3>; + }; + + mdio@e7120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-tbi"; + reg = <0xe7120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet4: ethernet@e8000 { + cell-index = <4>; + compatible = "fsl,p3041-fman-1g-mac", + "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe8000 0x1000>; + fsl,port-handles = <&fman0_rx4 &fman0_tx4>; + ptimer-handle = <&ptp_timer0>; + }; + + mdio@e9120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-tbi"; + reg = <0xe9120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet5: ethernet@f0000 { + cell-index = <0>; + compatible = "fsl,p3041-fman-10g-mac", + "fsl,fman-10g-mac", "fsl,fman-xgec"; + reg = <0xf0000 0x1000>; + fsl,port-handles = <&fman0_rx5 &fman0_tx5>; + }; + + mdio@f1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-xmdio"; + reg = <0xf1000 0x1000>; + interrupts = <100 1 0 0>; + }; + + ptp_timer0: rtc@fe000 { + compatible = "fsl,fman-rtc"; + reg = <0xfe000 0x1000>; + }; + }; + }; + + rapidio@ffe0c0000 { + compatible = "fsl,srio"; + interrupts = <16 2 1 11>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + port1 { + #address-cells = <2>; + #size-cells = <2>; + cell-index = <1>; + }; + + port2 { + #address-cells = <2>; + #size-cells = <2>; + cell-index = <2>; + }; + }; + + localbus@ffe124000 { + compatible = "fsl,p3041-rev1.0-elbc", "simple-bus", "fsl,elbc"; + interrupts = < + 25 2 0 0 + 16 2 1 19 + >; + #address-cells = <2>; + #size-cells = <1>; + }; + + pci0: pcie@ffe200000 { + compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + status = "okay"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0x0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi0>; + interrupts = <16 2 1 15>; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 15>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 40 1 0 0 + 0000 0 0 2 &mpic 1 1 0 0 + 0000 0 0 3 &mpic 2 1 0 0 + 0000 0 0 4 &mpic 3 1 0 0 + >; + }; + }; + + pci1: pcie@ffe201000 { + compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + status = "disabled"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi1>; + interrupts = <16 2 1 14>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 14>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 41 1 0 0 + 0000 0 0 2 &mpic 5 1 0 0 + 0000 0 0 3 &mpic 6 1 0 0 + 0000 0 0 4 &mpic 7 1 0 0 + >; + }; + }; + + pci2: pcie@ffe202000 { + compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + status = "okay"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0x0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi2>; + interrupts = <16 2 1 13>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 13>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 42 1 0 0 + 0000 0 0 2 &mpic 9 1 0 0 + 0000 0 0 3 &mpic 10 1 0 0 + 0000 0 0 4 &mpic 11 1 0 0 + >; + }; + }; + + pci3: pcie@ffe203000 { + compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + status = "disabled"; + #size-cells = <2>; + #address-cells = <3>; + bus-range = <0x0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi2>; + interrupts = <16 2 1 12>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 12>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 43 1 0 0 + 0000 0 0 2 &mpic 0 1 0 0 + 0000 0 0 3 &mpic 4 1 0 0 + 0000 0 0 4 &mpic 8 1 0 0 + >; + }; + }; +}; Property changes on: head/sys/dts/powerpc/p3041si.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/powerpc/p5020ds.dts =================================================================== --- head/sys/dts/powerpc/p5020ds.dts (nonexistent) +++ head/sys/dts/powerpc/p5020ds.dts (revision 325826) @@ -0,0 +1,542 @@ +/* + * P5020DS Device Tree Source + * + * Copyright 2010-2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* $FreeBSD$ */ + +/include/ "p5020si.dtsi" + +/ { + model = "fsl,P5020DS"; + compatible = "fsl,P5020DS"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + aliases { + phy_rgmii_0 = &phy_rgmii_0; + phy_rgmii_1 = &phy_rgmii_1; + phy_sgmii_1c = &phy_sgmii_1c; + phy_sgmii_1d = &phy_sgmii_1d; + phy_sgmii_1e = &phy_sgmii_1e; + phy_sgmii_1f = &phy_sgmii_1f; + phy_xgmii_1 = &phy_xgmii_1; + phy_xgmii_2 = &phy_xgmii_2; + emi1_rgmii = &hydra_mdio_rgmii; + emi1_sgmii = &hydra_mdio_sgmii; + emi2_xgmii = &hydra_mdio_xgmii; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000 0x80000000>; + }; + + dcsr: dcsr@f00000000 { + ranges = <0x00000000 0xf 0x00000000 0x01008000>; + }; + + bman-portals@ff4000000 { + bman-portal@0 { + cpu-handle = <&cpu0>; + }; + bman-portal@4000 { + cpu-handle = <&cpu1>; + }; + bman-portal@8000 { + }; + bman-portal@c000 { + }; + bman-portal@10000 { + }; + bman-portal@14000 { + }; + bman-portal@18000 { + }; + bman-portal@1c000 { + }; + bman-portal@20000 { + }; + bman-portal@24000 { + }; + + buffer-pool@0 { + compatible = "fsl,p5020-bpool", "fsl,bpool"; + fsl,bpid = <0>; + fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; + }; + }; + + qman-portals@ff4200000 { + qportal0: qman-portal@0 { + cpu-handle = <&cpu0>; + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal1: qman-portal@4000 { + cpu-handle = <&cpu1>; + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal2: qman-portal@8000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal3: qman-portal@c000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal4: qman-portal@10000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal5: qman-portal@14000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal6: qman-portal@18000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal7: qman-portal@1c000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal8: qman-portal@20000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal9: qman-portal@24000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + }; + + soc: soc@ffe000000 { + spi@110000 { + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25sl12801"; + reg = <0>; + spi-max-frequency = <40000000>; /* input clock */ + partition@u-boot { + label = "u-boot"; + reg = <0x00000000 0x00100000>; + read-only; + }; + partition@kernel { + label = "kernel"; + reg = <0x00100000 0x00500000>; + read-only; + }; + partition@dtb { + label = "dtb"; + reg = <0x00600000 0x00100000>; + read-only; + }; + partition@fs { + label = "file system"; + reg = <0x00700000 0x00900000>; + }; + }; + }; + + i2c@118100 { + eeprom@51 { + compatible = "at24,24c256"; + reg = <0x51>; + }; + eeprom@52 { + compatible = "at24,24c256"; + reg = <0x52>; + }; + }; + + i2c@119100 { + rtc@68 { + compatible = "dallas,ds3232"; + reg = <0x68>; + interrupts = <0x1 0x1 0 0>; + }; + }; + + pme: pme@316000 { + /* Commented out, use default allocation */ + /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ + /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ + }; + + qman: qman@318000 { + /* Commented out, use default allocation */ + /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ + /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ + }; + + bman: bman@31a000 { + /* Same as fsl,qman-*, use default allocation */ + /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ + }; + + fman0: fman@400000 { + enet0: ethernet@e0000 { + tbi-handle = <&tbi0>; + phy-handle = <&phy_rgmii_0>; + phy-connection-type = "rgmii"; + }; + + mdio0: mdio@e1120 { + tbi0: tbi-phy@8 { + reg = <0x8>; + device_type = "tbi-phy"; + }; + + /* + * Virtual MDIO for the two on-board RGMII + * ports. The fsl,hydra-mdio-muxval property + * is already correct. + */ + hydra_mdio_rgmii: hydra-mdio-rgmii { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,hydra-mdio"; + fsl,mdio-handle = <&mdio0>; + fsl,hydra-mdio-muxval = <0x00>; + status = "disabled"; + + phy_rgmii_0: ethernet-phy@0 { + reg = <0x0>; + }; + phy_rgmii_1: ethernet-phy@1 { + reg = <0x1>; + }; + }; + + /* + * Virtual MDIO for the four-port SGMII card. + * The fsl,hydra-mdio-muxval property will be + * fixed-up by U-Boot based on the slot that + * the SGMII card is in. + * + * Note: we do not support DTSEC5 connected to + * SGMII, so this is the only SGMII node. + */ + hydra_mdio_sgmii: hydra-mdio-sgmii { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,hydra-mdio"; + fsl,mdio-handle = <&mdio0>; + fsl,hydra-mdio-muxval = <0x00>; + status = "disabled"; + + phy_sgmii_1c: ethernet-phy@1c { + reg = <0x1c>; + }; + phy_sgmii_1d: ethernet-phy@1d { + reg = <0x1d>; + }; + phy_sgmii_1e: ethernet-phy@1e { + reg = <0x1e>; + }; + phy_sgmii_1f: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + }; + + enet1: ethernet@e2000 { + tbi-handle = <&tbi1>; + phy-handle = <&phy_sgmii_1d>; + phy-connection-type = "sgmii"; + }; + + mdio@e3120 { + tbi1: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet2: ethernet@e4000 { + tbi-handle = <&tbi2>; + phy-handle = <&phy_sgmii_1e>; + phy-connection-type = "sgmii"; + }; + + mdio@e5120 { + tbi2: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet3: ethernet@e6000 { + tbi-handle = <&tbi3>; + phy-handle = <&phy_sgmii_1f>; + phy-connection-type = "sgmii"; + }; + + mdio@e7120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-tbi"; + reg = <0xe7120 0xee0>; + interrupts = <100 1 0 0>; + + tbi3: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet4: ethernet@e8000 { + tbi-handle = <&tbi4>; + phy-handle = <&phy_rgmii_1>; + phy-connection-type = "rgmii"; + }; + + mdio@e9120 { + tbi4: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet5: ethernet@f0000 { + /* + * phy-handle will be updated by U-Boot to + * reflect the actual slot the XAUI card is in. + */ + phy-handle = <&phy_xgmii_1>; + phy-connection-type = "xgmii"; + }; + + /* + * We only support one XAUI card, so the MDIO muxing + * is set by U-Boot, and Linux never touches it. + * Therefore, we don't need a virtual MDIO node. + * However, the phy address depends on the slot, so + * only one of the ethernet-phy nodes below will be + * used. + */ + hydra_mdio_xgmii: mdio@f1000 { + status = "disabled"; + + /* XAUI card in slot 1 */ + phy_xgmii_1: ethernet-phy@4 { + reg = <0x4>; + }; + + /* XAUI card in slot 2 */ + phy_xgmii_2: ethernet-phy@0 { + reg = <0x0>; + }; + }; + }; + }; + + rapidio@ffe0c0000 { + reg = <0xf 0xfe0c0000 0 0x11000>; + + port1 { + ranges = <0 0 0xc 0x20000000 0 0x10000000>; + }; + port2 { + ranges = <0 0 0xc 0x30000000 0 0x10000000>; + }; + }; + + localbus@ffe124000 { + reg = <0xf 0xfe124000 0 0x1000>; + ranges = <0 0 0xf 0xb8000000 0x04000000>; + + flash@0,0 { + compatible = "cfi-flash"; + /* + * Map 64Mb of 128MB NOR flash memory. Since highest + * line of address of NOR flash memory are set by + * FPGA, memory are divided into two pages equal to + * 64MB. One of the pages can be accessed at once. + */ + reg = <0 0 0x04000000>; + bank-width = <2>; + device-width = <2>; + }; + + nand@2,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,elbc-fcm-nand"; + reg = <0x2 0x0 0x40000>; + + partition@0 { + label = "NAND U-Boot Image"; + reg = <0x0 0x02000000>; + read-only; + }; + + partition@2000000 { + label = "NAND Root File System"; + reg = <0x02000000 0x10000000>; + }; + + partition@12000000 { + label = "NAND Compressed RFS Image"; + reg = <0x12000000 0x08000000>; + }; + + partition@1a000000 { + label = "NAND Linux Kernel Image"; + reg = <0x1a000000 0x04000000>; + }; + + partition@1e000000 { + label = "NAND DTB Image"; + reg = <0x1e000000 0x01000000>; + }; + + partition@1f000000 { + label = "NAND Writable User area"; + reg = <0x1f000000 0x21000000>; + }; + }; + + board-control@3,0 { + compatible = "fsl,p5020ds-fpga", "fsl,fpga-ngpixis"; + reg = <3 0 0x30>; + }; + }; + + pci0: pcie@ffe200000 { + reg = <0xf 0xfe200000 0 0x1000>; + ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000 + 0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0x80000000 + 0x02000000 0 0x80000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0xff000000 + 0 0x00010000>; + }; + }; + + pci1: pcie@ffe201000 { + reg = <0xf 0xfe201000 0 0x1000>; + ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000 + 0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0x90000000 + 0x02000000 0 0x90000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0xff010000 + 0 0x00010000>; + }; + }; + + pci2: pcie@ffe202000 { + reg = <0xf 0xfe202000 0 0x1000>; + ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000 + 0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0xa0000000 + 0x02000000 0 0xa0000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0xff020000 + 0 0x00010000>; + }; + }; + + pci3: pcie@ffe203000 { + reg = <0xf 0xfe203000 0 0x1000>; + ranges = <0x02000000 0 0xb0000000 0x0 0xb0000000 0 0x08000000 + 0x01000000 0 0x00000000 0x0 0xff030000 0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0xb0000000 + 0x02000000 0 0xb0000000 + 0 0x08000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0xff030000 + 0 0x00010000>; + }; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; +}; Property changes on: head/sys/dts/powerpc/p5020ds.dts ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/dts/powerpc/p5020si.dtsi =================================================================== --- head/sys/dts/powerpc/p5020si.dtsi (nonexistent) +++ head/sys/dts/powerpc/p5020si.dtsi (revision 325826) @@ -0,0 +1,1389 @@ +/* + * P5020 Silicon Device Tree Source + * + * Copyright 2010-2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* $FreeBSD$ */ + +/dts-v1/; + +/ { + compatible = "fsl,P5020"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + aliases { + ccsr = &soc; + dcsr = &dcsr; + + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + ethernet3 = &enet3; + ethernet4 = &enet4; + ethernet5 = &enet5; + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; + pci3 = &pci3; + usb0 = &usb0; + usb1 = &usb1; + dma0 = &dma0; + dma1 = &dma1; + bman = &bman; + qman = &qman; + pme = &pme; + rman = &rman; + sdhc = &sdhc; + msi0 = &msi0; + msi1 = &msi1; + msi2 = &msi2; + + crypto = &crypto; + sec_jr0 = &sec_jr0; + sec_jr1 = &sec_jr1; + sec_jr2 = &sec_jr2; + sec_jr3 = &sec_jr3; + rtic_a = &rtic_a; + rtic_b = &rtic_b; + rtic_c = &rtic_c; + rtic_d = &rtic_d; + sec_mon = &sec_mon; + + raideng = &raideng; + raideng_jr0 = &raideng_jr0; + raideng_jr1 = &raideng_jr1; + raideng_jr2 = &raideng_jr2; + raideng_jr3 = &raideng_jr3; + + fman0 = &fman0; + fman0_oh0 = &fman0_oh0; + fman0_oh1 = &fman0_oh1; + fman0_oh2 = &fman0_oh2; + fman0_oh3 = &fman0_oh3; + fman0_oh4 = &fman0_oh4; + fman0_oh5 = &fman0_oh5; + fman0_oh6 = &fman0_oh6; + fman0_rx0 = &fman0_rx0; + fman0_rx1 = &fman0_rx1; + fman0_rx2 = &fman0_rx2; + fman0_rx3 = &fman0_rx3; + fman0_rx4 = &fman0_rx4; + fman0_rx5 = &fman0_rx5; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: PowerPC,e5500@0 { + device_type = "cpu"; + reg = <0>; + bus-frequency = <799999998>; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu1: PowerPC,e5500@1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2_1>; + L2_1: l2-cache { + next-level-cache = <&cpc>; + }; + }; + }; + + dcsr: dcsr@f00000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,dcsr", "simple-bus"; + + dcsr-epu@0 { + compatible = "fsl,dcsr-epu"; + interrupts = <52 2 0 0 + 84 2 0 0 + 85 2 0 0>; + interrupt-parent = <&mpic>; + reg = <0x0 0x1000>; + }; + dcsr-npc { + compatible = "fsl,dcsr-npc"; + reg = <0x1000 0x1000 0x1000000 0x8000>; + }; + dcsr-nxc@2000 { + compatible = "fsl,dcsr-nxc"; + reg = <0x2000 0x1000>; + }; + dcsr-corenet { + compatible = "fsl,dcsr-corenet"; + reg = <0x8000 0x1000 0xB0000 0x1000>; + }; + dcsr-dpaa@9000 { + compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa"; + reg = <0x9000 0x1000>; + }; + dcsr-ocn@11000 { + compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn"; + reg = <0x11000 0x1000>; + }; + dcsr-ddr@12000 { + compatible = "fsl,dcsr-ddr"; + dev-handle = <&ddr1>; + reg = <0x12000 0x1000>; + }; + dcsr-ddr@13000 { + compatible = "fsl,dcsr-ddr"; + dev-handle = <&ddr2>; + reg = <0x13000 0x1000>; + }; + dcsr-nal@18000 { + compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal"; + reg = <0x18000 0x1000>; + }; + dcsr-rcpm@22000 { + compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm"; + reg = <0x22000 0x1000>; + }; + dcsr-cpu-sb-proxy@40000 { + compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; + cpu-handle = <&cpu0>; + reg = <0x40000 0x1000>; + }; + dcsr-cpu-sb-proxy@41000 { + compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; + cpu-handle = <&cpu1>; + reg = <0x41000 0x1000>; + }; + }; + + bman-portals@ff4000000 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "fsl,bman-portals"; + ranges = <0x0 0xf 0xfde00000 0x200000>; + bman-portal@0 { + cell-index = <0x0>; + compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; + reg = <0x0 0x4000 0x100000 0x1000>; + interrupts = <105 2 0 0>; + }; + bman-portal@4000 { + cell-index = <0x1>; + compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; + reg = <0x4000 0x4000 0x101000 0x1000>; + interrupts = <107 2 0 0>; + }; + bman-portal@8000 { + cell-index = <2>; + compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; + reg = <0x8000 0x4000 0x102000 0x1000>; + interrupts = <109 2 0 0>; + }; + bman-portal@c000 { + cell-index = <0x3>; + compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; + reg = <0xc000 0x4000 0x103000 0x1000>; + interrupts = <111 2 0 0>; + }; + bman-portal@10000 { + cell-index = <0x4>; + compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; + reg = <0x10000 0x4000 0x104000 0x1000>; + interrupts = <113 2 0 0>; + }; + bman-portal@14000 { + cell-index = <0x5>; + compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; + reg = <0x14000 0x4000 0x105000 0x1000>; + interrupts = <115 2 0 0>; + }; + bman-portal@18000 { + cell-index = <0x6>; + compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; + reg = <0x18000 0x4000 0x106000 0x1000>; + interrupts = <117 2 0 0>; + }; + bman-portal@1c000 { + cell-index = <0x7>; + compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; + reg = <0x1c000 0x4000 0x107000 0x1000>; + interrupts = <119 2 0 0>; + }; + bman-portal@20000 { + cell-index = <0x8>; + compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; + reg = <0x20000 0x4000 0x108000 0x1000>; + interrupts = <121 2 0 0>; + }; + bman-portal@24000 { + cell-index = <0x9>; + compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; + reg = <0x24000 0x4000 0x109000 0x1000>; + interrupts = <123 2 0 0>; + }; + + buffer-pool@0 { + compatible = "fsl,p5020-bpool", "fsl,bpool"; + fsl,bpid = <0>; + fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; + }; + }; + + qman-portals@ff4200000 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "fsl,qman-portals"; + ranges = <0x0 0xf 0xfdc00000 0x200000>; + qportal0: qman-portal@0 { + cell-index = <0x0>; + compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; + reg = <0x0 0x4000 0x100000 0x1000>; + interrupts = <104 0x2 0 0>; + fsl,qman-channel-id = <0x0>; + }; + + qportal1: qman-portal@4000 { + cell-index = <0x1>; + compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; + reg = <0x4000 0x4000 0x101000 0x1000>; + interrupts = <106 0x2 0 0>; + fsl,qman-channel-id = <0x1>; + }; + + qportal2: qman-portal@8000 { + cell-index = <0x2>; + compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; + reg = <0x8000 0x4000 0x102000 0x1000>; + interrupts = <108 0x2 0 0>; + fsl,qman-channel-id = <0x2>; + }; + + qportal3: qman-portal@c000 { + cell-index = <0x3>; + compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; + reg = <0xc000 0x4000 0x103000 0x1000>; + interrupts = <110 0x2 0 0>; + fsl,qman-channel-id = <0x3>; + }; + + qportal4: qman-portal@10000 { + cell-index = <0x4>; + compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; + reg = <0x10000 0x4000 0x104000 0x1000>; + interrupts = <112 0x2 0 0>; + fsl,qman-channel-id = <0x4>; + }; + + qportal5: qman-portal@14000 { + cell-index = <0x5>; + compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; + reg = <0x14000 0x4000 0x105000 0x1000>; + interrupts = <114 0x2 0 0>; + fsl,qman-channel-id = <0x5>; + }; + + qportal6: qman-portal@18000 { + cell-index = <0x6>; + compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; + reg = <0x18000 0x4000 0x106000 0x1000>; + interrupts = <116 0x2 0 0>; + fsl,qman-channel-id = <0x6>; + }; + + qportal7: qman-portal@1c000 { + cell-index = <0x7>; + compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; + reg = <0x1c000 0x4000 0x107000 0x1000>; + interrupts = <118 0x2 0 0>; + fsl,qman-channel-id = <0x7>; + }; + + qportal8: qman-portal@20000 { + cell-index = <0x8>; + compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; + reg = <0x20000 0x4000 0x108000 0x1000>; + interrupts = <120 0x2 0 0>; + fsl,qman-channel-id = <0x8>; + }; + + qportal9: qman-portal@24000 { + cell-index = <0x9>; + compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; + reg = <0x24000 0x4000 0x109000 0x1000>; + interrupts = <122 0x2 0 0>; + fsl,qman-channel-id = <0x9>; + }; + + qpool1: qman-pool@1 { + cell-index = <1>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x21>; + }; + + qpool2: qman-pool@2 { + cell-index = <2>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x22>; + }; + + qpool3: qman-pool@3 { + cell-index = <3>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x23>; + }; + + qpool4: qman-pool@4 { + cell-index = <4>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x24>; + }; + + qpool5: qman-pool@5 { + cell-index = <5>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x25>; + }; + + qpool6: qman-pool@6 { + cell-index = <6>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x26>; + }; + + qpool7: qman-pool@7 { + cell-index = <7>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x27>; + }; + + qpool8: qman-pool@8 { + cell-index = <8>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x28>; + }; + + qpool9: qman-pool@9 { + cell-index = <9>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x29>; + }; + + qpool10: qman-pool@10 { + cell-index = <10>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2a>; + }; + + qpool11: qman-pool@11 { + cell-index = <11>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2b>; + }; + + qpool12: qman-pool@12 { + cell-index = <12>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2c>; + }; + + qpool13: qman-pool@13 { + cell-index = <13>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2d>; + }; + + qpool14: qman-pool@14 { + cell-index = <14>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2e>; + }; + + qpool15: qman-pool@15 { + cell-index = <15>; + compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2f>; + }; + }; + + soc: soc@ffe000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + + bus-frequency = <0>; // Filled out by kernel. + + ranges = <0x00000000 0xf 0xfe000000 0x1000000>; + reg = <0xf 0xfe000000 0 0x00001000>; + + soc-sram-error { + compatible = "fsl,soc-sram-error"; + interrupts = <16 2 1 29>; + }; + + corenet-law@0 { + compatible = "fsl,corenet-law"; + reg = <0x0 0x1000>; + fsl,num-laws = <32>; + }; + + ddr1: memory-controller@8000 { + compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; + reg = <0x8000 0x1000>; + interrupts = <16 2 1 23>; + }; + + ddr2: memory-controller@9000 { + compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; + reg = <0x9000 0x1000>; + interrupts = <16 2 1 22>; + }; + + cpc: l3-cache-controller@10000 { + compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; + reg = <0x10000 0x1000 + 0x11000 0x1000>; + interrupts = <16 2 1 27 + 16 2 1 26>; + }; + + corenet-cf@18000 { + compatible = "fsl,corenet-cf"; + reg = <0x18000 0x1000>; + interrupts = <16 2 1 31>; + fsl,ccf-num-csdids = <32>; + fsl,ccf-num-snoopids = <32>; + }; + + iommu@20000 { + compatible = "fsl,pamu-v1.0", "fsl,pamu"; + reg = <0x20000 0x4000>; + interrupts = < + 24 2 0 0 + 16 2 1 30>; + }; + + mpic: pic@40000 { + clock-frequency = <0>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "fsl,mpic", "chrp,open-pic"; + device_type = "open-pic"; + }; + + msi0: msi@41600 { + compatible = "fsl,mpic-msi"; + reg = <0x41600 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 0 0 + 0xe1 0 0 0 + 0xe2 0 0 0 + 0xe3 0 0 0 + 0xe4 0 0 0 + 0xe5 0 0 0 + 0xe6 0 0 0 + 0xe7 0 0 0>; + }; + + msi1: msi@41800 { + compatible = "fsl,mpic-msi"; + reg = <0x41800 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe8 0 0 0 + 0xe9 0 0 0 + 0xea 0 0 0 + 0xeb 0 0 0 + 0xec 0 0 0 + 0xed 0 0 0 + 0xee 0 0 0 + 0xef 0 0 0>; + }; + + msi2: msi@41a00 { + compatible = "fsl,mpic-msi"; + reg = <0x41a00 0x200>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xf0 0 0 0 + 0xf1 0 0 0 + 0xf2 0 0 0 + 0xf3 0 0 0 + 0xf4 0 0 0 + 0xf5 0 0 0 + 0xf6 0 0 0 + 0xf7 0 0 0>; + }; + + guts: global-utilities@e0000 { + compatible = "fsl,qoriq-device-config-1.0"; + reg = <0xe0000 0xe00>; + fsl,has-rstcr; + #sleep-cells = <1>; + fsl,liodn-bits = <12>; + }; + + pins: global-utilities@e0e00 { + compatible = "fsl,qoriq-pin-control-1.0"; + reg = <0xe0e00 0x200>; + #sleep-cells = <2>; + }; + + clockgen: global-utilities@e1000 { + compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0"; + reg = <0xe1000 0x1000>; + clock-frequency = <0>; + }; + + rcpm: global-utilities@e2000 { + compatible = "fsl,qoriq-rcpm-1.0"; + reg = <0xe2000 0x1000>; + #sleep-cells = <1>; + }; + + sfp: sfp@e8000 { + compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0"; + reg = <0xe8000 0x1000>; + }; + + serdes: serdes@ea000 { + compatible = "fsl,p5020-serdes"; + reg = <0xea000 0x1000>; + }; + + dma0: dma@100300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p5020-dma", "fsl,eloplus-dma"; + reg = <0x100300 0x4>; + ranges = <0x0 0x100100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <28 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <29 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <30 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <31 2 0 0>; + }; + }; + + dma1: dma@101300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p5020-dma", "fsl,eloplus-dma"; + reg = <0x101300 0x4>; + ranges = <0x0 0x101100 0x200>; + cell-index = <1>; + dma-channel@0 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupts = <32 2 0 0>; + }; + dma-channel@80 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupts = <33 2 0 0>; + }; + dma-channel@100 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupts = <34 2 0 0>; + }; + dma-channel@180 { + compatible = "fsl,p5020-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupts = <35 2 0 0>; + }; + }; + + spi@110000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,p5020-espi", "fsl,mpc8536-espi"; + reg = <0x110000 0x1000>; + interrupts = <53 0x2 0 0>; + fsl,espi-num-chipselects = <4>; + }; + + sdhc: sdhc@114000 { + compatible = "fsl,p5020-esdhc", "fsl,esdhc"; + reg = <0x114000 0x1000>; + interrupts = <48 2 0 0>; + sdhci,auto-cmd12; + clock-frequency = <0>; + }; + + i2c@118000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x118000 0x100>; + interrupts = <38 2 0 0>; + dfsrr; + }; + + i2c@118100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x118100 0x100>; + interrupts = <38 2 0 0>; + dfsrr; + }; + + i2c@119000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <2>; + compatible = "fsl-i2c"; + reg = <0x119000 0x100>; + interrupts = <39 2 0 0>; + dfsrr; + }; + + i2c@119100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <3>; + compatible = "fsl-i2c"; + reg = <0x119100 0x100>; + interrupts = <39 2 0 0>; + dfsrr; + }; + + serial0: serial@11c500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11c500 0x100>; + clock-frequency = <0>; + interrupts = <36 2 0 0>; + }; + + serial1: serial@11c600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11c600 0x100>; + clock-frequency = <0>; + interrupts = <36 2 0 0>; + }; + + serial2: serial@11d500 { + cell-index = <2>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11d500 0x100>; + clock-frequency = <0>; + interrupts = <37 2 0 0>; + }; + + serial3: serial@11d600 { + cell-index = <3>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x11d600 0x100>; + clock-frequency = <0>; + interrupts = <37 2 0 0>; + }; + + gpio0: gpio@130000 { + compatible = "fsl,p5020-gpio", "fsl,qoriq-gpio"; + reg = <0x130000 0x1000>; + interrupts = <55 2 0 0>; + #gpio-cells = <2>; + gpio-controller; + }; + + rman: rman@1e0000 { + compatible = "fsl,rman"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e0000 0x20000>; + reg = <0x1e0000 0x20000>; + interrupts = <16 2 1 11>; /* err_irq */ + fsl,qman-channels-id = <0x62 0x63>; + + inbound-block@0 { + compatible = "fsl,rman-inbound-block"; + reg = <0x0 0x800>; + }; + global-cfg@b00 { + compatible = "fsl,rman-global-cfg"; + reg = <0xb00 0x500>; + }; + inbound-block@1000 { + compatible = "fsl,rman-inbound-block"; + reg = <0x1000 0x800>; + }; + inbound-block@2000 { + compatible = "fsl,rman-inbound-block"; + reg = <0x2000 0x800>; + }; + inbound-block@3000 { + compatible = "fsl,rman-inbound-block"; + reg = <0x3000 0x800>; + }; + }; + + usb0: usb@210000 { + compatible = "fsl,p5020-usb2-mph", + "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; + reg = <0x210000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <44 0x2 0 0>; + phy_type = "utmi"; + port0; + }; + + usb1: usb@211000 { + compatible = "fsl,p5020-usb2-dr", + "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; + reg = <0x211000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <45 0x2 0 0>; + dr_mode = "host"; + phy_type = "utmi"; + }; + + sata@220000 { + compatible = "fsl,p5020-sata", "fsl,pq-sata-v2"; + reg = <0x220000 0x1000>; + interrupts = <68 0x2 0 0>; + }; + + sata@221000 { + compatible = "fsl,p5020-sata", "fsl,pq-sata-v2"; + reg = <0x221000 0x1000>; + interrupts = <69 0x2 0 0>; + }; + + crypto: crypto@300000 { + compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x300000 0x10000>; + ranges = <0 0x300000 0x10000>; + interrupts = <92 2 0 0>; + + sec_jr0: jr@1000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + interrupts = <88 2 0 0>; + }; + + sec_jr1: jr@2000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x2000 0x1000>; + interrupts = <89 2 0 0>; + }; + + sec_jr2: jr@3000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x3000 0x1000>; + interrupts = <90 2 0 0>; + }; + + sec_jr3: jr@4000 { + compatible = "fsl,sec-v4.2-job-ring", + "fsl,sec-v4.0-job-ring"; + reg = <0x4000 0x1000>; + interrupts = <91 2 0 0>; + }; + + rtic@6000 { + compatible = "fsl,sec-v4.2-rtic", + "fsl,sec-v4.0-rtic"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x6000 0x100>; + ranges = <0x0 0x6100 0xe00>; + + rtic_a: rtic-a@0 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x00 0x20 0x100 0x80>; + }; + + rtic_b: rtic-b@20 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x20 0x20 0x200 0x80>; + }; + + rtic_c: rtic-c@40 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x40 0x20 0x300 0x80>; + }; + + rtic_d: rtic-d@60 { + compatible = "fsl,sec-v4.2-rtic-memory", + "fsl,sec-v4.0-rtic-memory"; + reg = <0x60 0x20 0x500 0x80>; + }; + }; + }; + + sec_mon: sec_mon@314000 { + compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; + reg = <0x314000 0x1000>; + interrupts = <93 2 0 0>; + }; + + raideng: raideng@320000 { + compatible = "fsl,raideng-v1.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x320000 0x10000>; + ranges = <0 0x320000 0x10000>; + + raideng_jq0@1000 { + compatible = "fsl,raideng-v1.0-job-queue"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x1000 0x1000>; + ranges = <0x0 0x1000 0x1000>; + + raideng_jr0: jr@0 { + compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring"; + reg = <0x0 0x400>; + interrupts = <139 2 0 0>; + interrupt-parent = <&mpic>; + }; + + raideng_jr1: jr@400 { + compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring"; + reg = <0x400 0x400>; + interrupts = <140 2 0 0>; + interrupt-parent = <&mpic>; + }; + }; + + raideng_jq1@2000 { + compatible = "fsl,raideng-v1.0-job-queue"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2000 0x1000>; + ranges = <0x0 0x2000 0x1000>; + + raideng_jr2: jr@0 { + compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring"; + reg = <0x0 0x400>; + interrupts = <141 2 0 0>; + interrupt-parent = <&mpic>; + }; + + raideng_jr3: jr@400 { + compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring"; + reg = <0x400 0x400>; + interrupts = <142 2 0 0>; + interrupt-parent = <&mpic>; + }; + }; + }; + + pme: pme@316000 { + compatible = "fsl,pme"; + reg = <0x316000 0x10000>; + /* "fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ + /* "fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ + interrupts = <16 2 1 5>; + }; + + qman: qman@318000 { + compatible = "fsl,p5020-qman", "fsl,qman"; + reg = <0x318000 0x1000>; + interrupts = <16 2 1 3>; + /* Commented out, use default allocation */ + /* "fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ + /* "fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ + }; + + bman: bman@31a000 { + compatible = "fsl,p5020-bman", "fsl,bman"; + reg = <0x31a000 0x1000>; + interrupts = <16 2 1 2>; + /* Same as "fsl,qman-*, use default allocation */ + /* "fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ + }; + + fman0: fman@400000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <0>; + compatible = "fsl,p5020-fman", "fsl,fman", "simple-bus"; + ranges = <0 0x400000 0x100000>; + reg = <0x400000 0x100000>; + clock-frequency = <0>; + interrupts = < + 96 2 0 0 + 16 2 1 1>; + + cc@0 { + compatible = "fsl,p5020-fman-cc", "fsl,fman-cc"; + }; + + parser@c7000 { + compatible = "fsl,p5020-fman-parser", "fsl,fman-parser"; + reg = <0xc7000 0x1000>; + }; + + keygen@c1000 { + compatible = "fsl,p5020-fman-keygen", "fsl,fman-keygen"; + reg = <0xc1000 0x1000>; + }; + + policer@c0000 { + compatible = "fsl,p5020-fman-policer", "fsl,fman-policer"; + reg = <0xc0000 0x1000>; + }; + + muram@0 { + compatible = "fsl,p5020-fman-muram", "fsl,fman-muram"; + reg = <0x0 0x28000>; + }; + + bmi@80000 { + compatible = "fsl,p5020-fman-bmi", "fsl,fman-bmi"; + reg = <0x80000 0x400>; + }; + + qmi@80400 { + compatible = "fsl,p5020-fman-qmi", "fsl,fman-qmi"; + reg = <0x80400 0x400>; + }; + + fman0_rx0: port@88000 { + cell-index = <0>; + compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x88000 0x1000>; + }; + fman0_rx1: port@89000 { + cell-index = <1>; + compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x89000 0x1000>; + }; + fman0_rx2: port@8a000 { + cell-index = <2>; + compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x8a000 0x1000>; + }; + fman0_rx3: port@8b000 { + cell-index = <3>; + compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x8b000 0x1000>; + }; + fman0_rx4: port@8c000 { + cell-index = <4>; + compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; + reg = <0x8c000 0x1000>; + }; + fman0_rx5: port@90000 { + cell-index = <0>; + compatible = "fsl,p5020-fman-port-10g-rx", "fsl,fman-port-10g-rx"; + reg = <0x90000 0x1000>; + }; + + fman0_tx5: port@b0000 { + cell-index = <0>; + compatible = "fsl,p5020-fman-port-10g-tx", "fsl,fman-port-10g-tx"; + reg = <0xb0000 0x1000>; + fsl,qman-channel-id = <0x40>; + }; + fman0_tx0: port@a8000 { + cell-index = <0>; + compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xa8000 0x1000>; + fsl,qman-channel-id = <0x41>; + }; + fman0_tx1: port@a9000 { + cell-index = <1>; + compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xa9000 0x1000>; + fsl,qman-channel-id = <0x42>; + }; + fman0_tx2: port@aa000 { + cell-index = <2>; + compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xaa000 0x1000>; + fsl,qman-channel-id = <0x43>; + }; + fman0_tx3: port@ab000 { + cell-index = <3>; + compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xab000 0x1000>; + fsl,qman-channel-id = <0x44>; + }; + fman0_tx4: port@ac000 { + cell-index = <4>; + compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; + reg = <0xac000 0x1000>; + fsl,qman-channel-id = <0x45>; + }; + + fman0_oh0: port@81000 { + cell-index = <0>; + compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x81000 0x1000>; + fsl,qman-channel-id = <0x46>; + }; + fman0_oh1: port@82000 { + cell-index = <1>; + compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x82000 0x1000>; + fsl,qman-channel-id = <0x47>; + }; + fman0_oh2: port@83000 { + cell-index = <2>; + compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x83000 0x1000>; + fsl,qman-channel-id = <0x48>; + }; + fman0_oh3: port@84000 { + cell-index = <3>; + compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x84000 0x1000>; + fsl,qman-channel-id = <0x49>; + }; + fman0_oh4: port@85000 { + cell-index = <4>; + compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x85000 0x1000>; + fsl,qman-channel-id = <0x4a>; + }; + fman0_oh5: port@86000 { + cell-index = <5>; + compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x86000 0x1000>; + fsl,qman-channel-id = <0x4b>; + }; + fman0_oh6: port@87000 { + cell-index = <6>; + compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; + reg = <0x87000 0x1000>; + }; + + enet0: ethernet@e0000 { + cell-index = <0>; + compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe0000 0x1000>; + fsl,port-handles = <&fman0_rx0 &fman0_tx0>; + ptimer-handle = <&ptp_timer0>; + }; + + mdio0: mdio@e1120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-mdio"; + reg = <0xe1120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet1: ethernet@e2000 { + cell-index = <1>; + compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe2000 0x1000>; + fsl,port-handles = <&fman0_rx1 &fman0_tx1>; + ptimer-handle = <&ptp_timer0>; + }; + + mdio@e3120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-tbi"; + reg = <0xe3120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet2: ethernet@e4000 { + cell-index = <2>; + compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe4000 0x1000>; + fsl,port-handles = <&fman0_rx2 &fman0_tx2>; + ptimer-handle = <&ptp_timer0>; + }; + + mdio@e5120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-tbi"; + reg = <0xe5120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet3: ethernet@e6000 { + cell-index = <3>; + compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe6000 0x1000>; + fsl,port-handles = <&fman0_rx3 &fman0_tx3>; + ptimer-handle = <&ptp_timer0>; + }; + + mdio@e7120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-tbi"; + reg = <0xe7120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet4: ethernet@e8000 { + cell-index = <4>; + compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; + reg = <0xe8000 0x1000>; + fsl,port-handles = <&fman0_rx4 &fman0_tx4>; + ptimer-handle = <&ptp_timer0>; + }; + + mdio@e9120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-tbi"; + reg = <0xe9120 0xee0>; + interrupts = <100 1 0 0>; + }; + + enet5: ethernet@f0000 { + cell-index = <0>; + compatible = "fsl,p5020-fman-10g-mac", "fsl,fman-10g-mac", "fsl,fman-xgec"; + reg = <0xf0000 0x1000>; + fsl,port-handles = <&fman0_rx5 &fman0_tx5>; + }; + + mdio@f1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-xmdio"; + reg = <0xf1000 0x1000>; + interrupts = <100 1 0 0>; + }; + + ptp_timer0: rtc@fe000 { + compatible = "fsl,fman-rtc"; + reg = <0xfe000 0x1000>; + }; + }; + }; + + rapidio@ffe0c0000 { + compatible = "fsl,srio"; + interrupts = <16 2 1 11>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + port1 { + #address-cells = <2>; + #size-cells = <2>; + cell-index = <1>; + }; + + port2 { + #address-cells = <2>; + #size-cells = <2>; + cell-index = <2>; + }; + }; + + localbus@ffe124000 { + compatible = "fsl,p5020-rev1.0-elbc", "simple-bus", "fsl,elbc"; + interrupts = < + 25 2 0 0 + 16 2 1 19 + >; + #address-cells = <2>; + #size-cells = <1>; + }; + + pci0: pcie@ffe200000 { + compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + status = "okay"; + #size-cells = <2>; + #address-cells = <3>; + cell-index = <0>; + bus-range = <0x0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi0>; + interrupts = <16 2 1 15>; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 15>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 40 1 0 0 + 0000 0 0 2 &mpic 1 1 0 0 + 0000 0 0 3 &mpic 2 1 0 0 + 0000 0 0 4 &mpic 3 1 0 0 + >; + }; + }; + + pci1: pcie@ffe201000 { + compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + status = "disabled"; + #size-cells = <2>; + #address-cells = <3>; + cell-index = <1>; + bus-range = <0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi1>; + interrupts = <16 2 1 14>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 14>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 41 1 0 0 + 0000 0 0 2 &mpic 5 1 0 0 + 0000 0 0 3 &mpic 6 1 0 0 + 0000 0 0 4 &mpic 7 1 0 0 + >; + }; + }; + + pci2: pcie@ffe202000 { + compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + status = "okay"; + #size-cells = <2>; + #address-cells = <3>; + cell-index = <2>; + bus-range = <0x0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi2>; + interrupts = <16 2 1 13>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 13>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 42 1 0 0 + 0000 0 0 2 &mpic 9 1 0 0 + 0000 0 0 3 &mpic 10 1 0 0 + 0000 0 0 4 &mpic 11 1 0 0 + >; + }; + }; + + pci3: pcie@ffe203000 { + compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; + device_type = "pci"; + status = "disabled"; + #size-cells = <2>; + #address-cells = <3>; + cell-index = <3>; + bus-range = <0x0 0xff>; + clock-frequency = <0x1fca055>; + fsl,msi = <&msi2>; + interrupts = <16 2 1 12>; + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <16 2 1 12>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 43 1 0 0 + 0000 0 0 2 &mpic 0 1 0 0 + 0000 0 0 3 &mpic 4 1 0 0 + 0000 0 0 4 &mpic 8 1 0 0 + >; + }; + }; +}; Property changes on: head/sys/dts/powerpc/p5020si.dtsi ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/tools/fdt/make_dtb.sh =================================================================== --- head/sys/tools/fdt/make_dtb.sh (revision 325825) +++ head/sys/tools/fdt/make_dtb.sh (revision 325826) @@ -1,26 +1,26 @@ #!/bin/sh # # $FreeBSD$ # Script generates dtb file ($3) from dts source ($2) in build tree S ($1) S=$1 dts="$2" dtb_path=$3 if [ -z "$dts" ]; then echo "No DTS specified" exit 1 fi if [ -z "${MACHINE}" ]; then MACHINE=$(uname -m) fi : ${DTC:=dtc} for d in ${dts}; do dtb=${dtb_path}/`basename $d .dts`.dtb echo "converting $d -> $dtb" - cpp -P -x assembler-with-cpp -I $S/gnu/dts/include -I $S/boot/fdt/dts/${MACHINE} -I $S/gnu/dts/${MACHINE} -include $d /dev/null | - ${DTC} -@ -O dtb -o $dtb -b 0 -p 1024 -i $S/boot/fdt/dts/${MACHINE} -i $S/gnu/dts/${MACHINE} + cpp -P -x assembler-with-cpp -I $S/gnu/dts/include -I $S/dts/${MACHINE} -I $S/gnu/dts/${MACHINE} -include $d /dev/null | + ${DTC} -@ -O dtb -o $dtb -b 0 -p 1024 -i $S/dts/${MACHINE} -i $S/gnu/dts/${MACHINE} done