Index: head/sys/boot/fdt/dts/arm/h3.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/h3.dtsi (revision 320834) +++ head/sys/boot/fdt/dts/arm/h3.dtsi (revision 320835) @@ -1,109 +1,107 @@ /*- * Copyright (c) 2016 Jared McNeill * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ / { cpus { cpu0: cpu@0 { clocks = <&ccu CLK_CPUX>; clock-latency = <2000000>; }; }; soc { emac: ethernet@1c30000 { compatible = "allwinner,sun8i-h3-emac"; reg = <0x01c30000 0x104>, <0x01c00030 0x4>; reg-names = "emac", "syscon"; interrupts = ; resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>; reset-names = "ahb", "ephy"; clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>; clock-names = "ahb", "ephy"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; r_i2c: i2c@1f02400 { compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01f02400 0x400>; interrupts = ; status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; sid: eeprom@1c14000 { compatible = "allwinner,sun8i-a83t-sid"; reg = <0x01c14000 0x400>; }; rtp: rtp@1c25000 { compatible = "allwinner,sun8i-h3-ts"; reg = <0x01c25000 0x400>; interrupts = ; clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; clock-names = "ahb", "ths"; resets = <&ccu RST_BUS_THS 8>; #thermal-sensor-cells = <0>; }; /* codec: codec@01c22c00 { */ /* compatible = "allwinner,sun8i-h3-codec"; */ /* reg = <0x01c22c00 0x100>, <0x01f015c0 0x4>; */ /* reg-names = "codec", "pr"; */ /* interrupts = ; */ /* clocks = <&ccu CLK_BUS_CODEC>, <&codec_clk>; */ /* clock-names = "ahb", "codec"; */ /* resets = <&ahb_rst 128>; */ /* reset-names = "ahb"; */ /* dmas = <&dma 15>, <&dma 15>; */ /* dma-names = "rx", "tx"; */ /* status = "disabled"; */ /* }; */ }; }; &pio { emac_pins_rgmii_a: emac_rgmii@0 { allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD7", "PD8", "PD9", "PD10", "PD12", "PD13", "PD15", "PD16", "PD17"; allwinner,function = "emac"; - allwinner,drive = ; - allwinner,pull = ; + allwinner,drive = <40>; }; emac_phy_reset_pin: emac_phy_reset_pin@0 { allwinner,pins = "PD6"; allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; + allwinner,drive = <10>; }; }; Index: head/sys/boot/fdt/dts/arm/orangepi-plus-2e.dts =================================================================== --- head/sys/boot/fdt/dts/arm/orangepi-plus-2e.dts (revision 320834) +++ head/sys/boot/fdt/dts/arm/orangepi-plus-2e.dts (revision 320835) @@ -1,121 +1,119 @@ /*- * Copyright (c) 2016 Jared McNeill * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #include "sun8i-h3-orangepi-plus.dts" #include "h3.dtsi" / { model = "Xunlong Orange Pi Plus 2E"; compatible = "xunlong,orangepi-plus-2e", "allwinner,sun8i-h3"; reg_gmac_3v3: gmac-3v3 { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&emac_phy_reset_pin>; regulator-name = "gmac-3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; startup-delay-us = <100000>; enable-active-high; gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; }; }; &pio { emac_phy_reset_pin: emac_phy_reset_pin@0 { allwinner,pins = "PD6"; allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; + allwinner,drive = <10>; }; codec_pa_pin: codec_pa_pin@0 { allwinner,pins = "PA16"; allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; + allwinner,drive = <10>; }; }; &emac { pinctrl-names = "default"; pinctrl-0 = <&emac_pins_rgmii_a>; phy-supply = <®_gmac_3v3>; phy-mode = "rgmii"; phy = <&phy1>; allwinner,leds-active-low; status = "okay"; phy1: ethernet-phy@1 { reg = <1>; }; }; &ehci2 { status = "okay"; }; &i2c0 { status = "okay"; }; &r_i2c { status = "okay"; vdd_cpu: regulator@65 { compatible = "silergy,sy8106a"; reg = <0x65>; regulator-name = "vdd-cpu"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1400000>; regulator-ramp-delay = <200>; regulator-boot-on; regulator-always-on; }; }; /* &codec { */ /* pinctrl-names = "default"; */ /* pinctrl-0 = <&codec_pa_pin>; */ /* allwinner,pa-gpios = <&pio 0 16 GPIO_ACTIVE_HIGH>; /\* PA16 *\/ */ /* status = "okay"; */ /* }; */ &cpu0 { cpu-supply = <&vdd_cpu>; operating-points = < /* kHz uV */ 1296000 1340000 1200000 1320000 1008000 1200000 816000 1100000 648000 1040000 >; };