Index: vendor/lld/dist/COFF/Driver.cpp
===================================================================
--- vendor/lld/dist/COFF/Driver.cpp	(revision 320020)
+++ vendor/lld/dist/COFF/Driver.cpp	(revision 320021)
@@ -1,1134 +1,1141 @@
 //===- Driver.cpp ---------------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #include "Driver.h"
 #include "Config.h"
 #include "Error.h"
 #include "InputFiles.h"
 #include "Memory.h"
 #include "SymbolTable.h"
 #include "Symbols.h"
 #include "Writer.h"
 #include "lld/Driver/Driver.h"
 #include "llvm/ADT/Optional.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/BinaryFormat/Magic.h"
 #include "llvm/Object/ArchiveWriter.h"
 #include "llvm/Object/COFFImportFile.h"
 #include "llvm/Object/COFFModuleDefinition.h"
 #include "llvm/Option/Arg.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/Option/Option.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/Process.h"
 #include "llvm/Support/TarWriter.h"
 #include "llvm/Support/TargetSelect.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/ToolDrivers/llvm-lib/LibDriver.h"
 #include <algorithm>
 #include <memory>
 
 #include <future>
 
 using namespace llvm;
 using namespace llvm::object;
 using namespace llvm::COFF;
 using llvm::sys::Process;
 
 namespace lld {
 namespace coff {
 
 Configuration *Config;
 LinkerDriver *Driver;
 
 BumpPtrAllocator BAlloc;
 StringSaver Saver{BAlloc};
 std::vector<SpecificAllocBase *> SpecificAllocBase::Instances;
 
 bool link(ArrayRef<const char *> Args, raw_ostream &Diag) {
   ErrorCount = 0;
   ErrorOS = &Diag;
   Argv0 = Args[0];
   Config = make<Configuration>();
   Config->ColorDiagnostics =
       (ErrorOS == &llvm::errs() && Process::StandardErrHasColors());
   Driver = make<LinkerDriver>();
   Driver->link(Args);
   return !ErrorCount;
 }
 
 // Drop directory components and replace extension with ".exe" or ".dll".
 static std::string getOutputPath(StringRef Path) {
   auto P = Path.find_last_of("\\/");
   StringRef S = (P == StringRef::npos) ? Path : Path.substr(P + 1);
   const char* E = Config->DLL ? ".dll" : ".exe";
   return (S.substr(0, S.rfind('.')) + E).str();
 }
 
 // ErrorOr is not default constructible, so it cannot be used as the type
 // parameter of a future.
 // FIXME: We could open the file in createFutureForFile and avoid needing to
 // return an error here, but for the moment that would cost us a file descriptor
 // (a limited resource on Windows) for the duration that the future is pending.
 typedef std::pair<std::unique_ptr<MemoryBuffer>, std::error_code> MBErrPair;
 
 // Create a std::future that opens and maps a file using the best strategy for
 // the host platform.
 static std::future<MBErrPair> createFutureForFile(std::string Path) {
 #if LLVM_ON_WIN32
   // On Windows, file I/O is relatively slow so it is best to do this
   // asynchronously.
   auto Strategy = std::launch::async;
 #else
   auto Strategy = std::launch::deferred;
 #endif
   return std::async(Strategy, [=]() {
     auto MBOrErr = MemoryBuffer::getFile(Path);
     if (!MBOrErr)
       return MBErrPair{nullptr, MBOrErr.getError()};
     return MBErrPair{std::move(*MBOrErr), std::error_code()};
   });
 }
 
 MemoryBufferRef LinkerDriver::takeBuffer(std::unique_ptr<MemoryBuffer> MB) {
   MemoryBufferRef MBRef = *MB;
   make<std::unique_ptr<MemoryBuffer>>(std::move(MB)); // take ownership
 
   if (Driver->Tar)
     Driver->Tar->append(relativeToRoot(MBRef.getBufferIdentifier()),
                         MBRef.getBuffer());
   return MBRef;
 }
 
 void LinkerDriver::addBuffer(std::unique_ptr<MemoryBuffer> MB) {
   MemoryBufferRef MBRef = takeBuffer(std::move(MB));
 
   // File type is detected by contents, not by file extension.
   file_magic Magic = identify_magic(MBRef.getBuffer());
   if (Magic == file_magic::windows_resource) {
     Resources.push_back(MBRef);
     return;
   }
 
   FilePaths.push_back(MBRef.getBufferIdentifier());
   if (Magic == file_magic::archive)
     return Symtab.addFile(make<ArchiveFile>(MBRef));
   if (Magic == file_magic::bitcode)
     return Symtab.addFile(make<BitcodeFile>(MBRef));
 
   if (Magic == file_magic::coff_cl_gl_object)
     error(MBRef.getBufferIdentifier() + ": is not a native COFF file. "
           "Recompile without /GL");
   else
     Symtab.addFile(make<ObjectFile>(MBRef));
 }
 
 void LinkerDriver::enqueuePath(StringRef Path) {
   auto Future =
       std::make_shared<std::future<MBErrPair>>(createFutureForFile(Path));
   std::string PathStr = Path;
   enqueueTask([=]() {
     auto MBOrErr = Future->get();
     if (MBOrErr.second)
       error("could not open " + PathStr + ": " + MBOrErr.second.message());
     else
       Driver->addBuffer(std::move(MBOrErr.first));
   });
 }
 
 void LinkerDriver::addArchiveBuffer(MemoryBufferRef MB, StringRef SymName,
                                     StringRef ParentName) {
   file_magic Magic = identify_magic(MB.getBuffer());
   if (Magic == file_magic::coff_import_library) {
     Symtab.addFile(make<ImportFile>(MB));
     return;
   }
 
   InputFile *Obj;
   if (Magic == file_magic::coff_object) {
     Obj = make<ObjectFile>(MB);
   } else if (Magic == file_magic::bitcode) {
     Obj = make<BitcodeFile>(MB);
   } else {
     error("unknown file type: " + MB.getBufferIdentifier());
     return;
   }
 
   Obj->ParentName = ParentName;
   Symtab.addFile(Obj);
   log("Loaded " + toString(Obj) + " for " + SymName);
 }
 
 void LinkerDriver::enqueueArchiveMember(const Archive::Child &C,
                                         StringRef SymName,
                                         StringRef ParentName) {
   if (!C.getParent()->isThin()) {
     MemoryBufferRef MB = check(
         C.getMemoryBufferRef(),
         "could not get the buffer for the member defining symbol " + SymName);
     enqueueTask([=]() { Driver->addArchiveBuffer(MB, SymName, ParentName); });
     return;
   }
 
   auto Future = std::make_shared<std::future<MBErrPair>>(createFutureForFile(
       check(C.getFullName(),
             "could not get the filename for the member defining symbol " +
                 SymName)));
   enqueueTask([=]() {
     auto MBOrErr = Future->get();
     if (MBOrErr.second)
       fatal(MBOrErr.second,
             "could not get the buffer for the member defining " + SymName);
     Driver->addArchiveBuffer(takeBuffer(std::move(MBOrErr.first)), SymName,
                              ParentName);
   });
 }
 
 static bool isDecorated(StringRef Sym) {
   return Sym.startswith("_") || Sym.startswith("@") || Sym.startswith("?");
 }
 
 // Parses .drectve section contents and returns a list of files
 // specified by /defaultlib.
 void LinkerDriver::parseDirectives(StringRef S) {
   opt::InputArgList Args = Parser.parse(S);
 
   for (auto *Arg : Args) {
     switch (Arg->getOption().getID()) {
     case OPT_alternatename:
       parseAlternateName(Arg->getValue());
       break;
     case OPT_defaultlib:
       if (Optional<StringRef> Path = findLib(Arg->getValue()))
         enqueuePath(*Path);
       break;
     case OPT_export: {
       Export E = parseExport(Arg->getValue());
       E.Directives = true;
       Config->Exports.push_back(E);
       break;
     }
     case OPT_failifmismatch:
       checkFailIfMismatch(Arg->getValue());
       break;
     case OPT_incl:
       addUndefined(Arg->getValue());
       break;
     case OPT_merge:
       parseMerge(Arg->getValue());
       break;
     case OPT_nodefaultlib:
       Config->NoDefaultLibs.insert(doFindLib(Arg->getValue()));
       break;
     case OPT_section:
       parseSection(Arg->getValue());
       break;
     case OPT_editandcontinue:
     case OPT_fastfail:
     case OPT_guardsym:
     case OPT_throwingnew:
       break;
     default:
       error(Arg->getSpelling() + " is not allowed in .drectve");
     }
   }
 }
 
 // Find file from search paths. You can omit ".obj", this function takes
 // care of that. Note that the returned path is not guaranteed to exist.
 StringRef LinkerDriver::doFindFile(StringRef Filename) {
   bool HasPathSep = (Filename.find_first_of("/\\") != StringRef::npos);
   if (HasPathSep)
     return Filename;
   bool HasExt = (Filename.find('.') != StringRef::npos);
   for (StringRef Dir : SearchPaths) {
     SmallString<128> Path = Dir;
     sys::path::append(Path, Filename);
     if (sys::fs::exists(Path.str()))
       return Saver.save(Path.str());
     if (!HasExt) {
       Path.append(".obj");
       if (sys::fs::exists(Path.str()))
         return Saver.save(Path.str());
     }
   }
   return Filename;
 }
 
 // Resolves a file path. This never returns the same path
 // (in that case, it returns None).
 Optional<StringRef> LinkerDriver::findFile(StringRef Filename) {
   StringRef Path = doFindFile(Filename);
   bool Seen = !VisitedFiles.insert(Path.lower()).second;
   if (Seen)
     return None;
   return Path;
 }
 
 // Find library file from search path.
 StringRef LinkerDriver::doFindLib(StringRef Filename) {
   // Add ".lib" to Filename if that has no file extension.
   bool HasExt = (Filename.find('.') != StringRef::npos);
   if (!HasExt)
     Filename = Saver.save(Filename + ".lib");
   return doFindFile(Filename);
 }
 
 // Resolves a library path. /nodefaultlib options are taken into
 // consideration. This never returns the same path (in that case,
 // it returns None).
 Optional<StringRef> LinkerDriver::findLib(StringRef Filename) {
   if (Config->NoDefaultLibAll)
     return None;
   if (!VisitedLibs.insert(Filename.lower()).second)
     return None;
   StringRef Path = doFindLib(Filename);
   if (Config->NoDefaultLibs.count(Path))
     return None;
   if (!VisitedFiles.insert(Path.lower()).second)
     return None;
   return Path;
 }
 
 // Parses LIB environment which contains a list of search paths.
 void LinkerDriver::addLibSearchPaths() {
   Optional<std::string> EnvOpt = Process::GetEnv("LIB");
   if (!EnvOpt.hasValue())
     return;
   StringRef Env = Saver.save(*EnvOpt);
   while (!Env.empty()) {
     StringRef Path;
     std::tie(Path, Env) = Env.split(';');
     SearchPaths.push_back(Path);
   }
 }
 
 SymbolBody *LinkerDriver::addUndefined(StringRef Name) {
   SymbolBody *B = Symtab.addUndefined(Name);
   Config->GCRoot.insert(B);
   return B;
 }
 
 // Symbol names are mangled by appending "_" prefix on x86.
 StringRef LinkerDriver::mangle(StringRef Sym) {
   assert(Config->Machine != IMAGE_FILE_MACHINE_UNKNOWN);
   if (Config->Machine == I386)
     return Saver.save("_" + Sym);
   return Sym;
 }
 
 // Windows specific -- find default entry point name.
 StringRef LinkerDriver::findDefaultEntry() {
   // User-defined main functions and their corresponding entry points.
   static const char *Entries[][2] = {
       {"main", "mainCRTStartup"},
       {"wmain", "wmainCRTStartup"},
       {"WinMain", "WinMainCRTStartup"},
       {"wWinMain", "wWinMainCRTStartup"},
   };
   for (auto E : Entries) {
     StringRef Entry = Symtab.findMangle(mangle(E[0]));
     if (!Entry.empty() && !isa<Undefined>(Symtab.find(Entry)->body()))
       return mangle(E[1]);
   }
   return "";
 }
 
 WindowsSubsystem LinkerDriver::inferSubsystem() {
   if (Config->DLL)
     return IMAGE_SUBSYSTEM_WINDOWS_GUI;
   if (Symtab.findUnderscore("main") || Symtab.findUnderscore("wmain"))
     return IMAGE_SUBSYSTEM_WINDOWS_CUI;
   if (Symtab.findUnderscore("WinMain") || Symtab.findUnderscore("wWinMain"))
     return IMAGE_SUBSYSTEM_WINDOWS_GUI;
   return IMAGE_SUBSYSTEM_UNKNOWN;
 }
 
 static uint64_t getDefaultImageBase() {
   if (Config->is64())
     return Config->DLL ? 0x180000000 : 0x140000000;
   return Config->DLL ? 0x10000000 : 0x400000;
 }
 
 static std::string createResponseFile(const opt::InputArgList &Args,
                                       ArrayRef<StringRef> FilePaths,
                                       ArrayRef<StringRef> SearchPaths) {
   SmallString<0> Data;
   raw_svector_ostream OS(Data);
 
   for (auto *Arg : Args) {
     switch (Arg->getOption().getID()) {
     case OPT_linkrepro:
     case OPT_INPUT:
     case OPT_defaultlib:
     case OPT_libpath:
       break;
     default:
       OS << toString(Arg) << "\n";
     }
   }
 
   for (StringRef Path : SearchPaths) {
     std::string RelPath = relativeToRoot(Path);
     OS << "/libpath:" << quote(RelPath) << "\n";
   }
 
   for (StringRef Path : FilePaths)
     OS << quote(relativeToRoot(Path)) << "\n";
 
   return Data.str();
 }
 
 static unsigned getDefaultDebugType(const opt::InputArgList &Args) {
   unsigned DebugTypes = static_cast<unsigned>(DebugType::CV);
   if (Args.hasArg(OPT_driver))
     DebugTypes |= static_cast<unsigned>(DebugType::PData);
   if (Args.hasArg(OPT_profile))
     DebugTypes |= static_cast<unsigned>(DebugType::Fixup);
   return DebugTypes;
 }
 
 static unsigned parseDebugType(StringRef Arg) {
   SmallVector<StringRef, 3> Types;
   Arg.split(Types, ',', /*KeepEmpty=*/false);
 
   unsigned DebugTypes = static_cast<unsigned>(DebugType::None);
   for (StringRef Type : Types)
     DebugTypes |= StringSwitch<unsigned>(Type.lower())
                       .Case("cv", static_cast<unsigned>(DebugType::CV))
                       .Case("pdata", static_cast<unsigned>(DebugType::PData))
                       .Case("fixup", static_cast<unsigned>(DebugType::Fixup))
                       .Default(0);
   return DebugTypes;
 }
 
 static std::string getMapFile(const opt::InputArgList &Args) {
   auto *Arg = Args.getLastArg(OPT_lldmap, OPT_lldmap_file);
   if (!Arg)
     return "";
   if (Arg->getOption().getID() == OPT_lldmap_file)
     return Arg->getValue();
 
   assert(Arg->getOption().getID() == OPT_lldmap);
   StringRef OutFile = Config->OutputFile;
   return (OutFile.substr(0, OutFile.rfind('.')) + ".map").str();
 }
 
 static std::string getImplibPath() {
   if (!Config->Implib.empty())
     return Config->Implib;
   SmallString<128> Out = StringRef(Config->OutputFile);
   sys::path::replace_extension(Out, ".lib");
   return Out.str();
 }
 
-std::vector<COFFShortExport> createCOFFShortExportFromConfig() {
+static void createImportLibrary() {
   std::vector<COFFShortExport> Exports;
   for (Export &E1 : Config->Exports) {
     COFFShortExport E2;
     // Use SymbolName, which will have any stdcall or fastcall qualifiers.
     E2.Name = E1.SymbolName;
     E2.ExtName = E1.ExtName;
     E2.Ordinal = E1.Ordinal;
     E2.Noname = E1.Noname;
     E2.Data = E1.Data;
     E2.Private = E1.Private;
     E2.Constant = E1.Constant;
     Exports.push_back(E2);
   }
-  return Exports;
-}
 
-static void createImportLibrary() {
-  std::vector<COFFShortExport> Exports = createCOFFShortExportFromConfig();
   std::string DLLName = sys::path::filename(Config->OutputFile);
   std::string Path = getImplibPath();
   writeImportLibrary(DLLName, Path, Exports, Config->Machine);
 }
 
 static void parseModuleDefs(StringRef Path) {
   std::unique_ptr<MemoryBuffer> MB = check(
     MemoryBuffer::getFile(Path, -1, false, true), "could not open " + Path);
   COFFModuleDefinition M =
       check(parseCOFFModuleDefinition(MB->getMemBufferRef(), Config->Machine));
 
   if (Config->OutputFile.empty())
     Config->OutputFile = Saver.save(M.OutputFile);
   if (M.ImageBase)
     Config->ImageBase = M.ImageBase;
   if (M.StackReserve)
     Config->StackReserve = M.StackReserve;
   if (M.StackCommit)
     Config->StackCommit = M.StackCommit;
   if (M.HeapReserve)
     Config->HeapReserve = M.HeapReserve;
   if (M.HeapCommit)
     Config->HeapCommit = M.HeapCommit;
   if (M.MajorImageVersion)
     Config->MajorImageVersion = M.MajorImageVersion;
   if (M.MinorImageVersion)
     Config->MinorImageVersion = M.MinorImageVersion;
   if (M.MajorOSVersion)
     Config->MajorOSVersion = M.MajorOSVersion;
   if (M.MinorOSVersion)
     Config->MinorOSVersion = M.MinorOSVersion;
 
   for (COFFShortExport E1 : M.Exports) {
     Export E2;
     E2.Name = Saver.save(E1.Name);
     if (E1.isWeak())
       E2.ExtName = Saver.save(E1.ExtName);
     E2.Ordinal = E1.Ordinal;
     E2.Noname = E1.Noname;
     E2.Data = E1.Data;
     E2.Private = E1.Private;
     E2.Constant = E1.Constant;
     Config->Exports.push_back(E2);
   }
 }
 
 std::vector<MemoryBufferRef> getArchiveMembers(Archive *File) {
   std::vector<MemoryBufferRef> V;
   Error Err = Error::success();
   for (const ErrorOr<Archive::Child> &COrErr : File->children(Err)) {
     Archive::Child C =
         check(COrErr,
               File->getFileName() + ": could not get the child of the archive");
     MemoryBufferRef MBRef =
         check(C.getMemoryBufferRef(),
               File->getFileName() +
                   ": could not get the buffer for a child of the archive");
     V.push_back(MBRef);
   }
   if (Err)
     fatal(File->getFileName() +
           ": Archive::children failed: " + toString(std::move(Err)));
   return V;
 }
 
 // A helper function for filterBitcodeFiles.
 static bool needsRebuilding(MemoryBufferRef MB) {
   // The MSVC linker doesn't support thin archives, so if it's a thin
   // archive, we always need to rebuild it.
   std::unique_ptr<Archive> File =
       check(Archive::create(MB), "Failed to read " + MB.getBufferIdentifier());
   if (File->isThin())
     return true;
 
   // Returns true if the archive contains at least one bitcode file.
   for (MemoryBufferRef Member : getArchiveMembers(File.get()))
     if (identify_magic(Member.getBuffer()) == file_magic::bitcode)
       return true;
   return false;
 }
 
 // Opens a given path as an archive file and removes bitcode files
 // from them if exists. This function is to appease the MSVC linker as
 // their linker doesn't like archive files containing non-native
 // object files.
 //
 // If a given archive doesn't contain bitcode files, the archive path
 // is returned as-is. Otherwise, a new temporary file is created and
 // its path is returned.
 static Optional<std::string>
 filterBitcodeFiles(StringRef Path, std::vector<std::string> &TemporaryFiles) {
   std::unique_ptr<MemoryBuffer> MB = check(
       MemoryBuffer::getFile(Path, -1, false, true), "could not open " + Path);
   MemoryBufferRef MBRef = MB->getMemBufferRef();
   file_magic Magic = identify_magic(MBRef.getBuffer());
 
   if (Magic == file_magic::bitcode)
     return None;
   if (Magic != file_magic::archive)
     return Path.str();
   if (!needsRebuilding(MBRef))
     return Path.str();
 
   std::unique_ptr<Archive> File =
       check(Archive::create(MBRef),
             MBRef.getBufferIdentifier() + ": failed to parse archive");
 
   std::vector<NewArchiveMember> New;
   for (MemoryBufferRef Member : getArchiveMembers(File.get()))
     if (identify_magic(Member.getBuffer()) != file_magic::bitcode)
       New.emplace_back(Member);
 
   if (New.empty())
     return None;
 
   log("Creating a temporary archive for " + Path + " to remove bitcode files");
 
   SmallString<128> S;
   if (auto EC = sys::fs::createTemporaryFile("lld-" + sys::path::stem(Path),
                                              ".lib", S))
     fatal(EC, "cannot create a temporary file");
   std::string Temp = S.str();
   TemporaryFiles.push_back(Temp);
 
   std::pair<StringRef, std::error_code> Ret =
       llvm::writeArchive(Temp, New, /*WriteSymtab=*/true, Archive::Kind::K_GNU,
                          /*Deterministics=*/true,
                          /*Thin=*/false);
   if (Ret.second)
     error("failed to create a new archive " + S.str() + ": " + Ret.first);
   return Temp;
 }
 
 // Create response file contents and invoke the MSVC linker.
 void LinkerDriver::invokeMSVC(opt::InputArgList &Args) {
   std::string Rsp = "/nologo\n";
   std::vector<std::string> Temps;
 
   // Write out archive members that we used in symbol resolution and pass these
   // to MSVC before any archives, so that MSVC uses the same objects to satisfy
   // references.
   for (const auto *O : Symtab.ObjectFiles) {
     if (O->ParentName.empty())
       continue;
     SmallString<128> S;
     int Fd;
     if (auto EC = sys::fs::createTemporaryFile(
             "lld-" + sys::path::filename(O->ParentName), ".obj", Fd, S))
       fatal(EC, "cannot create a temporary file");
     raw_fd_ostream OS(Fd, /*shouldClose*/ true);
     OS << O->MB.getBuffer();
     Temps.push_back(S.str());
     Rsp += quote(S) + "\n";
   }
 
   for (auto *Arg : Args) {
     switch (Arg->getOption().getID()) {
     case OPT_linkrepro:
     case OPT_lldmap:
     case OPT_lldmap_file:
     case OPT_lldsavetemps:
     case OPT_msvclto:
       // LLD-specific options are stripped.
       break;
     case OPT_opt:
       if (!StringRef(Arg->getValue()).startswith("lld"))
         Rsp += toString(Arg) + " ";
       break;
     case OPT_INPUT: {
       if (Optional<StringRef> Path = doFindFile(Arg->getValue())) {
         if (Optional<std::string> S = filterBitcodeFiles(*Path, Temps))
           Rsp += quote(*S) + "\n";
         continue;
       }
       Rsp += quote(Arg->getValue()) + "\n";
       break;
     }
     default:
       Rsp += toString(Arg) + "\n";
     }
   }
 
   std::vector<StringRef> ObjectFiles = Symtab.compileBitcodeFiles();
   runMSVCLinker(Rsp, ObjectFiles);
 
   for (StringRef Path : Temps)
     sys::fs::remove(Path);
 }
 
 void LinkerDriver::enqueueTask(std::function<void()> Task) {
   TaskQueue.push_back(std::move(Task));
 }
 
 bool LinkerDriver::run() {
   bool DidWork = !TaskQueue.empty();
   while (!TaskQueue.empty()) {
     TaskQueue.front()();
     TaskQueue.pop_front();
   }
   return DidWork;
 }
 
 void LinkerDriver::link(ArrayRef<const char *> ArgsArr) {
   // If the first command line argument is "/lib", link.exe acts like lib.exe.
   // We call our own implementation of lib.exe that understands bitcode files.
   if (ArgsArr.size() > 1 && StringRef(ArgsArr[1]).equals_lower("/lib")) {
     if (llvm::libDriverMain(ArgsArr.slice(1)) != 0)
       fatal("lib failed");
     return;
   }
 
   // Needed for LTO.
   InitializeAllTargetInfos();
   InitializeAllTargets();
   InitializeAllTargetMCs();
   InitializeAllAsmParsers();
   InitializeAllAsmPrinters();
   InitializeAllDisassemblers();
 
   // Parse command line options.
   opt::InputArgList Args = Parser.parseLINK(ArgsArr.slice(1));
 
   // Parse and evaluate -mllvm options.
   std::vector<const char *> V;
   V.push_back("lld-link (LLVM option parsing)");
   for (auto *Arg : Args.filtered(OPT_mllvm))
     V.push_back(Arg->getValue());
   cl::ParseCommandLineOptions(V.size(), V.data());
 
   // Handle /errorlimit early, because error() depends on it.
   if (auto *Arg = Args.getLastArg(OPT_errorlimit)) {
     int N = 20;
     StringRef S = Arg->getValue();
     if (S.getAsInteger(10, N))
       error(Arg->getSpelling() + " number expected, but got " + S);
     Config->ErrorLimit = N;
   }
 
   // Handle /help
   if (Args.hasArg(OPT_help)) {
     printHelp(ArgsArr[0]);
     return;
   }
 
   if (auto *Arg = Args.getLastArg(OPT_linkrepro)) {
     SmallString<64> Path = StringRef(Arg->getValue());
     sys::path::append(Path, "repro.tar");
 
     Expected<std::unique_ptr<TarWriter>> ErrOrWriter =
         TarWriter::create(Path, "repro");
 
     if (ErrOrWriter) {
       Tar = std::move(*ErrOrWriter);
     } else {
       error("/linkrepro: failed to open " + Path + ": " +
             toString(ErrOrWriter.takeError()));
     }
   }
 
-  if (!Args.hasArgNoClaim(OPT_INPUT))
-    fatal("no input files");
+  if (!Args.hasArgNoClaim(OPT_INPUT)) {
+    if (Args.hasArgNoClaim(OPT_deffile))
+      Config->NoEntry = true;
+    else
+      fatal("no input files");
+  }
 
   // Construct search path list.
   SearchPaths.push_back("");
   for (auto *Arg : Args.filtered(OPT_libpath))
     SearchPaths.push_back(Arg->getValue());
   addLibSearchPaths();
 
   // Handle /out
   if (auto *Arg = Args.getLastArg(OPT_out))
     Config->OutputFile = Arg->getValue();
 
   // Handle /verbose
   if (Args.hasArg(OPT_verbose))
     Config->Verbose = true;
 
   // Handle /force or /force:unresolved
   if (Args.hasArg(OPT_force) || Args.hasArg(OPT_force_unresolved))
     Config->Force = true;
 
   // Handle /debug
   if (Args.hasArg(OPT_debug)) {
     Config->Debug = true;
     Config->DebugTypes =
         Args.hasArg(OPT_debugtype)
             ? parseDebugType(Args.getLastArg(OPT_debugtype)->getValue())
             : getDefaultDebugType(Args);
   }
 
   // Create a dummy PDB file to satisfy build sytem rules.
   if (auto *Arg = Args.getLastArg(OPT_pdb))
     Config->PDBPath = Arg->getValue();
 
   // Handle /noentry
   if (Args.hasArg(OPT_noentry)) {
     if (Args.hasArg(OPT_dll))
       Config->NoEntry = true;
     else
       error("/noentry must be specified with /dll");
   }
 
   // Handle /dll
   if (Args.hasArg(OPT_dll)) {
     Config->DLL = true;
     Config->ManifestID = 2;
   }
 
   // Handle /fixed
   if (Args.hasArg(OPT_fixed)) {
     if (Args.hasArg(OPT_dynamicbase)) {
       error("/fixed must not be specified with /dynamicbase");
     } else {
       Config->Relocatable = false;
       Config->DynamicBase = false;
     }
   }
 
   if (Args.hasArg(OPT_appcontainer))
     Config->AppContainer = true;
 
   // Handle /machine
   if (auto *Arg = Args.getLastArg(OPT_machine))
     Config->Machine = getMachineType(Arg->getValue());
 
   // Handle /nodefaultlib:<filename>
   for (auto *Arg : Args.filtered(OPT_nodefaultlib))
     Config->NoDefaultLibs.insert(doFindLib(Arg->getValue()));
 
   // Handle /nodefaultlib
   if (Args.hasArg(OPT_nodefaultlib_all))
     Config->NoDefaultLibAll = true;
 
   // Handle /base
   if (auto *Arg = Args.getLastArg(OPT_base))
     parseNumbers(Arg->getValue(), &Config->ImageBase);
 
   // Handle /stack
   if (auto *Arg = Args.getLastArg(OPT_stack))
     parseNumbers(Arg->getValue(), &Config->StackReserve, &Config->StackCommit);
 
   // Handle /heap
   if (auto *Arg = Args.getLastArg(OPT_heap))
     parseNumbers(Arg->getValue(), &Config->HeapReserve, &Config->HeapCommit);
 
   // Handle /version
   if (auto *Arg = Args.getLastArg(OPT_version))
     parseVersion(Arg->getValue(), &Config->MajorImageVersion,
                  &Config->MinorImageVersion);
 
   // Handle /subsystem
   if (auto *Arg = Args.getLastArg(OPT_subsystem))
     parseSubsystem(Arg->getValue(), &Config->Subsystem, &Config->MajorOSVersion,
                    &Config->MinorOSVersion);
 
   // Handle /alternatename
   for (auto *Arg : Args.filtered(OPT_alternatename))
     parseAlternateName(Arg->getValue());
 
   // Handle /include
   for (auto *Arg : Args.filtered(OPT_incl))
     addUndefined(Arg->getValue());
 
   // Handle /implib
   if (auto *Arg = Args.getLastArg(OPT_implib))
     Config->Implib = Arg->getValue();
 
   // Handle /opt
   for (auto *Arg : Args.filtered(OPT_opt)) {
     std::string Str = StringRef(Arg->getValue()).lower();
     SmallVector<StringRef, 1> Vec;
     StringRef(Str).split(Vec, ',');
     for (StringRef S : Vec) {
       if (S == "noref") {
         Config->DoGC = false;
         Config->DoICF = false;
         continue;
       }
       if (S == "icf" || StringRef(S).startswith("icf=")) {
         Config->DoICF = true;
         continue;
       }
       if (S == "noicf") {
         Config->DoICF = false;
         continue;
       }
       if (StringRef(S).startswith("lldlto=")) {
         StringRef OptLevel = StringRef(S).substr(7);
         if (OptLevel.getAsInteger(10, Config->LTOOptLevel) ||
             Config->LTOOptLevel > 3)
           error("/opt:lldlto: invalid optimization level: " + OptLevel);
         continue;
       }
       if (StringRef(S).startswith("lldltojobs=")) {
         StringRef Jobs = StringRef(S).substr(11);
         if (Jobs.getAsInteger(10, Config->LTOJobs) || Config->LTOJobs == 0)
           error("/opt:lldltojobs: invalid job count: " + Jobs);
         continue;
       }
       if (StringRef(S).startswith("lldltopartitions=")) {
         StringRef N = StringRef(S).substr(17);
         if (N.getAsInteger(10, Config->LTOPartitions) ||
             Config->LTOPartitions == 0)
           error("/opt:lldltopartitions: invalid partition count: " + N);
         continue;
       }
       if (S != "ref" && S != "lbr" && S != "nolbr")
         error("/opt: unknown option: " + S);
     }
   }
 
   // Handle /lldsavetemps
   if (Args.hasArg(OPT_lldsavetemps))
     Config->SaveTemps = true;
 
   // Handle /failifmismatch
   for (auto *Arg : Args.filtered(OPT_failifmismatch))
     checkFailIfMismatch(Arg->getValue());
 
   // Handle /merge
   for (auto *Arg : Args.filtered(OPT_merge))
     parseMerge(Arg->getValue());
 
   // Handle /section
   for (auto *Arg : Args.filtered(OPT_section))
     parseSection(Arg->getValue());
 
   // Handle /manifest
   if (auto *Arg = Args.getLastArg(OPT_manifest_colon))
     parseManifest(Arg->getValue());
 
   // Handle /manifestuac
   if (auto *Arg = Args.getLastArg(OPT_manifestuac))
     parseManifestUAC(Arg->getValue());
 
   // Handle /manifestdependency
   if (auto *Arg = Args.getLastArg(OPT_manifestdependency))
     Config->ManifestDependency = Arg->getValue();
 
   // Handle /manifestfile
   if (auto *Arg = Args.getLastArg(OPT_manifestfile))
     Config->ManifestFile = Arg->getValue();
 
   // Handle /manifestinput
   for (auto *Arg : Args.filtered(OPT_manifestinput))
     Config->ManifestInput.push_back(Arg->getValue());
 
   // Handle miscellaneous boolean flags.
   if (Args.hasArg(OPT_allowisolation_no))
     Config->AllowIsolation = false;
   if (Args.hasArg(OPT_dynamicbase_no))
     Config->DynamicBase = false;
   if (Args.hasArg(OPT_nxcompat_no))
     Config->NxCompat = false;
   if (Args.hasArg(OPT_tsaware_no))
     Config->TerminalServerAware = false;
   if (Args.hasArg(OPT_nosymtab))
     Config->WriteSymtab = false;
   Config->DumpPdb = Args.hasArg(OPT_dumppdb);
 
   Config->MapFile = getMapFile(Args);
 
   if (ErrorCount)
     return;
 
   // Create a list of input files. Files can be given as arguments
   // for /defaultlib option.
   std::vector<MemoryBufferRef> MBs;
   for (auto *Arg : Args.filtered(OPT_INPUT))
     if (Optional<StringRef> Path = findFile(Arg->getValue()))
       enqueuePath(*Path);
   for (auto *Arg : Args.filtered(OPT_defaultlib))
     if (Optional<StringRef> Path = findLib(Arg->getValue()))
       enqueuePath(*Path);
 
   // Windows specific -- Create a resource file containing a manifest file.
   if (Config->Manifest == Configuration::Embed)
     addBuffer(createManifestRes());
 
   // Read all input files given via the command line.
   run();
 
   // We should have inferred a machine type by now from the input files, but if
   // not we assume x64.
   if (Config->Machine == IMAGE_FILE_MACHINE_UNKNOWN) {
     warn("/machine is not specified. x64 is assumed");
     Config->Machine = AMD64;
   }
 
   // Windows specific -- Input files can be Windows resource files (.res files).
   // We invoke cvtres.exe to convert resource files to a regular COFF file
   // then link the result file normally.
   if (!Resources.empty())
     addBuffer(convertResToCOFF(Resources));
 
   if (Tar)
     Tar->append("response.txt",
                 createResponseFile(Args, FilePaths,
                                    ArrayRef<StringRef>(SearchPaths).slice(1)));
 
   // Handle /largeaddressaware
   if (Config->is64() || Args.hasArg(OPT_largeaddressaware))
     Config->LargeAddressAware = true;
 
   // Handle /highentropyva
   if (Config->is64() && !Args.hasArg(OPT_highentropyva_no))
     Config->HighEntropyVA = true;
 
   // Handle /entry and /dll
   if (auto *Arg = Args.getLastArg(OPT_entry)) {
     Config->Entry = addUndefined(mangle(Arg->getValue()));
   } else if (Args.hasArg(OPT_dll) && !Config->NoEntry) {
     StringRef S = (Config->Machine == I386) ? "__DllMainCRTStartup@12"
                                             : "_DllMainCRTStartup";
     Config->Entry = addUndefined(S);
   } else if (!Config->NoEntry) {
     // Windows specific -- If entry point name is not given, we need to
     // infer that from user-defined entry name.
     StringRef S = findDefaultEntry();
     if (S.empty())
       fatal("entry point must be defined");
     Config->Entry = addUndefined(S);
     log("Entry name inferred: " + S);
   }
 
   // Handle /export
   for (auto *Arg : Args.filtered(OPT_export)) {
     Export E = parseExport(Arg->getValue());
     if (Config->Machine == I386) {
       if (!isDecorated(E.Name))
         E.Name = Saver.save("_" + E.Name);
       if (!E.ExtName.empty() && !isDecorated(E.ExtName))
         E.ExtName = Saver.save("_" + E.ExtName);
     }
     Config->Exports.push_back(E);
   }
 
   // Handle /def
   if (auto *Arg = Args.getLastArg(OPT_deffile)) {
     // parseModuleDefs mutates Config object.
     parseModuleDefs(Arg->getValue());
+  }
+
+  // Handle generation of import library from a def file.
+  if (!Args.hasArgNoClaim(OPT_INPUT)) {
+    fixupExports();
+    createImportLibrary();
+    exit(0);
   }
 
   // Handle /delayload
   for (auto *Arg : Args.filtered(OPT_delayload)) {
     Config->DelayLoads.insert(StringRef(Arg->getValue()).lower());
     if (Config->Machine == I386) {
       Config->DelayLoadHelper = addUndefined("___delayLoadHelper2@8");
     } else {
       Config->DelayLoadHelper = addUndefined("__delayLoadHelper2");
     }
   }
 
   // Set default image name if neither /out or /def set it.
   if (Config->OutputFile.empty()) {
     Config->OutputFile =
         getOutputPath((*Args.filtered(OPT_INPUT).begin())->getValue());
   }
 
   // Put the PDB next to the image if no /pdb flag was passed.
   if (Config->Debug && Config->PDBPath.empty()) {
     Config->PDBPath = Config->OutputFile;
     sys::path::replace_extension(Config->PDBPath, ".pdb");
   }
 
   // Disable PDB generation if the user requested it.
   if (Args.hasArg(OPT_nopdb))
     Config->PDBPath = "";
 
   // Set default image base if /base is not given.
   if (Config->ImageBase == uint64_t(-1))
     Config->ImageBase = getDefaultImageBase();
 
   Symtab.addRelative(mangle("__ImageBase"), 0);
   if (Config->Machine == I386) {
     Config->SEHTable = Symtab.addRelative("___safe_se_handler_table", 0);
     Config->SEHCount = Symtab.addAbsolute("___safe_se_handler_count", 0);
   }
 
   // We do not support /guard:cf (control flow protection) yet.
   // Define CFG symbols anyway so that we can link MSVC 2015 CRT.
   Symtab.addAbsolute(mangle("__guard_fids_table"), 0);
   Symtab.addAbsolute(mangle("__guard_fids_count"), 0);
   Symtab.addAbsolute(mangle("__guard_flags"), 0x100);
 
   // This code may add new undefined symbols to the link, which may enqueue more
   // symbol resolution tasks, so we need to continue executing tasks until we
   // converge.
   do {
     // Windows specific -- if entry point is not found,
     // search for its mangled names.
     if (Config->Entry)
       Symtab.mangleMaybe(Config->Entry);
 
     // Windows specific -- Make sure we resolve all dllexported symbols.
     for (Export &E : Config->Exports) {
       if (!E.ForwardTo.empty())
         continue;
       E.Sym = addUndefined(E.Name);
       if (!E.Directives)
         Symtab.mangleMaybe(E.Sym);
     }
 
     // Add weak aliases. Weak aliases is a mechanism to give remaining
     // undefined symbols final chance to be resolved successfully.
     for (auto Pair : Config->AlternateNames) {
       StringRef From = Pair.first;
       StringRef To = Pair.second;
       Symbol *Sym = Symtab.find(From);
       if (!Sym)
         continue;
       if (auto *U = dyn_cast<Undefined>(Sym->body()))
         if (!U->WeakAlias)
           U->WeakAlias = Symtab.addUndefined(To);
     }
 
     // Windows specific -- if __load_config_used can be resolved, resolve it.
     if (Symtab.findUnderscore("_load_config_used"))
       addUndefined(mangle("_load_config_used"));
   } while (run());
 
   if (ErrorCount)
     return;
 
   // If /msvclto is given, we use the MSVC linker to link LTO output files.
   // This is useful because MSVC link.exe can generate complete PDBs.
   if (Args.hasArg(OPT_msvclto)) {
     invokeMSVC(Args);
     exit(0);
   }
 
   // Do LTO by compiling bitcode input files to a set of native COFF files then
   // link those files.
   Symtab.addCombinedLTOObjects();
   run();
 
   // Make sure we have resolved all symbols.
   Symtab.reportRemainingUndefines();
 
   // Windows specific -- if no /subsystem is given, we need to infer
   // that from entry point name.
   if (Config->Subsystem == IMAGE_SUBSYSTEM_UNKNOWN) {
     Config->Subsystem = inferSubsystem();
     if (Config->Subsystem == IMAGE_SUBSYSTEM_UNKNOWN)
       fatal("subsystem must be defined");
   }
 
   // Handle /safeseh.
   if (Args.hasArg(OPT_safeseh)) {
     for (ObjectFile *File : Symtab.ObjectFiles)
       if (!File->SEHCompat)
         error("/safeseh: " + File->getName() + " is not compatible with SEH");
     if (ErrorCount)
       return;
   }
 
   // Windows specific -- when we are creating a .dll file, we also
   // need to create a .lib file.
   if (!Config->Exports.empty() || Config->DLL) {
     fixupExports();
     createImportLibrary();
     assignExportOrdinals();
   }
 
   // Windows specific -- Create a side-by-side manifest file.
   if (Config->Manifest == Configuration::SideBySide)
     createSideBySideManifest();
 
   // Identify unreferenced COMDAT sections.
   if (Config->DoGC)
     markLive(Symtab.getChunks());
 
   // Identify identical COMDAT sections to merge them.
   if (Config->DoICF)
     doICF(Symtab.getChunks());
 
   // Write the result.
   writeResult(&Symtab);
 
   // Call exit to avoid calling destructors.
   exit(0);
 }
 
 } // namespace coff
 } // namespace lld
Index: vendor/lld/dist/COFF/DriverUtils.cpp
===================================================================
--- vendor/lld/dist/COFF/DriverUtils.cpp	(revision 320020)
+++ vendor/lld/dist/COFF/DriverUtils.cpp	(revision 320021)
@@ -1,737 +1,737 @@
 //===- DriverUtils.cpp ----------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains utility functions for the driver. Because there
 // are so many small functions, we created this separate file to make
 // Driver.cpp less cluttered.
 //
 //===----------------------------------------------------------------------===//
 
 #include "Config.h"
 #include "Driver.h"
 #include "Error.h"
 #include "Memory.h"
 #include "Symbols.h"
 #include "llvm/ADT/Optional.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/Object/COFF.h"
 #include "llvm/Option/Arg.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/Option/Option.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/FileUtilities.h"
 #include "llvm/Support/Process.h"
 #include "llvm/Support/Program.h"
 #include "llvm/Support/raw_ostream.h"
 #include <memory>
 
 using namespace llvm::COFF;
 using namespace llvm;
 using llvm::cl::ExpandResponseFiles;
 using llvm::cl::TokenizeWindowsCommandLine;
 using llvm::sys::Process;
 
 namespace lld {
 namespace coff {
 namespace {
 
 class Executor {
 public:
   explicit Executor(StringRef S) : Prog(Saver.save(S)) {}
   void add(StringRef S) { Args.push_back(Saver.save(S)); }
   void add(std::string &S) { Args.push_back(Saver.save(S)); }
   void add(Twine S) { Args.push_back(Saver.save(S)); }
   void add(const char *S) { Args.push_back(Saver.save(S)); }
 
   void run() {
     ErrorOr<std::string> ExeOrErr = sys::findProgramByName(Prog);
     if (auto EC = ExeOrErr.getError())
       fatal(EC, "unable to find " + Prog + " in PATH: ");
     StringRef Exe = Saver.save(*ExeOrErr);
     Args.insert(Args.begin(), Exe);
 
     std::vector<const char *> Vec;
     for (StringRef S : Args)
       Vec.push_back(S.data());
     Vec.push_back(nullptr);
 
     if (sys::ExecuteAndWait(Args[0], Vec.data()) != 0)
       fatal("ExecuteAndWait failed: " +
             llvm::join(Args.begin(), Args.end(), " "));
   }
 
 private:
   StringRef Prog;
   std::vector<StringRef> Args;
 };
 
 } // anonymous namespace
 
 // Returns /machine's value.
 MachineTypes getMachineType(StringRef S) {
   MachineTypes MT = StringSwitch<MachineTypes>(S.lower())
                         .Cases("x64", "amd64", AMD64)
                         .Cases("x86", "i386", I386)
                         .Case("arm", ARMNT)
                         .Default(IMAGE_FILE_MACHINE_UNKNOWN);
   if (MT != IMAGE_FILE_MACHINE_UNKNOWN)
     return MT;
   fatal("unknown /machine argument: " + S);
 }
 
 StringRef machineToStr(MachineTypes MT) {
   switch (MT) {
   case ARMNT:
     return "arm";
   case AMD64:
     return "x64";
   case I386:
     return "x86";
   default:
     llvm_unreachable("unknown machine type");
   }
 }
 
 // Parses a string in the form of "<integer>[,<integer>]".
 void parseNumbers(StringRef Arg, uint64_t *Addr, uint64_t *Size) {
   StringRef S1, S2;
   std::tie(S1, S2) = Arg.split(',');
   if (S1.getAsInteger(0, *Addr))
     fatal("invalid number: " + S1);
   if (Size && !S2.empty() && S2.getAsInteger(0, *Size))
     fatal("invalid number: " + S2);
 }
 
 // Parses a string in the form of "<integer>[.<integer>]".
 // If second number is not present, Minor is set to 0.
 void parseVersion(StringRef Arg, uint32_t *Major, uint32_t *Minor) {
   StringRef S1, S2;
   std::tie(S1, S2) = Arg.split('.');
   if (S1.getAsInteger(0, *Major))
     fatal("invalid number: " + S1);
   *Minor = 0;
   if (!S2.empty() && S2.getAsInteger(0, *Minor))
     fatal("invalid number: " + S2);
 }
 
 // Parses a string in the form of "<subsystem>[,<integer>[.<integer>]]".
 void parseSubsystem(StringRef Arg, WindowsSubsystem *Sys, uint32_t *Major,
                     uint32_t *Minor) {
   StringRef SysStr, Ver;
   std::tie(SysStr, Ver) = Arg.split(',');
   *Sys = StringSwitch<WindowsSubsystem>(SysStr.lower())
     .Case("boot_application", IMAGE_SUBSYSTEM_WINDOWS_BOOT_APPLICATION)
     .Case("console", IMAGE_SUBSYSTEM_WINDOWS_CUI)
     .Case("efi_application", IMAGE_SUBSYSTEM_EFI_APPLICATION)
     .Case("efi_boot_service_driver", IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER)
     .Case("efi_rom", IMAGE_SUBSYSTEM_EFI_ROM)
     .Case("efi_runtime_driver", IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER)
     .Case("native", IMAGE_SUBSYSTEM_NATIVE)
     .Case("posix", IMAGE_SUBSYSTEM_POSIX_CUI)
     .Case("windows", IMAGE_SUBSYSTEM_WINDOWS_GUI)
     .Default(IMAGE_SUBSYSTEM_UNKNOWN);
   if (*Sys == IMAGE_SUBSYSTEM_UNKNOWN)
     fatal("unknown subsystem: " + SysStr);
   if (!Ver.empty())
     parseVersion(Ver, Major, Minor);
 }
 
 // Parse a string of the form of "<from>=<to>".
 // Results are directly written to Config.
 void parseAlternateName(StringRef S) {
   StringRef From, To;
   std::tie(From, To) = S.split('=');
   if (From.empty() || To.empty())
     fatal("/alternatename: invalid argument: " + S);
   auto It = Config->AlternateNames.find(From);
   if (It != Config->AlternateNames.end() && It->second != To)
     fatal("/alternatename: conflicts: " + S);
   Config->AlternateNames.insert(It, std::make_pair(From, To));
 }
 
 // Parse a string of the form of "<from>=<to>".
 // Results are directly written to Config.
 void parseMerge(StringRef S) {
   StringRef From, To;
   std::tie(From, To) = S.split('=');
   if (From.empty() || To.empty())
     fatal("/merge: invalid argument: " + S);
   auto Pair = Config->Merge.insert(std::make_pair(From, To));
   bool Inserted = Pair.second;
   if (!Inserted) {
     StringRef Existing = Pair.first->second;
     if (Existing != To)
       warn(S + ": already merged into " + Existing);
   }
 }
 
 static uint32_t parseSectionAttributes(StringRef S) {
   uint32_t Ret = 0;
   for (char C : S.lower()) {
     switch (C) {
     case 'd':
       Ret |= IMAGE_SCN_MEM_DISCARDABLE;
       break;
     case 'e':
       Ret |= IMAGE_SCN_MEM_EXECUTE;
       break;
     case 'k':
       Ret |= IMAGE_SCN_MEM_NOT_CACHED;
       break;
     case 'p':
       Ret |= IMAGE_SCN_MEM_NOT_PAGED;
       break;
     case 'r':
       Ret |= IMAGE_SCN_MEM_READ;
       break;
     case 's':
       Ret |= IMAGE_SCN_MEM_SHARED;
       break;
     case 'w':
       Ret |= IMAGE_SCN_MEM_WRITE;
       break;
     default:
       fatal("/section: invalid argument: " + S);
     }
   }
   return Ret;
 }
 
 // Parses /section option argument.
 void parseSection(StringRef S) {
   StringRef Name, Attrs;
   std::tie(Name, Attrs) = S.split(',');
   if (Name.empty() || Attrs.empty())
     fatal("/section: invalid argument: " + S);
   Config->Section[Name] = parseSectionAttributes(Attrs);
 }
 
 // Parses a string in the form of "EMBED[,=<integer>]|NO".
 // Results are directly written to Config.
 void parseManifest(StringRef Arg) {
   if (Arg.equals_lower("no")) {
     Config->Manifest = Configuration::No;
     return;
   }
   if (!Arg.startswith_lower("embed"))
     fatal("invalid option " + Arg);
   Config->Manifest = Configuration::Embed;
   Arg = Arg.substr(strlen("embed"));
   if (Arg.empty())
     return;
   if (!Arg.startswith_lower(",id="))
     fatal("invalid option " + Arg);
   Arg = Arg.substr(strlen(",id="));
   if (Arg.getAsInteger(0, Config->ManifestID))
     fatal("invalid option " + Arg);
 }
 
 // Parses a string in the form of "level=<string>|uiAccess=<string>|NO".
 // Results are directly written to Config.
 void parseManifestUAC(StringRef Arg) {
   if (Arg.equals_lower("no")) {
     Config->ManifestUAC = false;
     return;
   }
   for (;;) {
     Arg = Arg.ltrim();
     if (Arg.empty())
       return;
     if (Arg.startswith_lower("level=")) {
       Arg = Arg.substr(strlen("level="));
       std::tie(Config->ManifestLevel, Arg) = Arg.split(" ");
       continue;
     }
     if (Arg.startswith_lower("uiaccess=")) {
       Arg = Arg.substr(strlen("uiaccess="));
       std::tie(Config->ManifestUIAccess, Arg) = Arg.split(" ");
       continue;
     }
     fatal("invalid option " + Arg);
   }
 }
 
 // Quote each line with "". Existing double-quote is converted
 // to two double-quotes.
 static void quoteAndPrint(raw_ostream &Out, StringRef S) {
   while (!S.empty()) {
     StringRef Line;
     std::tie(Line, S) = S.split("\n");
     if (Line.empty())
       continue;
     Out << '\"';
     for (int I = 0, E = Line.size(); I != E; ++I) {
       if (Line[I] == '\"') {
         Out << "\"\"";
       } else {
         Out << Line[I];
       }
     }
     Out << "\"\n";
   }
 }
 
 // An RAII temporary file class that automatically removes a temporary file.
 namespace {
 class TemporaryFile {
 public:
   TemporaryFile(StringRef Prefix, StringRef Extn, StringRef Contents = "") {
     SmallString<128> S;
     if (auto EC = sys::fs::createTemporaryFile("lld-" + Prefix, Extn, S))
       fatal(EC, "cannot create a temporary file");
     Path = S.str();
 
     if (!Contents.empty()) {
       std::error_code EC;
       raw_fd_ostream OS(Path, EC, sys::fs::F_None);
       if (EC)
         fatal(EC, "failed to open " + Path);
       OS << Contents;
     }
   }
 
   TemporaryFile(TemporaryFile &&Obj) {
     std::swap(Path, Obj.Path);
   }
 
   ~TemporaryFile() {
     if (Path.empty())
       return;
     if (sys::fs::remove(Path))
       fatal("failed to remove " + Path);
   }
 
   // Returns a memory buffer of this temporary file.
   // Note that this function does not leave the file open,
   // so it is safe to remove the file immediately after this function
   // is called (you cannot remove an opened file on Windows.)
   std::unique_ptr<MemoryBuffer> getMemoryBuffer() {
     // IsVolatileSize=true forces MemoryBuffer to not use mmap().
     return check(MemoryBuffer::getFile(Path, /*FileSize=*/-1,
                                        /*RequiresNullTerminator=*/false,
                                        /*IsVolatileSize=*/true),
                  "could not open " + Path);
   }
 
   std::string Path;
 };
 }
 
 // Create the default manifest file as a temporary file.
 TemporaryFile createDefaultXml() {
   // Create a temporary file.
   TemporaryFile File("defaultxml", "manifest");
 
   // Open the temporary file for writing.
   std::error_code EC;
   raw_fd_ostream OS(File.Path, EC, sys::fs::F_Text);
   if (EC)
     fatal(EC, "failed to open " + File.Path);
 
   // Emit the XML. Note that we do *not* verify that the XML attributes are
   // syntactically correct. This is intentional for link.exe compatibility.
   OS << "<?xml version=\"1.0\" standalone=\"yes\"?>\n"
      << "<assembly xmlns=\"urn:schemas-microsoft-com:asm.v1\"\n"
      << "          manifestVersion=\"1.0\">\n";
   if (Config->ManifestUAC) {
     OS << "  <trustInfo>\n"
        << "    <security>\n"
        << "      <requestedPrivileges>\n"
        << "         <requestedExecutionLevel level=" << Config->ManifestLevel
        << " uiAccess=" << Config->ManifestUIAccess << "/>\n"
        << "      </requestedPrivileges>\n"
        << "    </security>\n"
        << "  </trustInfo>\n";
     if (!Config->ManifestDependency.empty()) {
       OS << "  <dependency>\n"
          << "    <dependentAssembly>\n"
          << "      <assemblyIdentity " << Config->ManifestDependency << " />\n"
          << "    </dependentAssembly>\n"
          << "  </dependency>\n";
     }
   }
   OS << "</assembly>\n";
   OS.close();
   return File;
 }
 
 static std::string readFile(StringRef Path) {
   std::unique_ptr<MemoryBuffer> MB =
       check(MemoryBuffer::getFile(Path), "could not open " + Path);
   return MB->getBuffer();
 }
 
 static std::string createManifestXml() {
   // Create the default manifest file.
   TemporaryFile File1 = createDefaultXml();
   if (Config->ManifestInput.empty())
     return readFile(File1.Path);
 
   // If manifest files are supplied by the user using /MANIFESTINPUT
   // option, we need to merge them with the default manifest.
   TemporaryFile File2("user", "manifest");
 
   Executor E("mt.exe");
   E.add("/manifest");
   E.add(File1.Path);
   for (StringRef Filename : Config->ManifestInput) {
     E.add("/manifest");
     E.add(Filename);
   }
   E.add("/nologo");
   E.add("/out:" + StringRef(File2.Path));
   E.run();
   return readFile(File2.Path);
 }
 
 // Create a resource file containing a manifest XML.
 std::unique_ptr<MemoryBuffer> createManifestRes() {
   // Create a temporary file for the resource script file.
   TemporaryFile RCFile("manifest", "rc");
 
   // Open the temporary file for writing.
   std::error_code EC;
   raw_fd_ostream Out(RCFile.Path, EC, sys::fs::F_Text);
   if (EC)
     fatal(EC, "failed to open " + RCFile.Path);
 
   // Write resource script to the RC file.
   Out << "#define LANG_ENGLISH 9\n"
       << "#define SUBLANG_DEFAULT 1\n"
       << "#define APP_MANIFEST " << Config->ManifestID << "\n"
       << "#define RT_MANIFEST 24\n"
       << "LANGUAGE LANG_ENGLISH, SUBLANG_DEFAULT\n"
       << "APP_MANIFEST RT_MANIFEST {\n";
   quoteAndPrint(Out, createManifestXml());
   Out << "}\n";
   Out.close();
 
   // Create output resource file.
   TemporaryFile ResFile("output-resource", "res");
 
   Executor E("rc.exe");
   E.add("/fo");
   E.add(ResFile.Path);
   E.add("/nologo");
   E.add(RCFile.Path);
   E.run();
   return ResFile.getMemoryBuffer();
 }
 
 void createSideBySideManifest() {
   std::string Path = Config->ManifestFile;
   if (Path == "")
     Path = Config->OutputFile + ".manifest";
   std::error_code EC;
   raw_fd_ostream Out(Path, EC, sys::fs::F_Text);
   if (EC)
     fatal(EC, "failed to create manifest");
   Out << createManifestXml();
 }
 
 // Parse a string in the form of
 // "<name>[=<internalname>][,@ordinal[,NONAME]][,DATA][,PRIVATE]"
 // or "<name>=<dllname>.<name>".
 // Used for parsing /export arguments.
 Export parseExport(StringRef Arg) {
   Export E;
   StringRef Rest;
   std::tie(E.Name, Rest) = Arg.split(",");
   if (E.Name.empty())
     goto err;
 
   if (E.Name.find('=') != StringRef::npos) {
     StringRef X, Y;
     std::tie(X, Y) = E.Name.split("=");
 
     // If "<name>=<dllname>.<name>".
     if (Y.find(".") != StringRef::npos) {
       E.Name = X;
       E.ForwardTo = Y;
       return E;
     }
 
     E.ExtName = X;
     E.Name = Y;
     if (E.Name.empty())
       goto err;
   }
 
   // If "<name>=<internalname>[,@ordinal[,NONAME]][,DATA][,PRIVATE]"
   while (!Rest.empty()) {
     StringRef Tok;
     std::tie(Tok, Rest) = Rest.split(",");
     if (Tok.equals_lower("noname")) {
       if (E.Ordinal == 0)
         goto err;
       E.Noname = true;
       continue;
     }
     if (Tok.equals_lower("data")) {
       E.Data = true;
       continue;
     }
     if (Tok.equals_lower("constant")) {
       E.Constant = true;
       continue;
     }
     if (Tok.equals_lower("private")) {
       E.Private = true;
       continue;
     }
     if (Tok.startswith("@")) {
       int32_t Ord;
       if (Tok.substr(1).getAsInteger(0, Ord))
         goto err;
       if (Ord <= 0 || 65535 < Ord)
         goto err;
       E.Ordinal = Ord;
       continue;
     }
     goto err;
   }
   return E;
 
 err:
   fatal("invalid /export: " + Arg);
 }
 
 static StringRef undecorate(StringRef Sym) {
   if (Config->Machine != I386)
     return Sym;
   return Sym.startswith("_") ? Sym.substr(1) : Sym;
 }
 
 // Performs error checking on all /export arguments.
 // It also sets ordinals.
 void fixupExports() {
   // Symbol ordinals must be unique.
   std::set<uint16_t> Ords;
   for (Export &E : Config->Exports) {
     if (E.Ordinal == 0)
       continue;
     if (!Ords.insert(E.Ordinal).second)
       fatal("duplicate export ordinal: " + E.Name);
   }
 
   for (Export &E : Config->Exports) {
     SymbolBody *Sym = E.Sym;
-    if (!E.ForwardTo.empty()) {
+    if (!E.ForwardTo.empty() || !Sym) {
       E.SymbolName = E.Name;
     } else {
       if (auto *U = dyn_cast<Undefined>(Sym))
         if (U->WeakAlias)
           Sym = U->WeakAlias;
       E.SymbolName = Sym->getName();
     }
   }
 
   for (Export &E : Config->Exports) {
     if (!E.ForwardTo.empty()) {
       E.ExportName = undecorate(E.Name);
     } else {
       E.ExportName = undecorate(E.ExtName.empty() ? E.Name : E.ExtName);
     }
   }
 
   // Uniquefy by name.
   std::map<StringRef, Export *> Map;
   std::vector<Export> V;
   for (Export &E : Config->Exports) {
     auto Pair = Map.insert(std::make_pair(E.ExportName, &E));
     bool Inserted = Pair.second;
     if (Inserted) {
       V.push_back(E);
       continue;
     }
     Export *Existing = Pair.first->second;
     if (E == *Existing || E.Name != Existing->Name)
       continue;
     warn("duplicate /export option: " + E.Name);
   }
   Config->Exports = std::move(V);
 
   // Sort by name.
   std::sort(Config->Exports.begin(), Config->Exports.end(),
             [](const Export &A, const Export &B) {
               return A.ExportName < B.ExportName;
             });
 }
 
 void assignExportOrdinals() {
   // Assign unique ordinals if default (= 0).
   uint16_t Max = 0;
   for (Export &E : Config->Exports)
     Max = std::max(Max, E.Ordinal);
   for (Export &E : Config->Exports)
     if (E.Ordinal == 0)
       E.Ordinal = ++Max;
 }
 
 // Parses a string in the form of "key=value" and check
 // if value matches previous values for the same key.
 void checkFailIfMismatch(StringRef Arg) {
   StringRef K, V;
   std::tie(K, V) = Arg.split('=');
   if (K.empty() || V.empty())
     fatal("/failifmismatch: invalid argument: " + Arg);
   StringRef Existing = Config->MustMatch[K];
   if (!Existing.empty() && V != Existing)
     fatal("/failifmismatch: mismatch detected: " + Existing + " and " + V +
           " for key " + K);
   Config->MustMatch[K] = V;
 }
 
 // Convert Windows resource files (.res files) to a .obj file
 // using cvtres.exe.
 std::unique_ptr<MemoryBuffer>
 convertResToCOFF(const std::vector<MemoryBufferRef> &MBs) {
   // Create an output file path.
   TemporaryFile File("resource-file", "obj");
 
   // Execute cvtres.exe.
   Executor E("cvtres.exe");
   E.add("/machine:" + machineToStr(Config->Machine));
   E.add("/readonly");
   E.add("/nologo");
   E.add("/out:" + Twine(File.Path));
 
   // We must create new files because the memory buffers we have may have no
   // underlying file still existing on the disk.
   // It happens if it was created from a TemporaryFile, which usually delete
   // the file just after creating the MemoryBuffer.
   std::vector<TemporaryFile> ResFiles;
   ResFiles.reserve(MBs.size());
   for (MemoryBufferRef MB : MBs) {
     // We store the temporary file in a vector to avoid deletion
     // before running cvtres
     ResFiles.emplace_back("resource-file", "res");
     TemporaryFile& ResFile = ResFiles.back();
     // Write the content of the resource in a temporary file
     std::error_code EC;
     raw_fd_ostream OS(ResFile.Path, EC, sys::fs::F_None);
     if (EC)
       fatal(EC, "failed to open " + ResFile.Path);
     OS << MB.getBuffer();
     OS.close();
 
     E.add(ResFile.Path);
   }
 
   E.run();
   return File.getMemoryBuffer();
 }
 
 // Run MSVC link.exe for given in-memory object files.
 // Command line options are copied from those given to LLD.
 // This is for the /msvclto option.
 void runMSVCLinker(std::string Rsp, ArrayRef<StringRef> Objects) {
   // Write the in-memory object files to disk.
   std::vector<TemporaryFile> Temps;
   for (StringRef S : Objects) {
     Temps.emplace_back("lto", "obj", S);
     Rsp += quote(Temps.back().Path) + "\n";
   }
 
   log("link.exe " + Rsp);
 
   // Run MSVC link.exe.
   Temps.emplace_back("lto", "rsp", Rsp);
   Executor E("link.exe");
   E.add(Twine("@" + Temps.back().Path));
   E.run();
 }
 
 // Create OptTable
 
 // Create prefix string literals used in Options.td
 #define PREFIX(NAME, VALUE) const char *const NAME[] = VALUE;
 #include "Options.inc"
 #undef PREFIX
 
 // Create table mapping all options defined in Options.td
 static const llvm::opt::OptTable::Info infoTable[] = {
 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X6, X7, X8, X9, X10)    \
   {                                                                    \
     X1, X2, X9, X10, OPT_##ID, llvm::opt::Option::KIND##Class, X8, X7, \
     OPT_##GROUP, OPT_##ALIAS, X6                                       \
   },
 #include "Options.inc"
 #undef OPTION
 };
 
 class COFFOptTable : public llvm::opt::OptTable {
 public:
   COFFOptTable() : OptTable(infoTable, true) {}
 };
 
 // Parses a given list of options.
 opt::InputArgList ArgParser::parse(ArrayRef<const char *> ArgsArr) {
   // First, replace respnose files (@<file>-style options).
   std::vector<const char *> Argv = replaceResponseFiles(ArgsArr);
 
   // Make InputArgList from string vectors.
   COFFOptTable Table;
   unsigned MissingIndex;
   unsigned MissingCount;
   opt::InputArgList Args = Table.ParseArgs(Argv, MissingIndex, MissingCount);
 
   // Print the real command line if response files are expanded.
   if (Args.hasArg(OPT_verbose) && ArgsArr.size() != Argv.size()) {
     std::string Msg = "Command line:";
     for (const char *S : Argv)
       Msg += " " + std::string(S);
     message(Msg);
   }
 
   if (MissingCount)
     fatal(Twine(Args.getArgString(MissingIndex)) + ": missing argument");
   for (auto *Arg : Args.filtered(OPT_UNKNOWN))
     warn("ignoring unknown argument: " + Arg->getSpelling());
   return Args;
 }
 
 // link.exe has an interesting feature. If LINK or _LINK_ environment
 // variables exist, their contents are handled as command line strings.
 // So you can pass extra arguments using them.
 opt::InputArgList ArgParser::parseLINK(std::vector<const char *> Args) {
   // Concatenate LINK env and command line arguments, and then parse them.
   if (Optional<std::string> S = Process::GetEnv("LINK")) {
     std::vector<const char *> V = tokenize(*S);
     Args.insert(Args.begin(), V.begin(), V.end());
   }
   if (Optional<std::string> S = Process::GetEnv("_LINK_")) {
     std::vector<const char *> V = tokenize(*S);
     Args.insert(Args.begin(), V.begin(), V.end());
   }
   return parse(Args);
 }
 
 std::vector<const char *> ArgParser::tokenize(StringRef S) {
   SmallVector<const char *, 16> Tokens;
   cl::TokenizeWindowsCommandLine(S, Saver, Tokens);
   return std::vector<const char *>(Tokens.begin(), Tokens.end());
 }
 
 // Creates a new command line by replacing options starting with '@'
 // character. '@<filename>' is replaced by the file's contents.
 std::vector<const char *>
 ArgParser::replaceResponseFiles(std::vector<const char *> Argv) {
   SmallVector<const char *, 256> Tokens(Argv.data(), Argv.data() + Argv.size());
   ExpandResponseFiles(Saver, TokenizeWindowsCommandLine, Tokens);
   return std::vector<const char *>(Tokens.begin(), Tokens.end());
 }
 
 void printHelp(const char *Argv0) {
   COFFOptTable Table;
   Table.PrintHelp(outs(), Argv0, "LLVM Linker", false);
 }
 
 } // namespace coff
 } // namespace lld
Index: vendor/lld/dist/COFF/InputFiles.h
===================================================================
--- vendor/lld/dist/COFF/InputFiles.h	(revision 320020)
+++ vendor/lld/dist/COFF/InputFiles.h	(revision 320021)
@@ -1,211 +1,223 @@
 //===- InputFiles.h ---------------------------------------------*- C++ -*-===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLD_COFF_INPUT_FILES_H
 #define LLD_COFF_INPUT_FILES_H
 
 #include "Config.h"
 #include "lld/Core/LLVM.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/DenseSet.h"
 #include "llvm/LTO/LTO.h"
 #include "llvm/Object/Archive.h"
 #include "llvm/Object/COFF.h"
 #include "llvm/Support/StringSaver.h"
 #include <memory>
 #include <set>
 #include <vector>
 
+namespace llvm {
+namespace pdb {
+class DbiModuleDescriptorBuilder;
+}
+}
+
 namespace lld {
 namespace coff {
 
 using llvm::COFF::IMAGE_FILE_MACHINE_UNKNOWN;
 using llvm::COFF::MachineTypes;
 using llvm::object::Archive;
 using llvm::object::COFFObjectFile;
 using llvm::object::COFFSymbolRef;
 using llvm::object::coff_import_header;
 using llvm::object::coff_section;
 
 class Chunk;
 class Defined;
 class DefinedImportData;
 class DefinedImportThunk;
 class Lazy;
 class SectionChunk;
 struct Symbol;
 class SymbolBody;
 class Undefined;
 
 // The root class of input files.
 class InputFile {
 public:
   enum Kind { ArchiveKind, ObjectKind, ImportKind, BitcodeKind };
   Kind kind() const { return FileKind; }
   virtual ~InputFile() {}
 
   // Returns the filename.
   StringRef getName() { return MB.getBufferIdentifier(); }
 
   // Reads a file (the constructor doesn't do that).
   virtual void parse() = 0;
 
   // Returns the CPU type this file was compiled to.
   virtual MachineTypes getMachineType() { return IMAGE_FILE_MACHINE_UNKNOWN; }
 
   MemoryBufferRef MB;
 
   // An archive file name if this file is created from an archive.
   StringRef ParentName;
 
   // Returns .drectve section contents if exist.
   StringRef getDirectives() { return StringRef(Directives).trim(); }
 
 protected:
   InputFile(Kind K, MemoryBufferRef M) : MB(M), FileKind(K) {}
 
   std::string Directives;
 
 private:
   const Kind FileKind;
 };
 
 // .lib or .a file.
 class ArchiveFile : public InputFile {
 public:
   explicit ArchiveFile(MemoryBufferRef M);
   static bool classof(const InputFile *F) { return F->kind() == ArchiveKind; }
   void parse() override;
 
   // Enqueues an archive member load for the given symbol. If we've already
   // enqueued a load for the same archive member, this function does nothing,
   // which ensures that we don't load the same member more than once.
   void addMember(const Archive::Symbol *Sym);
 
 private:
   std::unique_ptr<Archive> File;
   std::string Filename;
   llvm::DenseSet<uint64_t> Seen;
 };
 
 // .obj or .o file. This may be a member of an archive file.
 class ObjectFile : public InputFile {
 public:
   explicit ObjectFile(MemoryBufferRef M) : InputFile(ObjectKind, M) {}
   static bool classof(const InputFile *F) { return F->kind() == ObjectKind; }
   void parse() override;
   MachineTypes getMachineType() override;
   std::vector<Chunk *> &getChunks() { return Chunks; }
   std::vector<SectionChunk *> &getDebugChunks() { return DebugChunks; }
   std::vector<SymbolBody *> &getSymbols() { return SymbolBodies; }
 
   // Returns a SymbolBody object for the SymbolIndex'th symbol in the
   // underlying object file.
   SymbolBody *getSymbolBody(uint32_t SymbolIndex) {
     return SparseSymbolBodies[SymbolIndex];
   }
 
   // Returns the underying COFF file.
   COFFObjectFile *getCOFFObj() { return COFFObj.get(); }
 
   // True if this object file is compatible with SEH.
   // COFF-specific and x86-only.
   bool SEHCompat = false;
 
   // The list of safe exception handlers listed in .sxdata section.
   // COFF-specific and x86-only.
   std::set<SymbolBody *> SEHandlers;
+
+  // Pointer to the PDB module descriptor builder. Various debug info records
+  // will reference object files by "module index", which is here. Things like
+  // source files and section contributions are also recorded here. Will be null
+  // if we are not producing a PDB.
+  llvm::pdb::DbiModuleDescriptorBuilder *ModuleDBI = nullptr;
 
 private:
   void initializeChunks();
   void initializeSymbols();
   void initializeSEH();
 
   SymbolBody *createDefined(COFFSymbolRef Sym, const void *Aux, bool IsFirst);
   SymbolBody *createUndefined(COFFSymbolRef Sym);
 
   std::unique_ptr<COFFObjectFile> COFFObj;
   const coff_section *SXData = nullptr;
 
   // List of all chunks defined by this file. This includes both section
   // chunks and non-section chunks for common symbols.
   std::vector<Chunk *> Chunks;
 
   // CodeView debug info sections.
   std::vector<SectionChunk *> DebugChunks;
 
   // This vector contains the same chunks as Chunks, but they are
   // indexed such that you can get a SectionChunk by section index.
   // Nonexistent section indices are filled with null pointers.
   // (Because section number is 1-based, the first slot is always a
   // null pointer.)
   std::vector<Chunk *> SparseChunks;
 
   // List of all symbols referenced or defined by this file.
   std::vector<SymbolBody *> SymbolBodies;
 
   // This vector contains the same symbols as SymbolBodies, but they
   // are indexed such that you can get a SymbolBody by symbol
   // index. Nonexistent indices (which are occupied by auxiliary
   // symbols in the real symbol table) are filled with null pointers.
   std::vector<SymbolBody *> SparseSymbolBodies;
 };
 
 // This type represents import library members that contain DLL names
 // and symbols exported from the DLLs. See Microsoft PE/COFF spec. 7
 // for details about the format.
 class ImportFile : public InputFile {
 public:
   explicit ImportFile(MemoryBufferRef M)
       : InputFile(ImportKind, M), Live(!Config->DoGC) {}
 
   static bool classof(const InputFile *F) { return F->kind() == ImportKind; }
 
   DefinedImportData *ImpSym = nullptr;
   DefinedImportData *ConstSym = nullptr;
   DefinedImportThunk *ThunkSym = nullptr;
   std::string DLLName;
 
 private:
   void parse() override;
 
 public:
   StringRef ExternalName;
   const coff_import_header *Hdr;
   Chunk *Location = nullptr;
 
   // We want to eliminate dllimported symbols if no one actually refers them.
   // This "Live" bit is used to keep track of which import library members
   // are actually in use.
   //
   // If the Live bit is turned off by MarkLive, Writer will ignore dllimported
   // symbols provided by this import library member.
   bool Live;
 };
 
 // Used for LTO.
 class BitcodeFile : public InputFile {
 public:
   explicit BitcodeFile(MemoryBufferRef M) : InputFile(BitcodeKind, M) {}
   static bool classof(const InputFile *F) { return F->kind() == BitcodeKind; }
   std::vector<SymbolBody *> &getSymbols() { return SymbolBodies; }
   MachineTypes getMachineType() override;
   std::unique_ptr<llvm::lto::InputFile> Obj;
 
 private:
   void parse() override;
 
   std::vector<SymbolBody *> SymbolBodies;
 };
 } // namespace coff
 
 std::string toString(coff::InputFile *File);
 } // namespace lld
 
 #endif
Index: vendor/lld/dist/COFF/PDB.cpp
===================================================================
--- vendor/lld/dist/COFF/PDB.cpp	(revision 320020)
+++ vendor/lld/dist/COFF/PDB.cpp	(revision 320021)
@@ -1,233 +1,245 @@
 //===- PDB.cpp ------------------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #include "PDB.h"
 #include "Chunks.h"
 #include "Config.h"
 #include "Error.h"
 #include "SymbolTable.h"
 #include "Symbols.h"
 #include "llvm/DebugInfo/CodeView/CVDebugRecord.h"
 #include "llvm/DebugInfo/CodeView/CVTypeVisitor.h"
 #include "llvm/DebugInfo/CodeView/LazyRandomTypeCollection.h"
 #include "llvm/DebugInfo/CodeView/SymbolDumper.h"
 #include "llvm/DebugInfo/CodeView/TypeDatabase.h"
 #include "llvm/DebugInfo/CodeView/TypeDumpVisitor.h"
 #include "llvm/DebugInfo/CodeView/TypeStreamMerger.h"
 #include "llvm/DebugInfo/CodeView/TypeTableBuilder.h"
 #include "llvm/DebugInfo/MSF/MSFBuilder.h"
 #include "llvm/DebugInfo/MSF/MSFCommon.h"
 #include "llvm/DebugInfo/PDB/Native/DbiStream.h"
 #include "llvm/DebugInfo/PDB/Native/DbiStreamBuilder.h"
 #include "llvm/DebugInfo/PDB/Native/InfoStream.h"
 #include "llvm/DebugInfo/PDB/Native/InfoStreamBuilder.h"
 #include "llvm/DebugInfo/PDB/Native/PDBFile.h"
 #include "llvm/DebugInfo/PDB/Native/PDBFileBuilder.h"
+#include "llvm/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.h"
 #include "llvm/DebugInfo/PDB/Native/PDBStringTableBuilder.h"
 #include "llvm/DebugInfo/PDB/Native/PDBTypeServerHandler.h"
 #include "llvm/DebugInfo/PDB/Native/TpiStream.h"
 #include "llvm/DebugInfo/PDB/Native/TpiStreamBuilder.h"
 #include "llvm/Object/COFF.h"
 #include "llvm/Support/BinaryByteStream.h"
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/FileOutputBuffer.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/ScopedPrinter.h"
 #include <memory>
 
 using namespace lld;
 using namespace lld::coff;
 using namespace llvm;
 using namespace llvm::codeview;
 using namespace llvm::support;
 using namespace llvm::support::endian;
 
 using llvm::object::coff_section;
 
 static ExitOnError ExitOnErr;
 
 // Returns a list of all SectionChunks.
-static std::vector<coff_section> getInputSections(SymbolTable *Symtab) {
-  std::vector<coff_section> V;
+static void addSectionContribs(SymbolTable *Symtab, pdb::DbiStreamBuilder &DbiBuilder) {
   for (Chunk *C : Symtab->getChunks())
     if (auto *SC = dyn_cast<SectionChunk>(C))
-      V.push_back(*SC->Header);
-  return V;
+      DbiBuilder.addSectionContrib(SC->File->ModuleDBI, SC->Header);
 }
 
 static SectionChunk *findByName(std::vector<SectionChunk *> &Sections,
                                 StringRef Name) {
   for (SectionChunk *C : Sections)
     if (C->getSectionName() == Name)
       return C;
   return nullptr;
 }
 
 static ArrayRef<uint8_t> getDebugSection(ObjectFile *File, StringRef SecName) {
   SectionChunk *Sec = findByName(File->getDebugChunks(), SecName);
   if (!Sec)
     return {};
 
   // First 4 bytes are section magic.
   ArrayRef<uint8_t> Data = Sec->getContents();
   if (Data.size() < 4)
     fatal(SecName + " too short");
   if (read32le(Data.data()) != COFF::DEBUG_SECTION_MAGIC)
     fatal(SecName + " has an invalid magic");
   return Data.slice(4);
 }
 
 static void addTypeInfo(pdb::TpiStreamBuilder &TpiBuilder,
                         codeview::TypeTableBuilder &TypeTable) {
   // Start the TPI or IPI stream header.
   TpiBuilder.setVersionHeader(pdb::PdbTpiV80);
 
   // Flatten the in memory type table.
   TypeTable.ForEachRecord([&](TypeIndex TI, ArrayRef<uint8_t> Rec) {
     // FIXME: Hash types.
     TpiBuilder.addTypeRecord(Rec, None);
   });
 }
 
-// Merge .debug$T sections into IpiData and TpiData.
-static void mergeDebugT(SymbolTable *Symtab, pdb::PDBFileBuilder &Builder,
-                        codeview::TypeTableBuilder &TypeTable,
-                        codeview::TypeTableBuilder &IDTable) {
+// Add all object files to the PDB. Merge .debug$T sections into IpiData and
+// TpiData.
+static void addObjectsToPDB(SymbolTable *Symtab, pdb::PDBFileBuilder &Builder,
+                            codeview::TypeTableBuilder &TypeTable,
+                            codeview::TypeTableBuilder &IDTable) {
   // Follow type servers.  If the same type server is encountered more than
   // once for this instance of `PDBTypeServerHandler` (for example if many
   // object files reference the same TypeServer), the types from the
   // TypeServer will only be visited once.
   pdb::PDBTypeServerHandler Handler;
 
   // Visit all .debug$T sections to add them to Builder.
   for (ObjectFile *File : Symtab->ObjectFiles) {
+    // Add a module descriptor for every object file. We need to put an absolute
+    // path to the object into the PDB. If this is a plain object, we make its
+    // path absolute. If it's an object in an archive, we make the archive path
+    // absolute.
+    bool InArchive = !File->ParentName.empty();
+    SmallString<128> Path = InArchive ? File->ParentName : File->getName();
+    sys::fs::make_absolute(Path);
+    StringRef Name = InArchive ? File->getName() : StringRef(Path);
+    File->ModuleDBI = &ExitOnErr(Builder.getDbiBuilder().addModuleInfo(Name));
+    File->ModuleDBI->setObjFileName(Path);
+
+    // FIXME: Walk the .debug$S sections and add them. Do things like recording
+    // source files.
+
     ArrayRef<uint8_t> Data = getDebugSection(File, ".debug$T");
     if (Data.empty())
       continue;
 
     BinaryByteStream Stream(Data, support::little);
     codeview::CVTypeArray Types;
     BinaryStreamReader Reader(Stream);
     SmallVector<TypeIndex, 128> SourceToDest;
     Handler.addSearchPath(llvm::sys::path::parent_path(File->getName()));
     if (auto EC = Reader.readArray(Types, Reader.getLength()))
       fatal(EC, "Reader::readArray failed");
     if (auto Err = codeview::mergeTypeAndIdRecords(
             IDTable, TypeTable, SourceToDest, &Handler, Types))
       fatal(Err, "codeview::mergeTypeStreams failed");
   }
 
   // Construct TPI stream contents.
   addTypeInfo(Builder.getTpiBuilder(), TypeTable);
 
   // Construct IPI stream contents.
   addTypeInfo(Builder.getIpiBuilder(), IDTable);
 }
 
 static void dumpDebugT(ScopedPrinter &W, ObjectFile *File) {
   ListScope LS(W, "DebugT");
   ArrayRef<uint8_t> Data = getDebugSection(File, ".debug$T");
   if (Data.empty())
     return;
 
   LazyRandomTypeCollection Types(Data, 100);
   TypeDumpVisitor TDV(Types, &W, false);
   // Use a default implementation that does not follow type servers and instead
   // just dumps the contents of the TypeServer2 record.
   if (auto EC = codeview::visitTypeStream(Types, TDV))
     fatal(EC, "CVTypeDumper::dump failed");
 }
 
 static void dumpDebugS(ScopedPrinter &W, ObjectFile *File) {
   ListScope LS(W, "DebugS");
   ArrayRef<uint8_t> Data = getDebugSection(File, ".debug$S");
   if (Data.empty())
     return;
 
   BinaryByteStream Stream(Data, llvm::support::little);
   CVSymbolArray Symbols;
   BinaryStreamReader Reader(Stream);
   if (auto EC = Reader.readArray(Symbols, Reader.getLength()))
     fatal(EC, "StreamReader.readArray<CVSymbolArray> failed");
 
   TypeDatabase TDB(0);
   CVSymbolDumper SymbolDumper(W, TDB, CodeViewContainer::ObjectFile, nullptr,
                               false);
   if (auto EC = SymbolDumper.dump(Symbols))
     fatal(EC, "CVSymbolDumper::dump failed");
 }
 
 // Dump CodeView debug info. This is for debugging.
 static void dumpCodeView(SymbolTable *Symtab) {
   ScopedPrinter W(outs());
 
   for (ObjectFile *File : Symtab->ObjectFiles) {
     dumpDebugT(W, File);
     dumpDebugS(W, File);
   }
 }
 
 // Creates a PDB file.
 void coff::createPDB(StringRef Path, SymbolTable *Symtab,
                      ArrayRef<uint8_t> SectionTable,
                      const llvm::codeview::DebugInfo *DI) {
   if (Config->DumpPdb)
     dumpCodeView(Symtab);
 
   BumpPtrAllocator Alloc;
   pdb::PDBFileBuilder Builder(Alloc);
   ExitOnErr(Builder.initialize(4096)); // 4096 is blocksize
 
   // Create streams in MSF for predefined streams, namely
   // PDB, TPI, DBI and IPI.
   for (int I = 0; I < (int)pdb::kSpecialStreamCount; ++I)
     ExitOnErr(Builder.getMsfBuilder().addStream(0));
 
   // Add an Info stream.
   auto &InfoBuilder = Builder.getInfoBuilder();
   InfoBuilder.setAge(DI ? DI->PDB70.Age : 0);
 
   pdb::PDB_UniqueId uuid{};
   if (DI)
     memcpy(&uuid, &DI->PDB70.Signature, sizeof(uuid));
   InfoBuilder.setGuid(uuid);
   // Should be the current time, but set 0 for reproducibilty.
   InfoBuilder.setSignature(0);
   InfoBuilder.setVersion(pdb::PdbRaw_ImplVer::PdbImplVC70);
 
   // Add an empty DPI stream.
-  auto &DbiBuilder = Builder.getDbiBuilder();
+  pdb::DbiStreamBuilder &DbiBuilder = Builder.getDbiBuilder();
   DbiBuilder.setVersionHeader(pdb::PdbDbiV110);
 
   codeview::TypeTableBuilder TypeTable(BAlloc);
   codeview::TypeTableBuilder IDTable(BAlloc);
-  mergeDebugT(Symtab, Builder, TypeTable, IDTable);
+  addObjectsToPDB(Symtab, Builder, TypeTable, IDTable);
 
   // Add Section Contributions.
-  std::vector<pdb::SectionContrib> Contribs =
-      pdb::DbiStreamBuilder::createSectionContribs(getInputSections(Symtab));
-  DbiBuilder.setSectionContribs(Contribs);
+  addSectionContribs(Symtab, DbiBuilder);
 
   // Add Section Map stream.
   ArrayRef<object::coff_section> Sections = {
       (const object::coff_section *)SectionTable.data(),
       SectionTable.size() / sizeof(object::coff_section)};
   std::vector<pdb::SecMapEntry> SectionMap =
       pdb::DbiStreamBuilder::createSectionMap(Sections);
   DbiBuilder.setSectionMap(SectionMap);
 
   ExitOnErr(DbiBuilder.addModuleInfo("* Linker *"));
 
   // Add COFF section header stream.
   ExitOnErr(
       DbiBuilder.addDbgStream(pdb::DbgHeaderType::SectionHdr, SectionTable));
 
   // Write to a file.
   ExitOnErr(Builder.commit(Path));
 }
Index: vendor/lld/dist/ELF/Arch/AArch64.cpp
===================================================================
--- vendor/lld/dist/ELF/Arch/AArch64.cpp	(nonexistent)
+++ vendor/lld/dist/ELF/Arch/AArch64.cpp	(revision 320021)
@@ -0,0 +1,374 @@
+//===- AArch64.cpp --------------------------------------------------------===//
+//
+//                             The LLVM Linker
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "Error.h"
+#include "Memory.h"
+#include "Symbols.h"
+#include "SyntheticSections.h"
+#include "Target.h"
+#include "Thunks.h"
+#include "llvm/Object/ELF.h"
+#include "llvm/Support/Endian.h"
+
+using namespace llvm;
+using namespace llvm::support::endian;
+using namespace llvm::ELF;
+using namespace lld;
+using namespace lld::elf;
+
+// Page(Expr) is the page address of the expression Expr, defined
+// as (Expr & ~0xFFF). (This applies even if the machine page size
+// supported by the platform has a different value.)
+uint64_t elf::getAArch64Page(uint64_t Expr) {
+  return Expr & ~static_cast<uint64_t>(0xFFF);
+}
+
+namespace {
+class AArch64 final : public TargetInfo {
+public:
+  AArch64();
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
+                     const uint8_t *Loc) const override;
+  bool isPicRel(uint32_t Type) const override;
+  void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
+  void writePltHeader(uint8_t *Buf) const override;
+  void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
+                int32_t Index, unsigned RelOff) const override;
+  bool usesOnlyLowPageBits(uint32_t Type) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  RelExpr adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
+                          RelExpr Expr) const override;
+  void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+};
+} // namespace
+
+AArch64::AArch64() {
+  CopyRel = R_AARCH64_COPY;
+  RelativeRel = R_AARCH64_RELATIVE;
+  IRelativeRel = R_AARCH64_IRELATIVE;
+  GotRel = R_AARCH64_GLOB_DAT;
+  PltRel = R_AARCH64_JUMP_SLOT;
+  TlsDescRel = R_AARCH64_TLSDESC;
+  TlsGotRel = R_AARCH64_TLS_TPREL64;
+  GotEntrySize = 8;
+  GotPltEntrySize = 8;
+  PltEntrySize = 16;
+  PltHeaderSize = 32;
+  DefaultMaxPageSize = 65536;
+
+  // It doesn't seem to be documented anywhere, but tls on aarch64 uses variant
+  // 1 of the tls structures and the tcb size is 16.
+  TcbSize = 16;
+}
+
+RelExpr AArch64::getRelExpr(uint32_t Type, const SymbolBody &S,
+                            const uint8_t *Loc) const {
+  switch (Type) {
+  default:
+    return R_ABS;
+  case R_AARCH64_TLSDESC_ADR_PAGE21:
+    return R_TLSDESC_PAGE;
+  case R_AARCH64_TLSDESC_LD64_LO12:
+  case R_AARCH64_TLSDESC_ADD_LO12:
+    return R_TLSDESC;
+  case R_AARCH64_TLSDESC_CALL:
+    return R_TLSDESC_CALL;
+  case R_AARCH64_TLSLE_ADD_TPREL_HI12:
+  case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
+    return R_TLS;
+  case R_AARCH64_CALL26:
+  case R_AARCH64_CONDBR19:
+  case R_AARCH64_JUMP26:
+  case R_AARCH64_TSTBR14:
+    return R_PLT_PC;
+  case R_AARCH64_PREL16:
+  case R_AARCH64_PREL32:
+  case R_AARCH64_PREL64:
+  case R_AARCH64_ADR_PREL_LO21:
+    return R_PC;
+  case R_AARCH64_ADR_PREL_PG_HI21:
+    return R_PAGE_PC;
+  case R_AARCH64_LD64_GOT_LO12_NC:
+  case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
+    return R_GOT;
+  case R_AARCH64_ADR_GOT_PAGE:
+  case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
+    return R_GOT_PAGE_PC;
+  case R_AARCH64_NONE:
+    return R_NONE;
+  }
+}
+
+RelExpr AArch64::adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
+                                 RelExpr Expr) const {
+  if (Expr == R_RELAX_TLS_GD_TO_IE) {
+    if (Type == R_AARCH64_TLSDESC_ADR_PAGE21)
+      return R_RELAX_TLS_GD_TO_IE_PAGE_PC;
+    return R_RELAX_TLS_GD_TO_IE_ABS;
+  }
+  return Expr;
+}
+
+bool AArch64::usesOnlyLowPageBits(uint32_t Type) const {
+  switch (Type) {
+  default:
+    return false;
+  case R_AARCH64_ADD_ABS_LO12_NC:
+  case R_AARCH64_LD64_GOT_LO12_NC:
+  case R_AARCH64_LDST128_ABS_LO12_NC:
+  case R_AARCH64_LDST16_ABS_LO12_NC:
+  case R_AARCH64_LDST32_ABS_LO12_NC:
+  case R_AARCH64_LDST64_ABS_LO12_NC:
+  case R_AARCH64_LDST8_ABS_LO12_NC:
+  case R_AARCH64_TLSDESC_ADD_LO12:
+  case R_AARCH64_TLSDESC_LD64_LO12:
+  case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
+    return true;
+  }
+}
+
+bool AArch64::isPicRel(uint32_t Type) const {
+  return Type == R_AARCH64_ABS32 || Type == R_AARCH64_ABS64;
+}
+
+void AArch64::writeGotPlt(uint8_t *Buf, const SymbolBody &) const {
+  write64le(Buf, InX::Plt->getVA());
+}
+
+void AArch64::writePltHeader(uint8_t *Buf) const {
+  const uint8_t PltData[] = {
+      0xf0, 0x7b, 0xbf, 0xa9, // stp    x16, x30, [sp,#-16]!
+      0x10, 0x00, 0x00, 0x90, // adrp   x16, Page(&(.plt.got[2]))
+      0x11, 0x02, 0x40, 0xf9, // ldr    x17, [x16, Offset(&(.plt.got[2]))]
+      0x10, 0x02, 0x00, 0x91, // add    x16, x16, Offset(&(.plt.got[2]))
+      0x20, 0x02, 0x1f, 0xd6, // br     x17
+      0x1f, 0x20, 0x03, 0xd5, // nop
+      0x1f, 0x20, 0x03, 0xd5, // nop
+      0x1f, 0x20, 0x03, 0xd5  // nop
+  };
+  memcpy(Buf, PltData, sizeof(PltData));
+
+  uint64_t Got = InX::GotPlt->getVA();
+  uint64_t Plt = InX::Plt->getVA();
+  relocateOne(Buf + 4, R_AARCH64_ADR_PREL_PG_HI21,
+              getAArch64Page(Got + 16) - getAArch64Page(Plt + 4));
+  relocateOne(Buf + 8, R_AARCH64_LDST64_ABS_LO12_NC, Got + 16);
+  relocateOne(Buf + 12, R_AARCH64_ADD_ABS_LO12_NC, Got + 16);
+}
+
+void AArch64::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
+                       uint64_t PltEntryAddr, int32_t Index,
+                       unsigned RelOff) const {
+  const uint8_t Inst[] = {
+      0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[n]))
+      0x11, 0x02, 0x40, 0xf9, // ldr  x17, [x16, Offset(&(.plt.got[n]))]
+      0x10, 0x02, 0x00, 0x91, // add  x16, x16, Offset(&(.plt.got[n]))
+      0x20, 0x02, 0x1f, 0xd6  // br   x17
+  };
+  memcpy(Buf, Inst, sizeof(Inst));
+
+  relocateOne(Buf, R_AARCH64_ADR_PREL_PG_HI21,
+              getAArch64Page(GotPltEntryAddr) - getAArch64Page(PltEntryAddr));
+  relocateOne(Buf + 4, R_AARCH64_LDST64_ABS_LO12_NC, GotPltEntryAddr);
+  relocateOne(Buf + 8, R_AARCH64_ADD_ABS_LO12_NC, GotPltEntryAddr);
+}
+
+static void write32AArch64Addr(uint8_t *L, uint64_t Imm) {
+  uint32_t ImmLo = (Imm & 0x3) << 29;
+  uint32_t ImmHi = (Imm & 0x1FFFFC) << 3;
+  uint64_t Mask = (0x3 << 29) | (0x1FFFFC << 3);
+  write32le(L, (read32le(L) & ~Mask) | ImmLo | ImmHi);
+}
+
+// Return the bits [Start, End] from Val shifted Start bits.
+// For instance, getBits(0xF0, 4, 8) returns 0xF.
+static uint64_t getBits(uint64_t Val, int Start, int End) {
+  uint64_t Mask = ((uint64_t)1 << (End + 1 - Start)) - 1;
+  return (Val >> Start) & Mask;
+}
+
+static void or32le(uint8_t *P, int32_t V) { write32le(P, read32le(P) | V); }
+
+// Update the immediate field in a AARCH64 ldr, str, and add instruction.
+static void or32AArch64Imm(uint8_t *L, uint64_t Imm) {
+  or32le(L, (Imm & 0xFFF) << 10);
+}
+
+void AArch64::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  switch (Type) {
+  case R_AARCH64_ABS16:
+  case R_AARCH64_PREL16:
+    checkIntUInt<16>(Loc, Val, Type);
+    write16le(Loc, Val);
+    break;
+  case R_AARCH64_ABS32:
+  case R_AARCH64_PREL32:
+    checkIntUInt<32>(Loc, Val, Type);
+    write32le(Loc, Val);
+    break;
+  case R_AARCH64_ABS64:
+  case R_AARCH64_GLOB_DAT:
+  case R_AARCH64_PREL64:
+    write64le(Loc, Val);
+    break;
+  case R_AARCH64_ADD_ABS_LO12_NC:
+    or32AArch64Imm(Loc, Val);
+    break;
+  case R_AARCH64_ADR_GOT_PAGE:
+  case R_AARCH64_ADR_PREL_PG_HI21:
+  case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
+  case R_AARCH64_TLSDESC_ADR_PAGE21:
+    checkInt<33>(Loc, Val, Type);
+    write32AArch64Addr(Loc, Val >> 12);
+    break;
+  case R_AARCH64_ADR_PREL_LO21:
+    checkInt<21>(Loc, Val, Type);
+    write32AArch64Addr(Loc, Val);
+    break;
+  case R_AARCH64_CALL26:
+  case R_AARCH64_JUMP26:
+    checkInt<28>(Loc, Val, Type);
+    or32le(Loc, (Val & 0x0FFFFFFC) >> 2);
+    break;
+  case R_AARCH64_CONDBR19:
+    checkInt<21>(Loc, Val, Type);
+    or32le(Loc, (Val & 0x1FFFFC) << 3);
+    break;
+  case R_AARCH64_LD64_GOT_LO12_NC:
+  case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
+  case R_AARCH64_TLSDESC_LD64_LO12:
+    checkAlignment<8>(Loc, Val, Type);
+    or32le(Loc, (Val & 0xFF8) << 7);
+    break;
+  case R_AARCH64_LDST8_ABS_LO12_NC:
+    or32AArch64Imm(Loc, getBits(Val, 0, 11));
+    break;
+  case R_AARCH64_LDST16_ABS_LO12_NC:
+    or32AArch64Imm(Loc, getBits(Val, 1, 11));
+    break;
+  case R_AARCH64_LDST32_ABS_LO12_NC:
+    or32AArch64Imm(Loc, getBits(Val, 2, 11));
+    break;
+  case R_AARCH64_LDST64_ABS_LO12_NC:
+    or32AArch64Imm(Loc, getBits(Val, 3, 11));
+    break;
+  case R_AARCH64_LDST128_ABS_LO12_NC:
+    or32AArch64Imm(Loc, getBits(Val, 4, 11));
+    break;
+  case R_AARCH64_MOVW_UABS_G0_NC:
+    or32le(Loc, (Val & 0xFFFF) << 5);
+    break;
+  case R_AARCH64_MOVW_UABS_G1_NC:
+    or32le(Loc, (Val & 0xFFFF0000) >> 11);
+    break;
+  case R_AARCH64_MOVW_UABS_G2_NC:
+    or32le(Loc, (Val & 0xFFFF00000000) >> 27);
+    break;
+  case R_AARCH64_MOVW_UABS_G3:
+    or32le(Loc, (Val & 0xFFFF000000000000) >> 43);
+    break;
+  case R_AARCH64_TSTBR14:
+    checkInt<16>(Loc, Val, Type);
+    or32le(Loc, (Val & 0xFFFC) << 3);
+    break;
+  case R_AARCH64_TLSLE_ADD_TPREL_HI12:
+    checkInt<24>(Loc, Val, Type);
+    or32AArch64Imm(Loc, Val >> 12);
+    break;
+  case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
+  case R_AARCH64_TLSDESC_ADD_LO12:
+    or32AArch64Imm(Loc, Val);
+    break;
+  default:
+    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
+  }
+}
+
+void AArch64::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  // TLSDESC Global-Dynamic relocation are in the form:
+  //   adrp    x0, :tlsdesc:v             [R_AARCH64_TLSDESC_ADR_PAGE21]
+  //   ldr     x1, [x0, #:tlsdesc_lo12:v  [R_AARCH64_TLSDESC_LD64_LO12]
+  //   add     x0, x0, :tlsdesc_los:v     [R_AARCH64_TLSDESC_ADD_LO12]
+  //   .tlsdesccall                       [R_AARCH64_TLSDESC_CALL]
+  //   blr     x1
+  // And it can optimized to:
+  //   movz    x0, #0x0, lsl #16
+  //   movk    x0, #0x10
+  //   nop
+  //   nop
+  checkUInt<32>(Loc, Val, Type);
+
+  switch (Type) {
+  case R_AARCH64_TLSDESC_ADD_LO12:
+  case R_AARCH64_TLSDESC_CALL:
+    write32le(Loc, 0xd503201f); // nop
+    return;
+  case R_AARCH64_TLSDESC_ADR_PAGE21:
+    write32le(Loc, 0xd2a00000 | (((Val >> 16) & 0xffff) << 5)); // movz
+    return;
+  case R_AARCH64_TLSDESC_LD64_LO12:
+    write32le(Loc, 0xf2800000 | ((Val & 0xffff) << 5)); // movk
+    return;
+  default:
+    llvm_unreachable("unsupported relocation for TLS GD to LE relaxation");
+  }
+}
+
+void AArch64::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  // TLSDESC Global-Dynamic relocation are in the form:
+  //   adrp    x0, :tlsdesc:v             [R_AARCH64_TLSDESC_ADR_PAGE21]
+  //   ldr     x1, [x0, #:tlsdesc_lo12:v  [R_AARCH64_TLSDESC_LD64_LO12]
+  //   add     x0, x0, :tlsdesc_los:v     [R_AARCH64_TLSDESC_ADD_LO12]
+  //   .tlsdesccall                       [R_AARCH64_TLSDESC_CALL]
+  //   blr     x1
+  // And it can optimized to:
+  //   adrp    x0, :gottprel:v
+  //   ldr     x0, [x0, :gottprel_lo12:v]
+  //   nop
+  //   nop
+
+  switch (Type) {
+  case R_AARCH64_TLSDESC_ADD_LO12:
+  case R_AARCH64_TLSDESC_CALL:
+    write32le(Loc, 0xd503201f); // nop
+    break;
+  case R_AARCH64_TLSDESC_ADR_PAGE21:
+    write32le(Loc, 0x90000000); // adrp
+    relocateOne(Loc, R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21, Val);
+    break;
+  case R_AARCH64_TLSDESC_LD64_LO12:
+    write32le(Loc, 0xf9400000); // ldr
+    relocateOne(Loc, R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC, Val);
+    break;
+  default:
+    llvm_unreachable("unsupported relocation for TLS GD to LE relaxation");
+  }
+}
+
+void AArch64::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  checkUInt<32>(Loc, Val, Type);
+
+  if (Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21) {
+    // Generate MOVZ.
+    uint32_t RegNo = read32le(Loc) & 0x1f;
+    write32le(Loc, (0xd2a00000 | RegNo) | (((Val >> 16) & 0xffff) << 5));
+    return;
+  }
+  if (Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC) {
+    // Generate MOVK.
+    uint32_t RegNo = read32le(Loc) & 0x1f;
+    write32le(Loc, (0xf2800000 | RegNo) | ((Val & 0xffff) << 5));
+    return;
+  }
+  llvm_unreachable("invalid relocation for TLS IE to LE relaxation");
+}
+
+TargetInfo *elf::createAArch64TargetInfo() { return make<AArch64>(); }

Property changes on: vendor/lld/dist/ELF/Arch/AArch64.cpp
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+native
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Index: vendor/lld/dist/ELF/Arch/AMDGPU.cpp
===================================================================
--- vendor/lld/dist/ELF/Arch/AMDGPU.cpp	(nonexistent)
+++ vendor/lld/dist/ELF/Arch/AMDGPU.cpp	(revision 320021)
@@ -0,0 +1,82 @@
+//===- AMDGPU.cpp ---------------------------------------------------------===//
+//
+//                             The LLVM Linker
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "Error.h"
+#include "InputFiles.h"
+#include "Memory.h"
+#include "Symbols.h"
+#include "Target.h"
+#include "llvm/Object/ELF.h"
+#include "llvm/Support/Endian.h"
+
+using namespace llvm;
+using namespace llvm::object;
+using namespace llvm::support::endian;
+using namespace llvm::ELF;
+using namespace lld;
+using namespace lld::elf;
+
+namespace {
+class AMDGPU final : public TargetInfo {
+public:
+  AMDGPU();
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
+                     const uint8_t *Loc) const override;
+};
+} // namespace
+
+AMDGPU::AMDGPU() {
+  RelativeRel = R_AMDGPU_REL64;
+  GotRel = R_AMDGPU_ABS64;
+  GotEntrySize = 8;
+}
+
+void AMDGPU::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  switch (Type) {
+  case R_AMDGPU_ABS32:
+  case R_AMDGPU_GOTPCREL:
+  case R_AMDGPU_GOTPCREL32_LO:
+  case R_AMDGPU_REL32:
+  case R_AMDGPU_REL32_LO:
+    write32le(Loc, Val);
+    break;
+  case R_AMDGPU_ABS64:
+    write64le(Loc, Val);
+    break;
+  case R_AMDGPU_GOTPCREL32_HI:
+  case R_AMDGPU_REL32_HI:
+    write32le(Loc, Val >> 32);
+    break;
+  default:
+    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
+  }
+}
+
+RelExpr AMDGPU::getRelExpr(uint32_t Type, const SymbolBody &S,
+                           const uint8_t *Loc) const {
+  switch (Type) {
+  case R_AMDGPU_ABS32:
+  case R_AMDGPU_ABS64:
+    return R_ABS;
+  case R_AMDGPU_REL32:
+  case R_AMDGPU_REL32_LO:
+  case R_AMDGPU_REL32_HI:
+    return R_PC;
+  case R_AMDGPU_GOTPCREL:
+  case R_AMDGPU_GOTPCREL32_LO:
+  case R_AMDGPU_GOTPCREL32_HI:
+    return R_GOT_PC;
+  default:
+    error(toString(S.File) + ": unknown relocation type: " + toString(Type));
+    return R_HINT;
+  }
+}
+
+TargetInfo *elf::createAMDGPUTargetInfo() { return make<AMDGPU>(); }

Property changes on: vendor/lld/dist/ELF/Arch/AMDGPU.cpp
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
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+text/plain
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Index: vendor/lld/dist/ELF/Arch/ARM.cpp
===================================================================
--- vendor/lld/dist/ELF/Arch/ARM.cpp	(nonexistent)
+++ vendor/lld/dist/ELF/Arch/ARM.cpp	(revision 320021)
@@ -0,0 +1,432 @@
+//===- ARM.cpp ------------------------------------------------------------===//
+//
+//                             The LLVM Linker
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "Error.h"
+#include "InputFiles.h"
+#include "Memory.h"
+#include "Symbols.h"
+#include "SyntheticSections.h"
+#include "Target.h"
+#include "Thunks.h"
+#include "llvm/Object/ELF.h"
+#include "llvm/Support/Endian.h"
+
+using namespace llvm;
+using namespace llvm::support::endian;
+using namespace llvm::ELF;
+using namespace lld;
+using namespace lld::elf;
+
+namespace {
+class ARM final : public TargetInfo {
+public:
+  ARM();
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
+                     const uint8_t *Loc) const override;
+  bool isPicRel(uint32_t Type) const override;
+  uint32_t getDynRel(uint32_t Type) const override;
+  int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
+  void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
+  void writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const override;
+  void writePltHeader(uint8_t *Buf) const override;
+  void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
+                int32_t Index, unsigned RelOff) const override;
+  void addPltSymbols(InputSectionBase *IS, uint64_t Off) const override;
+  void addPltHeaderSymbols(InputSectionBase *ISD) const override;
+  bool needsThunk(RelExpr Expr, uint32_t RelocType, const InputFile *File,
+                  const SymbolBody &S) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+};
+} // namespace
+
+ARM::ARM() {
+  CopyRel = R_ARM_COPY;
+  RelativeRel = R_ARM_RELATIVE;
+  IRelativeRel = R_ARM_IRELATIVE;
+  GotRel = R_ARM_GLOB_DAT;
+  PltRel = R_ARM_JUMP_SLOT;
+  TlsGotRel = R_ARM_TLS_TPOFF32;
+  TlsModuleIndexRel = R_ARM_TLS_DTPMOD32;
+  TlsOffsetRel = R_ARM_TLS_DTPOFF32;
+  GotEntrySize = 4;
+  GotPltEntrySize = 4;
+  PltEntrySize = 16;
+  PltHeaderSize = 20;
+  // ARM uses Variant 1 TLS
+  TcbSize = 8;
+  NeedsThunks = true;
+}
+
+RelExpr ARM::getRelExpr(uint32_t Type, const SymbolBody &S,
+                        const uint8_t *Loc) const {
+  switch (Type) {
+  default:
+    return R_ABS;
+  case R_ARM_THM_JUMP11:
+    return R_PC;
+  case R_ARM_CALL:
+  case R_ARM_JUMP24:
+  case R_ARM_PC24:
+  case R_ARM_PLT32:
+  case R_ARM_PREL31:
+  case R_ARM_THM_JUMP19:
+  case R_ARM_THM_JUMP24:
+  case R_ARM_THM_CALL:
+    return R_PLT_PC;
+  case R_ARM_GOTOFF32:
+    // (S + A) - GOT_ORG
+    return R_GOTREL;
+  case R_ARM_GOT_BREL:
+    // GOT(S) + A - GOT_ORG
+    return R_GOT_OFF;
+  case R_ARM_GOT_PREL:
+  case R_ARM_TLS_IE32:
+    // GOT(S) + A - P
+    return R_GOT_PC;
+  case R_ARM_SBREL32:
+    return R_ARM_SBREL;
+  case R_ARM_TARGET1:
+    return Config->Target1Rel ? R_PC : R_ABS;
+  case R_ARM_TARGET2:
+    if (Config->Target2 == Target2Policy::Rel)
+      return R_PC;
+    if (Config->Target2 == Target2Policy::Abs)
+      return R_ABS;
+    return R_GOT_PC;
+  case R_ARM_TLS_GD32:
+    return R_TLSGD_PC;
+  case R_ARM_TLS_LDM32:
+    return R_TLSLD_PC;
+  case R_ARM_BASE_PREL:
+    // B(S) + A - P
+    // FIXME: currently B(S) assumed to be .got, this may not hold for all
+    // platforms.
+    return R_GOTONLY_PC;
+  case R_ARM_MOVW_PREL_NC:
+  case R_ARM_MOVT_PREL:
+  case R_ARM_REL32:
+  case R_ARM_THM_MOVW_PREL_NC:
+  case R_ARM_THM_MOVT_PREL:
+    return R_PC;
+  case R_ARM_NONE:
+    return R_NONE;
+  case R_ARM_TLS_LE32:
+    return R_TLS;
+  }
+}
+
+bool ARM::isPicRel(uint32_t Type) const {
+  return (Type == R_ARM_TARGET1 && !Config->Target1Rel) ||
+         (Type == R_ARM_ABS32);
+}
+
+uint32_t ARM::getDynRel(uint32_t Type) const {
+  if (Type == R_ARM_TARGET1 && !Config->Target1Rel)
+    return R_ARM_ABS32;
+  if (Type == R_ARM_ABS32)
+    return Type;
+  // Keep it going with a dummy value so that we can find more reloc errors.
+  return R_ARM_ABS32;
+}
+
+void ARM::writeGotPlt(uint8_t *Buf, const SymbolBody &) const {
+  write32le(Buf, InX::Plt->getVA());
+}
+
+void ARM::writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const {
+  // An ARM entry is the address of the ifunc resolver function.
+  write32le(Buf, S.getVA());
+}
+
+void ARM::writePltHeader(uint8_t *Buf) const {
+  const uint8_t PltData[] = {
+      0x04, 0xe0, 0x2d, 0xe5, //     str lr, [sp,#-4]!
+      0x04, 0xe0, 0x9f, 0xe5, //     ldr lr, L2
+      0x0e, 0xe0, 0x8f, 0xe0, // L1: add lr, pc, lr
+      0x08, 0xf0, 0xbe, 0xe5, //     ldr pc, [lr, #8]
+      0x00, 0x00, 0x00, 0x00, // L2: .word   &(.got.plt) - L1 - 8
+  };
+  memcpy(Buf, PltData, sizeof(PltData));
+  uint64_t GotPlt = InX::GotPlt->getVA();
+  uint64_t L1 = InX::Plt->getVA() + 8;
+  write32le(Buf + 16, GotPlt - L1 - 8);
+}
+
+void ARM::addPltHeaderSymbols(InputSectionBase *ISD) const {
+  auto *IS = cast<InputSection>(ISD);
+  addSyntheticLocal("$a", STT_NOTYPE, 0, 0, IS);
+  addSyntheticLocal("$d", STT_NOTYPE, 16, 0, IS);
+}
+
+void ARM::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
+                   uint64_t PltEntryAddr, int32_t Index,
+                   unsigned RelOff) const {
+  // FIXME: Using simple code sequence with simple relocations.
+  // There is a more optimal sequence but it requires support for the group
+  // relocations. See ELF for the ARM Architecture Appendix A.3
+  const uint8_t PltData[] = {
+      0x04, 0xc0, 0x9f, 0xe5, //     ldr ip, L2
+      0x0f, 0xc0, 0x8c, 0xe0, // L1: add ip, ip, pc
+      0x00, 0xf0, 0x9c, 0xe5, //     ldr pc, [ip]
+      0x00, 0x00, 0x00, 0x00, // L2: .word   Offset(&(.plt.got) - L1 - 8
+  };
+  memcpy(Buf, PltData, sizeof(PltData));
+  uint64_t L1 = PltEntryAddr + 4;
+  write32le(Buf + 12, GotPltEntryAddr - L1 - 8);
+}
+
+void ARM::addPltSymbols(InputSectionBase *ISD, uint64_t Off) const {
+  auto *IS = cast<InputSection>(ISD);
+  addSyntheticLocal("$a", STT_NOTYPE, Off, 0, IS);
+  addSyntheticLocal("$d", STT_NOTYPE, Off + 12, 0, IS);
+}
+
+bool ARM::needsThunk(RelExpr Expr, uint32_t RelocType, const InputFile *File,
+                     const SymbolBody &S) const {
+  // If S is an undefined weak symbol in an executable we don't need a Thunk.
+  // In a DSO calls to undefined symbols, including weak ones get PLT entries
+  // which may need a thunk.
+  if (S.isUndefined() && !S.isLocal() && S.symbol()->isWeak() &&
+      !Config->Shared)
+    return false;
+  // A state change from ARM to Thumb and vice versa must go through an
+  // interworking thunk if the relocation type is not R_ARM_CALL or
+  // R_ARM_THM_CALL.
+  switch (RelocType) {
+  case R_ARM_PC24:
+  case R_ARM_PLT32:
+  case R_ARM_JUMP24:
+    // Source is ARM, all PLT entries are ARM so no interworking required.
+    // Otherwise we need to interwork if Symbol has bit 0 set (Thumb).
+    if (Expr == R_PC && ((S.getVA() & 1) == 1))
+      return true;
+    break;
+  case R_ARM_THM_JUMP19:
+  case R_ARM_THM_JUMP24:
+    // Source is Thumb, all PLT entries are ARM so interworking is required.
+    // Otherwise we need to interwork if Symbol has bit 0 clear (ARM).
+    if (Expr == R_PLT_PC || ((S.getVA() & 1) == 0))
+      return true;
+    break;
+  }
+  return false;
+}
+
+void ARM::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  switch (Type) {
+  case R_ARM_ABS32:
+  case R_ARM_BASE_PREL:
+  case R_ARM_GLOB_DAT:
+  case R_ARM_GOTOFF32:
+  case R_ARM_GOT_BREL:
+  case R_ARM_GOT_PREL:
+  case R_ARM_REL32:
+  case R_ARM_RELATIVE:
+  case R_ARM_SBREL32:
+  case R_ARM_TARGET1:
+  case R_ARM_TARGET2:
+  case R_ARM_TLS_GD32:
+  case R_ARM_TLS_IE32:
+  case R_ARM_TLS_LDM32:
+  case R_ARM_TLS_LDO32:
+  case R_ARM_TLS_LE32:
+  case R_ARM_TLS_TPOFF32:
+  case R_ARM_TLS_DTPOFF32:
+    write32le(Loc, Val);
+    break;
+  case R_ARM_TLS_DTPMOD32:
+    write32le(Loc, 1);
+    break;
+  case R_ARM_PREL31:
+    checkInt<31>(Loc, Val, Type);
+    write32le(Loc, (read32le(Loc) & 0x80000000) | (Val & ~0x80000000));
+    break;
+  case R_ARM_CALL:
+    // R_ARM_CALL is used for BL and BLX instructions, depending on the
+    // value of bit 0 of Val, we must select a BL or BLX instruction
+    if (Val & 1) {
+      // If bit 0 of Val is 1 the target is Thumb, we must select a BLX.
+      // The BLX encoding is 0xfa:H:imm24 where Val = imm24:H:'1'
+      checkInt<26>(Loc, Val, Type);
+      write32le(Loc, 0xfa000000 |                    // opcode
+                         ((Val & 2) << 23) |         // H
+                         ((Val >> 2) & 0x00ffffff)); // imm24
+      break;
+    }
+    if ((read32le(Loc) & 0xfe000000) == 0xfa000000)
+      // BLX (always unconditional) instruction to an ARM Target, select an
+      // unconditional BL.
+      write32le(Loc, 0xeb000000 | (read32le(Loc) & 0x00ffffff));
+    // fall through as BL encoding is shared with B
+    LLVM_FALLTHROUGH;
+  case R_ARM_JUMP24:
+  case R_ARM_PC24:
+  case R_ARM_PLT32:
+    checkInt<26>(Loc, Val, Type);
+    write32le(Loc, (read32le(Loc) & ~0x00ffffff) | ((Val >> 2) & 0x00ffffff));
+    break;
+  case R_ARM_THM_JUMP11:
+    checkInt<12>(Loc, Val, Type);
+    write16le(Loc, (read32le(Loc) & 0xf800) | ((Val >> 1) & 0x07ff));
+    break;
+  case R_ARM_THM_JUMP19:
+    // Encoding T3: Val = S:J2:J1:imm6:imm11:0
+    checkInt<21>(Loc, Val, Type);
+    write16le(Loc,
+              (read16le(Loc) & 0xfbc0) |   // opcode cond
+                  ((Val >> 10) & 0x0400) | // S
+                  ((Val >> 12) & 0x003f)); // imm6
+    write16le(Loc + 2,
+              0x8000 |                    // opcode
+                  ((Val >> 8) & 0x0800) | // J2
+                  ((Val >> 5) & 0x2000) | // J1
+                  ((Val >> 1) & 0x07ff)); // imm11
+    break;
+  case R_ARM_THM_CALL:
+    // R_ARM_THM_CALL is used for BL and BLX instructions, depending on the
+    // value of bit 0 of Val, we must select a BL or BLX instruction
+    if ((Val & 1) == 0) {
+      // Ensure BLX destination is 4-byte aligned. As BLX instruction may
+      // only be two byte aligned. This must be done before overflow check
+      Val = alignTo(Val, 4);
+    }
+    // Bit 12 is 0 for BLX, 1 for BL
+    write16le(Loc + 2, (read16le(Loc + 2) & ~0x1000) | (Val & 1) << 12);
+    // Fall through as rest of encoding is the same as B.W
+    LLVM_FALLTHROUGH;
+  case R_ARM_THM_JUMP24:
+    // Encoding B  T4, BL T1, BLX T2: Val = S:I1:I2:imm10:imm11:0
+    // FIXME: Use of I1 and I2 require v6T2ops
+    checkInt<25>(Loc, Val, Type);
+    write16le(Loc,
+              0xf000 |                     // opcode
+                  ((Val >> 14) & 0x0400) | // S
+                  ((Val >> 12) & 0x03ff)); // imm10
+    write16le(Loc + 2,
+              (read16le(Loc + 2) & 0xd000) |                  // opcode
+                  (((~(Val >> 10)) ^ (Val >> 11)) & 0x2000) | // J1
+                  (((~(Val >> 11)) ^ (Val >> 13)) & 0x0800) | // J2
+                  ((Val >> 1) & 0x07ff));                     // imm11
+    break;
+  case R_ARM_MOVW_ABS_NC:
+  case R_ARM_MOVW_PREL_NC:
+    write32le(Loc, (read32le(Loc) & ~0x000f0fff) | ((Val & 0xf000) << 4) |
+                       (Val & 0x0fff));
+    break;
+  case R_ARM_MOVT_ABS:
+  case R_ARM_MOVT_PREL:
+    checkInt<32>(Loc, Val, Type);
+    write32le(Loc, (read32le(Loc) & ~0x000f0fff) |
+                       (((Val >> 16) & 0xf000) << 4) | ((Val >> 16) & 0xfff));
+    break;
+  case R_ARM_THM_MOVT_ABS:
+  case R_ARM_THM_MOVT_PREL:
+    // Encoding T1: A = imm4:i:imm3:imm8
+    checkInt<32>(Loc, Val, Type);
+    write16le(Loc,
+              0xf2c0 |                     // opcode
+                  ((Val >> 17) & 0x0400) | // i
+                  ((Val >> 28) & 0x000f)); // imm4
+    write16le(Loc + 2,
+              (read16le(Loc + 2) & 0x8f00) | // opcode
+                  ((Val >> 12) & 0x7000) |   // imm3
+                  ((Val >> 16) & 0x00ff));   // imm8
+    break;
+  case R_ARM_THM_MOVW_ABS_NC:
+  case R_ARM_THM_MOVW_PREL_NC:
+    // Encoding T3: A = imm4:i:imm3:imm8
+    write16le(Loc,
+              0xf240 |                     // opcode
+                  ((Val >> 1) & 0x0400) |  // i
+                  ((Val >> 12) & 0x000f)); // imm4
+    write16le(Loc + 2,
+              (read16le(Loc + 2) & 0x8f00) | // opcode
+                  ((Val << 4) & 0x7000) |    // imm3
+                  (Val & 0x00ff));           // imm8
+    break;
+  default:
+    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
+  }
+}
+
+int64_t ARM::getImplicitAddend(const uint8_t *Buf, uint32_t Type) const {
+  switch (Type) {
+  default:
+    return 0;
+  case R_ARM_ABS32:
+  case R_ARM_BASE_PREL:
+  case R_ARM_GOTOFF32:
+  case R_ARM_GOT_BREL:
+  case R_ARM_GOT_PREL:
+  case R_ARM_REL32:
+  case R_ARM_TARGET1:
+  case R_ARM_TARGET2:
+  case R_ARM_TLS_GD32:
+  case R_ARM_TLS_LDM32:
+  case R_ARM_TLS_LDO32:
+  case R_ARM_TLS_IE32:
+  case R_ARM_TLS_LE32:
+    return SignExtend64<32>(read32le(Buf));
+  case R_ARM_PREL31:
+    return SignExtend64<31>(read32le(Buf));
+  case R_ARM_CALL:
+  case R_ARM_JUMP24:
+  case R_ARM_PC24:
+  case R_ARM_PLT32:
+    return SignExtend64<26>(read32le(Buf) << 2);
+  case R_ARM_THM_JUMP11:
+    return SignExtend64<12>(read16le(Buf) << 1);
+  case R_ARM_THM_JUMP19: {
+    // Encoding T3: A = S:J2:J1:imm10:imm6:0
+    uint16_t Hi = read16le(Buf);
+    uint16_t Lo = read16le(Buf + 2);
+    return SignExtend64<20>(((Hi & 0x0400) << 10) | // S
+                            ((Lo & 0x0800) << 8) |  // J2
+                            ((Lo & 0x2000) << 5) |  // J1
+                            ((Hi & 0x003f) << 12) | // imm6
+                            ((Lo & 0x07ff) << 1));  // imm11:0
+  }
+  case R_ARM_THM_CALL:
+  case R_ARM_THM_JUMP24: {
+    // Encoding B T4, BL T1, BLX T2: A = S:I1:I2:imm10:imm11:0
+    // I1 = NOT(J1 EOR S), I2 = NOT(J2 EOR S)
+    // FIXME: I1 and I2 require v6T2ops
+    uint16_t Hi = read16le(Buf);
+    uint16_t Lo = read16le(Buf + 2);
+    return SignExtend64<24>(((Hi & 0x0400) << 14) |                    // S
+                            (~((Lo ^ (Hi << 3)) << 10) & 0x00800000) | // I1
+                            (~((Lo ^ (Hi << 1)) << 11) & 0x00400000) | // I2
+                            ((Hi & 0x003ff) << 12) |                   // imm0
+                            ((Lo & 0x007ff) << 1)); // imm11:0
+  }
+  // ELF for the ARM Architecture 4.6.1.1 the implicit addend for MOVW and
+  // MOVT is in the range -32768 <= A < 32768
+  case R_ARM_MOVW_ABS_NC:
+  case R_ARM_MOVT_ABS:
+  case R_ARM_MOVW_PREL_NC:
+  case R_ARM_MOVT_PREL: {
+    uint64_t Val = read32le(Buf) & 0x000f0fff;
+    return SignExtend64<16>(((Val & 0x000f0000) >> 4) | (Val & 0x00fff));
+  }
+  case R_ARM_THM_MOVW_ABS_NC:
+  case R_ARM_THM_MOVT_ABS:
+  case R_ARM_THM_MOVW_PREL_NC:
+  case R_ARM_THM_MOVT_PREL: {
+    // Encoding T3: A = imm4:i:imm3:imm8
+    uint16_t Hi = read16le(Buf);
+    uint16_t Lo = read16le(Buf + 2);
+    return SignExtend64<16>(((Hi & 0x000f) << 12) | // imm4
+                            ((Hi & 0x0400) << 1) |  // i
+                            ((Lo & 0x7000) >> 4) |  // imm3
+                            (Lo & 0x00ff));         // imm8
+  }
+  }
+}
+
+TargetInfo *elf::createARMTargetInfo() { return make<ARM>(); }

Property changes on: vendor/lld/dist/ELF/Arch/ARM.cpp
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Index: vendor/lld/dist/ELF/Arch/AVR.cpp
===================================================================
--- vendor/lld/dist/ELF/Arch/AVR.cpp	(nonexistent)
+++ vendor/lld/dist/ELF/Arch/AVR.cpp	(revision 320021)
@@ -0,0 +1,78 @@
+//===- AVR.cpp ------------------------------------------------------------===//
+//
+//                             The LLVM Linker
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// AVR is a Harvard-architecture 8-bit micrcontroller designed for small
+// baremetal programs. All AVR-family processors have 32 8-bit registers.
+// The tiniest AVR has 32 byte RAM and 1 KiB program memory, and the largest
+// one supports up to 2^24 data address space and 2^22 code address space.
+//
+// Since it is a baremetal programming, there's usually no loader to load
+// ELF files on AVRs. You are expected to link your program against address
+// 0 and pull out a .text section from the result using objcopy, so that you
+// can write the linked code to on-chip flush memory. You can do that with
+// the following commands:
+//
+//   ld.lld -Ttext=0 -o foo foo.o
+//   objcopy -O binary --only-section=.text foo output.bin
+//
+// Note that the current AVR support is very preliminary so you can't
+// link any useful program yet, though.
+//
+//===----------------------------------------------------------------------===//
+
+#include "Error.h"
+#include "InputFiles.h"
+#include "Memory.h"
+#include "Symbols.h"
+#include "Target.h"
+#include "llvm/Object/ELF.h"
+#include "llvm/Support/Endian.h"
+
+using namespace llvm;
+using namespace llvm::object;
+using namespace llvm::support::endian;
+using namespace llvm::ELF;
+using namespace lld;
+using namespace lld::elf;
+
+namespace {
+class AVR final : public TargetInfo {
+public:
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
+                     const uint8_t *Loc) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+};
+} // namespace
+
+RelExpr AVR::getRelExpr(uint32_t Type, const SymbolBody &S,
+                        const uint8_t *Loc) const {
+  switch (Type) {
+  case R_AVR_CALL:
+    return R_ABS;
+  default:
+    error(toString(S.File) + ": unknown relocation type: " + toString(Type));
+    return R_HINT;
+  }
+}
+
+void AVR::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  switch (Type) {
+  case R_AVR_CALL: {
+    uint16_t Hi = Val >> 17;
+    uint16_t Lo = Val >> 1;
+    write16le(Loc, read16le(Loc) | ((Hi >> 1) << 4) | (Hi & 1));
+    write16le(Loc + 2, Lo);
+    break;
+  }
+  default:
+    error(getErrorLocation(Loc) + "unrecognized reloc " + toString(Type));
+  }
+}
+
+TargetInfo *elf::createAVRTargetInfo() { return make<AVR>(); }

Property changes on: vendor/lld/dist/ELF/Arch/AVR.cpp
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Index: vendor/lld/dist/ELF/Arch/Mips.cpp
===================================================================
--- vendor/lld/dist/ELF/Arch/Mips.cpp	(nonexistent)
+++ vendor/lld/dist/ELF/Arch/Mips.cpp	(revision 320021)
@@ -0,0 +1,422 @@
+//===- MIPS.cpp -----------------------------------------------------------===//
+//
+//                             The LLVM Linker
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "Error.h"
+#include "InputFiles.h"
+#include "Memory.h"
+#include "OutputSections.h"
+#include "Symbols.h"
+#include "SyntheticSections.h"
+#include "Target.h"
+#include "Thunks.h"
+#include "llvm/Object/ELF.h"
+#include "llvm/Support/Endian.h"
+
+using namespace llvm;
+using namespace llvm::object;
+using namespace llvm::support::endian;
+using namespace llvm::ELF;
+using namespace lld;
+using namespace lld::elf;
+
+namespace {
+template <class ELFT> class MIPS final : public TargetInfo {
+public:
+  MIPS();
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
+                     const uint8_t *Loc) const override;
+  int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
+  bool isPicRel(uint32_t Type) const override;
+  uint32_t getDynRel(uint32_t Type) const override;
+  void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
+  void writePltHeader(uint8_t *Buf) const override;
+  void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
+                int32_t Index, unsigned RelOff) const override;
+  bool needsThunk(RelExpr Expr, uint32_t RelocType, const InputFile *File,
+                  const SymbolBody &S) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  bool usesOnlyLowPageBits(uint32_t Type) const override;
+};
+} // namespace
+
+template <class ELFT> MIPS<ELFT>::MIPS() {
+  GotPltHeaderEntriesNum = 2;
+  DefaultMaxPageSize = 65536;
+  GotEntrySize = sizeof(typename ELFT::uint);
+  GotPltEntrySize = sizeof(typename ELFT::uint);
+  PltEntrySize = 16;
+  PltHeaderSize = 32;
+  CopyRel = R_MIPS_COPY;
+  PltRel = R_MIPS_JUMP_SLOT;
+  NeedsThunks = true;
+
+  if (ELFT::Is64Bits) {
+    RelativeRel = (R_MIPS_64 << 8) | R_MIPS_REL32;
+    TlsGotRel = R_MIPS_TLS_TPREL64;
+    TlsModuleIndexRel = R_MIPS_TLS_DTPMOD64;
+    TlsOffsetRel = R_MIPS_TLS_DTPREL64;
+  } else {
+    RelativeRel = R_MIPS_REL32;
+    TlsGotRel = R_MIPS_TLS_TPREL32;
+    TlsModuleIndexRel = R_MIPS_TLS_DTPMOD32;
+    TlsOffsetRel = R_MIPS_TLS_DTPREL32;
+  }
+}
+
+template <class ELFT>
+RelExpr MIPS<ELFT>::getRelExpr(uint32_t Type, const SymbolBody &S,
+                               const uint8_t *Loc) const {
+  // See comment in the calculateMipsRelChain.
+  if (ELFT::Is64Bits || Config->MipsN32Abi)
+    Type &= 0xff;
+  switch (Type) {
+  default:
+    return R_ABS;
+  case R_MIPS_JALR:
+    return R_HINT;
+  case R_MIPS_GPREL16:
+  case R_MIPS_GPREL32:
+    return R_MIPS_GOTREL;
+  case R_MIPS_26:
+    return R_PLT;
+  case R_MIPS_HI16:
+  case R_MIPS_LO16:
+    // R_MIPS_HI16/R_MIPS_LO16 relocations against _gp_disp calculate
+    // offset between start of function and 'gp' value which by default
+    // equal to the start of .got section. In that case we consider these
+    // relocations as relative.
+    if (&S == ElfSym::MipsGpDisp)
+      return R_MIPS_GOT_GP_PC;
+    if (&S == ElfSym::MipsLocalGp)
+      return R_MIPS_GOT_GP;
+    LLVM_FALLTHROUGH;
+  case R_MIPS_GOT_OFST:
+    return R_ABS;
+  case R_MIPS_PC32:
+  case R_MIPS_PC16:
+  case R_MIPS_PC19_S2:
+  case R_MIPS_PC21_S2:
+  case R_MIPS_PC26_S2:
+  case R_MIPS_PCHI16:
+  case R_MIPS_PCLO16:
+    return R_PC;
+  case R_MIPS_GOT16:
+    if (S.isLocal())
+      return R_MIPS_GOT_LOCAL_PAGE;
+    LLVM_FALLTHROUGH;
+  case R_MIPS_CALL16:
+  case R_MIPS_GOT_DISP:
+  case R_MIPS_TLS_GOTTPREL:
+    return R_MIPS_GOT_OFF;
+  case R_MIPS_CALL_HI16:
+  case R_MIPS_CALL_LO16:
+  case R_MIPS_GOT_HI16:
+  case R_MIPS_GOT_LO16:
+    return R_MIPS_GOT_OFF32;
+  case R_MIPS_GOT_PAGE:
+    return R_MIPS_GOT_LOCAL_PAGE;
+  case R_MIPS_TLS_GD:
+    return R_MIPS_TLSGD;
+  case R_MIPS_TLS_LDM:
+    return R_MIPS_TLSLD;
+  }
+}
+
+template <class ELFT> bool MIPS<ELFT>::isPicRel(uint32_t Type) const {
+  return Type == R_MIPS_32 || Type == R_MIPS_64;
+}
+
+template <class ELFT> uint32_t MIPS<ELFT>::getDynRel(uint32_t Type) const {
+  return RelativeRel;
+}
+
+template <class ELFT>
+void MIPS<ELFT>::writeGotPlt(uint8_t *Buf, const SymbolBody &) const {
+  write32<ELFT::TargetEndianness>(Buf, InX::Plt->getVA());
+}
+
+template <endianness E, uint8_t BSIZE, uint8_t SHIFT>
+static int64_t getPcRelocAddend(const uint8_t *Loc) {
+  uint32_t Instr = read32<E>(Loc);
+  uint32_t Mask = 0xffffffff >> (32 - BSIZE);
+  return SignExtend64<BSIZE + SHIFT>((Instr & Mask) << SHIFT);
+}
+
+template <endianness E, uint8_t BSIZE, uint8_t SHIFT>
+static void applyMipsPcReloc(uint8_t *Loc, uint32_t Type, uint64_t V) {
+  uint32_t Mask = 0xffffffff >> (32 - BSIZE);
+  uint32_t Instr = read32<E>(Loc);
+  if (SHIFT > 0)
+    checkAlignment<(1 << SHIFT)>(Loc, V, Type);
+  checkInt<BSIZE + SHIFT>(Loc, V, Type);
+  write32<E>(Loc, (Instr & ~Mask) | ((V >> SHIFT) & Mask));
+}
+
+template <endianness E> static void writeMipsHi16(uint8_t *Loc, uint64_t V) {
+  uint32_t Instr = read32<E>(Loc);
+  uint16_t Res = ((V + 0x8000) >> 16) & 0xffff;
+  write32<E>(Loc, (Instr & 0xffff0000) | Res);
+}
+
+template <endianness E> static void writeMipsHigher(uint8_t *Loc, uint64_t V) {
+  uint32_t Instr = read32<E>(Loc);
+  uint16_t Res = ((V + 0x80008000) >> 32) & 0xffff;
+  write32<E>(Loc, (Instr & 0xffff0000) | Res);
+}
+
+template <endianness E> static void writeMipsHighest(uint8_t *Loc, uint64_t V) {
+  uint32_t Instr = read32<E>(Loc);
+  uint16_t Res = ((V + 0x800080008000) >> 48) & 0xffff;
+  write32<E>(Loc, (Instr & 0xffff0000) | Res);
+}
+
+template <endianness E> static void writeMipsLo16(uint8_t *Loc, uint64_t V) {
+  uint32_t Instr = read32<E>(Loc);
+  write32<E>(Loc, (Instr & 0xffff0000) | (V & 0xffff));
+}
+
+template <class ELFT> static bool isMipsR6() {
+  const auto &FirstObj = cast<ELFFileBase<ELFT>>(*Config->FirstElf);
+  uint32_t Arch = FirstObj.getObj().getHeader()->e_flags & EF_MIPS_ARCH;
+  return Arch == EF_MIPS_ARCH_32R6 || Arch == EF_MIPS_ARCH_64R6;
+}
+
+template <class ELFT> void MIPS<ELFT>::writePltHeader(uint8_t *Buf) const {
+  const endianness E = ELFT::TargetEndianness;
+  if (Config->MipsN32Abi) {
+    write32<E>(Buf, 0x3c0e0000);      // lui   $14, %hi(&GOTPLT[0])
+    write32<E>(Buf + 4, 0x8dd90000);  // lw    $25, %lo(&GOTPLT[0])($14)
+    write32<E>(Buf + 8, 0x25ce0000);  // addiu $14, $14, %lo(&GOTPLT[0])
+    write32<E>(Buf + 12, 0x030ec023); // subu  $24, $24, $14
+  } else {
+    write32<E>(Buf, 0x3c1c0000);      // lui   $28, %hi(&GOTPLT[0])
+    write32<E>(Buf + 4, 0x8f990000);  // lw    $25, %lo(&GOTPLT[0])($28)
+    write32<E>(Buf + 8, 0x279c0000);  // addiu $28, $28, %lo(&GOTPLT[0])
+    write32<E>(Buf + 12, 0x031cc023); // subu  $24, $24, $28
+  }
+
+  write32<E>(Buf + 16, 0x03e07825); // move  $15, $31
+  write32<E>(Buf + 20, 0x0018c082); // srl   $24, $24, 2
+  write32<E>(Buf + 24, 0x0320f809); // jalr  $25
+  write32<E>(Buf + 28, 0x2718fffe); // subu  $24, $24, 2
+
+  uint64_t GotPlt = InX::GotPlt->getVA();
+  writeMipsHi16<E>(Buf, GotPlt);
+  writeMipsLo16<E>(Buf + 4, GotPlt);
+  writeMipsLo16<E>(Buf + 8, GotPlt);
+}
+
+template <class ELFT>
+void MIPS<ELFT>::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
+                          uint64_t PltEntryAddr, int32_t Index,
+                          unsigned RelOff) const {
+  const endianness E = ELFT::TargetEndianness;
+  write32<E>(Buf, 0x3c0f0000);     // lui   $15, %hi(.got.plt entry)
+  write32<E>(Buf + 4, 0x8df90000); // l[wd] $25, %lo(.got.plt entry)($15)
+                                   // jr    $25
+  write32<E>(Buf + 8, isMipsR6<ELFT>() ? 0x03200009 : 0x03200008);
+  write32<E>(Buf + 12, 0x25f80000); // addiu $24, $15, %lo(.got.plt entry)
+  writeMipsHi16<E>(Buf, GotPltEntryAddr);
+  writeMipsLo16<E>(Buf + 4, GotPltEntryAddr);
+  writeMipsLo16<E>(Buf + 12, GotPltEntryAddr);
+}
+
+template <class ELFT>
+bool MIPS<ELFT>::needsThunk(RelExpr Expr, uint32_t Type, const InputFile *File,
+                            const SymbolBody &S) const {
+  // Any MIPS PIC code function is invoked with its address in register $t9.
+  // So if we have a branch instruction from non-PIC code to the PIC one
+  // we cannot make the jump directly and need to create a small stubs
+  // to save the target function address.
+  // See page 3-38 ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
+  if (Type != R_MIPS_26)
+    return false;
+  auto *F = dyn_cast_or_null<ELFFileBase<ELFT>>(File);
+  if (!F)
+    return false;
+  // If current file has PIC code, LA25 stub is not required.
+  if (F->getObj().getHeader()->e_flags & EF_MIPS_PIC)
+    return false;
+  auto *D = dyn_cast<DefinedRegular>(&S);
+  // LA25 is required if target file has PIC code
+  // or target symbol is a PIC symbol.
+  return D && D->isMipsPIC<ELFT>();
+}
+
+template <class ELFT>
+int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *Buf, uint32_t Type) const {
+  const endianness E = ELFT::TargetEndianness;
+  switch (Type) {
+  default:
+    return 0;
+  case R_MIPS_32:
+  case R_MIPS_GPREL32:
+  case R_MIPS_TLS_DTPREL32:
+  case R_MIPS_TLS_TPREL32:
+    return SignExtend64<32>(read32<E>(Buf));
+  case R_MIPS_26:
+    // FIXME (simon): If the relocation target symbol is not a PLT entry
+    // we should use another expression for calculation:
+    // ((A << 2) | (P & 0xf0000000)) >> 2
+    return SignExtend64<28>((read32<E>(Buf) & 0x3ffffff) << 2);
+  case R_MIPS_GPREL16:
+  case R_MIPS_LO16:
+  case R_MIPS_PCLO16:
+  case R_MIPS_TLS_DTPREL_HI16:
+  case R_MIPS_TLS_DTPREL_LO16:
+  case R_MIPS_TLS_TPREL_HI16:
+  case R_MIPS_TLS_TPREL_LO16:
+    return SignExtend64<16>(read32<E>(Buf));
+  case R_MIPS_PC16:
+    return getPcRelocAddend<E, 16, 2>(Buf);
+  case R_MIPS_PC19_S2:
+    return getPcRelocAddend<E, 19, 2>(Buf);
+  case R_MIPS_PC21_S2:
+    return getPcRelocAddend<E, 21, 2>(Buf);
+  case R_MIPS_PC26_S2:
+    return getPcRelocAddend<E, 26, 2>(Buf);
+  case R_MIPS_PC32:
+    return getPcRelocAddend<E, 32, 0>(Buf);
+  }
+}
+
+static std::pair<uint32_t, uint64_t>
+calculateMipsRelChain(uint8_t *Loc, uint32_t Type, uint64_t Val) {
+  // MIPS N64 ABI packs multiple relocations into the single relocation
+  // record. In general, all up to three relocations can have arbitrary
+  // types. In fact, Clang and GCC uses only a few combinations. For now,
+  // we support two of them. That is allow to pass at least all LLVM
+  // test suite cases.
+  // <any relocation> / R_MIPS_SUB / R_MIPS_HI16 | R_MIPS_LO16
+  // <any relocation> / R_MIPS_64 / R_MIPS_NONE
+  // The first relocation is a 'real' relocation which is calculated
+  // using the corresponding symbol's value. The second and the third
+  // relocations used to modify result of the first one: extend it to
+  // 64-bit, extract high or low part etc. For details, see part 2.9 Relocation
+  // at the https://dmz-portal.mips.com/mw/images/8/82/007-4658-001.pdf
+  uint32_t Type2 = (Type >> 8) & 0xff;
+  uint32_t Type3 = (Type >> 16) & 0xff;
+  if (Type2 == R_MIPS_NONE && Type3 == R_MIPS_NONE)
+    return std::make_pair(Type, Val);
+  if (Type2 == R_MIPS_64 && Type3 == R_MIPS_NONE)
+    return std::make_pair(Type2, Val);
+  if (Type2 == R_MIPS_SUB && (Type3 == R_MIPS_HI16 || Type3 == R_MIPS_LO16))
+    return std::make_pair(Type3, -Val);
+  error(getErrorLocation(Loc) + "unsupported relocations combination " +
+        Twine(Type));
+  return std::make_pair(Type & 0xff, Val);
+}
+
+template <class ELFT>
+void MIPS<ELFT>::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  const endianness E = ELFT::TargetEndianness;
+  // Thread pointer and DRP offsets from the start of TLS data area.
+  // https://www.linux-mips.org/wiki/NPTL
+  if (Type == R_MIPS_TLS_DTPREL_HI16 || Type == R_MIPS_TLS_DTPREL_LO16 ||
+      Type == R_MIPS_TLS_DTPREL32 || Type == R_MIPS_TLS_DTPREL64)
+    Val -= 0x8000;
+  else if (Type == R_MIPS_TLS_TPREL_HI16 || Type == R_MIPS_TLS_TPREL_LO16 ||
+           Type == R_MIPS_TLS_TPREL32 || Type == R_MIPS_TLS_TPREL64)
+    Val -= 0x7000;
+  if (ELFT::Is64Bits || Config->MipsN32Abi)
+    std::tie(Type, Val) = calculateMipsRelChain(Loc, Type, Val);
+  switch (Type) {
+  case R_MIPS_32:
+  case R_MIPS_GPREL32:
+  case R_MIPS_TLS_DTPREL32:
+  case R_MIPS_TLS_TPREL32:
+    write32<E>(Loc, Val);
+    break;
+  case R_MIPS_64:
+  case R_MIPS_TLS_DTPREL64:
+  case R_MIPS_TLS_TPREL64:
+    write64<E>(Loc, Val);
+    break;
+  case R_MIPS_26:
+    write32<E>(Loc, (read32<E>(Loc) & ~0x3ffffff) | ((Val >> 2) & 0x3ffffff));
+    break;
+  case R_MIPS_GOT16:
+    // The R_MIPS_GOT16 relocation's value in "relocatable" linking mode
+    // is updated addend (not a GOT index). In that case write high 16 bits
+    // to store a correct addend value.
+    if (Config->Relocatable)
+      writeMipsHi16<E>(Loc, Val);
+    else {
+      checkInt<16>(Loc, Val, Type);
+      writeMipsLo16<E>(Loc, Val);
+    }
+    break;
+  case R_MIPS_GOT_DISP:
+  case R_MIPS_GOT_PAGE:
+  case R_MIPS_GPREL16:
+  case R_MIPS_TLS_GD:
+  case R_MIPS_TLS_LDM:
+    checkInt<16>(Loc, Val, Type);
+    LLVM_FALLTHROUGH;
+  case R_MIPS_CALL16:
+  case R_MIPS_CALL_LO16:
+  case R_MIPS_GOT_LO16:
+  case R_MIPS_GOT_OFST:
+  case R_MIPS_LO16:
+  case R_MIPS_PCLO16:
+  case R_MIPS_TLS_DTPREL_LO16:
+  case R_MIPS_TLS_GOTTPREL:
+  case R_MIPS_TLS_TPREL_LO16:
+    writeMipsLo16<E>(Loc, Val);
+    break;
+  case R_MIPS_CALL_HI16:
+  case R_MIPS_GOT_HI16:
+  case R_MIPS_HI16:
+  case R_MIPS_PCHI16:
+  case R_MIPS_TLS_DTPREL_HI16:
+  case R_MIPS_TLS_TPREL_HI16:
+    writeMipsHi16<E>(Loc, Val);
+    break;
+  case R_MIPS_HIGHER:
+    writeMipsHigher<E>(Loc, Val);
+    break;
+  case R_MIPS_HIGHEST:
+    writeMipsHighest<E>(Loc, Val);
+    break;
+  case R_MIPS_JALR:
+    // Ignore this optimization relocation for now
+    break;
+  case R_MIPS_PC16:
+    applyMipsPcReloc<E, 16, 2>(Loc, Type, Val);
+    break;
+  case R_MIPS_PC19_S2:
+    applyMipsPcReloc<E, 19, 2>(Loc, Type, Val);
+    break;
+  case R_MIPS_PC21_S2:
+    applyMipsPcReloc<E, 21, 2>(Loc, Type, Val);
+    break;
+  case R_MIPS_PC26_S2:
+    applyMipsPcReloc<E, 26, 2>(Loc, Type, Val);
+    break;
+  case R_MIPS_PC32:
+    applyMipsPcReloc<E, 32, 0>(Loc, Type, Val);
+    break;
+  default:
+    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
+  }
+}
+
+template <class ELFT>
+bool MIPS<ELFT>::usesOnlyLowPageBits(uint32_t Type) const {
+  return Type == R_MIPS_LO16 || Type == R_MIPS_GOT_OFST;
+}
+
+template <class ELFT> TargetInfo *elf::createMipsTargetInfo() {
+  return make<MIPS<ELFT>>();
+}
+
+template TargetInfo *elf::createMipsTargetInfo<ELF32LE>();
+template TargetInfo *elf::createMipsTargetInfo<ELF32BE>();
+template TargetInfo *elf::createMipsTargetInfo<ELF64LE>();
+template TargetInfo *elf::createMipsTargetInfo<ELF64BE>();

Property changes on: vendor/lld/dist/ELF/Arch/Mips.cpp
___________________________________________________________________
Added: svn:eol-style
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+native
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+text/plain
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Index: vendor/lld/dist/ELF/Arch/PPC.cpp
===================================================================
--- vendor/lld/dist/ELF/Arch/PPC.cpp	(nonexistent)
+++ vendor/lld/dist/ELF/Arch/PPC.cpp	(revision 320021)
@@ -0,0 +1,63 @@
+//===- PPC.cpp ------------------------------------------------------------===//
+//
+//                             The LLVM Linker
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "Error.h"
+#include "Memory.h"
+#include "Symbols.h"
+#include "Target.h"
+#include "llvm/Support/Endian.h"
+
+using namespace llvm;
+using namespace llvm::support::endian;
+using namespace llvm::ELF;
+using namespace lld;
+using namespace lld::elf;
+
+namespace {
+class PPC final : public TargetInfo {
+public:
+  PPC() {}
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
+                     const uint8_t *Loc) const override;
+};
+} // namespace
+
+void PPC::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  switch (Type) {
+  case R_PPC_ADDR16_HA:
+    write16be(Loc, (Val + 0x8000) >> 16);
+    break;
+  case R_PPC_ADDR16_LO:
+    write16be(Loc, Val);
+    break;
+  case R_PPC_ADDR32:
+  case R_PPC_REL32:
+    write32be(Loc, Val);
+    break;
+  case R_PPC_REL24:
+    write32be(Loc, read32be(Loc) | (Val & 0x3FFFFFC));
+    break;
+  default:
+    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
+  }
+}
+
+RelExpr PPC::getRelExpr(uint32_t Type, const SymbolBody &S,
+                        const uint8_t *Loc) const {
+  switch (Type) {
+  case R_PPC_REL24:
+  case R_PPC_REL32:
+    return R_PC;
+  default:
+    return R_ABS;
+  }
+}
+
+TargetInfo *elf::createPPCTargetInfo() { return make<PPC>(); }

Property changes on: vendor/lld/dist/ELF/Arch/PPC.cpp
___________________________________________________________________
Added: svn:eol-style
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+text/plain
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Index: vendor/lld/dist/ELF/Arch/PPC64.cpp
===================================================================
--- vendor/lld/dist/ELF/Arch/PPC64.cpp	(nonexistent)
+++ vendor/lld/dist/ELF/Arch/PPC64.cpp	(revision 320021)
@@ -0,0 +1,215 @@
+//===- PPC64.cpp ----------------------------------------------------------===//
+//
+//                             The LLVM Linker
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "Error.h"
+#include "Memory.h"
+#include "Symbols.h"
+#include "SyntheticSections.h"
+#include "Target.h"
+#include "llvm/Support/Endian.h"
+
+using namespace llvm;
+using namespace llvm::support::endian;
+using namespace llvm::ELF;
+using namespace lld;
+using namespace lld::elf;
+
+static uint64_t PPC64TocOffset = 0x8000;
+
+uint64_t elf::getPPC64TocBase() {
+  // The TOC consists of sections .got, .toc, .tocbss, .plt in that order. The
+  // TOC starts where the first of these sections starts. We always create a
+  // .got when we see a relocation that uses it, so for us the start is always
+  // the .got.
+  uint64_t TocVA = InX::Got->getVA();
+
+  // Per the ppc64-elf-linux ABI, The TOC base is TOC value plus 0x8000
+  // thus permitting a full 64 Kbytes segment. Note that the glibc startup
+  // code (crt1.o) assumes that you can get from the TOC base to the
+  // start of the .toc section with only a single (signed) 16-bit relocation.
+  return TocVA + PPC64TocOffset;
+}
+
+namespace {
+class PPC64 final : public TargetInfo {
+public:
+  PPC64();
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
+                     const uint8_t *Loc) const override;
+  void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
+                int32_t Index, unsigned RelOff) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+};
+} // namespace
+
+// Relocation masks following the #lo(value), #hi(value), #ha(value),
+// #higher(value), #highera(value), #highest(value), and #highesta(value)
+// macros defined in section 4.5.1. Relocation Types of the PPC-elf64abi
+// document.
+static uint16_t applyPPCLo(uint64_t V) { return V; }
+static uint16_t applyPPCHi(uint64_t V) { return V >> 16; }
+static uint16_t applyPPCHa(uint64_t V) { return (V + 0x8000) >> 16; }
+static uint16_t applyPPCHigher(uint64_t V) { return V >> 32; }
+static uint16_t applyPPCHighera(uint64_t V) { return (V + 0x8000) >> 32; }
+static uint16_t applyPPCHighest(uint64_t V) { return V >> 48; }
+static uint16_t applyPPCHighesta(uint64_t V) { return (V + 0x8000) >> 48; }
+
+PPC64::PPC64() {
+  PltRel = GotRel = R_PPC64_GLOB_DAT;
+  RelativeRel = R_PPC64_RELATIVE;
+  GotEntrySize = 8;
+  GotPltEntrySize = 8;
+  PltEntrySize = 32;
+  PltHeaderSize = 0;
+
+  // We need 64K pages (at least under glibc/Linux, the loader won't
+  // set different permissions on a finer granularity than that).
+  DefaultMaxPageSize = 65536;
+
+  // The PPC64 ELF ABI v1 spec, says:
+  //
+  //   It is normally desirable to put segments with different characteristics
+  //   in separate 256 Mbyte portions of the address space, to give the
+  //   operating system full paging flexibility in the 64-bit address space.
+  //
+  // And because the lowest non-zero 256M boundary is 0x10000000, PPC64 linkers
+  // use 0x10000000 as the starting address.
+  DefaultImageBase = 0x10000000;
+}
+
+RelExpr PPC64::getRelExpr(uint32_t Type, const SymbolBody &S,
+                          const uint8_t *Loc) const {
+  switch (Type) {
+  default:
+    return R_ABS;
+  case R_PPC64_TOC16:
+  case R_PPC64_TOC16_DS:
+  case R_PPC64_TOC16_HA:
+  case R_PPC64_TOC16_HI:
+  case R_PPC64_TOC16_LO:
+  case R_PPC64_TOC16_LO_DS:
+    return R_GOTREL;
+  case R_PPC64_TOC:
+    return R_PPC_TOC;
+  case R_PPC64_REL24:
+    return R_PPC_PLT_OPD;
+  }
+}
+
+void PPC64::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
+                     uint64_t PltEntryAddr, int32_t Index,
+                     unsigned RelOff) const {
+  uint64_t Off = GotPltEntryAddr - getPPC64TocBase();
+
+  // FIXME: What we should do, in theory, is get the offset of the function
+  // descriptor in the .opd section, and use that as the offset from %r2 (the
+  // TOC-base pointer). Instead, we have the GOT-entry offset, and that will
+  // be a pointer to the function descriptor in the .opd section. Using
+  // this scheme is simpler, but requires an extra indirection per PLT dispatch.
+
+  write32be(Buf, 0xf8410028);                       // std %r2, 40(%r1)
+  write32be(Buf + 4, 0x3d620000 | applyPPCHa(Off)); // addis %r11, %r2, X@ha
+  write32be(Buf + 8, 0xe98b0000 | applyPPCLo(Off)); // ld %r12, X@l(%r11)
+  write32be(Buf + 12, 0xe96c0000);                  // ld %r11,0(%r12)
+  write32be(Buf + 16, 0x7d6903a6);                  // mtctr %r11
+  write32be(Buf + 20, 0xe84c0008);                  // ld %r2,8(%r12)
+  write32be(Buf + 24, 0xe96c0010);                  // ld %r11,16(%r12)
+  write32be(Buf + 28, 0x4e800420);                  // bctr
+}
+
+static std::pair<uint32_t, uint64_t> toAddr16Rel(uint32_t Type, uint64_t Val) {
+  uint64_t V = Val - PPC64TocOffset;
+  switch (Type) {
+  case R_PPC64_TOC16:
+    return {R_PPC64_ADDR16, V};
+  case R_PPC64_TOC16_DS:
+    return {R_PPC64_ADDR16_DS, V};
+  case R_PPC64_TOC16_HA:
+    return {R_PPC64_ADDR16_HA, V};
+  case R_PPC64_TOC16_HI:
+    return {R_PPC64_ADDR16_HI, V};
+  case R_PPC64_TOC16_LO:
+    return {R_PPC64_ADDR16_LO, V};
+  case R_PPC64_TOC16_LO_DS:
+    return {R_PPC64_ADDR16_LO_DS, V};
+  default:
+    return {Type, Val};
+  }
+}
+
+void PPC64::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  // For a TOC-relative relocation, proceed in terms of the corresponding
+  // ADDR16 relocation type.
+  std::tie(Type, Val) = toAddr16Rel(Type, Val);
+
+  switch (Type) {
+  case R_PPC64_ADDR14: {
+    checkAlignment<4>(Loc, Val, Type);
+    // Preserve the AA/LK bits in the branch instruction
+    uint8_t AALK = Loc[3];
+    write16be(Loc + 2, (AALK & 3) | (Val & 0xfffc));
+    break;
+  }
+  case R_PPC64_ADDR16:
+    checkInt<16>(Loc, Val, Type);
+    write16be(Loc, Val);
+    break;
+  case R_PPC64_ADDR16_DS:
+    checkInt<16>(Loc, Val, Type);
+    write16be(Loc, (read16be(Loc) & 3) | (Val & ~3));
+    break;
+  case R_PPC64_ADDR16_HA:
+  case R_PPC64_REL16_HA:
+    write16be(Loc, applyPPCHa(Val));
+    break;
+  case R_PPC64_ADDR16_HI:
+  case R_PPC64_REL16_HI:
+    write16be(Loc, applyPPCHi(Val));
+    break;
+  case R_PPC64_ADDR16_HIGHER:
+    write16be(Loc, applyPPCHigher(Val));
+    break;
+  case R_PPC64_ADDR16_HIGHERA:
+    write16be(Loc, applyPPCHighera(Val));
+    break;
+  case R_PPC64_ADDR16_HIGHEST:
+    write16be(Loc, applyPPCHighest(Val));
+    break;
+  case R_PPC64_ADDR16_HIGHESTA:
+    write16be(Loc, applyPPCHighesta(Val));
+    break;
+  case R_PPC64_ADDR16_LO:
+    write16be(Loc, applyPPCLo(Val));
+    break;
+  case R_PPC64_ADDR16_LO_DS:
+  case R_PPC64_REL16_LO:
+    write16be(Loc, (read16be(Loc) & 3) | (applyPPCLo(Val) & ~3));
+    break;
+  case R_PPC64_ADDR32:
+  case R_PPC64_REL32:
+    checkInt<32>(Loc, Val, Type);
+    write32be(Loc, Val);
+    break;
+  case R_PPC64_ADDR64:
+  case R_PPC64_REL64:
+  case R_PPC64_TOC:
+    write64be(Loc, Val);
+    break;
+  case R_PPC64_REL24: {
+    uint32_t Mask = 0x03FFFFFC;
+    checkInt<24>(Loc, Val, Type);
+    write32be(Loc, (read32be(Loc) & ~Mask) | (Val & Mask));
+    break;
+  }
+  default:
+    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
+  }
+}
+
+TargetInfo *elf::createPPC64TargetInfo() { return make<PPC64>(); }

Property changes on: vendor/lld/dist/ELF/Arch/PPC64.cpp
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+FreeBSD=%H
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Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Index: vendor/lld/dist/ELF/Arch/X86.cpp
===================================================================
--- vendor/lld/dist/ELF/Arch/X86.cpp	(nonexistent)
+++ vendor/lld/dist/ELF/Arch/X86.cpp	(revision 320021)
@@ -0,0 +1,363 @@
+//===- X86.cpp ------------------------------------------------------------===//
+//
+//                             The LLVM Linker
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "Error.h"
+#include "InputFiles.h"
+#include "Memory.h"
+#include "Symbols.h"
+#include "SyntheticSections.h"
+#include "Target.h"
+#include "llvm/Support/Endian.h"
+
+using namespace llvm;
+using namespace llvm::support::endian;
+using namespace llvm::ELF;
+using namespace lld;
+using namespace lld::elf;
+
+namespace {
+class X86 final : public TargetInfo {
+public:
+  X86();
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
+                     const uint8_t *Loc) const override;
+  int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
+  void writeGotPltHeader(uint8_t *Buf) const override;
+  uint32_t getDynRel(uint32_t Type) const override;
+  void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
+  void writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const override;
+  void writePltHeader(uint8_t *Buf) const override;
+  void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
+                int32_t Index, unsigned RelOff) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+
+  RelExpr adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
+                          RelExpr Expr) const override;
+  void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+};
+} // namespace
+
+X86::X86() {
+  CopyRel = R_386_COPY;
+  GotRel = R_386_GLOB_DAT;
+  PltRel = R_386_JUMP_SLOT;
+  IRelativeRel = R_386_IRELATIVE;
+  RelativeRel = R_386_RELATIVE;
+  TlsGotRel = R_386_TLS_TPOFF;
+  TlsModuleIndexRel = R_386_TLS_DTPMOD32;
+  TlsOffsetRel = R_386_TLS_DTPOFF32;
+  GotEntrySize = 4;
+  GotPltEntrySize = 4;
+  PltEntrySize = 16;
+  PltHeaderSize = 16;
+  TlsGdRelaxSkip = 2;
+
+  // 0xCC is the "int3" (call debug exception handler) instruction.
+  TrapInstr = 0xcccccccc;
+}
+
+RelExpr X86::getRelExpr(uint32_t Type, const SymbolBody &S,
+                        const uint8_t *Loc) const {
+  switch (Type) {
+  case R_386_8:
+  case R_386_16:
+  case R_386_32:
+  case R_386_TLS_LDO_32:
+    return R_ABS;
+  case R_386_TLS_GD:
+    return R_TLSGD;
+  case R_386_TLS_LDM:
+    return R_TLSLD;
+  case R_386_PLT32:
+    return R_PLT_PC;
+  case R_386_PC8:
+  case R_386_PC16:
+  case R_386_PC32:
+    return R_PC;
+  case R_386_GOTPC:
+    return R_GOTONLY_PC_FROM_END;
+  case R_386_TLS_IE:
+    return R_GOT;
+  case R_386_GOT32:
+  case R_386_GOT32X:
+    // These relocations can be calculated in two different ways.
+    // Usual calculation is G + A - GOT what means an offset in GOT table
+    // (R_GOT_FROM_END). When instruction pointed by relocation has no base
+    // register, then relocations can be used when PIC code is disabled. In that
+    // case calculation is G + A, it resolves to an address of entry in GOT
+    // (R_GOT) and not an offset.
+    //
+    // To check that instruction has no base register we scan ModR/M byte.
+    // See "Table 2-2. 32-Bit Addressing Forms with the ModR/M Byte"
+    // (http://www.intel.com/content/dam/www/public/us/en/documents/manuals/
+    //  64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf)
+    if ((Loc[-1] & 0xc7) != 0x5)
+      return R_GOT_FROM_END;
+    if (Config->Pic)
+      error(toString(S.File) + ": relocation " + toString(Type) + " against '" +
+            S.getName() +
+            "' without base register can not be used when PIC enabled");
+    return R_GOT;
+  case R_386_TLS_GOTIE:
+    return R_GOT_FROM_END;
+  case R_386_GOTOFF:
+    return R_GOTREL_FROM_END;
+  case R_386_TLS_LE:
+    return R_TLS;
+  case R_386_TLS_LE_32:
+    return R_NEG_TLS;
+  case R_386_NONE:
+    return R_NONE;
+  default:
+    error(toString(S.File) + ": unknown relocation type: " + toString(Type));
+    return R_HINT;
+  }
+}
+
+RelExpr X86::adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
+                             RelExpr Expr) const {
+  switch (Expr) {
+  default:
+    return Expr;
+  case R_RELAX_TLS_GD_TO_IE:
+    return R_RELAX_TLS_GD_TO_IE_END;
+  case R_RELAX_TLS_GD_TO_LE:
+    return R_RELAX_TLS_GD_TO_LE_NEG;
+  }
+}
+
+void X86::writeGotPltHeader(uint8_t *Buf) const {
+  write32le(Buf, InX::Dynamic->getVA());
+}
+
+void X86::writeGotPlt(uint8_t *Buf, const SymbolBody &S) const {
+  // Entries in .got.plt initially points back to the corresponding
+  // PLT entries with a fixed offset to skip the first instruction.
+  write32le(Buf, S.getPltVA() + 6);
+}
+
+void X86::writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const {
+  // An x86 entry is the address of the ifunc resolver function.
+  write32le(Buf, S.getVA());
+}
+
+uint32_t X86::getDynRel(uint32_t Type) const {
+  if (Type == R_386_TLS_LE)
+    return R_386_TLS_TPOFF;
+  if (Type == R_386_TLS_LE_32)
+    return R_386_TLS_TPOFF32;
+  return Type;
+}
+
+void X86::writePltHeader(uint8_t *Buf) const {
+  if (Config->Pic) {
+    const uint8_t V[] = {
+        0xff, 0xb3, 0x04, 0x00, 0x00, 0x00, // pushl GOTPLT+4(%ebx)
+        0xff, 0xa3, 0x08, 0x00, 0x00, 0x00, // jmp *GOTPLT+8(%ebx)
+        0x90, 0x90, 0x90, 0x90              // nop
+    };
+    memcpy(Buf, V, sizeof(V));
+
+    uint32_t Ebx = InX::Got->getVA() + InX::Got->getSize();
+    uint32_t GotPlt = InX::GotPlt->getVA() - Ebx;
+    write32le(Buf + 2, GotPlt + 4);
+    write32le(Buf + 8, GotPlt + 8);
+    return;
+  }
+
+  const uint8_t PltData[] = {
+      0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushl (GOTPLT+4)
+      0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *(GOTPLT+8)
+      0x90, 0x90, 0x90, 0x90              // nop
+  };
+  memcpy(Buf, PltData, sizeof(PltData));
+  uint32_t GotPlt = InX::GotPlt->getVA();
+  write32le(Buf + 2, GotPlt + 4);
+  write32le(Buf + 8, GotPlt + 8);
+}
+
+void X86::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
+                   uint64_t PltEntryAddr, int32_t Index,
+                   unsigned RelOff) const {
+  const uint8_t Inst[] = {
+      0xff, 0x00, 0x00, 0x00, 0x00, 0x00, // jmp *foo_in_GOT|*foo@GOT(%ebx)
+      0x68, 0x00, 0x00, 0x00, 0x00,       // pushl $reloc_offset
+      0xe9, 0x00, 0x00, 0x00, 0x00        // jmp .PLT0@PC
+  };
+  memcpy(Buf, Inst, sizeof(Inst));
+
+  if (Config->Pic) {
+    // jmp *foo@GOT(%ebx)
+    uint32_t Ebx = InX::Got->getVA() + InX::Got->getSize();
+    Buf[1] = 0xa3;
+    write32le(Buf + 2, GotPltEntryAddr - Ebx);
+  } else {
+    // jmp *foo_in_GOT
+    Buf[1] = 0x25;
+    write32le(Buf + 2, GotPltEntryAddr);
+  }
+
+  write32le(Buf + 7, RelOff);
+  write32le(Buf + 12, -Index * PltEntrySize - PltHeaderSize - 16);
+}
+
+int64_t X86::getImplicitAddend(const uint8_t *Buf, uint32_t Type) const {
+  switch (Type) {
+  default:
+    return 0;
+  case R_386_8:
+  case R_386_PC8:
+    return SignExtend64<8>(*Buf);
+  case R_386_16:
+  case R_386_PC16:
+    return SignExtend64<16>(read16le(Buf));
+  case R_386_32:
+  case R_386_GOT32:
+  case R_386_GOT32X:
+  case R_386_GOTOFF:
+  case R_386_GOTPC:
+  case R_386_PC32:
+  case R_386_PLT32:
+  case R_386_TLS_LDO_32:
+  case R_386_TLS_LE:
+    return SignExtend64<32>(read32le(Buf));
+  }
+}
+
+void X86::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  // R_386_{PC,}{8,16} are not part of the i386 psABI, but they are
+  // being used for some 16-bit programs such as boot loaders, so
+  // we want to support them.
+  switch (Type) {
+  case R_386_8:
+    checkUInt<8>(Loc, Val, Type);
+    *Loc = Val;
+    break;
+  case R_386_PC8:
+    checkInt<8>(Loc, Val, Type);
+    *Loc = Val;
+    break;
+  case R_386_16:
+    checkUInt<16>(Loc, Val, Type);
+    write16le(Loc, Val);
+    break;
+  case R_386_PC16:
+    // R_386_PC16 is normally used with 16 bit code. In that situation
+    // the PC is 16 bits, just like the addend. This means that it can
+    // point from any 16 bit address to any other if the possibility
+    // of wrapping is included.
+    // The only restriction we have to check then is that the destination
+    // address fits in 16 bits. That is impossible to do here. The problem is
+    // that we are passed the final value, which already had the
+    // current location subtracted from it.
+    // We just check that Val fits in 17 bits. This misses some cases, but
+    // should have no false positives.
+    checkInt<17>(Loc, Val, Type);
+    write16le(Loc, Val);
+    break;
+  default:
+    checkInt<32>(Loc, Val, Type);
+    write32le(Loc, Val);
+  }
+}
+
+void X86::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  // Convert
+  //   leal x@tlsgd(, %ebx, 1),
+  //   call __tls_get_addr@plt
+  // to
+  //   movl %gs:0,%eax
+  //   subl $x@ntpoff,%eax
+  const uint8_t Inst[] = {
+      0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax
+      0x81, 0xe8, 0x00, 0x00, 0x00, 0x00  // subl 0(%ebx), %eax
+  };
+  memcpy(Loc - 3, Inst, sizeof(Inst));
+  write32le(Loc + 5, Val);
+}
+
+void X86::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  // Convert
+  //   leal x@tlsgd(, %ebx, 1),
+  //   call __tls_get_addr@plt
+  // to
+  //   movl %gs:0, %eax
+  //   addl x@gotntpoff(%ebx), %eax
+  const uint8_t Inst[] = {
+      0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax
+      0x03, 0x83, 0x00, 0x00, 0x00, 0x00  // addl 0(%ebx), %eax
+  };
+  memcpy(Loc - 3, Inst, sizeof(Inst));
+  write32le(Loc + 5, Val);
+}
+
+// In some conditions, relocations can be optimized to avoid using GOT.
+// This function does that for Initial Exec to Local Exec case.
+void X86::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  // Ulrich's document section 6.2 says that @gotntpoff can
+  // be used with MOVL or ADDL instructions.
+  // @indntpoff is similar to @gotntpoff, but for use in
+  // position dependent code.
+  uint8_t Reg = (Loc[-1] >> 3) & 7;
+
+  if (Type == R_386_TLS_IE) {
+    if (Loc[-1] == 0xa1) {
+      // "movl foo@indntpoff,%eax" -> "movl $foo,%eax"
+      // This case is different from the generic case below because
+      // this is a 5 byte instruction while below is 6 bytes.
+      Loc[-1] = 0xb8;
+    } else if (Loc[-2] == 0x8b) {
+      // "movl foo@indntpoff,%reg" -> "movl $foo,%reg"
+      Loc[-2] = 0xc7;
+      Loc[-1] = 0xc0 | Reg;
+    } else {
+      // "addl foo@indntpoff,%reg" -> "addl $foo,%reg"
+      Loc[-2] = 0x81;
+      Loc[-1] = 0xc0 | Reg;
+    }
+  } else {
+    assert(Type == R_386_TLS_GOTIE);
+    if (Loc[-2] == 0x8b) {
+      // "movl foo@gottpoff(%rip),%reg" -> "movl $foo,%reg"
+      Loc[-2] = 0xc7;
+      Loc[-1] = 0xc0 | Reg;
+    } else {
+      // "addl foo@gotntpoff(%rip),%reg" -> "leal foo(%reg),%reg"
+      Loc[-2] = 0x8d;
+      Loc[-1] = 0x80 | (Reg << 3) | Reg;
+    }
+  }
+  write32le(Loc, Val);
+}
+
+void X86::relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
+  if (Type == R_386_TLS_LDO_32) {
+    write32le(Loc, Val);
+    return;
+  }
+
+  // Convert
+  //   leal foo(%reg),%eax
+  //   call ___tls_get_addr
+  // to
+  //   movl %gs:0,%eax
+  //   nop
+  //   leal 0(%esi,1),%esi
+  const uint8_t Inst[] = {
+      0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0,%eax
+      0x90,                               // nop
+      0x8d, 0x74, 0x26, 0x00              // leal 0(%esi,1),%esi
+  };
+  memcpy(Loc - 2, Inst, sizeof(Inst));
+}
+
+TargetInfo *elf::createX86TargetInfo() { return make<X86>(); }

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Index: vendor/lld/dist/ELF/Arch/X86_64.cpp
===================================================================
--- vendor/lld/dist/ELF/Arch/X86_64.cpp	(nonexistent)
+++ vendor/lld/dist/ELF/Arch/X86_64.cpp	(revision 320021)
@@ -0,0 +1,468 @@
+//===- X86_64.cpp ---------------------------------------------------------===//
+//
+//                             The LLVM Linker
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "Error.h"
+#include "InputFiles.h"
+#include "Memory.h"
+#include "Symbols.h"
+#include "SyntheticSections.h"
+#include "Target.h"
+#include "llvm/Object/ELF.h"
+#include "llvm/Support/Endian.h"
+
+using namespace llvm;
+using namespace llvm::object;
+using namespace llvm::support::endian;
+using namespace llvm::ELF;
+using namespace lld;
+using namespace lld::elf;
+
+namespace {
+template <class ELFT> class X86_64 final : public TargetInfo {
+public:
+  X86_64();
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
+                     const uint8_t *Loc) const override;
+  bool isPicRel(uint32_t Type) const override;
+  void writeGotPltHeader(uint8_t *Buf) const override;
+  void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
+  void writePltHeader(uint8_t *Buf) const override;
+  void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
+                int32_t Index, unsigned RelOff) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+
+  RelExpr adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
+                          RelExpr Expr) const override;
+  void relaxGot(uint8_t *Loc, uint64_t Val) const override;
+  void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+
+private:
+  void relaxGotNoPic(uint8_t *Loc, uint64_t Val, uint8_t Op,
+                     uint8_t ModRm) const;
+};
+} // namespace
+
+template <class ELFT> X86_64<ELFT>::X86_64() {
+  CopyRel = R_X86_64_COPY;
+  GotRel = R_X86_64_GLOB_DAT;
+  PltRel = R_X86_64_JUMP_SLOT;
+  RelativeRel = R_X86_64_RELATIVE;
+  IRelativeRel = R_X86_64_IRELATIVE;
+  TlsGotRel = R_X86_64_TPOFF64;
+  TlsModuleIndexRel = R_X86_64_DTPMOD64;
+  TlsOffsetRel = R_X86_64_DTPOFF64;
+  GotEntrySize = 8;
+  GotPltEntrySize = 8;
+  PltEntrySize = 16;
+  PltHeaderSize = 16;
+  TlsGdRelaxSkip = 2;
+
+  // Align to the large page size (known as a superpage or huge page).
+  // FreeBSD automatically promotes large, superpage-aligned allocations.
+  DefaultImageBase = 0x200000;
+
+  // 0xCC is the "int3" (call debug exception handler) instruction.
+  TrapInstr = 0xcccccccc;
+}
+
+template <class ELFT>
+RelExpr X86_64<ELFT>::getRelExpr(uint32_t Type, const SymbolBody &S,
+                                 const uint8_t *Loc) const {
+  switch (Type) {
+  case R_X86_64_8:
+  case R_X86_64_16:
+  case R_X86_64_32:
+  case R_X86_64_32S:
+  case R_X86_64_64:
+  case R_X86_64_DTPOFF32:
+  case R_X86_64_DTPOFF64:
+    return R_ABS;
+  case R_X86_64_TPOFF32:
+    return R_TLS;
+  case R_X86_64_TLSLD:
+    return R_TLSLD_PC;
+  case R_X86_64_TLSGD:
+    return R_TLSGD_PC;
+  case R_X86_64_SIZE32:
+  case R_X86_64_SIZE64:
+    return R_SIZE;
+  case R_X86_64_PLT32:
+    return R_PLT_PC;
+  case R_X86_64_PC32:
+  case R_X86_64_PC64:
+    return R_PC;
+  case R_X86_64_GOT32:
+  case R_X86_64_GOT64:
+    return R_GOT_FROM_END;
+  case R_X86_64_GOTPCREL:
+  case R_X86_64_GOTPCRELX:
+  case R_X86_64_REX_GOTPCRELX:
+  case R_X86_64_GOTTPOFF:
+    return R_GOT_PC;
+  case R_X86_64_NONE:
+    return R_NONE;
+  default:
+    error(toString(S.File) + ": unknown relocation type: " + toString(Type));
+    return R_HINT;
+  }
+}
+
+template <class ELFT> void X86_64<ELFT>::writeGotPltHeader(uint8_t *Buf) const {
+  // The first entry holds the value of _DYNAMIC. It is not clear why that is
+  // required, but it is documented in the psabi and the glibc dynamic linker
+  // seems to use it (note that this is relevant for linking ld.so, not any
+  // other program).
+  write64le(Buf, InX::Dynamic->getVA());
+}
+
+template <class ELFT>
+void X86_64<ELFT>::writeGotPlt(uint8_t *Buf, const SymbolBody &S) const {
+  // See comments in X86TargetInfo::writeGotPlt.
+  write32le(Buf, S.getPltVA() + 6);
+}
+
+template <class ELFT> void X86_64<ELFT>::writePltHeader(uint8_t *Buf) const {
+  const uint8_t PltData[] = {
+      0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushq GOTPLT+8(%rip)
+      0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *GOTPLT+16(%rip)
+      0x0f, 0x1f, 0x40, 0x00              // nop
+  };
+  memcpy(Buf, PltData, sizeof(PltData));
+  uint64_t GotPlt = InX::GotPlt->getVA();
+  uint64_t Plt = InX::Plt->getVA();
+  write32le(Buf + 2, GotPlt - Plt + 2); // GOTPLT+8
+  write32le(Buf + 8, GotPlt - Plt + 4); // GOTPLT+16
+}
+
+template <class ELFT>
+void X86_64<ELFT>::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
+                            uint64_t PltEntryAddr, int32_t Index,
+                            unsigned RelOff) const {
+  const uint8_t Inst[] = {
+      0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmpq *got(%rip)
+      0x68, 0x00, 0x00, 0x00, 0x00,       // pushq <relocation index>
+      0xe9, 0x00, 0x00, 0x00, 0x00        // jmpq plt[0]
+  };
+  memcpy(Buf, Inst, sizeof(Inst));
+
+  write32le(Buf + 2, GotPltEntryAddr - PltEntryAddr - 6);
+  write32le(Buf + 7, Index);
+  write32le(Buf + 12, -Index * PltEntrySize - PltHeaderSize - 16);
+}
+
+template <class ELFT> bool X86_64<ELFT>::isPicRel(uint32_t Type) const {
+  return Type != R_X86_64_PC32 && Type != R_X86_64_32 &&
+         Type != R_X86_64_TPOFF32;
+}
+
+template <class ELFT>
+void X86_64<ELFT>::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type,
+                                  uint64_t Val) const {
+  // Convert
+  //   .byte 0x66
+  //   leaq x@tlsgd(%rip), %rdi
+  //   .word 0x6666
+  //   rex64
+  //   call __tls_get_addr@plt
+  // to
+  //   mov %fs:0x0,%rax
+  //   lea x@tpoff,%rax
+  const uint8_t Inst[] = {
+      0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax
+      0x48, 0x8d, 0x80, 0x00, 0x00, 0x00, 0x00              // lea x@tpoff,%rax
+  };
+  memcpy(Loc - 4, Inst, sizeof(Inst));
+
+  // The original code used a pc relative relocation and so we have to
+  // compensate for the -4 in had in the addend.
+  write32le(Loc + 8, Val + 4);
+}
+
+template <class ELFT>
+void X86_64<ELFT>::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type,
+                                  uint64_t Val) const {
+  // Convert
+  //   .byte 0x66
+  //   leaq x@tlsgd(%rip), %rdi
+  //   .word 0x6666
+  //   rex64
+  //   call __tls_get_addr@plt
+  // to
+  //   mov %fs:0x0,%rax
+  //   addq x@tpoff,%rax
+  const uint8_t Inst[] = {
+      0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax
+      0x48, 0x03, 0x05, 0x00, 0x00, 0x00, 0x00              // addq x@tpoff,%rax
+  };
+  memcpy(Loc - 4, Inst, sizeof(Inst));
+
+  // Both code sequences are PC relatives, but since we are moving the constant
+  // forward by 8 bytes we have to subtract the value by 8.
+  write32le(Loc + 8, Val - 8);
+}
+
+// In some conditions, R_X86_64_GOTTPOFF relocation can be optimized to
+// R_X86_64_TPOFF32 so that it does not use GOT.
+template <class ELFT>
+void X86_64<ELFT>::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type,
+                                  uint64_t Val) const {
+  uint8_t *Inst = Loc - 3;
+  uint8_t Reg = Loc[-1] >> 3;
+  uint8_t *RegSlot = Loc - 1;
+
+  // Note that ADD with RSP or R12 is converted to ADD instead of LEA
+  // because LEA with these registers needs 4 bytes to encode and thus
+  // wouldn't fit the space.
+
+  if (memcmp(Inst, "\x48\x03\x25", 3) == 0) {
+    // "addq foo@gottpoff(%rip),%rsp" -> "addq $foo,%rsp"
+    memcpy(Inst, "\x48\x81\xc4", 3);
+  } else if (memcmp(Inst, "\x4c\x03\x25", 3) == 0) {
+    // "addq foo@gottpoff(%rip),%r12" -> "addq $foo,%r12"
+    memcpy(Inst, "\x49\x81\xc4", 3);
+  } else if (memcmp(Inst, "\x4c\x03", 2) == 0) {
+    // "addq foo@gottpoff(%rip),%r[8-15]" -> "leaq foo(%r[8-15]),%r[8-15]"
+    memcpy(Inst, "\x4d\x8d", 2);
+    *RegSlot = 0x80 | (Reg << 3) | Reg;
+  } else if (memcmp(Inst, "\x48\x03", 2) == 0) {
+    // "addq foo@gottpoff(%rip),%reg -> "leaq foo(%reg),%reg"
+    memcpy(Inst, "\x48\x8d", 2);
+    *RegSlot = 0x80 | (Reg << 3) | Reg;
+  } else if (memcmp(Inst, "\x4c\x8b", 2) == 0) {
+    // "movq foo@gottpoff(%rip),%r[8-15]" -> "movq $foo,%r[8-15]"
+    memcpy(Inst, "\x49\xc7", 2);
+    *RegSlot = 0xc0 | Reg;
+  } else if (memcmp(Inst, "\x48\x8b", 2) == 0) {
+    // "movq foo@gottpoff(%rip),%reg" -> "movq $foo,%reg"
+    memcpy(Inst, "\x48\xc7", 2);
+    *RegSlot = 0xc0 | Reg;
+  } else {
+    error(getErrorLocation(Loc - 3) +
+          "R_X86_64_GOTTPOFF must be used in MOVQ or ADDQ instructions only");
+  }
+
+  // The original code used a PC relative relocation.
+  // Need to compensate for the -4 it had in the addend.
+  write32le(Loc, Val + 4);
+}
+
+template <class ELFT>
+void X86_64<ELFT>::relaxTlsLdToLe(uint8_t *Loc, uint32_t Type,
+                                  uint64_t Val) const {
+  // Convert
+  //   leaq bar@tlsld(%rip), %rdi
+  //   callq __tls_get_addr@PLT
+  //   leaq bar@dtpoff(%rax), %rcx
+  // to
+  //   .word 0x6666
+  //   .byte 0x66
+  //   mov %fs:0,%rax
+  //   leaq bar@tpoff(%rax), %rcx
+  if (Type == R_X86_64_DTPOFF64) {
+    write64le(Loc, Val);
+    return;
+  }
+  if (Type == R_X86_64_DTPOFF32) {
+    write32le(Loc, Val);
+    return;
+  }
+
+  const uint8_t Inst[] = {
+      0x66, 0x66,                                          // .word 0x6666
+      0x66,                                                // .byte 0x66
+      0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00 // mov %fs:0,%rax
+  };
+  memcpy(Loc - 3, Inst, sizeof(Inst));
+}
+
+template <class ELFT>
+void X86_64<ELFT>::relocateOne(uint8_t *Loc, uint32_t Type,
+                               uint64_t Val) const {
+  switch (Type) {
+  case R_X86_64_8:
+    checkUInt<8>(Loc, Val, Type);
+    *Loc = Val;
+    break;
+  case R_X86_64_16:
+    checkUInt<16>(Loc, Val, Type);
+    write16le(Loc, Val);
+    break;
+  case R_X86_64_32:
+    checkUInt<32>(Loc, Val, Type);
+    write32le(Loc, Val);
+    break;
+  case R_X86_64_32S:
+  case R_X86_64_TPOFF32:
+  case R_X86_64_GOT32:
+  case R_X86_64_GOTPCREL:
+  case R_X86_64_GOTPCRELX:
+  case R_X86_64_REX_GOTPCRELX:
+  case R_X86_64_PC32:
+  case R_X86_64_GOTTPOFF:
+  case R_X86_64_PLT32:
+  case R_X86_64_TLSGD:
+  case R_X86_64_TLSLD:
+  case R_X86_64_DTPOFF32:
+  case R_X86_64_SIZE32:
+    checkInt<32>(Loc, Val, Type);
+    write32le(Loc, Val);
+    break;
+  case R_X86_64_64:
+  case R_X86_64_DTPOFF64:
+  case R_X86_64_GLOB_DAT:
+  case R_X86_64_PC64:
+  case R_X86_64_SIZE64:
+  case R_X86_64_GOT64:
+    write64le(Loc, Val);
+    break;
+  default:
+    llvm_unreachable("unexpected relocation");
+  }
+}
+
+template <class ELFT>
+RelExpr X86_64<ELFT>::adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
+                                      RelExpr RelExpr) const {
+  if (Type != R_X86_64_GOTPCRELX && Type != R_X86_64_REX_GOTPCRELX)
+    return RelExpr;
+  const uint8_t Op = Data[-2];
+  const uint8_t ModRm = Data[-1];
+
+  // FIXME: When PIC is disabled and foo is defined locally in the
+  // lower 32 bit address space, memory operand in mov can be converted into
+  // immediate operand. Otherwise, mov must be changed to lea. We support only
+  // latter relaxation at this moment.
+  if (Op == 0x8b)
+    return R_RELAX_GOT_PC;
+
+  // Relax call and jmp.
+  if (Op == 0xff && (ModRm == 0x15 || ModRm == 0x25))
+    return R_RELAX_GOT_PC;
+
+  // Relaxation of test, adc, add, and, cmp, or, sbb, sub, xor.
+  // If PIC then no relaxation is available.
+  // We also don't relax test/binop instructions without REX byte,
+  // they are 32bit operations and not common to have.
+  assert(Type == R_X86_64_REX_GOTPCRELX);
+  return Config->Pic ? RelExpr : R_RELAX_GOT_PC_NOPIC;
+}
+
+// A subset of relaxations can only be applied for no-PIC. This method
+// handles such relaxations. Instructions encoding information was taken from:
+// "Intel 64 and IA-32 Architectures Software Developer's Manual V2"
+// (http://www.intel.com/content/dam/www/public/us/en/documents/manuals/
+//    64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf)
+template <class ELFT>
+void X86_64<ELFT>::relaxGotNoPic(uint8_t *Loc, uint64_t Val, uint8_t Op,
+                                 uint8_t ModRm) const {
+  const uint8_t Rex = Loc[-3];
+  // Convert "test %reg, foo@GOTPCREL(%rip)" to "test $foo, %reg".
+  if (Op == 0x85) {
+    // See "TEST-Logical Compare" (4-428 Vol. 2B),
+    // TEST r/m64, r64 uses "full" ModR / M byte (no opcode extension).
+
+    // ModR/M byte has form XX YYY ZZZ, where
+    // YYY is MODRM.reg(register 2), ZZZ is MODRM.rm(register 1).
+    // XX has different meanings:
+    // 00: The operand's memory address is in reg1.
+    // 01: The operand's memory address is reg1 + a byte-sized displacement.
+    // 10: The operand's memory address is reg1 + a word-sized displacement.
+    // 11: The operand is reg1 itself.
+    // If an instruction requires only one operand, the unused reg2 field
+    // holds extra opcode bits rather than a register code
+    // 0xC0 == 11 000 000 binary.
+    // 0x38 == 00 111 000 binary.
+    // We transfer reg2 to reg1 here as operand.
+    // See "2.1.3 ModR/M and SIB Bytes" (Vol. 2A 2-3).
+    Loc[-1] = 0xc0 | (ModRm & 0x38) >> 3; // ModR/M byte.
+
+    // Change opcode from TEST r/m64, r64 to TEST r/m64, imm32
+    // See "TEST-Logical Compare" (4-428 Vol. 2B).
+    Loc[-2] = 0xf7;
+
+    // Move R bit to the B bit in REX byte.
+    // REX byte is encoded as 0100WRXB, where
+    // 0100 is 4bit fixed pattern.
+    // REX.W When 1, a 64-bit operand size is used. Otherwise, when 0, the
+    //   default operand size is used (which is 32-bit for most but not all
+    //   instructions).
+    // REX.R This 1-bit value is an extension to the MODRM.reg field.
+    // REX.X This 1-bit value is an extension to the SIB.index field.
+    // REX.B This 1-bit value is an extension to the MODRM.rm field or the
+    // SIB.base field.
+    // See "2.2.1.2 More on REX Prefix Fields " (2-8 Vol. 2A).
+    Loc[-3] = (Rex & ~0x4) | (Rex & 0x4) >> 2;
+    write32le(Loc, Val);
+    return;
+  }
+
+  // If we are here then we need to relax the adc, add, and, cmp, or, sbb, sub
+  // or xor operations.
+
+  // Convert "binop foo@GOTPCREL(%rip), %reg" to "binop $foo, %reg".
+  // Logic is close to one for test instruction above, but we also
+  // write opcode extension here, see below for details.
+  Loc[-1] = 0xc0 | (ModRm & 0x38) >> 3 | (Op & 0x3c); // ModR/M byte.
+
+  // Primary opcode is 0x81, opcode extension is one of:
+  // 000b = ADD, 001b is OR, 010b is ADC, 011b is SBB,
+  // 100b is AND, 101b is SUB, 110b is XOR, 111b is CMP.
+  // This value was wrote to MODRM.reg in a line above.
+  // See "3.2 INSTRUCTIONS (A-M)" (Vol. 2A 3-15),
+  // "INSTRUCTION SET REFERENCE, N-Z" (Vol. 2B 4-1) for
+  // descriptions about each operation.
+  Loc[-2] = 0x81;
+  Loc[-3] = (Rex & ~0x4) | (Rex & 0x4) >> 2;
+  write32le(Loc, Val);
+}
+
+template <class ELFT>
+void X86_64<ELFT>::relaxGot(uint8_t *Loc, uint64_t Val) const {
+  const uint8_t Op = Loc[-2];
+  const uint8_t ModRm = Loc[-1];
+
+  // Convert "mov foo@GOTPCREL(%rip),%reg" to "lea foo(%rip),%reg".
+  if (Op == 0x8b) {
+    Loc[-2] = 0x8d;
+    write32le(Loc, Val);
+    return;
+  }
+
+  if (Op != 0xff) {
+    // We are relaxing a rip relative to an absolute, so compensate
+    // for the old -4 addend.
+    assert(!Config->Pic);
+    relaxGotNoPic(Loc, Val + 4, Op, ModRm);
+    return;
+  }
+
+  // Convert call/jmp instructions.
+  if (ModRm == 0x15) {
+    // ABI says we can convert "call *foo@GOTPCREL(%rip)" to "nop; call foo".
+    // Instead we convert to "addr32 call foo" where addr32 is an instruction
+    // prefix. That makes result expression to be a single instruction.
+    Loc[-2] = 0x67; // addr32 prefix
+    Loc[-1] = 0xe8; // call
+    write32le(Loc, Val);
+    return;
+  }
+
+  // Convert "jmp *foo@GOTPCREL(%rip)" to "jmp foo; nop".
+  // jmp doesn't return, so it is fine to use nop here, it is just a stub.
+  assert(ModRm == 0x25);
+  Loc[-2] = 0xe9; // jmp
+  Loc[3] = 0x90;  // nop
+  write32le(Loc - 1, Val + 1);
+}
+
+TargetInfo *elf::createX32TargetInfo() { return make<X86_64<ELF32LE>>(); }
+TargetInfo *elf::createX86_64TargetInfo() { return make<X86_64<ELF64LE>>(); }

Property changes on: vendor/lld/dist/ELF/Arch/X86_64.cpp
___________________________________________________________________
Added: svn:eol-style
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+native
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Added: svn:keywords
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Index: vendor/lld/dist/ELF/CMakeLists.txt
===================================================================
--- vendor/lld/dist/ELF/CMakeLists.txt	(revision 320020)
+++ vendor/lld/dist/ELF/CMakeLists.txt	(revision 320021)
@@ -1,65 +1,74 @@
 set(LLVM_TARGET_DEFINITIONS Options.td)
 tablegen(LLVM Options.inc -gen-opt-parser-defs)
 add_public_tablegen_target(ELFOptionsTableGen)
 
 if(NOT LLD_BUILT_STANDALONE)
   set(tablegen_deps intrinsics_gen)
 endif()
 
 add_lld_library(lldELF
+  Arch/AArch64.cpp
+  Arch/AMDGPU.cpp
+  Arch/ARM.cpp
+  Arch/AVR.cpp
+  Arch/Mips.cpp
+  Arch/PPC.cpp
+  Arch/PPC64.cpp
+  Arch/X86.cpp
+  Arch/X86_64.cpp
   Driver.cpp
   DriverUtils.cpp
   EhFrame.cpp
   Error.cpp
   Filesystem.cpp
   GdbIndex.cpp
   ICF.cpp
   InputFiles.cpp
   InputSection.cpp
   LTO.cpp
   LinkerScript.cpp
   MapFile.cpp
   MarkLive.cpp
   Mips.cpp
   OutputSections.cpp
   Relocations.cpp
   ScriptLexer.cpp
   ScriptParser.cpp
   Strings.cpp
   SymbolTable.cpp
   Symbols.cpp
   SyntheticSections.cpp
   Target.cpp
   Thunks.cpp
   Writer.cpp
 
   LINK_COMPONENTS
   ${LLVM_TARGETS_TO_BUILD}
   Analysis
   BinaryFormat
   BitReader
   BitWriter
   Codegen
   Core
   DebugInfoDWARF
   Demangle
   IPO
   Linker
   LTO
   Object
   Option
   Passes
   MC
   Support
   Target
   TransformUtils
 
   LINK_LIBS
   lldConfig
   lldCore
   ${LLVM_PTHREAD_LIB}
 
   DEPENDS
   ELFOptionsTableGen
   ${tablegen_deps}
   )
Index: vendor/lld/dist/ELF/Driver.cpp
===================================================================
--- vendor/lld/dist/ELF/Driver.cpp	(revision 320020)
+++ vendor/lld/dist/ELF/Driver.cpp	(revision 320021)
@@ -1,1024 +1,1012 @@
 //===- Driver.cpp ---------------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // The driver drives the entire linking process. It is responsible for
 // parsing command line options and doing whatever it is instructed to do.
 //
 // One notable thing in the LLD's driver when compared to other linkers is
 // that the LLD's driver is agnostic on the host operating system.
 // Other linkers usually have implicit default values (such as a dynamic
 // linker path or library paths) for each host OS.
 //
 // I don't think implicit default values are useful because they are
 // usually explicitly specified by the compiler driver. They can even
 // be harmful when you are doing cross-linking. Therefore, in LLD, we
 // simply trust the compiler driver to pass all required options and
 // don't try to make effort on our side.
 //
 //===----------------------------------------------------------------------===//
 
 #include "Driver.h"
 #include "Config.h"
 #include "Error.h"
 #include "Filesystem.h"
 #include "ICF.h"
 #include "InputFiles.h"
 #include "InputSection.h"
 #include "LinkerScript.h"
 #include "Memory.h"
 #include "OutputSections.h"
 #include "ScriptParser.h"
 #include "Strings.h"
 #include "SymbolTable.h"
+#include "SyntheticSections.h"
 #include "Target.h"
 #include "Threads.h"
 #include "Writer.h"
 #include "lld/Config/Version.h"
 #include "lld/Driver/Driver.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringSwitch.h"
-#include "llvm/Object/Decompressor.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Compression.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/TarWriter.h"
 #include "llvm/Support/TargetSelect.h"
 #include "llvm/Support/raw_ostream.h"
 #include <cstdlib>
 #include <utility>
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
 using namespace llvm::sys;
 
 using namespace lld;
 using namespace lld::elf;
 
 Configuration *elf::Config;
 LinkerDriver *elf::Driver;
 
 BumpPtrAllocator elf::BAlloc;
 StringSaver elf::Saver{BAlloc};
 std::vector<SpecificAllocBase *> elf::SpecificAllocBase::Instances;
 
 static void setConfigs();
 
 bool elf::link(ArrayRef<const char *> Args, bool CanExitEarly,
                raw_ostream &Error) {
   ErrorCount = 0;
   ErrorOS = &Error;
   Argv0 = Args[0];
   InputSections.clear();
   Tar = nullptr;
 
   Config = make<Configuration>();
   Driver = make<LinkerDriver>();
   Script = make<LinkerScript>();
 
   Driver->main(Args, CanExitEarly);
   freeArena();
   return !ErrorCount;
 }
 
 // Parses a linker -m option.
 static std::tuple<ELFKind, uint16_t, uint8_t> parseEmulation(StringRef Emul) {
   uint8_t OSABI = 0;
   StringRef S = Emul;
   if (S.endswith("_fbsd")) {
     S = S.drop_back(5);
     OSABI = ELFOSABI_FREEBSD;
   }
 
   std::pair<ELFKind, uint16_t> Ret =
       StringSwitch<std::pair<ELFKind, uint16_t>>(S)
           .Cases("aarch64elf", "aarch64linux", {ELF64LEKind, EM_AARCH64})
-          .Case("armelf_linux_eabi", {ELF32LEKind, EM_ARM})
+          .Cases("armelf", "armelf_linux_eabi", {ELF32LEKind, EM_ARM})
           .Case("elf32_x86_64", {ELF32LEKind, EM_X86_64})
           .Cases("elf32btsmip", "elf32btsmipn32", {ELF32BEKind, EM_MIPS})
           .Cases("elf32ltsmip", "elf32ltsmipn32", {ELF32LEKind, EM_MIPS})
           .Case("elf32ppc", {ELF32BEKind, EM_PPC})
           .Case("elf64btsmip", {ELF64BEKind, EM_MIPS})
           .Case("elf64ltsmip", {ELF64LEKind, EM_MIPS})
           .Case("elf64ppc", {ELF64BEKind, EM_PPC64})
           .Cases("elf_amd64", "elf_x86_64", {ELF64LEKind, EM_X86_64})
           .Case("elf_i386", {ELF32LEKind, EM_386})
           .Case("elf_iamcu", {ELF32LEKind, EM_IAMCU})
           .Default({ELFNoneKind, EM_NONE});
 
   if (Ret.first == ELFNoneKind) {
     if (S == "i386pe" || S == "i386pep" || S == "thumb2pe")
       error("Windows targets are not supported on the ELF frontend: " + Emul);
     else
       error("unknown emulation: " + Emul);
   }
   return std::make_tuple(Ret.first, Ret.second, OSABI);
 }
 
 // Returns slices of MB by parsing MB as an archive file.
 // Each slice consists of a member file in the archive.
 std::vector<std::pair<MemoryBufferRef, uint64_t>> static getArchiveMembers(
     MemoryBufferRef MB) {
   std::unique_ptr<Archive> File =
       check(Archive::create(MB),
             MB.getBufferIdentifier() + ": failed to parse archive");
 
   std::vector<std::pair<MemoryBufferRef, uint64_t>> V;
   Error Err = Error::success();
   for (const ErrorOr<Archive::Child> &COrErr : File->children(Err)) {
     Archive::Child C =
         check(COrErr, MB.getBufferIdentifier() +
                           ": could not get the child of the archive");
     MemoryBufferRef MBRef =
         check(C.getMemoryBufferRef(),
               MB.getBufferIdentifier() +
                   ": could not get the buffer for a child of the archive");
     V.push_back(std::make_pair(MBRef, C.getChildOffset()));
   }
   if (Err)
     fatal(MB.getBufferIdentifier() + ": Archive::children failed: " +
           toString(std::move(Err)));
 
   // Take ownership of memory buffers created for members of thin archives.
   for (std::unique_ptr<MemoryBuffer> &MB : File->takeThinBuffers())
     make<std::unique_ptr<MemoryBuffer>>(std::move(MB));
 
   return V;
 }
 
 // Opens a file and create a file object. Path has to be resolved already.
 void LinkerDriver::addFile(StringRef Path, bool WithLOption) {
   using namespace sys::fs;
 
   Optional<MemoryBufferRef> Buffer = readFile(Path);
   if (!Buffer.hasValue())
     return;
   MemoryBufferRef MBRef = *Buffer;
 
   if (InBinary) {
     Files.push_back(make<BinaryFile>(MBRef));
     return;
   }
 
   switch (identify_magic(MBRef.getBuffer())) {
   case file_magic::unknown:
     readLinkerScript(MBRef);
     return;
   case file_magic::archive: {
     // Handle -whole-archive.
     if (InWholeArchive) {
       for (const auto &P : getArchiveMembers(MBRef))
         Files.push_back(createObjectFile(P.first, Path, P.second));
       return;
     }
 
     std::unique_ptr<Archive> File =
         check(Archive::create(MBRef), Path + ": failed to parse archive");
 
     // If an archive file has no symbol table, it is likely that a user
     // is attempting LTO and using a default ar command that doesn't
     // understand the LLVM bitcode file. It is a pretty common error, so
     // we'll handle it as if it had a symbol table.
     if (!File->isEmpty() && !File->hasSymbolTable()) {
       for (const auto &P : getArchiveMembers(MBRef))
         Files.push_back(make<LazyObjectFile>(P.first, Path, P.second));
       return;
     }
 
     // Handle the regular case.
     Files.push_back(make<ArchiveFile>(std::move(File)));
     return;
   }
   case file_magic::elf_shared_object:
     if (Config->Relocatable) {
       error("attempted static link of dynamic object " + Path);
       return;
     }
     // DSOs usually have DT_SONAME tags in their ELF headers, and the
     // sonames are used to identify DSOs. But if they are missing,
     // they are identified by filenames. We don't know whether the new
     // file has a DT_SONAME or not because we haven't parsed it yet.
     // Here, we set the default soname for the file because we might
     // need it later.
     //
     // If a file was specified by -lfoo, the directory part is not
     // significant, as a user did not specify it. This behavior is
     // compatible with GNU.
     Files.push_back(createSharedFile(
         MBRef, WithLOption ? sys::path::filename(Path) : Path));
     return;
   default:
     if (InLib)
       Files.push_back(make<LazyObjectFile>(MBRef, "", 0));
     else
       Files.push_back(createObjectFile(MBRef));
   }
 }
 
 // Add a given library by searching it from input search paths.
 void LinkerDriver::addLibrary(StringRef Name) {
   if (Optional<std::string> Path = searchLibrary(Name))
     addFile(*Path, /*WithLOption=*/true);
   else
     error("unable to find library -l" + Name);
 }
 
 // This function is called on startup. We need this for LTO since
 // LTO calls LLVM functions to compile bitcode files to native code.
 // Technically this can be delayed until we read bitcode files, but
 // we don't bother to do lazily because the initialization is fast.
 static void initLLVM(opt::InputArgList &Args) {
   InitializeAllTargets();
   InitializeAllTargetMCs();
   InitializeAllAsmPrinters();
   InitializeAllAsmParsers();
 
   // Parse and evaluate -mllvm options.
   std::vector<const char *> V;
   V.push_back("lld (LLVM option parsing)");
   for (auto *Arg : Args.filtered(OPT_mllvm))
     V.push_back(Arg->getValue());
   cl::ParseCommandLineOptions(V.size(), V.data());
 }
 
 // Some command line options or some combinations of them are not allowed.
 // This function checks for such errors.
 static void checkOptions(opt::InputArgList &Args) {
   // The MIPS ABI as of 2016 does not support the GNU-style symbol lookup
   // table which is a relatively new feature.
   if (Config->EMachine == EM_MIPS && Config->GnuHash)
     error("the .gnu.hash section is not compatible with the MIPS target.");
 
   if (Config->Pie && Config->Shared)
     error("-shared and -pie may not be used together");
 
   if (!Config->Shared && !Config->AuxiliaryList.empty())
     error("-f may not be used without -shared");
 
   if (Config->Relocatable) {
     if (Config->Shared)
       error("-r and -shared may not be used together");
     if (Config->GcSections)
       error("-r and --gc-sections may not be used together");
     if (Config->ICF)
       error("-r and --icf may not be used together");
     if (Config->Pie)
       error("-r and -pie may not be used together");
   }
 }
 
-static StringRef getString(opt::InputArgList &Args, unsigned Key,
-                           StringRef Default = "") {
-  if (auto *Arg = Args.getLastArg(Key))
-    return Arg->getValue();
-  return Default;
-}
-
 static int getInteger(opt::InputArgList &Args, unsigned Key, int Default) {
   int V = Default;
   if (auto *Arg = Args.getLastArg(Key)) {
     StringRef S = Arg->getValue();
     if (!to_integer(S, V, 10))
       error(Arg->getSpelling() + ": number expected, but got " + S);
   }
   return V;
 }
 
 static const char *getReproduceOption(opt::InputArgList &Args) {
   if (auto *Arg = Args.getLastArg(OPT_reproduce))
     return Arg->getValue();
   return getenv("LLD_REPRODUCE");
 }
 
 static bool hasZOption(opt::InputArgList &Args, StringRef Key) {
   for (auto *Arg : Args.filtered(OPT_z))
     if (Key == Arg->getValue())
       return true;
   return false;
 }
 
 static uint64_t getZOptionValue(opt::InputArgList &Args, StringRef Key,
                                 uint64_t Default) {
   for (auto *Arg : Args.filtered(OPT_z)) {
-    StringRef Value = Arg->getValue();
-    size_t Pos = Value.find("=");
-    if (Pos != StringRef::npos && Key == Value.substr(0, Pos)) {
-      Value = Value.substr(Pos + 1);
+    std::pair<StringRef, StringRef> KV = StringRef(Arg->getValue()).split('=');
+    if (KV.first == Key) {
       uint64_t Result;
-      if (!to_integer(Value, Result))
-        error("invalid " + Key + ": " + Value);
+      if (!to_integer(KV.second, Result))
+        error("invalid " + Key + ": " + KV.second);
       return Result;
     }
   }
   return Default;
 }
 
 void LinkerDriver::main(ArrayRef<const char *> ArgsArr, bool CanExitEarly) {
   ELFOptTable Parser;
   opt::InputArgList Args = Parser.parse(ArgsArr.slice(1));
 
   // Interpret this flag early because error() depends on them.
   Config->ErrorLimit = getInteger(Args, OPT_error_limit, 20);
 
   // Handle -help
   if (Args.hasArg(OPT_help)) {
     printHelp(ArgsArr[0]);
     return;
   }
 
   // Handle -v or -version.
   //
   // A note about "compatible with GNU linkers" message: this is a hack for
   // scripts generated by GNU Libtool 2.4.6 (released in February 2014 and
   // still the newest version in March 2017) or earlier to recognize LLD as
   // a GNU compatible linker. As long as an output for the -v option
   // contains "GNU" or "with BFD", they recognize us as GNU-compatible.
   //
   // This is somewhat ugly hack, but in reality, we had no choice other
   // than doing this. Considering the very long release cycle of Libtool,
   // it is not easy to improve it to recognize LLD as a GNU compatible
   // linker in a timely manner. Even if we can make it, there are still a
   // lot of "configure" scripts out there that are generated by old version
   // of Libtool. We cannot convince every software developer to migrate to
   // the latest version and re-generate scripts. So we have this hack.
   if (Args.hasArg(OPT_v) || Args.hasArg(OPT_version))
     message(getLLDVersion() + " (compatible with GNU linkers)");
 
   // ld.bfd always exits after printing out the version string.
   // ld.gold proceeds if a given option is -v. Because gold's behavior
   // is more permissive than ld.bfd, we chose what gold does here.
   if (Args.hasArg(OPT_version))
     return;
 
   Config->ExitEarly = CanExitEarly && !Args.hasArg(OPT_full_shutdown);
 
   if (const char *Path = getReproduceOption(Args)) {
     // Note that --reproduce is a debug option so you can ignore it
     // if you are trying to understand the whole picture of the code.
     Expected<std::unique_ptr<TarWriter>> ErrOrWriter =
         TarWriter::create(Path, path::stem(Path));
     if (ErrOrWriter) {
       Tar = ErrOrWriter->get();
       Tar->append("response.txt", createResponseFile(Args));
       Tar->append("version.txt", getLLDVersion() + "\n");
       make<std::unique_ptr<TarWriter>>(std::move(*ErrOrWriter));
     } else {
       error(Twine("--reproduce: failed to open ") + Path + ": " +
             toString(ErrOrWriter.takeError()));
     }
   }
 
   readConfigs(Args);
   initLLVM(Args);
   createFiles(Args);
   inferMachineType();
   setConfigs();
   checkOptions(Args);
   if (ErrorCount)
     return;
 
   switch (Config->EKind) {
   case ELF32LEKind:
     link<ELF32LE>(Args);
     return;
   case ELF32BEKind:
     link<ELF32BE>(Args);
     return;
   case ELF64LEKind:
     link<ELF64LE>(Args);
     return;
   case ELF64BEKind:
     link<ELF64BE>(Args);
     return;
   default:
     llvm_unreachable("unknown Config->EKind");
   }
 }
 
 static bool getArg(opt::InputArgList &Args, unsigned K1, unsigned K2,
                    bool Default) {
   if (auto *Arg = Args.getLastArg(K1, K2))
     return Arg->getOption().getID() == K1;
   return Default;
 }
 
 static std::vector<StringRef> getArgs(opt::InputArgList &Args, int Id) {
   std::vector<StringRef> V;
   for (auto *Arg : Args.filtered(Id))
     V.push_back(Arg->getValue());
   return V;
 }
 
 static std::string getRpath(opt::InputArgList &Args) {
   std::vector<StringRef> V = getArgs(Args, OPT_rpath);
   return llvm::join(V.begin(), V.end(), ":");
 }
 
 // Determines what we should do if there are remaining unresolved
 // symbols after the name resolution.
 static UnresolvedPolicy getUnresolvedSymbolPolicy(opt::InputArgList &Args) {
   // -noinhibit-exec or -r imply some default values.
   if (Args.hasArg(OPT_noinhibit_exec))
     return UnresolvedPolicy::WarnAll;
   if (Args.hasArg(OPT_relocatable))
     return UnresolvedPolicy::IgnoreAll;
 
   UnresolvedPolicy ErrorOrWarn = getArg(Args, OPT_error_unresolved_symbols,
                                         OPT_warn_unresolved_symbols, true)
                                      ? UnresolvedPolicy::ReportError
                                      : UnresolvedPolicy::Warn;
 
   // Process the last of -unresolved-symbols, -no-undefined or -z defs.
   for (auto *Arg : llvm::reverse(Args)) {
     switch (Arg->getOption().getID()) {
     case OPT_unresolved_symbols: {
       StringRef S = Arg->getValue();
       if (S == "ignore-all" || S == "ignore-in-object-files")
         return UnresolvedPolicy::Ignore;
       if (S == "ignore-in-shared-libs" || S == "report-all")
         return ErrorOrWarn;
       error("unknown --unresolved-symbols value: " + S);
       continue;
     }
     case OPT_no_undefined:
       return ErrorOrWarn;
     case OPT_z:
       if (StringRef(Arg->getValue()) == "defs")
         return ErrorOrWarn;
       continue;
     }
   }
 
   // -shared implies -unresolved-symbols=ignore-all because missing
   // symbols are likely to be resolved at runtime using other DSOs.
   if (Config->Shared)
     return UnresolvedPolicy::Ignore;
   return ErrorOrWarn;
 }
 
 static Target2Policy getTarget2(opt::InputArgList &Args) {
-  StringRef S = getString(Args, OPT_target2, "got-rel");
+  StringRef S = Args.getLastArgValue(OPT_target2, "got-rel");
   if (S == "rel")
     return Target2Policy::Rel;
   if (S == "abs")
     return Target2Policy::Abs;
   if (S == "got-rel")
     return Target2Policy::GotRel;
   error("unknown --target2 option: " + S);
   return Target2Policy::GotRel;
 }
 
 static bool isOutputFormatBinary(opt::InputArgList &Args) {
   if (auto *Arg = Args.getLastArg(OPT_oformat)) {
     StringRef S = Arg->getValue();
     if (S == "binary")
       return true;
     error("unknown --oformat value: " + S);
   }
   return false;
 }
 
 static DiscardPolicy getDiscard(opt::InputArgList &Args) {
   if (Args.hasArg(OPT_relocatable))
     return DiscardPolicy::None;
 
   auto *Arg =
       Args.getLastArg(OPT_discard_all, OPT_discard_locals, OPT_discard_none);
   if (!Arg)
     return DiscardPolicy::Default;
   if (Arg->getOption().getID() == OPT_discard_all)
     return DiscardPolicy::All;
   if (Arg->getOption().getID() == OPT_discard_locals)
     return DiscardPolicy::Locals;
   return DiscardPolicy::None;
 }
 
 static StringRef getDynamicLinker(opt::InputArgList &Args) {
   auto *Arg = Args.getLastArg(OPT_dynamic_linker, OPT_no_dynamic_linker);
   if (!Arg || Arg->getOption().getID() == OPT_no_dynamic_linker)
     return "";
   return Arg->getValue();
 }
 
 static StripPolicy getStrip(opt::InputArgList &Args) {
   if (Args.hasArg(OPT_relocatable))
     return StripPolicy::None;
 
   auto *Arg = Args.getLastArg(OPT_strip_all, OPT_strip_debug);
   if (!Arg)
     return StripPolicy::None;
   if (Arg->getOption().getID() == OPT_strip_all)
     return StripPolicy::All;
   return StripPolicy::Debug;
 }
 
 static uint64_t parseSectionAddress(StringRef S, opt::Arg *Arg) {
   uint64_t VA = 0;
   if (S.startswith("0x"))
     S = S.drop_front(2);
   if (!to_integer(S, VA, 16))
     error("invalid argument: " + toString(Arg));
   return VA;
 }
 
 static StringMap<uint64_t> getSectionStartMap(opt::InputArgList &Args) {
   StringMap<uint64_t> Ret;
   for (auto *Arg : Args.filtered(OPT_section_start)) {
     StringRef Name;
     StringRef Addr;
     std::tie(Name, Addr) = StringRef(Arg->getValue()).split('=');
     Ret[Name] = parseSectionAddress(Addr, Arg);
   }
 
   if (auto *Arg = Args.getLastArg(OPT_Ttext))
     Ret[".text"] = parseSectionAddress(Arg->getValue(), Arg);
   if (auto *Arg = Args.getLastArg(OPT_Tdata))
     Ret[".data"] = parseSectionAddress(Arg->getValue(), Arg);
   if (auto *Arg = Args.getLastArg(OPT_Tbss))
     Ret[".bss"] = parseSectionAddress(Arg->getValue(), Arg);
   return Ret;
 }
 
 static SortSectionPolicy getSortSection(opt::InputArgList &Args) {
-  StringRef S = getString(Args, OPT_sort_section);
+  StringRef S = Args.getLastArgValue(OPT_sort_section);
   if (S == "alignment")
     return SortSectionPolicy::Alignment;
   if (S == "name")
     return SortSectionPolicy::Name;
   if (!S.empty())
     error("unknown --sort-section rule: " + S);
   return SortSectionPolicy::Default;
 }
 
 static std::pair<bool, bool> getHashStyle(opt::InputArgList &Args) {
-  StringRef S = getString(Args, OPT_hash_style, "sysv");
+  StringRef S = Args.getLastArgValue(OPT_hash_style, "sysv");
   if (S == "sysv")
     return {true, false};
   if (S == "gnu")
     return {false, true};
   if (S != "both")
     error("unknown -hash-style: " + S);
   return {true, true};
 }
 
 // Parse --build-id or --build-id=<style>. We handle "tree" as a
 // synonym for "sha1" because all our hash functions including
 // -build-id=sha1 are actually tree hashes for performance reasons.
 static std::pair<BuildIdKind, std::vector<uint8_t>>
 getBuildId(opt::InputArgList &Args) {
   auto *Arg = Args.getLastArg(OPT_build_id, OPT_build_id_eq);
   if (!Arg)
     return {BuildIdKind::None, {}};
 
   if (Arg->getOption().getID() == OPT_build_id)
     return {BuildIdKind::Fast, {}};
 
   StringRef S = Arg->getValue();
   if (S == "md5")
     return {BuildIdKind::Md5, {}};
   if (S == "sha1" || S == "tree")
     return {BuildIdKind::Sha1, {}};
   if (S == "uuid")
     return {BuildIdKind::Uuid, {}};
   if (S.startswith("0x"))
     return {BuildIdKind::Hexstring, parseHex(S.substr(2))};
 
   if (S != "none")
     error("unknown --build-id style: " + S);
   return {BuildIdKind::None, {}};
 }
 
 static std::vector<StringRef> getLines(MemoryBufferRef MB) {
   SmallVector<StringRef, 0> Arr;
   MB.getBuffer().split(Arr, '\n');
 
   std::vector<StringRef> Ret;
   for (StringRef S : Arr) {
     S = S.trim();
     if (!S.empty())
       Ret.push_back(S);
   }
   return Ret;
 }
 
 static bool getCompressDebugSections(opt::InputArgList &Args) {
-  StringRef S = getString(Args, OPT_compress_debug_sections, "none");
+  StringRef S = Args.getLastArgValue(OPT_compress_debug_sections, "none");
   if (S == "none")
     return false;
   if (S != "zlib")
     error("unknown --compress-debug-sections value: " + S);
   if (!zlib::isAvailable())
     error("--compress-debug-sections: zlib is not available");
   return true;
 }
 
 // Initializes Config members by the command line options.
 void LinkerDriver::readConfigs(opt::InputArgList &Args) {
   Config->AllowMultipleDefinition = Args.hasArg(OPT_allow_multiple_definition);
   Config->AuxiliaryList = getArgs(Args, OPT_auxiliary);
   Config->Bsymbolic = Args.hasArg(OPT_Bsymbolic);
   Config->BsymbolicFunctions = Args.hasArg(OPT_Bsymbolic_functions);
   Config->CompressDebugSections = getCompressDebugSections(Args);
   Config->DefineCommon = getArg(Args, OPT_define_common, OPT_no_define_common,
                                 !Args.hasArg(OPT_relocatable));
   Config->Demangle = getArg(Args, OPT_demangle, OPT_no_demangle, true);
   Config->DisableVerify = Args.hasArg(OPT_disable_verify);
   Config->Discard = getDiscard(Args);
   Config->DynamicLinker = getDynamicLinker(Args);
   Config->EhFrameHdr = Args.hasArg(OPT_eh_frame_hdr);
   Config->EmitRelocs = Args.hasArg(OPT_emit_relocs);
   Config->EnableNewDtags = !Args.hasArg(OPT_disable_new_dtags);
-  Config->Entry = getString(Args, OPT_entry);
+  Config->Entry = Args.getLastArgValue(OPT_entry);
   Config->ExportDynamic =
       getArg(Args, OPT_export_dynamic, OPT_no_export_dynamic, false);
   Config->FatalWarnings =
       getArg(Args, OPT_fatal_warnings, OPT_no_fatal_warnings, false);
-  Config->Fini = getString(Args, OPT_fini, "_fini");
+  Config->Fini = Args.getLastArgValue(OPT_fini, "_fini");
   Config->GcSections = getArg(Args, OPT_gc_sections, OPT_no_gc_sections, false);
   Config->GdbIndex = Args.hasArg(OPT_gdb_index);
   Config->ICF = Args.hasArg(OPT_icf);
-  Config->Init = getString(Args, OPT_init, "_init");
-  Config->LTOAAPipeline = getString(Args, OPT_lto_aa_pipeline);
-  Config->LTONewPmPasses = getString(Args, OPT_lto_newpm_passes);
+  Config->Init = Args.getLastArgValue(OPT_init, "_init");
+  Config->LTOAAPipeline = Args.getLastArgValue(OPT_lto_aa_pipeline);
+  Config->LTONewPmPasses = Args.getLastArgValue(OPT_lto_newpm_passes);
   Config->LTOO = getInteger(Args, OPT_lto_O, 2);
   Config->LTOPartitions = getInteger(Args, OPT_lto_partitions, 1);
-  Config->MapFile = getString(Args, OPT_Map);
+  Config->MapFile = Args.getLastArgValue(OPT_Map);
   Config->NoGnuUnique = Args.hasArg(OPT_no_gnu_unique);
   Config->NoUndefinedVersion = Args.hasArg(OPT_no_undefined_version);
   Config->Nostdlib = Args.hasArg(OPT_nostdlib);
   Config->OFormatBinary = isOutputFormatBinary(Args);
   Config->Omagic = Args.hasArg(OPT_omagic);
-  Config->OptRemarksFilename = getString(Args, OPT_opt_remarks_filename);
+  Config->OptRemarksFilename = Args.getLastArgValue(OPT_opt_remarks_filename);
   Config->OptRemarksWithHotness = Args.hasArg(OPT_opt_remarks_with_hotness);
   Config->Optimize = getInteger(Args, OPT_O, 1);
-  Config->OutputFile = getString(Args, OPT_o);
+  Config->OutputFile = Args.getLastArgValue(OPT_o);
   Config->Pie = getArg(Args, OPT_pie, OPT_nopie, false);
   Config->PrintGcSections = Args.hasArg(OPT_print_gc_sections);
   Config->Rpath = getRpath(Args);
   Config->Relocatable = Args.hasArg(OPT_relocatable);
   Config->SaveTemps = Args.hasArg(OPT_save_temps);
   Config->SearchPaths = getArgs(Args, OPT_L);
   Config->SectionStartMap = getSectionStartMap(Args);
   Config->Shared = Args.hasArg(OPT_shared);
   Config->SingleRoRx = Args.hasArg(OPT_no_rosegment);
-  Config->SoName = getString(Args, OPT_soname);
+  Config->SoName = Args.getLastArgValue(OPT_soname);
   Config->SortSection = getSortSection(Args);
   Config->Strip = getStrip(Args);
-  Config->Sysroot = getString(Args, OPT_sysroot);
+  Config->Sysroot = Args.getLastArgValue(OPT_sysroot);
   Config->Target1Rel = getArg(Args, OPT_target1_rel, OPT_target1_abs, false);
   Config->Target2 = getTarget2(Args);
-  Config->ThinLTOCacheDir = getString(Args, OPT_thinlto_cache_dir);
-  Config->ThinLTOCachePolicy =
-      check(parseCachePruningPolicy(getString(Args, OPT_thinlto_cache_policy)),
-            "--thinlto-cache-policy: invalid cache policy");
+  Config->ThinLTOCacheDir = Args.getLastArgValue(OPT_thinlto_cache_dir);
+  Config->ThinLTOCachePolicy = check(
+      parseCachePruningPolicy(Args.getLastArgValue(OPT_thinlto_cache_policy)),
+      "--thinlto-cache-policy: invalid cache policy");
   Config->ThinLTOJobs = getInteger(Args, OPT_thinlto_jobs, -1u);
   Config->Threads = getArg(Args, OPT_threads, OPT_no_threads, true);
   Config->Trace = Args.hasArg(OPT_trace);
   Config->Undefined = getArgs(Args, OPT_undefined);
   Config->UnresolvedSymbols = getUnresolvedSymbolPolicy(Args);
   Config->Verbose = Args.hasArg(OPT_verbose);
   Config->WarnCommon = Args.hasArg(OPT_warn_common);
   Config->ZCombreloc = !hasZOption(Args, "nocombreloc");
   Config->ZExecstack = hasZOption(Args, "execstack");
   Config->ZNocopyreloc = hasZOption(Args, "nocopyreloc");
   Config->ZNodelete = hasZOption(Args, "nodelete");
   Config->ZNodlopen = hasZOption(Args, "nodlopen");
   Config->ZNow = hasZOption(Args, "now");
   Config->ZOrigin = hasZOption(Args, "origin");
   Config->ZRelro = !hasZOption(Args, "norelro");
   Config->ZRodynamic = hasZOption(Args, "rodynamic");
   Config->ZStackSize = getZOptionValue(Args, "stack-size", 0);
   Config->ZText = !hasZOption(Args, "notext");
   Config->ZWxneeded = hasZOption(Args, "wxneeded");
 
   if (Config->LTOO > 3)
-    error("invalid optimization level for LTO: " + getString(Args, OPT_lto_O));
+    error("invalid optimization level for LTO: " +
+          Args.getLastArgValue(OPT_lto_O));
   if (Config->LTOPartitions == 0)
     error("--lto-partitions: number of threads must be > 0");
   if (Config->ThinLTOJobs == 0)
     error("--thinlto-jobs: number of threads must be > 0");
 
   if (auto *Arg = Args.getLastArg(OPT_m)) {
     // Parse ELF{32,64}{LE,BE} and CPU type.
     StringRef S = Arg->getValue();
     std::tie(Config->EKind, Config->EMachine, Config->OSABI) =
         parseEmulation(S);
     Config->MipsN32Abi = (S == "elf32btsmipn32" || S == "elf32ltsmipn32");
     Config->Emulation = S;
   }
 
   if (Args.hasArg(OPT_print_map))
     Config->MapFile = "-";
 
   // --omagic is an option to create old-fashioned executables in which
   // .text segments are writable. Today, the option is still in use to
   // create special-purpose programs such as boot loaders. It doesn't
   // make sense to create PT_GNU_RELRO for such executables.
   if (Config->Omagic)
     Config->ZRelro = false;
 
   std::tie(Config->SysvHash, Config->GnuHash) = getHashStyle(Args);
   std::tie(Config->BuildId, Config->BuildIdVector) = getBuildId(Args);
 
   if (auto *Arg = Args.getLastArg(OPT_symbol_ordering_file))
     if (Optional<MemoryBufferRef> Buffer = readFile(Arg->getValue()))
       Config->SymbolOrderingFile = getLines(*Buffer);
 
   // If --retain-symbol-file is used, we'll keep only the symbols listed in
   // the file and discard all others.
   if (auto *Arg = Args.getLastArg(OPT_retain_symbols_file)) {
     Config->DefaultSymbolVersion = VER_NDX_LOCAL;
     if (Optional<MemoryBufferRef> Buffer = readFile(Arg->getValue()))
       for (StringRef S : getLines(*Buffer))
         Config->VersionScriptGlobals.push_back(
             {S, /*IsExternCpp*/ false, /*HasWildcard*/ false});
   }
 
   bool HasExportDynamic =
       getArg(Args, OPT_export_dynamic, OPT_no_export_dynamic, false);
 
   // Parses -dynamic-list and -export-dynamic-symbol. They make some
   // symbols private. Note that -export-dynamic takes precedence over them
   // as it says all symbols should be exported.
   if (!HasExportDynamic) {
     for (auto *Arg : Args.filtered(OPT_dynamic_list))
       if (Optional<MemoryBufferRef> Buffer = readFile(Arg->getValue()))
         readDynamicList(*Buffer);
 
     for (auto *Arg : Args.filtered(OPT_export_dynamic_symbol))
       Config->VersionScriptGlobals.push_back(
           {Arg->getValue(), /*IsExternCpp*/ false, /*HasWildcard*/ false});
 
     // Dynamic lists are a simplified linker script that doesn't need the
     // "global:" and implicitly ends with a "local:*". Set the variables
     // needed to simulate that.
     if (Args.hasArg(OPT_dynamic_list) ||
         Args.hasArg(OPT_export_dynamic_symbol)) {
       Config->ExportDynamic = true;
       if (!Config->Shared)
         Config->DefaultSymbolVersion = VER_NDX_LOCAL;
     }
   }
 
   if (auto *Arg = Args.getLastArg(OPT_version_script))
     if (Optional<MemoryBufferRef> Buffer = readFile(Arg->getValue()))
       readVersionScript(*Buffer);
 }
 
 // Some Config members do not directly correspond to any particular
 // command line options, but computed based on other Config values.
 // This function initialize such members. See Config.h for the details
 // of these values.
 static void setConfigs() {
   ELFKind Kind = Config->EKind;
   uint16_t Machine = Config->EMachine;
 
   // There is an ILP32 ABI for x86-64, although it's not very popular.
   // It is called the x32 ABI.
   bool IsX32 = (Kind == ELF32LEKind && Machine == EM_X86_64);
 
   Config->CopyRelocs = (Config->Relocatable || Config->EmitRelocs);
   Config->Is64 = (Kind == ELF64LEKind || Kind == ELF64BEKind);
   Config->IsLE = (Kind == ELF32LEKind || Kind == ELF64LEKind);
   Config->Endianness =
       Config->IsLE ? support::endianness::little : support::endianness::big;
   Config->IsMips64EL = (Kind == ELF64LEKind && Machine == EM_MIPS);
   Config->IsRela = Config->Is64 || IsX32 || Config->MipsN32Abi;
   Config->Pic = Config->Pie || Config->Shared;
   Config->Wordsize = Config->Is64 ? 8 : 4;
 }
 
 // Returns a value of "-format" option.
 static bool getBinaryOption(StringRef S) {
   if (S == "binary")
     return true;
   if (S == "elf" || S == "default")
     return false;
   error("unknown -format value: " + S +
         " (supported formats: elf, default, binary)");
   return false;
 }
 
 void LinkerDriver::createFiles(opt::InputArgList &Args) {
   for (auto *Arg : Args) {
     switch (Arg->getOption().getID()) {
     case OPT_l:
       addLibrary(Arg->getValue());
       break;
     case OPT_INPUT:
       addFile(Arg->getValue(), /*WithLOption=*/false);
       break;
     case OPT_alias_script_T:
     case OPT_script:
       if (Optional<MemoryBufferRef> MB = readFile(Arg->getValue()))
         readLinkerScript(*MB);
       break;
     case OPT_as_needed:
       Config->AsNeeded = true;
       break;
     case OPT_format:
       InBinary = getBinaryOption(Arg->getValue());
       break;
     case OPT_no_as_needed:
       Config->AsNeeded = false;
       break;
     case OPT_Bstatic:
       Config->Static = true;
       break;
     case OPT_Bdynamic:
       Config->Static = false;
       break;
     case OPT_whole_archive:
       InWholeArchive = true;
       break;
     case OPT_no_whole_archive:
       InWholeArchive = false;
       break;
     case OPT_start_lib:
       InLib = true;
       break;
     case OPT_end_lib:
       InLib = false;
       break;
     }
   }
 
   if (Files.empty() && ErrorCount == 0)
     error("no input files");
 }
 
 // If -m <machine_type> was not given, infer it from object files.
 void LinkerDriver::inferMachineType() {
   if (Config->EKind != ELFNoneKind)
     return;
 
   for (InputFile *F : Files) {
     if (F->EKind == ELFNoneKind)
       continue;
     Config->EKind = F->EKind;
     Config->EMachine = F->EMachine;
     Config->OSABI = F->OSABI;
     Config->MipsN32Abi = Config->EMachine == EM_MIPS && isMipsN32Abi(F);
     return;
   }
   error("target emulation unknown: -m or at least one .o file required");
 }
 
 // Parse -z max-page-size=<value>. The default value is defined by
 // each target.
 static uint64_t getMaxPageSize(opt::InputArgList &Args) {
   uint64_t Val =
       getZOptionValue(Args, "max-page-size", Target->DefaultMaxPageSize);
   if (!isPowerOf2_64(Val))
     error("max-page-size: value isn't a power of 2");
   return Val;
 }
 
 // Parses -image-base option.
 static uint64_t getImageBase(opt::InputArgList &Args) {
   // Use default if no -image-base option is given.
   // Because we are using "Target" here, this function
   // has to be called after the variable is initialized.
   auto *Arg = Args.getLastArg(OPT_image_base);
   if (!Arg)
     return Config->Pic ? 0 : Target->DefaultImageBase;
 
   StringRef S = Arg->getValue();
   uint64_t V;
   if (!to_integer(S, V)) {
     error("-image-base: number expected, but got " + S);
     return 0;
   }
   if ((V % Config->MaxPageSize) != 0)
     warn("-image-base: address isn't multiple of page size: " + S);
   return V;
 }
 
 // Parses --defsym=alias option.
 static std::vector<std::pair<StringRef, StringRef>>
 getDefsym(opt::InputArgList &Args) {
   std::vector<std::pair<StringRef, StringRef>> Ret;
   for (auto *Arg : Args.filtered(OPT_defsym)) {
     StringRef From;
     StringRef To;
     std::tie(From, To) = StringRef(Arg->getValue()).split('=');
     if (!isValidCIdentifier(To))
       error("--defsym: symbol name expected, but got " + To);
     Ret.push_back({From, To});
   }
   return Ret;
 }
 
 // Do actual linking. Note that when this function is called,
 // all linker scripts have already been parsed.
 template <class ELFT> void LinkerDriver::link(opt::InputArgList &Args) {
   SymbolTable<ELFT> Symtab;
   elf::Symtab<ELFT>::X = &Symtab;
   Target = createTarget();
 
   Config->MaxPageSize = getMaxPageSize(Args);
   Config->ImageBase = getImageBase(Args);
 
   // Default output filename is "a.out" by the Unix tradition.
   if (Config->OutputFile.empty())
     Config->OutputFile = "a.out";
 
   // Fail early if the output file or map file is not writable. If a user has a
   // long link, e.g. due to a large LTO link, they do not wish to run it and
   // find that it failed because there was a mistake in their command-line.
   if (auto E = tryCreateFile(Config->OutputFile))
     error("cannot open output file " + Config->OutputFile + ": " + E.message());
   if (auto E = tryCreateFile(Config->MapFile))
     error("cannot open map file " + Config->MapFile + ": " + E.message());
   if (ErrorCount)
     return;
 
   // Use default entry point name if no name was given via the command
   // line nor linker scripts. For some reason, MIPS entry point name is
   // different from others.
   Config->WarnMissingEntry =
       (!Config->Entry.empty() || (!Config->Shared && !Config->Relocatable));
   if (Config->Entry.empty() && !Config->Relocatable)
     Config->Entry = (Config->EMachine == EM_MIPS) ? "__start" : "_start";
 
   // Handle --trace-symbol.
   for (auto *Arg : Args.filtered(OPT_trace_symbol))
     Symtab.trace(Arg->getValue());
 
   // Add all files to the symbol table. This will add almost all
   // symbols that we need to the symbol table.
   for (InputFile *F : Files)
     Symtab.addFile(F);
 
   // If an entry symbol is in a static archive, pull out that file now
   // to complete the symbol table. After this, no new names except a
   // few linker-synthesized ones will be added to the symbol table.
   if (Symtab.find(Config->Entry))
     Symtab.addUndefined(Config->Entry);
 
   // Return if there were name resolution errors.
   if (ErrorCount)
     return;
 
   Symtab.scanUndefinedFlags();
   Symtab.scanShlibUndefined();
   Symtab.scanVersionScript();
 
   // Create wrapped symbols for -wrap option.
   for (auto *Arg : Args.filtered(OPT_wrap))
     Symtab.addSymbolWrap(Arg->getValue());
 
   // Create alias symbols for -defsym option.
   for (std::pair<StringRef, StringRef> &Def : getDefsym(Args))
     Symtab.addSymbolAlias(Def.first, Def.second);
 
   Symtab.addCombinedLTOObject();
   if (ErrorCount)
     return;
 
   // Some symbols (such as __ehdr_start) are defined lazily only when there
   // are undefined symbols for them, so we add these to trigger that logic.
   for (StringRef Sym : Script->Opt.ReferencedSymbols)
     Symtab.addUndefined(Sym);
 
   // Apply symbol renames for -wrap and -defsym
   Symtab.applySymbolRenames();
 
   // Now that we have a complete list of input files.
   // Beyond this point, no new files are added.
   // Aggregate all input sections into one place.
   for (elf::ObjectFile<ELFT> *F : Symtab.getObjectFiles())
     for (InputSectionBase *S : F->getSections())
       if (S && S != &InputSection::Discarded)
         InputSections.push_back(S);
   for (BinaryFile *F : Symtab.getBinaryFiles())
     for (InputSectionBase *S : F->getSections())
       InputSections.push_back(cast<InputSection>(S));
 
-  // Do size optimizations: garbage collection and identical code folding.
+  // This adds a .comment section containing a version string. We have to add it
+  // before decompressAndMergeSections because the .comment section is a
+  // mergeable section.
+  if (!Config->Relocatable)
+    InputSections.push_back(createCommentSection<ELFT>());
+
+  // Do size optimizations: garbage collection, merging of SHF_MERGE sections
+  // and identical code folding.
   if (Config->GcSections)
     markLive<ELFT>();
+  decompressAndMergeSections();
   if (Config->ICF)
     doIcf<ELFT>();
-
-  // MergeInputSection::splitIntoPieces needs to be called before
-  // any call of MergeInputSection::getOffset. Do that.
-  parallelForEach(InputSections.begin(), InputSections.end(),
-                  [](InputSectionBase *S) {
-                    if (!S->Live)
-                      return;
-                    if (Decompressor::isCompressedELFSection(S->Flags, S->Name))
-                      S->uncompress();
-                    if (auto *MS = dyn_cast<MergeInputSection>(S))
-                      MS->splitIntoPieces();
-                  });
 
   // Write the result to the file.
   writeResult<ELFT>();
 }
Index: vendor/lld/dist/ELF/ICF.cpp
===================================================================
--- vendor/lld/dist/ELF/ICF.cpp	(revision 320020)
+++ vendor/lld/dist/ELF/ICF.cpp	(revision 320021)
@@ -1,395 +1,435 @@
 //===- ICF.cpp ------------------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // ICF is short for Identical Code Folding. This is a size optimization to
 // identify and merge two or more read-only sections (typically functions)
 // that happened to have the same contents. It usually reduces output size
 // by a few percent.
 //
 // In ICF, two sections are considered identical if they have the same
 // section flags, section data, and relocations. Relocations are tricky,
 // because two relocations are considered the same if they have the same
 // relocation types, values, and if they point to the same sections *in
 // terms of ICF*.
 //
 // Here is an example. If foo and bar defined below are compiled to the
 // same machine instructions, ICF can and should merge the two, although
 // their relocations point to each other.
 //
 //   void foo() { bar(); }
 //   void bar() { foo(); }
 //
 // If you merge the two, their relocations point to the same section and
 // thus you know they are mergeable, but how do you know they are
 // mergeable in the first place? This is not an easy problem to solve.
 //
 // What we are doing in LLD is to partition sections into equivalence
 // classes. Sections in the same equivalence class when the algorithm
 // terminates are considered identical. Here are details:
 //
 // 1. First, we partition sections using their hash values as keys. Hash
 //    values contain section types, section contents and numbers of
 //    relocations. During this step, relocation targets are not taken into
 //    account. We just put sections that apparently differ into different
 //    equivalence classes.
 //
 // 2. Next, for each equivalence class, we visit sections to compare
 //    relocation targets. Relocation targets are considered equivalent if
 //    their targets are in the same equivalence class. Sections with
 //    different relocation targets are put into different equivalence
 //    clases.
 //
 // 3. If we split an equivalence class in step 2, two relocations
 //    previously target the same equivalence class may now target
 //    different equivalence classes. Therefore, we repeat step 2 until a
 //    convergence is obtained.
 //
 // 4. For each equivalence class C, pick an arbitrary section in C, and
 //    merge all the other sections in C with it.
 //
 // For small programs, this algorithm needs 3-5 iterations. For large
 // programs such as Chromium, it takes more than 20 iterations.
 //
 // This algorithm was mentioned as an "optimistic algorithm" in [1],
 // though gold implements a different algorithm than this.
 //
 // We parallelize each step so that multiple threads can work on different
 // equivalence classes concurrently. That gave us a large performance
 // boost when applying ICF on large programs. For example, MSVC link.exe
 // or GNU gold takes 10-20 seconds to apply ICF on Chromium, whose output
 // size is about 1.5 GB, but LLD can finish it in less than 2 seconds on a
 // 2.8 GHz 40 core machine. Even without threading, LLD's ICF is still
 // faster than MSVC or gold though.
 //
 // [1] Safe ICF: Pointer Safe and Unwinding aware Identical Code Folding
 // in the Gold Linker
 // http://static.googleusercontent.com/media/research.google.com/en//pubs/archive/36912.pdf
 //
 //===----------------------------------------------------------------------===//
 
 #include "ICF.h"
 #include "Config.h"
 #include "SymbolTable.h"
 #include "Threads.h"
 #include "llvm/ADT/Hashing.h"
 #include "llvm/BinaryFormat/ELF.h"
 #include "llvm/Object/ELF.h"
 #include <algorithm>
 #include <atomic>
 
 using namespace lld;
 using namespace lld::elf;
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
 
 namespace {
 template <class ELFT> class ICF {
 public:
   void run();
 
 private:
   void segregate(size_t Begin, size_t End, bool Constant);
 
   template <class RelTy>
-  bool constantEq(ArrayRef<RelTy> RelsA, ArrayRef<RelTy> RelsB);
+  bool constantEq(const InputSection *A, ArrayRef<RelTy> RelsA,
+                  const InputSection *B, ArrayRef<RelTy> RelsB);
 
   template <class RelTy>
   bool variableEq(const InputSection *A, ArrayRef<RelTy> RelsA,
                   const InputSection *B, ArrayRef<RelTy> RelsB);
 
   bool equalsConstant(const InputSection *A, const InputSection *B);
   bool equalsVariable(const InputSection *A, const InputSection *B);
 
   size_t findBoundary(size_t Begin, size_t End);
 
   void forEachClassRange(size_t Begin, size_t End,
                          std::function<void(size_t, size_t)> Fn);
 
   void forEachClass(std::function<void(size_t, size_t)> Fn);
 
   std::vector<InputSection *> Sections;
 
   // We repeat the main loop while `Repeat` is true.
   std::atomic<bool> Repeat;
 
   // The main loop counter.
   int Cnt = 0;
 
   // We have two locations for equivalence classes. On the first iteration
   // of the main loop, Class[0] has a valid value, and Class[1] contains
   // garbage. We read equivalence classes from slot 0 and write to slot 1.
   // So, Class[0] represents the current class, and Class[1] represents
   // the next class. On each iteration, we switch their roles and use them
   // alternately.
   //
   // Why are we doing this? Recall that other threads may be working on
   // other equivalence classes in parallel. They may read sections that we
   // are updating. We cannot update equivalence classes in place because
   // it breaks the invariance that all possibly-identical sections must be
   // in the same equivalence class at any moment. In other words, the for
   // loop to update equivalence classes is not atomic, and that is
   // observable from other threads. By writing new classes to other
   // places, we can keep the invariance.
   //
   // Below, `Current` has the index of the current class, and `Next` has
   // the index of the next class. If threading is enabled, they are either
   // (0, 1) or (1, 0).
   //
   // Note on single-thread: if that's the case, they are always (0, 0)
   // because we can safely read the next class without worrying about race
   // conditions. Using the same location makes this algorithm converge
   // faster because it uses results of the same iteration earlier.
   int Current = 0;
   int Next = 0;
 };
 }
 
 // Returns a hash value for S. Note that the information about
 // relocation targets is not included in the hash value.
 template <class ELFT> static uint32_t getHash(InputSection *S) {
   return hash_combine(S->Flags, S->getSize(), S->NumRelocations);
 }
 
 // Returns true if section S is subject of ICF.
 static bool isEligible(InputSection *S) {
   // .init and .fini contains instructions that must be executed to
   // initialize and finalize the process. They cannot and should not
   // be merged.
   return S->Live && (S->Flags & SHF_ALLOC) && (S->Flags & SHF_EXECINSTR) &&
          !(S->Flags & SHF_WRITE) && S->Name != ".init" && S->Name != ".fini";
 }
 
 // Split an equivalence class into smaller classes.
 template <class ELFT>
 void ICF<ELFT>::segregate(size_t Begin, size_t End, bool Constant) {
   // This loop rearranges sections in [Begin, End) so that all sections
   // that are equal in terms of equals{Constant,Variable} are contiguous
   // in [Begin, End).
   //
   // The algorithm is quadratic in the worst case, but that is not an
   // issue in practice because the number of the distinct sections in
   // each range is usually very small.
 
   while (Begin < End) {
     // Divide [Begin, End) into two. Let Mid be the start index of the
     // second group.
     auto Bound =
         std::stable_partition(Sections.begin() + Begin + 1,
                               Sections.begin() + End, [&](InputSection *S) {
                                 if (Constant)
                                   return equalsConstant(Sections[Begin], S);
                                 return equalsVariable(Sections[Begin], S);
                               });
     size_t Mid = Bound - Sections.begin();
 
     // Now we split [Begin, End) into [Begin, Mid) and [Mid, End) by
     // updating the sections in [Begin, Mid). We use Mid as an equivalence
     // class ID because every group ends with a unique index.
     for (size_t I = Begin; I < Mid; ++I)
       Sections[I]->Class[Next] = Mid;
 
     // If we created a group, we need to iterate the main loop again.
     if (Mid != End)
       Repeat = true;
 
     Begin = Mid;
   }
 }
 
 // Compare two lists of relocations.
 template <class ELFT>
 template <class RelTy>
-bool ICF<ELFT>::constantEq(ArrayRef<RelTy> RelsA, ArrayRef<RelTy> RelsB) {
-  auto Eq = [](const RelTy &A, const RelTy &B) {
-    return A.r_offset == B.r_offset &&
-           A.getType(Config->IsMips64EL) == B.getType(Config->IsMips64EL) &&
-           getAddend<ELFT>(A) == getAddend<ELFT>(B);
+bool ICF<ELFT>::constantEq(const InputSection *A, ArrayRef<RelTy> RelsA,
+                           const InputSection *B, ArrayRef<RelTy> RelsB) {
+  auto Eq = [&](const RelTy &RA, const RelTy &RB) {
+    if (RA.r_offset != RB.r_offset ||
+        RA.getType(Config->IsMips64EL) != RB.getType(Config->IsMips64EL))
+      return false;
+    uint64_t AddA = getAddend<ELFT>(RA);
+    uint64_t AddB = getAddend<ELFT>(RB);
+
+    SymbolBody &SA = A->template getFile<ELFT>()->getRelocTargetSym(RA);
+    SymbolBody &SB = B->template getFile<ELFT>()->getRelocTargetSym(RB);
+    if (&SA == &SB)
+      return AddA == AddB;
+
+    auto *DA = dyn_cast<DefinedRegular>(&SA);
+    auto *DB = dyn_cast<DefinedRegular>(&SB);
+    if (!DA || !DB)
+      return false;
+
+    // Relocations referring to absolute symbols are constant-equal if their
+    // values are equal.
+    if (!DA->Section || !DB->Section)
+      return !DA->Section && !DB->Section &&
+             DA->Value + AddA == DB->Value + AddB;
+
+    if (DA->Section->kind() != DB->Section->kind())
+      return false;
+
+    // Relocations referring to InputSections are constant-equal if their
+    // section offsets are equal.
+    if (isa<InputSection>(DA->Section))
+      return DA->Value + AddA == DB->Value + AddB;
+
+    // Relocations referring to MergeInputSections are constant-equal if their
+    // offsets in the output section are equal.
+    auto *X = dyn_cast<MergeInputSection>(DA->Section);
+    if (!X)
+      return false;
+    auto *Y = cast<MergeInputSection>(DB->Section);
+    if (X->getParent() != Y->getParent())
+      return false;
+
+    uint64_t OffsetA =
+        SA.isSection() ? X->getOffset(AddA) : X->getOffset(DA->Value) + AddA;
+    uint64_t OffsetB =
+        SB.isSection() ? Y->getOffset(AddB) : Y->getOffset(DB->Value) + AddB;
+    return OffsetA == OffsetB;
   };
 
   return RelsA.size() == RelsB.size() &&
          std::equal(RelsA.begin(), RelsA.end(), RelsB.begin(), Eq);
 }
 
 // Compare "non-moving" part of two InputSections, namely everything
 // except relocation targets.
 template <class ELFT>
 bool ICF<ELFT>::equalsConstant(const InputSection *A, const InputSection *B) {
   if (A->NumRelocations != B->NumRelocations || A->Flags != B->Flags ||
       A->getSize() != B->getSize() || A->Data != B->Data)
     return false;
 
   if (A->AreRelocsRela)
-    return constantEq(A->template relas<ELFT>(), B->template relas<ELFT>());
-  return constantEq(A->template rels<ELFT>(), B->template rels<ELFT>());
+    return constantEq(A, A->template relas<ELFT>(), B,
+                      B->template relas<ELFT>());
+  return constantEq(A, A->template rels<ELFT>(), B, B->template rels<ELFT>());
 }
 
 // Compare two lists of relocations. Returns true if all pairs of
 // relocations point to the same section in terms of ICF.
 template <class ELFT>
 template <class RelTy>
 bool ICF<ELFT>::variableEq(const InputSection *A, ArrayRef<RelTy> RelsA,
                            const InputSection *B, ArrayRef<RelTy> RelsB) {
   auto Eq = [&](const RelTy &RA, const RelTy &RB) {
     // The two sections must be identical.
     SymbolBody &SA = A->template getFile<ELFT>()->getRelocTargetSym(RA);
     SymbolBody &SB = B->template getFile<ELFT>()->getRelocTargetSym(RB);
     if (&SA == &SB)
       return true;
 
-    auto *DA = dyn_cast<DefinedRegular>(&SA);
-    auto *DB = dyn_cast<DefinedRegular>(&SB);
-    if (!DA || !DB)
-      return false;
-    if (DA->Value != DB->Value)
-      return false;
+    auto *DA = cast<DefinedRegular>(&SA);
+    auto *DB = cast<DefinedRegular>(&SB);
 
-    // Either both symbols must be absolute...
-    if (!DA->Section || !DB->Section)
-      return !DA->Section && !DB->Section;
-
-    // Or the two sections must be in the same equivalence class.
+    // We already dealt with absolute and non-InputSection symbols in
+    // constantEq, and for InputSections we have already checked everything
+    // except the equivalence class.
+    if (!DA->Section)
+      return true;
     auto *X = dyn_cast<InputSection>(DA->Section);
-    auto *Y = dyn_cast<InputSection>(DB->Section);
-    if (!X || !Y)
-      return false;
+    if (!X)
+      return true;
+    auto *Y = cast<InputSection>(DB->Section);
 
     // Ineligible sections are in the special equivalence class 0.
     // They can never be the same in terms of the equivalence class.
     if (X->Class[Current] == 0)
       return false;
 
     return X->Class[Current] == Y->Class[Current];
   };
 
   return std::equal(RelsA.begin(), RelsA.end(), RelsB.begin(), Eq);
 }
 
 // Compare "moving" part of two InputSections, namely relocation targets.
 template <class ELFT>
 bool ICF<ELFT>::equalsVariable(const InputSection *A, const InputSection *B) {
   if (A->AreRelocsRela)
     return variableEq(A, A->template relas<ELFT>(), B,
                       B->template relas<ELFT>());
   return variableEq(A, A->template rels<ELFT>(), B, B->template rels<ELFT>());
 }
 
 template <class ELFT> size_t ICF<ELFT>::findBoundary(size_t Begin, size_t End) {
   uint32_t Class = Sections[Begin]->Class[Current];
   for (size_t I = Begin + 1; I < End; ++I)
     if (Class != Sections[I]->Class[Current])
       return I;
   return End;
 }
 
 // Sections in the same equivalence class are contiguous in Sections
 // vector. Therefore, Sections vector can be considered as contiguous
 // groups of sections, grouped by the class.
 //
 // This function calls Fn on every group that starts within [Begin, End).
 // Note that a group must start in that range but doesn't necessarily
 // have to end before End.
 template <class ELFT>
 void ICF<ELFT>::forEachClassRange(size_t Begin, size_t End,
                                   std::function<void(size_t, size_t)> Fn) {
   if (Begin > 0)
     Begin = findBoundary(Begin - 1, End);
 
   while (Begin < End) {
     size_t Mid = findBoundary(Begin, Sections.size());
     Fn(Begin, Mid);
     Begin = Mid;
   }
 }
 
 // Call Fn on each equivalence class.
 template <class ELFT>
 void ICF<ELFT>::forEachClass(std::function<void(size_t, size_t)> Fn) {
   // If threading is disabled or the number of sections are
   // too small to use threading, call Fn sequentially.
   if (!Config->Threads || Sections.size() < 1024) {
     forEachClassRange(0, Sections.size(), Fn);
     ++Cnt;
     return;
   }
 
   Current = Cnt % 2;
   Next = (Cnt + 1) % 2;
 
   // Split sections into 256 shards and call Fn in parallel.
   size_t NumShards = 256;
   size_t Step = Sections.size() / NumShards;
   parallelForEachN(0, NumShards, [&](size_t I) {
     size_t End = (I == NumShards - 1) ? Sections.size() : (I + 1) * Step;
     forEachClassRange(I * Step, End, Fn);
   });
   ++Cnt;
 }
 
 // The main function of ICF.
 template <class ELFT> void ICF<ELFT>::run() {
   // Collect sections to merge.
   for (InputSectionBase *Sec : InputSections)
     if (auto *S = dyn_cast<InputSection>(Sec))
       if (isEligible(S))
         Sections.push_back(S);
 
   // Initially, we use hash values to partition sections.
   for (InputSection *S : Sections)
     // Set MSB to 1 to avoid collisions with non-hash IDs.
     S->Class[0] = getHash<ELFT>(S) | (1 << 31);
 
   // From now on, sections in Sections vector are ordered so that sections
   // in the same equivalence class are consecutive in the vector.
   std::stable_sort(Sections.begin(), Sections.end(),
                    [](InputSection *A, InputSection *B) {
                      return A->Class[0] < B->Class[0];
                    });
 
   // Compare static contents and assign unique IDs for each static content.
   forEachClass([&](size_t Begin, size_t End) { segregate(Begin, End, true); });
 
   // Split groups by comparing relocations until convergence is obtained.
   do {
     Repeat = false;
     forEachClass(
         [&](size_t Begin, size_t End) { segregate(Begin, End, false); });
   } while (Repeat);
 
   log("ICF needed " + Twine(Cnt) + " iterations");
 
   // Merge sections by the equivalence class.
   forEachClass([&](size_t Begin, size_t End) {
     if (End - Begin == 1)
       return;
 
     log("selected " + Sections[Begin]->Name);
     for (size_t I = Begin + 1; I < End; ++I) {
       log("  removed " + Sections[I]->Name);
       Sections[Begin]->replace(Sections[I]);
     }
   });
 
   // Mark ARM Exception Index table sections that refer to folded code
   // sections as not live. These sections have an implict dependency
   // via the link order dependency.
   if (Config->EMachine == EM_ARM)
     for (InputSectionBase *Sec : InputSections)
       if (auto *S = dyn_cast<InputSection>(Sec))
         if (S->Flags & SHF_LINK_ORDER)
           S->Live = S->getLinkOrderDep()->Live;
 }
 
 // ICF entry point function.
 template <class ELFT> void elf::doIcf() { ICF<ELFT>().run(); }
 
 template void elf::doIcf<ELF32LE>();
 template void elf::doIcf<ELF32BE>();
 template void elf::doIcf<ELF64LE>();
 template void elf::doIcf<ELF64BE>();
Index: vendor/lld/dist/ELF/InputFiles.cpp
===================================================================
--- vendor/lld/dist/ELF/InputFiles.cpp	(revision 320020)
+++ vendor/lld/dist/ELF/InputFiles.cpp	(revision 320021)
@@ -1,1093 +1,1112 @@
 //===- InputFiles.cpp -----------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #include "InputFiles.h"
 #include "Error.h"
 #include "InputSection.h"
 #include "LinkerScript.h"
 #include "Memory.h"
 #include "SymbolTable.h"
 #include "Symbols.h"
 #include "SyntheticSections.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/CodeGen/Analysis.h"
 #include "llvm/DebugInfo/DWARF/DWARFContext.h"
 #include "llvm/IR/LLVMContext.h"
 #include "llvm/IR/Module.h"
 #include "llvm/LTO/LTO.h"
 #include "llvm/MC/StringTableBuilder.h"
 #include "llvm/Object/ELFObjectFile.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/TarWriter.h"
 #include "llvm/Support/raw_ostream.h"
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
 using namespace llvm::sys::fs;
 
 using namespace lld;
 using namespace lld::elf;
 
 TarWriter *elf::Tar;
 
 InputFile::InputFile(Kind K, MemoryBufferRef M) : MB(M), FileKind(K) {}
 
 namespace {
 // In ELF object file all section addresses are zero. If we have multiple
 // .text sections (when using -ffunction-section or comdat group) then
 // LLVM DWARF parser will not be able to parse .debug_line correctly, unless
 // we assign each section some unique address. This callback method assigns
 // each section an address equal to its offset in ELF object file.
 class ObjectInfo : public LoadedObjectInfo {
 public:
   uint64_t getSectionLoadAddress(const object::SectionRef &Sec) const override {
     return static_cast<const ELFSectionRef &>(Sec).getOffset();
   }
   std::unique_ptr<LoadedObjectInfo> clone() const override {
     return std::unique_ptr<LoadedObjectInfo>();
   }
 };
 }
 
 Optional<MemoryBufferRef> elf::readFile(StringRef Path) {
   log(Path);
   auto MBOrErr = MemoryBuffer::getFile(Path);
   if (auto EC = MBOrErr.getError()) {
     error("cannot open " + Path + ": " + EC.message());
     return None;
   }
 
   std::unique_ptr<MemoryBuffer> &MB = *MBOrErr;
   MemoryBufferRef MBRef = MB->getMemBufferRef();
   make<std::unique_ptr<MemoryBuffer>>(std::move(MB)); // take MB ownership
 
   if (Tar)
     Tar->append(relativeToRoot(Path), MBRef.getBuffer());
   return MBRef;
 }
 
 template <class ELFT> void elf::ObjectFile<ELFT>::initializeDwarfLine() {
   std::unique_ptr<object::ObjectFile> Obj =
       check(object::ObjectFile::createObjectFile(this->MB), toString(this));
 
   ObjectInfo ObjInfo;
   DWARFContextInMemory Dwarf(*Obj, &ObjInfo);
   DwarfLine.reset(new DWARFDebugLine(&Dwarf.getLineSection().Relocs));
   DataExtractor LineData(Dwarf.getLineSection().Data, Config->IsLE,
                          Config->Wordsize);
 
   // The second parameter is offset in .debug_line section
   // for compilation unit (CU) of interest. We have only one
   // CU (object file), so offset is always 0.
   DwarfLine->getOrParseLineTable(LineData, 0);
 }
 
 // Returns source line information for a given offset
 // using DWARF debug info.
 template <class ELFT>
 Optional<DILineInfo> elf::ObjectFile<ELFT>::getDILineInfo(InputSectionBase *S,
                                                           uint64_t Offset) {
   if (!DwarfLine)
     initializeDwarfLine();
 
   // The offset to CU is 0.
   const DWARFDebugLine::LineTable *Tbl = DwarfLine->getLineTable(0);
   if (!Tbl)
     return None;
 
   // Use fake address calcuated by adding section file offset and offset in
   // section. See comments for ObjectInfo class.
   DILineInfo Info;
   Tbl->getFileLineInfoForAddress(
       S->getOffsetInFile() + Offset, nullptr,
       DILineInfoSpecifier::FileLineInfoKind::AbsoluteFilePath, Info);
   if (Info.Line == 0)
     return None;
   return Info;
 }
 
 // Returns source line information for a given offset
 // using DWARF debug info.
 template <class ELFT>
 std::string elf::ObjectFile<ELFT>::getLineInfo(InputSectionBase *S,
                                                uint64_t Offset) {
   if (Optional<DILineInfo> Info = getDILineInfo(S, Offset))
     return Info->FileName + ":" + std::to_string(Info->Line);
   return "";
 }
 
 // Returns "<internal>", "foo.a(bar.o)" or "baz.o".
 std::string lld::toString(const InputFile *F) {
   if (!F)
     return "<internal>";
 
   if (F->ToStringCache.empty()) {
     if (F->ArchiveName.empty())
       F->ToStringCache = F->getName();
     else
       F->ToStringCache = (F->ArchiveName + "(" + F->getName() + ")").str();
   }
   return F->ToStringCache;
 }
 
 template <class ELFT>
 ELFFileBase<ELFT>::ELFFileBase(Kind K, MemoryBufferRef MB) : InputFile(K, MB) {
   if (ELFT::TargetEndianness == support::little)
     EKind = ELFT::Is64Bits ? ELF64LEKind : ELF32LEKind;
   else
     EKind = ELFT::Is64Bits ? ELF64BEKind : ELF32BEKind;
 
   EMachine = getObj().getHeader()->e_machine;
   OSABI = getObj().getHeader()->e_ident[llvm::ELF::EI_OSABI];
 }
 
 template <class ELFT>
 typename ELFT::SymRange ELFFileBase<ELFT>::getGlobalSymbols() {
   return makeArrayRef(Symbols.begin() + FirstNonLocal, Symbols.end());
 }
 
 template <class ELFT>
 uint32_t ELFFileBase<ELFT>::getSectionIndex(const Elf_Sym &Sym) const {
   return check(getObj().getSectionIndex(&Sym, Symbols, SymtabSHNDX),
                toString(this));
 }
 
 template <class ELFT>
 void ELFFileBase<ELFT>::initSymtab(ArrayRef<Elf_Shdr> Sections,
                                    const Elf_Shdr *Symtab) {
   FirstNonLocal = Symtab->sh_info;
   Symbols = check(getObj().symbols(Symtab), toString(this));
   if (FirstNonLocal == 0 || FirstNonLocal > Symbols.size())
     fatal(toString(this) + ": invalid sh_info in symbol table");
 
   StringTable = check(getObj().getStringTableForSymtab(*Symtab, Sections),
                       toString(this));
 }
 
 template <class ELFT>
 elf::ObjectFile<ELFT>::ObjectFile(MemoryBufferRef M, StringRef ArchiveName)
     : ELFFileBase<ELFT>(Base::ObjectKind, M) {
   this->ArchiveName = ArchiveName;
 }
 
 template <class ELFT>
 ArrayRef<SymbolBody *> elf::ObjectFile<ELFT>::getLocalSymbols() {
   if (this->SymbolBodies.empty())
     return this->SymbolBodies;
   return makeArrayRef(this->SymbolBodies).slice(1, this->FirstNonLocal - 1);
 }
 
 template <class ELFT>
 ArrayRef<SymbolBody *> elf::ObjectFile<ELFT>::getSymbols() {
   if (this->SymbolBodies.empty())
     return this->SymbolBodies;
   return makeArrayRef(this->SymbolBodies).slice(1);
 }
 
 template <class ELFT>
 void elf::ObjectFile<ELFT>::parse(DenseSet<CachedHashStringRef> &ComdatGroups) {
   // Read section and symbol tables.
   initializeSections(ComdatGroups);
   initializeSymbols();
 }
 
 // Sections with SHT_GROUP and comdat bits define comdat section groups.
 // They are identified and deduplicated by group name. This function
 // returns a group name.
 template <class ELFT>
 StringRef
 elf::ObjectFile<ELFT>::getShtGroupSignature(ArrayRef<Elf_Shdr> Sections,
                                             const Elf_Shdr &Sec) {
+  // Group signatures are stored as symbol names in object files.
+  // sh_info contains a symbol index, so we fetch a symbol and read its name.
   if (this->Symbols.empty())
     this->initSymtab(
         Sections,
         check(object::getSection<ELFT>(Sections, Sec.sh_link), toString(this)));
+
   const Elf_Sym *Sym = check(
       object::getSymbol<ELFT>(this->Symbols, Sec.sh_info), toString(this));
-  return check(Sym->getName(this->StringTable), toString(this));
+  StringRef Signature = check(Sym->getName(this->StringTable), toString(this));
+
+  // As a special case, if a symbol is a section symbol and has no name,
+  // we use a section name as a signature.
+  //
+  // Such SHT_GROUP sections are invalid from the perspective of the ELF
+  // standard, but GNU gold 1.14 (the neweset version as of July 2017) or
+  // older produce such sections as outputs for the -r option, so we need
+  // a bug-compatibility.
+  if (Signature.empty() && Sym->getType() == STT_SECTION)
+    return getSectionName(Sec);
+  return Signature;
 }
 
 template <class ELFT>
 ArrayRef<typename elf::ObjectFile<ELFT>::Elf_Word>
 elf::ObjectFile<ELFT>::getShtGroupEntries(const Elf_Shdr &Sec) {
   const ELFFile<ELFT> &Obj = this->getObj();
   ArrayRef<Elf_Word> Entries = check(
       Obj.template getSectionContentsAsArray<Elf_Word>(&Sec), toString(this));
   if (Entries.empty() || Entries[0] != GRP_COMDAT)
     fatal(toString(this) + ": unsupported SHT_GROUP format");
   return Entries.slice(1);
 }
 
 template <class ELFT>
 bool elf::ObjectFile<ELFT>::shouldMerge(const Elf_Shdr &Sec) {
   // We don't merge sections if -O0 (default is -O1). This makes sometimes
   // the linker significantly faster, although the output will be bigger.
   if (Config->Optimize == 0)
     return false;
 
   // Do not merge sections if generating a relocatable object. It makes
   // the code simpler because we do not need to update relocation addends
   // to reflect changes introduced by merging. Instead of that we write
   // such "merge" sections into separate OutputSections and keep SHF_MERGE
   // / SHF_STRINGS flags and sh_entsize value to be able to perform merging
   // later during a final linking.
   if (Config->Relocatable)
     return false;
 
   // A mergeable section with size 0 is useless because they don't have
   // any data to merge. A mergeable string section with size 0 can be
   // argued as invalid because it doesn't end with a null character.
   // We'll avoid a mess by handling them as if they were non-mergeable.
   if (Sec.sh_size == 0)
     return false;
 
   // Check for sh_entsize. The ELF spec is not clear about the zero
   // sh_entsize. It says that "the member [sh_entsize] contains 0 if
   // the section does not hold a table of fixed-size entries". We know
   // that Rust 1.13 produces a string mergeable section with a zero
   // sh_entsize. Here we just accept it rather than being picky about it.
   uint64_t EntSize = Sec.sh_entsize;
   if (EntSize == 0)
     return false;
   if (Sec.sh_size % EntSize)
     fatal(toString(this) +
           ": SHF_MERGE section size must be a multiple of sh_entsize");
 
   uint64_t Flags = Sec.sh_flags;
   if (!(Flags & SHF_MERGE))
     return false;
   if (Flags & SHF_WRITE)
     fatal(toString(this) + ": writable SHF_MERGE section is not supported");
 
   // Don't try to merge if the alignment is larger than the sh_entsize and this
   // is not SHF_STRINGS.
   //
   // Since this is not a SHF_STRINGS, we would need to pad after every entity.
   // It would be equivalent for the producer of the .o to just set a larger
   // sh_entsize.
   if (Flags & SHF_STRINGS)
     return true;
 
   return Sec.sh_addralign <= EntSize;
 }
 
 template <class ELFT>
 void elf::ObjectFile<ELFT>::initializeSections(
     DenseSet<CachedHashStringRef> &ComdatGroups) {
   const ELFFile<ELFT> &Obj = this->getObj();
 
   ArrayRef<Elf_Shdr> ObjSections =
       check(this->getObj().sections(), toString(this));
   uint64_t Size = ObjSections.size();
   this->Sections.resize(Size);
-
-  StringRef SectionStringTable =
+  this->SectionStringTable =
       check(Obj.getSectionStringTable(ObjSections), toString(this));
 
   for (size_t I = 0, E = ObjSections.size(); I < E; I++) {
     if (this->Sections[I] == &InputSection::Discarded)
       continue;
     const Elf_Shdr &Sec = ObjSections[I];
 
     // SHF_EXCLUDE'ed sections are discarded by the linker. However,
     // if -r is given, we'll let the final link discard such sections.
     // This is compatible with GNU.
     if ((Sec.sh_flags & SHF_EXCLUDE) && !Config->Relocatable) {
       this->Sections[I] = &InputSection::Discarded;
       continue;
     }
 
     switch (Sec.sh_type) {
     case SHT_GROUP: {
       // De-duplicate section groups by their signatures.
       StringRef Signature = getShtGroupSignature(ObjSections, Sec);
       bool IsNew = ComdatGroups.insert(CachedHashStringRef(Signature)).second;
       this->Sections[I] = &InputSection::Discarded;
 
       // If it is a new section group, we want to keep group members.
       // Group leader sections, which contain indices of group members, are
       // discarded because they are useless beyond this point. The only
       // exception is the -r option because in order to produce re-linkable
       // object files, we want to pass through basically everything.
       if (IsNew) {
         if (Config->Relocatable)
-          this->Sections[I] = createInputSection(Sec, SectionStringTable);
+          this->Sections[I] = createInputSection(Sec);
         continue;
       }
 
       // Otherwise, discard group members.
       for (uint32_t SecIndex : getShtGroupEntries(Sec)) {
         if (SecIndex >= Size)
           fatal(toString(this) +
                 ": invalid section index in group: " + Twine(SecIndex));
         this->Sections[SecIndex] = &InputSection::Discarded;
       }
       break;
     }
     case SHT_SYMTAB:
       this->initSymtab(ObjSections, &Sec);
       break;
     case SHT_SYMTAB_SHNDX:
       this->SymtabSHNDX =
           check(Obj.getSHNDXTable(Sec, ObjSections), toString(this));
       break;
     case SHT_STRTAB:
     case SHT_NULL:
       break;
     default:
-      this->Sections[I] = createInputSection(Sec, SectionStringTable);
+      this->Sections[I] = createInputSection(Sec);
     }
 
     // .ARM.exidx sections have a reverse dependency on the InputSection they
     // have a SHF_LINK_ORDER dependency, this is identified by the sh_link.
     if (Sec.sh_flags & SHF_LINK_ORDER) {
       if (Sec.sh_link >= this->Sections.size())
         fatal(toString(this) + ": invalid sh_link index: " +
               Twine(Sec.sh_link));
       this->Sections[Sec.sh_link]->DependentSections.push_back(
           this->Sections[I]);
     }
   }
 }
 
 template <class ELFT>
 InputSectionBase *elf::ObjectFile<ELFT>::getRelocTarget(const Elf_Shdr &Sec) {
   uint32_t Idx = Sec.sh_info;
   if (Idx >= this->Sections.size())
     fatal(toString(this) + ": invalid relocated section index: " + Twine(Idx));
   InputSectionBase *Target = this->Sections[Idx];
 
   // Strictly speaking, a relocation section must be included in the
   // group of the section it relocates. However, LLVM 3.3 and earlier
   // would fail to do so, so we gracefully handle that case.
   if (Target == &InputSection::Discarded)
     return nullptr;
 
   if (!Target)
     fatal(toString(this) + ": unsupported relocation reference");
   return Target;
 }
 
 // Create a regular InputSection class that has the same contents
 // as a given section.
 InputSectionBase *toRegularSection(MergeInputSection *Sec) {
   auto *Ret = make<InputSection>(Sec->Flags, Sec->Type, Sec->Alignment,
                                  Sec->Data, Sec->Name);
   Ret->File = Sec->File;
   return Ret;
 }
 
 template <class ELFT>
 InputSectionBase *
-elf::ObjectFile<ELFT>::createInputSection(const Elf_Shdr &Sec,
-                                          StringRef SectionStringTable) {
-  StringRef Name = check(
-      this->getObj().getSectionName(&Sec, SectionStringTable), toString(this));
+elf::ObjectFile<ELFT>::createInputSection(const Elf_Shdr &Sec) {
+  StringRef Name = getSectionName(Sec);
 
   switch (Sec.sh_type) {
   case SHT_ARM_ATTRIBUTES:
     // FIXME: ARM meta-data section. Retain the first attribute section
     // we see. The eglibc ARM dynamic loaders require the presence of an
     // attribute section for dlopen to work.
     // In a full implementation we would merge all attribute sections.
     if (InX::ARMAttributes == nullptr) {
       InX::ARMAttributes = make<InputSection>(this, &Sec, Name);
       return InX::ARMAttributes;
     }
     return &InputSection::Discarded;
   case SHT_RELA:
   case SHT_REL: {
     // Find the relocation target section and associate this
     // section with it. Target can be discarded, for example
     // if it is a duplicated member of SHT_GROUP section, we
     // do not create or proccess relocatable sections then.
     InputSectionBase *Target = getRelocTarget(Sec);
     if (!Target)
       return nullptr;
 
     // This section contains relocation information.
     // If -r is given, we do not interpret or apply relocation
     // but just copy relocation sections to output.
     if (Config->Relocatable)
       return make<InputSection>(this, &Sec, Name);
 
     if (Target->FirstRelocation)
       fatal(toString(this) +
             ": multiple relocation sections to one section are not supported");
 
     // Mergeable sections with relocations are tricky because relocations
     // need to be taken into account when comparing section contents for
     // merging. It's not worth supporting such mergeable sections because
     // they are rare and it'd complicates the internal design (we usually
     // have to determine if two sections are mergeable early in the link
     // process much before applying relocations). We simply handle mergeable
     // sections with relocations as non-mergeable.
     if (auto *MS = dyn_cast<MergeInputSection>(Target)) {
       Target = toRegularSection(MS);
       this->Sections[Sec.sh_info] = Target;
     }
 
     size_t NumRelocations;
     if (Sec.sh_type == SHT_RELA) {
       ArrayRef<Elf_Rela> Rels =
           check(this->getObj().relas(&Sec), toString(this));
       Target->FirstRelocation = Rels.begin();
       NumRelocations = Rels.size();
       Target->AreRelocsRela = true;
     } else {
       ArrayRef<Elf_Rel> Rels = check(this->getObj().rels(&Sec), toString(this));
       Target->FirstRelocation = Rels.begin();
       NumRelocations = Rels.size();
       Target->AreRelocsRela = false;
     }
     assert(isUInt<31>(NumRelocations));
     Target->NumRelocations = NumRelocations;
 
     // Relocation sections processed by the linker are usually removed
     // from the output, so returning `nullptr` for the normal case.
     // However, if -emit-relocs is given, we need to leave them in the output.
     // (Some post link analysis tools need this information.)
     if (Config->EmitRelocs) {
       InputSection *RelocSec = make<InputSection>(this, &Sec, Name);
       // We will not emit relocation section if target was discarded.
       Target->DependentSections.push_back(RelocSec);
       return RelocSec;
     }
     return nullptr;
   }
   }
 
   // The GNU linker uses .note.GNU-stack section as a marker indicating
   // that the code in the object file does not expect that the stack is
   // executable (in terms of NX bit). If all input files have the marker,
   // the GNU linker adds a PT_GNU_STACK segment to tells the loader to
   // make the stack non-executable. Most object files have this section as
   // of 2017.
   //
   // But making the stack non-executable is a norm today for security
   // reasons. Failure to do so may result in a serious security issue.
   // Therefore, we make LLD always add PT_GNU_STACK unless it is
   // explicitly told to do otherwise (by -z execstack). Because the stack
   // executable-ness is controlled solely by command line options,
   // .note.GNU-stack sections are simply ignored.
   if (Name == ".note.GNU-stack")
     return &InputSection::Discarded;
 
   // Split stacks is a feature to support a discontiguous stack. At least
   // as of 2017, it seems that the feature is not being used widely.
   // Only GNU gold supports that. We don't. For the details about that,
   // see https://gcc.gnu.org/wiki/SplitStacks
   if (Name == ".note.GNU-split-stack") {
     error(toString(this) +
           ": object file compiled with -fsplit-stack is not supported");
     return &InputSection::Discarded;
   }
 
   if (Config->Strip != StripPolicy::None && Name.startswith(".debug"))
     return &InputSection::Discarded;
 
   // If -gdb-index is given, LLD creates .gdb_index section, and that
   // section serves the same purpose as .debug_gnu_pub{names,types} sections.
   // If that's the case, we want to eliminate .debug_gnu_pub{names,types}
   // because they are redundant and can waste large amount of disk space
   // (for example, they are about 400 MiB in total for a clang debug build.)
   if (Config->GdbIndex &&
       (Name == ".debug_gnu_pubnames" || Name == ".debug_gnu_pubtypes"))
     return &InputSection::Discarded;
 
   // The linkonce feature is a sort of proto-comdat. Some glibc i386 object
   // files contain definitions of symbol "__x86.get_pc_thunk.bx" in linkonce
   // sections. Drop those sections to avoid duplicate symbol errors.
   // FIXME: This is glibc PR20543, we should remove this hack once that has been
   // fixed for a while.
   if (Name.startswith(".gnu.linkonce."))
     return &InputSection::Discarded;
 
   // The linker merges EH (exception handling) frames and creates a
   // .eh_frame_hdr section for runtime. So we handle them with a special
   // class. For relocatable outputs, they are just passed through.
   if (Name == ".eh_frame" && !Config->Relocatable)
     return make<EhInputSection>(this, &Sec, Name);
 
   if (shouldMerge(Sec))
     return make<MergeInputSection>(this, &Sec, Name);
   return make<InputSection>(this, &Sec, Name);
 }
 
+template <class ELFT>
+StringRef elf::ObjectFile<ELFT>::getSectionName(const Elf_Shdr &Sec) {
+  return check(this->getObj().getSectionName(&Sec, SectionStringTable),
+               toString(this));
+}
+
 template <class ELFT> void elf::ObjectFile<ELFT>::initializeSymbols() {
   SymbolBodies.reserve(this->Symbols.size());
   for (const Elf_Sym &Sym : this->Symbols)
     SymbolBodies.push_back(createSymbolBody(&Sym));
 }
 
 template <class ELFT>
 InputSectionBase *elf::ObjectFile<ELFT>::getSection(const Elf_Sym &Sym) const {
   uint32_t Index = this->getSectionIndex(Sym);
   if (Index >= this->Sections.size())
     fatal(toString(this) + ": invalid section index: " + Twine(Index));
   InputSectionBase *S = this->Sections[Index];
 
   // We found that GNU assembler 2.17.50 [FreeBSD] 2007-07-03 could
   // generate broken objects. STT_SECTION/STT_NOTYPE symbols can be
   // associated with SHT_REL[A]/SHT_SYMTAB/SHT_STRTAB sections.
   // In this case it is fine for section to be null here as we do not
   // allocate sections of these types.
   if (!S) {
     if (Index == 0 || Sym.getType() == STT_SECTION ||
         Sym.getType() == STT_NOTYPE)
       return nullptr;
     fatal(toString(this) + ": invalid section index: " + Twine(Index));
   }
 
   if (S == &InputSection::Discarded)
     return S;
   return S->Repl;
 }
 
 template <class ELFT>
 SymbolBody *elf::ObjectFile<ELFT>::createSymbolBody(const Elf_Sym *Sym) {
   int Binding = Sym->getBinding();
   InputSectionBase *Sec = getSection(*Sym);
 
   uint8_t StOther = Sym->st_other;
   uint8_t Type = Sym->getType();
   uint64_t Value = Sym->st_value;
   uint64_t Size = Sym->st_size;
 
   if (Binding == STB_LOCAL) {
     if (Sym->getType() == STT_FILE)
       SourceFile = check(Sym->getName(this->StringTable), toString(this));
 
     if (this->StringTable.size() <= Sym->st_name)
       fatal(toString(this) + ": invalid symbol name offset");
 
     StringRefZ Name = this->StringTable.data() + Sym->st_name;
     if (Sym->st_shndx == SHN_UNDEF)
       return make<Undefined>(Name, /*IsLocal=*/true, StOther, Type, this);
 
     return make<DefinedRegular>(Name, /*IsLocal=*/true, StOther, Type, Value,
                                 Size, Sec, this);
   }
 
   StringRef Name = check(Sym->getName(this->StringTable), toString(this));
 
   switch (Sym->st_shndx) {
   case SHN_UNDEF:
     return elf::Symtab<ELFT>::X
         ->addUndefined(Name, /*IsLocal=*/false, Binding, StOther, Type,
                        /*CanOmitFromDynSym=*/false, this)
         ->body();
   case SHN_COMMON:
     if (Value == 0 || Value >= UINT32_MAX)
       fatal(toString(this) + ": common symbol '" + Name +
             "' has invalid alignment: " + Twine(Value));
     return elf::Symtab<ELFT>::X
         ->addCommon(Name, Size, Value, Binding, StOther, Type, this)
         ->body();
   }
 
   switch (Binding) {
   default:
     fatal(toString(this) + ": unexpected binding: " + Twine(Binding));
   case STB_GLOBAL:
   case STB_WEAK:
   case STB_GNU_UNIQUE:
     if (Sec == &InputSection::Discarded)
       return elf::Symtab<ELFT>::X
           ->addUndefined(Name, /*IsLocal=*/false, Binding, StOther, Type,
                          /*CanOmitFromDynSym=*/false, this)
           ->body();
     return elf::Symtab<ELFT>::X
         ->addRegular(Name, StOther, Type, Value, Size, Binding, Sec, this)
         ->body();
   }
 }
 
 ArchiveFile::ArchiveFile(std::unique_ptr<Archive> &&File)
     : InputFile(ArchiveKind, File->getMemoryBufferRef()),
       File(std::move(File)) {}
 
 template <class ELFT> void ArchiveFile::parse() {
   for (const Archive::Symbol &Sym : File->symbols())
     Symtab<ELFT>::X->addLazyArchive(this, Sym);
 }
 
 // Returns a buffer pointing to a member file containing a given symbol.
 std::pair<MemoryBufferRef, uint64_t>
 ArchiveFile::getMember(const Archive::Symbol *Sym) {
   Archive::Child C =
       check(Sym->getMember(), toString(this) +
                                   ": could not get the member for symbol " +
                                   Sym->getName());
 
   if (!Seen.insert(C.getChildOffset()).second)
     return {MemoryBufferRef(), 0};
 
   MemoryBufferRef Ret =
       check(C.getMemoryBufferRef(),
             toString(this) +
                 ": could not get the buffer for the member defining symbol " +
                 Sym->getName());
 
   if (C.getParent()->isThin() && Tar)
     Tar->append(relativeToRoot(check(C.getFullName(), toString(this))),
                 Ret.getBuffer());
   if (C.getParent()->isThin())
     return {Ret, 0};
   return {Ret, C.getChildOffset()};
 }
 
 template <class ELFT>
 SharedFile<ELFT>::SharedFile(MemoryBufferRef M, StringRef DefaultSoName)
     : ELFFileBase<ELFT>(Base::SharedKind, M), SoName(DefaultSoName),
       AsNeeded(Config->AsNeeded) {}
 
 template <class ELFT>
 const typename ELFT::Shdr *
 SharedFile<ELFT>::getSection(const Elf_Sym &Sym) const {
   return check(
       this->getObj().getSection(&Sym, this->Symbols, this->SymtabSHNDX),
       toString(this));
 }
 
 // Partially parse the shared object file so that we can call
 // getSoName on this object.
 template <class ELFT> void SharedFile<ELFT>::parseSoName() {
   const Elf_Shdr *DynamicSec = nullptr;
   const ELFFile<ELFT> Obj = this->getObj();
   ArrayRef<Elf_Shdr> Sections = check(Obj.sections(), toString(this));
 
   // Search for .dynsym, .dynamic, .symtab, .gnu.version and .gnu.version_d.
   for (const Elf_Shdr &Sec : Sections) {
     switch (Sec.sh_type) {
     default:
       continue;
     case SHT_DYNSYM:
       this->initSymtab(Sections, &Sec);
       break;
     case SHT_DYNAMIC:
       DynamicSec = &Sec;
       break;
     case SHT_SYMTAB_SHNDX:
       this->SymtabSHNDX =
           check(Obj.getSHNDXTable(Sec, Sections), toString(this));
       break;
     case SHT_GNU_versym:
       this->VersymSec = &Sec;
       break;
     case SHT_GNU_verdef:
       this->VerdefSec = &Sec;
       break;
     }
   }
 
   if (this->VersymSec && this->Symbols.empty())
     error("SHT_GNU_versym should be associated with symbol table");
 
   // Search for a DT_SONAME tag to initialize this->SoName.
   if (!DynamicSec)
     return;
   ArrayRef<Elf_Dyn> Arr =
       check(Obj.template getSectionContentsAsArray<Elf_Dyn>(DynamicSec),
             toString(this));
   for (const Elf_Dyn &Dyn : Arr) {
     if (Dyn.d_tag == DT_SONAME) {
       uint64_t Val = Dyn.getVal();
       if (Val >= this->StringTable.size())
         fatal(toString(this) + ": invalid DT_SONAME entry");
       SoName = this->StringTable.data() + Val;
       return;
     }
   }
 }
 
 // Parse the version definitions in the object file if present. Returns a vector
 // whose nth element contains a pointer to the Elf_Verdef for version identifier
 // n. Version identifiers that are not definitions map to nullptr. The array
 // always has at least length 1.
 template <class ELFT>
 std::vector<const typename ELFT::Verdef *>
 SharedFile<ELFT>::parseVerdefs(const Elf_Versym *&Versym) {
   std::vector<const Elf_Verdef *> Verdefs(1);
   // We only need to process symbol versions for this DSO if it has both a
   // versym and a verdef section, which indicates that the DSO contains symbol
   // version definitions.
   if (!VersymSec || !VerdefSec)
     return Verdefs;
 
   // The location of the first global versym entry.
   const char *Base = this->MB.getBuffer().data();
   Versym = reinterpret_cast<const Elf_Versym *>(Base + VersymSec->sh_offset) +
            this->FirstNonLocal;
 
   // We cannot determine the largest verdef identifier without inspecting
   // every Elf_Verdef, but both bfd and gold assign verdef identifiers
   // sequentially starting from 1, so we predict that the largest identifier
   // will be VerdefCount.
   unsigned VerdefCount = VerdefSec->sh_info;
   Verdefs.resize(VerdefCount + 1);
 
   // Build the Verdefs array by following the chain of Elf_Verdef objects
   // from the start of the .gnu.version_d section.
   const char *Verdef = Base + VerdefSec->sh_offset;
   for (unsigned I = 0; I != VerdefCount; ++I) {
     auto *CurVerdef = reinterpret_cast<const Elf_Verdef *>(Verdef);
     Verdef += CurVerdef->vd_next;
     unsigned VerdefIndex = CurVerdef->vd_ndx;
     if (Verdefs.size() <= VerdefIndex)
       Verdefs.resize(VerdefIndex + 1);
     Verdefs[VerdefIndex] = CurVerdef;
   }
 
   return Verdefs;
 }
 
 // Fully parse the shared object file. This must be called after parseSoName().
 template <class ELFT> void SharedFile<ELFT>::parseRest() {
   // Create mapping from version identifiers to Elf_Verdef entries.
   const Elf_Versym *Versym = nullptr;
   std::vector<const Elf_Verdef *> Verdefs = parseVerdefs(Versym);
 
   Elf_Sym_Range Syms = this->getGlobalSymbols();
   for (const Elf_Sym &Sym : Syms) {
     unsigned VersymIndex = 0;
     if (Versym) {
       VersymIndex = Versym->vs_index;
       ++Versym;
     }
     bool Hidden = VersymIndex & VERSYM_HIDDEN;
     VersymIndex = VersymIndex & ~VERSYM_HIDDEN;
 
     StringRef Name = check(Sym.getName(this->StringTable), toString(this));
     if (Sym.isUndefined()) {
       Undefs.push_back(Name);
       continue;
     }
 
     // Ignore local symbols.
     if (Versym && VersymIndex == VER_NDX_LOCAL)
       continue;
 
     const Elf_Verdef *V =
         VersymIndex == VER_NDX_GLOBAL ? nullptr : Verdefs[VersymIndex];
 
     if (!Hidden)
       elf::Symtab<ELFT>::X->addShared(this, Name, Sym, V);
 
     // Also add the symbol with the versioned name to handle undefined symbols
     // with explicit versions.
     if (V) {
       StringRef VerName = this->StringTable.data() + V->getAux()->vda_name;
       Name = Saver.save(Name + "@" + VerName);
       elf::Symtab<ELFT>::X->addShared(this, Name, Sym, V);
     }
   }
 }
 
 static ELFKind getBitcodeELFKind(const Triple &T) {
   if (T.isLittleEndian())
     return T.isArch64Bit() ? ELF64LEKind : ELF32LEKind;
   return T.isArch64Bit() ? ELF64BEKind : ELF32BEKind;
 }
 
 static uint8_t getBitcodeMachineKind(StringRef Path, const Triple &T) {
   switch (T.getArch()) {
   case Triple::aarch64:
     return EM_AARCH64;
   case Triple::arm:
   case Triple::thumb:
     return EM_ARM;
+  case Triple::avr:
+    return EM_AVR;
   case Triple::mips:
   case Triple::mipsel:
   case Triple::mips64:
   case Triple::mips64el:
     return EM_MIPS;
   case Triple::ppc:
     return EM_PPC;
   case Triple::ppc64:
     return EM_PPC64;
   case Triple::x86:
     return T.isOSIAMCU() ? EM_IAMCU : EM_386;
   case Triple::x86_64:
     return EM_X86_64;
   default:
     fatal(Path + ": could not infer e_machine from bitcode target triple " +
           T.str());
   }
 }
 
 BitcodeFile::BitcodeFile(MemoryBufferRef MB, StringRef ArchiveName,
                          uint64_t OffsetInArchive)
     : InputFile(BitcodeKind, MB) {
   this->ArchiveName = ArchiveName;
 
   // Here we pass a new MemoryBufferRef which is identified by ArchiveName
   // (the fully resolved path of the archive) + member name + offset of the
   // member in the archive.
   // ThinLTO uses the MemoryBufferRef identifier to access its internal
   // data structures and if two archives define two members with the same name,
   // this causes a collision which result in only one of the objects being
   // taken into consideration at LTO time (which very likely causes undefined
   // symbols later in the link stage).
   MemoryBufferRef MBRef(MB.getBuffer(),
                         Saver.save(ArchiveName + MB.getBufferIdentifier() +
                                    utostr(OffsetInArchive)));
   Obj = check(lto::InputFile::create(MBRef), toString(this));
 
   Triple T(Obj->getTargetTriple());
   EKind = getBitcodeELFKind(T);
   EMachine = getBitcodeMachineKind(MB.getBufferIdentifier(), T);
 }
 
 static uint8_t mapVisibility(GlobalValue::VisibilityTypes GvVisibility) {
   switch (GvVisibility) {
   case GlobalValue::DefaultVisibility:
     return STV_DEFAULT;
   case GlobalValue::HiddenVisibility:
     return STV_HIDDEN;
   case GlobalValue::ProtectedVisibility:
     return STV_PROTECTED;
   }
   llvm_unreachable("unknown visibility");
 }
 
 template <class ELFT>
 static Symbol *createBitcodeSymbol(const std::vector<bool> &KeptComdats,
                                    const lto::InputFile::Symbol &ObjSym,
                                    BitcodeFile *F) {
   StringRef NameRef = Saver.save(ObjSym.getName());
   uint32_t Binding = ObjSym.isWeak() ? STB_WEAK : STB_GLOBAL;
 
   uint8_t Type = ObjSym.isTLS() ? STT_TLS : STT_NOTYPE;
   uint8_t Visibility = mapVisibility(ObjSym.getVisibility());
   bool CanOmitFromDynSym = ObjSym.canBeOmittedFromSymbolTable();
 
   int C = ObjSym.getComdatIndex();
   if (C != -1 && !KeptComdats[C])
     return Symtab<ELFT>::X->addUndefined(NameRef, /*IsLocal=*/false, Binding,
                                          Visibility, Type, CanOmitFromDynSym,
                                          F);
 
   if (ObjSym.isUndefined())
     return Symtab<ELFT>::X->addUndefined(NameRef, /*IsLocal=*/false, Binding,
                                          Visibility, Type, CanOmitFromDynSym,
                                          F);
 
   if (ObjSym.isCommon())
     return Symtab<ELFT>::X->addCommon(NameRef, ObjSym.getCommonSize(),
                                       ObjSym.getCommonAlignment(), Binding,
                                       Visibility, STT_OBJECT, F);
 
   return Symtab<ELFT>::X->addBitcode(NameRef, Binding, Visibility, Type,
                                      CanOmitFromDynSym, F);
 }
 
 template <class ELFT>
 void BitcodeFile::parse(DenseSet<CachedHashStringRef> &ComdatGroups) {
   std::vector<bool> KeptComdats;
   for (StringRef S : Obj->getComdatTable())
     KeptComdats.push_back(ComdatGroups.insert(CachedHashStringRef(S)).second);
 
   for (const lto::InputFile::Symbol &ObjSym : Obj->symbols())
     Symbols.push_back(createBitcodeSymbol<ELFT>(KeptComdats, ObjSym, this));
 }
 
 static ELFKind getELFKind(MemoryBufferRef MB) {
   unsigned char Size;
   unsigned char Endian;
   std::tie(Size, Endian) = getElfArchType(MB.getBuffer());
 
   if (Endian != ELFDATA2LSB && Endian != ELFDATA2MSB)
     fatal(MB.getBufferIdentifier() + ": invalid data encoding");
   if (Size != ELFCLASS32 && Size != ELFCLASS64)
     fatal(MB.getBufferIdentifier() + ": invalid file class");
 
   size_t BufSize = MB.getBuffer().size();
   if ((Size == ELFCLASS32 && BufSize < sizeof(Elf32_Ehdr)) ||
       (Size == ELFCLASS64 && BufSize < sizeof(Elf64_Ehdr)))
     fatal(MB.getBufferIdentifier() + ": file is too short");
 
   if (Size == ELFCLASS32)
     return (Endian == ELFDATA2LSB) ? ELF32LEKind : ELF32BEKind;
   return (Endian == ELFDATA2LSB) ? ELF64LEKind : ELF64BEKind;
 }
 
 template <class ELFT> void BinaryFile::parse() {
   ArrayRef<uint8_t> Data = toArrayRef(MB.getBuffer());
   auto *Section =
       make<InputSection>(SHF_ALLOC | SHF_WRITE, SHT_PROGBITS, 8, Data, ".data");
   Sections.push_back(Section);
 
   // For each input file foo that is embedded to a result as a binary
   // blob, we define _binary_foo_{start,end,size} symbols, so that
   // user programs can access blobs by name. Non-alphanumeric
   // characters in a filename are replaced with underscore.
   std::string S = "_binary_" + MB.getBufferIdentifier().str();
   for (size_t I = 0; I < S.size(); ++I)
     if (!isalnum(S[I]))
       S[I] = '_';
 
   elf::Symtab<ELFT>::X->addRegular(Saver.save(S + "_start"), STV_DEFAULT,
                                    STT_OBJECT, 0, 0, STB_GLOBAL, Section,
                                    nullptr);
   elf::Symtab<ELFT>::X->addRegular(Saver.save(S + "_end"), STV_DEFAULT,
                                    STT_OBJECT, Data.size(), 0, STB_GLOBAL,
                                    Section, nullptr);
   elf::Symtab<ELFT>::X->addRegular(Saver.save(S + "_size"), STV_DEFAULT,
                                    STT_OBJECT, Data.size(), 0, STB_GLOBAL,
                                    nullptr, nullptr);
 }
 
 static bool isBitcode(MemoryBufferRef MB) {
   using namespace sys::fs;
   return identify_magic(MB.getBuffer()) == file_magic::bitcode;
 }
 
 InputFile *elf::createObjectFile(MemoryBufferRef MB, StringRef ArchiveName,
                                  uint64_t OffsetInArchive) {
   if (isBitcode(MB))
     return make<BitcodeFile>(MB, ArchiveName, OffsetInArchive);
 
   switch (getELFKind(MB)) {
   case ELF32LEKind:
     return make<ObjectFile<ELF32LE>>(MB, ArchiveName);
   case ELF32BEKind:
     return make<ObjectFile<ELF32BE>>(MB, ArchiveName);
   case ELF64LEKind:
     return make<ObjectFile<ELF64LE>>(MB, ArchiveName);
   case ELF64BEKind:
     return make<ObjectFile<ELF64BE>>(MB, ArchiveName);
   default:
     llvm_unreachable("getELFKind");
   }
 }
 
 InputFile *elf::createSharedFile(MemoryBufferRef MB, StringRef DefaultSoName) {
   switch (getELFKind(MB)) {
   case ELF32LEKind:
     return make<SharedFile<ELF32LE>>(MB, DefaultSoName);
   case ELF32BEKind:
     return make<SharedFile<ELF32BE>>(MB, DefaultSoName);
   case ELF64LEKind:
     return make<SharedFile<ELF64LE>>(MB, DefaultSoName);
   case ELF64BEKind:
     return make<SharedFile<ELF64BE>>(MB, DefaultSoName);
   default:
     llvm_unreachable("getELFKind");
   }
 }
 
 MemoryBufferRef LazyObjectFile::getBuffer() {
   if (Seen)
     return MemoryBufferRef();
   Seen = true;
   return MB;
 }
 
 InputFile *LazyObjectFile::fetch() {
   MemoryBufferRef MBRef = getBuffer();
   if (MBRef.getBuffer().empty())
     return nullptr;
   return createObjectFile(MBRef, ArchiveName, OffsetInArchive);
 }
 
 template <class ELFT> void LazyObjectFile::parse() {
   for (StringRef Sym : getSymbols())
     Symtab<ELFT>::X->addLazyObject(Sym, *this);
 }
 
 template <class ELFT> std::vector<StringRef> LazyObjectFile::getElfSymbols() {
   typedef typename ELFT::Shdr Elf_Shdr;
   typedef typename ELFT::Sym Elf_Sym;
   typedef typename ELFT::SymRange Elf_Sym_Range;
 
   const ELFFile<ELFT> Obj(this->MB.getBuffer());
   ArrayRef<Elf_Shdr> Sections = check(Obj.sections(), toString(this));
   for (const Elf_Shdr &Sec : Sections) {
     if (Sec.sh_type != SHT_SYMTAB)
       continue;
 
     Elf_Sym_Range Syms = check(Obj.symbols(&Sec), toString(this));
     uint32_t FirstNonLocal = Sec.sh_info;
     StringRef StringTable =
         check(Obj.getStringTableForSymtab(Sec, Sections), toString(this));
     std::vector<StringRef> V;
 
     for (const Elf_Sym &Sym : Syms.slice(FirstNonLocal))
       if (Sym.st_shndx != SHN_UNDEF)
         V.push_back(check(Sym.getName(StringTable), toString(this)));
     return V;
   }
   return {};
 }
 
 std::vector<StringRef> LazyObjectFile::getBitcodeSymbols() {
   std::unique_ptr<lto::InputFile> Obj =
       check(lto::InputFile::create(this->MB), toString(this));
   std::vector<StringRef> V;
   for (const lto::InputFile::Symbol &Sym : Obj->symbols())
     if (!Sym.isUndefined())
       V.push_back(Saver.save(Sym.getName()));
   return V;
 }
 
 // Returns a vector of globally-visible defined symbol names.
 std::vector<StringRef> LazyObjectFile::getSymbols() {
   if (isBitcode(this->MB))
     return getBitcodeSymbols();
 
   switch (getELFKind(this->MB)) {
   case ELF32LEKind:
     return getElfSymbols<ELF32LE>();
   case ELF32BEKind:
     return getElfSymbols<ELF32BE>();
   case ELF64LEKind:
     return getElfSymbols<ELF64LE>();
   case ELF64BEKind:
     return getElfSymbols<ELF64BE>();
   default:
     llvm_unreachable("getELFKind");
   }
 }
 
 template void ArchiveFile::parse<ELF32LE>();
 template void ArchiveFile::parse<ELF32BE>();
 template void ArchiveFile::parse<ELF64LE>();
 template void ArchiveFile::parse<ELF64BE>();
 
 template void BitcodeFile::parse<ELF32LE>(DenseSet<CachedHashStringRef> &);
 template void BitcodeFile::parse<ELF32BE>(DenseSet<CachedHashStringRef> &);
 template void BitcodeFile::parse<ELF64LE>(DenseSet<CachedHashStringRef> &);
 template void BitcodeFile::parse<ELF64BE>(DenseSet<CachedHashStringRef> &);
 
 template void LazyObjectFile::parse<ELF32LE>();
 template void LazyObjectFile::parse<ELF32BE>();
 template void LazyObjectFile::parse<ELF64LE>();
 template void LazyObjectFile::parse<ELF64BE>();
 
 template class elf::ELFFileBase<ELF32LE>;
 template class elf::ELFFileBase<ELF32BE>;
 template class elf::ELFFileBase<ELF64LE>;
 template class elf::ELFFileBase<ELF64BE>;
 
 template class elf::ObjectFile<ELF32LE>;
 template class elf::ObjectFile<ELF32BE>;
 template class elf::ObjectFile<ELF64LE>;
 template class elf::ObjectFile<ELF64BE>;
 
 template class elf::SharedFile<ELF32LE>;
 template class elf::SharedFile<ELF32BE>;
 template class elf::SharedFile<ELF64LE>;
 template class elf::SharedFile<ELF64BE>;
 
 template void BinaryFile::parse<ELF32LE>();
 template void BinaryFile::parse<ELF32BE>();
 template void BinaryFile::parse<ELF64LE>();
 template void BinaryFile::parse<ELF64BE>();
Index: vendor/lld/dist/ELF/InputFiles.h
===================================================================
--- vendor/lld/dist/ELF/InputFiles.h	(revision 320020)
+++ vendor/lld/dist/ELF/InputFiles.h	(revision 320021)
@@ -1,339 +1,342 @@
 //===- InputFiles.h ---------------------------------------------*- C++ -*-===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLD_ELF_INPUT_FILES_H
 #define LLD_ELF_INPUT_FILES_H
 
 #include "Config.h"
 #include "InputSection.h"
 #include "Error.h"
 #include "Symbols.h"
 
 #include "lld/Core/LLVM.h"
 #include "lld/Core/Reproduce.h"
 #include "llvm/ADT/CachedHashString.h"
 #include "llvm/ADT/DenseSet.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/IR/Comdat.h"
 #include "llvm/Object/Archive.h"
 #include "llvm/Object/ELF.h"
 #include "llvm/Object/IRObjectFile.h"
 
 #include <map>
 
 namespace llvm {
 class DWARFDebugLine;
 class TarWriter;
 struct DILineInfo;
 namespace lto {
 class InputFile;
 }
 }
 
 namespace lld {
 namespace elf {
 class InputFile;
 }
 
 // Returns "(internal)", "foo.a(bar.o)" or "baz.o".
 std::string toString(const elf::InputFile *F);
 
 namespace elf {
 
 using llvm::object::Archive;
 
 class Lazy;
 class SymbolBody;
 
 // If -reproduce option is given, all input files are written
 // to this tar archive.
 extern llvm::TarWriter *Tar;
 
 // Opens a given file.
 llvm::Optional<MemoryBufferRef> readFile(StringRef Path);
 
 // The root class of input files.
 class InputFile {
 public:
   enum Kind {
     ObjectKind,
     SharedKind,
     LazyObjectKind,
     ArchiveKind,
     BitcodeKind,
     BinaryKind,
   };
 
   Kind kind() const { return FileKind; }
 
   StringRef getName() const { return MB.getBufferIdentifier(); }
   MemoryBufferRef MB;
 
   // Returns sections. It is a runtime error to call this function
   // on files that don't have the notion of sections.
   ArrayRef<InputSectionBase *> getSections() const {
     assert(FileKind == ObjectKind || FileKind == BinaryKind);
     return Sections;
   }
 
   // Filename of .a which contained this file. If this file was
   // not in an archive file, it is the empty string. We use this
   // string for creating error messages.
   StringRef ArchiveName;
 
   // If this is an architecture-specific file, the following members
   // have ELF type (i.e. ELF{32,64}{LE,BE}) and target machine type.
   ELFKind EKind = ELFNoneKind;
   uint16_t EMachine = llvm::ELF::EM_NONE;
   uint8_t OSABI = 0;
 
   // Cache for toString(). Only toString() should use this member.
   mutable std::string ToStringCache;
 
 protected:
   InputFile(Kind K, MemoryBufferRef M);
   std::vector<InputSectionBase *> Sections;
 
 private:
   const Kind FileKind;
 };
 
 template <typename ELFT> class ELFFileBase : public InputFile {
 public:
   typedef typename ELFT::Shdr Elf_Shdr;
   typedef typename ELFT::Sym Elf_Sym;
   typedef typename ELFT::Word Elf_Word;
   typedef typename ELFT::SymRange Elf_Sym_Range;
 
   ELFFileBase(Kind K, MemoryBufferRef M);
   static bool classof(const InputFile *F) {
     Kind K = F->kind();
     return K == ObjectKind || K == SharedKind;
   }
 
   llvm::object::ELFFile<ELFT> getObj() const {
     return llvm::object::ELFFile<ELFT>(MB.getBuffer());
   }
 
   StringRef getStringTable() const { return StringTable; }
 
   uint32_t getSectionIndex(const Elf_Sym &Sym) const;
 
   Elf_Sym_Range getGlobalSymbols();
 
 protected:
   ArrayRef<Elf_Sym> Symbols;
   uint32_t FirstNonLocal = 0;
   ArrayRef<Elf_Word> SymtabSHNDX;
   StringRef StringTable;
   void initSymtab(ArrayRef<Elf_Shdr> Sections, const Elf_Shdr *Symtab);
 };
 
 // .o file.
 template <class ELFT> class ObjectFile : public ELFFileBase<ELFT> {
   typedef ELFFileBase<ELFT> Base;
   typedef typename ELFT::Rel Elf_Rel;
   typedef typename ELFT::Rela Elf_Rela;
   typedef typename ELFT::Sym Elf_Sym;
   typedef typename ELFT::Shdr Elf_Shdr;
   typedef typename ELFT::Word Elf_Word;
 
   StringRef getShtGroupSignature(ArrayRef<Elf_Shdr> Sections,
                                  const Elf_Shdr &Sec);
   ArrayRef<Elf_Word> getShtGroupEntries(const Elf_Shdr &Sec);
 
 public:
   static bool classof(const InputFile *F) {
     return F->kind() == Base::ObjectKind;
   }
 
   ArrayRef<SymbolBody *> getSymbols();
   ArrayRef<SymbolBody *> getLocalSymbols();
 
   ObjectFile(MemoryBufferRef M, StringRef ArchiveName);
   void parse(llvm::DenseSet<llvm::CachedHashStringRef> &ComdatGroups);
 
   InputSectionBase *getSection(const Elf_Sym &Sym) const;
 
   SymbolBody &getSymbolBody(uint32_t SymbolIndex) const {
     if (SymbolIndex >= SymbolBodies.size())
       fatal(toString(this) + ": invalid symbol index");
     return *SymbolBodies[SymbolIndex];
   }
 
   template <typename RelT>
   SymbolBody &getRelocTargetSym(const RelT &Rel) const {
     uint32_t SymIndex = Rel.getSymbol(Config->IsMips64EL);
     return getSymbolBody(SymIndex);
   }
 
   // Returns source line information for a given offset.
   // If no information is available, returns "".
   std::string getLineInfo(InputSectionBase *S, uint64_t Offset);
   llvm::Optional<llvm::DILineInfo> getDILineInfo(InputSectionBase *, uint64_t);
 
   // MIPS GP0 value defined by this file. This value represents the gp value
   // used to create the relocatable object and required to support
   // R_MIPS_GPREL16 / R_MIPS_GPREL32 relocations.
   uint32_t MipsGp0 = 0;
 
   // Name of source file obtained from STT_FILE symbol value,
   // or empty string if there is no such symbol in object file
   // symbol table.
   StringRef SourceFile;
 
 private:
   void
   initializeSections(llvm::DenseSet<llvm::CachedHashStringRef> &ComdatGroups);
   void initializeSymbols();
   void initializeDwarfLine();
   InputSectionBase *getRelocTarget(const Elf_Shdr &Sec);
-  InputSectionBase *createInputSection(const Elf_Shdr &Sec,
-                                       StringRef SectionStringTable);
+  InputSectionBase *createInputSection(const Elf_Shdr &Sec);
+  StringRef getSectionName(const Elf_Shdr &Sec);
 
   bool shouldMerge(const Elf_Shdr &Sec);
   SymbolBody *createSymbolBody(const Elf_Sym *Sym);
 
   // List of all symbols referenced or defined by this file.
   std::vector<SymbolBody *> SymbolBodies;
+
+  // .shstrtab contents.
+  StringRef SectionStringTable;
 
   // Debugging information to retrieve source file and line for error
   // reporting. Linker may find reasonable number of errors in a
   // single object file, so we cache debugging information in order to
   // parse it only once for each object file we link.
   std::unique_ptr<llvm::DWARFDebugLine> DwarfLine;
 };
 
 // LazyObjectFile is analogous to ArchiveFile in the sense that
 // the file contains lazy symbols. The difference is that
 // LazyObjectFile wraps a single file instead of multiple files.
 //
 // This class is used for --start-lib and --end-lib options which
 // instruct the linker to link object files between them with the
 // archive file semantics.
 class LazyObjectFile : public InputFile {
 public:
   LazyObjectFile(MemoryBufferRef M, StringRef ArchiveName,
                  uint64_t OffsetInArchive)
       : InputFile(LazyObjectKind, M), OffsetInArchive(OffsetInArchive) {
     this->ArchiveName = ArchiveName;
   }
 
   static bool classof(const InputFile *F) {
     return F->kind() == LazyObjectKind;
   }
 
   template <class ELFT> void parse();
   MemoryBufferRef getBuffer();
   InputFile *fetch();
 
 private:
   std::vector<StringRef> getSymbols();
   template <class ELFT> std::vector<StringRef> getElfSymbols();
   std::vector<StringRef> getBitcodeSymbols();
 
   bool Seen = false;
   uint64_t OffsetInArchive;
 };
 
 // An ArchiveFile object represents a .a file.
 class ArchiveFile : public InputFile {
 public:
   explicit ArchiveFile(std::unique_ptr<Archive> &&File);
   static bool classof(const InputFile *F) { return F->kind() == ArchiveKind; }
   template <class ELFT> void parse();
 
   // Returns a memory buffer for a given symbol and the offset in the archive
   // for the member. An empty memory buffer and an offset of zero
   // is returned if we have already returned the same memory buffer.
   // (So that we don't instantiate same members more than once.)
   std::pair<MemoryBufferRef, uint64_t> getMember(const Archive::Symbol *Sym);
 
 private:
   std::unique_ptr<Archive> File;
   llvm::DenseSet<uint64_t> Seen;
 };
 
 class BitcodeFile : public InputFile {
 public:
   BitcodeFile(MemoryBufferRef M, StringRef ArchiveName,
               uint64_t OffsetInArchive);
   static bool classof(const InputFile *F) { return F->kind() == BitcodeKind; }
   template <class ELFT>
   void parse(llvm::DenseSet<llvm::CachedHashStringRef> &ComdatGroups);
   ArrayRef<Symbol *> getSymbols() { return Symbols; }
   std::unique_ptr<llvm::lto::InputFile> Obj;
 
 private:
   std::vector<Symbol *> Symbols;
 };
 
 // .so file.
 template <class ELFT> class SharedFile : public ELFFileBase<ELFT> {
   typedef ELFFileBase<ELFT> Base;
   typedef typename ELFT::Dyn Elf_Dyn;
   typedef typename ELFT::Shdr Elf_Shdr;
   typedef typename ELFT::Sym Elf_Sym;
   typedef typename ELFT::SymRange Elf_Sym_Range;
   typedef typename ELFT::Verdef Elf_Verdef;
   typedef typename ELFT::Versym Elf_Versym;
 
   std::vector<StringRef> Undefs;
   const Elf_Shdr *VersymSec = nullptr;
   const Elf_Shdr *VerdefSec = nullptr;
 
 public:
   std::string SoName;
 
   const Elf_Shdr *getSection(const Elf_Sym &Sym) const;
   llvm::ArrayRef<StringRef> getUndefinedSymbols() { return Undefs; }
 
   static bool classof(const InputFile *F) {
     return F->kind() == Base::SharedKind;
   }
 
   SharedFile(MemoryBufferRef M, StringRef DefaultSoName);
 
   void parseSoName();
   void parseRest();
   std::vector<const Elf_Verdef *> parseVerdefs(const Elf_Versym *&Versym);
 
   struct NeededVer {
     // The string table offset of the version name in the output file.
     size_t StrTab;
 
     // The version identifier for this version name.
     uint16_t Index;
   };
 
   // Mapping from Elf_Verdef data structures to information about Elf_Vernaux
   // data structures in the output file.
   std::map<const Elf_Verdef *, NeededVer> VerdefMap;
 
   // Used for --as-needed
   bool AsNeeded = false;
   bool IsUsed = false;
   bool isNeeded() const { return !AsNeeded || IsUsed; }
 };
 
 class BinaryFile : public InputFile {
 public:
   explicit BinaryFile(MemoryBufferRef M) : InputFile(BinaryKind, M) {}
   static bool classof(const InputFile *F) { return F->kind() == BinaryKind; }
   template <class ELFT> void parse();
 };
 
 InputFile *createObjectFile(MemoryBufferRef MB, StringRef ArchiveName = "",
                             uint64_t OffsetInArchive = 0);
 InputFile *createSharedFile(MemoryBufferRef MB, StringRef DefaultSoName);
 
 } // namespace elf
 } // namespace lld
 
 #endif
Index: vendor/lld/dist/ELF/InputSection.cpp
===================================================================
--- vendor/lld/dist/ELF/InputSection.cpp	(revision 320020)
+++ vendor/lld/dist/ELF/InputSection.cpp	(revision 320021)
@@ -1,1005 +1,1015 @@
 //===- InputSection.cpp ---------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #include "InputSection.h"
 #include "Config.h"
 #include "EhFrame.h"
 #include "Error.h"
 #include "InputFiles.h"
 #include "LinkerScript.h"
 #include "Memory.h"
 #include "OutputSections.h"
 #include "Relocations.h"
 #include "SyntheticSections.h"
 #include "Target.h"
 #include "Thunks.h"
 #include "llvm/Object/Decompressor.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/Compression.h"
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/Threading.h"
 #include <mutex>
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
 using namespace llvm::support;
 using namespace llvm::support::endian;
 using namespace llvm::sys;
 
 using namespace lld;
 using namespace lld::elf;
 
 std::vector<InputSectionBase *> elf::InputSections;
 
 // Returns a string to construct an error message.
 std::string lld::toString(const InputSectionBase *Sec) {
   return (toString(Sec->File) + ":(" + Sec->Name + ")").str();
 }
 
 template <class ELFT>
 static ArrayRef<uint8_t> getSectionContents(elf::ObjectFile<ELFT> *File,
                                             const typename ELFT::Shdr *Hdr) {
   if (!File || Hdr->sh_type == SHT_NOBITS)
     return makeArrayRef<uint8_t>(nullptr, Hdr->sh_size);
   return check(File->getObj().getSectionContents(Hdr));
 }
 
 InputSectionBase::InputSectionBase(InputFile *File, uint64_t Flags,
                                    uint32_t Type, uint64_t Entsize,
                                    uint32_t Link, uint32_t Info,
                                    uint32_t Alignment, ArrayRef<uint8_t> Data,
                                    StringRef Name, Kind SectionKind)
     : SectionBase(SectionKind, Name, Flags, Entsize, Alignment, Type, Info,
                   Link),
       File(File), Data(Data), Repl(this) {
   Live = !Config->GcSections || !(Flags & SHF_ALLOC);
   Assigned = false;
   NumRelocations = 0;
   AreRelocsRela = false;
 
   // The ELF spec states that a value of 0 means the section has
   // no alignment constraits.
   uint32_t V = std::max<uint64_t>(Alignment, 1);
   if (!isPowerOf2_64(V))
     fatal(toString(File) + ": section sh_addralign is not a power of 2");
   this->Alignment = V;
 }
 
 // Drop SHF_GROUP bit unless we are producing a re-linkable object file.
 // SHF_GROUP is a marker that a section belongs to some comdat group.
 // That flag doesn't make sense in an executable.
 static uint64_t getFlags(uint64_t Flags) {
   Flags &= ~(uint64_t)SHF_INFO_LINK;
   if (!Config->Relocatable)
     Flags &= ~(uint64_t)SHF_GROUP;
   return Flags;
 }
 
 // GNU assembler 2.24 and LLVM 4.0.0's MC (the newest release as of
 // March 2017) fail to infer section types for sections starting with
 // ".init_array." or ".fini_array.". They set SHT_PROGBITS instead of
 // SHF_INIT_ARRAY. As a result, the following assembler directive
 // creates ".init_array.100" with SHT_PROGBITS, for example.
 //
 //   .section .init_array.100, "aw"
 //
 // This function forces SHT_{INIT,FINI}_ARRAY so that we can handle
 // incorrect inputs as if they were correct from the beginning.
 static uint64_t getType(uint64_t Type, StringRef Name) {
   if (Type == SHT_PROGBITS && Name.startswith(".init_array."))
     return SHT_INIT_ARRAY;
   if (Type == SHT_PROGBITS && Name.startswith(".fini_array."))
     return SHT_FINI_ARRAY;
   return Type;
 }
 
 template <class ELFT>
 InputSectionBase::InputSectionBase(elf::ObjectFile<ELFT> *File,
                                    const typename ELFT::Shdr *Hdr,
                                    StringRef Name, Kind SectionKind)
     : InputSectionBase(File, getFlags(Hdr->sh_flags),
                        getType(Hdr->sh_type, Name), Hdr->sh_entsize,
                        Hdr->sh_link, Hdr->sh_info, Hdr->sh_addralign,
                        getSectionContents(File, Hdr), Name, SectionKind) {
   // We reject object files having insanely large alignments even though
   // they are allowed by the spec. I think 4GB is a reasonable limitation.
   // We might want to relax this in the future.
   if (Hdr->sh_addralign > UINT32_MAX)
     fatal(toString(File) + ": section sh_addralign is too large");
 }
 
 size_t InputSectionBase::getSize() const {
   if (auto *S = dyn_cast<SyntheticSection>(this))
     return S->getSize();
 
   return Data.size();
 }
 
 uint64_t InputSectionBase::getOffsetInFile() const {
   const uint8_t *FileStart = (const uint8_t *)File->MB.getBufferStart();
   const uint8_t *SecStart = Data.begin();
   return SecStart - FileStart;
 }
 
 uint64_t SectionBase::getOffset(uint64_t Offset) const {
   switch (kind()) {
   case Output: {
     auto *OS = cast<OutputSection>(this);
     // For output sections we treat offset -1 as the end of the section.
     return Offset == uint64_t(-1) ? OS->Size : Offset;
   }
   case Regular:
     return cast<InputSection>(this)->OutSecOff + Offset;
   case Synthetic: {
     auto *IS = cast<InputSection>(this);
     // For synthetic sections we treat offset -1 as the end of the section.
     return IS->OutSecOff + (Offset == uint64_t(-1) ? IS->getSize() : Offset);
   }
   case EHFrame:
     // The file crtbeginT.o has relocations pointing to the start of an empty
     // .eh_frame that is known to be the first in the link. It does that to
     // identify the start of the output .eh_frame.
     return Offset;
   case Merge:
     const MergeInputSection *MS = cast<MergeInputSection>(this);
     if (InputSection *IS = MS->getParent())
       return IS->OutSecOff + MS->getOffset(Offset);
     return MS->getOffset(Offset);
   }
   llvm_unreachable("invalid section kind");
 }
 
 OutputSection *SectionBase::getOutputSection() {
   InputSection *Sec;
   if (auto *IS = dyn_cast<InputSection>(this))
     Sec = IS;
   else if (auto *MS = dyn_cast<MergeInputSection>(this))
     Sec = MS->getParent();
   else if (auto *EH = dyn_cast<EhInputSection>(this))
     Sec = EH->getParent();
   else
     return cast<OutputSection>(this);
   return Sec ? Sec->getParent() : nullptr;
 }
 
 // Uncompress section contents. Note that this function is called
 // from parallel_for_each, so it must be thread-safe.
 void InputSectionBase::uncompress() {
   Decompressor Dec = check(Decompressor::create(Name, toStringRef(Data),
                                                 Config->IsLE, Config->Is64));
 
   size_t Size = Dec.getDecompressedSize();
   char *OutputBuf;
   {
     static std::mutex Mu;
     std::lock_guard<std::mutex> Lock(Mu);
     OutputBuf = BAlloc.Allocate<char>(Size);
   }
 
   if (Error E = Dec.decompress({OutputBuf, Size}))
     fatal(toString(this) +
           ": decompress failed: " + llvm::toString(std::move(E)));
   this->Data = ArrayRef<uint8_t>((uint8_t *)OutputBuf, Size);
   this->Flags &= ~(uint64_t)SHF_COMPRESSED;
 }
 
 uint64_t SectionBase::getOffset(const DefinedRegular &Sym) const {
   return getOffset(Sym.Value);
 }
 
 InputSection *InputSectionBase::getLinkOrderDep() const {
   if ((Flags & SHF_LINK_ORDER) && Link != 0) {
     InputSectionBase *L = File->getSections()[Link];
     if (auto *IS = dyn_cast<InputSection>(L))
       return IS;
     error(
         "Merge and .eh_frame sections are not supported with SHF_LINK_ORDER " +
         toString(L));
   }
   return nullptr;
 }
 
 // Returns a source location string. Used to construct an error message.
 template <class ELFT>
 std::string InputSectionBase::getLocation(uint64_t Offset) {
   // We don't have file for synthetic sections.
   if (getFile<ELFT>() == nullptr)
     return (Config->OutputFile + ":(" + Name + "+0x" + utohexstr(Offset) + ")")
         .str();
 
   // First check if we can get desired values from debugging information.
   std::string LineInfo = getFile<ELFT>()->getLineInfo(this, Offset);
   if (!LineInfo.empty())
     return LineInfo;
 
   // File->SourceFile contains STT_FILE symbol that contains a
   // source file name. If it's missing, we use an object file name.
   std::string SrcFile = getFile<ELFT>()->SourceFile;
   if (SrcFile.empty())
     SrcFile = toString(File);
 
   // Find a function symbol that encloses a given location.
   for (SymbolBody *B : getFile<ELFT>()->getSymbols())
     if (auto *D = dyn_cast<DefinedRegular>(B))
       if (D->Section == this && D->Type == STT_FUNC)
         if (D->Value <= Offset && Offset < D->Value + D->Size)
           return SrcFile + ":(function " + toString(*D) + ")";
 
   // If there's no symbol, print out the offset in the section.
   return (SrcFile + ":(" + Name + "+0x" + utohexstr(Offset) + ")").str();
 }
 
 // Returns a source location string. This function is intended to be
 // used for constructing an error message. The returned message looks
 // like this:
 //
 //   foo.c:42 (/home/alice/possibly/very/long/path/foo.c:42)
 //
 // Returns an empty string if there's no way to get line info.
 template <class ELFT> std::string InputSectionBase::getSrcMsg(uint64_t Offset) {
   // Synthetic sections don't have input files.
   elf::ObjectFile<ELFT> *File = getFile<ELFT>();
   if (!File)
     return "";
 
   Optional<DILineInfo> Info = File->getDILineInfo(this, Offset);
 
   // File->SourceFile contains STT_FILE symbol, and that is a last resort.
   if (!Info)
     return File->SourceFile;
 
   std::string Path = Info->FileName;
   std::string Filename = path::filename(Path);
   std::string Lineno = ":" + std::to_string(Info->Line);
   if (Filename == Path)
     return Filename + Lineno;
   return Filename + Lineno + " (" + Path + Lineno + ")";
 }
 
 // Returns a filename string along with an optional section name. This
 // function is intended to be used for constructing an error
 // message. The returned message looks like this:
 //
 //   path/to/foo.o:(function bar)
 //
 // or
 //
 //   path/to/foo.o:(function bar) in archive path/to/bar.a
 template <class ELFT> std::string InputSectionBase::getObjMsg(uint64_t Off) {
   // Synthetic sections don't have input files.
   elf::ObjectFile<ELFT> *File = getFile<ELFT>();
   std::string Filename = File ? File->getName() : "(internal)";
 
   std::string Archive;
   if (!File->ArchiveName.empty())
     Archive = (" in archive " + File->ArchiveName).str();
 
   // Find a symbol that encloses a given location.
   for (SymbolBody *B : getFile<ELFT>()->getSymbols())
     if (auto *D = dyn_cast<DefinedRegular>(B))
       if (D->Section == this && D->Value <= Off && Off < D->Value + D->Size)
         return Filename + ":(" + toString(*D) + ")" + Archive;
 
   // If there's no symbol, print out the offset in the section.
   return (Filename + ":(" + Name + "+0x" + utohexstr(Off) + ")" + Archive)
       .str();
 }
 
 InputSectionBase InputSectionBase::Discarded;
 
 InputSection::InputSection(uint64_t Flags, uint32_t Type, uint32_t Alignment,
                            ArrayRef<uint8_t> Data, StringRef Name, Kind K)
     : InputSectionBase(nullptr, Flags, Type,
                        /*Entsize*/ 0, /*Link*/ 0, /*Info*/ 0, Alignment, Data,
                        Name, K) {}
 
 template <class ELFT>
 InputSection::InputSection(elf::ObjectFile<ELFT> *F,
                            const typename ELFT::Shdr *Header, StringRef Name)
     : InputSectionBase(F, Header, Name, InputSectionBase::Regular) {}
 
 bool InputSection::classof(const SectionBase *S) {
   return S->kind() == SectionBase::Regular ||
          S->kind() == SectionBase::Synthetic;
 }
 
 bool InputSectionBase::classof(const SectionBase *S) {
   return S->kind() != Output;
 }
 
 OutputSection *InputSection::getParent() const {
   return cast_or_null<OutputSection>(Parent);
 }
 
 // Copy SHT_GROUP section contents. Used only for the -r option.
 template <class ELFT> void InputSection::copyShtGroup(uint8_t *Buf) {
   // ELFT::Word is the 32-bit integral type in the target endianness.
   typedef typename ELFT::Word u32;
   ArrayRef<u32> From = getDataAs<u32>();
   auto *To = reinterpret_cast<u32 *>(Buf);
 
   // The first entry is not a section number but a flag.
   *To++ = From[0];
 
   // Adjust section numbers because section numbers in an input object
   // files are different in the output.
   ArrayRef<InputSectionBase *> Sections = this->File->getSections();
   for (uint32_t Idx : From.slice(1))
     *To++ = Sections[Idx]->getOutputSection()->SectionIndex;
 }
 
 InputSectionBase *InputSection::getRelocatedSection() {
   assert(this->Type == SHT_RELA || this->Type == SHT_REL);
   ArrayRef<InputSectionBase *> Sections = this->File->getSections();
   return Sections[this->Info];
 }
 
 // This is used for -r and --emit-relocs. We can't use memcpy to copy
 // relocations because we need to update symbol table offset and section index
 // for each relocation. So we copy relocations one by one.
 template <class ELFT, class RelTy>
 void InputSection::copyRelocations(uint8_t *Buf, ArrayRef<RelTy> Rels) {
   InputSectionBase *RelocatedSection = getRelocatedSection();
 
   // Loop is slow and have complexity O(N*M), where N - amount of
   // relocations and M - amount of symbols in symbol table.
   // That happens because getSymbolIndex(...) call below performs
   // simple linear search.
   for (const RelTy &Rel : Rels) {
     uint32_t Type = Rel.getType(Config->IsMips64EL);
     SymbolBody &Body = this->getFile<ELFT>()->getRelocTargetSym(Rel);
 
     auto *P = reinterpret_cast<typename ELFT::Rela *>(Buf);
     Buf += sizeof(RelTy);
 
     if (Config->IsRela)
       P->r_addend = getAddend<ELFT>(Rel);
 
     // Output section VA is zero for -r, so r_offset is an offset within the
     // section, but for --emit-relocs it is an virtual address.
     P->r_offset = RelocatedSection->getOutputSection()->Addr +
                   RelocatedSection->getOffset(Rel.r_offset);
     P->setSymbolAndType(InX::SymTab->getSymbolIndex(&Body), Type,
                         Config->IsMips64EL);
 
     if (Body.Type == STT_SECTION) {
       // We combine multiple section symbols into only one per
       // section. This means we have to update the addend. That is
       // trivial for Elf_Rela, but for Elf_Rel we have to write to the
       // section data. We do that by adding to the Relocation vector.
 
       // .eh_frame is horribly special and can reference discarded sections. To
       // avoid having to parse and recreate .eh_frame, we just replace any
       // relocation in it pointing to discarded sections with R_*_NONE, which
       // hopefully creates a frame that is ignored at runtime.
       SectionBase *Section = cast<DefinedRegular>(Body).Section;
       if (Section == &InputSection::Discarded) {
         P->setSymbolAndType(0, 0, false);
         continue;
       }
 
       if (Config->IsRela) {
         P->r_addend += Body.getVA() - Section->getOutputSection()->Addr;
       } else if (Config->Relocatable) {
         const uint8_t *BufLoc = RelocatedSection->Data.begin() + Rel.r_offset;
         RelocatedSection->Relocations.push_back(
             {R_ABS, Type, Rel.r_offset, Target->getImplicitAddend(BufLoc, Type),
              &Body});
       }
     }
 
   }
 }
 
 static uint32_t getARMUndefinedRelativeWeakVA(uint32_t Type, uint32_t A,
                                               uint32_t P) {
   switch (Type) {
   case R_ARM_THM_JUMP11:
-    return P + 2;
+    return P + 2 + A;
   case R_ARM_CALL:
   case R_ARM_JUMP24:
   case R_ARM_PC24:
   case R_ARM_PLT32:
   case R_ARM_PREL31:
   case R_ARM_THM_JUMP19:
   case R_ARM_THM_JUMP24:
-    return P + 4;
+    return P + 4 + A;
   case R_ARM_THM_CALL:
     // We don't want an interworking BLX to ARM
-    return P + 5;
+    return P + 5 + A;
   default:
-    return A;
+    return P + A;
   }
 }
 
 static uint64_t getAArch64UndefinedRelativeWeakVA(uint64_t Type, uint64_t A,
                                                   uint64_t P) {
   switch (Type) {
   case R_AARCH64_CALL26:
   case R_AARCH64_CONDBR19:
   case R_AARCH64_JUMP26:
   case R_AARCH64_TSTBR14:
-    return P + 4;
+    return P + 4 + A;
   default:
-    return A;
+    return P + A;
   }
 }
 
 // ARM SBREL relocations are of the form S + A - B where B is the static base
 // The ARM ABI defines base to be "addressing origin of the output segment
 // defining the symbol S". We defined the "addressing origin"/static base to be
 // the base of the PT_LOAD segment containing the Body.
 // The procedure call standard only defines a Read Write Position Independent
 // RWPI variant so in practice we should expect the static base to be the base
 // of the RW segment.
 static uint64_t getARMStaticBase(const SymbolBody &Body) {
   OutputSection *OS = Body.getOutputSection();
   if (!OS || !OS->FirstInPtLoad)
     fatal("SBREL relocation to " + Body.getName() + " without static base\n");
   return OS->FirstInPtLoad->Addr;
 }
 
 static uint64_t getRelocTargetVA(uint32_t Type, int64_t A, uint64_t P,
                                  const SymbolBody &Body, RelExpr Expr) {
   switch (Expr) {
   case R_ABS:
   case R_RELAX_GOT_PC_NOPIC:
     return Body.getVA(A);
   case R_ARM_SBREL:
     return Body.getVA(A) - getARMStaticBase(Body);
   case R_GOT:
   case R_RELAX_TLS_GD_TO_IE_ABS:
     return Body.getGotVA() + A;
   case R_GOTONLY_PC:
     return InX::Got->getVA() + A - P;
   case R_GOTONLY_PC_FROM_END:
     return InX::Got->getVA() + A - P + InX::Got->getSize();
   case R_GOTREL:
     return Body.getVA(A) - InX::Got->getVA();
   case R_GOTREL_FROM_END:
     return Body.getVA(A) - InX::Got->getVA() - InX::Got->getSize();
   case R_GOT_FROM_END:
   case R_RELAX_TLS_GD_TO_IE_END:
     return Body.getGotOffset() + A - InX::Got->getSize();
   case R_GOT_OFF:
     return Body.getGotOffset() + A;
   case R_GOT_PAGE_PC:
   case R_RELAX_TLS_GD_TO_IE_PAGE_PC:
     return getAArch64Page(Body.getGotVA() + A) - getAArch64Page(P);
   case R_GOT_PC:
   case R_RELAX_TLS_GD_TO_IE:
     return Body.getGotVA() + A - P;
   case R_HINT:
   case R_NONE:
   case R_TLSDESC_CALL:
     llvm_unreachable("cannot relocate hint relocs");
   case R_MIPS_GOTREL:
     return Body.getVA(A) - InX::MipsGot->getGp();
   case R_MIPS_GOT_GP:
     return InX::MipsGot->getGp() + A;
   case R_MIPS_GOT_GP_PC: {
     // R_MIPS_LO16 expression has R_MIPS_GOT_GP_PC type iif the target
     // is _gp_disp symbol. In that case we should use the following
     // formula for calculation "AHL + GP - P + 4". For details see p. 4-19 at
     // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
     uint64_t V = InX::MipsGot->getGp() + A - P;
     if (Type == R_MIPS_LO16)
       V += 4;
     return V;
   }
   case R_MIPS_GOT_LOCAL_PAGE:
     // If relocation against MIPS local symbol requires GOT entry, this entry
     // should be initialized by 'page address'. This address is high 16-bits
     // of sum the symbol's value and the addend.
     return InX::MipsGot->getVA() + InX::MipsGot->getPageEntryOffset(Body, A) -
            InX::MipsGot->getGp();
   case R_MIPS_GOT_OFF:
   case R_MIPS_GOT_OFF32:
     // In case of MIPS if a GOT relocation has non-zero addend this addend
     // should be applied to the GOT entry content not to the GOT entry offset.
     // That is why we use separate expression type.
     return InX::MipsGot->getVA() + InX::MipsGot->getBodyEntryOffset(Body, A) -
            InX::MipsGot->getGp();
   case R_MIPS_TLSGD:
     return InX::MipsGot->getVA() + InX::MipsGot->getTlsOffset() +
            InX::MipsGot->getGlobalDynOffset(Body) - InX::MipsGot->getGp();
   case R_MIPS_TLSLD:
     return InX::MipsGot->getVA() + InX::MipsGot->getTlsOffset() +
            InX::MipsGot->getTlsIndexOff() - InX::MipsGot->getGp();
   case R_PAGE_PC:
-  case R_PLT_PAGE_PC:
+  case R_PLT_PAGE_PC: {
+    uint64_t Dest;
     if (Body.isUndefined() && !Body.isLocal() && Body.symbol()->isWeak())
-      return getAArch64Page(A);
-    return getAArch64Page(Body.getVA(A)) - getAArch64Page(P);
-  case R_PC:
+      Dest = getAArch64Page(A);
+    else
+      Dest = getAArch64Page(Body.getVA(A));
+    return Dest - getAArch64Page(P);
+  }
+  case R_PC: {
+    uint64_t Dest;
     if (Body.isUndefined() && !Body.isLocal() && Body.symbol()->isWeak()) {
       // On ARM and AArch64 a branch to an undefined weak resolves to the
       // next instruction, otherwise the place.
       if (Config->EMachine == EM_ARM)
-        return getARMUndefinedRelativeWeakVA(Type, A, P);
-      if (Config->EMachine == EM_AARCH64)
-        return getAArch64UndefinedRelativeWeakVA(Type, A, P);
+        Dest = getARMUndefinedRelativeWeakVA(Type, A, P);
+      else if (Config->EMachine == EM_AARCH64)
+        Dest = getAArch64UndefinedRelativeWeakVA(Type, A, P);
+      else
+        Dest = Body.getVA(A);
+    } else {
+      Dest = Body.getVA(A);
     }
-    return Body.getVA(A) - P;
+    return Dest - P;
+  }
   case R_PLT:
     return Body.getPltVA() + A;
   case R_PLT_PC:
   case R_PPC_PLT_OPD:
     return Body.getPltVA() + A - P;
   case R_PPC_OPD: {
     uint64_t SymVA = Body.getVA(A);
     // If we have an undefined weak symbol, we might get here with a symbol
     // address of zero. That could overflow, but the code must be unreachable,
     // so don't bother doing anything at all.
     if (!SymVA)
       return 0;
     if (Out::Opd) {
       // If this is a local call, and we currently have the address of a
       // function-descriptor, get the underlying code address instead.
       uint64_t OpdStart = Out::Opd->Addr;
       uint64_t OpdEnd = OpdStart + Out::Opd->Size;
       bool InOpd = OpdStart <= SymVA && SymVA < OpdEnd;
       if (InOpd)
         SymVA = read64be(&Out::OpdBuf[SymVA - OpdStart]);
     }
     return SymVA - P;
   }
   case R_PPC_TOC:
     return getPPC64TocBase() + A;
   case R_RELAX_GOT_PC:
     return Body.getVA(A) - P;
   case R_RELAX_TLS_GD_TO_LE:
   case R_RELAX_TLS_IE_TO_LE:
   case R_RELAX_TLS_LD_TO_LE:
   case R_TLS:
     // A weak undefined TLS symbol resolves to the base of the TLS
     // block, i.e. gets a value of zero. If we pass --gc-sections to
     // lld and .tbss is not referenced, it gets reclaimed and we don't
     // create a TLS program header. Therefore, we resolve this
     // statically to zero.
     if (Body.isTls() && (Body.isLazy() || Body.isUndefined()) &&
         Body.symbol()->isWeak())
       return 0;
     if (Target->TcbSize)
       return Body.getVA(A) + alignTo(Target->TcbSize, Out::TlsPhdr->p_align);
     return Body.getVA(A) - Out::TlsPhdr->p_memsz;
   case R_RELAX_TLS_GD_TO_LE_NEG:
   case R_NEG_TLS:
     return Out::TlsPhdr->p_memsz - Body.getVA(A);
   case R_SIZE:
     return A; // Body.getSize was already folded into the addend.
   case R_TLSDESC:
     return InX::Got->getGlobalDynAddr(Body) + A;
   case R_TLSDESC_PAGE:
     return getAArch64Page(InX::Got->getGlobalDynAddr(Body) + A) -
            getAArch64Page(P);
   case R_TLSGD:
     return InX::Got->getGlobalDynOffset(Body) + A - InX::Got->getSize();
   case R_TLSGD_PC:
     return InX::Got->getGlobalDynAddr(Body) + A - P;
   case R_TLSLD:
     return InX::Got->getTlsIndexOff() + A - InX::Got->getSize();
   case R_TLSLD_PC:
     return InX::Got->getTlsIndexVA() + A - P;
   }
   llvm_unreachable("Invalid expression");
 }
 
 // This function applies relocations to sections without SHF_ALLOC bit.
 // Such sections are never mapped to memory at runtime. Debug sections are
 // an example. Relocations in non-alloc sections are much easier to
 // handle than in allocated sections because it will never need complex
 // treatement such as GOT or PLT (because at runtime no one refers them).
 // So, we handle relocations for non-alloc sections directly in this
 // function as a performance optimization.
 template <class ELFT, class RelTy>
 void InputSection::relocateNonAlloc(uint8_t *Buf, ArrayRef<RelTy> Rels) {
   for (const RelTy &Rel : Rels) {
     uint32_t Type = Rel.getType(Config->IsMips64EL);
     uint64_t Offset = getOffset(Rel.r_offset);
     uint8_t *BufLoc = Buf + Offset;
     int64_t Addend = getAddend<ELFT>(Rel);
     if (!RelTy::IsRela)
       Addend += Target->getImplicitAddend(BufLoc, Type);
 
     SymbolBody &Sym = this->getFile<ELFT>()->getRelocTargetSym(Rel);
     RelExpr Expr = Target->getRelExpr(Type, Sym, BufLoc);
     if (Expr == R_NONE)
       continue;
     if (Expr != R_ABS) {
       error(this->getLocation<ELFT>(Offset) + ": has non-ABS reloc");
       return;
     }
 
     uint64_t AddrLoc = getParent()->Addr + Offset;
     uint64_t SymVA = 0;
     if (!Sym.isTls() || Out::TlsPhdr)
       SymVA = SignExtend64<sizeof(typename ELFT::uint) * 8>(
           getRelocTargetVA(Type, Addend, AddrLoc, Sym, R_ABS));
     Target->relocateOne(BufLoc, Type, SymVA);
   }
 }
 
 template <class ELFT> elf::ObjectFile<ELFT> *InputSectionBase::getFile() const {
   return cast_or_null<elf::ObjectFile<ELFT>>(File);
 }
 
 template <class ELFT>
 void InputSectionBase::relocate(uint8_t *Buf, uint8_t *BufEnd) {
   if (Flags & SHF_ALLOC)
     relocateAlloc(Buf, BufEnd);
   else
     relocateNonAlloc<ELFT>(Buf, BufEnd);
 }
 
 template <class ELFT>
 void InputSectionBase::relocateNonAlloc(uint8_t *Buf, uint8_t *BufEnd) {
   // scanReloc function in Writer.cpp constructs Relocations
   // vector only for SHF_ALLOC'ed sections. For other sections,
   // we handle relocations directly here.
   auto *IS = cast<InputSection>(this);
   assert(!(IS->Flags & SHF_ALLOC));
   if (IS->AreRelocsRela)
     IS->relocateNonAlloc<ELFT>(Buf, IS->template relas<ELFT>());
   else
     IS->relocateNonAlloc<ELFT>(Buf, IS->template rels<ELFT>());
 }
 
 void InputSectionBase::relocateAlloc(uint8_t *Buf, uint8_t *BufEnd) {
   assert(Flags & SHF_ALLOC);
   const unsigned Bits = Config->Wordsize * 8;
   for (const Relocation &Rel : Relocations) {
     uint64_t Offset = getOffset(Rel.Offset);
     uint8_t *BufLoc = Buf + Offset;
     uint32_t Type = Rel.Type;
 
     uint64_t AddrLoc = getOutputSection()->Addr + Offset;
     RelExpr Expr = Rel.Expr;
     uint64_t TargetVA = SignExtend64(
         getRelocTargetVA(Type, Rel.Addend, AddrLoc, *Rel.Sym, Expr), Bits);
 
     switch (Expr) {
     case R_RELAX_GOT_PC:
     case R_RELAX_GOT_PC_NOPIC:
       Target->relaxGot(BufLoc, TargetVA);
       break;
     case R_RELAX_TLS_IE_TO_LE:
       Target->relaxTlsIeToLe(BufLoc, Type, TargetVA);
       break;
     case R_RELAX_TLS_LD_TO_LE:
       Target->relaxTlsLdToLe(BufLoc, Type, TargetVA);
       break;
     case R_RELAX_TLS_GD_TO_LE:
     case R_RELAX_TLS_GD_TO_LE_NEG:
       Target->relaxTlsGdToLe(BufLoc, Type, TargetVA);
       break;
     case R_RELAX_TLS_GD_TO_IE:
     case R_RELAX_TLS_GD_TO_IE_ABS:
     case R_RELAX_TLS_GD_TO_IE_PAGE_PC:
     case R_RELAX_TLS_GD_TO_IE_END:
       Target->relaxTlsGdToIe(BufLoc, Type, TargetVA);
       break;
     case R_PPC_PLT_OPD:
       // Patch a nop (0x60000000) to a ld.
       if (BufLoc + 8 <= BufEnd && read32be(BufLoc + 4) == 0x60000000)
         write32be(BufLoc + 4, 0xe8410028); // ld %r2, 40(%r1)
       LLVM_FALLTHROUGH;
     default:
       Target->relocateOne(BufLoc, Type, TargetVA);
       break;
     }
   }
 }
 
 template <class ELFT> void InputSection::writeTo(uint8_t *Buf) {
   if (this->Type == SHT_NOBITS)
     return;
 
   if (auto *S = dyn_cast<SyntheticSection>(this)) {
     S->writeTo(Buf + OutSecOff);
     return;
   }
 
   // If -r or --emit-relocs is given, then an InputSection
   // may be a relocation section.
   if (this->Type == SHT_RELA) {
     copyRelocations<ELFT>(Buf + OutSecOff,
                           this->template getDataAs<typename ELFT::Rela>());
     return;
   }
   if (this->Type == SHT_REL) {
     copyRelocations<ELFT>(Buf + OutSecOff,
                           this->template getDataAs<typename ELFT::Rel>());
     return;
   }
 
   // If -r is given, we may have a SHT_GROUP section.
   if (this->Type == SHT_GROUP) {
     copyShtGroup<ELFT>(Buf + OutSecOff);
     return;
   }
 
   // Copy section contents from source object file to output file
   // and then apply relocations.
   memcpy(Buf + OutSecOff, Data.data(), Data.size());
   uint8_t *BufEnd = Buf + OutSecOff + Data.size();
   this->relocate<ELFT>(Buf, BufEnd);
 }
 
 void InputSection::replace(InputSection *Other) {
   this->Alignment = std::max(this->Alignment, Other->Alignment);
   Other->Repl = this->Repl;
   Other->Live = false;
 }
 
 template <class ELFT>
 EhInputSection::EhInputSection(elf::ObjectFile<ELFT> *F,
                                const typename ELFT::Shdr *Header,
                                StringRef Name)
     : InputSectionBase(F, Header, Name, InputSectionBase::EHFrame) {
   // Mark .eh_frame sections as live by default because there are
   // usually no relocations that point to .eh_frames. Otherwise,
   // the garbage collector would drop all .eh_frame sections.
   this->Live = true;
 }
 
 SyntheticSection *EhInputSection::getParent() const {
   return cast_or_null<SyntheticSection>(Parent);
 }
 
 bool EhInputSection::classof(const SectionBase *S) {
   return S->kind() == InputSectionBase::EHFrame;
 }
 
 // Returns the index of the first relocation that points to a region between
 // Begin and Begin+Size.
 template <class IntTy, class RelTy>
 static unsigned getReloc(IntTy Begin, IntTy Size, const ArrayRef<RelTy> &Rels,
                          unsigned &RelocI) {
   // Start search from RelocI for fast access. That works because the
   // relocations are sorted in .eh_frame.
   for (unsigned N = Rels.size(); RelocI < N; ++RelocI) {
     const RelTy &Rel = Rels[RelocI];
     if (Rel.r_offset < Begin)
       continue;
 
     if (Rel.r_offset < Begin + Size)
       return RelocI;
     return -1;
   }
   return -1;
 }
 
 // .eh_frame is a sequence of CIE or FDE records.
 // This function splits an input section into records and returns them.
 template <class ELFT> void EhInputSection::split() {
   // Early exit if already split.
   if (!this->Pieces.empty())
     return;
 
   if (this->NumRelocations) {
     if (this->AreRelocsRela)
       split<ELFT>(this->relas<ELFT>());
     else
       split<ELFT>(this->rels<ELFT>());
     return;
   }
   split<ELFT>(makeArrayRef<typename ELFT::Rela>(nullptr, nullptr));
 }
 
 template <class ELFT, class RelTy>
 void EhInputSection::split(ArrayRef<RelTy> Rels) {
   ArrayRef<uint8_t> Data = this->Data;
   unsigned RelI = 0;
   for (size_t Off = 0, End = Data.size(); Off != End;) {
     size_t Size = readEhRecordSize<ELFT>(this, Off);
     this->Pieces.emplace_back(Off, this, Size, getReloc(Off, Size, Rels, RelI));
     // The empty record is the end marker.
     if (Size == 4)
       break;
     Off += Size;
   }
 }
 
 static size_t findNull(ArrayRef<uint8_t> A, size_t EntSize) {
   // Optimize the common case.
   StringRef S((const char *)A.data(), A.size());
   if (EntSize == 1)
     return S.find(0);
 
   for (unsigned I = 0, N = S.size(); I != N; I += EntSize) {
     const char *B = S.begin() + I;
     if (std::all_of(B, B + EntSize, [](char C) { return C == 0; }))
       return I;
   }
   return StringRef::npos;
 }
 
 SyntheticSection *MergeInputSection::getParent() const {
   return cast_or_null<SyntheticSection>(Parent);
 }
 
 // Split SHF_STRINGS section. Such section is a sequence of
 // null-terminated strings.
 void MergeInputSection::splitStrings(ArrayRef<uint8_t> Data, size_t EntSize) {
   size_t Off = 0;
   bool IsAlloc = this->Flags & SHF_ALLOC;
   while (!Data.empty()) {
     size_t End = findNull(Data, EntSize);
     if (End == StringRef::npos)
       fatal(toString(this) + ": string is not null terminated");
     size_t Size = End + EntSize;
     Pieces.emplace_back(Off, !IsAlloc);
     Hashes.push_back(hash_value(toStringRef(Data.slice(0, Size))));
     Data = Data.slice(Size);
     Off += Size;
   }
 }
 
 // Split non-SHF_STRINGS section. Such section is a sequence of
 // fixed size records.
 void MergeInputSection::splitNonStrings(ArrayRef<uint8_t> Data,
                                         size_t EntSize) {
   size_t Size = Data.size();
   assert((Size % EntSize) == 0);
   bool IsAlloc = this->Flags & SHF_ALLOC;
   for (unsigned I = 0, N = Size; I != N; I += EntSize) {
     Hashes.push_back(hash_value(toStringRef(Data.slice(I, EntSize))));
     Pieces.emplace_back(I, !IsAlloc);
   }
 }
 
 template <class ELFT>
 MergeInputSection::MergeInputSection(elf::ObjectFile<ELFT> *F,
                                      const typename ELFT::Shdr *Header,
                                      StringRef Name)
     : InputSectionBase(F, Header, Name, InputSectionBase::Merge) {}
 
 // This function is called after we obtain a complete list of input sections
 // that need to be linked. This is responsible to split section contents
 // into small chunks for further processing.
 //
 // Note that this function is called from parallel_for_each. This must be
 // thread-safe (i.e. no memory allocation from the pools).
 void MergeInputSection::splitIntoPieces() {
   ArrayRef<uint8_t> Data = this->Data;
   uint64_t EntSize = this->Entsize;
   if (this->Flags & SHF_STRINGS)
     splitStrings(Data, EntSize);
   else
     splitNonStrings(Data, EntSize);
 
   if (Config->GcSections && (this->Flags & SHF_ALLOC))
     for (uint64_t Off : LiveOffsets)
       this->getSectionPiece(Off)->Live = true;
 }
 
 bool MergeInputSection::classof(const SectionBase *S) {
   return S->kind() == InputSectionBase::Merge;
 }
 
 // Do binary search to get a section piece at a given input offset.
 SectionPiece *MergeInputSection::getSectionPiece(uint64_t Offset) {
   auto *This = static_cast<const MergeInputSection *>(this);
   return const_cast<SectionPiece *>(This->getSectionPiece(Offset));
 }
 
 template <class It, class T, class Compare>
 static It fastUpperBound(It First, It Last, const T &Value, Compare Comp) {
   size_t Size = std::distance(First, Last);
   assert(Size != 0);
   while (Size != 1) {
     size_t H = Size / 2;
     const It MI = First + H;
     Size -= H;
     First = Comp(Value, *MI) ? First : First + H;
   }
   return Comp(Value, *First) ? First : First + 1;
 }
 
 const SectionPiece *MergeInputSection::getSectionPiece(uint64_t Offset) const {
   uint64_t Size = this->Data.size();
   if (Offset >= Size)
     fatal(toString(this) + ": entry is past the end of the section");
 
   // Find the element this offset points to.
   auto I = fastUpperBound(
       Pieces.begin(), Pieces.end(), Offset,
       [](const uint64_t &A, const SectionPiece &B) { return A < B.InputOff; });
   --I;
   return &*I;
 }
 
 // Returns the offset in an output section for a given input offset.
 // Because contents of a mergeable section is not contiguous in output,
 // it is not just an addition to a base output offset.
 uint64_t MergeInputSection::getOffset(uint64_t Offset) const {
   // Initialize OffsetMap lazily.
   llvm::call_once(InitOffsetMap, [&] {
     OffsetMap.reserve(Pieces.size());
     for (const SectionPiece &Piece : Pieces)
       OffsetMap[Piece.InputOff] = Piece.OutputOff;
   });
 
   // Find a string starting at a given offset.
   auto It = OffsetMap.find(Offset);
   if (It != OffsetMap.end())
     return It->second;
 
   if (!this->Live)
     return 0;
 
   // If Offset is not at beginning of a section piece, it is not in the map.
   // In that case we need to search from the original section piece vector.
   const SectionPiece &Piece = *this->getSectionPiece(Offset);
   if (!Piece.Live)
     return 0;
 
   uint64_t Addend = Offset - Piece.InputOff;
   return Piece.OutputOff + Addend;
 }
 
 template InputSection::InputSection(elf::ObjectFile<ELF32LE> *,
                                     const ELF32LE::Shdr *, StringRef);
 template InputSection::InputSection(elf::ObjectFile<ELF32BE> *,
                                     const ELF32BE::Shdr *, StringRef);
 template InputSection::InputSection(elf::ObjectFile<ELF64LE> *,
                                     const ELF64LE::Shdr *, StringRef);
 template InputSection::InputSection(elf::ObjectFile<ELF64BE> *,
                                     const ELF64BE::Shdr *, StringRef);
 
 template std::string InputSectionBase::getLocation<ELF32LE>(uint64_t);
 template std::string InputSectionBase::getLocation<ELF32BE>(uint64_t);
 template std::string InputSectionBase::getLocation<ELF64LE>(uint64_t);
 template std::string InputSectionBase::getLocation<ELF64BE>(uint64_t);
 
 template std::string InputSectionBase::getSrcMsg<ELF32LE>(uint64_t);
 template std::string InputSectionBase::getSrcMsg<ELF32BE>(uint64_t);
 template std::string InputSectionBase::getSrcMsg<ELF64LE>(uint64_t);
 template std::string InputSectionBase::getSrcMsg<ELF64BE>(uint64_t);
 
 template std::string InputSectionBase::getObjMsg<ELF32LE>(uint64_t);
 template std::string InputSectionBase::getObjMsg<ELF32BE>(uint64_t);
 template std::string InputSectionBase::getObjMsg<ELF64LE>(uint64_t);
 template std::string InputSectionBase::getObjMsg<ELF64BE>(uint64_t);
 
 template void InputSection::writeTo<ELF32LE>(uint8_t *);
 template void InputSection::writeTo<ELF32BE>(uint8_t *);
 template void InputSection::writeTo<ELF64LE>(uint8_t *);
 template void InputSection::writeTo<ELF64BE>(uint8_t *);
 
 template elf::ObjectFile<ELF32LE> *InputSectionBase::getFile<ELF32LE>() const;
 template elf::ObjectFile<ELF32BE> *InputSectionBase::getFile<ELF32BE>() const;
 template elf::ObjectFile<ELF64LE> *InputSectionBase::getFile<ELF64LE>() const;
 template elf::ObjectFile<ELF64BE> *InputSectionBase::getFile<ELF64BE>() const;
 
 template MergeInputSection::MergeInputSection(elf::ObjectFile<ELF32LE> *,
                                               const ELF32LE::Shdr *, StringRef);
 template MergeInputSection::MergeInputSection(elf::ObjectFile<ELF32BE> *,
                                               const ELF32BE::Shdr *, StringRef);
 template MergeInputSection::MergeInputSection(elf::ObjectFile<ELF64LE> *,
                                               const ELF64LE::Shdr *, StringRef);
 template MergeInputSection::MergeInputSection(elf::ObjectFile<ELF64BE> *,
                                               const ELF64BE::Shdr *, StringRef);
 
 template EhInputSection::EhInputSection(elf::ObjectFile<ELF32LE> *,
                                         const ELF32LE::Shdr *, StringRef);
 template EhInputSection::EhInputSection(elf::ObjectFile<ELF32BE> *,
                                         const ELF32BE::Shdr *, StringRef);
 template EhInputSection::EhInputSection(elf::ObjectFile<ELF64LE> *,
                                         const ELF64LE::Shdr *, StringRef);
 template EhInputSection::EhInputSection(elf::ObjectFile<ELF64BE> *,
                                         const ELF64BE::Shdr *, StringRef);
 
 template void EhInputSection::split<ELF32LE>();
 template void EhInputSection::split<ELF32BE>();
 template void EhInputSection::split<ELF64LE>();
 template void EhInputSection::split<ELF64BE>();
Index: vendor/lld/dist/ELF/LinkerScript.cpp
===================================================================
--- vendor/lld/dist/ELF/LinkerScript.cpp	(revision 320020)
+++ vendor/lld/dist/ELF/LinkerScript.cpp	(revision 320021)
@@ -1,1244 +1,1148 @@
 //===- LinkerScript.cpp ---------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains the parser/evaluator of the linker script.
 //
 //===----------------------------------------------------------------------===//
 
 #include "LinkerScript.h"
 #include "Config.h"
 #include "InputSection.h"
 #include "Memory.h"
 #include "OutputSections.h"
 #include "Strings.h"
 #include "SymbolTable.h"
 #include "Symbols.h"
 #include "SyntheticSections.h"
 #include "Target.h"
 #include "Threads.h"
 #include "Writer.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/BinaryFormat/ELF.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/Compression.h"
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/FileSystem.h"
 #include "llvm/Support/Path.h"
 #include <algorithm>
 #include <cassert>
 #include <cstddef>
 #include <cstdint>
 #include <iterator>
 #include <limits>
 #include <string>
 #include <vector>
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
 using namespace llvm::support::endian;
 using namespace lld;
 using namespace lld::elf;
 
 LinkerScript *elf::Script;
 
 uint64_t ExprValue::getValue() const {
   if (Sec) {
     if (OutputSection *OS = Sec->getOutputSection())
       return alignTo(Sec->getOffset(Val) + OS->Addr, Alignment);
     error(Loc + ": unable to evaluate expression: input section " + Sec->Name +
           " has no output section assigned");
   }
   return alignTo(Val, Alignment);
 }
 
 uint64_t ExprValue::getSecAddr() const {
   if (Sec)
     return Sec->getOffset(0) + Sec->getOutputSection()->Addr;
   return 0;
 }
 
 template <class ELFT> static SymbolBody *addRegular(SymbolAssignment *Cmd) {
   Symbol *Sym;
   uint8_t Visibility = Cmd->Hidden ? STV_HIDDEN : STV_DEFAULT;
   std::tie(Sym, std::ignore) = Symtab<ELFT>::X->insert(
       Cmd->Name, /*Type*/ 0, Visibility, /*CanOmitFromDynSym*/ false,
       /*File*/ nullptr);
   Sym->Binding = STB_GLOBAL;
   ExprValue Value = Cmd->Expression();
   SectionBase *Sec = Value.isAbsolute() ? nullptr : Value.Sec;
 
   // We want to set symbol values early if we can. This allows us to use symbols
   // as variables in linker scripts. Doing so allows us to write expressions
   // like this: `alignment = 16; . = ALIGN(., alignment)`
   uint64_t SymValue = Value.isAbsolute() ? Value.getValue() : 0;
   replaceBody<DefinedRegular>(Sym, Cmd->Name, /*IsLocal=*/false, Visibility,
                               STT_NOTYPE, SymValue, 0, Sec, nullptr);
   return Sym->body();
 }
 
 OutputSectionCommand *
 LinkerScript::createOutputSectionCommand(StringRef Name, StringRef Location) {
   OutputSectionCommand *&CmdRef = NameToOutputSectionCommand[Name];
   OutputSectionCommand *Cmd;
   if (CmdRef && CmdRef->Location.empty()) {
     // There was a forward reference.
     Cmd = CmdRef;
   } else {
     Cmd = make<OutputSectionCommand>(Name);
     if (!CmdRef)
       CmdRef = Cmd;
   }
   Cmd->Location = Location;
   return Cmd;
 }
 
 OutputSectionCommand *
 LinkerScript::getOrCreateOutputSectionCommand(StringRef Name) {
   OutputSectionCommand *&CmdRef = NameToOutputSectionCommand[Name];
   if (!CmdRef)
     CmdRef = make<OutputSectionCommand>(Name);
   return CmdRef;
 }
 
 void LinkerScript::setDot(Expr E, const Twine &Loc, bool InSec) {
   uint64_t Val = E().getValue();
   if (Val < Dot) {
     if (InSec)
       error(Loc + ": unable to move location counter backward for: " +
             CurOutSec->Name);
     else
       error(Loc + ": unable to move location counter backward");
   }
   Dot = Val;
   // Update to location counter means update to section size.
   if (InSec)
     CurOutSec->Size = Dot - CurOutSec->Addr;
 }
 
 // Sets value of a symbol. Two kinds of symbols are processed: synthetic
 // symbols, whose value is an offset from beginning of section and regular
 // symbols whose value is absolute.
 void LinkerScript::assignSymbol(SymbolAssignment *Cmd, bool InSec) {
   if (Cmd->Name == ".") {
     setDot(Cmd->Expression, Cmd->Location, InSec);
     return;
   }
 
   if (!Cmd->Sym)
     return;
 
   auto *Sym = cast<DefinedRegular>(Cmd->Sym);
   ExprValue V = Cmd->Expression();
   if (V.isAbsolute()) {
     Sym->Value = V.getValue();
   } else {
     Sym->Section = V.Sec;
-    if (Sym->Section->Flags & SHF_ALLOC)
-      Sym->Value = alignTo(V.Val, V.Alignment);
-    else
-      Sym->Value = V.getValue();
+    Sym->Value = alignTo(V.Val, V.Alignment);
   }
 }
 
 static SymbolBody *findSymbol(StringRef S) {
   switch (Config->EKind) {
   case ELF32LEKind:
     return Symtab<ELF32LE>::X->find(S);
   case ELF32BEKind:
     return Symtab<ELF32BE>::X->find(S);
   case ELF64LEKind:
     return Symtab<ELF64LE>::X->find(S);
   case ELF64BEKind:
     return Symtab<ELF64BE>::X->find(S);
   default:
     llvm_unreachable("unknown Config->EKind");
   }
 }
 
 static SymbolBody *addRegularSymbol(SymbolAssignment *Cmd) {
   switch (Config->EKind) {
   case ELF32LEKind:
     return addRegular<ELF32LE>(Cmd);
   case ELF32BEKind:
     return addRegular<ELF32BE>(Cmd);
   case ELF64LEKind:
     return addRegular<ELF64LE>(Cmd);
   case ELF64BEKind:
     return addRegular<ELF64BE>(Cmd);
   default:
     llvm_unreachable("unknown Config->EKind");
   }
 }
 
 void LinkerScript::addSymbol(SymbolAssignment *Cmd) {
   if (Cmd->Name == ".")
     return;
 
   // If a symbol was in PROVIDE(), we need to define it only when
   // it is a referenced undefined symbol.
   SymbolBody *B = findSymbol(Cmd->Name);
   if (Cmd->Provide && (!B || B->isDefined()))
     return;
 
   Cmd->Sym = addRegularSymbol(Cmd);
 }
 
 bool SymbolAssignment::classof(const BaseCommand *C) {
   return C->Kind == AssignmentKind;
 }
 
 bool OutputSectionCommand::classof(const BaseCommand *C) {
   return C->Kind == OutputSectionKind;
 }
 
 // Fill [Buf, Buf + Size) with Filler.
 // This is used for linker script "=fillexp" command.
 static void fill(uint8_t *Buf, size_t Size, uint32_t Filler) {
   size_t I = 0;
   for (; I + 4 < Size; I += 4)
     memcpy(Buf + I, &Filler, 4);
   memcpy(Buf + I, &Filler, Size - I);
 }
 
 bool InputSectionDescription::classof(const BaseCommand *C) {
   return C->Kind == InputSectionKind;
 }
 
 bool AssertCommand::classof(const BaseCommand *C) {
   return C->Kind == AssertKind;
 }
 
 bool BytesDataCommand::classof(const BaseCommand *C) {
   return C->Kind == BytesDataKind;
 }
 
 static StringRef basename(InputSectionBase *S) {
   if (S->File)
     return sys::path::filename(S->File->getName());
   return "";
 }
 
 bool LinkerScript::shouldKeep(InputSectionBase *S) {
   for (InputSectionDescription *ID : Opt.KeptSections)
     if (ID->FilePat.match(basename(S)))
       for (SectionPattern &P : ID->SectionPatterns)
         if (P.SectionPat.match(S->Name))
           return true;
   return false;
 }
 
 // A helper function for the SORT() command.
 static std::function<bool(InputSectionBase *, InputSectionBase *)>
 getComparator(SortSectionPolicy K) {
   switch (K) {
   case SortSectionPolicy::Alignment:
     return [](InputSectionBase *A, InputSectionBase *B) {
       // ">" is not a mistake. Sections with larger alignments are placed
       // before sections with smaller alignments in order to reduce the
       // amount of padding necessary. This is compatible with GNU.
       return A->Alignment > B->Alignment;
     };
   case SortSectionPolicy::Name:
     return [](InputSectionBase *A, InputSectionBase *B) {
       return A->Name < B->Name;
     };
   case SortSectionPolicy::Priority:
     return [](InputSectionBase *A, InputSectionBase *B) {
       return getPriority(A->Name) < getPriority(B->Name);
     };
   default:
     llvm_unreachable("unknown sort policy");
   }
 }
 
 // A helper function for the SORT() command.
 static bool matchConstraints(ArrayRef<InputSectionBase *> Sections,
                              ConstraintKind Kind) {
   if (Kind == ConstraintKind::NoConstraint)
     return true;
 
   bool IsRW = llvm::any_of(Sections, [](InputSectionBase *Sec) {
     return static_cast<InputSectionBase *>(Sec)->Flags & SHF_WRITE;
   });
 
   return (IsRW && Kind == ConstraintKind::ReadWrite) ||
          (!IsRW && Kind == ConstraintKind::ReadOnly);
 }
 
 static void sortSections(InputSection **Begin, InputSection **End,
                          SortSectionPolicy K) {
   if (K != SortSectionPolicy::Default && K != SortSectionPolicy::None)
     std::stable_sort(Begin, End, getComparator(K));
 }
 
 // Compute and remember which sections the InputSectionDescription matches.
 std::vector<InputSection *>
 LinkerScript::computeInputSections(const InputSectionDescription *Cmd) {
   std::vector<InputSection *> Ret;
 
   // Collects all sections that satisfy constraints of Cmd.
   for (const SectionPattern &Pat : Cmd->SectionPatterns) {
     size_t SizeBefore = Ret.size();
 
     for (InputSectionBase *Sec : InputSections) {
       if (Sec->Assigned)
         continue;
 
       if (!Sec->Live) {
         reportDiscarded(Sec);
         continue;
       }
 
       // For -emit-relocs we have to ignore entries like
       //   .rela.dyn : { *(.rela.data) }
       // which are common because they are in the default bfd script.
       if (Sec->Type == SHT_REL || Sec->Type == SHT_RELA)
         continue;
 
       StringRef Filename = basename(Sec);
       if (!Cmd->FilePat.match(Filename) ||
           Pat.ExcludedFilePat.match(Filename) ||
           !Pat.SectionPat.match(Sec->Name))
         continue;
 
       Ret.push_back(cast<InputSection>(Sec));
       Sec->Assigned = true;
     }
 
     // Sort sections as instructed by SORT-family commands and --sort-section
     // option. Because SORT-family commands can be nested at most two depth
     // (e.g. SORT_BY_NAME(SORT_BY_ALIGNMENT(.text.*))) and because the command
     // line option is respected even if a SORT command is given, the exact
     // behavior we have here is a bit complicated. Here are the rules.
     //
     // 1. If two SORT commands are given, --sort-section is ignored.
     // 2. If one SORT command is given, and if it is not SORT_NONE,
     //    --sort-section is handled as an inner SORT command.
     // 3. If one SORT command is given, and if it is SORT_NONE, don't sort.
     // 4. If no SORT command is given, sort according to --sort-section.
     InputSection **Begin = Ret.data() + SizeBefore;
     InputSection **End = Ret.data() + Ret.size();
     if (Pat.SortOuter != SortSectionPolicy::None) {
       if (Pat.SortInner == SortSectionPolicy::Default)
         sortSections(Begin, End, Config->SortSection);
       else
         sortSections(Begin, End, Pat.SortInner);
       sortSections(Begin, End, Pat.SortOuter);
     }
   }
   return Ret;
 }
 
 void LinkerScript::discard(ArrayRef<InputSectionBase *> V) {
   for (InputSectionBase *S : V) {
     S->Live = false;
     if (S == InX::ShStrTab)
       error("discarding .shstrtab section is not allowed");
     discard(S->DependentSections);
   }
 }
 
 std::vector<InputSectionBase *>
 LinkerScript::createInputSectionList(OutputSectionCommand &OutCmd) {
   std::vector<InputSectionBase *> Ret;
 
   for (BaseCommand *Base : OutCmd.Commands) {
     auto *Cmd = dyn_cast<InputSectionDescription>(Base);
     if (!Cmd)
       continue;
 
     Cmd->Sections = computeInputSections(Cmd);
     Ret.insert(Ret.end(), Cmd->Sections.begin(), Cmd->Sections.end());
   }
 
   return Ret;
 }
 
 void LinkerScript::processCommands(OutputSectionFactory &Factory) {
   // A symbol can be assigned before any section is mentioned in the linker
   // script. In an DSO, the symbol values are addresses, so the only important
   // section values are:
   // * SHN_UNDEF
   // * SHN_ABS
   // * Any value meaning a regular section.
   // To handle that, create a dummy aether section that fills the void before
   // the linker scripts switches to another section. It has an index of one
   // which will map to whatever the first actual section is.
   Aether = make<OutputSection>("", 0, SHF_ALLOC);
   Aether->SectionIndex = 1;
   CurOutSec = Aether;
   Dot = 0;
 
   for (size_t I = 0; I < Opt.Commands.size(); ++I) {
     // Handle symbol assignments outside of any output section.
     if (auto *Cmd = dyn_cast<SymbolAssignment>(Opt.Commands[I])) {
       addSymbol(Cmd);
       continue;
     }
 
     if (auto *Cmd = dyn_cast<OutputSectionCommand>(Opt.Commands[I])) {
       std::vector<InputSectionBase *> V = createInputSectionList(*Cmd);
 
       // The output section name `/DISCARD/' is special.
       // Any input section assigned to it is discarded.
       if (Cmd->Name == "/DISCARD/") {
         discard(V);
         continue;
       }
 
       // This is for ONLY_IF_RO and ONLY_IF_RW. An output section directive
       // ".foo : ONLY_IF_R[OW] { ... }" is handled only if all member input
       // sections satisfy a given constraint. If not, a directive is handled
       // as if it wasn't present from the beginning.
       //
       // Because we'll iterate over Commands many more times, the easiest
       // way to "make it as if it wasn't present" is to just remove it.
       if (!matchConstraints(V, Cmd->Constraint)) {
         for (InputSectionBase *S : V)
           S->Assigned = false;
         Opt.Commands.erase(Opt.Commands.begin() + I);
         --I;
         continue;
       }
 
       // A directive may contain symbol definitions like this:
       // ".foo : { ...; bar = .; }". Handle them.
       for (BaseCommand *Base : Cmd->Commands)
         if (auto *OutCmd = dyn_cast<SymbolAssignment>(Base))
           addSymbol(OutCmd);
 
       // Handle subalign (e.g. ".foo : SUBALIGN(32) { ... }"). If subalign
       // is given, input sections are aligned to that value, whether the
       // given value is larger or smaller than the original section alignment.
       if (Cmd->SubalignExpr) {
         uint32_t Subalign = Cmd->SubalignExpr().getValue();
         for (InputSectionBase *S : V)
           S->Alignment = Subalign;
       }
 
       // Add input sections to an output section.
       for (InputSectionBase *S : V)
         Factory.addInputSec(S, Cmd->Name, Cmd->Sec);
       if (OutputSection *Sec = Cmd->Sec) {
         assert(Sec->SectionIndex == INT_MAX);
         Sec->SectionIndex = I;
         if (Cmd->Noload)
           Sec->Type = SHT_NOBITS;
         SecToCommand[Sec] = Cmd;
       }
     }
   }
   CurOutSec = nullptr;
 }
 
 void LinkerScript::fabricateDefaultCommands() {
   std::vector<BaseCommand *> Commands;
 
   // Define start address
   uint64_t StartAddr = -1;
 
   // The Sections with -T<section> have been sorted in order of ascending
   // address. We must lower StartAddr if the lowest -T<section address> as
   // calls to setDot() must be monotonically increasing.
   for (auto& KV : Config->SectionStartMap)
     StartAddr = std::min(StartAddr, KV.second);
 
   Commands.push_back(make<SymbolAssignment>(
       ".",
       [=] {
         return std::min(StartAddr, Config->ImageBase + elf::getHeaderSize());
       },
       ""));
 
   // For each OutputSection that needs a VA fabricate an OutputSectionCommand
   // with an InputSectionDescription describing the InputSections
-  for (OutputSection *Sec : *OutputSections) {
+  for (OutputSection *Sec : OutputSections) {
     auto *OSCmd = createOutputSectionCommand(Sec->Name, "<internal>");
     OSCmd->Sec = Sec;
     SecToCommand[Sec] = OSCmd;
 
     // Prefer user supplied address over additional alignment constraint
     auto I = Config->SectionStartMap.find(Sec->Name);
     if (I != Config->SectionStartMap.end())
       OSCmd->AddrExpr = [=] { return I->second; };
 
     Commands.push_back(OSCmd);
     if (Sec->Sections.size()) {
       auto *ISD = make<InputSectionDescription>("");
       OSCmd->Commands.push_back(ISD);
       for (InputSection *ISec : Sec->Sections) {
         ISD->Sections.push_back(ISec);
         ISec->Assigned = true;
       }
     }
   }
   // SECTIONS commands run before other non SECTIONS commands
   Commands.insert(Commands.end(), Opt.Commands.begin(), Opt.Commands.end());
   Opt.Commands = std::move(Commands);
 }
 
 // Add sections that didn't match any sections command.
 void LinkerScript::addOrphanSections(OutputSectionFactory &Factory) {
   for (InputSectionBase *S : InputSections) {
     if (!S->Live || S->Parent)
       continue;
     StringRef Name = getOutputSectionName(S->Name);
     auto I = std::find_if(
         Opt.Commands.begin(), Opt.Commands.end(), [&](BaseCommand *Base) {
           if (auto *Cmd = dyn_cast<OutputSectionCommand>(Base))
             return Cmd->Name == Name;
           return false;
         });
     if (I == Opt.Commands.end()) {
       Factory.addInputSec(S, Name);
     } else {
       auto *Cmd = cast<OutputSectionCommand>(*I);
       Factory.addInputSec(S, Name, Cmd->Sec);
       if (OutputSection *Sec = Cmd->Sec) {
         SecToCommand[Sec] = Cmd;
         unsigned Index = std::distance(Opt.Commands.begin(), I);
         assert(Sec->SectionIndex == INT_MAX || Sec->SectionIndex == Index);
         Sec->SectionIndex = Index;
       }
       auto *ISD = make<InputSectionDescription>("");
       ISD->Sections.push_back(cast<InputSection>(S));
       Cmd->Commands.push_back(ISD);
     }
   }
 }
 
 uint64_t LinkerScript::advance(uint64_t Size, unsigned Align) {
   bool IsTbss = (CurOutSec->Flags & SHF_TLS) && CurOutSec->Type == SHT_NOBITS;
   uint64_t Start = IsTbss ? Dot + ThreadBssOffset : Dot;
   Start = alignTo(Start, Align);
   uint64_t End = Start + Size;
 
   if (IsTbss)
     ThreadBssOffset = End - Dot;
   else
     Dot = End;
   return End;
 }
 
 void LinkerScript::output(InputSection *S) {
   uint64_t Pos = advance(S->getSize(), S->Alignment);
   S->OutSecOff = Pos - S->getSize() - CurOutSec->Addr;
 
   // Update output section size after adding each section. This is so that
   // SIZEOF works correctly in the case below:
   // .foo { *(.aaa) a = SIZEOF(.foo); *(.bbb) }
   CurOutSec->Size = Pos - CurOutSec->Addr;
 
   // If there is a memory region associated with this input section, then
   // place the section in that region and update the region index.
   if (CurMemRegion) {
     CurMemRegion->Offset += CurOutSec->Size;
     uint64_t CurSize = CurMemRegion->Offset - CurMemRegion->Origin;
     if (CurSize > CurMemRegion->Length) {
       uint64_t OverflowAmt = CurSize - CurMemRegion->Length;
       error("section '" + CurOutSec->Name + "' will not fit in region '" +
             CurMemRegion->Name + "': overflowed by " + Twine(OverflowAmt) +
             " bytes");
     }
   }
 }
 
 void LinkerScript::switchTo(OutputSection *Sec) {
   if (CurOutSec == Sec)
     return;
 
   CurOutSec = Sec;
   CurOutSec->Addr = advance(0, CurOutSec->Alignment);
 
   // If neither AT nor AT> is specified for an allocatable section, the linker
   // will set the LMA such that the difference between VMA and LMA for the
   // section is the same as the preceding output section in the same region
   // https://sourceware.org/binutils/docs-2.20/ld/Output-Section-LMA.html
   if (LMAOffset)
     CurOutSec->LMAOffset = LMAOffset();
 }
 
 void LinkerScript::process(BaseCommand &Base) {
   // This handles the assignments to symbol or to the dot.
   if (auto *Cmd = dyn_cast<SymbolAssignment>(&Base)) {
     assignSymbol(Cmd, true);
     return;
   }
 
   // Handle BYTE(), SHORT(), LONG(), or QUAD().
   if (auto *Cmd = dyn_cast<BytesDataCommand>(&Base)) {
     Cmd->Offset = Dot - CurOutSec->Addr;
     Dot += Cmd->Size;
     CurOutSec->Size = Dot - CurOutSec->Addr;
     return;
   }
 
   // Handle ASSERT().
   if (auto *Cmd = dyn_cast<AssertCommand>(&Base)) {
     Cmd->Expression();
     return;
   }
 
   // Handle a single input section description command.
   // It calculates and assigns the offsets for each section and also
   // updates the output section size.
   auto &Cmd = cast<InputSectionDescription>(Base);
   for (InputSection *Sec : Cmd.Sections) {
     // We tentatively added all synthetic sections at the beginning and removed
     // empty ones afterwards (because there is no way to know whether they were
     // going be empty or not other than actually running linker scripts.)
     // We need to ignore remains of empty sections.
     if (auto *S = dyn_cast<SyntheticSection>(Sec))
       if (S->empty())
         continue;
 
     if (!Sec->Live)
       continue;
     assert(CurOutSec == Sec->getParent());
     output(Sec);
   }
 }
 
 // This function searches for a memory region to place the given output
 // section in. If found, a pointer to the appropriate memory region is
 // returned. Otherwise, a nullptr is returned.
 MemoryRegion *LinkerScript::findMemoryRegion(OutputSectionCommand *Cmd) {
   // If a memory region name was specified in the output section command,
   // then try to find that region first.
   if (!Cmd->MemoryRegionName.empty()) {
     auto It = Opt.MemoryRegions.find(Cmd->MemoryRegionName);
     if (It != Opt.MemoryRegions.end())
       return &It->second;
     error("memory region '" + Cmd->MemoryRegionName + "' not declared");
     return nullptr;
   }
 
   // If at least one memory region is defined, all sections must
   // belong to some memory region. Otherwise, we don't need to do
   // anything for memory regions.
   if (Opt.MemoryRegions.empty())
     return nullptr;
 
   OutputSection *Sec = Cmd->Sec;
   // See if a region can be found by matching section flags.
   for (auto &Pair : Opt.MemoryRegions) {
     MemoryRegion &M = Pair.second;
     if ((M.Flags & Sec->Flags) && (M.NegFlags & Sec->Flags) == 0)
       return &M;
   }
 
   // Otherwise, no suitable region was found.
   if (Sec->Flags & SHF_ALLOC)
     error("no memory region specified for section '" + Sec->Name + "'");
   return nullptr;
 }
 
 // This function assigns offsets to input sections and an output section
 // for a single sections command (e.g. ".text { *(.text); }").
 void LinkerScript::assignOffsets(OutputSectionCommand *Cmd) {
   OutputSection *Sec = Cmd->Sec;
   if (!Sec)
     return;
 
-  if (Cmd->AddrExpr && (Sec->Flags & SHF_ALLOC))
+  if (!(Sec->Flags & SHF_ALLOC))
+    Dot = 0;
+  else if (Cmd->AddrExpr)
     setDot(Cmd->AddrExpr, Cmd->Location, false);
 
   if (Cmd->LMAExpr) {
     uint64_t D = Dot;
     LMAOffset = [=] { return Cmd->LMAExpr().getValue() - D; };
   }
 
   CurMemRegion = Cmd->MemRegion;
   if (CurMemRegion)
     Dot = CurMemRegion->Offset;
   switchTo(Sec);
 
   // We do not support custom layout for compressed debug sectons.
   // At this point we already know their size and have compressed content.
   if (CurOutSec->Flags & SHF_COMPRESSED)
     return;
 
   for (BaseCommand *C : Cmd->Commands)
     process(*C);
 }
 
 void LinkerScript::removeEmptyCommands() {
   // It is common practice to use very generic linker scripts. So for any
   // given run some of the output sections in the script will be empty.
   // We could create corresponding empty output sections, but that would
   // clutter the output.
   // We instead remove trivially empty sections. The bfd linker seems even
   // more aggressive at removing them.
   auto Pos = std::remove_if(
       Opt.Commands.begin(), Opt.Commands.end(), [&](BaseCommand *Base) {
         if (auto *Cmd = dyn_cast<OutputSectionCommand>(Base))
-          return std::find(OutputSections->begin(), OutputSections->end(),
-                           Cmd->Sec) == OutputSections->end();
+          return Cmd->Sec == nullptr;
         return false;
       });
   Opt.Commands.erase(Pos, Opt.Commands.end());
 }
 
 static bool isAllSectionDescription(const OutputSectionCommand &Cmd) {
   for (BaseCommand *Base : Cmd.Commands)
     if (!isa<InputSectionDescription>(*Base))
       return false;
   return true;
 }
 
 void LinkerScript::adjustSectionsBeforeSorting() {
   // If the output section contains only symbol assignments, create a
   // corresponding output section. The bfd linker seems to only create them if
   // '.' is assigned to, but creating these section should not have any bad
   // consequeces and gives us a section to put the symbol in.
   uint64_t Flags = SHF_ALLOC;
 
   for (int I = 0, E = Opt.Commands.size(); I != E; ++I) {
     auto *Cmd = dyn_cast<OutputSectionCommand>(Opt.Commands[I]);
     if (!Cmd)
       continue;
     if (OutputSection *Sec = Cmd->Sec) {
       Flags = Sec->Flags;
       continue;
     }
 
     if (isAllSectionDescription(*Cmd))
       continue;
 
     auto *OutSec = make<OutputSection>(Cmd->Name, SHT_PROGBITS, Flags);
     OutSec->SectionIndex = I;
-    OutputSections->push_back(OutSec);
     Cmd->Sec = OutSec;
     SecToCommand[OutSec] = Cmd;
   }
 }
 
 void LinkerScript::adjustSectionsAfterSorting() {
-  placeOrphanSections();
-
   // Try and find an appropriate memory region to assign offsets in.
   for (BaseCommand *Base : Opt.Commands) {
     if (auto *Cmd = dyn_cast<OutputSectionCommand>(Base)) {
       Cmd->MemRegion = findMemoryRegion(Cmd);
       // Handle align (e.g. ".foo : ALIGN(16) { ... }").
       if (Cmd->AlignExpr)
 	Cmd->Sec->updateAlignment(Cmd->AlignExpr().getValue());
     }
   }
 
   // If output section command doesn't specify any segments,
   // and we haven't previously assigned any section to segment,
   // then we simply assign section to the very first load segment.
   // Below is an example of such linker script:
   // PHDRS { seg PT_LOAD; }
   // SECTIONS { .aaa : { *(.aaa) } }
   std::vector<StringRef> DefPhdrs;
   auto FirstPtLoad =
       std::find_if(Opt.PhdrsCommands.begin(), Opt.PhdrsCommands.end(),
                    [](const PhdrsCommand &Cmd) { return Cmd.Type == PT_LOAD; });
   if (FirstPtLoad != Opt.PhdrsCommands.end())
     DefPhdrs.push_back(FirstPtLoad->Name);
 
   // Walk the commands and propagate the program headers to commands that don't
   // explicitly specify them.
   for (BaseCommand *Base : Opt.Commands) {
     auto *Cmd = dyn_cast<OutputSectionCommand>(Base);
     if (!Cmd)
       continue;
 
     if (Cmd->Phdrs.empty())
       Cmd->Phdrs = DefPhdrs;
     else
       DefPhdrs = Cmd->Phdrs;
   }
 
   removeEmptyCommands();
 }
 
-// When placing orphan sections, we want to place them after symbol assignments
-// so that an orphan after
-//   begin_foo = .;
-//   foo : { *(foo) }
-//   end_foo = .;
-// doesn't break the intended meaning of the begin/end symbols.
-// We don't want to go over sections since Writer<ELFT>::sortSections is the
-// one in charge of deciding the order of the sections.
-// We don't want to go over alignments, since doing so in
-//  rx_sec : { *(rx_sec) }
-//  . = ALIGN(0x1000);
-//  /* The RW PT_LOAD starts here*/
-//  rw_sec : { *(rw_sec) }
-// would mean that the RW PT_LOAD would become unaligned.
-static bool shouldSkip(BaseCommand *Cmd) {
-  if (isa<OutputSectionCommand>(Cmd))
-    return false;
-  if (auto *Assign = dyn_cast<SymbolAssignment>(Cmd))
-    return Assign->Name != ".";
-  return true;
-}
-
-// Orphan sections are sections present in the input files which are
-// not explicitly placed into the output file by the linker script.
-//
-// When the control reaches this function, Opt.Commands contains
-// output section commands for non-orphan sections only. This function
-// adds new elements for orphan sections so that all sections are
-// explicitly handled by Opt.Commands.
-//
-// Writer<ELFT>::sortSections has already sorted output sections.
-// What we need to do is to scan OutputSections vector and
-// Opt.Commands in parallel to find orphan sections. If there is an
-// output section that doesn't have a corresponding entry in
-// Opt.Commands, we will insert a new entry to Opt.Commands.
-//
-// There is some ambiguity as to where exactly a new entry should be
-// inserted, because Opt.Commands contains not only output section
-// commands but also other types of commands such as symbol assignment
-// expressions. There's no correct answer here due to the lack of the
-// formal specification of the linker script. We use heuristics to
-// determine whether a new output command should be added before or
-// after another commands. For the details, look at shouldSkip
-// function.
-void LinkerScript::placeOrphanSections() {
-  // The OutputSections are already in the correct order.
-  // This loops creates or moves commands as needed so that they are in the
-  // correct order.
-  int CmdIndex = 0;
-
-  // As a horrible special case, skip the first . assignment if it is before any
-  // section. We do this because it is common to set a load address by starting
-  // the script with ". = 0xabcd" and the expectation is that every section is
-  // after that.
-  auto FirstSectionOrDotAssignment =
-      std::find_if(Opt.Commands.begin(), Opt.Commands.end(),
-                   [](BaseCommand *Cmd) { return !shouldSkip(Cmd); });
-  if (FirstSectionOrDotAssignment != Opt.Commands.end()) {
-    CmdIndex = FirstSectionOrDotAssignment - Opt.Commands.begin();
-    if (isa<SymbolAssignment>(**FirstSectionOrDotAssignment))
-      ++CmdIndex;
-  }
-
-  for (OutputSection *Sec : *OutputSections) {
-    StringRef Name = Sec->Name;
-
-    // Find the last spot where we can insert a command and still get the
-    // correct result.
-    auto CmdIter = Opt.Commands.begin() + CmdIndex;
-    auto E = Opt.Commands.end();
-    while (CmdIter != E && shouldSkip(*CmdIter)) {
-      ++CmdIter;
-      ++CmdIndex;
-    }
-
-    // If there is no command corresponding to this output section,
-    // create one and put a InputSectionDescription in it so that both
-    // representations agree on which input sections to use.
-    OutputSectionCommand *Cmd = getCmd(Sec);
-    if (!Cmd) {
-      Cmd = createOutputSectionCommand(Name, "<internal>");
-      Opt.Commands.insert(CmdIter, Cmd);
-      ++CmdIndex;
-
-      Cmd->Sec = Sec;
-      SecToCommand[Sec] = Cmd;
-      auto *ISD = make<InputSectionDescription>("");
-      for (InputSection *IS : Sec->Sections)
-        ISD->Sections.push_back(IS);
-      Cmd->Commands.push_back(ISD);
-
+void LinkerScript::createOrphanCommands() {
+  for (OutputSection *Sec : OutputSections) {
+    if (Sec->SectionIndex != INT_MAX)
       continue;
-    }
-
-    // Continue from where we found it.
-    while (*CmdIter != Cmd) {
-      ++CmdIter;
-      ++CmdIndex;
-    }
-    ++CmdIndex;
+    OutputSectionCommand *Cmd =
+        createOutputSectionCommand(Sec->Name, "<internal>");
+    Cmd->Sec = Sec;
+    SecToCommand[Sec] = Cmd;
+    auto *ISD = make<InputSectionDescription>("");
+    ISD->Sections = Sec->Sections;
+    Cmd->Commands.push_back(ISD);
+    Opt.Commands.push_back(Cmd);
   }
 }
 
 void LinkerScript::processNonSectionCommands() {
   for (BaseCommand *Base : Opt.Commands) {
     if (auto *Cmd = dyn_cast<SymbolAssignment>(Base))
       assignSymbol(Cmd, false);
     else if (auto *Cmd = dyn_cast<AssertCommand>(Base))
       Cmd->Expression();
   }
 }
 
 static bool
 allocateHeaders(std::vector<PhdrEntry> &Phdrs,
                 ArrayRef<OutputSectionCommand *> OutputSectionCommands,
                 uint64_t Min) {
   auto FirstPTLoad =
       std::find_if(Phdrs.begin(), Phdrs.end(),
                    [](const PhdrEntry &E) { return E.p_type == PT_LOAD; });
   if (FirstPTLoad == Phdrs.end())
     return false;
 
   uint64_t HeaderSize = getHeaderSize();
   if (HeaderSize <= Min || Script->hasPhdrsCommands()) {
     Min = alignDown(Min - HeaderSize, Config->MaxPageSize);
     Out::ElfHeader->Addr = Min;
     Out::ProgramHeaders->Addr = Min + Out::ElfHeader->Size;
     return true;
   }
 
   assert(FirstPTLoad->First == Out::ElfHeader);
   OutputSection *ActualFirst = nullptr;
   for (OutputSectionCommand *Cmd : OutputSectionCommands) {
     OutputSection *Sec = Cmd->Sec;
     if (Sec->FirstInPtLoad == Out::ElfHeader) {
       ActualFirst = Sec;
       break;
     }
   }
   if (ActualFirst) {
     for (OutputSectionCommand *Cmd : OutputSectionCommands) {
       OutputSection *Sec = Cmd->Sec;
       if (Sec->FirstInPtLoad == Out::ElfHeader)
         Sec->FirstInPtLoad = ActualFirst;
     }
     FirstPTLoad->First = ActualFirst;
   } else {
     Phdrs.erase(FirstPTLoad);
   }
 
   auto PhdrI = std::find_if(Phdrs.begin(), Phdrs.end(), [](const PhdrEntry &E) {
     return E.p_type == PT_PHDR;
   });
   if (PhdrI != Phdrs.end())
     Phdrs.erase(PhdrI);
   return false;
 }
 
-void LinkerScript::assignAddresses(
-    std::vector<PhdrEntry> &Phdrs,
-    ArrayRef<OutputSectionCommand *> OutputSectionCommands) {
+void LinkerScript::assignAddresses(std::vector<PhdrEntry> &Phdrs) {
   // Assign addresses as instructed by linker script SECTIONS sub-commands.
   Dot = 0;
   ErrorOnMissingSection = true;
   switchTo(Aether);
 
   for (BaseCommand *Base : Opt.Commands) {
     if (auto *Cmd = dyn_cast<SymbolAssignment>(Base)) {
       assignSymbol(Cmd, false);
       continue;
     }
 
     if (auto *Cmd = dyn_cast<AssertCommand>(Base)) {
       Cmd->Expression();
       continue;
     }
 
     auto *Cmd = cast<OutputSectionCommand>(Base);
     assignOffsets(Cmd);
   }
 
   uint64_t MinVA = std::numeric_limits<uint64_t>::max();
   for (OutputSectionCommand *Cmd : OutputSectionCommands) {
     OutputSection *Sec = Cmd->Sec;
     if (Sec->Flags & SHF_ALLOC)
       MinVA = std::min<uint64_t>(MinVA, Sec->Addr);
-    else
-      Sec->Addr = 0;
   }
 
   allocateHeaders(Phdrs, OutputSectionCommands, MinVA);
 }
 
 // Creates program headers as instructed by PHDRS linker script command.
 std::vector<PhdrEntry> LinkerScript::createPhdrs() {
   std::vector<PhdrEntry> Ret;
 
   // Process PHDRS and FILEHDR keywords because they are not
   // real output sections and cannot be added in the following loop.
   for (const PhdrsCommand &Cmd : Opt.PhdrsCommands) {
     Ret.emplace_back(Cmd.Type, Cmd.Flags == UINT_MAX ? PF_R : Cmd.Flags);
     PhdrEntry &Phdr = Ret.back();
 
     if (Cmd.HasFilehdr)
       Phdr.add(Out::ElfHeader);
     if (Cmd.HasPhdrs)
       Phdr.add(Out::ProgramHeaders);
 
     if (Cmd.LMAExpr) {
       Phdr.p_paddr = Cmd.LMAExpr().getValue();
       Phdr.HasLMA = true;
     }
   }
 
   // Add output sections to program headers.
-  for (OutputSection *Sec : *OutputSections) {
+  for (OutputSectionCommand *Cmd : OutputSectionCommands) {
+    OutputSection *Sec = Cmd->Sec;
     if (!(Sec->Flags & SHF_ALLOC))
       break;
 
     // Assign headers specified by linker script
     for (size_t Id : getPhdrIndices(Sec)) {
       Ret[Id].add(Sec);
       if (Opt.PhdrsCommands[Id].Flags == UINT_MAX)
         Ret[Id].p_flags |= Sec->getPhdrFlags();
     }
   }
   return Ret;
 }
 
 bool LinkerScript::ignoreInterpSection() {
   // Ignore .interp section in case we have PHDRS specification
   // and PT_INTERP isn't listed.
   if (Opt.PhdrsCommands.empty())
     return false;
   for (PhdrsCommand &Cmd : Opt.PhdrsCommands)
     if (Cmd.Type == PT_INTERP)
       return false;
   return true;
 }
 
 OutputSectionCommand *LinkerScript::getCmd(OutputSection *Sec) const {
   auto I = SecToCommand.find(Sec);
   if (I == SecToCommand.end())
     return nullptr;
   return I->second;
 }
 
 uint32_t OutputSectionCommand::getFiller() {
   if (Filler)
     return *Filler;
   if (Sec->Flags & SHF_EXECINSTR)
     return Target->TrapInstr;
   return 0;
 }
 
 static void writeInt(uint8_t *Buf, uint64_t Data, uint64_t Size) {
   if (Size == 1)
     *Buf = Data;
   else if (Size == 2)
     write16(Buf, Data, Config->Endianness);
   else if (Size == 4)
     write32(Buf, Data, Config->Endianness);
   else if (Size == 8)
     write64(Buf, Data, Config->Endianness);
   else
     llvm_unreachable("unsupported Size argument");
 }
 
 static bool compareByFilePosition(InputSection *A, InputSection *B) {
   // Synthetic doesn't have link order dependecy, stable_sort will keep it last
   if (A->kind() == InputSectionBase::Synthetic ||
       B->kind() == InputSectionBase::Synthetic)
     return false;
   InputSection *LA = A->getLinkOrderDep();
   InputSection *LB = B->getLinkOrderDep();
   OutputSection *AOut = LA->getParent();
   OutputSection *BOut = LB->getParent();
   if (AOut != BOut)
     return AOut->SectionIndex < BOut->SectionIndex;
   return LA->OutSecOff < LB->OutSecOff;
 }
 
 template <class ELFT>
 static void finalizeShtGroup(OutputSection *OS,
                              ArrayRef<InputSection *> Sections) {
   // sh_link field for SHT_GROUP sections should contain the section index of
   // the symbol table.
   OS->Link = InX::SymTab->getParent()->SectionIndex;
 
   // sh_info then contain index of an entry in symbol table section which
   // provides signature of the section group.
   elf::ObjectFile<ELFT> *Obj = Sections[0]->getFile<ELFT>();
   assert(Config->Relocatable && Sections.size() == 1);
   ArrayRef<SymbolBody *> Symbols = Obj->getSymbols();
   OS->Info = InX::SymTab->getSymbolIndex(Symbols[Sections[0]->Info - 1]);
 }
 
 template <class ELFT> void OutputSectionCommand::finalize() {
   // Link order may be distributed across several InputSectionDescriptions
   // but sort must consider them all at once.
   std::vector<InputSection **> ScriptSections;
   std::vector<InputSection *> Sections;
   for (BaseCommand *Base : Commands)
     if (auto *ISD = dyn_cast<InputSectionDescription>(Base))
       for (InputSection *&IS : ISD->Sections) {
         ScriptSections.push_back(&IS);
         Sections.push_back(IS);
       }
 
   if ((Sec->Flags & SHF_LINK_ORDER)) {
     std::sort(Sections.begin(), Sections.end(), compareByFilePosition);
     for (int I = 0, N = Sections.size(); I < N; ++I)
       *ScriptSections[I] = Sections[I];
 
     // We must preserve the link order dependency of sections with the
     // SHF_LINK_ORDER flag. The dependency is indicated by the sh_link field. We
     // need to translate the InputSection sh_link to the OutputSection sh_link,
     // all InputSections in the OutputSection have the same dependency.
     if (auto *D = Sections.front()->getLinkOrderDep())
       Sec->Link = D->getParent()->SectionIndex;
   }
 
   uint32_t Type = Sec->Type;
   if (Type == SHT_GROUP) {
     finalizeShtGroup<ELFT>(Sec, Sections);
     return;
   }
 
   if (!Config->CopyRelocs || (Type != SHT_RELA && Type != SHT_REL))
     return;
 
   InputSection *First = Sections[0];
   if (isa<SyntheticSection>(First))
     return;
 
   Sec->Link = InX::SymTab->getParent()->SectionIndex;
   // sh_info for SHT_REL[A] sections should contain the section header index of
   // the section to which the relocation applies.
   InputSectionBase *S = First->getRelocatedSection();
   Sec->Info = S->getOutputSection()->SectionIndex;
   Sec->Flags |= SHF_INFO_LINK;
 }
 
 // Compress section contents if this section contains debug info.
 template <class ELFT> void OutputSectionCommand::maybeCompress() {
   typedef typename ELFT::Chdr Elf_Chdr;
 
   // Compress only DWARF debug sections.
   if (!Config->CompressDebugSections || (Sec->Flags & SHF_ALLOC) ||
       !Name.startswith(".debug_"))
     return;
 
   // Create a section header.
   Sec->ZDebugHeader.resize(sizeof(Elf_Chdr));
   auto *Hdr = reinterpret_cast<Elf_Chdr *>(Sec->ZDebugHeader.data());
   Hdr->ch_type = ELFCOMPRESS_ZLIB;
   Hdr->ch_size = Sec->Size;
   Hdr->ch_addralign = Sec->Alignment;
 
   // Write section contents to a temporary buffer and compress it.
   std::vector<uint8_t> Buf(Sec->Size);
   writeTo<ELFT>(Buf.data());
   if (Error E = zlib::compress(toStringRef(Buf), Sec->CompressedData))
     fatal("compress failed: " + llvm::toString(std::move(E)));
 
   // Update section headers.
   Sec->Size = sizeof(Elf_Chdr) + Sec->CompressedData.size();
   Sec->Flags |= SHF_COMPRESSED;
 }
 
 template <class ELFT> void OutputSectionCommand::writeTo(uint8_t *Buf) {
   if (Sec->Type == SHT_NOBITS)
     return;
 
   Sec->Loc = Buf;
 
   // We may have already rendered compressed content when using
   // -compress-debug-sections option. Write it together with header.
   if (!Sec->CompressedData.empty()) {
     memcpy(Buf, Sec->ZDebugHeader.data(), Sec->ZDebugHeader.size());
     memcpy(Buf + Sec->ZDebugHeader.size(), Sec->CompressedData.data(),
            Sec->CompressedData.size());
     return;
   }
 
   // Write leading padding.
   std::vector<InputSection *> Sections;
   for (BaseCommand *Cmd : Commands)
     if (auto *ISD = dyn_cast<InputSectionDescription>(Cmd))
       for (InputSection *IS : ISD->Sections)
         if (IS->Live)
           Sections.push_back(IS);
   uint32_t Filler = getFiller();
   if (Filler)
     fill(Buf, Sections.empty() ? Sec->Size : Sections[0]->OutSecOff, Filler);
 
   parallelForEachN(0, Sections.size(), [=](size_t I) {
     InputSection *IS = Sections[I];
     IS->writeTo<ELFT>(Buf);
 
     // Fill gaps between sections.
     if (Filler) {
       uint8_t *Start = Buf + IS->OutSecOff + IS->getSize();
       uint8_t *End;
       if (I + 1 == Sections.size())
         End = Buf + Sec->Size;
       else
         End = Buf + Sections[I + 1]->OutSecOff;
       fill(Start, End - Start, Filler);
     }
   });
 
   // Linker scripts may have BYTE()-family commands with which you
   // can write arbitrary bytes to the output. Process them if any.
   for (BaseCommand *Base : Commands)
     if (auto *Data = dyn_cast<BytesDataCommand>(Base))
       writeInt(Buf + Data->Offset, Data->Expression().getValue(), Data->Size);
 }
 
 bool LinkerScript::hasLMA(OutputSection *Sec) {
   if (OutputSectionCommand *Cmd = getCmd(Sec))
     if (Cmd->LMAExpr)
       return true;
   return false;
 }
 
 ExprValue LinkerScript::getSymbolValue(const Twine &Loc, StringRef S) {
   if (S == ".")
     return {CurOutSec, Dot - CurOutSec->Addr, Loc};
   if (SymbolBody *B = findSymbol(S)) {
     if (auto *D = dyn_cast<DefinedRegular>(B))
       return {D->Section, D->Value, Loc};
     if (auto *C = dyn_cast<DefinedCommon>(B))
       return {InX::Common, C->Offset, Loc};
   }
   error(Loc + ": symbol not found: " + S);
   return 0;
 }
 
 bool LinkerScript::isDefined(StringRef S) { return findSymbol(S) != nullptr; }
 
 // Returns indices of ELF headers containing specific section. Each index is a
 // zero based number of ELF header listed within PHDRS {} script block.
 std::vector<size_t> LinkerScript::getPhdrIndices(OutputSection *Sec) {
   if (OutputSectionCommand *Cmd = getCmd(Sec)) {
     std::vector<size_t> Ret;
     for (StringRef PhdrName : Cmd->Phdrs)
       Ret.push_back(getPhdrIndex(Cmd->Location, PhdrName));
     return Ret;
   }
   return {};
 }
 
 size_t LinkerScript::getPhdrIndex(const Twine &Loc, StringRef PhdrName) {
   size_t I = 0;
   for (PhdrsCommand &Cmd : Opt.PhdrsCommands) {
     if (Cmd.Name == PhdrName)
       return I;
     ++I;
   }
   error(Loc + ": section header '" + PhdrName + "' is not listed in PHDRS");
   return 0;
 }
 
 template void OutputSectionCommand::writeTo<ELF32LE>(uint8_t *Buf);
 template void OutputSectionCommand::writeTo<ELF32BE>(uint8_t *Buf);
 template void OutputSectionCommand::writeTo<ELF64LE>(uint8_t *Buf);
 template void OutputSectionCommand::writeTo<ELF64BE>(uint8_t *Buf);
 
 template void OutputSectionCommand::maybeCompress<ELF32LE>();
 template void OutputSectionCommand::maybeCompress<ELF32BE>();
 template void OutputSectionCommand::maybeCompress<ELF64LE>();
 template void OutputSectionCommand::maybeCompress<ELF64BE>();
 
 template void OutputSectionCommand::finalize<ELF32LE>();
 template void OutputSectionCommand::finalize<ELF32BE>();
 template void OutputSectionCommand::finalize<ELF64LE>();
 template void OutputSectionCommand::finalize<ELF64BE>();
Index: vendor/lld/dist/ELF/LinkerScript.h
===================================================================
--- vendor/lld/dist/ELF/LinkerScript.h	(revision 320020)
+++ vendor/lld/dist/ELF/LinkerScript.h	(revision 320021)
@@ -1,300 +1,298 @@
 //===- LinkerScript.h -------------------------------------------*- C++ -*-===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLD_ELF_LINKER_SCRIPT_H
 #define LLD_ELF_LINKER_SCRIPT_H
 
 #include "Config.h"
 #include "Strings.h"
 #include "Writer.h"
 #include "lld/Core/LLVM.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/DenseSet.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Support/MemoryBuffer.h"
 #include <cstddef>
 #include <cstdint>
 #include <functional>
 #include <memory>
 #include <vector>
 
 namespace lld {
 namespace elf {
 
 class DefinedCommon;
 class SymbolBody;
 class InputSectionBase;
 class InputSection;
 class OutputSection;
 class OutputSectionFactory;
 class InputSectionBase;
 class SectionBase;
 
 struct ExprValue {
   SectionBase *Sec;
   uint64_t Val;
   bool ForceAbsolute;
   uint64_t Alignment = 1;
   std::string Loc;
 
   ExprValue(SectionBase *Sec, bool ForceAbsolute, uint64_t Val,
             const Twine &Loc)
       : Sec(Sec), Val(Val), ForceAbsolute(ForceAbsolute), Loc(Loc.str()) {}
   ExprValue(SectionBase *Sec, uint64_t Val, const Twine &Loc)
       : ExprValue(Sec, false, Val, Loc) {}
   ExprValue(uint64_t Val) : ExprValue(nullptr, Val, "") {}
   bool isAbsolute() const { return ForceAbsolute || Sec == nullptr; }
   uint64_t getValue() const;
   uint64_t getSecAddr() const;
 };
 
 // This represents an expression in the linker script.
 // ScriptParser::readExpr reads an expression and returns an Expr.
 // Later, we evaluate the expression by calling the function.
 typedef std::function<ExprValue()> Expr;
 
 // This enum is used to implement linker script SECTIONS command.
 // https://sourceware.org/binutils/docs/ld/SECTIONS.html#SECTIONS
 enum SectionsCommandKind {
   AssignmentKind, // . = expr or <sym> = expr
   OutputSectionKind,
   InputSectionKind,
   AssertKind,   // ASSERT(expr)
   BytesDataKind // BYTE(expr), SHORT(expr), LONG(expr) or QUAD(expr)
 };
 
 struct BaseCommand {
   BaseCommand(int K) : Kind(K) {}
   int Kind;
 };
 
 // This represents ". = <expr>" or "<symbol> = <expr>".
 struct SymbolAssignment : BaseCommand {
   SymbolAssignment(StringRef Name, Expr E, std::string Loc)
       : BaseCommand(AssignmentKind), Name(Name), Expression(E), Location(Loc) {}
 
   static bool classof(const BaseCommand *C);
 
   // The LHS of an expression. Name is either a symbol name or ".".
   StringRef Name;
   SymbolBody *Sym = nullptr;
 
   // The RHS of an expression.
   Expr Expression;
 
   // Command attributes for PROVIDE, HIDDEN and PROVIDE_HIDDEN.
   bool Provide = false;
   bool Hidden = false;
 
   // Holds file name and line number for error reporting.
   std::string Location;
 };
 
 // Linker scripts allow additional constraints to be put on ouput sections.
 // If an output section is marked as ONLY_IF_RO, the section is created
 // only if its input sections are read-only. Likewise, an output section
 // with ONLY_IF_RW is created if all input sections are RW.
 enum class ConstraintKind { NoConstraint, ReadOnly, ReadWrite };
 
 // This struct is used to represent the location and size of regions of
 // target memory. Instances of the struct are created by parsing the
 // MEMORY command.
 struct MemoryRegion {
   std::string Name;
   uint64_t Origin;
   uint64_t Length;
   uint64_t Offset;
   uint32_t Flags;
   uint32_t NegFlags;
 };
 
 struct OutputSectionCommand : BaseCommand {
   OutputSectionCommand(StringRef Name)
       : BaseCommand(OutputSectionKind), Name(Name) {}
 
   static bool classof(const BaseCommand *C);
 
   OutputSection *Sec = nullptr;
   MemoryRegion *MemRegion = nullptr;
   StringRef Name;
   Expr AddrExpr;
   Expr AlignExpr;
   Expr LMAExpr;
   Expr SubalignExpr;
   std::vector<BaseCommand *> Commands;
   std::vector<StringRef> Phdrs;
   llvm::Optional<uint32_t> Filler;
   ConstraintKind Constraint = ConstraintKind::NoConstraint;
   std::string Location;
   std::string MemoryRegionName;
   bool Noload = false;
 
   template <class ELFT> void finalize();
   template <class ELFT> void writeTo(uint8_t *Buf);
   template <class ELFT> void maybeCompress();
   uint32_t getFiller();
 };
 
 // This struct represents one section match pattern in SECTIONS() command.
 // It can optionally have negative match pattern for EXCLUDED_FILE command.
 // Also it may be surrounded with SORT() command, so contains sorting rules.
 struct SectionPattern {
   SectionPattern(StringMatcher &&Pat1, StringMatcher &&Pat2)
       : ExcludedFilePat(Pat1), SectionPat(Pat2) {}
 
   StringMatcher ExcludedFilePat;
   StringMatcher SectionPat;
   SortSectionPolicy SortOuter;
   SortSectionPolicy SortInner;
 };
 
 struct InputSectionDescription : BaseCommand {
   InputSectionDescription(StringRef FilePattern)
       : BaseCommand(InputSectionKind), FilePat(FilePattern) {}
 
   static bool classof(const BaseCommand *C);
 
   StringMatcher FilePat;
 
   // Input sections that matches at least one of SectionPatterns
   // will be associated with this InputSectionDescription.
   std::vector<SectionPattern> SectionPatterns;
 
   std::vector<InputSection *> Sections;
 };
 
 // Represents an ASSERT().
 struct AssertCommand : BaseCommand {
   AssertCommand(Expr E) : BaseCommand(AssertKind), Expression(E) {}
 
   static bool classof(const BaseCommand *C);
 
   Expr Expression;
 };
 
 // Represents BYTE(), SHORT(), LONG(), or QUAD().
 struct BytesDataCommand : BaseCommand {
   BytesDataCommand(Expr E, unsigned Size)
       : BaseCommand(BytesDataKind), Expression(E), Size(Size) {}
 
   static bool classof(const BaseCommand *C);
 
   Expr Expression;
   unsigned Offset;
   unsigned Size;
 };
 
 struct PhdrsCommand {
   StringRef Name;
   unsigned Type;
   bool HasFilehdr;
   bool HasPhdrs;
   unsigned Flags;
   Expr LMAExpr;
 };
 
 // ScriptConfiguration holds linker script parse results.
 struct ScriptConfiguration {
   // Used to assign addresses to sections.
   std::vector<BaseCommand *> Commands;
 
   // Used to assign sections to headers.
   std::vector<PhdrsCommand> PhdrsCommands;
 
   bool HasSections = false;
 
   // List of section patterns specified with KEEP commands. They will
   // be kept even if they are unused and --gc-sections is specified.
   std::vector<InputSectionDescription *> KeptSections;
 
   // A map from memory region name to a memory region descriptor.
   llvm::DenseMap<llvm::StringRef, MemoryRegion> MemoryRegions;
 
   // A list of symbols referenced by the script.
   std::vector<llvm::StringRef> ReferencedSymbols;
 };
 
 class LinkerScript final {
   llvm::DenseMap<OutputSection *, OutputSectionCommand *> SecToCommand;
   llvm::DenseMap<StringRef, OutputSectionCommand *> NameToOutputSectionCommand;
 
   void assignSymbol(SymbolAssignment *Cmd, bool InSec);
   void setDot(Expr E, const Twine &Loc, bool InSec);
 
   std::vector<InputSection *>
   computeInputSections(const InputSectionDescription *);
 
   std::vector<InputSectionBase *>
   createInputSectionList(OutputSectionCommand &Cmd);
 
   std::vector<size_t> getPhdrIndices(OutputSection *Sec);
   size_t getPhdrIndex(const Twine &Loc, StringRef PhdrName);
 
   MemoryRegion *findMemoryRegion(OutputSectionCommand *Cmd);
 
   void switchTo(OutputSection *Sec);
   uint64_t advance(uint64_t Size, unsigned Align);
   void output(InputSection *Sec);
   void process(BaseCommand &Base);
 
   OutputSection *Aether;
 
   uint64_t Dot;
   uint64_t ThreadBssOffset = 0;
 
   std::function<uint64_t()> LMAOffset;
   OutputSection *CurOutSec = nullptr;
   MemoryRegion *CurMemRegion = nullptr;
 
 public:
   bool ErrorOnMissingSection = false;
   OutputSectionCommand *createOutputSectionCommand(StringRef Name,
                                                    StringRef Location);
   OutputSectionCommand *getOrCreateOutputSectionCommand(StringRef Name);
 
   OutputSectionCommand *getCmd(OutputSection *Sec) const;
   bool hasPhdrsCommands() { return !Opt.PhdrsCommands.empty(); }
   uint64_t getDot() { return Dot; }
   void discard(ArrayRef<InputSectionBase *> V);
 
   ExprValue getSymbolValue(const Twine &Loc, StringRef S);
   bool isDefined(StringRef S);
 
-  std::vector<OutputSection *> *OutputSections;
   void fabricateDefaultCommands();
   void addOrphanSections(OutputSectionFactory &Factory);
   void removeEmptyCommands();
   void adjustSectionsBeforeSorting();
   void adjustSectionsAfterSorting();
 
   std::vector<PhdrEntry> createPhdrs();
   bool ignoreInterpSection();
 
   bool hasLMA(OutputSection *Sec);
   bool shouldKeep(InputSectionBase *S);
   void assignOffsets(OutputSectionCommand *Cmd);
-  void placeOrphanSections();
+  void createOrphanCommands();
   void processNonSectionCommands();
-  void assignAddresses(std::vector<PhdrEntry> &Phdrs,
-                       ArrayRef<OutputSectionCommand *> OutputSectionCommands);
+  void assignAddresses(std::vector<PhdrEntry> &Phdrs);
 
   void addSymbol(SymbolAssignment *Cmd);
   void processCommands(OutputSectionFactory &Factory);
 
   // Parsed linker script configurations are set to this struct.
   ScriptConfiguration Opt;
 };
 
 extern LinkerScript *Script;
 
 } // end namespace elf
 } // end namespace lld
 
 #endif // LLD_ELF_LINKER_SCRIPT_H
Index: vendor/lld/dist/ELF/MarkLive.cpp
===================================================================
--- vendor/lld/dist/ELF/MarkLive.cpp	(revision 320020)
+++ vendor/lld/dist/ELF/MarkLive.cpp	(revision 320021)
@@ -1,266 +1,268 @@
 //===- MarkLive.cpp -------------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements --gc-sections, which is a feature to remove unused
 // sections from output. Unused sections are sections that are not reachable
 // from known GC-root symbols or sections. Naturally the feature is
 // implemented as a mark-sweep garbage collector.
 //
 // Here's how it works. Each InputSectionBase has a "Live" bit. The bit is off
 // by default. Starting with GC-root symbols or sections, markLive function
 // defined in this file visits all reachable sections to set their Live
 // bits. Writer will then ignore sections whose Live bits are off, so that
 // such sections are not included into output.
 //
 //===----------------------------------------------------------------------===//
 
 #include "InputSection.h"
 #include "LinkerScript.h"
 #include "Memory.h"
 #include "OutputSections.h"
 #include "Strings.h"
 #include "SymbolTable.h"
 #include "Symbols.h"
 #include "Target.h"
 #include "Writer.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/Object/ELF.h"
 #include <functional>
 #include <vector>
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
 using namespace llvm::support::endian;
 
 using namespace lld;
 using namespace lld::elf;
 
 namespace {
 // A resolved relocation. The Sec and Offset fields are set if the relocation
 // was resolved to an offset within a section.
 struct ResolvedReloc {
   InputSectionBase *Sec;
   uint64_t Offset;
 };
 } // end anonymous namespace
 
 template <class ELFT>
 static typename ELFT::uint getAddend(InputSectionBase &Sec,
                                      const typename ELFT::Rel &Rel) {
   return Target->getImplicitAddend(Sec.Data.begin() + Rel.r_offset,
                                    Rel.getType(Config->IsMips64EL));
 }
 
 template <class ELFT>
 static typename ELFT::uint getAddend(InputSectionBase &Sec,
                                      const typename ELFT::Rela &Rel) {
   return Rel.r_addend;
 }
 
 // There are normally few input sections whose names are valid C
 // identifiers, so we just store a std::vector instead of a multimap.
 static DenseMap<StringRef, std::vector<InputSectionBase *>> CNamedSections;
 
 template <class ELFT, class RelT>
 static void resolveReloc(InputSectionBase &Sec, RelT &Rel,
                          std::function<void(ResolvedReloc)> Fn) {
   SymbolBody &B = Sec.getFile<ELFT>()->getRelocTargetSym(Rel);
   if (auto *D = dyn_cast<DefinedRegular>(&B)) {
     if (!D->Section)
       return;
     typename ELFT::uint Offset = D->Value;
     if (D->isSection())
       Offset += getAddend<ELFT>(Sec, Rel);
     Fn({cast<InputSectionBase>(D->Section)->Repl, Offset});
   } else if (auto *U = dyn_cast<Undefined>(&B)) {
     for (InputSectionBase *Sec : CNamedSections.lookup(U->getName()))
       Fn({Sec, 0});
   }
 }
 
 // Calls Fn for each section that Sec refers to via relocations.
 template <class ELFT>
 static void forEachSuccessor(InputSection &Sec,
                              std::function<void(ResolvedReloc)> Fn) {
   if (Sec.AreRelocsRela) {
     for (const typename ELFT::Rela &Rel : Sec.template relas<ELFT>())
       resolveReloc<ELFT>(Sec, Rel, Fn);
   } else {
     for (const typename ELFT::Rel &Rel : Sec.template rels<ELFT>())
       resolveReloc<ELFT>(Sec, Rel, Fn);
   }
   for (InputSectionBase *IS : Sec.DependentSections)
     Fn({IS, 0});
 }
 
 // The .eh_frame section is an unfortunate special case.
 // The section is divided in CIEs and FDEs and the relocations it can have are
 // * CIEs can refer to a personality function.
 // * FDEs can refer to a LSDA
 // * FDEs refer to the function they contain information about
 // The last kind of relocation cannot keep the referred section alive, or they
 // would keep everything alive in a common object file. In fact, each FDE is
 // alive if the section it refers to is alive.
 // To keep things simple, in here we just ignore the last relocation kind. The
 // other two keep the referred section alive.
 //
 // A possible improvement would be to fully process .eh_frame in the middle of
 // the gc pass. With that we would be able to also gc some sections holding
 // LSDAs and personality functions if we found that they were unused.
 template <class ELFT, class RelTy>
 static void scanEhFrameSection(EhInputSection &EH, ArrayRef<RelTy> Rels,
                                std::function<void(ResolvedReloc)> Enqueue) {
   const endianness E = ELFT::TargetEndianness;
   for (unsigned I = 0, N = EH.Pieces.size(); I < N; ++I) {
     EhSectionPiece &Piece = EH.Pieces[I];
     unsigned FirstRelI = Piece.FirstRelocation;
     if (FirstRelI == (unsigned)-1)
       continue;
     if (read32<E>(Piece.data().data() + 4) == 0) {
       // This is a CIE, we only need to worry about the first relocation. It is
       // known to point to the personality function.
       resolveReloc<ELFT>(EH, Rels[FirstRelI], Enqueue);
       continue;
     }
     // This is a FDE. The relocations point to the described function or to
     // a LSDA. We only need to keep the LSDA alive, so ignore anything that
     // points to executable sections.
     typename ELFT::uint PieceEnd = Piece.InputOff + Piece.size();
     for (unsigned I2 = FirstRelI, N2 = Rels.size(); I2 < N2; ++I2) {
       const RelTy &Rel = Rels[I2];
       if (Rel.r_offset >= PieceEnd)
         break;
       resolveReloc<ELFT>(EH, Rels[I2], [&](ResolvedReloc R) {
         if (!R.Sec || R.Sec == &InputSection::Discarded)
           return;
         if (R.Sec->Flags & SHF_EXECINSTR)
           return;
         Enqueue({R.Sec, 0});
       });
     }
   }
 }
 
 template <class ELFT>
 static void scanEhFrameSection(EhInputSection &EH,
                                std::function<void(ResolvedReloc)> Enqueue) {
   if (!EH.NumRelocations)
     return;
 
   // Unfortunately we need to split .eh_frame early since some relocations in
   // .eh_frame keep other section alive and some don't.
   EH.split<ELFT>();
 
   if (EH.AreRelocsRela)
     scanEhFrameSection<ELFT>(EH, EH.template relas<ELFT>(), Enqueue);
   else
     scanEhFrameSection<ELFT>(EH, EH.template rels<ELFT>(), Enqueue);
 }
 
 // We do not garbage-collect two types of sections:
 // 1) Sections used by the loader (.init, .fini, .ctors, .dtors or .jcr)
 // 2) Non-allocatable sections which typically contain debugging information
 template <class ELFT> static bool isReserved(InputSectionBase *Sec) {
   switch (Sec->Type) {
   case SHT_FINI_ARRAY:
   case SHT_INIT_ARRAY:
   case SHT_NOTE:
   case SHT_PREINIT_ARRAY:
     return true;
   default:
     if (!(Sec->Flags & SHF_ALLOC))
       return true;
 
     StringRef S = Sec->Name;
     return S.startswith(".ctors") || S.startswith(".dtors") ||
            S.startswith(".init") || S.startswith(".fini") ||
            S.startswith(".jcr");
   }
 }
 
 // This is the main function of the garbage collector.
 // Starting from GC-root sections, this function visits all reachable
 // sections to set their "Live" bits.
 template <class ELFT> void elf::markLive() {
   SmallVector<InputSection *, 256> Q;
   CNamedSections.clear();
 
   auto Enqueue = [&](ResolvedReloc R) {
     // Skip over discarded sections. This in theory shouldn't happen, because
     // the ELF spec doesn't allow a relocation to point to a deduplicated
     // COMDAT section directly. Unfortunately this happens in practice (e.g.
     // .eh_frame) so we need to add a check.
     if (R.Sec == &InputSection::Discarded)
       return;
 
     // We don't gc non alloc sections.
     if (!(R.Sec->Flags & SHF_ALLOC))
       return;
 
     // Usually, a whole section is marked as live or dead, but in mergeable
     // (splittable) sections, each piece of data has independent liveness bit.
     // So we explicitly tell it which offset is in use.
     if (auto *MS = dyn_cast<MergeInputSection>(R.Sec))
       MS->markLiveAt(R.Offset);
 
     if (R.Sec->Live)
       return;
     R.Sec->Live = true;
     // Add input section to the queue.
     if (InputSection *S = dyn_cast<InputSection>(R.Sec))
       Q.push_back(S);
   };
 
   auto MarkSymbol = [&](const SymbolBody *Sym) {
     if (auto *D = dyn_cast_or_null<DefinedRegular>(Sym))
       if (auto *IS = cast_or_null<InputSectionBase>(D->Section))
         Enqueue({IS, D->Value});
   };
 
   // Add GC root symbols.
   MarkSymbol(Symtab<ELFT>::X->find(Config->Entry));
   MarkSymbol(Symtab<ELFT>::X->find(Config->Init));
   MarkSymbol(Symtab<ELFT>::X->find(Config->Fini));
   for (StringRef S : Config->Undefined)
     MarkSymbol(Symtab<ELFT>::X->find(S));
+  for (StringRef S : Script->Opt.ReferencedSymbols)
+    MarkSymbol(Symtab<ELFT>::X->find(S));
 
   // Preserve externally-visible symbols if the symbols defined by this
   // file can interrupt other ELF file's symbols at runtime.
   for (const Symbol *S : Symtab<ELFT>::X->getSymbols())
     if (S->includeInDynsym())
       MarkSymbol(S->body());
 
   // Preserve special sections and those which are specified in linker
   // script KEEP command.
   for (InputSectionBase *Sec : InputSections) {
     // .eh_frame is always marked as live now, but also it can reference to
     // sections that contain personality. We preserve all non-text sections
     // referred by .eh_frame here.
     if (auto *EH = dyn_cast_or_null<EhInputSection>(Sec))
       scanEhFrameSection<ELFT>(*EH, Enqueue);
     if (Sec->Flags & SHF_LINK_ORDER)
       continue;
     if (isReserved<ELFT>(Sec) || Script->shouldKeep(Sec))
       Enqueue({Sec, 0});
     else if (isValidCIdentifier(Sec->Name)) {
       CNamedSections[Saver.save("__start_" + Sec->Name)].push_back(Sec);
       CNamedSections[Saver.save("__end_" + Sec->Name)].push_back(Sec);
     }
   }
 
   // Mark all reachable sections.
   while (!Q.empty())
     forEachSuccessor<ELFT>(*Q.pop_back_val(), Enqueue);
 }
 
 template void elf::markLive<ELF32LE>();
 template void elf::markLive<ELF32BE>();
 template void elf::markLive<ELF64LE>();
 template void elf::markLive<ELF64BE>();
Index: vendor/lld/dist/ELF/OutputSections.cpp
===================================================================
--- vendor/lld/dist/ELF/OutputSections.cpp	(revision 320020)
+++ vendor/lld/dist/ELF/OutputSections.cpp	(revision 320021)
@@ -1,370 +1,373 @@
 //===- OutputSections.cpp -------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #include "OutputSections.h"
 #include "Config.h"
 #include "LinkerScript.h"
 #include "Memory.h"
 #include "Strings.h"
 #include "SymbolTable.h"
 #include "SyntheticSections.h"
 #include "Target.h"
 #include "Threads.h"
 #include "llvm/BinaryFormat/Dwarf.h"
 #include "llvm/Support/MD5.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/SHA1.h"
 
 using namespace llvm;
 using namespace llvm::dwarf;
 using namespace llvm::object;
 using namespace llvm::support::endian;
 using namespace llvm::ELF;
 
 using namespace lld;
 using namespace lld::elf;
 
 uint8_t Out::First;
 OutputSection *Out::Opd;
 uint8_t *Out::OpdBuf;
 PhdrEntry *Out::TlsPhdr;
 OutputSection *Out::DebugInfo;
 OutputSection *Out::ElfHeader;
 OutputSection *Out::ProgramHeaders;
 OutputSection *Out::PreinitArray;
 OutputSection *Out::InitArray;
 OutputSection *Out::FiniArray;
 
+std::vector<OutputSection *> elf::OutputSections;
+std::vector<OutputSectionCommand *> elf::OutputSectionCommands;
+
 uint32_t OutputSection::getPhdrFlags() const {
   uint32_t Ret = PF_R;
   if (Flags & SHF_WRITE)
     Ret |= PF_W;
   if (Flags & SHF_EXECINSTR)
     Ret |= PF_X;
   return Ret;
 }
 
 template <class ELFT>
 void OutputSection::writeHeaderTo(typename ELFT::Shdr *Shdr) {
   Shdr->sh_entsize = Entsize;
   Shdr->sh_addralign = Alignment;
   Shdr->sh_type = Type;
   Shdr->sh_offset = Offset;
   Shdr->sh_flags = Flags;
   Shdr->sh_info = Info;
   Shdr->sh_link = Link;
   Shdr->sh_addr = Addr;
   Shdr->sh_size = Size;
   Shdr->sh_name = ShName;
 }
 
 OutputSection::OutputSection(StringRef Name, uint32_t Type, uint64_t Flags)
     : SectionBase(Output, Name, Flags, /*Entsize*/ 0, /*Alignment*/ 1, Type,
                   /*Info*/ 0,
                   /*Link*/ 0),
       SectionIndex(INT_MAX) {}
 
 static uint64_t updateOffset(uint64_t Off, InputSection *S) {
   Off = alignTo(Off, S->Alignment);
   S->OutSecOff = Off;
   return Off + S->getSize();
 }
 
 void OutputSection::addSection(InputSection *S) {
   assert(S->Live);
   Sections.push_back(S);
   S->Parent = this;
   this->updateAlignment(S->Alignment);
 
   // The actual offsets will be computed by assignAddresses. For now, use
   // crude approximation so that it is at least easy for other code to know the
   // section order. It is also used to calculate the output section size early
   // for compressed debug sections.
   this->Size = updateOffset(Size, S);
 
   // If this section contains a table of fixed-size entries, sh_entsize
   // holds the element size. Consequently, if this contains two or more
   // input sections, all of them must have the same sh_entsize. However,
   // you can put different types of input sections into one output
   // sectin by using linker scripts. I don't know what to do here.
   // Probably we sholuld handle that as an error. But for now we just
   // pick the largest sh_entsize.
   this->Entsize = std::max(this->Entsize, S->Entsize);
 }
 
 // This function is called after we sort input sections
 // and scan relocations to setup sections' offsets.
 void OutputSection::assignOffsets() {
   OutputSectionCommand *Cmd = Script->getCmd(this);
   uint64_t Off = 0;
   for (BaseCommand *Base : Cmd->Commands)
     if (auto *ISD = dyn_cast<InputSectionDescription>(Base))
       for (InputSection *S : ISD->Sections)
         Off = updateOffset(Off, S);
   this->Size = Off;
 }
 
 void OutputSection::sort(std::function<int(InputSectionBase *S)> Order) {
   typedef std::pair<unsigned, InputSection *> Pair;
   auto Comp = [](const Pair &A, const Pair &B) { return A.first < B.first; };
 
   std::vector<Pair> V;
   for (InputSection *S : Sections)
     V.push_back({Order(S), S});
   std::stable_sort(V.begin(), V.end(), Comp);
   Sections.clear();
   for (Pair &P : V)
     Sections.push_back(P.second);
 }
 
 // Sorts input sections by section name suffixes, so that .foo.N comes
 // before .foo.M if N < M. Used to sort .{init,fini}_array.N sections.
 // We want to keep the original order if the priorities are the same
 // because the compiler keeps the original initialization order in a
 // translation unit and we need to respect that.
 // For more detail, read the section of the GCC's manual about init_priority.
 void OutputSection::sortInitFini() {
   // Sort sections by priority.
   sort([](InputSectionBase *S) { return getPriority(S->Name); });
 }
 
 // Returns true if S matches /Filename.?\.o$/.
 static bool isCrtBeginEnd(StringRef S, StringRef Filename) {
   if (!S.endswith(".o"))
     return false;
   S = S.drop_back(2);
   if (S.endswith(Filename))
     return true;
   return !S.empty() && S.drop_back().endswith(Filename);
 }
 
 static bool isCrtbegin(StringRef S) { return isCrtBeginEnd(S, "crtbegin"); }
 static bool isCrtend(StringRef S) { return isCrtBeginEnd(S, "crtend"); }
 
 // .ctors and .dtors are sorted by this priority from highest to lowest.
 //
 //  1. The section was contained in crtbegin (crtbegin contains
 //     some sentinel value in its .ctors and .dtors so that the runtime
 //     can find the beginning of the sections.)
 //
 //  2. The section has an optional priority value in the form of ".ctors.N"
 //     or ".dtors.N" where N is a number. Unlike .{init,fini}_array,
 //     they are compared as string rather than number.
 //
 //  3. The section is just ".ctors" or ".dtors".
 //
 //  4. The section was contained in crtend, which contains an end marker.
 //
 // In an ideal world, we don't need this function because .init_array and
 // .ctors are duplicate features (and .init_array is newer.) However, there
 // are too many real-world use cases of .ctors, so we had no choice to
 // support that with this rather ad-hoc semantics.
 static bool compCtors(const InputSection *A, const InputSection *B) {
   bool BeginA = isCrtbegin(A->File->getName());
   bool BeginB = isCrtbegin(B->File->getName());
   if (BeginA != BeginB)
     return BeginA;
   bool EndA = isCrtend(A->File->getName());
   bool EndB = isCrtend(B->File->getName());
   if (EndA != EndB)
     return EndB;
   StringRef X = A->Name;
   StringRef Y = B->Name;
   assert(X.startswith(".ctors") || X.startswith(".dtors"));
   assert(Y.startswith(".ctors") || Y.startswith(".dtors"));
   X = X.substr(6);
   Y = Y.substr(6);
   if (X.empty() && Y.empty())
     return false;
   return X < Y;
 }
 
 // Sorts input sections by the special rules for .ctors and .dtors.
 // Unfortunately, the rules are different from the one for .{init,fini}_array.
 // Read the comment above.
 void OutputSection::sortCtorsDtors() {
   std::stable_sort(Sections.begin(), Sections.end(), compCtors);
 }
 
 static SectionKey createKey(InputSectionBase *C, StringRef OutsecName) {
   //  The ELF spec just says
   // ----------------------------------------------------------------
   // In the first phase, input sections that match in name, type and
   // attribute flags should be concatenated into single sections.
   // ----------------------------------------------------------------
   //
   // However, it is clear that at least some flags have to be ignored for
   // section merging. At the very least SHF_GROUP and SHF_COMPRESSED have to be
   // ignored. We should not have two output .text sections just because one was
   // in a group and another was not for example.
   //
   // It also seems that that wording was a late addition and didn't get the
   // necessary scrutiny.
   //
   // Merging sections with different flags is expected by some users. One
   // reason is that if one file has
   //
   // int *const bar __attribute__((section(".foo"))) = (int *)0;
   //
   // gcc with -fPIC will produce a read only .foo section. But if another
   // file has
   //
   // int zed;
   // int *const bar __attribute__((section(".foo"))) = (int *)&zed;
   //
   // gcc with -fPIC will produce a read write section.
   //
   // Last but not least, when using linker script the merge rules are forced by
   // the script. Unfortunately, linker scripts are name based. This means that
   // expressions like *(.foo*) can refer to multiple input sections with
   // different flags. We cannot put them in different output sections or we
   // would produce wrong results for
   //
   // start = .; *(.foo.*) end = .; *(.bar)
   //
   // and a mapping of .foo1 and .bar1 to one section and .foo2 and .bar2 to
   // another. The problem is that there is no way to layout those output
   // sections such that the .foo sections are the only thing between the start
   // and end symbols.
   //
   // Given the above issues, we instead merge sections by name and error on
   // incompatible types and flags.
 
   uint32_t Alignment = 0;
   uint64_t Flags = 0;
   if (Config->Relocatable && (C->Flags & SHF_MERGE)) {
     Alignment = std::max<uint64_t>(C->Alignment, C->Entsize);
     Flags = C->Flags & (SHF_MERGE | SHF_STRINGS);
   }
 
   return SectionKey{OutsecName, Flags, Alignment};
 }
 
 OutputSectionFactory::OutputSectionFactory(
     std::vector<OutputSection *> &OutputSections)
     : OutputSections(OutputSections) {}
 
 static uint64_t getIncompatibleFlags(uint64_t Flags) {
   return Flags & (SHF_ALLOC | SHF_TLS);
 }
 
 // We allow sections of types listed below to merged into a
 // single progbits section. This is typically done by linker
 // scripts. Merging nobits and progbits will force disk space
 // to be allocated for nobits sections. Other ones don't require
 // any special treatment on top of progbits, so there doesn't
 // seem to be a harm in merging them.
 static bool canMergeToProgbits(unsigned Type) {
   return Type == SHT_NOBITS || Type == SHT_PROGBITS || Type == SHT_INIT_ARRAY ||
          Type == SHT_PREINIT_ARRAY || Type == SHT_FINI_ARRAY ||
          Type == SHT_NOTE;
 }
 
 void elf::reportDiscarded(InputSectionBase *IS) {
   if (!Config->PrintGcSections)
     return;
   message("removing unused section from '" + IS->Name + "' in file '" +
           IS->File->getName());
 }
 
 void OutputSectionFactory::addInputSec(InputSectionBase *IS,
                                        StringRef OutsecName) {
   // Sections with the SHT_GROUP attribute reach here only when the - r option
   // is given. Such sections define "section groups", and InputFiles.cpp has
   // dedup'ed section groups by their signatures. For the -r, we want to pass
   // through all SHT_GROUP sections without merging them because merging them
   // creates broken section contents.
   if (IS->Type == SHT_GROUP) {
     OutputSection *Out = nullptr;
     addInputSec(IS, OutsecName, Out);
     return;
   }
 
   // Imagine .zed : { *(.foo) *(.bar) } script. Both foo and bar may have
   // relocation sections .rela.foo and .rela.bar for example. Most tools do
   // not allow multiple REL[A] sections for output section. Hence we
   // should combine these relocation sections into single output.
   // We skip synthetic sections because it can be .rela.dyn/.rela.plt or any
   // other REL[A] sections created by linker itself.
   if (!isa<SyntheticSection>(IS) &&
       (IS->Type == SHT_REL || IS->Type == SHT_RELA)) {
     auto *Sec = cast<InputSection>(IS);
     OutputSection *Out = Sec->getRelocatedSection()->getOutputSection();
     addInputSec(IS, OutsecName, Out->RelocationSection);
     return;
   }
 
   SectionKey Key = createKey(IS, OutsecName);
   OutputSection *&Sec = Map[Key];
   return addInputSec(IS, OutsecName, Sec);
 }
 
 void OutputSectionFactory::addInputSec(InputSectionBase *IS,
                                        StringRef OutsecName,
                                        OutputSection *&Sec) {
   if (!IS->Live) {
     reportDiscarded(IS);
     return;
   }
 
   if (Sec) {
     if (getIncompatibleFlags(Sec->Flags) != getIncompatibleFlags(IS->Flags))
       error("incompatible section flags for " + Sec->Name +
             "\n>>> " + toString(IS) + ": 0x" + utohexstr(IS->Flags) +
             "\n>>> output section " + Sec->Name + ": 0x" +
             utohexstr(Sec->Flags));
     if (Sec->Type != IS->Type) {
       if (canMergeToProgbits(Sec->Type) && canMergeToProgbits(IS->Type))
         Sec->Type = SHT_PROGBITS;
       else
         error("section type mismatch for " + IS->Name +
               "\n>>> " + toString(IS) + ": " +
               getELFSectionTypeName(Config->EMachine, IS->Type) +
               "\n>>> output section " + Sec->Name + ": " +
               getELFSectionTypeName(Config->EMachine, Sec->Type));
     }
     Sec->Flags |= IS->Flags;
   } else {
     Sec = make<OutputSection>(OutsecName, IS->Type, IS->Flags);
     OutputSections.push_back(Sec);
   }
 
   Sec->addSection(cast<InputSection>(IS));
 }
 
 OutputSectionFactory::~OutputSectionFactory() {}
 
 SectionKey DenseMapInfo<SectionKey>::getEmptyKey() {
   return SectionKey{DenseMapInfo<StringRef>::getEmptyKey(), 0, 0};
 }
 
 SectionKey DenseMapInfo<SectionKey>::getTombstoneKey() {
   return SectionKey{DenseMapInfo<StringRef>::getTombstoneKey(), 0, 0};
 }
 
 unsigned DenseMapInfo<SectionKey>::getHashValue(const SectionKey &Val) {
   return hash_combine(Val.Name, Val.Flags, Val.Alignment);
 }
 
 bool DenseMapInfo<SectionKey>::isEqual(const SectionKey &LHS,
                                        const SectionKey &RHS) {
   return DenseMapInfo<StringRef>::isEqual(LHS.Name, RHS.Name) &&
          LHS.Flags == RHS.Flags && LHS.Alignment == RHS.Alignment;
 }
 
 uint64_t elf::getHeaderSize() {
   if (Config->OFormatBinary)
     return 0;
   return Out::ElfHeader->Size + Out::ProgramHeaders->Size;
 }
 
 template void OutputSection::writeHeaderTo<ELF32LE>(ELF32LE::Shdr *Shdr);
 template void OutputSection::writeHeaderTo<ELF32BE>(ELF32BE::Shdr *Shdr);
 template void OutputSection::writeHeaderTo<ELF64LE>(ELF64LE::Shdr *Shdr);
 template void OutputSection::writeHeaderTo<ELF64BE>(ELF64BE::Shdr *Shdr);
Index: vendor/lld/dist/ELF/OutputSections.h
===================================================================
--- vendor/lld/dist/ELF/OutputSections.h	(revision 320020)
+++ vendor/lld/dist/ELF/OutputSections.h	(revision 320021)
@@ -1,157 +1,159 @@
 //===- OutputSections.h -----------------------------------------*- C++ -*-===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLD_ELF_OUTPUT_SECTIONS_H
 #define LLD_ELF_OUTPUT_SECTIONS_H
 
 #include "Config.h"
 #include "InputSection.h"
 #include "Relocations.h"
 
 #include "lld/Core/LLVM.h"
 #include "llvm/MC/StringTableBuilder.h"
 #include "llvm/Object/ELF.h"
 
 namespace lld {
 namespace elf {
 
 struct PhdrEntry;
 class SymbolBody;
 struct EhSectionPiece;
 class EhInputSection;
 class InputSection;
 class InputSectionBase;
 class MergeInputSection;
 class OutputSection;
 template <class ELFT> class ObjectFile;
 template <class ELFT> class SharedFile;
 class SharedSymbol;
 class DefinedRegular;
 
 // This represents a section in an output file.
 // It is composed of multiple InputSections.
 // The writer creates multiple OutputSections and assign them unique,
 // non-overlapping file offsets and VAs.
 class OutputSection final : public SectionBase {
 public:
   OutputSection(StringRef Name, uint32_t Type, uint64_t Flags);
 
   static bool classof(const SectionBase *S) {
     return S->kind() == SectionBase::Output;
   }
 
   uint64_t getLMA() const { return Addr + LMAOffset; }
   template <typename ELFT> void writeHeaderTo(typename ELFT::Shdr *SHdr);
 
   unsigned SectionIndex;
   unsigned SortRank;
 
   uint32_t getPhdrFlags() const;
 
   void updateAlignment(uint32_t Val) {
     if (Val > Alignment)
       Alignment = Val;
   }
 
   // Pointer to the first section in PT_LOAD segment, which this section
   // also resides in. This field is used to correctly compute file offset
   // of a section. When two sections share the same load segment, difference
   // between their file offsets should be equal to difference between their
   // virtual addresses. To compute some section offset we use the following
   // formula: Off = Off_first + VA - VA_first.
   OutputSection *FirstInPtLoad = nullptr;
 
   // Pointer to a relocation section for this section. Usually nullptr because
   // we consume relocations, but if --emit-relocs is specified (which is rare),
   // it may have a non-null value.
   OutputSection *RelocationSection = nullptr;
 
   // The following fields correspond to Elf_Shdr members.
   uint64_t Size = 0;
   uint64_t Offset = 0;
   uint64_t LMAOffset = 0;
   uint64_t Addr = 0;
   uint32_t ShName = 0;
 
   void addSection(InputSection *S);
   void sort(std::function<int(InputSectionBase *S)> Order);
   void sortInitFini();
   void sortCtorsDtors();
   void assignOffsets();
   std::vector<InputSection *> Sections;
 
   // Used for implementation of --compress-debug-sections option.
   std::vector<uint8_t> ZDebugHeader;
   llvm::SmallVector<char, 1> CompressedData;
 
   // Location in the output buffer.
   uint8_t *Loc = nullptr;
 };
 
 // All output sections that are handled by the linker specially are
 // globally accessible. Writer initializes them, so don't use them
 // until Writer is initialized.
 struct Out {
   static uint8_t First;
   static OutputSection *Opd;
   static uint8_t *OpdBuf;
   static PhdrEntry *TlsPhdr;
   static OutputSection *DebugInfo;
   static OutputSection *ElfHeader;
   static OutputSection *ProgramHeaders;
   static OutputSection *PreinitArray;
   static OutputSection *InitArray;
   static OutputSection *FiniArray;
 };
 
 struct SectionKey {
   StringRef Name;
   uint64_t Flags;
   uint32_t Alignment;
 };
 }
 }
 namespace llvm {
 template <> struct DenseMapInfo<lld::elf::SectionKey> {
   static lld::elf::SectionKey getEmptyKey();
   static lld::elf::SectionKey getTombstoneKey();
   static unsigned getHashValue(const lld::elf::SectionKey &Val);
   static bool isEqual(const lld::elf::SectionKey &LHS,
                       const lld::elf::SectionKey &RHS);
 };
 }
 namespace lld {
 namespace elf {
 
 // This class knows how to create an output section for a given
 // input section. Output section type is determined by various
 // factors, including input section's sh_flags, sh_type and
 // linker scripts.
 class OutputSectionFactory {
 public:
   OutputSectionFactory(std::vector<OutputSection *> &OutputSections);
   ~OutputSectionFactory();
 
   void addInputSec(InputSectionBase *IS, StringRef OutsecName);
   void addInputSec(InputSectionBase *IS, StringRef OutsecName,
                    OutputSection *&Sec);
 
 private:
   llvm::SmallDenseMap<SectionKey, OutputSection *> Map;
   std::vector<OutputSection *> &OutputSections;
 };
 
 uint64_t getHeaderSize();
 void reportDiscarded(InputSectionBase *IS);
 
+extern std::vector<OutputSection *> OutputSections;
+extern std::vector<OutputSectionCommand *> OutputSectionCommands;
 } // namespace elf
 } // namespace lld
 
 
 #endif
Index: vendor/lld/dist/ELF/Relocations.cpp
===================================================================
--- vendor/lld/dist/ELF/Relocations.cpp	(revision 320020)
+++ vendor/lld/dist/ELF/Relocations.cpp	(revision 320021)
@@ -1,1123 +1,1135 @@
 //===- Relocations.cpp ----------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains platform-independent functions to process relocations.
 // I'll describe the overview of this file here.
 //
 // Simple relocations are easy to handle for the linker. For example,
 // for R_X86_64_PC64 relocs, the linker just has to fix up locations
 // with the relative offsets to the target symbols. It would just be
 // reading records from relocation sections and applying them to output.
 //
 // But not all relocations are that easy to handle. For example, for
 // R_386_GOTOFF relocs, the linker has to create new GOT entries for
 // symbols if they don't exist, and fix up locations with GOT entry
 // offsets from the beginning of GOT section. So there is more than
 // fixing addresses in relocation processing.
 //
 // ELF defines a large number of complex relocations.
 //
 // The functions in this file analyze relocations and do whatever needs
 // to be done. It includes, but not limited to, the following.
 //
 //  - create GOT/PLT entries
 //  - create new relocations in .dynsym to let the dynamic linker resolve
 //    them at runtime (since ELF supports dynamic linking, not all
 //    relocations can be resolved at link-time)
 //  - create COPY relocs and reserve space in .bss
 //  - replace expensive relocs (in terms of runtime cost) with cheap ones
 //  - error out infeasible combinations such as PIC and non-relative relocs
 //
 // Note that the functions in this file don't actually apply relocations
 // because it doesn't know about the output file nor the output file buffer.
 // It instead stores Relocation objects to InputSection's Relocations
 // vector to let it apply later in InputSection::writeTo.
 //
 //===----------------------------------------------------------------------===//
 
 #include "Relocations.h"
 #include "Config.h"
 #include "LinkerScript.h"
 #include "Memory.h"
 #include "OutputSections.h"
 #include "Strings.h"
 #include "SymbolTable.h"
 #include "SyntheticSections.h"
 #include "Target.h"
 #include "Thunks.h"
 
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/raw_ostream.h"
 #include <algorithm>
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
 using namespace llvm::support::endian;
 
 using namespace lld;
 using namespace lld::elf;
 
 // Construct a message in the following format.
 //
 // >>> defined in /home/alice/src/foo.o
 // >>> referenced by bar.c:12 (/home/alice/src/bar.c:12)
 // >>>               /home/alice/src/bar.o:(.text+0x1)
 template <class ELFT>
 static std::string getLocation(InputSectionBase &S, const SymbolBody &Sym,
                                uint64_t Off) {
   std::string Msg =
       "\n>>> defined in " + toString(Sym.File) + "\n>>> referenced by ";
   std::string Src = S.getSrcMsg<ELFT>(Off);
   if (!Src.empty())
     Msg += Src + "\n>>>               ";
   return Msg + S.getObjMsg<ELFT>(Off);
 }
 
 static bool isPreemptible(const SymbolBody &Body, uint32_t Type) {
   // In case of MIPS GP-relative relocations always resolve to a definition
   // in a regular input file, ignoring the one-definition rule. So we,
   // for example, should not attempt to create a dynamic relocation even
   // if the target symbol is preemptible. There are two two MIPS GP-relative
   // relocations R_MIPS_GPREL16 and R_MIPS_GPREL32. But only R_MIPS_GPREL16
   // can be against a preemptible symbol.
   // To get MIPS relocation type we apply 0xff mask. In case of O32 ABI all
   // relocation types occupy eight bit. In case of N64 ABI we extract first
   // relocation from 3-in-1 packet because only the first relocation can
   // be against a real symbol.
   if (Config->EMachine == EM_MIPS && (Type & 0xff) == R_MIPS_GPREL16)
     return false;
   return Body.isPreemptible();
 }
 
 // This function is similar to the `handleTlsRelocation`. MIPS does not
 // support any relaxations for TLS relocations so by factoring out MIPS
 // handling in to the separate function we can simplify the code and do not
 // pollute other `handleTlsRelocation` by MIPS `ifs` statements.
 // Mips has a custom MipsGotSection that handles the writing of GOT entries
 // without dynamic relocations.
 template <class ELFT>
 static unsigned handleMipsTlsRelocation(uint32_t Type, SymbolBody &Body,
                                         InputSectionBase &C, uint64_t Offset,
                                         int64_t Addend, RelExpr Expr) {
   if (Expr == R_MIPS_TLSLD) {
     if (InX::MipsGot->addTlsIndex() && Config->Pic)
       In<ELFT>::RelaDyn->addReloc({Target->TlsModuleIndexRel, InX::MipsGot,
                                    InX::MipsGot->getTlsIndexOff(), false,
                                    nullptr, 0});
     C.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
     return 1;
   }
 
   if (Expr == R_MIPS_TLSGD) {
     if (InX::MipsGot->addDynTlsEntry(Body) && Body.isPreemptible()) {
       uint64_t Off = InX::MipsGot->getGlobalDynOffset(Body);
       In<ELFT>::RelaDyn->addReloc(
           {Target->TlsModuleIndexRel, InX::MipsGot, Off, false, &Body, 0});
       if (Body.isPreemptible())
         In<ELFT>::RelaDyn->addReloc({Target->TlsOffsetRel, InX::MipsGot,
                                      Off + Config->Wordsize, false, &Body, 0});
     }
     C.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
     return 1;
   }
   return 0;
 }
 
 // This function is similar to the `handleMipsTlsRelocation`. ARM also does not
 // support any relaxations for TLS relocations. ARM is logically similar to Mips
 // in how it handles TLS, but Mips uses its own custom GOT which handles some
 // of the cases that ARM uses GOT relocations for.
 //
 // We look for TLS global dynamic and local dynamic relocations, these may
 // require the generation of a pair of GOT entries that have associated
 // dynamic relocations. When the results of the dynamic relocations can be
 // resolved at static link time we do so. This is necessary for static linking
 // as there will be no dynamic loader to resolve them at load-time.
 //
 // The pair of GOT entries created are of the form
 // GOT[e0] Module Index (Used to find pointer to TLS block at run-time)
 // GOT[e1] Offset of symbol in TLS block
 template <class ELFT>
 static unsigned handleARMTlsRelocation(uint32_t Type, SymbolBody &Body,
                                        InputSectionBase &C, uint64_t Offset,
                                        int64_t Addend, RelExpr Expr) {
   // The Dynamic TLS Module Index Relocation for a symbol defined in an
   // executable is always 1. If the target Symbol is not preemtible then
   // we know the offset into the TLS block at static link time.
   bool NeedDynId = Body.isPreemptible() || Config->Shared;
   bool NeedDynOff = Body.isPreemptible();
 
   auto AddTlsReloc = [&](uint64_t Off, uint32_t Type, SymbolBody *Dest,
                          bool Dyn) {
     if (Dyn)
       In<ELFT>::RelaDyn->addReloc({Type, InX::Got, Off, false, Dest, 0});
     else
       InX::Got->Relocations.push_back({R_ABS, Type, Off, 0, Dest});
   };
 
   // Local Dynamic is for access to module local TLS variables, while still
   // being suitable for being dynamically loaded via dlopen.
   // GOT[e0] is the module index, with a special value of 0 for the current
   // module. GOT[e1] is unused. There only needs to be one module index entry.
   if (Expr == R_TLSLD_PC && InX::Got->addTlsIndex()) {
     AddTlsReloc(InX::Got->getTlsIndexOff(), Target->TlsModuleIndexRel,
                 NeedDynId ? nullptr : &Body, NeedDynId);
     C.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
     return 1;
   }
 
   // Global Dynamic is the most general purpose access model. When we know
   // the module index and offset of symbol in TLS block we can fill these in
   // using static GOT relocations.
   if (Expr == R_TLSGD_PC) {
     if (InX::Got->addDynTlsEntry(Body)) {
       uint64_t Off = InX::Got->getGlobalDynOffset(Body);
       AddTlsReloc(Off, Target->TlsModuleIndexRel, &Body, NeedDynId);
       AddTlsReloc(Off + Config->Wordsize, Target->TlsOffsetRel, &Body,
                   NeedDynOff);
     }
     C.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
     return 1;
   }
   return 0;
 }
 
 // Returns the number of relocations processed.
 template <class ELFT>
 static unsigned
 handleTlsRelocation(uint32_t Type, SymbolBody &Body, InputSectionBase &C,
                     typename ELFT::uint Offset, int64_t Addend, RelExpr Expr) {
   if (!(C.Flags & SHF_ALLOC))
     return 0;
 
   if (!Body.isTls())
     return 0;
 
   if (Config->EMachine == EM_ARM)
     return handleARMTlsRelocation<ELFT>(Type, Body, C, Offset, Addend, Expr);
   if (Config->EMachine == EM_MIPS)
     return handleMipsTlsRelocation<ELFT>(Type, Body, C, Offset, Addend, Expr);
 
   bool IsPreemptible = isPreemptible(Body, Type);
   if (isRelExprOneOf<R_TLSDESC, R_TLSDESC_PAGE, R_TLSDESC_CALL>(Expr) &&
       Config->Shared) {
     if (InX::Got->addDynTlsEntry(Body)) {
       uint64_t Off = InX::Got->getGlobalDynOffset(Body);
       In<ELFT>::RelaDyn->addReloc(
           {Target->TlsDescRel, InX::Got, Off, !IsPreemptible, &Body, 0});
     }
     if (Expr != R_TLSDESC_CALL)
       C.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
     return 1;
   }
 
   if (isRelExprOneOf<R_TLSLD_PC, R_TLSLD>(Expr)) {
     // Local-Dynamic relocs can be relaxed to Local-Exec.
     if (!Config->Shared) {
       C.Relocations.push_back(
           {R_RELAX_TLS_LD_TO_LE, Type, Offset, Addend, &Body});
       return 2;
     }
     if (InX::Got->addTlsIndex())
       In<ELFT>::RelaDyn->addReloc({Target->TlsModuleIndexRel, InX::Got,
                                    InX::Got->getTlsIndexOff(), false, nullptr,
                                    0});
     C.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
     return 1;
   }
 
   // Local-Dynamic relocs can be relaxed to Local-Exec.
   if (isRelExprOneOf<R_ABS, R_TLSLD, R_TLSLD_PC>(Expr) && !Config->Shared) {
     C.Relocations.push_back(
         {R_RELAX_TLS_LD_TO_LE, Type, Offset, Addend, &Body});
     return 1;
   }
 
   if (isRelExprOneOf<R_TLSDESC, R_TLSDESC_PAGE, R_TLSDESC_CALL, R_TLSGD,
                      R_TLSGD_PC>(Expr)) {
     if (Config->Shared) {
       if (InX::Got->addDynTlsEntry(Body)) {
         uint64_t Off = InX::Got->getGlobalDynOffset(Body);
         In<ELFT>::RelaDyn->addReloc(
             {Target->TlsModuleIndexRel, InX::Got, Off, false, &Body, 0});
 
         // If the symbol is preemptible we need the dynamic linker to write
         // the offset too.
         uint64_t OffsetOff = Off + Config->Wordsize;
         if (IsPreemptible)
           In<ELFT>::RelaDyn->addReloc(
               {Target->TlsOffsetRel, InX::Got, OffsetOff, false, &Body, 0});
         else
           InX::Got->Relocations.push_back(
               {R_ABS, Target->TlsOffsetRel, OffsetOff, 0, &Body});
       }
       C.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
       return 1;
     }
 
     // Global-Dynamic relocs can be relaxed to Initial-Exec or Local-Exec
     // depending on the symbol being locally defined or not.
     if (IsPreemptible) {
       C.Relocations.push_back(
           {Target->adjustRelaxExpr(Type, nullptr, R_RELAX_TLS_GD_TO_IE), Type,
            Offset, Addend, &Body});
       if (!Body.isInGot()) {
         InX::Got->addEntry(Body);
         In<ELFT>::RelaDyn->addReloc({Target->TlsGotRel, InX::Got,
                                      Body.getGotOffset(), false, &Body, 0});
       }
     } else {
       C.Relocations.push_back(
           {Target->adjustRelaxExpr(Type, nullptr, R_RELAX_TLS_GD_TO_LE), Type,
                 Offset, Addend, &Body});
     }
     return Target->TlsGdRelaxSkip;
   }
 
   // Initial-Exec relocs can be relaxed to Local-Exec if the symbol is locally
   // defined.
   if (isRelExprOneOf<R_GOT, R_GOT_FROM_END, R_GOT_PC, R_GOT_PAGE_PC>(Expr) &&
       !Config->Shared && !IsPreemptible) {
     C.Relocations.push_back(
         {R_RELAX_TLS_IE_TO_LE, Type, Offset, Addend, &Body});
     return 1;
   }
 
   if (Expr == R_TLSDESC_CALL)
     return 1;
   return 0;
 }
 
 static uint32_t getMipsPairType(uint32_t Type, const SymbolBody &Sym) {
   switch (Type) {
   case R_MIPS_HI16:
     return R_MIPS_LO16;
   case R_MIPS_GOT16:
     return Sym.isLocal() ? R_MIPS_LO16 : R_MIPS_NONE;
   case R_MIPS_PCHI16:
     return R_MIPS_PCLO16;
   case R_MICROMIPS_HI16:
     return R_MICROMIPS_LO16;
   default:
     return R_MIPS_NONE;
   }
 }
 
 // True if non-preemptable symbol always has the same value regardless of where
 // the DSO is loaded.
 static bool isAbsolute(const SymbolBody &Body) {
   if (Body.isUndefined())
     return !Body.isLocal() && Body.symbol()->isWeak();
   if (const auto *DR = dyn_cast<DefinedRegular>(&Body))
     return DR->Section == nullptr; // Absolute symbol.
   return false;
 }
 
 static bool isAbsoluteValue(const SymbolBody &Body) {
   return isAbsolute(Body) || Body.isTls();
 }
 
 // Returns true if Expr refers a PLT entry.
 static bool needsPlt(RelExpr Expr) {
   return isRelExprOneOf<R_PLT_PC, R_PPC_PLT_OPD, R_PLT, R_PLT_PAGE_PC>(Expr);
 }
 
 // Returns true if Expr refers a GOT entry. Note that this function
 // returns false for TLS variables even though they need GOT, because
 // TLS variables uses GOT differently than the regular variables.
 static bool needsGot(RelExpr Expr) {
   return isRelExprOneOf<R_GOT, R_GOT_OFF, R_MIPS_GOT_LOCAL_PAGE, R_MIPS_GOT_OFF,
                         R_MIPS_GOT_OFF32, R_GOT_PAGE_PC, R_GOT_PC,
                         R_GOT_FROM_END>(Expr);
 }
 
 // True if this expression is of the form Sym - X, where X is a position in the
 // file (PC, or GOT for example).
 static bool isRelExpr(RelExpr Expr) {
   return isRelExprOneOf<R_PC, R_GOTREL, R_GOTREL_FROM_END, R_MIPS_GOTREL,
                         R_PAGE_PC, R_RELAX_GOT_PC>(Expr);
 }
 
 // Returns true if a given relocation can be computed at link-time.
 //
 // For instance, we know the offset from a relocation to its target at
 // link-time if the relocation is PC-relative and refers a
 // non-interposable function in the same executable. This function
 // will return true for such relocation.
 //
 // If this function returns false, that means we need to emit a
 // dynamic relocation so that the relocation will be fixed at load-time.
 template <class ELFT>
 static bool isStaticLinkTimeConstant(RelExpr E, uint32_t Type,
                                      const SymbolBody &Body,
                                      InputSectionBase &S, uint64_t RelOff) {
   // These expressions always compute a constant
   if (isRelExprOneOf<R_SIZE, R_GOT_FROM_END, R_GOT_OFF, R_MIPS_GOT_LOCAL_PAGE,
                      R_MIPS_GOT_OFF, R_MIPS_GOT_OFF32, R_MIPS_GOT_GP_PC,
                      R_MIPS_TLSGD, R_GOT_PAGE_PC, R_GOT_PC,
                      R_GOTONLY_PC_FROM_END, R_PLT_PC, R_TLSGD_PC, R_TLSGD,
                      R_PPC_PLT_OPD, R_TLSDESC_CALL, R_TLSDESC_PAGE, R_HINT>(E))
     return true;
 
   // These never do, except if the entire file is position dependent or if
   // only the low bits are used.
   if (E == R_GOT || E == R_PLT || E == R_TLSDESC)
     return Target->usesOnlyLowPageBits(Type) || !Config->Pic;
 
   if (isPreemptible(Body, Type))
     return false;
   if (!Config->Pic)
     return true;
 
   // For the target and the relocation, we want to know if they are
   // absolute or relative.
   bool AbsVal = isAbsoluteValue(Body);
   bool RelE = isRelExpr(E);
   if (AbsVal && !RelE)
     return true;
   if (!AbsVal && RelE)
     return true;
   if (!AbsVal && !RelE)
     return Target->usesOnlyLowPageBits(Type);
 
   // Relative relocation to an absolute value. This is normally unrepresentable,
   // but if the relocation refers to a weak undefined symbol, we allow it to
   // resolve to the image base. This is a little strange, but it allows us to
   // link function calls to such symbols. Normally such a call will be guarded
   // with a comparison, which will load a zero from the GOT.
   // Another special case is MIPS _gp_disp symbol which represents offset
   // between start of a function and '_gp' value and defined as absolute just
   // to simplify the code.
   assert(AbsVal && RelE);
   if (Body.isUndefined() && !Body.isLocal() && Body.symbol()->isWeak())
     return true;
 
   error("relocation " + toString(Type) + " cannot refer to absolute symbol: " +
         toString(Body) + getLocation<ELFT>(S, Body, RelOff));
   return true;
 }
 
 static RelExpr toPlt(RelExpr Expr) {
   if (Expr == R_PPC_OPD)
     return R_PPC_PLT_OPD;
   if (Expr == R_PC)
     return R_PLT_PC;
   if (Expr == R_PAGE_PC)
     return R_PLT_PAGE_PC;
   if (Expr == R_ABS)
     return R_PLT;
   return Expr;
 }
 
 static RelExpr fromPlt(RelExpr Expr) {
   // We decided not to use a plt. Optimize a reference to the plt to a
   // reference to the symbol itself.
   if (Expr == R_PLT_PC)
     return R_PC;
   if (Expr == R_PPC_PLT_OPD)
     return R_PPC_OPD;
   if (Expr == R_PLT)
     return R_ABS;
   return Expr;
 }
 
 // Returns true if a given shared symbol is in a read-only segment in a DSO.
 template <class ELFT> static bool isReadOnly(SharedSymbol *SS) {
   typedef typename ELFT::Phdr Elf_Phdr;
   uint64_t Value = SS->getValue<ELFT>();
 
   // Determine if the symbol is read-only by scanning the DSO's program headers.
   auto *File = cast<SharedFile<ELFT>>(SS->File);
   for (const Elf_Phdr &Phdr : check(File->getObj().program_headers()))
     if ((Phdr.p_type == ELF::PT_LOAD || Phdr.p_type == ELF::PT_GNU_RELRO) &&
         !(Phdr.p_flags & ELF::PF_W) && Value >= Phdr.p_vaddr &&
         Value < Phdr.p_vaddr + Phdr.p_memsz)
       return true;
   return false;
 }
 
 // Returns symbols at the same offset as a given symbol, including SS itself.
 //
 // If two or more symbols are at the same offset, and at least one of
 // them are copied by a copy relocation, all of them need to be copied.
 // Otherwise, they would refer different places at runtime.
 template <class ELFT>
 static std::vector<SharedSymbol *> getSymbolsAt(SharedSymbol *SS) {
   typedef typename ELFT::Sym Elf_Sym;
 
   auto *File = cast<SharedFile<ELFT>>(SS->File);
   uint64_t Shndx = SS->getShndx<ELFT>();
   uint64_t Value = SS->getValue<ELFT>();
 
   std::vector<SharedSymbol *> Ret;
   for (const Elf_Sym &S : File->getGlobalSymbols()) {
     if (S.st_shndx != Shndx || S.st_value != Value)
       continue;
     StringRef Name = check(S.getName(File->getStringTable()));
     SymbolBody *Sym = Symtab<ELFT>::X->find(Name);
     if (auto *Alias = dyn_cast_or_null<SharedSymbol>(Sym))
       Ret.push_back(Alias);
   }
   return Ret;
 }
 
 // Reserve space in .bss or .bss.rel.ro for copy relocation.
 //
 // The copy relocation is pretty much a hack. If you use a copy relocation
 // in your program, not only the symbol name but the symbol's size, RW/RO
 // bit and alignment become part of the ABI. In addition to that, if the
 // symbol has aliases, the aliases become part of the ABI. That's subtle,
 // but if you violate that implicit ABI, that can cause very counter-
 // intuitive consequences.
 //
 // So, what is the copy relocation? It's for linking non-position
 // independent code to DSOs. In an ideal world, all references to data
 // exported by DSOs should go indirectly through GOT. But if object files
 // are compiled as non-PIC, all data references are direct. There is no
 // way for the linker to transform the code to use GOT, as machine
 // instructions are already set in stone in object files. This is where
 // the copy relocation takes a role.
 //
 // A copy relocation instructs the dynamic linker to copy data from a DSO
 // to a specified address (which is usually in .bss) at load-time. If the
 // static linker (that's us) finds a direct data reference to a DSO
 // symbol, it creates a copy relocation, so that the symbol can be
 // resolved as if it were in .bss rather than in a DSO.
 //
 // As you can see in this function, we create a copy relocation for the
 // dynamic linker, and the relocation contains not only symbol name but
 // various other informtion about the symbol. So, such attributes become a
 // part of the ABI.
 //
 // Note for application developers: I can give you a piece of advice if
 // you are writing a shared library. You probably should export only
 // functions from your library. You shouldn't export variables.
 //
 // As an example what can happen when you export variables without knowing
 // the semantics of copy relocations, assume that you have an exported
 // variable of type T. It is an ABI-breaking change to add new members at
 // end of T even though doing that doesn't change the layout of the
 // existing members. That's because the space for the new members are not
 // reserved in .bss unless you recompile the main program. That means they
 // are likely to overlap with other data that happens to be laid out next
 // to the variable in .bss. This kind of issue is sometimes very hard to
 // debug. What's a solution? Instead of exporting a varaible V from a DSO,
 // define an accessor getV().
 template <class ELFT> static void addCopyRelSymbol(SharedSymbol *SS) {
   // Copy relocation against zero-sized symbol doesn't make sense.
   uint64_t SymSize = SS->template getSize<ELFT>();
   if (SymSize == 0)
     fatal("cannot create a copy relocation for symbol " + toString(*SS));
 
   // See if this symbol is in a read-only segment. If so, preserve the symbol's
   // memory protection by reserving space in the .bss.rel.ro section.
   bool IsReadOnly = isReadOnly<ELFT>(SS);
   BssSection *Sec = IsReadOnly ? InX::BssRelRo : InX::Bss;
   uint64_t Off = Sec->reserveSpace(SymSize, SS->getAlignment<ELFT>());
 
   // Look through the DSO's dynamic symbol table for aliases and create a
   // dynamic symbol for each one. This causes the copy relocation to correctly
   // interpose any aliases.
   for (SharedSymbol *Sym : getSymbolsAt<ELFT>(SS)) {
     Sym->NeedsCopy = true;
     Sym->CopyRelSec = Sec;
     Sym->CopyRelSecOff = Off;
     Sym->symbol()->IsUsedInRegularObj = true;
   }
 
   In<ELFT>::RelaDyn->addReloc({Target->CopyRel, Sec, Off, false, SS, 0});
 }
 
 template <class ELFT>
 static RelExpr adjustExpr(SymbolBody &Body, RelExpr Expr, uint32_t Type,
                           const uint8_t *Data, InputSectionBase &S,
                           typename ELFT::uint RelOff) {
   if (Body.isGnuIFunc()) {
     Expr = toPlt(Expr);
   } else if (!isPreemptible(Body, Type)) {
     if (needsPlt(Expr))
       Expr = fromPlt(Expr);
     if (Expr == R_GOT_PC && !isAbsoluteValue(Body))
       Expr = Target->adjustRelaxExpr(Type, Data, Expr);
   }
 
   bool IsWrite = !Config->ZText || (S.Flags & SHF_WRITE);
   if (IsWrite || isStaticLinkTimeConstant<ELFT>(Expr, Type, Body, S, RelOff))
     return Expr;
 
   // This relocation would require the dynamic linker to write a value to read
   // only memory. We can hack around it if we are producing an executable and
   // the refered symbol can be preemepted to refer to the executable.
   if (Config->Shared || (Config->Pic && !isRelExpr(Expr))) {
     error("can't create dynamic relocation " + toString(Type) + " against " +
           (Body.getName().empty() ? "local symbol in readonly segment"
                                   : "symbol: " + toString(Body)) +
           getLocation<ELFT>(S, Body, RelOff));
     return Expr;
   }
 
   if (Body.getVisibility() != STV_DEFAULT) {
     error("cannot preempt symbol: " + toString(Body) +
           getLocation<ELFT>(S, Body, RelOff));
     return Expr;
   }
 
   if (Body.isObject()) {
     // Produce a copy relocation.
     auto *B = cast<SharedSymbol>(&Body);
     if (!B->NeedsCopy) {
       if (Config->ZNocopyreloc)
         error("unresolvable relocation " + toString(Type) +
               " against symbol '" + toString(*B) +
               "'; recompile with -fPIC or remove '-z nocopyreloc'" +
               getLocation<ELFT>(S, Body, RelOff));
 
       addCopyRelSymbol<ELFT>(B);
     }
     return Expr;
   }
 
   if (Body.isFunc()) {
     // This handles a non PIC program call to function in a shared library. In
     // an ideal world, we could just report an error saying the relocation can
     // overflow at runtime. In the real world with glibc, crt1.o has a
     // R_X86_64_PC32 pointing to libc.so.
     //
     // The general idea on how to handle such cases is to create a PLT entry and
     // use that as the function value.
     //
     // For the static linking part, we just return a plt expr and everything
     // else will use the the PLT entry as the address.
     //
     // The remaining problem is making sure pointer equality still works. We
     // need the help of the dynamic linker for that. We let it know that we have
     // a direct reference to a so symbol by creating an undefined symbol with a
     // non zero st_value. Seeing that, the dynamic linker resolves the symbol to
     // the value of the symbol we created. This is true even for got entries, so
     // pointer equality is maintained. To avoid an infinite loop, the only entry
     // that points to the real function is a dedicated got entry used by the
     // plt. That is identified by special relocation types (R_X86_64_JUMP_SLOT,
     // R_386_JMP_SLOT, etc).
     Body.NeedsPltAddr = true;
     return toPlt(Expr);
   }
 
   error("symbol '" + toString(Body) + "' defined in " + toString(Body.File) +
         " has no type");
   return Expr;
 }
 
 // Returns an addend of a given relocation. If it is RELA, an addend
 // is in a relocation itself. If it is REL, we need to read it from an
 // input section.
 template <class ELFT, class RelTy>
 static int64_t computeAddend(const RelTy &Rel, const uint8_t *Buf) {
   uint32_t Type = Rel.getType(Config->IsMips64EL);
   int64_t A = RelTy::IsRela
                   ? getAddend<ELFT>(Rel)
                   : Target->getImplicitAddend(Buf + Rel.r_offset, Type);
 
   if (Config->EMachine == EM_PPC64 && Config->Pic && Type == R_PPC64_TOC)
     A += getPPC64TocBase();
   return A;
 }
 
 // MIPS has an odd notion of "paired" relocations to calculate addends.
 // For example, if a relocation is of R_MIPS_HI16, there must be a
 // R_MIPS_LO16 relocation after that, and an addend is calculated using
 // the two relocations.
 template <class ELFT, class RelTy>
 static int64_t computeMipsAddend(const RelTy &Rel, InputSectionBase &Sec,
                                  RelExpr Expr, SymbolBody &Body,
                                  const RelTy *End) {
   if (Expr == R_MIPS_GOTREL && Body.isLocal())
     return Sec.getFile<ELFT>()->MipsGp0;
 
   // The ABI says that the paired relocation is used only for REL.
   // See p. 4-17 at ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
   if (RelTy::IsRela)
     return 0;
 
   uint32_t Type = Rel.getType(Config->IsMips64EL);
   uint32_t PairTy = getMipsPairType(Type, Body);
   if (PairTy == R_MIPS_NONE)
     return 0;
 
   const uint8_t *Buf = Sec.Data.data();
   uint32_t SymIndex = Rel.getSymbol(Config->IsMips64EL);
 
   // To make things worse, paired relocations might not be contiguous in
   // the relocation table, so we need to do linear search. *sigh*
   for (const RelTy *RI = &Rel; RI != End; ++RI) {
     if (RI->getType(Config->IsMips64EL) != PairTy)
       continue;
     if (RI->getSymbol(Config->IsMips64EL) != SymIndex)
       continue;
 
     endianness E = Config->Endianness;
     int32_t Hi = (read32(Buf + Rel.r_offset, E) & 0xffff) << 16;
     int32_t Lo = SignExtend32<16>(read32(Buf + RI->r_offset, E));
     return Hi + Lo;
   }
 
   warn("can't find matching " + toString(PairTy) + " relocation for " +
        toString(Type));
   return 0;
 }
 
 template <class ELFT>
 static void reportUndefined(SymbolBody &Sym, InputSectionBase &S,
                             uint64_t Offset) {
   if (Config->UnresolvedSymbols == UnresolvedPolicy::IgnoreAll)
     return;
 
   bool CanBeExternal = Sym.symbol()->computeBinding() != STB_LOCAL &&
                        Sym.getVisibility() == STV_DEFAULT;
   if (Config->UnresolvedSymbols == UnresolvedPolicy::Ignore && CanBeExternal)
     return;
 
   std::string Msg =
       "undefined symbol: " + toString(Sym) + "\n>>> referenced by ";
 
   std::string Src = S.getSrcMsg<ELFT>(Offset);
   if (!Src.empty())
     Msg += Src + "\n>>>               ";
   Msg += S.getObjMsg<ELFT>(Offset);
 
   if (Config->UnresolvedSymbols == UnresolvedPolicy::WarnAll ||
       (Config->UnresolvedSymbols == UnresolvedPolicy::Warn && CanBeExternal)) {
     warn(Msg);
   } else {
     error(Msg);
   }
 }
 
 template <class RelTy>
 static std::pair<uint32_t, uint32_t>
 mergeMipsN32RelTypes(uint32_t Type, uint32_t Offset, RelTy *I, RelTy *E) {
   // MIPS N32 ABI treats series of successive relocations with the same offset
   // as a single relocation. The similar approach used by N64 ABI, but this ABI
   // packs all relocations into the single relocation record. Here we emulate
   // this for the N32 ABI. Iterate over relocation with the same offset and put
   // theirs types into the single bit-set.
   uint32_t Processed = 0;
   for (; I != E && Offset == I->r_offset; ++I) {
     ++Processed;
     Type |= I->getType(Config->IsMips64EL) << (8 * Processed);
   }
   return std::make_pair(Type, Processed);
 }
 
 // .eh_frame sections are mergeable input sections, so their input
 // offsets are not linearly mapped to output section. For each input
 // offset, we need to find a section piece containing the offset and
 // add the piece's base address to the input offset to compute the
 // output offset. That isn't cheap.
 //
 // This class is to speed up the offset computation. When we process
 // relocations, we access offsets in the monotonically increasing
 // order. So we can optimize for that access pattern.
 //
 // For sections other than .eh_frame, this class doesn't do anything.
 namespace {
 class OffsetGetter {
 public:
   explicit OffsetGetter(InputSectionBase &Sec) {
     if (auto *Eh = dyn_cast<EhInputSection>(&Sec)) {
       P = Eh->Pieces;
       Size = Eh->Pieces.size();
     }
   }
 
   // Translates offsets in input sections to offsets in output sections.
   // Given offset must increase monotonically. We assume that P is
   // sorted by InputOff.
   uint64_t get(uint64_t Off) {
     if (P.empty())
       return Off;
 
     while (I != Size && P[I].InputOff + P[I].size() <= Off)
       ++I;
     if (I == Size)
       return Off;
 
     // P must be contiguous, so there must be no holes in between.
     assert(P[I].InputOff <= Off && "Relocation not in any piece");
 
     // Offset -1 means that the piece is dead (i.e. garbage collected).
     if (P[I].OutputOff == -1)
       return -1;
     return P[I].OutputOff + Off - P[I].InputOff;
   }
 
 private:
   ArrayRef<EhSectionPiece> P;
   size_t I = 0;
   size_t Size;
 };
 } // namespace
 
 template <class ELFT, class GotPltSection>
 static void addPltEntry(PltSection *Plt, GotPltSection *GotPlt,
                         RelocationSection<ELFT> *Rel, uint32_t Type,
                         SymbolBody &Sym, bool UseSymVA) {
   Plt->addEntry<ELFT>(Sym);
   GotPlt->addEntry(Sym);
   Rel->addReloc({Type, GotPlt, Sym.getGotPltOffset(), UseSymVA, &Sym, 0});
 }
 
 template <class ELFT>
 static void addGotEntry(SymbolBody &Sym, bool Preemptible) {
   InX::Got->addEntry(Sym);
 
   uint64_t Off = Sym.getGotOffset();
   uint32_t DynType;
   RelExpr Expr = R_ABS;
 
   if (Sym.isTls()) {
     DynType = Target->TlsGotRel;
     Expr = R_TLS;
   } else if (!Preemptible && Config->Pic && !isAbsolute(Sym)) {
     DynType = Target->RelativeRel;
   } else {
     DynType = Target->GotRel;
   }
 
   bool Constant = !Preemptible && !(Config->Pic && !isAbsolute(Sym));
   if (!Constant)
     In<ELFT>::RelaDyn->addReloc(
         {DynType, InX::Got, Off, !Preemptible, &Sym, 0});
 
   if (Constant || (!Config->IsRela && !Preemptible))
     InX::Got->Relocations.push_back({Expr, DynType, Off, 0, &Sym});
 }
 
 // The reason we have to do this early scan is as follows
 // * To mmap the output file, we need to know the size
 // * For that, we need to know how many dynamic relocs we will have.
 // It might be possible to avoid this by outputting the file with write:
 // * Write the allocated output sections, computing addresses.
 // * Apply relocations, recording which ones require a dynamic reloc.
 // * Write the dynamic relocations.
 // * Write the rest of the file.
 // This would have some drawbacks. For example, we would only know if .rela.dyn
 // is needed after applying relocations. If it is, it will go after rw and rx
 // sections. Given that it is ro, we will need an extra PT_LOAD. This
 // complicates things for the dynamic linker and means we would have to reserve
 // space for the extra PT_LOAD even if we end up not using it.
 template <class ELFT, class RelTy>
 static void scanRelocs(InputSectionBase &Sec, ArrayRef<RelTy> Rels) {
   OffsetGetter GetOffset(Sec);
 
   for (auto I = Rels.begin(), End = Rels.end(); I != End; ++I) {
     const RelTy &Rel = *I;
     SymbolBody &Body = Sec.getFile<ELFT>()->getRelocTargetSym(Rel);
     uint32_t Type = Rel.getType(Config->IsMips64EL);
 
     if (Config->MipsN32Abi) {
       uint32_t Processed;
       std::tie(Type, Processed) =
           mergeMipsN32RelTypes(Type, Rel.r_offset, I + 1, End);
       I += Processed;
     }
 
     // Compute the offset of this section in the output section.
     uint64_t Offset = GetOffset.get(Rel.r_offset);
     if (Offset == uint64_t(-1))
       continue;
 
     // Report undefined symbols. The fact that we report undefined
     // symbols here means that we report undefined symbols only when
     // they have relocations pointing to them. We don't care about
     // undefined symbols that are in dead-stripped sections.
     if (!Body.isLocal() && Body.isUndefined() && !Body.symbol()->isWeak())
       reportUndefined<ELFT>(Body, Sec, Rel.r_offset);
 
     RelExpr Expr =
         Target->getRelExpr(Type, Body, Sec.Data.begin() + Rel.r_offset);
 
     // Ignore "hint" relocations because they are only markers for relaxation.
     if (isRelExprOneOf<R_HINT, R_NONE>(Expr))
       continue;
 
     bool Preemptible = isPreemptible(Body, Type);
     Expr = adjustExpr<ELFT>(Body, Expr, Type, Sec.Data.data() + Rel.r_offset,
                             Sec, Rel.r_offset);
     if (ErrorCount)
       continue;
 
     // This relocation does not require got entry, but it is relative to got and
     // needs it to be created. Here we request for that.
     if (isRelExprOneOf<R_GOTONLY_PC, R_GOTONLY_PC_FROM_END, R_GOTREL,
                        R_GOTREL_FROM_END, R_PPC_TOC>(Expr))
       InX::Got->HasGotOffRel = true;
 
     // Read an addend.
     int64_t Addend = computeAddend<ELFT>(Rel, Sec.Data.data());
     if (Config->EMachine == EM_MIPS)
       Addend += computeMipsAddend<ELFT>(Rel, Sec, Expr, Body, End);
 
     // Process some TLS relocations, including relaxing TLS relocations.
     // Note that this function does not handle all TLS relocations.
     if (unsigned Processed =
             handleTlsRelocation<ELFT>(Type, Body, Sec, Offset, Addend, Expr)) {
       I += (Processed - 1);
       continue;
     }
 
     // If a relocation needs PLT, we create PLT and GOTPLT slots for the symbol.
     if (needsPlt(Expr) && !Body.isInPlt()) {
       if (Body.isGnuIFunc() && !Preemptible)
         addPltEntry(InX::Iplt, InX::IgotPlt, In<ELFT>::RelaIplt,
                     Target->IRelativeRel, Body, true);
       else
         addPltEntry(InX::Plt, InX::GotPlt, In<ELFT>::RelaPlt, Target->PltRel,
                     Body, !Preemptible);
     }
 
     // Create a GOT slot if a relocation needs GOT.
     if (needsGot(Expr)) {
       if (Config->EMachine == EM_MIPS) {
         // MIPS ABI has special rules to process GOT entries and doesn't
         // require relocation entries for them. A special case is TLS
         // relocations. In that case dynamic loader applies dynamic
         // relocations to initialize TLS GOT entries.
         // See "Global Offset Table" in Chapter 5 in the following document
         // for detailed description:
         // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
         InX::MipsGot->addEntry(Body, Addend, Expr);
         if (Body.isTls() && Body.isPreemptible())
           In<ELFT>::RelaDyn->addReloc({Target->TlsGotRel, InX::MipsGot,
                                        Body.getGotOffset(), false, &Body, 0});
       } else if (!Body.isInGot()) {
         addGotEntry<ELFT>(Body, Preemptible);
       }
     }
 
     if (!needsPlt(Expr) && !needsGot(Expr) && isPreemptible(Body, Type)) {
       // We don't know anything about the finaly symbol. Just ask the dynamic
       // linker to handle the relocation for us.
       if (!Target->isPicRel(Type))
         error("relocation " + toString(Type) +
               " cannot be used against shared object; recompile with -fPIC" +
               getLocation<ELFT>(Sec, Body, Offset));
 
       In<ELFT>::RelaDyn->addReloc(
           {Target->getDynRel(Type), &Sec, Offset, false, &Body, Addend});
 
       // MIPS ABI turns using of GOT and dynamic relocations inside out.
       // While regular ABI uses dynamic relocations to fill up GOT entries
       // MIPS ABI requires dynamic linker to fills up GOT entries using
       // specially sorted dynamic symbol table. This affects even dynamic
       // relocations against symbols which do not require GOT entries
       // creation explicitly, i.e. do not have any GOT-relocations. So if
       // a preemptible symbol has a dynamic relocation we anyway have
       // to create a GOT entry for it.
       // If a non-preemptible symbol has a dynamic relocation against it,
       // dynamic linker takes it st_value, adds offset and writes down
       // result of the dynamic relocation. In case of preemptible symbol
       // dynamic linker performs symbol resolution, writes the symbol value
       // to the GOT entry and reads the GOT entry when it needs to perform
       // a dynamic relocation.
       // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf p.4-19
       if (Config->EMachine == EM_MIPS)
         InX::MipsGot->addEntry(Body, Addend, Expr);
       continue;
     }
 
     // If the relocation points to something in the file, we can process it.
     bool IsConstant =
         isStaticLinkTimeConstant<ELFT>(Expr, Type, Body, Sec, Rel.r_offset);
 
     // The size is not going to change, so we fold it in here.
     if (Expr == R_SIZE)
       Addend += Body.getSize<ELFT>();
 
     // If the output being produced is position independent, the final value
     // is still not known. In that case we still need some help from the
     // dynamic linker. We can however do better than just copying the incoming
     // relocation. We can process some of it and and just ask the dynamic
     // linker to add the load address.
     if (!IsConstant)
       In<ELFT>::RelaDyn->addReloc(
           {Target->RelativeRel, &Sec, Offset, true, &Body, Addend});
 
     // If the produced value is a constant, we just remember to write it
     // when outputting this section. We also have to do it if the format
     // uses Elf_Rel, since in that case the written value is the addend.
     if (IsConstant || !RelTy::IsRela)
       Sec.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
   }
 }
 
 template <class ELFT> void elf::scanRelocations(InputSectionBase &S) {
   if (S.AreRelocsRela)
     scanRelocs<ELFT>(S, S.relas<ELFT>());
   else
     scanRelocs<ELFT>(S, S.rels<ELFT>());
 }
 
 // Insert the Thunks for OutputSection OS into their designated place
 // in the Sections vector, and recalculate the InputSection output section
 // offsets.
 // This may invalidate any output section offsets stored outside of InputSection
 void ThunkCreator::mergeThunks() {
   for (auto &KV : ThunkSections) {
     std::vector<InputSection *> *ISR = KV.first;
     std::vector<ThunkSection *> &Thunks = KV.second;
 
     // Order Thunks in ascending OutSecOff
     auto ThunkCmp = [](const ThunkSection *A, const ThunkSection *B) {
       return A->OutSecOff < B->OutSecOff;
     };
     std::stable_sort(Thunks.begin(), Thunks.end(), ThunkCmp);
 
     // Merge sorted vectors of Thunks and InputSections by OutSecOff
     std::vector<InputSection *> Tmp;
     Tmp.reserve(ISR->size() + Thunks.size());
     auto MergeCmp = [](const InputSection *A, const InputSection *B) {
       // std::merge requires a strict weak ordering.
       if (A->OutSecOff < B->OutSecOff)
         return true;
       if (A->OutSecOff == B->OutSecOff)
         // Check if Thunk is immediately before any specific Target InputSection
         // for example Mips LA25 Thunks.
         if (auto *TA = dyn_cast<ThunkSection>(A))
           if (TA && TA->getTargetInputSection() == B)
             return true;
       return false;
     };
     std::merge(ISR->begin(), ISR->end(), Thunks.begin(), Thunks.end(),
                std::back_inserter(Tmp), MergeCmp);
     *ISR = std::move(Tmp);
   }
 }
 
 ThunkSection *ThunkCreator::getOSThunkSec(OutputSection *OS,
                                           std::vector<InputSection *> *ISR) {
   if (CurTS == nullptr) {
     uint32_t Off = 0;
     for (auto *IS : OS->Sections) {
       Off = IS->OutSecOff + IS->getSize();
       if ((IS->Flags & SHF_EXECINSTR) == 0)
         break;
     }
-    CurTS = make<ThunkSection>(OS, Off);
-    ThunkSections[ISR].push_back(CurTS);
+    CurTS = addThunkSection(OS, ISR, Off);
   }
   return CurTS;
 }
 
 ThunkSection *ThunkCreator::getISThunkSec(InputSection *IS, OutputSection *OS) {
   ThunkSection *TS = ThunkedSections.lookup(IS);
   if (TS)
     return TS;
   auto *TOS = IS->getParent();
-  TS = make<ThunkSection>(TOS, IS->OutSecOff);
 
   // Find InputSectionRange within TOS that IS is in
   OutputSectionCommand *C = Script->getCmd(TOS);
   std::vector<InputSection *> *Range = nullptr;
   for (BaseCommand *BC : C->Commands)
     if (auto *ISD = dyn_cast<InputSectionDescription> (BC)) {
       InputSection *first = ISD->Sections.front();
       InputSection *last = ISD->Sections.back();
       if (IS->OutSecOff >= first->OutSecOff &&
           IS->OutSecOff <= last->OutSecOff) {
         Range = &ISD->Sections;
         break;
       }
     }
-  ThunkSections[Range].push_back(TS);
+  TS = addThunkSection(TOS, Range, IS->OutSecOff);
   ThunkedSections[IS] = TS;
   return TS;
 }
 
+ThunkSection *ThunkCreator::addThunkSection(OutputSection *OS,
+                                            std::vector<InputSection *> *ISR,
+                                            uint64_t Off) {
+  auto *TS = make<ThunkSection>(OS, Off);
+  ThunkSections[ISR].push_back(TS);
+  return TS;
+}
+
+
 std::pair<Thunk *, bool> ThunkCreator::getThunk(SymbolBody &Body,
                                                 uint32_t Type) {
   auto res = ThunkedSymbols.insert({&Body, nullptr});
   if (res.second)
     res.first->second = addThunk(Type, Body);
   return std::make_pair(res.first->second, res.second);
 }
 
 // Call Fn on every executable InputSection accessed via the linker script
 // InputSectionDescription::Sections.
 void ThunkCreator::forEachExecInputSection(
     ArrayRef<OutputSectionCommand *> OutputSections,
     std::function<void(OutputSection *, std::vector<InputSection *> *,
                        InputSection *)>
         Fn) {
   for (OutputSectionCommand *Cmd : OutputSections) {
     OutputSection *OS = Cmd->Sec;
     if (!(OS->Flags & SHF_ALLOC) || !(OS->Flags & SHF_EXECINSTR))
       continue;
     if (OutputSectionCommand *C = Script->getCmd(OS))
       for (BaseCommand *BC : C->Commands)
         if (auto *ISD = dyn_cast<InputSectionDescription>(BC)) {
           CurTS = nullptr;
           for (InputSection* IS : ISD->Sections)
             Fn(OS, &ISD->Sections, IS);
         }
   }
 }
 
 // Process all relocations from the InputSections that have been assigned
 // to OutputSections and redirect through Thunks if needed.
 //
 // createThunks must be called after scanRelocs has created the Relocations for
 // each InputSection. It must be called before the static symbol table is
 // finalized. If any Thunks are added to an OutputSection the output section
 // offsets of the InputSections will change.
 //
 // FIXME: All Thunks are assumed to be in range of the relocation. Range
 // extension Thunks are not yet supported.
 bool ThunkCreator::createThunks(
     ArrayRef<OutputSectionCommand *> OutputSections) {
+  if (Pass > 0)
+    ThunkSections.clear();
+
   // Create all the Thunks and insert them into synthetic ThunkSections. The
   // ThunkSections are later inserted back into the OutputSection.
 
   // We separate the creation of ThunkSections from the insertion of the
   // ThunkSections back into the OutputSection as ThunkSections are not always
   // inserted into the same OutputSection as the caller.
   forEachExecInputSection(
-      OutputSections, [=](OutputSection *OS,  std::vector<InputSection*> *ISR,
+      OutputSections, [&](OutputSection *OS,  std::vector<InputSection*> *ISR,
                           InputSection *IS) {
         for (Relocation &Rel : IS->Relocations) {
           SymbolBody &Body = *Rel.Sym;
-          if (!Target->needsThunk(Rel.Expr, Rel.Type, IS->File, Body))
+          if (Thunks.find(&Body) != Thunks.end() ||
+              !Target->needsThunk(Rel.Expr, Rel.Type, IS->File, Body))
             continue;
           Thunk *T;
           bool IsNew;
           std::tie(T, IsNew) = getThunk(Body, Rel.Type);
           if (IsNew) {
             // Find or create a ThunkSection for the new Thunk
             ThunkSection *TS;
             if (auto *TIS = T->getTargetInputSection())
               TS = getISThunkSec(TIS, OS);
             else
               TS = getOSThunkSec(OS, ISR);
             TS->addThunk(T);
+            Thunks[T->ThunkSym] = T;
           }
           // Redirect relocation to Thunk, we never go via the PLT to a Thunk
           Rel.Sym = T->ThunkSym;
           Rel.Expr = fromPlt(Rel.Expr);
         }
       });
-
   // Merge all created synthetic ThunkSections back into OutputSection
   mergeThunks();
+  ++Pass;
   return !ThunkSections.empty();
 }
 
 template void elf::scanRelocations<ELF32LE>(InputSectionBase &);
 template void elf::scanRelocations<ELF32BE>(InputSectionBase &);
 template void elf::scanRelocations<ELF64LE>(InputSectionBase &);
 template void elf::scanRelocations<ELF64BE>(InputSectionBase &);
Index: vendor/lld/dist/ELF/Relocations.h
===================================================================
--- vendor/lld/dist/ELF/Relocations.h	(revision 320020)
+++ vendor/lld/dist/ELF/Relocations.h	(revision 320021)
@@ -1,168 +1,181 @@
 //===- Relocations.h -------------------------------------------*- C++ -*-===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLD_ELF_RELOCATIONS_H
 #define LLD_ELF_RELOCATIONS_H
 
 #include "lld/Core/LLVM.h"
 #include "llvm/ADT/DenseMap.h"
 #include <map>
 #include <vector>
 
 namespace lld {
 namespace elf {
 class SymbolBody;
 class InputSection;
 class InputSectionBase;
 class OutputSection;
 struct OutputSectionCommand;
 
 // List of target-independent relocation types. Relocations read
 // from files are converted to these types so that the main code
 // doesn't have to know about architecture-specific details.
 enum RelExpr {
   R_ABS,
   R_ARM_SBREL,
   R_GOT,
   R_GOTONLY_PC,
   R_GOTONLY_PC_FROM_END,
   R_GOTREL,
   R_GOTREL_FROM_END,
   R_GOT_FROM_END,
   R_GOT_OFF,
   R_GOT_PAGE_PC,
   R_GOT_PC,
   R_HINT,
   R_MIPS_GOTREL,
   R_MIPS_GOT_GP,
   R_MIPS_GOT_GP_PC,
   R_MIPS_GOT_LOCAL_PAGE,
   R_MIPS_GOT_OFF,
   R_MIPS_GOT_OFF32,
   R_MIPS_TLSGD,
   R_MIPS_TLSLD,
   R_NEG_TLS,
   R_NONE,
   R_PAGE_PC,
   R_PC,
   R_PLT,
   R_PLT_PAGE_PC,
   R_PLT_PC,
   R_PPC_OPD,
   R_PPC_PLT_OPD,
   R_PPC_TOC,
   R_RELAX_GOT_PC,
   R_RELAX_GOT_PC_NOPIC,
   R_RELAX_TLS_GD_TO_IE,
   R_RELAX_TLS_GD_TO_IE_ABS,
   R_RELAX_TLS_GD_TO_IE_END,
   R_RELAX_TLS_GD_TO_IE_PAGE_PC,
   R_RELAX_TLS_GD_TO_LE,
   R_RELAX_TLS_GD_TO_LE_NEG,
   R_RELAX_TLS_IE_TO_LE,
   R_RELAX_TLS_LD_TO_LE,
   R_SIZE,
   R_TLS,
   R_TLSDESC,
   R_TLSDESC_CALL,
   R_TLSDESC_PAGE,
   R_TLSGD,
   R_TLSGD_PC,
   R_TLSLD,
   R_TLSLD_PC,
 };
 
 // Build a bitmask with one bit set for each RelExpr.
 //
 // Constexpr function arguments can't be used in static asserts, so we
 // use template arguments to build the mask.
 // But function template partial specializations don't exist (needed
 // for base case of the recursion), so we need a dummy struct.
 template <RelExpr... Exprs> struct RelExprMaskBuilder {
   static inline uint64_t build() { return 0; }
 };
 
 // Specialization for recursive case.
 template <RelExpr Head, RelExpr... Tail>
 struct RelExprMaskBuilder<Head, Tail...> {
   static inline uint64_t build() {
     static_assert(0 <= Head && Head < 64,
                   "RelExpr is too large for 64-bit mask!");
     return (uint64_t(1) << Head) | RelExprMaskBuilder<Tail...>::build();
   }
 };
 
 // Return true if `Expr` is one of `Exprs`.
 // There are fewer than 64 RelExpr's, so we can represent any set of
 // RelExpr's as a constant bit mask and test for membership with a
 // couple cheap bitwise operations.
 template <RelExpr... Exprs> bool isRelExprOneOf(RelExpr Expr) {
   assert(0 <= Expr && (int)Expr < 64 && "RelExpr is too large for 64-bit mask!");
   return (uint64_t(1) << Expr) & RelExprMaskBuilder<Exprs...>::build();
 }
 
 // Architecture-neutral representation of relocation.
 struct Relocation {
   RelExpr Expr;
   uint32_t Type;
   uint64_t Offset;
   int64_t Addend;
   SymbolBody *Sym;
 };
 
 template <class ELFT> void scanRelocations(InputSectionBase &);
 
 class ThunkSection;
 class Thunk;
 
 class ThunkCreator {
 public:
   // Return true if Thunks have been added to OutputSections
   bool createThunks(ArrayRef<OutputSectionCommand *> OutputSections);
 
+  // The number of completed passes of createThunks this permits us
+  // to do one time initialization on Pass 0 and put a limit on the
+  // number of times it can be called to prevent infinite loops.
+  uint32_t Pass = 0;
+
 private:
   void mergeThunks();
   ThunkSection *getOSThunkSec(OutputSection *OS,
                               std::vector<InputSection *> *ISR);
   ThunkSection *getISThunkSec(InputSection *IS, OutputSection *OS);
   void forEachExecInputSection(
       ArrayRef<OutputSectionCommand *> OutputSections,
       std::function<void(OutputSection *, std::vector<InputSection *> *,
                          InputSection *)>
           Fn);
   std::pair<Thunk *, bool> getThunk(SymbolBody &Body, uint32_t Type);
-
+  ThunkSection *addThunkSection(OutputSection *OS,
+                                std::vector<InputSection *> *, uint64_t Off);
   // Track Symbols that already have a Thunk
   llvm::DenseMap<SymbolBody *, Thunk *> ThunkedSymbols;
 
+  // Find a Thunk from the Thunks symbol definition, we can use this to find
+  // the Thunk from a relocation to the Thunks symbol definition.
+  llvm::DenseMap<SymbolBody *, Thunk *> Thunks;
+
   // Track InputSections that have a ThunkSection placed in front
   llvm::DenseMap<InputSection *, ThunkSection *> ThunkedSections;
 
-  // Track the ThunksSections that need to be inserted into an OutputSection
+  // All the ThunkSections that we have created, organised by OutputSection
+  // will contain a mix of ThunkSections that have been created this pass, and
+  // ThunkSections that have been merged into the OutputSection on previous
+  // passes
   std::map<std::vector<InputSection *> *, std::vector<ThunkSection *>>
       ThunkSections;
 
   // The ThunkSection for this vector of InputSections
   ThunkSection *CurTS;
 };
 
 // Return a int64_t to make sure we get the sign extension out of the way as
 // early as possible.
 template <class ELFT>
 static inline int64_t getAddend(const typename ELFT::Rel &Rel) {
   return 0;
 }
 template <class ELFT>
 static inline int64_t getAddend(const typename ELFT::Rela &Rel) {
   return Rel.r_addend;
 }
 }
 }
 
 #endif
Index: vendor/lld/dist/ELF/Strings.h
===================================================================
--- vendor/lld/dist/ELF/Strings.h	(revision 320020)
+++ vendor/lld/dist/ELF/Strings.h	(revision 320021)
@@ -1,86 +1,82 @@
 //===- Strings.h ------------------------------------------------*- C++ -*-===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLD_ELF_STRINGS_H
 #define LLD_ELF_STRINGS_H
 
 #include "lld/Core/LLVM.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/Optional.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Support/GlobPattern.h"
 #include <vector>
 
 namespace lld {
 namespace elf {
 
 int getPriority(StringRef S);
 bool hasWildcard(StringRef S);
 std::vector<uint8_t> parseHex(StringRef S);
 bool isValidCIdentifier(StringRef S);
 StringRef unquote(StringRef S);
 
 // This is a lazy version of StringRef. String size is computed lazily
 // when it is needed. It is more efficient than StringRef to instantiate
 // if you have a string whose size is unknown.
 //
 // ELF string tables contain a lot of null-terminated strings.
 // Most of them are not necessary for the linker because they are names
 // of local symbols and the linker doesn't use local symbol names for
 // name resolution. So, we use this class to represents strings read
 // from string tables.
 class StringRefZ {
 public:
   StringRefZ() : Start(nullptr), Size(0) {}
   StringRefZ(const char *S, size_t Size) : Start(S), Size(Size) {}
 
   /*implicit*/ StringRefZ(const char *S) : Start(S), Size(-1) {}
 
   /*implicit*/ StringRefZ(llvm::StringRef S)
       : Start(S.data()), Size(S.size()) {}
 
   operator llvm::StringRef() const {
     if (Size == (size_t)-1)
       Size = strlen(Start);
     return {Start, Size};
   }
 
 private:
   const char *Start;
   mutable size_t Size;
 };
 
 // This class represents multiple glob patterns.
 class StringMatcher {
 public:
   StringMatcher() = default;
   explicit StringMatcher(ArrayRef<StringRef> Pat);
 
   bool match(StringRef S) const;
 
 private:
   std::vector<llvm::GlobPattern> Patterns;
 };
 
 // Returns a demangled C++ symbol name. If Name is not a mangled
 // name, it returns Optional::None.
 llvm::Optional<std::string> demangle(StringRef Name);
 
-inline StringRef toStringRef(ArrayRef<uint8_t> Arr) {
-  return {(const char *)Arr.data(), Arr.size()};
-}
-
 inline ArrayRef<uint8_t> toArrayRef(StringRef S) {
   return {(const uint8_t *)S.data(), S.size()};
 }
 }
 }
 
 #endif
Index: vendor/lld/dist/ELF/SyntheticSections.cpp
===================================================================
--- vendor/lld/dist/ELF/SyntheticSections.cpp	(revision 320020)
+++ vendor/lld/dist/ELF/SyntheticSections.cpp	(revision 320021)
@@ -1,2349 +1,2400 @@
 //===- SyntheticSections.cpp ----------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains linker-synthesized sections. Currently,
 // synthetic sections are created either output sections or input sections,
 // but we are rewriting code so that all synthetic sections are created as
 // input sections.
 //
 //===----------------------------------------------------------------------===//
 
 #include "SyntheticSections.h"
 #include "Config.h"
 #include "Error.h"
 #include "InputFiles.h"
 #include "LinkerScript.h"
 #include "Memory.h"
 #include "OutputSections.h"
 #include "Strings.h"
 #include "SymbolTable.h"
 #include "Target.h"
 #include "Threads.h"
 #include "Writer.h"
 #include "lld/Config/Version.h"
 #include "llvm/BinaryFormat/Dwarf.h"
 #include "llvm/DebugInfo/DWARF/DWARFDebugPubTable.h"
+#include "llvm/Object/Decompressor.h"
 #include "llvm/Object/ELFObjectFile.h"
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/MD5.h"
 #include "llvm/Support/RandomNumberGenerator.h"
 #include "llvm/Support/SHA1.h"
 #include "llvm/Support/xxhash.h"
 #include <cstdlib>
 
 using namespace llvm;
 using namespace llvm::dwarf;
 using namespace llvm::ELF;
 using namespace llvm::object;
 using namespace llvm::support;
 using namespace llvm::support::endian;
 
 using namespace lld;
 using namespace lld::elf;
 
 uint64_t SyntheticSection::getVA() const {
   if (OutputSection *Sec = getParent())
     return Sec->Addr + OutSecOff;
   return 0;
 }
 
 template <class ELFT> static std::vector<DefinedCommon *> getCommonSymbols() {
   std::vector<DefinedCommon *> V;
   for (Symbol *S : Symtab<ELFT>::X->getSymbols())
     if (auto *B = dyn_cast<DefinedCommon>(S->body()))
       V.push_back(B);
   return V;
 }
 
 // Find all common symbols and allocate space for them.
 template <class ELFT> InputSection *elf::createCommonSection() {
   if (!Config->DefineCommon)
     return nullptr;
 
   // Sort the common symbols by alignment as an heuristic to pack them better.
   std::vector<DefinedCommon *> Syms = getCommonSymbols<ELFT>();
   if (Syms.empty())
     return nullptr;
 
   std::stable_sort(Syms.begin(), Syms.end(),
                    [](const DefinedCommon *A, const DefinedCommon *B) {
                      return A->Alignment > B->Alignment;
                    });
 
   BssSection *Sec = make<BssSection>("COMMON");
   for (DefinedCommon *Sym : Syms)
     Sym->Offset = Sec->reserveSpace(Sym->Size, Sym->Alignment);
   return Sec;
 }
 
 // Returns an LLD version string.
 static ArrayRef<uint8_t> getVersion() {
   // Check LLD_VERSION first for ease of testing.
   // You can get consitent output by using the environment variable.
   // This is only for testing.
   StringRef S = getenv("LLD_VERSION");
   if (S.empty())
     S = Saver.save(Twine("Linker: ") + getLLDVersion());
 
   // +1 to include the terminating '\0'.
   return {(const uint8_t *)S.data(), S.size() + 1};
 }
 
 // Creates a .comment section containing LLD version info.
 // With this feature, you can identify LLD-generated binaries easily
 // by "readelf --string-dump .comment <file>".
 // The returned object is a mergeable string section.
 template <class ELFT> MergeInputSection *elf::createCommentSection() {
   typename ELFT::Shdr Hdr = {};
   Hdr.sh_flags = SHF_MERGE | SHF_STRINGS;
   Hdr.sh_type = SHT_PROGBITS;
   Hdr.sh_entsize = 1;
   Hdr.sh_addralign = 1;
 
   auto *Ret =
       make<MergeInputSection>((ObjectFile<ELFT> *)nullptr, &Hdr, ".comment");
   Ret->Data = getVersion();
   Ret->splitIntoPieces();
   return Ret;
 }
 
 // .MIPS.abiflags section.
 template <class ELFT>
 MipsAbiFlagsSection<ELFT>::MipsAbiFlagsSection(Elf_Mips_ABIFlags Flags)
     : SyntheticSection(SHF_ALLOC, SHT_MIPS_ABIFLAGS, 8, ".MIPS.abiflags"),
       Flags(Flags) {
   this->Entsize = sizeof(Elf_Mips_ABIFlags);
 }
 
 template <class ELFT> void MipsAbiFlagsSection<ELFT>::writeTo(uint8_t *Buf) {
   memcpy(Buf, &Flags, sizeof(Flags));
 }
 
 template <class ELFT>
 MipsAbiFlagsSection<ELFT> *MipsAbiFlagsSection<ELFT>::create() {
   Elf_Mips_ABIFlags Flags = {};
   bool Create = false;
 
   for (InputSectionBase *Sec : InputSections) {
     if (Sec->Type != SHT_MIPS_ABIFLAGS)
       continue;
     Sec->Live = false;
     Create = true;
 
     std::string Filename = toString(Sec->getFile<ELFT>());
     const size_t Size = Sec->Data.size();
     // Older version of BFD (such as the default FreeBSD linker) concatenate
     // .MIPS.abiflags instead of merging. To allow for this case (or potential
     // zero padding) we ignore everything after the first Elf_Mips_ABIFlags
     if (Size < sizeof(Elf_Mips_ABIFlags)) {
       error(Filename + ": invalid size of .MIPS.abiflags section: got " +
             Twine(Size) + " instead of " + Twine(sizeof(Elf_Mips_ABIFlags)));
       return nullptr;
     }
     auto *S = reinterpret_cast<const Elf_Mips_ABIFlags *>(Sec->Data.data());
     if (S->version != 0) {
       error(Filename + ": unexpected .MIPS.abiflags version " +
             Twine(S->version));
       return nullptr;
     }
 
     // LLD checks ISA compatibility in getMipsEFlags(). Here we just
     // select the highest number of ISA/Rev/Ext.
     Flags.isa_level = std::max(Flags.isa_level, S->isa_level);
     Flags.isa_rev = std::max(Flags.isa_rev, S->isa_rev);
     Flags.isa_ext = std::max(Flags.isa_ext, S->isa_ext);
     Flags.gpr_size = std::max(Flags.gpr_size, S->gpr_size);
     Flags.cpr1_size = std::max(Flags.cpr1_size, S->cpr1_size);
     Flags.cpr2_size = std::max(Flags.cpr2_size, S->cpr2_size);
     Flags.ases |= S->ases;
     Flags.flags1 |= S->flags1;
     Flags.flags2 |= S->flags2;
     Flags.fp_abi = elf::getMipsFpAbiFlag(Flags.fp_abi, S->fp_abi, Filename);
   };
 
   if (Create)
     return make<MipsAbiFlagsSection<ELFT>>(Flags);
   return nullptr;
 }
 
 // .MIPS.options section.
 template <class ELFT>
 MipsOptionsSection<ELFT>::MipsOptionsSection(Elf_Mips_RegInfo Reginfo)
     : SyntheticSection(SHF_ALLOC, SHT_MIPS_OPTIONS, 8, ".MIPS.options"),
       Reginfo(Reginfo) {
   this->Entsize = sizeof(Elf_Mips_Options) + sizeof(Elf_Mips_RegInfo);
 }
 
 template <class ELFT> void MipsOptionsSection<ELFT>::writeTo(uint8_t *Buf) {
   auto *Options = reinterpret_cast<Elf_Mips_Options *>(Buf);
   Options->kind = ODK_REGINFO;
   Options->size = getSize();
 
   if (!Config->Relocatable)
     Reginfo.ri_gp_value = InX::MipsGot->getGp();
   memcpy(Buf + sizeof(Elf_Mips_Options), &Reginfo, sizeof(Reginfo));
 }
 
 template <class ELFT>
 MipsOptionsSection<ELFT> *MipsOptionsSection<ELFT>::create() {
   // N64 ABI only.
   if (!ELFT::Is64Bits)
     return nullptr;
 
   Elf_Mips_RegInfo Reginfo = {};
   bool Create = false;
 
   for (InputSectionBase *Sec : InputSections) {
     if (Sec->Type != SHT_MIPS_OPTIONS)
       continue;
     Sec->Live = false;
     Create = true;
 
     std::string Filename = toString(Sec->getFile<ELFT>());
     ArrayRef<uint8_t> D = Sec->Data;
 
     while (!D.empty()) {
       if (D.size() < sizeof(Elf_Mips_Options)) {
         error(Filename + ": invalid size of .MIPS.options section");
         break;
       }
 
       auto *Opt = reinterpret_cast<const Elf_Mips_Options *>(D.data());
       if (Opt->kind == ODK_REGINFO) {
         if (Config->Relocatable && Opt->getRegInfo().ri_gp_value)
           error(Filename + ": unsupported non-zero ri_gp_value");
         Reginfo.ri_gprmask |= Opt->getRegInfo().ri_gprmask;
         Sec->getFile<ELFT>()->MipsGp0 = Opt->getRegInfo().ri_gp_value;
         break;
       }
 
       if (!Opt->size)
         fatal(Filename + ": zero option descriptor size");
       D = D.slice(Opt->size);
     }
   };
 
   if (Create)
     return make<MipsOptionsSection<ELFT>>(Reginfo);
   return nullptr;
 }
 
 // MIPS .reginfo section.
 template <class ELFT>
 MipsReginfoSection<ELFT>::MipsReginfoSection(Elf_Mips_RegInfo Reginfo)
     : SyntheticSection(SHF_ALLOC, SHT_MIPS_REGINFO, 4, ".reginfo"),
       Reginfo(Reginfo) {
   this->Entsize = sizeof(Elf_Mips_RegInfo);
 }
 
 template <class ELFT> void MipsReginfoSection<ELFT>::writeTo(uint8_t *Buf) {
   if (!Config->Relocatable)
     Reginfo.ri_gp_value = InX::MipsGot->getGp();
   memcpy(Buf, &Reginfo, sizeof(Reginfo));
 }
 
 template <class ELFT>
 MipsReginfoSection<ELFT> *MipsReginfoSection<ELFT>::create() {
   // Section should be alive for O32 and N32 ABIs only.
   if (ELFT::Is64Bits)
     return nullptr;
 
   Elf_Mips_RegInfo Reginfo = {};
   bool Create = false;
 
   for (InputSectionBase *Sec : InputSections) {
     if (Sec->Type != SHT_MIPS_REGINFO)
       continue;
     Sec->Live = false;
     Create = true;
 
     if (Sec->Data.size() != sizeof(Elf_Mips_RegInfo)) {
       error(toString(Sec->getFile<ELFT>()) +
             ": invalid size of .reginfo section");
       return nullptr;
     }
     auto *R = reinterpret_cast<const Elf_Mips_RegInfo *>(Sec->Data.data());
     if (Config->Relocatable && R->ri_gp_value)
       error(toString(Sec->getFile<ELFT>()) +
             ": unsupported non-zero ri_gp_value");
 
     Reginfo.ri_gprmask |= R->ri_gprmask;
     Sec->getFile<ELFT>()->MipsGp0 = R->ri_gp_value;
   };
 
   if (Create)
     return make<MipsReginfoSection<ELFT>>(Reginfo);
   return nullptr;
 }
 
 InputSection *elf::createInterpSection() {
   // StringSaver guarantees that the returned string ends with '\0'.
   StringRef S = Saver.save(Config->DynamicLinker);
   ArrayRef<uint8_t> Contents = {(const uint8_t *)S.data(), S.size() + 1};
 
   auto *Sec =
       make<InputSection>(SHF_ALLOC, SHT_PROGBITS, 1, Contents, ".interp");
   Sec->Live = true;
   return Sec;
 }
 
 SymbolBody *elf::addSyntheticLocal(StringRef Name, uint8_t Type, uint64_t Value,
                                    uint64_t Size, InputSectionBase *Section) {
   auto *S = make<DefinedRegular>(Name, /*IsLocal*/ true, STV_DEFAULT, Type,
                                  Value, Size, Section, nullptr);
   if (InX::SymTab)
     InX::SymTab->addSymbol(S);
   return S;
 }
 
 static size_t getHashSize() {
   switch (Config->BuildId) {
   case BuildIdKind::Fast:
     return 8;
   case BuildIdKind::Md5:
   case BuildIdKind::Uuid:
     return 16;
   case BuildIdKind::Sha1:
     return 20;
   case BuildIdKind::Hexstring:
     return Config->BuildIdVector.size();
   default:
     llvm_unreachable("unknown BuildIdKind");
   }
 }
 
 BuildIdSection::BuildIdSection()
     : SyntheticSection(SHF_ALLOC, SHT_NOTE, 1, ".note.gnu.build-id"),
       HashSize(getHashSize()) {}
 
 void BuildIdSection::writeTo(uint8_t *Buf) {
   endianness E = Config->Endianness;
   write32(Buf, 4, E);                   // Name size
   write32(Buf + 4, HashSize, E);        // Content size
   write32(Buf + 8, NT_GNU_BUILD_ID, E); // Type
   memcpy(Buf + 12, "GNU", 4);           // Name string
   HashBuf = Buf + 16;
 }
 
 // Split one uint8 array into small pieces of uint8 arrays.
 static std::vector<ArrayRef<uint8_t>> split(ArrayRef<uint8_t> Arr,
                                             size_t ChunkSize) {
   std::vector<ArrayRef<uint8_t>> Ret;
   while (Arr.size() > ChunkSize) {
     Ret.push_back(Arr.take_front(ChunkSize));
     Arr = Arr.drop_front(ChunkSize);
   }
   if (!Arr.empty())
     Ret.push_back(Arr);
   return Ret;
 }
 
 // Computes a hash value of Data using a given hash function.
 // In order to utilize multiple cores, we first split data into 1MB
 // chunks, compute a hash for each chunk, and then compute a hash value
 // of the hash values.
 void BuildIdSection::computeHash(
     llvm::ArrayRef<uint8_t> Data,
     std::function<void(uint8_t *Dest, ArrayRef<uint8_t> Arr)> HashFn) {
   std::vector<ArrayRef<uint8_t>> Chunks = split(Data, 1024 * 1024);
   std::vector<uint8_t> Hashes(Chunks.size() * HashSize);
 
   // Compute hash values.
   parallelForEachN(0, Chunks.size(), [&](size_t I) {
     HashFn(Hashes.data() + I * HashSize, Chunks[I]);
   });
 
   // Write to the final output buffer.
   HashFn(HashBuf, Hashes);
 }
 
 BssSection::BssSection(StringRef Name)
     : SyntheticSection(SHF_ALLOC | SHF_WRITE, SHT_NOBITS, 0, Name) {}
 
 size_t BssSection::reserveSpace(uint64_t Size, uint32_t Alignment) {
   if (OutputSection *Sec = getParent())
     Sec->updateAlignment(Alignment);
   this->Size = alignTo(this->Size, Alignment) + Size;
   this->Alignment = std::max(this->Alignment, Alignment);
   return this->Size - Size;
 }
 
 void BuildIdSection::writeBuildId(ArrayRef<uint8_t> Buf) {
   switch (Config->BuildId) {
   case BuildIdKind::Fast:
     computeHash(Buf, [](uint8_t *Dest, ArrayRef<uint8_t> Arr) {
       write64le(Dest, xxHash64(toStringRef(Arr)));
     });
     break;
   case BuildIdKind::Md5:
     computeHash(Buf, [](uint8_t *Dest, ArrayRef<uint8_t> Arr) {
       memcpy(Dest, MD5::hash(Arr).data(), 16);
     });
     break;
   case BuildIdKind::Sha1:
     computeHash(Buf, [](uint8_t *Dest, ArrayRef<uint8_t> Arr) {
       memcpy(Dest, SHA1::hash(Arr).data(), 20);
     });
     break;
   case BuildIdKind::Uuid:
     if (getRandomBytes(HashBuf, HashSize))
       error("entropy source failure");
     break;
   case BuildIdKind::Hexstring:
     memcpy(HashBuf, Config->BuildIdVector.data(), Config->BuildIdVector.size());
     break;
   default:
     llvm_unreachable("unknown BuildIdKind");
   }
 }
 
 template <class ELFT>
 EhFrameSection<ELFT>::EhFrameSection()
     : SyntheticSection(SHF_ALLOC, SHT_PROGBITS, 1, ".eh_frame") {}
 
 // Search for an existing CIE record or create a new one.
 // CIE records from input object files are uniquified by their contents
 // and where their relocations point to.
 template <class ELFT>
 template <class RelTy>
 CieRecord *EhFrameSection<ELFT>::addCie(EhSectionPiece &Piece,
                                         ArrayRef<RelTy> Rels) {
   auto *Sec = cast<EhInputSection>(Piece.ID);
   const endianness E = ELFT::TargetEndianness;
   if (read32<E>(Piece.data().data() + 4) != 0)
     fatal(toString(Sec) + ": CIE expected at beginning of .eh_frame");
 
   SymbolBody *Personality = nullptr;
   unsigned FirstRelI = Piece.FirstRelocation;
   if (FirstRelI != (unsigned)-1)
     Personality =
         &Sec->template getFile<ELFT>()->getRelocTargetSym(Rels[FirstRelI]);
 
   // Search for an existing CIE by CIE contents/relocation target pair.
   CieRecord *Cie = &CieMap[{Piece.data(), Personality}];
 
   // If not found, create a new one.
   if (Cie->Piece == nullptr) {
     Cie->Piece = &Piece;
     Cies.push_back(Cie);
   }
   return Cie;
 }
 
 // There is one FDE per function. Returns true if a given FDE
 // points to a live function.
 template <class ELFT>
 template <class RelTy>
 bool EhFrameSection<ELFT>::isFdeLive(EhSectionPiece &Piece,
                                      ArrayRef<RelTy> Rels) {
   auto *Sec = cast<EhInputSection>(Piece.ID);
   unsigned FirstRelI = Piece.FirstRelocation;
   if (FirstRelI == (unsigned)-1)
     return false;
   const RelTy &Rel = Rels[FirstRelI];
   SymbolBody &B = Sec->template getFile<ELFT>()->getRelocTargetSym(Rel);
   auto *D = dyn_cast<DefinedRegular>(&B);
   if (!D || !D->Section)
     return false;
   auto *Target =
       cast<InputSectionBase>(cast<InputSectionBase>(D->Section)->Repl);
   return Target && Target->Live;
 }
 
 // .eh_frame is a sequence of CIE or FDE records. In general, there
 // is one CIE record per input object file which is followed by
 // a list of FDEs. This function searches an existing CIE or create a new
 // one and associates FDEs to the CIE.
 template <class ELFT>
 template <class RelTy>
 void EhFrameSection<ELFT>::addSectionAux(EhInputSection *Sec,
                                          ArrayRef<RelTy> Rels) {
   const endianness E = ELFT::TargetEndianness;
 
   DenseMap<size_t, CieRecord *> OffsetToCie;
   for (EhSectionPiece &Piece : Sec->Pieces) {
     // The empty record is the end marker.
     if (Piece.size() == 4)
       return;
 
     size_t Offset = Piece.InputOff;
     uint32_t ID = read32<E>(Piece.data().data() + 4);
     if (ID == 0) {
       OffsetToCie[Offset] = addCie(Piece, Rels);
       continue;
     }
 
     uint32_t CieOffset = Offset + 4 - ID;
     CieRecord *Cie = OffsetToCie[CieOffset];
     if (!Cie)
       fatal(toString(Sec) + ": invalid CIE reference");
 
     if (!isFdeLive(Piece, Rels))
       continue;
     Cie->FdePieces.push_back(&Piece);
     NumFdes++;
   }
 }
 
 template <class ELFT>
 void EhFrameSection<ELFT>::addSection(InputSectionBase *C) {
   auto *Sec = cast<EhInputSection>(C);
   Sec->Parent = this;
   updateAlignment(Sec->Alignment);
   Sections.push_back(Sec);
   for (auto *DS : Sec->DependentSections)
     DependentSections.push_back(DS);
 
   // .eh_frame is a sequence of CIE or FDE records. This function
   // splits it into pieces so that we can call
   // SplitInputSection::getSectionPiece on the section.
   Sec->split<ELFT>();
   if (Sec->Pieces.empty())
     return;
 
   if (Sec->NumRelocations) {
     if (Sec->AreRelocsRela)
       addSectionAux(Sec, Sec->template relas<ELFT>());
     else
       addSectionAux(Sec, Sec->template rels<ELFT>());
     return;
   }
   addSectionAux(Sec, makeArrayRef<Elf_Rela>(nullptr, nullptr));
 }
 
 template <class ELFT>
 static void writeCieFde(uint8_t *Buf, ArrayRef<uint8_t> D) {
   memcpy(Buf, D.data(), D.size());
 
   // Fix the size field. -4 since size does not include the size field itself.
   const endianness E = ELFT::TargetEndianness;
   write32<E>(Buf, alignTo(D.size(), sizeof(typename ELFT::uint)) - 4);
 }
 
 template <class ELFT> void EhFrameSection<ELFT>::finalizeContents() {
   if (this->Size)
     return; // Already finalized.
 
   size_t Off = 0;
   for (CieRecord *Cie : Cies) {
     Cie->Piece->OutputOff = Off;
     Off += alignTo(Cie->Piece->size(), Config->Wordsize);
 
     for (EhSectionPiece *Fde : Cie->FdePieces) {
       Fde->OutputOff = Off;
       Off += alignTo(Fde->size(), Config->Wordsize);
     }
   }
 
   // The LSB standard does not allow a .eh_frame section with zero
   // Call Frame Information records. Therefore add a CIE record length
   // 0 as a terminator if this .eh_frame section is empty.
   if (Off == 0)
     Off = 4;
 
   this->Size = Off;
 }
 
 template <class ELFT> static uint64_t readFdeAddr(uint8_t *Buf, int Size) {
   const endianness E = ELFT::TargetEndianness;
   switch (Size) {
   case DW_EH_PE_udata2:
     return read16<E>(Buf);
   case DW_EH_PE_udata4:
     return read32<E>(Buf);
   case DW_EH_PE_udata8:
     return read64<E>(Buf);
   case DW_EH_PE_absptr:
     if (ELFT::Is64Bits)
       return read64<E>(Buf);
     return read32<E>(Buf);
   }
   fatal("unknown FDE size encoding");
 }
 
 // Returns the VA to which a given FDE (on a mmap'ed buffer) is applied to.
 // We need it to create .eh_frame_hdr section.
 template <class ELFT>
 uint64_t EhFrameSection<ELFT>::getFdePc(uint8_t *Buf, size_t FdeOff,
                                         uint8_t Enc) {
   // The starting address to which this FDE applies is
   // stored at FDE + 8 byte.
   size_t Off = FdeOff + 8;
   uint64_t Addr = readFdeAddr<ELFT>(Buf + Off, Enc & 0x7);
   if ((Enc & 0x70) == DW_EH_PE_absptr)
     return Addr;
   if ((Enc & 0x70) == DW_EH_PE_pcrel)
     return Addr + getParent()->Addr + Off;
   fatal("unknown FDE size relative encoding");
 }
 
 template <class ELFT> void EhFrameSection<ELFT>::writeTo(uint8_t *Buf) {
   const endianness E = ELFT::TargetEndianness;
   for (CieRecord *Cie : Cies) {
     size_t CieOffset = Cie->Piece->OutputOff;
     writeCieFde<ELFT>(Buf + CieOffset, Cie->Piece->data());
 
     for (EhSectionPiece *Fde : Cie->FdePieces) {
       size_t Off = Fde->OutputOff;
       writeCieFde<ELFT>(Buf + Off, Fde->data());
 
       // FDE's second word should have the offset to an associated CIE.
       // Write it.
       write32<E>(Buf + Off + 4, Off + 4 - CieOffset);
     }
   }
 
   for (EhInputSection *S : Sections)
     S->relocateAlloc(Buf, nullptr);
 
   // Construct .eh_frame_hdr. .eh_frame_hdr is a binary search table
   // to get a FDE from an address to which FDE is applied. So here
   // we obtain two addresses and pass them to EhFrameHdr object.
   if (In<ELFT>::EhFrameHdr) {
     for (CieRecord *Cie : Cies) {
       uint8_t Enc = getFdeEncoding<ELFT>(Cie->Piece);
       for (SectionPiece *Fde : Cie->FdePieces) {
         uint64_t Pc = getFdePc(Buf, Fde->OutputOff, Enc);
         uint64_t FdeVA = getParent()->Addr + Fde->OutputOff;
         In<ELFT>::EhFrameHdr->addFde(Pc, FdeVA);
       }
     }
   }
 }
 
 GotSection::GotSection()
     : SyntheticSection(SHF_ALLOC | SHF_WRITE, SHT_PROGBITS,
                        Target->GotEntrySize, ".got") {}
 
 void GotSection::addEntry(SymbolBody &Sym) {
   Sym.GotIndex = NumEntries;
   ++NumEntries;
 }
 
 bool GotSection::addDynTlsEntry(SymbolBody &Sym) {
   if (Sym.GlobalDynIndex != -1U)
     return false;
   Sym.GlobalDynIndex = NumEntries;
   // Global Dynamic TLS entries take two GOT slots.
   NumEntries += 2;
   return true;
 }
 
 // Reserves TLS entries for a TLS module ID and a TLS block offset.
 // In total it takes two GOT slots.
 bool GotSection::addTlsIndex() {
   if (TlsIndexOff != uint32_t(-1))
     return false;
   TlsIndexOff = NumEntries * Config->Wordsize;
   NumEntries += 2;
   return true;
 }
 
 uint64_t GotSection::getGlobalDynAddr(const SymbolBody &B) const {
   return this->getVA() + B.GlobalDynIndex * Config->Wordsize;
 }
 
 uint64_t GotSection::getGlobalDynOffset(const SymbolBody &B) const {
   return B.GlobalDynIndex * Config->Wordsize;
 }
 
 void GotSection::finalizeContents() { Size = NumEntries * Config->Wordsize; }
 
 bool GotSection::empty() const {
   // If we have a relocation that is relative to GOT (such as GOTOFFREL),
   // we need to emit a GOT even if it's empty.
   return NumEntries == 0 && !HasGotOffRel;
 }
 
 void GotSection::writeTo(uint8_t *Buf) { relocateAlloc(Buf, Buf + Size); }
 
 MipsGotSection::MipsGotSection()
     : SyntheticSection(SHF_ALLOC | SHF_WRITE | SHF_MIPS_GPREL, SHT_PROGBITS, 16,
                        ".got") {}
 
 void MipsGotSection::addEntry(SymbolBody &Sym, int64_t Addend, RelExpr Expr) {
   // For "true" local symbols which can be referenced from the same module
   // only compiler creates two instructions for address loading:
   //
   // lw   $8, 0($gp) # R_MIPS_GOT16
   // addi $8, $8, 0  # R_MIPS_LO16
   //
   // The first instruction loads high 16 bits of the symbol address while
   // the second adds an offset. That allows to reduce number of required
   // GOT entries because only one global offset table entry is necessary
   // for every 64 KBytes of local data. So for local symbols we need to
   // allocate number of GOT entries to hold all required "page" addresses.
   //
   // All global symbols (hidden and regular) considered by compiler uniformly.
   // It always generates a single `lw` instruction and R_MIPS_GOT16 relocation
   // to load address of the symbol. So for each such symbol we need to
   // allocate dedicated GOT entry to store its address.
   //
   // If a symbol is preemptible we need help of dynamic linker to get its
   // final address. The corresponding GOT entries are allocated in the
   // "global" part of GOT. Entries for non preemptible global symbol allocated
   // in the "local" part of GOT.
   //
   // See "Global Offset Table" in Chapter 5:
   // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
   if (Expr == R_MIPS_GOT_LOCAL_PAGE) {
     // At this point we do not know final symbol value so to reduce number
     // of allocated GOT entries do the following trick. Save all output
     // sections referenced by GOT relocations. Then later in the `finalize`
     // method calculate number of "pages" required to cover all saved output
     // section and allocate appropriate number of GOT entries.
     PageIndexMap.insert({Sym.getOutputSection(), 0});
     return;
   }
   if (Sym.isTls()) {
     // GOT entries created for MIPS TLS relocations behave like
     // almost GOT entries from other ABIs. They go to the end
     // of the global offset table.
     Sym.GotIndex = TlsEntries.size();
     TlsEntries.push_back(&Sym);
     return;
   }
   auto AddEntry = [&](SymbolBody &S, uint64_t A, GotEntries &Items) {
     if (S.isInGot() && !A)
       return;
     size_t NewIndex = Items.size();
     if (!EntryIndexMap.insert({{&S, A}, NewIndex}).second)
       return;
     Items.emplace_back(&S, A);
     if (!A)
       S.GotIndex = NewIndex;
   };
   if (Sym.isPreemptible()) {
     // Ignore addends for preemptible symbols. They got single GOT entry anyway.
     AddEntry(Sym, 0, GlobalEntries);
     Sym.IsInGlobalMipsGot = true;
   } else if (Expr == R_MIPS_GOT_OFF32) {
     AddEntry(Sym, Addend, LocalEntries32);
     Sym.Is32BitMipsGot = true;
   } else {
     // Hold local GOT entries accessed via a 16-bit index separately.
     // That allows to write them in the beginning of the GOT and keep
     // their indexes as less as possible to escape relocation's overflow.
     AddEntry(Sym, Addend, LocalEntries);
   }
 }
 
 bool MipsGotSection::addDynTlsEntry(SymbolBody &Sym) {
   if (Sym.GlobalDynIndex != -1U)
     return false;
   Sym.GlobalDynIndex = TlsEntries.size();
   // Global Dynamic TLS entries take two GOT slots.
   TlsEntries.push_back(nullptr);
   TlsEntries.push_back(&Sym);
   return true;
 }
 
 // Reserves TLS entries for a TLS module ID and a TLS block offset.
 // In total it takes two GOT slots.
 bool MipsGotSection::addTlsIndex() {
   if (TlsIndexOff != uint32_t(-1))
     return false;
   TlsIndexOff = TlsEntries.size() * Config->Wordsize;
   TlsEntries.push_back(nullptr);
   TlsEntries.push_back(nullptr);
   return true;
 }
 
 static uint64_t getMipsPageAddr(uint64_t Addr) {
   return (Addr + 0x8000) & ~0xffff;
 }
 
 static uint64_t getMipsPageCount(uint64_t Size) {
   return (Size + 0xfffe) / 0xffff + 1;
 }
 
 uint64_t MipsGotSection::getPageEntryOffset(const SymbolBody &B,
                                             int64_t Addend) const {
   const OutputSection *OutSec = B.getOutputSection();
   uint64_t SecAddr = getMipsPageAddr(OutSec->Addr);
   uint64_t SymAddr = getMipsPageAddr(B.getVA(Addend));
   uint64_t Index = PageIndexMap.lookup(OutSec) + (SymAddr - SecAddr) / 0xffff;
   assert(Index < PageEntriesNum);
   return (HeaderEntriesNum + Index) * Config->Wordsize;
 }
 
 uint64_t MipsGotSection::getBodyEntryOffset(const SymbolBody &B,
                                             int64_t Addend) const {
   // Calculate offset of the GOT entries block: TLS, global, local.
   uint64_t Index = HeaderEntriesNum + PageEntriesNum;
   if (B.isTls())
     Index += LocalEntries.size() + LocalEntries32.size() + GlobalEntries.size();
   else if (B.IsInGlobalMipsGot)
     Index += LocalEntries.size() + LocalEntries32.size();
   else if (B.Is32BitMipsGot)
     Index += LocalEntries.size();
   // Calculate offset of the GOT entry in the block.
   if (B.isInGot())
     Index += B.GotIndex;
   else {
     auto It = EntryIndexMap.find({&B, Addend});
     assert(It != EntryIndexMap.end());
     Index += It->second;
   }
   return Index * Config->Wordsize;
 }
 
 uint64_t MipsGotSection::getTlsOffset() const {
   return (getLocalEntriesNum() + GlobalEntries.size()) * Config->Wordsize;
 }
 
 uint64_t MipsGotSection::getGlobalDynOffset(const SymbolBody &B) const {
   return B.GlobalDynIndex * Config->Wordsize;
 }
 
 const SymbolBody *MipsGotSection::getFirstGlobalEntry() const {
   return GlobalEntries.empty() ? nullptr : GlobalEntries.front().first;
 }
 
 unsigned MipsGotSection::getLocalEntriesNum() const {
   return HeaderEntriesNum + PageEntriesNum + LocalEntries.size() +
          LocalEntries32.size();
 }
 
 void MipsGotSection::finalizeContents() {
   updateAllocSize();
 }
 
 void MipsGotSection::updateAllocSize() {
   PageEntriesNum = 0;
   for (std::pair<const OutputSection *, size_t> &P : PageIndexMap) {
     // For each output section referenced by GOT page relocations calculate
     // and save into PageIndexMap an upper bound of MIPS GOT entries required
     // to store page addresses of local symbols. We assume the worst case -
     // each 64kb page of the output section has at least one GOT relocation
     // against it. And take in account the case when the section intersects
     // page boundaries.
     P.second = PageEntriesNum;
     PageEntriesNum += getMipsPageCount(P.first->Size);
   }
   Size = (getLocalEntriesNum() + GlobalEntries.size() + TlsEntries.size()) *
          Config->Wordsize;
 }
 
 bool MipsGotSection::empty() const {
   // We add the .got section to the result for dynamic MIPS target because
   // its address and properties are mentioned in the .dynamic section.
   return Config->Relocatable;
 }
 
 uint64_t MipsGotSection::getGp() const {
   return ElfSym::MipsGp->getVA(0);
 }
 
 static uint64_t readUint(uint8_t *Buf) {
   if (Config->Is64)
     return read64(Buf, Config->Endianness);
   return read32(Buf, Config->Endianness);
 }
 
 static void writeUint(uint8_t *Buf, uint64_t Val) {
   if (Config->Is64)
     write64(Buf, Val, Config->Endianness);
   else
     write32(Buf, Val, Config->Endianness);
 }
 
 void MipsGotSection::writeTo(uint8_t *Buf) {
   // Set the MSB of the second GOT slot. This is not required by any
   // MIPS ABI documentation, though.
   //
   // There is a comment in glibc saying that "The MSB of got[1] of a
   // gnu object is set to identify gnu objects," and in GNU gold it
   // says "the second entry will be used by some runtime loaders".
   // But how this field is being used is unclear.
   //
   // We are not really willing to mimic other linkers behaviors
   // without understanding why they do that, but because all files
   // generated by GNU tools have this special GOT value, and because
   // we've been doing this for years, it is probably a safe bet to
   // keep doing this for now. We really need to revisit this to see
   // if we had to do this.
   writeUint(Buf + Config->Wordsize, (uint64_t)1 << (Config->Wordsize * 8 - 1));
   Buf += HeaderEntriesNum * Config->Wordsize;
   // Write 'page address' entries to the local part of the GOT.
   for (std::pair<const OutputSection *, size_t> &L : PageIndexMap) {
     size_t PageCount = getMipsPageCount(L.first->Size);
     uint64_t FirstPageAddr = getMipsPageAddr(L.first->Addr);
     for (size_t PI = 0; PI < PageCount; ++PI) {
       uint8_t *Entry = Buf + (L.second + PI) * Config->Wordsize;
       writeUint(Entry, FirstPageAddr + PI * 0x10000);
     }
   }
   Buf += PageEntriesNum * Config->Wordsize;
   auto AddEntry = [&](const GotEntry &SA) {
     uint8_t *Entry = Buf;
     Buf += Config->Wordsize;
     const SymbolBody *Body = SA.first;
     uint64_t VA = Body->getVA(SA.second);
     writeUint(Entry, VA);
   };
   std::for_each(std::begin(LocalEntries), std::end(LocalEntries), AddEntry);
   std::for_each(std::begin(LocalEntries32), std::end(LocalEntries32), AddEntry);
   std::for_each(std::begin(GlobalEntries), std::end(GlobalEntries), AddEntry);
   // Initialize TLS-related GOT entries. If the entry has a corresponding
   // dynamic relocations, leave it initialized by zero. Write down adjusted
   // TLS symbol's values otherwise. To calculate the adjustments use offsets
   // for thread-local storage.
   // https://www.linux-mips.org/wiki/NPTL
   if (TlsIndexOff != -1U && !Config->Pic)
     writeUint(Buf + TlsIndexOff, 1);
   for (const SymbolBody *B : TlsEntries) {
     if (!B || B->isPreemptible())
       continue;
     uint64_t VA = B->getVA();
     if (B->GotIndex != -1U) {
       uint8_t *Entry = Buf + B->GotIndex * Config->Wordsize;
       writeUint(Entry, VA - 0x7000);
     }
     if (B->GlobalDynIndex != -1U) {
       uint8_t *Entry = Buf + B->GlobalDynIndex * Config->Wordsize;
       writeUint(Entry, 1);
       Entry += Config->Wordsize;
       writeUint(Entry, VA - 0x8000);
     }
   }
 }
 
 GotPltSection::GotPltSection()
     : SyntheticSection(SHF_ALLOC | SHF_WRITE, SHT_PROGBITS,
                        Target->GotPltEntrySize, ".got.plt") {}
 
 void GotPltSection::addEntry(SymbolBody &Sym) {
   Sym.GotPltIndex = Target->GotPltHeaderEntriesNum + Entries.size();
   Entries.push_back(&Sym);
 }
 
 size_t GotPltSection::getSize() const {
   return (Target->GotPltHeaderEntriesNum + Entries.size()) *
          Target->GotPltEntrySize;
 }
 
 void GotPltSection::writeTo(uint8_t *Buf) {
   Target->writeGotPltHeader(Buf);
   Buf += Target->GotPltHeaderEntriesNum * Target->GotPltEntrySize;
   for (const SymbolBody *B : Entries) {
     Target->writeGotPlt(Buf, *B);
     Buf += Config->Wordsize;
   }
 }
 
 // On ARM the IgotPltSection is part of the GotSection, on other Targets it is
 // part of the .got.plt
 IgotPltSection::IgotPltSection()
     : SyntheticSection(SHF_ALLOC | SHF_WRITE, SHT_PROGBITS,
                        Target->GotPltEntrySize,
                        Config->EMachine == EM_ARM ? ".got" : ".got.plt") {}
 
 void IgotPltSection::addEntry(SymbolBody &Sym) {
   Sym.IsInIgot = true;
   Sym.GotPltIndex = Entries.size();
   Entries.push_back(&Sym);
 }
 
 size_t IgotPltSection::getSize() const {
   return Entries.size() * Target->GotPltEntrySize;
 }
 
 void IgotPltSection::writeTo(uint8_t *Buf) {
   for (const SymbolBody *B : Entries) {
     Target->writeIgotPlt(Buf, *B);
     Buf += Config->Wordsize;
   }
 }
 
 StringTableSection::StringTableSection(StringRef Name, bool Dynamic)
     : SyntheticSection(Dynamic ? (uint64_t)SHF_ALLOC : 0, SHT_STRTAB, 1, Name),
       Dynamic(Dynamic) {
   // ELF string tables start with a NUL byte.
   addString("");
 }
 
 // Adds a string to the string table. If HashIt is true we hash and check for
 // duplicates. It is optional because the name of global symbols are already
 // uniqued and hashing them again has a big cost for a small value: uniquing
 // them with some other string that happens to be the same.
 unsigned StringTableSection::addString(StringRef S, bool HashIt) {
   if (HashIt) {
     auto R = StringMap.insert(std::make_pair(S, this->Size));
     if (!R.second)
       return R.first->second;
   }
   unsigned Ret = this->Size;
   this->Size = this->Size + S.size() + 1;
   Strings.push_back(S);
   return Ret;
 }
 
 void StringTableSection::writeTo(uint8_t *Buf) {
   for (StringRef S : Strings) {
     memcpy(Buf, S.data(), S.size());
     Buf += S.size() + 1;
   }
 }
 
 // Returns the number of version definition entries. Because the first entry
 // is for the version definition itself, it is the number of versioned symbols
 // plus one. Note that we don't support multiple versions yet.
 static unsigned getVerDefNum() { return Config->VersionDefinitions.size() + 1; }
 
 template <class ELFT>
 DynamicSection<ELFT>::DynamicSection()
     : SyntheticSection(SHF_ALLOC | SHF_WRITE, SHT_DYNAMIC, Config->Wordsize,
                        ".dynamic") {
   this->Entsize = ELFT::Is64Bits ? 16 : 8;
 
   // .dynamic section is not writable on MIPS and on Fuchsia OS
   // which passes -z rodynamic.
   // See "Special Section" in Chapter 4 in the following document:
   // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
   if (Config->EMachine == EM_MIPS || Config->ZRodynamic)
     this->Flags = SHF_ALLOC;
 
   addEntries();
 }
 
 // There are some dynamic entries that don't depend on other sections.
 // Such entries can be set early.
 template <class ELFT> void DynamicSection<ELFT>::addEntries() {
   // Add strings to .dynstr early so that .dynstr's size will be
   // fixed early.
   for (StringRef S : Config->AuxiliaryList)
     add({DT_AUXILIARY, InX::DynStrTab->addString(S)});
   if (!Config->Rpath.empty())
     add({Config->EnableNewDtags ? DT_RUNPATH : DT_RPATH,
          InX::DynStrTab->addString(Config->Rpath)});
   for (SharedFile<ELFT> *F : Symtab<ELFT>::X->getSharedFiles())
     if (F->isNeeded())
       add({DT_NEEDED, InX::DynStrTab->addString(F->SoName)});
   if (!Config->SoName.empty())
     add({DT_SONAME, InX::DynStrTab->addString(Config->SoName)});
 
   // Set DT_FLAGS and DT_FLAGS_1.
   uint32_t DtFlags = 0;
   uint32_t DtFlags1 = 0;
   if (Config->Bsymbolic)
     DtFlags |= DF_SYMBOLIC;
   if (Config->ZNodelete)
     DtFlags1 |= DF_1_NODELETE;
   if (Config->ZNodlopen)
     DtFlags1 |= DF_1_NOOPEN;
   if (Config->ZNow) {
     DtFlags |= DF_BIND_NOW;
     DtFlags1 |= DF_1_NOW;
   }
   if (Config->ZOrigin) {
     DtFlags |= DF_ORIGIN;
     DtFlags1 |= DF_1_ORIGIN;
   }
 
   if (DtFlags)
     add({DT_FLAGS, DtFlags});
   if (DtFlags1)
     add({DT_FLAGS_1, DtFlags1});
 
   // DT_DEBUG is a pointer to debug informaion used by debuggers at runtime. We
   // need it for each process, so we don't write it for DSOs. The loader writes
   // the pointer into this entry.
   //
   // DT_DEBUG is the only .dynamic entry that needs to be written to. Some
   // systems (currently only Fuchsia OS) provide other means to give the
   // debugger this information. Such systems may choose make .dynamic read-only.
   // If the target is such a system (used -z rodynamic) don't write DT_DEBUG.
   if (!Config->Shared && !Config->Relocatable && !Config->ZRodynamic)
     add({DT_DEBUG, (uint64_t)0});
 }
 
 // Add remaining entries to complete .dynamic contents.
 template <class ELFT> void DynamicSection<ELFT>::finalizeContents() {
   if (this->Size)
     return; // Already finalized.
 
   this->Link = InX::DynStrTab->getParent()->SectionIndex;
   if (In<ELFT>::RelaDyn->getParent()->Size > 0) {
     bool IsRela = Config->IsRela;
     add({IsRela ? DT_RELA : DT_REL, In<ELFT>::RelaDyn});
     add({IsRela ? DT_RELASZ : DT_RELSZ, In<ELFT>::RelaDyn->getParent()->Size});
     add({IsRela ? DT_RELAENT : DT_RELENT,
          uint64_t(IsRela ? sizeof(Elf_Rela) : sizeof(Elf_Rel))});
 
     // MIPS dynamic loader does not support RELCOUNT tag.
     // The problem is in the tight relation between dynamic
     // relocations and GOT. So do not emit this tag on MIPS.
     if (Config->EMachine != EM_MIPS) {
       size_t NumRelativeRels = In<ELFT>::RelaDyn->getRelativeRelocCount();
       if (Config->ZCombreloc && NumRelativeRels)
         add({IsRela ? DT_RELACOUNT : DT_RELCOUNT, NumRelativeRels});
     }
   }
   if (In<ELFT>::RelaPlt->getParent()->Size > 0) {
     add({DT_JMPREL, In<ELFT>::RelaPlt});
     add({DT_PLTRELSZ, In<ELFT>::RelaPlt->getParent()->Size});
     add({Config->EMachine == EM_MIPS ? DT_MIPS_PLTGOT : DT_PLTGOT,
          InX::GotPlt});
     add({DT_PLTREL, uint64_t(Config->IsRela ? DT_RELA : DT_REL)});
   }
 
   add({DT_SYMTAB, InX::DynSymTab});
   add({DT_SYMENT, sizeof(Elf_Sym)});
   add({DT_STRTAB, InX::DynStrTab});
   add({DT_STRSZ, InX::DynStrTab->getSize()});
   if (!Config->ZText)
     add({DT_TEXTREL, (uint64_t)0});
   if (InX::GnuHashTab)
     add({DT_GNU_HASH, InX::GnuHashTab});
   if (In<ELFT>::HashTab)
     add({DT_HASH, In<ELFT>::HashTab});
 
   if (Out::PreinitArray) {
     add({DT_PREINIT_ARRAY, Out::PreinitArray});
     add({DT_PREINIT_ARRAYSZ, Out::PreinitArray, Entry::SecSize});
   }
   if (Out::InitArray) {
     add({DT_INIT_ARRAY, Out::InitArray});
     add({DT_INIT_ARRAYSZ, Out::InitArray, Entry::SecSize});
   }
   if (Out::FiniArray) {
     add({DT_FINI_ARRAY, Out::FiniArray});
     add({DT_FINI_ARRAYSZ, Out::FiniArray, Entry::SecSize});
   }
 
   if (SymbolBody *B = Symtab<ELFT>::X->findInCurrentDSO(Config->Init))
     add({DT_INIT, B});
   if (SymbolBody *B = Symtab<ELFT>::X->findInCurrentDSO(Config->Fini))
     add({DT_FINI, B});
 
   bool HasVerNeed = In<ELFT>::VerNeed->getNeedNum() != 0;
   if (HasVerNeed || In<ELFT>::VerDef)
     add({DT_VERSYM, In<ELFT>::VerSym});
   if (In<ELFT>::VerDef) {
     add({DT_VERDEF, In<ELFT>::VerDef});
     add({DT_VERDEFNUM, getVerDefNum()});
   }
   if (HasVerNeed) {
     add({DT_VERNEED, In<ELFT>::VerNeed});
     add({DT_VERNEEDNUM, In<ELFT>::VerNeed->getNeedNum()});
   }
 
   if (Config->EMachine == EM_MIPS) {
     add({DT_MIPS_RLD_VERSION, 1});
     add({DT_MIPS_FLAGS, RHF_NOTPOT});
     add({DT_MIPS_BASE_ADDRESS, Config->ImageBase});
     add({DT_MIPS_SYMTABNO, InX::DynSymTab->getNumSymbols()});
     add({DT_MIPS_LOCAL_GOTNO, InX::MipsGot->getLocalEntriesNum()});
     if (const SymbolBody *B = InX::MipsGot->getFirstGlobalEntry())
       add({DT_MIPS_GOTSYM, B->DynsymIndex});
     else
       add({DT_MIPS_GOTSYM, InX::DynSymTab->getNumSymbols()});
     add({DT_PLTGOT, InX::MipsGot});
     if (InX::MipsRldMap)
       add({DT_MIPS_RLD_MAP, InX::MipsRldMap});
   }
 
   getParent()->Link = this->Link;
 
   // +1 for DT_NULL
   this->Size = (Entries.size() + 1) * this->Entsize;
 }
 
 template <class ELFT> void DynamicSection<ELFT>::writeTo(uint8_t *Buf) {
   auto *P = reinterpret_cast<Elf_Dyn *>(Buf);
 
   for (const Entry &E : Entries) {
     P->d_tag = E.Tag;
     switch (E.Kind) {
     case Entry::SecAddr:
       P->d_un.d_ptr = E.OutSec->Addr;
       break;
     case Entry::InSecAddr:
       P->d_un.d_ptr = E.InSec->getParent()->Addr + E.InSec->OutSecOff;
       break;
     case Entry::SecSize:
       P->d_un.d_val = E.OutSec->Size;
       break;
     case Entry::SymAddr:
       P->d_un.d_ptr = E.Sym->getVA();
       break;
     case Entry::PlainInt:
       P->d_un.d_val = E.Val;
       break;
     }
     ++P;
   }
 }
 
 uint64_t DynamicReloc::getOffset() const {
   return InputSec->getOutputSection()->Addr + InputSec->getOffset(OffsetInSec);
 }
 
 int64_t DynamicReloc::getAddend() const {
   if (UseSymVA)
     return Sym->getVA(Addend);
   return Addend;
 }
 
 uint32_t DynamicReloc::getSymIndex() const {
   if (Sym && !UseSymVA)
     return Sym->DynsymIndex;
   return 0;
 }
 
 template <class ELFT>
 RelocationSection<ELFT>::RelocationSection(StringRef Name, bool Sort)
     : SyntheticSection(SHF_ALLOC, Config->IsRela ? SHT_RELA : SHT_REL,
                        Config->Wordsize, Name),
       Sort(Sort) {
   this->Entsize = Config->IsRela ? sizeof(Elf_Rela) : sizeof(Elf_Rel);
 }
 
 template <class ELFT>
 void RelocationSection<ELFT>::addReloc(const DynamicReloc &Reloc) {
   if (Reloc.Type == Target->RelativeRel)
     ++NumRelativeRelocs;
   Relocs.push_back(Reloc);
 }
 
 template <class ELFT, class RelTy>
 static bool compRelocations(const RelTy &A, const RelTy &B) {
   bool AIsRel = A.getType(Config->IsMips64EL) == Target->RelativeRel;
   bool BIsRel = B.getType(Config->IsMips64EL) == Target->RelativeRel;
   if (AIsRel != BIsRel)
     return AIsRel;
 
   return A.getSymbol(Config->IsMips64EL) < B.getSymbol(Config->IsMips64EL);
 }
 
 template <class ELFT> void RelocationSection<ELFT>::writeTo(uint8_t *Buf) {
   uint8_t *BufBegin = Buf;
   for (const DynamicReloc &Rel : Relocs) {
     auto *P = reinterpret_cast<Elf_Rela *>(Buf);
     Buf += Config->IsRela ? sizeof(Elf_Rela) : sizeof(Elf_Rel);
 
     if (Config->IsRela)
       P->r_addend = Rel.getAddend();
     P->r_offset = Rel.getOffset();
     if (Config->EMachine == EM_MIPS && Rel.getInputSec() == InX::MipsGot)
       // Dynamic relocation against MIPS GOT section make deal TLS entries
       // allocated in the end of the GOT. We need to adjust the offset to take
       // in account 'local' and 'global' GOT entries.
       P->r_offset += InX::MipsGot->getTlsOffset();
     P->setSymbolAndType(Rel.getSymIndex(), Rel.Type, Config->IsMips64EL);
   }
 
   if (Sort) {
     if (Config->IsRela)
       std::stable_sort((Elf_Rela *)BufBegin,
                        (Elf_Rela *)BufBegin + Relocs.size(),
                        compRelocations<ELFT, Elf_Rela>);
     else
       std::stable_sort((Elf_Rel *)BufBegin, (Elf_Rel *)BufBegin + Relocs.size(),
                        compRelocations<ELFT, Elf_Rel>);
   }
 }
 
 template <class ELFT> unsigned RelocationSection<ELFT>::getRelocOffset() {
   return this->Entsize * Relocs.size();
 }
 
 template <class ELFT> void RelocationSection<ELFT>::finalizeContents() {
   this->Link = InX::DynSymTab ? InX::DynSymTab->getParent()->SectionIndex
                               : InX::SymTab->getParent()->SectionIndex;
 
   // Set required output section properties.
   getParent()->Link = this->Link;
 }
 
 SymbolTableBaseSection::SymbolTableBaseSection(StringTableSection &StrTabSec)
     : SyntheticSection(StrTabSec.isDynamic() ? (uint64_t)SHF_ALLOC : 0,
                        StrTabSec.isDynamic() ? SHT_DYNSYM : SHT_SYMTAB,
                        Config->Wordsize,
                        StrTabSec.isDynamic() ? ".dynsym" : ".symtab"),
       StrTabSec(StrTabSec) {}
 
 // Orders symbols according to their positions in the GOT,
 // in compliance with MIPS ABI rules.
 // See "Global Offset Table" in Chapter 5 in the following document
 // for detailed description:
 // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
 static bool sortMipsSymbols(const SymbolTableEntry &L,
                             const SymbolTableEntry &R) {
   // Sort entries related to non-local preemptible symbols by GOT indexes.
   // All other entries go to the first part of GOT in arbitrary order.
   bool LIsInLocalGot = !L.Symbol->IsInGlobalMipsGot;
   bool RIsInLocalGot = !R.Symbol->IsInGlobalMipsGot;
   if (LIsInLocalGot || RIsInLocalGot)
     return !RIsInLocalGot;
   return L.Symbol->GotIndex < R.Symbol->GotIndex;
 }
 
 // Finalize a symbol table. The ELF spec requires that all local
 // symbols precede global symbols, so we sort symbol entries in this
 // function. (For .dynsym, we don't do that because symbols for
 // dynamic linking are inherently all globals.)
 void SymbolTableBaseSection::finalizeContents() {
   getParent()->Link = StrTabSec.getParent()->SectionIndex;
 
   // If it is a .dynsym, there should be no local symbols, but we need
   // to do a few things for the dynamic linker.
   if (this->Type == SHT_DYNSYM) {
     // Section's Info field has the index of the first non-local symbol.
     // Because the first symbol entry is a null entry, 1 is the first.
     getParent()->Info = 1;
 
     if (InX::GnuHashTab) {
       // NB: It also sorts Symbols to meet the GNU hash table requirements.
       InX::GnuHashTab->addSymbols(Symbols);
     } else if (Config->EMachine == EM_MIPS) {
       std::stable_sort(Symbols.begin(), Symbols.end(), sortMipsSymbols);
     }
 
     size_t I = 0;
     for (const SymbolTableEntry &S : Symbols)
       S.Symbol->DynsymIndex = ++I;
     return;
   }
 }
 
 void SymbolTableBaseSection::postThunkContents() {
   if (this->Type == SHT_DYNSYM)
     return;
   // move all local symbols before global symbols.
   auto It = std::stable_partition(
       Symbols.begin(), Symbols.end(), [](const SymbolTableEntry &S) {
         return S.Symbol->isLocal() ||
                S.Symbol->symbol()->computeBinding() == STB_LOCAL;
       });
   size_t NumLocals = It - Symbols.begin();
   getParent()->Info = NumLocals + 1;
 }
 
 void SymbolTableBaseSection::addSymbol(SymbolBody *B) {
   // Adding a local symbol to a .dynsym is a bug.
   assert(this->Type != SHT_DYNSYM || !B->isLocal());
 
   bool HashIt = B->isLocal();
   Symbols.push_back({B, StrTabSec.addString(B->getName(), HashIt)});
 }
 
 size_t SymbolTableBaseSection::getSymbolIndex(SymbolBody *Body) {
   auto I = llvm::find_if(Symbols, [&](const SymbolTableEntry &E) {
     if (E.Symbol == Body)
       return true;
     // This is used for -r, so we have to handle multiple section
     // symbols being combined.
     if (Body->Type == STT_SECTION && E.Symbol->Type == STT_SECTION)
       return Body->getOutputSection() == E.Symbol->getOutputSection();
     return false;
   });
   if (I == Symbols.end())
     return 0;
   return I - Symbols.begin() + 1;
 }
 
 template <class ELFT>
 SymbolTableSection<ELFT>::SymbolTableSection(StringTableSection &StrTabSec)
     : SymbolTableBaseSection(StrTabSec) {
   this->Entsize = sizeof(Elf_Sym);
 }
 
 // Write the internal symbol table contents to the output symbol table.
 template <class ELFT> void SymbolTableSection<ELFT>::writeTo(uint8_t *Buf) {
   // The first entry is a null entry as per the ELF spec.
   Buf += sizeof(Elf_Sym);
 
   auto *ESym = reinterpret_cast<Elf_Sym *>(Buf);
 
   for (SymbolTableEntry &Ent : Symbols) {
     SymbolBody *Body = Ent.Symbol;
 
     // Set st_info and st_other.
     if (Body->isLocal()) {
       ESym->setBindingAndType(STB_LOCAL, Body->Type);
     } else {
       ESym->setBindingAndType(Body->symbol()->computeBinding(), Body->Type);
       ESym->setVisibility(Body->symbol()->Visibility);
     }
 
     ESym->st_name = Ent.StrTabOffset;
     ESym->st_size = Body->getSize<ELFT>();
 
     // Set a section index.
     if (const OutputSection *OutSec = Body->getOutputSection())
       ESym->st_shndx = OutSec->SectionIndex;
     else if (isa<DefinedRegular>(Body))
       ESym->st_shndx = SHN_ABS;
     else if (isa<DefinedCommon>(Body))
       ESym->st_shndx = SHN_COMMON;
 
     // st_value is usually an address of a symbol, but that has a
     // special meaining for uninstantiated common symbols (this can
     // occur if -r is given).
     if (!Config->DefineCommon && isa<DefinedCommon>(Body))
       ESym->st_value = cast<DefinedCommon>(Body)->Alignment;
     else
       ESym->st_value = Body->getVA();
 
     ++ESym;
   }
 
   // On MIPS we need to mark symbol which has a PLT entry and requires
   // pointer equality by STO_MIPS_PLT flag. That is necessary to help
   // dynamic linker distinguish such symbols and MIPS lazy-binding stubs.
   // https://sourceware.org/ml/binutils/2008-07/txt00000.txt
   if (Config->EMachine == EM_MIPS) {
     auto *ESym = reinterpret_cast<Elf_Sym *>(Buf);
 
     for (SymbolTableEntry &Ent : Symbols) {
       SymbolBody *Body = Ent.Symbol;
       if (Body->isInPlt() && Body->NeedsPltAddr)
         ESym->st_other |= STO_MIPS_PLT;
 
       if (Config->Relocatable)
         if (auto *D = dyn_cast<DefinedRegular>(Body))
           if (D->isMipsPIC<ELFT>())
             ESym->st_other |= STO_MIPS_PIC;
       ++ESym;
     }
   }
 }
 
 // .hash and .gnu.hash sections contain on-disk hash tables that map
 // symbol names to their dynamic symbol table indices. Their purpose
 // is to help the dynamic linker resolve symbols quickly. If ELF files
 // don't have them, the dynamic linker has to do linear search on all
 // dynamic symbols, which makes programs slower. Therefore, a .hash
 // section is added to a DSO by default. A .gnu.hash is added if you
 // give the -hash-style=gnu or -hash-style=both option.
 //
 // The Unix semantics of resolving dynamic symbols is somewhat expensive.
 // Each ELF file has a list of DSOs that the ELF file depends on and a
 // list of dynamic symbols that need to be resolved from any of the
 // DSOs. That means resolving all dynamic symbols takes O(m)*O(n)
 // where m is the number of DSOs and n is the number of dynamic
 // symbols. For modern large programs, both m and n are large.  So
 // making each step faster by using hash tables substiantially
 // improves time to load programs.
 //
 // (Note that this is not the only way to design the shared library.
 // For instance, the Windows DLL takes a different approach. On
 // Windows, each dynamic symbol has a name of DLL from which the symbol
 // has to be resolved. That makes the cost of symbol resolution O(n).
 // This disables some hacky techniques you can use on Unix such as
 // LD_PRELOAD, but this is arguably better semantics than the Unix ones.)
 //
 // Due to historical reasons, we have two different hash tables, .hash
 // and .gnu.hash. They are for the same purpose, and .gnu.hash is a new
 // and better version of .hash. .hash is just an on-disk hash table, but
 // .gnu.hash has a bloom filter in addition to a hash table to skip
 // DSOs very quickly. If you are sure that your dynamic linker knows
 // about .gnu.hash, you want to specify -hash-style=gnu. Otherwise, a
 // safe bet is to specify -hash-style=both for backward compatibilty.
 GnuHashTableSection::GnuHashTableSection()
     : SyntheticSection(SHF_ALLOC, SHT_GNU_HASH, Config->Wordsize, ".gnu.hash") {
 }
 
 void GnuHashTableSection::finalizeContents() {
   getParent()->Link = InX::DynSymTab->getParent()->SectionIndex;
 
   // Computes bloom filter size in word size. We want to allocate 8
   // bits for each symbol. It must be a power of two.
   if (Symbols.empty())
     MaskWords = 1;
   else
     MaskWords = NextPowerOf2((Symbols.size() - 1) / Config->Wordsize);
 
   Size = 16;                            // Header
   Size += Config->Wordsize * MaskWords; // Bloom filter
   Size += NBuckets * 4;                 // Hash buckets
   Size += Symbols.size() * 4;           // Hash values
 }
 
 void GnuHashTableSection::writeTo(uint8_t *Buf) {
   // Write a header.
   write32(Buf, NBuckets, Config->Endianness);
   write32(Buf + 4, InX::DynSymTab->getNumSymbols() - Symbols.size(),
           Config->Endianness);
   write32(Buf + 8, MaskWords, Config->Endianness);
   write32(Buf + 12, getShift2(), Config->Endianness);
   Buf += 16;
 
   // Write a bloom filter and a hash table.
   writeBloomFilter(Buf);
   Buf += Config->Wordsize * MaskWords;
   writeHashTable(Buf);
 }
 
 // This function writes a 2-bit bloom filter. This bloom filter alone
 // usually filters out 80% or more of all symbol lookups [1].
 // The dynamic linker uses the hash table only when a symbol is not
 // filtered out by a bloom filter.
 //
 // [1] Ulrich Drepper (2011), "How To Write Shared Libraries" (Ver. 4.1.2),
 //     p.9, https://www.akkadia.org/drepper/dsohowto.pdf
 void GnuHashTableSection::writeBloomFilter(uint8_t *Buf) {
   const unsigned C = Config->Wordsize * 8;
   for (const Entry &Sym : Symbols) {
     size_t I = (Sym.Hash / C) & (MaskWords - 1);
     uint64_t Val = readUint(Buf + I * Config->Wordsize);
     Val |= uint64_t(1) << (Sym.Hash % C);
     Val |= uint64_t(1) << ((Sym.Hash >> getShift2()) % C);
     writeUint(Buf + I * Config->Wordsize, Val);
   }
 }
 
 void GnuHashTableSection::writeHashTable(uint8_t *Buf) {
   // Group symbols by hash value.
   std::vector<std::vector<Entry>> Syms(NBuckets);
   for (const Entry &Ent : Symbols)
     Syms[Ent.Hash % NBuckets].push_back(Ent);
 
   // Write hash buckets. Hash buckets contain indices in the following
   // hash value table.
   uint32_t *Buckets = reinterpret_cast<uint32_t *>(Buf);
   for (size_t I = 0; I < NBuckets; ++I)
     if (!Syms[I].empty())
       write32(Buckets + I, Syms[I][0].Body->DynsymIndex, Config->Endianness);
 
   // Write a hash value table. It represents a sequence of chains that
   // share the same hash modulo value. The last element of each chain
   // is terminated by LSB 1.
   uint32_t *Values = Buckets + NBuckets;
   size_t I = 0;
   for (std::vector<Entry> &Vec : Syms) {
     if (Vec.empty())
       continue;
     for (const Entry &Ent : makeArrayRef(Vec).drop_back())
       write32(Values + I++, Ent.Hash & ~1, Config->Endianness);
     write32(Values + I++, Vec.back().Hash | 1, Config->Endianness);
   }
 }
 
 static uint32_t hashGnu(StringRef Name) {
   uint32_t H = 5381;
   for (uint8_t C : Name)
     H = (H << 5) + H + C;
   return H;
 }
 
 // Returns a number of hash buckets to accomodate given number of elements.
 // We want to choose a moderate number that is not too small (which
 // causes too many hash collisions) and not too large (which wastes
 // disk space.)
 //
 // We return a prime number because it (is believed to) achieve good
 // hash distribution.
 static size_t getBucketSize(size_t NumSymbols) {
   // List of largest prime numbers that are not greater than 2^n + 1.
   for (size_t N : {131071, 65521, 32749, 16381, 8191, 4093, 2039, 1021, 509,
                    251, 127, 61, 31, 13, 7, 3, 1})
     if (N <= NumSymbols)
       return N;
   return 0;
 }
 
 // Add symbols to this symbol hash table. Note that this function
 // destructively sort a given vector -- which is needed because
 // GNU-style hash table places some sorting requirements.
 void GnuHashTableSection::addSymbols(std::vector<SymbolTableEntry> &V) {
   // We cannot use 'auto' for Mid because GCC 6.1 cannot deduce
   // its type correctly.
   std::vector<SymbolTableEntry>::iterator Mid =
       std::stable_partition(V.begin(), V.end(), [](const SymbolTableEntry &S) {
         return S.Symbol->isUndefined();
       });
   if (Mid == V.end())
     return;
 
   for (SymbolTableEntry &Ent : llvm::make_range(Mid, V.end())) {
     SymbolBody *B = Ent.Symbol;
     Symbols.push_back({B, Ent.StrTabOffset, hashGnu(B->getName())});
   }
 
   NBuckets = getBucketSize(Symbols.size());
   std::stable_sort(Symbols.begin(), Symbols.end(),
                    [&](const Entry &L, const Entry &R) {
                      return L.Hash % NBuckets < R.Hash % NBuckets;
                    });
 
   V.erase(Mid, V.end());
   for (const Entry &Ent : Symbols)
     V.push_back({Ent.Body, Ent.StrTabOffset});
 }
 
 template <class ELFT>
 HashTableSection<ELFT>::HashTableSection()
     : SyntheticSection(SHF_ALLOC, SHT_HASH, 4, ".hash") {
   this->Entsize = 4;
 }
 
 template <class ELFT> void HashTableSection<ELFT>::finalizeContents() {
   getParent()->Link = InX::DynSymTab->getParent()->SectionIndex;
 
   unsigned NumEntries = 2;                            // nbucket and nchain.
   NumEntries += InX::DynSymTab->getNumSymbols(); // The chain entries.
 
   // Create as many buckets as there are symbols.
   // FIXME: This is simplistic. We can try to optimize it, but implementing
   // support for SHT_GNU_HASH is probably even more profitable.
   NumEntries += InX::DynSymTab->getNumSymbols();
   this->Size = NumEntries * 4;
 }
 
 template <class ELFT> void HashTableSection<ELFT>::writeTo(uint8_t *Buf) {
   // A 32-bit integer type in the target endianness.
   typedef typename ELFT::Word Elf_Word;
 
   unsigned NumSymbols = InX::DynSymTab->getNumSymbols();
 
   auto *P = reinterpret_cast<Elf_Word *>(Buf);
   *P++ = NumSymbols; // nbucket
   *P++ = NumSymbols; // nchain
 
   Elf_Word *Buckets = P;
   Elf_Word *Chains = P + NumSymbols;
 
   for (const SymbolTableEntry &S : InX::DynSymTab->getSymbols()) {
     SymbolBody *Body = S.Symbol;
     StringRef Name = Body->getName();
     unsigned I = Body->DynsymIndex;
     uint32_t Hash = hashSysV(Name) % NumSymbols;
     Chains[I] = Buckets[Hash];
     Buckets[Hash] = I;
   }
 }
 
 PltSection::PltSection(size_t S)
     : SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS, 16, ".plt"),
       HeaderSize(S) {}
 
 void PltSection::writeTo(uint8_t *Buf) {
   // At beginning of PLT but not the IPLT, we have code to call the dynamic
   // linker to resolve dynsyms at runtime. Write such code.
   if (HeaderSize != 0)
     Target->writePltHeader(Buf);
   size_t Off = HeaderSize;
   // The IPlt is immediately after the Plt, account for this in RelOff
   unsigned PltOff = getPltRelocOff();
 
   for (auto &I : Entries) {
     const SymbolBody *B = I.first;
     unsigned RelOff = I.second + PltOff;
     uint64_t Got = B->getGotPltVA();
     uint64_t Plt = this->getVA() + Off;
     Target->writePlt(Buf + Off, Got, Plt, B->PltIndex, RelOff);
     Off += Target->PltEntrySize;
   }
 }
 
 template <class ELFT> void PltSection::addEntry(SymbolBody &Sym) {
   Sym.PltIndex = Entries.size();
   RelocationSection<ELFT> *PltRelocSection = In<ELFT>::RelaPlt;
   if (HeaderSize == 0) {
     PltRelocSection = In<ELFT>::RelaIplt;
     Sym.IsInIplt = true;
   }
   unsigned RelOff = PltRelocSection->getRelocOffset();
   Entries.push_back(std::make_pair(&Sym, RelOff));
 }
 
 size_t PltSection::getSize() const {
   return HeaderSize + Entries.size() * Target->PltEntrySize;
 }
 
 // Some architectures such as additional symbols in the PLT section. For
 // example ARM uses mapping symbols to aid disassembly
 void PltSection::addSymbols() {
   // The PLT may have symbols defined for the Header, the IPLT has no header
   if (HeaderSize != 0)
     Target->addPltHeaderSymbols(this);
   size_t Off = HeaderSize;
   for (size_t I = 0; I < Entries.size(); ++I) {
     Target->addPltSymbols(this, Off);
     Off += Target->PltEntrySize;
   }
 }
 
 unsigned PltSection::getPltRelocOff() const {
   return (HeaderSize == 0) ? InX::Plt->getSize() : 0;
 }
 
 GdbIndexSection::GdbIndexSection()
     : SyntheticSection(0, SHT_PROGBITS, 1, ".gdb_index"),
       StringPool(llvm::StringTableBuilder::ELF) {}
 
 // Iterative hash function for symbol's name is described in .gdb_index format
 // specification. Note that we use one for version 5 to 7 here, it is different
 // for version 4.
 static uint32_t hash(StringRef Str) {
   uint32_t R = 0;
   for (uint8_t C : Str)
     R = R * 67 + tolower(C) - 113;
   return R;
 }
 
 static std::vector<CompilationUnitEntry> readCuList(DWARFContext &Dwarf,
                                                     InputSection *Sec) {
   std::vector<CompilationUnitEntry> Ret;
   for (std::unique_ptr<DWARFCompileUnit> &CU : Dwarf.compile_units())
     Ret.push_back({Sec->OutSecOff + CU->getOffset(), CU->getLength() + 4});
   return Ret;
 }
 
 static std::vector<AddressEntry> readAddressArea(DWARFContext &Dwarf,
                                                  InputSection *Sec) {
   std::vector<AddressEntry> Ret;
 
   uint32_t CurrentCu = 0;
   for (std::unique_ptr<DWARFCompileUnit> &CU : Dwarf.compile_units()) {
     DWARFAddressRangesVector Ranges;
     CU->collectAddressRanges(Ranges);
 
     ArrayRef<InputSectionBase *> Sections = Sec->File->getSections();
     for (DWARFAddressRange &R : Ranges) {
       InputSectionBase *S = Sections[R.SectionIndex];
       if (!S || S == &InputSection::Discarded || !S->Live)
         continue;
       // Range list with zero size has no effect.
       if (R.LowPC == R.HighPC)
         continue;
       Ret.push_back({cast<InputSection>(S), R.LowPC, R.HighPC, CurrentCu});
     }
     ++CurrentCu;
   }
   return Ret;
 }
 
 static std::vector<NameTypeEntry> readPubNamesAndTypes(DWARFContext &Dwarf,
                                                        bool IsLE) {
   StringRef Data[] = {Dwarf.getGnuPubNamesSection(),
                       Dwarf.getGnuPubTypesSection()};
 
   std::vector<NameTypeEntry> Ret;
   for (StringRef D : Data) {
     DWARFDebugPubTable PubTable(D, IsLE, true);
     for (const DWARFDebugPubTable::Set &Set : PubTable.getData())
       for (const DWARFDebugPubTable::Entry &Ent : Set.Entries)
         Ret.push_back({Ent.Name, Ent.Descriptor.toBits()});
   }
   return Ret;
 }
 
 static std::vector<InputSection *> getDebugInfoSections() {
   std::vector<InputSection *> Ret;
   for (InputSectionBase *S : InputSections)
     if (InputSection *IS = dyn_cast<InputSection>(S))
       if (IS->getParent() && IS->Name == ".debug_info")
         Ret.push_back(IS);
   return Ret;
 }
 
 void GdbIndexSection::buildIndex() {
   std::vector<InputSection *> V = getDebugInfoSections();
   if (V.empty())
     return;
 
   for (InputSection *Sec : V)
     Chunks.push_back(readDwarf(Sec));
 
   uint32_t CuId = 0;
   for (GdbIndexChunk &D : Chunks) {
     for (AddressEntry &E : D.AddressArea)
       E.CuIndex += CuId;
 
     // Populate constant pool area.
     for (NameTypeEntry &NameType : D.NamesAndTypes) {
       uint32_t Hash = hash(NameType.Name);
       size_t Offset = StringPool.add(NameType.Name);
 
       bool IsNew;
       GdbSymbol *Sym;
       std::tie(IsNew, Sym) = SymbolTable.add(Hash, Offset);
       if (IsNew) {
         Sym->CuVectorIndex = CuVectors.size();
         CuVectors.resize(CuVectors.size() + 1);
       }
 
       CuVectors[Sym->CuVectorIndex].insert(CuId | (NameType.Type << 24));
     }
 
     CuId += D.CompilationUnits.size();
   }
 }
 
 GdbIndexChunk GdbIndexSection::readDwarf(InputSection *Sec) {
   Expected<std::unique_ptr<object::ObjectFile>> Obj =
       object::ObjectFile::createObjectFile(Sec->File->MB);
   if (!Obj) {
     error(toString(Sec->File) + ": error creating DWARF context");
     return {};
   }
 
   DWARFContextInMemory Dwarf(*Obj.get());
 
   GdbIndexChunk Ret;
   Ret.CompilationUnits = readCuList(Dwarf, Sec);
   Ret.AddressArea = readAddressArea(Dwarf, Sec);
   Ret.NamesAndTypes = readPubNamesAndTypes(Dwarf, Config->IsLE);
   return Ret;
 }
 
 static size_t getCuSize(std::vector<GdbIndexChunk> &C) {
   size_t Ret = 0;
   for (GdbIndexChunk &D : C)
     Ret += D.CompilationUnits.size();
   return Ret;
 }
 
 static size_t getAddressAreaSize(std::vector<GdbIndexChunk> &C) {
   size_t Ret = 0;
   for (GdbIndexChunk &D : C)
     Ret += D.AddressArea.size();
   return Ret;
 }
 
 void GdbIndexSection::finalizeContents() {
   if (Finalized)
     return;
   Finalized = true;
 
   buildIndex();
 
   SymbolTable.finalizeContents();
 
   // GdbIndex header consist from version fields
   // and 5 more fields with different kinds of offsets.
   CuTypesOffset = CuListOffset + getCuSize(Chunks) * CompilationUnitSize;
   SymTabOffset = CuTypesOffset + getAddressAreaSize(Chunks) * AddressEntrySize;
 
   ConstantPoolOffset =
       SymTabOffset + SymbolTable.getCapacity() * SymTabEntrySize;
 
   for (std::set<uint32_t> &CuVec : CuVectors) {
     CuVectorsOffset.push_back(CuVectorsSize);
     CuVectorsSize += OffsetTypeSize * (CuVec.size() + 1);
   }
   StringPoolOffset = ConstantPoolOffset + CuVectorsSize;
 
   StringPool.finalizeInOrder();
 }
 
 size_t GdbIndexSection::getSize() const {
   const_cast<GdbIndexSection *>(this)->finalizeContents();
   return StringPoolOffset + StringPool.getSize();
 }
 
 void GdbIndexSection::writeTo(uint8_t *Buf) {
   write32le(Buf, 7);                       // Write version.
   write32le(Buf + 4, CuListOffset);        // CU list offset.
   write32le(Buf + 8, CuTypesOffset);       // Types CU list offset.
   write32le(Buf + 12, CuTypesOffset);      // Address area offset.
   write32le(Buf + 16, SymTabOffset);       // Symbol table offset.
   write32le(Buf + 20, ConstantPoolOffset); // Constant pool offset.
   Buf += 24;
 
   // Write the CU list.
   for (GdbIndexChunk &D : Chunks) {
     for (CompilationUnitEntry &Cu : D.CompilationUnits) {
       write64le(Buf, Cu.CuOffset);
       write64le(Buf + 8, Cu.CuLength);
       Buf += 16;
     }
   }
 
   // Write the address area.
   for (GdbIndexChunk &D : Chunks) {
     for (AddressEntry &E : D.AddressArea) {
       uint64_t BaseAddr =
           E.Section->getParent()->Addr + E.Section->getOffset(0);
       write64le(Buf, BaseAddr + E.LowAddress);
       write64le(Buf + 8, BaseAddr + E.HighAddress);
       write32le(Buf + 16, E.CuIndex);
       Buf += 20;
     }
   }
 
   // Write the symbol table.
   for (size_t I = 0; I < SymbolTable.getCapacity(); ++I) {
     GdbSymbol *Sym = SymbolTable.getSymbol(I);
     if (Sym) {
       size_t NameOffset =
           Sym->NameOffset + StringPoolOffset - ConstantPoolOffset;
       size_t CuVectorOffset = CuVectorsOffset[Sym->CuVectorIndex];
       write32le(Buf, NameOffset);
       write32le(Buf + 4, CuVectorOffset);
     }
     Buf += 8;
   }
 
   // Write the CU vectors into the constant pool.
   for (std::set<uint32_t> &CuVec : CuVectors) {
     write32le(Buf, CuVec.size());
     Buf += 4;
     for (uint32_t Val : CuVec) {
       write32le(Buf, Val);
       Buf += 4;
     }
   }
 
   StringPool.write(Buf);
 }
 
 bool GdbIndexSection::empty() const {
   return !Out::DebugInfo;
 }
 
 template <class ELFT>
 EhFrameHeader<ELFT>::EhFrameHeader()
     : SyntheticSection(SHF_ALLOC, SHT_PROGBITS, 1, ".eh_frame_hdr") {}
 
 // .eh_frame_hdr contains a binary search table of pointers to FDEs.
 // Each entry of the search table consists of two values,
 // the starting PC from where FDEs covers, and the FDE's address.
 // It is sorted by PC.
 template <class ELFT> void EhFrameHeader<ELFT>::writeTo(uint8_t *Buf) {
   const endianness E = ELFT::TargetEndianness;
 
   // Sort the FDE list by their PC and uniqueify. Usually there is only
   // one FDE for a PC (i.e. function), but if ICF merges two functions
   // into one, there can be more than one FDEs pointing to the address.
   auto Less = [](const FdeData &A, const FdeData &B) { return A.Pc < B.Pc; };
   std::stable_sort(Fdes.begin(), Fdes.end(), Less);
   auto Eq = [](const FdeData &A, const FdeData &B) { return A.Pc == B.Pc; };
   Fdes.erase(std::unique(Fdes.begin(), Fdes.end(), Eq), Fdes.end());
 
   Buf[0] = 1;
   Buf[1] = DW_EH_PE_pcrel | DW_EH_PE_sdata4;
   Buf[2] = DW_EH_PE_udata4;
   Buf[3] = DW_EH_PE_datarel | DW_EH_PE_sdata4;
   write32<E>(Buf + 4, In<ELFT>::EhFrame->getParent()->Addr - this->getVA() - 4);
   write32<E>(Buf + 8, Fdes.size());
   Buf += 12;
 
   uint64_t VA = this->getVA();
   for (FdeData &Fde : Fdes) {
     write32<E>(Buf, Fde.Pc - VA);
     write32<E>(Buf + 4, Fde.FdeVA - VA);
     Buf += 8;
   }
 }
 
 template <class ELFT> size_t EhFrameHeader<ELFT>::getSize() const {
   // .eh_frame_hdr has a 12 bytes header followed by an array of FDEs.
   return 12 + In<ELFT>::EhFrame->NumFdes * 8;
 }
 
 template <class ELFT>
 void EhFrameHeader<ELFT>::addFde(uint32_t Pc, uint32_t FdeVA) {
   Fdes.push_back({Pc, FdeVA});
 }
 
 template <class ELFT> bool EhFrameHeader<ELFT>::empty() const {
   return In<ELFT>::EhFrame->empty();
 }
 
 template <class ELFT>
 VersionDefinitionSection<ELFT>::VersionDefinitionSection()
     : SyntheticSection(SHF_ALLOC, SHT_GNU_verdef, sizeof(uint32_t),
                        ".gnu.version_d") {}
 
 static StringRef getFileDefName() {
   if (!Config->SoName.empty())
     return Config->SoName;
   return Config->OutputFile;
 }
 
 template <class ELFT> void VersionDefinitionSection<ELFT>::finalizeContents() {
   FileDefNameOff = InX::DynStrTab->addString(getFileDefName());
   for (VersionDefinition &V : Config->VersionDefinitions)
     V.NameOff = InX::DynStrTab->addString(V.Name);
 
   getParent()->Link = InX::DynStrTab->getParent()->SectionIndex;
 
   // sh_info should be set to the number of definitions. This fact is missed in
   // documentation, but confirmed by binutils community:
   // https://sourceware.org/ml/binutils/2014-11/msg00355.html
   getParent()->Info = getVerDefNum();
 }
 
 template <class ELFT>
 void VersionDefinitionSection<ELFT>::writeOne(uint8_t *Buf, uint32_t Index,
                                               StringRef Name, size_t NameOff) {
   auto *Verdef = reinterpret_cast<Elf_Verdef *>(Buf);
   Verdef->vd_version = 1;
   Verdef->vd_cnt = 1;
   Verdef->vd_aux = sizeof(Elf_Verdef);
   Verdef->vd_next = sizeof(Elf_Verdef) + sizeof(Elf_Verdaux);
   Verdef->vd_flags = (Index == 1 ? VER_FLG_BASE : 0);
   Verdef->vd_ndx = Index;
   Verdef->vd_hash = hashSysV(Name);
 
   auto *Verdaux = reinterpret_cast<Elf_Verdaux *>(Buf + sizeof(Elf_Verdef));
   Verdaux->vda_name = NameOff;
   Verdaux->vda_next = 0;
 }
 
 template <class ELFT>
 void VersionDefinitionSection<ELFT>::writeTo(uint8_t *Buf) {
   writeOne(Buf, 1, getFileDefName(), FileDefNameOff);
 
   for (VersionDefinition &V : Config->VersionDefinitions) {
     Buf += sizeof(Elf_Verdef) + sizeof(Elf_Verdaux);
     writeOne(Buf, V.Id, V.Name, V.NameOff);
   }
 
   // Need to terminate the last version definition.
   Elf_Verdef *Verdef = reinterpret_cast<Elf_Verdef *>(Buf);
   Verdef->vd_next = 0;
 }
 
 template <class ELFT> size_t VersionDefinitionSection<ELFT>::getSize() const {
   return (sizeof(Elf_Verdef) + sizeof(Elf_Verdaux)) * getVerDefNum();
 }
 
 template <class ELFT>
 VersionTableSection<ELFT>::VersionTableSection()
     : SyntheticSection(SHF_ALLOC, SHT_GNU_versym, sizeof(uint16_t),
                        ".gnu.version") {
   this->Entsize = sizeof(Elf_Versym);
 }
 
 template <class ELFT> void VersionTableSection<ELFT>::finalizeContents() {
   // At the moment of june 2016 GNU docs does not mention that sh_link field
   // should be set, but Sun docs do. Also readelf relies on this field.
   getParent()->Link = InX::DynSymTab->getParent()->SectionIndex;
 }
 
 template <class ELFT> size_t VersionTableSection<ELFT>::getSize() const {
   return sizeof(Elf_Versym) * (InX::DynSymTab->getSymbols().size() + 1);
 }
 
 template <class ELFT> void VersionTableSection<ELFT>::writeTo(uint8_t *Buf) {
   auto *OutVersym = reinterpret_cast<Elf_Versym *>(Buf) + 1;
   for (const SymbolTableEntry &S : InX::DynSymTab->getSymbols()) {
     OutVersym->vs_index = S.Symbol->symbol()->VersionId;
     ++OutVersym;
   }
 }
 
 template <class ELFT> bool VersionTableSection<ELFT>::empty() const {
   return !In<ELFT>::VerDef && In<ELFT>::VerNeed->empty();
 }
 
 template <class ELFT>
 VersionNeedSection<ELFT>::VersionNeedSection()
     : SyntheticSection(SHF_ALLOC, SHT_GNU_verneed, sizeof(uint32_t),
                        ".gnu.version_r") {
   // Identifiers in verneed section start at 2 because 0 and 1 are reserved
   // for VER_NDX_LOCAL and VER_NDX_GLOBAL.
   // First identifiers are reserved by verdef section if it exist.
   NextIndex = getVerDefNum() + 1;
 }
 
 template <class ELFT>
 void VersionNeedSection<ELFT>::addSymbol(SharedSymbol *SS) {
   auto *Ver = reinterpret_cast<const typename ELFT::Verdef *>(SS->Verdef);
   if (!Ver) {
     SS->symbol()->VersionId = VER_NDX_GLOBAL;
     return;
   }
 
   auto *File = cast<SharedFile<ELFT>>(SS->File);
 
   // If we don't already know that we need an Elf_Verneed for this DSO, prepare
   // to create one by adding it to our needed list and creating a dynstr entry
   // for the soname.
   if (File->VerdefMap.empty())
     Needed.push_back({File, InX::DynStrTab->addString(File->SoName)});
   typename SharedFile<ELFT>::NeededVer &NV = File->VerdefMap[Ver];
   // If we don't already know that we need an Elf_Vernaux for this Elf_Verdef,
   // prepare to create one by allocating a version identifier and creating a
   // dynstr entry for the version name.
   if (NV.Index == 0) {
     NV.StrTab = InX::DynStrTab->addString(File->getStringTable().data() +
                                           Ver->getAux()->vda_name);
     NV.Index = NextIndex++;
   }
   SS->symbol()->VersionId = NV.Index;
 }
 
 template <class ELFT> void VersionNeedSection<ELFT>::writeTo(uint8_t *Buf) {
   // The Elf_Verneeds need to appear first, followed by the Elf_Vernauxs.
   auto *Verneed = reinterpret_cast<Elf_Verneed *>(Buf);
   auto *Vernaux = reinterpret_cast<Elf_Vernaux *>(Verneed + Needed.size());
 
   for (std::pair<SharedFile<ELFT> *, size_t> &P : Needed) {
     // Create an Elf_Verneed for this DSO.
     Verneed->vn_version = 1;
     Verneed->vn_cnt = P.first->VerdefMap.size();
     Verneed->vn_file = P.second;
     Verneed->vn_aux =
         reinterpret_cast<char *>(Vernaux) - reinterpret_cast<char *>(Verneed);
     Verneed->vn_next = sizeof(Elf_Verneed);
     ++Verneed;
 
     // Create the Elf_Vernauxs for this Elf_Verneed. The loop iterates over
     // VerdefMap, which will only contain references to needed version
     // definitions. Each Elf_Vernaux is based on the information contained in
     // the Elf_Verdef in the source DSO. This loop iterates over a std::map of
     // pointers, but is deterministic because the pointers refer to Elf_Verdef
     // data structures within a single input file.
     for (auto &NV : P.first->VerdefMap) {
       Vernaux->vna_hash = NV.first->vd_hash;
       Vernaux->vna_flags = 0;
       Vernaux->vna_other = NV.second.Index;
       Vernaux->vna_name = NV.second.StrTab;
       Vernaux->vna_next = sizeof(Elf_Vernaux);
       ++Vernaux;
     }
 
     Vernaux[-1].vna_next = 0;
   }
   Verneed[-1].vn_next = 0;
 }
 
 template <class ELFT> void VersionNeedSection<ELFT>::finalizeContents() {
   getParent()->Link = InX::DynStrTab->getParent()->SectionIndex;
   getParent()->Info = Needed.size();
 }
 
 template <class ELFT> size_t VersionNeedSection<ELFT>::getSize() const {
   unsigned Size = Needed.size() * sizeof(Elf_Verneed);
   for (const std::pair<SharedFile<ELFT> *, size_t> &P : Needed)
     Size += P.first->VerdefMap.size() * sizeof(Elf_Vernaux);
   return Size;
 }
 
 template <class ELFT> bool VersionNeedSection<ELFT>::empty() const {
   return getNeedNum() == 0;
 }
 
 MergeSyntheticSection::MergeSyntheticSection(StringRef Name, uint32_t Type,
                                              uint64_t Flags, uint32_t Alignment)
     : SyntheticSection(Flags, Type, Alignment, Name),
       Builder(StringTableBuilder::RAW, Alignment) {}
 
 void MergeSyntheticSection::addSection(MergeInputSection *MS) {
-  assert(!Finalized);
   MS->Parent = this;
   Sections.push_back(MS);
 }
 
 void MergeSyntheticSection::writeTo(uint8_t *Buf) { Builder.write(Buf); }
 
 bool MergeSyntheticSection::shouldTailMerge() const {
   return (this->Flags & SHF_STRINGS) && Config->Optimize >= 2;
 }
 
 void MergeSyntheticSection::finalizeTailMerge() {
   // Add all string pieces to the string table builder to create section
   // contents.
   for (MergeInputSection *Sec : Sections)
     for (size_t I = 0, E = Sec->Pieces.size(); I != E; ++I)
       if (Sec->Pieces[I].Live)
         Builder.add(Sec->getData(I));
 
   // Fix the string table content. After this, the contents will never change.
   Builder.finalize();
 
   // finalize() fixed tail-optimized strings, so we can now get
   // offsets of strings. Get an offset for each string and save it
   // to a corresponding StringPiece for easy access.
   for (MergeInputSection *Sec : Sections)
     for (size_t I = 0, E = Sec->Pieces.size(); I != E; ++I)
       if (Sec->Pieces[I].Live)
         Sec->Pieces[I].OutputOff = Builder.getOffset(Sec->getData(I));
 }
 
 void MergeSyntheticSection::finalizeNoTailMerge() {
   // Add all string pieces to the string table builder to create section
   // contents. Because we are not tail-optimizing, offsets of strings are
   // fixed when they are added to the builder (string table builder contains
   // a hash table from strings to offsets).
   for (MergeInputSection *Sec : Sections)
     for (size_t I = 0, E = Sec->Pieces.size(); I != E; ++I)
       if (Sec->Pieces[I].Live)
         Sec->Pieces[I].OutputOff = Builder.add(Sec->getData(I));
 
   Builder.finalizeInOrder();
 }
 
 void MergeSyntheticSection::finalizeContents() {
-  if (Finalized)
-    return;
-  Finalized = true;
   if (shouldTailMerge())
     finalizeTailMerge();
   else
     finalizeNoTailMerge();
 }
 
 size_t MergeSyntheticSection::getSize() const {
-  // We should finalize string builder to know the size.
-  const_cast<MergeSyntheticSection *>(this)->finalizeContents();
   return Builder.getSize();
+}
+
+// This function decompresses compressed sections and scans over the input
+// sections to create mergeable synthetic sections. It removes
+// MergeInputSections from the input section array and adds new synthetic
+// sections at the location of the first input section that it replaces. It then
+// finalizes each synthetic section in order to compute an output offset for
+// each piece of each input section.
+void elf::decompressAndMergeSections() {
+  // splitIntoPieces needs to be called on each MergeInputSection before calling
+  // finalizeContents(). Do that first.
+  parallelForEach(InputSections.begin(), InputSections.end(),
+                  [](InputSectionBase *S) {
+                    if (!S->Live)
+                      return;
+                    if (Decompressor::isCompressedELFSection(S->Flags, S->Name))
+                      S->uncompress();
+                    if (auto *MS = dyn_cast<MergeInputSection>(S))
+                      MS->splitIntoPieces();
+                  });
+
+  std::vector<MergeSyntheticSection *> MergeSections;
+  for (InputSectionBase *&S : InputSections) {
+    MergeInputSection *MS = dyn_cast<MergeInputSection>(S);
+    if (!MS)
+      continue;
+
+    // We do not want to handle sections that are not alive, so just remove
+    // them instead of trying to merge.
+    if (!MS->Live)
+      continue;
+
+    StringRef OutsecName = getOutputSectionName(MS->Name);
+    uint64_t Flags = MS->Flags & ~(uint64_t)SHF_GROUP;
+    uint32_t Alignment = std::max<uint32_t>(MS->Alignment, MS->Entsize);
+
+    auto I = llvm::find_if(MergeSections, [=](MergeSyntheticSection *Sec) {
+      return Sec->Name == OutsecName && Sec->Flags == Flags &&
+             Sec->Alignment == Alignment;
+    });
+    if (I == MergeSections.end()) {
+      MergeSyntheticSection *Syn =
+          make<MergeSyntheticSection>(OutsecName, MS->Type, Flags, Alignment);
+      MergeSections.push_back(Syn);
+      I = std::prev(MergeSections.end());
+      S = Syn;
+    } else {
+      S = nullptr;
+    }
+    (*I)->addSection(MS);
+  }
+  for (auto *MS : MergeSections)
+    MS->finalizeContents();
+
+  std::vector<InputSectionBase *> &V = InputSections;
+  V.erase(std::remove(V.begin(), V.end(), nullptr), V.end());
 }
 
 MipsRldMapSection::MipsRldMapSection()
     : SyntheticSection(SHF_ALLOC | SHF_WRITE, SHT_PROGBITS, Config->Wordsize,
                        ".rld_map") {}
 
 ARMExidxSentinelSection::ARMExidxSentinelSection()
     : SyntheticSection(SHF_ALLOC | SHF_LINK_ORDER, SHT_ARM_EXIDX,
                        Config->Wordsize, ".ARM.exidx") {}
 
 // Write a terminating sentinel entry to the end of the .ARM.exidx table.
 // This section will have been sorted last in the .ARM.exidx table.
 // This table entry will have the form:
 // | PREL31 upper bound of code that has exception tables | EXIDX_CANTUNWIND |
 // The sentinel must have the PREL31 value of an address higher than any
 // address described by any other table entry.
 void ARMExidxSentinelSection::writeTo(uint8_t *Buf) {
   // The Sections are sorted in order of ascending PREL31 address with the
   // sentinel last. We need to find the InputSection that precedes the
   // sentinel. By construction the Sentinel is in the last
   // InputSectionDescription as the InputSection that precedes it.
   OutputSectionCommand *C = Script->getCmd(getParent());
   auto ISD = std::find_if(C->Commands.rbegin(), C->Commands.rend(),
                           [](const BaseCommand *Base) {
                             return isa<InputSectionDescription>(Base);
                           });
   auto L = cast<InputSectionDescription>(*ISD);
   InputSection *Highest = L->Sections[L->Sections.size() - 2];
   InputSection *LS = Highest->getLinkOrderDep();
   uint64_t S = LS->getParent()->Addr + LS->getOffset(LS->getSize());
   uint64_t P = getVA();
   Target->relocateOne(Buf, R_ARM_PREL31, S - P);
   write32le(Buf + 4, 0x1);
 }
 
 ThunkSection::ThunkSection(OutputSection *OS, uint64_t Off)
     : SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS,
                        Config->Wordsize, ".text.thunk") {
   this->Parent = OS;
   this->OutSecOff = Off;
 }
 
 void ThunkSection::addThunk(Thunk *T) {
   uint64_t Off = alignTo(Size, T->alignment);
   T->Offset = Off;
   Thunks.push_back(T);
   T->addSymbols(*this);
   Size = Off + T->size();
 }
 
 void ThunkSection::writeTo(uint8_t *Buf) {
   for (const Thunk *T : Thunks)
     T->writeTo(Buf + T->Offset, *this);
 }
 
 InputSection *ThunkSection::getTargetInputSection() const {
   const Thunk *T = Thunks.front();
   return T->getTargetInputSection();
 }
 
 InputSection *InX::ARMAttributes;
 BssSection *InX::Bss;
 BssSection *InX::BssRelRo;
 BuildIdSection *InX::BuildId;
 InputSection *InX::Common;
 SyntheticSection *InX::Dynamic;
 StringTableSection *InX::DynStrTab;
 SymbolTableBaseSection *InX::DynSymTab;
 InputSection *InX::Interp;
 GdbIndexSection *InX::GdbIndex;
 GotSection *InX::Got;
 GotPltSection *InX::GotPlt;
 GnuHashTableSection *InX::GnuHashTab;
 IgotPltSection *InX::IgotPlt;
 MipsGotSection *InX::MipsGot;
 MipsRldMapSection *InX::MipsRldMap;
 PltSection *InX::Plt;
 PltSection *InX::Iplt;
 StringTableSection *InX::ShStrTab;
 StringTableSection *InX::StrTab;
 SymbolTableBaseSection *InX::SymTab;
 
 template void PltSection::addEntry<ELF32LE>(SymbolBody &Sym);
 template void PltSection::addEntry<ELF32BE>(SymbolBody &Sym);
 template void PltSection::addEntry<ELF64LE>(SymbolBody &Sym);
 template void PltSection::addEntry<ELF64BE>(SymbolBody &Sym);
 
 template InputSection *elf::createCommonSection<ELF32LE>();
 template InputSection *elf::createCommonSection<ELF32BE>();
 template InputSection *elf::createCommonSection<ELF64LE>();
 template InputSection *elf::createCommonSection<ELF64BE>();
 
 template MergeInputSection *elf::createCommentSection<ELF32LE>();
 template MergeInputSection *elf::createCommentSection<ELF32BE>();
 template MergeInputSection *elf::createCommentSection<ELF64LE>();
 template MergeInputSection *elf::createCommentSection<ELF64BE>();
 
 template class elf::MipsAbiFlagsSection<ELF32LE>;
 template class elf::MipsAbiFlagsSection<ELF32BE>;
 template class elf::MipsAbiFlagsSection<ELF64LE>;
 template class elf::MipsAbiFlagsSection<ELF64BE>;
 
 template class elf::MipsOptionsSection<ELF32LE>;
 template class elf::MipsOptionsSection<ELF32BE>;
 template class elf::MipsOptionsSection<ELF64LE>;
 template class elf::MipsOptionsSection<ELF64BE>;
 
 template class elf::MipsReginfoSection<ELF32LE>;
 template class elf::MipsReginfoSection<ELF32BE>;
 template class elf::MipsReginfoSection<ELF64LE>;
 template class elf::MipsReginfoSection<ELF64BE>;
 
 template class elf::DynamicSection<ELF32LE>;
 template class elf::DynamicSection<ELF32BE>;
 template class elf::DynamicSection<ELF64LE>;
 template class elf::DynamicSection<ELF64BE>;
 
 template class elf::RelocationSection<ELF32LE>;
 template class elf::RelocationSection<ELF32BE>;
 template class elf::RelocationSection<ELF64LE>;
 template class elf::RelocationSection<ELF64BE>;
 
 template class elf::SymbolTableSection<ELF32LE>;
 template class elf::SymbolTableSection<ELF32BE>;
 template class elf::SymbolTableSection<ELF64LE>;
 template class elf::SymbolTableSection<ELF64BE>;
 
 template class elf::HashTableSection<ELF32LE>;
 template class elf::HashTableSection<ELF32BE>;
 template class elf::HashTableSection<ELF64LE>;
 template class elf::HashTableSection<ELF64BE>;
 
 template class elf::EhFrameHeader<ELF32LE>;
 template class elf::EhFrameHeader<ELF32BE>;
 template class elf::EhFrameHeader<ELF64LE>;
 template class elf::EhFrameHeader<ELF64BE>;
 
 template class elf::VersionTableSection<ELF32LE>;
 template class elf::VersionTableSection<ELF32BE>;
 template class elf::VersionTableSection<ELF64LE>;
 template class elf::VersionTableSection<ELF64BE>;
 
 template class elf::VersionNeedSection<ELF32LE>;
 template class elf::VersionNeedSection<ELF32BE>;
 template class elf::VersionNeedSection<ELF64LE>;
 template class elf::VersionNeedSection<ELF64BE>;
 
 template class elf::VersionDefinitionSection<ELF32LE>;
 template class elf::VersionDefinitionSection<ELF32BE>;
 template class elf::VersionDefinitionSection<ELF64LE>;
 template class elf::VersionDefinitionSection<ELF64BE>;
 
 template class elf::EhFrameSection<ELF32LE>;
 template class elf::EhFrameSection<ELF32BE>;
 template class elf::EhFrameSection<ELF64LE>;
 template class elf::EhFrameSection<ELF64BE>;
Index: vendor/lld/dist/ELF/SyntheticSections.h
===================================================================
--- vendor/lld/dist/ELF/SyntheticSections.h	(revision 320020)
+++ vendor/lld/dist/ELF/SyntheticSections.h	(revision 320021)
@@ -1,804 +1,804 @@
 //===- SyntheticSection.h ---------------------------------------*- C++ -*-===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // Synthetic sections represent chunks of linker-created data. If you
 // need to create a chunk of data that to be included in some section
 // in the result, you probably want to create that as a synthetic section.
 //
 // Synthetic sections are designed as input sections as opposed to
 // output sections because we want to allow them to be manipulated
 // using linker scripts just like other input sections from regular
 // files.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLD_ELF_SYNTHETIC_SECTION_H
 #define LLD_ELF_SYNTHETIC_SECTION_H
 
 #include "EhFrame.h"
 #include "GdbIndex.h"
 #include "InputSection.h"
 #include "llvm/ADT/MapVector.h"
 #include "llvm/MC/StringTableBuilder.h"
 
 #include <set>
 
 namespace lld {
 namespace elf {
 
 class SyntheticSection : public InputSection {
 public:
   SyntheticSection(uint64_t Flags, uint32_t Type, uint32_t Alignment,
                    StringRef Name)
       : InputSection(Flags, Type, Alignment, {}, Name,
                      InputSectionBase::Synthetic) {
     this->Live = true;
   }
 
   virtual ~SyntheticSection() = default;
   virtual void writeTo(uint8_t *Buf) = 0;
   virtual size_t getSize() const = 0;
   virtual void finalizeContents() {}
   // If the section has the SHF_ALLOC flag and the size may be changed if
   // thunks are added, update the section size.
   virtual void updateAllocSize() {}
   // If any additional finalization of contents are needed post thunk creation.
   virtual void postThunkContents() {}
   virtual bool empty() const { return false; }
   uint64_t getVA() const;
 
   static bool classof(const SectionBase *D) {
     return D->kind() == InputSectionBase::Synthetic;
   }
 };
 
 struct CieRecord {
   EhSectionPiece *Piece = nullptr;
   std::vector<EhSectionPiece *> FdePieces;
 };
 
 // Section for .eh_frame.
 template <class ELFT> class EhFrameSection final : public SyntheticSection {
   typedef typename ELFT::Shdr Elf_Shdr;
   typedef typename ELFT::Rel Elf_Rel;
   typedef typename ELFT::Rela Elf_Rela;
 
   void updateAlignment(uint64_t Val) {
     if (Val > this->Alignment)
       this->Alignment = Val;
   }
 
 public:
   EhFrameSection();
   void writeTo(uint8_t *Buf) override;
   void finalizeContents() override;
   bool empty() const override { return Sections.empty(); }
   size_t getSize() const override { return Size; }
 
   void addSection(InputSectionBase *S);
 
   size_t NumFdes = 0;
 
   std::vector<EhInputSection *> Sections;
 
 private:
   uint64_t Size = 0;
   template <class RelTy>
   void addSectionAux(EhInputSection *S, llvm::ArrayRef<RelTy> Rels);
 
   template <class RelTy>
   CieRecord *addCie(EhSectionPiece &Piece, ArrayRef<RelTy> Rels);
 
   template <class RelTy>
   bool isFdeLive(EhSectionPiece &Piece, ArrayRef<RelTy> Rels);
 
   uint64_t getFdePc(uint8_t *Buf, size_t Off, uint8_t Enc);
 
   std::vector<CieRecord *> Cies;
 
   // CIE records are uniquified by their contents and personality functions.
   llvm::DenseMap<std::pair<ArrayRef<uint8_t>, SymbolBody *>, CieRecord> CieMap;
 };
 
 class GotSection : public SyntheticSection {
 public:
   GotSection();
   size_t getSize() const override { return Size; }
   void finalizeContents() override;
   bool empty() const override;
   void writeTo(uint8_t *Buf) override;
 
   void addEntry(SymbolBody &Sym);
   bool addDynTlsEntry(SymbolBody &Sym);
   bool addTlsIndex();
   uint64_t getGlobalDynAddr(const SymbolBody &B) const;
   uint64_t getGlobalDynOffset(const SymbolBody &B) const;
 
   uint64_t getTlsIndexVA() { return this->getVA() + TlsIndexOff; }
   uint32_t getTlsIndexOff() const { return TlsIndexOff; }
 
   // Flag to force GOT to be in output if we have relocations
   // that relies on its address.
   bool HasGotOffRel = false;
 
 protected:
   size_t NumEntries = 0;
   uint32_t TlsIndexOff = -1;
   uint64_t Size = 0;
 };
 
 // .note.gnu.build-id section.
 class BuildIdSection : public SyntheticSection {
   // First 16 bytes are a header.
   static const unsigned HeaderSize = 16;
 
 public:
   BuildIdSection();
   void writeTo(uint8_t *Buf) override;
   size_t getSize() const override { return HeaderSize + HashSize; }
   void writeBuildId(llvm::ArrayRef<uint8_t> Buf);
 
 private:
   void computeHash(llvm::ArrayRef<uint8_t> Buf,
                    std::function<void(uint8_t *, ArrayRef<uint8_t>)> Hash);
 
   size_t HashSize;
   uint8_t *HashBuf;
 };
 
 // BssSection is used to reserve space for copy relocations and common symbols.
 // We create three instances of this class for .bss, .bss.rel.ro and "COMMON",
 // that are used for writable symbols, read-only symbols and common symbols,
 // respectively.
 class BssSection final : public SyntheticSection {
 public:
   BssSection(StringRef Name);
   void writeTo(uint8_t *) override {}
   bool empty() const override { return getSize() == 0; }
   size_t reserveSpace(uint64_t Size, uint32_t Alignment);
   size_t getSize() const override { return Size; }
 
 private:
   uint64_t Size = 0;
 };
 
 class MipsGotSection final : public SyntheticSection {
 public:
   MipsGotSection();
   void writeTo(uint8_t *Buf) override;
   size_t getSize() const override { return Size; }
   void updateAllocSize() override;
   void finalizeContents() override;
   bool empty() const override;
   void addEntry(SymbolBody &Sym, int64_t Addend, RelExpr Expr);
   bool addDynTlsEntry(SymbolBody &Sym);
   bool addTlsIndex();
   uint64_t getPageEntryOffset(const SymbolBody &B, int64_t Addend) const;
   uint64_t getBodyEntryOffset(const SymbolBody &B, int64_t Addend) const;
   uint64_t getGlobalDynOffset(const SymbolBody &B) const;
 
   // Returns the symbol which corresponds to the first entry of the global part
   // of GOT on MIPS platform. It is required to fill up MIPS-specific dynamic
   // table properties.
   // Returns nullptr if the global part is empty.
   const SymbolBody *getFirstGlobalEntry() const;
 
   // Returns the number of entries in the local part of GOT including
   // the number of reserved entries.
   unsigned getLocalEntriesNum() const;
 
   // Returns offset of TLS part of the MIPS GOT table. This part goes
   // after 'local' and 'global' entries.
   uint64_t getTlsOffset() const;
 
   uint32_t getTlsIndexOff() const { return TlsIndexOff; }
 
   uint64_t getGp() const;
 
 private:
   // MIPS GOT consists of three parts: local, global and tls. Each part
   // contains different types of entries. Here is a layout of GOT:
   // - Header entries                |
   // - Page entries                  |   Local part
   // - Local entries (16-bit access) |
   // - Local entries (32-bit access) |
   // - Normal global entries         ||  Global part
   // - Reloc-only global entries     ||
   // - TLS entries                   ||| TLS part
   //
   // Header:
   //   Two entries hold predefined value 0x0 and 0x80000000.
   // Page entries:
   //   These entries created by R_MIPS_GOT_PAGE relocation and R_MIPS_GOT16
   //   relocation against local symbols. They are initialized by higher 16-bit
   //   of the corresponding symbol's value. So each 64kb of address space
   //   requires a single GOT entry.
   // Local entries (16-bit access):
   //   These entries created by GOT relocations against global non-preemptible
   //   symbols so dynamic linker is not necessary to resolve the symbol's
   //   values. "16-bit access" means that corresponding relocations address
   //   GOT using 16-bit index. Each unique Symbol-Addend pair has its own
   //   GOT entry.
   // Local entries (32-bit access):
   //   These entries are the same as above but created by relocations which
   //   address GOT using 32-bit index (R_MIPS_GOT_HI16/LO16 etc).
   // Normal global entries:
   //   These entries created by GOT relocations against preemptible global
   //   symbols. They need to be initialized by dynamic linker and they ordered
   //   exactly as the corresponding entries in the dynamic symbols table.
   // Reloc-only global entries:
   //   These entries created for symbols that are referenced by dynamic
   //   relocations R_MIPS_REL32. These entries are not accessed with gp-relative
   //   addressing, but MIPS ABI requires that these entries be present in GOT.
   // TLS entries:
   //   Entries created by TLS relocations.
 
   // Number of "Header" entries.
   static const unsigned HeaderEntriesNum = 2;
   // Number of allocated "Page" entries.
   uint32_t PageEntriesNum = 0;
   // Map output sections referenced by MIPS GOT relocations
   // to the first index of "Page" entries allocated for this section.
   llvm::SmallMapVector<const OutputSection *, size_t, 16> PageIndexMap;
 
   typedef std::pair<const SymbolBody *, uint64_t> GotEntry;
   typedef std::vector<GotEntry> GotEntries;
   // Map from Symbol-Addend pair to the GOT index.
   llvm::DenseMap<GotEntry, size_t> EntryIndexMap;
   // Local entries (16-bit access).
   GotEntries LocalEntries;
   // Local entries (32-bit access).
   GotEntries LocalEntries32;
 
   // Normal and reloc-only global entries.
   GotEntries GlobalEntries;
 
   // TLS entries.
   std::vector<const SymbolBody *> TlsEntries;
 
   uint32_t TlsIndexOff = -1;
   uint64_t Size = 0;
 };
 
 class GotPltSection final : public SyntheticSection {
 public:
   GotPltSection();
   void addEntry(SymbolBody &Sym);
   size_t getSize() const override;
   void writeTo(uint8_t *Buf) override;
   bool empty() const override { return Entries.empty(); }
 
 private:
   std::vector<const SymbolBody *> Entries;
 };
 
 // The IgotPltSection is a Got associated with the PltSection for GNU Ifunc
 // Symbols that will be relocated by Target->IRelativeRel.
 // On most Targets the IgotPltSection will immediately follow the GotPltSection
 // on ARM the IgotPltSection will immediately follow the GotSection.
 class IgotPltSection final : public SyntheticSection {
 public:
   IgotPltSection();
   void addEntry(SymbolBody &Sym);
   size_t getSize() const override;
   void writeTo(uint8_t *Buf) override;
   bool empty() const override { return Entries.empty(); }
 
 private:
   std::vector<const SymbolBody *> Entries;
 };
 
 class StringTableSection final : public SyntheticSection {
 public:
   StringTableSection(StringRef Name, bool Dynamic);
   unsigned addString(StringRef S, bool HashIt = true);
   void writeTo(uint8_t *Buf) override;
   size_t getSize() const override { return Size; }
   bool isDynamic() const { return Dynamic; }
 
 private:
   const bool Dynamic;
 
   uint64_t Size = 0;
 
   llvm::DenseMap<StringRef, unsigned> StringMap;
   std::vector<StringRef> Strings;
 };
 
 class DynamicReloc {
 public:
   DynamicReloc(uint32_t Type, const InputSectionBase *InputSec,
                uint64_t OffsetInSec, bool UseSymVA, SymbolBody *Sym,
                int64_t Addend)
       : Type(Type), Sym(Sym), InputSec(InputSec), OffsetInSec(OffsetInSec),
         UseSymVA(UseSymVA), Addend(Addend) {}
 
   uint64_t getOffset() const;
   int64_t getAddend() const;
   uint32_t getSymIndex() const;
   const InputSectionBase *getInputSec() const { return InputSec; }
 
   uint32_t Type;
 
 private:
   SymbolBody *Sym;
   const InputSectionBase *InputSec = nullptr;
   uint64_t OffsetInSec;
   bool UseSymVA;
   int64_t Addend;
 };
 
 template <class ELFT> class DynamicSection final : public SyntheticSection {
   typedef typename ELFT::Dyn Elf_Dyn;
   typedef typename ELFT::Rel Elf_Rel;
   typedef typename ELFT::Rela Elf_Rela;
   typedef typename ELFT::Shdr Elf_Shdr;
   typedef typename ELFT::Sym Elf_Sym;
 
   // The .dynamic section contains information for the dynamic linker.
   // The section consists of fixed size entries, which consist of
   // type and value fields. Value are one of plain integers, symbol
   // addresses, or section addresses. This struct represents the entry.
   struct Entry {
     int32_t Tag;
     union {
       OutputSection *OutSec;
       InputSection *InSec;
       uint64_t Val;
       const SymbolBody *Sym;
     };
     enum KindT { SecAddr, SecSize, SymAddr, PlainInt, InSecAddr } Kind;
     Entry(int32_t Tag, OutputSection *OutSec, KindT Kind = SecAddr)
         : Tag(Tag), OutSec(OutSec), Kind(Kind) {}
     Entry(int32_t Tag, InputSection *Sec)
         : Tag(Tag), InSec(Sec), Kind(InSecAddr) {}
     Entry(int32_t Tag, uint64_t Val) : Tag(Tag), Val(Val), Kind(PlainInt) {}
     Entry(int32_t Tag, const SymbolBody *Sym)
         : Tag(Tag), Sym(Sym), Kind(SymAddr) {}
   };
 
   // finalizeContents() fills this vector with the section contents.
   std::vector<Entry> Entries;
 
 public:
   DynamicSection();
   void finalizeContents() override;
   void writeTo(uint8_t *Buf) override;
   size_t getSize() const override { return Size; }
 
 private:
   void addEntries();
   void add(Entry E) { Entries.push_back(E); }
   uint64_t Size = 0;
 };
 
 template <class ELFT> class RelocationSection final : public SyntheticSection {
   typedef typename ELFT::Rel Elf_Rel;
   typedef typename ELFT::Rela Elf_Rela;
 
 public:
   RelocationSection(StringRef Name, bool Sort);
   void addReloc(const DynamicReloc &Reloc);
   unsigned getRelocOffset();
   void finalizeContents() override;
   void writeTo(uint8_t *Buf) override;
   bool empty() const override { return Relocs.empty(); }
   size_t getSize() const override { return Relocs.size() * this->Entsize; }
   size_t getRelativeRelocCount() const { return NumRelativeRelocs; }
 
 private:
   bool Sort;
   size_t NumRelativeRelocs = 0;
   std::vector<DynamicReloc> Relocs;
 };
 
 struct SymbolTableEntry {
   SymbolBody *Symbol;
   size_t StrTabOffset;
 };
 
 class SymbolTableBaseSection : public SyntheticSection {
 public:
   SymbolTableBaseSection(StringTableSection &StrTabSec);
   void finalizeContents() override;
   void postThunkContents() override;
   size_t getSize() const override { return getNumSymbols() * Entsize; }
   void addSymbol(SymbolBody *Body);
   unsigned getNumSymbols() const { return Symbols.size() + 1; }
   size_t getSymbolIndex(SymbolBody *Body);
   ArrayRef<SymbolTableEntry> getSymbols() const { return Symbols; }
 
 protected:
   // A vector of symbols and their string table offsets.
   std::vector<SymbolTableEntry> Symbols;
 
   StringTableSection &StrTabSec;
 };
 
 template <class ELFT>
 class SymbolTableSection final : public SymbolTableBaseSection {
   typedef typename ELFT::Sym Elf_Sym;
 
 public:
   SymbolTableSection(StringTableSection &StrTabSec);
   void writeTo(uint8_t *Buf) override;
 };
 
 // Outputs GNU Hash section. For detailed explanation see:
 // https://blogs.oracle.com/ali/entry/gnu_hash_elf_sections
 class GnuHashTableSection final : public SyntheticSection {
 public:
   GnuHashTableSection();
   void finalizeContents() override;
   void writeTo(uint8_t *Buf) override;
   size_t getSize() const override { return Size; }
 
   // Adds symbols to the hash table.
   // Sorts the input to satisfy GNU hash section requirements.
   void addSymbols(std::vector<SymbolTableEntry> &Symbols);
 
 private:
   size_t getShift2() const { return Config->Is64 ? 6 : 5; }
 
   void writeBloomFilter(uint8_t *Buf);
   void writeHashTable(uint8_t *Buf);
 
   struct Entry {
     SymbolBody *Body;
     size_t StrTabOffset;
     uint32_t Hash;
   };
 
   std::vector<Entry> Symbols;
   size_t MaskWords;
   size_t NBuckets = 0;
   size_t Size = 0;
 };
 
 template <class ELFT> class HashTableSection final : public SyntheticSection {
 public:
   HashTableSection();
   void finalizeContents() override;
   void writeTo(uint8_t *Buf) override;
   size_t getSize() const override { return Size; }
 
 private:
   size_t Size = 0;
 };
 
 // The PltSection is used for both the Plt and Iplt. The former always has a
 // header as its first entry that is used at run-time to resolve lazy binding.
 // The latter is used for GNU Ifunc symbols, that will be subject to a
 // Target->IRelativeRel.
 class PltSection : public SyntheticSection {
 public:
   PltSection(size_t HeaderSize);
   void writeTo(uint8_t *Buf) override;
   size_t getSize() const override;
   bool empty() const override { return Entries.empty(); }
   void addSymbols();
 
   template <class ELFT> void addEntry(SymbolBody &Sym);
 
 private:
   void writeHeader(uint8_t *Buf){};
   void addHeaderSymbols(){};
   unsigned getPltRelocOff() const;
   std::vector<std::pair<const SymbolBody *, unsigned>> Entries;
   // Iplt always has HeaderSize of 0, the Plt HeaderSize is always non-zero
   size_t HeaderSize;
 };
 
 class GdbIndexSection final : public SyntheticSection {
   const unsigned OffsetTypeSize = 4;
   const unsigned CuListOffset = 6 * OffsetTypeSize;
   const unsigned CompilationUnitSize = 16;
   const unsigned AddressEntrySize = 16 + OffsetTypeSize;
   const unsigned SymTabEntrySize = 2 * OffsetTypeSize;
 
 public:
   GdbIndexSection();
   void finalizeContents() override;
   void writeTo(uint8_t *Buf) override;
   size_t getSize() const override;
   bool empty() const override;
 
   // Symbol table is a hash table for types and names.
   // It is the area of gdb index.
   GdbHashTab SymbolTable;
 
   // CU vector is a part of constant pool area of section.
   std::vector<std::set<uint32_t>> CuVectors;
 
   // String pool is also a part of constant pool, it follows CU vectors.
   llvm::StringTableBuilder StringPool;
 
   // Each chunk contains information gathered from a debug sections of single
   // object and used to build different areas of gdb index.
   std::vector<GdbIndexChunk> Chunks;
 
 private:
   GdbIndexChunk readDwarf(InputSection *Sec);
   void buildIndex();
 
   uint32_t CuTypesOffset;
   uint32_t SymTabOffset;
   uint32_t ConstantPoolOffset;
   uint32_t StringPoolOffset;
 
   size_t CuVectorsSize = 0;
   std::vector<size_t> CuVectorsOffset;
 
   bool Finalized = false;
 };
 
 // --eh-frame-hdr option tells linker to construct a header for all the
 // .eh_frame sections. This header is placed to a section named .eh_frame_hdr
 // and also to a PT_GNU_EH_FRAME segment.
 // At runtime the unwinder then can find all the PT_GNU_EH_FRAME segments by
 // calling dl_iterate_phdr.
 // This section contains a lookup table for quick binary search of FDEs.
 // Detailed info about internals can be found in Ian Lance Taylor's blog:
 // http://www.airs.com/blog/archives/460 (".eh_frame")
 // http://www.airs.com/blog/archives/462 (".eh_frame_hdr")
 template <class ELFT> class EhFrameHeader final : public SyntheticSection {
 public:
   EhFrameHeader();
   void writeTo(uint8_t *Buf) override;
   size_t getSize() const override;
   void addFde(uint32_t Pc, uint32_t FdeVA);
   bool empty() const override;
 
 private:
   struct FdeData {
     uint32_t Pc;
     uint32_t FdeVA;
   };
 
   std::vector<FdeData> Fdes;
 };
 
 // For more information about .gnu.version and .gnu.version_r see:
 // https://www.akkadia.org/drepper/symbol-versioning
 
 // The .gnu.version_d section which has a section type of SHT_GNU_verdef shall
 // contain symbol version definitions. The number of entries in this section
 // shall be contained in the DT_VERDEFNUM entry of the .dynamic section.
 // The section shall contain an array of Elf_Verdef structures, optionally
 // followed by an array of Elf_Verdaux structures.
 template <class ELFT>
 class VersionDefinitionSection final : public SyntheticSection {
   typedef typename ELFT::Verdef Elf_Verdef;
   typedef typename ELFT::Verdaux Elf_Verdaux;
 
 public:
   VersionDefinitionSection();
   void finalizeContents() override;
   size_t getSize() const override;
   void writeTo(uint8_t *Buf) override;
 
 private:
   void writeOne(uint8_t *Buf, uint32_t Index, StringRef Name, size_t NameOff);
 
   unsigned FileDefNameOff;
 };
 
 // The .gnu.version section specifies the required version of each symbol in the
 // dynamic symbol table. It contains one Elf_Versym for each dynamic symbol
 // table entry. An Elf_Versym is just a 16-bit integer that refers to a version
 // identifier defined in the either .gnu.version_r or .gnu.version_d section.
 // The values 0 and 1 are reserved. All other values are used for versions in
 // the own object or in any of the dependencies.
 template <class ELFT>
 class VersionTableSection final : public SyntheticSection {
   typedef typename ELFT::Versym Elf_Versym;
 
 public:
   VersionTableSection();
   void finalizeContents() override;
   size_t getSize() const override;
   void writeTo(uint8_t *Buf) override;
   bool empty() const override;
 };
 
 // The .gnu.version_r section defines the version identifiers used by
 // .gnu.version. It contains a linked list of Elf_Verneed data structures. Each
 // Elf_Verneed specifies the version requirements for a single DSO, and contains
 // a reference to a linked list of Elf_Vernaux data structures which define the
 // mapping from version identifiers to version names.
 template <class ELFT> class VersionNeedSection final : public SyntheticSection {
   typedef typename ELFT::Verneed Elf_Verneed;
   typedef typename ELFT::Vernaux Elf_Vernaux;
 
   // A vector of shared files that need Elf_Verneed data structures and the
   // string table offsets of their sonames.
   std::vector<std::pair<SharedFile<ELFT> *, size_t>> Needed;
 
   // The next available version identifier.
   unsigned NextIndex;
 
 public:
   VersionNeedSection();
   void addSymbol(SharedSymbol *SS);
   void finalizeContents() override;
   void writeTo(uint8_t *Buf) override;
   size_t getSize() const override;
   size_t getNeedNum() const { return Needed.size(); }
   bool empty() const override;
 };
 
 // MergeSyntheticSection is a class that allows us to put mergeable sections
 // with different attributes in a single output sections. To do that
 // we put them into MergeSyntheticSection synthetic input sections which are
 // attached to regular output sections.
 class MergeSyntheticSection final : public SyntheticSection {
 public:
   MergeSyntheticSection(StringRef Name, uint32_t Type, uint64_t Flags,
                         uint32_t Alignment);
   void addSection(MergeInputSection *MS);
   void writeTo(uint8_t *Buf) override;
   void finalizeContents() override;
   bool shouldTailMerge() const;
   size_t getSize() const override;
 
 private:
   void finalizeTailMerge();
   void finalizeNoTailMerge();
 
-  bool Finalized = false;
   llvm::StringTableBuilder Builder;
   std::vector<MergeInputSection *> Sections;
 };
 
 // .MIPS.abiflags section.
 template <class ELFT>
 class MipsAbiFlagsSection final : public SyntheticSection {
   typedef llvm::object::Elf_Mips_ABIFlags<ELFT> Elf_Mips_ABIFlags;
 
 public:
   static MipsAbiFlagsSection *create();
 
   MipsAbiFlagsSection(Elf_Mips_ABIFlags Flags);
   size_t getSize() const override { return sizeof(Elf_Mips_ABIFlags); }
   void writeTo(uint8_t *Buf) override;
 
 private:
   Elf_Mips_ABIFlags Flags;
 };
 
 // .MIPS.options section.
 template <class ELFT> class MipsOptionsSection final : public SyntheticSection {
   typedef llvm::object::Elf_Mips_Options<ELFT> Elf_Mips_Options;
   typedef llvm::object::Elf_Mips_RegInfo<ELFT> Elf_Mips_RegInfo;
 
 public:
   static MipsOptionsSection *create();
 
   MipsOptionsSection(Elf_Mips_RegInfo Reginfo);
   void writeTo(uint8_t *Buf) override;
 
   size_t getSize() const override {
     return sizeof(Elf_Mips_Options) + sizeof(Elf_Mips_RegInfo);
   }
 
 private:
   Elf_Mips_RegInfo Reginfo;
 };
 
 // MIPS .reginfo section.
 template <class ELFT> class MipsReginfoSection final : public SyntheticSection {
   typedef llvm::object::Elf_Mips_RegInfo<ELFT> Elf_Mips_RegInfo;
 
 public:
   static MipsReginfoSection *create();
 
   MipsReginfoSection(Elf_Mips_RegInfo Reginfo);
   size_t getSize() const override { return sizeof(Elf_Mips_RegInfo); }
   void writeTo(uint8_t *Buf) override;
 
 private:
   Elf_Mips_RegInfo Reginfo;
 };
 
 // This is a MIPS specific section to hold a space within the data segment
 // of executable file which is pointed to by the DT_MIPS_RLD_MAP entry.
 // See "Dynamic section" in Chapter 5 in the following document:
 // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
 class MipsRldMapSection : public SyntheticSection {
 public:
   MipsRldMapSection();
   size_t getSize() const override { return Config->Wordsize; }
   void writeTo(uint8_t *Buf) override {}
 };
 
 class ARMExidxSentinelSection : public SyntheticSection {
 public:
   ARMExidxSentinelSection();
   size_t getSize() const override { return 8; }
   void writeTo(uint8_t *Buf) override;
 };
 
 // A container for one or more linker generated thunks. Instances of these
 // thunks including ARM interworking and Mips LA25 PI to non-PI thunks.
 class ThunkSection : public SyntheticSection {
 public:
   // ThunkSection in OS, with desired OutSecOff of Off
   ThunkSection(OutputSection *OS, uint64_t Off);
 
   // Add a newly created Thunk to this container:
   // Thunk is given offset from start of this InputSection
   // Thunk defines a symbol in this InputSection that can be used as target
   // of a relocation
   void addThunk(Thunk *T);
   size_t getSize() const override { return Size; }
   void writeTo(uint8_t *Buf) override;
   InputSection *getTargetInputSection() const;
 
 private:
   std::vector<const Thunk *> Thunks;
   size_t Size = 0;
 };
 
 template <class ELFT> InputSection *createCommonSection();
 InputSection *createInterpSection();
 template <class ELFT> MergeInputSection *createCommentSection();
+void decompressAndMergeSections();
 
 SymbolBody *addSyntheticLocal(StringRef Name, uint8_t Type, uint64_t Value,
                               uint64_t Size, InputSectionBase *Section);
 
 // Linker generated sections which can be used as inputs.
 struct InX {
   static InputSection *ARMAttributes;
   static BssSection *Bss;
   static BssSection *BssRelRo;
   static BuildIdSection *BuildId;
   static InputSection *Common;
   static SyntheticSection *Dynamic;
   static StringTableSection *DynStrTab;
   static SymbolTableBaseSection *DynSymTab;
   static GnuHashTableSection *GnuHashTab;
   static InputSection *Interp;
   static GdbIndexSection *GdbIndex;
   static GotSection *Got;
   static GotPltSection *GotPlt;
   static IgotPltSection *IgotPlt;
   static MipsGotSection *MipsGot;
   static MipsRldMapSection *MipsRldMap;
   static PltSection *Plt;
   static PltSection *Iplt;
   static StringTableSection *ShStrTab;
   static StringTableSection *StrTab;
   static SymbolTableBaseSection *SymTab;
 };
 
 template <class ELFT> struct In : public InX {
   static EhFrameHeader<ELFT> *EhFrameHdr;
   static EhFrameSection<ELFT> *EhFrame;
   static HashTableSection<ELFT> *HashTab;
   static RelocationSection<ELFT> *RelaDyn;
   static RelocationSection<ELFT> *RelaPlt;
   static RelocationSection<ELFT> *RelaIplt;
   static VersionDefinitionSection<ELFT> *VerDef;
   static VersionTableSection<ELFT> *VerSym;
   static VersionNeedSection<ELFT> *VerNeed;
 };
 
 template <class ELFT> EhFrameHeader<ELFT> *In<ELFT>::EhFrameHdr;
 template <class ELFT> EhFrameSection<ELFT> *In<ELFT>::EhFrame;
 template <class ELFT> HashTableSection<ELFT> *In<ELFT>::HashTab;
 template <class ELFT> RelocationSection<ELFT> *In<ELFT>::RelaDyn;
 template <class ELFT> RelocationSection<ELFT> *In<ELFT>::RelaPlt;
 template <class ELFT> RelocationSection<ELFT> *In<ELFT>::RelaIplt;
 template <class ELFT> VersionDefinitionSection<ELFT> *In<ELFT>::VerDef;
 template <class ELFT> VersionTableSection<ELFT> *In<ELFT>::VerSym;
 template <class ELFT> VersionNeedSection<ELFT> *In<ELFT>::VerNeed;
 } // namespace elf
 } // namespace lld
 
 #endif
Index: vendor/lld/dist/ELF/Target.cpp
===================================================================
--- vendor/lld/dist/ELF/Target.cpp	(revision 320020)
+++ vendor/lld/dist/ELF/Target.cpp	(revision 320021)
@@ -1,2420 +1,160 @@
 //===- Target.cpp ---------------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // Machine-specific things, such as applying relocations, creation of
 // GOT or PLT entries, etc., are handled in this file.
 //
 // Refer the ELF spec for the single letter variables, S, A or P, used
 // in this file.
 //
 // Some functions defined in this file has "relaxTls" as part of their names.
 // They do peephole optimization for TLS variables by rewriting instructions.
 // They are not part of the ABI but optional optimization, so you can skip
 // them if you are not interested in how TLS variables are optimized.
 // See the following paper for the details.
 //
 //   Ulrich Drepper, ELF Handling For Thread-Local Storage
 //   http://www.akkadia.org/drepper/tls.pdf
 //
 //===----------------------------------------------------------------------===//
 
 #include "Target.h"
 #include "Error.h"
 #include "InputFiles.h"
-#include "Memory.h"
 #include "OutputSections.h"
 #include "SymbolTable.h"
 #include "Symbols.h"
-#include "SyntheticSections.h"
-#include "Thunks.h"
-#include "Writer.h"
-#include "llvm/ADT/ArrayRef.h"
-#include "llvm/BinaryFormat/ELF.h"
 #include "llvm/Object/ELF.h"
-#include "llvm/Support/Endian.h"
 
 using namespace llvm;
 using namespace llvm::object;
-using namespace llvm::support::endian;
 using namespace llvm::ELF;
+using namespace lld;
+using namespace lld::elf;
 
+TargetInfo *elf::Target;
+
 std::string lld::toString(uint32_t Type) {
   StringRef S = getELFRelocationTypeName(elf::Config->EMachine, Type);
   if (S == "Unknown")
     return ("Unknown (" + Twine(Type) + ")").str();
   return S;
 }
 
-namespace lld {
-namespace elf {
+TargetInfo *elf::createTarget() {
+  switch (Config->EMachine) {
+  case EM_386:
+  case EM_IAMCU:
+    return createX86TargetInfo();
+  case EM_AARCH64:
+    return createAArch64TargetInfo();
+  case EM_AMDGPU:
+    return createAMDGPUTargetInfo();
+  case EM_ARM:
+    return createARMTargetInfo();
+  case EM_AVR:
+    return createAVRTargetInfo();
+  case EM_MIPS:
+    switch (Config->EKind) {
+    case ELF32LEKind:
+      return createMipsTargetInfo<ELF32LE>();
+    case ELF32BEKind:
+      return createMipsTargetInfo<ELF32BE>();
+    case ELF64LEKind:
+      return createMipsTargetInfo<ELF64LE>();
+    case ELF64BEKind:
+      return createMipsTargetInfo<ELF64BE>();
+    default:
+      fatal("unsupported MIPS target");
+    }
+  case EM_PPC:
+    return createPPCTargetInfo();
+  case EM_PPC64:
+    return createPPC64TargetInfo();
+  case EM_X86_64:
+    if (Config->EKind == ELF32LEKind)
+      return createX32TargetInfo();
+    return createX86_64TargetInfo();
+  }
+  fatal("unknown target machine");
+}
 
-TargetInfo *Target;
-
-static void or32le(uint8_t *P, int32_t V) { write32le(P, read32le(P) | V); }
-static void or32be(uint8_t *P, int32_t V) { write32be(P, read32be(P) | V); }
-
 template <class ELFT> static std::string getErrorLoc(const uint8_t *Loc) {
   for (InputSectionBase *D : InputSections) {
     auto *IS = dyn_cast_or_null<InputSection>(D);
     if (!IS || !IS->getParent())
       continue;
 
     uint8_t *ISLoc = IS->getParent()->Loc + IS->OutSecOff;
     if (ISLoc <= Loc && Loc < ISLoc + IS->getSize())
       return IS->template getLocation<ELFT>(Loc - ISLoc) + ": ";
   }
   return "";
 }
 
-static std::string getErrorLocation(const uint8_t *Loc) {
+std::string elf::getErrorLocation(const uint8_t *Loc) {
   switch (Config->EKind) {
   case ELF32LEKind:
     return getErrorLoc<ELF32LE>(Loc);
   case ELF32BEKind:
     return getErrorLoc<ELF32BE>(Loc);
   case ELF64LEKind:
     return getErrorLoc<ELF64LE>(Loc);
   case ELF64BEKind:
     return getErrorLoc<ELF64BE>(Loc);
   default:
     llvm_unreachable("unknown ELF type");
   }
 }
 
-template <unsigned N>
-static void checkInt(uint8_t *Loc, int64_t V, uint32_t Type) {
-  if (!isInt<N>(V))
-    error(getErrorLocation(Loc) + "relocation " + toString(Type) +
-          " out of range");
-}
-
-template <unsigned N>
-static void checkUInt(uint8_t *Loc, uint64_t V, uint32_t Type) {
-  if (!isUInt<N>(V))
-    error(getErrorLocation(Loc) + "relocation " + toString(Type) +
-          " out of range");
-}
-
-template <unsigned N>
-static void checkIntUInt(uint8_t *Loc, uint64_t V, uint32_t Type) {
-  if (!isInt<N>(V) && !isUInt<N>(V))
-    error(getErrorLocation(Loc) + "relocation " + toString(Type) +
-          " out of range");
-}
-
-template <unsigned N>
-static void checkAlignment(uint8_t *Loc, uint64_t V, uint32_t Type) {
-  if ((V & (N - 1)) != 0)
-    error(getErrorLocation(Loc) + "improper alignment for relocation " +
-          toString(Type));
-}
-
-namespace {
-class X86TargetInfo final : public TargetInfo {
-public:
-  X86TargetInfo();
-  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
-                     const uint8_t *Loc) const override;
-  int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
-  void writeGotPltHeader(uint8_t *Buf) const override;
-  uint32_t getDynRel(uint32_t Type) const override;
-  void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
-  void writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const override;
-  void writePltHeader(uint8_t *Buf) const override;
-  void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
-                int32_t Index, unsigned RelOff) const override;
-  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-
-  RelExpr adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
-                          RelExpr Expr) const override;
-  void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-  void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-  void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-  void relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-};
-
-template <class ELFT> class X86_64TargetInfo final : public TargetInfo {
-public:
-  X86_64TargetInfo();
-  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
-                     const uint8_t *Loc) const override;
-  bool isPicRel(uint32_t Type) const override;
-  void writeGotPltHeader(uint8_t *Buf) const override;
-  void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
-  void writePltHeader(uint8_t *Buf) const override;
-  void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
-                int32_t Index, unsigned RelOff) const override;
-  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-
-  RelExpr adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
-                          RelExpr Expr) const override;
-  void relaxGot(uint8_t *Loc, uint64_t Val) const override;
-  void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-  void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-  void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-  void relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-
-private:
-  void relaxGotNoPic(uint8_t *Loc, uint64_t Val, uint8_t Op,
-                     uint8_t ModRm) const;
-};
-
-class PPCTargetInfo final : public TargetInfo {
-public:
-  PPCTargetInfo();
-  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
-                     const uint8_t *Loc) const override;
-};
-
-class PPC64TargetInfo final : public TargetInfo {
-public:
-  PPC64TargetInfo();
-  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
-                     const uint8_t *Loc) const override;
-  void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
-                int32_t Index, unsigned RelOff) const override;
-  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-};
-
-class AArch64TargetInfo final : public TargetInfo {
-public:
-  AArch64TargetInfo();
-  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
-                     const uint8_t *Loc) const override;
-  bool isPicRel(uint32_t Type) const override;
-  void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
-  void writePltHeader(uint8_t *Buf) const override;
-  void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
-                int32_t Index, unsigned RelOff) const override;
-  bool usesOnlyLowPageBits(uint32_t Type) const override;
-  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-  RelExpr adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
-                          RelExpr Expr) const override;
-  void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-  void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-  void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-};
-
-class AMDGPUTargetInfo final : public TargetInfo {
-public:
-  AMDGPUTargetInfo();
-  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
-                     const uint8_t *Loc) const override;
-};
-
-class ARMTargetInfo final : public TargetInfo {
-public:
-  ARMTargetInfo();
-  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
-                     const uint8_t *Loc) const override;
-  bool isPicRel(uint32_t Type) const override;
-  uint32_t getDynRel(uint32_t Type) const override;
-  int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
-  void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
-  void writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const override;
-  void writePltHeader(uint8_t *Buf) const override;
-  void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
-                int32_t Index, unsigned RelOff) const override;
-  void addPltSymbols(InputSectionBase *IS, uint64_t Off) const override;
-  void addPltHeaderSymbols(InputSectionBase *ISD) const override;
-  bool needsThunk(RelExpr Expr, uint32_t RelocType, const InputFile *File,
-                  const SymbolBody &S) const override;
-  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-};
-
-template <class ELFT> class MipsTargetInfo final : public TargetInfo {
-public:
-  MipsTargetInfo();
-  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
-                     const uint8_t *Loc) const override;
-  int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
-  bool isPicRel(uint32_t Type) const override;
-  uint32_t getDynRel(uint32_t Type) const override;
-  void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
-  void writePltHeader(uint8_t *Buf) const override;
-  void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
-                int32_t Index, unsigned RelOff) const override;
-  bool needsThunk(RelExpr Expr, uint32_t RelocType, const InputFile *File,
-                  const SymbolBody &S) const override;
-  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
-  bool usesOnlyLowPageBits(uint32_t Type) const override;
-};
-} // anonymous namespace
-
-TargetInfo *createTarget() {
-  switch (Config->EMachine) {
-  case EM_386:
-  case EM_IAMCU:
-    return make<X86TargetInfo>();
-  case EM_AARCH64:
-    return make<AArch64TargetInfo>();
-  case EM_AMDGPU:
-    return make<AMDGPUTargetInfo>();
-  case EM_ARM:
-    return make<ARMTargetInfo>();
-  case EM_MIPS:
-    switch (Config->EKind) {
-    case ELF32LEKind:
-      return make<MipsTargetInfo<ELF32LE>>();
-    case ELF32BEKind:
-      return make<MipsTargetInfo<ELF32BE>>();
-    case ELF64LEKind:
-      return make<MipsTargetInfo<ELF64LE>>();
-    case ELF64BEKind:
-      return make<MipsTargetInfo<ELF64BE>>();
-    default:
-      fatal("unsupported MIPS target");
-    }
-  case EM_PPC:
-    return make<PPCTargetInfo>();
-  case EM_PPC64:
-    return make<PPC64TargetInfo>();
-  case EM_X86_64:
-    if (Config->EKind == ELF32LEKind)
-      return make<X86_64TargetInfo<ELF32LE>>();
-    return make<X86_64TargetInfo<ELF64LE>>();
-  }
-  fatal("unknown target machine");
-}
-
 TargetInfo::~TargetInfo() {}
 
 int64_t TargetInfo::getImplicitAddend(const uint8_t *Buf, uint32_t Type) const {
   return 0;
 }
 
 bool TargetInfo::usesOnlyLowPageBits(uint32_t Type) const { return false; }
 
 bool TargetInfo::needsThunk(RelExpr Expr, uint32_t RelocType,
                             const InputFile *File, const SymbolBody &S) const {
   return false;
 }
 
 void TargetInfo::writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const {
   writeGotPlt(Buf, S);
 }
 
 RelExpr TargetInfo::adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
                                     RelExpr Expr) const {
   return Expr;
 }
 
 void TargetInfo::relaxGot(uint8_t *Loc, uint64_t Val) const {
   llvm_unreachable("Should not have claimed to be relaxable");
 }
 
 void TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type,
                                 uint64_t Val) const {
   llvm_unreachable("Should not have claimed to be relaxable");
 }
 
 void TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type,
                                 uint64_t Val) const {
   llvm_unreachable("Should not have claimed to be relaxable");
 }
 
 void TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type,
                                 uint64_t Val) const {
   llvm_unreachable("Should not have claimed to be relaxable");
 }
 
 void TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint32_t Type,
                                 uint64_t Val) const {
   llvm_unreachable("Should not have claimed to be relaxable");
-}
-
-X86TargetInfo::X86TargetInfo() {
-  CopyRel = R_386_COPY;
-  GotRel = R_386_GLOB_DAT;
-  PltRel = R_386_JUMP_SLOT;
-  IRelativeRel = R_386_IRELATIVE;
-  RelativeRel = R_386_RELATIVE;
-  TlsGotRel = R_386_TLS_TPOFF;
-  TlsModuleIndexRel = R_386_TLS_DTPMOD32;
-  TlsOffsetRel = R_386_TLS_DTPOFF32;
-  GotEntrySize = 4;
-  GotPltEntrySize = 4;
-  PltEntrySize = 16;
-  PltHeaderSize = 16;
-  TlsGdRelaxSkip = 2;
-  // 0xCC is the "int3" (call debug exception handler) instruction.
-  TrapInstr = 0xcccccccc;
-}
-
-RelExpr X86TargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S,
-                                  const uint8_t *Loc) const {
-  switch (Type) {
-  case R_386_8:
-  case R_386_16:
-  case R_386_32:
-  case R_386_TLS_LDO_32:
-    return R_ABS;
-  case R_386_TLS_GD:
-    return R_TLSGD;
-  case R_386_TLS_LDM:
-    return R_TLSLD;
-  case R_386_PLT32:
-    return R_PLT_PC;
-  case R_386_PC8:
-  case R_386_PC16:
-  case R_386_PC32:
-    return R_PC;
-  case R_386_GOTPC:
-    return R_GOTONLY_PC_FROM_END;
-  case R_386_TLS_IE:
-    return R_GOT;
-  case R_386_GOT32:
-  case R_386_GOT32X:
-    // These relocations can be calculated in two different ways.
-    // Usual calculation is G + A - GOT what means an offset in GOT table
-    // (R_GOT_FROM_END). When instruction pointed by relocation has no base
-    // register, then relocations can be used when PIC code is disabled. In that
-    // case calculation is G + A, it resolves to an address of entry in GOT
-    // (R_GOT) and not an offset.
-    //
-    // To check that instruction has no base register we scan ModR/M byte.
-    // See "Table 2-2. 32-Bit Addressing Forms with the ModR/M Byte"
-    // (http://www.intel.com/content/dam/www/public/us/en/documents/manuals/
-    //  64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf)
-    if ((Loc[-1] & 0xc7) != 0x5)
-      return R_GOT_FROM_END;
-    if (Config->Pic)
-      error(toString(S.File) + ": relocation " + toString(Type) + " against '" +
-            S.getName() +
-            "' without base register can not be used when PIC enabled");
-    return R_GOT;
-  case R_386_TLS_GOTIE:
-    return R_GOT_FROM_END;
-  case R_386_GOTOFF:
-    return R_GOTREL_FROM_END;
-  case R_386_TLS_LE:
-    return R_TLS;
-  case R_386_TLS_LE_32:
-    return R_NEG_TLS;
-  case R_386_NONE:
-    return R_NONE;
-  default:
-    error(toString(S.File) + ": unknown relocation type: " + toString(Type));
-    return R_HINT;
-  }
-}
-
-RelExpr X86TargetInfo::adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
-                                       RelExpr Expr) const {
-  switch (Expr) {
-  default:
-    return Expr;
-  case R_RELAX_TLS_GD_TO_IE:
-    return R_RELAX_TLS_GD_TO_IE_END;
-  case R_RELAX_TLS_GD_TO_LE:
-    return R_RELAX_TLS_GD_TO_LE_NEG;
-  }
-}
-
-void X86TargetInfo::writeGotPltHeader(uint8_t *Buf) const {
-  write32le(Buf, InX::Dynamic->getVA());
-}
-
-void X86TargetInfo::writeGotPlt(uint8_t *Buf, const SymbolBody &S) const {
-  // Entries in .got.plt initially points back to the corresponding
-  // PLT entries with a fixed offset to skip the first instruction.
-  write32le(Buf, S.getPltVA() + 6);
-}
-
-void X86TargetInfo::writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const {
-  // An x86 entry is the address of the ifunc resolver function.
-  write32le(Buf, S.getVA());
-}
-
-uint32_t X86TargetInfo::getDynRel(uint32_t Type) const {
-  if (Type == R_386_TLS_LE)
-    return R_386_TLS_TPOFF;
-  if (Type == R_386_TLS_LE_32)
-    return R_386_TLS_TPOFF32;
-  return Type;
-}
-
-void X86TargetInfo::writePltHeader(uint8_t *Buf) const {
-  if (Config->Pic) {
-    const uint8_t V[] = {
-        0xff, 0xb3, 0x04, 0x00, 0x00, 0x00, // pushl GOTPLT+4(%ebx)
-        0xff, 0xa3, 0x08, 0x00, 0x00, 0x00, // jmp *GOTPLT+8(%ebx)
-        0x90, 0x90, 0x90, 0x90              // nop
-    };
-    memcpy(Buf, V, sizeof(V));
-
-    uint32_t Ebx = InX::Got->getVA() + InX::Got->getSize();
-    uint32_t GotPlt = InX::GotPlt->getVA() - Ebx;
-    write32le(Buf + 2, GotPlt + 4);
-    write32le(Buf + 8, GotPlt + 8);
-    return;
-  }
-
-  const uint8_t PltData[] = {
-      0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushl (GOTPLT+4)
-      0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *(GOTPLT+8)
-      0x90, 0x90, 0x90, 0x90              // nop
-  };
-  memcpy(Buf, PltData, sizeof(PltData));
-  uint32_t GotPlt = InX::GotPlt->getVA();
-  write32le(Buf + 2, GotPlt + 4);
-  write32le(Buf + 8, GotPlt + 8);
-}
-
-void X86TargetInfo::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
-                             uint64_t PltEntryAddr, int32_t Index,
-                             unsigned RelOff) const {
-  const uint8_t Inst[] = {
-      0xff, 0x00, 0x00, 0x00, 0x00, 0x00, // jmp *foo_in_GOT|*foo@GOT(%ebx)
-      0x68, 0x00, 0x00, 0x00, 0x00,       // pushl $reloc_offset
-      0xe9, 0x00, 0x00, 0x00, 0x00        // jmp .PLT0@PC
-  };
-  memcpy(Buf, Inst, sizeof(Inst));
-
-  if (Config->Pic) {
-    // jmp *foo@GOT(%ebx)
-    uint32_t Ebx = InX::Got->getVA() + InX::Got->getSize();
-    Buf[1] = 0xa3;
-    write32le(Buf + 2, GotPltEntryAddr - Ebx);
-  } else {
-    // jmp *foo_in_GOT
-    Buf[1] = 0x25;
-    write32le(Buf + 2, GotPltEntryAddr);
-  }
-
-  write32le(Buf + 7, RelOff);
-  write32le(Buf + 12, -Index * PltEntrySize - PltHeaderSize - 16);
-}
-
-int64_t X86TargetInfo::getImplicitAddend(const uint8_t *Buf,
-                                         uint32_t Type) const {
-  switch (Type) {
-  default:
-    return 0;
-  case R_386_8:
-  case R_386_PC8:
-    return SignExtend64<8>(*Buf);
-  case R_386_16:
-  case R_386_PC16:
-    return SignExtend64<16>(read16le(Buf));
-  case R_386_32:
-  case R_386_GOT32:
-  case R_386_GOT32X:
-  case R_386_GOTOFF:
-  case R_386_GOTPC:
-  case R_386_PC32:
-  case R_386_PLT32:
-  case R_386_TLS_LDO_32:
-  case R_386_TLS_LE:
-    return SignExtend64<32>(read32le(Buf));
-  }
-}
-
-void X86TargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
-                                uint64_t Val) const {
-  // R_386_{PC,}{8,16} are not part of the i386 psABI, but they are
-  // being used for some 16-bit programs such as boot loaders, so
-  // we want to support them.
-  switch (Type) {
-  case R_386_8:
-    checkUInt<8>(Loc, Val, Type);
-    *Loc = Val;
-    break;
-  case R_386_PC8:
-    checkInt<8>(Loc, Val, Type);
-    *Loc = Val;
-    break;
-  case R_386_16:
-    checkUInt<16>(Loc, Val, Type);
-    write16le(Loc, Val);
-    break;
-  case R_386_PC16:
-    // R_386_PC16 is normally used with 16 bit code. In that situation
-    // the PC is 16 bits, just like the addend. This means that it can
-    // point from any 16 bit address to any other if the possibility
-    // of wrapping is included.
-    // The only restriction we have to check then is that the destination
-    // address fits in 16 bits. That is impossible to do here. The problem is
-    // that we are passed the final value, which already had the
-    // current location subtracted from it.
-    // We just check that Val fits in 17 bits. This misses some cases, but
-    // should have no false positives.
-    checkInt<17>(Loc, Val, Type);
-    write16le(Loc, Val);
-    break;
-  default:
-    checkInt<32>(Loc, Val, Type);
-    write32le(Loc, Val);
-  }
-}
-
-void X86TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type,
-                                   uint64_t Val) const {
-  // Convert
-  //   leal x@tlsgd(, %ebx, 1),
-  //   call __tls_get_addr@plt
-  // to
-  //   movl %gs:0,%eax
-  //   subl $x@ntpoff,%eax
-  const uint8_t Inst[] = {
-      0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax
-      0x81, 0xe8, 0x00, 0x00, 0x00, 0x00  // subl 0(%ebx), %eax
-  };
-  memcpy(Loc - 3, Inst, sizeof(Inst));
-  write32le(Loc + 5, Val);
-}
-
-void X86TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type,
-                                   uint64_t Val) const {
-  // Convert
-  //   leal x@tlsgd(, %ebx, 1),
-  //   call __tls_get_addr@plt
-  // to
-  //   movl %gs:0, %eax
-  //   addl x@gotntpoff(%ebx), %eax
-  const uint8_t Inst[] = {
-      0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax
-      0x03, 0x83, 0x00, 0x00, 0x00, 0x00  // addl 0(%ebx), %eax
-  };
-  memcpy(Loc - 3, Inst, sizeof(Inst));
-  write32le(Loc + 5, Val);
-}
-
-// In some conditions, relocations can be optimized to avoid using GOT.
-// This function does that for Initial Exec to Local Exec case.
-void X86TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type,
-                                   uint64_t Val) const {
-  // Ulrich's document section 6.2 says that @gotntpoff can
-  // be used with MOVL or ADDL instructions.
-  // @indntpoff is similar to @gotntpoff, but for use in
-  // position dependent code.
-  uint8_t Reg = (Loc[-1] >> 3) & 7;
-
-  if (Type == R_386_TLS_IE) {
-    if (Loc[-1] == 0xa1) {
-      // "movl foo@indntpoff,%eax" -> "movl $foo,%eax"
-      // This case is different from the generic case below because
-      // this is a 5 byte instruction while below is 6 bytes.
-      Loc[-1] = 0xb8;
-    } else if (Loc[-2] == 0x8b) {
-      // "movl foo@indntpoff,%reg" -> "movl $foo,%reg"
-      Loc[-2] = 0xc7;
-      Loc[-1] = 0xc0 | Reg;
-    } else {
-      // "addl foo@indntpoff,%reg" -> "addl $foo,%reg"
-      Loc[-2] = 0x81;
-      Loc[-1] = 0xc0 | Reg;
-    }
-  } else {
-    assert(Type == R_386_TLS_GOTIE);
-    if (Loc[-2] == 0x8b) {
-      // "movl foo@gottpoff(%rip),%reg" -> "movl $foo,%reg"
-      Loc[-2] = 0xc7;
-      Loc[-1] = 0xc0 | Reg;
-    } else {
-      // "addl foo@gotntpoff(%rip),%reg" -> "leal foo(%reg),%reg"
-      Loc[-2] = 0x8d;
-      Loc[-1] = 0x80 | (Reg << 3) | Reg;
-    }
-  }
-  write32le(Loc, Val);
-}
-
-void X86TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint32_t Type,
-                                   uint64_t Val) const {
-  if (Type == R_386_TLS_LDO_32) {
-    write32le(Loc, Val);
-    return;
-  }
-
-  // Convert
-  //   leal foo(%reg),%eax
-  //   call ___tls_get_addr
-  // to
-  //   movl %gs:0,%eax
-  //   nop
-  //   leal 0(%esi,1),%esi
-  const uint8_t Inst[] = {
-      0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0,%eax
-      0x90,                               // nop
-      0x8d, 0x74, 0x26, 0x00              // leal 0(%esi,1),%esi
-  };
-  memcpy(Loc - 2, Inst, sizeof(Inst));
-}
-
-template <class ELFT> X86_64TargetInfo<ELFT>::X86_64TargetInfo() {
-  CopyRel = R_X86_64_COPY;
-  GotRel = R_X86_64_GLOB_DAT;
-  PltRel = R_X86_64_JUMP_SLOT;
-  RelativeRel = R_X86_64_RELATIVE;
-  IRelativeRel = R_X86_64_IRELATIVE;
-  TlsGotRel = R_X86_64_TPOFF64;
-  TlsModuleIndexRel = R_X86_64_DTPMOD64;
-  TlsOffsetRel = R_X86_64_DTPOFF64;
-  GotEntrySize = 8;
-  GotPltEntrySize = 8;
-  PltEntrySize = 16;
-  PltHeaderSize = 16;
-  TlsGdRelaxSkip = 2;
-  // Align to the large page size (known as a superpage or huge page).
-  // FreeBSD automatically promotes large, superpage-aligned allocations.
-  DefaultImageBase = 0x200000;
-  // 0xCC is the "int3" (call debug exception handler) instruction.
-  TrapInstr = 0xcccccccc;
-}
-
-template <class ELFT>
-RelExpr X86_64TargetInfo<ELFT>::getRelExpr(uint32_t Type, const SymbolBody &S,
-                                           const uint8_t *Loc) const {
-  switch (Type) {
-  case R_X86_64_8:
-  case R_X86_64_16:
-  case R_X86_64_32:
-  case R_X86_64_32S:
-  case R_X86_64_64:
-  case R_X86_64_DTPOFF32:
-  case R_X86_64_DTPOFF64:
-    return R_ABS;
-  case R_X86_64_TPOFF32:
-    return R_TLS;
-  case R_X86_64_TLSLD:
-    return R_TLSLD_PC;
-  case R_X86_64_TLSGD:
-    return R_TLSGD_PC;
-  case R_X86_64_SIZE32:
-  case R_X86_64_SIZE64:
-    return R_SIZE;
-  case R_X86_64_PLT32:
-    return R_PLT_PC;
-  case R_X86_64_PC32:
-  case R_X86_64_PC64:
-    return R_PC;
-  case R_X86_64_GOT32:
-  case R_X86_64_GOT64:
-    return R_GOT_FROM_END;
-  case R_X86_64_GOTPCREL:
-  case R_X86_64_GOTPCRELX:
-  case R_X86_64_REX_GOTPCRELX:
-  case R_X86_64_GOTTPOFF:
-    return R_GOT_PC;
-  case R_X86_64_NONE:
-    return R_NONE;
-  default:
-    error(toString(S.File) + ": unknown relocation type: " + toString(Type));
-    return R_HINT;
-  }
-}
-
-template <class ELFT>
-void X86_64TargetInfo<ELFT>::writeGotPltHeader(uint8_t *Buf) const {
-  // The first entry holds the value of _DYNAMIC. It is not clear why that is
-  // required, but it is documented in the psabi and the glibc dynamic linker
-  // seems to use it (note that this is relevant for linking ld.so, not any
-  // other program).
-  write64le(Buf, InX::Dynamic->getVA());
-}
-
-template <class ELFT>
-void X86_64TargetInfo<ELFT>::writeGotPlt(uint8_t *Buf,
-                                         const SymbolBody &S) const {
-  // See comments in X86TargetInfo::writeGotPlt.
-  write32le(Buf, S.getPltVA() + 6);
-}
-
-template <class ELFT>
-void X86_64TargetInfo<ELFT>::writePltHeader(uint8_t *Buf) const {
-  const uint8_t PltData[] = {
-      0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushq GOTPLT+8(%rip)
-      0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *GOTPLT+16(%rip)
-      0x0f, 0x1f, 0x40, 0x00              // nop
-  };
-  memcpy(Buf, PltData, sizeof(PltData));
-  uint64_t GotPlt = InX::GotPlt->getVA();
-  uint64_t Plt = InX::Plt->getVA();
-  write32le(Buf + 2, GotPlt - Plt + 2); // GOTPLT+8
-  write32le(Buf + 8, GotPlt - Plt + 4); // GOTPLT+16
-}
-
-template <class ELFT>
-void X86_64TargetInfo<ELFT>::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
-                                      uint64_t PltEntryAddr, int32_t Index,
-                                      unsigned RelOff) const {
-  const uint8_t Inst[] = {
-      0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmpq *got(%rip)
-      0x68, 0x00, 0x00, 0x00, 0x00,       // pushq <relocation index>
-      0xe9, 0x00, 0x00, 0x00, 0x00        // jmpq plt[0]
-  };
-  memcpy(Buf, Inst, sizeof(Inst));
-
-  write32le(Buf + 2, GotPltEntryAddr - PltEntryAddr - 6);
-  write32le(Buf + 7, Index);
-  write32le(Buf + 12, -Index * PltEntrySize - PltHeaderSize - 16);
-}
-
-template <class ELFT>
-bool X86_64TargetInfo<ELFT>::isPicRel(uint32_t Type) const {
-  return Type != R_X86_64_PC32 && Type != R_X86_64_32 &&
-         Type != R_X86_64_TPOFF32;
-}
-
-template <class ELFT>
-void X86_64TargetInfo<ELFT>::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type,
-                                            uint64_t Val) const {
-  // Convert
-  //   .byte 0x66
-  //   leaq x@tlsgd(%rip), %rdi
-  //   .word 0x6666
-  //   rex64
-  //   call __tls_get_addr@plt
-  // to
-  //   mov %fs:0x0,%rax
-  //   lea x@tpoff,%rax
-  const uint8_t Inst[] = {
-      0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax
-      0x48, 0x8d, 0x80, 0x00, 0x00, 0x00, 0x00              // lea x@tpoff,%rax
-  };
-  memcpy(Loc - 4, Inst, sizeof(Inst));
-
-  // The original code used a pc relative relocation and so we have to
-  // compensate for the -4 in had in the addend.
-  write32le(Loc + 8, Val + 4);
-}
-
-template <class ELFT>
-void X86_64TargetInfo<ELFT>::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type,
-                                            uint64_t Val) const {
-  // Convert
-  //   .byte 0x66
-  //   leaq x@tlsgd(%rip), %rdi
-  //   .word 0x6666
-  //   rex64
-  //   call __tls_get_addr@plt
-  // to
-  //   mov %fs:0x0,%rax
-  //   addq x@tpoff,%rax
-  const uint8_t Inst[] = {
-      0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax
-      0x48, 0x03, 0x05, 0x00, 0x00, 0x00, 0x00              // addq x@tpoff,%rax
-  };
-  memcpy(Loc - 4, Inst, sizeof(Inst));
-
-  // Both code sequences are PC relatives, but since we are moving the constant
-  // forward by 8 bytes we have to subtract the value by 8.
-  write32le(Loc + 8, Val - 8);
-}
-
-// In some conditions, R_X86_64_GOTTPOFF relocation can be optimized to
-// R_X86_64_TPOFF32 so that it does not use GOT.
-template <class ELFT>
-void X86_64TargetInfo<ELFT>::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type,
-                                            uint64_t Val) const {
-  uint8_t *Inst = Loc - 3;
-  uint8_t Reg = Loc[-1] >> 3;
-  uint8_t *RegSlot = Loc - 1;
-
-  // Note that ADD with RSP or R12 is converted to ADD instead of LEA
-  // because LEA with these registers needs 4 bytes to encode and thus
-  // wouldn't fit the space.
-
-  if (memcmp(Inst, "\x48\x03\x25", 3) == 0) {
-    // "addq foo@gottpoff(%rip),%rsp" -> "addq $foo,%rsp"
-    memcpy(Inst, "\x48\x81\xc4", 3);
-  } else if (memcmp(Inst, "\x4c\x03\x25", 3) == 0) {
-    // "addq foo@gottpoff(%rip),%r12" -> "addq $foo,%r12"
-    memcpy(Inst, "\x49\x81\xc4", 3);
-  } else if (memcmp(Inst, "\x4c\x03", 2) == 0) {
-    // "addq foo@gottpoff(%rip),%r[8-15]" -> "leaq foo(%r[8-15]),%r[8-15]"
-    memcpy(Inst, "\x4d\x8d", 2);
-    *RegSlot = 0x80 | (Reg << 3) | Reg;
-  } else if (memcmp(Inst, "\x48\x03", 2) == 0) {
-    // "addq foo@gottpoff(%rip),%reg -> "leaq foo(%reg),%reg"
-    memcpy(Inst, "\x48\x8d", 2);
-    *RegSlot = 0x80 | (Reg << 3) | Reg;
-  } else if (memcmp(Inst, "\x4c\x8b", 2) == 0) {
-    // "movq foo@gottpoff(%rip),%r[8-15]" -> "movq $foo,%r[8-15]"
-    memcpy(Inst, "\x49\xc7", 2);
-    *RegSlot = 0xc0 | Reg;
-  } else if (memcmp(Inst, "\x48\x8b", 2) == 0) {
-    // "movq foo@gottpoff(%rip),%reg" -> "movq $foo,%reg"
-    memcpy(Inst, "\x48\xc7", 2);
-    *RegSlot = 0xc0 | Reg;
-  } else {
-    error(getErrorLocation(Loc - 3) +
-          "R_X86_64_GOTTPOFF must be used in MOVQ or ADDQ instructions only");
-  }
-
-  // The original code used a PC relative relocation.
-  // Need to compensate for the -4 it had in the addend.
-  write32le(Loc, Val + 4);
-}
-
-template <class ELFT>
-void X86_64TargetInfo<ELFT>::relaxTlsLdToLe(uint8_t *Loc, uint32_t Type,
-                                            uint64_t Val) const {
-  // Convert
-  //   leaq bar@tlsld(%rip), %rdi
-  //   callq __tls_get_addr@PLT
-  //   leaq bar@dtpoff(%rax), %rcx
-  // to
-  //   .word 0x6666
-  //   .byte 0x66
-  //   mov %fs:0,%rax
-  //   leaq bar@tpoff(%rax), %rcx
-  if (Type == R_X86_64_DTPOFF64) {
-    write64le(Loc, Val);
-    return;
-  }
-  if (Type == R_X86_64_DTPOFF32) {
-    write32le(Loc, Val);
-    return;
-  }
-
-  const uint8_t Inst[] = {
-      0x66, 0x66,                                          // .word 0x6666
-      0x66,                                                // .byte 0x66
-      0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00 // mov %fs:0,%rax
-  };
-  memcpy(Loc - 3, Inst, sizeof(Inst));
-}
-
-template <class ELFT>
-void X86_64TargetInfo<ELFT>::relocateOne(uint8_t *Loc, uint32_t Type,
-                                         uint64_t Val) const {
-  switch (Type) {
-  case R_X86_64_8:
-    checkUInt<8>(Loc, Val, Type);
-    *Loc = Val;
-    break;
-  case R_X86_64_16:
-    checkUInt<16>(Loc, Val, Type);
-    write16le(Loc, Val);
-    break;
-  case R_X86_64_32:
-    checkUInt<32>(Loc, Val, Type);
-    write32le(Loc, Val);
-    break;
-  case R_X86_64_32S:
-  case R_X86_64_TPOFF32:
-  case R_X86_64_GOT32:
-  case R_X86_64_GOTPCREL:
-  case R_X86_64_GOTPCRELX:
-  case R_X86_64_REX_GOTPCRELX:
-  case R_X86_64_PC32:
-  case R_X86_64_GOTTPOFF:
-  case R_X86_64_PLT32:
-  case R_X86_64_TLSGD:
-  case R_X86_64_TLSLD:
-  case R_X86_64_DTPOFF32:
-  case R_X86_64_SIZE32:
-    checkInt<32>(Loc, Val, Type);
-    write32le(Loc, Val);
-    break;
-  case R_X86_64_64:
-  case R_X86_64_DTPOFF64:
-  case R_X86_64_GLOB_DAT:
-  case R_X86_64_PC64:
-  case R_X86_64_SIZE64:
-  case R_X86_64_GOT64:
-    write64le(Loc, Val);
-    break;
-  default:
-    llvm_unreachable("unexpected relocation");
-  }
-}
-
-template <class ELFT>
-RelExpr X86_64TargetInfo<ELFT>::adjustRelaxExpr(uint32_t Type,
-                                                const uint8_t *Data,
-                                                RelExpr RelExpr) const {
-  if (Type != R_X86_64_GOTPCRELX && Type != R_X86_64_REX_GOTPCRELX)
-    return RelExpr;
-  const uint8_t Op = Data[-2];
-  const uint8_t ModRm = Data[-1];
-
-  // FIXME: When PIC is disabled and foo is defined locally in the
-  // lower 32 bit address space, memory operand in mov can be converted into
-  // immediate operand. Otherwise, mov must be changed to lea. We support only
-  // latter relaxation at this moment.
-  if (Op == 0x8b)
-    return R_RELAX_GOT_PC;
-
-  // Relax call and jmp.
-  if (Op == 0xff && (ModRm == 0x15 || ModRm == 0x25))
-    return R_RELAX_GOT_PC;
-
-  // Relaxation of test, adc, add, and, cmp, or, sbb, sub, xor.
-  // If PIC then no relaxation is available.
-  // We also don't relax test/binop instructions without REX byte,
-  // they are 32bit operations and not common to have.
-  assert(Type == R_X86_64_REX_GOTPCRELX);
-  return Config->Pic ? RelExpr : R_RELAX_GOT_PC_NOPIC;
-}
-
-// A subset of relaxations can only be applied for no-PIC. This method
-// handles such relaxations. Instructions encoding information was taken from:
-// "Intel 64 and IA-32 Architectures Software Developer's Manual V2"
-// (http://www.intel.com/content/dam/www/public/us/en/documents/manuals/
-//    64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf)
-template <class ELFT>
-void X86_64TargetInfo<ELFT>::relaxGotNoPic(uint8_t *Loc, uint64_t Val,
-                                           uint8_t Op, uint8_t ModRm) const {
-  const uint8_t Rex = Loc[-3];
-  // Convert "test %reg, foo@GOTPCREL(%rip)" to "test $foo, %reg".
-  if (Op == 0x85) {
-    // See "TEST-Logical Compare" (4-428 Vol. 2B),
-    // TEST r/m64, r64 uses "full" ModR / M byte (no opcode extension).
-
-    // ModR/M byte has form XX YYY ZZZ, where
-    // YYY is MODRM.reg(register 2), ZZZ is MODRM.rm(register 1).
-    // XX has different meanings:
-    // 00: The operand's memory address is in reg1.
-    // 01: The operand's memory address is reg1 + a byte-sized displacement.
-    // 10: The operand's memory address is reg1 + a word-sized displacement.
-    // 11: The operand is reg1 itself.
-    // If an instruction requires only one operand, the unused reg2 field
-    // holds extra opcode bits rather than a register code
-    // 0xC0 == 11 000 000 binary.
-    // 0x38 == 00 111 000 binary.
-    // We transfer reg2 to reg1 here as operand.
-    // See "2.1.3 ModR/M and SIB Bytes" (Vol. 2A 2-3).
-    Loc[-1] = 0xc0 | (ModRm & 0x38) >> 3; // ModR/M byte.
-
-    // Change opcode from TEST r/m64, r64 to TEST r/m64, imm32
-    // See "TEST-Logical Compare" (4-428 Vol. 2B).
-    Loc[-2] = 0xf7;
-
-    // Move R bit to the B bit in REX byte.
-    // REX byte is encoded as 0100WRXB, where
-    // 0100 is 4bit fixed pattern.
-    // REX.W When 1, a 64-bit operand size is used. Otherwise, when 0, the
-    //   default operand size is used (which is 32-bit for most but not all
-    //   instructions).
-    // REX.R This 1-bit value is an extension to the MODRM.reg field.
-    // REX.X This 1-bit value is an extension to the SIB.index field.
-    // REX.B This 1-bit value is an extension to the MODRM.rm field or the
-    // SIB.base field.
-    // See "2.2.1.2 More on REX Prefix Fields " (2-8 Vol. 2A).
-    Loc[-3] = (Rex & ~0x4) | (Rex & 0x4) >> 2;
-    write32le(Loc, Val);
-    return;
-  }
-
-  // If we are here then we need to relax the adc, add, and, cmp, or, sbb, sub
-  // or xor operations.
-
-  // Convert "binop foo@GOTPCREL(%rip), %reg" to "binop $foo, %reg".
-  // Logic is close to one for test instruction above, but we also
-  // write opcode extension here, see below for details.
-  Loc[-1] = 0xc0 | (ModRm & 0x38) >> 3 | (Op & 0x3c); // ModR/M byte.
-
-  // Primary opcode is 0x81, opcode extension is one of:
-  // 000b = ADD, 001b is OR, 010b is ADC, 011b is SBB,
-  // 100b is AND, 101b is SUB, 110b is XOR, 111b is CMP.
-  // This value was wrote to MODRM.reg in a line above.
-  // See "3.2 INSTRUCTIONS (A-M)" (Vol. 2A 3-15),
-  // "INSTRUCTION SET REFERENCE, N-Z" (Vol. 2B 4-1) for
-  // descriptions about each operation.
-  Loc[-2] = 0x81;
-  Loc[-3] = (Rex & ~0x4) | (Rex & 0x4) >> 2;
-  write32le(Loc, Val);
-}
-
-template <class ELFT>
-void X86_64TargetInfo<ELFT>::relaxGot(uint8_t *Loc, uint64_t Val) const {
-  const uint8_t Op = Loc[-2];
-  const uint8_t ModRm = Loc[-1];
-
-  // Convert "mov foo@GOTPCREL(%rip),%reg" to "lea foo(%rip),%reg".
-  if (Op == 0x8b) {
-    Loc[-2] = 0x8d;
-    write32le(Loc, Val);
-    return;
-  }
-
-  if (Op != 0xff) {
-    // We are relaxing a rip relative to an absolute, so compensate
-    // for the old -4 addend.
-    assert(!Config->Pic);
-    relaxGotNoPic(Loc, Val + 4, Op, ModRm);
-    return;
-  }
-
-  // Convert call/jmp instructions.
-  if (ModRm == 0x15) {
-    // ABI says we can convert "call *foo@GOTPCREL(%rip)" to "nop; call foo".
-    // Instead we convert to "addr32 call foo" where addr32 is an instruction
-    // prefix. That makes result expression to be a single instruction.
-    Loc[-2] = 0x67; // addr32 prefix
-    Loc[-1] = 0xe8; // call
-    write32le(Loc, Val);
-    return;
-  }
-
-  // Convert "jmp *foo@GOTPCREL(%rip)" to "jmp foo; nop".
-  // jmp doesn't return, so it is fine to use nop here, it is just a stub.
-  assert(ModRm == 0x25);
-  Loc[-2] = 0xe9; // jmp
-  Loc[3] = 0x90;  // nop
-  write32le(Loc - 1, Val + 1);
-}
-
-// Relocation masks following the #lo(value), #hi(value), #ha(value),
-// #higher(value), #highera(value), #highest(value), and #highesta(value)
-// macros defined in section 4.5.1. Relocation Types of the PPC-elf64abi
-// document.
-static uint16_t applyPPCLo(uint64_t V) { return V; }
-static uint16_t applyPPCHi(uint64_t V) { return V >> 16; }
-static uint16_t applyPPCHa(uint64_t V) { return (V + 0x8000) >> 16; }
-static uint16_t applyPPCHigher(uint64_t V) { return V >> 32; }
-static uint16_t applyPPCHighera(uint64_t V) { return (V + 0x8000) >> 32; }
-static uint16_t applyPPCHighest(uint64_t V) { return V >> 48; }
-static uint16_t applyPPCHighesta(uint64_t V) { return (V + 0x8000) >> 48; }
-
-PPCTargetInfo::PPCTargetInfo() {}
-
-void PPCTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
-                                uint64_t Val) const {
-  switch (Type) {
-  case R_PPC_ADDR16_HA:
-    write16be(Loc, applyPPCHa(Val));
-    break;
-  case R_PPC_ADDR16_LO:
-    write16be(Loc, applyPPCLo(Val));
-    break;
-  case R_PPC_ADDR32:
-  case R_PPC_REL32:
-    write32be(Loc, Val);
-    break;
-  case R_PPC_REL24:
-    or32be(Loc, Val & 0x3FFFFFC);
-    break;
-  default:
-    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
-  }
-}
-
-RelExpr PPCTargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S,
-                                  const uint8_t *Loc) const {
-  switch (Type) {
-  case R_PPC_REL24:
-  case R_PPC_REL32:
-    return R_PC;
-  default:
-    return R_ABS;
-  }
-}
-
-PPC64TargetInfo::PPC64TargetInfo() {
-  PltRel = GotRel = R_PPC64_GLOB_DAT;
-  RelativeRel = R_PPC64_RELATIVE;
-  GotEntrySize = 8;
-  GotPltEntrySize = 8;
-  PltEntrySize = 32;
-  PltHeaderSize = 0;
-
-  // We need 64K pages (at least under glibc/Linux, the loader won't
-  // set different permissions on a finer granularity than that).
-  DefaultMaxPageSize = 65536;
-
-  // The PPC64 ELF ABI v1 spec, says:
-  //
-  //   It is normally desirable to put segments with different characteristics
-  //   in separate 256 Mbyte portions of the address space, to give the
-  //   operating system full paging flexibility in the 64-bit address space.
-  //
-  // And because the lowest non-zero 256M boundary is 0x10000000, PPC64 linkers
-  // use 0x10000000 as the starting address.
-  DefaultImageBase = 0x10000000;
-}
-
-static uint64_t PPC64TocOffset = 0x8000;
-
-uint64_t getPPC64TocBase() {
-  // The TOC consists of sections .got, .toc, .tocbss, .plt in that order. The
-  // TOC starts where the first of these sections starts. We always create a
-  // .got when we see a relocation that uses it, so for us the start is always
-  // the .got.
-  uint64_t TocVA = InX::Got->getVA();
-
-  // Per the ppc64-elf-linux ABI, The TOC base is TOC value plus 0x8000
-  // thus permitting a full 64 Kbytes segment. Note that the glibc startup
-  // code (crt1.o) assumes that you can get from the TOC base to the
-  // start of the .toc section with only a single (signed) 16-bit relocation.
-  return TocVA + PPC64TocOffset;
-}
-
-RelExpr PPC64TargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S,
-                                    const uint8_t *Loc) const {
-  switch (Type) {
-  default:
-    return R_ABS;
-  case R_PPC64_TOC16:
-  case R_PPC64_TOC16_DS:
-  case R_PPC64_TOC16_HA:
-  case R_PPC64_TOC16_HI:
-  case R_PPC64_TOC16_LO:
-  case R_PPC64_TOC16_LO_DS:
-    return R_GOTREL;
-  case R_PPC64_TOC:
-    return R_PPC_TOC;
-  case R_PPC64_REL24:
-    return R_PPC_PLT_OPD;
-  }
-}
-
-void PPC64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
-                               uint64_t PltEntryAddr, int32_t Index,
-                               unsigned RelOff) const {
-  uint64_t Off = GotPltEntryAddr - getPPC64TocBase();
-
-  // FIXME: What we should do, in theory, is get the offset of the function
-  // descriptor in the .opd section, and use that as the offset from %r2 (the
-  // TOC-base pointer). Instead, we have the GOT-entry offset, and that will
-  // be a pointer to the function descriptor in the .opd section. Using
-  // this scheme is simpler, but requires an extra indirection per PLT dispatch.
-
-  write32be(Buf, 0xf8410028);                       // std %r2, 40(%r1)
-  write32be(Buf + 4, 0x3d620000 | applyPPCHa(Off)); // addis %r11, %r2, X@ha
-  write32be(Buf + 8, 0xe98b0000 | applyPPCLo(Off)); // ld %r12, X@l(%r11)
-  write32be(Buf + 12, 0xe96c0000);                  // ld %r11,0(%r12)
-  write32be(Buf + 16, 0x7d6903a6);                  // mtctr %r11
-  write32be(Buf + 20, 0xe84c0008);                  // ld %r2,8(%r12)
-  write32be(Buf + 24, 0xe96c0010);                  // ld %r11,16(%r12)
-  write32be(Buf + 28, 0x4e800420);                  // bctr
-}
-
-static std::pair<uint32_t, uint64_t> toAddr16Rel(uint32_t Type, uint64_t Val) {
-  uint64_t V = Val - PPC64TocOffset;
-  switch (Type) {
-  case R_PPC64_TOC16:
-    return {R_PPC64_ADDR16, V};
-  case R_PPC64_TOC16_DS:
-    return {R_PPC64_ADDR16_DS, V};
-  case R_PPC64_TOC16_HA:
-    return {R_PPC64_ADDR16_HA, V};
-  case R_PPC64_TOC16_HI:
-    return {R_PPC64_ADDR16_HI, V};
-  case R_PPC64_TOC16_LO:
-    return {R_PPC64_ADDR16_LO, V};
-  case R_PPC64_TOC16_LO_DS:
-    return {R_PPC64_ADDR16_LO_DS, V};
-  default:
-    return {Type, Val};
-  }
-}
-
-void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
-                                  uint64_t Val) const {
-  // For a TOC-relative relocation, proceed in terms of the corresponding
-  // ADDR16 relocation type.
-  std::tie(Type, Val) = toAddr16Rel(Type, Val);
-
-  switch (Type) {
-  case R_PPC64_ADDR14: {
-    checkAlignment<4>(Loc, Val, Type);
-    // Preserve the AA/LK bits in the branch instruction
-    uint8_t AALK = Loc[3];
-    write16be(Loc + 2, (AALK & 3) | (Val & 0xfffc));
-    break;
-  }
-  case R_PPC64_ADDR16:
-    checkInt<16>(Loc, Val, Type);
-    write16be(Loc, Val);
-    break;
-  case R_PPC64_ADDR16_DS:
-    checkInt<16>(Loc, Val, Type);
-    write16be(Loc, (read16be(Loc) & 3) | (Val & ~3));
-    break;
-  case R_PPC64_ADDR16_HA:
-  case R_PPC64_REL16_HA:
-    write16be(Loc, applyPPCHa(Val));
-    break;
-  case R_PPC64_ADDR16_HI:
-  case R_PPC64_REL16_HI:
-    write16be(Loc, applyPPCHi(Val));
-    break;
-  case R_PPC64_ADDR16_HIGHER:
-    write16be(Loc, applyPPCHigher(Val));
-    break;
-  case R_PPC64_ADDR16_HIGHERA:
-    write16be(Loc, applyPPCHighera(Val));
-    break;
-  case R_PPC64_ADDR16_HIGHEST:
-    write16be(Loc, applyPPCHighest(Val));
-    break;
-  case R_PPC64_ADDR16_HIGHESTA:
-    write16be(Loc, applyPPCHighesta(Val));
-    break;
-  case R_PPC64_ADDR16_LO:
-    write16be(Loc, applyPPCLo(Val));
-    break;
-  case R_PPC64_ADDR16_LO_DS:
-  case R_PPC64_REL16_LO:
-    write16be(Loc, (read16be(Loc) & 3) | (applyPPCLo(Val) & ~3));
-    break;
-  case R_PPC64_ADDR32:
-  case R_PPC64_REL32:
-    checkInt<32>(Loc, Val, Type);
-    write32be(Loc, Val);
-    break;
-  case R_PPC64_ADDR64:
-  case R_PPC64_REL64:
-  case R_PPC64_TOC:
-    write64be(Loc, Val);
-    break;
-  case R_PPC64_REL24: {
-    uint32_t Mask = 0x03FFFFFC;
-    checkInt<24>(Loc, Val, Type);
-    write32be(Loc, (read32be(Loc) & ~Mask) | (Val & Mask));
-    break;
-  }
-  default:
-    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
-  }
-}
-
-AArch64TargetInfo::AArch64TargetInfo() {
-  CopyRel = R_AARCH64_COPY;
-  RelativeRel = R_AARCH64_RELATIVE;
-  IRelativeRel = R_AARCH64_IRELATIVE;
-  GotRel = R_AARCH64_GLOB_DAT;
-  PltRel = R_AARCH64_JUMP_SLOT;
-  TlsDescRel = R_AARCH64_TLSDESC;
-  TlsGotRel = R_AARCH64_TLS_TPREL64;
-  GotEntrySize = 8;
-  GotPltEntrySize = 8;
-  PltEntrySize = 16;
-  PltHeaderSize = 32;
-  DefaultMaxPageSize = 65536;
-
-  // It doesn't seem to be documented anywhere, but tls on aarch64 uses variant
-  // 1 of the tls structures and the tcb size is 16.
-  TcbSize = 16;
-}
-
-RelExpr AArch64TargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S,
-                                      const uint8_t *Loc) const {
-  switch (Type) {
-  default:
-    return R_ABS;
-  case R_AARCH64_TLSDESC_ADR_PAGE21:
-    return R_TLSDESC_PAGE;
-  case R_AARCH64_TLSDESC_LD64_LO12:
-  case R_AARCH64_TLSDESC_ADD_LO12:
-    return R_TLSDESC;
-  case R_AARCH64_TLSDESC_CALL:
-    return R_TLSDESC_CALL;
-  case R_AARCH64_TLSLE_ADD_TPREL_HI12:
-  case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
-    return R_TLS;
-  case R_AARCH64_CALL26:
-  case R_AARCH64_CONDBR19:
-  case R_AARCH64_JUMP26:
-  case R_AARCH64_TSTBR14:
-    return R_PLT_PC;
-  case R_AARCH64_PREL16:
-  case R_AARCH64_PREL32:
-  case R_AARCH64_PREL64:
-  case R_AARCH64_ADR_PREL_LO21:
-    return R_PC;
-  case R_AARCH64_ADR_PREL_PG_HI21:
-    return R_PAGE_PC;
-  case R_AARCH64_LD64_GOT_LO12_NC:
-  case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
-    return R_GOT;
-  case R_AARCH64_ADR_GOT_PAGE:
-  case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
-    return R_GOT_PAGE_PC;
-  case R_AARCH64_NONE:
-    return R_NONE;
-  }
-}
-
-RelExpr AArch64TargetInfo::adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
-                                           RelExpr Expr) const {
-  if (Expr == R_RELAX_TLS_GD_TO_IE) {
-    if (Type == R_AARCH64_TLSDESC_ADR_PAGE21)
-      return R_RELAX_TLS_GD_TO_IE_PAGE_PC;
-    return R_RELAX_TLS_GD_TO_IE_ABS;
-  }
-  return Expr;
-}
-
-bool AArch64TargetInfo::usesOnlyLowPageBits(uint32_t Type) const {
-  switch (Type) {
-  default:
-    return false;
-  case R_AARCH64_ADD_ABS_LO12_NC:
-  case R_AARCH64_LD64_GOT_LO12_NC:
-  case R_AARCH64_LDST128_ABS_LO12_NC:
-  case R_AARCH64_LDST16_ABS_LO12_NC:
-  case R_AARCH64_LDST32_ABS_LO12_NC:
-  case R_AARCH64_LDST64_ABS_LO12_NC:
-  case R_AARCH64_LDST8_ABS_LO12_NC:
-  case R_AARCH64_TLSDESC_ADD_LO12:
-  case R_AARCH64_TLSDESC_LD64_LO12:
-  case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
-    return true;
-  }
-}
-
-bool AArch64TargetInfo::isPicRel(uint32_t Type) const {
-  return Type == R_AARCH64_ABS32 || Type == R_AARCH64_ABS64;
-}
-
-void AArch64TargetInfo::writeGotPlt(uint8_t *Buf, const SymbolBody &) const {
-  write64le(Buf, InX::Plt->getVA());
-}
-
-// Page(Expr) is the page address of the expression Expr, defined
-// as (Expr & ~0xFFF). (This applies even if the machine page size
-// supported by the platform has a different value.)
-uint64_t getAArch64Page(uint64_t Expr) {
-  return Expr & (~static_cast<uint64_t>(0xFFF));
-}
-
-void AArch64TargetInfo::writePltHeader(uint8_t *Buf) const {
-  const uint8_t PltData[] = {
-      0xf0, 0x7b, 0xbf, 0xa9, // stp	x16, x30, [sp,#-16]!
-      0x10, 0x00, 0x00, 0x90, // adrp	x16, Page(&(.plt.got[2]))
-      0x11, 0x02, 0x40, 0xf9, // ldr	x17, [x16, Offset(&(.plt.got[2]))]
-      0x10, 0x02, 0x00, 0x91, // add	x16, x16, Offset(&(.plt.got[2]))
-      0x20, 0x02, 0x1f, 0xd6, // br	x17
-      0x1f, 0x20, 0x03, 0xd5, // nop
-      0x1f, 0x20, 0x03, 0xd5, // nop
-      0x1f, 0x20, 0x03, 0xd5  // nop
-  };
-  memcpy(Buf, PltData, sizeof(PltData));
-
-  uint64_t Got = InX::GotPlt->getVA();
-  uint64_t Plt = InX::Plt->getVA();
-  relocateOne(Buf + 4, R_AARCH64_ADR_PREL_PG_HI21,
-              getAArch64Page(Got + 16) - getAArch64Page(Plt + 4));
-  relocateOne(Buf + 8, R_AARCH64_LDST64_ABS_LO12_NC, Got + 16);
-  relocateOne(Buf + 12, R_AARCH64_ADD_ABS_LO12_NC, Got + 16);
-}
-
-void AArch64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
-                                 uint64_t PltEntryAddr, int32_t Index,
-                                 unsigned RelOff) const {
-  const uint8_t Inst[] = {
-      0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[n]))
-      0x11, 0x02, 0x40, 0xf9, // ldr  x17, [x16, Offset(&(.plt.got[n]))]
-      0x10, 0x02, 0x00, 0x91, // add  x16, x16, Offset(&(.plt.got[n]))
-      0x20, 0x02, 0x1f, 0xd6  // br   x17
-  };
-  memcpy(Buf, Inst, sizeof(Inst));
-
-  relocateOne(Buf, R_AARCH64_ADR_PREL_PG_HI21,
-              getAArch64Page(GotPltEntryAddr) - getAArch64Page(PltEntryAddr));
-  relocateOne(Buf + 4, R_AARCH64_LDST64_ABS_LO12_NC, GotPltEntryAddr);
-  relocateOne(Buf + 8, R_AARCH64_ADD_ABS_LO12_NC, GotPltEntryAddr);
-}
-
-static void write32AArch64Addr(uint8_t *L, uint64_t Imm) {
-  uint32_t ImmLo = (Imm & 0x3) << 29;
-  uint32_t ImmHi = (Imm & 0x1FFFFC) << 3;
-  uint64_t Mask = (0x3 << 29) | (0x1FFFFC << 3);
-  write32le(L, (read32le(L) & ~Mask) | ImmLo | ImmHi);
-}
-
-// Return the bits [Start, End] from Val shifted Start bits.
-// For instance, getBits(0xF0, 4, 8) returns 0xF.
-static uint64_t getBits(uint64_t Val, int Start, int End) {
-  uint64_t Mask = ((uint64_t)1 << (End + 1 - Start)) - 1;
-  return (Val >> Start) & Mask;
-}
-
-// Update the immediate field in a AARCH64 ldr, str, and add instruction.
-static void or32AArch64Imm(uint8_t *L, uint64_t Imm) {
-  or32le(L, (Imm & 0xFFF) << 10);
-}
-
-void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
-                                    uint64_t Val) const {
-  switch (Type) {
-  case R_AARCH64_ABS16:
-  case R_AARCH64_PREL16:
-    checkIntUInt<16>(Loc, Val, Type);
-    write16le(Loc, Val);
-    break;
-  case R_AARCH64_ABS32:
-  case R_AARCH64_PREL32:
-    checkIntUInt<32>(Loc, Val, Type);
-    write32le(Loc, Val);
-    break;
-  case R_AARCH64_ABS64:
-  case R_AARCH64_GLOB_DAT:
-  case R_AARCH64_PREL64:
-    write64le(Loc, Val);
-    break;
-  case R_AARCH64_ADD_ABS_LO12_NC:
-    or32AArch64Imm(Loc, Val);
-    break;
-  case R_AARCH64_ADR_GOT_PAGE:
-  case R_AARCH64_ADR_PREL_PG_HI21:
-  case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
-  case R_AARCH64_TLSDESC_ADR_PAGE21:
-    checkInt<33>(Loc, Val, Type);
-    write32AArch64Addr(Loc, Val >> 12);
-    break;
-  case R_AARCH64_ADR_PREL_LO21:
-    checkInt<21>(Loc, Val, Type);
-    write32AArch64Addr(Loc, Val);
-    break;
-  case R_AARCH64_CALL26:
-  case R_AARCH64_JUMP26:
-    checkInt<28>(Loc, Val, Type);
-    or32le(Loc, (Val & 0x0FFFFFFC) >> 2);
-    break;
-  case R_AARCH64_CONDBR19:
-    checkInt<21>(Loc, Val, Type);
-    or32le(Loc, (Val & 0x1FFFFC) << 3);
-    break;
-  case R_AARCH64_LD64_GOT_LO12_NC:
-  case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
-  case R_AARCH64_TLSDESC_LD64_LO12:
-    checkAlignment<8>(Loc, Val, Type);
-    or32le(Loc, (Val & 0xFF8) << 7);
-    break;
-  case R_AARCH64_LDST8_ABS_LO12_NC:
-    or32AArch64Imm(Loc, getBits(Val, 0, 11));
-    break;
-  case R_AARCH64_LDST16_ABS_LO12_NC:
-    or32AArch64Imm(Loc, getBits(Val, 1, 11));
-    break;
-  case R_AARCH64_LDST32_ABS_LO12_NC:
-    or32AArch64Imm(Loc, getBits(Val, 2, 11));
-    break;
-  case R_AARCH64_LDST64_ABS_LO12_NC:
-    or32AArch64Imm(Loc, getBits(Val, 3, 11));
-    break;
-  case R_AARCH64_LDST128_ABS_LO12_NC:
-    or32AArch64Imm(Loc, getBits(Val, 4, 11));
-    break;
-  case R_AARCH64_MOVW_UABS_G0_NC:
-    or32le(Loc, (Val & 0xFFFF) << 5);
-    break;
-  case R_AARCH64_MOVW_UABS_G1_NC:
-    or32le(Loc, (Val & 0xFFFF0000) >> 11);
-    break;
-  case R_AARCH64_MOVW_UABS_G2_NC:
-    or32le(Loc, (Val & 0xFFFF00000000) >> 27);
-    break;
-  case R_AARCH64_MOVW_UABS_G3:
-    or32le(Loc, (Val & 0xFFFF000000000000) >> 43);
-    break;
-  case R_AARCH64_TSTBR14:
-    checkInt<16>(Loc, Val, Type);
-    or32le(Loc, (Val & 0xFFFC) << 3);
-    break;
-  case R_AARCH64_TLSLE_ADD_TPREL_HI12:
-    checkInt<24>(Loc, Val, Type);
-    or32AArch64Imm(Loc, Val >> 12);
-    break;
-  case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
-  case R_AARCH64_TLSDESC_ADD_LO12:
-    or32AArch64Imm(Loc, Val);
-    break;
-  default:
-    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
-  }
-}
-
-void AArch64TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type,
-                                       uint64_t Val) const {
-  // TLSDESC Global-Dynamic relocation are in the form:
-  //   adrp    x0, :tlsdesc:v             [R_AARCH64_TLSDESC_ADR_PAGE21]
-  //   ldr     x1, [x0, #:tlsdesc_lo12:v  [R_AARCH64_TLSDESC_LD64_LO12]
-  //   add     x0, x0, :tlsdesc_los:v     [R_AARCH64_TLSDESC_ADD_LO12]
-  //   .tlsdesccall                       [R_AARCH64_TLSDESC_CALL]
-  //   blr     x1
-  // And it can optimized to:
-  //   movz    x0, #0x0, lsl #16
-  //   movk    x0, #0x10
-  //   nop
-  //   nop
-  checkUInt<32>(Loc, Val, Type);
-
-  switch (Type) {
-  case R_AARCH64_TLSDESC_ADD_LO12:
-  case R_AARCH64_TLSDESC_CALL:
-    write32le(Loc, 0xd503201f); // nop
-    return;
-  case R_AARCH64_TLSDESC_ADR_PAGE21:
-    write32le(Loc, 0xd2a00000 | (((Val >> 16) & 0xffff) << 5)); // movz
-    return;
-  case R_AARCH64_TLSDESC_LD64_LO12:
-    write32le(Loc, 0xf2800000 | ((Val & 0xffff) << 5)); // movk
-    return;
-  default:
-    llvm_unreachable("unsupported relocation for TLS GD to LE relaxation");
-  }
-}
-
-void AArch64TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type,
-                                       uint64_t Val) const {
-  // TLSDESC Global-Dynamic relocation are in the form:
-  //   adrp    x0, :tlsdesc:v             [R_AARCH64_TLSDESC_ADR_PAGE21]
-  //   ldr     x1, [x0, #:tlsdesc_lo12:v  [R_AARCH64_TLSDESC_LD64_LO12]
-  //   add     x0, x0, :tlsdesc_los:v     [R_AARCH64_TLSDESC_ADD_LO12]
-  //   .tlsdesccall                       [R_AARCH64_TLSDESC_CALL]
-  //   blr     x1
-  // And it can optimized to:
-  //   adrp    x0, :gottprel:v
-  //   ldr     x0, [x0, :gottprel_lo12:v]
-  //   nop
-  //   nop
-
-  switch (Type) {
-  case R_AARCH64_TLSDESC_ADD_LO12:
-  case R_AARCH64_TLSDESC_CALL:
-    write32le(Loc, 0xd503201f); // nop
-    break;
-  case R_AARCH64_TLSDESC_ADR_PAGE21:
-    write32le(Loc, 0x90000000); // adrp
-    relocateOne(Loc, R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21, Val);
-    break;
-  case R_AARCH64_TLSDESC_LD64_LO12:
-    write32le(Loc, 0xf9400000); // ldr
-    relocateOne(Loc, R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC, Val);
-    break;
-  default:
-    llvm_unreachable("unsupported relocation for TLS GD to LE relaxation");
-  }
-}
-
-void AArch64TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type,
-                                       uint64_t Val) const {
-  checkUInt<32>(Loc, Val, Type);
-
-  if (Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21) {
-    // Generate MOVZ.
-    uint32_t RegNo = read32le(Loc) & 0x1f;
-    write32le(Loc, (0xd2a00000 | RegNo) | (((Val >> 16) & 0xffff) << 5));
-    return;
-  }
-  if (Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC) {
-    // Generate MOVK.
-    uint32_t RegNo = read32le(Loc) & 0x1f;
-    write32le(Loc, (0xf2800000 | RegNo) | ((Val & 0xffff) << 5));
-    return;
-  }
-  llvm_unreachable("invalid relocation for TLS IE to LE relaxation");
-}
-
-AMDGPUTargetInfo::AMDGPUTargetInfo() {
-  RelativeRel = R_AMDGPU_REL64;
-  GotRel = R_AMDGPU_ABS64;
-  GotEntrySize = 8;
-}
-
-void AMDGPUTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
-                                   uint64_t Val) const {
-  switch (Type) {
-  case R_AMDGPU_ABS32:
-  case R_AMDGPU_GOTPCREL:
-  case R_AMDGPU_GOTPCREL32_LO:
-  case R_AMDGPU_REL32:
-  case R_AMDGPU_REL32_LO:
-    write32le(Loc, Val);
-    break;
-  case R_AMDGPU_ABS64:
-    write64le(Loc, Val);
-    break;
-  case R_AMDGPU_GOTPCREL32_HI:
-  case R_AMDGPU_REL32_HI:
-    write32le(Loc, Val >> 32);
-    break;
-  default:
-    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
-  }
-}
-
-RelExpr AMDGPUTargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S,
-                                     const uint8_t *Loc) const {
-  switch (Type) {
-  case R_AMDGPU_ABS32:
-  case R_AMDGPU_ABS64:
-    return R_ABS;
-  case R_AMDGPU_REL32:
-  case R_AMDGPU_REL32_LO:
-  case R_AMDGPU_REL32_HI:
-    return R_PC;
-  case R_AMDGPU_GOTPCREL:
-  case R_AMDGPU_GOTPCREL32_LO:
-  case R_AMDGPU_GOTPCREL32_HI:
-    return R_GOT_PC;
-  default:
-    error(toString(S.File) + ": unknown relocation type: " + toString(Type));
-    return R_HINT;
-  }
-}
-
-ARMTargetInfo::ARMTargetInfo() {
-  CopyRel = R_ARM_COPY;
-  RelativeRel = R_ARM_RELATIVE;
-  IRelativeRel = R_ARM_IRELATIVE;
-  GotRel = R_ARM_GLOB_DAT;
-  PltRel = R_ARM_JUMP_SLOT;
-  TlsGotRel = R_ARM_TLS_TPOFF32;
-  TlsModuleIndexRel = R_ARM_TLS_DTPMOD32;
-  TlsOffsetRel = R_ARM_TLS_DTPOFF32;
-  GotEntrySize = 4;
-  GotPltEntrySize = 4;
-  PltEntrySize = 16;
-  PltHeaderSize = 20;
-  // ARM uses Variant 1 TLS
-  TcbSize = 8;
-  NeedsThunks = true;
-}
-
-RelExpr ARMTargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S,
-                                  const uint8_t *Loc) const {
-  switch (Type) {
-  default:
-    return R_ABS;
-  case R_ARM_THM_JUMP11:
-    return R_PC;
-  case R_ARM_CALL:
-  case R_ARM_JUMP24:
-  case R_ARM_PC24:
-  case R_ARM_PLT32:
-  case R_ARM_PREL31:
-  case R_ARM_THM_JUMP19:
-  case R_ARM_THM_JUMP24:
-  case R_ARM_THM_CALL:
-    return R_PLT_PC;
-  case R_ARM_GOTOFF32:
-    // (S + A) - GOT_ORG
-    return R_GOTREL;
-  case R_ARM_GOT_BREL:
-    // GOT(S) + A - GOT_ORG
-    return R_GOT_OFF;
-  case R_ARM_GOT_PREL:
-  case R_ARM_TLS_IE32:
-    // GOT(S) + A - P
-    return R_GOT_PC;
-  case R_ARM_SBREL32:
-    return R_ARM_SBREL;
-  case R_ARM_TARGET1:
-    return Config->Target1Rel ? R_PC : R_ABS;
-  case R_ARM_TARGET2:
-    if (Config->Target2 == Target2Policy::Rel)
-      return R_PC;
-    if (Config->Target2 == Target2Policy::Abs)
-      return R_ABS;
-    return R_GOT_PC;
-  case R_ARM_TLS_GD32:
-    return R_TLSGD_PC;
-  case R_ARM_TLS_LDM32:
-    return R_TLSLD_PC;
-  case R_ARM_BASE_PREL:
-    // B(S) + A - P
-    // FIXME: currently B(S) assumed to be .got, this may not hold for all
-    // platforms.
-    return R_GOTONLY_PC;
-  case R_ARM_MOVW_PREL_NC:
-  case R_ARM_MOVT_PREL:
-  case R_ARM_REL32:
-  case R_ARM_THM_MOVW_PREL_NC:
-  case R_ARM_THM_MOVT_PREL:
-    return R_PC;
-  case R_ARM_NONE:
-    return R_NONE;
-  case R_ARM_TLS_LE32:
-    return R_TLS;
-  }
-}
-
-bool ARMTargetInfo::isPicRel(uint32_t Type) const {
-  return (Type == R_ARM_TARGET1 && !Config->Target1Rel) ||
-         (Type == R_ARM_ABS32);
-}
-
-uint32_t ARMTargetInfo::getDynRel(uint32_t Type) const {
-  if (Type == R_ARM_TARGET1 && !Config->Target1Rel)
-    return R_ARM_ABS32;
-  if (Type == R_ARM_ABS32)
-    return Type;
-  // Keep it going with a dummy value so that we can find more reloc errors.
-  return R_ARM_ABS32;
-}
-
-void ARMTargetInfo::writeGotPlt(uint8_t *Buf, const SymbolBody &) const {
-  write32le(Buf, InX::Plt->getVA());
-}
-
-void ARMTargetInfo::writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const {
-  // An ARM entry is the address of the ifunc resolver function.
-  write32le(Buf, S.getVA());
-}
-
-void ARMTargetInfo::writePltHeader(uint8_t *Buf) const {
-  const uint8_t PltData[] = {
-      0x04, 0xe0, 0x2d, 0xe5, //     str lr, [sp,#-4]!
-      0x04, 0xe0, 0x9f, 0xe5, //     ldr lr, L2
-      0x0e, 0xe0, 0x8f, 0xe0, // L1: add lr, pc, lr
-      0x08, 0xf0, 0xbe, 0xe5, //     ldr pc, [lr, #8]
-      0x00, 0x00, 0x00, 0x00, // L2: .word   &(.got.plt) - L1 - 8
-  };
-  memcpy(Buf, PltData, sizeof(PltData));
-  uint64_t GotPlt = InX::GotPlt->getVA();
-  uint64_t L1 = InX::Plt->getVA() + 8;
-  write32le(Buf + 16, GotPlt - L1 - 8);
-}
-
-void ARMTargetInfo::addPltHeaderSymbols(InputSectionBase *ISD) const {
-  auto *IS = cast<InputSection>(ISD);
-  addSyntheticLocal("$a", STT_NOTYPE, 0, 0, IS);
-  addSyntheticLocal("$d", STT_NOTYPE, 16, 0, IS);
-}
-
-void ARMTargetInfo::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
-                             uint64_t PltEntryAddr, int32_t Index,
-                             unsigned RelOff) const {
-  // FIXME: Using simple code sequence with simple relocations.
-  // There is a more optimal sequence but it requires support for the group
-  // relocations. See ELF for the ARM Architecture Appendix A.3
-  const uint8_t PltData[] = {
-      0x04, 0xc0, 0x9f, 0xe5, //     ldr ip, L2
-      0x0f, 0xc0, 0x8c, 0xe0, // L1: add ip, ip, pc
-      0x00, 0xf0, 0x9c, 0xe5, //     ldr pc, [ip]
-      0x00, 0x00, 0x00, 0x00, // L2: .word   Offset(&(.plt.got) - L1 - 8
-  };
-  memcpy(Buf, PltData, sizeof(PltData));
-  uint64_t L1 = PltEntryAddr + 4;
-  write32le(Buf + 12, GotPltEntryAddr - L1 - 8);
-}
-
-void ARMTargetInfo::addPltSymbols(InputSectionBase *ISD, uint64_t Off) const {
-  auto *IS = cast<InputSection>(ISD);
-  addSyntheticLocal("$a", STT_NOTYPE, Off, 0, IS);
-  addSyntheticLocal("$d", STT_NOTYPE, Off + 12, 0, IS);
-}
-
-bool ARMTargetInfo::needsThunk(RelExpr Expr, uint32_t RelocType,
-                               const InputFile *File,
-                               const SymbolBody &S) const {
-  // If S is an undefined weak symbol in an executable we don't need a Thunk.
-  // In a DSO calls to undefined symbols, including weak ones get PLT entries
-  // which may need a thunk.
-  if (S.isUndefined() && !S.isLocal() && S.symbol()->isWeak() &&
-      !Config->Shared)
-    return false;
-  // A state change from ARM to Thumb and vice versa must go through an
-  // interworking thunk if the relocation type is not R_ARM_CALL or
-  // R_ARM_THM_CALL.
-  switch (RelocType) {
-  case R_ARM_PC24:
-  case R_ARM_PLT32:
-  case R_ARM_JUMP24:
-    // Source is ARM, all PLT entries are ARM so no interworking required.
-    // Otherwise we need to interwork if Symbol has bit 0 set (Thumb).
-    if (Expr == R_PC && ((S.getVA() & 1) == 1))
-      return true;
-    break;
-  case R_ARM_THM_JUMP19:
-  case R_ARM_THM_JUMP24:
-    // Source is Thumb, all PLT entries are ARM so interworking is required.
-    // Otherwise we need to interwork if Symbol has bit 0 clear (ARM).
-    if (Expr == R_PLT_PC || ((S.getVA() & 1) == 0))
-      return true;
-    break;
-  }
-  return false;
-}
-
-void ARMTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
-                                uint64_t Val) const {
-  switch (Type) {
-  case R_ARM_ABS32:
-  case R_ARM_BASE_PREL:
-  case R_ARM_GLOB_DAT:
-  case R_ARM_GOTOFF32:
-  case R_ARM_GOT_BREL:
-  case R_ARM_GOT_PREL:
-  case R_ARM_REL32:
-  case R_ARM_RELATIVE:
-  case R_ARM_SBREL32:
-  case R_ARM_TARGET1:
-  case R_ARM_TARGET2:
-  case R_ARM_TLS_GD32:
-  case R_ARM_TLS_IE32:
-  case R_ARM_TLS_LDM32:
-  case R_ARM_TLS_LDO32:
-  case R_ARM_TLS_LE32:
-  case R_ARM_TLS_TPOFF32:
-  case R_ARM_TLS_DTPOFF32:
-    write32le(Loc, Val);
-    break;
-  case R_ARM_TLS_DTPMOD32:
-    write32le(Loc, 1);
-    break;
-  case R_ARM_PREL31:
-    checkInt<31>(Loc, Val, Type);
-    write32le(Loc, (read32le(Loc) & 0x80000000) | (Val & ~0x80000000));
-    break;
-  case R_ARM_CALL:
-    // R_ARM_CALL is used for BL and BLX instructions, depending on the
-    // value of bit 0 of Val, we must select a BL or BLX instruction
-    if (Val & 1) {
-      // If bit 0 of Val is 1 the target is Thumb, we must select a BLX.
-      // The BLX encoding is 0xfa:H:imm24 where Val = imm24:H:'1'
-      checkInt<26>(Loc, Val, Type);
-      write32le(Loc, 0xfa000000 |                    // opcode
-                         ((Val & 2) << 23) |         // H
-                         ((Val >> 2) & 0x00ffffff)); // imm24
-      break;
-    }
-    if ((read32le(Loc) & 0xfe000000) == 0xfa000000)
-      // BLX (always unconditional) instruction to an ARM Target, select an
-      // unconditional BL.
-      write32le(Loc, 0xeb000000 | (read32le(Loc) & 0x00ffffff));
-    // fall through as BL encoding is shared with B
-    LLVM_FALLTHROUGH;
-  case R_ARM_JUMP24:
-  case R_ARM_PC24:
-  case R_ARM_PLT32:
-    checkInt<26>(Loc, Val, Type);
-    write32le(Loc, (read32le(Loc) & ~0x00ffffff) | ((Val >> 2) & 0x00ffffff));
-    break;
-  case R_ARM_THM_JUMP11:
-    checkInt<12>(Loc, Val, Type);
-    write16le(Loc, (read32le(Loc) & 0xf800) | ((Val >> 1) & 0x07ff));
-    break;
-  case R_ARM_THM_JUMP19:
-    // Encoding T3: Val = S:J2:J1:imm6:imm11:0
-    checkInt<21>(Loc, Val, Type);
-    write16le(Loc,
-              (read16le(Loc) & 0xfbc0) |   // opcode cond
-                  ((Val >> 10) & 0x0400) | // S
-                  ((Val >> 12) & 0x003f)); // imm6
-    write16le(Loc + 2,
-              0x8000 |                    // opcode
-                  ((Val >> 8) & 0x0800) | // J2
-                  ((Val >> 5) & 0x2000) | // J1
-                  ((Val >> 1) & 0x07ff)); // imm11
-    break;
-  case R_ARM_THM_CALL:
-    // R_ARM_THM_CALL is used for BL and BLX instructions, depending on the
-    // value of bit 0 of Val, we must select a BL or BLX instruction
-    if ((Val & 1) == 0) {
-      // Ensure BLX destination is 4-byte aligned. As BLX instruction may
-      // only be two byte aligned. This must be done before overflow check
-      Val = alignTo(Val, 4);
-    }
-    // Bit 12 is 0 for BLX, 1 for BL
-    write16le(Loc + 2, (read16le(Loc + 2) & ~0x1000) | (Val & 1) << 12);
-    // Fall through as rest of encoding is the same as B.W
-    LLVM_FALLTHROUGH;
-  case R_ARM_THM_JUMP24:
-    // Encoding B  T4, BL T1, BLX T2: Val = S:I1:I2:imm10:imm11:0
-    // FIXME: Use of I1 and I2 require v6T2ops
-    checkInt<25>(Loc, Val, Type);
-    write16le(Loc,
-              0xf000 |                     // opcode
-                  ((Val >> 14) & 0x0400) | // S
-                  ((Val >> 12) & 0x03ff)); // imm10
-    write16le(Loc + 2,
-              (read16le(Loc + 2) & 0xd000) |                  // opcode
-                  (((~(Val >> 10)) ^ (Val >> 11)) & 0x2000) | // J1
-                  (((~(Val >> 11)) ^ (Val >> 13)) & 0x0800) | // J2
-                  ((Val >> 1) & 0x07ff));                     // imm11
-    break;
-  case R_ARM_MOVW_ABS_NC:
-  case R_ARM_MOVW_PREL_NC:
-    write32le(Loc, (read32le(Loc) & ~0x000f0fff) | ((Val & 0xf000) << 4) |
-                       (Val & 0x0fff));
-    break;
-  case R_ARM_MOVT_ABS:
-  case R_ARM_MOVT_PREL:
-    checkInt<32>(Loc, Val, Type);
-    write32le(Loc, (read32le(Loc) & ~0x000f0fff) |
-                       (((Val >> 16) & 0xf000) << 4) | ((Val >> 16) & 0xfff));
-    break;
-  case R_ARM_THM_MOVT_ABS:
-  case R_ARM_THM_MOVT_PREL:
-    // Encoding T1: A = imm4:i:imm3:imm8
-    checkInt<32>(Loc, Val, Type);
-    write16le(Loc,
-              0xf2c0 |                     // opcode
-                  ((Val >> 17) & 0x0400) | // i
-                  ((Val >> 28) & 0x000f)); // imm4
-    write16le(Loc + 2,
-              (read16le(Loc + 2) & 0x8f00) | // opcode
-                  ((Val >> 12) & 0x7000) |   // imm3
-                  ((Val >> 16) & 0x00ff));   // imm8
-    break;
-  case R_ARM_THM_MOVW_ABS_NC:
-  case R_ARM_THM_MOVW_PREL_NC:
-    // Encoding T3: A = imm4:i:imm3:imm8
-    write16le(Loc,
-              0xf240 |                     // opcode
-                  ((Val >> 1) & 0x0400) |  // i
-                  ((Val >> 12) & 0x000f)); // imm4
-    write16le(Loc + 2,
-              (read16le(Loc + 2) & 0x8f00) | // opcode
-                  ((Val << 4) & 0x7000) |    // imm3
-                  (Val & 0x00ff));           // imm8
-    break;
-  default:
-    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
-  }
-}
-
-int64_t ARMTargetInfo::getImplicitAddend(const uint8_t *Buf,
-                                         uint32_t Type) const {
-  switch (Type) {
-  default:
-    return 0;
-  case R_ARM_ABS32:
-  case R_ARM_BASE_PREL:
-  case R_ARM_GOTOFF32:
-  case R_ARM_GOT_BREL:
-  case R_ARM_GOT_PREL:
-  case R_ARM_REL32:
-  case R_ARM_TARGET1:
-  case R_ARM_TARGET2:
-  case R_ARM_TLS_GD32:
-  case R_ARM_TLS_LDM32:
-  case R_ARM_TLS_LDO32:
-  case R_ARM_TLS_IE32:
-  case R_ARM_TLS_LE32:
-    return SignExtend64<32>(read32le(Buf));
-  case R_ARM_PREL31:
-    return SignExtend64<31>(read32le(Buf));
-  case R_ARM_CALL:
-  case R_ARM_JUMP24:
-  case R_ARM_PC24:
-  case R_ARM_PLT32:
-    return SignExtend64<26>(read32le(Buf) << 2);
-  case R_ARM_THM_JUMP11:
-    return SignExtend64<12>(read16le(Buf) << 1);
-  case R_ARM_THM_JUMP19: {
-    // Encoding T3: A = S:J2:J1:imm10:imm6:0
-    uint16_t Hi = read16le(Buf);
-    uint16_t Lo = read16le(Buf + 2);
-    return SignExtend64<20>(((Hi & 0x0400) << 10) | // S
-                            ((Lo & 0x0800) << 8) |  // J2
-                            ((Lo & 0x2000) << 5) |  // J1
-                            ((Hi & 0x003f) << 12) | // imm6
-                            ((Lo & 0x07ff) << 1));  // imm11:0
-  }
-  case R_ARM_THM_CALL:
-  case R_ARM_THM_JUMP24: {
-    // Encoding B T4, BL T1, BLX T2: A = S:I1:I2:imm10:imm11:0
-    // I1 = NOT(J1 EOR S), I2 = NOT(J2 EOR S)
-    // FIXME: I1 and I2 require v6T2ops
-    uint16_t Hi = read16le(Buf);
-    uint16_t Lo = read16le(Buf + 2);
-    return SignExtend64<24>(((Hi & 0x0400) << 14) |                    // S
-                            (~((Lo ^ (Hi << 3)) << 10) & 0x00800000) | // I1
-                            (~((Lo ^ (Hi << 1)) << 11) & 0x00400000) | // I2
-                            ((Hi & 0x003ff) << 12) |                   // imm0
-                            ((Lo & 0x007ff) << 1)); // imm11:0
-  }
-  // ELF for the ARM Architecture 4.6.1.1 the implicit addend for MOVW and
-  // MOVT is in the range -32768 <= A < 32768
-  case R_ARM_MOVW_ABS_NC:
-  case R_ARM_MOVT_ABS:
-  case R_ARM_MOVW_PREL_NC:
-  case R_ARM_MOVT_PREL: {
-    uint64_t Val = read32le(Buf) & 0x000f0fff;
-    return SignExtend64<16>(((Val & 0x000f0000) >> 4) | (Val & 0x00fff));
-  }
-  case R_ARM_THM_MOVW_ABS_NC:
-  case R_ARM_THM_MOVT_ABS:
-  case R_ARM_THM_MOVW_PREL_NC:
-  case R_ARM_THM_MOVT_PREL: {
-    // Encoding T3: A = imm4:i:imm3:imm8
-    uint16_t Hi = read16le(Buf);
-    uint16_t Lo = read16le(Buf + 2);
-    return SignExtend64<16>(((Hi & 0x000f) << 12) | // imm4
-                            ((Hi & 0x0400) << 1) |  // i
-                            ((Lo & 0x7000) >> 4) |  // imm3
-                            (Lo & 0x00ff));         // imm8
-  }
-  }
-}
-
-template <class ELFT> MipsTargetInfo<ELFT>::MipsTargetInfo() {
-  GotPltHeaderEntriesNum = 2;
-  DefaultMaxPageSize = 65536;
-  GotEntrySize = sizeof(typename ELFT::uint);
-  GotPltEntrySize = sizeof(typename ELFT::uint);
-  PltEntrySize = 16;
-  PltHeaderSize = 32;
-  CopyRel = R_MIPS_COPY;
-  PltRel = R_MIPS_JUMP_SLOT;
-  NeedsThunks = true;
-  if (ELFT::Is64Bits) {
-    RelativeRel = (R_MIPS_64 << 8) | R_MIPS_REL32;
-    TlsGotRel = R_MIPS_TLS_TPREL64;
-    TlsModuleIndexRel = R_MIPS_TLS_DTPMOD64;
-    TlsOffsetRel = R_MIPS_TLS_DTPREL64;
-  } else {
-    RelativeRel = R_MIPS_REL32;
-    TlsGotRel = R_MIPS_TLS_TPREL32;
-    TlsModuleIndexRel = R_MIPS_TLS_DTPMOD32;
-    TlsOffsetRel = R_MIPS_TLS_DTPREL32;
-  }
-}
-
-template <class ELFT>
-RelExpr MipsTargetInfo<ELFT>::getRelExpr(uint32_t Type, const SymbolBody &S,
-                                         const uint8_t *Loc) const {
-  // See comment in the calculateMipsRelChain.
-  if (ELFT::Is64Bits || Config->MipsN32Abi)
-    Type &= 0xff;
-  switch (Type) {
-  default:
-    return R_ABS;
-  case R_MIPS_JALR:
-    return R_HINT;
-  case R_MIPS_GPREL16:
-  case R_MIPS_GPREL32:
-    return R_MIPS_GOTREL;
-  case R_MIPS_26:
-    return R_PLT;
-  case R_MIPS_HI16:
-  case R_MIPS_LO16:
-    // R_MIPS_HI16/R_MIPS_LO16 relocations against _gp_disp calculate
-    // offset between start of function and 'gp' value which by default
-    // equal to the start of .got section. In that case we consider these
-    // relocations as relative.
-    if (&S == ElfSym::MipsGpDisp)
-      return R_MIPS_GOT_GP_PC;
-    if (&S == ElfSym::MipsLocalGp)
-      return R_MIPS_GOT_GP;
-    LLVM_FALLTHROUGH;
-  case R_MIPS_GOT_OFST:
-    return R_ABS;
-  case R_MIPS_PC32:
-  case R_MIPS_PC16:
-  case R_MIPS_PC19_S2:
-  case R_MIPS_PC21_S2:
-  case R_MIPS_PC26_S2:
-  case R_MIPS_PCHI16:
-  case R_MIPS_PCLO16:
-    return R_PC;
-  case R_MIPS_GOT16:
-    if (S.isLocal())
-      return R_MIPS_GOT_LOCAL_PAGE;
-    LLVM_FALLTHROUGH;
-  case R_MIPS_CALL16:
-  case R_MIPS_GOT_DISP:
-  case R_MIPS_TLS_GOTTPREL:
-    return R_MIPS_GOT_OFF;
-  case R_MIPS_CALL_HI16:
-  case R_MIPS_CALL_LO16:
-  case R_MIPS_GOT_HI16:
-  case R_MIPS_GOT_LO16:
-    return R_MIPS_GOT_OFF32;
-  case R_MIPS_GOT_PAGE:
-    return R_MIPS_GOT_LOCAL_PAGE;
-  case R_MIPS_TLS_GD:
-    return R_MIPS_TLSGD;
-  case R_MIPS_TLS_LDM:
-    return R_MIPS_TLSLD;
-  }
-}
-
-template <class ELFT> bool MipsTargetInfo<ELFT>::isPicRel(uint32_t Type) const {
-  return Type == R_MIPS_32 || Type == R_MIPS_64;
-}
-
-template <class ELFT>
-uint32_t MipsTargetInfo<ELFT>::getDynRel(uint32_t Type) const {
-  return RelativeRel;
-}
-
-template <class ELFT>
-void MipsTargetInfo<ELFT>::writeGotPlt(uint8_t *Buf, const SymbolBody &) const {
-  write32<ELFT::TargetEndianness>(Buf, InX::Plt->getVA());
-}
-
-template <endianness E, uint8_t BSIZE, uint8_t SHIFT>
-static int64_t getPcRelocAddend(const uint8_t *Loc) {
-  uint32_t Instr = read32<E>(Loc);
-  uint32_t Mask = 0xffffffff >> (32 - BSIZE);
-  return SignExtend64<BSIZE + SHIFT>((Instr & Mask) << SHIFT);
-}
-
-template <endianness E, uint8_t BSIZE, uint8_t SHIFT>
-static void applyMipsPcReloc(uint8_t *Loc, uint32_t Type, uint64_t V) {
-  uint32_t Mask = 0xffffffff >> (32 - BSIZE);
-  uint32_t Instr = read32<E>(Loc);
-  if (SHIFT > 0)
-    checkAlignment<(1 << SHIFT)>(Loc, V, Type);
-  checkInt<BSIZE + SHIFT>(Loc, V, Type);
-  write32<E>(Loc, (Instr & ~Mask) | ((V >> SHIFT) & Mask));
-}
-
-template <endianness E> static void writeMipsHi16(uint8_t *Loc, uint64_t V) {
-  uint32_t Instr = read32<E>(Loc);
-  uint16_t Res = ((V + 0x8000) >> 16) & 0xffff;
-  write32<E>(Loc, (Instr & 0xffff0000) | Res);
-}
-
-template <endianness E> static void writeMipsHigher(uint8_t *Loc, uint64_t V) {
-  uint32_t Instr = read32<E>(Loc);
-  uint16_t Res = ((V + 0x80008000) >> 32) & 0xffff;
-  write32<E>(Loc, (Instr & 0xffff0000) | Res);
-}
-
-template <endianness E> static void writeMipsHighest(uint8_t *Loc, uint64_t V) {
-  uint32_t Instr = read32<E>(Loc);
-  uint16_t Res = ((V + 0x800080008000) >> 48) & 0xffff;
-  write32<E>(Loc, (Instr & 0xffff0000) | Res);
-}
-
-template <endianness E> static void writeMipsLo16(uint8_t *Loc, uint64_t V) {
-  uint32_t Instr = read32<E>(Loc);
-  write32<E>(Loc, (Instr & 0xffff0000) | (V & 0xffff));
-}
-
-template <class ELFT> static bool isMipsR6() {
-  const auto &FirstObj = cast<ELFFileBase<ELFT>>(*Config->FirstElf);
-  uint32_t Arch = FirstObj.getObj().getHeader()->e_flags & EF_MIPS_ARCH;
-  return Arch == EF_MIPS_ARCH_32R6 || Arch == EF_MIPS_ARCH_64R6;
-}
-
-template <class ELFT>
-void MipsTargetInfo<ELFT>::writePltHeader(uint8_t *Buf) const {
-  const endianness E = ELFT::TargetEndianness;
-  if (Config->MipsN32Abi) {
-    write32<E>(Buf, 0x3c0e0000);      // lui   $14, %hi(&GOTPLT[0])
-    write32<E>(Buf + 4, 0x8dd90000);  // lw    $25, %lo(&GOTPLT[0])($14)
-    write32<E>(Buf + 8, 0x25ce0000);  // addiu $14, $14, %lo(&GOTPLT[0])
-    write32<E>(Buf + 12, 0x030ec023); // subu  $24, $24, $14
-  } else {
-    write32<E>(Buf, 0x3c1c0000);      // lui   $28, %hi(&GOTPLT[0])
-    write32<E>(Buf + 4, 0x8f990000);  // lw    $25, %lo(&GOTPLT[0])($28)
-    write32<E>(Buf + 8, 0x279c0000);  // addiu $28, $28, %lo(&GOTPLT[0])
-    write32<E>(Buf + 12, 0x031cc023); // subu  $24, $24, $28
-  }
-
-  write32<E>(Buf + 16, 0x03e07825); // move  $15, $31
-  write32<E>(Buf + 20, 0x0018c082); // srl   $24, $24, 2
-  write32<E>(Buf + 24, 0x0320f809); // jalr  $25
-  write32<E>(Buf + 28, 0x2718fffe); // subu  $24, $24, 2
-
-  uint64_t GotPlt = InX::GotPlt->getVA();
-  writeMipsHi16<E>(Buf, GotPlt);
-  writeMipsLo16<E>(Buf + 4, GotPlt);
-  writeMipsLo16<E>(Buf + 8, GotPlt);
-}
-
-template <class ELFT>
-void MipsTargetInfo<ELFT>::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
-                                    uint64_t PltEntryAddr, int32_t Index,
-                                    unsigned RelOff) const {
-  const endianness E = ELFT::TargetEndianness;
-  write32<E>(Buf, 0x3c0f0000);     // lui   $15, %hi(.got.plt entry)
-  write32<E>(Buf + 4, 0x8df90000); // l[wd] $25, %lo(.got.plt entry)($15)
-                                   // jr    $25
-  write32<E>(Buf + 8, isMipsR6<ELFT>() ? 0x03200009 : 0x03200008);
-  write32<E>(Buf + 12, 0x25f80000); // addiu $24, $15, %lo(.got.plt entry)
-  writeMipsHi16<E>(Buf, GotPltEntryAddr);
-  writeMipsLo16<E>(Buf + 4, GotPltEntryAddr);
-  writeMipsLo16<E>(Buf + 12, GotPltEntryAddr);
-}
-
-template <class ELFT>
-bool MipsTargetInfo<ELFT>::needsThunk(RelExpr Expr, uint32_t Type,
-                                      const InputFile *File,
-                                      const SymbolBody &S) const {
-  // Any MIPS PIC code function is invoked with its address in register $t9.
-  // So if we have a branch instruction from non-PIC code to the PIC one
-  // we cannot make the jump directly and need to create a small stubs
-  // to save the target function address.
-  // See page 3-38 ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
-  if (Type != R_MIPS_26)
-    return false;
-  auto *F = dyn_cast_or_null<ELFFileBase<ELFT>>(File);
-  if (!F)
-    return false;
-  // If current file has PIC code, LA25 stub is not required.
-  if (F->getObj().getHeader()->e_flags & EF_MIPS_PIC)
-    return false;
-  auto *D = dyn_cast<DefinedRegular>(&S);
-  // LA25 is required if target file has PIC code
-  // or target symbol is a PIC symbol.
-  return D && D->isMipsPIC<ELFT>();
-}
-
-template <class ELFT>
-int64_t MipsTargetInfo<ELFT>::getImplicitAddend(const uint8_t *Buf,
-                                                uint32_t Type) const {
-  const endianness E = ELFT::TargetEndianness;
-  switch (Type) {
-  default:
-    return 0;
-  case R_MIPS_32:
-  case R_MIPS_GPREL32:
-  case R_MIPS_TLS_DTPREL32:
-  case R_MIPS_TLS_TPREL32:
-    return SignExtend64<32>(read32<E>(Buf));
-  case R_MIPS_26:
-    // FIXME (simon): If the relocation target symbol is not a PLT entry
-    // we should use another expression for calculation:
-    // ((A << 2) | (P & 0xf0000000)) >> 2
-    return SignExtend64<28>((read32<E>(Buf) & 0x3ffffff) << 2);
-  case R_MIPS_GPREL16:
-  case R_MIPS_LO16:
-  case R_MIPS_PCLO16:
-  case R_MIPS_TLS_DTPREL_HI16:
-  case R_MIPS_TLS_DTPREL_LO16:
-  case R_MIPS_TLS_TPREL_HI16:
-  case R_MIPS_TLS_TPREL_LO16:
-    return SignExtend64<16>(read32<E>(Buf));
-  case R_MIPS_PC16:
-    return getPcRelocAddend<E, 16, 2>(Buf);
-  case R_MIPS_PC19_S2:
-    return getPcRelocAddend<E, 19, 2>(Buf);
-  case R_MIPS_PC21_S2:
-    return getPcRelocAddend<E, 21, 2>(Buf);
-  case R_MIPS_PC26_S2:
-    return getPcRelocAddend<E, 26, 2>(Buf);
-  case R_MIPS_PC32:
-    return getPcRelocAddend<E, 32, 0>(Buf);
-  }
-}
-
-static std::pair<uint32_t, uint64_t>
-calculateMipsRelChain(uint8_t *Loc, uint32_t Type, uint64_t Val) {
-  // MIPS N64 ABI packs multiple relocations into the single relocation
-  // record. In general, all up to three relocations can have arbitrary
-  // types. In fact, Clang and GCC uses only a few combinations. For now,
-  // we support two of them. That is allow to pass at least all LLVM
-  // test suite cases.
-  // <any relocation> / R_MIPS_SUB / R_MIPS_HI16 | R_MIPS_LO16
-  // <any relocation> / R_MIPS_64 / R_MIPS_NONE
-  // The first relocation is a 'real' relocation which is calculated
-  // using the corresponding symbol's value. The second and the third
-  // relocations used to modify result of the first one: extend it to
-  // 64-bit, extract high or low part etc. For details, see part 2.9 Relocation
-  // at the https://dmz-portal.mips.com/mw/images/8/82/007-4658-001.pdf
-  uint32_t Type2 = (Type >> 8) & 0xff;
-  uint32_t Type3 = (Type >> 16) & 0xff;
-  if (Type2 == R_MIPS_NONE && Type3 == R_MIPS_NONE)
-    return std::make_pair(Type, Val);
-  if (Type2 == R_MIPS_64 && Type3 == R_MIPS_NONE)
-    return std::make_pair(Type2, Val);
-  if (Type2 == R_MIPS_SUB && (Type3 == R_MIPS_HI16 || Type3 == R_MIPS_LO16))
-    return std::make_pair(Type3, -Val);
-  error(getErrorLocation(Loc) + "unsupported relocations combination " +
-        Twine(Type));
-  return std::make_pair(Type & 0xff, Val);
-}
-
-template <class ELFT>
-void MipsTargetInfo<ELFT>::relocateOne(uint8_t *Loc, uint32_t Type,
-                                       uint64_t Val) const {
-  const endianness E = ELFT::TargetEndianness;
-  // Thread pointer and DRP offsets from the start of TLS data area.
-  // https://www.linux-mips.org/wiki/NPTL
-  if (Type == R_MIPS_TLS_DTPREL_HI16 || Type == R_MIPS_TLS_DTPREL_LO16 ||
-      Type == R_MIPS_TLS_DTPREL32 || Type == R_MIPS_TLS_DTPREL64)
-    Val -= 0x8000;
-  else if (Type == R_MIPS_TLS_TPREL_HI16 || Type == R_MIPS_TLS_TPREL_LO16 ||
-           Type == R_MIPS_TLS_TPREL32 || Type == R_MIPS_TLS_TPREL64)
-    Val -= 0x7000;
-  if (ELFT::Is64Bits || Config->MipsN32Abi)
-    std::tie(Type, Val) = calculateMipsRelChain(Loc, Type, Val);
-  switch (Type) {
-  case R_MIPS_32:
-  case R_MIPS_GPREL32:
-  case R_MIPS_TLS_DTPREL32:
-  case R_MIPS_TLS_TPREL32:
-    write32<E>(Loc, Val);
-    break;
-  case R_MIPS_64:
-  case R_MIPS_TLS_DTPREL64:
-  case R_MIPS_TLS_TPREL64:
-    write64<E>(Loc, Val);
-    break;
-  case R_MIPS_26:
-    write32<E>(Loc, (read32<E>(Loc) & ~0x3ffffff) | ((Val >> 2) & 0x3ffffff));
-    break;
-  case R_MIPS_GOT16:
-    // The R_MIPS_GOT16 relocation's value in "relocatable" linking mode
-    // is updated addend (not a GOT index). In that case write high 16 bits
-    // to store a correct addend value.
-    if (Config->Relocatable)
-      writeMipsHi16<E>(Loc, Val);
-    else {
-      checkInt<16>(Loc, Val, Type);
-      writeMipsLo16<E>(Loc, Val);
-    }
-    break;
-  case R_MIPS_GOT_DISP:
-  case R_MIPS_GOT_PAGE:
-  case R_MIPS_GPREL16:
-  case R_MIPS_TLS_GD:
-  case R_MIPS_TLS_LDM:
-    checkInt<16>(Loc, Val, Type);
-    LLVM_FALLTHROUGH;
-  case R_MIPS_CALL16:
-  case R_MIPS_CALL_LO16:
-  case R_MIPS_GOT_LO16:
-  case R_MIPS_GOT_OFST:
-  case R_MIPS_LO16:
-  case R_MIPS_PCLO16:
-  case R_MIPS_TLS_DTPREL_LO16:
-  case R_MIPS_TLS_GOTTPREL:
-  case R_MIPS_TLS_TPREL_LO16:
-    writeMipsLo16<E>(Loc, Val);
-    break;
-  case R_MIPS_CALL_HI16:
-  case R_MIPS_GOT_HI16:
-  case R_MIPS_HI16:
-  case R_MIPS_PCHI16:
-  case R_MIPS_TLS_DTPREL_HI16:
-  case R_MIPS_TLS_TPREL_HI16:
-    writeMipsHi16<E>(Loc, Val);
-    break;
-  case R_MIPS_HIGHER:
-    writeMipsHigher<E>(Loc, Val);
-    break;
-  case R_MIPS_HIGHEST:
-    writeMipsHighest<E>(Loc, Val);
-    break;
-  case R_MIPS_JALR:
-    // Ignore this optimization relocation for now
-    break;
-  case R_MIPS_PC16:
-    applyMipsPcReloc<E, 16, 2>(Loc, Type, Val);
-    break;
-  case R_MIPS_PC19_S2:
-    applyMipsPcReloc<E, 19, 2>(Loc, Type, Val);
-    break;
-  case R_MIPS_PC21_S2:
-    applyMipsPcReloc<E, 21, 2>(Loc, Type, Val);
-    break;
-  case R_MIPS_PC26_S2:
-    applyMipsPcReloc<E, 26, 2>(Loc, Type, Val);
-    break;
-  case R_MIPS_PC32:
-    applyMipsPcReloc<E, 32, 0>(Loc, Type, Val);
-    break;
-  default:
-    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
-  }
-}
-
-template <class ELFT>
-bool MipsTargetInfo<ELFT>::usesOnlyLowPageBits(uint32_t Type) const {
-  return Type == R_MIPS_LO16 || Type == R_MIPS_GOT_OFST;
-}
-}
 }
Index: vendor/lld/dist/ELF/Target.h
===================================================================
--- vendor/lld/dist/ELF/Target.h	(revision 320020)
+++ vendor/lld/dist/ELF/Target.h	(revision 320021)
@@ -1,115 +1,154 @@
 //===- Target.h -------------------------------------------------*- C++ -*-===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLD_ELF_TARGET_H
 #define LLD_ELF_TARGET_H
 
+#include "Error.h"
 #include "InputSection.h"
-#include "llvm/ADT/StringRef.h"
 #include "llvm/Object/ELF.h"
 
-#include <memory>
-
 namespace lld {
+std::string toString(uint32_t RelType);
+
 namespace elf {
 class InputFile;
 class SymbolBody;
 
 class TargetInfo {
 public:
   virtual bool isPicRel(uint32_t Type) const { return true; }
   virtual uint32_t getDynRel(uint32_t Type) const { return Type; }
   virtual void writeGotPltHeader(uint8_t *Buf) const {}
   virtual void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const {};
   virtual void writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const;
   virtual int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const;
 
   // If lazy binding is supported, the first entry of the PLT has code
   // to call the dynamic linker to resolve PLT entries the first time
   // they are called. This function writes that code.
   virtual void writePltHeader(uint8_t *Buf) const {}
 
   virtual void writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
                         uint64_t PltEntryAddr, int32_t Index,
                         unsigned RelOff) const {}
   virtual void addPltHeaderSymbols(InputSectionBase *IS) const {}
   virtual void addPltSymbols(InputSectionBase *IS, uint64_t Off) const {}
   // Returns true if a relocation only uses the low bits of a value such that
   // all those bits are in in the same page. For example, if the relocation
   // only uses the low 12 bits in a system with 4k pages. If this is true, the
   // bits will always have the same value at runtime and we don't have to emit
   // a dynamic relocation.
   virtual bool usesOnlyLowPageBits(uint32_t Type) const;
 
   // Decide whether a Thunk is needed for the relocation from File
   // targeting S.
   virtual bool needsThunk(RelExpr Expr, uint32_t RelocType,
                           const InputFile *File, const SymbolBody &S) const;
   virtual RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
                              const uint8_t *Loc) const = 0;
   virtual void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const = 0;
   virtual ~TargetInfo();
 
   unsigned TlsGdRelaxSkip = 1;
   unsigned PageSize = 4096;
   unsigned DefaultMaxPageSize = 4096;
 
   // On FreeBSD x86_64 the first page cannot be mmaped.
   // On Linux that is controled by vm.mmap_min_addr. At least on some x86_64
   // installs that is 65536, so the first 15 pages cannot be used.
   // Given that, the smallest value that can be used in here is 0x10000.
   uint64_t DefaultImageBase = 0x10000;
 
   uint32_t CopyRel;
   uint32_t GotRel;
   uint32_t PltRel;
   uint32_t RelativeRel;
   uint32_t IRelativeRel;
   uint32_t TlsDescRel;
   uint32_t TlsGotRel;
   uint32_t TlsModuleIndexRel;
   uint32_t TlsOffsetRel;
   unsigned GotEntrySize = 0;
   unsigned GotPltEntrySize = 0;
   unsigned PltEntrySize;
   unsigned PltHeaderSize;
 
   // At least on x86_64 positions 1 and 2 are used by the first plt entry
   // to support lazy loading.
   unsigned GotPltHeaderEntriesNum = 3;
 
   // Set to 0 for variant 2
   unsigned TcbSize = 0;
 
   bool NeedsThunks = false;
 
   // A 4-byte field corresponding to one or more trap instructions, used to pad
   // executable OutputSections.
   uint32_t TrapInstr = 0;
 
   virtual RelExpr adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
                                   RelExpr Expr) const;
   virtual void relaxGot(uint8_t *Loc, uint64_t Val) const;
   virtual void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const;
   virtual void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const;
   virtual void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const;
   virtual void relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const;
 };
 
+TargetInfo *createAArch64TargetInfo();
+TargetInfo *createAMDGPUTargetInfo();
+TargetInfo *createARMTargetInfo();
+TargetInfo *createAVRTargetInfo();
+TargetInfo *createPPC64TargetInfo();
+TargetInfo *createPPCTargetInfo();
+TargetInfo *createX32TargetInfo();
+TargetInfo *createX86TargetInfo();
+TargetInfo *createX86_64TargetInfo();
+template <class ELFT> TargetInfo *createMipsTargetInfo();
+
+std::string getErrorLocation(const uint8_t *Loc);
+
 uint64_t getPPC64TocBase();
 uint64_t getAArch64Page(uint64_t Expr);
 
 extern TargetInfo *Target;
 TargetInfo *createTarget();
+
+template <unsigned N>
+static void checkInt(uint8_t *Loc, int64_t V, uint32_t Type) {
+  if (!llvm::isInt<N>(V))
+    error(getErrorLocation(Loc) + "relocation " + lld::toString(Type) +
+          " out of range");
 }
 
-std::string toString(uint32_t RelType);
+template <unsigned N>
+static void checkUInt(uint8_t *Loc, uint64_t V, uint32_t Type) {
+  if (!llvm::isUInt<N>(V))
+    error(getErrorLocation(Loc) + "relocation " + lld::toString(Type) +
+          " out of range");
+}
+
+template <unsigned N>
+static void checkIntUInt(uint8_t *Loc, uint64_t V, uint32_t Type) {
+  if (!llvm::isInt<N>(V) && !llvm::isUInt<N>(V))
+    error(getErrorLocation(Loc) + "relocation " + lld::toString(Type) +
+          " out of range");
+}
+
+template <unsigned N>
+static void checkAlignment(uint8_t *Loc, uint64_t V, uint32_t Type) {
+  if ((V & (N - 1)) != 0)
+    error(getErrorLocation(Loc) + "improper alignment for relocation " +
+          lld::toString(Type));
+}
+} // namespace elf
 }
 
 #endif
Index: vendor/lld/dist/ELF/Writer.cpp
===================================================================
--- vendor/lld/dist/ELF/Writer.cpp	(revision 320020)
+++ vendor/lld/dist/ELF/Writer.cpp	(revision 320021)
@@ -1,1858 +1,1897 @@
 //===- Writer.cpp ---------------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #include "Writer.h"
 #include "Config.h"
 #include "Filesystem.h"
 #include "LinkerScript.h"
 #include "MapFile.h"
 #include "Memory.h"
 #include "OutputSections.h"
 #include "Relocations.h"
 #include "Strings.h"
 #include "SymbolTable.h"
 #include "SyntheticSections.h"
 #include "Target.h"
 #include "Threads.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/Support/FileOutputBuffer.h"
 #include "llvm/Support/raw_ostream.h"
 #include <climits>
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
 using namespace llvm::support;
 using namespace llvm::support::endian;
 
 using namespace lld;
 using namespace lld::elf;
 
 namespace {
 // The writer writes a SymbolTable result to a file.
 template <class ELFT> class Writer {
 public:
   typedef typename ELFT::Shdr Elf_Shdr;
   typedef typename ELFT::Ehdr Elf_Ehdr;
   typedef typename ELFT::Phdr Elf_Phdr;
 
   void run();
 
 private:
   void clearOutputSections();
   void createSyntheticSections();
   void copyLocalSymbols();
   void addSectionSymbols();
   void addReservedSymbols();
   void createSections();
   void forEachRelSec(std::function<void(InputSectionBase &)> Fn);
   void sortSections();
   void finalizeSections();
   void addPredefinedSections();
 
   std::vector<PhdrEntry> createPhdrs();
   void removeEmptyPTLoad();
   void addPtArmExid(std::vector<PhdrEntry> &Phdrs);
   void assignFileOffsets();
   void assignFileOffsetsBinary();
   void setPhdrs();
   void fixSectionAlignments();
   void fixPredefinedSymbols();
   void openFile();
   void writeHeader();
   void writeSections();
   void writeSectionsBinary();
   void writeBuildId();
 
   std::unique_ptr<FileOutputBuffer> Buffer;
 
-  std::vector<OutputSection *> OutputSections;
-  std::vector<OutputSectionCommand *> OutputSectionCommands;
   OutputSectionFactory Factory{OutputSections};
 
   void addRelIpltSymbols();
   void addStartEndSymbols();
   void addStartStopSymbols(OutputSection *Sec);
   uint64_t getEntryAddr();
   OutputSection *findSection(StringRef Name);
   OutputSection *findSectionInScript(StringRef Name);
   OutputSectionCommand *findSectionCommand(StringRef Name);
 
   std::vector<PhdrEntry> Phdrs;
 
   uint64_t FileSize;
   uint64_t SectionHeaderOff;
 };
 } // anonymous namespace
 
 StringRef elf::getOutputSectionName(StringRef Name) {
   // ".zdebug_" is a prefix for ZLIB-compressed sections.
   // Because we decompressed input sections, we want to remove 'z'.
   if (Name.startswith(".zdebug_"))
     return Saver.save("." + Name.substr(2));
 
   if (Config->Relocatable)
     return Name;
 
   for (StringRef V :
        {".text.", ".rodata.", ".data.rel.ro.", ".data.", ".bss.rel.ro.",
         ".bss.", ".init_array.", ".fini_array.", ".ctors.", ".dtors.", ".tbss.",
         ".gcc_except_table.", ".tdata.", ".ARM.exidx."}) {
     StringRef Prefix = V.drop_back();
     if (Name.startswith(V) || Name == Prefix)
       return Prefix;
   }
 
   // CommonSection is identified as "COMMON" in linker scripts.
   // By default, it should go to .bss section.
   if (Name == "COMMON")
     return ".bss";
 
   return Name;
 }
 
 template <class ELFT> static bool needsInterpSection() {
   return !Symtab<ELFT>::X->getSharedFiles().empty() &&
          !Config->DynamicLinker.empty() && !Script->ignoreInterpSection();
 }
 
 template <class ELFT> void elf::writeResult() { Writer<ELFT>().run(); }
 
 template <class ELFT> void Writer<ELFT>::removeEmptyPTLoad() {
   auto I = std::remove_if(Phdrs.begin(), Phdrs.end(), [&](const PhdrEntry &P) {
     if (P.p_type != PT_LOAD)
       return false;
     if (!P.First)
       return true;
     uint64_t Size = P.Last->Addr + P.Last->Size - P.First->Addr;
     return Size == 0;
   });
   Phdrs.erase(I, Phdrs.end());
 }
 
-// This function scans over the input sections and creates mergeable
-// synthetic sections. It removes MergeInputSections from array and
-// adds new synthetic ones. Each synthetic section is added to the
-// location of the first input section it replaces.
-static void combineMergableSections() {
-  std::vector<MergeSyntheticSection *> MergeSections;
-  for (InputSectionBase *&S : InputSections) {
-    MergeInputSection *MS = dyn_cast<MergeInputSection>(S);
-    if (!MS)
-      continue;
-
-    // We do not want to handle sections that are not alive, so just remove
-    // them instead of trying to merge.
-    if (!MS->Live)
-      continue;
-
-    StringRef OutsecName = getOutputSectionName(MS->Name);
-    uint64_t Flags = MS->Flags & ~(uint64_t)SHF_GROUP;
-    uint32_t Alignment = std::max<uint32_t>(MS->Alignment, MS->Entsize);
-
-    auto I = llvm::find_if(MergeSections, [=](MergeSyntheticSection *Sec) {
-      return Sec->Name == OutsecName && Sec->Flags == Flags &&
-             Sec->Alignment == Alignment;
-    });
-    if (I == MergeSections.end()) {
-      MergeSyntheticSection *Syn =
-          make<MergeSyntheticSection>(OutsecName, MS->Type, Flags, Alignment);
-      MergeSections.push_back(Syn);
-      I = std::prev(MergeSections.end());
-      S = Syn;
-    } else {
-      S = nullptr;
-    }
-    (*I)->addSection(MS);
-  }
-
-  std::vector<InputSectionBase *> &V = InputSections;
-  V.erase(std::remove(V.begin(), V.end(), nullptr), V.end());
-}
-
 template <class ELFT> static void combineEhFrameSections() {
   for (InputSectionBase *&S : InputSections) {
     EhInputSection *ES = dyn_cast<EhInputSection>(S);
     if (!ES || !ES->Live)
       continue;
 
     In<ELFT>::EhFrame->addSection(ES);
     S = nullptr;
   }
 
   std::vector<InputSectionBase *> &V = InputSections;
   V.erase(std::remove(V.begin(), V.end(), nullptr), V.end());
 }
 
 template <class ELFT> void Writer<ELFT>::clearOutputSections() {
+  if (Script->Opt.HasSections)
+    Script->createOrphanCommands();
+  else
+    Script->fabricateDefaultCommands();
   // Clear the OutputSections to make sure it is not used anymore. Any
   // code from this point on should be using the linker script
   // commands.
   for (OutputSection *Sec : OutputSections)
     Sec->Sections.clear();
   OutputSections.clear();
 }
 
 // The main function of the writer.
 template <class ELFT> void Writer<ELFT>::run() {
   // Create linker-synthesized sections such as .got or .plt.
   // Such sections are of type input section.
   createSyntheticSections();
-  combineMergableSections();
 
   if (!Config->Relocatable)
     combineEhFrameSections<ELFT>();
 
   // We need to create some reserved symbols such as _end. Create them.
   if (!Config->Relocatable)
     addReservedSymbols();
 
   // Create output sections.
-  Script->OutputSections = &OutputSections;
   if (Script->Opt.HasSections) {
     // If linker script contains SECTIONS commands, let it create sections.
     Script->processCommands(Factory);
 
     // Linker scripts may have left some input sections unassigned.
     // Assign such sections using the default rule.
     Script->addOrphanSections(Factory);
   } else {
     // If linker script does not contain SECTIONS commands, create
     // output sections by default rules. We still need to give the
     // linker script a chance to run, because it might contain
     // non-SECTIONS commands such as ASSERT.
     createSections();
     Script->processCommands(Factory);
   }
 
   if (Config->Discard != DiscardPolicy::All)
     copyLocalSymbols();
 
   if (Config->CopyRelocs)
     addSectionSymbols();
 
   // Now that we have a complete set of output sections. This function
   // completes section contents. For example, we need to add strings
   // to the string table, and add entries to .got and .plt.
   // finalizeSections does that.
   finalizeSections();
   if (ErrorCount)
     return;
 
   if (!Script->Opt.HasSections && !Config->Relocatable)
     fixSectionAlignments();
 
   // If -compressed-debug-sections is specified, we need to compress
   // .debug_* sections. Do it right now because it changes the size of
   // output sections.
   parallelForEach(
       OutputSectionCommands.begin(), OutputSectionCommands.end(),
       [](OutputSectionCommand *Cmd) { Cmd->maybeCompress<ELFT>(); });
 
-  Script->assignAddresses(Phdrs, OutputSectionCommands);
+  Script->assignAddresses(Phdrs);
 
   // Remove empty PT_LOAD to avoid causing the dynamic linker to try to mmap a
   // 0 sized region. This has to be done late since only after assignAddresses
   // we know the size of the sections.
   removeEmptyPTLoad();
 
   if (!Config->OFormatBinary)
     assignFileOffsets();
   else
     assignFileOffsetsBinary();
 
   setPhdrs();
 
   if (Config->Relocatable) {
     for (OutputSectionCommand *Cmd : OutputSectionCommands)
       Cmd->Sec->Addr = 0;
   } else {
     fixPredefinedSymbols();
   }
 
   // It does not make sense try to open the file if we have error already.
   if (ErrorCount)
     return;
   // Write the result down to a file.
   openFile();
   if (ErrorCount)
     return;
 
   if (!Config->OFormatBinary) {
     writeHeader();
     writeSections();
   } else {
     writeSectionsBinary();
   }
 
   // Backfill .note.gnu.build-id section content. This is done at last
   // because the content is usually a hash value of the entire output file.
   writeBuildId();
   if (ErrorCount)
     return;
 
 
   // Handle -Map option.
   writeMapFile<ELFT>(OutputSectionCommands);
   if (ErrorCount)
     return;
 
   if (auto EC = Buffer->commit())
     error("failed to write to the output file: " + EC.message());
 
   // Flush the output streams and exit immediately. A full shutdown
   // is a good test that we are keeping track of all allocated memory,
   // but actually freeing it is a waste of time in a regular linker run.
   if (Config->ExitEarly)
     exitLld(0);
 }
 
 // Initialize Out members.
 template <class ELFT> void Writer<ELFT>::createSyntheticSections() {
   // Initialize all pointers with NULL. This is needed because
   // you can call lld::elf::main more than once as a library.
   memset(&Out::First, 0, sizeof(Out));
 
   auto Add = [](InputSectionBase *Sec) { InputSections.push_back(Sec); };
 
   InX::DynStrTab = make<StringTableSection>(".dynstr", true);
   InX::Dynamic = make<DynamicSection<ELFT>>();
   In<ELFT>::RelaDyn = make<RelocationSection<ELFT>>(
       Config->IsRela ? ".rela.dyn" : ".rel.dyn", Config->ZCombreloc);
   InX::ShStrTab = make<StringTableSection>(".shstrtab", false);
 
   Out::ElfHeader = make<OutputSection>("", 0, SHF_ALLOC);
   Out::ElfHeader->Size = sizeof(Elf_Ehdr);
   Out::ProgramHeaders = make<OutputSection>("", 0, SHF_ALLOC);
   Out::ProgramHeaders->updateAlignment(Config->Wordsize);
 
   if (needsInterpSection<ELFT>()) {
     InX::Interp = createInterpSection();
     Add(InX::Interp);
   } else {
     InX::Interp = nullptr;
   }
 
-  if (!Config->Relocatable)
-    Add(createCommentSection<ELFT>());
-
   if (Config->Strip != StripPolicy::All) {
     InX::StrTab = make<StringTableSection>(".strtab", false);
     InX::SymTab = make<SymbolTableSection<ELFT>>(*InX::StrTab);
   }
 
   if (Config->BuildId != BuildIdKind::None) {
     InX::BuildId = make<BuildIdSection>();
     Add(InX::BuildId);
   }
 
   InX::Common = createCommonSection<ELFT>();
   if (InX::Common)
     Add(InX::Common);
 
   InX::Bss = make<BssSection>(".bss");
   Add(InX::Bss);
   InX::BssRelRo = make<BssSection>(".bss.rel.ro");
   Add(InX::BssRelRo);
 
   // Add MIPS-specific sections.
   bool HasDynSymTab = !Symtab<ELFT>::X->getSharedFiles().empty() ||
                       Config->Pic || Config->ExportDynamic;
   if (Config->EMachine == EM_MIPS) {
     if (!Config->Shared && HasDynSymTab) {
       InX::MipsRldMap = make<MipsRldMapSection>();
       Add(InX::MipsRldMap);
     }
     if (auto *Sec = MipsAbiFlagsSection<ELFT>::create())
       Add(Sec);
     if (auto *Sec = MipsOptionsSection<ELFT>::create())
       Add(Sec);
     if (auto *Sec = MipsReginfoSection<ELFT>::create())
       Add(Sec);
   }
 
   if (HasDynSymTab) {
     InX::DynSymTab = make<SymbolTableSection<ELFT>>(*InX::DynStrTab);
     Add(InX::DynSymTab);
 
     In<ELFT>::VerSym = make<VersionTableSection<ELFT>>();
     Add(In<ELFT>::VerSym);
 
     if (!Config->VersionDefinitions.empty()) {
       In<ELFT>::VerDef = make<VersionDefinitionSection<ELFT>>();
       Add(In<ELFT>::VerDef);
     }
 
     In<ELFT>::VerNeed = make<VersionNeedSection<ELFT>>();
     Add(In<ELFT>::VerNeed);
 
     if (Config->GnuHash) {
       InX::GnuHashTab = make<GnuHashTableSection>();
       Add(InX::GnuHashTab);
     }
 
     if (Config->SysvHash) {
       In<ELFT>::HashTab = make<HashTableSection<ELFT>>();
       Add(In<ELFT>::HashTab);
     }
 
     Add(InX::Dynamic);
     Add(InX::DynStrTab);
     Add(In<ELFT>::RelaDyn);
   }
 
   // Add .got. MIPS' .got is so different from the other archs,
   // it has its own class.
   if (Config->EMachine == EM_MIPS) {
     InX::MipsGot = make<MipsGotSection>();
     Add(InX::MipsGot);
   } else {
     InX::Got = make<GotSection>();
     Add(InX::Got);
   }
 
   InX::GotPlt = make<GotPltSection>();
   Add(InX::GotPlt);
   InX::IgotPlt = make<IgotPltSection>();
   Add(InX::IgotPlt);
 
   if (Config->GdbIndex) {
     InX::GdbIndex = make<GdbIndexSection>();
     Add(InX::GdbIndex);
   }
 
   // We always need to add rel[a].plt to output if it has entries.
   // Even for static linking it can contain R_[*]_IRELATIVE relocations.
   In<ELFT>::RelaPlt = make<RelocationSection<ELFT>>(
       Config->IsRela ? ".rela.plt" : ".rel.plt", false /*Sort*/);
   Add(In<ELFT>::RelaPlt);
 
   // The RelaIplt immediately follows .rel.plt (.rel.dyn for ARM) to ensure
   // that the IRelative relocations are processed last by the dynamic loader
   In<ELFT>::RelaIplt = make<RelocationSection<ELFT>>(
       (Config->EMachine == EM_ARM) ? ".rel.dyn" : In<ELFT>::RelaPlt->Name,
       false /*Sort*/);
   Add(In<ELFT>::RelaIplt);
 
   InX::Plt = make<PltSection>(Target->PltHeaderSize);
   Add(InX::Plt);
   InX::Iplt = make<PltSection>(0);
   Add(InX::Iplt);
 
   if (!Config->Relocatable) {
     if (Config->EhFrameHdr) {
       In<ELFT>::EhFrameHdr = make<EhFrameHeader<ELFT>>();
       Add(In<ELFT>::EhFrameHdr);
     }
     In<ELFT>::EhFrame = make<EhFrameSection<ELFT>>();
     Add(In<ELFT>::EhFrame);
   }
 
   if (InX::SymTab)
     Add(InX::SymTab);
   Add(InX::ShStrTab);
   if (InX::StrTab)
     Add(InX::StrTab);
 }
 
 static bool shouldKeepInSymtab(SectionBase *Sec, StringRef SymName,
                                const SymbolBody &B) {
   if (B.isFile() || B.isSection())
     return false;
 
   // If sym references a section in a discarded group, don't keep it.
   if (Sec == &InputSection::Discarded)
     return false;
 
   if (Config->Discard == DiscardPolicy::None)
     return true;
 
   // In ELF assembly .L symbols are normally discarded by the assembler.
   // If the assembler fails to do so, the linker discards them if
   // * --discard-locals is used.
   // * The symbol is in a SHF_MERGE section, which is normally the reason for
   //   the assembler keeping the .L symbol.
   if (!SymName.startswith(".L") && !SymName.empty())
     return true;
 
   if (Config->Discard == DiscardPolicy::Locals)
     return false;
 
   return !Sec || !(Sec->Flags & SHF_MERGE);
 }
 
 static bool includeInSymtab(const SymbolBody &B) {
   if (!B.isLocal() && !B.symbol()->IsUsedInRegularObj)
     return false;
 
   if (auto *D = dyn_cast<DefinedRegular>(&B)) {
     // Always include absolute symbols.
     SectionBase *Sec = D->Section;
     if (!Sec)
       return true;
     if (auto *IS = dyn_cast<InputSectionBase>(Sec)) {
       Sec = IS->Repl;
       IS = cast<InputSectionBase>(Sec);
       // Exclude symbols pointing to garbage-collected sections.
       if (!IS->Live)
         return false;
     }
     if (auto *S = dyn_cast<MergeInputSection>(Sec))
       if (!S->getSectionPiece(D->Value)->Live)
         return false;
   }
   return true;
 }
 
 // Local symbols are not in the linker's symbol table. This function scans
 // each object file's symbol table to copy local symbols to the output.
 template <class ELFT> void Writer<ELFT>::copyLocalSymbols() {
   if (!InX::SymTab)
     return;
   for (elf::ObjectFile<ELFT> *F : Symtab<ELFT>::X->getObjectFiles()) {
     for (SymbolBody *B : F->getLocalSymbols()) {
       if (!B->IsLocal)
         fatal(toString(F) +
               ": broken object: getLocalSymbols returns a non-local symbol");
       auto *DR = dyn_cast<DefinedRegular>(B);
 
       // No reason to keep local undefined symbol in symtab.
       if (!DR)
         continue;
       if (!includeInSymtab(*B))
         continue;
 
       SectionBase *Sec = DR->Section;
       if (!shouldKeepInSymtab(Sec, B->getName(), *B))
         continue;
       InX::SymTab->addSymbol(B);
     }
   }
 }
 
 template <class ELFT> void Writer<ELFT>::addSectionSymbols() {
   // Create one STT_SECTION symbol for each output section we might
   // have a relocation with.
   for (OutputSection *Sec : OutputSections) {
     if (Sec->Sections.empty())
       continue;
 
     InputSection *IS = Sec->Sections[0];
     if (isa<SyntheticSection>(IS) || IS->Type == SHT_REL ||
         IS->Type == SHT_RELA)
       continue;
 
     auto *Sym =
         make<DefinedRegular>("", /*IsLocal=*/true, /*StOther=*/0, STT_SECTION,
                              /*Value=*/0, /*Size=*/0, IS, nullptr);
     InX::SymTab->addSymbol(Sym);
   }
 }
 
 // Today's loaders have a feature to make segments read-only after
 // processing dynamic relocations to enhance security. PT_GNU_RELRO
 // is defined for that.
 //
 // This function returns true if a section needs to be put into a
 // PT_GNU_RELRO segment.
 bool elf::isRelroSection(const OutputSection *Sec) {
   if (!Config->ZRelro)
     return false;
 
   uint64_t Flags = Sec->Flags;
 
   // Non-allocatable or non-writable sections don't need RELRO because
   // they are not writable or not even mapped to memory in the first place.
   // RELRO is for sections that are essentially read-only but need to
   // be writable only at process startup to allow dynamic linker to
   // apply relocations.
   if (!(Flags & SHF_ALLOC) || !(Flags & SHF_WRITE))
     return false;
 
   // Once initialized, TLS data segments are used as data templates
   // for a thread-local storage. For each new thread, runtime
   // allocates memory for a TLS and copy templates there. No thread
   // are supposed to use templates directly. Thus, it can be in RELRO.
   if (Flags & SHF_TLS)
     return true;
 
   // .init_array, .preinit_array and .fini_array contain pointers to
   // functions that are executed on process startup or exit. These
   // pointers are set by the static linker, and they are not expected
   // to change at runtime. But if you are an attacker, you could do
   // interesting things by manipulating pointers in .fini_array, for
   // example. So they are put into RELRO.
   uint32_t Type = Sec->Type;
   if (Type == SHT_INIT_ARRAY || Type == SHT_FINI_ARRAY ||
       Type == SHT_PREINIT_ARRAY)
     return true;
 
   // .got contains pointers to external symbols. They are resolved by
   // the dynamic linker when a module is loaded into memory, and after
   // that they are not expected to change. So, it can be in RELRO.
   if (InX::Got && Sec == InX::Got->getParent())
     return true;
 
   // .got.plt contains pointers to external function symbols. They are
   // by default resolved lazily, so we usually cannot put it into RELRO.
   // However, if "-z now" is given, the lazy symbol resolution is
   // disabled, which enables us to put it into RELRO.
   if (Sec == InX::GotPlt->getParent())
     return Config->ZNow;
 
   // .dynamic section contains data for the dynamic linker, and
   // there's no need to write to it at runtime, so it's better to put
   // it into RELRO.
   if (Sec == InX::Dynamic->getParent())
     return true;
 
   // .bss.rel.ro is used for copy relocations for read-only symbols.
   // Since the dynamic linker needs to process copy relocations, the
   // section cannot be read-only, but once initialized, they shouldn't
   // change.
   if (Sec == InX::BssRelRo->getParent())
     return true;
 
   // Sections with some special names are put into RELRO. This is a
   // bit unfortunate because section names shouldn't be significant in
   // ELF in spirit. But in reality many linker features depend on
   // magic section names.
   StringRef S = Sec->Name;
   return S == ".data.rel.ro" || S == ".ctors" || S == ".dtors" || S == ".jcr" ||
          S == ".eh_frame" || S == ".openbsd.randomdata";
 }
 
 // We compute a rank for each section. The rank indicates where the
 // section should be placed in the file.  Instead of using simple
 // numbers (0,1,2...), we use a series of flags. One for each decision
 // point when placing the section.
 // Using flags has two key properties:
 // * It is easy to check if a give branch was taken.
 // * It is easy two see how similar two ranks are (see getRankProximity).
 enum RankFlags {
   RF_NOT_ADDR_SET = 1 << 16,
   RF_NOT_INTERP = 1 << 15,
   RF_NOT_ALLOC = 1 << 14,
   RF_WRITE = 1 << 13,
   RF_EXEC_WRITE = 1 << 12,
   RF_EXEC = 1 << 11,
   RF_NON_TLS_BSS = 1 << 10,
   RF_NON_TLS_BSS_RO = 1 << 9,
   RF_NOT_TLS = 1 << 8,
   RF_BSS = 1 << 7,
   RF_PPC_NOT_TOCBSS = 1 << 6,
   RF_PPC_OPD = 1 << 5,
   RF_PPC_TOCL = 1 << 4,
   RF_PPC_TOC = 1 << 3,
   RF_PPC_BRANCH_LT = 1 << 2,
   RF_MIPS_GPREL = 1 << 1,
   RF_MIPS_NOT_GOT = 1 << 0
 };
 
 static unsigned getSectionRank(const OutputSection *Sec) {
   unsigned Rank = 0;
 
   // We want to put section specified by -T option first, so we
   // can start assigning VA starting from them later.
   if (Config->SectionStartMap.count(Sec->Name))
     return Rank;
   Rank |= RF_NOT_ADDR_SET;
 
   // Put .interp first because some loaders want to see that section
   // on the first page of the executable file when loaded into memory.
   if (Sec->Name == ".interp")
     return Rank;
   Rank |= RF_NOT_INTERP;
 
   // Allocatable sections go first to reduce the total PT_LOAD size and
   // so debug info doesn't change addresses in actual code.
   if (!(Sec->Flags & SHF_ALLOC))
     return Rank | RF_NOT_ALLOC;
 
   // Sort sections based on their access permission in the following
   // order: R, RX, RWX, RW.  This order is based on the following
   // considerations:
   // * Read-only sections come first such that they go in the
   //   PT_LOAD covering the program headers at the start of the file.
   // * Read-only, executable sections come next, unless the
   //   -no-rosegment option is used.
   // * Writable, executable sections follow such that .plt on
   //   architectures where it needs to be writable will be placed
   //   between .text and .data.
   // * Writable sections come last, such that .bss lands at the very
   //   end of the last PT_LOAD.
   bool IsExec = Sec->Flags & SHF_EXECINSTR;
   bool IsWrite = Sec->Flags & SHF_WRITE;
 
   if (IsExec) {
     if (IsWrite)
       Rank |= RF_EXEC_WRITE;
     else if (!Config->SingleRoRx)
       Rank |= RF_EXEC;
   } else {
     if (IsWrite)
       Rank |= RF_WRITE;
   }
 
   // If we got here we know that both A and B are in the same PT_LOAD.
 
   bool IsTls = Sec->Flags & SHF_TLS;
   bool IsNoBits = Sec->Type == SHT_NOBITS;
 
   // The first requirement we have is to put (non-TLS) nobits sections last. The
   // reason is that the only thing the dynamic linker will see about them is a
   // p_memsz that is larger than p_filesz. Seeing that it zeros the end of the
   // PT_LOAD, so that has to correspond to the nobits sections.
   bool IsNonTlsNoBits = IsNoBits && !IsTls;
   if (IsNonTlsNoBits)
     Rank |= RF_NON_TLS_BSS;
 
   // We place nobits RelRo sections before plain r/w ones, and non-nobits RelRo
   // sections after r/w ones, so that the RelRo sections are contiguous.
   bool IsRelRo = isRelroSection(Sec);
   if (IsNonTlsNoBits && !IsRelRo)
     Rank |= RF_NON_TLS_BSS_RO;
   if (!IsNonTlsNoBits && IsRelRo)
     Rank |= RF_NON_TLS_BSS_RO;
 
   // The TLS initialization block needs to be a single contiguous block in a R/W
   // PT_LOAD, so stick TLS sections directly before the other RelRo R/W
   // sections. The TLS NOBITS sections are placed here as they don't take up
   // virtual address space in the PT_LOAD.
   if (!IsTls)
     Rank |= RF_NOT_TLS;
 
   // Within the TLS initialization block, the non-nobits sections need to appear
   // first.
   if (IsNoBits)
     Rank |= RF_BSS;
 
   // // Some architectures have additional ordering restrictions for sections
   // // within the same PT_LOAD.
   if (Config->EMachine == EM_PPC64) {
     // PPC64 has a number of special SHT_PROGBITS+SHF_ALLOC+SHF_WRITE sections
     // that we would like to make sure appear is a specific order to maximize
     // their coverage by a single signed 16-bit offset from the TOC base
     // pointer. Conversely, the special .tocbss section should be first among
     // all SHT_NOBITS sections. This will put it next to the loaded special
     // PPC64 sections (and, thus, within reach of the TOC base pointer).
     StringRef Name = Sec->Name;
     if (Name != ".tocbss")
       Rank |= RF_PPC_NOT_TOCBSS;
 
     if (Name == ".opd")
       Rank |= RF_PPC_OPD;
 
     if (Name == ".toc1")
       Rank |= RF_PPC_TOCL;
 
     if (Name == ".toc")
       Rank |= RF_PPC_TOC;
 
     if (Name == ".branch_lt")
       Rank |= RF_PPC_BRANCH_LT;
   }
   if (Config->EMachine == EM_MIPS) {
     // All sections with SHF_MIPS_GPREL flag should be grouped together
     // because data in these sections is addressable with a gp relative address.
     if (Sec->Flags & SHF_MIPS_GPREL)
       Rank |= RF_MIPS_GPREL;
 
     if (Sec->Name != ".got")
       Rank |= RF_MIPS_NOT_GOT;
   }
 
   return Rank;
 }
 
-static bool compareSectionsNonScript(const OutputSection *A,
-                                     const OutputSection *B) {
+static bool compareSections(const BaseCommand *ACmd, const BaseCommand *BCmd) {
+  const OutputSection *A = cast<OutputSectionCommand>(ACmd)->Sec;
+  const OutputSection *B = cast<OutputSectionCommand>(BCmd)->Sec;
   if (A->SortRank != B->SortRank)
     return A->SortRank < B->SortRank;
   if (!(A->SortRank & RF_NOT_ADDR_SET))
     return Config->SectionStartMap.lookup(A->Name) <
            Config->SectionStartMap.lookup(B->Name);
   return false;
 }
 
-// Output section ordering is determined by this function.
-static bool compareSections(const OutputSection *A, const OutputSection *B) {
-  // For now, put sections mentioned in a linker script
-  // first. Sections not on linker script will have a SectionIndex of
-  // INT_MAX.
-  int AIndex = A->SectionIndex;
-  int BIndex = B->SectionIndex;
-  if (AIndex != BIndex)
-    return AIndex < BIndex;
-
-  return compareSectionsNonScript(A, B);
-}
-
 void PhdrEntry::add(OutputSection *Sec) {
   Last = Sec;
   if (!First)
     First = Sec;
   p_align = std::max(p_align, Sec->Alignment);
   if (p_type == PT_LOAD)
     Sec->FirstInPtLoad = First;
 }
 
 template <class ELFT>
 static Symbol *addRegular(StringRef Name, SectionBase *Sec, uint64_t Value,
                           uint8_t StOther = STV_HIDDEN,
                           uint8_t Binding = STB_WEAK) {
   // The linker generated symbols are added as STB_WEAK to allow user defined
   // ones to override them.
   return Symtab<ELFT>::X->addRegular(Name, StOther, STT_NOTYPE, Value,
                                      /*Size=*/0, Binding, Sec,
                                      /*File=*/nullptr);
 }
 
 template <class ELFT>
 static DefinedRegular *
 addOptionalRegular(StringRef Name, SectionBase *Sec, uint64_t Val,
                    uint8_t StOther = STV_HIDDEN, uint8_t Binding = STB_GLOBAL) {
   SymbolBody *S = Symtab<ELFT>::X->find(Name);
   if (!S)
     return nullptr;
   if (S->isInCurrentDSO())
     return nullptr;
   return cast<DefinedRegular>(
       addRegular<ELFT>(Name, Sec, Val, StOther, Binding)->body());
 }
 
 // The beginning and the ending of .rel[a].plt section are marked
 // with __rel[a]_iplt_{start,end} symbols if it is a statically linked
 // executable. The runtime needs these symbols in order to resolve
 // all IRELATIVE relocs on startup. For dynamic executables, we don't
 // need these symbols, since IRELATIVE relocs are resolved through GOT
 // and PLT. For details, see http://www.airs.com/blog/archives/403.
 template <class ELFT> void Writer<ELFT>::addRelIpltSymbols() {
   if (InX::DynSymTab)
     return;
   StringRef S = Config->IsRela ? "__rela_iplt_start" : "__rel_iplt_start";
   addOptionalRegular<ELFT>(S, In<ELFT>::RelaIplt, 0, STV_HIDDEN, STB_WEAK);
 
   S = Config->IsRela ? "__rela_iplt_end" : "__rel_iplt_end";
   addOptionalRegular<ELFT>(S, In<ELFT>::RelaIplt, -1, STV_HIDDEN, STB_WEAK);
 }
 
 // The linker is expected to define some symbols depending on
 // the linking result. This function defines such symbols.
 template <class ELFT> void Writer<ELFT>::addReservedSymbols() {
   if (Config->EMachine == EM_MIPS) {
     // Define _gp for MIPS. st_value of _gp symbol will be updated by Writer
     // so that it points to an absolute address which by default is relative
     // to GOT. Default offset is 0x7ff0.
     // See "Global Data Symbols" in Chapter 6 in the following document:
     // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
     ElfSym::MipsGp = Symtab<ELFT>::X->addAbsolute("_gp", STV_HIDDEN, STB_LOCAL);
 
     // On MIPS O32 ABI, _gp_disp is a magic symbol designates offset between
     // start of function and 'gp' pointer into GOT.
     if (Symtab<ELFT>::X->find("_gp_disp"))
       ElfSym::MipsGpDisp =
           Symtab<ELFT>::X->addAbsolute("_gp_disp", STV_HIDDEN, STB_LOCAL);
 
     // The __gnu_local_gp is a magic symbol equal to the current value of 'gp'
     // pointer. This symbol is used in the code generated by .cpload pseudo-op
     // in case of using -mno-shared option.
     // https://sourceware.org/ml/binutils/2004-12/msg00094.html
     if (Symtab<ELFT>::X->find("__gnu_local_gp"))
       ElfSym::MipsLocalGp =
           Symtab<ELFT>::X->addAbsolute("__gnu_local_gp", STV_HIDDEN, STB_LOCAL);
   }
 
   // In the assembly for 32 bit x86 the _GLOBAL_OFFSET_TABLE_ symbol
   // is magical and is used to produce a R_386_GOTPC relocation.
   // The R_386_GOTPC relocation value doesn't actually depend on the
   // symbol value, so it could use an index of STN_UNDEF which, according
   // to the spec, means the symbol value is 0.
   // Unfortunately both gas and MC keep the _GLOBAL_OFFSET_TABLE_ symbol in
   // the object file.
   // The situation is even stranger on x86_64 where the assembly doesn't
   // need the magical symbol, but gas still puts _GLOBAL_OFFSET_TABLE_ as
   // an undefined symbol in the .o files.
   // Given that the symbol is effectively unused, we just create a dummy
   // hidden one to avoid the undefined symbol error.
   Symtab<ELFT>::X->addIgnored("_GLOBAL_OFFSET_TABLE_");
 
   // __tls_get_addr is defined by the dynamic linker for dynamic ELFs. For
   // static linking the linker is required to optimize away any references to
   // __tls_get_addr, so it's not defined anywhere. Create a hidden definition
   // to avoid the undefined symbol error.
   if (!InX::DynSymTab)
     Symtab<ELFT>::X->addIgnored("__tls_get_addr");
 
   // __ehdr_start is the location of ELF file headers. Note that we define
   // this symbol unconditionally even when using a linker script, which
   // differs from the behavior implemented by GNU linker which only define
   // this symbol if ELF headers are in the memory mapped segment.
   // __executable_start is not documented, but the expectation of at
   // least the android libc is that it points to the elf header too.
   // __dso_handle symbol is passed to cxa_finalize as a marker to identify
   // each DSO. The address of the symbol doesn't matter as long as they are
   // different in different DSOs, so we chose the start address of the DSO.
   for (const char *Name :
        {"__ehdr_start", "__executable_start", "__dso_handle"})
     addOptionalRegular<ELFT>(Name, Out::ElfHeader, 0, STV_HIDDEN);
 
   // If linker script do layout we do not need to create any standart symbols.
   if (Script->Opt.HasSections)
     return;
 
   auto Add = [](StringRef S) {
     return addOptionalRegular<ELFT>(S, Out::ElfHeader, 0, STV_DEFAULT);
   };
 
   ElfSym::Bss = Add("__bss_start");
   ElfSym::End1 = Add("end");
   ElfSym::End2 = Add("_end");
   ElfSym::Etext1 = Add("etext");
   ElfSym::Etext2 = Add("_etext");
   ElfSym::Edata1 = Add("edata");
   ElfSym::Edata2 = Add("_edata");
 }
 
 // Sort input sections by section name suffixes for
 // __attribute__((init_priority(N))).
 static void sortInitFini(OutputSection *S) {
   if (S)
     reinterpret_cast<OutputSection *>(S)->sortInitFini();
 }
 
 // Sort input sections by the special rule for .ctors and .dtors.
 static void sortCtorsDtors(OutputSection *S) {
   if (S)
     reinterpret_cast<OutputSection *>(S)->sortCtorsDtors();
 }
 
 // Sort input sections using the list provided by --symbol-ordering-file.
 template <class ELFT>
 static void sortBySymbolsOrder(ArrayRef<OutputSection *> OutputSections) {
   if (Config->SymbolOrderingFile.empty())
     return;
 
   // Build a map from symbols to their priorities. Symbols that didn't
   // appear in the symbol ordering file have the lowest priority 0.
   // All explicitly mentioned symbols have negative (higher) priorities.
   DenseMap<StringRef, int> SymbolOrder;
   int Priority = -Config->SymbolOrderingFile.size();
   for (StringRef S : Config->SymbolOrderingFile)
     SymbolOrder.insert({S, Priority++});
 
   // Build a map from sections to their priorities.
   DenseMap<SectionBase *, int> SectionOrder;
   for (elf::ObjectFile<ELFT> *File : Symtab<ELFT>::X->getObjectFiles()) {
     for (SymbolBody *Body : File->getSymbols()) {
       auto *D = dyn_cast<DefinedRegular>(Body);
       if (!D || !D->Section)
         continue;
       int &Priority = SectionOrder[D->Section];
       Priority = std::min(Priority, SymbolOrder.lookup(D->getName()));
     }
   }
 
   // Sort sections by priority.
   for (OutputSection *Base : OutputSections)
     if (auto *Sec = dyn_cast<OutputSection>(Base))
       Sec->sort([&](InputSectionBase *S) { return SectionOrder.lookup(S); });
 }
 
 template <class ELFT>
 void Writer<ELFT>::forEachRelSec(std::function<void(InputSectionBase &)> Fn) {
   for (InputSectionBase *IS : InputSections) {
     if (!IS->Live)
       continue;
     // Scan all relocations. Each relocation goes through a series
     // of tests to determine if it needs special treatment, such as
     // creating GOT, PLT, copy relocations, etc.
     // Note that relocations for non-alloc sections are directly
     // processed by InputSection::relocateNonAlloc.
     if (!(IS->Flags & SHF_ALLOC))
       continue;
     if (isa<InputSection>(IS) || isa<EhInputSection>(IS))
       Fn(*IS);
   }
 
   if (!Config->Relocatable) {
     for (EhInputSection *ES : In<ELFT>::EhFrame->Sections)
       Fn(*ES);
   }
 }
 
 template <class ELFT> void Writer<ELFT>::createSections() {
   for (InputSectionBase *IS : InputSections)
     if (IS)
       Factory.addInputSec(IS, getOutputSectionName(IS->Name));
 
   sortBySymbolsOrder<ELFT>(OutputSections);
   sortInitFini(findSection(".init_array"));
   sortInitFini(findSection(".fini_array"));
   sortCtorsDtors(findSection(".ctors"));
   sortCtorsDtors(findSection(".dtors"));
 }
 
 // We want to find how similar two ranks are.
 // The more branches in getSectionRank that match, the more similar they are.
 // Since each branch corresponds to a bit flag, we can just use
 // countLeadingZeros.
-static unsigned getRankProximity(OutputSection *A, OutputSection *B) {
+static int getRankProximity(OutputSection *A, OutputSection *B) {
   return countLeadingZeros(A->SortRank ^ B->SortRank);
 }
 
+static int getRankProximity(OutputSection *A, BaseCommand *B) {
+  if (auto *Cmd = dyn_cast<OutputSectionCommand>(B))
+    if (Cmd->Sec)
+      return getRankProximity(A, Cmd->Sec);
+  return -1;
+}
+
+// When placing orphan sections, we want to place them after symbol assignments
+// so that an orphan after
+//   begin_foo = .;
+//   foo : { *(foo) }
+//   end_foo = .;
+// doesn't break the intended meaning of the begin/end symbols.
+// We don't want to go over sections since findOrphanPos is the
+// one in charge of deciding the order of the sections.
+// We don't want to go over changes to '.', since doing so in
+//  rx_sec : { *(rx_sec) }
+//  . = ALIGN(0x1000);
+//  /* The RW PT_LOAD starts here*/
+//  rw_sec : { *(rw_sec) }
+// would mean that the RW PT_LOAD would become unaligned.
+static bool shouldSkip(BaseCommand *Cmd) {
+  if (isa<OutputSectionCommand>(Cmd))
+    return false;
+  if (auto *Assign = dyn_cast<SymbolAssignment>(Cmd))
+    return Assign->Name != ".";
+  return true;
+}
+
 // We want to place orphan sections so that they share as much
 // characteristics with their neighbors as possible. For example, if
 // both are rw, or both are tls.
 template <typename ELFT>
-static std::vector<OutputSection *>::iterator
-findOrphanPos(std::vector<OutputSection *>::iterator B,
-              std::vector<OutputSection *>::iterator E) {
-  OutputSection *Sec = *E;
+static std::vector<BaseCommand *>::iterator
+findOrphanPos(std::vector<BaseCommand *>::iterator B,
+              std::vector<BaseCommand *>::iterator E) {
+  OutputSection *Sec = cast<OutputSectionCommand>(*E)->Sec;
 
   // Find the first element that has as close a rank as possible.
-  auto I = std::max_element(B, E, [=](OutputSection *A, OutputSection *B) {
+  auto I = std::max_element(B, E, [=](BaseCommand *A, BaseCommand *B) {
     return getRankProximity(Sec, A) < getRankProximity(Sec, B);
   });
   if (I == E)
     return E;
 
   // Consider all existing sections with the same proximity.
-  unsigned Proximity = getRankProximity(Sec, *I);
-  while (I != E && getRankProximity(Sec, *I) == Proximity &&
-         Sec->SortRank >= (*I)->SortRank)
+  int Proximity = getRankProximity(Sec, *I);
+  for (; I != E; ++I) {
+    auto *Cmd = dyn_cast<OutputSectionCommand>(*I);
+    if (!Cmd || !Cmd->Sec)
+      continue;
+    if (getRankProximity(Sec, Cmd->Sec) != Proximity ||
+        Sec->SortRank < Cmd->Sec->SortRank)
+      break;
+  }
+  auto J = std::find_if(
+      llvm::make_reverse_iterator(I), llvm::make_reverse_iterator(B),
+      [](BaseCommand *Cmd) { return isa<OutputSectionCommand>(Cmd); });
+  I = J.base();
+  while (I != E && shouldSkip(*I))
     ++I;
   return I;
 }
 
 template <class ELFT> void Writer<ELFT>::sortSections() {
   // Don't sort if using -r. It is not necessary and we want to preserve the
   // relative order for SHF_LINK_ORDER sections.
   if (Config->Relocatable)
     return;
 
   if (Script->Opt.HasSections)
     Script->adjustSectionsBeforeSorting();
 
-  for (OutputSection *Sec : OutputSections)
-    Sec->SortRank = getSectionRank(Sec);
+  for (BaseCommand *Base : Script->Opt.Commands)
+    if (auto *Cmd = dyn_cast<OutputSectionCommand>(Base))
+      if (OutputSection *Sec = Cmd->Sec)
+        Sec->SortRank = getSectionRank(Sec);
 
   if (!Script->Opt.HasSections) {
-    std::stable_sort(OutputSections.begin(), OutputSections.end(),
-                     compareSectionsNonScript);
+    // We know that all the OutputSectionCommands are contiguous in
+    // this case.
+    auto E = Script->Opt.Commands.end();
+    auto I = Script->Opt.Commands.begin();
+    auto IsSection = [](BaseCommand *Base) {
+      return isa<OutputSectionCommand>(Base);
+    };
+    I = std::find_if(I, E, IsSection);
+    E = std::find_if(llvm::make_reverse_iterator(E),
+                     llvm::make_reverse_iterator(I), IsSection)
+            .base();
+    std::stable_sort(I, E, compareSections);
     return;
   }
 
+  // Orphan sections are sections present in the input files which are
+  // not explicitly placed into the output file by the linker script.
+  //
+  // The sections in the linker script are already in the correct
+  // order. We have to figuere out where to insert the orphan
+  // sections.
+  //
   // The order of the sections in the script is arbitrary and may not agree with
-  // compareSectionsNonScript. This means that we cannot easily define a
-  // strict weak ordering. To see why, consider a comparison of a section in the
-  // script and one not in the script. We have a two simple options:
+  // compareSections. This means that we cannot easily define a strict weak
+  // ordering. To see why, consider a comparison of a section in the script and
+  // one not in the script. We have a two simple options:
   // * Make them equivalent (a is not less than b, and b is not less than a).
   //   The problem is then that equivalence has to be transitive and we can
   //   have sections a, b and c with only b in a script and a less than c
   //   which breaks this property.
   // * Use compareSectionsNonScript. Given that the script order doesn't have
   //   to match, we can end up with sections a, b, c, d where b and c are in the
   //   script and c is compareSectionsNonScript less than b. In which case d
   //   can be equivalent to c, a to b and d < a. As a concrete example:
   //   .a (rx) # not in script
   //   .b (rx) # in script
   //   .c (ro) # in script
   //   .d (ro) # not in script
   //
   // The way we define an order then is:
-  // *  First put script sections at the start and sort the script sections.
-  // *  Move each non-script section to its preferred position. We try
+  // *  Sort only the orphan sections. They are in the end right now.
+  // *  Move each orphan section to its preferred position. We try
   //    to put each section in the last position where it it can share
   //    a PT_LOAD.
+  //
+  // There is some ambiguity as to where exactly a new entry should be
+  // inserted, because Opt.Commands contains not only output section
+  // commands but also other types of commands such as symbol assignment
+  // expressions. There's no correct answer here due to the lack of the
+  // formal specification of the linker script. We use heuristics to
+  // determine whether a new output command should be added before or
+  // after another commands. For the details, look at shouldSkip
+  // function.
 
-  std::stable_sort(OutputSections.begin(), OutputSections.end(),
-                   compareSections);
+  auto I = Script->Opt.Commands.begin();
+  auto E = Script->Opt.Commands.end();
+  auto NonScriptI = std::find_if(I, E, [](BaseCommand *Base) {
+    if (auto *Cmd = dyn_cast<OutputSectionCommand>(Base))
+      return Cmd->Sec && Cmd->Sec->SectionIndex == INT_MAX;
+    return false;
+  });
 
-  auto I = OutputSections.begin();
-  auto E = OutputSections.end();
-  auto NonScriptI =
-      std::find_if(OutputSections.begin(), E,
-                   [](OutputSection *S) { return S->SectionIndex == INT_MAX; });
+  // Sort the orphan sections.
+  std::stable_sort(NonScriptI, E, compareSections);
+
+  // As a horrible special case, skip the first . assignment if it is before any
+  // section. We do this because it is common to set a load address by starting
+  // the script with ". = 0xabcd" and the expectation is that every section is
+  // after that.
+  auto FirstSectionOrDotAssignment =
+      std::find_if(I, E, [](BaseCommand *Cmd) { return !shouldSkip(Cmd); });
+  if (FirstSectionOrDotAssignment != E &&
+      isa<SymbolAssignment>(**FirstSectionOrDotAssignment))
+    ++FirstSectionOrDotAssignment;
+  I = FirstSectionOrDotAssignment;
+
   while (NonScriptI != E) {
     auto Pos = findOrphanPos<ELFT>(I, NonScriptI);
+    OutputSection *Orphan = cast<OutputSectionCommand>(*NonScriptI)->Sec;
 
     // As an optimization, find all sections with the same sort rank
     // and insert them with one rotate.
-    unsigned Rank = (*NonScriptI)->SortRank;
-    auto End = std::find_if(NonScriptI + 1, E, [=](OutputSection *Sec) {
-      return Sec->SortRank != Rank;
+    unsigned Rank = Orphan->SortRank;
+    auto End = std::find_if(NonScriptI + 1, E, [=](BaseCommand *Cmd) {
+      return cast<OutputSectionCommand>(Cmd)->Sec->SortRank != Rank;
     });
     std::rotate(Pos, NonScriptI, End);
     NonScriptI = End;
   }
 
   Script->adjustSectionsAfterSorting();
 }
 
 static void applySynthetic(const std::vector<SyntheticSection *> &Sections,
                            std::function<void(SyntheticSection *)> Fn) {
   for (SyntheticSection *SS : Sections)
     if (SS && SS->getParent() && !SS->empty())
       Fn(SS);
 }
 
 // We need to add input synthetic sections early in createSyntheticSections()
 // to make them visible from linkescript side. But not all sections are always
 // required to be in output. For example we don't need dynamic section content
 // sometimes. This function filters out such unused sections from the output.
 static void removeUnusedSyntheticSections(std::vector<OutputSection *> &V) {
   // All input synthetic sections that can be empty are placed after
   // all regular ones. We iterate over them all and exit at first
   // non-synthetic.
   for (InputSectionBase *S : llvm::reverse(InputSections)) {
     SyntheticSection *SS = dyn_cast<SyntheticSection>(S);
     if (!SS)
       return;
     OutputSection *OS = SS->getParent();
     if (!SS->empty() || !OS)
       continue;
     OS->Sections.erase(std::find(OS->Sections.begin(), OS->Sections.end(), SS));
     SS->Live = false;
     // If there are no other sections in the output section, remove it from the
     // output.
     if (OS->Sections.empty())
       V.erase(std::find(V.begin(), V.end(), OS));
   }
 }
 
 // Create output section objects and add them to OutputSections.
 template <class ELFT> void Writer<ELFT>::finalizeSections() {
   Out::DebugInfo = findSection(".debug_info");
   Out::PreinitArray = findSection(".preinit_array");
   Out::InitArray = findSection(".init_array");
   Out::FiniArray = findSection(".fini_array");
 
   // The linker needs to define SECNAME_start, SECNAME_end and SECNAME_stop
   // symbols for sections, so that the runtime can get the start and end
   // addresses of each section by section name. Add such symbols.
   if (!Config->Relocatable) {
     addStartEndSymbols();
     for (OutputSection *Sec : OutputSections)
       addStartStopSymbols(Sec);
   }
 
   // Add _DYNAMIC symbol. Unlike GNU gold, our _DYNAMIC symbol has no type.
   // It should be okay as no one seems to care about the type.
   // Even the author of gold doesn't remember why gold behaves that way.
   // https://sourceware.org/ml/binutils/2002-03/msg00360.html
   if (InX::DynSymTab)
     addRegular<ELFT>("_DYNAMIC", InX::Dynamic, 0);
 
   // Define __rel[a]_iplt_{start,end} symbols if needed.
   addRelIpltSymbols();
 
   // This responsible for splitting up .eh_frame section into
   // pieces. The relocation scan uses those pieces, so this has to be
   // earlier.
   applySynthetic({In<ELFT>::EhFrame},
                  [](SyntheticSection *SS) { SS->finalizeContents(); });
 
   // Scan relocations. This must be done after every symbol is declared so that
   // we can correctly decide if a dynamic relocation is needed.
   forEachRelSec(scanRelocations<ELFT>);
 
   if (InX::Plt && !InX::Plt->empty())
     InX::Plt->addSymbols();
   if (InX::Iplt && !InX::Iplt->empty())
     InX::Iplt->addSymbols();
 
   // Now that we have defined all possible global symbols including linker-
   // synthesized ones. Visit all symbols to give the finishing touches.
   for (Symbol *S : Symtab<ELFT>::X->getSymbols()) {
     SymbolBody *Body = S->body();
 
     if (!includeInSymtab(*Body))
       continue;
     if (InX::SymTab)
       InX::SymTab->addSymbol(Body);
 
     if (InX::DynSymTab && S->includeInDynsym()) {
       InX::DynSymTab->addSymbol(Body);
       if (auto *SS = dyn_cast<SharedSymbol>(Body))
         if (cast<SharedFile<ELFT>>(SS->File)->isNeeded())
           In<ELFT>::VerNeed->addSymbol(SS);
     }
   }
 
   // Do not proceed if there was an undefined symbol.
   if (ErrorCount)
     return;
 
   addPredefinedSections();
   removeUnusedSyntheticSections(OutputSections);
 
+  clearOutputSections();
   sortSections();
 
+  // Now that we have the final list, create a list of all the
+  // OutputSectionCommands for convenience.
+  for (BaseCommand *Base : Script->Opt.Commands)
+    if (auto *Cmd = dyn_cast<OutputSectionCommand>(Base))
+      OutputSectionCommands.push_back(Cmd);
+
   // This is a bit of a hack. A value of 0 means undef, so we set it
   // to 1 t make __ehdr_start defined. The section number is not
   // particularly relevant.
   Out::ElfHeader->SectionIndex = 1;
 
   unsigned I = 1;
-  for (OutputSection *Sec : OutputSections) {
+  for (OutputSectionCommand *Cmd : OutputSectionCommands) {
+    OutputSection *Sec = Cmd->Sec;
     Sec->SectionIndex = I++;
     Sec->ShName = InX::ShStrTab->addString(Sec->Name);
   }
 
-  if (!Script->Opt.HasSections)
-    Script->fabricateDefaultCommands();
-  for (BaseCommand *Base : Script->Opt.Commands)
-    if (auto *Cmd = dyn_cast<OutputSectionCommand>(Base))
-      OutputSectionCommands.push_back(Cmd);
-
   // Binary and relocatable output does not have PHDRS.
   // The headers have to be created before finalize as that can influence the
   // image base and the dynamic section on mips includes the image base.
   if (!Config->Relocatable && !Config->OFormatBinary) {
     Phdrs = Script->hasPhdrsCommands() ? Script->createPhdrs() : createPhdrs();
     addPtArmExid(Phdrs);
     Out::ProgramHeaders->Size = sizeof(Elf_Phdr) * Phdrs.size();
   }
 
-  clearOutputSections();
-
   // Compute the size of .rela.dyn and .rela.plt early since we need
   // them to populate .dynamic.
   for (SyntheticSection *SS : {In<ELFT>::RelaDyn, In<ELFT>::RelaPlt})
     if (SS->getParent() && !SS->empty())
       SS->getParent()->assignOffsets();
 
   // Dynamic section must be the last one in this list and dynamic
   // symbol table section (DynSymTab) must be the first one.
   applySynthetic({InX::DynSymTab,    InX::Bss,           InX::BssRelRo,
                   InX::GnuHashTab,   In<ELFT>::HashTab,  InX::SymTab,
                   InX::ShStrTab,     InX::StrTab,        In<ELFT>::VerDef,
                   InX::DynStrTab,    InX::GdbIndex,      InX::Got,
                   InX::MipsGot,      InX::IgotPlt,       InX::GotPlt,
                   In<ELFT>::RelaDyn, In<ELFT>::RelaIplt, In<ELFT>::RelaPlt,
                   InX::Plt,          InX::Iplt,          In<ELFT>::EhFrameHdr,
                   In<ELFT>::VerSym,  In<ELFT>::VerNeed,  InX::Dynamic},
                  [](SyntheticSection *SS) { SS->finalizeContents(); });
 
   // Some architectures use small displacements for jump instructions.
   // It is linker's responsibility to create thunks containing long
   // jump instructions if jump targets are too far. Create thunks.
   if (Target->NeedsThunks) {
     // FIXME: only ARM Interworking and Mips LA25 Thunks are implemented,
     // these
     // do not require address information. To support range extension Thunks
     // we need to assign addresses so that we can tell if jump instructions
     // are out of range. This will need to turn into a loop that converges
     // when no more Thunks are added
     ThunkCreator TC;
-    if (TC.createThunks(OutputSectionCommands))
+    if (TC.createThunks(OutputSectionCommands)) {
       applySynthetic({InX::MipsGot},
                      [](SyntheticSection *SS) { SS->updateAllocSize(); });
+      if (TC.createThunks(OutputSectionCommands))
+        fatal("All non-range thunks should be created in first call");
+    }
   }
 
   // Fill other section headers. The dynamic table is finalized
   // at the end because some tags like RELSZ depend on result
   // of finalizing other sections.
   for (OutputSectionCommand *Cmd : OutputSectionCommands)
     Cmd->finalize<ELFT>();
 
   // createThunks may have added local symbols to the static symbol table
   applySynthetic({InX::SymTab, InX::ShStrTab, InX::StrTab},
                  [](SyntheticSection *SS) { SS->postThunkContents(); });
 }
 
 template <class ELFT> void Writer<ELFT>::addPredefinedSections() {
   // ARM ABI requires .ARM.exidx to be terminated by some piece of data.
   // We have the terminater synthetic section class. Add that at the end.
   auto *OS = dyn_cast_or_null<OutputSection>(findSection(".ARM.exidx"));
   if (!OS || OS->Sections.empty() || Config->Relocatable)
     return;
 
   auto *Sentinel = make<ARMExidxSentinelSection>();
   OS->addSection(Sentinel);
   // If there are linker script commands existing at this point then add the
   // sentinel to the last of these too.
   if (OutputSectionCommand *C = Script->getCmd(OS)) {
     auto ISD = std::find_if(C->Commands.rbegin(), C->Commands.rend(),
                             [](const BaseCommand *Base) {
                               return isa<InputSectionDescription>(Base);
                             });
     cast<InputSectionDescription>(*ISD)->Sections.push_back(Sentinel);
   }
 }
 
 // The linker is expected to define SECNAME_start and SECNAME_end
 // symbols for a few sections. This function defines them.
 template <class ELFT> void Writer<ELFT>::addStartEndSymbols() {
   auto Define = [&](StringRef Start, StringRef End, OutputSection *OS) {
     // These symbols resolve to the image base if the section does not exist.
     // A special value -1 indicates end of the section.
     if (OS) {
       addOptionalRegular<ELFT>(Start, OS, 0);
       addOptionalRegular<ELFT>(End, OS, -1);
     } else {
       if (Config->Pic)
         OS = Out::ElfHeader;
       addOptionalRegular<ELFT>(Start, OS, 0);
       addOptionalRegular<ELFT>(End, OS, 0);
     }
   };
 
   Define("__preinit_array_start", "__preinit_array_end", Out::PreinitArray);
   Define("__init_array_start", "__init_array_end", Out::InitArray);
   Define("__fini_array_start", "__fini_array_end", Out::FiniArray);
 
   if (OutputSection *Sec = findSection(".ARM.exidx"))
     Define("__exidx_start", "__exidx_end", Sec);
 }
 
 // If a section name is valid as a C identifier (which is rare because of
 // the leading '.'), linkers are expected to define __start_<secname> and
 // __stop_<secname> symbols. They are at beginning and end of the section,
 // respectively. This is not requested by the ELF standard, but GNU ld and
 // gold provide the feature, and used by many programs.
 template <class ELFT>
 void Writer<ELFT>::addStartStopSymbols(OutputSection *Sec) {
   StringRef S = Sec->Name;
   if (!isValidCIdentifier(S))
     return;
   addOptionalRegular<ELFT>(Saver.save("__start_" + S), Sec, 0, STV_DEFAULT);
   addOptionalRegular<ELFT>(Saver.save("__stop_" + S), Sec, -1, STV_DEFAULT);
 }
 
 template <class ELFT>
 OutputSectionCommand *Writer<ELFT>::findSectionCommand(StringRef Name) {
   for (OutputSectionCommand *Cmd : OutputSectionCommands)
     if (Cmd->Name == Name)
       return Cmd;
   return nullptr;
 }
 
 template <class ELFT> OutputSection *Writer<ELFT>::findSectionInScript(StringRef Name) {
   if (OutputSectionCommand *Cmd = findSectionCommand(Name))
     return Cmd->Sec;
   return nullptr;
 }
 
 template <class ELFT> OutputSection *Writer<ELFT>::findSection(StringRef Name) {
   for (OutputSection *Sec : OutputSections)
     if (Sec->Name == Name)
       return Sec;
   return nullptr;
 }
 
 static bool needsPtLoad(OutputSection *Sec) {
   if (!(Sec->Flags & SHF_ALLOC))
     return false;
 
   // Don't allocate VA space for TLS NOBITS sections. The PT_TLS PHDR is
   // responsible for allocating space for them, not the PT_LOAD that
   // contains the TLS initialization image.
   if (Sec->Flags & SHF_TLS && Sec->Type == SHT_NOBITS)
     return false;
   return true;
 }
 
 // Linker scripts are responsible for aligning addresses. Unfortunately, most
 // linker scripts are designed for creating two PT_LOADs only, one RX and one
 // RW. This means that there is no alignment in the RO to RX transition and we
 // cannot create a PT_LOAD there.
 static uint64_t computeFlags(uint64_t Flags) {
   if (Config->Omagic)
     return PF_R | PF_W | PF_X;
   if (Config->SingleRoRx && !(Flags & PF_W))
     return Flags | PF_X;
   return Flags;
 }
 
 // Decide which program headers to create and which sections to include in each
 // one.
 template <class ELFT> std::vector<PhdrEntry> Writer<ELFT>::createPhdrs() {
   std::vector<PhdrEntry> Ret;
   auto AddHdr = [&](unsigned Type, unsigned Flags) -> PhdrEntry * {
     Ret.emplace_back(Type, Flags);
     return &Ret.back();
   };
 
   // The first phdr entry is PT_PHDR which describes the program header itself.
   AddHdr(PT_PHDR, PF_R)->add(Out::ProgramHeaders);
 
   // PT_INTERP must be the second entry if exists.
-  if (OutputSection *Sec = findSection(".interp"))
+  if (OutputSection *Sec = findSectionInScript(".interp"))
     AddHdr(PT_INTERP, Sec->getPhdrFlags())->add(Sec);
 
   // Add the first PT_LOAD segment for regular output sections.
   uint64_t Flags = computeFlags(PF_R);
   PhdrEntry *Load = AddHdr(PT_LOAD, Flags);
 
   // Add the headers. We will remove them if they don't fit.
   Load->add(Out::ElfHeader);
   Load->add(Out::ProgramHeaders);
 
-  for (OutputSection *Sec : OutputSections) {
+  for (OutputSectionCommand *Cmd : OutputSectionCommands) {
+    OutputSection *Sec = Cmd->Sec;
     if (!(Sec->Flags & SHF_ALLOC))
       break;
     if (!needsPtLoad(Sec))
       continue;
 
     // Segments are contiguous memory regions that has the same attributes
     // (e.g. executable or writable). There is one phdr for each segment.
     // Therefore, we need to create a new phdr when the next section has
     // different flags or is loaded at a discontiguous address using AT linker
     // script command.
     uint64_t NewFlags = computeFlags(Sec->getPhdrFlags());
     if (Script->hasLMA(Sec) || Flags != NewFlags) {
       Load = AddHdr(PT_LOAD, NewFlags);
       Flags = NewFlags;
     }
 
     Load->add(Sec);
   }
 
   // Add a TLS segment if any.
   PhdrEntry TlsHdr(PT_TLS, PF_R);
-  for (OutputSection *Sec : OutputSections)
+  for (OutputSectionCommand *Cmd : OutputSectionCommands) {
+    OutputSection *Sec = Cmd->Sec;
     if (Sec->Flags & SHF_TLS)
       TlsHdr.add(Sec);
+  }
   if (TlsHdr.First)
     Ret.push_back(std::move(TlsHdr));
 
   // Add an entry for .dynamic.
   if (InX::DynSymTab)
     AddHdr(PT_DYNAMIC, InX::Dynamic->getParent()->getPhdrFlags())
         ->add(InX::Dynamic->getParent());
 
   // PT_GNU_RELRO includes all sections that should be marked as
   // read-only by dynamic linker after proccessing relocations.
   PhdrEntry RelRo(PT_GNU_RELRO, PF_R);
-  for (OutputSection *Sec : OutputSections)
+  for (OutputSectionCommand *Cmd : OutputSectionCommands) {
+    OutputSection *Sec = Cmd->Sec;
     if (needsPtLoad(Sec) && isRelroSection(Sec))
       RelRo.add(Sec);
+  }
   if (RelRo.First)
     Ret.push_back(std::move(RelRo));
 
   // PT_GNU_EH_FRAME is a special section pointing on .eh_frame_hdr.
   if (!In<ELFT>::EhFrame->empty() && In<ELFT>::EhFrameHdr &&
       In<ELFT>::EhFrame->getParent() && In<ELFT>::EhFrameHdr->getParent())
     AddHdr(PT_GNU_EH_FRAME, In<ELFT>::EhFrameHdr->getParent()->getPhdrFlags())
         ->add(In<ELFT>::EhFrameHdr->getParent());
 
   // PT_OPENBSD_RANDOMIZE is an OpenBSD-specific feature. That makes
   // the dynamic linker fill the segment with random data.
-  if (OutputSection *Sec = findSection(".openbsd.randomdata"))
+  if (OutputSection *Sec = findSectionInScript(".openbsd.randomdata"))
     AddHdr(PT_OPENBSD_RANDOMIZE, Sec->getPhdrFlags())->add(Sec);
 
   // PT_GNU_STACK is a special section to tell the loader to make the
   // pages for the stack non-executable. If you really want an executable
   // stack, you can pass -z execstack, but that's not recommended for
   // security reasons.
   unsigned Perm;
   if (Config->ZExecstack)
     Perm = PF_R | PF_W | PF_X;
   else
     Perm = PF_R | PF_W;
   AddHdr(PT_GNU_STACK, Perm)->p_memsz = Config->ZStackSize;
 
   // PT_OPENBSD_WXNEEDED is a OpenBSD-specific header to mark the executable
   // is expected to perform W^X violations, such as calling mprotect(2) or
   // mmap(2) with PROT_WRITE | PROT_EXEC, which is prohibited by default on
   // OpenBSD.
   if (Config->ZWxneeded)
     AddHdr(PT_OPENBSD_WXNEEDED, PF_X);
 
   // Create one PT_NOTE per a group of contiguous .note sections.
   PhdrEntry *Note = nullptr;
-  for (OutputSection *Sec : OutputSections) {
+  for (OutputSectionCommand *Cmd : OutputSectionCommands) {
+    OutputSection *Sec = Cmd->Sec;
     if (Sec->Type == SHT_NOTE) {
       if (!Note || Script->hasLMA(Sec))
         Note = AddHdr(PT_NOTE, PF_R);
       Note->add(Sec);
     } else {
       Note = nullptr;
     }
   }
   return Ret;
 }
 
 template <class ELFT>
 void Writer<ELFT>::addPtArmExid(std::vector<PhdrEntry> &Phdrs) {
   if (Config->EMachine != EM_ARM)
     return;
-  auto I = std::find_if(
-      OutputSections.begin(), OutputSections.end(),
-      [](OutputSection *Sec) { return Sec->Type == SHT_ARM_EXIDX; });
-  if (I == OutputSections.end())
+  auto I =
+      std::find_if(OutputSectionCommands.begin(), OutputSectionCommands.end(),
+                   [](OutputSectionCommand *Cmd) {
+                     return Cmd->Sec->Type == SHT_ARM_EXIDX;
+                   });
+  if (I == OutputSectionCommands.end())
     return;
 
   // PT_ARM_EXIDX is the ARM EHABI equivalent of PT_GNU_EH_FRAME
   PhdrEntry ARMExidx(PT_ARM_EXIDX, PF_R);
-  ARMExidx.add(*I);
+  ARMExidx.add((*I)->Sec);
   Phdrs.push_back(ARMExidx);
 }
 
 // The first section of each PT_LOAD, the first section in PT_GNU_RELRO and the
 // first section after PT_GNU_RELRO have to be page aligned so that the dynamic
 // linker can set the permissions.
 template <class ELFT> void Writer<ELFT>::fixSectionAlignments() {
   auto PageAlign = [](OutputSection *Sec) {
     OutputSectionCommand *Cmd = Script->getCmd(Sec);
     if (Cmd && !Cmd->AddrExpr)
       Cmd->AddrExpr = [=] {
         return alignTo(Script->getDot(), Config->MaxPageSize);
       };
   };
 
   for (const PhdrEntry &P : Phdrs)
     if (P.p_type == PT_LOAD && P.First)
       PageAlign(P.First);
 
   for (const PhdrEntry &P : Phdrs) {
     if (P.p_type != PT_GNU_RELRO)
       continue;
     if (P.First)
       PageAlign(P.First);
     // Find the first section after PT_GNU_RELRO. If it is in a PT_LOAD we
     // have to align it to a page.
     auto End = OutputSectionCommands.end();
     auto I =
         std::find(OutputSectionCommands.begin(), End, Script->getCmd(P.Last));
     if (I == End || (I + 1) == End)
       continue;
     OutputSection *Sec = (*(I + 1))->Sec;
     if (needsPtLoad(Sec))
       PageAlign(Sec);
   }
 }
 
 // Adjusts the file alignment for a given output section and returns
 // its new file offset. The file offset must be the same with its
 // virtual address (modulo the page size) so that the loader can load
 // executables without any address adjustment.
 static uint64_t getFileAlignment(uint64_t Off, OutputSection *Sec) {
   OutputSection *First = Sec->FirstInPtLoad;
   // If the section is not in a PT_LOAD, we just have to align it.
   if (!First)
     return alignTo(Off, Sec->Alignment);
 
   // The first section in a PT_LOAD has to have congruent offset and address
   // module the page size.
   if (Sec == First)
     return alignTo(Off, Config->MaxPageSize, Sec->Addr);
 
   // If two sections share the same PT_LOAD the file offset is calculated
   // using this formula: Off2 = Off1 + (VA2 - VA1).
   return First->Offset + Sec->Addr - First->Addr;
 }
 
 static uint64_t setOffset(OutputSection *Sec, uint64_t Off) {
   if (Sec->Type == SHT_NOBITS) {
     Sec->Offset = Off;
     return Off;
   }
 
   Off = getFileAlignment(Off, Sec);
   Sec->Offset = Off;
   return Off + Sec->Size;
 }
 
 template <class ELFT> void Writer<ELFT>::assignFileOffsetsBinary() {
   uint64_t Off = 0;
   for (OutputSectionCommand *Cmd : OutputSectionCommands) {
     OutputSection *Sec = Cmd->Sec;
     if (Sec->Flags & SHF_ALLOC)
       Off = setOffset(Sec, Off);
   }
   FileSize = alignTo(Off, Config->Wordsize);
 }
 
 // Assign file offsets to output sections.
 template <class ELFT> void Writer<ELFT>::assignFileOffsets() {
   uint64_t Off = 0;
   Off = setOffset(Out::ElfHeader, Off);
   Off = setOffset(Out::ProgramHeaders, Off);
 
   for (OutputSectionCommand *Cmd : OutputSectionCommands)
     Off = setOffset(Cmd->Sec, Off);
 
   SectionHeaderOff = alignTo(Off, Config->Wordsize);
   FileSize =
       SectionHeaderOff + (OutputSectionCommands.size() + 1) * sizeof(Elf_Shdr);
 }
 
 // Finalize the program headers. We call this function after we assign
 // file offsets and VAs to all sections.
 template <class ELFT> void Writer<ELFT>::setPhdrs() {
   for (PhdrEntry &P : Phdrs) {
     OutputSection *First = P.First;
     OutputSection *Last = P.Last;
     if (First) {
       P.p_filesz = Last->Offset - First->Offset;
       if (Last->Type != SHT_NOBITS)
         P.p_filesz += Last->Size;
       P.p_memsz = Last->Addr + Last->Size - First->Addr;
       P.p_offset = First->Offset;
       P.p_vaddr = First->Addr;
       if (!P.HasLMA)
         P.p_paddr = First->getLMA();
     }
     if (P.p_type == PT_LOAD)
       P.p_align = Config->MaxPageSize;
     else if (P.p_type == PT_GNU_RELRO) {
       P.p_align = 1;
       // The glibc dynamic loader rounds the size down, so we need to round up
       // to protect the last page. This is a no-op on FreeBSD which always
       // rounds up.
       P.p_memsz = alignTo(P.p_memsz, Target->PageSize);
     }
 
     // The TLS pointer goes after PT_TLS. At least glibc will align it,
     // so round up the size to make sure the offsets are correct.
     if (P.p_type == PT_TLS) {
       Out::TlsPhdr = &P;
       if (P.p_memsz)
         P.p_memsz = alignTo(P.p_memsz, P.p_align);
     }
   }
 }
 
 // The entry point address is chosen in the following ways.
 //
 // 1. the '-e' entry command-line option;
 // 2. the ENTRY(symbol) command in a linker control script;
 // 3. the value of the symbol start, if present;
 // 4. the address of the first byte of the .text section, if present;
 // 5. the address 0.
 template <class ELFT> uint64_t Writer<ELFT>::getEntryAddr() {
   // Case 1, 2 or 3. As a special case, if the symbol is actually
   // a number, we'll use that number as an address.
   if (SymbolBody *B = Symtab<ELFT>::X->find(Config->Entry))
     return B->getVA();
   uint64_t Addr;
   if (to_integer(Config->Entry, Addr))
     return Addr;
 
   // Case 4
   if (OutputSection *Sec = findSectionInScript(".text")) {
     if (Config->WarnMissingEntry)
       warn("cannot find entry symbol " + Config->Entry + "; defaulting to 0x" +
            utohexstr(Sec->Addr));
     return Sec->Addr;
   }
 
   // Case 5
   if (Config->WarnMissingEntry)
     warn("cannot find entry symbol " + Config->Entry +
          "; not setting start address");
   return 0;
 }
 
 static uint16_t getELFType() {
   if (Config->Pic)
     return ET_DYN;
   if (Config->Relocatable)
     return ET_REL;
   return ET_EXEC;
 }
 
 // This function is called after we have assigned address and size
 // to each section. This function fixes some predefined
 // symbol values that depend on section address and size.
 template <class ELFT> void Writer<ELFT>::fixPredefinedSymbols() {
   // _etext is the first location after the last read-only loadable segment.
   // _edata is the first location after the last read-write loadable segment.
   // _end is the first location after the uninitialized data region.
   PhdrEntry *Last = nullptr;
   PhdrEntry *LastRO = nullptr;
   PhdrEntry *LastRW = nullptr;
   for (PhdrEntry &P : Phdrs) {
     if (P.p_type != PT_LOAD)
       continue;
     Last = &P;
     if (P.p_flags & PF_W)
       LastRW = &P;
     else
       LastRO = &P;
   }
 
   auto Set = [](DefinedRegular *S, OutputSection *Sec, uint64_t Value) {
     if (S) {
       S->Section = Sec;
       S->Value = Value;
     }
   };
 
   if (Last) {
     Set(ElfSym::End1, Last->First, Last->p_memsz);
     Set(ElfSym::End2, Last->First, Last->p_memsz);
   }
   if (LastRO) {
     Set(ElfSym::Etext1, LastRO->First, LastRO->p_filesz);
     Set(ElfSym::Etext2, LastRO->First, LastRO->p_filesz);
   }
   if (LastRW) {
     Set(ElfSym::Edata1, LastRW->First, LastRW->p_filesz);
     Set(ElfSym::Edata2, LastRW->First, LastRW->p_filesz);
   }
 
   if (ElfSym::Bss)
     ElfSym::Bss->Section = findSectionInScript(".bss");
 
   // Setup MIPS _gp_disp/__gnu_local_gp symbols which should
   // be equal to the _gp symbol's value.
   if (Config->EMachine == EM_MIPS && !ElfSym::MipsGp->Value) {
     // Find GP-relative section with the lowest address
     // and use this address to calculate default _gp value.
     for (const OutputSectionCommand *Cmd : OutputSectionCommands) {
       OutputSection *OS = Cmd->Sec;
       if (OS->Flags & SHF_MIPS_GPREL) {
         ElfSym::MipsGp->Value = OS->Addr + 0x7ff0;
         break;
       }
     }
   }
 }
 
 template <class ELFT> void Writer<ELFT>::writeHeader() {
   uint8_t *Buf = Buffer->getBufferStart();
   memcpy(Buf, "\177ELF", 4);
 
   // Write the ELF header.
   auto *EHdr = reinterpret_cast<Elf_Ehdr *>(Buf);
   EHdr->e_ident[EI_CLASS] = Config->Is64 ? ELFCLASS64 : ELFCLASS32;
   EHdr->e_ident[EI_DATA] = Config->IsLE ? ELFDATA2LSB : ELFDATA2MSB;
   EHdr->e_ident[EI_VERSION] = EV_CURRENT;
   EHdr->e_ident[EI_OSABI] = Config->OSABI;
   EHdr->e_type = getELFType();
   EHdr->e_machine = Config->EMachine;
   EHdr->e_version = EV_CURRENT;
   EHdr->e_entry = getEntryAddr();
   EHdr->e_shoff = SectionHeaderOff;
   EHdr->e_ehsize = sizeof(Elf_Ehdr);
   EHdr->e_phnum = Phdrs.size();
   EHdr->e_shentsize = sizeof(Elf_Shdr);
   EHdr->e_shnum = OutputSectionCommands.size() + 1;
   EHdr->e_shstrndx = InX::ShStrTab->getParent()->SectionIndex;
 
   if (Config->EMachine == EM_ARM)
     // We don't currently use any features incompatible with EF_ARM_EABI_VER5,
     // but we don't have any firm guarantees of conformance. Linux AArch64
     // kernels (as of 2016) require an EABI version to be set.
     EHdr->e_flags = EF_ARM_EABI_VER5;
   else if (Config->EMachine == EM_MIPS)
     EHdr->e_flags = getMipsEFlags<ELFT>();
 
   if (!Config->Relocatable) {
     EHdr->e_phoff = sizeof(Elf_Ehdr);
     EHdr->e_phentsize = sizeof(Elf_Phdr);
   }
 
   // Write the program header table.
   auto *HBuf = reinterpret_cast<Elf_Phdr *>(Buf + EHdr->e_phoff);
   for (PhdrEntry &P : Phdrs) {
     HBuf->p_type = P.p_type;
     HBuf->p_flags = P.p_flags;
     HBuf->p_offset = P.p_offset;
     HBuf->p_vaddr = P.p_vaddr;
     HBuf->p_paddr = P.p_paddr;
     HBuf->p_filesz = P.p_filesz;
     HBuf->p_memsz = P.p_memsz;
     HBuf->p_align = P.p_align;
     ++HBuf;
   }
 
   // Write the section header table. Note that the first table entry is null.
   auto *SHdrs = reinterpret_cast<Elf_Shdr *>(Buf + EHdr->e_shoff);
   for (OutputSectionCommand *Cmd : OutputSectionCommands)
     Cmd->Sec->writeHeaderTo<ELFT>(++SHdrs);
 }
 
 // Open a result file.
 template <class ELFT> void Writer<ELFT>::openFile() {
   if (!Config->Is64 && FileSize > UINT32_MAX) {
     error("output file too large: " + Twine(FileSize) + " bytes");
     return;
   }
 
   unlinkAsync(Config->OutputFile);
   ErrorOr<std::unique_ptr<FileOutputBuffer>> BufferOrErr =
       FileOutputBuffer::create(Config->OutputFile, FileSize,
                                FileOutputBuffer::F_executable);
 
   if (auto EC = BufferOrErr.getError())
     error("failed to open " + Config->OutputFile + ": " + EC.message());
   else
     Buffer = std::move(*BufferOrErr);
 }
 
 template <class ELFT> void Writer<ELFT>::writeSectionsBinary() {
   uint8_t *Buf = Buffer->getBufferStart();
   for (OutputSectionCommand *Cmd : OutputSectionCommands) {
     OutputSection *Sec = Cmd->Sec;
     if (Sec->Flags & SHF_ALLOC)
       Cmd->writeTo<ELFT>(Buf + Sec->Offset);
   }
 }
 
 // Write section contents to a mmap'ed file.
 template <class ELFT> void Writer<ELFT>::writeSections() {
   uint8_t *Buf = Buffer->getBufferStart();
 
   // PPC64 needs to process relocations in the .opd section
   // before processing relocations in code-containing sections.
   if (auto *OpdCmd = findSectionCommand(".opd")) {
     Out::Opd = OpdCmd->Sec;
     Out::OpdBuf = Buf + Out::Opd->Offset;
     OpdCmd->template writeTo<ELFT>(Buf + Out::Opd->Offset);
   }
 
   OutputSection *EhFrameHdr =
       (In<ELFT>::EhFrameHdr && !In<ELFT>::EhFrameHdr->empty())
           ? In<ELFT>::EhFrameHdr->getParent()
           : nullptr;
 
   // In -r or -emit-relocs mode, write the relocation sections first as in
   // ELf_Rel targets we might find out that we need to modify the relocated
   // section while doing it.
   for (OutputSectionCommand *Cmd : OutputSectionCommands) {
     OutputSection *Sec = Cmd->Sec;
     if (Sec->Type == SHT_REL || Sec->Type == SHT_RELA)
       Cmd->writeTo<ELFT>(Buf + Sec->Offset);
   }
 
   for (OutputSectionCommand *Cmd : OutputSectionCommands) {
     OutputSection *Sec = Cmd->Sec;
     if (Sec != Out::Opd && Sec != EhFrameHdr && Sec->Type != SHT_REL &&
         Sec->Type != SHT_RELA)
       Cmd->writeTo<ELFT>(Buf + Sec->Offset);
   }
 
   // The .eh_frame_hdr depends on .eh_frame section contents, therefore
   // it should be written after .eh_frame is written.
   if (EhFrameHdr) {
     OutputSectionCommand *Cmd = Script->getCmd(EhFrameHdr);
     Cmd->writeTo<ELFT>(Buf + EhFrameHdr->Offset);
   }
 }
 
 template <class ELFT> void Writer<ELFT>::writeBuildId() {
   if (!InX::BuildId || !InX::BuildId->getParent())
     return;
 
   // Compute a hash of all sections of the output file.
   uint8_t *Start = Buffer->getBufferStart();
   uint8_t *End = Start + FileSize;
   InX::BuildId->writeBuildId({Start, End});
 }
 
 template void elf::writeResult<ELF32LE>();
 template void elf::writeResult<ELF32BE>();
 template void elf::writeResult<ELF64LE>();
 template void elf::writeResult<ELF64BE>();
Index: vendor/lld/dist/docs/windows_support.rst
===================================================================
--- vendor/lld/dist/docs/windows_support.rst	(revision 320020)
+++ vendor/lld/dist/docs/windows_support.rst	(revision 320021)
@@ -1,97 +1,94 @@
 .. raw:: html
 
   <style type="text/css">
     .none { background-color: #FFCCCC }
     .partial { background-color: #FFFF99 }
     .good { background-color: #CCFF99 }
   </style>
 
 .. role:: none
 .. role:: partial
 .. role:: good
 
 ===============
 Windows support
 ===============
 
 LLD supports Windows operating system. When invoked as ``lld-link.exe`` or with
 ``-flavor link``, the driver for Windows operating system is used to parse
 command line options, and it drives further linking processes. LLD accepts
 almost all command line options that the linker shipped with Microsoft Visual
 C++ (link.exe) supports.
 
 The current status is that LLD can link itself on Windows x86/x64
 using Visual C++ 2013 as the compiler.
 
 Development status
 ==================
 
 Driver
   :good:`Mostly done`. Some exotic command line options that are not usually
   used for application develompent, such as ``/DRIVER``, are not supported.
   Options for Windows 8 app store are not recognized too
   (e.g. ``/APPCONTAINER``).
 
 Linking against DLL
   :good:`Done`. LLD can read import libraries needed to link against DLL. Both
   export-by-name and export-by-ordinal are supported.
 
 Linking against static library
   :good:`Done`. The format of static library (.lib) on Windows is actually the
   same as on Unix (.a). LLD can read it.
 
 Creating DLL
   :good:`Done`. LLD creates a DLL if ``/DLL`` option is given. Exported
   functions can be specified either via command line (``/EXPORT``) or via
   module-definition file (.def). Both export-by-name and export-by-ordinal are
   supported. LLD uses Microsoft ``lib.exe`` tool to create an import library
   file.
 
 Windows resource files support
-  :good:`Done`. If an ``.rc`` file is given, LLD converts the file to a COFF
-  file using some external commands and link it. Specifically, ``rc.exe`` is
-  used to compile a resource file (.rc) to a compiled resource (.res)
-  file. ``rescvt.exe`` is then used to convert a compiled resource file to a
-  COFF object file section. Both tools are shipped with MSVC.
+  :good:`Done`. If an ``.res`` file is given, LLD converts the file to a COFF
+  file using ``cvtres.exe`` command and link it.
 
 Safe Structured Exception Handler (SEH)
   :good:`Done` for both x86 and x64.
 
 Module-definition file
   :partial:`Partially done`. LLD currently recognizes these directives:
   ``EXPORTS``, ``HEAPSIZE``, ``STACKSIZE``, ``NAME``, and ``VERSION``.
 
 Debug info
   :none:`No progress has been made`. Microsoft linker can interpret the CodeGen
   debug info (old-style debug info) and PDB to emit an .pdb file. LLD doesn't
   support neither.
 
 
 Building LLD
 ============
 
 Using Visual Studio IDE/MSBuild
 -------------------------------
 
 1. Check out LLVM and LLD from the LLVM SVN repository (or Git mirror),
 #. run ``cmake -G "Visual Studio 12" <llvm-source-dir>`` from VS command prompt,
 #. open LLVM.sln with Visual Studio, and
 #. build ``lld`` target in ``lld executables`` folder
 
 Alternatively, you can use msbuild if you don't like to work in an IDE::
 
   msbuild LLVM.sln /m /target:"lld executables\lld"
 
 MSBuild.exe had been shipped as a component of the .NET framework, but since
 2013 it's part of Visual Studio. You can find it at "C:\\Program Files
 (x86)\\msbuild".
 
 You can build LLD as a 64 bit application. To do that, open VS2013 x64 command
 prompt and run cmake for "Visual Studio 12 Win64" target.
 
 Using Ninja
 -----------
 
 1. Check out LLVM and LLD from the LLVM SVN repository (or Git mirror),
 #. run ``cmake -G ninja <llvm-source-dir>`` from VS command prompt,
 #. run ``ninja lld``
Index: vendor/lld/dist/test/COFF/Inputs/constant-export.ll
===================================================================
--- vendor/lld/dist/test/COFF/Inputs/constant-export.ll	(revision 320020)
+++ vendor/lld/dist/test/COFF/Inputs/constant-export.ll	(revision 320021)
@@ -1,10 +1,7 @@
 target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
 target triple = "i686-unknown-windows-msvc18.0.0"
 
 @__CFConstantStringClassReference = common global [32 x i32] zeroinitializer, align 4
 
-!llvm.module.flags = !{!0}
-
-!0 = !{i32 6, !"Linker Options", !1}
-!1 = !{!2}
-!2 = !{!" -export:___CFConstantStringClassReference,CONSTANT"}
+!llvm.linker.options = !{!0}
+!0 = !{!" -export:___CFConstantStringClassReference,CONSTANT"}
Index: vendor/lld/dist/test/COFF/Inputs/library.def
===================================================================
--- vendor/lld/dist/test/COFF/Inputs/library.def	(nonexistent)
+++ vendor/lld/dist/test/COFF/Inputs/library.def	(revision 320021)
@@ -0,0 +1,5 @@
+LIBRARY library
+EXPORTS
+  function
+  data DATA
+  constant CONSTANT
Index: vendor/lld/dist/test/COFF/Inputs/pdb1.yaml
===================================================================
--- vendor/lld/dist/test/COFF/Inputs/pdb1.yaml	(revision 320020)
+++ vendor/lld/dist/test/COFF/Inputs/pdb1.yaml	(revision 320021)
@@ -1,172 +1,306 @@
 --- !COFF
 header:
   Machine:         IMAGE_FILE_MACHINE_AMD64
   Characteristics: [  ]
 sections:
   - Name:            .drectve
     Characteristics: [ IMAGE_SCN_LNK_INFO, IMAGE_SCN_LNK_REMOVE ]
     Alignment:       1
     SectionData:     2020202F44454641554C544C49423A224C4942434D5422202F44454641554C544C49423A224F4C444E414D45532220
   - Name:            '.debug$S'
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
     Alignment:       1
-    SectionData:     04000000F1000000580000001A00011100000000443A5C625C72657434322D6D61696E2E6F626A003A003C1100600000D00013000000F259000013000000F25900004D6963726F736F667420285229204F7074696D697A696E6720436F6D70696C657200F10000004E0000002A0047110000000000000000000000000E000000040000000900000005100000000000000000006D61696E001C001210280000000000000000000000000000000000000000000042110002004F110000F20000002000000000000000000000000E0000000000000001000000140000000000000002000080F400000018000000010000001001C538722F63570DF6705DDE06FE96E5D10000F30000001300000000643A5C625C72657434322D6D61696E2E630000F10000000800000006004C110E100000
+    Subsections:
+      - !Symbols
+        Records:
+          - Kind:            S_OBJNAME
+            ObjNameSym:
+              Signature:       0
+              ObjectName:      'D:\b\ret42-main.obj'
+          - Kind:            S_COMPILE3
+            Compile3Sym:
+              Flags:           [ SecurityChecks, HotPatch ]
+              Machine:         X64
+              FrontendMajor:   19
+              FrontendMinor:   0
+              FrontendBuild:   23026
+              FrontendQFE:     0
+              BackendMajor:    19
+              BackendMinor:    0
+              BackendBuild:    23026
+              BackendQFE:      0
+              Version:         'Microsoft (R) Optimizing Compiler'
+      - !Symbols
+        Records:
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+            ProcSym:
+              PtrParent:       0
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+              PtrNext:         0
+              CodeSize:        14
+              DbgStart:        4
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+              FunctionType:    4101
+              Segment:         0
+              Flags:           [  ]
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+          - Kind:            S_FRAMEPROC
+            FrameProcSym:
+              TotalFrameBytes: 40
+              PaddingFrameBytes: 0
+              OffsetToPadding: 0
+              BytesOfCalleeSavedRegisters: 0
+              OffsetOfExceptionHandler: 0
+              SectionIdOfExceptionHandler: 0
+              Flags:           [ AsynchronousExceptionHandling, OptimizedForSpeed ]
+          - Kind:            S_PROC_ID_END
+            ScopeEndSym:
+      - !Lines
+        CodeSize:        14
+        Flags:           [  ]
+        RelocOffset:     0
+        RelocSegment:    0
+        Blocks:
+          - FileName:        'd:\b\ret42-main.c'
+            Lines:
+              - Offset:          0
+                LineStart:       2
+                IsStatement:     true
+                EndDelta:        0
+            Columns:
+      - !FileChecksums
+        Checksums:
+          - FileName:        'd:\b\ret42-main.c'
+            Kind:            MD5
+            Checksum:        C538722F63570DF6705DDE06FE96E5D1
+      - !StringTable
+        Strings:
+          - 'd:\b\ret42-main.c'
+      - !Symbols
+        Records:
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+              BuildId:         4110
     Relocations:
       - VirtualAddress:  140
         SymbolName:      main
         Type:            IMAGE_REL_AMD64_SECREL
       - VirtualAddress:  144
         SymbolName:      main
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         SymbolName:      main
         Type:            IMAGE_REL_AMD64_SECREL
       - VirtualAddress:  200
         SymbolName:      main
         Type:            IMAGE_REL_AMD64_SECTION
   - Name:            '.debug$T'
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
     Alignment:       1
-    SectionData:     0400000006000112000000000E0008107400000000000000001000000A000210011000000C0001000A00011201000000000000000E0008107400000000000000031000001200011600000000041000006D61696E00F3F2F10E0001160000000001100000666F6F000E00051600000000443A5C6200F3F2F12200051600000000433A5C767331345C56435C42494E5C616D6436345C636C2E6578650002010516000000002D5A37202D63202D4D54202D49433A5C767331345C56435C494E434C554445202D49433A5C767331345C56435C41544C4D46435C494E434C554445202D4922433A5C50726F6772616D2046696C65732028783836295C57696E646F7773204B6974735C31305C696E636C7564655C31302E302E31303135302E305C7563727422202D4922433A5C50726F6772616D2046696C65732028783836295C57696E646F7773204B6974735C4E4554465853444B5C342E365C696E636C7564655C756D22202D4922433A5C50726F6772616D2046696C65732028783836295C57696E646F7773204B6974735C382E315C696E636C7564655C73686172656422000A0004160100000009100000820005160A100000202D4922433A5C50726F6772616D2046696C65732028783836295C57696E646F7773204B6974735C382E315C696E636C7564655C756D22202D4922433A5C50726F6772616D2046696C65732028783836295C57696E646F7773204B6974735C382E315C696E636C7564655C77696E727422202D5443202D5800F3F2F1160005160000000072657434322D6D61696E2E6300F3F2F11600051600000000443A5C625C76633134302E70646200F11A000316050007100000081000000C1000000D1000000B100000F2F1
+    Types:
+      - Kind:            LF_ARGLIST
+        ArgList:
+          ArgIndices:      [  ]
+      - Kind:            LF_PROCEDURE
+        Procedure:
+          ReturnType:      116
+          CallConv:        NearC
+          Options:         [ None ]
+          ParameterCount:  0
+          ArgumentList:    4096
+      - Kind:            LF_POINTER
+        Pointer:
+          ReferentType:    4097
+          Attrs:           65548
+      - Kind:            LF_ARGLIST
+        ArgList:
+          ArgIndices:      [ 0 ]
+      - Kind:            LF_PROCEDURE
+        Procedure:
+          ReturnType:      116
+          CallConv:        NearC
+          Options:         [ None ]
+          ParameterCount:  0
+          ArgumentList:    4099
+      - Kind:            LF_FUNC_ID
+        FuncId:
+          ParentScope:     0
+          FunctionType:    4100
+          Name:            main
+      - Kind:            LF_FUNC_ID
+        FuncId:
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+        StringId:
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+          String:          'D:\b'
+      - Kind:            LF_STRING_ID
+        StringId:
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+        StringId:
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+      - Kind:            LF_SUBSTR_LIST
+        StringList:
+          StringIndices:   [ 4105 ]
+      - Kind:            LF_STRING_ID
+        StringId:
+          Id:              4106
+          String:          ' -I"C:\Program Files (x86)\Windows Kits\8.1\include\um" -I"C:\Program Files (x86)\Windows Kits\8.1\include\winrt" -TC -X'
+      - Kind:            LF_STRING_ID
+        StringId:
+          Id:              0
+          String:          ret42-main.c
+      - Kind:            LF_STRING_ID
+        StringId:
+          Id:              0
+          String:          'D:\b\vc140.pdb'
+      - Kind:            LF_BUILDINFO
+        BuildInfo:
+          ArgIndices:      [ 4103, 4104, 4108, 4109, 4107 ]
   - Name:            '.text$mn'
     Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ ]
     Alignment:       16
     SectionData:     4883EC28E8000000004883C428C3
     Relocations:
       - VirtualAddress:  5
         SymbolName:      foo
         Type:            IMAGE_REL_AMD64_REL32
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     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_READ ]
     Alignment:       4
     SectionData:     '0104010004420000'
   - Name:            .pdata
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_READ ]
     Alignment:       4
     SectionData:     '000000000E00000000000000'
     Relocations:
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         SymbolName:      '$LN3'
         Type:            IMAGE_REL_AMD64_ADDR32NB
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         SymbolName:      '$LN3'
         Type:            IMAGE_REL_AMD64_ADDR32NB
       - VirtualAddress:  8
         SymbolName:      '$unwind$main'
         Type:            IMAGE_REL_AMD64_ADDR32NB
 symbols:
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     Value:           17062386
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     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
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     SectionNumber:   -1
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     SectionNumber:   1
     SimpleType:      IMAGE_SYM_TYPE_NULL
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     SectionDefinition:
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     SectionDefinition:
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     SimpleType:      IMAGE_SYM_TYPE_NULL
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     StorageClass:    IMAGE_SYM_CLASS_STATIC
     SectionDefinition:
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     SimpleType:      IMAGE_SYM_TYPE_NULL
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     StorageClass:    IMAGE_SYM_CLASS_EXTERNAL
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     SectionNumber:   4
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     ComplexType:     IMAGE_SYM_DTYPE_FUNCTION
     StorageClass:    IMAGE_SYM_CLASS_EXTERNAL
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     SectionNumber:   4
     SimpleType:      IMAGE_SYM_TYPE_NULL
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     SectionDefinition:
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       CheckSum:        264583633
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   - Name:            '$unwind$main'
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     SectionNumber:   5
     SimpleType:      IMAGE_SYM_TYPE_NULL
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     SimpleType:      IMAGE_SYM_TYPE_NULL
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     SectionDefinition:
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   - Name:            '$pdata$main'
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 ...
Index: vendor/lld/dist/test/COFF/Inputs/pdb2.yaml
===================================================================
--- vendor/lld/dist/test/COFF/Inputs/pdb2.yaml	(revision 320020)
+++ vendor/lld/dist/test/COFF/Inputs/pdb2.yaml	(revision 320021)
@@ -1,102 +1,217 @@
 --- !COFF
 header:
   Machine:         IMAGE_FILE_MACHINE_AMD64
   Characteristics: [  ]
 sections:
   - Name:            .drectve
     Characteristics: [ IMAGE_SCN_LNK_INFO, IMAGE_SCN_LNK_REMOVE ]
     Alignment:       1
     SectionData:     2020202F44454641554C544C49423A224C4942434D5422202F44454641554C544C49423A224F4C444E414D45532220
   - Name:            '.debug$S'
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
     Alignment:       1
-    SectionData:     04000000F1000000570000001900011100000000443A5C625C72657434322D7375622E6F626A003A003C1100600000D00013000000F259000013000000F25900004D6963726F736F667420285229204F7074696D697A696E6720436F6D70696C65720000F10000004D000000290047110000000000000000000000000600000000000000050000000210000000000000000000666F6F001C001210000000000000000000000000000000000000000000000042110002004F11000000F2000000200000000000000000000000060000000000000001000000140000000000000001000080F400000018000000010000001001EC2D89EFF5A1FEB6B74EE4D79074072F0000F30000001200000000643A5C625C72657434322D7375622E63000000F10000000800000006004C110A100000
+    Subsections:
+      - !Symbols
+        Records:
+          - Kind:            S_OBJNAME
+            ObjNameSym:
+              Signature:       0
+              ObjectName:      'D:\b\ret42-sub.obj'
+          - Kind:            S_COMPILE3
+            Compile3Sym:
+              Flags:           [ SecurityChecks, HotPatch ]
+              Machine:         X64
+              FrontendMajor:   19
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+              FrontendQFE:     0
+              BackendMajor:    19
+              BackendMinor:    0
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+              BackendQFE:      0
+              Version:         'Microsoft (R) Optimizing Compiler'
+      - !Symbols
+        Records:
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+            ProcSym:
+              PtrParent:       0
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+              CodeSize:        6
+              DbgStart:        0
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+              FunctionType:    4098
+              Segment:         0
+              Flags:           [  ]
+              DisplayName:     foo
+          - Kind:            S_FRAMEPROC
+            FrameProcSym:
+              TotalFrameBytes: 0
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+              BytesOfCalleeSavedRegisters: 0
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+              SectionIdOfExceptionHandler: 0
+              Flags:           [ AsynchronousExceptionHandling, OptimizedForSpeed ]
+          - Kind:            S_PROC_ID_END
+            ScopeEndSym:
+      - !Lines
+        CodeSize:        6
+        Flags:           [  ]
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+            Lines:
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+            Columns:
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+        Checksums:
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+            Kind:            MD5
+            Checksum:        EC2D89EFF5A1FEB6B74EE4D79074072F
+      - !StringTable
+        Strings:
+          - 'd:\b\ret42-sub.c'
+      - !Symbols
+        Records:
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     Relocations:
       - VirtualAddress:  140
         SymbolName:      foo
         Type:            IMAGE_REL_AMD64_SECREL
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         SymbolName:      foo
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         Type:            IMAGE_REL_AMD64_SECTION
   - Name:            '.debug$T'
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
     Alignment:       1
-    SectionData:     0400000006000112000000000E0008107400000000000000001000000E0001160000000001100000666F6F000E00051600000000443A5C6200F3F2F12200051600000000433A5C767331345C56435C42494E5C616D6436345C636C2E6578650002010516000000002D5A37202D63202D4D54202D49433A5C767331345C56435C494E434C554445202D49433A5C767331345C56435C41544C4D46435C494E434C554445202D4922433A5C50726F6772616D2046696C65732028783836295C57696E646F7773204B6974735C31305C696E636C7564655C31302E302E31303135302E305C7563727422202D4922433A5C50726F6772616D2046696C65732028783836295C57696E646F7773204B6974735C4E4554465853444B5C342E365C696E636C7564655C756D22202D4922433A5C50726F6772616D2046696C65732028783836295C57696E646F7773204B6974735C382E315C696E636C7564655C73686172656422000A00041601000000051000008200051606100000202D4922433A5C50726F6772616D2046696C65732028783836295C57696E646F7773204B6974735C382E315C696E636C7564655C756D22202D4922433A5C50726F6772616D2046696C65732028783836295C57696E646F7773204B6974735C382E315C696E636C7564655C77696E727422202D5443202D5800F3F2F1120005160000000072657434322D7375622E63001600051600000000443A5C625C76633134302E70646200F11A00031605000310000004100000081000000910000007100000F2F1
+    Types:
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+          Options:         [ None ]
+          ParameterCount:  0
+          ArgumentList:    4096
+      - Kind:            LF_FUNC_ID
+        FuncId:
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+      - Kind:            LF_SUBSTR_LIST
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   - Name:            '.text$mn'
     Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ ]
     Alignment:       16
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 symbols:
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     SimpleType:      IMAGE_SYM_TYPE_NULL
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     StorageClass:    IMAGE_SYM_CLASS_STATIC
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   - Name:            '.text$mn'
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     SimpleType:      IMAGE_SYM_TYPE_NULL
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     SectionDefinition:
       Length:          6
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   - Name:            foo
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     ComplexType:     IMAGE_SYM_DTYPE_FUNCTION
     StorageClass:    IMAGE_SYM_CLASS_EXTERNAL
 ...
Index: vendor/lld/dist/test/COFF/include-lto.ll
===================================================================
--- vendor/lld/dist/test/COFF/include-lto.ll	(revision 320020)
+++ vendor/lld/dist/test/COFF/include-lto.ll	(revision 320021)
@@ -1,24 +1,21 @@
 ; RUN: llvm-as -o %t.obj %s
 ; RUN: lld-link /dll /out:%t.dll %t.obj
 ; RUN: llvm-objdump -d %t.dll | FileCheck %s
 
 ; Checks that code for foo is emitted, as required by the /INCLUDE directive.
 ; CHECK: xorl %eax, %eax
 ; CHECK-NEXT: retq
 
 target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-pc-windows-msvc"
 
 define void @_DllMainCRTStartup() {
   ret void
 }
 
 define i32 @foo() {
   ret i32 0
 }
 
-!llvm.module.flags = !{!0}
-
-!0 = !{i32 6, !"Linker Options", !1}
-!1 = !{!2}
-!2 = !{!"/INCLUDE:foo"}
+!llvm.linker.options = !{!0}
+!0 = !{!"/INCLUDE:foo"}
Index: vendor/lld/dist/test/COFF/lib.test
===================================================================
--- vendor/lld/dist/test/COFF/lib.test	(nonexistent)
+++ vendor/lld/dist/test/COFF/lib.test	(revision 320021)
@@ -0,0 +1,11 @@
+# RUN: lld-link /machine:x64 /def:%S/Inputs/library.def /out:%t.lib
+# RUN: llvm-nm %t.lib | FileCheck %s
+
+CHECK: 00000000 R __imp_constant
+CHECK: 00000000 R constant
+
+CHECK: 00000000 D __imp_data
+
+CHECK: 00000000 T __imp_function
+CHECK: 00000000 T function
+
Index: vendor/lld/dist/test/COFF/lto-linker-opts.ll
===================================================================
--- vendor/lld/dist/test/COFF/lto-linker-opts.ll	(revision 320020)
+++ vendor/lld/dist/test/COFF/lto-linker-opts.ll	(revision 320021)
@@ -1,11 +1,8 @@
 ; RUN: llvm-as -o %T/lto-linker-opts.obj %s
 ; RUN: env LIB=%S/Inputs lld-link /out:%T/lto-linker-opts.exe /entry:main /subsystem:console %T/lto-linker-opts.obj
 
 target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-pc-windows-msvc"
 
-!llvm.module.flags = !{!0}
-
-!0 = !{i32 6, !"Linker Options", !1}
-!1 = !{!2}
-!2 = !{!"/DEFAULTLIB:ret42.lib"}
+!llvm.linker.options = !{!0}
+!0 = !{!"/DEFAULTLIB:ret42.lib"}
Index: vendor/lld/dist/test/COFF/pdb-lib.s
===================================================================
--- vendor/lld/dist/test/COFF/pdb-lib.s	(nonexistent)
+++ vendor/lld/dist/test/COFF/pdb-lib.s	(revision 320021)
@@ -0,0 +1,32 @@
+# RUN: rm -rf %t && mkdir -p %t && cd %t
+# RUN: llvm-mc -filetype=obj -triple=i686-windows-msvc %s -o foo.obj
+# RUN: llc %S/Inputs/bar.ll -filetype=obj -mtriple=i686-windows-msvc -o bar.obj
+# RUN: llvm-lib bar.obj -out:bar.lib
+# RUN: lld-link -debug -pdb:foo.pdb foo.obj bar.lib -out:foo.exe -entry:main
+# RUN: llvm-pdbutil raw -modules %t/foo.pdb | FileCheck %s
+
+# Make sure that the PDB has module descriptors. foo.obj and bar.lib should be
+# absolute paths, and bar.obj should be the relative path passed to llvm-lib.
+
+# CHECK:                               Modules
+# CHECK-NEXT: ============================================================
+# CHECK-NEXT:   Mod 0000 | Name: `{{.*pdb-lib.s.tmp[/\\]foo.obj}}`:
+# CHECK-NEXT:              Obj: `{{.*pdb-lib.s.tmp[/\\]foo.obj}}`:
+# CHECK-NEXT:              debug stream: 9, # files: 0, has ec info: false
+# CHECK-NEXT:   Mod 0001 | Name: `bar.obj`:
+# CHECK-NEXT:              Obj: `{{.*pdb-lib.s.tmp[/\\]bar.lib}}`:
+# CHECK-NEXT:              debug stream: 10, # files: 0, has ec info: false
+# CHECK-NEXT:   Mod 0002 | Name: `* Linker *`:
+# CHECK-NEXT:              Obj: ``:
+# CHECK-NEXT:              debug stream: 11, # files: 0, has ec info: false
+
+        .def     _main;
+        .scl    2;
+        .type   32;
+        .endef
+        .globl  _main
+_main:
+        calll _bar
+        xor %eax, %eax
+        retl
+

Property changes on: vendor/lld/dist/test/COFF/pdb-lib.s
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+FreeBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Index: vendor/lld/dist/test/COFF/pdb-none.test
===================================================================
--- vendor/lld/dist/test/COFF/pdb-none.test	(revision 320020)
+++ vendor/lld/dist/test/COFF/pdb-none.test	(revision 320021)
@@ -1,13 +1,14 @@
 # RUN: yaml2obj < %p/Inputs/pdb1.yaml > %t1.obj
 # RUN: yaml2obj < %p/Inputs/pdb2.yaml > %t2.obj
 # RUN: lld-link /debug /debugtype:pdata /pdb:%t.pdb /dll /out:%t.dll /entry:main /nodefaultlib \
 # RUN:   %t1.obj %t2.obj
 
 # RUN: llvm-pdbutil pdb2yaml -pdb-stream %t.pdb | FileCheck %s
 
 # CHECK:      PdbStream:
 # CHECK-NEXT:   Age:             0
 # CHECK-NEXT:   Guid:            '{00000000-0000-0000-0000-000000000000}'
 # CHECK-NEXT:   Signature:       0
+# CHECK-NEXT:   Features:        [ VC140 ]
 # CHECK-NEXT:   Version:         VC70
 
Index: vendor/lld/dist/test/COFF/pdb-options.test
===================================================================
--- vendor/lld/dist/test/COFF/pdb-options.test	(revision 320020)
+++ vendor/lld/dist/test/COFF/pdb-options.test	(revision 320021)
@@ -1,20 +1,21 @@
 # RUN: yaml2obj < %p/Inputs/pdb1.yaml > %t1.obj
 # RUN: yaml2obj < %p/Inputs/pdb2.yaml > %t2.obj
 
 ; If /DEBUG is not specified, /pdb is ignored.
+# RUN: rm -f %t.pdb
 # RUN: lld-link /pdb:%t.pdb /entry:main /nodefaultlib %t1.obj %t2.obj
 # RUN: not ls %t.pdb
 
 ; If /DEBUG and /pdb are specified, it uses the specified name.
 # RUN: lld-link /DEBUG /pdb:%t.pdb /entry:main /nodefaultlib %t1.obj %t2.obj
 # RUN: ls %t.pdb
 # RUN: rm %t.pdb
 
 ; If /DEBUG is specified but not /pdb, it uses a default name in the current
 ; directory.  This is a bit hacky since but we need to be IN our test specific
 ; temporary directory when we run this command or we can't test this
 # RUN: cd %T
 # RUN: lld-link /DEBUG /entry:main /nodefaultlib %t1.obj %t2.obj
 # RUN: ls %t1.pdb
 # RUN: rm %t*
 # RUN: cd %T/..
Index: vendor/lld/dist/test/COFF/pdb.test
===================================================================
--- vendor/lld/dist/test/COFF/pdb.test	(revision 320020)
+++ vendor/lld/dist/test/COFF/pdb.test	(revision 320021)
@@ -1,409 +1,199 @@
 # RUN: yaml2obj < %p/Inputs/pdb1.yaml > %t1.obj
 # RUN: yaml2obj < %p/Inputs/pdb2.yaml > %t2.obj
 # RUN: lld-link /debug /pdb:%t.pdb /dll /out:%t.dll /entry:main /nodefaultlib \
 # RUN:   %t1.obj %t2.obj
 
 # RUN: llvm-pdbutil pdb2yaml -stream-metadata -stream-directory -pdb-stream \
 # RUN:   -dbi-stream -ipi-stream -tpi-stream %t.pdb | FileCheck %s
 
-# RUN: llvm-pdbutil raw -modules -section-map -section-headers -section-contribs \
-# RUN:   -tpi-records %t.pdb | FileCheck -check-prefix RAW %s
+# RUN: llvm-pdbutil raw -modules -section-map -section-contribs \
+# RUN:   -types -ids %t.pdb | FileCheck -check-prefix RAW %s
 
 # CHECK:      MSF:
 # CHECK-NEXT:   SuperBlock:
 # CHECK-NEXT:     BlockSize:       4096
 # CHECK-NEXT:     FreeBlockMap:    1
 # CHECK-NEXT:     NumBlocks:
 # CHECK-NEXT:     NumDirectoryBytes:
 # CHECK-NEXT:     Unknown1:        0
 # CHECK-NEXT:     BlockMapAddr:
 # CHECK-NEXT:   NumDirectoryBlocks:
 # CHECK-NEXT:   DirectoryBlocks:
-# CHECK-NEXT:   NumStreams:      
-# CHECK-NEXT:   FileSize:        
-# CHECK-NEXT: StreamSizes:     
+# CHECK-NEXT:   NumStreams:
+# CHECK-NEXT:   FileSize:
+# CHECK-NEXT: StreamSizes:
 # CHECK-NEXT: StreamMap:
 # CHECK:      PdbStream:
 # CHECK-NEXT:   Age:             1
 # CHECK-NEXT:   Guid:
 # CHECK-NEXT:   Signature:       0
+# CHECK-NEXT:   Features:        [ VC140 ]
 # CHECK-NEXT:   Version:         VC70
 # CHECK-NEXT: DbiStream:
 # CHECK-NEXT:   VerHeader:       V110
 # CHECK-NEXT:   Age:             1
 # CHECK-NEXT:   BuildNumber:     0
 # CHECK-NEXT:   PdbDllVersion:   0
 # CHECK-NEXT:   PdbDllRbld:      0
 # CHECK-NEXT:   Flags:           0
 # CHECK-NEXT:   MachineType:     x86
 # CHECK-NEXT: TpiStream:
 # CHECK-NEXT:   Version:         VC80
 # CHECK-NEXT:   Records:
 # CHECK-NEXT:     - Kind:            LF_ARGLIST
 # CHECK-NEXT:       ArgList:
 # CHECK-NEXT:         ArgIndices:      [  ]
 # CHECK-NEXT:     - Kind:            LF_PROCEDURE
 # CHECK-NEXT:       Procedure:
 # CHECK-NEXT:         ReturnType:      116
 # CHECK-NEXT:         CallConv:        NearC
 # CHECK-NEXT:         Options:         [ None ]
 # CHECK-NEXT:         ParameterCount:  0
 # CHECK-NEXT:         ArgumentList:    4096
 # CHECK-NEXT:     - Kind:            LF_POINTER
 # CHECK-NEXT:       Pointer:
 # CHECK-NEXT:         ReferentType:    4097
 # CHECK-NEXT:         Attrs:           65548
 # CHECK-NEXT:     - Kind:            LF_ARGLIST
 # CHECK-NEXT:       ArgList:
 # CHECK-NEXT:         ArgIndices:      [ 0 ]
 # CHECK-NEXT:     - Kind:            LF_PROCEDURE
 # CHECK-NEXT:       Procedure:
 # CHECK-NEXT:         ReturnType:      116
 # CHECK-NEXT:         CallConv:        NearC
 # CHECK-NEXT:         Options:         [ None ]
 # CHECK-NEXT:         ParameterCount:  0
 # CHECK-NEXT:         ArgumentList:    4099
 # CHECK-NEXT: IpiStream:
 # CHECK-NEXT:   Version:         VC80
 # CHECK-NEXT:   Records:
 # CHECK-NEXT:     - Kind:            LF_FUNC_ID
 # CHECK-NEXT:       FuncId:
 # CHECK-NEXT:         ParentScope:     0
 # CHECK-NEXT:         FunctionType:    4100
 # CHECK-NEXT:         Name:            main
 # CHECK-NEXT:     - Kind:            LF_FUNC_ID
 # CHECK-NEXT:       FuncId:
 # CHECK-NEXT:         ParentScope:     0
 # CHECK-NEXT:         FunctionType:    4097
 # CHECK-NEXT:         Name:            foo
 # CHECK-NEXT:     - Kind:            LF_STRING_ID
 # CHECK-NEXT:       StringId:
 # CHECK-NEXT:         Id:              0
 # CHECK-NEXT:         String:          'D:\b'
 # CHECK-NEXT:     - Kind:            LF_STRING_ID
 # CHECK-NEXT:       StringId:
 # CHECK-NEXT:         Id:              0
 # CHECK-NEXT:         String:          'C:\vs14\VC\BIN\amd64\cl.exe'
 # CHECK-NEXT:     - Kind:            LF_STRING_ID
 # CHECK-NEXT:       StringId:
 # CHECK-NEXT:         Id:              0
 # CHECK-NEXT:         String:          '-Z7 -c -MT -IC:\vs14\VC\INCLUDE -IC:\vs14\VC\ATLMFC\INCLUDE -I"C:\Program Files (x86)\Windows Kits\10\include\10.0.10150.0\ucrt" -I"C:\Program Files (x86)\Windows Kits\NETFXSDK\4.6\include\um" -I"C:\Program Files (x86)\Windows Kits\8.1\include\shared"'
 # CHECK-NEXT:     - Kind:            LF_SUBSTR_LIST
 # CHECK-NEXT:       StringList:
 # CHECK-NEXT:         StringIndices:   [ 4100 ]
 # CHECK-NEXT:     - Kind:            LF_STRING_ID
 # CHECK-NEXT:       StringId:
 # CHECK-NEXT:         Id:              4101
 # CHECK-NEXT:         String:          ' -I"C:\Program Files (x86)\Windows Kits\8.1\include\um" -I"C:\Program Files (x86)\Windows Kits\8.1\include\winrt" -TC -X'
 # CHECK-NEXT:     - Kind:            LF_STRING_ID
 # CHECK-NEXT:       StringId:
 # CHECK-NEXT:         Id:              0
 # CHECK-NEXT:         String:          ret42-main.c
 # CHECK-NEXT:     - Kind:            LF_STRING_ID
 # CHECK-NEXT:       StringId:
 # CHECK-NEXT:         Id:              0
 # CHECK-NEXT:         String:          'D:\b\vc140.pdb'
 # CHECK-NEXT:     - Kind:            LF_BUILDINFO
 # CHECK-NEXT:       BuildInfo:
 # CHECK-NEXT:         ArgIndices:      [ 4098, 4099, 4103, 4104, 4102 ]
 # CHECK-NEXT:     - Kind:            LF_STRING_ID
 # CHECK-NEXT:       StringId:
 # CHECK-NEXT:         Id:              0
 # CHECK-NEXT:         String:          ret42-sub.c
 # CHECK-NEXT:     - Kind:            LF_BUILDINFO
 # CHECK-NEXT:       BuildInfo:
 # CHECK-NEXT:         ArgIndices:      [ 4098, 4099, 4106, 4104, 4102 ]
 
-# RAW:      Type Info Stream (TPI) {
-# RAW-NEXT:   TPI Version: 20040203
-# RAW-NEXT:   Record count: 5
-# RAW-NEXT:   Records [
-# RAW-NEXT:     {
-# RAW-NEXT:       ArgList (0x1000) {
-# RAW-NEXT:         TypeLeafKind: LF_ARGLIST (0x1201)
-# RAW-NEXT:         NumArgs: 0
-# RAW-NEXT:         Arguments [
-# RAW-NEXT:         ]
-# RAW-NEXT:       }
-# RAW-NEXT:     }
-# RAW-NEXT:     {
-# RAW-NEXT:       Procedure (0x1001) {
-# RAW-NEXT:         TypeLeafKind: LF_PROCEDURE (0x1008)
-# RAW-NEXT:         ReturnType: int (0x74)
-# RAW-NEXT:         CallingConvention: NearC (0x0)
-# RAW-NEXT:         FunctionOptions [ (0x0)
-# RAW-NEXT:         ]
-# RAW-NEXT:         NumParameters: 0
-# RAW-NEXT:         ArgListType: () (0x1000)
-# RAW-NEXT:       }
-# RAW-NEXT:     }
-# RAW-NEXT:     {
-# RAW-NEXT:       Pointer (0x1002) {
-# RAW-NEXT:         TypeLeafKind: LF_POINTER (0x1002)
-# RAW-NEXT:         PointeeType: int () (0x1001)
-# RAW-NEXT:         PointerAttributes: 0x1000C
-# RAW-NEXT:         PtrType: Near64 (0xC)
-# RAW-NEXT:         PtrMode: Pointer (0x0)
-# RAW-NEXT:         IsFlat: 0
-# RAW-NEXT:         IsConst: 0
-# RAW-NEXT:         IsVolatile: 0
-# RAW-NEXT:         IsUnaligned: 0
-# RAW-NEXT:         SizeOf: 8
-# RAW-NEXT:       }
-# RAW-NEXT:     }
-# RAW-NEXT:     {
-# RAW-NEXT:       ArgList (0x1003) {
-# RAW-NEXT:         TypeLeafKind: LF_ARGLIST (0x1201)
-# RAW-NEXT:         NumArgs: 1
-# RAW-NEXT:         Arguments [
-# RAW-NEXT:           ArgType: 0x0
-# RAW-NEXT:         ]
-# RAW-NEXT:       }
-# RAW-NEXT:     }
-# RAW-NEXT:     {
-# RAW-NEXT:       Procedure (0x1004) {
-# RAW-NEXT:         TypeLeafKind: LF_PROCEDURE (0x1008)
-# RAW-NEXT:         ReturnType: int (0x74)
-# RAW-NEXT:         CallingConvention: NearC (0x0)
-# RAW-NEXT:         FunctionOptions [ (0x0)
-# RAW-NEXT:         ]
-# RAW-NEXT:         NumParameters: 0
-# RAW-NEXT:         ArgListType: (<no type>) (0x1003)
-# RAW-NEXT:       }
-# RAW-NEXT:     }
-# RAW-NEXT:     TypeIndexOffsets [
-# RAW-NEXT:       Index: 0x1000, Offset: 0
-# RAW-NEXT:     ]
-# RAW-NEXT:   ]
-# RAW-NEXT: }
-# RAW-NEXT: DBI Stream {
-# RAW-NEXT:   Dbi Version: 20091201
-# RAW-NEXT:   Age: 1
-# RAW-NEXT:   Incremental Linking: No
-# RAW-NEXT:   Has CTypes: No
-# RAW-NEXT:   Is Stripped: No
-# RAW-NEXT:   Machine Type: x86
-# RAW-NEXT:   Symbol Record Stream Index: 65535
-# RAW-NEXT:   Public Symbol Stream Index: 65535
-# RAW-NEXT:   Global Symbol Stream Index: 65535
-# RAW-NEXT:   Toolchain Version: 0.0
-# RAW-NEXT:   mspdb00.dll version: 0.0.0
-# RAW-NEXT:   Modules [
-# RAW-NEXT:     {
-# RAW-NEXT:       Name: * Linker *
-# RAW-NEXT:       Debug Stream Index: 9
-# RAW-NEXT:       Object File Name:
-# RAW-NEXT:       Num Files: 0
-# RAW-NEXT:       Source File Name Idx: 0
-# RAW-NEXT:       Pdb File Name Idx: 0
-# RAW-NEXT:       Line Info Byte Size: 0
-# RAW-NEXT:       C13 Line Info Byte Size: 0
-# RAW-NEXT:       Symbol Byte Size: 4
-# RAW-NEXT:       Type Server Index: 0
-# RAW-NEXT:       Has EC Info: No
-# RAW-NEXT:     }
-# RAW-NEXT:   ]
-# RAW-NEXT: }
-# RAW-NEXT: Section Contributions [
-# RAW-NEXT:   Contribution {
-# RAW-NEXT:     ISect: 0
-# RAW-NEXT:     Off: 1288
-# RAW-NEXT:     Size: 14
-# RAW-NEXT:     Characteristics [ (0x60500020)
-# RAW-NEXT:       IMAGE_SCN_ALIGN_16BYTES (0x500000)
-# RAW-NEXT:       IMAGE_SCN_CNT_CODE (0x20)
-# RAW-NEXT:       IMAGE_SCN_MEM_EXECUTE (0x20000000)
-# RAW-NEXT:       IMAGE_SCN_MEM_READ (0x40000000)
-# RAW-NEXT:     ]
-# RAW-NEXT:     Module {
-# RAW-NEXT:       Index: 0
-# RAW-NEXT:       Name: * Linker *
-# RAW-NEXT:     }
-# RAW-NEXT:     Data CRC: 0
-# RAW-NEXT:     Reloc CRC: 0
-# RAW-NEXT:   }
-# RAW-NEXT:   Contribution {
-# RAW-NEXT:     ISect: 0
-# RAW-NEXT:     Off: 1312
-# RAW-NEXT:     Size: 8
-# RAW-NEXT:     Characteristics [ (0x40300040)
-# RAW-NEXT:       IMAGE_SCN_ALIGN_4BYTES (0x300000)
-# RAW-NEXT:       IMAGE_SCN_CNT_INITIALIZED_DATA (0x40)
-# RAW-NEXT:       IMAGE_SCN_MEM_READ (0x40000000)
-# RAW-NEXT:     ]
-# RAW-NEXT:     Module {
-# RAW-NEXT:       Index: 0
-# RAW-NEXT:       Name: * Linker *
-# RAW-NEXT:     }
-# RAW-NEXT:     Data CRC: 0
-# RAW-NEXT:     Reloc CRC: 0
-# RAW-NEXT:   }
-# RAW-NEXT:   Contribution {
-# RAW-NEXT:     ISect: 0
-# RAW-NEXT:     Off: 1320
-# RAW-NEXT:     Size: 12
-# RAW-NEXT:     Characteristics [ (0x40300040)
-# RAW-NEXT:       IMAGE_SCN_ALIGN_4BYTES (0x300000)
-# RAW-NEXT:       IMAGE_SCN_CNT_INITIALIZED_DATA (0x40)
-# RAW-NEXT:       IMAGE_SCN_MEM_READ (0x40000000)
-# RAW-NEXT:     ]
-# RAW-NEXT:     Module {
-# RAW-NEXT:       Index: 0
-# RAW-NEXT:       Name: * Linker *
-# RAW-NEXT:     }
-# RAW-NEXT:     Data CRC: 0
-# RAW-NEXT:     Reloc CRC: 0
-# RAW-NEXT:   }
-# RAW-NEXT:   Contribution {
-# RAW-NEXT:     ISect: 0
-# RAW-NEXT:     Off: 1144
-# RAW-NEXT:     Size: 6
-# RAW-NEXT:     Characteristics [ (0x60500020)
-# RAW-NEXT:       IMAGE_SCN_ALIGN_16BYTES (0x500000)
-# RAW-NEXT:       IMAGE_SCN_CNT_CODE (0x20)
-# RAW-NEXT:       IMAGE_SCN_MEM_EXECUTE (0x20000000)
-# RAW-NEXT:       IMAGE_SCN_MEM_READ (0x40000000)
-# RAW-NEXT:     ]
-# RAW-NEXT:     Module {
-# RAW-NEXT:       Index: 0
-# RAW-NEXT:       Name: * Linker *
-# RAW-NEXT:     }
-# RAW-NEXT:     Data CRC: 0
-# RAW-NEXT:     Reloc CRC: 0
-# RAW-NEXT:   }
-# RAW-NEXT: ]
-# RAW-NEXT: Section Map [
-# RAW-NEXT:   Entry {
-# RAW-NEXT:     Flags [ (0x109)
-# RAW-NEXT:       AddressIs32Bit (0x8)
-# RAW-NEXT:       IsSelector (0x100)
-# RAW-NEXT:       Read (0x1)
-# RAW-NEXT:     ]
-# RAW-NEXT:     Ovl: 0
-# RAW-NEXT:     Group: 0
-# RAW-NEXT:     Frame: 1
-# RAW-NEXT:     SecName: 65535
-# RAW-NEXT:     ClassName: 65535
-# RAW-NEXT:     Offset: 0
-# RAW-NEXT:     SecByteLength: 12
-# RAW-NEXT:   }
-# RAW-NEXT:   Entry {
-# RAW-NEXT:     Flags [ (0x10D)
-# RAW-NEXT:       AddressIs32Bit (0x8)
-# RAW-NEXT:       Execute (0x4)
-# RAW-NEXT:       IsSelector (0x100)
-# RAW-NEXT:       Read (0x1)
-# RAW-NEXT:     ]
-# RAW-NEXT:     Ovl: 0
-# RAW-NEXT:     Group: 0
-# RAW-NEXT:     Frame: 2
-# RAW-NEXT:     SecName: 65535
-# RAW-NEXT:     ClassName: 65535
-# RAW-NEXT:     Offset: 0
-# RAW-NEXT:     SecByteLength: 22
-# RAW-NEXT:   }
-# RAW-NEXT:   Entry {
-# RAW-NEXT:     Flags [ (0x109)
-# RAW-NEXT:       AddressIs32Bit (0x8)
-# RAW-NEXT:       IsSelector (0x100)
-# RAW-NEXT:       Read (0x1)
-# RAW-NEXT:     ]
-# RAW-NEXT:     Ovl: 0
-# RAW-NEXT:     Group: 0
-# RAW-NEXT:     Frame: 3
-# RAW-NEXT:     SecName: 65535
-# RAW-NEXT:     ClassName: 65535
-# RAW-NEXT:     Offset: 0
-# RAW-NEXT:     SecByteLength: 8
-# RAW-NEXT:   }
-# RAW-NEXT:   Entry {
-# RAW-NEXT:     Flags [ (0x109)
-# RAW-NEXT:       AddressIs32Bit (0x8)
-# RAW-NEXT:       IsSelector (0x100)
-# RAW-NEXT:       Read (0x1)
-# RAW-NEXT:     ]
-# RAW-NEXT:     Ovl: 0
-# RAW-NEXT:     Group: 0
-# RAW-NEXT:     Frame: 4
-# RAW-NEXT:     SecName: 65535
-# RAW-NEXT:     ClassName: 65535
-# RAW-NEXT:     Offset: 0
-# RAW-NEXT:     SecByteLength:
-# RAW-NEXT:   }
-# RAW-NEXT:   Entry {
-# RAW-NEXT:     Flags [ (0x208)
-# RAW-NEXT:       AddressIs32Bit (0x8)
-# RAW-NEXT:       IsAbsoluteAddress (0x200)
-# RAW-NEXT:     ]
-# RAW-NEXT:     Ovl: 0
-# RAW-NEXT:     Group: 0
-# RAW-NEXT:     Frame: 5
-# RAW-NEXT:     SecName: 65535
-# RAW-NEXT:     ClassName: 65535
-# RAW-NEXT:     Offset: 0
-# RAW-NEXT:     SecByteLength: 4294967295
-# RAW-NEXT:   }
-# RAW-NEXT: ]
-# RAW-NEXT: Section Headers [
-# RAW-NEXT:   {
-# RAW-NEXT:     Name: .pdata
-# RAW-NEXT:     Virtual Size: 12
-# RAW-NEXT:     Virtual Address: 4096
-# RAW-NEXT:     Size of Raw Data: 512
-# RAW-NEXT:     File Pointer to Raw Data: 1024
-# RAW-NEXT:     File Pointer to Relocations: 0
-# RAW-NEXT:     File Pointer to Linenumbers: 0
-# RAW-NEXT:     Number of Relocations: 0
-# RAW-NEXT:     Number of Linenumbers: 0
-# RAW-NEXT:     Characteristics [ (0x40000040)
-# RAW-NEXT:       IMAGE_SCN_CNT_INITIALIZED_DATA (0x40)
-# RAW-NEXT:       IMAGE_SCN_MEM_READ (0x40000000)
-# RAW-NEXT:     ]
-# RAW-NEXT:   }
-# RAW-NEXT:   {
-# RAW-NEXT:     Name: .text
-# RAW-NEXT:     Virtual Size: 22
-# RAW-NEXT:     Virtual Address: 8192
-# RAW-NEXT:     Size of Raw Data: 512
-# RAW-NEXT:     File Pointer to Raw Data: 1536
-# RAW-NEXT:     File Pointer to Relocations: 0
-# RAW-NEXT:     File Pointer to Linenumbers: 0
-# RAW-NEXT:     Number of Relocations: 0
-# RAW-NEXT:     Number of Linenumbers: 0
-# RAW-NEXT:     Characteristics [ (0x60000020)
-# RAW-NEXT:       IMAGE_SCN_CNT_CODE (0x20)
-# RAW-NEXT:       IMAGE_SCN_MEM_EXECUTE (0x20000000)
-# RAW-NEXT:       IMAGE_SCN_MEM_READ (0x40000000)
-# RAW-NEXT:     ]
-# RAW-NEXT:   }
-# RAW-NEXT:   {
-# RAW-NEXT:     Name: .xdata
-# RAW-NEXT:     Virtual Size: 8
-# RAW-NEXT:     Virtual Address: 12288
-# RAW-NEXT:     Size of Raw Data: 512
-# RAW-NEXT:     File Pointer to Raw Data: 2048
-# RAW-NEXT:     File Pointer to Relocations: 0
-# RAW-NEXT:     File Pointer to Linenumbers: 0
-# RAW-NEXT:     Number of Relocations: 0
-# RAW-NEXT:     Number of Linenumbers: 0
-# RAW-NEXT:     Characteristics [ (0x40000040)
-# RAW-NEXT:       IMAGE_SCN_CNT_INITIALIZED_DATA (0x40)
-# RAW-NEXT:       IMAGE_SCN_MEM_READ (0x40000000)
-# RAW-NEXT:     ]
-# RAW-NEXT:   }
-# RAW-NEXT:   {
-# RAW-NEXT:     Name: .rdata
-# RAW-NEXT:     Virtual Size:
-# RAW-NEXT:     Virtual Address: 16384
-# RAW-NEXT:     Size of Raw Data: 512
-# RAW-NEXT:     File Pointer to Raw Data: 2560
-# RAW-NEXT:     File Pointer to Relocations: 0
-# RAW-NEXT:     File Pointer to Linenumbers: 0
-# RAW-NEXT:     Number of Relocations: 0
-# RAW-NEXT:     Number of Linenumbers: 0
-# RAW-NEXT:     Characteristics [ (0x40000040)
-# RAW-NEXT:       IMAGE_SCN_CNT_INITIALIZED_DATA (0x40)
-# RAW-NEXT:       IMAGE_SCN_MEM_READ (0x40000000)
-# RAW-NEXT:     ]
-# RAW-NEXT:   }
-# RAW-NEXT: ]
+RAW:                               Modules
+RAW-NEXT: ============================================================
+RAW-NEXT:   Mod 0000 | Name: `{{.*}}pdb.test.tmp1.obj`:
+RAW-NEXT:              Obj: `{{.*}}pdb.test.tmp1.obj`:
+RAW-NEXT:              debug stream: 9, # files: 0, has ec info: false
+RAW-NEXT:   Mod 0001 | Name: `{{.*}}pdb.test.tmp2.obj`:
+RAW-NEXT:              Obj: `{{.*}}pdb.test.tmp2.obj`:
+RAW-NEXT:              debug stream: 10, # files: 0, has ec info: false
+RAW-NEXT:   Mod 0002 | Name: `* Linker *`:
+RAW-NEXT:              Obj: ``:
+RAW-NEXT:              debug stream: 11, # files: 0, has ec info: false
+RAW:                          Types (TPI Stream)
+RAW-NEXT: ============================================================
+RAW-NEXT:   Showing 5 records
+RAW-NEXT:   0x1000 | LF_ARGLIST [size = 8]
+RAW-NEXT:   0x1001 | LF_PROCEDURE [size = 16]
+RAW-NEXT:            return type = 0x0074 (int), # args = 0, param list = 0x1000
+RAW-NEXT:            calling conv = cdecl, options = None
+RAW-NEXT:   0x1002 | LF_POINTER [size = 12]
+RAW-NEXT:            referent = 0x1001, mode = pointer, opts = None, kind = ptr64
+RAW-NEXT:   0x1003 | LF_ARGLIST [size = 12]
+RAW-NEXT:            <no type>: ``
+RAW-NEXT:   0x1004 | LF_PROCEDURE [size = 16]
+RAW-NEXT:            return type = 0x0074 (int), # args = 0, param list = 0x1003
+RAW-NEXT:            calling conv = cdecl, options = None
+RAW:                          Types (IPI Stream)
+RAW-NEXT: ============================================================
+RAW-NEXT:   Showing 12 records
+RAW-NEXT:   0x1000 | LF_FUNC_ID [size = 20]
+RAW-NEXT:            name = main, type = 0x1004, parent scope = <no type>
+RAW-NEXT:   0x1001 | LF_FUNC_ID [size = 16]
+RAW-NEXT:            name = foo, type = 0x1001, parent scope = <no type>
+RAW-NEXT:   0x1002 | LF_STRING_ID [size = 16] ID: <no type>, String: D:\b
+RAW-NEXT:   0x1003 | LF_STRING_ID [size = 36] ID: <no type>, String: C:\vs14\VC\BIN\amd64\cl.exe
+RAW-NEXT:   0x1004 | LF_STRING_ID [size = 260] ID: <no type>, String: -Z7 -c -MT -IC:\vs14\VC\INCLUDE -IC:\vs14\VC\ATLMFC\INCLUDE -I"C:\Program Files (x86)\Windows Kits\10\include\10.0.10150.0\ucrt" -I"C:\Program Files (x86)\Windows Kits\NETFXSDK\4.6\include\um" -I"C:\Program Files (x86)\Windows Kits\8.1\include\shared"
+RAW-NEXT:   0x1005 | LF_SUBSTR_LIST [size = 12]
+RAW-NEXT:            0x1004: `-Z7 -c -MT -IC:\vs14\VC\INCLUDE -IC:\vs14\VC\ATLMFC\INCLUDE -I"C:\Program Files (x86)\Windows Kits\10\include\10.0.10150.0\ucrt" -I"C:\Program Files (x86)\Windows Kits\NETFXSDK\4.6\include\um" -I"C:\Program Files (x86)\Windows Kits\8.1\include\shared"`
+RAW-NEXT:   0x1006 | LF_STRING_ID [size = 132] ID: 0x1005, String:  -I"C:\Program Files (x86)\Windows Kits\8.1\include\um" -I"C:\Program Files (x86)\Windows Kits\8.1\include\winrt" -TC -X
+RAW-NEXT:   0x1007 | LF_STRING_ID [size = 24] ID: <no type>, String: ret42-main.c
+RAW-NEXT:   0x1008 | LF_STRING_ID [size = 24] ID: <no type>, String: D:\b\vc140.pdb
+RAW-NEXT:   0x1009 | LF_BUILDINFO [size = 28]
+RAW-NEXT:            0x1002: `D:\b`
+RAW-NEXT:            0x1003: `C:\vs14\VC\BIN\amd64\cl.exe`
+RAW-NEXT:            0x1007: `ret42-main.c`
+RAW-NEXT:            0x1008: `D:\b\vc140.pdb`
+RAW-NEXT:            0x1006: ` -I"C:\Program Files (x86)\Windows Kits\8.1\include\um" -I"C:\Program Files (x86)\Windows Kits\8.1\include\winrt" -TC -X`
+RAW-NEXT:   0x100A | LF_STRING_ID [size = 20] ID: <no type>, String: ret42-sub.c
+RAW-NEXT:   0x100B | LF_BUILDINFO [size = 28]
+RAW-NEXT:            0x1002: `D:\b`
+RAW-NEXT:            0x1003: `C:\vs14\VC\BIN\amd64\cl.exe`
+RAW-NEXT:            0x100A: `ret42-sub.c`
+RAW-NEXT:            0x1008: `D:\b\vc140.pdb`
+RAW-NEXT:            0x1006: ` -I"C:\Program Files (x86)\Windows Kits\8.1\include\um" -I"C:\Program Files (x86)\Windows Kits\8.1\include\winrt" -TC -X`
+RAW:                        Section Contributions
+RAW-NEXT: ============================================================
+RAW-NEXT:   SC  | mod = 0, 65535:1288, size = 14, data crc = 0, reloc crc = 0
+RAW-NEXT:         IMAGE_SCN_CNT_CODE | IMAGE_SCN_ALIGN_16BYTES | IMAGE_SCN_MEM_EXECUTE |
+RAW-NEXT:         IMAGE_SCN_MEM_READ
+RAW-NEXT:   SC  | mod = 0, 65535:1312, size = 8, data crc = 0, reloc crc = 0
+RAW-NEXT:         IMAGE_SCN_CNT_INITIALIZED_DATA | IMAGE_SCN_ALIGN_4BYTES | IMAGE_SCN_MEM_READ
+RAW-NEXT:   SC  | mod = 0, 65535:1320, size = 12, data crc = 0, reloc crc = 0
+RAW-NEXT:         IMAGE_SCN_CNT_INITIALIZED_DATA | IMAGE_SCN_ALIGN_4BYTES | IMAGE_SCN_MEM_READ
+RAW-NEXT:   SC  | mod = 1, 65535:1144, size = 6, data crc = 0, reloc crc = 0
+RAW-NEXT:         IMAGE_SCN_CNT_CODE | IMAGE_SCN_ALIGN_16BYTES | IMAGE_SCN_MEM_EXECUTE |
+RAW-NEXT:         IMAGE_SCN_MEM_READ
+RAW:                             Section Map
+RAW-NEXT: ============================================================
+RAW-NEXT:   Section 0000 | ovl = 0, group = 0, frame = 0, name = 1
+RAW-NEXT:                  class = 65535, offset = 0, size = 
+RAW-NEXT:                  flags = read | 32 bit addr | selector
+RAW-NEXT:   Section 0001 | ovl = 1, group = 0, frame = 0, name = 2
+RAW-NEXT:                  class = 65535, offset = 0, size = 
+RAW-NEXT:                  flags = read | execute | 32 bit addr | selector
+RAW-NEXT:   Section 0002 | ovl = 2, group = 0, frame = 0, name = 3
+RAW-NEXT:                  class = 65535, offset = 0, size = 
+RAW-NEXT:                  flags = read | 32 bit addr | selector
+RAW-NEXT:   Section 0003 | ovl = 3, group = 0, frame = 0, name = 4
+RAW-NEXT:                  class = 65535, offset = 0, size = 
+RAW-NEXT:                  flags = read | 32 bit addr | selector
+RAW-NEXT:   Section 0004 | ovl = 4, group = 0, frame = 0, name = 5
+RAW-NEXT:                  class = 65535, offset = 0, size = 
+RAW-NEXT:                  flags = 32 bit addr | absolute addr
Index: vendor/lld/dist/test/COFF/sort-debug.test
===================================================================
--- vendor/lld/dist/test/COFF/sort-debug.test	(revision 320020)
+++ vendor/lld/dist/test/COFF/sort-debug.test	(revision 320021)
@@ -1,296 +1,335 @@
 # RUN: yaml2obj < %s > %t.obj
 # RUN: lld-link /debug /out:%t.exe /entry:main %t.obj
 # RUN: llvm-readobj -sections %t.exe | FileCheck %s
 
 # CHECK: Name: .text
 # CHECK: Name: .debug_abbrev
 # CHECK: Name: .debug_info
 # CHECK: Name: .debug_line
 # CHECK: Name: .debug_pubnames
 # CHECK: Name: .debug_pubtypes
 # CHECK: Name: .reloc
 
 
 --- !COFF
 header:
   Machine:         IMAGE_FILE_MACHINE_I386
   Characteristics: [  ]
 sections:
   - Name:            .text
     Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ ]
     Alignment:       16
     SectionData:     508D0500000000C70424000000005AC3
     Relocations:
       - VirtualAddress:  3
         SymbolName:      '?x@@3HA'
         Type:            IMAGE_REL_I386_DIR32
   - Name:            .data
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_READ, IMAGE_SCN_MEM_WRITE ]
     Alignment:       4
     SectionData:     ''
   - Name:            .bss
     Characteristics: [ IMAGE_SCN_CNT_UNINITIALIZED_DATA, IMAGE_SCN_MEM_READ, IMAGE_SCN_MEM_WRITE ]
     Alignment:       4
     SectionData:     ''
   - Name:            '.debug$S'
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
     Alignment:       1
-    SectionData:     04000000F1000000300000002A00471100000000000000000000000010000000000000000000000000000000000000000000006D61696E0002004F11F200000024000000000000000000010010000000000000000100000018000000000000000100000000000000F4000000080000000100000000000000F30000003C000000005C7573725C6C6F63616C5C676F6F676C655C686F6D655C6D616A6E656D65725C6C6C766D5C7372635C746F6F6C735C6C6C645C3C737464696E3E00
+    Subsections:
+      - !Symbols
+        Records:
+          - Kind:            S_GPROC32_ID
+            ProcSym:
+              PtrParent:       0
+              PtrEnd:          0
+              PtrNext:         0
+              CodeSize:        16
+              DbgStart:        0
+              DbgEnd:          0
+              FunctionType:    0
+              Segment:         0
+              Flags:           [  ]
+              DisplayName:     main
+          - Kind:            S_PROC_ID_END
+            ScopeEndSym:
+      - !Lines
+        CodeSize:        16
+        Flags:           [ HasColumnInfo ]
+        RelocOffset:     0
+        RelocSegment:    0
+        Blocks:
+          - FileName:        '\usr\local\google\home\majnemer\llvm\src\tools\lld\<stdin>'
+            Lines:
+              - Offset:          0
+                LineStart:       1
+                IsStatement:     false
+                EndDelta:        0
+            Columns:
+              - StartColumn:     0
+                EndColumn:       0
+      - !FileChecksums
+        Checksums:
+          - FileName:        '\usr\local\google\home\majnemer\llvm\src\tools\lld\<stdin>'
+            Kind:            None
+            Checksum:        ''
+      - !StringTable
+        Strings:
+          - '\usr\local\google\home\majnemer\llvm\src\tools\lld\<stdin>'
     Relocations:
       - VirtualAddress:  44
         SymbolName:      _main
         Type:            IMAGE_REL_I386_SECREL
       - VirtualAddress:  48
         SymbolName:      _main
         Type:            IMAGE_REL_I386_SECTION
       - VirtualAddress:  68
         SymbolName:      _main
         Type:            IMAGE_REL_I386_SECREL
       - VirtualAddress:  72
         SymbolName:      _main
         Type:            IMAGE_REL_I386_SECTION
   - Name:            .debug_str
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
     Alignment:       1
     SectionData:     ''
   - Name:            .debug_loc
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
     Alignment:       1
     SectionData:     ''
   - Name:            .debug_abbrev
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
     Alignment:       1
     SectionData:     011101250E1305030E10171B0E110112060000023400030E49133F193A0B3B0B02186E0E0000032400030E3E0B0B0B0000042E0011011206E77F194018030E3A0B3B0B49133F19000000
   - Name:            .debug_info
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
     Alignment:       1
     SectionData:     54000000040000000000040100000000040037000000000000003F000000000000001000000002720000003B0000000101050300000000780000000374000000050404000000001000000001548000000001013B00000000
     Relocations:
       - VirtualAddress:  6
         SymbolName:      .debug_abbrev
         Type:            IMAGE_REL_I386_SECREL
       - VirtualAddress:  12
         SymbolName:      .debug_str
         Type:            IMAGE_REL_I386_SECREL
       - VirtualAddress:  18
         SymbolName:      .debug_str
         Type:            IMAGE_REL_I386_SECREL
       - VirtualAddress:  22
         SymbolName:      .debug_line
         Type:            IMAGE_REL_I386_SECREL
       - VirtualAddress:  26
         SymbolName:      .debug_str
         Type:            IMAGE_REL_I386_SECREL
       - VirtualAddress:  30
         SymbolName:      .text
         Type:            IMAGE_REL_I386_DIR32
       - VirtualAddress:  39
         SymbolName:      .debug_str
         Type:            IMAGE_REL_I386_SECREL
       - VirtualAddress:  51
         SymbolName:      '?x@@3HA'
         Type:            IMAGE_REL_I386_DIR32
       - VirtualAddress:  55
         SymbolName:      .debug_str
         Type:            IMAGE_REL_I386_SECREL
       - VirtualAddress:  60
         SymbolName:      .debug_str
         Type:            IMAGE_REL_I386_SECREL
       - VirtualAddress:  67
         SymbolName:      .text
         Type:            IMAGE_REL_I386_DIR32
       - VirtualAddress:  77
         SymbolName:      .debug_str
         Type:            IMAGE_REL_I386_SECREL
   - Name:            .debug_ranges
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
     Alignment:       1
     SectionData:     ''
   - Name:            .debug_pubnames
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
     Alignment:       1
     SectionData:     1D00000002000000000058000000420000006D61696E0026000000780000000000
     Relocations:
       - VirtualAddress:  6
         SymbolName:      .debug_info
         Type:            IMAGE_REL_I386_SECREL
   - Name:            .debug_pubtypes
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
     Alignment:       1
     SectionData:     16000000020000000000580000003B000000696E740000000000
     Relocations:
       - VirtualAddress:  6
         SymbolName:      .debug_info
         Type:            IMAGE_REL_I386_SECREL
   - Name:            .debug_line
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
     Alignment:       1
     SectionData:     3300000002001E0000000101FB0E0D000101010100000001000001003C737464696E3E000000000000050200000000010AD60202000101
     Relocations:
       - VirtualAddress:  43
         SymbolName:      .text
         Type:            IMAGE_REL_I386_DIR32
 symbols:
   - Name:            .text
     Value:           0
     SectionNumber:   1
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_STATIC
     SectionDefinition:
       Length:          16
       NumberOfRelocations: 1
       NumberOfLinenumbers: 0
       CheckSum:        0
       Number:          1
   - Name:            .data
     Value:           0
     SectionNumber:   2
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_STATIC
     SectionDefinition:
       Length:          0
       NumberOfRelocations: 0
       NumberOfLinenumbers: 0
       CheckSum:        0
       Number:          2
   - Name:            .bss
     Value:           0
     SectionNumber:   3
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_STATIC
     SectionDefinition:
       Length:          4
       NumberOfRelocations: 0
       NumberOfLinenumbers: 0
       CheckSum:        0
       Number:          3
   - Name:            '.debug$S'
     Value:           0
     SectionNumber:   4
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_STATIC
     SectionDefinition:
       Length:          188
       NumberOfRelocations: 4
       NumberOfLinenumbers: 0
       CheckSum:        0
       Number:          4
   - Name:            .debug_str
     Value:           0
     SectionNumber:   5
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_STATIC
     SectionDefinition:
       Length:          133
       NumberOfRelocations: 0
       NumberOfLinenumbers: 0
       CheckSum:        0
       Number:          5
   - Name:            .debug_loc
     Value:           0
     SectionNumber:   6
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_STATIC
     SectionDefinition:
       Length:          0
       NumberOfRelocations: 0
       NumberOfLinenumbers: 0
       CheckSum:        0
       Number:          6
   - Name:            .debug_abbrev
     Value:           0
     SectionNumber:   7
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_STATIC
     SectionDefinition:
       Length:          74
       NumberOfRelocations: 0
       NumberOfLinenumbers: 0
       CheckSum:        0
       Number:          7
   - Name:            .debug_info
     Value:           0
     SectionNumber:   8
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_STATIC
     SectionDefinition:
       Length:          88
       NumberOfRelocations: 12
       NumberOfLinenumbers: 0
       CheckSum:        0
       Number:          8
   - Name:            .debug_ranges
     Value:           0
     SectionNumber:   9
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_STATIC
     SectionDefinition:
       Length:          0
       NumberOfRelocations: 0
       NumberOfLinenumbers: 0
       CheckSum:        0
       Number:          9
   - Name:            .debug_pubnames
     Value:           0
     SectionNumber:   10
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_STATIC
     SectionDefinition:
       Length:          33
       NumberOfRelocations: 1
       NumberOfLinenumbers: 0
       CheckSum:        0
       Number:          10
   - Name:            .debug_pubtypes
     Value:           0
     SectionNumber:   11
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_STATIC
     SectionDefinition:
       Length:          26
       NumberOfRelocations: 1
       NumberOfLinenumbers: 0
       CheckSum:        0
       Number:          11
   - Name:            .debug_line
     Value:           0
     SectionNumber:   12
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_STATIC
     SectionDefinition:
       Length:          55
       NumberOfRelocations: 1
       NumberOfLinenumbers: 0
       CheckSum:        0
       Number:          12
   - Name:            '@feat.00'
     Value:           1
     SectionNumber:   -1
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_STATIC
   - Name:            _main
     Value:           0
     SectionNumber:   1
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_FUNCTION
     StorageClass:    IMAGE_SYM_CLASS_EXTERNAL
   - Name:            '?x@@3HA'
     Value:           0
     SectionNumber:   3
     SimpleType:      IMAGE_SYM_TYPE_NULL
     ComplexType:     IMAGE_SYM_DTYPE_NULL
     StorageClass:    IMAGE_SYM_CLASS_EXTERNAL
 ...
Index: vendor/lld/dist/test/ELF/Inputs/icf-merge-sec.s
===================================================================
--- vendor/lld/dist/test/ELF/Inputs/icf-merge-sec.s	(nonexistent)
+++ vendor/lld/dist/test/ELF/Inputs/icf-merge-sec.s	(revision 320021)
@@ -0,0 +1,9 @@
+.section .rodata.str,"aMS",@progbits,1
+.asciz "bar"
+.asciz "baz"
+.asciz "foo"
+
+.section .text.f2,"ax"
+.globl f2
+f2:
+.quad .rodata.str+8

Property changes on: vendor/lld/dist/test/ELF/Inputs/icf-merge-sec.s
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+FreeBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Index: vendor/lld/dist/test/ELF/Inputs/icf-merge.s
===================================================================
--- vendor/lld/dist/test/ELF/Inputs/icf-merge.s	(nonexistent)
+++ vendor/lld/dist/test/ELF/Inputs/icf-merge.s	(revision 320021)
@@ -0,0 +1,10 @@
+.section .rodata.str,"aMS",@progbits,1
+.asciz "bar"
+.asciz "baz"
+foo:
+.asciz "foo"
+
+.section .text.f2,"ax"
+.globl f2
+f2:
+lea foo+42(%rip), %rax

Property changes on: vendor/lld/dist/test/ELF/Inputs/icf-merge.s
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+FreeBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Index: vendor/lld/dist/test/ELF/Inputs/icf-merge2.s
===================================================================
--- vendor/lld/dist/test/ELF/Inputs/icf-merge2.s	(nonexistent)
+++ vendor/lld/dist/test/ELF/Inputs/icf-merge2.s	(revision 320021)
@@ -0,0 +1,10 @@
+.section .rodata.str,"aMS",@progbits,1
+.asciz "bar"
+.asciz "baz"
+boo:
+.asciz "boo"
+
+.section .text.f2,"ax"
+.globl f2
+f2:
+lea boo+42(%rip), %rax

Property changes on: vendor/lld/dist/test/ELF/Inputs/icf-merge2.s
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+FreeBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Index: vendor/lld/dist/test/ELF/Inputs/icf-merge3.s
===================================================================
--- vendor/lld/dist/test/ELF/Inputs/icf-merge3.s	(nonexistent)
+++ vendor/lld/dist/test/ELF/Inputs/icf-merge3.s	(revision 320021)
@@ -0,0 +1,10 @@
+.section .rodata.str,"aMS",@progbits,1
+.asciz "bar"
+.asciz "baz"
+foo:
+.asciz "foo"
+
+.section .text.f2,"ax"
+.globl f2
+f2:
+lea foo+43(%rip), %rax

Property changes on: vendor/lld/dist/test/ELF/Inputs/icf-merge3.s
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+FreeBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Index: vendor/lld/dist/test/ELF/Inputs/sht-group-gold-r.elf
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/x-object

Property changes on: vendor/lld/dist/test/ELF/Inputs/sht-group-gold-r.elf
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/x-object
\ No newline at end of property
Index: vendor/lld/dist/test/ELF/Inputs/sht-group-gold-r.s
===================================================================
--- vendor/lld/dist/test/ELF/Inputs/sht-group-gold-r.s	(nonexistent)
+++ vendor/lld/dist/test/ELF/Inputs/sht-group-gold-r.s	(revision 320021)
@@ -0,0 +1,14 @@
+# sht-group-gold-r.elf is produced by
+#
+#   llvm-mc -filetype=obj -triple=x86_64-pc-linux sht-group-gold-r.s -o sht-group-gold-r.o
+#   ld.gold -o sht-group-gold-r.elf -r sht-group-gold-r.o
+
+.global foo, bar
+
+.section .text.foo,"aG",@progbits,group_foo,comdat
+foo:
+  nop
+
+.section .text.bar,"aG",@progbits,group_bar,comdat
+bar:
+  nop

Property changes on: vendor/lld/dist/test/ELF/Inputs/sht-group-gold-r.s
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+FreeBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Index: vendor/lld/dist/test/ELF/aarch64-undefined-weak.s
===================================================================
--- vendor/lld/dist/test/ELF/aarch64-undefined-weak.s	(revision 320020)
+++ vendor/lld/dist/test/ELF/aarch64-undefined-weak.s	(revision 320021)
@@ -1,45 +1,45 @@
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux %s -o %t
 // RUN: ld.lld %t -o %t2 2>&1
 // RUN: llvm-objdump -triple=aarch64-none-linux -d %t2 | FileCheck %s
 // REQUIRES: aarch64
 
 // Check that the ARM 64-bit ABI rules for undefined weak symbols are applied.
 // Branch instructions are resolved to the next instruction. Undefined
 // Symbols in relative are resolved to the place so S - P + A = A.
 
  .weak target
 
  .text
  .global _start
 _start:
 // R_AARCH64_JUMP26
  b target
 // R_AARCH64_CALL26
  bl target
 // R_AARCH64_CONDBR19
  b.eq target
 // R_AARCH64_TSTBR14
  cbz x1, target
 // R_AARCH64_ADR_PREL_LO21
  adr x0, target
 // R_AARCH64_ADR_PREL_PG_HI21
  adrp x0, target
 // R_AARCH64_PREL32
  .word target - .
 // R_AARCH64_PREL64
  .xword target - .
 // R_AARCH64_PREL16
  .hword target - .
 
 // CHECK: Disassembly of section .text:
 // 131076 = 0x20004
-// CHECK:         20000: {{.*}} b       #131076
-// CHECK-NEXT:    20004: {{.*}} bl      #131080
-// CHECK-NEXT:    20008: {{.*}} b.eq    #131084
-// CHECK-NEXT:    2000c: {{.*}} cbz     x1, #131088
+// CHECK:         20000: {{.*}} b       #4
+// CHECK-NEXT:    20004: {{.*}} bl      #4
+// CHECK-NEXT:    20008: {{.*}} b.eq    #4
+// CHECK-NEXT:    2000c: {{.*}} cbz     x1, #4
 // CHECK-NEXT:    20010: {{.*}} adr     x0, #0
-// CHECK-NEXT:    20014: {{.*}} adrp    x0, #0
+// CHECK-NEXT:    20014: {{.*}} adrp    x0, #-131072
 // CHECK:         20018: {{.*}} .word   0x00000000
 // CHECK-NEXT:    2001c: {{.*}} .word   0x00000000
 // CHECK-NEXT:    20020: {{.*}} .word   0x00000000
 // CHECK-NEXT:    20024: {{.*}} .short  0x0000
Index: vendor/lld/dist/test/ELF/arm-thumb-no-undefined-thunk.s
===================================================================
--- vendor/lld/dist/test/ELF/arm-thumb-no-undefined-thunk.s	(revision 320020)
+++ vendor/lld/dist/test/ELF/arm-thumb-no-undefined-thunk.s	(revision 320021)
@@ -1,24 +1,24 @@
 // RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
 // RUN: ld.lld %t -o %t2 2>&1
 // RUN: llvm-objdump -triple=thumbv7a-none-linux-gnueabi -d %t2 | FileCheck %s
 // REQUIRES: arm
 
 // Check that no thunks are created for an undefined weak symbol
  .syntax unified
 
 .weak target
 
 .section .text.thumb, "ax", %progbits
  .thumb
  .global
 _start:
  bl target
  b target
  b.w target
 
 // CHECK: Disassembly of section .text:
 // CHECK-NEXT: _start:
 // 69636 = 0x11004 = next instruction
-// CHECK:         11000: {{.*}} bl      #69636
-// CHECK-NEXT:    11004: {{.*}} b.w     #69640
-// CHECK-NEXT:    11008: {{.*}} b.w     #69644
+// CHECK:         11000: {{.*}} bl      #0
+// CHECK-NEXT:    11004: {{.*}} b.w     #0 <_start+0x8>
+// CHECK-NEXT:    11008: {{.*}} b.w     #0 <_start+0xC>
Index: vendor/lld/dist/test/ELF/arm-thumb-undefined-weak.s
===================================================================
--- vendor/lld/dist/test/ELF/arm-thumb-undefined-weak.s	(revision 320020)
+++ vendor/lld/dist/test/ELF/arm-thumb-undefined-weak.s	(revision 320021)
@@ -1,38 +1,38 @@
 // RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
 // RUN: ld.lld %t -o %t2 2>&1
 // RUN: llvm-objdump -triple=thumbv7a-none-linux-gnueabi -d %t2 | FileCheck %s
 // REQUIRES: arm
 
 // Check that the ARM ABI rules for undefined weak symbols are applied.
 // Branch instructions are resolved to the next instruction. Relative
 // relocations are resolved to the place.
 
  .syntax unified
 
  .weak target
 
  .text
  .global _start
 _start:
 // R_ARM_THM_JUMP19
  beq.w target
 // R_ARM_THM_JUMP24
  b.w target
 // R_ARM_THM_CALL
  bl target
 // R_ARM_THM_CALL with exchange
  blx target
 // R_ARM_THM_MOVT_PREL
  movt r0, :upper16:target - .
 // R_ARM_THM_MOVW_PREL_NC
  movw r0, :lower16:target - .
 
 // CHECK: Disassembly of section .text:
 // 69636 = 0x11004
-// CHECK:         11000: {{.*}} beq.w   #69636
-// CHECK-NEXT:    11004: {{.*}} b.w     #69640
-// CHECK-NEXT:    11008: {{.*}} bl      #69644
+// CHECK:         11000: {{.*}} beq.w   #0 <_start+0x4>
+// CHECK-NEXT:    11004: {{.*}} b.w     #0 <_start+0x8>
+// CHECK-NEXT:    11008: {{.*}} bl      #0
 // blx is transformed into bl so we don't change state
-// CHECK-NEXT:    1100c: {{.*}} bl      #69648
+// CHECK-NEXT:    1100c: {{.*}} bl      #0
 // CHECK-NEXT:    11010: {{.*}} movt    r0, #0
 // CHECK-NEXT:    11014: {{.*}} movw    r0, #0
Index: vendor/lld/dist/test/ELF/arm-undefined-weak.s
===================================================================
--- vendor/lld/dist/test/ELF/arm-undefined-weak.s	(revision 320020)
+++ vendor/lld/dist/test/ELF/arm-undefined-weak.s	(revision 320021)
@@ -1,39 +1,39 @@
 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
 // RUN: ld.lld %t -o %t2 2>&1
 // RUN: llvm-objdump -triple=armv7a-none-linux-gnueabi -d %t2 | FileCheck %s
 // REQUIRES: arm
 
 // Check that the ARM ABI rules for undefined weak symbols are applied.
 // Branch instructions are resolved to the next instruction. Undefined
 // Symbols in relative are resolved to the place so S - P + A = A.
 
  .syntax unified
 
  .weak target
 
  .text
  .global _start
 _start:
 // R_ARM_JUMP24
  b target
 // R_ARM_CALL
  bl target
 // R_ARM_CALL with exchange
  blx target
 // R_ARM_MOVT_PREL
  movt r0, :upper16:target - .
 // R_ARM_MOVW_PREL_NC
  movw r0, :lower16:target - .
 // R_ARM_REL32
  .word target - .
 
 // CHECK: Disassembly of section .text:
 // 69636 = 0x11004
-// CHECK:         11000: {{.*}} b       #69636
-// CHECK-NEXT:    11004: {{.*}} bl      #69640
+// CHECK:         11000: {{.*}} b       #-4 <_start+0x4>
+// CHECK-NEXT:    11004: {{.*}} bl      #-4 <_start+0x8>
 // blx is transformed into bl so we don't change state
-// CHECK-NEXT:    11008: {{.*}} bl      #69644
+// CHECK-NEXT:    11008: {{.*}} bl      #-4 <_start+0xC>
 // CHECK-NEXT:    1100c: {{.*}} movt    r0, #0
 // CHECK-NEXT:    11010: {{.*}} movw    r0, #0
 // CHECK:         11014: {{.*}} .word   0x00000000
 
Index: vendor/lld/dist/test/ELF/basic-avr.s
===================================================================
--- vendor/lld/dist/test/ELF/basic-avr.s	(nonexistent)
+++ vendor/lld/dist/test/ELF/basic-avr.s	(revision 320021)
@@ -0,0 +1,14 @@
+# REQUIRES: avr
+# RUN: llvm-mc -filetype=obj -triple=avr-unknown-linux -mcpu=atmega328p %s -o %t.o
+# RUN: ld.lld %t.o -o %t.exe -Ttext=0
+# RUN: llvm-objdump -d %t.exe | FileCheck %s
+
+main:
+  call foo
+foo:
+  jmp foo
+
+# CHECK:      main:
+# CHECK-NEXT:   0: 0e 94 02 00 <unknown>
+# CHECK:      foo:
+# CHECK-NEXT:   4: 0c 94 02 00 <unknown>

Property changes on: vendor/lld/dist/test/ELF/basic-avr.s
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+FreeBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Index: vendor/lld/dist/test/ELF/icf-merge-sec.s
===================================================================
--- vendor/lld/dist/test/ELF/icf-merge-sec.s	(nonexistent)
+++ vendor/lld/dist/test/ELF/icf-merge-sec.s	(revision 320021)
@@ -0,0 +1,18 @@
+# REQUIRES: x86
+
+# RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %s -o %t
+# RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %S/Inputs/icf-merge-sec.s -o %t2
+# RUN: ld.lld %t %t2 -o %t3 --icf=all --verbose | FileCheck %s
+
+# CHECK: selected .text.f1
+# CHECK:   removed .text.f2
+
+.section .rodata.str,"aMS",@progbits,1
+.asciz "foo"
+.asciz "string 1"
+.asciz "string 2"
+
+.section .text.f1,"ax"
+.globl f1
+f1:
+.quad .rodata.str

Property changes on: vendor/lld/dist/test/ELF/icf-merge-sec.s
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+FreeBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Index: vendor/lld/dist/test/ELF/icf-merge.s
===================================================================
--- vendor/lld/dist/test/ELF/icf-merge.s	(nonexistent)
+++ vendor/lld/dist/test/ELF/icf-merge.s	(revision 320021)
@@ -0,0 +1,27 @@
+# REQUIRES: x86
+
+# RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %s -o %t
+# RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %S/Inputs/icf-merge.s -o %t1
+# RUN: ld.lld %t %t1 -o %t1.out --icf=all --verbose | FileCheck %s
+
+# RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %S/Inputs/icf-merge2.s -o %t2
+# RUN: ld.lld %t %t2 -o %t3.out --icf=all --verbose | FileCheck --check-prefix=NOMERGE %s
+
+# RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %S/Inputs/icf-merge3.s -o %t3
+# RUN: ld.lld %t %t3 -o %t3.out --icf=all --verbose | FileCheck --check-prefix=NOMERGE %s
+
+# CHECK: selected .text.f1
+# CHECK:   removed .text.f2
+
+# NOMERGE-NOT: selected .text.f
+
+.section .rodata.str,"aMS",@progbits,1
+foo:
+.asciz "foo"
+.asciz "string 1"
+.asciz "string 2"
+
+.section .text.f1,"ax"
+.globl f1
+f1:
+lea foo+42(%rip), %rax

Property changes on: vendor/lld/dist/test/ELF/icf-merge.s
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+FreeBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Index: vendor/lld/dist/test/ELF/linkerscript/data-commands-gc.s
===================================================================
--- vendor/lld/dist/test/ELF/linkerscript/data-commands-gc.s	(nonexistent)
+++ vendor/lld/dist/test/ELF/linkerscript/data-commands-gc.s	(revision 320021)
@@ -0,0 +1,16 @@
+# REQUIRES: x86
+# RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %s -o %t.o
+# RUN: echo "SECTIONS { .text : { *(.text*) QUAD(bar) } }" > %t.script
+# RUN: ld.lld --gc-sections -o %t %t.o --script %t.script | FileCheck -allow-empty %s
+
+# CHECK-NOT: unable to evaluate expression: input section .rodata.bar has no output section assigned
+
+.section .rodata.bar
+.quad 0x1122334455667788
+.global bar
+bar:
+
+.section .text
+.global _start
+_start:
+  nop

Property changes on: vendor/lld/dist/test/ELF/linkerscript/data-commands-gc.s
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+FreeBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Index: vendor/lld/dist/test/ELF/linkerscript/locationcountererr2.s
===================================================================
--- vendor/lld/dist/test/ELF/linkerscript/locationcountererr2.s	(revision 320020)
+++ vendor/lld/dist/test/ELF/linkerscript/locationcountererr2.s	(revision 320021)
@@ -1,9 +1,9 @@
 # REQUIRES: x86
 # RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %s -o %t.o
 # RUN: echo "SECTIONS {" > %t.script
-# RUN: echo ". = 0x20; . = 0x10; }" >> %t.script
+# RUN: echo ". = 0x20; . = 0x10; .text : {} }" >> %t.script
 # RUN: not ld.lld %t.o --script %t.script -o %t -shared 2>&1 | FileCheck %s
 # CHECK: {{.*}}.script:2: unable to move location counter backward
 
 # RUN: echo "SECTIONS { . = 0x20; . = ASSERT(0x1, "foo"); }" > %t2.script
 # RUN: ld.lld %t.o --script %t2.script -o %t -shared
Index: vendor/lld/dist/test/ELF/linkerscript/symbols-non-alloc.s
===================================================================
--- vendor/lld/dist/test/ELF/linkerscript/symbols-non-alloc.s	(revision 320020)
+++ vendor/lld/dist/test/ELF/linkerscript/symbols-non-alloc.s	(revision 320021)
@@ -1,16 +1,19 @@
 # REQUIRES: x86
 # RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %s -o %t
 
 # RUN: echo "SECTIONS { . = SIZEOF_HEADERS; \
 # RUN:  .text : { *(.text) }                \
 # RUN:  .nonalloc : { *(.nonalloc) }        \
 # RUN:  Sym = .;                            \
 # RUN:  }" > %t.script
 # RUN: ld.lld -o %t2 --script %t.script %t
 # RUN: llvm-objdump -section-headers -t %t2 | FileCheck %s
 
+# CHECK: Sections:
+# CHECK:  .nonalloc     00000008 0000000000000000
+
 # CHECK: SYMBOL TABLE:
-# CHECK:  00000000000000f0 .nonalloc 00000000 Sym
+# CHECK:  0000000000000008 .nonalloc 00000000 Sym
 
 .section .nonalloc,""
  .quad 0
Index: vendor/lld/dist/test/ELF/sht-group-gold-r.test
===================================================================
--- vendor/lld/dist/test/ELF/sht-group-gold-r.test	(nonexistent)
+++ vendor/lld/dist/test/ELF/sht-group-gold-r.test	(revision 320021)
@@ -0,0 +1,17 @@
+# GNU gold 1.14 (the newest version as of July 2017) seems to create
+# non-standard-compliant SHT_GROUP sections when the -r option is given.
+#
+# Such SHT_GROUP sections use section names as their signatures
+# instead of symbols pointed by sh_link field. Since it is prevalent,
+# we accept such nonstandard sections.
+
+# RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %s -o %t.o
+# RUN: ld.lld %p/Inputs/sht-group-gold-r.elf %t.o -o %t.exe
+# RUN: llvm-objdump -t %t.exe | FileCheck %s
+
+# CHECK: .text 00000000 bar
+# CHECK: .text 00000000 foo
+
+.globl _start
+_start:
+  ret
Index: vendor/lld/dist/test/lit.cfg
===================================================================
--- vendor/lld/dist/test/lit.cfg	(revision 320020)
+++ vendor/lld/dist/test/lit.cfg	(revision 320021)
@@ -1,266 +1,269 @@
 # -*- Python -*-
 
 import os
 import platform
 import re
 import subprocess
 import locale
 
 import lit.formats
 import lit.util
 
 # Configuration file for the 'lit' test runner.
 
 # name: The name of this test suite.
 config.name = 'lld'
 
 # Tweak PATH for Win32
 if sys.platform in ['win32']:
     # Seek sane tools in directories and set to $PATH.
     path = getattr(config, 'lit_tools_dir', None)
     path = lit_config.getToolsPath(path,
                                    config.environment['PATH'],
                                    ['cmp.exe', 'grep.exe', 'sed.exe'])
     if path is not None:
         path = os.path.pathsep.join((path,
                                      config.environment['PATH']))
         config.environment['PATH'] = path
 
 # Choose between lit's internal shell pipeline runner and a real shell.  If
 # LIT_USE_INTERNAL_SHELL is in the environment, we use that as an override.
 use_lit_shell = os.environ.get("LIT_USE_INTERNAL_SHELL")
 if use_lit_shell:
     # 0 is external, "" is default, and everything else is internal.
     execute_external = (use_lit_shell == "0")
 else:
     # Otherwise we default to internal on Windows and external elsewhere, as
     # bash on Windows is usually very slow.
     execute_external = (not sys.platform in ['win32'])
 
 
 # testFormat: The test format to use to interpret tests.
 #
 # For now we require '&&' between commands, until they get globally killed and
 # the test runner updated.
 config.test_format = lit.formats.ShTest(execute_external)
 
 # suffixes: A list of file extensions to treat as test files.
-config.suffixes = ['.ll', '.objtxt', '.test']
+config.suffixes = ['.ll', '.s', '.objtxt', '.test']
 
 # excludes: A list of directories to exclude from the testsuite. The 'Inputs'
 # subdirectories contain auxiliary inputs for various tests in their parent
 # directories.
 config.excludes = ['Inputs']
 
 # test_source_root: The root path where tests are located.
 config.test_source_root = os.path.dirname(__file__)
 
 # test_exec_root: The root path where tests should be run.
 lld_obj_root = getattr(config, 'lld_obj_root', None)
 if lld_obj_root is not None:
     config.test_exec_root = os.path.join(lld_obj_root, 'test')
 
 # Set llvm_{src,obj}_root for use by others.
 config.llvm_src_root = getattr(config, 'llvm_src_root', None)
 config.llvm_obj_root = getattr(config, 'llvm_obj_root', None)
 
 # Tweak the PATH to include the tools dir and the scripts dir.
 if lld_obj_root is not None:
     lld_tools_dir = getattr(config, 'lld_tools_dir', None)
     if not lld_tools_dir:
         lit_config.fatal('No LLD tools dir set!')
     llvm_tools_dir = getattr(config, 'llvm_tools_dir', None)
     if not llvm_tools_dir:
         lit_config.fatal('No LLVM tools dir set!')
     path = os.path.pathsep.join((lld_tools_dir, llvm_tools_dir, config.environment['PATH']))
     path = os.path.pathsep.join((os.path.join(getattr(config, 'llvm_src_root', None),'test','Scripts'),path))
 
     config.environment['PATH'] = path
 
     lld_libs_dir = getattr(config, 'lld_libs_dir', None)
     if not lld_libs_dir:
         lit_config.fatal('No LLD libs dir set!')
     llvm_libs_dir = getattr(config, 'llvm_libs_dir', None)
     if not llvm_libs_dir:
         lit_config.fatal('No LLVM libs dir set!')
     path = os.path.pathsep.join((lld_libs_dir, llvm_libs_dir,
                                  config.environment.get('LD_LIBRARY_PATH','')))
     config.environment['LD_LIBRARY_PATH'] = path
 
     # Propagate LLVM_SRC_ROOT into the environment.
     config.environment['LLVM_SRC_ROOT'] = getattr(config, 'llvm_src_root', '')
 
     # Propagate PYTHON_EXECUTABLE into the environment
     config.environment['PYTHON_EXECUTABLE'] = getattr(config, 'python_executable',
                                                       '')
 ###
 
 # Check that the object root is known.
 if config.test_exec_root is None:
     # Otherwise, we haven't loaded the site specific configuration (the user is
     # probably trying to run on a test file directly, and either the site
     # configuration hasn't been created by the build system, or we are in an
     # out-of-tree build situation).
 
     # Check for 'lld_site_config' user parameter, and use that if available.
     site_cfg = lit_config.params.get('lld_site_config', None)
     if site_cfg and os.path.exists(site_cfg):
         lit_config.load_config(config, site_cfg)
         raise SystemExit
 
     # Try to detect the situation where we are using an out-of-tree build by
     # looking for 'llvm-config'.
     #
     # FIXME: I debated (i.e., wrote and threw away) adding logic to
     # automagically generate the lit.site.cfg if we are in some kind of fresh
     # build situation. This means knowing how to invoke the build system though,
     # and I decided it was too much magic. We should solve this by just having
     # the .cfg files generated during the configuration step.
 
     llvm_config = lit.util.which('llvm-config', config.environment['PATH'])
     if not llvm_config:
         lit_config.fatal('No site specific configuration available!')
 
     # Get the source and object roots.
     llvm_src_root = lit.util.capture(['llvm-config', '--src-root']).strip()
     llvm_obj_root = lit.util.capture(['llvm-config', '--obj-root']).strip()
     lld_src_root = os.path.join(llvm_src_root, "tools", "lld")
     lld_obj_root = os.path.join(llvm_obj_root, "tools", "lld")
 
     # Validate that we got a tree which points to here, using the standard
     # tools/lld layout.
     this_src_root = os.path.dirname(config.test_source_root)
     if os.path.realpath(lld_src_root) != os.path.realpath(this_src_root):
         lit_config.fatal('No site specific configuration available!')
 
     # Check that the site specific configuration exists.
     site_cfg = os.path.join(lld_obj_root, 'test', 'lit.site.cfg')
     if not os.path.exists(site_cfg):
         lit_config.fatal(
             'No site specific configuration available! You may need to '
             'run "make test" in your lld build directory.')
 
     # Okay, that worked. Notify the user of the automagic, and reconfigure.
     lit_config.note('using out-of-tree build at %r' % lld_obj_root)
     lit_config.load_config(config, site_cfg)
     raise SystemExit
 
 # For each occurrence of a lld tool name as its own word, replace it
 # with the full path to the build directory holding that tool.  This
 # ensures that we are testing the tools just built and not some random
 # tools that might happen to be in the user's PATH.
 
 # Regex assertions to reject neighbor hyphens/dots (seen in some tests).
 # For example, we want to prefix 'lld' and 'ld.lld' but not the 'lld' inside
 # of 'ld.lld'.
 NoPreJunk = r"(?<!(-|\.|/))"
 NoPostJunk = r"(?!(-|\.))"
 
 config.substitutions.append( (r"\bld.lld\b", 'ld.lld --full-shutdown') )
 
 tool_patterns = [r"\bFileCheck\b",
                  r"\bnot\b",
                  NoPreJunk + r"\blld\b" + NoPostJunk,
                  r"\bld.lld\b",
                  r"\blld-link\b",
                  r"\bllvm-as\b",
                  r"\bllvm-mc\b",
                  r"\bllvm-nm\b",
                  r"\bllvm-objdump\b",
+                 r"\bllvm-pdbutil\b",
                  r"\bllvm-readobj\b",
                  r"\bobj2yaml\b",
                  r"\byaml2obj\b"]
 
 for pattern in tool_patterns:
     # Extract the tool name from the pattern.  This relies on the tool
     # name being surrounded by \b word match operators.  If the
     # pattern starts with "| ", include it in the string to be
     # substituted.
     tool_match = re.match(r"^(\\)?((\| )?)\W+b([0-9A-Za-z-_\.]+)\\b\W*$",
                           pattern)
     tool_pipe = tool_match.group(2)
     tool_name = tool_match.group(4)
     tool_path = lit.util.which(tool_name, config.environment['PATH'])
     if not tool_path:
         # Warn, but still provide a substitution.
         lit_config.note('Did not find ' + tool_name + ' in ' + path)
         tool_path = llvm_tools_dir + '/' + tool_name
     config.substitutions.append((pattern, tool_pipe + tool_path))
 
 # Add site-specific substitutions.
 config.substitutions.append( ('%python', config.python_executable) )
 
 ###
 
 # When running under valgrind, we mangle '-vg' onto the end of the triple so we
 # can check it with XFAIL and XTARGET.
 if lit_config.useValgrind:
     config.target_triple += '-vg'
 
 # Shell execution
 if execute_external:
     config.available_features.add('shell')
 
 # zlib compression library
 if config.have_zlib:
     config.available_features.add("zlib")
 
 # Running on Darwin OS
 if platform.system() in ['Darwin']:
     config.available_features.add('system-linker-mach-o')
 
 # Running on ELF based *nix
 if platform.system() in ['FreeBSD', 'Linux']:
     config.available_features.add('system-linker-elf')
 
 # Running on Windows
 if platform.system() in ['Windows']:
     config.available_features.add('system-windows')
 
 # Set if host-cxxabi's demangler can handle target's symbols.
 if platform.system() not in ['Windows']:
     config.available_features.add('demangler')
 
 # llvm-config knows whether it is compiled with asserts (and)
 # whether we are operating in release/debug mode.
 import subprocess
 try:
     llvm_config_cmd = \
      subprocess.Popen([os.path.join(llvm_tools_dir, 'llvm-config'),
                      '--build-mode', '--assertion-mode', '--targets-built'],
                       stdout = subprocess.PIPE)
 except OSError as why:
     print("Could not find llvm-config in " + llvm_tools_dir)
     exit(42)
 
 llvm_config_output = llvm_config_cmd.stdout.read().decode('utf_8')
 llvm_config_output_list = llvm_config_output.split("\n")
 
 if re.search(r'DEBUG', llvm_config_output_list[0]):
     config.available_features.add('debug')
 if re.search(r'ON', llvm_config_output_list[1]):
     config.available_features.add('asserts')
 
 archs = llvm_config_output_list[2]
 if re.search(r'AArch64', archs):
     config.available_features.add('aarch64')
 if re.search(r'ARM', archs):
     config.available_features.add('arm')
+if re.search(r'AVR', archs):
+    config.available_features.add('avr')
 if re.search(r'Mips', archs):
     config.available_features.add('mips')
 if re.search(r'X86', archs):
     config.available_features.add('x86')
 if re.search(r'PowerPC', archs):
     config.available_features.add('ppc')
 if re.search(r'AMDGPU', archs):
     config.available_features.add('amdgpu')
 llvm_config_cmd.wait()
 
 # Set a fake constant version so that we get consitent output.
 config.environment['LLD_VERSION'] = 'LLD 1.0'
 
 # Check if Windows resource file compiler exists.
 cvtres = lit.util.which('cvtres', config.environment['PATH'])
 rc = lit.util.which('rc', config.environment['PATH'])
 if cvtres and rc:
     config.available_features.add('winres')