Index: vendor/lld/dist/ELF/Relocations.cpp =================================================================== --- vendor/lld/dist/ELF/Relocations.cpp (revision 318421) +++ vendor/lld/dist/ELF/Relocations.cpp (revision 318422) @@ -1,1093 +1,1081 @@ //===- Relocations.cpp ----------------------------------------------------===// // // The LLVM Linker // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file contains platform-independent functions to process relocations. // I'll describe the overview of this file here. // // Simple relocations are easy to handle for the linker. For example, // for R_X86_64_PC64 relocs, the linker just has to fix up locations // with the relative offsets to the target symbols. It would just be // reading records from relocation sections and applying them to output. // // But not all relocations are that easy to handle. For example, for // R_386_GOTOFF relocs, the linker has to create new GOT entries for // symbols if they don't exist, and fix up locations with GOT entry // offsets from the beginning of GOT section. So there is more than // fixing addresses in relocation processing. // // ELF defines a large number of complex relocations. // // The functions in this file analyze relocations and do whatever needs // to be done. It includes, but not limited to, the following. // // - create GOT/PLT entries // - create new relocations in .dynsym to let the dynamic linker resolve // them at runtime (since ELF supports dynamic linking, not all // relocations can be resolved at link-time) // - create COPY relocs and reserve space in .bss // - replace expensive relocs (in terms of runtime cost) with cheap ones // - error out infeasible combinations such as PIC and non-relative relocs // // Note that the functions in this file don't actually apply relocations // because it doesn't know about the output file nor the output file buffer. // It instead stores Relocation objects to InputSection's Relocations // vector to let it apply later in InputSection::writeTo. // //===----------------------------------------------------------------------===// #include "Relocations.h" #include "Config.h" #include "Memory.h" #include "OutputSections.h" #include "Strings.h" #include "SymbolTable.h" #include "SyntheticSections.h" #include "Target.h" #include "Thunks.h" #include "llvm/Support/Endian.h" #include "llvm/Support/raw_ostream.h" #include using namespace llvm; using namespace llvm::ELF; using namespace llvm::object; using namespace llvm::support::endian; using namespace lld; using namespace lld::elf; // Construct a message in the following format. // // >>> defined in /home/alice/src/foo.o // >>> referenced by bar.c:12 (/home/alice/src/bar.c:12) // >>> /home/alice/src/bar.o:(.text+0x1) template static std::string getLocation(InputSectionBase &S, const SymbolBody &Sym, uint64_t Off) { std::string Msg = "\n>>> defined in " + toString(Sym.File) + "\n>>> referenced by "; std::string Src = S.getSrcMsg(Off); if (!Src.empty()) Msg += Src + "\n>>> "; return Msg + S.getObjMsg(Off); } static bool isPreemptible(const SymbolBody &Body, uint32_t Type) { // In case of MIPS GP-relative relocations always resolve to a definition // in a regular input file, ignoring the one-definition rule. So we, // for example, should not attempt to create a dynamic relocation even // if the target symbol is preemptible. There are two two MIPS GP-relative // relocations R_MIPS_GPREL16 and R_MIPS_GPREL32. But only R_MIPS_GPREL16 // can be against a preemptible symbol. // To get MIPS relocation type we apply 0xff mask. In case of O32 ABI all // relocation types occupy eight bit. In case of N64 ABI we extract first // relocation from 3-in-1 packet because only the first relocation can // be against a real symbol. if (Config->EMachine == EM_MIPS && (Type & 0xff) == R_MIPS_GPREL16) return false; return Body.isPreemptible(); } // This function is similar to the `handleTlsRelocation`. MIPS does not // support any relaxations for TLS relocations so by factoring out MIPS // handling in to the separate function we can simplify the code and do not // pollute other `handleTlsRelocation` by MIPS `ifs` statements. // Mips has a custom MipsGotSection that handles the writing of GOT entries // without dynamic relocations. template static unsigned handleMipsTlsRelocation(uint32_t Type, SymbolBody &Body, InputSectionBase &C, uint64_t Offset, int64_t Addend, RelExpr Expr) { if (Expr == R_MIPS_TLSLD) { if (InX::MipsGot->addTlsIndex() && Config->Pic) In::RelaDyn->addReloc({Target->TlsModuleIndexRel, InX::MipsGot, InX::MipsGot->getTlsIndexOff(), false, nullptr, 0}); C.Relocations.push_back({Expr, Type, Offset, Addend, &Body}); return 1; } if (Expr == R_MIPS_TLSGD) { if (InX::MipsGot->addDynTlsEntry(Body) && Body.isPreemptible()) { uint64_t Off = InX::MipsGot->getGlobalDynOffset(Body); In::RelaDyn->addReloc( {Target->TlsModuleIndexRel, InX::MipsGot, Off, false, &Body, 0}); if (Body.isPreemptible()) In::RelaDyn->addReloc({Target->TlsOffsetRel, InX::MipsGot, Off + Config->Wordsize, false, &Body, 0}); } C.Relocations.push_back({Expr, Type, Offset, Addend, &Body}); return 1; } return 0; } // This function is similar to the `handleMipsTlsRelocation`. ARM also does not // support any relaxations for TLS relocations. ARM is logically similar to Mips // in how it handles TLS, but Mips uses its own custom GOT which handles some // of the cases that ARM uses GOT relocations for. // // We look for TLS global dynamic and local dynamic relocations, these may // require the generation of a pair of GOT entries that have associated // dynamic relocations. When the results of the dynamic relocations can be // resolved at static link time we do so. This is necessary for static linking // as there will be no dynamic loader to resolve them at load-time. // // The pair of GOT entries created are of the form // GOT[e0] Module Index (Used to find pointer to TLS block at run-time) // GOT[e1] Offset of symbol in TLS block template static unsigned handleARMTlsRelocation(uint32_t Type, SymbolBody &Body, InputSectionBase &C, uint64_t Offset, int64_t Addend, RelExpr Expr) { // The Dynamic TLS Module Index Relocation for a symbol defined in an // executable is always 1. If the target Symbol is not preemtible then // we know the offset into the TLS block at static link time. bool NeedDynId = Body.isPreemptible() || Config->Shared; bool NeedDynOff = Body.isPreemptible(); auto AddTlsReloc = [&](uint64_t Off, uint32_t Type, SymbolBody *Dest, bool Dyn) { if (Dyn) In::RelaDyn->addReloc({Type, InX::Got, Off, false, Dest, 0}); else InX::Got->Relocations.push_back({R_ABS, Type, Off, 0, Dest}); }; // Local Dynamic is for access to module local TLS variables, while still // being suitable for being dynamically loaded via dlopen. // GOT[e0] is the module index, with a special value of 0 for the current // module. GOT[e1] is unused. There only needs to be one module index entry. if (Expr == R_TLSLD_PC && InX::Got->addTlsIndex()) { AddTlsReloc(InX::Got->getTlsIndexOff(), Target->TlsModuleIndexRel, NeedDynId ? nullptr : &Body, NeedDynId); C.Relocations.push_back({Expr, Type, Offset, Addend, &Body}); return 1; } // Global Dynamic is the most general purpose access model. When we know // the module index and offset of symbol in TLS block we can fill these in // using static GOT relocations. if (Expr == R_TLSGD_PC) { if (InX::Got->addDynTlsEntry(Body)) { uint64_t Off = InX::Got->getGlobalDynOffset(Body); AddTlsReloc(Off, Target->TlsModuleIndexRel, &Body, NeedDynId); AddTlsReloc(Off + Config->Wordsize, Target->TlsOffsetRel, &Body, NeedDynOff); } C.Relocations.push_back({Expr, Type, Offset, Addend, &Body}); return 1; } return 0; } // Returns the number of relocations processed. template static unsigned handleTlsRelocation(uint32_t Type, SymbolBody &Body, InputSectionBase &C, typename ELFT::uint Offset, int64_t Addend, RelExpr Expr) { if (!(C.Flags & SHF_ALLOC)) return 0; if (!Body.isTls()) return 0; if (Config->EMachine == EM_ARM) return handleARMTlsRelocation(Type, Body, C, Offset, Addend, Expr); if (Config->EMachine == EM_MIPS) return handleMipsTlsRelocation(Type, Body, C, Offset, Addend, Expr); bool IsPreemptible = isPreemptible(Body, Type); if (isRelExprOneOf(Expr) && Config->Shared) { if (InX::Got->addDynTlsEntry(Body)) { uint64_t Off = InX::Got->getGlobalDynOffset(Body); In::RelaDyn->addReloc( {Target->TlsDescRel, InX::Got, Off, !IsPreemptible, &Body, 0}); } if (Expr != R_TLSDESC_CALL) C.Relocations.push_back({Expr, Type, Offset, Addend, &Body}); return 1; } if (isRelExprOneOf(Expr)) { // Local-Dynamic relocs can be relaxed to Local-Exec. if (!Config->Shared) { C.Relocations.push_back( {R_RELAX_TLS_LD_TO_LE, Type, Offset, Addend, &Body}); return 2; } if (InX::Got->addTlsIndex()) In::RelaDyn->addReloc({Target->TlsModuleIndexRel, InX::Got, InX::Got->getTlsIndexOff(), false, nullptr, 0}); C.Relocations.push_back({Expr, Type, Offset, Addend, &Body}); return 1; } // Local-Dynamic relocs can be relaxed to Local-Exec. if (isRelExprOneOf(Expr) && !Config->Shared) { C.Relocations.push_back( {R_RELAX_TLS_LD_TO_LE, Type, Offset, Addend, &Body}); return 1; } if (isRelExprOneOf(Expr)) { if (Config->Shared) { if (InX::Got->addDynTlsEntry(Body)) { uint64_t Off = InX::Got->getGlobalDynOffset(Body); In::RelaDyn->addReloc( {Target->TlsModuleIndexRel, InX::Got, Off, false, &Body, 0}); // If the symbol is preemptible we need the dynamic linker to write // the offset too. uint64_t OffsetOff = Off + Config->Wordsize; if (IsPreemptible) In::RelaDyn->addReloc( {Target->TlsOffsetRel, InX::Got, OffsetOff, false, &Body, 0}); else InX::Got->Relocations.push_back( {R_ABS, Target->TlsOffsetRel, OffsetOff, 0, &Body}); } C.Relocations.push_back({Expr, Type, Offset, Addend, &Body}); return 1; } // Global-Dynamic relocs can be relaxed to Initial-Exec or Local-Exec // depending on the symbol being locally defined or not. if (IsPreemptible) { C.Relocations.push_back( {Target->adjustRelaxExpr(Type, nullptr, R_RELAX_TLS_GD_TO_IE), Type, Offset, Addend, &Body}); if (!Body.isInGot()) { InX::Got->addEntry(Body); In::RelaDyn->addReloc({Target->TlsGotRel, InX::Got, Body.getGotOffset(), false, &Body, 0}); } } else { C.Relocations.push_back( {Target->adjustRelaxExpr(Type, nullptr, R_RELAX_TLS_GD_TO_LE), Type, Offset, Addend, &Body}); } return Target->TlsGdRelaxSkip; } // Initial-Exec relocs can be relaxed to Local-Exec if the symbol is locally // defined. if (isRelExprOneOf(Expr) && !Config->Shared && !IsPreemptible) { C.Relocations.push_back( {R_RELAX_TLS_IE_TO_LE, Type, Offset, Addend, &Body}); return 1; } if (Expr == R_TLSDESC_CALL) return 1; return 0; } static uint32_t getMipsPairType(uint32_t Type, const SymbolBody &Sym) { switch (Type) { case R_MIPS_HI16: return R_MIPS_LO16; case R_MIPS_GOT16: return Sym.isLocal() ? R_MIPS_LO16 : R_MIPS_NONE; case R_MIPS_PCHI16: return R_MIPS_PCLO16; case R_MICROMIPS_HI16: return R_MICROMIPS_LO16; default: return R_MIPS_NONE; } } // True if non-preemptable symbol always has the same value regardless of where // the DSO is loaded. static bool isAbsolute(const SymbolBody &Body) { if (Body.isUndefined()) return !Body.isLocal() && Body.symbol()->isWeak(); if (const auto *DR = dyn_cast(&Body)) return DR->Section == nullptr; // Absolute symbol. return false; } static bool isAbsoluteValue(const SymbolBody &Body) { return isAbsolute(Body) || Body.isTls(); } // Returns true if Expr refers a PLT entry. static bool needsPlt(RelExpr Expr) { return isRelExprOneOf(Expr); } // Returns true if Expr refers a GOT entry. Note that this function // returns false for TLS variables even though they need GOT, because // TLS variables uses GOT differently than the regular variables. static bool needsGot(RelExpr Expr) { return isRelExprOneOf(Expr); } // True if this expression is of the form Sym - X, where X is a position in the // file (PC, or GOT for example). static bool isRelExpr(RelExpr Expr) { return isRelExprOneOf(Expr); } // Returns true if a given relocation can be computed at link-time. // // For instance, we know the offset from a relocation to its target at // link-time if the relocation is PC-relative and refers a // non-interposable function in the same executable. This function // will return true for such relocation. // // If this function returns false, that means we need to emit a // dynamic relocation so that the relocation will be fixed at load-time. template static bool isStaticLinkTimeConstant(RelExpr E, uint32_t Type, const SymbolBody &Body, InputSectionBase &S, uint64_t RelOff) { // These expressions always compute a constant if (isRelExprOneOf(E)) return true; // These never do, except if the entire file is position dependent or if // only the low bits are used. if (E == R_GOT || E == R_PLT || E == R_TLSDESC) return Target->usesOnlyLowPageBits(Type) || !Config->Pic; if (isPreemptible(Body, Type)) return false; if (!Config->Pic) return true; // For the target and the relocation, we want to know if they are // absolute or relative. bool AbsVal = isAbsoluteValue(Body); bool RelE = isRelExpr(E); if (AbsVal && !RelE) return true; if (!AbsVal && RelE) return true; if (!AbsVal && !RelE) return Target->usesOnlyLowPageBits(Type); // Relative relocation to an absolute value. This is normally unrepresentable, // but if the relocation refers to a weak undefined symbol, we allow it to // resolve to the image base. This is a little strange, but it allows us to // link function calls to such symbols. Normally such a call will be guarded // with a comparison, which will load a zero from the GOT. // Another special case is MIPS _gp_disp symbol which represents offset // between start of a function and '_gp' value and defined as absolute just // to simplify the code. assert(AbsVal && RelE); if (Body.isUndefined() && !Body.isLocal() && Body.symbol()->isWeak()) return true; error("relocation " + toString(Type) + " cannot refer to absolute symbol: " + toString(Body) + getLocation(S, Body, RelOff)); return true; } static RelExpr toPlt(RelExpr Expr) { if (Expr == R_PPC_OPD) return R_PPC_PLT_OPD; if (Expr == R_PC) return R_PLT_PC; if (Expr == R_PAGE_PC) return R_PLT_PAGE_PC; if (Expr == R_ABS) return R_PLT; return Expr; } static RelExpr fromPlt(RelExpr Expr) { // We decided not to use a plt. Optimize a reference to the plt to a // reference to the symbol itself. if (Expr == R_PLT_PC) return R_PC; if (Expr == R_PPC_PLT_OPD) return R_PPC_OPD; if (Expr == R_PLT) return R_ABS; return Expr; } // Returns true if a given shared symbol is in a read-only segment in a DSO. template static bool isReadOnly(SharedSymbol *SS) { typedef typename ELFT::Phdr Elf_Phdr; uint64_t Value = SS->getValue(); // Determine if the symbol is read-only by scanning the DSO's program headers. auto *File = cast>(SS->File); for (const Elf_Phdr &Phdr : check(File->getObj().program_headers())) if ((Phdr.p_type == ELF::PT_LOAD || Phdr.p_type == ELF::PT_GNU_RELRO) && !(Phdr.p_flags & ELF::PF_W) && Value >= Phdr.p_vaddr && Value < Phdr.p_vaddr + Phdr.p_memsz) return true; return false; } // Returns symbols at the same offset as a given symbol, including SS itself. // // If two or more symbols are at the same offset, and at least one of // them are copied by a copy relocation, all of them need to be copied. // Otherwise, they would refer different places at runtime. template static std::vector getSymbolsAt(SharedSymbol *SS) { typedef typename ELFT::Sym Elf_Sym; auto *File = cast>(SS->File); uint64_t Shndx = SS->getShndx(); uint64_t Value = SS->getValue(); std::vector Ret; for (const Elf_Sym &S : File->getGlobalSymbols()) { if (S.st_shndx != Shndx || S.st_value != Value) continue; StringRef Name = check(S.getName(File->getStringTable())); SymbolBody *Sym = Symtab::X->find(Name); if (auto *Alias = dyn_cast_or_null(Sym)) Ret.push_back(Alias); } return Ret; } // Reserve space in .bss or .bss.rel.ro for copy relocation. // // The copy relocation is pretty much a hack. If you use a copy relocation // in your program, not only the symbol name but the symbol's size, RW/RO // bit and alignment become part of the ABI. In addition to that, if the // symbol has aliases, the aliases become part of the ABI. That's subtle, // but if you violate that implicit ABI, that can cause very counter- // intuitive consequences. // // So, what is the copy relocation? It's for linking non-position // independent code to DSOs. In an ideal world, all references to data // exported by DSOs should go indirectly through GOT. But if object files // are compiled as non-PIC, all data references are direct. There is no // way for the linker to transform the code to use GOT, as machine // instructions are already set in stone in object files. This is where // the copy relocation takes a role. // // A copy relocation instructs the dynamic linker to copy data from a DSO // to a specified address (which is usually in .bss) at load-time. If the // static linker (that's us) finds a direct data reference to a DSO // symbol, it creates a copy relocation, so that the symbol can be // resolved as if it were in .bss rather than in a DSO. // // As you can see in this function, we create a copy relocation for the // dynamic linker, and the relocation contains not only symbol name but // various other informtion about the symbol. So, such attributes become a // part of the ABI. // // Note for application developers: I can give you a piece of advice if // you are writing a shared library. You probably should export only // functions from your library. You shouldn't export variables. // // As an example what can happen when you export variables without knowing // the semantics of copy relocations, assume that you have an exported // variable of type T. It is an ABI-breaking change to add new members at // end of T even though doing that doesn't change the layout of the // existing members. That's because the space for the new members are not // reserved in .bss unless you recompile the main program. That means they // are likely to overlap with other data that happens to be laid out next // to the variable in .bss. This kind of issue is sometimes very hard to // debug. What's a solution? Instead of exporting a varaible V from a DSO, // define an accessor getV(). template static void addCopyRelSymbol(SharedSymbol *SS) { // Copy relocation against zero-sized symbol doesn't make sense. uint64_t SymSize = SS->template getSize(); if (SymSize == 0) fatal("cannot create a copy relocation for symbol " + toString(*SS)); // See if this symbol is in a read-only segment. If so, preserve the symbol's // memory protection by reserving space in the .bss.rel.ro section. bool IsReadOnly = isReadOnly(SS); BssSection *Sec = IsReadOnly ? InX::BssRelRo : InX::Bss; uint64_t Off = Sec->reserveSpace(SymSize, SS->getAlignment()); // Look through the DSO's dynamic symbol table for aliases and create a // dynamic symbol for each one. This causes the copy relocation to correctly // interpose any aliases. for (SharedSymbol *Sym : getSymbolsAt(SS)) { Sym->NeedsCopy = true; Sym->CopyRelSec = Sec; Sym->CopyRelSecOff = Off; Sym->symbol()->IsUsedInRegularObj = true; } In::RelaDyn->addReloc({Target->CopyRel, Sec, Off, false, SS, 0}); } template static RelExpr adjustExpr(SymbolBody &Body, RelExpr Expr, uint32_t Type, const uint8_t *Data, InputSectionBase &S, typename ELFT::uint RelOff) { if (Body.isGnuIFunc()) { Expr = toPlt(Expr); } else if (!isPreemptible(Body, Type)) { if (needsPlt(Expr)) Expr = fromPlt(Expr); if (Expr == R_GOT_PC && !isAbsoluteValue(Body)) Expr = Target->adjustRelaxExpr(Type, Data, Expr); } bool IsWrite = !Config->ZText || (S.Flags & SHF_WRITE); if (IsWrite || isStaticLinkTimeConstant(Expr, Type, Body, S, RelOff)) return Expr; // This relocation would require the dynamic linker to write a value to read // only memory. We can hack around it if we are producing an executable and // the refered symbol can be preemepted to refer to the executable. if (Config->Shared || (Config->Pic && !isRelExpr(Expr))) { error("can't create dynamic relocation " + toString(Type) + " against " + (Body.getName().empty() ? "local symbol in readonly segment" : "symbol: " + toString(Body)) + getLocation(S, Body, RelOff)); return Expr; } if (Body.getVisibility() != STV_DEFAULT) { error("cannot preempt symbol: " + toString(Body) + getLocation(S, Body, RelOff)); return Expr; } if (Body.isObject()) { // Produce a copy relocation. auto *B = cast(&Body); if (!B->NeedsCopy) { if (Config->ZNocopyreloc) error("unresolvable relocation " + toString(Type) + " against symbol '" + toString(*B) + "'; recompile with -fPIC or remove '-z nocopyreloc'" + getLocation(S, Body, RelOff)); addCopyRelSymbol(B); } return Expr; } if (Body.isFunc()) { // This handles a non PIC program call to function in a shared library. In // an ideal world, we could just report an error saying the relocation can // overflow at runtime. In the real world with glibc, crt1.o has a // R_X86_64_PC32 pointing to libc.so. // // The general idea on how to handle such cases is to create a PLT entry and // use that as the function value. // // For the static linking part, we just return a plt expr and everything // else will use the the PLT entry as the address. // // The remaining problem is making sure pointer equality still works. We // need the help of the dynamic linker for that. We let it know that we have // a direct reference to a so symbol by creating an undefined symbol with a // non zero st_value. Seeing that, the dynamic linker resolves the symbol to // the value of the symbol we created. This is true even for got entries, so // pointer equality is maintained. To avoid an infinite loop, the only entry // that points to the real function is a dedicated got entry used by the // plt. That is identified by special relocation types (R_X86_64_JUMP_SLOT, // R_386_JMP_SLOT, etc). Body.NeedsPltAddr = true; return toPlt(Expr); } error("symbol '" + toString(Body) + "' defined in " + toString(Body.File) + " has no type"); return Expr; } // Returns an addend of a given relocation. If it is RELA, an addend // is in a relocation itself. If it is REL, we need to read it from an // input section. template static int64_t computeAddend(const RelTy &Rel, const uint8_t *Buf) { uint32_t Type = Rel.getType(Config->IsMips64EL); int64_t A = RelTy::IsRela ? getAddend(Rel) : Target->getImplicitAddend(Buf + Rel.r_offset, Type); if (Config->EMachine == EM_PPC64 && Config->Pic && Type == R_PPC64_TOC) A += getPPC64TocBase(); return A; } // MIPS has an odd notion of "paired" relocations to calculate addends. // For example, if a relocation is of R_MIPS_HI16, there must be a // R_MIPS_LO16 relocation after that, and an addend is calculated using // the two relocations. template static int64_t computeMipsAddend(const RelTy &Rel, InputSectionBase &Sec, RelExpr Expr, SymbolBody &Body, const RelTy *End) { if (Expr == R_MIPS_GOTREL && Body.isLocal()) return Sec.getFile()->MipsGp0; // The ABI says that the paired relocation is used only for REL. // See p. 4-17 at ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf if (RelTy::IsRela) return 0; uint32_t Type = Rel.getType(Config->IsMips64EL); uint32_t PairTy = getMipsPairType(Type, Body); if (PairTy == R_MIPS_NONE) return 0; const uint8_t *Buf = Sec.Data.data(); uint32_t SymIndex = Rel.getSymbol(Config->IsMips64EL); // To make things worse, paired relocations might not be contiguous in // the relocation table, so we need to do linear search. *sigh* for (const RelTy *RI = &Rel; RI != End; ++RI) { if (RI->getType(Config->IsMips64EL) != PairTy) continue; if (RI->getSymbol(Config->IsMips64EL) != SymIndex) continue; endianness E = Config->Endianness; int32_t Hi = (read32(Buf + Rel.r_offset, E) & 0xffff) << 16; int32_t Lo = SignExtend32<16>(read32(Buf + RI->r_offset, E)); return Hi + Lo; } warn("can't find matching " + toString(PairTy) + " relocation for " + toString(Type)); return 0; } template static void reportUndefined(SymbolBody &Sym, InputSectionBase &S, uint64_t Offset) { if (Config->UnresolvedSymbols == UnresolvedPolicy::IgnoreAll) return; bool CanBeExternal = Sym.symbol()->computeBinding() != STB_LOCAL && Sym.getVisibility() == STV_DEFAULT; if (Config->UnresolvedSymbols == UnresolvedPolicy::Ignore && CanBeExternal) return; std::string Msg = "undefined symbol: " + toString(Sym) + "\n>>> referenced by "; std::string Src = S.getSrcMsg(Offset); if (!Src.empty()) Msg += Src + "\n>>> "; Msg += S.getObjMsg(Offset); if (Config->UnresolvedSymbols == UnresolvedPolicy::WarnAll || (Config->UnresolvedSymbols == UnresolvedPolicy::Warn && CanBeExternal)) { warn(Msg); } else { error(Msg); } } template static std::pair mergeMipsN32RelTypes(uint32_t Type, uint32_t Offset, RelTy *I, RelTy *E) { // MIPS N32 ABI treats series of successive relocations with the same offset // as a single relocation. The similar approach used by N64 ABI, but this ABI // packs all relocations into the single relocation record. Here we emulate // this for the N32 ABI. Iterate over relocation with the same offset and put // theirs types into the single bit-set. uint32_t Processed = 0; for (; I != E && Offset == I->r_offset; ++I) { ++Processed; Type |= I->getType(Config->IsMips64EL) << (8 * Processed); } return std::make_pair(Type, Processed); } // .eh_frame sections are mergeable input sections, so their input // offsets are not linearly mapped to output section. For each input // offset, we need to find a section piece containing the offset and // add the piece's base address to the input offset to compute the // output offset. That isn't cheap. // // This class is to speed up the offset computation. When we process // relocations, we access offsets in the monotonically increasing // order. So we can optimize for that access pattern. // // For sections other than .eh_frame, this class doesn't do anything. namespace { class OffsetGetter { public: explicit OffsetGetter(InputSectionBase &Sec) { if (auto *Eh = dyn_cast(&Sec)) { P = Eh->Pieces; Size = Eh->Pieces.size(); } } // Translates offsets in input sections to offsets in output sections. // Given offset must increase monotonically. We assume that P is // sorted by InputOff. uint64_t get(uint64_t Off) { if (P.empty()) return Off; while (I != Size && P[I].InputOff + P[I].size() <= Off) ++I; if (I == Size) return Off; // P must be contiguous, so there must be no holes in between. assert(P[I].InputOff <= Off && "Relocation not in any piece"); // Offset -1 means that the piece is dead (i.e. garbage collected). if (P[I].OutputOff == -1) return -1; return P[I].OutputOff + Off - P[I].InputOff; } private: ArrayRef P; size_t I = 0; size_t Size; }; } // namespace template static void addPltEntry(PltSection *Plt, GotPltSection *GotPlt, RelocationSection *Rel, uint32_t Type, SymbolBody &Sym, bool UseSymVA) { Plt->addEntry(Sym); GotPlt->addEntry(Sym); Rel->addReloc({Type, GotPlt, Sym.getGotPltOffset(), UseSymVA, &Sym, 0}); } template static void addGotEntry(SymbolBody &Sym, bool Preemptible) { InX::Got->addEntry(Sym); uint64_t Off = Sym.getGotOffset(); uint32_t DynType; RelExpr Expr = R_ABS; if (Sym.isTls()) { DynType = Target->TlsGotRel; Expr = R_TLS; } else if (!Preemptible && Config->Pic && !isAbsolute(Sym)) { DynType = Target->RelativeRel; } else { DynType = Target->GotRel; } bool Constant = !Preemptible && !(Config->Pic && !isAbsolute(Sym)); if (!Constant) In::RelaDyn->addReloc( {DynType, InX::Got, Off, !Preemptible, &Sym, 0}); if (Constant || (!Config->IsRela && !Preemptible)) InX::Got->Relocations.push_back({Expr, DynType, Off, 0, &Sym}); } // The reason we have to do this early scan is as follows // * To mmap the output file, we need to know the size // * For that, we need to know how many dynamic relocs we will have. // It might be possible to avoid this by outputting the file with write: // * Write the allocated output sections, computing addresses. // * Apply relocations, recording which ones require a dynamic reloc. // * Write the dynamic relocations. // * Write the rest of the file. // This would have some drawbacks. For example, we would only know if .rela.dyn // is needed after applying relocations. If it is, it will go after rw and rx // sections. Given that it is ro, we will need an extra PT_LOAD. This // complicates things for the dynamic linker and means we would have to reserve // space for the extra PT_LOAD even if we end up not using it. template static void scanRelocs(InputSectionBase &Sec, ArrayRef Rels) { OffsetGetter GetOffset(Sec); for (auto I = Rels.begin(), End = Rels.end(); I != End; ++I) { const RelTy &Rel = *I; SymbolBody &Body = Sec.getFile()->getRelocTargetSym(Rel); uint32_t Type = Rel.getType(Config->IsMips64EL); if (Config->MipsN32Abi) { uint32_t Processed; std::tie(Type, Processed) = mergeMipsN32RelTypes(Type, Rel.r_offset, I + 1, End); I += Processed; } // Compute the offset of this section in the output section. uint64_t Offset = GetOffset.get(Rel.r_offset); if (Offset == uint64_t(-1)) continue; // Report undefined symbols. The fact that we report undefined // symbols here means that we report undefined symbols only when // they have relocations pointing to them. We don't care about // undefined symbols that are in dead-stripped sections. if (!Body.isLocal() && Body.isUndefined() && !Body.symbol()->isWeak()) reportUndefined(Body, Sec, Rel.r_offset); RelExpr Expr = Target->getRelExpr(Type, Body, Sec.Data.begin() + Rel.r_offset); // Ignore "hint" relocations because they are only markers for relaxation. if (isRelExprOneOf(Expr)) continue; bool Preemptible = isPreemptible(Body, Type); Expr = adjustExpr(Body, Expr, Type, Sec.Data.data() + Rel.r_offset, Sec, Rel.r_offset); if (ErrorCount) continue; // This relocation does not require got entry, but it is relative to got and // needs it to be created. Here we request for that. if (isRelExprOneOf(Expr)) InX::Got->HasGotOffRel = true; // Read an addend. int64_t Addend = computeAddend(Rel, Sec.Data.data()); if (Config->EMachine == EM_MIPS) Addend += computeMipsAddend(Rel, Sec, Expr, Body, End); // Process some TLS relocations, including relaxing TLS relocations. // Note that this function does not handle all TLS relocations. if (unsigned Processed = handleTlsRelocation(Type, Body, Sec, Offset, Addend, Expr)) { I += (Processed - 1); continue; } // If a relocation needs PLT, we create PLT and GOTPLT slots for the symbol. if (needsPlt(Expr) && !Body.isInPlt()) { if (Body.isGnuIFunc() && !Preemptible) addPltEntry(InX::Iplt, InX::IgotPlt, In::RelaIplt, Target->IRelativeRel, Body, true); else addPltEntry(InX::Plt, InX::GotPlt, In::RelaPlt, Target->PltRel, Body, !Preemptible); } // Create a GOT slot if a relocation needs GOT. if (needsGot(Expr)) { if (Config->EMachine == EM_MIPS) { // MIPS ABI has special rules to process GOT entries and doesn't // require relocation entries for them. A special case is TLS // relocations. In that case dynamic loader applies dynamic // relocations to initialize TLS GOT entries. // See "Global Offset Table" in Chapter 5 in the following document // for detailed description: // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf InX::MipsGot->addEntry(Body, Addend, Expr); if (Body.isTls() && Body.isPreemptible()) In::RelaDyn->addReloc({Target->TlsGotRel, InX::MipsGot, Body.getGotOffset(), false, &Body, 0}); } else if (!Body.isInGot()) { addGotEntry(Body, Preemptible); } } if (!needsPlt(Expr) && !needsGot(Expr) && isPreemptible(Body, Type)) { // We don't know anything about the finaly symbol. Just ask the dynamic // linker to handle the relocation for us. if (!Target->isPicRel(Type)) error("relocation " + toString(Type) + " cannot be used against shared object; recompile with -fPIC" + getLocation(Sec, Body, Offset)); In::RelaDyn->addReloc( {Target->getDynRel(Type), &Sec, Offset, false, &Body, Addend}); // MIPS ABI turns using of GOT and dynamic relocations inside out. // While regular ABI uses dynamic relocations to fill up GOT entries // MIPS ABI requires dynamic linker to fills up GOT entries using // specially sorted dynamic symbol table. This affects even dynamic // relocations against symbols which do not require GOT entries // creation explicitly, i.e. do not have any GOT-relocations. So if // a preemptible symbol has a dynamic relocation we anyway have // to create a GOT entry for it. // If a non-preemptible symbol has a dynamic relocation against it, // dynamic linker takes it st_value, adds offset and writes down // result of the dynamic relocation. In case of preemptible symbol // dynamic linker performs symbol resolution, writes the symbol value // to the GOT entry and reads the GOT entry when it needs to perform // a dynamic relocation. // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf p.4-19 if (Config->EMachine == EM_MIPS) InX::MipsGot->addEntry(Body, Addend, Expr); continue; } // If the relocation points to something in the file, we can process it. bool IsConstant = isStaticLinkTimeConstant(Expr, Type, Body, Sec, Rel.r_offset); // If the output being produced is position independent, the final value // is still not known. In that case we still need some help from the // dynamic linker. We can however do better than just copying the incoming // relocation. We can process some of it and and just ask the dynamic // linker to add the load address. if (!IsConstant) In::RelaDyn->addReloc( {Target->RelativeRel, &Sec, Offset, true, &Body, Addend}); // If the produced value is a constant, we just remember to write it // when outputting this section. We also have to do it if the format // uses Elf_Rel, since in that case the written value is the addend. if (IsConstant || !RelTy::IsRela) Sec.Relocations.push_back({Expr, Type, Offset, Addend, &Body}); } } template void elf::scanRelocations(InputSectionBase &S) { if (S.AreRelocsRela) scanRelocs(S, S.relas()); else scanRelocs(S, S.rels()); } // Insert the Thunks for OutputSection OS into their designated place // in the Sections vector, and recalculate the InputSection output section // offsets. // This may invalidate any output section offsets stored outside of InputSection -template -void ThunkCreator::mergeThunks(OutputSection *OS, - std::vector &Thunks) { +void ThunkCreator::mergeThunks(OutputSection *OS, + std::vector &Thunks) { // Order Thunks in ascending OutSecOff auto ThunkCmp = [](const ThunkSection *A, const ThunkSection *B) { return A->OutSecOff < B->OutSecOff; }; std::stable_sort(Thunks.begin(), Thunks.end(), ThunkCmp); // Merge sorted vectors of Thunks and InputSections by OutSecOff std::vector Tmp; Tmp.reserve(OS->Sections.size() + Thunks.size()); auto MergeCmp = [](const InputSection *A, const InputSection *B) { // std::merge requires a strict weak ordering. if (A->OutSecOff < B->OutSecOff) return true; if (A->OutSecOff == B->OutSecOff) // Check if Thunk is immediately before any specific Target InputSection // for example Mips LA25 Thunks. if (auto *TA = dyn_cast(A)) if (TA && TA->getTargetInputSection() == B) return true; return false; }; std::merge(OS->Sections.begin(), OS->Sections.end(), Thunks.begin(), Thunks.end(), std::back_inserter(Tmp), MergeCmp); OS->Sections = std::move(Tmp); OS->assignOffsets(); } -template -ThunkSection *ThunkCreator::getOSThunkSec(ThunkSection *&TS, - OutputSection *OS) { +ThunkSection *ThunkCreator::getOSThunkSec(ThunkSection *&TS, + OutputSection *OS) { if (TS == nullptr) { uint32_t Off = 0; for (auto *IS : OS->Sections) { Off = IS->OutSecOff + IS->getSize(); if ((IS->Flags & SHF_EXECINSTR) == 0) break; } TS = make(OS, Off); ThunkSections[OS].push_back(TS); } return TS; } -template -ThunkSection *ThunkCreator::getISThunkSec(InputSection *IS, - OutputSection *OS) { +ThunkSection *ThunkCreator::getISThunkSec(InputSection *IS, OutputSection *OS) { ThunkSection *TS = ThunkedSections.lookup(IS); if (TS) return TS; auto *TOS = cast(IS->OutSec); TS = make(TOS, IS->OutSecOff); ThunkSections[TOS].push_back(TS); ThunkedSections[IS] = TS; return TS; } -template -std::pair ThunkCreator::getThunk(SymbolBody &Body, - uint32_t Type) { +std::pair ThunkCreator::getThunk(SymbolBody &Body, + uint32_t Type) { auto res = ThunkedSymbols.insert({&Body, nullptr}); if (res.second) - res.first->second = addThunk(Type, Body); + res.first->second = addThunk(Type, Body); return std::make_pair(res.first->second, res.second); } // Process all relocations from the InputSections that have been assigned // to OutputSections and redirect through Thunks if needed. // // createThunks must be called after scanRelocs has created the Relocations for // each InputSection. It must be called before the static symbol table is // finalized. If any Thunks are added to an OutputSection the output section // offsets of the InputSections will change. // // FIXME: All Thunks are assumed to be in range of the relocation. Range // extension Thunks are not yet supported. -template -bool ThunkCreator::createThunks( - ArrayRef OutputSections) { +bool ThunkCreator::createThunks(ArrayRef OutputSections) { // Create all the Thunks and insert them into synthetic ThunkSections. The // ThunkSections are later inserted back into the OutputSection. // We separate the creation of ThunkSections from the insertion of the // ThunkSections back into the OutputSection as ThunkSections are not always // inserted into the same OutputSection as the caller. for (OutputSection *OS : OutputSections) { ThunkSection *OSTS = nullptr; for (InputSection *IS : OS->Sections) { for (Relocation &Rel : IS->Relocations) { SymbolBody &Body = *Rel.Sym; if (!Target->needsThunk(Rel.Expr, Rel.Type, IS->File, Body)) continue; Thunk *T; bool IsNew; std::tie(T, IsNew) = getThunk(Body, Rel.Type); if (IsNew) { // Find or create a ThunkSection for the new Thunk ThunkSection *TS; if (auto *TIS = T->getTargetInputSection()) TS = getISThunkSec(TIS, OS); else TS = getOSThunkSec(OSTS, OS); TS->addThunk(T); } // Redirect relocation to Thunk, we never go via the PLT to a Thunk Rel.Sym = T->ThunkSym; Rel.Expr = fromPlt(Rel.Expr); } } } // Merge all created synthetic ThunkSections back into OutputSection for (auto &KV : ThunkSections) mergeThunks(KV.first, KV.second); return !ThunkSections.empty(); } template void elf::scanRelocations(InputSectionBase &); template void elf::scanRelocations(InputSectionBase &); template void elf::scanRelocations(InputSectionBase &); template void elf::scanRelocations(InputSectionBase &); - -template class elf::ThunkCreator; -template class elf::ThunkCreator; -template class elf::ThunkCreator; -template class elf::ThunkCreator; Index: vendor/lld/dist/ELF/Relocations.h =================================================================== --- vendor/lld/dist/ELF/Relocations.h (revision 318421) +++ vendor/lld/dist/ELF/Relocations.h (revision 318422) @@ -1,156 +1,156 @@ //===- Relocations.h -------------------------------------------*- C++ -*-===// // // The LLVM Linker // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// #ifndef LLD_ELF_RELOCATIONS_H #define LLD_ELF_RELOCATIONS_H #include "lld/Core/LLVM.h" #include "llvm/ADT/DenseMap.h" #include #include namespace lld { namespace elf { class SymbolBody; class InputSection; class InputSectionBase; class OutputSection; // List of target-independent relocation types. Relocations read // from files are converted to these types so that the main code // doesn't have to know about architecture-specific details. enum RelExpr { R_ABS, R_GOT, R_GOTONLY_PC, R_GOTONLY_PC_FROM_END, R_GOTREL, R_GOTREL_FROM_END, R_GOT_FROM_END, R_GOT_OFF, R_GOT_PAGE_PC, R_GOT_PC, R_HINT, R_MIPS_GOTREL, R_MIPS_GOT_GP, R_MIPS_GOT_GP_PC, R_MIPS_GOT_LOCAL_PAGE, R_MIPS_GOT_OFF, R_MIPS_GOT_OFF32, R_MIPS_TLSGD, R_MIPS_TLSLD, R_NEG_TLS, R_NONE, R_PAGE_PC, R_PC, R_PLT, R_PLT_PAGE_PC, R_PLT_PC, R_PPC_OPD, R_PPC_PLT_OPD, R_PPC_TOC, R_RELAX_GOT_PC, R_RELAX_GOT_PC_NOPIC, R_RELAX_TLS_GD_TO_IE, R_RELAX_TLS_GD_TO_IE_ABS, R_RELAX_TLS_GD_TO_IE_END, R_RELAX_TLS_GD_TO_IE_PAGE_PC, R_RELAX_TLS_GD_TO_LE, R_RELAX_TLS_GD_TO_LE_NEG, R_RELAX_TLS_IE_TO_LE, R_RELAX_TLS_LD_TO_LE, R_SIZE, R_TLS, R_TLSDESC, R_TLSDESC_CALL, R_TLSDESC_PAGE, R_TLSGD, R_TLSGD_PC, R_TLSLD, R_TLSLD_PC, }; // Build a bitmask with one bit set for each RelExpr. // // Constexpr function arguments can't be used in static asserts, so we // use template arguments to build the mask. // But function template partial specializations don't exist (needed // for base case of the recursion), so we need a dummy struct. template struct RelExprMaskBuilder { static inline uint64_t build() { return 0; } }; // Specialization for recursive case. template struct RelExprMaskBuilder { static inline uint64_t build() { static_assert(0 <= Head && Head < 64, "RelExpr is too large for 64-bit mask!"); return (uint64_t(1) << Head) | RelExprMaskBuilder::build(); } }; // Return true if `Expr` is one of `Exprs`. // There are fewer than 64 RelExpr's, so we can represent any set of // RelExpr's as a constant bit mask and test for membership with a // couple cheap bitwise operations. template bool isRelExprOneOf(RelExpr Expr) { assert(0 <= Expr && (int)Expr < 64 && "RelExpr is too large for 64-bit mask!"); return (uint64_t(1) << Expr) & RelExprMaskBuilder::build(); } // Architecture-neutral representation of relocation. struct Relocation { RelExpr Expr; uint32_t Type; uint64_t Offset; int64_t Addend; SymbolBody *Sym; }; template void scanRelocations(InputSectionBase &); class ThunkSection; class Thunk; -template class ThunkCreator { +class ThunkCreator { public: // Return true if Thunks have been added to OutputSections bool createThunks(ArrayRef OutputSections); private: void mergeThunks(OutputSection *OS, std::vector &Thunks); ThunkSection *getOSThunkSec(ThunkSection *&TS, OutputSection *OS); ThunkSection *getISThunkSec(InputSection *IS, OutputSection *OS); std::pair getThunk(SymbolBody &Body, uint32_t Type); // Track Symbols that already have a Thunk llvm::DenseMap ThunkedSymbols; // Track InputSections that have a ThunkSection placed in front llvm::DenseMap ThunkedSections; // Track the ThunksSections that need to be inserted into an OutputSection std::map> ThunkSections; }; // Return a int64_t to make sure we get the sign extension out of the way as // early as possible. template static inline int64_t getAddend(const typename ELFT::Rel &Rel) { return 0; } template static inline int64_t getAddend(const typename ELFT::Rela &Rel) { return Rel.r_addend; } } } #endif Index: vendor/lld/dist/ELF/Thunks.cpp =================================================================== --- vendor/lld/dist/ELF/Thunks.cpp (revision 318421) +++ vendor/lld/dist/ELF/Thunks.cpp (revision 318422) @@ -1,269 +1,253 @@ //===- Thunks.cpp --------------------------------------------------------===// // // The LLVM Linker // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===---------------------------------------------------------------------===// // // This file contains Thunk subclasses. // // A thunk is a small piece of code written after an input section // which is used to jump between "incompatible" functions // such as MIPS PIC and non-PIC or ARM non-Thumb and Thumb functions. // // If a jump target is too far and its address doesn't fit to a // short jump instruction, we need to create a thunk too, but we // haven't supported it yet. // // i386 and x86-64 don't need thunks. // //===---------------------------------------------------------------------===// #include "Thunks.h" #include "Config.h" #include "Error.h" #include "InputSection.h" #include "Memory.h" #include "OutputSections.h" #include "Symbols.h" #include "SyntheticSections.h" #include "Target.h" #include "llvm/Support/Casting.h" #include "llvm/Support/ELF.h" #include "llvm/Support/Endian.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/MathExtras.h" #include #include using namespace llvm; using namespace llvm::object; using namespace llvm::support::endian; using namespace llvm::ELF; namespace lld { namespace elf { namespace { // Specific ARM Thunk implementations. The naming convention is: // Source State, TargetState, Target Requirement, ABS or PI, Range -template class ARMV7ABSLongThunk final : public Thunk { +class ARMV7ABSLongThunk final : public Thunk { public: ARMV7ABSLongThunk(const SymbolBody &Dest) : Thunk(Dest) {} uint32_t size() const override { return 12; } void writeTo(uint8_t *Buf, ThunkSection &IS) const override; void addSymbols(ThunkSection &IS) override; }; -template class ARMV7PILongThunk final : public Thunk { +class ARMV7PILongThunk final : public Thunk { public: ARMV7PILongThunk(const SymbolBody &Dest) : Thunk(Dest) {} uint32_t size() const override { return 16; } void writeTo(uint8_t *Buf, ThunkSection &IS) const override; void addSymbols(ThunkSection &IS) override; }; -template class ThumbV7ABSLongThunk final : public Thunk { +class ThumbV7ABSLongThunk final : public Thunk { public: ThumbV7ABSLongThunk(const SymbolBody &Dest) : Thunk(Dest) { this->alignment = 2; } uint32_t size() const override { return 10; } void writeTo(uint8_t *Buf, ThunkSection &IS) const override; void addSymbols(ThunkSection &IS) override; }; -template class ThumbV7PILongThunk final : public Thunk { +class ThumbV7PILongThunk final : public Thunk { public: ThumbV7PILongThunk(const SymbolBody &Dest) : Thunk(Dest) { this->alignment = 2; } uint32_t size() const override { return 12; } void writeTo(uint8_t *Buf, ThunkSection &IS) const override; void addSymbols(ThunkSection &IS) override; }; // MIPS LA25 thunk -template class MipsThunk final : public Thunk { +class MipsThunk final : public Thunk { public: MipsThunk(const SymbolBody &Dest) : Thunk(Dest) {} uint32_t size() const override { return 16; } void writeTo(uint8_t *Buf, ThunkSection &IS) const override; void addSymbols(ThunkSection &IS) override; InputSection *getTargetInputSection() const override; }; } // end anonymous namespace // ARM Target Thunks static uint64_t getARMThunkDestVA(const SymbolBody &S) { uint64_t V = S.isInPlt() ? S.getPltVA() : S.getVA(); return SignExtend64<32>(V); } -template -void ARMV7ABSLongThunk::writeTo(uint8_t *Buf, ThunkSection &IS) const { +void ARMV7ABSLongThunk::writeTo(uint8_t *Buf, ThunkSection &IS) const { const uint8_t Data[] = { 0x00, 0xc0, 0x00, 0xe3, // movw ip,:lower16:S 0x00, 0xc0, 0x40, 0xe3, // movt ip,:upper16:S 0x1c, 0xff, 0x2f, 0xe1, // bx ip }; - uint64_t S = getARMThunkDestVA(this->Destination); + uint64_t S = getARMThunkDestVA(Destination); memcpy(Buf, Data, sizeof(Data)); Target->relocateOne(Buf, R_ARM_MOVW_ABS_NC, S); Target->relocateOne(Buf + 4, R_ARM_MOVT_ABS, S); } -template -void ARMV7ABSLongThunk::addSymbols(ThunkSection &IS) { - this->ThunkSym = addSyntheticLocal( - Saver.save("__ARMv7ABSLongThunk_" + this->Destination.getName()), - STT_FUNC, this->Offset, size(), &IS); - addSyntheticLocal("$a", STT_NOTYPE, this->Offset, 0, &IS); +void ARMV7ABSLongThunk::addSymbols(ThunkSection &IS) { + ThunkSym = addSyntheticLocal( + Saver.save("__ARMv7ABSLongThunk_" + Destination.getName()), STT_FUNC, + Offset, size(), &IS); + addSyntheticLocal("$a", STT_NOTYPE, Offset, 0, &IS); } -template -void ThumbV7ABSLongThunk::writeTo(uint8_t *Buf, ThunkSection &IS) const { +void ThumbV7ABSLongThunk::writeTo(uint8_t *Buf, ThunkSection &IS) const { const uint8_t Data[] = { 0x40, 0xf2, 0x00, 0x0c, // movw ip, :lower16:S 0xc0, 0xf2, 0x00, 0x0c, // movt ip, :upper16:S 0x60, 0x47, // bx ip }; - uint64_t S = getARMThunkDestVA(this->Destination); + uint64_t S = getARMThunkDestVA(Destination); memcpy(Buf, Data, sizeof(Data)); Target->relocateOne(Buf, R_ARM_THM_MOVW_ABS_NC, S); Target->relocateOne(Buf + 4, R_ARM_THM_MOVT_ABS, S); } -template -void ThumbV7ABSLongThunk::addSymbols(ThunkSection &IS) { - this->ThunkSym = addSyntheticLocal( - Saver.save("__Thumbv7ABSLongThunk_" + this->Destination.getName()), - STT_FUNC, this->Offset, size(), &IS); - addSyntheticLocal("$t", STT_NOTYPE, this->Offset, 0, &IS); +void ThumbV7ABSLongThunk::addSymbols(ThunkSection &IS) { + ThunkSym = addSyntheticLocal( + Saver.save("__Thumbv7ABSLongThunk_" + Destination.getName()), STT_FUNC, + Offset, size(), &IS); + addSyntheticLocal("$t", STT_NOTYPE, Offset, 0, &IS); } -template -void ARMV7PILongThunk::writeTo(uint8_t *Buf, ThunkSection &IS) const { +void ARMV7PILongThunk::writeTo(uint8_t *Buf, ThunkSection &IS) const { const uint8_t Data[] = { 0xf0, 0xcf, 0x0f, 0xe3, // P: movw ip,:lower16:S - (P + (L1-P) +8) 0x00, 0xc0, 0x40, 0xe3, // movt ip,:upper16:S - (P + (L1-P+4) +8) 0x0f, 0xc0, 0x8c, 0xe0, // L1: add ip, ip, pc 0x1c, 0xff, 0x2f, 0xe1, // bx r12 }; - uint64_t S = getARMThunkDestVA(this->Destination); - uint64_t P = this->ThunkSym->getVA(); + uint64_t S = getARMThunkDestVA(Destination); + uint64_t P = ThunkSym->getVA(); memcpy(Buf, Data, sizeof(Data)); Target->relocateOne(Buf, R_ARM_MOVW_PREL_NC, S - P - 16); Target->relocateOne(Buf + 4, R_ARM_MOVT_PREL, S - P - 12); } -template -void ARMV7PILongThunk::addSymbols(ThunkSection &IS) { - this->ThunkSym = addSyntheticLocal( - Saver.save("__ARMV7PILongThunk_" + this->Destination.getName()), STT_FUNC, - this->Offset, size(), &IS); - addSyntheticLocal("$a", STT_NOTYPE, this->Offset, 0, &IS); +void ARMV7PILongThunk::addSymbols(ThunkSection &IS) { + ThunkSym = addSyntheticLocal( + Saver.save("__ARMV7PILongThunk_" + Destination.getName()), STT_FUNC, + Offset, size(), &IS); + addSyntheticLocal("$a", STT_NOTYPE, Offset, 0, &IS); } -template -void ThumbV7PILongThunk::writeTo(uint8_t *Buf, ThunkSection &IS) const { +void ThumbV7PILongThunk::writeTo(uint8_t *Buf, ThunkSection &IS) const { const uint8_t Data[] = { 0x4f, 0xf6, 0xf4, 0x7c, // P: movw ip,:lower16:S - (P + (L1-P) + 4) 0xc0, 0xf2, 0x00, 0x0c, // movt ip,:upper16:S - (P + (L1-P+4) + 4) 0xfc, 0x44, // L1: add r12, pc 0x60, 0x47, // bx r12 }; - uint64_t S = getARMThunkDestVA(this->Destination); - uint64_t P = this->ThunkSym->getVA(); + uint64_t S = getARMThunkDestVA(Destination); + uint64_t P = ThunkSym->getVA(); memcpy(Buf, Data, sizeof(Data)); Target->relocateOne(Buf, R_ARM_THM_MOVW_PREL_NC, S - P - 12); Target->relocateOne(Buf + 4, R_ARM_THM_MOVT_PREL, S - P - 8); } -template -void ThumbV7PILongThunk::addSymbols(ThunkSection &IS) { - this->ThunkSym = addSyntheticLocal( - Saver.save("__ThumbV7PILongThunk_" + this->Destination.getName()), - STT_FUNC, this->Offset, size(), &IS); - addSyntheticLocal("$t", STT_NOTYPE, this->Offset, 0, &IS); +void ThumbV7PILongThunk::addSymbols(ThunkSection &IS) { + ThunkSym = addSyntheticLocal( + Saver.save("__ThumbV7PILongThunk_" + Destination.getName()), STT_FUNC, + Offset, size(), &IS); + addSyntheticLocal("$t", STT_NOTYPE, Offset, 0, &IS); } // Write MIPS LA25 thunk code to call PIC function from the non-PIC one. -template -void MipsThunk::writeTo(uint8_t *Buf, ThunkSection &) const { - const endianness E = ELFT::TargetEndianness; - +void MipsThunk::writeTo(uint8_t *Buf, ThunkSection &) const { uint64_t S = this->Destination.getVA(); - write32(Buf, 0x3c190000); // lui $25, %hi(func) - write32(Buf + 4, 0x08000000 | (S >> 2)); // j func - write32(Buf + 8, 0x27390000); // addiu $25, $25, %lo(func) - write32(Buf + 12, 0x00000000); // nop + write32(Buf, 0x3c190000, Config->Endianness); // lui $25, %hi(func) + write32(Buf + 4, 0x08000000 | (S >> 2), Config->Endianness); // j func + write32(Buf + 8, 0x27390000, Config->Endianness); // addiu $25, $25, %lo(func) + write32(Buf + 12, 0x00000000, Config->Endianness); // nop Target->relocateOne(Buf, R_MIPS_HI16, S); Target->relocateOne(Buf + 8, R_MIPS_LO16, S); } -template void MipsThunk::addSymbols(ThunkSection &IS) { - this->ThunkSym = addSyntheticLocal( - Saver.save("__LA25Thunk_" + this->Destination.getName()), STT_FUNC, - this->Offset, size(), &IS); +void MipsThunk::addSymbols(ThunkSection &IS) { + ThunkSym = + addSyntheticLocal(Saver.save("__LA25Thunk_" + Destination.getName()), + STT_FUNC, Offset, size(), &IS); } -template -InputSection *MipsThunk::getTargetInputSection() const { - auto *DR = dyn_cast(&this->Destination); +InputSection *MipsThunk::getTargetInputSection() const { + auto *DR = dyn_cast(&Destination); return dyn_cast(DR->Section); } Thunk::Thunk(const SymbolBody &D) : Destination(D), Offset(0) {} Thunk::~Thunk() = default; // Creates a thunk for Thumb-ARM interworking. -template static Thunk *addThunkArm(uint32_t Reloc, SymbolBody &S) { +static Thunk *addThunkArm(uint32_t Reloc, SymbolBody &S) { // ARM relocations need ARM to Thumb interworking Thunks. // Thumb relocations need Thumb to ARM relocations. // Use position independent Thunks if we require position independent code. switch (Reloc) { case R_ARM_PC24: case R_ARM_PLT32: case R_ARM_JUMP24: if (Config->Pic) - return make>(S); - return make>(S); + return make(S); + return make(S); case R_ARM_THM_JUMP19: case R_ARM_THM_JUMP24: if (Config->Pic) - return make>(S); - return make>(S); + return make(S); + return make(S); } fatal("unrecognized relocation type"); } -template static Thunk *addThunkMips(SymbolBody &S) { - return make>(S); +static Thunk *addThunkMips(SymbolBody &S) { + return make(S); } -template Thunk *addThunk(uint32_t RelocType, SymbolBody &S) { +Thunk *addThunk(uint32_t RelocType, SymbolBody &S) { if (Config->EMachine == EM_ARM) - return addThunkArm(RelocType, S); + return addThunkArm(RelocType, S); else if (Config->EMachine == EM_MIPS) - return addThunkMips(S); + return addThunkMips(S); llvm_unreachable("add Thunk only supported for ARM and Mips"); return nullptr; } -template Thunk *addThunk(uint32_t, SymbolBody &); -template Thunk *addThunk(uint32_t, SymbolBody &); -template Thunk *addThunk(uint32_t, SymbolBody &); -template Thunk *addThunk(uint32_t, SymbolBody &); } // end namespace elf } // end namespace lld Index: vendor/lld/dist/ELF/Thunks.h =================================================================== --- vendor/lld/dist/ELF/Thunks.h (revision 318421) +++ vendor/lld/dist/ELF/Thunks.h (revision 318422) @@ -1,59 +1,59 @@ //===- Thunks.h --------------------------------------------------------===// // // The LLVM Linker // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// #ifndef LLD_ELF_THUNKS_H #define LLD_ELF_THUNKS_H #include "Relocations.h" namespace lld { namespace elf { class SymbolBody; class ThunkSection; // Class to describe an instance of a Thunk. // A Thunk is a code-sequence inserted by the linker in between a caller and // the callee. The relocation to the callee is redirected to the Thunk, which // after executing transfers control to the callee. Typical uses of Thunks // include transferring control from non-pi to pi and changing state on // targets like ARM. // // Thunks can be created for DefinedRegular, Shared and Undefined Symbols. // Thunks are assigned to synthetic ThunkSections class Thunk { public: Thunk(const SymbolBody &Destination); virtual ~Thunk(); virtual uint32_t size() const { return 0; } virtual void writeTo(uint8_t *Buf, ThunkSection &IS) const {} // All Thunks must define at least one symbol ThunkSym so that we can // redirect relocations to it. virtual void addSymbols(ThunkSection &IS) {} // Some Thunks must be placed immediately before their Target as they elide // a branch and fall through to the first Symbol in the Target. virtual InputSection *getTargetInputSection() const { return nullptr; } // The alignment requirement for this Thunk, defaults to the size of the // typical code section alignment. const SymbolBody &Destination; SymbolBody *ThunkSym; uint64_t Offset; uint32_t alignment = 4; }; // For a Relocation to symbol S create a Thunk to be added to a synthetic // ThunkSection. At present there are implementations for ARM and Mips Thunks. -template Thunk *addThunk(uint32_t RelocType, SymbolBody &S); +Thunk *addThunk(uint32_t RelocType, SymbolBody &S); } // namespace elf } // namespace lld #endif Index: vendor/lld/dist/ELF/Writer.cpp =================================================================== --- vendor/lld/dist/ELF/Writer.cpp (revision 318421) +++ vendor/lld/dist/ELF/Writer.cpp (revision 318422) @@ -1,1785 +1,1785 @@ //===- Writer.cpp ---------------------------------------------------------===// // // The LLVM Linker // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// #include "Writer.h" #include "Config.h" #include "Filesystem.h" #include "LinkerScript.h" #include "MapFile.h" #include "Memory.h" #include "OutputSections.h" #include "Relocations.h" #include "Strings.h" #include "SymbolTable.h" #include "SyntheticSections.h" #include "Target.h" #include "Threads.h" #include "llvm/ADT/StringMap.h" #include "llvm/ADT/StringSwitch.h" #include "llvm/Support/FileOutputBuffer.h" #include "llvm/Support/raw_ostream.h" #include using namespace llvm; using namespace llvm::ELF; using namespace llvm::object; using namespace llvm::support; using namespace llvm::support::endian; using namespace lld; using namespace lld::elf; namespace { // The writer writes a SymbolTable result to a file. template class Writer { public: typedef typename ELFT::Shdr Elf_Shdr; typedef typename ELFT::Ehdr Elf_Ehdr; typedef typename ELFT::Phdr Elf_Phdr; void run(); private: void createSyntheticSections(); void copyLocalSymbols(); void addSectionSymbols(); void addReservedSymbols(); void createSections(); void forEachRelSec(std::function Fn); void sortSections(); void finalizeSections(); void addPredefinedSections(); std::vector createPhdrs(); void removeEmptyPTLoad(); void addPtArmExid(std::vector &Phdrs); void assignFileOffsets(); void assignFileOffsetsBinary(); void setPhdrs(); void fixSectionAlignments(); void fixPredefinedSymbols(); void openFile(); void writeHeader(); void writeSections(); void writeSectionsBinary(); void writeBuildId(); std::unique_ptr Buffer; std::vector OutputSections; OutputSectionFactory Factory{OutputSections}; void addRelIpltSymbols(); void addStartEndSymbols(); void addStartStopSymbols(OutputSection *Sec); uint64_t getEntryAddr(); OutputSection *findSection(StringRef Name); std::vector Phdrs; uint64_t FileSize; uint64_t SectionHeaderOff; }; } // anonymous namespace StringRef elf::getOutputSectionName(StringRef Name) { if (Config->Relocatable) return Name; // If -emit-relocs is given (which is rare), we need to copy // relocation sections to the output. If input section .foo is // output as .bar, we want to rename .rel.foo .rel.bar as well. if (Config->EmitRelocs) { for (StringRef V : {".rel.", ".rela."}) { if (Name.startswith(V)) { StringRef Inner = getOutputSectionName(Name.substr(V.size() - 1)); return Saver.save(V.drop_back() + Inner); } } } for (StringRef V : {".text.", ".rodata.", ".data.rel.ro.", ".data.", ".bss.rel.ro.", ".bss.", ".init_array.", ".fini_array.", ".ctors.", ".dtors.", ".tbss.", ".gcc_except_table.", ".tdata.", ".ARM.exidx."}) { StringRef Prefix = V.drop_back(); if (Name.startswith(V) || Name == Prefix) return Prefix; } // CommonSection is identified as "COMMON" in linker scripts. // By default, it should go to .bss section. if (Name == "COMMON") return ".bss"; // ".zdebug_" is a prefix for ZLIB-compressed sections. // Because we decompressed input sections, we want to remove 'z'. if (Name.startswith(".zdebug_")) return Saver.save("." + Name.substr(2)); return Name; } template static bool needsInterpSection() { return !Symtab::X->getSharedFiles().empty() && !Config->DynamicLinker.empty() && !Script->ignoreInterpSection(); } template void elf::writeResult() { Writer().run(); } template void Writer::removeEmptyPTLoad() { auto I = std::remove_if(Phdrs.begin(), Phdrs.end(), [&](const PhdrEntry &P) { if (P.p_type != PT_LOAD) return false; if (!P.First) return true; uint64_t Size = P.Last->Addr + P.Last->Size - P.First->Addr; return Size == 0; }); Phdrs.erase(I, Phdrs.end()); } // This function scans over the input sections and creates mergeable // synthetic sections. It removes MergeInputSections from array and // adds new synthetic ones. Each synthetic section is added to the // location of the first input section it replaces. static void combineMergableSections() { std::vector MergeSections; for (InputSectionBase *&S : InputSections) { MergeInputSection *MS = dyn_cast(S); if (!MS) continue; // We do not want to handle sections that are not alive, so just remove // them instead of trying to merge. if (!MS->Live) continue; StringRef OutsecName = getOutputSectionName(MS->Name); uint64_t Flags = MS->Flags & ~(uint64_t)(SHF_GROUP | SHF_COMPRESSED); uint32_t Alignment = std::max(MS->Alignment, MS->Entsize); auto I = llvm::find_if(MergeSections, [=](MergeSyntheticSection *Sec) { return Sec->Name == OutsecName && Sec->Flags == Flags && Sec->Alignment == Alignment; }); if (I == MergeSections.end()) { MergeSyntheticSection *Syn = make(OutsecName, MS->Type, Flags, Alignment); MergeSections.push_back(Syn); I = std::prev(MergeSections.end()); S = Syn; } else { S = nullptr; } (*I)->addSection(MS); } std::vector &V = InputSections; V.erase(std::remove(V.begin(), V.end(), nullptr), V.end()); } template static void combineEhFrameSections() { for (InputSectionBase *&S : InputSections) { EhInputSection *ES = dyn_cast(S); if (!ES || !ES->Live) continue; In::EhFrame->addSection(ES); S = nullptr; } std::vector &V = InputSections; V.erase(std::remove(V.begin(), V.end(), nullptr), V.end()); } // The main function of the writer. template void Writer::run() { // Create linker-synthesized sections such as .got or .plt. // Such sections are of type input section. createSyntheticSections(); combineMergableSections(); if (!Config->Relocatable) combineEhFrameSections(); // We need to create some reserved symbols such as _end. Create them. if (!Config->Relocatable) addReservedSymbols(); // Create output sections. Script->OutputSections = &OutputSections; if (Script->Opt.HasSections) { // If linker script contains SECTIONS commands, let it create sections. Script->processCommands(Factory); // Linker scripts may have left some input sections unassigned. // Assign such sections using the default rule. Script->addOrphanSections(Factory); } else { // If linker script does not contain SECTIONS commands, create // output sections by default rules. We still need to give the // linker script a chance to run, because it might contain // non-SECTIONS commands such as ASSERT. createSections(); Script->processCommands(Factory); } if (Config->Discard != DiscardPolicy::All) copyLocalSymbols(); if (Config->CopyRelocs) addSectionSymbols(); // Now that we have a complete set of output sections. This function // completes section contents. For example, we need to add strings // to the string table, and add entries to .got and .plt. // finalizeSections does that. finalizeSections(); if (ErrorCount) return; if (Config->Relocatable) { assignFileOffsets(); } else { if (!Script->Opt.HasSections) { fixSectionAlignments(); Script->fabricateDefaultCommands(); } Script->synchronize(); Script->assignAddresses(Phdrs); // Remove empty PT_LOAD to avoid causing the dynamic linker to try to mmap a // 0 sized region. This has to be done late since only after assignAddresses // we know the size of the sections. removeEmptyPTLoad(); if (!Config->OFormatBinary) assignFileOffsets(); else assignFileOffsetsBinary(); setPhdrs(); fixPredefinedSymbols(); } // It does not make sense try to open the file if we have error already. if (ErrorCount) return; // Write the result down to a file. openFile(); if (ErrorCount) return; if (!Config->OFormatBinary) { writeHeader(); writeSections(); } else { writeSectionsBinary(); } // Backfill .note.gnu.build-id section content. This is done at last // because the content is usually a hash value of the entire output file. writeBuildId(); if (ErrorCount) return; // Handle -Map option. writeMapFile(OutputSections); if (ErrorCount) return; if (auto EC = Buffer->commit()) error("failed to write to the output file: " + EC.message()); // Flush the output streams and exit immediately. A full shutdown // is a good test that we are keeping track of all allocated memory, // but actually freeing it is a waste of time in a regular linker run. if (Config->ExitEarly) exitLld(0); } // Initialize Out members. template void Writer::createSyntheticSections() { // Initialize all pointers with NULL. This is needed because // you can call lld::elf::main more than once as a library. memset(&Out::First, 0, sizeof(Out)); auto Add = [](InputSectionBase *Sec) { InputSections.push_back(Sec); }; InX::DynStrTab = make(".dynstr", true); InX::Dynamic = make>(); In::RelaDyn = make>( Config->IsRela ? ".rela.dyn" : ".rel.dyn", Config->ZCombreloc); InX::ShStrTab = make(".shstrtab", false); Out::ElfHeader = make("", 0, SHF_ALLOC); Out::ElfHeader->Size = sizeof(Elf_Ehdr); Out::ProgramHeaders = make("", 0, SHF_ALLOC); Out::ProgramHeaders->updateAlignment(Config->Wordsize); if (needsInterpSection()) { InX::Interp = createInterpSection(); Add(InX::Interp); } else { InX::Interp = nullptr; } if (!Config->Relocatable) Add(createCommentSection()); if (Config->Strip != StripPolicy::All) { InX::StrTab = make(".strtab", false); InX::SymTab = make>(*InX::StrTab); } if (Config->BuildId != BuildIdKind::None) { InX::BuildId = make(); Add(InX::BuildId); } InX::Common = createCommonSection(); if (InX::Common) Add(InX::Common); InX::Bss = make(".bss"); Add(InX::Bss); InX::BssRelRo = make(".bss.rel.ro"); Add(InX::BssRelRo); // Add MIPS-specific sections. bool HasDynSymTab = !Symtab::X->getSharedFiles().empty() || Config->Pic || Config->ExportDynamic; if (Config->EMachine == EM_MIPS) { if (!Config->Shared && HasDynSymTab) { InX::MipsRldMap = make(); Add(InX::MipsRldMap); } if (auto *Sec = MipsAbiFlagsSection::create()) Add(Sec); if (auto *Sec = MipsOptionsSection::create()) Add(Sec); if (auto *Sec = MipsReginfoSection::create()) Add(Sec); } if (HasDynSymTab) { InX::DynSymTab = make>(*InX::DynStrTab); Add(InX::DynSymTab); In::VerSym = make>(); Add(In::VerSym); if (!Config->VersionDefinitions.empty()) { In::VerDef = make>(); Add(In::VerDef); } In::VerNeed = make>(); Add(In::VerNeed); if (Config->GnuHash) { InX::GnuHashTab = make(); Add(InX::GnuHashTab); } if (Config->SysvHash) { In::HashTab = make>(); Add(In::HashTab); } Add(InX::Dynamic); Add(InX::DynStrTab); Add(In::RelaDyn); } // Add .got. MIPS' .got is so different from the other archs, // it has its own class. if (Config->EMachine == EM_MIPS) { InX::MipsGot = make(); Add(InX::MipsGot); } else { InX::Got = make>(); Add(InX::Got); } InX::GotPlt = make(); Add(InX::GotPlt); InX::IgotPlt = make(); Add(InX::IgotPlt); if (Config->GdbIndex) { InX::GdbIndex = make(); Add(InX::GdbIndex); } // We always need to add rel[a].plt to output if it has entries. // Even for static linking it can contain R_[*]_IRELATIVE relocations. In::RelaPlt = make>( Config->IsRela ? ".rela.plt" : ".rel.plt", false /*Sort*/); Add(In::RelaPlt); // The RelaIplt immediately follows .rel.plt (.rel.dyn for ARM) to ensure // that the IRelative relocations are processed last by the dynamic loader In::RelaIplt = make>( (Config->EMachine == EM_ARM) ? ".rel.dyn" : In::RelaPlt->Name, false /*Sort*/); Add(In::RelaIplt); InX::Plt = make(Target->PltHeaderSize); Add(InX::Plt); InX::Iplt = make(0); Add(InX::Iplt); if (!Config->Relocatable) { if (Config->EhFrameHdr) { In::EhFrameHdr = make>(); Add(In::EhFrameHdr); } In::EhFrame = make>(); Add(In::EhFrame); } if (InX::SymTab) Add(InX::SymTab); Add(InX::ShStrTab); if (InX::StrTab) Add(InX::StrTab); } static bool shouldKeepInSymtab(SectionBase *Sec, StringRef SymName, const SymbolBody &B) { if (B.isFile() || B.isSection()) return false; // If sym references a section in a discarded group, don't keep it. if (Sec == &InputSection::Discarded) return false; if (Config->Discard == DiscardPolicy::None) return true; // In ELF assembly .L symbols are normally discarded by the assembler. // If the assembler fails to do so, the linker discards them if // * --discard-locals is used. // * The symbol is in a SHF_MERGE section, which is normally the reason for // the assembler keeping the .L symbol. if (!SymName.startswith(".L") && !SymName.empty()) return true; if (Config->Discard == DiscardPolicy::Locals) return false; return !Sec || !(Sec->Flags & SHF_MERGE); } static bool includeInSymtab(const SymbolBody &B) { if (!B.isLocal() && !B.symbol()->IsUsedInRegularObj) return false; if (auto *D = dyn_cast(&B)) { // Always include absolute symbols. SectionBase *Sec = D->Section; if (!Sec) return true; if (auto *IS = dyn_cast(Sec)) { Sec = IS->Repl; IS = cast(Sec); // Exclude symbols pointing to garbage-collected sections. if (!IS->Live) return false; } if (auto *S = dyn_cast(Sec)) if (!S->getSectionPiece(D->Value)->Live) return false; } return true; } // Local symbols are not in the linker's symbol table. This function scans // each object file's symbol table to copy local symbols to the output. template void Writer::copyLocalSymbols() { if (!InX::SymTab) return; for (elf::ObjectFile *F : Symtab::X->getObjectFiles()) { for (SymbolBody *B : F->getLocalSymbols()) { if (!B->IsLocal) fatal(toString(F) + ": broken object: getLocalSymbols returns a non-local symbol"); auto *DR = dyn_cast(B); // No reason to keep local undefined symbol in symtab. if (!DR) continue; if (!includeInSymtab(*B)) continue; SectionBase *Sec = DR->Section; if (!shouldKeepInSymtab(Sec, B->getName(), *B)) continue; InX::SymTab->addSymbol(B); } } } template void Writer::addSectionSymbols() { // Create one STT_SECTION symbol for each output section we might // have a relocation with. for (OutputSection *Sec : OutputSections) { if (Sec->Sections.empty()) continue; InputSection *IS = Sec->Sections[0]; if (isa(IS) || IS->Type == SHT_REL || IS->Type == SHT_RELA) continue; auto *Sym = make("", /*IsLocal=*/true, /*StOther=*/0, STT_SECTION, /*Value=*/0, /*Size=*/0, IS, nullptr); InX::SymTab->addSymbol(Sym); } } // Today's loaders have a feature to make segments read-only after // processing dynamic relocations to enhance security. PT_GNU_RELRO // is defined for that. // // This function returns true if a section needs to be put into a // PT_GNU_RELRO segment. bool elf::isRelroSection(const OutputSection *Sec) { if (!Config->ZRelro) return false; uint64_t Flags = Sec->Flags; // Non-allocatable or non-writable sections don't need RELRO because // they are not writable or not even mapped to memory in the first place. // RELRO is for sections that are essentially read-only but need to // be writable only at process startup to allow dynamic linker to // apply relocations. if (!(Flags & SHF_ALLOC) || !(Flags & SHF_WRITE)) return false; // Once initialized, TLS data segments are used as data templates // for a thread-local storage. For each new thread, runtime // allocates memory for a TLS and copy templates there. No thread // are supposed to use templates directly. Thus, it can be in RELRO. if (Flags & SHF_TLS) return true; // .init_array, .preinit_array and .fini_array contain pointers to // functions that are executed on process startup or exit. These // pointers are set by the static linker, and they are not expected // to change at runtime. But if you are an attacker, you could do // interesting things by manipulating pointers in .fini_array, for // example. So they are put into RELRO. uint32_t Type = Sec->Type; if (Type == SHT_INIT_ARRAY || Type == SHT_FINI_ARRAY || Type == SHT_PREINIT_ARRAY) return true; // .got contains pointers to external symbols. They are resolved by // the dynamic linker when a module is loaded into memory, and after // that they are not expected to change. So, it can be in RELRO. if (InX::Got && Sec == InX::Got->OutSec) return true; // .got.plt contains pointers to external function symbols. They are // by default resolved lazily, so we usually cannot put it into RELRO. // However, if "-z now" is given, the lazy symbol resolution is // disabled, which enables us to put it into RELRO. if (Sec == InX::GotPlt->OutSec) return Config->ZNow; // .dynamic section contains data for the dynamic linker, and // there's no need to write to it at runtime, so it's better to put // it into RELRO. if (Sec == InX::Dynamic->OutSec) return true; // .bss.rel.ro is used for copy relocations for read-only symbols. // Since the dynamic linker needs to process copy relocations, the // section cannot be read-only, but once initialized, they shouldn't // change. if (Sec == InX::BssRelRo->OutSec) return true; // Sections with some special names are put into RELRO. This is a // bit unfortunate because section names shouldn't be significant in // ELF in spirit. But in reality many linker features depend on // magic section names. StringRef S = Sec->Name; return S == ".data.rel.ro" || S == ".ctors" || S == ".dtors" || S == ".jcr" || S == ".eh_frame" || S == ".openbsd.randomdata"; } // We compute a rank for each section. The rank indicates where the // section should be placed in the file. Instead of using simple // numbers (0,1,2...), we use a series of flags. One for each decision // point when placing the section. // Using flags has two key properties: // * It is easy to check if a give branch was taken. // * It is easy two see how similar two ranks are (see getRankProximity). enum RankFlags { RF_NOT_ADDR_SET = 1 << 16, RF_NOT_INTERP = 1 << 15, RF_NOT_ALLOC = 1 << 14, RF_WRITE = 1 << 13, RF_EXEC = 1 << 12, RF_NON_TLS_BSS = 1 << 11, RF_NON_TLS_BSS_RO = 1 << 10, RF_NOT_TLS = 1 << 9, RF_BSS = 1 << 8, RF_PPC_NOT_TOCBSS = 1 << 7, RF_PPC_OPD = 1 << 6, RF_PPC_TOCL = 1 << 5, RF_PPC_TOC = 1 << 4, RF_PPC_BRANCH_LT = 1 << 3, RF_MIPS_GPREL = 1 << 2, RF_MIPS_NOT_GOT = 1 << 1 }; static unsigned getSectionRank(const OutputSection *Sec) { unsigned Rank = 0; // We want to put section specified by -T option first, so we // can start assigning VA starting from them later. if (Config->SectionStartMap.count(Sec->Name)) return Rank; Rank |= RF_NOT_ADDR_SET; // Put .interp first because some loaders want to see that section // on the first page of the executable file when loaded into memory. if (Sec->Name == ".interp") return Rank; Rank |= RF_NOT_INTERP; // Allocatable sections go first to reduce the total PT_LOAD size and // so debug info doesn't change addresses in actual code. if (!(Sec->Flags & SHF_ALLOC)) return Rank | RF_NOT_ALLOC; // We want the read only sections first so that they go in the PT_LOAD // covering the program headers at the start of the file. if (Sec->Flags & SHF_WRITE) Rank |= RF_WRITE; if (Sec->Flags & SHF_EXECINSTR) { // For a corresponding reason, put non exec sections first (the program // header PT_LOAD is not executable). // We only do that if we are not using linker scripts, since with linker // scripts ro and rx sections are in the same PT_LOAD, so their relative // order is not important. The same applies for -no-rosegment. if ((Rank & RF_WRITE) || !Config->SingleRoRx) Rank |= RF_EXEC; } // If we got here we know that both A and B are in the same PT_LOAD. bool IsTls = Sec->Flags & SHF_TLS; bool IsNoBits = Sec->Type == SHT_NOBITS; // The first requirement we have is to put (non-TLS) nobits sections last. The // reason is that the only thing the dynamic linker will see about them is a // p_memsz that is larger than p_filesz. Seeing that it zeros the end of the // PT_LOAD, so that has to correspond to the nobits sections. bool IsNonTlsNoBits = IsNoBits && !IsTls; if (IsNonTlsNoBits) Rank |= RF_NON_TLS_BSS; // We place nobits RelRo sections before plain r/w ones, and non-nobits RelRo // sections after r/w ones, so that the RelRo sections are contiguous. bool IsRelRo = isRelroSection(Sec); if (IsNonTlsNoBits && !IsRelRo) Rank |= RF_NON_TLS_BSS_RO; if (!IsNonTlsNoBits && IsRelRo) Rank |= RF_NON_TLS_BSS_RO; // The TLS initialization block needs to be a single contiguous block in a R/W // PT_LOAD, so stick TLS sections directly before the other RelRo R/W // sections. The TLS NOBITS sections are placed here as they don't take up // virtual address space in the PT_LOAD. if (!IsTls) Rank |= RF_NOT_TLS; // Within the TLS initialization block, the non-nobits sections need to appear // first. if (IsNoBits) Rank |= RF_BSS; // // Some architectures have additional ordering restrictions for sections // // within the same PT_LOAD. if (Config->EMachine == EM_PPC64) { // PPC64 has a number of special SHT_PROGBITS+SHF_ALLOC+SHF_WRITE sections // that we would like to make sure appear is a specific order to maximize // their coverage by a single signed 16-bit offset from the TOC base // pointer. Conversely, the special .tocbss section should be first among // all SHT_NOBITS sections. This will put it next to the loaded special // PPC64 sections (and, thus, within reach of the TOC base pointer). StringRef Name = Sec->Name; if (Name != ".tocbss") Rank |= RF_PPC_NOT_TOCBSS; if (Name == ".opd") Rank |= RF_PPC_OPD; if (Name == ".toc1") Rank |= RF_PPC_TOCL; if (Name == ".toc") Rank |= RF_PPC_TOC; if (Name == ".branch_lt") Rank |= RF_PPC_BRANCH_LT; } if (Config->EMachine == EM_MIPS) { // All sections with SHF_MIPS_GPREL flag should be grouped together // because data in these sections is addressable with a gp relative address. if (Sec->Flags & SHF_MIPS_GPREL) Rank |= RF_MIPS_GPREL; if (Sec->Name != ".got") Rank |= RF_MIPS_NOT_GOT; } return Rank; } static bool compareSectionsNonScript(const OutputSection *A, const OutputSection *B) { if (A->SortRank != B->SortRank) return A->SortRank < B->SortRank; if (!(A->SortRank & RF_NOT_ADDR_SET)) return Config->SectionStartMap.lookup(A->Name) < Config->SectionStartMap.lookup(B->Name); return false; } // Output section ordering is determined by this function. static bool compareSections(const OutputSection *A, const OutputSection *B) { // For now, put sections mentioned in a linker script // first. Sections not on linker script will have a SectionIndex of // INT_MAX. int AIndex = A->SectionIndex; int BIndex = B->SectionIndex; if (AIndex != BIndex) return AIndex < BIndex; return compareSectionsNonScript(A, B); } // Program header entry PhdrEntry::PhdrEntry(unsigned Type, unsigned Flags) { p_type = Type; p_flags = Flags; } void PhdrEntry::add(OutputSection *Sec) { Last = Sec; if (!First) First = Sec; p_align = std::max(p_align, Sec->Alignment); if (p_type == PT_LOAD) Sec->FirstInPtLoad = First; } template static Symbol *addRegular(StringRef Name, SectionBase *Sec, uint64_t Value, uint8_t StOther = STV_HIDDEN, uint8_t Binding = STB_WEAK) { // The linker generated symbols are added as STB_WEAK to allow user defined // ones to override them. return Symtab::X->addRegular(Name, StOther, STT_NOTYPE, Value, /*Size=*/0, Binding, Sec, /*File=*/nullptr); } template static DefinedRegular * addOptionalRegular(StringRef Name, SectionBase *Sec, uint64_t Val, uint8_t StOther = STV_HIDDEN, uint8_t Binding = STB_GLOBAL) { SymbolBody *S = Symtab::X->find(Name); if (!S) return nullptr; if (S->isInCurrentDSO()) return nullptr; return cast( addRegular(Name, Sec, Val, StOther, Binding)->body()); } // The beginning and the ending of .rel[a].plt section are marked // with __rel[a]_iplt_{start,end} symbols if it is a statically linked // executable. The runtime needs these symbols in order to resolve // all IRELATIVE relocs on startup. For dynamic executables, we don't // need these symbols, since IRELATIVE relocs are resolved through GOT // and PLT. For details, see http://www.airs.com/blog/archives/403. template void Writer::addRelIpltSymbols() { if (InX::DynSymTab) return; StringRef S = Config->IsRela ? "__rela_iplt_start" : "__rel_iplt_start"; addOptionalRegular(S, In::RelaIplt, 0, STV_HIDDEN, STB_WEAK); S = Config->IsRela ? "__rela_iplt_end" : "__rel_iplt_end"; addOptionalRegular(S, In::RelaIplt, -1, STV_HIDDEN, STB_WEAK); } // The linker is expected to define some symbols depending on // the linking result. This function defines such symbols. template void Writer::addReservedSymbols() { if (Config->EMachine == EM_MIPS) { // Define _gp for MIPS. st_value of _gp symbol will be updated by Writer // so that it points to an absolute address which by default is relative // to GOT. Default offset is 0x7ff0. // See "Global Data Symbols" in Chapter 6 in the following document: // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf ElfSym::MipsGp = Symtab::X->addAbsolute("_gp", STV_HIDDEN, STB_LOCAL); // On MIPS O32 ABI, _gp_disp is a magic symbol designates offset between // start of function and 'gp' pointer into GOT. if (Symtab::X->find("_gp_disp")) ElfSym::MipsGpDisp = Symtab::X->addAbsolute("_gp_disp", STV_HIDDEN, STB_LOCAL); // The __gnu_local_gp is a magic symbol equal to the current value of 'gp' // pointer. This symbol is used in the code generated by .cpload pseudo-op // in case of using -mno-shared option. // https://sourceware.org/ml/binutils/2004-12/msg00094.html if (Symtab::X->find("__gnu_local_gp")) ElfSym::MipsLocalGp = Symtab::X->addAbsolute("__gnu_local_gp", STV_HIDDEN, STB_LOCAL); } // In the assembly for 32 bit x86 the _GLOBAL_OFFSET_TABLE_ symbol // is magical and is used to produce a R_386_GOTPC relocation. // The R_386_GOTPC relocation value doesn't actually depend on the // symbol value, so it could use an index of STN_UNDEF which, according // to the spec, means the symbol value is 0. // Unfortunately both gas and MC keep the _GLOBAL_OFFSET_TABLE_ symbol in // the object file. // The situation is even stranger on x86_64 where the assembly doesn't // need the magical symbol, but gas still puts _GLOBAL_OFFSET_TABLE_ as // an undefined symbol in the .o files. // Given that the symbol is effectively unused, we just create a dummy // hidden one to avoid the undefined symbol error. Symtab::X->addIgnored("_GLOBAL_OFFSET_TABLE_"); // __tls_get_addr is defined by the dynamic linker for dynamic ELFs. For // static linking the linker is required to optimize away any references to // __tls_get_addr, so it's not defined anywhere. Create a hidden definition // to avoid the undefined symbol error. if (!InX::DynSymTab) Symtab::X->addIgnored("__tls_get_addr"); // __ehdr_start is the location of ELF file headers. Note that we define // this symbol unconditionally even when using a linker script, which // differs from the behavior implemented by GNU linker which only define // this symbol if ELF headers are in the memory mapped segment. addOptionalRegular("__ehdr_start", Out::ElfHeader, 0, STV_HIDDEN); // If linker script do layout we do not need to create any standart symbols. if (Script->Opt.HasSections) return; auto Add = [](StringRef S) { return addOptionalRegular(S, Out::ElfHeader, 0, STV_DEFAULT); }; ElfSym::Bss = Add("__bss_start"); ElfSym::End1 = Add("end"); ElfSym::End2 = Add("_end"); ElfSym::Etext1 = Add("etext"); ElfSym::Etext2 = Add("_etext"); ElfSym::Edata1 = Add("edata"); ElfSym::Edata2 = Add("_edata"); } // Sort input sections by section name suffixes for // __attribute__((init_priority(N))). static void sortInitFini(OutputSection *S) { if (S) reinterpret_cast(S)->sortInitFini(); } // Sort input sections by the special rule for .ctors and .dtors. static void sortCtorsDtors(OutputSection *S) { if (S) reinterpret_cast(S)->sortCtorsDtors(); } // Sort input sections using the list provided by --symbol-ordering-file. template static void sortBySymbolsOrder(ArrayRef OutputSections) { if (Config->SymbolOrderingFile.empty()) return; // Build a map from symbols to their priorities. Symbols that didn't // appear in the symbol ordering file have the lowest priority 0. // All explicitly mentioned symbols have negative (higher) priorities. DenseMap SymbolOrder; int Priority = -Config->SymbolOrderingFile.size(); for (StringRef S : Config->SymbolOrderingFile) SymbolOrder.insert({S, Priority++}); // Build a map from sections to their priorities. DenseMap SectionOrder; for (elf::ObjectFile *File : Symtab::X->getObjectFiles()) { for (SymbolBody *Body : File->getSymbols()) { auto *D = dyn_cast(Body); if (!D || !D->Section) continue; int &Priority = SectionOrder[D->Section]; Priority = std::min(Priority, SymbolOrder.lookup(D->getName())); } } // Sort sections by priority. for (OutputSection *Base : OutputSections) if (auto *Sec = dyn_cast(Base)) Sec->sort([&](InputSectionBase *S) { return SectionOrder.lookup(S); }); } template void Writer::forEachRelSec(std::function Fn) { for (InputSectionBase *IS : InputSections) { if (!IS->Live) continue; // Scan all relocations. Each relocation goes through a series // of tests to determine if it needs special treatment, such as // creating GOT, PLT, copy relocations, etc. // Note that relocations for non-alloc sections are directly // processed by InputSection::relocateNonAlloc. if (!(IS->Flags & SHF_ALLOC)) continue; if (isa(IS) || isa(IS)) Fn(*IS); } if (!Config->Relocatable) { for (EhInputSection *ES : In::EhFrame->Sections) Fn(*ES); } } template void Writer::createSections() { for (InputSectionBase *IS : InputSections) if (IS) Factory.addInputSec(IS, getOutputSectionName(IS->Name)); sortBySymbolsOrder(OutputSections); sortInitFini(findSection(".init_array")); sortInitFini(findSection(".fini_array")); sortCtorsDtors(findSection(".ctors")); sortCtorsDtors(findSection(".dtors")); for (OutputSection *Sec : OutputSections) Sec->assignOffsets(); } // We want to find how similar two ranks are. // The more branches in getSectionRank that match, the more similar they are. // Since each branch corresponds to a bit flag, we can just use // countLeadingZeros. static unsigned getRankProximity(OutputSection *A, OutputSection *B) { return countLeadingZeros(A->SortRank ^ B->SortRank); } // We want to place orphan sections so that they share as much // characteristics with their neighbors as possible. For example, if // both are rw, or both are tls. template static std::vector::iterator findOrphanPos(std::vector::iterator B, std::vector::iterator E) { OutputSection *Sec = *E; // Find the first element that has as close a rank as possible. auto I = std::max_element(B, E, [=](OutputSection *A, OutputSection *B) { return getRankProximity(Sec, A) < getRankProximity(Sec, B); }); if (I == E) return E; // Consider all existing sections with the same proximity. unsigned Proximity = getRankProximity(Sec, *I); while (I != E && getRankProximity(Sec, *I) == Proximity && Sec->SortRank >= (*I)->SortRank) ++I; return I; } template void Writer::sortSections() { // Don't sort if using -r. It is not necessary and we want to preserve the // relative order for SHF_LINK_ORDER sections. if (Config->Relocatable) return; if (Script->Opt.HasSections) Script->adjustSectionsBeforeSorting(); for (OutputSection *Sec : OutputSections) Sec->SortRank = getSectionRank(Sec); if (!Script->Opt.HasSections) { std::stable_sort(OutputSections.begin(), OutputSections.end(), compareSectionsNonScript); return; } // The order of the sections in the script is arbitrary and may not agree with // compareSectionsNonScript. This means that we cannot easily define a // strict weak ordering. To see why, consider a comparison of a section in the // script and one not in the script. We have a two simple options: // * Make them equivalent (a is not less than b, and b is not less than a). // The problem is then that equivalence has to be transitive and we can // have sections a, b and c with only b in a script and a less than c // which breaks this property. // * Use compareSectionsNonScript. Given that the script order doesn't have // to match, we can end up with sections a, b, c, d where b and c are in the // script and c is compareSectionsNonScript less than b. In which case d // can be equivalent to c, a to b and d < a. As a concrete example: // .a (rx) # not in script // .b (rx) # in script // .c (ro) # in script // .d (ro) # not in script // // The way we define an order then is: // * First put script sections at the start and sort the script sections. // * Move each non-script section to its preferred position. We try // to put each section in the last position where it it can share // a PT_LOAD. std::stable_sort(OutputSections.begin(), OutputSections.end(), compareSections); auto I = OutputSections.begin(); auto E = OutputSections.end(); auto NonScriptI = std::find_if(OutputSections.begin(), E, [](OutputSection *S) { return S->SectionIndex == INT_MAX; }); while (NonScriptI != E) { auto Pos = findOrphanPos(I, NonScriptI); // As an optimization, find all sections with the same sort rank // and insert them with one rotate. unsigned Rank = (*NonScriptI)->SortRank; auto End = std::find_if(NonScriptI + 1, E, [=](OutputSection *Sec) { return Sec->SortRank != Rank; }); std::rotate(Pos, NonScriptI, End); NonScriptI = End; } Script->adjustSectionsAfterSorting(); } static void applySynthetic(const std::vector &Sections, std::function Fn) { for (SyntheticSection *SS : Sections) if (SS && SS->OutSec && !SS->empty()) { Fn(SS); SS->OutSec->assignOffsets(); } } // We need to add input synthetic sections early in createSyntheticSections() // to make them visible from linkescript side. But not all sections are always // required to be in output. For example we don't need dynamic section content // sometimes. This function filters out such unused sections from the output. static void removeUnusedSyntheticSections(std::vector &V) { // All input synthetic sections that can be empty are placed after // all regular ones. We iterate over them all and exit at first // non-synthetic. for (InputSectionBase *S : llvm::reverse(InputSections)) { SyntheticSection *SS = dyn_cast(S); if (!SS) return; if (!SS->empty() || !SS->OutSec) continue; SS->OutSec->Sections.erase(std::find(SS->OutSec->Sections.begin(), SS->OutSec->Sections.end(), SS)); SS->Live = false; // If there are no other sections in the output section, remove it from the // output. if (SS->OutSec->Sections.empty()) V.erase(std::find(V.begin(), V.end(), SS->OutSec)); } } // Create output section objects and add them to OutputSections. template void Writer::finalizeSections() { Out::DebugInfo = findSection(".debug_info"); Out::PreinitArray = findSection(".preinit_array"); Out::InitArray = findSection(".init_array"); Out::FiniArray = findSection(".fini_array"); // The linker needs to define SECNAME_start, SECNAME_end and SECNAME_stop // symbols for sections, so that the runtime can get the start and end // addresses of each section by section name. Add such symbols. if (!Config->Relocatable) { addStartEndSymbols(); for (OutputSection *Sec : OutputSections) addStartStopSymbols(Sec); } // Add _DYNAMIC symbol. Unlike GNU gold, our _DYNAMIC symbol has no type. // It should be okay as no one seems to care about the type. // Even the author of gold doesn't remember why gold behaves that way. // https://sourceware.org/ml/binutils/2002-03/msg00360.html if (InX::DynSymTab) addRegular("_DYNAMIC", InX::Dynamic, 0); // Define __rel[a]_iplt_{start,end} symbols if needed. addRelIpltSymbols(); // This responsible for splitting up .eh_frame section into // pieces. The relocation scan uses those pieces, so this has to be // earlier. applySynthetic({In::EhFrame}, [](SyntheticSection *SS) { SS->finalizeContents(); }); // Scan relocations. This must be done after every symbol is declared so that // we can correctly decide if a dynamic relocation is needed. forEachRelSec(scanRelocations); if (InX::Plt && !InX::Plt->empty()) InX::Plt->addSymbols(); if (InX::Iplt && !InX::Iplt->empty()) InX::Iplt->addSymbols(); // Now that we have defined all possible global symbols including linker- // synthesized ones. Visit all symbols to give the finishing touches. for (Symbol *S : Symtab::X->getSymbols()) { SymbolBody *Body = S->body(); if (!includeInSymtab(*Body)) continue; if (InX::SymTab) InX::SymTab->addSymbol(Body); if (InX::DynSymTab && S->includeInDynsym()) { InX::DynSymTab->addSymbol(Body); if (auto *SS = dyn_cast(Body)) if (cast>(SS->File)->isNeeded()) In::VerNeed->addSymbol(SS); } } // Do not proceed if there was an undefined symbol. if (ErrorCount) return; // So far we have added sections from input object files. // This function adds linker-created Out::* sections. addPredefinedSections(); removeUnusedSyntheticSections(OutputSections); sortSections(); // This is a bit of a hack. A value of 0 means undef, so we set it // to 1 t make __ehdr_start defined. The section number is not // particularly relevant. Out::ElfHeader->SectionIndex = 1; unsigned I = 1; for (OutputSection *Sec : OutputSections) { Sec->SectionIndex = I++; Sec->ShName = InX::ShStrTab->addString(Sec->Name); } // Binary and relocatable output does not have PHDRS. // The headers have to be created before finalize as that can influence the // image base and the dynamic section on mips includes the image base. if (!Config->Relocatable && !Config->OFormatBinary) { Phdrs = Script->hasPhdrsCommands() ? Script->createPhdrs() : createPhdrs(); addPtArmExid(Phdrs); Out::ProgramHeaders->Size = sizeof(Elf_Phdr) * Phdrs.size(); } // Dynamic section must be the last one in this list and dynamic // symbol table section (DynSymTab) must be the first one. applySynthetic({InX::DynSymTab, InX::Bss, InX::BssRelRo, InX::GnuHashTab, In::HashTab, InX::SymTab, InX::ShStrTab, InX::StrTab, In::VerDef, InX::DynStrTab, InX::GdbIndex, InX::Got, InX::MipsGot, InX::IgotPlt, InX::GotPlt, In::RelaDyn, In::RelaIplt, In::RelaPlt, InX::Plt, InX::Iplt, In::EhFrameHdr, In::VerSym, In::VerNeed, InX::Dynamic}, [](SyntheticSection *SS) { SS->finalizeContents(); }); // Some architectures use small displacements for jump instructions. // It is linker's responsibility to create thunks containing long // jump instructions if jump targets are too far. Create thunks. if (Target->NeedsThunks) { // FIXME: only ARM Interworking and Mips LA25 Thunks are implemented, // these // do not require address information. To support range extension Thunks // we need to assign addresses so that we can tell if jump instructions // are out of range. This will need to turn into a loop that converges // when no more Thunks are added - ThunkCreator TC; + ThunkCreator TC; if (TC.createThunks(OutputSections)) applySynthetic({InX::MipsGot}, [](SyntheticSection *SS) { SS->updateAllocSize(); }); } // Fill other section headers. The dynamic table is finalized // at the end because some tags like RELSZ depend on result // of finalizing other sections. for (OutputSection *Sec : OutputSections) Sec->finalize(); // If -compressed-debug-sections is specified, we need to compress // .debug_* sections. Do it right now because it changes the size of // output sections. parallelForEach(OutputSections.begin(), OutputSections.end(), [](OutputSection *S) { S->maybeCompress(); }); // createThunks may have added local symbols to the static symbol table applySynthetic({InX::SymTab, InX::ShStrTab, InX::StrTab}, [](SyntheticSection *SS) { SS->postThunkContents(); }); } template void Writer::addPredefinedSections() { // ARM ABI requires .ARM.exidx to be terminated by some piece of data. // We have the terminater synthetic section class. Add that at the end. auto *OS = dyn_cast_or_null(findSection(".ARM.exidx")); if (OS && !OS->Sections.empty() && !Config->Relocatable) OS->addSection(make()); } // The linker is expected to define SECNAME_start and SECNAME_end // symbols for a few sections. This function defines them. template void Writer::addStartEndSymbols() { auto Define = [&](StringRef Start, StringRef End, OutputSection *OS) { // These symbols resolve to the image base if the section does not exist. // A special value -1 indicates end of the section. if (OS) { addOptionalRegular(Start, OS, 0); addOptionalRegular(End, OS, -1); } else { if (Config->Pic) OS = Out::ElfHeader; addOptionalRegular(Start, OS, 0); addOptionalRegular(End, OS, 0); } }; Define("__preinit_array_start", "__preinit_array_end", Out::PreinitArray); Define("__init_array_start", "__init_array_end", Out::InitArray); Define("__fini_array_start", "__fini_array_end", Out::FiniArray); if (OutputSection *Sec = findSection(".ARM.exidx")) Define("__exidx_start", "__exidx_end", Sec); } // If a section name is valid as a C identifier (which is rare because of // the leading '.'), linkers are expected to define __start_ and // __stop_ symbols. They are at beginning and end of the section, // respectively. This is not requested by the ELF standard, but GNU ld and // gold provide the feature, and used by many programs. template void Writer::addStartStopSymbols(OutputSection *Sec) { StringRef S = Sec->Name; if (!isValidCIdentifier(S)) return; addOptionalRegular(Saver.save("__start_" + S), Sec, 0, STV_DEFAULT); addOptionalRegular(Saver.save("__stop_" + S), Sec, -1, STV_DEFAULT); } template OutputSection *Writer::findSection(StringRef Name) { for (OutputSection *Sec : OutputSections) if (Sec->Name == Name) return Sec; return nullptr; } static bool needsPtLoad(OutputSection *Sec) { if (!(Sec->Flags & SHF_ALLOC)) return false; // Don't allocate VA space for TLS NOBITS sections. The PT_TLS PHDR is // responsible for allocating space for them, not the PT_LOAD that // contains the TLS initialization image. if (Sec->Flags & SHF_TLS && Sec->Type == SHT_NOBITS) return false; return true; } // Linker scripts are responsible for aligning addresses. Unfortunately, most // linker scripts are designed for creating two PT_LOADs only, one RX and one // RW. This means that there is no alignment in the RO to RX transition and we // cannot create a PT_LOAD there. static uint64_t computeFlags(uint64_t Flags) { if (Config->Omagic) return PF_R | PF_W | PF_X; if (Config->SingleRoRx && !(Flags & PF_W)) return Flags | PF_X; return Flags; } // Decide which program headers to create and which sections to include in each // one. template std::vector Writer::createPhdrs() { std::vector Ret; auto AddHdr = [&](unsigned Type, unsigned Flags) -> PhdrEntry * { Ret.emplace_back(Type, Flags); return &Ret.back(); }; // The first phdr entry is PT_PHDR which describes the program header itself. AddHdr(PT_PHDR, PF_R)->add(Out::ProgramHeaders); // PT_INTERP must be the second entry if exists. if (OutputSection *Sec = findSection(".interp")) AddHdr(PT_INTERP, Sec->getPhdrFlags())->add(Sec); // Add the first PT_LOAD segment for regular output sections. uint64_t Flags = computeFlags(PF_R); PhdrEntry *Load = AddHdr(PT_LOAD, Flags); // Add the headers. We will remove them if they don't fit. Load->add(Out::ElfHeader); Load->add(Out::ProgramHeaders); for (OutputSection *Sec : OutputSections) { if (!(Sec->Flags & SHF_ALLOC)) break; if (!needsPtLoad(Sec)) continue; // Segments are contiguous memory regions that has the same attributes // (e.g. executable or writable). There is one phdr for each segment. // Therefore, we need to create a new phdr when the next section has // different flags or is loaded at a discontiguous address using AT linker // script command. uint64_t NewFlags = computeFlags(Sec->getPhdrFlags()); if (Script->hasLMA(Sec) || Flags != NewFlags) { Load = AddHdr(PT_LOAD, NewFlags); Flags = NewFlags; } Load->add(Sec); } // Add a TLS segment if any. PhdrEntry TlsHdr(PT_TLS, PF_R); for (OutputSection *Sec : OutputSections) if (Sec->Flags & SHF_TLS) TlsHdr.add(Sec); if (TlsHdr.First) Ret.push_back(std::move(TlsHdr)); // Add an entry for .dynamic. if (InX::DynSymTab) AddHdr(PT_DYNAMIC, InX::Dynamic->OutSec->getPhdrFlags()) ->add(InX::Dynamic->OutSec); // PT_GNU_RELRO includes all sections that should be marked as // read-only by dynamic linker after proccessing relocations. PhdrEntry RelRo(PT_GNU_RELRO, PF_R); for (OutputSection *Sec : OutputSections) if (needsPtLoad(Sec) && isRelroSection(Sec)) RelRo.add(Sec); if (RelRo.First) Ret.push_back(std::move(RelRo)); // PT_GNU_EH_FRAME is a special section pointing on .eh_frame_hdr. if (!In::EhFrame->empty() && In::EhFrameHdr && In::EhFrame->OutSec && In::EhFrameHdr->OutSec) AddHdr(PT_GNU_EH_FRAME, In::EhFrameHdr->OutSec->getPhdrFlags()) ->add(In::EhFrameHdr->OutSec); // PT_OPENBSD_RANDOMIZE is an OpenBSD-specific feature. That makes // the dynamic linker fill the segment with random data. if (OutputSection *Sec = findSection(".openbsd.randomdata")) AddHdr(PT_OPENBSD_RANDOMIZE, Sec->getPhdrFlags())->add(Sec); // PT_GNU_STACK is a special section to tell the loader to make the // pages for the stack non-executable. If you really want an executable // stack, you can pass -z execstack, but that's not recommended for // security reasons. unsigned Perm; if (Config->ZExecstack) Perm = PF_R | PF_W | PF_X; else Perm = PF_R | PF_W; AddHdr(PT_GNU_STACK, Perm)->p_memsz = Config->ZStackSize; // PT_OPENBSD_WXNEEDED is a OpenBSD-specific header to mark the executable // is expected to perform W^X violations, such as calling mprotect(2) or // mmap(2) with PROT_WRITE | PROT_EXEC, which is prohibited by default on // OpenBSD. if (Config->ZWxneeded) AddHdr(PT_OPENBSD_WXNEEDED, PF_X); // Create one PT_NOTE per a group of contiguous .note sections. PhdrEntry *Note = nullptr; for (OutputSection *Sec : OutputSections) { if (Sec->Type == SHT_NOTE) { if (!Note || Script->hasLMA(Sec)) Note = AddHdr(PT_NOTE, PF_R); Note->add(Sec); } else { Note = nullptr; } } return Ret; } template void Writer::addPtArmExid(std::vector &Phdrs) { if (Config->EMachine != EM_ARM) return; auto I = std::find_if( OutputSections.begin(), OutputSections.end(), [](OutputSection *Sec) { return Sec->Type == SHT_ARM_EXIDX; }); if (I == OutputSections.end()) return; // PT_ARM_EXIDX is the ARM EHABI equivalent of PT_GNU_EH_FRAME PhdrEntry ARMExidx(PT_ARM_EXIDX, PF_R); ARMExidx.add(*I); Phdrs.push_back(ARMExidx); } // The first section of each PT_LOAD, the first section in PT_GNU_RELRO and the // first section after PT_GNU_RELRO have to be page aligned so that the dynamic // linker can set the permissions. template void Writer::fixSectionAlignments() { for (const PhdrEntry &P : Phdrs) if (P.p_type == PT_LOAD && P.First) P.First->PageAlign = true; for (const PhdrEntry &P : Phdrs) { if (P.p_type != PT_GNU_RELRO) continue; if (P.First) P.First->PageAlign = true; // Find the first section after PT_GNU_RELRO. If it is in a PT_LOAD we // have to align it to a page. auto End = OutputSections.end(); auto I = std::find(OutputSections.begin(), End, P.Last); if (I == End || (I + 1) == End) continue; OutputSection *Sec = *(I + 1); if (needsPtLoad(Sec)) Sec->PageAlign = true; } } // Adjusts the file alignment for a given output section and returns // its new file offset. The file offset must be the same with its // virtual address (modulo the page size) so that the loader can load // executables without any address adjustment. static uint64_t getFileAlignment(uint64_t Off, OutputSection *Sec) { OutputSection *First = Sec->FirstInPtLoad; // If the section is not in a PT_LOAD, we just have to align it. if (!First) return alignTo(Off, Sec->Alignment); // The first section in a PT_LOAD has to have congruent offset and address // module the page size. if (Sec == First) return alignTo(Off, Config->MaxPageSize, Sec->Addr); // If two sections share the same PT_LOAD the file offset is calculated // using this formula: Off2 = Off1 + (VA2 - VA1). return First->Offset + Sec->Addr - First->Addr; } static uint64_t setOffset(OutputSection *Sec, uint64_t Off) { if (Sec->Type == SHT_NOBITS) { Sec->Offset = Off; return Off; } Off = getFileAlignment(Off, Sec); Sec->Offset = Off; return Off + Sec->Size; } template void Writer::assignFileOffsetsBinary() { uint64_t Off = 0; for (OutputSection *Sec : OutputSections) if (Sec->Flags & SHF_ALLOC) Off = setOffset(Sec, Off); FileSize = alignTo(Off, Config->Wordsize); } // Assign file offsets to output sections. template void Writer::assignFileOffsets() { uint64_t Off = 0; Off = setOffset(Out::ElfHeader, Off); Off = setOffset(Out::ProgramHeaders, Off); for (OutputSection *Sec : OutputSections) Off = setOffset(Sec, Off); SectionHeaderOff = alignTo(Off, Config->Wordsize); FileSize = SectionHeaderOff + (OutputSections.size() + 1) * sizeof(Elf_Shdr); } // Finalize the program headers. We call this function after we assign // file offsets and VAs to all sections. template void Writer::setPhdrs() { for (PhdrEntry &P : Phdrs) { OutputSection *First = P.First; OutputSection *Last = P.Last; if (First) { P.p_filesz = Last->Offset - First->Offset; if (Last->Type != SHT_NOBITS) P.p_filesz += Last->Size; P.p_memsz = Last->Addr + Last->Size - First->Addr; P.p_offset = First->Offset; P.p_vaddr = First->Addr; if (!P.HasLMA) P.p_paddr = First->getLMA(); } if (P.p_type == PT_LOAD) P.p_align = Config->MaxPageSize; else if (P.p_type == PT_GNU_RELRO) { P.p_align = 1; // The glibc dynamic loader rounds the size down, so we need to round up // to protect the last page. This is a no-op on FreeBSD which always // rounds up. P.p_memsz = alignTo(P.p_memsz, Target->PageSize); } // The TLS pointer goes after PT_TLS. At least glibc will align it, // so round up the size to make sure the offsets are correct. if (P.p_type == PT_TLS) { Out::TlsPhdr = &P; if (P.p_memsz) P.p_memsz = alignTo(P.p_memsz, P.p_align); } } } // The entry point address is chosen in the following ways. // // 1. the '-e' entry command-line option; // 2. the ENTRY(symbol) command in a linker control script; // 3. the value of the symbol start, if present; // 4. the address of the first byte of the .text section, if present; // 5. the address 0. template uint64_t Writer::getEntryAddr() { // Case 1, 2 or 3. As a special case, if the symbol is actually // a number, we'll use that number as an address. if (SymbolBody *B = Symtab::X->find(Config->Entry)) return B->getVA(); uint64_t Addr; if (to_integer(Config->Entry, Addr)) return Addr; // Case 4 if (OutputSection *Sec = findSection(".text")) { if (Config->WarnMissingEntry) warn("cannot find entry symbol " + Config->Entry + "; defaulting to 0x" + utohexstr(Sec->Addr)); return Sec->Addr; } // Case 5 if (Config->WarnMissingEntry) warn("cannot find entry symbol " + Config->Entry + "; not setting start address"); return 0; } static uint16_t getELFType() { if (Config->Pic) return ET_DYN; if (Config->Relocatable) return ET_REL; return ET_EXEC; } // This function is called after we have assigned address and size // to each section. This function fixes some predefined // symbol values that depend on section address and size. template void Writer::fixPredefinedSymbols() { auto Set = [](DefinedRegular *S1, DefinedRegular *S2, OutputSection *Sec, uint64_t Value) { if (S1) { S1->Section = Sec; S1->Value = Value; } if (S2) { S2->Section = Sec; S2->Value = Value; } }; // _etext is the first location after the last read-only loadable segment. // _edata is the first location after the last read-write loadable segment. // _end is the first location after the uninitialized data region. PhdrEntry *Last = nullptr; PhdrEntry *LastRO = nullptr; PhdrEntry *LastRW = nullptr; for (PhdrEntry &P : Phdrs) { if (P.p_type != PT_LOAD) continue; Last = &P; if (P.p_flags & PF_W) LastRW = &P; else LastRO = &P; } if (Last) Set(ElfSym::End1, ElfSym::End2, Last->First, Last->p_memsz); if (LastRO) Set(ElfSym::Etext1, ElfSym::Etext2, LastRO->First, LastRO->p_filesz); if (LastRW) Set(ElfSym::Edata1, ElfSym::Edata2, LastRW->First, LastRW->p_filesz); if (ElfSym::Bss) ElfSym::Bss->Section = findSection(".bss"); // Setup MIPS _gp_disp/__gnu_local_gp symbols which should // be equal to the _gp symbol's value. if (Config->EMachine == EM_MIPS) { if (!ElfSym::MipsGp->Value) { // Find GP-relative section with the lowest address // and use this address to calculate default _gp value. uint64_t Gp = -1; for (const OutputSection *OS : OutputSections) if ((OS->Flags & SHF_MIPS_GPREL) && OS->Addr < Gp) Gp = OS->Addr; if (Gp != (uint64_t)-1) ElfSym::MipsGp->Value = Gp + 0x7ff0; } } } template void Writer::writeHeader() { uint8_t *Buf = Buffer->getBufferStart(); memcpy(Buf, "\177ELF", 4); // Write the ELF header. auto *EHdr = reinterpret_cast(Buf); EHdr->e_ident[EI_CLASS] = Config->Is64 ? ELFCLASS64 : ELFCLASS32; EHdr->e_ident[EI_DATA] = Config->IsLE ? ELFDATA2LSB : ELFDATA2MSB; EHdr->e_ident[EI_VERSION] = EV_CURRENT; EHdr->e_ident[EI_OSABI] = Config->OSABI; EHdr->e_type = getELFType(); EHdr->e_machine = Config->EMachine; EHdr->e_version = EV_CURRENT; EHdr->e_entry = getEntryAddr(); EHdr->e_shoff = SectionHeaderOff; EHdr->e_ehsize = sizeof(Elf_Ehdr); EHdr->e_phnum = Phdrs.size(); EHdr->e_shentsize = sizeof(Elf_Shdr); EHdr->e_shnum = OutputSections.size() + 1; EHdr->e_shstrndx = InX::ShStrTab->OutSec->SectionIndex; if (Config->EMachine == EM_ARM) // We don't currently use any features incompatible with EF_ARM_EABI_VER5, // but we don't have any firm guarantees of conformance. Linux AArch64 // kernels (as of 2016) require an EABI version to be set. EHdr->e_flags = EF_ARM_EABI_VER5; else if (Config->EMachine == EM_MIPS) EHdr->e_flags = getMipsEFlags(); if (!Config->Relocatable) { EHdr->e_phoff = sizeof(Elf_Ehdr); EHdr->e_phentsize = sizeof(Elf_Phdr); } // Write the program header table. auto *HBuf = reinterpret_cast(Buf + EHdr->e_phoff); for (PhdrEntry &P : Phdrs) { HBuf->p_type = P.p_type; HBuf->p_flags = P.p_flags; HBuf->p_offset = P.p_offset; HBuf->p_vaddr = P.p_vaddr; HBuf->p_paddr = P.p_paddr; HBuf->p_filesz = P.p_filesz; HBuf->p_memsz = P.p_memsz; HBuf->p_align = P.p_align; ++HBuf; } // Write the section header table. Note that the first table entry is null. auto *SHdrs = reinterpret_cast(Buf + EHdr->e_shoff); for (OutputSection *Sec : OutputSections) Sec->writeHeaderTo(++SHdrs); } // Open a result file. template void Writer::openFile() { if (!Config->Is64 && FileSize > UINT32_MAX) { error("output file too large: " + Twine(FileSize) + " bytes"); return; } unlinkAsync(Config->OutputFile); ErrorOr> BufferOrErr = FileOutputBuffer::create(Config->OutputFile, FileSize, FileOutputBuffer::F_executable); if (auto EC = BufferOrErr.getError()) error("failed to open " + Config->OutputFile + ": " + EC.message()); else Buffer = std::move(*BufferOrErr); } template void Writer::writeSectionsBinary() { uint8_t *Buf = Buffer->getBufferStart(); for (OutputSection *Sec : OutputSections) if (Sec->Flags & SHF_ALLOC) Sec->writeTo(Buf + Sec->Offset); } // Write section contents to a mmap'ed file. template void Writer::writeSections() { uint8_t *Buf = Buffer->getBufferStart(); // PPC64 needs to process relocations in the .opd section // before processing relocations in code-containing sections. Out::Opd = findSection(".opd"); if (Out::Opd) { Out::OpdBuf = Buf + Out::Opd->Offset; Out::Opd->template writeTo(Buf + Out::Opd->Offset); } OutputSection *EhFrameHdr = In::EhFrameHdr ? In::EhFrameHdr->OutSec : nullptr; // In -r or -emit-relocs mode, write the relocation sections first as in // ELf_Rel targets we might find out that we need to modify the relocated // section while doing it. for (OutputSection *Sec : OutputSections) if (Sec->Type == SHT_REL || Sec->Type == SHT_RELA) Sec->writeTo(Buf + Sec->Offset); for (OutputSection *Sec : OutputSections) if (Sec != Out::Opd && Sec != EhFrameHdr && Sec->Type != SHT_REL && Sec->Type != SHT_RELA) Sec->writeTo(Buf + Sec->Offset); // The .eh_frame_hdr depends on .eh_frame section contents, therefore // it should be written after .eh_frame is written. if (EhFrameHdr && !EhFrameHdr->Sections.empty()) EhFrameHdr->writeTo(Buf + EhFrameHdr->Offset); } template void Writer::writeBuildId() { if (!InX::BuildId || !InX::BuildId->OutSec) return; // Compute a hash of all sections of the output file. uint8_t *Start = Buffer->getBufferStart(); uint8_t *End = Start + FileSize; InX::BuildId->writeBuildId({Start, End}); } template void elf::writeResult(); template void elf::writeResult(); template void elf::writeResult(); template void elf::writeResult();