Index: head/sys/dev/drm2/drm_pciids.h =================================================================== --- head/sys/dev/drm2/drm_pciids.h (revision 316748) +++ head/sys/dev/drm2/drm_pciids.h (revision 316749) @@ -1,1043 +1,1044 @@ /* * $FreeBSD$ */ /* * Generated by gen-drm_pciids from: * o previous FreeBSD's drm_pciids.h * o Linux' drm_pciids.h * o the PCI ID repository (http://pciids.sourceforge.net/) * * See tools/tools/drm/gen-drm_pciids. */ #define ffb_PCI_IDS \ {0, 0, 0, NULL} #define gamma_PCI_IDS \ {0x3D3D, 0x0008, 0, "3DLabs GLINT Gamma G1"}, \ {0, 0, 0, NULL} #define i810_PCI_IDS \ {0x8086, 0x1132, 0, "Intel i815 GMCH"}, \ {0x8086, 0x7121, 0, "Intel i810 GMCH"}, \ {0x8086, 0x7123, 0, "Intel i810-DC100 GMCH"}, \ {0x8086, 0x7125, 0, "Intel i810E GMCH"}, \ {0, 0, 0, NULL} #define i830_PCI_IDS \ {0x8086, 0x2562, 0, "Intel i845G GMCH"}, \ {0x8086, 0x2572, 0, "Intel i865G GMCH"}, \ {0x8086, 0x3577, 0, "Intel i830M GMCH"}, \ {0x8086, 0x3582, 0, "Intel i852GM/i855GM GMCH"}, \ {0, 0, 0, NULL} #define i915_PCI_IDS \ {0x8086, 0x0042, 0, "Intel IronLake"}, \ {0x8086, 0x0046, 0, "Intel IronLake"}, \ {0x8086, 0x0102, 0, "Intel SandyBridge"}, \ {0x8086, 0x0106, 0, "Intel SandyBridge (M)"}, \ {0x8086, 0x010A, 0, "Intel SandyBridge (M)"}, \ {0x8086, 0x0112, 0, "Intel SandyBridge"}, \ {0x8086, 0x0116, 0, "Intel SandyBridge (M)"}, \ {0x8086, 0x0122, 0, "Intel SandyBridge"}, \ {0x8086, 0x0126, 0, "Intel SandyBridge (M)"}, \ {0x8086, 0x0152, 0, "Intel IvyBridge"}, \ {0x8086, 0x0156, 0, "Intel IvyBridge (M)"}, \ {0x8086, 0x015A, 0, "Intel IvyBridge (S)"}, \ {0x8086, 0x0162, 0, "Intel IvyBridge"}, \ {0x8086, 0x0166, 0, "Intel IvyBridge (M)"}, \ {0x8086, 0x016A, 0, "Intel IvyBridge (S)"}, \ {0x8086, 0x0402, 0, "Intel Haswell (GT1 desktop)"}, \ {0x8086, 0x0406, 0, "Intel Haswell (GT1 mobile)"}, \ {0x8086, 0x040A, 0, "Intel Haswell (GT1 server)"}, \ {0x8086, 0x0412, 0, "Intel Haswell (GT2 desktop)"}, \ {0x8086, 0x0416, 0, "Intel Haswell (GT2 mobile)"}, \ {0x8086, 0x041A, 0, "Intel Haswell (GT2 server)"}, \ + {0x8086, 0x041E, 0, "Intel Haswell (GT2 desktop)"}, \ {0x8086, 0x0422, 0, "Intel Haswell (GT2 desktop)"}, \ {0x8086, 0x0426, 0, "Intel Haswell (GT2 mobile)"}, \ {0x8086, 0x042A, 0, "Intel Haswell (GT2 server)"}, \ {0x8086, 0x0A02, 0, "Intel Haswell (ULT GT1 desktop)"}, \ {0x8086, 0x0A06, 0, "Intel Haswell (ULT GT1 mobile)"}, \ {0x8086, 0x0A0A, 0, "Intel Haswell (ULT GT1 server)"}, \ {0x8086, 0x0A12, 0, "Intel Haswell (ULT GT2 desktop)"}, \ {0x8086, 0x0A16, 0, "Intel Haswell (ULT GT2 mobile)"}, \ {0x8086, 0x0A1A, 0, "Intel Haswell (ULT GT2 server)"}, \ {0x8086, 0x0A22, 0, "Intel Haswell (ULT GT2 desktop)"}, \ {0x8086, 0x0A26, 0, "Intel Haswell (ULT GT2 mobile)"}, \ {0x8086, 0x0A2A, 0, "Intel Haswell (ULT GT2 server)"}, \ {0x8086, 0x0C02, 0, "Intel Haswell (SDV GT1 desktop)"}, \ {0x8086, 0x0C06, 0, "Intel Haswell (SDV GT1 mobile)"}, \ {0x8086, 0x0C0A, 0, "Intel Haswell (SDV GT1 server)"}, \ {0x8086, 0x0C12, 0, "Intel Haswell (SDV GT2 desktop)"}, \ {0x8086, 0x0C16, 0, "Intel Haswell (SDV GT2 mobile)"}, \ {0x8086, 0x0C1A, 0, "Intel Haswell (SDV GT2 server)"}, \ {0x8086, 0x0C22, 0, "Intel Haswell (SDV GT2 desktop)"}, \ {0x8086, 0x0C26, 0, "Intel Haswell (SDV GT2 mobile)"}, \ {0x8086, 0x0C2A, 0, "Intel Haswell (SDV GT2 server)"}, \ {0x8086, 0x0D02, 0, "Intel Haswell (CRW GT1 desktop)"}, \ {0x8086, 0x0D06, 0, "Intel Haswell (CRW GT1 mobile)"}, \ {0x8086, 0x0D0A, 0, "Intel Haswell (CRW GT1 server)"}, \ {0x8086, 0x0D12, 0, "Intel Haswell (CRW GT2 desktop)"}, \ {0x8086, 0x0D16, 0, "Intel Haswell (CRW GT2 mobile)"}, \ {0x8086, 0x0D1A, 0, "Intel Haswell (CRW GT2 server)"}, \ {0x8086, 0x0D22, 0, "Intel Haswell (CRW GT2 desktop)"}, \ {0x8086, 0x0D26, 0, "Intel Haswell (CRW GT2 mobile)"}, \ {0x8086, 0x0D2A, 0, "Intel Haswell (CRW GT2 server)"}, \ {0x8086, 0x0155, 0, "Intel Valleyview (desktop)"}, \ {0x8086, 0x0157, 0, "Intel Valleyview (mobile)"}, \ {0x8086, 0x0F30, 0, "Intel Valleyview (mobile)"}, \ {0x8086, 0x2562, 0, "Intel i845G GMCH"}, \ {0x8086, 0x2572, 0, "Intel i865G GMCH"}, \ {0x8086, 0x2582, 0, "Intel i915G"}, \ {0x8086, 0x258A, 0, "Intel E7221 (i915)"}, \ {0x8086, 0x2592, 0, "Intel i915GM"}, \ {0x8086, 0x2772, 0, "Intel i945G"}, \ {0x8086, 0x27A2, 0, "Intel i945GM"}, \ {0x8086, 0x27AE, 0, "Intel i945GME"}, \ {0x8086, 0x2972, 0, "Intel i946GZ"}, \ {0x8086, 0x2982, 0, "Intel i965G"}, \ {0x8086, 0x2992, 0, "Intel i965Q"}, \ {0x8086, 0x29A2, 0, "Intel i965G"}, \ {0x8086, 0x29B2, 0, "Intel Q35"}, \ {0x8086, 0x29C2, 0, "Intel G33"}, \ {0x8086, 0x29D2, 0, "Intel Q33"}, \ {0x8086, 0x2A02, 0, "Intel i965GM"}, \ {0x8086, 0x2A12, 0, "Intel i965GME/GLE"}, \ {0x8086, 0x2A42, 0, "Mobile Intel® GM45 Express Chipset"}, \ {0x8086, 0x2E02, 0, "Intel Eaglelake"}, \ {0x8086, 0x2E12, 0, "Intel Q45/Q43"}, \ {0x8086, 0x2E22, 0, "Intel G45/G43"}, \ {0x8086, 0x2E32, 0, "Intel G41"}, \ {0x8086, 0x2E42, 0, "Intel G43 ?"}, \ {0x8086, 0x2E92, 0, "Intel G43 ?"}, \ {0x8086, 0x3577, 0, "Intel i830M GMCH"}, \ {0x8086, 0x3582, 0, "Intel i852GM/i855GM GMCH"}, \ {0x8086, 0x358E, 0, "Intel i852GM/i855GM GMCH"}, \ {0x8086, 0xA001, 0, "Intel Pineview"}, \ {0x8086, 0xA011, 0, "Intel Pineview (M)"}, \ {0, 0, 0, NULL} #define imagine_PCI_IDS \ {0x105D, 0x2309, IMAGINE_128, "Imagine 128"}, \ {0x105D, 0x2339, IMAGINE_128_2, "Imagine 128-II"}, \ {0x105D, 0x493D, IMAGINE_T2R, "Ticket to Ride"}, \ {0x105D, 0x5348, IMAGINE_REV4, "Revolution IV"}, \ {0, 0, 0, NULL} #define mach64_PCI_IDS \ {0x1002, 0x4742, 0, "3D Rage Pro AGP 1X/2X"}, \ {0x1002, 0x4744, 0, "3D Rage Pro AGP 1X"}, \ {0x1002, 0x4749, 0, "3D Rage Pro"}, \ {0x1002, 0x474C, 0, "Rage XC"}, \ {0x1002, 0x474D, 0, "Rage XL AGP 2X"}, \ {0x1002, 0x474E, 0, "Rage XC AGP"}, \ {0x1002, 0x474F, 0, "Rage XL"}, \ {0x1002, 0x4750, 0, "3D Rage Pro 215GP"}, \ {0x1002, 0x4751, 0, "3D Rage Pro 215GQ"}, \ {0x1002, 0x4752, 0, "Rage XL"}, \ {0x1002, 0x4753, 0, "Rage XC"}, \ {0x1002, 0x4C42, 0, "3D Rage LT Pro AGP-133"}, \ {0x1002, 0x4C44, 0, "3D Rage LT Pro AGP-66"}, \ {0x1002, 0x4C49, 0, "3D Rage LT Pro"}, \ {0x1002, 0x4C4D, 0, "Rage Mobility P/M AGP 2X"}, \ {0x1002, 0x4C4E, 0, "Rage Mobility L AGP 2X"}, \ {0x1002, 0x4C50, 0, "3D Rage LT Pro"}, \ {0x1002, 0x4C51, 0, "3D Rage LT Pro"}, \ {0x1002, 0x4C52, 0, "Rage Mobility P/M"}, \ {0x1002, 0x4C53, 0, "Rage Mobility L"}, \ {0, 0, 0, NULL} #define mga_PCI_IDS \ {0x102B, 0x0520, MGA_CARD_TYPE_G200, "Matrox G200 (PCI)"}, \ {0x102B, 0x0521, MGA_CARD_TYPE_G200, "Matrox G200 (AGP)"}, \ {0x102B, 0x0525, MGA_CARD_TYPE_G400, "Matrox G400/G450 (AGP)"}, \ {0x102B, 0x2527, MGA_CARD_TYPE_G550, "Matrox G550 (AGP)"}, \ {0, 0, 0, NULL} #define nv_PCI_IDS \ {0x10DE, 0x0020, NV04, "NVidia RIVA TNT"}, \ {0x10DE, 0x0028, NV04, "NVidia RIVA TNT2"}, \ {0x10DE, 0x0029, NV04, "NVidia RIVA TNT2 Ultra"}, \ {0x10DE, 0x002A, NV04, "NVidia Unknown TNT2"}, \ {0x10DE, 0x002C, NV04, "NVidia Vanta"}, \ {0x10DE, 0x002D, NV04, "NVidia RIVA TNT2 Model 64"}, \ {0x10DE, 0x0040, NV40, "NVidia GeForce 6800 Ultra"}, \ {0x10DE, 0x0041, NV40, "NVidia GeForce 6800"}, \ {0x10DE, 0x0042, NV40, "NVidia GeForce 6800 LE"}, \ {0x10DE, 0x0043, NV40, "NVidia 0x0043"}, \ {0x10DE, 0x0045, NV40, "NVidia GeForce 6800 GT"}, \ {0x10DE, 0x0046, NV40, "NVidia GeForce 6800 GT"}, \ {0x10DE, 0x0049, NV40, "NVidia 0x0049"}, \ {0x10DE, 0x004E, NV40, "NVidia Quadro FX 4000"}, \ {0x10DE, 0x0090, NV40, "NVidia 0x0090"}, \ {0x10DE, 0x0091, NV40, "NVidia GeForce 7800 GTX"}, \ {0x10DE, 0x0092, NV40, "NVidia 0x0092"}, \ {0x10DE, 0x0093, NV40, "NVidia 0x0093"}, \ {0x10DE, 0x0094, NV40, "NVidia 0x0094"}, \ {0x10DE, 0x0098, NV40, "NVidia 0x0098"}, \ {0x10DE, 0x0099, NV40, "NVidia GeForce Go 7800 GTX"}, \ {0x10DE, 0x009C, NV40, "NVidia 0x009C"}, \ {0x10DE, 0x009D, NV40, "NVidia Quadro FX 4500"}, \ {0x10DE, 0x009E, NV40, "NVidia 0x009E"}, \ {0x10DE, 0x00A0, NV04, "NVidia Aladdin TNT2"}, \ {0x10DE, 0x00C0, NV40, "NVidia 0x00C0"}, \ {0x10DE, 0x00C1, NV40, "NVidia GeForce 6800"}, \ {0x10DE, 0x00C2, NV40, "NVidia GeForce 6800 LE"}, \ {0x10DE, 0x00C8, NV40, "NVidia GeForce Go 6800"}, \ {0x10DE, 0x00C9, NV40, "NVidia GeForce Go 6800 Ultra"}, \ {0x10DE, 0x00CC, NV40, "NVidia Quadro FX Go1400"}, \ {0x10DE, 0x00CD, NV40, "NVidia Quadro FX 3450/4000 SDI"}, \ {0x10DE, 0x00CE, NV40, "NVidia Quadro FX 1400"}, \ {0x10DE, 0x00F0, NV40, "Nvidia GeForce 6600 GT"}, \ {0x10DE, 0x00F1, NV40, "Nvidia GeForce 6600 GT"}, \ {0x10DE, 0x0100, NV10, "NVidia GeForce 256"}, \ {0x10DE, 0x0101, NV10, "NVidia GeForce DDR"}, \ {0x10DE, 0x0103, NV10, "NVidia Quadro"}, \ {0x10DE, 0x0110, NV10, "NVidia GeForce2 MX/MX 400"}, \ {0x10DE, 0x0111, NV10, "NVidia GeForce2 MX 100/200"}, \ {0x10DE, 0x0112, NV10, "NVidia GeForce2 Go"}, \ {0x10DE, 0x0113, NV10, "NVidia Quadro2 MXR/EX/Go"}, \ {0x10DE, 0x0140, NV40, "NVidia GeForce 6600 GT"}, \ {0x10DE, 0x0141, NV40, "NVidia GeForce 6600"}, \ {0x10DE, 0x0142, NV40, "NVidia GeForce 6600 LE"}, \ {0x10DE, 0x0143, NV40, "NVidia 0x0143"}, \ {0x10DE, 0x0144, NV40, "NVidia GeForce Go 6600"}, \ {0x10DE, 0x0145, NV40, "NVidia GeForce 6610 XL"}, \ {0x10DE, 0x0146, NV40, "NVidia GeForce Go 6600 TE/6200 TE"}, \ {0x10DE, 0x0147, NV40, "NVidia GeForce 6700 XL"}, \ {0x10DE, 0x0148, NV40, "NVidia GeForce Go 6600"}, \ {0x10DE, 0x0149, NV40, "NVidia GeForce Go 6600 GT"}, \ {0x10DE, 0x014B, NV40, "NVidia 0x014B"}, \ {0x10DE, 0x014C, NV40, "NVidia 0x014C"}, \ {0x10DE, 0x014D, NV40, "NVidia 0x014D"}, \ {0x10DE, 0x014E, NV40, "NVidia Quadro FX 540"}, \ {0x10DE, 0x014F, NV40, "NVidia GeForce 6200"}, \ {0x10DE, 0x0150, NV10, "NVidia GeForce2 GTS"}, \ {0x10DE, 0x0151, NV10, "NVidia GeForce2 Ti"}, \ {0x10DE, 0x0152, NV10, "NVidia GeForce2 Ultra"}, \ {0x10DE, 0x0153, NV10, "NVidia Quadro2 Pro"}, \ {0x10DE, 0x0160, NV40, "NVidia 0x0160"}, \ {0x10DE, 0x0161, NV40, "NVidia GeForce 6200 TurboCache(TM)"}, \ {0x10DE, 0x0162, NV40, "NVidia GeForce 6200SE TurboCache(TM)"}, \ {0x10DE, 0x0163, NV40, "NVidia 0x0163"}, \ {0x10DE, 0x0164, NV40, "NVidia GeForce Go 6200"}, \ {0x10DE, 0x0165, NV40, "NVidia Quadro NVS 285"}, \ {0x10DE, 0x0166, NV40, "NVidia GeForce Go 6400"}, \ {0x10DE, 0x0167, NV40, "NVidia GeForce Go 6200"}, \ {0x10DE, 0x0168, NV40, "NVidia GeForce Go 6400"}, \ {0x10DE, 0x0169, NV40, "NVidia 0x0169"}, \ {0x10DE, 0x016B, NV40, "NVidia 0x016B"}, \ {0x10DE, 0x016C, NV40, "NVidia 0x016C"}, \ {0x10DE, 0x016D, NV40, "NVidia 0x016D"}, \ {0x10DE, 0x016E, NV40, "NVidia 0x016E"}, \ {0x10DE, 0x0170, NV10, "NVidia GeForce4 MX 460"}, \ {0x10DE, 0x0171, NV10, "NVidia GeForce4 MX 440"}, \ {0x10DE, 0x0172, NV10, "NVidia GeForce4 MX 420"}, \ {0x10DE, 0x0173, NV10, "NVidia GeForce4 MX 440-SE"}, \ {0x10DE, 0x0174, NV10, "NVidia GeForce4 440 Go"}, \ {0x10DE, 0x0175, NV10, "NVidia GeForce4 420 Go"}, \ {0x10DE, 0x0176, NV10, "NVidia GeForce4 420 Go 32M"}, \ {0x10DE, 0x0177, NV10, "NVidia GeForce4 460 Go"}, \ {0x10DE, 0x0178, NV10, "NVidia Quadro4 550 XGL"}, \ {0x10DE, 0x0179, NV10, "NVidia GeForce4"}, \ {0x10DE, 0x017A, NV10, "NVidia Quadro4 NVS"}, \ {0x10DE, 0x017C, NV10, "NVidia Quadro4 500 GoGL"}, \ {0x10DE, 0x017D, NV10, "NVidia GeForce4 410 Go 16M"}, \ {0x10DE, 0x0181, NV10, "NVidia GeForce4 MX 440 with AGP8X"}, \ {0x10DE, 0x0182, NV10, "NVidia GeForce4 MX 440SE with AGP8X"}, \ {0x10DE, 0x0183, NV10, "NVidia GeForce4 MX 420 with AGP8X"}, \ {0x10DE, 0x0185, NV10, "NVidia GeForce4 MX 4000"}, \ {0x10DE, 0x0186, NV10, "NVidia GeForce4 448 Go"}, \ {0x10DE, 0x0187, NV10, "NVidia GeForce4 488 Go"}, \ {0x10DE, 0x0188, NV10, "NVidia Quadro4 580 XGL"}, \ {0x10DE, 0x0189, NV10, "NVidia GeForce4 MX with AGP8X (Mac)"}, \ {0x10DE, 0x018A, NV10, "NVidia Quadro4 280 NVS"}, \ {0x10DE, 0x018B, NV10, "NVidia Quadro4 380 XGL"}, \ {0x10DE, 0x018C, NV10, "NVidia Quadro NVS 50 PCI"}, \ {0x10DE, 0x018D, NV10, "NVidia GeForce4 448 Go"}, \ {0x10DE, 0x01A0, NV10, "NVidia GeForce2 Integrated GPU"}, \ {0x10DE, 0x01F0, NV10, "NVidia GeForce4 MX Integrated GPU"}, \ {0x10DE, 0x0200, NV20, "NVidia GeForce3"}, \ {0x10DE, 0x0201, NV20, "NVidia GeForce3 Ti 200"}, \ {0x10DE, 0x0202, NV20, "NVidia GeForce3 Ti 500"}, \ {0x10DE, 0x0203, NV20, "NVidia Quadro DCC"}, \ {0x10DE, 0x0210, NV40, "NVidia 0x0210"}, \ {0x10DE, 0x0211, NV40, "NVidia GeForce 6800"}, \ {0x10DE, 0x0212, NV40, "NVidia GeForce 6800 LE"}, \ {0x10DE, 0x0215, NV40, "NVidia GeForce 6800 GT"}, \ {0x10DE, 0x0220, NV40, "NVidia 0x0220"}, \ {0x10DE, 0x0221, NV40, "NVidia GeForce 6200"}, \ {0x10DE, 0x0222, NV40, "NVidia 0x0222"}, \ {0x10DE, 0x0228, NV40, "NVidia 0x0228"}, \ {0x10DE, 0x0250, NV20, "NVidia GeForce4 Ti 4600"}, \ {0x10DE, 0x0251, NV20, "NVidia GeForce4 Ti 4400"}, \ {0x10DE, 0x0252, NV20, "NVidia 0x0252"}, \ {0x10DE, 0x0253, NV20, "NVidia GeForce4 Ti 4200"}, \ {0x10DE, 0x0258, NV20, "NVidia Quadro4 900 XGL"}, \ {0x10DE, 0x0259, NV20, "NVidia Quadro4 750 XGL"}, \ {0x10DE, 0x025B, NV20, "NVidia Quadro4 700 XGL"}, \ {0x10DE, 0x0280, NV20, "NVidia GeForce4 Ti 4800"}, \ {0x10DE, 0x0281, NV20, "NVidia GeForce4 Ti 4200 with AGP8X"}, \ {0x10DE, 0x0282, NV20, "NVidia GeForce4 Ti 4800 SE"}, \ {0x10DE, 0x0286, NV20, "NVidia GeForce4 4200 Go"}, \ {0x10DE, 0x0288, NV20, "NVidia Quadro4 980 XGL"}, \ {0x10DE, 0x0289, NV20, "NVidia Quadro4 780 XGL"}, \ {0x10DE, 0x028C, NV20, "NVidia Quadro4 700 GoGL"}, \ {0x10DE, 0x0301, NV30, "NVidia GeForce FX 5800 Ultra"}, \ {0x10DE, 0x0302, NV30, "NVidia GeForce FX 5800"}, \ {0x10DE, 0x0308, NV30, "NVidia Quadro FX 2000"}, \ {0x10DE, 0x0309, NV30, "NVidia Quadro FX 1000"}, \ {0x10DE, 0x0311, NV30, "NVidia GeForce FX 5600 Ultra"}, \ {0x10DE, 0x0312, NV30, "NVidia GeForce FX 5600"}, \ {0x10DE, 0x0313, NV30, "NVidia 0x0313"}, \ {0x10DE, 0x0314, NV30, "NVidia GeForce FX 5600SE"}, \ {0x10DE, 0x0316, NV30, "NVidia 0x0316"}, \ {0x10DE, 0x0317, NV30, "NVidia 0x0317"}, \ {0x10DE, 0x031A, NV30, "NVidia GeForce FX Go5600"}, \ {0x10DE, 0x031B, NV30, "NVidia GeForce FX Go5650"}, \ {0x10DE, 0x031C, NV30, "NVidia Quadro FX Go700"}, \ {0x10DE, 0x031D, NV30, "NVidia 0x031D"}, \ {0x10DE, 0x031E, NV30, "NVidia 0x031E"}, \ {0x10DE, 0x031F, NV30, "NVidia 0x031F"}, \ {0x10DE, 0x0320, NV30, "NVidia GeForce FX 5200"}, \ {0x10DE, 0x0321, NV30, "NVidia GeForce FX 5200 Ultra"}, \ {0x10DE, 0x0322, NV30, "NVidia GeForce FX 5200"}, \ {0x10DE, 0x0323, NV30, "NVidia GeForce FX 5200SE"}, \ {0x10DE, 0x0324, NV30, "NVidia GeForce FX Go5200"}, \ {0x10DE, 0x0325, NV30, "NVidia GeForce FX Go5250"}, \ {0x10DE, 0x0326, NV30, "NVidia GeForce FX 5500"}, \ {0x10DE, 0x0327, NV30, "NVidia GeForce FX 5100"}, \ {0x10DE, 0x0328, NV30, "NVidia GeForce FX Go5200 32M/64M"}, \ {0x10DE, 0x0329, NV30, "NVidia GeForce FX 5200 (Mac)"}, \ {0x10DE, 0x032A, NV30, "NVidia Quadro NVS 280 PCI"}, \ {0x10DE, 0x032B, NV30, "NVidia Quadro FX 500/600 PCI"}, \ {0x10DE, 0x032C, NV30, "NVidia GeForce FX Go53xx Series"}, \ {0x10DE, 0x032D, NV30, "NVidia GeForce FX Go5100"}, \ {0x10DE, 0x032F, NV30, "NVidia 0x032F"}, \ {0x10DE, 0x0330, NV30, "NVidia GeForce FX 5900 Ultra"}, \ {0x10DE, 0x0331, NV30, "NVidia GeForce FX 5900"}, \ {0x10DE, 0x0332, NV30, "NVidia GeForce FX 5900XT"}, \ {0x10DE, 0x0333, NV30, "NVidia GeForce FX 5950 Ultra"}, \ {0x10DE, 0x0334, NV30, "NVidia GeForce FX 5900ZT"}, \ {0x10DE, 0x0338, NV30, "NVidia Quadro FX 3000"}, \ {0x10DE, 0x033F, NV30, "NVidia Quadro FX 700"}, \ {0x10DE, 0x0341, NV30, "NVidia GeForce FX 5700 Ultra"}, \ {0x10DE, 0x0342, NV30, "NVidia GeForce FX 5700"}, \ {0x10DE, 0x0343, NV30, "NVidia GeForce FX 5700LE"}, \ {0x10DE, 0x0344, NV30, "NVidia GeForce FX 5700VE"}, \ {0x10DE, 0x0345, NV30, "NVidia 0x0345"}, \ {0x10DE, 0x0347, NV30, "NVidia GeForce FX Go5700"}, \ {0x10DE, 0x0348, NV30, "NVidia GeForce FX Go5700"}, \ {0x10DE, 0x0349, NV30, "NVidia 0x0349"}, \ {0x10DE, 0x034B, NV30, "NVidia 0x034B"}, \ {0x10DE, 0x034C, NV30, "NVidia Quadro FX Go1000"}, \ {0x10DE, 0x034E, NV30, "NVidia Quadro FX 1100"}, \ {0x10DE, 0x034F, NV30, "NVidia 0x034F"}, \ {0, 0, 0, NULL} #define r128_PCI_IDS \ {0x1002, 0x4C45, 0, "ATI Rage 128 Mobility LE (PCI)"}, \ {0x1002, 0x4C46, 0, "ATI Rage 128 Mobility LF (AGP)"}, \ {0x1002, 0x4D46, 0, "ATI Rage 128 Mobility MF (AGP)"}, \ {0x1002, 0x4D4C, 0, "ATI Rage 128 Mobility ML (AGP)"}, \ {0x1002, 0x5041, 0, "ATI Rage 128 Pro PA (PCI)"}, \ {0x1002, 0x5042, 0, "ATI Rage 128 Pro PB (AGP)"}, \ {0x1002, 0x5043, 0, "ATI Rage 128 Pro PC (AGP)"}, \ {0x1002, 0x5044, 0, "ATI Rage 128 Pro PD (PCI)"}, \ {0x1002, 0x5045, 0, "ATI Rage 128 Pro PE (AGP)"}, \ {0x1002, 0x5046, 0, "ATI Rage 128 Pro PF (AGP)"}, \ {0x1002, 0x5047, 0, "ATI Rage 128 Pro PG (PCI)"}, \ {0x1002, 0x5048, 0, "ATI Rage 128 Pro PH (AGP)"}, \ {0x1002, 0x5049, 0, "ATI Rage 128 Pro PI (AGP)"}, \ {0x1002, 0x504A, 0, "ATI Rage 128 Pro PJ (PCI)"}, \ {0x1002, 0x504B, 0, "ATI Rage 128 Pro PK (AGP)"}, \ {0x1002, 0x504C, 0, "ATI Rage 128 Pro PL (AGP)"}, \ {0x1002, 0x504D, 0, "ATI Rage 128 Pro PM (PCI)"}, \ {0x1002, 0x504E, 0, "ATI Rage 128 Pro PN (AGP)"}, \ {0x1002, 0x504F, 0, "ATI Rage 128 Pro PO (AGP)"}, \ {0x1002, 0x5050, 0, "ATI Rage 128 Pro PP (PCI)"}, \ {0x1002, 0x5051, 0, "ATI Rage 128 Pro PQ (AGP)"}, \ {0x1002, 0x5052, 0, "ATI Rage 128 Pro PR (PCI)"}, \ {0x1002, 0x5053, 0, "ATI Rage 128 Pro PS (PCI)"}, \ {0x1002, 0x5054, 0, "ATI Rage 128 Pro PT (AGP)"}, \ {0x1002, 0x5055, 0, "ATI Rage 128 Pro PU (AGP)"}, \ {0x1002, 0x5056, 0, "ATI Rage 128 Pro PV (PCI)"}, \ {0x1002, 0x5057, 0, "ATI Rage 128 Pro PW (AGP)"}, \ {0x1002, 0x5058, 0, "ATI Rage 128 Pro PX (AGP)"}, \ {0x1002, 0x5245, 0, "ATI Rage 128 RE (PCI)"}, \ {0x1002, 0x5246, 0, "ATI Rage 128 RF (AGP)"}, \ {0x1002, 0x5247, 0, "ATI Rage 128 RG (AGP)"}, \ {0x1002, 0x524B, 0, "ATI Rage 128 RK (PCI)"}, \ {0x1002, 0x524C, 0, "ATI Rage 128 RL (AGP)"}, \ {0x1002, 0x534D, 0, "ATI Rage 128 SM (AGP)"}, \ {0x1002, 0x5446, 0, "ATI Rage 128 Pro Ultra TF (AGP)"}, \ {0x1002, 0x544C, 0, "ATI Rage 128 Pro Ultra TL (AGP)"}, \ {0x1002, 0x5452, 0, "ATI Rage 128 Pro Ultra TR (AGP)"}, \ {0, 0, 0, NULL} #define radeon_PCI_IDS \ {0x1002, 0x3150, CHIP_RV380|RADEON_IS_MOBILITY, "ATI Radeon Mobility X600 M24"}, \ {0x1002, 0x3151, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "M24 [FireMV 2400]"}, \ {0x1002, 0x3152, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Radeon Mobility X300 M24"}, \ {0x1002, 0x3154, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI FireGL M24 GL"}, \ {0x1002, 0x3155, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "RV380 [FireMV 2400]"}, \ {0x1002, 0x3E50, CHIP_RV380|RADEON_NEW_MEMMAP, "ATI Radeon RV380 X600"}, \ {0x1002, 0x3E54, CHIP_RV380|RADEON_NEW_MEMMAP, "ATI FireGL V3200 RV380"}, \ {0x1002, 0x4136, CHIP_RS100|RADEON_IS_IGP, "ATI Radeon RS100 IGP 320"}, \ {0x1002, 0x4137, CHIP_RS200|RADEON_IS_IGP, "ATI Radeon RS200 IGP 340"}, \ {0x1002, 0x4144, CHIP_R300, "ATI Radeon AD 9500"}, \ {0x1002, 0x4145, CHIP_R300, "ATI Radeon AE 9700 Pro"}, \ {0x1002, 0x4146, CHIP_R300, "ATI Radeon AF R300 9600TX"}, \ {0x1002, 0x4147, CHIP_R300, "ATI FireGL AG Z1"}, \ {0x1002, 0x4148, CHIP_R350, "ATI Radeon AH 9800 SE"}, \ {0x1002, 0x4149, CHIP_R350, "ATI Radeon AI 9800"}, \ {0x1002, 0x414A, CHIP_R350, "ATI Radeon AJ 9800"}, \ {0x1002, 0x414B, CHIP_R350, "ATI FireGL AK X2"}, \ {0x1002, 0x4150, CHIP_RV350, "ATI Radeon AP 9600"}, \ {0x1002, 0x4151, CHIP_RV350, "ATI Radeon AQ 9600 SE"}, \ {0x1002, 0x4152, CHIP_RV350, "ATI Radeon AR 9600 XT"}, \ {0x1002, 0x4153, CHIP_RV350, "ATI Radeon AS 9550"}, \ {0x1002, 0x4154, CHIP_RV350, "ATI FireGL AT T2"}, \ {0x1002, 0x4155, CHIP_RV350, "ATI Radeon 9650"}, \ {0x1002, 0x4156, CHIP_RV350, "ATI FireGL AV RV360 T2"}, \ {0x1002, 0x4237, CHIP_RS200|RADEON_IS_IGP, "ATI Radeon RS250 IGP"}, \ {0x1002, 0x4242, CHIP_R200, "ATI Radeon BB R200 AIW 8500DV"}, \ {0x1002, 0x4243, CHIP_R200, "ATI Radeon BC R200"}, \ {0x1002, 0x4336, CHIP_RS100|RADEON_IS_IGP|RADEON_IS_MOBILITY, "ATI Radeon RS100 Mobility U1"}, \ {0x1002, 0x4337, CHIP_RS200|RADEON_IS_IGP|RADEON_IS_MOBILITY, "ATI Radeon RS200 Mobility IGP 340M"}, \ {0x1002, 0x4437, CHIP_RS200|RADEON_IS_IGP|RADEON_IS_MOBILITY, "ATI Radeon RS250 Mobility IGP"}, \ {0x1002, 0x4966, CHIP_RV250, "ATI Radeon If RV250 9000"}, \ {0x1002, 0x4967, CHIP_RV250, "ATI Radeon Ig RV250 9000"}, \ {0x1002, 0x4A48, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JH R420 X800"}, \ {0x1002, 0x4A49, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JI R420 X800 Pro"}, \ {0x1002, 0x4A4A, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JJ R420 X800 SE"}, \ {0x1002, 0x4A4B, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JK R420 X800 XT"}, \ {0x1002, 0x4A4C, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JL R420 X800"}, \ {0x1002, 0x4A4D, CHIP_R420|RADEON_NEW_MEMMAP, "ATI FireGL JM X3-256"}, \ {0x1002, 0x4A4E, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Radeon JN R420 Mobility M18"}, \ {0x1002, 0x4A4F, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JO R420 X800 SE"}, \ {0x1002, 0x4A50, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JP R420 X800 XT PE"}, \ {0x1002, 0x4A54, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JT R420 AIW X800 VE"}, \ {0x1002, 0x4B48, CHIP_R420|RADEON_NEW_MEMMAP, "R481 [Radeon X850 PCIe]"}, \ {0x1002, 0x4B49, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R481 X850 XT"}, \ {0x1002, 0x4B4A, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R481 X850 SE"}, \ {0x1002, 0x4B4B, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R481 X850 Pro"}, \ {0x1002, 0x4B4C, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R481 X850 XT PE"}, \ {0x1002, 0x4C57, CHIP_RV200|RADEON_IS_MOBILITY, "ATI Radeon LW RV200 Mobility 7500 M7"}, \ {0x1002, 0x4C58, CHIP_RV200|RADEON_IS_MOBILITY, "ATI Radeon LX RV200 Mobility FireGL 7800 M7"}, \ {0x1002, 0x4C59, CHIP_RV100|RADEON_IS_MOBILITY, "ATI Radeon LY RV100 Mobility M6"}, \ {0x1002, 0x4C5A, CHIP_RV100|RADEON_IS_MOBILITY, "ATI Radeon LZ RV100 Mobility M6"}, \ {0x1002, 0x4C64, CHIP_RV250|RADEON_IS_MOBILITY, "ATI Radeon Ld RV250 Mobility 9000 M9"}, \ {0x1002, 0x4C66, CHIP_RV250, "ATI Radeon Lf RV250 Mobility 9000 M9 / FireMV 2400 PCI"}, \ {0x1002, 0x4C67, CHIP_RV250|RADEON_IS_MOBILITY, "ATI Radeon Lg RV250 Mobility 9000 M9"}, \ {0x1002, 0x4C6E, CHIP_RV280|RADEON_IS_MOBILITY, "Radeon RV250 Ln [Radeon Mobility 9000 M9] (Secondary)"}, \ {0x1002, 0x4E44, CHIP_R300, "ATI Radeon ND R300 9700 Pro"}, \ {0x1002, 0x4E45, CHIP_R300, "ATI Radeon NE R300 9500 Pro / 9700"}, \ {0x1002, 0x4E46, CHIP_R300, "ATI Radeon NF R300 9600TX"}, \ {0x1002, 0x4E47, CHIP_R300, "ATI Radeon NG R300 FireGL X1"}, \ {0x1002, 0x4E48, CHIP_R350, "ATI Radeon NH R350 9800 Pro"}, \ {0x1002, 0x4E49, CHIP_R350, "ATI Radeon NI R350 9800"}, \ {0x1002, 0x4E4A, CHIP_R350, "ATI Radeon NJ R360 9800 XT"}, \ {0x1002, 0x4E4B, CHIP_R350, "ATI FireGL NK X2"}, \ {0x1002, 0x4E50, CHIP_RV350|RADEON_IS_MOBILITY, "ATI Radeon RV350 Mobility 9600 M10 NP"}, \ {0x1002, 0x4E51, CHIP_RV350|RADEON_IS_MOBILITY, "ATI Radeon RV350 Mobility 9600 M10 NQ"}, \ {0x1002, 0x4E52, CHIP_RV350|RADEON_IS_MOBILITY, "ATI Radeon RV350 Mobility 9600 M11 NR"}, \ {0x1002, 0x4E53, CHIP_RV350|RADEON_IS_MOBILITY, "ATI Radeon RV350 Mobility 9600 M10 NS"}, \ {0x1002, 0x4E54, CHIP_RV350|RADEON_IS_MOBILITY, "ATI FireGL T2/T2e"}, \ {0x1002, 0x4E56, CHIP_RV350|RADEON_IS_MOBILITY, "ATI Radeon Mobility 9550"}, \ {0x1002, 0x5144, CHIP_R100|RADEON_SINGLE_CRTC, "ATI Radeon QD R100"}, \ {0x1002, 0x5145, CHIP_R100|RADEON_SINGLE_CRTC, "ATI Radeon QE R100"}, \ {0x1002, 0x5146, CHIP_R100|RADEON_SINGLE_CRTC, "ATI Radeon QF R100"}, \ {0x1002, 0x5147, CHIP_R100|RADEON_SINGLE_CRTC, "ATI Radeon QG R100"}, \ {0x1002, 0x5148, CHIP_R200, "ATI Radeon QH R200 8500"}, \ {0x1002, 0x514C, CHIP_R200, "ATI Radeon QL R200 8500 LE"}, \ {0x1002, 0x514D, CHIP_R200, "ATI Radeon QM R200 9100"}, \ {0x1002, 0x5157, CHIP_RV200, "ATI Radeon QW RV200 7500"}, \ {0x1002, 0x5158, CHIP_RV200, "ATI Radeon QX RV200 7500"}, \ {0x1002, 0x5159, CHIP_RV100, "ATI Radeon QY RV100 7000/VE"}, \ {0x1002, 0x515A, CHIP_RV100, "ATI Radeon QZ RV100 7000/VE"}, \ {0x1002, 0x515E, CHIP_RV100, "ATI ES1000 RN50"}, \ {0x1002, 0x5460, CHIP_RV380|RADEON_IS_MOBILITY, "ATI Radeon Mobility X300 M22"}, \ {0x1002, 0x5462, CHIP_RV380|RADEON_IS_MOBILITY, "ATI Radeon Mobility X600 SE M24C"}, \ {0x1002, 0x5464, CHIP_RV380|RADEON_IS_MOBILITY, "ATI FireGL M22 GL 5464"}, \ {0x1002, 0x5548, CHIP_R423|RADEON_NEW_MEMMAP, "ATI Radeon R423 X800"}, \ {0x1002, 0x5549, CHIP_R423|RADEON_NEW_MEMMAP, "ATI Radeon R423 X800 Pro"}, \ {0x1002, 0x554A, CHIP_R423|RADEON_NEW_MEMMAP, "ATI Radeon R423 X800 XT PE"}, \ {0x1002, 0x554B, CHIP_R423|RADEON_NEW_MEMMAP, "ATI Radeon R423 X800 SE"}, \ {0x1002, 0x554C, CHIP_R423|RADEON_NEW_MEMMAP, "ATI Radeon R430 X800 XTP"}, \ {0x1002, 0x554D, CHIP_R423|RADEON_NEW_MEMMAP, "ATI Radeon R430 X800 XL"}, \ {0x1002, 0x554E, CHIP_R423|RADEON_NEW_MEMMAP, "ATI Radeon R430 X800 SE"}, \ {0x1002, 0x554F, CHIP_R423|RADEON_NEW_MEMMAP, "ATI Radeon R430 X800"}, \ {0x1002, 0x5550, CHIP_R423|RADEON_NEW_MEMMAP, "ATI FireGL V7100 R423"}, \ {0x1002, 0x5551, CHIP_R423|RADEON_NEW_MEMMAP, "ATI FireGL V5100 R423 UQ"}, \ {0x1002, 0x5552, CHIP_R423|RADEON_NEW_MEMMAP, "ATI FireGL unknown R423 UR"}, \ {0x1002, 0x5554, CHIP_R423|RADEON_NEW_MEMMAP, "ATI FireGL unknown R423 UT"}, \ {0x1002, 0x564A, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V5000 M26"}, \ {0x1002, 0x564B, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V5000 M26"}, \ {0x1002, 0x564F, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Radeon Mobility X700 XL M26"}, \ {0x1002, 0x5652, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Radeon Mobility X700 M26"}, \ {0x1002, 0x5653, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Radeon Mobility X700 M26"}, \ {0x1002, 0x5657, CHIP_RV410|RADEON_NEW_MEMMAP, "ATI Radeon X550XTX"}, \ {0x1002, 0x5834, CHIP_RS300|RADEON_IS_IGP, "ATI Radeon RS300 9100 IGP"}, \ {0x1002, 0x5835, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY, "ATI Radeon RS300 Mobility IGP"}, \ {0x1002, 0x5954, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_IGPGART, "ATI RS480 XPRESS 200G"}, \ {0x1002, 0x5955, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART, "ATI Radeon XPRESS 200M 5955"}, \ {0x1002, 0x5960, CHIP_RV280, "ATI Radeon RV280 9250"}, \ {0x1002, 0x5961, CHIP_RV280, "ATI Radeon RV280 9200"}, \ {0x1002, 0x5962, CHIP_RV280, "ATI Radeon RV280 9200"}, \ {0x1002, 0x5964, CHIP_RV280, "ATI Radeon RV280 9200 SE"}, \ {0x1002, 0x5965, CHIP_RV280, "ATI FireMV 2200 PCI"}, \ {0x1002, 0x5969, CHIP_RV100, "ATI ES1000 RN50"}, \ {0x1002, 0x5974, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART, "ATI Radeon RS482 XPRESS 200"}, \ {0x1002, 0x5975, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART, "ATI Radeon RS485 XPRESS 1100 IGP"}, \ {0x1002, 0x5A41, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_IGPGART, "ATI Radeon XPRESS 200 5A41 (PCIE)"}, \ {0x1002, 0x5A42, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART, "ATI Radeon XPRESS 200M 5A42 (PCIE)"}, \ {0x1002, 0x5A61, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_IGPGART, "ATI Radeon RC410 XPRESS 200"}, \ {0x1002, 0x5A62, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART, "ATI Radeon RC410 XPRESS 200M"}, \ {0x1002, 0x5B60, CHIP_RV380|RADEON_NEW_MEMMAP, "ATI Radeon RV370 X300 SE"}, \ {0x1002, 0x5B62, CHIP_RV380|RADEON_NEW_MEMMAP, "ATI Radeon RV370 X600 Pro"}, \ {0x1002, 0x5B63, CHIP_RV380|RADEON_NEW_MEMMAP, "ATI Radeon RV370 X550"}, \ {0x1002, 0x5B64, CHIP_RV380|RADEON_NEW_MEMMAP, "ATI FireGL V3100 (RV370) 5B64"}, \ {0x1002, 0x5B65, CHIP_RV380|RADEON_NEW_MEMMAP, "ATI FireMV 2200 PCIE (RV370) 5B65"}, \ {0x1002, 0x5C61, CHIP_RV280|RADEON_IS_MOBILITY, "ATI Radeon RV280 Mobility"}, \ {0x1002, 0x5C63, CHIP_RV280|RADEON_IS_MOBILITY, "ATI Radeon RV280 Mobility"}, \ {0x1002, 0x5D48, CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X800 XT M28"}, \ {0x1002, 0x5D49, CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V5100 M28"}, \ {0x1002, 0x5D4A, CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X800 M28"}, \ {0x1002, 0x5D4C, CHIP_R423|RADEON_NEW_MEMMAP, "ATI Radeon R480 X850"}, \ {0x1002, 0x5D4D, CHIP_R423|RADEON_NEW_MEMMAP, "ATI Radeon R480 X850 XT PE"}, \ {0x1002, 0x5D4E, CHIP_R423|RADEON_NEW_MEMMAP, "ATI Radeon R480 X850 SE"}, \ {0x1002, 0x5D4F, CHIP_R423|RADEON_NEW_MEMMAP, "ATI Radeon R480 X850 Pro"}, \ {0x1002, 0x5D50, CHIP_R423|RADEON_NEW_MEMMAP, "ATI unknown Radeon / FireGL R480"}, \ {0x1002, 0x5D52, CHIP_R423|RADEON_NEW_MEMMAP, "ATI Radeon R480 X850 XT"}, \ {0x1002, 0x5D57, CHIP_R423|RADEON_NEW_MEMMAP, "ATI Radeon R423 X800 XT"}, \ {0x1002, 0x5E48, CHIP_RV410|RADEON_NEW_MEMMAP, "ATI FireGL V5000 RV410"}, \ {0x1002, 0x5E4A, CHIP_RV410|RADEON_NEW_MEMMAP, "ATI Radeon RV410 X700 XT"}, \ {0x1002, 0x5E4B, CHIP_RV410|RADEON_NEW_MEMMAP, "ATI Radeon RV410 X700 Pro"}, \ {0x1002, 0x5E4C, CHIP_RV410|RADEON_NEW_MEMMAP, "ATI Radeon RV410 X700 SE"}, \ {0x1002, 0x5E4D, CHIP_RV410|RADEON_NEW_MEMMAP, "ATI Radeon RV410 X700"}, \ {0x1002, 0x5E4F, CHIP_RV410|RADEON_NEW_MEMMAP, "ATI Radeon RV410 X700 SE"}, \ {0x1002, 0x6700, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Cayman GL XT [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6701, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Cayman GL XT [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6702, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Cayman GL XT [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6703, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Cayman GL XT [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6704, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Cayman PRO GL [FirePro V7900]"}, \ {0x1002, 0x6705, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Cayman GL PRO [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6706, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Cayman GL [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6707, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Cayman LE GL [FirePro V5900]"}, \ {0x1002, 0x6708, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Cayman GL [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6709, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Cayman GL [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6718, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Cayman XT [Radeon HD 6970]"}, \ {0x1002, 0x6719, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Cayman PRO [Radeon HD 6950]"}, \ {0x1002, 0x671C, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Antilles [Radeon HD 6990]"}, \ {0x1002, 0x671D, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Antilles [AMD Radeon HD 6990]"}, \ {0x1002, 0x671F, CHIP_CAYMAN|RADEON_NEW_MEMMAP, "Cayman [Radeon HD 6900 Series]"}, \ {0x1002, 0x6720, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Blackcomb [Radeon HD 6900M series]"}, \ {0x1002, 0x6721, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Blackcomb [Mobility Radeon HD 6000 series]"}, \ {0x1002, 0x6722, CHIP_BARTS|RADEON_NEW_MEMMAP, "Barts GL [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6723, CHIP_BARTS|RADEON_NEW_MEMMAP, "Barts GL [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6724, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Blackcomb [Mobility Radeon HD 6000 series]"}, \ {0x1002, 0x6725, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Blackcomb [Mobility Radeon HD 6000 series]"}, \ {0x1002, 0x6726, CHIP_BARTS|RADEON_NEW_MEMMAP, "Barts GL [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6727, CHIP_BARTS|RADEON_NEW_MEMMAP, "Barts GL [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6728, CHIP_BARTS|RADEON_NEW_MEMMAP, "Barts GL [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6729, CHIP_BARTS|RADEON_NEW_MEMMAP, "Barts GL [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6738, CHIP_BARTS|RADEON_NEW_MEMMAP, "Barts XT [Radeon HD 6800 Series]"}, \ {0x1002, 0x6739, CHIP_BARTS|RADEON_NEW_MEMMAP, "Barts PRO [Radeon HD 6800 Series]"}, \ {0x1002, 0x673E, CHIP_BARTS|RADEON_NEW_MEMMAP, "Barts LE [AMD Radeon HD 6700 Series]"}, \ {0x1002, 0x6740, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Whistler XT [AMD Radeon HD 6700M Series]"}, \ {0x1002, 0x6741, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Whistler [AMD Radeon HD 6600M Series]"}, \ {0x1002, 0x6742, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Whistler LE [AMD Radeon HD 6625M Graphics]"}, \ {0x1002, 0x6743, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Whistler [Radeon E6760]"}, \ {0x1002, 0x6744, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Whistler [ATI Mobility Radeon HD 6000 series]"}, \ {0x1002, 0x6745, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Whistler"}, \ {0x1002, 0x6746, CHIP_TURKS|RADEON_NEW_MEMMAP, "Turks GL [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6747, CHIP_TURKS|RADEON_NEW_MEMMAP, "Turks GL [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6748, CHIP_TURKS|RADEON_NEW_MEMMAP, "Turks GL [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6749, CHIP_TURKS|RADEON_NEW_MEMMAP, "Turks [FirePro V4900]"}, \ {0x1002, 0x674A, CHIP_TURKS|RADEON_NEW_MEMMAP, "Turks [AMD FirePro V3900]"}, \ {0x1002, 0x6750, CHIP_TURKS|RADEON_NEW_MEMMAP, "Turks [AMD Radeon HD 6570]"}, \ {0x1002, 0x6751, CHIP_TURKS|RADEON_NEW_MEMMAP, "Turks [Radeon HD 7600A Series]"}, \ {0x1002, 0x6758, CHIP_TURKS|RADEON_NEW_MEMMAP, "Turks [Radeon HD 6670]"}, \ {0x1002, 0x6759, CHIP_TURKS|RADEON_NEW_MEMMAP, "Turks [Radeon HD 6570]"}, \ {0x1002, 0x675B, CHIP_TURKS|RADEON_NEW_MEMMAP, "Unknown device name"}, \ {0x1002, 0x675D, CHIP_TURKS|RADEON_NEW_MEMMAP, "Turks [Radeon HD 7500 Series]"}, \ {0x1002, 0x675F, CHIP_TURKS|RADEON_NEW_MEMMAP, "Turks LE [Radeon HD 5500/7510 Series]"}, \ {0x1002, 0x6760, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Caicos [Radeon HD 6400M/7400M Series]"}, \ {0x1002, 0x6761, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Seymour LP [Radeon HD 6430M]"}, \ {0x1002, 0x6762, CHIP_CAICOS|RADEON_NEW_MEMMAP, "Caicos GL [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6763, CHIP_CAICOS|RADEON_NEW_MEMMAP, "Seymour [Radeon E6460]"}, \ {0x1002, 0x6764, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Seymour [Mobility Radeon HD 6000 series]"}, \ {0x1002, 0x6765, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Seymour [Mobility Radeon HD 6000 series]"}, \ {0x1002, 0x6766, CHIP_CAICOS|RADEON_NEW_MEMMAP, "Caicos"}, \ {0x1002, 0x6767, CHIP_CAICOS|RADEON_NEW_MEMMAP, "Caicos"}, \ {0x1002, 0x6768, CHIP_CAICOS|RADEON_NEW_MEMMAP, "Caicos"}, \ {0x1002, 0x6770, CHIP_CAICOS|RADEON_NEW_MEMMAP, "Caicos [Radeon HD 6400 Series]"}, \ {0x1002, 0x6771, CHIP_CAICOS|RADEON_NEW_MEMMAP, "Caicos"}, \ {0x1002, 0x6772, CHIP_CAICOS|RADEON_NEW_MEMMAP, "Caicos [Radeon HD 7400A Series]"}, \ {0x1002, 0x6778, CHIP_CAICOS|RADEON_NEW_MEMMAP, "Caicos [Radeon HD 7000 Series]"}, \ {0x1002, 0x6779, CHIP_CAICOS|RADEON_NEW_MEMMAP, "Caicos [Radeon HD 6450]"}, \ {0x1002, 0x677B, CHIP_CAICOS|RADEON_NEW_MEMMAP, "Caicos [Radeon HD 7400 Series]"}, \ {0x1002, 0x6780, CHIP_TAHITI|RADEON_NEW_MEMMAP, "Tahiti [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6784, CHIP_TAHITI|RADEON_NEW_MEMMAP, "Tahiti [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6788, CHIP_TAHITI|RADEON_NEW_MEMMAP, "Tahiti [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x678A, CHIP_TAHITI|RADEON_NEW_MEMMAP, "Tahiti [ATI FirePro V (FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6790, CHIP_TAHITI|RADEON_NEW_MEMMAP, "Tahiti"}, \ {0x1002, 0x6791, CHIP_TAHITI|RADEON_NEW_MEMMAP, "Tahiti"}, \ {0x1002, 0x6792, CHIP_TAHITI|RADEON_NEW_MEMMAP, "Tahiti"}, \ {0x1002, 0x6798, CHIP_TAHITI|RADEON_NEW_MEMMAP, "Tahiti XT [Radeon HD 7970]"}, \ {0x1002, 0x6799, CHIP_TAHITI|RADEON_NEW_MEMMAP, "New Zealand [Radeon HD 7990]"}, \ {0x1002, 0x679A, CHIP_TAHITI|RADEON_NEW_MEMMAP, "Tahiti PRO [Radeon HD 7950]"}, \ {0x1002, 0x679B, CHIP_TAHITI|RADEON_NEW_MEMMAP, "Tahiti [Radeon HD 7900 Series]"}, \ {0x1002, 0x679E, CHIP_TAHITI|RADEON_NEW_MEMMAP, "Tahiti LE [Radeon HD 7800 Series]"}, \ {0x1002, 0x679F, CHIP_TAHITI|RADEON_NEW_MEMMAP, "Tahiti"}, \ {0x1002, 0x6800, CHIP_PITCAIRN|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Wimbledon XT [Radeon HD 7970M]"}, \ {0x1002, 0x6801, CHIP_PITCAIRN|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Wimbledon"}, \ {0x1002, 0x6802, CHIP_PITCAIRN|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Wimbledon"}, \ {0x1002, 0x6806, CHIP_PITCAIRN|RADEON_NEW_MEMMAP, "Pitcairn"}, \ {0x1002, 0x6808, CHIP_PITCAIRN|RADEON_NEW_MEMMAP, "Pitcairn [ATI FirePro V(FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6809, CHIP_PITCAIRN|RADEON_NEW_MEMMAP, "Pitcairn [ATI FirePro V(FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6810, CHIP_PITCAIRN|RADEON_NEW_MEMMAP, "Pitcairn"}, \ {0x1002, 0x6811, CHIP_PITCAIRN|RADEON_NEW_MEMMAP, "Pitcairn"}, \ {0x1002, 0x6816, CHIP_PITCAIRN|RADEON_NEW_MEMMAP, "Pitcairn"}, \ {0x1002, 0x6817, CHIP_PITCAIRN|RADEON_NEW_MEMMAP, "Pitcairn"}, \ {0x1002, 0x6818, CHIP_PITCAIRN|RADEON_NEW_MEMMAP, "Pitcairn [Radeon HD 7800]"}, \ {0x1002, 0x6819, CHIP_PITCAIRN|RADEON_NEW_MEMMAP, "Pitcairn PRO [Radeon HD 7800]"}, \ {0x1002, 0x6820, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Radeon HD 8800M Series"}, \ {0x1002, 0x6821, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Radeon HD 8800M Series"}, \ {0x1002, 0x6822, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Venus PRO [Radeon E8860]"}, \ {0x1002, 0x6823, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Radeon HD 8800M Series"}, \ {0x1002, 0x6824, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Chelsea [Radeon HD 7700M Series]"}, \ {0x1002, 0x6825, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Cape Verde [Radeon HD 7800M Series]"}, \ {0x1002, 0x6826, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Chelsea [Radeon HD 7700M Series]"}, \ {0x1002, 0x6827, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Cape Verde [Radeon HD 7800M Series]"}, \ {0x1002, 0x6828, CHIP_VERDE|RADEON_NEW_MEMMAP, "Cape Verde"}, \ {0x1002, 0x6829, CHIP_VERDE|RADEON_NEW_MEMMAP, "Cape Verde"}, \ {0x1002, 0x682A, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Venus PRO"}, \ {0x1002, 0x682B, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Radeon HD 8800M Series"}, \ {0x1002, 0x682D, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Unknown device name"}, \ {0x1002, 0x682F, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Cape Verde [Radeon HD 7700M Series]"}, \ {0x1002, 0x6830, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Cape Verde [Radeon HD 7800M Series]"}, \ {0x1002, 0x6831, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Cape Verde [AMD Radeon HD 7700M Series]"}, \ {0x1002, 0x6835, CHIP_VERDE|RADEON_NEW_MEMMAP, "Cape Verde PRX [Radeon R9 255 OEM]"}, \ {0x1002, 0x6837, CHIP_VERDE|RADEON_NEW_MEMMAP, "Cape Verde LE [Radeon HD 7700 Series]"}, \ {0x1002, 0x6838, CHIP_VERDE|RADEON_NEW_MEMMAP, "Cape Verde"}, \ {0x1002, 0x6839, CHIP_VERDE|RADEON_NEW_MEMMAP, "Cape Verde"}, \ {0x1002, 0x683B, CHIP_VERDE|RADEON_NEW_MEMMAP, "Cape Verde [Radeon HD 7700 Series]"}, \ {0x1002, 0x683D, CHIP_VERDE|RADEON_NEW_MEMMAP, "Cape Verde [Radeon HD 7700 Series]"}, \ {0x1002, 0x683F, CHIP_VERDE|RADEON_NEW_MEMMAP, "Cape Verde PRO [Radeon HD 7700 Series]"}, \ {0x1002, 0x6840, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Thames XT/GL [Radeon HD 7600M Series]"}, \ {0x1002, 0x6841, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Thames [Radeon 7500M/7600M Series]"}, \ {0x1002, 0x6842, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Thames LE [Radeon HD 7000M Series]"}, \ {0x1002, 0x6843, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Thames [Radeon HD 7670M]"}, \ {0x1002, 0x6849, CHIP_TURKS|RADEON_NEW_MEMMAP, "Lombok [AMD Radeon HD 7400 Series]"}, \ {0x1002, 0x684C, CHIP_PITCAIRN|RADEON_NEW_MEMMAP, "Pitcairn [ATI FirePro V(FireGL V) Graphics Adapter]"}, \ {0x1002, 0x6850, CHIP_TURKS|RADEON_NEW_MEMMAP, "Lombok GL AIO [Radeon HD 7570]"}, \ {0x1002, 0x6858, CHIP_TURKS|RADEON_NEW_MEMMAP, "Lombok [Radeon HD 7400 series]"}, \ {0x1002, 0x6859, CHIP_TURKS|RADEON_NEW_MEMMAP, "Unknown device name"}, \ {0x1002, 0x6880, CHIP_CYPRESS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Cypress"}, \ {0x1002, 0x6888, CHIP_CYPRESS|RADEON_NEW_MEMMAP, "Cypress [FirePro 3D V8800]"}, \ {0x1002, 0x6889, CHIP_CYPRESS|RADEON_NEW_MEMMAP, "Cypress [FirePro V7800]"}, \ {0x1002, 0x688A, CHIP_CYPRESS|RADEON_NEW_MEMMAP, "Cypress XT [FirePro 3D V9800]"}, \ {0x1002, 0x688C, CHIP_CYPRESS|RADEON_NEW_MEMMAP, "Cypress [AMD FireStream 9370]"}, \ {0x1002, 0x688D, CHIP_CYPRESS|RADEON_NEW_MEMMAP, "Cypress [AMD FireStream 9350]"}, \ {0x1002, 0x6898, CHIP_CYPRESS|RADEON_NEW_MEMMAP, "Cypress XT [Radeon HD 5870]"}, \ {0x1002, 0x6899, CHIP_CYPRESS|RADEON_NEW_MEMMAP, "Cypress PRO [Radeon HD 5800 Series]"}, \ {0x1002, 0x689B, CHIP_CYPRESS|RADEON_NEW_MEMMAP, "Cypress [Radeon HD 6800 Series]"}, \ {0x1002, 0x689C, CHIP_HEMLOCK|RADEON_NEW_MEMMAP, "Hemlock [Radeon HD 5900 Series]"}, \ {0x1002, 0x689D, CHIP_HEMLOCK|RADEON_NEW_MEMMAP, "Hemlock [ATI Radeon HD 5900 Series]"}, \ {0x1002, 0x689E, CHIP_CYPRESS|RADEON_NEW_MEMMAP, "Cypress LE [Radeon HD 5800 Series]"}, \ {0x1002, 0x68A0, CHIP_JUNIPER|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 5870"}, \ {0x1002, 0x68A1, CHIP_JUNIPER|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Broadway PRO [Mobility Radeon HD 5800 Series]"}, \ {0x1002, 0x68A8, CHIP_JUNIPER|RADEON_NEW_MEMMAP, "Broadway [ATI Mobility Radeon HD 6800 Series]"}, \ {0x1002, 0x68A9, CHIP_JUNIPER|RADEON_NEW_MEMMAP, "Juniper XT [FirePro 3D V5800]"}, \ {0x1002, 0x68B0, CHIP_JUNIPER|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Unknown device name"}, \ {0x1002, 0x68B8, CHIP_JUNIPER|RADEON_NEW_MEMMAP, "Juniper [Radeon HD 5700 Series]"}, \ {0x1002, 0x68B9, CHIP_JUNIPER|RADEON_NEW_MEMMAP, "Juniper [Radeon HD 5600/5700]"}, \ {0x1002, 0x68BA, CHIP_JUNIPER|RADEON_NEW_MEMMAP, "Juniper XT [AMD Radeon HD 6000 Series]"}, \ {0x1002, 0x68BE, CHIP_JUNIPER|RADEON_NEW_MEMMAP, "Juniper [Radeon HD 5700 Series]"}, \ {0x1002, 0x68BF, CHIP_JUNIPER|RADEON_NEW_MEMMAP, "Juniper LE [Radeon HD 6700 Series]"}, \ {0x1002, 0x68C0, CHIP_REDWOOD|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Madison [Mobility Radeon HD 5000 Series]"}, \ {0x1002, 0x68C1, CHIP_REDWOOD|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Madison [Radeon HD 5000M Series]"}, \ {0x1002, 0x68C7, CHIP_REDWOOD|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Pinewood [Radeon HD 5570]"}, \ {0x1002, 0x68C8, CHIP_REDWOOD|RADEON_NEW_MEMMAP, "FirePro V4800"}, \ {0x1002, 0x68C9, CHIP_REDWOOD|RADEON_NEW_MEMMAP, "Redwood [FirePro 3800 (FireGL)]"}, \ {0x1002, 0x68D8, CHIP_REDWOOD|RADEON_NEW_MEMMAP, "Redwood [Radeon HD 5670]"}, \ {0x1002, 0x68D9, CHIP_REDWOOD|RADEON_NEW_MEMMAP, "Redwood PRO [Radeon HD 5500 Series]"}, \ {0x1002, 0x68DA, CHIP_REDWOOD|RADEON_NEW_MEMMAP, "Redwood PRO [Radeon HD 5500 Series]"}, \ {0x1002, 0x68DE, CHIP_REDWOOD|RADEON_NEW_MEMMAP, "Redwood"}, \ {0x1002, 0x68E0, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Manhattan [Mobility Radeon HD 5400 Series]"}, \ {0x1002, 0x68E1, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Manhattan [Mobility Radeon HD 5430 Series]"}, \ {0x1002, 0x68E4, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Robson CE [AMD Radeon HD 6300 Series]"}, \ {0x1002, 0x68E5, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "Robson LE [AMD Radeon HD 6300M Series]"}, \ {0x1002, 0x68E8, CHIP_CEDAR|RADEON_NEW_MEMMAP, "Cedar"}, \ {0x1002, 0x68E9, CHIP_CEDAR|RADEON_NEW_MEMMAP, "Cedar [ATI FirePro (FireGL) Graphics Adapter]"}, \ {0x1002, 0x68F1, CHIP_CEDAR|RADEON_NEW_MEMMAP, "Cedar [FirePro 2460]"}, \ {0x1002, 0x68F2, CHIP_CEDAR|RADEON_NEW_MEMMAP, "Cedar [FirePro 2270]"}, \ {0x1002, 0x68F8, CHIP_CEDAR|RADEON_NEW_MEMMAP, "Cedar [Radeon HD 7300 Series]"}, \ {0x1002, 0x68F9, CHIP_CEDAR|RADEON_NEW_MEMMAP, "Cedar PRO [Radeon HD 5450/6350]"}, \ {0x1002, 0x68FA, CHIP_CEDAR|RADEON_NEW_MEMMAP, "EG Cedar [Radeon HD 7300 Series]"}, \ {0x1002, 0x68FE, CHIP_CEDAR|RADEON_NEW_MEMMAP, "Cedar LE"}, \ {0x1002, 0x7100, CHIP_R520|RADEON_NEW_MEMMAP, "ATI Radeon X1800"}, \ {0x1002, 0x7101, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1800 XT"}, \ {0x1002, 0x7102, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1800"}, \ {0x1002, 0x7103, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V7200"}, \ {0x1002, 0x7104, CHIP_R520|RADEON_NEW_MEMMAP, "ATI FireGL V7200"}, \ {0x1002, 0x7105, CHIP_R520|RADEON_NEW_MEMMAP, "ATI FireGL V5300"}, \ {0x1002, 0x7106, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V7100"}, \ {0x1002, 0x7108, CHIP_R520|RADEON_NEW_MEMMAP, "ATI Radeon X1800"}, \ {0x1002, 0x7109, CHIP_R520|RADEON_NEW_MEMMAP, "ATI Radeon X1800"}, \ {0x1002, 0x710A, CHIP_R520|RADEON_NEW_MEMMAP, "ATI Radeon X1800"}, \ {0x1002, 0x710B, CHIP_R520|RADEON_NEW_MEMMAP, "ATI Radeon X1800"}, \ {0x1002, 0x710C, CHIP_R520|RADEON_NEW_MEMMAP, "ATI Radeon X1800"}, \ {0x1002, 0x710E, CHIP_R520|RADEON_NEW_MEMMAP, "ATI FireGL V7300"}, \ {0x1002, 0x710F, CHIP_R520|RADEON_NEW_MEMMAP, "ATI FireGL V7350"}, \ {0x1002, 0x7140, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1600"}, \ {0x1002, 0x7141, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI RV505"}, \ {0x1002, 0x7142, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300/X1550"}, \ {0x1002, 0x7143, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1550"}, \ {0x1002, 0x7144, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI M54-GL"}, \ {0x1002, 0x7145, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1400"}, \ {0x1002, 0x7146, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300/X1550"}, \ {0x1002, 0x7147, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1550 64-bit"}, \ {0x1002, 0x7149, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1300"}, \ {0x1002, 0x714A, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1300"}, \ {0x1002, 0x714B, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1300"}, \ {0x1002, 0x714C, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1300"}, \ {0x1002, 0x714D, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300"}, \ {0x1002, 0x714E, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300"}, \ {0x1002, 0x714F, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI RV505"}, \ {0x1002, 0x7151, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI RV505"}, \ {0x1002, 0x7152, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI FireGL V3300"}, \ {0x1002, 0x7153, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI FireGL V3350"}, \ {0x1002, 0x715E, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300"}, \ {0x1002, 0x715F, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1550 64-bit"}, \ {0x1002, 0x7180, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300/X1550"}, \ {0x1002, 0x7181, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1600"}, \ {0x1002, 0x7183, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300/X1550"}, \ {0x1002, 0x7186, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1450"}, \ {0x1002, 0x7187, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300/X1550"}, \ {0x1002, 0x7188, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X2300"}, \ {0x1002, 0x718A, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X2300"}, \ {0x1002, 0x718B, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1350"}, \ {0x1002, 0x718C, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1350"}, \ {0x1002, 0x718D, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1450"}, \ {0x1002, 0x718F, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300"}, \ {0x1002, 0x7193, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1550"}, \ {0x1002, 0x7196, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1350"}, \ {0x1002, 0x719B, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI FireMV 2250"}, \ {0x1002, 0x719F, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1550 64-bit"}, \ {0x1002, 0x71C0, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1600"}, \ {0x1002, 0x71C1, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1650"}, \ {0x1002, 0x71C2, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1600"}, \ {0x1002, 0x71C3, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1600"}, \ {0x1002, 0x71C4, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V5200"}, \ {0x1002, 0x71C5, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1600"}, \ {0x1002, 0x71C6, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1650"}, \ {0x1002, 0x71C7, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1650"}, \ {0x1002, 0x71CD, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1600"}, \ {0x1002, 0x71CE, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1300 XT/X1600 Pro"}, \ {0x1002, 0x71D2, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI FireGL V3400"}, \ {0x1002, 0x71D4, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V5250"}, \ {0x1002, 0x71D5, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1700"}, \ {0x1002, 0x71D6, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1700 XT"}, \ {0x1002, 0x71DA, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI FireGL V5200"}, \ {0x1002, 0x71DE, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1700"}, \ {0x1002, 0x7200, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X2300HD"}, \ {0x1002, 0x7210, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 2300"}, \ {0x1002, 0x7211, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 2300"}, \ {0x1002, 0x7240, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1950"}, \ {0x1002, 0x7243, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \ {0x1002, 0x7244, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1950"}, \ {0x1002, 0x7245, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \ {0x1002, 0x7246, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \ {0x1002, 0x7247, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \ {0x1002, 0x7248, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \ {0x1002, 0x7249, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \ {0x1002, 0x724A, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \ {0x1002, 0x724B, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \ {0x1002, 0x724C, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \ {0x1002, 0x724D, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \ {0x1002, 0x724E, CHIP_R580|RADEON_NEW_MEMMAP, "ATI AMD Stream Processor"}, \ {0x1002, 0x724F, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \ {0x1002, 0x7280, CHIP_RV570|RADEON_NEW_MEMMAP, "ATI Radeon X1950"}, \ {0x1002, 0x7281, CHIP_RV560|RADEON_NEW_MEMMAP, "ATI RV560"}, \ {0x1002, 0x7283, CHIP_RV560|RADEON_NEW_MEMMAP, "ATI RV560"}, \ {0x1002, 0x7284, CHIP_R580|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1900"}, \ {0x1002, 0x7287, CHIP_RV560|RADEON_NEW_MEMMAP, "ATI RV560"}, \ {0x1002, 0x7288, CHIP_RV570|RADEON_NEW_MEMMAP, "ATI Radeon X1950 GT"}, \ {0x1002, 0x7289, CHIP_RV570|RADEON_NEW_MEMMAP, "ATI RV570"}, \ {0x1002, 0x728B, CHIP_RV570|RADEON_NEW_MEMMAP, "ATI RV570"}, \ {0x1002, 0x728C, CHIP_RV570|RADEON_NEW_MEMMAP, "ATI ATI FireGL V7400"}, \ {0x1002, 0x7290, CHIP_RV560|RADEON_NEW_MEMMAP, "ATI RV560"}, \ {0x1002, 0x7291, CHIP_RV560|RADEON_NEW_MEMMAP, "ATI Radeon X1650"}, \ {0x1002, 0x7293, CHIP_RV560|RADEON_NEW_MEMMAP, "ATI Radeon X1650"}, \ {0x1002, 0x7297, CHIP_RV560|RADEON_NEW_MEMMAP, "ATI RV560"}, \ {0x1002, 0x7834, CHIP_RS300|RADEON_IS_IGP|RADEON_NEW_MEMMAP, "ATI Radeon RS350 9000/9100 IGP"}, \ {0x1002, 0x7835, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Radeon RS350 Mobility IGP"}, \ {0x1002, 0x791E, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART, "ATI Radeon RS690 X1250 IGP"}, \ {0x1002, 0x791F, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART, "ATI Radeon RS690 X1270 IGP"}, \ {0x1002, 0x793F, CHIP_RS600|RADEON_IS_IGP|RADEON_NEW_MEMMAP, "ATI Radeon X1200"}, \ {0x1002, 0x7941, CHIP_RS600|RADEON_IS_IGP|RADEON_NEW_MEMMAP, "ATI Radeon X1200"}, \ {0x1002, 0x7942, CHIP_RS600|RADEON_IS_IGP|RADEON_NEW_MEMMAP, "ATI Radeon X1200"}, \ {0x1002, 0x796C, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART, "ATI Radeon RS740 HD2100 IGP"}, \ {0x1002, 0x796D, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART, "ATI Radeon RS740 HD2100 IGP"}, \ {0x1002, 0x796E, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART, "ATI Radeon RS740 HD2100 IGP"}, \ {0x1002, 0x796F, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART, "ATI Radeon RS740 HD2100 IGP"}, \ {0x1002, 0x9400, CHIP_R600|RADEON_NEW_MEMMAP, "ATI Radeon HD 2900 XT"}, \ {0x1002, 0x9401, CHIP_R600|RADEON_NEW_MEMMAP, "ATI Radeon HD 2900 XT"}, \ {0x1002, 0x9402, CHIP_R600|RADEON_NEW_MEMMAP, "ATI Radeon HD 2900 XT"}, \ {0x1002, 0x9403, CHIP_R600|RADEON_NEW_MEMMAP, "ATI Radeon HD 2900 Pro"}, \ {0x1002, 0x9405, CHIP_R600|RADEON_NEW_MEMMAP, "ATI Radeon HD 2900 GT"}, \ {0x1002, 0x940A, CHIP_R600|RADEON_NEW_MEMMAP, "ATI FireGL V8650"}, \ {0x1002, 0x940B, CHIP_R600|RADEON_NEW_MEMMAP, "ATI FireGL V8600"}, \ {0x1002, 0x940F, CHIP_R600|RADEON_NEW_MEMMAP, "ATI FireGL V7600"}, \ {0x1002, 0x9440, CHIP_RV770|RADEON_NEW_MEMMAP, "ATI Radeon 4800 Series"}, \ {0x1002, 0x9441, CHIP_RV770|RADEON_NEW_MEMMAP, "ATI Radeon 4870 X2"}, \ {0x1002, 0x9442, CHIP_RV770|RADEON_NEW_MEMMAP, "ATI Radeon 4800 Series"}, \ {0x1002, 0x9443, CHIP_RV770|RADEON_NEW_MEMMAP, "ATI Radeon 4850 X2"}, \ {0x1002, 0x9444, CHIP_RV770|RADEON_NEW_MEMMAP, "ATI FirePro V8750 (FireGL)"}, \ {0x1002, 0x9446, CHIP_RV770|RADEON_NEW_MEMMAP, "ATI FirePro V7760 (FireGL)"}, \ {0x1002, 0x944A, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 4850"}, \ {0x1002, 0x944B, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 4850 X2"}, \ {0x1002, 0x944C, CHIP_RV770|RADEON_NEW_MEMMAP, "ATI Radeon 4800 Series"}, \ {0x1002, 0x944E, CHIP_RV770|RADEON_NEW_MEMMAP, "ATI FirePro RV770"}, \ {0x1002, 0x9450, CHIP_RV770|RADEON_NEW_MEMMAP, "AMD FireStream 9270"}, \ {0x1002, 0x9452, CHIP_RV770|RADEON_NEW_MEMMAP, "AMD FireStream 9250"}, \ {0x1002, 0x9456, CHIP_RV770|RADEON_NEW_MEMMAP, "ATI FirePro V8700 (FireGL)"}, \ {0x1002, 0x945A, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 4870"}, \ {0x1002, 0x945B, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon M98"}, \ {0x1002, 0x945E, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "RV770"}, \ {0x1002, 0x9460, CHIP_RV770|RADEON_NEW_MEMMAP, "ATI Radeon 4800 Series"}, \ {0x1002, 0x9462, CHIP_RV770|RADEON_NEW_MEMMAP, "ATI Radeon 4800 Series"}, \ {0x1002, 0x946A, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI FirePro M7750"}, \ {0x1002, 0x946B, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI M98"}, \ {0x1002, 0x947A, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI M98"}, \ {0x1002, 0x947B, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI M98"}, \ {0x1002, 0x9480, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 4650"}, \ {0x1002, 0x9487, CHIP_RV730|RADEON_NEW_MEMMAP, "ATI Radeon RV730 (AGP)"}, \ {0x1002, 0x9488, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 4670"}, \ {0x1002, 0x9489, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI FirePro M5750"}, \ {0x1002, 0x948A, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "RV730"}, \ {0x1002, 0x948F, CHIP_RV730|RADEON_NEW_MEMMAP, "ATI Radeon RV730 (AGP)"}, \ {0x1002, 0x9490, CHIP_RV730|RADEON_NEW_MEMMAP, "ATI Radeon HD 4670"}, \ {0x1002, 0x9491, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI RADEON E4600"}, \ {0x1002, 0x9495, CHIP_RV730|RADEON_NEW_MEMMAP, "ATI Radeon HD 4600 Series"}, \ {0x1002, 0x9498, CHIP_RV730|RADEON_NEW_MEMMAP, "ATI Radeon HD 4650"}, \ {0x1002, 0x949C, CHIP_RV730|RADEON_NEW_MEMMAP, "ATI FirePro V7750 (FireGL)"}, \ {0x1002, 0x949E, CHIP_RV730|RADEON_NEW_MEMMAP, "ATI FirePro V5700 (FireGL)"}, \ {0x1002, 0x949F, CHIP_RV730|RADEON_NEW_MEMMAP, "ATI FirePro V3750 (FireGL)"}, \ {0x1002, 0x94A0, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 4830"}, \ {0x1002, 0x94A1, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 4850"}, \ {0x1002, 0x94A3, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI FirePro M7740"}, \ {0x1002, 0x94B1, CHIP_RV740|RADEON_NEW_MEMMAP, "ATI RV740"}, \ {0x1002, 0x94B3, CHIP_RV740|RADEON_NEW_MEMMAP, "ATI Radeon HD 4770"}, \ {0x1002, 0x94B4, CHIP_RV740|RADEON_NEW_MEMMAP, "ATI Radeon HD 4700 Series"}, \ {0x1002, 0x94B5, CHIP_RV740|RADEON_NEW_MEMMAP, "ATI Radeon HD 4770"}, \ {0x1002, 0x94B9, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI FirePro M5750"}, \ {0x1002, 0x94C0, CHIP_RV610|RADEON_NEW_MEMMAP, "RV610"}, \ {0x1002, 0x94C1, CHIP_RV610|RADEON_NEW_MEMMAP, "Radeon HD 2400 XT"}, \ {0x1002, 0x94C3, CHIP_RV610|RADEON_NEW_MEMMAP, "Radeon HD 2400 Pro"}, \ {0x1002, 0x94C4, CHIP_RV610|RADEON_NEW_MEMMAP, "Radeon HD 2400 PRO AGP"}, \ {0x1002, 0x94C5, CHIP_RV610|RADEON_NEW_MEMMAP, "FireGL V4000"}, \ {0x1002, 0x94C6, CHIP_RV610|RADEON_NEW_MEMMAP, "RV610"}, \ {0x1002, 0x94C7, CHIP_RV610|RADEON_NEW_MEMMAP, "ATI Radeon HD 2350"}, \ {0x1002, 0x94C8, CHIP_RV610|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 2400 XT"}, \ {0x1002, 0x94C9, CHIP_RV610|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 2400"}, \ {0x1002, 0x94CB, CHIP_RV610|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI RADEON E2400"}, \ {0x1002, 0x94CC, CHIP_RV610|RADEON_NEW_MEMMAP, "ATI RV610"}, \ {0x1002, 0x94CD, CHIP_RV610|RADEON_NEW_MEMMAP, "ATI FireMV 2260"}, \ {0x1002, 0x9500, CHIP_RV670|RADEON_NEW_MEMMAP, "ATI RV670"}, \ {0x1002, 0x9501, CHIP_RV670|RADEON_NEW_MEMMAP, "ATI Radeon HD3870"}, \ {0x1002, 0x9504, CHIP_RV670|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 3850"}, \ {0x1002, 0x9505, CHIP_RV670|RADEON_NEW_MEMMAP, "ATI Radeon HD3850"}, \ {0x1002, 0x9506, CHIP_RV670|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 3850 X2"}, \ {0x1002, 0x9507, CHIP_RV670|RADEON_NEW_MEMMAP, "ATI RV670"}, \ {0x1002, 0x9508, CHIP_RV670|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 3870"}, \ {0x1002, 0x9509, CHIP_RV670|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 3870 X2"}, \ {0x1002, 0x950F, CHIP_RV670|RADEON_NEW_MEMMAP, "ATI Radeon HD3870 X2"}, \ {0x1002, 0x9511, CHIP_RV670|RADEON_NEW_MEMMAP, "ATI FireGL V7700"}, \ {0x1002, 0x9515, CHIP_RV670|RADEON_NEW_MEMMAP, "ATI Radeon HD3850"}, \ {0x1002, 0x9517, CHIP_RV670|RADEON_NEW_MEMMAP, "ATI Radeon HD3690"}, \ {0x1002, 0x9519, CHIP_RV670|RADEON_NEW_MEMMAP, "AMD Firestream 9170"}, \ {0x1002, 0x9540, CHIP_RV710|RADEON_NEW_MEMMAP, "ATI Radeon HD 4550"}, \ {0x1002, 0x9541, CHIP_RV710|RADEON_NEW_MEMMAP, "ATI Radeon RV710"}, \ {0x1002, 0x9542, CHIP_RV710|RADEON_NEW_MEMMAP, "ATI Radeon RV710"}, \ {0x1002, 0x954E, CHIP_RV710|RADEON_NEW_MEMMAP, "ATI Radeon RV710"}, \ {0x1002, 0x954F, CHIP_RV710|RADEON_NEW_MEMMAP, "ATI Radeon HD 4350"}, \ {0x1002, 0x9552, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon 4300 Series"}, \ {0x1002, 0x9553, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon 4500 Series"}, \ {0x1002, 0x9555, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon 4500 Series"}, \ {0x1002, 0x9557, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI FirePro RG220"}, \ {0x1002, 0x955F, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "RV710 [Mobility Radeon HD 4330]"}, \ {0x1002, 0x9580, CHIP_RV630|RADEON_NEW_MEMMAP, "ATI RV630"}, \ {0x1002, 0x9581, CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 2600"}, \ {0x1002, 0x9583, CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 2600 XT"}, \ {0x1002, 0x9586, CHIP_RV630|RADEON_NEW_MEMMAP, "ATI Radeon HD 2600 XT AGP"}, \ {0x1002, 0x9587, CHIP_RV630|RADEON_NEW_MEMMAP, "ATI Radeon HD 2600 Pro AGP"}, \ {0x1002, 0x9588, CHIP_RV630|RADEON_NEW_MEMMAP, "ATI Radeon HD 2600 XT"}, \ {0x1002, 0x9589, CHIP_RV630|RADEON_NEW_MEMMAP, "ATI Radeon HD 2600 Pro"}, \ {0x1002, 0x958A, CHIP_RV630|RADEON_NEW_MEMMAP, "ATI Gemini RV630"}, \ {0x1002, 0x958B, CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Gemini Mobility Radeon HD 2600 XT"}, \ {0x1002, 0x958C, CHIP_RV630|RADEON_NEW_MEMMAP, "ATI FireGL V5600"}, \ {0x1002, 0x958D, CHIP_RV630|RADEON_NEW_MEMMAP, "ATI FireGL V3600"}, \ {0x1002, 0x958E, CHIP_RV630|RADEON_NEW_MEMMAP, "ATI Radeon HD 2600 LE"}, \ {0x1002, 0x958F, CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL Graphics Processor"}, \ {0x1002, 0x9590, CHIP_RV635|RADEON_NEW_MEMMAP, "ATI ATI Radeon HD 3600 Series"}, \ {0x1002, 0x9591, CHIP_RV635|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 3650"}, \ {0x1002, 0x9593, CHIP_RV635|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 3670"}, \ {0x1002, 0x9595, CHIP_RV635|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V5700"}, \ {0x1002, 0x9596, CHIP_RV635|RADEON_NEW_MEMMAP, "ATI ATI Radeon HD 3650 AGP"}, \ {0x1002, 0x9597, CHIP_RV635|RADEON_NEW_MEMMAP, "ATI ATI Radeon HD 3600 PRO"}, \ {0x1002, 0x9598, CHIP_RV635|RADEON_NEW_MEMMAP, "ATI ATI Radeon HD 3600 XT"}, \ {0x1002, 0x9599, CHIP_RV635|RADEON_NEW_MEMMAP, "ATI ATI Radeon HD 3600 PRO"}, \ {0x1002, 0x959B, CHIP_RV635|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V5725"}, \ {0x1002, 0x95C0, CHIP_RV620|RADEON_NEW_MEMMAP, "ATI Radeon HD 3470"}, \ {0x1002, 0x95C2, CHIP_RV620|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 3430"}, \ {0x1002, 0x95C4, CHIP_RV620|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 3400 Series"}, \ {0x1002, 0x95C5, CHIP_RV620|RADEON_NEW_MEMMAP, "ATI Radeon HD 3450"}, \ {0x1002, 0x95C6, CHIP_RV620|RADEON_NEW_MEMMAP, "ATI Radeon HD 3450"}, \ {0x1002, 0x95C7, CHIP_RV620|RADEON_NEW_MEMMAP, "ATI Radeon HD 3430"}, \ {0x1002, 0x95C9, CHIP_RV620|RADEON_NEW_MEMMAP, "ATI Radeon HD 3450"}, \ {0x1002, 0x95CC, CHIP_RV620|RADEON_NEW_MEMMAP, "ATI FirePro V3700"}, \ {0x1002, 0x95CD, CHIP_RV620|RADEON_NEW_MEMMAP, "ATI FireMV 2450"}, \ {0x1002, 0x95CE, CHIP_RV620|RADEON_NEW_MEMMAP, "ATI FireMV 2260"}, \ {0x1002, 0x95CF, CHIP_RV620|RADEON_NEW_MEMMAP, "ATI FireMV 2260"}, \ {0x1002, 0x9610, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "ATI Radeon HD 3200 Graphics"}, \ {0x1002, 0x9611, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "ATI Radeon 3100 Graphics"}, \ {0x1002, 0x9612, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "ATI Radeon HD 3200 Graphics"}, \ {0x1002, 0x9613, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "ATI Radeon 3100 Graphics"}, \ {0x1002, 0x9614, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "ATI Radeon 3300 Graphics"}, \ {0x1002, 0x9615, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "ATI Radeon 3200 Graphics"}, \ {0x1002, 0x9616, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "ATI Radeon 3000 Graphics"}, \ {0x1002, 0x9640, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "BeaverCreek [Radeon HD 6550D]"}, \ {0x1002, 0x9641, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "BeaverCreek [Mobility Radeon HD 6620G]"}, \ {0x1002, 0x9642, CHIP_SUMO2|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Sumo [Radeon HD 6370D]"}, \ {0x1002, 0x9643, CHIP_SUMO2|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Sumo [Radeon HD 6380G]"}, \ {0x1002, 0x9644, CHIP_SUMO2|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Sumo [Radeon HD 6410D]"}, \ {0x1002, 0x9645, CHIP_SUMO2|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Sumo [Radeon HD 6410D]"}, \ {0x1002, 0x9647, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "BeaverCreek [Radeon HD 6520G]"}, \ {0x1002, 0x9648, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Sumo [Radeon HD 6480G]"}, \ {0x1002, 0x9649, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Sumo [Radeon HD 6480G]"}, \ {0x1002, 0x964A, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "BeaverCreek [Radeon HD 6530D]"}, \ {0x1002, 0x964B, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Sumo"}, \ {0x1002, 0x964C, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Sumo"}, \ {0x1002, 0x964E, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Sumo"}, \ {0x1002, 0x964F, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Sumo"}, \ {0x1002, 0x9710, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "ATI Radeon HD 4200"}, \ {0x1002, 0x9711, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "ATI Radeon 4100"}, \ {0x1002, 0x9712, CHIP_RS880|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "ATI Mobility Radeon HD 4200"}, \ {0x1002, 0x9713, CHIP_RS880|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "ATI Mobility Radeon 4100"}, \ {0x1002, 0x9714, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "ATI RS880"}, \ {0x1002, 0x9715, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "ATI Radeon HD 4250"}, \ {0x1002, 0x9802, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Wrestler [Radeon HD 6310]"}, \ {0x1002, 0x9803, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Wrestler [Radeon HD 6310]"}, \ {0x1002, 0x9804, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Wrestler [Radeon HD 6250]"}, \ {0x1002, 0x9805, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Wrestler [Radeon HD 6250]"}, \ {0x1002, 0x9806, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Wrestler [Radeon HD 6320]"}, \ {0x1002, 0x9807, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Wrestler [Radeon HD 6290]"}, \ {0x1002, 0x9808, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Wrestler [Radeon HD 7340]"}, \ {0x1002, 0x9809, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Wrestler [Radeon HD 7310]"}, \ {0x1002, 0x980A, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Wrestler [Radeon HD 7290]"}, \ {0x1002, 0x9900, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Unknown device name"}, \ {0x1002, 0x9901, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7660D]"}, \ {0x1002, 0x9903, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7640G]"}, \ {0x1002, 0x9904, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7560D]"}, \ {0x1002, 0x9905, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [FirePro A300 Series Graphics]"}, \ {0x1002, 0x9906, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [FirePro A300 Series Graphics]"}, \ {0x1002, 0x9907, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7620G]"}, \ {0x1002, 0x9908, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7600G]"}, \ {0x1002, 0x9909, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7500G]"}, \ {0x1002, 0x990A, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7500G]"}, \ {0x1002, 0x990B, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Richland [Radeon HD 8650G]"}, \ {0x1002, 0x990C, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Richland [Radeon HD 8670D]"}, \ {0x1002, 0x990D, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Richland [Radeon HD 8550G]"}, \ {0x1002, 0x990E, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Richland [Radeon HD 8570D]"}, \ {0x1002, 0x990F, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Unknown device name"}, \ {0x1002, 0x9910, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7660G]"}, \ {0x1002, 0x9913, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7640G]"}, \ {0x1002, 0x9917, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7620G]"}, \ {0x1002, 0x9918, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7600G]"}, \ {0x1002, 0x9919, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7500G]"}, \ {0x1002, 0x9990, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7520G]"}, \ {0x1002, 0x9991, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7540D]"}, \ {0x1002, 0x9992, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7420G]"}, \ {0x1002, 0x9993, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7480D]"}, \ {0x1002, 0x9994, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7400G]"}, \ {0x1002, 0x9995, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Richland [Radeon HD 8450G]"}, \ {0x1002, 0x9996, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Richland [Radeon HD 8470D]"}, \ {0x1002, 0x9997, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Richland [Radeon HD 8350G]"}, \ {0x1002, 0x9998, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Richland [Radeon HD 8370D]"}, \ {0x1002, 0x9999, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Richland [Radeon HD 8510G]"}, \ {0x1002, 0x999A, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Richland [Radeon HD 8410G]"}, \ {0x1002, 0x999B, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Richland [Radeon HD 8310G]"}, \ {0x1002, 0x999C, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Richland"}, \ {0x1002, 0x999D, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Richland [Radeon HD 8550D]"}, \ {0x1002, 0x99A0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7520G]"}, \ {0x1002, 0x99A2, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7420G]"}, \ {0x1002, 0x99A4, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP, "Trinity [Radeon HD 7400G]"}, \ {0, 0, 0, NULL} #define savage_PCI_IDS \ {0x5333, 0x8A20, S3_SAVAGE3D, "Savage 3D"}, \ {0x5333, 0x8A21, S3_SAVAGE3D, "Savage 3D/MV"}, \ {0x5333, 0x8A22, S3_SAVAGE4, "Savage4"}, \ {0x5333, 0x8A23, S3_SAVAGE4, "Savage4"}, \ {0x5333, 0x8A25, S3_PROSAVAGE, "ProSavage PM133"}, \ {0x5333, 0x8A26, S3_PROSAVAGE, "ProSavage KM133"}, \ {0x5333, 0x8C10, S3_SAVAGE_MX, "Savage/MX-MV"}, \ {0x5333, 0x8C11, S3_SAVAGE_MX, "Savage/MX"}, \ {0x5333, 0x8C12, S3_SAVAGE_MX, "Savage/IX-MV"}, \ {0x5333, 0x8C13, S3_SAVAGE_MX, "Savage/IX"}, \ {0x5333, 0x8C22, S3_SUPERSAVAGE, "SuperSavage MX/128"}, \ {0x5333, 0x8C24, S3_SUPERSAVAGE, "SuperSavage MX/64"}, \ {0x5333, 0x8C26, S3_SUPERSAVAGE, "SuperSavage MX/64C"}, \ {0x5333, 0x8C2A, S3_SUPERSAVAGE, "SuperSavage IX/128 SDR"}, \ {0x5333, 0x8C2B, S3_SUPERSAVAGE, "SuperSavage IX/128 DDR"}, \ {0x5333, 0x8C2C, S3_SUPERSAVAGE, "SuperSavage IX/64 SDR"}, \ {0x5333, 0x8C2D, S3_SUPERSAVAGE, "SuperSavage IX/64 DDR"}, \ {0x5333, 0x8C2E, S3_SUPERSAVAGE, "SuperSavage IX/C SDR"}, \ {0x5333, 0x8C2F, S3_SUPERSAVAGE, "SuperSavage IX/C DDR"}, \ {0x5333, 0x8D01, S3_TWISTER, "ProSavage Twister PN133"}, \ {0x5333, 0x8D02, S3_TWISTER, "ProSavage Twister KN133"}, \ {0x5333, 0x8D03, S3_PROSAVAGEDDR, "ProSavage DDR"}, \ {0x5333, 0x8D04, S3_PROSAVAGEDDR, "ProSavage DDR-K"}, \ {0, 0, 0, NULL} #define sis_PCI_IDS \ {0x18CA, 0x0040, SIS_CHIP_315, "Volari V3XT/V5/V8"}, \ {0x18CA, 0x0042, SIS_CHIP_315, "Volari Unknown"}, \ {0x1039, 0x0300, 0, "SiS 300/305"}, \ {0x1039, 0x5300, 0, "SiS 540"}, \ {0x1039, 0x6300, 0, "SiS 630"}, \ {0x1039, 0x6330, SIS_CHIP_315, "SiS 661"}, \ {0x1039, 0x7300, 0, "SiS 730"}, \ {0, 0, 0, NULL} #define tdfx_PCI_IDS \ {0x121A, 0x0003, 0, "3dfx Voodoo Banshee"}, \ {0x121A, 0x0004, 0, "3dfx Voodoo3 2000"}, \ {0x121A, 0x0005, 0, "3dfx Voodoo3 3000"}, \ {0x121A, 0x0007, 0, "3dfx Voodoo4 4500"}, \ {0x121A, 0x0009, 0, "3dfx Voodoo5 5500"}, \ {0x121A, 0x000B, 0, "3dfx Voodoo4 4200"}, \ {0, 0, 0, NULL} #define viadrv_PCI_IDS \ {0x1106, 0x3022, 0, "VIA CLE266 3022"}, \ {0x1106, 0x3108, 0, "VIA K8M800"}, \ {0x1106, 0x3118, VIA_PRO_GROUP_A, "VIA CN400 / PM8X0"}, \ {0x1106, 0x3122, 0, "VIA CLE266"}, \ {0x1106, 0x3157, VIA_PRO_GROUP_A, "VIA CX700"}, \ {0x1106, 0x3230, VIA_DX9_0, "VIA K8M890"}, \ {0x1106, 0x3343, 0, "VIA P4M890"}, \ {0x1106, 0x3344, 0, "VIA CN700 / VM800 / P4M800Pro"}, \ {0x1106, 0x3371, VIA_DX9_0, "VIA P4M900 / VN896"}, \ {0x1106, 0x7205, 0, "VIA KM400"}, \ {0, 0, 0, NULL} #define xgi_PCI_IDS \ {0x18CA, 0x0047, 0, "XP10 / XG47"}, \ {0x18CA, 0x2200, 0, "XP5"}, \ {0, 0, 0, NULL} Index: head/sys/dev/drm2/i915/i915_drv.c =================================================================== --- head/sys/dev/drm2/i915/i915_drv.c (revision 316748) +++ head/sys/dev/drm2/i915/i915_drv.c (revision 316749) @@ -1,1453 +1,1454 @@ /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*- */ /* * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * */ #include __FBSDID("$FreeBSD$"); #include #include #include #include "dev/drm2/i915/i915_drv.h" #ifdef __linux__ #include "dev/drm2/i915/i915_trace.h" #endif #include "dev/drm2/i915/intel_drv.h" #include #include "fb_if.h" static int i915_modeset __read_mostly = 1; TUNABLE_INT("drm.i915.modeset", &i915_modeset); module_param_named(modeset, i915_modeset, int, 0400); MODULE_PARM_DESC(modeset, "Use kernel modesetting [KMS] (0=DRM_I915_KMS from .config, " "1=on, -1=force vga console preference [default])"); #ifdef __linux__ unsigned int i915_fbpercrtc __always_unused = 0; module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400); #endif int i915_panel_ignore_lid __read_mostly = 1; TUNABLE_INT("drm.i915.panel_ignore_lid", &i915_panel_ignore_lid); module_param_named(panel_ignore_lid, i915_panel_ignore_lid, int, 0600); MODULE_PARM_DESC(panel_ignore_lid, "Override lid status (0=autodetect, 1=autodetect disabled [default], " "-1=force lid closed, -2=force lid open)"); unsigned int i915_powersave __read_mostly = 1; TUNABLE_INT("drm.i915.powersave", &i915_powersave); module_param_named(powersave, i915_powersave, int, 0600); MODULE_PARM_DESC(powersave, "Enable powersavings, fbc, downclocking, etc. (default: true)"); int i915_semaphores __read_mostly = -1; TUNABLE_INT("drm.i915.semaphores", &i915_semaphores); module_param_named(semaphores, i915_semaphores, int, 0600); MODULE_PARM_DESC(semaphores, "Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))"); int i915_enable_rc6 __read_mostly = -1; TUNABLE_INT("drm.i915.enable_rc6", &i915_enable_rc6); module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0400); MODULE_PARM_DESC(i915_enable_rc6, "Enable power-saving render C-state 6. " "Different stages can be selected via bitmask values " "(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). " "For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. " "default: -1 (use per-chip default)"); int i915_enable_fbc __read_mostly = -1; TUNABLE_INT("drm.i915.enable_fbc", &i915_enable_fbc); module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600); MODULE_PARM_DESC(i915_enable_fbc, "Enable frame buffer compression for power savings " "(default: -1 (use per-chip default))"); unsigned int i915_lvds_downclock __read_mostly = 0; TUNABLE_INT("drm.i915.lvds_downclock", &i915_lvds_downclock); module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400); MODULE_PARM_DESC(lvds_downclock, "Use panel (LVDS/eDP) downclocking for power savings " "(default: false)"); int i915_lvds_channel_mode __read_mostly; TUNABLE_INT("drm.i915.lvds_channel_mode", &i915_lvds_channel_mode); module_param_named(lvds_channel_mode, i915_lvds_channel_mode, int, 0600); MODULE_PARM_DESC(lvds_channel_mode, "Specify LVDS channel mode " "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)"); int i915_panel_use_ssc __read_mostly = -1; TUNABLE_INT("drm.i915.panel_use_ssc", &i915_panel_use_ssc); module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600); MODULE_PARM_DESC(lvds_use_ssc, "Use Spread Spectrum Clock with panels [LVDS/eDP] " "(default: auto from VBT)"); int i915_vbt_sdvo_panel_type __read_mostly = -1; TUNABLE_INT("drm.i915.vbt_sdvo_panel_type", &i915_vbt_sdvo_panel_type); module_param_named(vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600); MODULE_PARM_DESC(vbt_sdvo_panel_type, "Override/Ignore selection of SDVO panel mode in the VBT " "(-2=ignore, -1=auto [default], index in VBT BIOS table)"); static int i915_try_reset __read_mostly = true; TUNABLE_INT("drm.i915.try_reset", &i915_try_reset); module_param_named(reset, i915_try_reset, bool, 0600); MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)"); int i915_enable_hangcheck __read_mostly = true; TUNABLE_INT("drm.i915.enable_hangcheck", &i915_enable_hangcheck); module_param_named(enable_hangcheck, i915_enable_hangcheck, bool, 0644); MODULE_PARM_DESC(enable_hangcheck, "Periodically check GPU activity for detecting hangs. " "WARNING: Disabling this can cause system wide hangs. " "(default: true)"); int i915_enable_ppgtt __read_mostly = -1; TUNABLE_INT("drm.i915.enable_ppgtt", &i915_enable_ppgtt); module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600); MODULE_PARM_DESC(i915_enable_ppgtt, "Enable PPGTT (default: true)"); unsigned int i915_preliminary_hw_support __read_mostly = 0; TUNABLE_INT("drm.i915.enable_unsupported", &i915_preliminary_hw_support); module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 0600); MODULE_PARM_DESC(preliminary_hw_support, "Enable preliminary hardware support. " "Enable Haswell and ValleyView Support. " "(default: false)"); int intel_iommu_gfx_mapped = 0; TUNABLE_INT("drm.i915.intel_iommu_gfx_mapped", &intel_iommu_gfx_mapped); static struct drm_driver driver; int intel_agp_enabled = 1; /* On FreeBSD, agp is a required dependency. */ #define INTEL_VGA_DEVICE(id, info_) { \ .device = id, \ .info = info_, \ } static const struct intel_device_info intel_i830_info = { .gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .has_overlay = 1, .overlay_needs_physical = 1, }; static const struct intel_device_info intel_845g_info = { .gen = 2, .has_overlay = 1, .overlay_needs_physical = 1, }; static const struct intel_device_info intel_i85x_info = { .gen = 2, .is_i85x = 1, .is_mobile = 1, .cursor_needs_physical = 1, .has_overlay = 1, .overlay_needs_physical = 1, }; static const struct intel_device_info intel_i865g_info = { .gen = 2, .has_overlay = 1, .overlay_needs_physical = 1, }; static const struct intel_device_info intel_i915g_info = { .gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .has_overlay = 1, .overlay_needs_physical = 1, }; static const struct intel_device_info intel_i915gm_info = { .gen = 3, .is_mobile = 1, .cursor_needs_physical = 1, .has_overlay = 1, .overlay_needs_physical = 1, .supports_tv = 1, }; static const struct intel_device_info intel_i945g_info = { .gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .has_overlay = 1, .overlay_needs_physical = 1, }; static const struct intel_device_info intel_i945gm_info = { .gen = 3, .is_i945gm = 1, .is_mobile = 1, .has_hotplug = 1, .cursor_needs_physical = 1, .has_overlay = 1, .overlay_needs_physical = 1, .supports_tv = 1, }; static const struct intel_device_info intel_i965g_info = { .gen = 4, .is_broadwater = 1, .has_hotplug = 1, .has_overlay = 1, }; static const struct intel_device_info intel_i965gm_info = { .gen = 4, .is_crestline = 1, .is_mobile = 1, .has_fbc = 1, .has_hotplug = 1, .has_overlay = 1, .supports_tv = 1, }; static const struct intel_device_info intel_g33_info = { .gen = 3, .is_g33 = 1, .need_gfx_hws = 1, .has_hotplug = 1, .has_overlay = 1, }; static const struct intel_device_info intel_g45_info = { .gen = 4, .is_g4x = 1, .need_gfx_hws = 1, .has_pipe_cxsr = 1, .has_hotplug = 1, .has_bsd_ring = 1, }; static const struct intel_device_info intel_gm45_info = { .gen = 4, .is_g4x = 1, .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_pipe_cxsr = 1, .has_hotplug = 1, .supports_tv = 1, .has_bsd_ring = 1, }; static const struct intel_device_info intel_pineview_info = { .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .need_gfx_hws = 1, .has_hotplug = 1, .has_overlay = 1, }; static const struct intel_device_info intel_ironlake_d_info = { .gen = 5, .need_gfx_hws = 1, .has_hotplug = 1, .has_bsd_ring = 1, }; static const struct intel_device_info intel_ironlake_m_info = { .gen = 5, .is_mobile = 1, .need_gfx_hws = 1, .has_hotplug = 1, .has_fbc = 1, .has_bsd_ring = 1, }; static const struct intel_device_info intel_sandybridge_d_info = { .gen = 6, .need_gfx_hws = 1, .has_hotplug = 1, .has_bsd_ring = 1, .has_blt_ring = 1, .has_llc = 1, .has_force_wake = 1, }; static const struct intel_device_info intel_sandybridge_m_info = { .gen = 6, .is_mobile = 1, .need_gfx_hws = 1, .has_hotplug = 1, .has_fbc = 1, .has_bsd_ring = 1, .has_blt_ring = 1, .has_llc = 1, .has_force_wake = 1, }; static const struct intel_device_info intel_ivybridge_d_info = { .is_ivybridge = 1, .gen = 7, .need_gfx_hws = 1, .has_hotplug = 1, .has_bsd_ring = 1, .has_blt_ring = 1, .has_llc = 1, .has_force_wake = 1, }; static const struct intel_device_info intel_ivybridge_m_info = { .is_ivybridge = 1, .gen = 7, .is_mobile = 1, .need_gfx_hws = 1, .has_hotplug = 1, .has_fbc = 0, /* FBC is not enabled on Ivybridge mobile yet */ .has_bsd_ring = 1, .has_blt_ring = 1, .has_llc = 1, .has_force_wake = 1, }; static const struct intel_device_info intel_valleyview_m_info = { .gen = 7, .is_mobile = 1, .need_gfx_hws = 1, .has_hotplug = 1, .has_fbc = 0, .has_bsd_ring = 1, .has_blt_ring = 1, .is_valleyview = 1, }; static const struct intel_device_info intel_valleyview_d_info = { .gen = 7, .need_gfx_hws = 1, .has_hotplug = 1, .has_fbc = 0, .has_bsd_ring = 1, .has_blt_ring = 1, .is_valleyview = 1, }; static const struct intel_device_info intel_haswell_d_info = { .is_haswell = 1, .gen = 7, .need_gfx_hws = 1, .has_hotplug = 1, .has_bsd_ring = 1, .has_blt_ring = 1, .has_llc = 1, .has_force_wake = 1, }; static const struct intel_device_info intel_haswell_m_info = { .is_haswell = 1, .gen = 7, .is_mobile = 1, .need_gfx_hws = 1, .has_hotplug = 1, .has_bsd_ring = 1, .has_blt_ring = 1, .has_llc = 1, .has_force_wake = 1, }; /* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */ static const drm_pci_id_list_t pciidlist[] = { i915_PCI_IDS }; static const struct intel_gfx_device_id { int device; const struct intel_device_info *info; } i915_infolist[] = { /* aka */ INTEL_VGA_DEVICE(0x3577, &intel_i830_info), /* I830_M */ INTEL_VGA_DEVICE(0x2562, &intel_845g_info), /* 845_G */ INTEL_VGA_DEVICE(0x3582, &intel_i85x_info), /* I855_GM */ INTEL_VGA_DEVICE(0x358e, &intel_i85x_info), INTEL_VGA_DEVICE(0x2572, &intel_i865g_info), /* I865_G */ INTEL_VGA_DEVICE(0x2582, &intel_i915g_info), /* I915_G */ INTEL_VGA_DEVICE(0x258a, &intel_i915g_info), /* E7221_G */ INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info), /* I915_GM */ INTEL_VGA_DEVICE(0x2772, &intel_i945g_info), /* I945_G */ INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info), /* I945_GM */ INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info), /* I945_GME */ INTEL_VGA_DEVICE(0x2972, &intel_i965g_info), /* I946_GZ */ INTEL_VGA_DEVICE(0x2982, &intel_i965g_info), /* G35_G */ INTEL_VGA_DEVICE(0x2992, &intel_i965g_info), /* I965_Q */ INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info), /* I965_G */ INTEL_VGA_DEVICE(0x29b2, &intel_g33_info), /* Q35_G */ INTEL_VGA_DEVICE(0x29c2, &intel_g33_info), /* G33_G */ INTEL_VGA_DEVICE(0x29d2, &intel_g33_info), /* Q33_G */ INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info), /* I965_GM */ INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info), /* I965_GME */ INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info), /* GM45_G */ INTEL_VGA_DEVICE(0x2e02, &intel_g45_info), /* IGD_E_G */ INTEL_VGA_DEVICE(0x2e12, &intel_g45_info), /* Q45_G */ INTEL_VGA_DEVICE(0x2e22, &intel_g45_info), /* G45_G */ INTEL_VGA_DEVICE(0x2e32, &intel_g45_info), /* G41_G */ INTEL_VGA_DEVICE(0x2e42, &intel_g45_info), /* B43_G */ INTEL_VGA_DEVICE(0x2e92, &intel_g45_info), /* B43_G.1 */ INTEL_VGA_DEVICE(0xa001, &intel_pineview_info), INTEL_VGA_DEVICE(0xa011, &intel_pineview_info), INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info), INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info), INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info), INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info), INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info), INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info), INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info), INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info), INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info), INTEL_VGA_DEVICE(0x0156, &intel_ivybridge_m_info), /* GT1 mobile */ INTEL_VGA_DEVICE(0x0166, &intel_ivybridge_m_info), /* GT2 mobile */ INTEL_VGA_DEVICE(0x0152, &intel_ivybridge_d_info), /* GT1 desktop */ INTEL_VGA_DEVICE(0x0162, &intel_ivybridge_d_info), /* GT2 desktop */ INTEL_VGA_DEVICE(0x015a, &intel_ivybridge_d_info), /* GT1 server */ INTEL_VGA_DEVICE(0x016a, &intel_ivybridge_d_info), /* GT2 server */ INTEL_VGA_DEVICE(0x0402, &intel_haswell_d_info), /* GT1 desktop */ INTEL_VGA_DEVICE(0x0412, &intel_haswell_d_info), /* GT2 desktop */ + INTEL_VGA_DEVICE(0x041e, &intel_haswell_d_info), /* GT2 desktop */ INTEL_VGA_DEVICE(0x0422, &intel_haswell_d_info), /* GT2 desktop */ INTEL_VGA_DEVICE(0x040a, &intel_haswell_d_info), /* GT1 server */ INTEL_VGA_DEVICE(0x041a, &intel_haswell_d_info), /* GT2 server */ INTEL_VGA_DEVICE(0x042a, &intel_haswell_d_info), /* GT2 server */ INTEL_VGA_DEVICE(0x0406, &intel_haswell_m_info), /* GT1 mobile */ INTEL_VGA_DEVICE(0x0416, &intel_haswell_m_info), /* GT2 mobile */ INTEL_VGA_DEVICE(0x0426, &intel_haswell_m_info), /* GT2 mobile */ INTEL_VGA_DEVICE(0x0C02, &intel_haswell_d_info), /* SDV GT1 desktop */ INTEL_VGA_DEVICE(0x0C12, &intel_haswell_d_info), /* SDV GT2 desktop */ INTEL_VGA_DEVICE(0x0C22, &intel_haswell_d_info), /* SDV GT2 desktop */ INTEL_VGA_DEVICE(0x0C0A, &intel_haswell_d_info), /* SDV GT1 server */ INTEL_VGA_DEVICE(0x0C1A, &intel_haswell_d_info), /* SDV GT2 server */ INTEL_VGA_DEVICE(0x0C2A, &intel_haswell_d_info), /* SDV GT2 server */ INTEL_VGA_DEVICE(0x0C06, &intel_haswell_m_info), /* SDV GT1 mobile */ INTEL_VGA_DEVICE(0x0C16, &intel_haswell_m_info), /* SDV GT2 mobile */ INTEL_VGA_DEVICE(0x0C26, &intel_haswell_m_info), /* SDV GT2 mobile */ INTEL_VGA_DEVICE(0x0A02, &intel_haswell_d_info), /* ULT GT1 desktop */ INTEL_VGA_DEVICE(0x0A12, &intel_haswell_d_info), /* ULT GT2 desktop */ INTEL_VGA_DEVICE(0x0A22, &intel_haswell_d_info), /* ULT GT2 desktop */ INTEL_VGA_DEVICE(0x0A0A, &intel_haswell_d_info), /* ULT GT1 server */ INTEL_VGA_DEVICE(0x0A1A, &intel_haswell_d_info), /* ULT GT2 server */ INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT2 server */ INTEL_VGA_DEVICE(0x0A06, &intel_haswell_m_info), /* ULT GT1 mobile */ INTEL_VGA_DEVICE(0x0A16, &intel_haswell_m_info), /* ULT GT2 mobile */ INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT2 mobile */ INTEL_VGA_DEVICE(0x0D02, &intel_haswell_d_info), /* CRW GT1 desktop */ INTEL_VGA_DEVICE(0x0D12, &intel_haswell_d_info), /* CRW GT2 desktop */ INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT2 desktop */ INTEL_VGA_DEVICE(0x0D0A, &intel_haswell_d_info), /* CRW GT1 server */ INTEL_VGA_DEVICE(0x0D1A, &intel_haswell_d_info), /* CRW GT2 server */ INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT2 server */ INTEL_VGA_DEVICE(0x0D06, &intel_haswell_m_info), /* CRW GT1 mobile */ INTEL_VGA_DEVICE(0x0D16, &intel_haswell_m_info), /* CRW GT2 mobile */ INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT2 mobile */ INTEL_VGA_DEVICE(0x0f30, &intel_valleyview_m_info), INTEL_VGA_DEVICE(0x0157, &intel_valleyview_m_info), INTEL_VGA_DEVICE(0x0155, &intel_valleyview_d_info), {0, 0} }; #if defined(CONFIG_DRM_I915_KMS) MODULE_DEVICE_TABLE(pci, pciidlist); #endif void intel_detect_pch(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; device_t pch; /* * The reason to probe ISA bridge instead of Dev31:Fun0 is to * make graphics device passthrough work easy for VMM, that only * need to expose ISA bridge to let driver know the real hardware * underneath. This is a requirement from virtualization team. */ pch = pci_find_class(PCIC_BRIDGE, PCIS_BRIDGE_ISA); if (pch) { if (pci_get_vendor(pch) == PCI_VENDOR_ID_INTEL) { unsigned short id; id = pci_get_device(pch) & INTEL_PCH_DEVICE_ID_MASK; dev_priv->pch_id = id; if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) { dev_priv->pch_type = PCH_IBX; dev_priv->num_pch_pll = 2; DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); WARN_ON(!IS_GEN5(dev)); } else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) { dev_priv->pch_type = PCH_CPT; dev_priv->num_pch_pll = 2; DRM_DEBUG_KMS("Found CougarPoint PCH\n"); WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev))); } else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) { /* PantherPoint is CPT compatible */ dev_priv->pch_type = PCH_CPT; dev_priv->num_pch_pll = 2; DRM_DEBUG_KMS("Found PatherPoint PCH\n"); WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev))); } else if (id == INTEL_PCH_LPT_DEVICE_ID_TYPE) { dev_priv->pch_type = PCH_LPT; dev_priv->num_pch_pll = 0; DRM_DEBUG_KMS("Found LynxPoint PCH\n"); WARN_ON(!IS_HASWELL(dev)); } else if (id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) { dev_priv->pch_type = PCH_LPT; dev_priv->num_pch_pll = 0; DRM_DEBUG_KMS("Found LynxPoint LP PCH\n"); WARN_ON(!IS_HASWELL(dev)); } BUG_ON(dev_priv->num_pch_pll > I915_NUM_PLLS); } } } bool i915_semaphore_is_enabled(struct drm_device *dev) { if (INTEL_INFO(dev)->gen < 6) return 0; if (i915_semaphores >= 0) return i915_semaphores; #ifdef CONFIG_INTEL_IOMMU /* Enable semaphores on SNB when IO remapping is off */ if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped) return false; #endif return 1; } static int i915_drm_freeze(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; drm_kms_helper_poll_disable(dev); #ifdef __linux__ pci_save_state(dev->pdev); #endif /* If KMS is active, we do the leavevt stuff here */ if (drm_core_check_feature(dev, DRIVER_MODESET)) { int error = i915_gem_idle(dev); if (error) { dev_err(dev->dev, "GEM idle failed, resume might fail\n"); return error; } taskqueue_cancel_timeout(dev_priv->wq, &dev_priv->rps.delayed_resume_work, NULL); intel_modeset_disable(dev); drm_irq_uninstall(dev); } i915_save_state(dev); intel_opregion_fini(dev); /* Modeset on resume, not lid events */ dev_priv->modeset_on_lid = 0; console_lock(); intel_fbdev_set_suspend(dev, 1); console_unlock(); return 0; } int i915_suspend(struct drm_device *dev, pm_message_t state) { int error; if (!dev || !dev->dev_private) { DRM_ERROR("dev: %p\n", dev); DRM_ERROR("DRM not initialized, aborting suspend.\n"); return -ENODEV; } if (state.event == PM_EVENT_PRETHAW) return 0; if (dev->switch_power_state == DRM_SWITCH_POWER_OFF) return 0; error = i915_drm_freeze(dev); if (error) return error; if (state.event == PM_EVENT_SUSPEND) { #ifdef __linux__ /* Shut down the device */ pci_disable_device(dev->pdev); pci_set_power_state(dev->pdev, PCI_D3hot); #endif } return 0; } void intel_console_resume(void *arg, int pending) { struct drm_i915_private *dev_priv = arg; struct drm_device *dev = dev_priv->dev; console_lock(); intel_fbdev_set_suspend(dev, 0); console_unlock(); } static int __i915_drm_thaw(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; int error = 0; i915_restore_state(dev); intel_opregion_setup(dev); /* KMS EnterVT equivalent */ if (drm_core_check_feature(dev, DRIVER_MODESET)) { intel_init_pch_refclk(dev); DRM_LOCK(dev); dev_priv->mm.suspended = 0; error = i915_gem_init_hw(dev); DRM_UNLOCK(dev); intel_modeset_init_hw(dev); intel_modeset_setup_hw_state(dev, false); drm_irq_install(dev); } intel_opregion_init(dev); dev_priv->modeset_on_lid = 0; /* * The console lock can be pretty contented on resume due * to all the printk activity. Try to keep it out of the hot * path of resume if possible. */ if (console_trylock()) { intel_fbdev_set_suspend(dev, 0); console_unlock(); } else { taskqueue_enqueue(dev_priv->wq, &dev_priv->console_resume_work); } return error; } #ifdef __linux__ static int i915_drm_thaw(struct drm_device *dev) { int error = 0; intel_gt_reset(dev); if (drm_core_check_feature(dev, DRIVER_MODESET)) { DRM_LOCK(dev); i915_gem_restore_gtt_mappings(dev); DRM_UNLOCK(dev); } __i915_drm_thaw(dev); return error; } #endif int i915_resume(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; int ret; if (dev->switch_power_state == DRM_SWITCH_POWER_OFF) return 0; #ifdef __linux__ if (pci_enable_device(dev->pdev)) return -EIO; pci_set_master(dev->pdev); #endif intel_gt_reset(dev); /* * Platforms with opregion should have sane BIOS, older ones (gen3 and * earlier) need this since the BIOS might clear all our scratch PTEs. */ if (drm_core_check_feature(dev, DRIVER_MODESET) && !dev_priv->opregion.header) { DRM_LOCK(dev); i915_gem_restore_gtt_mappings(dev); DRM_UNLOCK(dev); } ret = __i915_drm_thaw(dev); if (ret) return ret; drm_kms_helper_poll_enable(dev); return 0; } static int i8xx_do_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; int onems; if (IS_I85X(dev)) return -ENODEV; onems = hz / 1000; if (onems == 0) onems = 1; I915_WRITE(D_STATE, I915_READ(D_STATE) | DSTATE_GFX_RESET_I830); POSTING_READ(D_STATE); if (IS_I830(dev) || IS_845G(dev)) { I915_WRITE(DEBUG_RESET_I830, DEBUG_RESET_DISPLAY | DEBUG_RESET_RENDER | DEBUG_RESET_FULL); POSTING_READ(DEBUG_RESET_I830); pause("i8xxrst1", onems); I915_WRITE(DEBUG_RESET_I830, 0); POSTING_READ(DEBUG_RESET_I830); } pause("i8xxrst2", onems); I915_WRITE(D_STATE, I915_READ(D_STATE) & ~DSTATE_GFX_RESET_I830); POSTING_READ(D_STATE); return 0; } static int i965_reset_complete(struct drm_device *dev) { u8 gdrst; pci_read_config_byte(dev->dev, I965_GDRST, &gdrst); return (gdrst & GRDOM_RESET_ENABLE) == 0; } static int i965_do_reset(struct drm_device *dev) { int ret; u8 gdrst; /* * Set the domains we want to reset (GRDOM/bits 2 and 3) as * well as the reset bit (GR/bit 0). Setting the GR bit * triggers the reset; when done, the hardware will clear it. */ pci_read_config_byte(dev->dev, I965_GDRST, &gdrst); pci_write_config_byte(dev->dev, I965_GDRST, gdrst | GRDOM_RENDER | GRDOM_RESET_ENABLE); ret = wait_for(i965_reset_complete(dev), 500); if (ret) return ret; /* We can't reset render&media without also resetting display ... */ pci_read_config_byte(dev->dev, I965_GDRST, &gdrst); pci_write_config_byte(dev->dev, I965_GDRST, gdrst | GRDOM_MEDIA | GRDOM_RESET_ENABLE); return wait_for(i965_reset_complete(dev), 500); } static int ironlake_do_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; u32 gdrst; int ret; gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR); I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, gdrst | GRDOM_RENDER | GRDOM_RESET_ENABLE); ret = wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); if (ret) return ret; /* We can't reset render&media without also resetting display ... */ gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR); I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, gdrst | GRDOM_MEDIA | GRDOM_RESET_ENABLE); return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); } static int gen6_do_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; int ret; /* Hold gt_lock across reset to prevent any register access * with forcewake not set correctly */ mtx_lock(&dev_priv->gt_lock); /* Reset the chip */ /* GEN6_GDRST is not in the gt power well, no need to check * for fifo space for the write or forcewake the chip for * the read */ I915_WRITE_NOTRACE(GEN6_GDRST, GEN6_GRDOM_FULL); /* Spin waiting for the device to ack the reset request */ /* * NOTE Linux<->FreeBSD: We use _intel_wait_for() instead of * wait_for(), because we want to set the 4th argument to 0. * This allows us to use a struct mtx for dev_priv->gt_lock and * avoid a LOR. */ ret = _intel_wait_for(dev, (I915_READ_NOTRACE(GEN6_GDRST) & GEN6_GRDOM_FULL) == 0, 500, 0, "915rst"); /* If reset with a user forcewake, try to restore, otherwise turn it off */ if (dev_priv->forcewake_count) dev_priv->gt.force_wake_get(dev_priv); else dev_priv->gt.force_wake_put(dev_priv); /* Restore fifo count */ dev_priv->gt_fifo_count = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES); mtx_unlock(&dev_priv->gt_lock); return ret; } int intel_gpu_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; int ret = -ENODEV; switch (INTEL_INFO(dev)->gen) { case 7: case 6: ret = gen6_do_reset(dev); break; case 5: ret = ironlake_do_reset(dev); break; case 4: ret = i965_do_reset(dev); break; case 2: ret = i8xx_do_reset(dev); break; } /* Also reset the gpu hangman. */ if (dev_priv->stop_rings) { DRM_DEBUG("Simulated gpu hang, resetting stop_rings\n"); dev_priv->stop_rings = 0; if (ret == -ENODEV) { DRM_ERROR("Reset not implemented, but ignoring " "error for simulated gpu hangs\n"); ret = 0; } } return ret; } /** * i915_reset - reset chip after a hang * @dev: drm device to reset * * Reset the chip. Useful if a hang is detected. Returns zero on successful * reset or otherwise an error code. * * Procedure is fairly simple: * - reset the chip using the reset reg * - re-init context state * - re-init hardware status page * - re-init ring buffer * - re-init interrupt state * - re-init display */ int i915_reset(struct drm_device *dev) { drm_i915_private_t *dev_priv = dev->dev_private; int ret; if (!i915_try_reset) return 0; DRM_LOCK(dev); i915_gem_reset(dev); ret = -ENODEV; if (get_seconds() - dev_priv->last_gpu_reset < 5) DRM_ERROR("GPU hanging too fast, declaring wedged!\n"); else ret = intel_gpu_reset(dev); dev_priv->last_gpu_reset = get_seconds(); if (ret) { DRM_ERROR("Failed to reset chip.\n"); DRM_UNLOCK(dev); return ret; } /* Ok, now get things going again... */ /* * Everything depends on having the GTT running, so we need to start * there. Fortunately we don't need to do this unless we reset the * chip at a PCI level. * * Next we need to restore the context, but we don't use those * yet either... * * Ring buffer needs to be re-initialized in the KMS case, or if X * was running at the time of the reset (i.e. we weren't VT * switched away). */ if (drm_core_check_feature(dev, DRIVER_MODESET) || !dev_priv->mm.suspended) { struct intel_ring_buffer *ring; int i; dev_priv->mm.suspended = 0; i915_gem_init_swizzling(dev); for_each_ring(ring, dev_priv, i) ring->init(ring); i915_gem_context_init(dev); i915_gem_init_ppgtt(dev); /* * It would make sense to re-init all the other hw state, at * least the rps/rc6/emon init done within modeset_init_hw. For * some unknown reason, this blows up my ilk, so don't. */ DRM_UNLOCK(dev); drm_irq_uninstall(dev); drm_irq_install(dev); } else { DRM_UNLOCK(dev); } return 0; } const struct intel_device_info * i915_get_device_id(int device) { const struct intel_gfx_device_id *did; for (did = &i915_infolist[0]; did->device != 0; did++) { if (did->device != device) continue; return (did->info); } return (NULL); } static int i915_probe(device_t kdev) { const struct intel_device_info *intel_info = i915_get_device_id(pci_get_device(kdev)); if (intel_info == NULL) return (ENXIO); if (intel_info->is_valleyview) if(!i915_preliminary_hw_support) { DRM_ERROR("Preliminary hardware support disabled\n"); return (ENXIO); } /* Only bind to function 0 of the device. Early generations * used function 1 as a placeholder for multi-head. This causes * us confusion instead, especially on the systems where both * functions have the same PCI-ID! */ if (pci_get_function(kdev)) return (ENXIO); /* We've managed to ship a kms-enabled ddx that shipped with an XvMC * implementation for gen3 (and only gen3) that used legacy drm maps * (gasp!) to share buffers between X and the client. Hence we need to * keep around the fake agp stuff for gen3, even when kms is enabled. */ if (intel_info->gen != 3) { driver.driver_features &= ~(DRIVER_USE_AGP | DRIVER_REQUIRE_AGP); } else if (!intel_agp_enabled) { DRM_ERROR("drm/i915 can't work without intel_agp module!\n"); return (ENXIO); } return -drm_probe_helper(kdev, pciidlist); } #ifdef __linux__ static void i915_pci_remove(struct pci_dev *pdev) { struct drm_device *dev = pci_get_drvdata(pdev); drm_put_dev(dev); } static int i915_pm_suspend(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); struct drm_device *drm_dev = pci_get_drvdata(pdev); int error; if (!drm_dev || !drm_dev->dev_private) { dev_err(dev, "DRM not initialized, aborting suspend.\n"); return -ENODEV; } if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF) return 0; error = i915_drm_freeze(drm_dev); if (error) return error; pci_disable_device(pdev); pci_set_power_state(pdev, PCI_D3hot); return 0; } static int i915_pm_resume(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); struct drm_device *drm_dev = pci_get_drvdata(pdev); return i915_resume(drm_dev); } static int i915_pm_freeze(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); struct drm_device *drm_dev = pci_get_drvdata(pdev); if (!drm_dev || !drm_dev->dev_private) { dev_err(dev, "DRM not initialized, aborting suspend.\n"); return -ENODEV; } return i915_drm_freeze(drm_dev); } static int i915_pm_thaw(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); struct drm_device *drm_dev = pci_get_drvdata(pdev); return i915_drm_thaw(drm_dev); } static int i915_pm_poweroff(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); struct drm_device *drm_dev = pci_get_drvdata(pdev); return i915_drm_freeze(drm_dev); } static const struct dev_pm_ops i915_pm_ops = { .suspend = i915_pm_suspend, .resume = i915_pm_resume, .freeze = i915_pm_freeze, .thaw = i915_pm_thaw, .poweroff = i915_pm_poweroff, .restore = i915_pm_resume, }; static const struct vm_operations_struct i915_gem_vm_ops = { .fault = i915_gem_fault, .open = drm_gem_vm_open, .close = drm_gem_vm_close, }; static const struct file_operations i915_driver_fops = { .owner = THIS_MODULE, .open = drm_open, .release = drm_release, .unlocked_ioctl = drm_ioctl, .mmap = drm_gem_mmap, .poll = drm_poll, .fasync = drm_fasync, .read = drm_read, #ifdef CONFIG_COMPAT .compat_ioctl = i915_compat_ioctl, #endif .llseek = noop_llseek, }; #endif /* __linux__ */ #ifdef COMPAT_FREEBSD32 extern struct drm_ioctl_desc i915_compat_ioctls[]; extern int i915_compat_ioctls_nr; #endif static struct drm_driver driver = { /* Don't use MTRRs here; the Xserver or userspace app should * deal with them for Intel hardware. */ .driver_features = DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/ DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | DRIVER_PRIME, .load = i915_driver_load, .unload = i915_driver_unload, .open = i915_driver_open, .lastclose = i915_driver_lastclose, .preclose = i915_driver_preclose, .postclose = i915_driver_postclose, /* Used in place of i915_pm_ops for non-DRIVER_MODESET */ .suspend = i915_suspend, .resume = i915_resume, .device_is_agp = i915_driver_device_is_agp, .master_create = i915_master_create, .master_destroy = i915_master_destroy, #if defined(CONFIG_DEBUG_FS) .debugfs_init = i915_debugfs_init, .debugfs_cleanup = i915_debugfs_cleanup, #endif .gem_init_object = i915_gem_init_object, .gem_free_object = i915_gem_free_object, #if defined(__linux__) .gem_vm_ops = &i915_gem_vm_ops, #elif defined(__FreeBSD__) .gem_pager_ops = &i915_gem_pager_ops, #endif #ifdef FREEBSD_WIP .prime_handle_to_fd = drm_gem_prime_handle_to_fd, .prime_fd_to_handle = drm_gem_prime_fd_to_handle, .gem_prime_export = i915_gem_prime_export, .gem_prime_import = i915_gem_prime_import, #endif /* FREEBSD_WIP */ .dumb_create = i915_gem_dumb_create, .dumb_map_offset = i915_gem_mmap_gtt, .dumb_destroy = i915_gem_dumb_destroy, .ioctls = i915_ioctls, #ifdef COMPAT_FREEBSD32 .compat_ioctls = i915_compat_ioctls, .num_compat_ioctls = &i915_compat_ioctls_nr, #endif #ifdef __linux__ .fops = &i915_driver_fops, #endif #ifdef __FreeBSD__ .sysctl_init = i915_sysctl_init, .sysctl_cleanup = i915_sysctl_cleanup, #endif .name = DRIVER_NAME, .desc = DRIVER_DESC, .date = DRIVER_DATE, .major = DRIVER_MAJOR, .minor = DRIVER_MINOR, .patchlevel = DRIVER_PATCHLEVEL, }; #ifdef __linux__ static struct pci_driver i915_pci_driver = { .name = DRIVER_NAME, .id_table = pciidlist, .probe = i915_pci_probe, .remove = i915_pci_remove, .driver.pm = &i915_pm_ops, }; #endif static int __init i915_attach(device_t kdev) { driver.num_ioctls = i915_max_ioctl; /* * If CONFIG_DRM_I915_KMS is set, default to KMS unless * explicitly disabled with the module pararmeter. * * Otherwise, just follow the parameter (defaulting to off). * * Allow optional vga_text_mode_force boot option to override * the default behavior. */ #if defined(CONFIG_DRM_I915_KMS) if (i915_modeset != 0) driver.driver_features |= DRIVER_MODESET; #endif if (i915_modeset == 1) driver.driver_features |= DRIVER_MODESET; #ifdef CONFIG_VGA_CONSOLE if (vgacon_text_force() && i915_modeset == -1) driver.driver_features &= ~DRIVER_MODESET; #endif if (!(driver.driver_features & DRIVER_MODESET)) driver.get_vblank_timestamp = NULL; return (-drm_attach_helper(kdev, pciidlist, &driver)); } static struct fb_info * i915_fb_helper_getinfo(device_t kdev) { struct intel_fbdev *ifbdev; drm_i915_private_t *dev_priv; struct drm_device *dev; struct fb_info *info; dev = device_get_softc(kdev); dev_priv = dev->dev_private; ifbdev = dev_priv->fbdev; if (ifbdev == NULL) return (NULL); info = ifbdev->helper.fbdev; return (info); } static device_method_t i915_methods[] = { /* Device interface */ DEVMETHOD(device_probe, i915_probe), DEVMETHOD(device_attach, i915_attach), DEVMETHOD(device_suspend, drm_generic_suspend), DEVMETHOD(device_resume, drm_generic_resume), DEVMETHOD(device_detach, drm_generic_detach), /* Framebuffer service methods */ DEVMETHOD(fb_getinfo, i915_fb_helper_getinfo), DEVMETHOD_END }; static driver_t i915_driver = { "drmn", i915_methods, sizeof(struct drm_device) }; MODULE_AUTHOR(DRIVER_AUTHOR); MODULE_DESCRIPTION(DRIVER_DESC); MODULE_LICENSE("GPL and additional rights"); extern devclass_t drm_devclass; DRIVER_MODULE_ORDERED(i915kms, vgapci, i915_driver, drm_devclass, 0, 0, SI_ORDER_ANY); MODULE_DEPEND(i915kms, drmn, 1, 1, 1); MODULE_DEPEND(i915kms, agp, 1, 1, 1); MODULE_DEPEND(i915kms, iicbus, 1, 1, 1); MODULE_DEPEND(i915kms, iic, 1, 1, 1); MODULE_DEPEND(i915kms, iicbb, 1, 1, 1); /* We give fast paths for the really cool registers */ #define NEEDS_FORCE_WAKE(dev_priv, reg) \ ((HAS_FORCE_WAKE((dev_priv)->dev)) && \ ((reg) < 0x40000) && \ ((reg) != FORCEWAKE)) static bool IS_DISPLAYREG(u32 reg) { /* * This should make it easier to transition modules over to the * new register block scheme, since we can do it incrementally. */ if (reg >= VLV_DISPLAY_BASE) return false; if (reg >= RENDER_RING_BASE && reg < RENDER_RING_BASE + 0xff) return false; if (reg >= GEN6_BSD_RING_BASE && reg < GEN6_BSD_RING_BASE + 0xff) return false; if (reg >= BLT_RING_BASE && reg < BLT_RING_BASE + 0xff) return false; if (reg == PGTBL_ER) return false; if (reg >= IPEIR_I965 && reg < HWSTAM) return false; if (reg == MI_MODE) return false; if (reg == GFX_MODE_GEN7) return false; if (reg == RENDER_HWS_PGA_GEN7 || reg == BSD_HWS_PGA_GEN7 || reg == BLT_HWS_PGA_GEN7) return false; if (reg == GEN6_BSD_SLEEP_PSMI_CONTROL || reg == GEN6_BSD_RNCID) return false; if (reg == GEN6_BLITTER_ECOSKPD) return false; if (reg >= 0x4000c && reg <= 0x4002c) return false; if (reg >= 0x4f000 && reg <= 0x4f08f) return false; if (reg >= 0x4f100 && reg <= 0x4f11f) return false; if (reg >= VLV_MASTER_IER && reg <= GEN6_PMIER) return false; if (reg >= FENCE_REG_SANDYBRIDGE_0 && reg < (FENCE_REG_SANDYBRIDGE_0 + (16*8))) return false; if (reg >= VLV_IIR_RW && reg <= VLV_ISR) return false; if (reg == FORCEWAKE_VLV || reg == FORCEWAKE_ACK_VLV) return false; if (reg == GEN6_GDRST) return false; switch (reg) { case _3D_CHICKEN3: case IVB_CHICKEN3: case GEN7_COMMON_SLICE_CHICKEN1: case GEN7_L3CNTLREG1: case GEN7_L3_CHICKEN_MODE_REGISTER: case GEN7_ROW_CHICKEN2: case GEN7_L3SQCREG4: case GEN7_SQ_CHICKEN_MBCUNIT_CONFIG: case GEN7_HALF_SLICE_CHICKEN1: case GEN6_MBCTL: case GEN6_UCGCTL2: return false; default: break; } return true; } static void ilk_dummy_write(struct drm_i915_private *dev_priv) { /* WaIssueDummyWriteToWakeupFromRC6: Issue a dummy write to wake up the * chip from rc6 before touching it for real. MI_MODE is masked, hence * harmless to write 0 into. */ I915_WRITE_NOTRACE(MI_MODE, 0); } #define __i915_read(x, y) \ u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \ u##x val = 0; \ if (IS_GEN5(dev_priv->dev)) \ ilk_dummy_write(dev_priv); \ if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \ mtx_lock(&dev_priv->gt_lock); \ if (dev_priv->forcewake_count == 0) \ dev_priv->gt.force_wake_get(dev_priv); \ val = DRM_READ##x(dev_priv->mmio_map, reg); \ if (dev_priv->forcewake_count == 0) \ dev_priv->gt.force_wake_put(dev_priv); \ mtx_unlock(&dev_priv->gt_lock); \ } else if (IS_VALLEYVIEW(dev_priv->dev) && IS_DISPLAYREG(reg)) { \ val = DRM_READ##x(dev_priv->mmio_map, reg + 0x180000); \ } else { \ val = DRM_READ##x(dev_priv->mmio_map, reg); \ } \ trace_i915_reg_rw(false, reg, val, sizeof(val)); \ return val; \ } __i915_read(8, b) __i915_read(16, w) __i915_read(32, l) __i915_read(64, q) #undef __i915_read #define __i915_write(x, y) \ void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \ u32 __fifo_ret = 0; \ trace_i915_reg_rw(true, reg, val, sizeof(val)); \ if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \ __fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \ } \ if (IS_GEN5(dev_priv->dev)) \ ilk_dummy_write(dev_priv); \ if (IS_HASWELL(dev_priv->dev) && (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \ DRM_ERROR("Unknown unclaimed register before writing to %x\n", reg); \ I915_WRITE_NOTRACE(GEN7_ERR_INT, ERR_INT_MMIO_UNCLAIMED); \ } \ if (IS_VALLEYVIEW(dev_priv->dev) && IS_DISPLAYREG(reg)) { \ DRM_WRITE##x(dev_priv->mmio_map, reg + 0x180000, val); \ } else { \ DRM_WRITE##x(dev_priv->mmio_map, reg, val); \ } \ if (unlikely(__fifo_ret)) { \ gen6_gt_check_fifodbg(dev_priv); \ } \ if (IS_HASWELL(dev_priv->dev) && (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \ DRM_ERROR("Unclaimed write to %x\n", reg); \ DRM_WRITE32(dev_priv->mmio_map, GEN7_ERR_INT, ERR_INT_MMIO_UNCLAIMED); \ } \ } __i915_write(8, b) __i915_write(16, w) __i915_write(32, l) __i915_write(64, q) #undef __i915_write static const struct register_whitelist { uint64_t offset; uint32_t size; uint32_t gen_bitmask; /* support gens, 0x10 for 4, 0x30 for 4 and 5, etc. */ } whitelist[] = { { RING_TIMESTAMP(RENDER_RING_BASE), 8, 0xF0 }, }; int i915_reg_read_ioctl(struct drm_device *dev, void *data, struct drm_file *file) { struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_reg_read *reg = data; struct register_whitelist const *entry = whitelist; int i; for (i = 0; i < ARRAY_SIZE(whitelist); i++, entry++) { if (entry->offset == reg->offset && (1 << INTEL_INFO(dev)->gen & entry->gen_bitmask)) break; } if (i == ARRAY_SIZE(whitelist)) return -EINVAL; switch (entry->size) { case 8: reg->val = I915_READ64(reg->offset); break; case 4: reg->val = I915_READ(reg->offset); break; case 2: reg->val = I915_READ16(reg->offset); break; case 1: reg->val = I915_READ8(reg->offset); break; default: WARN_ON(1); return -EINVAL; } return 0; }