Index: head/lib/libc/mips/Makefile.inc =================================================================== --- head/lib/libc/mips/Makefile.inc (revision 315423) +++ head/lib/libc/mips/Makefile.inc (revision 315424) @@ -1,9 +1,5 @@ # $NetBSD: Makefile.inc,v 1.7 2005/09/17 11:49:39 tsutsui Exp $ # $FreeBSD$ -.if ${MACHINE_ARCH:Mmips*hf} == "" -CFLAGS+=-DSOFTFLOAT -.endif - SRCS+= machdep_ldisd.c SYM_MAPS+= ${LIBC_SRCTOP}/mips/Symbol.map Index: head/lib/libc/mips/gen/_setjmp.S =================================================================== --- head/lib/libc/mips/gen/_setjmp.S (revision 315423) +++ head/lib/libc/mips/gen/_setjmp.S (revision 315424) @@ -1,201 +1,201 @@ /* $NetBSD: _setjmp.S,v 1.20.34.5 2010/02/03 23:46:47 matt Exp $ */ /*- * Copyright (c) 1991, 1993 * The Regents of the University of California. All rights reserved. * * This code is derived from software contributed to Berkeley by * Ralph Campbell. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include "SYS.h" #if defined(LIBC_SCCS) && !defined(lint) #if 0 RCSID("from: @(#)_setjmp.s 8.1 (Berkeley) 6/4/93") #else RCSID("$NetBSD: _setjmp.S,v 1.20.34.5 2010/02/03 23:46:47 matt Exp $") #endif #endif /* LIBC_SCCS and not lint */ /* * C library -- _setjmp, _longjmp * * _longjmp(a,v) * will generate a "return(v)" from * the last call to * _setjmp(a) * by restoring registers from the stack, * The previous signal state is NOT restored. */ .set noreorder LEAF(_setjmp) REG_PROLOGUE REG_LI v0, _JB_MAGIC__SETJMP # sigcontext magic number REG_S v0, (_JB_MAGIC * SZREG)(a0) REG_S ra, (_JB_REG_RA * SZREG)(a0) /* * From "MIPSpro N32 ABI Handbook", Table 2-1: * Registers s0..s7 are callee-saved. * The sp register is callee-saved. * The fp (or s8) register is callee-saved. * The gp register is callee-saved (for n32/n64). */ REG_S s0, (_JB_REG_S0 * SZREG)(a0) REG_S s1, (_JB_REG_S1 * SZREG)(a0) REG_S s2, (_JB_REG_S2 * SZREG)(a0) REG_S s3, (_JB_REG_S3 * SZREG)(a0) REG_S s4, (_JB_REG_S4 * SZREG)(a0) REG_S s5, (_JB_REG_S5 * SZREG)(a0) REG_S s6, (_JB_REG_S6 * SZREG)(a0) REG_S s7, (_JB_REG_S7 * SZREG)(a0) REG_S sp, (_JB_REG_SP * SZREG)(a0) REG_S s8, (_JB_REG_S8 * SZREG)(a0) #if defined(__mips_n32) || defined(__mips_n64) REG_S gp, (_JB_REG_GP * SZREG)(a0) # newabi gp is callee-saved #endif /* * From "MIPSpro N32 ABI Handbook", Table 2-1: * In N32, FP registers F20, F22, F24, F26, F28, F30 are callee-saved. * In N64, FP registers F24 .. F31 are callee-saved. * In O32, FP registers F20 .. F23 are callee-saved. */ -#ifndef SOFTFLOAT +#ifndef __mips_soft_float cfc1 v0, $31 # too bad can't check if FP used #if defined(__mips_n64) || defined(__mips_n32) FP_S $f30, (_JB_FPREG_F30 * SZREG)(a0) FP_S $f28, (_JB_FPREG_F28 * SZREG)(a0) FP_S $f26, (_JB_FPREG_F26 * SZREG)(a0) FP_S $f24, (_JB_FPREG_F24 * SZREG)(a0) #endif #if defined(__mips_n32) || defined(__mips_o32) || defined(__mips_o64) FP_S $f22, (_JB_FPREG_F22 * SZREG)(a0) FP_S $f20, (_JB_FPREG_F20 * SZREG)(a0) #endif #if defined(__mips_o32) || defined(__mips_o64) FP_S $f21, (_JB_FPREG_F21 * SZREG)(a0) FP_S $f23, (_JB_FPREG_F23 * SZREG)(a0) #endif #if defined(__mips_n64) FP_S $f25, (_JB_FPREG_F25 * SZREG)(a0) FP_S $f27, (_JB_FPREG_F27 * SZREG)(a0) FP_S $f29, (_JB_FPREG_F29 * SZREG)(a0) FP_S $f31, (_JB_FPREG_F31 * SZREG)(a0) #endif INT_S v0, (_JB_FPREG_FCSR * SZREG)(a0) -#endif /* ! SOFTFLOAT */ +#endif /* ! __mips_soft_float */ REG_EPILOGUE j ra move v0, zero END(_setjmp) LEAF(_longjmp) PIC_PROLOGUE(_longjmp) PTR_SUBU sp, sp, CALLFRAME_SIZ SAVE_GP(CALLFRAME_GP) REG_PROLOGUE REG_L v0, (_JB_MAGIC * SZREG)(a0) # get magic number REG_L ra, (_JB_REG_RA * SZREG)(a0) REG_LI t0, _JB_MAGIC__SETJMP bne v0, t0, botch # jump if error PTR_ADDU sp, sp, CALLFRAME_SIZ # does not matter, sanity /* * From "MIPSpro N32 ABI Handbook", Table 2-1: * Registers s0..s7 are callee-saved. * The sp register is callee-saved. * The fp (or s8) register is callee-saved. * The gp register is callee-saved (for n32/n64). */ REG_L s0, (_JB_REG_S0 * SZREG)(a0) REG_L s1, (_JB_REG_S1 * SZREG)(a0) REG_L s2, (_JB_REG_S2 * SZREG)(a0) REG_L s3, (_JB_REG_S3 * SZREG)(a0) REG_L s4, (_JB_REG_S4 * SZREG)(a0) REG_L s5, (_JB_REG_S5 * SZREG)(a0) REG_L s6, (_JB_REG_S6 * SZREG)(a0) REG_L s7, (_JB_REG_S7 * SZREG)(a0) REG_L sp, (_JB_REG_SP * SZREG)(a0) REG_L s8, (_JB_REG_S8 * SZREG)(a0) #if defined(__mips_n32) || defined(__mips_n64) REG_L gp, (_JB_REG_GP * SZREG)(a0) #endif -#ifndef SOFTFLOAT +#ifndef __mips_soft_float # get fpu status INT_L v0, (_JB_FPREG_FCSR * SZREG)(a0) ctc1 v0, $31 /* * From "MIPSpro N32 ABI Handbook", Table 2-1: * In N32, FP registers F20, F22, F24, F26, F28, F30 are callee-saved. * In N64, FP registers F24 .. F31 are callee-saved. * In O32, FP registers F20 .. F23 are callee-saved. */ #if defined(__mips_n64) || defined(__mips_n32) FP_L $f30, (_JB_FPREG_F30 * SZREG)(a0) FP_L $f28, (_JB_FPREG_F28 * SZREG)(a0) FP_L $f26, (_JB_FPREG_F26 * SZREG)(a0) FP_L $f24, (_JB_FPREG_F24 * SZREG)(a0) #endif #if defined(__mips_n32) || defined(__mips_o32) || defined(__mips_o64) FP_L $f22, (_JB_FPREG_F22 * SZREG)(a0) FP_L $f20, (_JB_FPREG_F20 * SZREG)(a0) #endif #if defined(__mips_o32) || defined(__mips_o64) FP_L $f21, (_JB_FPREG_F21 * SZREG)(a0) FP_L $f23, (_JB_FPREG_F23 * SZREG)(a0) #endif #if defined(__mips_n64) FP_L $f25, (_JB_FPREG_F25 * SZREG)(a0) FP_L $f27, (_JB_FPREG_F27 * SZREG)(a0) FP_L $f29, (_JB_FPREG_F29 * SZREG)(a0) FP_L $f31, (_JB_FPREG_F31 * SZREG)(a0) #endif -#endif /* ! SOFTFLOAT */ +#endif /* ! __mips_soft_float */ REG_EPILOGUE move v0, a1 # get return value in 1st arg j ra nop botch: /* * We know we aren't returning so we don't care about restoring * our caller's GP. */ PTR_LA t9, _C_LABEL(longjmperror) jalr t9 nop PIC_TAILCALL(abort) END(_longjmp) Index: head/lib/libc/mips/gen/flt_rounds.c =================================================================== --- head/lib/libc/mips/gen/flt_rounds.c (revision 315423) +++ head/lib/libc/mips/gen/flt_rounds.c (revision 315424) @@ -1,42 +1,42 @@ /* $NetBSD: flt_rounds.c,v 1.5 2005/12/24 23:10:08 perry Exp $ */ /* * Written by J.T. Conklin, Apr 11, 1995 * Public domain. */ #include __FBSDID("$FreeBSD$"); #if defined(LIBC_SCCS) && !defined(lint) __RCSID("$NetBSD: flt_rounds.c,v 1.5 2005/12/24 23:10:08 perry Exp $"); #endif /* LIBC_SCCS and not lint */ #include #include -#ifdef SOFTFLOAT +#ifdef __mips_soft_float #include "softfloat-for-gcc.h" #include "milieu.h" #include "softfloat.h" #endif static const int map[] = { 1, /* round to nearest */ 0, /* round to zero */ 2, /* round to positive infinity */ 3 /* round to negative infinity */ }; int __flt_rounds() { int mode; -#ifdef SOFTFLOAT +#ifdef __mips_soft_float mode = __softfloat_float_rounding_mode; #else __asm __volatile("cfc1 %0,$31" : "=r" (mode)); #endif return map[mode & 0x03]; } Index: head/lib/libc/mips/gen/setjmp.S =================================================================== --- head/lib/libc/mips/gen/setjmp.S (revision 315423) +++ head/lib/libc/mips/gen/setjmp.S (revision 315424) @@ -1,238 +1,238 @@ /* $NetBSD: setjmp.S,v 1.17 2005/09/17 11:49:39 tsutsui Exp $ */ /*- * Copyright (c) 1991, 1993 * The Regents of the University of California. All rights reserved. * * This code is derived from software contributed to Berkeley by * Ralph Campbell. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #if defined(LIBC_SCCS) && !defined(lint) ASMSTR("from: @(#)setjmp.s 8.1 (Berkeley) 6/4/93") ASMSTR("$NetBSD: setjmp.S,v 1.17 2005/09/17 11:49:39 tsutsui Exp $") #endif /* LIBC_SCCS and not lint */ #include "SYS.h" #ifdef __ABICALLS__ .abicalls #endif /* * C library -- setjmp, longjmp * * longjmp(a,v) * will generate a "return(v)" from * the last call to * setjmp(a) * by restoring registers from the stack, * and a struct sigcontext, see */ #define SETJMP_FRAME_SIZE (CALLFRAME_SIZ + (SZREG * 2)) NESTED(setjmp, SETJMP_FRAME_SIZE, ra) .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) SETUP_GP PTR_SUBU sp, sp, SETJMP_FRAME_SIZE # allocate stack frame SAVE_GP(CALLFRAME_GP) SETUP_GP64(CALLFRAME_GP, setjmp) REG_S ra, CALLFRAME_RA(sp) # save RA REG_S a0, CALLFRAME_SIZ(sp) # store env /* Get the signal mask. */ PTR_ADDU a2, a0, _JB_SIGMASK * SZREG # &oenv li a0, 1 # SIG_SETBLOCK move a1, zero # &env == 0 PTR_LA t9, _C_LABEL(sigprocmask) # get current signal mask jalr t9 RESTORE_GP64 REG_L a0, CALLFRAME_SIZ(sp) # restore env pointer REG_L ra, CALLFRAME_RA(sp) # restore RA PTR_ADDU sp, sp, SETJMP_FRAME_SIZE # pop stack frame REG_LI v0, _JB_MAGIC_SETJMP REG_S v0, (_JB_MAGIC * SZREG)(a0) REG_S ra, (_JB_REG_RA * SZREG)(a0) /* * From "MIPSpro N32 ABI Handbook", Table 2-1: * Registers s0..s7 are callee-saved. * The sp register is callee-saved. * The fp (or s8) register is callee-saved. * The gp register is callee-saved (for n32/n64). */ REG_S s0, (_JB_REG_S0 * SZREG)(a0) REG_S s1, (_JB_REG_S1 * SZREG)(a0) REG_S s2, (_JB_REG_S2 * SZREG)(a0) REG_S s3, (_JB_REG_S3 * SZREG)(a0) REG_S s4, (_JB_REG_S4 * SZREG)(a0) REG_S s5, (_JB_REG_S5 * SZREG)(a0) REG_S s6, (_JB_REG_S6 * SZREG)(a0) REG_S s7, (_JB_REG_S7 * SZREG)(a0) REG_S sp, (_JB_REG_SP * SZREG)(a0) REG_S s8, (_JB_REG_S8 * SZREG)(a0) #if defined(__mips_n32) || defined(__mips_n64) REG_S gp, (_JB_REG_GP * SZREG)(a0) #endif -#ifndef SOFTFLOAT +#ifndef __mips_soft_float /* * From "MIPSpro N32 ABI Handbook", Table 2-1: * In N32, FP registers F20, F22, F24, F26, F28, F30 are callee-saved. * In N64, FP registers F24 .. F31 are callee-saved. * In O32, FP registers F20 .. F23 are callee-saved. */ cfc1 v0, $31 INT_S v0, (_JB_FPREG_FCSR * SZREG)(a0) #if defined(__mips_o32) || defined(__mips_o64) || defined(__mips_n32) FP_S $f20, (_JB_FPREG_F20 * SZREG)(a0) FP_S $f22, (_JB_FPREG_F22 * SZREG)(a0) #endif #if defined(__mips_o32) || defined(__mips_o64) FP_S $f21, (_JB_FPREG_F21 * SZREG)(a0) FP_S $f23, (_JB_FPREG_F23 * SZREG)(a0) #endif #if defined(__mips_n32) || defined(__mips_n64) FP_S $f24, (_JB_FPREG_F24 * SZREG)(a0) FP_S $f26, (_JB_FPREG_F26 * SZREG)(a0) FP_S $f28, (_JB_FPREG_F28 * SZREG)(a0) FP_S $f30, (_JB_FPREG_F30 * SZREG)(a0) #endif #if defined(__mips_n64) FP_S $f25, (_JB_FPREG_F25 * SZREG)(a0) FP_S $f27, (_JB_FPREG_F27 * SZREG)(a0) FP_S $f29, (_JB_FPREG_F29 * SZREG)(a0) FP_S $f31, (_JB_FPREG_F31 * SZREG)(a0) #endif -#endif /* ! SOFTFLOAT */ +#endif /* ! __mips_soft_float */ move v0, zero jr ra END(setjmp) #define LONGJMP_FRAME_SIZE (CALLFRAME_SIZ + (SZREG * 2)) NESTED(longjmp, LONGJMP_FRAME_SIZE, ra) .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) PIC_PROLOGUE(longjmp) PTR_SUBU sp, sp, LONGJMP_FRAME_SIZE # allocate stack frame SAVE_GP(CALLFRAME_GP) REG_S ra, CALLFRAME_RA(sp) # save RA REG_L v0, (_JB_MAGIC * SZREG)(a0) REG_LI t0, _JB_MAGIC_SETJMP bne v0, t0, botch # jump if error nop REG_S a0, CALLFRAME_SIZ(sp) # save env REG_S a1, (CALLFRAME_SIZ + SZREG)(sp) # save return value # set sigmask PTR_ADDU a1, a0, _JB_SIGMASK * SZREG # &set move a2, zero # &oset == NULL li a0, 3 # SIG_SETMASK PTR_LA t9,_C_LABEL(sigprocmask) # set current signal mask jal t9 nop REG_L a0, CALLFRAME_SIZ(sp) # restore env REG_L a1, (CALLFRAME_SIZ + SZREG)(sp) # restore return value REG_L ra, (_JB_REG_RA * SZREG)(a0) /* * From "MIPSpro N32 ABI Handbook", Table 2-1: * Registers s0..s7 are callee-saved. * The sp register is callee-saved. * The fp (or s8) register is callee-saved. * The gp register is callee-saved (for n32/n64). */ REG_L s0, (_JB_REG_S0 * SZREG)(a0) REG_L s1, (_JB_REG_S1 * SZREG)(a0) REG_L s2, (_JB_REG_S2 * SZREG)(a0) REG_L s3, (_JB_REG_S3 * SZREG)(a0) REG_L s4, (_JB_REG_S4 * SZREG)(a0) REG_L s5, (_JB_REG_S5 * SZREG)(a0) REG_L s6, (_JB_REG_S6 * SZREG)(a0) REG_L s7, (_JB_REG_S7 * SZREG)(a0) REG_L sp, (_JB_REG_SP * SZREG)(a0) REG_L s8, (_JB_REG_S8 * SZREG)(a0) #if defined(__mips_n32) || defined(__mips_n64) REG_L gp, (_JB_REG_GP * SZREG)(a0) #endif -#ifndef SOFTFLOAT +#ifndef __mips_soft_float /* * From "MIPSpro N32 ABI Handbook", Table 2-1: * In N32, FP registers F20, F22, F24, F26, F28, F30 are callee-saved. * In N64, FP registers F23 .. F31 are callee-saved. * In O32, FP registers F20 .. F23 are callee-saved. */ INT_L v0, (_JB_FPREG_FCSR * SZREG)(a0) ctc1 v0, $31 #if defined(__mips_n64) || defined(__mips_n32) FP_L $f30, (_JB_FPREG_F30 * SZREG)(a0) FP_L $f28, (_JB_FPREG_F28 * SZREG)(a0) FP_L $f26, (_JB_FPREG_F26 * SZREG)(a0) FP_L $f24, (_JB_FPREG_F24 * SZREG)(a0) #endif #if defined(__mips_n32) || defined(__mips_o32) || defined(__mips_o64) FP_L $f22, (_JB_FPREG_F22 * SZREG)(a0) FP_L $f20, (_JB_FPREG_F20 * SZREG)(a0) #endif #if defined(__mips_o32) || defined(__mips_o64) FP_L $f21, (_JB_FPREG_F21 * SZREG)(a0) FP_L $f23, (_JB_FPREG_F23 * SZREG)(a0) #endif #if defined(__mips_n64) FP_L $f25, (_JB_FPREG_F25 * SZREG)(a0) FP_L $f27, (_JB_FPREG_F27 * SZREG)(a0) FP_L $f29, (_JB_FPREG_F29 * SZREG)(a0) FP_L $f31, (_JB_FPREG_F31 * SZREG)(a0) #endif -#endif /* ! SOFTFLOAT */ +#endif /* ! __mips_soft_float */ move v0, a1 j ra nop botch: /* * We know we aren't returning so we don't care about restoring * our caller's GP. */ PTR_LA t9, _C_LABEL(longjmperror) jalr t9 nop PIC_TAILCALL(abort) END(longjmp) Index: head/lib/msun/mips/Makefile.inc =================================================================== --- head/lib/msun/mips/Makefile.inc (revision 315423) +++ head/lib/msun/mips/Makefile.inc (revision 315424) @@ -1,8 +1,4 @@ # $FreeBSD$ -.if ${MACHINE_ARCH:Mmips*hf} == "" -CFLAGS+=-DSOFTFLOAT -.endif - LDBL_PREC = 53 SYM_MAPS += ${.CURDIR}/mips/Symbol.map Index: head/lib/msun/mips/fenv.c =================================================================== --- head/lib/msun/mips/fenv.c (revision 315423) +++ head/lib/msun/mips/fenv.c (revision 315424) @@ -1,66 +1,66 @@ /*- * Copyright (c) 2004 David Schultz * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #define __fenv_static #include "fenv.h" #ifdef __GNUC_GNU_INLINE__ #error "This file must be compiled with C99 'inline' semantics" #endif /* * Hopefully the system ID byte is immutable, so it's valid to use * this as a default environment. */ const fenv_t __fe_dfl_env = 0; -#ifdef SOFTFLOAT +#ifdef __mips_soft_float #define __set_env(env, flags, mask, rnd) env = ((flags) \ | (mask)<<_FPUSW_SHIFT \ | (rnd) << 24) #define __env_flags(env) ((env) & FE_ALL_EXCEPT) #define __env_mask(env) (((env) >> _FPUSW_SHIFT) \ & FE_ALL_EXCEPT) #define __env_round(env) (((env) >> 24) & _ROUND_MASK) #include "fenv-softfloat.h" #endif extern inline int feclearexcept(int __excepts); extern inline int fegetexceptflag(fexcept_t *__flagp, int __excepts); extern inline int fesetexceptflag(const fexcept_t *__flagp, int __excepts); extern inline int feraiseexcept(int __excepts); extern inline int fetestexcept(int __excepts); extern inline int fegetround(void); extern inline int fesetround(int __round); extern inline int fegetenv(fenv_t *__envp); extern inline int feholdexcept(fenv_t *__envp); extern inline int fesetenv(const fenv_t *__envp); extern inline int feupdateenv(const fenv_t *__envp); extern inline int feenableexcept(int __mask); extern inline int fedisableexcept(int __mask); extern inline int fegetexcept(void); Index: head/lib/msun/mips/fenv.h =================================================================== --- head/lib/msun/mips/fenv.h (revision 315423) +++ head/lib/msun/mips/fenv.h (revision 315424) @@ -1,277 +1,281 @@ /*- * Copyright (c) 2004-2005 David Schultz * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #ifndef _FENV_H_ #define _FENV_H_ #include #ifndef __fenv_static #define __fenv_static static #endif typedef __uint32_t fenv_t; typedef __uint32_t fexcept_t; /* Exception flags */ -#ifdef SOFTFLOAT +#ifdef __mips_soft_float #define _FPUSW_SHIFT 16 #define FE_INVALID 0x0001 #define FE_DIVBYZERO 0x0002 #define FE_OVERFLOW 0x0004 #define FE_UNDERFLOW 0x0008 #define FE_INEXACT 0x0010 #else #define _FCSR_CAUSE_SHIFT 10 #define FE_INVALID 0x0040 #define FE_DIVBYZERO 0x0020 #define FE_OVERFLOW 0x0010 #define FE_UNDERFLOW 0x0008 #define FE_INEXACT 0x0004 #endif #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW) /* Rounding modes */ #define FE_TONEAREST 0x0000 #define FE_TOWARDZERO 0x0001 #define FE_UPWARD 0x0002 #define FE_DOWNWARD 0x0003 #define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \ FE_UPWARD | FE_TOWARDZERO) __BEGIN_DECLS /* Default floating-point environment */ extern const fenv_t __fe_dfl_env; #define FE_DFL_ENV (&__fe_dfl_env) /* We need to be able to map status flag positions to mask flag positions */ #define _ENABLE_SHIFT 5 #define _ENABLE_MASK (FE_ALL_EXCEPT << _ENABLE_SHIFT) -#ifndef SOFTFLOAT +#if !defined(__mips_soft_float) && !defined(__mips_hard_float) +#error compiler didnt set soft/hard float macros +#endif + +#ifndef __mips_soft_float #define __cfc1(__fcsr) __asm __volatile("cfc1 %0, $31" : "=r" (__fcsr)) #define __ctc1(__fcsr) __asm __volatile("ctc1 %0, $31" :: "r" (__fcsr)) #endif -#ifdef SOFTFLOAT +#ifdef __mips_soft_float int feclearexcept(int __excepts); int fegetexceptflag(fexcept_t *__flagp, int __excepts); int fesetexceptflag(const fexcept_t *__flagp, int __excepts); int feraiseexcept(int __excepts); int fetestexcept(int __excepts); int fegetround(void); int fesetround(int __round); int fegetenv(fenv_t *__envp); int feholdexcept(fenv_t *__envp); int fesetenv(const fenv_t *__envp); int feupdateenv(const fenv_t *__envp); #else __fenv_static inline int feclearexcept(int __excepts) { fexcept_t fcsr; __excepts &= FE_ALL_EXCEPT; __cfc1(fcsr); fcsr &= ~(__excepts | (__excepts << _FCSR_CAUSE_SHIFT)); __ctc1(fcsr); return (0); } __fenv_static inline int fegetexceptflag(fexcept_t *__flagp, int __excepts) { fexcept_t fcsr; __excepts &= FE_ALL_EXCEPT; __cfc1(fcsr); *__flagp = fcsr & __excepts; return (0); } __fenv_static inline int fesetexceptflag(const fexcept_t *__flagp, int __excepts) { fexcept_t fcsr; __excepts &= FE_ALL_EXCEPT; __cfc1(fcsr); fcsr &= ~__excepts; fcsr |= *__flagp & __excepts; __ctc1(fcsr); return (0); } __fenv_static inline int feraiseexcept(int __excepts) { fexcept_t fcsr; __excepts &= FE_ALL_EXCEPT; __cfc1(fcsr); fcsr |= __excepts | (__excepts << _FCSR_CAUSE_SHIFT); __ctc1(fcsr); return (0); } __fenv_static inline int fetestexcept(int __excepts) { fexcept_t fcsr; __excepts &= FE_ALL_EXCEPT; __cfc1(fcsr); return (fcsr & __excepts); } __fenv_static inline int fegetround(void) { fexcept_t fcsr; __cfc1(fcsr); return (fcsr & _ROUND_MASK); } __fenv_static inline int fesetround(int __round) { fexcept_t fcsr; if (__round & ~_ROUND_MASK) return (-1); __cfc1(fcsr); fcsr &= ~_ROUND_MASK; fcsr |= __round; __ctc1(fcsr); return (0); } __fenv_static inline int fegetenv(fenv_t *__envp) { __cfc1(*__envp); return (0); } __fenv_static inline int feholdexcept(fenv_t *__envp) { fexcept_t fcsr; __cfc1(fcsr); *__envp = fcsr; fcsr &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); __ctc1(fcsr); return (0); } __fenv_static inline int fesetenv(const fenv_t *__envp) { __ctc1(*__envp); return (0); } __fenv_static inline int feupdateenv(const fenv_t *__envp) { fexcept_t fcsr; __cfc1(fcsr); fesetenv(__envp); feraiseexcept(fcsr); return (0); } -#endif /* !SOFTFLOAT */ +#endif /* !__mips_soft_float */ #if __BSD_VISIBLE /* We currently provide no external definitions of the functions below. */ -#ifdef SOFTFLOAT +#ifdef __mips_soft_float int feenableexcept(int __mask); int fedisableexcept(int __mask); int fegetexcept(void); #else static inline int feenableexcept(int __mask) { fenv_t __old_fcsr, __new_fcsr; __cfc1(__old_fcsr); __new_fcsr = __old_fcsr | (__mask & FE_ALL_EXCEPT) << _ENABLE_SHIFT; __ctc1(__new_fcsr); return ((__old_fcsr >> _ENABLE_SHIFT) & FE_ALL_EXCEPT); } static inline int fedisableexcept(int __mask) { fenv_t __old_fcsr, __new_fcsr; __cfc1(__old_fcsr); __new_fcsr = __old_fcsr & ~((__mask & FE_ALL_EXCEPT) << _ENABLE_SHIFT); __ctc1(__new_fcsr); return ((__old_fcsr >> _ENABLE_SHIFT) & FE_ALL_EXCEPT); } static inline int fegetexcept(void) { fexcept_t fcsr; __cfc1(fcsr); return ((fcsr & _ENABLE_MASK) >> _ENABLE_SHIFT); } -#endif /* !SOFTFLOAT */ +#endif /* !__mips_soft_float */ #endif /* __BSD_VISIBLE */ __END_DECLS #endif /* !_FENV_H_ */