Index: head/sys/conf/files
===================================================================
--- head/sys/conf/files	(revision 314191)
+++ head/sys/conf/files	(revision 314192)
@@ -1,4706 +1,4707 @@
 # $FreeBSD$
 #
 # The long compile-with and dependency lines are required because of
 # limitations in config: backslash-newline doesn't work in strings, and
 # dependency lines other than the first are silently ignored.
 #
 acpi_quirks.h			optional acpi				   \
 	dependency	"$S/tools/acpi_quirks2h.awk $S/dev/acpica/acpi_quirks" \
 	compile-with	"${AWK} -f $S/tools/acpi_quirks2h.awk $S/dev/acpica/acpi_quirks" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"acpi_quirks.h"
 bhnd_nvram_map.h		optional bhnd				   \
 	dependency	"$S/dev/bhnd/tools/nvram_map_gen.sh $S/dev/bhnd/tools/nvram_map_gen.awk $S/dev/bhnd/nvram/nvram_map" \
 	compile-with	"sh $S/dev/bhnd/tools/nvram_map_gen.sh $S/dev/bhnd/nvram/nvram_map -h" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"bhnd_nvram_map.h"
 bhnd_nvram_map_data.h		optional bhnd				   \
 	dependency	"$S/dev/bhnd/tools/nvram_map_gen.sh $S/dev/bhnd/tools/nvram_map_gen.awk $S/dev/bhnd/nvram/nvram_map" \
 	compile-with	"sh $S/dev/bhnd/tools/nvram_map_gen.sh $S/dev/bhnd/nvram/nvram_map -d" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"bhnd_nvram_map_data.h"
 #
 # The 'fdt_dtb_file' target covers an actual DTB file name, which is derived
 # from the specified source (DTS) file: <platform>.dts -> <platform>.dtb
 #
 fdt_dtb_file			optional fdt fdt_dtb_static \
 	compile-with "sh -c 'MACHINE=${MACHINE} $S/tools/fdt/make_dtb.sh $S ${FDT_DTS_FILE} ${.CURDIR}'" \
 	no-obj no-implicit-rule before-depend	\
 	clean		"${FDT_DTS_FILE:R}.dtb"
 fdt_static_dtb.h		optional fdt fdt_dtb_static \
 	compile-with "sh -c 'MACHINE=${MACHINE} $S/tools/fdt/make_dtbh.sh ${FDT_DTS_FILE} ${.CURDIR}'" \
 	dependency	"fdt_dtb_file" \
 	no-obj no-implicit-rule before-depend \
 	clean		"fdt_static_dtb.h"
 feeder_eq_gen.h			optional sound				   \
 	dependency	"$S/tools/sound/feeder_eq_mkfilter.awk"		   \
 	compile-with	"${AWK} -f $S/tools/sound/feeder_eq_mkfilter.awk -- ${FEEDER_EQ_PRESETS} > feeder_eq_gen.h" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"feeder_eq_gen.h"
 feeder_rate_gen.h		optional sound				   \
 	dependency	"$S/tools/sound/feeder_rate_mkfilter.awk"	   \
 	compile-with	"${AWK} -f $S/tools/sound/feeder_rate_mkfilter.awk -- ${FEEDER_RATE_PRESETS} > feeder_rate_gen.h" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"feeder_rate_gen.h"
 snd_fxdiv_gen.h			optional sound				   \
 	dependency	"$S/tools/sound/snd_fxdiv_gen.awk"		   \
 	compile-with	"${AWK} -f $S/tools/sound/snd_fxdiv_gen.awk -- > snd_fxdiv_gen.h" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"snd_fxdiv_gen.h"
 miidevs.h			optional miibus | mii			   \
 	dependency	"$S/tools/miidevs2h.awk $S/dev/mii/miidevs"	   \
 	compile-with	"${AWK} -f $S/tools/miidevs2h.awk $S/dev/mii/miidevs" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"miidevs.h"
 pccarddevs.h			standard				   \
 	dependency	"$S/tools/pccarddevs2h.awk $S/dev/pccard/pccarddevs" \
 	compile-with	"${AWK} -f $S/tools/pccarddevs2h.awk $S/dev/pccard/pccarddevs" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"pccarddevs.h"
 kbdmuxmap.h			optional	kbdmux_dflt_keymap 	   \
 	compile-with	"kbdcontrol -P ${S:S/sys$/share/}/vt/keymaps -P ${S:S/sys$/share/}/syscons/keymaps -L ${KBDMUX_DFLT_KEYMAP} | sed -e 's/^static keymap_t.* = /static keymap_t key_map = /' -e 's/^static accentmap_t.* = /static accentmap_t accent_map = /' > kbdmuxmap.h" \
 	no-obj no-implicit-rule before-depend				\
 	clean		"kbdmuxmap.h"
 teken_state.h		optional sc | vt				   \
 	dependency	"$S/teken/gensequences $S/teken/sequences" \
 	compile-with	"${AWK} -f $S/teken/gensequences $S/teken/sequences > teken_state.h" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"teken_state.h"
 usbdevs.h			optional usb				   \
 	dependency	"$S/tools/usbdevs2h.awk $S/dev/usb/usbdevs" \
 	compile-with	"${AWK} -f $S/tools/usbdevs2h.awk $S/dev/usb/usbdevs -h" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"usbdevs.h"
 usbdevs_data.h			optional usb				   \
 	dependency	"$S/tools/usbdevs2h.awk $S/dev/usb/usbdevs" \
 	compile-with	"${AWK} -f $S/tools/usbdevs2h.awk $S/dev/usb/usbdevs -d" \
 	no-obj no-implicit-rule before-depend				   \
 	clean		"usbdevs_data.h"
 cam/cam.c			optional scbus
 cam/cam_compat.c		optional scbus
 cam/cam_iosched.c		optional scbus
 cam/cam_periph.c		optional scbus
 cam/cam_queue.c			optional scbus
 cam/cam_sim.c			optional scbus
 cam/cam_xpt.c			optional scbus
 cam/ata/ata_all.c		optional scbus
 cam/ata/ata_xpt.c		optional scbus
 cam/ata/ata_pmp.c		optional scbus
 cam/nvme/nvme_all.c		optional scbus nvme !nvd
 cam/nvme/nvme_da.c		optional scbus nvme da !nvd
 cam/nvme/nvme_xpt.c		optional scbus nvme !nvd
 cam/scsi/scsi_xpt.c		optional scbus
 cam/scsi/scsi_all.c		optional scbus
 cam/scsi/scsi_cd.c		optional cd
 cam/scsi/scsi_ch.c		optional ch
 cam/ata/ata_da.c		optional ada | da
 cam/ctl/ctl.c			optional ctl
 cam/ctl/ctl_backend.c		optional ctl
 cam/ctl/ctl_backend_block.c	optional ctl
 cam/ctl/ctl_backend_ramdisk.c	optional ctl
 cam/ctl/ctl_cmd_table.c		optional ctl
 cam/ctl/ctl_frontend.c		optional ctl
 cam/ctl/ctl_frontend_cam_sim.c	optional ctl
 cam/ctl/ctl_frontend_ioctl.c	optional ctl
 cam/ctl/ctl_frontend_iscsi.c	optional ctl
 cam/ctl/ctl_ha.c		optional ctl
 cam/ctl/ctl_scsi_all.c		optional ctl
 cam/ctl/ctl_tpc.c		optional ctl
 cam/ctl/ctl_tpc_local.c		optional ctl
 cam/ctl/ctl_error.c		optional ctl
 cam/ctl/ctl_util.c		optional ctl
 cam/ctl/scsi_ctl.c		optional ctl
 cam/scsi/scsi_da.c		optional da
 cam/scsi/scsi_low.c		optional ncv | nsp | stg
 cam/scsi/scsi_pass.c		optional pass
 cam/scsi/scsi_pt.c		optional pt
 cam/scsi/scsi_sa.c		optional sa
 cam/scsi/scsi_enc.c		optional ses
 cam/scsi/scsi_enc_ses.c		optional ses
 cam/scsi/scsi_enc_safte.c	optional ses
 cam/scsi/scsi_sg.c		optional sg
 cam/scsi/scsi_targ_bh.c		optional targbh
 cam/scsi/scsi_target.c		optional targ
 cam/scsi/smp_all.c		optional scbus
 # shared between zfs and dtrace
 cddl/compat/opensolaris/kern/opensolaris.c		optional zfs | dtrace compile-with "${CDDL_C}"
 cddl/compat/opensolaris/kern/opensolaris_cmn_err.c	optional zfs | dtrace compile-with "${CDDL_C}"
 cddl/compat/opensolaris/kern/opensolaris_kmem.c		optional zfs | dtrace compile-with "${CDDL_C}"
 cddl/compat/opensolaris/kern/opensolaris_misc.c		optional zfs | dtrace compile-with "${CDDL_C}"
 cddl/compat/opensolaris/kern/opensolaris_proc.c		optional zfs | dtrace compile-with "${CDDL_C}"
 cddl/compat/opensolaris/kern/opensolaris_sunddi.c	optional zfs | dtrace compile-with "${CDDL_C}"
 cddl/compat/opensolaris/kern/opensolaris_taskq.c	optional zfs | dtrace compile-with "${CDDL_C}"
 # zfs specific
 cddl/compat/opensolaris/kern/opensolaris_acl.c				optional zfs compile-with "${ZFS_C}"
 cddl/compat/opensolaris/kern/opensolaris_dtrace.c			optional zfs compile-with "${ZFS_C}"
 cddl/compat/opensolaris/kern/opensolaris_kobj.c				optional zfs compile-with "${ZFS_C}"
 cddl/compat/opensolaris/kern/opensolaris_kstat.c			optional zfs compile-with "${ZFS_C}"
 cddl/compat/opensolaris/kern/opensolaris_lookup.c			optional zfs compile-with "${ZFS_C}"
 cddl/compat/opensolaris/kern/opensolaris_policy.c			optional zfs compile-with "${ZFS_C}"
 cddl/compat/opensolaris/kern/opensolaris_string.c			optional zfs compile-with "${ZFS_C}"
 cddl/compat/opensolaris/kern/opensolaris_sysevent.c			optional zfs compile-with "${ZFS_C}"
 cddl/compat/opensolaris/kern/opensolaris_uio.c				optional zfs compile-with "${ZFS_C}"
 cddl/compat/opensolaris/kern/opensolaris_vfs.c				optional zfs compile-with "${ZFS_C}"
 cddl/compat/opensolaris/kern/opensolaris_vm.c				optional zfs compile-with "${ZFS_C}"
 cddl/compat/opensolaris/kern/opensolaris_zone.c				optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/acl/acl_common.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/avl/avl.c				optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/nvpair/opensolaris_fnvpair.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/nvpair/opensolaris_nvpair.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/nvpair/opensolaris_nvpair_alloc_fixed.c	optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/unicode/u8_textprep.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/zfs/zfeature_common.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/zfs/zfs_comutil.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/zfs/zfs_deleg.c				optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/zfs/zfs_fletcher.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/zfs/zfs_ioctl_compat.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/zfs/zfs_namecheck.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/zfs/zfs_prop.c				optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/zfs/zpool_prop.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/common/zfs/zprop_common.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/gfs.c				optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/vnode.c				optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/blkptr.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/bplist.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/bpobj.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/bptree.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/bqueue.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dbuf.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/ddt.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/ddt_zap.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dmu.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_diff.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_object.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_objset.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_send.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_traverse.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_tx.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_zfetch.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dnode.c			optional zfs compile-with "${ZFS_C}" \
 	warning "kernel contains CDDL licensed ZFS filesystem"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dnode_sync.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_bookmark.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_dataset.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_deadlist.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_deleg.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_destroy.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_dir.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_pool.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_prop.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_scan.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_userhold.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_synctask.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/gzip.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/lz4.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/lzjb.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/metaslab.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/multilist.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/range_tree.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/refcount.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/rrwlock.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/sa.c				optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/sha256.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/skein_zfs.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/spa.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/spa_config.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/spa_errlog.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/spa_history.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/spa_misc.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/space_map.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/space_reftree.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/trim_map.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/txg.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/uberblock.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/unique.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/vdev.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_cache.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_file.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_geom.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_label.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_mirror.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_missing.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_queue.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_raidz.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_root.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zap.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zap_leaf.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zap_micro.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfeature.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_acl.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_byteswap.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_ctldir.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_debug.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_dir.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_fm.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_fuid.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_ioctl.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_log.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_onexit.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_replay.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_rlock.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_sa.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vfsops.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vnops.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_znode.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zil.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zio.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zio_checksum.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zio_compress.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zio_inject.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zle.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zrlock.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/fs/zfs/zvol.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/os/callb.c				optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/os/fm.c				optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/os/list.c				optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/os/nvpair_alloc_system.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/zmod/adler32.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/zmod/deflate.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/zmod/inffast.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/zmod/inflate.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/zmod/inftrees.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/zmod/opensolaris_crc32.c		optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/zmod/trees.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/zmod/zmod.c				optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/zmod/zmod_subr.c			optional zfs compile-with "${ZFS_C}"
 cddl/contrib/opensolaris/uts/common/zmod/zutil.c			optional zfs compile-with "${ZFS_C}"
 # dtrace specific
 cddl/contrib/opensolaris/uts/common/dtrace/dtrace.c	optional dtrace compile-with "${DTRACE_C}" \
 							warning "kernel contains CDDL licensed DTRACE"
 cddl/contrib/opensolaris/uts/common/dtrace/dtrace_xoroshiro128_plus.c	optional dtrace compile-with "${DTRACE_C}"
 cddl/dev/dtmalloc/dtmalloc.c		optional dtmalloc        | dtraceall compile-with "${CDDL_C}"
 cddl/dev/profile/profile.c		optional dtrace_profile  | dtraceall compile-with "${CDDL_C}"
 cddl/dev/sdt/sdt.c			optional dtrace_sdt      | dtraceall compile-with "${CDDL_C}"
 cddl/dev/fbt/fbt.c			optional dtrace_fbt      | dtraceall compile-with "${FBT_C}"
 cddl/dev/systrace/systrace.c		optional dtrace_systrace | dtraceall compile-with "${CDDL_C}"
 cddl/dev/prototype.c			optional dtrace_prototype | dtraceall compile-with "${CDDL_C}"
 fs/nfsclient/nfs_clkdtrace.c		optional dtnfscl nfscl   | dtraceall nfscl compile-with "${CDDL_C}"
 compat/cloudabi/cloudabi_clock.c	optional compat_cloudabi32 | compat_cloudabi64
 compat/cloudabi/cloudabi_errno.c	optional compat_cloudabi32 | compat_cloudabi64
 compat/cloudabi/cloudabi_fd.c		optional compat_cloudabi32 | compat_cloudabi64
 compat/cloudabi/cloudabi_file.c		optional compat_cloudabi32 | compat_cloudabi64
 compat/cloudabi/cloudabi_futex.c	optional compat_cloudabi32 | compat_cloudabi64
 compat/cloudabi/cloudabi_mem.c		optional compat_cloudabi32 | compat_cloudabi64
 compat/cloudabi/cloudabi_proc.c		optional compat_cloudabi32 | compat_cloudabi64
 compat/cloudabi/cloudabi_random.c	optional compat_cloudabi32 | compat_cloudabi64
 compat/cloudabi/cloudabi_sock.c		optional compat_cloudabi32 | compat_cloudabi64
 compat/cloudabi/cloudabi_thread.c	optional compat_cloudabi32 | compat_cloudabi64
 compat/cloudabi/cloudabi_vdso.c		optional compat_cloudabi32 | compat_cloudabi64
 compat/cloudabi32/cloudabi32_fd.c	optional compat_cloudabi32
 compat/cloudabi32/cloudabi32_module.c	optional compat_cloudabi32
 compat/cloudabi32/cloudabi32_poll.c	optional compat_cloudabi32
 compat/cloudabi32/cloudabi32_sock.c	optional compat_cloudabi32
 compat/cloudabi32/cloudabi32_syscalls.c	optional compat_cloudabi32
 compat/cloudabi32/cloudabi32_sysent.c	optional compat_cloudabi32
 compat/cloudabi32/cloudabi32_thread.c	optional compat_cloudabi32
 compat/cloudabi64/cloudabi64_fd.c	optional compat_cloudabi64
 compat/cloudabi64/cloudabi64_module.c	optional compat_cloudabi64
 compat/cloudabi64/cloudabi64_poll.c	optional compat_cloudabi64
 compat/cloudabi64/cloudabi64_sock.c	optional compat_cloudabi64
 compat/cloudabi64/cloudabi64_syscalls.c	optional compat_cloudabi64
 compat/cloudabi64/cloudabi64_sysent.c	optional compat_cloudabi64
 compat/cloudabi64/cloudabi64_thread.c	optional compat_cloudabi64
 compat/freebsd32/freebsd32_capability.c	optional compat_freebsd32
 compat/freebsd32/freebsd32_ioctl.c	optional compat_freebsd32
 compat/freebsd32/freebsd32_misc.c	optional compat_freebsd32
 compat/freebsd32/freebsd32_syscalls.c	optional compat_freebsd32
 compat/freebsd32/freebsd32_sysent.c	optional compat_freebsd32
 contrib/ck/src/ck_array.c				standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_barrier_centralized.c			standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_barrier_combining.c			standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_barrier_dissemination.c		standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_barrier_mcs.c				standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_barrier_tournament.c			standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_epoch.c				standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_hp.c					standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_hs.c					standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_ht.c					standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/ck/src/ck_rhs.c					standard compile-with "${NORMAL_C} -I$S/contrib/ck/include"
 contrib/dev/acpica/common/ahids.c			optional acpi acpi_debug
 contrib/dev/acpica/common/ahuuids.c			optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbcmds.c		optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbconvert.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbdisply.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbexec.c		optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbhistry.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbinput.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbmethod.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbnames.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbobject.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbstats.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbtest.c		optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbutils.c	optional acpi acpi_debug
 contrib/dev/acpica/components/debugger/dbxface.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmbuffer.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmcstyle.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmdeferred.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmnames.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmopcode.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmresrc.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmresrcl.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmresrcl2.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmresrcs.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmutils.c	optional acpi acpi_debug
 contrib/dev/acpica/components/disassembler/dmwalk.c	optional acpi acpi_debug
 contrib/dev/acpica/components/dispatcher/dsargs.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dscontrol.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsdebug.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsfield.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsinit.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsmethod.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsmthdat.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsobject.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsopcode.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dsutils.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dswexec.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dswload.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dswload2.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dswscope.c	optional acpi
 contrib/dev/acpica/components/dispatcher/dswstate.c	optional acpi
 contrib/dev/acpica/components/events/evevent.c		optional acpi
 contrib/dev/acpica/components/events/evglock.c		optional acpi
 contrib/dev/acpica/components/events/evgpe.c		optional acpi
 contrib/dev/acpica/components/events/evgpeblk.c		optional acpi
 contrib/dev/acpica/components/events/evgpeinit.c	optional acpi
 contrib/dev/acpica/components/events/evgpeutil.c	optional acpi
 contrib/dev/acpica/components/events/evhandler.c	optional acpi
 contrib/dev/acpica/components/events/evmisc.c		optional acpi
 contrib/dev/acpica/components/events/evregion.c		optional acpi
 contrib/dev/acpica/components/events/evrgnini.c		optional acpi
 contrib/dev/acpica/components/events/evsci.c		optional acpi
 contrib/dev/acpica/components/events/evxface.c		optional acpi
 contrib/dev/acpica/components/events/evxfevnt.c		optional acpi
 contrib/dev/acpica/components/events/evxfgpe.c		optional acpi
 contrib/dev/acpica/components/events/evxfregn.c		optional acpi
 contrib/dev/acpica/components/executer/exconcat.c	optional acpi
 contrib/dev/acpica/components/executer/exconfig.c	optional acpi
 contrib/dev/acpica/components/executer/exconvrt.c	optional acpi
 contrib/dev/acpica/components/executer/excreate.c	optional acpi
 contrib/dev/acpica/components/executer/exdebug.c	optional acpi
 contrib/dev/acpica/components/executer/exdump.c		optional acpi
 contrib/dev/acpica/components/executer/exfield.c	optional acpi
 contrib/dev/acpica/components/executer/exfldio.c	optional acpi
 contrib/dev/acpica/components/executer/exmisc.c		optional acpi
 contrib/dev/acpica/components/executer/exmutex.c	optional acpi
 contrib/dev/acpica/components/executer/exnames.c	optional acpi
 contrib/dev/acpica/components/executer/exoparg1.c	optional acpi
 contrib/dev/acpica/components/executer/exoparg2.c	optional acpi
 contrib/dev/acpica/components/executer/exoparg3.c	optional acpi
 contrib/dev/acpica/components/executer/exoparg6.c	optional acpi
 contrib/dev/acpica/components/executer/exprep.c		optional acpi
 contrib/dev/acpica/components/executer/exregion.c	optional acpi
 contrib/dev/acpica/components/executer/exresnte.c	optional acpi
 contrib/dev/acpica/components/executer/exresolv.c	optional acpi
 contrib/dev/acpica/components/executer/exresop.c	optional acpi
 contrib/dev/acpica/components/executer/exstore.c	optional acpi
 contrib/dev/acpica/components/executer/exstoren.c	optional acpi
 contrib/dev/acpica/components/executer/exstorob.c	optional acpi
 contrib/dev/acpica/components/executer/exsystem.c	optional acpi
 contrib/dev/acpica/components/executer/extrace.c	optional acpi
 contrib/dev/acpica/components/executer/exutils.c	optional acpi
 contrib/dev/acpica/components/hardware/hwacpi.c		optional acpi
 contrib/dev/acpica/components/hardware/hwesleep.c	optional acpi
 contrib/dev/acpica/components/hardware/hwgpe.c		optional acpi
 contrib/dev/acpica/components/hardware/hwpci.c		optional acpi
 contrib/dev/acpica/components/hardware/hwregs.c		optional acpi
 contrib/dev/acpica/components/hardware/hwsleep.c	optional acpi
 contrib/dev/acpica/components/hardware/hwtimer.c	optional acpi
 contrib/dev/acpica/components/hardware/hwvalid.c	optional acpi
 contrib/dev/acpica/components/hardware/hwxface.c	optional acpi
 contrib/dev/acpica/components/hardware/hwxfsleep.c	optional acpi
 contrib/dev/acpica/components/namespace/nsaccess.c	optional acpi
 contrib/dev/acpica/components/namespace/nsalloc.c	optional acpi
 contrib/dev/acpica/components/namespace/nsarguments.c	optional acpi
 contrib/dev/acpica/components/namespace/nsconvert.c	optional acpi
 contrib/dev/acpica/components/namespace/nsdump.c	optional acpi
 contrib/dev/acpica/components/namespace/nseval.c	optional acpi
 contrib/dev/acpica/components/namespace/nsinit.c	optional acpi
 contrib/dev/acpica/components/namespace/nsload.c	optional acpi
 contrib/dev/acpica/components/namespace/nsnames.c	optional acpi
 contrib/dev/acpica/components/namespace/nsobject.c	optional acpi
 contrib/dev/acpica/components/namespace/nsparse.c	optional acpi
 contrib/dev/acpica/components/namespace/nspredef.c	optional acpi
 contrib/dev/acpica/components/namespace/nsprepkg.c	optional acpi
 contrib/dev/acpica/components/namespace/nsrepair.c	optional acpi
 contrib/dev/acpica/components/namespace/nsrepair2.c	optional acpi
 contrib/dev/acpica/components/namespace/nssearch.c	optional acpi
 contrib/dev/acpica/components/namespace/nsutils.c	optional acpi
 contrib/dev/acpica/components/namespace/nswalk.c	optional acpi
 contrib/dev/acpica/components/namespace/nsxfeval.c	optional acpi
 contrib/dev/acpica/components/namespace/nsxfname.c	optional acpi
 contrib/dev/acpica/components/namespace/nsxfobj.c	optional acpi
 contrib/dev/acpica/components/parser/psargs.c		optional acpi
 contrib/dev/acpica/components/parser/psloop.c		optional acpi
 contrib/dev/acpica/components/parser/psobject.c		optional acpi
 contrib/dev/acpica/components/parser/psopcode.c		optional acpi
 contrib/dev/acpica/components/parser/psopinfo.c		optional acpi
 contrib/dev/acpica/components/parser/psparse.c		optional acpi
 contrib/dev/acpica/components/parser/psscope.c		optional acpi
 contrib/dev/acpica/components/parser/pstree.c		optional acpi
 contrib/dev/acpica/components/parser/psutils.c		optional acpi
 contrib/dev/acpica/components/parser/pswalk.c		optional acpi
 contrib/dev/acpica/components/parser/psxface.c		optional acpi
 contrib/dev/acpica/components/resources/rsaddr.c	optional acpi
 contrib/dev/acpica/components/resources/rscalc.c	optional acpi
 contrib/dev/acpica/components/resources/rscreate.c	optional acpi
 contrib/dev/acpica/components/resources/rsdump.c	optional acpi acpi_debug
 contrib/dev/acpica/components/resources/rsdumpinfo.c	optional acpi
 contrib/dev/acpica/components/resources/rsinfo.c	optional acpi
 contrib/dev/acpica/components/resources/rsio.c		optional acpi
 contrib/dev/acpica/components/resources/rsirq.c		optional acpi
 contrib/dev/acpica/components/resources/rslist.c	optional acpi
 contrib/dev/acpica/components/resources/rsmemory.c	optional acpi
 contrib/dev/acpica/components/resources/rsmisc.c	optional acpi
 contrib/dev/acpica/components/resources/rsserial.c	optional acpi
 contrib/dev/acpica/components/resources/rsutils.c	optional acpi
 contrib/dev/acpica/components/resources/rsxface.c	optional acpi
 contrib/dev/acpica/components/tables/tbdata.c		optional acpi
 contrib/dev/acpica/components/tables/tbfadt.c		optional acpi
 contrib/dev/acpica/components/tables/tbfind.c		optional acpi
 contrib/dev/acpica/components/tables/tbinstal.c		optional acpi
 contrib/dev/acpica/components/tables/tbprint.c		optional acpi
 contrib/dev/acpica/components/tables/tbutils.c		optional acpi
 contrib/dev/acpica/components/tables/tbxface.c		optional acpi
 contrib/dev/acpica/components/tables/tbxfload.c		optional acpi
 contrib/dev/acpica/components/tables/tbxfroot.c		optional acpi
 contrib/dev/acpica/components/utilities/utaddress.c	optional acpi
 contrib/dev/acpica/components/utilities/utalloc.c	optional acpi
 contrib/dev/acpica/components/utilities/utascii.c	optional acpi
 contrib/dev/acpica/components/utilities/utbuffer.c	optional acpi
 contrib/dev/acpica/components/utilities/utcache.c	optional acpi
 contrib/dev/acpica/components/utilities/utcopy.c	optional acpi
 contrib/dev/acpica/components/utilities/utdebug.c	optional acpi
 contrib/dev/acpica/components/utilities/utdecode.c	optional acpi
 contrib/dev/acpica/components/utilities/utdelete.c	optional acpi
 contrib/dev/acpica/components/utilities/uterror.c	optional acpi
 contrib/dev/acpica/components/utilities/uteval.c	optional acpi
 contrib/dev/acpica/components/utilities/utexcep.c	optional acpi
 contrib/dev/acpica/components/utilities/utglobal.c	optional acpi
 contrib/dev/acpica/components/utilities/uthex.c		optional acpi
 contrib/dev/acpica/components/utilities/utids.c		optional acpi
 contrib/dev/acpica/components/utilities/utinit.c	optional acpi
 contrib/dev/acpica/components/utilities/utlock.c	optional acpi
 contrib/dev/acpica/components/utilities/utmath.c	optional acpi
 contrib/dev/acpica/components/utilities/utmisc.c	optional acpi
 contrib/dev/acpica/components/utilities/utmutex.c	optional acpi
 contrib/dev/acpica/components/utilities/utnonansi.c	optional acpi
 contrib/dev/acpica/components/utilities/utobject.c	optional acpi
 contrib/dev/acpica/components/utilities/utosi.c		optional acpi
 contrib/dev/acpica/components/utilities/utownerid.c	optional acpi
 contrib/dev/acpica/components/utilities/utpredef.c	optional acpi
 contrib/dev/acpica/components/utilities/utresrc.c	optional acpi
 contrib/dev/acpica/components/utilities/utstate.c	optional acpi
 contrib/dev/acpica/components/utilities/utstring.c	optional acpi
 contrib/dev/acpica/components/utilities/utstrtoul64.c	optional acpi
 contrib/dev/acpica/components/utilities/utuuid.c	optional acpi acpi_debug
 contrib/dev/acpica/components/utilities/utxface.c	optional acpi
 contrib/dev/acpica/components/utilities/utxferror.c	optional acpi
 contrib/dev/acpica/components/utilities/utxfinit.c	optional acpi
 contrib/dev/acpica/os_specific/service_layers/osgendbg.c	optional acpi acpi_debug
 contrib/ipfilter/netinet/fil.c	optional ipfilter inet \
 	compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN} -Wno-unused -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_auth.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_fil_freebsd.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_frag.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_log.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_nat.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_proxy.c optional ipfilter inet \
 	compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN} -Wno-unused -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_state.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_lookup.c optional ipfilter inet \
 	compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN} -Wno-unused -Wno-error -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_pool.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_htable.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_sync.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/mlfk_ipl.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_nat6.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_rules.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_scan.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/ip_dstlist.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -Wno-unused -I$S/contrib/ipfilter"
 contrib/ipfilter/netinet/radix_ipf.c optional ipfilter inet \
 	compile-with "${NORMAL_C} -I$S/contrib/ipfilter"
 contrib/libfdt/fdt.c		optional fdt
 contrib/libfdt/fdt_ro.c		optional fdt
 contrib/libfdt/fdt_rw.c		optional fdt
 contrib/libfdt/fdt_strerror.c	optional fdt
 contrib/libfdt/fdt_sw.c		optional fdt
 contrib/libfdt/fdt_wip.c	optional fdt
 contrib/libnv/cnvlist.c		standard
 contrib/libnv/dnvlist.c		standard
 contrib/libnv/nvlist.c		standard
 contrib/libnv/nvpair.c		standard
 contrib/ngatm/netnatm/api/cc_conn.c optional ngatm_ccatm \
 	compile-with "${NORMAL_C_NOWERROR} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/api/cc_data.c optional ngatm_ccatm \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/api/cc_dump.c optional ngatm_ccatm \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/api/cc_port.c optional ngatm_ccatm \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/api/cc_sig.c optional ngatm_ccatm \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/api/cc_user.c optional ngatm_ccatm \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/api/unisap.c optional ngatm_ccatm \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/misc/straddr.c optional ngatm_atmbase \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/misc/unimsg_common.c optional ngatm_atmbase \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/msg/traffic.c optional ngatm_atmbase \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/msg/uni_ie.c optional ngatm_atmbase \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/msg/uni_msg.c optional ngatm_atmbase \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/saal/saal_sscfu.c	optional ngatm_sscfu \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/saal/saal_sscop.c	optional ngatm_sscop \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/sig/sig_call.c optional ngatm_uni \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/sig/sig_coord.c optional ngatm_uni \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/sig/sig_party.c optional ngatm_uni \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/sig/sig_print.c optional ngatm_uni \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/sig/sig_reset.c optional ngatm_uni \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/sig/sig_uni.c optional ngatm_uni \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/sig/sig_unimsgcpy.c optional ngatm_uni \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 contrib/ngatm/netnatm/sig/sig_verify.c optional ngatm_uni \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 crypto/blowfish/bf_ecb.c	optional ipsec | ipsec_support
 crypto/blowfish/bf_skey.c	optional crypto | ipsec | ipsec_support
 crypto/camellia/camellia.c	optional crypto | ipsec | ipsec_support
 crypto/camellia/camellia-api.c	optional crypto | ipsec | ipsec_support
 crypto/des/des_ecb.c		optional crypto | ipsec | ipsec_support | netsmb
 crypto/des/des_setkey.c		optional crypto | ipsec | ipsec_support | netsmb
 crypto/rc4/rc4.c		optional netgraph_mppc_encryption | kgssapi
 crypto/rijndael/rijndael-alg-fst.c optional crypto | ekcd | geom_bde | \
 	ipsec | ipsec_support | random !random_loadable | wlan_ccmp
 crypto/rijndael/rijndael-api-fst.c optional ekcd | geom_bde | random !random_loadable
 crypto/rijndael/rijndael-api.c	optional crypto | ipsec | ipsec_support | \
 	wlan_ccmp
 crypto/sha1.c			optional carp | crypto | ipsec | \
 	ipsec_support | netgraph_mppc_encryption | sctp 
 crypto/sha2/sha256c.c		optional crypto | ekcd | geom_bde | ipsec | \
 	ipsec_support | random !random_loadable | sctp | zfs
 crypto/sha2/sha512c.c		optional crypto | geom_bde | ipsec | \
 	ipsec_support | zfs
 crypto/skein/skein.c		optional crypto | zfs
 crypto/skein/skein_block.c	optional crypto | zfs
 crypto/siphash/siphash.c	optional inet | inet6
 crypto/siphash/siphash_test.c	optional inet | inet6
 ddb/db_access.c			optional ddb
 ddb/db_break.c			optional ddb
 ddb/db_capture.c		optional ddb
 ddb/db_command.c		optional ddb
 ddb/db_examine.c		optional ddb
 ddb/db_expr.c			optional ddb
 ddb/db_input.c			optional ddb
 ddb/db_lex.c			optional ddb
 ddb/db_main.c			optional ddb
 ddb/db_output.c			optional ddb
 ddb/db_print.c			optional ddb
 ddb/db_ps.c			optional ddb
 ddb/db_run.c			optional ddb
 ddb/db_script.c			optional ddb
 ddb/db_sym.c			optional ddb
 ddb/db_thread.c			optional ddb
 ddb/db_textdump.c		optional ddb
 ddb/db_variables.c		optional ddb
 ddb/db_watch.c			optional ddb
 ddb/db_write_cmd.c		optional ddb
 dev/aac/aac.c			optional aac
 dev/aac/aac_cam.c		optional aacp aac
 dev/aac/aac_debug.c		optional aac
 dev/aac/aac_disk.c		optional aac
 dev/aac/aac_linux.c		optional aac compat_linux
 dev/aac/aac_pci.c		optional aac pci
 dev/aacraid/aacraid.c		optional aacraid
 dev/aacraid/aacraid_cam.c	optional aacraid scbus
 dev/aacraid/aacraid_debug.c	optional aacraid
 dev/aacraid/aacraid_linux.c	optional aacraid compat_linux
 dev/aacraid/aacraid_pci.c	optional aacraid pci
 dev/acpi_support/acpi_wmi.c	optional acpi_wmi acpi
 dev/acpi_support/acpi_asus.c	optional acpi_asus acpi
 dev/acpi_support/acpi_asus_wmi.c	optional acpi_asus_wmi acpi
 dev/acpi_support/acpi_fujitsu.c	optional acpi_fujitsu acpi
 dev/acpi_support/acpi_hp.c	optional acpi_hp acpi
 dev/acpi_support/acpi_ibm.c	optional acpi_ibm acpi
 dev/acpi_support/acpi_panasonic.c optional acpi_panasonic acpi
 dev/acpi_support/acpi_sony.c	optional acpi_sony acpi
 dev/acpi_support/acpi_toshiba.c	optional acpi_toshiba acpi
 dev/acpi_support/atk0110.c	optional aibs acpi
 dev/acpica/Osd/OsdDebug.c	optional acpi
 dev/acpica/Osd/OsdHardware.c	optional acpi
 dev/acpica/Osd/OsdInterrupt.c	optional acpi
 dev/acpica/Osd/OsdMemory.c	optional acpi
 dev/acpica/Osd/OsdSchedule.c	optional acpi
 dev/acpica/Osd/OsdStream.c	optional acpi
 dev/acpica/Osd/OsdSynch.c	optional acpi
 dev/acpica/Osd/OsdTable.c	optional acpi
 dev/acpica/acpi.c		optional acpi
 dev/acpica/acpi_acad.c		optional acpi
 dev/acpica/acpi_battery.c	optional acpi
 dev/acpica/acpi_button.c	optional acpi
 dev/acpica/acpi_cmbat.c		optional acpi
 dev/acpica/acpi_cpu.c		optional acpi
 dev/acpica/acpi_ec.c		optional acpi
 dev/acpica/acpi_isab.c		optional acpi isa
 dev/acpica/acpi_lid.c		optional acpi
 dev/acpica/acpi_package.c	optional acpi
 dev/acpica/acpi_perf.c		optional acpi
 dev/acpica/acpi_powerres.c	optional acpi
 dev/acpica/acpi_quirk.c		optional acpi
 dev/acpica/acpi_resource.c	optional acpi
 dev/acpica/acpi_smbat.c		optional acpi
 dev/acpica/acpi_thermal.c	optional acpi
 dev/acpica/acpi_throttle.c	optional acpi
 dev/acpica/acpi_video.c		optional acpi_video acpi
 dev/acpica/acpi_dock.c		optional acpi_dock acpi
 dev/adlink/adlink.c		optional adlink
 dev/advansys/adv_pci.c		optional adv pci
 dev/advansys/advansys.c		optional adv
 dev/advansys/advlib.c		optional adv
 dev/advansys/advmcode.c		optional adv
 dev/advansys/adw_pci.c		optional adw pci
 dev/advansys/adwcam.c		optional adw
 dev/advansys/adwlib.c		optional adw
 dev/advansys/adwmcode.c		optional adw
 dev/ae/if_ae.c			optional ae pci
 dev/age/if_age.c		optional age pci
 dev/agp/agp.c			optional agp pci
 dev/agp/agp_if.m		optional agp pci
 dev/aha/aha.c			optional aha
 dev/aha/aha_isa.c		optional aha isa
 dev/ahci/ahci.c			optional ahci
 dev/ahci/ahciem.c		optional ahci
 dev/ahci/ahci_pci.c		optional ahci pci
 dev/aic/aic.c			optional aic
 dev/aic/aic_pccard.c		optional aic pccard
 dev/aic7xxx/ahc_isa.c		optional ahc isa
 dev/aic7xxx/ahc_pci.c		optional ahc pci \
 	compile-with "${NORMAL_C} ${NO_WCONSTANT_CONVERSION}"
 dev/aic7xxx/ahd_pci.c		optional ahd pci \
 	compile-with "${NORMAL_C} ${NO_WCONSTANT_CONVERSION}"
 dev/aic7xxx/aic7770.c		optional ahc
 dev/aic7xxx/aic79xx.c		optional ahd pci
 dev/aic7xxx/aic79xx_osm.c	optional ahd pci
 dev/aic7xxx/aic79xx_pci.c	optional ahd pci
 dev/aic7xxx/aic79xx_reg_print.c	optional ahd pci ahd_reg_pretty_print
 dev/aic7xxx/aic7xxx.c		optional ahc
 dev/aic7xxx/aic7xxx_93cx6.c	optional ahc
 dev/aic7xxx/aic7xxx_osm.c	optional ahc
 dev/aic7xxx/aic7xxx_pci.c	optional ahc pci
 dev/aic7xxx/aic7xxx_reg_print.c	optional ahc ahc_reg_pretty_print
 dev/al_eth/al_eth.c				optional al_eth	fdt	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}"
 dev/al_eth/al_init_eth_lm.c			optional al_eth	fdt	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}"
 dev/al_eth/al_init_eth_kr.c			optional al_eth	fdt	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}"
 contrib/alpine-hal/al_hal_iofic.c		optional al_iofic	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}"
 contrib/alpine-hal/al_hal_serdes_25g.c		optional al_serdes	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}"
 contrib/alpine-hal/al_hal_serdes_hssp.c		optional al_serdes	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}"
 contrib/alpine-hal/al_hal_udma_config.c		optional al_udma	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}"
 contrib/alpine-hal/al_hal_udma_debug.c		optional al_udma	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}"
 contrib/alpine-hal/al_hal_udma_iofic.c		optional al_udma	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}"
 contrib/alpine-hal/al_hal_udma_main.c		optional al_udma	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}"
 contrib/alpine-hal/al_serdes.c			optional al_serdes	\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}"
 contrib/alpine-hal/eth/al_hal_eth_kr.c		optional al_eth		\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}"
 contrib/alpine-hal/eth/al_hal_eth_main.c	optional al_eth		\
 	no-depend	\
 	compile-with "${CC} -c -o ${.TARGET} ${CFLAGS} -I$S/contrib/alpine-hal -I$S/contrib/alpine-hal/eth ${PROF} ${.IMPSRC}"
 dev/alc/if_alc.c		optional alc pci
 dev/ale/if_ale.c		optional ale pci
 dev/alpm/alpm.c			optional alpm pci
 dev/altera/avgen/altera_avgen.c		optional altera_avgen
 dev/altera/avgen/altera_avgen_fdt.c	optional altera_avgen fdt
 dev/altera/avgen/altera_avgen_nexus.c	optional altera_avgen
 dev/altera/sdcard/altera_sdcard.c	optional altera_sdcard
 dev/altera/sdcard/altera_sdcard_disk.c	optional altera_sdcard
 dev/altera/sdcard/altera_sdcard_io.c	optional altera_sdcard
 dev/altera/sdcard/altera_sdcard_fdt.c	optional altera_sdcard fdt
 dev/altera/sdcard/altera_sdcard_nexus.c	optional altera_sdcard
 dev/altera/pio/pio.c		optional altera_pio
 dev/altera/pio/pio_if.m		optional altera_pio
 dev/amdpm/amdpm.c		optional amdpm pci | nfpm pci
 dev/amdsmb/amdsmb.c		optional amdsmb pci
 dev/amr/amr.c			optional amr
 dev/amr/amr_cam.c		optional amrp amr
 dev/amr/amr_disk.c		optional amr
 dev/amr/amr_linux.c		optional amr compat_linux
 dev/amr/amr_pci.c		optional amr pci
 dev/an/if_an.c			optional an
 dev/an/if_an_isa.c		optional an isa
 dev/an/if_an_pccard.c		optional an pccard
 dev/an/if_an_pci.c		optional an pci
 #
 dev/ata/ata_if.m		optional ata | atacore
 dev/ata/ata-all.c		optional ata | atacore
 dev/ata/ata-dma.c		optional ata | atacore
 dev/ata/ata-lowlevel.c		optional ata | atacore
 dev/ata/ata-sata.c		optional ata | atacore
 dev/ata/ata-card.c		optional ata pccard | atapccard
 dev/ata/ata-isa.c		optional ata isa | ataisa
 dev/ata/ata-pci.c		optional ata pci | atapci
 dev/ata/chipsets/ata-acard.c	optional ata pci | ataacard
 dev/ata/chipsets/ata-acerlabs.c	optional ata pci | ataacerlabs
 dev/ata/chipsets/ata-amd.c	optional ata pci | ataamd
 dev/ata/chipsets/ata-ati.c	optional ata pci | ataati
 dev/ata/chipsets/ata-cenatek.c	optional ata pci | atacenatek
 dev/ata/chipsets/ata-cypress.c	optional ata pci | atacypress
 dev/ata/chipsets/ata-cyrix.c	optional ata pci | atacyrix
 dev/ata/chipsets/ata-highpoint.c	optional ata pci | atahighpoint
 dev/ata/chipsets/ata-intel.c	optional ata pci | ataintel
 dev/ata/chipsets/ata-ite.c	optional ata pci | ataite
 dev/ata/chipsets/ata-jmicron.c	optional ata pci | atajmicron
 dev/ata/chipsets/ata-marvell.c	optional ata pci | atamarvell
 dev/ata/chipsets/ata-micron.c	optional ata pci | atamicron
 dev/ata/chipsets/ata-national.c	optional ata pci | atanational
 dev/ata/chipsets/ata-netcell.c	optional ata pci | atanetcell
 dev/ata/chipsets/ata-nvidia.c	optional ata pci | atanvidia
 dev/ata/chipsets/ata-promise.c	optional ata pci | atapromise
 dev/ata/chipsets/ata-serverworks.c	optional ata pci | ataserverworks
 dev/ata/chipsets/ata-siliconimage.c	optional ata pci | atasiliconimage | ataati
 dev/ata/chipsets/ata-sis.c	optional ata pci | atasis
 dev/ata/chipsets/ata-via.c	optional ata pci | atavia
 #
 dev/ath/if_ath_pci.c		optional ath_pci pci \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 #
 dev/ath/if_ath_ahb.c		optional ath_ahb \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 #
 dev/ath/if_ath.c		optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_alq.c		optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_beacon.c		optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_btcoex.c		optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_btcoex_mci.c	optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_debug.c		optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_descdma.c	optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_keycache.c	optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_ioctl.c		optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_led.c		optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_lna_div.c	optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_tx.c		optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_tx_edma.c	optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_tx_ht.c		optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_tdma.c		optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_sysctl.c		optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_rx.c		optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_rx_edma.c	optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/if_ath_spectral.c	optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/ah_osdep.c		optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 #
 dev/ath/ath_hal/ah.c		optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/ath_hal/ah_eeprom_v1.c	optional ath_hal | ath_ar5210 \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/ath_hal/ah_eeprom_v3.c	optional ath_hal | ath_ar5211 | ath_ar5212 \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/ath_hal/ah_eeprom_v14.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/ath_hal/ah_eeprom_v4k.c \
 	optional ath_hal | ath_ar9285 \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/ath_hal/ah_eeprom_9287.c \
 	optional ath_hal | ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/ath_hal/ah_regdomain.c	optional ath \
 	compile-with "${NORMAL_C} ${NO_WSHIFT_COUNT_NEGATIVE} ${NO_WSHIFT_COUNT_OVERFLOW} -I$S/dev/ath"
 # ar5210
 dev/ath/ath_hal/ar5210/ar5210_attach.c		optional ath_hal | ath_ar5210 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_beacon.c		optional ath_hal | ath_ar5210 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_interrupts.c	optional ath_hal | ath_ar5210 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_keycache.c	optional ath_hal | ath_ar5210 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_misc.c		optional ath_hal | ath_ar5210 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_phy.c		optional ath_hal | ath_ar5210 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_power.c		optional ath_hal | ath_ar5210 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_recv.c		optional ath_hal | ath_ar5210 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_reset.c		optional ath_hal | ath_ar5210 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5210/ar5210_xmit.c		optional ath_hal | ath_ar5210 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 # ar5211
 dev/ath/ath_hal/ar5211/ar5211_attach.c		optional ath_hal | ath_ar5211 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_beacon.c		optional ath_hal | ath_ar5211 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_interrupts.c	optional ath_hal | ath_ar5211 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_keycache.c	optional ath_hal | ath_ar5211 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_misc.c		optional ath_hal | ath_ar5211 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_phy.c		optional ath_hal | ath_ar5211 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_power.c		optional ath_hal | ath_ar5211 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_recv.c		optional ath_hal | ath_ar5211 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_reset.c		optional ath_hal | ath_ar5211 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5211/ar5211_xmit.c		optional ath_hal | ath_ar5211 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 # ar5212
 dev/ath/ath_hal/ar5212/ar5212_ani.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_attach.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_beacon.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_eeprom.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_gpio.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_interrupts.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_keycache.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_misc.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_phy.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_power.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_recv.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_reset.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_rfgain.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5212_xmit.c \
 	optional ath_hal | ath_ar5212 | ath_ar5416 | ath_ar9160 | ath_ar9280 | \
 	ath_ar9285 ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 # ar5416 (depends on ar5212)
 dev/ath/ath_hal/ar5416/ar5416_ani.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_attach.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_beacon.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_btcoex.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_cal.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_cal_iq.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_cal_adcgain.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_cal_adcdc.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_eeprom.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_gpio.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_interrupts.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_keycache.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_misc.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_phy.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_power.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_radar.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_recv.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_reset.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_spectral.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar5416_xmit.c \
 	optional ath_hal | ath_ar5416 | ath_ar9160 | ath_ar9280 | ath_ar9285 | \
 	ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 # ar9130 (depends upon ar5416) - also requires AH_SUPPORT_AR9130
 #
 # Since this is an embedded MAC SoC, there's no need to compile it into the
 # default HAL.
 dev/ath/ath_hal/ar9001/ar9130_attach.c optional ath_ar9130 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9001/ar9130_phy.c optional ath_ar9130 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9001/ar9130_eeprom.c optional ath_ar9130 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 # ar9160 (depends on ar5416)
 dev/ath/ath_hal/ar9001/ar9160_attach.c optional ath_hal | ath_ar9160 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 # ar9280 (depends on ar5416)
 dev/ath/ath_hal/ar9002/ar9280_attach.c optional ath_hal | ath_ar9280 | \
 	ath_ar9285 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9280_olc.c optional ath_hal | ath_ar9280 | \
 	ath_ar9285 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 # ar9285 (depends on ar5416 and ar9280)
 dev/ath/ath_hal/ar9002/ar9285_attach.c optional ath_hal | ath_ar9285 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9285_btcoex.c optional ath_hal | ath_ar9285 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9285_reset.c optional ath_hal | ath_ar9285 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9285_cal.c optional ath_hal | ath_ar9285 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9285_phy.c optional ath_hal | ath_ar9285 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9285_diversity.c optional ath_hal | ath_ar9285 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 # ar9287 (depends on ar5416)
 dev/ath/ath_hal/ar9002/ar9287_attach.c optional ath_hal | ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9287_reset.c optional ath_hal | ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9287_cal.c optional ath_hal | ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9287_olc.c optional ath_hal | ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 
 # ar9300
 contrib/dev/ath/ath_hal/ar9300/ar9300_ani.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_beacon.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_eeprom.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal ${NO_WCONSTANT_CONVERSION}"
 contrib/dev/ath/ath_hal/ar9300/ar9300_freebsd.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_gpio.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_interrupts.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_keycache.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_mci.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_misc.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_paprd.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_phy.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_power.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_radar.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_radio.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_recv.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_recv_ds.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal ${NO_WSOMETIMES_UNINITIALIZED} -Wno-unused-function"
 contrib/dev/ath/ath_hal/ar9300/ar9300_stub.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_stub_funcs.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_spectral.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_timer.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_xmit.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 contrib/dev/ath/ath_hal/ar9300/ar9300_xmit_ds.c optional ath_hal | ath_ar9300 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal -I$S/contrib/dev/ath/ath_hal"
 
 # rf backends
 dev/ath/ath_hal/ar5212/ar2316.c	optional ath_rf2316 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar2317.c	optional ath_rf2317 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar2413.c	optional ath_hal | ath_rf2413 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar2425.c	optional ath_hal | ath_rf2425 | ath_rf2417 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5111.c	optional ath_hal | ath_rf5111 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5112.c	optional ath_hal | ath_rf5112 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5212/ar5413.c	optional ath_hal | ath_rf5413 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar5416/ar2133.c optional ath_hal | ath_ar5416 | \
 	ath_ar9130 | ath_ar9160 | ath_ar9280 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9280.c optional ath_hal | ath_ar9280 | ath_ar9285 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9285.c optional ath_hal | ath_ar9285 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 dev/ath/ath_hal/ar9002/ar9287.c optional ath_hal | ath_ar9287 \
 	compile-with "${NORMAL_C} -I$S/dev/ath -I$S/dev/ath/ath_hal"
 
 # ath rate control algorithms
 dev/ath/ath_rate/amrr/amrr.c	optional ath_rate_amrr \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/ath_rate/onoe/onoe.c	optional ath_rate_onoe \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 dev/ath/ath_rate/sample/sample.c	optional ath_rate_sample \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 # ath DFS modules
 dev/ath/ath_dfs/null/dfs_null.c	optional ath \
 	compile-with "${NORMAL_C} -I$S/dev/ath"
 #
 dev/bce/if_bce.c			optional bce
 dev/bfe/if_bfe.c			optional bfe
 dev/bge/if_bge.c			optional bge
 dev/bhnd/bhnd.c				optional bhnd
 dev/bhnd/bhnd_erom.c			optional bhnd
 dev/bhnd/bhnd_erom_if.m			optional bhnd
 dev/bhnd/bhnd_subr.c			optional bhnd
 dev/bhnd/bhnd_bus_if.m			optional bhnd
 dev/bhnd/bhndb/bhnd_bhndb.c		optional bhndb bhnd
 dev/bhnd/bhndb/bhndb.c			optional bhndb bhnd
 dev/bhnd/bhndb/bhndb_bus_if.m		optional bhndb bhnd
 dev/bhnd/bhndb/bhndb_hwdata.c		optional bhndb bhnd
 dev/bhnd/bhndb/bhndb_if.m		optional bhndb bhnd
 dev/bhnd/bhndb/bhndb_pci.c		optional bhndb bhnd pci
 dev/bhnd/bhndb/bhndb_pci_hwdata.c 	optional bhndb bhnd pci
 dev/bhnd/bhndb/bhndb_pci_sprom.c	optional bhndb bhnd pci
 dev/bhnd/bhndb/bhndb_subr.c		optional bhndb bhnd
 dev/bhnd/bcma/bcma.c			optional bcma bhnd
 dev/bhnd/bcma/bcma_bhndb.c		optional bcma bhnd bhndb
 dev/bhnd/bcma/bcma_erom.c		optional bcma bhnd
 dev/bhnd/bcma/bcma_subr.c		optional bcma bhnd
 dev/bhnd/cores/chipc/bhnd_chipc_if.m	optional bhnd
 dev/bhnd/cores/chipc/bhnd_sprom_chipc.c	optional bhnd
 dev/bhnd/cores/chipc/bhnd_pmu_chipc.c	optional bhnd
 dev/bhnd/cores/chipc/chipc.c		optional bhnd
 dev/bhnd/cores/chipc/chipc_cfi.c	optional bhnd cfi 
 dev/bhnd/cores/chipc/chipc_slicer.c	optional bhnd cfi | bhnd spibus
 dev/bhnd/cores/chipc/chipc_spi.c	optional bhnd spibus
 dev/bhnd/cores/chipc/chipc_subr.c	optional bhnd
 dev/bhnd/cores/chipc/pwrctl/bhnd_pwrctl.c	optional bhnd
 dev/bhnd/cores/chipc/pwrctl/bhnd_pwrctl_subr.c	optional bhnd
 dev/bhnd/cores/pci/bhnd_pci.c		optional bhnd pci
 dev/bhnd/cores/pci/bhnd_pci_hostb.c	optional bhndb bhnd pci
 dev/bhnd/cores/pci/bhnd_pcib.c		optional bhnd_pcib bhnd pci
 dev/bhnd/cores/pcie2/bhnd_pcie2.c	optional bhnd pci
 dev/bhnd/cores/pcie2/bhnd_pcie2_hostb.c	optional bhndb bhnd pci
 dev/bhnd/cores/pcie2/bhnd_pcie2b.c	optional bhnd_pcie2b bhnd pci
 dev/bhnd/cores/pmu/bhnd_pmu.c		optional bhnd
 dev/bhnd/cores/pmu/bhnd_pmu_core.c	optional bhnd
 dev/bhnd/cores/pmu/bhnd_pmu_if.m	optional bhnd
 dev/bhnd/cores/pmu/bhnd_pmu_subr.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_data.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_data_bcm.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_data_bcmraw.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_data_btxt.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_data_sprom.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_data_tlv.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_if.m		optional bhnd
 dev/bhnd/nvram/bhnd_nvram_io.c		optional bhnd
 dev/bhnd/nvram/bhnd_nvram_iobuf.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_ioptr.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_iores.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_plist.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_store.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_store_subr.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_subr.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_value.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_value_fmts.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_value_prf.c	optional bhnd
 dev/bhnd/nvram/bhnd_nvram_value_subr.c	optional bhnd
 dev/bhnd/nvram/bhnd_sprom.c		optional bhnd
 dev/bhnd/siba/siba.c			optional siba bhnd
 dev/bhnd/siba/siba_bhndb.c		optional siba bhnd bhndb
 dev/bhnd/siba/siba_erom.c		optional siba bhnd
 dev/bhnd/siba/siba_subr.c		optional siba bhnd
 #
 dev/bktr/bktr_audio.c		optional bktr pci
 dev/bktr/bktr_card.c		optional bktr pci
 dev/bktr/bktr_core.c		optional bktr pci
 dev/bktr/bktr_i2c.c		optional bktr pci smbus
 dev/bktr/bktr_os.c		optional bktr pci
 dev/bktr/bktr_tuner.c		optional bktr pci
 dev/bktr/msp34xx.c		optional bktr pci
 dev/bnxt/bnxt_hwrm.c		optional bnxt iflib pci
 dev/bnxt/bnxt_sysctl.c		optional bnxt iflib pci
 dev/bnxt/bnxt_txrx.c		optional bnxt iflib pci
 dev/bnxt/if_bnxt.c		optional bnxt iflib pci
 dev/buslogic/bt.c		optional bt
 dev/buslogic/bt_isa.c		optional bt isa
 dev/buslogic/bt_pci.c		optional bt pci
 dev/bwi/bwimac.c		optional bwi
 dev/bwi/bwiphy.c		optional bwi
 dev/bwi/bwirf.c			optional bwi
 dev/bwi/if_bwi.c		optional bwi
 dev/bwi/if_bwi_pci.c		optional bwi pci
 # XXX Work around clang warnings, until maintainer approves fix.
 dev/bwn/if_bwn.c		optional bwn siba_bwn \
 	compile-with "${NORMAL_C} ${NO_WSOMETIMES_UNINITIALIZED}"
 dev/bwn/if_bwn_pci.c		optional bwn pci bhnd
 dev/bwn/if_bwn_phy_common.c	optional bwn siba_bwn
 dev/bwn/if_bwn_phy_g.c		optional bwn siba_bwn \
 	compile-with "${NORMAL_C} ${NO_WSOMETIMES_UNINITIALIZED} ${NO_WCONSTANT_CONVERSION}"
 dev/bwn/if_bwn_phy_lp.c		optional bwn siba_bwn \
 	compile-with "${NORMAL_C} ${NO_WSOMETIMES_UNINITIALIZED}"
 dev/bwn/if_bwn_phy_n.c		optional bwn siba_bwn
 dev/bwn/if_bwn_util.c		optional bwn siba_bwn
 dev/bwn/bwn_mac.c		optional bwn bhnd
 dev/cardbus/cardbus.c		optional cardbus
 dev/cardbus/cardbus_cis.c	optional cardbus
 dev/cardbus/cardbus_device.c	optional cardbus
 dev/cas/if_cas.c		optional cas
 dev/cfi/cfi_bus_fdt.c		optional cfi fdt
 dev/cfi/cfi_bus_nexus.c		optional cfi
 dev/cfi/cfi_core.c		optional cfi
 dev/cfi/cfi_dev.c		optional cfi
 dev/cfi/cfi_disk.c		optional cfid
 dev/chromebook_platform/chromebook_platform.c	optional chromebook_platform
 dev/ciss/ciss.c			optional ciss
 dev/cm/smc90cx6.c		optional cm
 dev/cmx/cmx.c			optional cmx
 dev/cmx/cmx_pccard.c		optional cmx pccard
 dev/cpufreq/ichss.c		optional cpufreq pci
 dev/cs/if_cs.c			optional cs
 dev/cs/if_cs_isa.c		optional cs isa
 dev/cs/if_cs_pccard.c		optional cs pccard
 dev/cxgb/cxgb_main.c		optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/cxgb_sge.c		optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_mc5.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_vsc7323.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_vsc8211.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_ael1002.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_aq100x.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_mv88e1xxx.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_xgmac.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_t3_hw.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/common/cxgb_tn1010.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/sys/uipc_mvec.c	optional cxgb pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgb/cxgb_t3fw.c		optional cxgb cxgb_t3fw \
 	compile-with "${NORMAL_C} -I$S/dev/cxgb"
 dev/cxgbe/t4_if.m		optional cxgbe pci
 dev/cxgbe/t4_iov.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_mp_ring.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_main.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_netmap.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_sge.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_l2t.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_tracer.c		optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/t4_vf.c		optional cxgbev pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/common/t4_hw.c	optional cxgbe pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 dev/cxgbe/common/t4vf_hw.c	optional cxgbev pci \
 	compile-with "${NORMAL_C} -I$S/dev/cxgbe"
 t4fw_cfg.c		optional cxgbe					\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk t4fw_cfg.fw:t4fw_cfg t4fw_cfg_uwire.fw:t4fw_cfg_uwire t4fw.fw:t4fw -mt4fw_cfg -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"t4fw_cfg.c"
 t4fw_cfg.fwo		optional cxgbe					\
 	dependency	"t4fw_cfg.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t4fw_cfg.fwo"
 t4fw_cfg.fw		optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t4fw_cfg.txt"		\
 	compile-with	"${CP} ${.ALLSRC} ${.TARGET}"			\
 	no-obj no-implicit-rule						\
 	clean		"t4fw_cfg.fw"
 t4fw_cfg_uwire.fwo	optional cxgbe					\
 	dependency	"t4fw_cfg_uwire.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t4fw_cfg_uwire.fwo"
 t4fw_cfg_uwire.fw	optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t4fw_cfg_uwire.txt"	\
 	compile-with	"${CP} ${.ALLSRC} ${.TARGET}"			\
 	no-obj no-implicit-rule						\
 	clean		"t4fw_cfg_uwire.fw"
 t4fw.fwo		optional cxgbe					\
 	dependency	"t4fw.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t4fw.fwo"
 t4fw.fw			optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t4fw-1.16.26.0.bin.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"t4fw.fw"
 t5fw_cfg.c		optional cxgbe					\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk t5fw_cfg.fw:t5fw_cfg t5fw.fw:t5fw -mt5fw_cfg -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"t5fw_cfg.c"
 t5fw_cfg.fwo		optional cxgbe					\
 	dependency	"t5fw_cfg.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t5fw_cfg.fwo"
 t5fw_cfg.fw		optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t5fw_cfg.txt"		\
 	compile-with	"${CP} ${.ALLSRC} ${.TARGET}"			\
 	no-obj no-implicit-rule						\
 	clean		"t5fw_cfg.fw"
 t5fw.fwo		optional cxgbe					\
 	dependency	"t5fw.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t5fw.fwo"
 t5fw.fw			optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t5fw-1.16.26.0.bin.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"t5fw.fw"
 t6fw_cfg.c		optional cxgbe					\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk t6fw_cfg.fw:t6fw_cfg t6fw.fw:t6fw -mt6fw_cfg -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"t6fw_cfg.c"
 t6fw_cfg.fwo		optional cxgbe					\
 	dependency	"t6fw_cfg.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t6fw_cfg.fwo"
 t6fw_cfg.fw		optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t6fw_cfg.txt"		\
 	compile-with	"${CP} ${.ALLSRC} ${.TARGET}"			\
 	no-obj no-implicit-rule						\
 	clean		"t6fw_cfg.fw"
 t6fw.fwo		optional cxgbe					\
 	dependency	"t6fw.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"t6fw.fwo"
 t6fw.fw			optional cxgbe					\
 	dependency	"$S/dev/cxgbe/firmware/t6fw-1.16.26.0.bin.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"t6fw.fw"
 dev/cy/cy.c			optional cy
 dev/cy/cy_isa.c			optional cy isa
 dev/cy/cy_pci.c			optional cy pci
 dev/cyapa/cyapa.c		optional cyapa iicbus
 dev/dc/if_dc.c			optional dc pci
 dev/dc/dcphy.c			optional dc pci
 dev/dc/pnphy.c			optional dc pci
 dev/dcons/dcons.c		optional dcons
 dev/dcons/dcons_crom.c		optional dcons_crom
 dev/dcons/dcons_os.c		optional dcons
 dev/de/if_de.c			optional de pci
 dev/dme/if_dme.c		optional dme
 dev/dpt/dpt_pci.c		optional dpt pci
 dev/dpt/dpt_scsi.c		optional dpt
 dev/drm/ati_pcigart.c		optional drm
 dev/drm/drm_agpsupport.c	optional drm
 dev/drm/drm_auth.c		optional drm
 dev/drm/drm_bufs.c		optional drm
 dev/drm/drm_context.c		optional drm
 dev/drm/drm_dma.c		optional drm
 dev/drm/drm_drawable.c		optional drm
 dev/drm/drm_drv.c		optional drm
 dev/drm/drm_fops.c		optional drm
 dev/drm/drm_hashtab.c		optional drm
 dev/drm/drm_ioctl.c		optional drm
 dev/drm/drm_irq.c		optional drm
 dev/drm/drm_lock.c		optional drm
 dev/drm/drm_memory.c		optional drm
 dev/drm/drm_mm.c		optional drm
 dev/drm/drm_pci.c		optional drm
 dev/drm/drm_scatter.c		optional drm
 dev/drm/drm_sman.c		optional drm
 dev/drm/drm_sysctl.c		optional drm
 dev/drm/drm_vm.c		optional drm
 dev/drm/i915_dma.c		optional i915drm
 dev/drm/i915_drv.c		optional i915drm
 dev/drm/i915_irq.c		optional i915drm
 dev/drm/i915_mem.c		optional i915drm
 dev/drm/i915_suspend.c		optional i915drm
 dev/drm/mach64_dma.c		optional mach64drm
 dev/drm/mach64_drv.c		optional mach64drm
 dev/drm/mach64_irq.c		optional mach64drm
 dev/drm/mach64_state.c		optional mach64drm
 dev/drm/mga_dma.c		optional mgadrm
 dev/drm/mga_drv.c		optional mgadrm
 dev/drm/mga_irq.c		optional mgadrm
 dev/drm/mga_state.c		optional mgadrm
 dev/drm/mga_warp.c		optional mgadrm
 dev/drm/r128_cce.c		optional r128drm \
 	compile-with "${NORMAL_C} ${NO_WCONSTANT_CONVERSION}"
 dev/drm/r128_drv.c		optional r128drm
 dev/drm/r128_irq.c		optional r128drm
 dev/drm/r128_state.c		optional r128drm
 dev/drm/r300_cmdbuf.c		optional radeondrm
 dev/drm/r600_blit.c		optional radeondrm
 dev/drm/r600_cp.c		optional radeondrm \
 	compile-with "${NORMAL_C} ${NO_WCONSTANT_CONVERSION}"
 dev/drm/radeon_cp.c		optional radeondrm \
 	compile-with "${NORMAL_C} ${NO_WCONSTANT_CONVERSION}"
 dev/drm/radeon_cs.c		optional radeondrm
 dev/drm/radeon_drv.c		optional radeondrm
 dev/drm/radeon_irq.c		optional radeondrm
 dev/drm/radeon_mem.c		optional radeondrm
 dev/drm/radeon_state.c		optional radeondrm
 dev/drm/savage_bci.c		optional savagedrm
 dev/drm/savage_drv.c		optional savagedrm
 dev/drm/savage_state.c		optional savagedrm
 dev/drm/sis_drv.c		optional sisdrm
 dev/drm/sis_ds.c		optional sisdrm
 dev/drm/sis_mm.c		optional sisdrm
 dev/drm/tdfx_drv.c		optional tdfxdrm
 dev/drm/via_dma.c		optional viadrm
 dev/drm/via_dmablit.c		optional viadrm
 dev/drm/via_drv.c		optional viadrm
 dev/drm/via_irq.c		optional viadrm
 dev/drm/via_map.c		optional viadrm
 dev/drm/via_mm.c		optional viadrm
 dev/drm/via_verifier.c		optional viadrm
 dev/drm/via_video.c		optional viadrm
 dev/drm2/drm_agpsupport.c	optional drm2
 dev/drm2/drm_auth.c		optional drm2
 dev/drm2/drm_bufs.c		optional drm2
 dev/drm2/drm_buffer.c		optional drm2
 dev/drm2/drm_context.c		optional drm2
 dev/drm2/drm_crtc.c		optional drm2
 dev/drm2/drm_crtc_helper.c	optional drm2
 dev/drm2/drm_dma.c		optional drm2
 dev/drm2/drm_dp_helper.c	optional drm2
 dev/drm2/drm_dp_iic_helper.c	optional drm2
 dev/drm2/drm_drv.c		optional drm2
 dev/drm2/drm_edid.c		optional drm2
 dev/drm2/drm_fb_helper.c	optional drm2
 dev/drm2/drm_fops.c		optional drm2
 dev/drm2/drm_gem.c		optional drm2
 dev/drm2/drm_gem_names.c	optional drm2
 dev/drm2/drm_global.c		optional drm2
 dev/drm2/drm_hashtab.c		optional drm2
 dev/drm2/drm_ioctl.c		optional drm2
 dev/drm2/drm_irq.c		optional drm2
 dev/drm2/drm_linux_list_sort.c	optional drm2
 dev/drm2/drm_lock.c		optional drm2
 dev/drm2/drm_memory.c		optional drm2
 dev/drm2/drm_mm.c		optional drm2
 dev/drm2/drm_modes.c		optional drm2
 dev/drm2/drm_pci.c		optional drm2
 dev/drm2/drm_platform.c		optional drm2
 dev/drm2/drm_scatter.c		optional drm2
 dev/drm2/drm_stub.c		optional drm2
 dev/drm2/drm_sysctl.c		optional drm2
 dev/drm2/drm_vm.c		optional drm2
 dev/drm2/drm_os_freebsd.c	optional drm2
 dev/drm2/ttm/ttm_agp_backend.c	optional drm2
 dev/drm2/ttm/ttm_lock.c		optional drm2
 dev/drm2/ttm/ttm_object.c	optional drm2
 dev/drm2/ttm/ttm_tt.c		optional drm2
 dev/drm2/ttm/ttm_bo_util.c	optional drm2
 dev/drm2/ttm/ttm_bo.c		optional drm2
 dev/drm2/ttm/ttm_bo_manager.c	optional drm2
 dev/drm2/ttm/ttm_execbuf_util.c	optional drm2
 dev/drm2/ttm/ttm_memory.c	optional drm2
 dev/drm2/ttm/ttm_page_alloc.c	optional drm2
 dev/drm2/ttm/ttm_bo_vm.c	optional drm2
 dev/drm2/ati_pcigart.c		optional drm2 agp pci
 dev/ed/if_ed.c			optional ed
 dev/ed/if_ed_novell.c		optional ed
 dev/ed/if_ed_rtl80x9.c		optional ed
 dev/ed/if_ed_pccard.c		optional ed pccard
 dev/ed/if_ed_pci.c		optional ed pci
 dev/efidev/efidev.c		optional efirt
 dev/e1000/if_em.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/em_txrx.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/igb_txrx.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_80003es2lan.c	optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_82540.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_82541.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_82542.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_82543.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_82571.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_82575.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_ich8lan.c	optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_i210.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_api.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_mac.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_manage.c	optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_nvm.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_phy.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_vf.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_mbx.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/e1000/e1000_osdep.c		optional em \
 	compile-with "${NORMAL_C} -I$S/dev/e1000"
 dev/et/if_et.c			optional et
 dev/en/if_en_pci.c		optional en pci
 dev/en/midway.c			optional en
 dev/ep/if_ep.c			optional ep
 dev/ep/if_ep_isa.c		optional ep isa
 dev/ep/if_ep_pccard.c		optional ep pccard
 dev/esp/esp_pci.c		optional esp pci
 dev/esp/ncr53c9x.c		optional esp
 dev/etherswitch/arswitch/arswitch.c		optional arswitch
 dev/etherswitch/arswitch/arswitch_reg.c		optional arswitch
 dev/etherswitch/arswitch/arswitch_phy.c		optional arswitch
 dev/etherswitch/arswitch/arswitch_8216.c	optional arswitch
 dev/etherswitch/arswitch/arswitch_8226.c	optional arswitch
 dev/etherswitch/arswitch/arswitch_8316.c	optional arswitch
 dev/etherswitch/arswitch/arswitch_8327.c	optional arswitch
 dev/etherswitch/arswitch/arswitch_7240.c	optional arswitch
 dev/etherswitch/arswitch/arswitch_9340.c	optional arswitch
 dev/etherswitch/arswitch/arswitch_vlans.c	optional arswitch
 dev/etherswitch/etherswitch.c		optional etherswitch
 dev/etherswitch/etherswitch_if.m	optional etherswitch
 dev/etherswitch/ip17x/ip17x.c		optional ip17x
 dev/etherswitch/ip17x/ip175c.c		optional ip17x
 dev/etherswitch/ip17x/ip175d.c		optional ip17x
 dev/etherswitch/ip17x/ip17x_phy.c	optional ip17x
 dev/etherswitch/ip17x/ip17x_vlans.c	optional ip17x
 dev/etherswitch/miiproxy.c		optional miiproxy
 dev/etherswitch/rtl8366/rtl8366rb.c	optional rtl8366rb
 dev/etherswitch/e6000sw/e6000sw.c	optional e6000sw
 dev/etherswitch/ukswitch/ukswitch.c	optional ukswitch
 dev/evdev/cdev.c			optional evdev
 dev/evdev/evdev.c			optional evdev
 dev/evdev/evdev_mt.c			optional evdev
 dev/evdev/evdev_utils.c			optional evdev
 dev/evdev/uinput.c			optional evdev uinput
 dev/ex/if_ex.c			optional ex
 dev/ex/if_ex_isa.c		optional ex isa
 dev/ex/if_ex_pccard.c		optional ex pccard
 dev/exca/exca.c			optional cbb
 dev/extres/clk/clk.c		optional ext_resources clk fdt
 dev/extres/clk/clkdev_if.m	optional ext_resources clk fdt
 dev/extres/clk/clknode_if.m	optional ext_resources clk fdt
 dev/extres/clk/clk_bus.c	optional ext_resources clk fdt
 dev/extres/clk/clk_div.c	optional ext_resources clk fdt
 dev/extres/clk/clk_fixed.c	optional ext_resources clk fdt
 dev/extres/clk/clk_gate.c	optional ext_resources clk fdt
 dev/extres/clk/clk_mux.c	optional ext_resources clk fdt
 dev/extres/phy/phy.c		optional ext_resources phy fdt
 dev/extres/phy/phy_if.m		optional ext_resources phy fdt
 dev/extres/hwreset/hwreset.c	optional ext_resources hwreset fdt
 dev/extres/hwreset/hwreset_if.m	optional ext_resources hwreset fdt
 dev/extres/regulator/regdev_if.m	optional ext_resources regulator fdt
 dev/extres/regulator/regnode_if.m	optional ext_resources regulator fdt
 dev/extres/regulator/regulator.c	optional ext_resources regulator fdt
 dev/extres/regulator/regulator_bus.c	optional ext_resources regulator fdt
 dev/extres/regulator/regulator_fixed.c	optional ext_resources regulator fdt
 dev/fatm/if_fatm.c		optional fatm pci
 dev/fb/fbd.c			optional fbd | vt
 dev/fb/fb_if.m			standard
 dev/fb/splash.c			optional sc splash
 dev/fdt/fdt_clock.c		optional fdt fdt_clock
 dev/fdt/fdt_clock_if.m		optional fdt fdt_clock
 dev/fdt/fdt_common.c		optional fdt
 dev/fdt/fdt_pinctrl.c		optional fdt fdt_pinctrl
 dev/fdt/fdt_pinctrl_if.m	optional fdt fdt_pinctrl
 dev/fdt/fdt_slicer.c		optional fdt cfi | fdt nand | fdt mx25l
 dev/fdt/fdt_static_dtb.S	optional fdt fdt_dtb_static \
 	dependency	"fdt_dtb_file"
 dev/fdt/simplebus.c		optional fdt
 dev/fe/if_fe.c			optional fe
 dev/fe/if_fe_pccard.c		optional fe pccard
 dev/filemon/filemon.c		optional filemon
 dev/firewire/firewire.c		optional firewire
 dev/firewire/fwcrom.c		optional firewire
 dev/firewire/fwdev.c		optional firewire
 dev/firewire/fwdma.c		optional firewire
 dev/firewire/fwmem.c		optional firewire
 dev/firewire/fwohci.c		optional firewire
 dev/firewire/fwohci_pci.c	optional firewire pci
 dev/firewire/if_fwe.c		optional fwe
 dev/firewire/if_fwip.c		optional fwip
 dev/firewire/sbp.c		optional sbp
 dev/firewire/sbp_targ.c		optional sbp_targ
 dev/flash/at45d.c		optional at45d
 dev/flash/mx25l.c		optional mx25l
 dev/fxp/if_fxp.c		optional fxp
 dev/fxp/inphy.c			optional fxp
 dev/gem/if_gem.c		optional gem
 dev/gem/if_gem_pci.c		optional gem pci
 dev/gem/if_gem_sbus.c		optional gem sbus
 dev/gpio/gpiobacklight.c	optional gpiobacklight fdt
 dev/gpio/gpiokeys.c		optional gpiokeys fdt
 dev/gpio/gpiokeys_codes.c	optional gpiokeys fdt
 dev/gpio/gpiobus.c		optional gpio				\
 	dependency	"gpiobus_if.h"
 dev/gpio/gpioc.c		optional gpio				\
 	dependency	"gpio_if.h"
 dev/gpio/gpioiic.c		optional gpioiic
 dev/gpio/gpioled.c		optional gpioled !fdt
 dev/gpio/gpioled_fdt.c		optional gpioled fdt
 dev/gpio/gpiopower.c		optional gpiopower fdt
 dev/gpio/gpioregulator.c	optional gpioregulator fdt ext_resources
 dev/gpio/gpiospi.c		optional gpiospi
 dev/gpio/gpioths.c		optional gpioths
 dev/gpio/gpio_if.m		optional gpio
 dev/gpio/gpiobus_if.m		optional gpio
 dev/gpio/gpiopps.c		optional gpiopps
 dev/gpio/ofw_gpiobus.c		optional fdt gpio
 dev/hatm/if_hatm.c		optional hatm pci
 dev/hatm/if_hatm_intr.c		optional hatm pci
 dev/hatm/if_hatm_ioctl.c	optional hatm pci
 dev/hatm/if_hatm_rx.c		optional hatm pci
 dev/hatm/if_hatm_tx.c		optional hatm pci
 dev/hifn/hifn7751.c		optional hifn
 dev/hme/if_hme.c		optional hme
 dev/hme/if_hme_pci.c		optional hme pci
 dev/hme/if_hme_sbus.c		optional hme sbus
 dev/hptiop/hptiop.c		optional hptiop scbus
 dev/hwpmc/hwpmc_logging.c	optional hwpmc
 dev/hwpmc/hwpmc_mod.c		optional hwpmc
 dev/hwpmc/hwpmc_soft.c		optional hwpmc
 dev/ichiic/ig4_acpi.c		optional ig4 acpi iicbus
 dev/ichiic/ig4_iic.c		optional ig4 iicbus
 dev/ichiic/ig4_pci.c		optional ig4 pci iicbus
 dev/ichsmb/ichsmb.c		optional ichsmb
 dev/ichsmb/ichsmb_pci.c		optional ichsmb pci
 dev/ida/ida.c			optional ida
 dev/ida/ida_disk.c		optional ida
 dev/ida/ida_pci.c		optional ida pci
 dev/iicbus/ad7418.c		optional ad7418
 dev/iicbus/ds1307.c		optional ds1307
 dev/iicbus/ds133x.c		optional ds133x
 dev/iicbus/ds1374.c		optional ds1374
 dev/iicbus/ds1672.c		optional ds1672
 dev/iicbus/ds3231.c		optional ds3231
 dev/iicbus/icee.c		optional icee
 dev/iicbus/if_ic.c		optional ic
 dev/iicbus/iic.c		optional iic
 dev/iicbus/iicbb.c		optional iicbb
 dev/iicbus/iicbb_if.m		optional iicbb
 dev/iicbus/iicbus.c		optional iicbus
 dev/iicbus/iicbus_if.m		optional iicbus
 dev/iicbus/iiconf.c		optional iicbus
 dev/iicbus/iicsmb.c		optional iicsmb				\
 	dependency	"iicbus_if.h"
 dev/iicbus/iicoc.c		optional iicoc
 dev/iicbus/lm75.c		optional lm75
 dev/iicbus/ofw_iicbus.c		optional fdt iicbus
 dev/iicbus/pcf8563.c		optional pcf8563
 dev/iicbus/s35390a.c		optional s35390a
 dev/iir/iir.c			optional iir
 dev/iir/iir_ctrl.c		optional iir
 dev/iir/iir_pci.c		optional iir pci
 dev/intpm/intpm.c		optional intpm pci
 # XXX Work around clang warning, until maintainer approves fix.
 dev/ips/ips.c			optional ips \
 	compile-with "${NORMAL_C} ${NO_WSOMETIMES_UNINITIALIZED}"
 dev/ips/ips_commands.c		optional ips
 dev/ips/ips_disk.c		optional ips
 dev/ips/ips_ioctl.c		optional ips
 dev/ips/ips_pci.c		optional ips pci
 dev/ipw/if_ipw.c		optional ipw
 ipwbssfw.c			optional ipwbssfw | ipwfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk ipw_bss.fw:ipw_bss:130 -lintel_ipw -mipw_bss -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"ipwbssfw.c"
 ipw_bss.fwo			optional ipwbssfw | ipwfw		\
 	dependency	"ipw_bss.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"ipw_bss.fwo"
 ipw_bss.fw			optional ipwbssfw | ipwfw		\
 	dependency	"$S/contrib/dev/ipw/ipw2100-1.3.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"ipw_bss.fw"
 ipwibssfw.c			optional ipwibssfw | ipwfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk ipw_ibss.fw:ipw_ibss:130 -lintel_ipw -mipw_ibss -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"ipwibssfw.c"
 ipw_ibss.fwo			optional ipwibssfw | ipwfw		\
 	dependency	"ipw_ibss.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"ipw_ibss.fwo"
 ipw_ibss.fw			optional ipwibssfw | ipwfw		\
 	dependency	"$S/contrib/dev/ipw/ipw2100-1.3-i.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"ipw_ibss.fw"
 ipwmonitorfw.c			optional ipwmonitorfw | ipwfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk ipw_monitor.fw:ipw_monitor:130 -lintel_ipw -mipw_monitor -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"ipwmonitorfw.c"
 ipw_monitor.fwo			optional ipwmonitorfw | ipwfw		\
 	dependency	"ipw_monitor.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"ipw_monitor.fwo"
 ipw_monitor.fw			optional ipwmonitorfw | ipwfw		\
 	dependency	"$S/contrib/dev/ipw/ipw2100-1.3-p.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"ipw_monitor.fw"
 dev/iscsi/icl.c			optional iscsi | ctl
 dev/iscsi/icl_conn_if.m		optional iscsi | ctl
 dev/iscsi/icl_soft.c		optional iscsi | ctl
 dev/iscsi/icl_soft_proxy.c	optional iscsi | ctl
 dev/iscsi/iscsi.c		optional iscsi scbus
 dev/iscsi_initiator/iscsi.c	optional iscsi_initiator scbus
 dev/iscsi_initiator/iscsi_subr.c	optional iscsi_initiator scbus
 dev/iscsi_initiator/isc_cam.c	optional iscsi_initiator scbus
 dev/iscsi_initiator/isc_soc.c	optional iscsi_initiator scbus
 dev/iscsi_initiator/isc_sm.c	optional iscsi_initiator scbus
 dev/iscsi_initiator/isc_subr.c	optional iscsi_initiator scbus
 dev/ismt/ismt.c			optional ismt
 dev/isl/isl.c			optional isl iicbus
 dev/isp/isp.c			optional isp
 dev/isp/isp_freebsd.c		optional isp
 dev/isp/isp_library.c		optional isp
 dev/isp/isp_pci.c		optional isp pci
 dev/isp/isp_sbus.c		optional isp sbus
 dev/isp/isp_target.c		optional isp
 dev/ispfw/ispfw.c		optional ispfw
 dev/iwi/if_iwi.c		optional iwi
 iwibssfw.c			optional iwibssfw | iwifw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwi_bss.fw:iwi_bss:300 -lintel_iwi -miwi_bss -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwibssfw.c"
 iwi_bss.fwo			optional iwibssfw | iwifw		\
 	dependency	"iwi_bss.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwi_bss.fwo"
 iwi_bss.fw			optional iwibssfw | iwifw		\
 	dependency	"$S/contrib/dev/iwi/ipw2200-bss.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwi_bss.fw"
 iwiibssfw.c			optional iwiibssfw | iwifw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwi_ibss.fw:iwi_ibss:300 -lintel_iwi -miwi_ibss -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwiibssfw.c"
 iwi_ibss.fwo			optional iwiibssfw | iwifw		\
 	dependency	"iwi_ibss.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwi_ibss.fwo"
 iwi_ibss.fw			optional iwiibssfw | iwifw		\
 	dependency	"$S/contrib/dev/iwi/ipw2200-ibss.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwi_ibss.fw"
 iwimonitorfw.c			optional iwimonitorfw | iwifw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwi_monitor.fw:iwi_monitor:300 -lintel_iwi -miwi_monitor -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwimonitorfw.c"
 iwi_monitor.fwo			optional iwimonitorfw | iwifw		\
 	dependency	"iwi_monitor.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwi_monitor.fwo"
 iwi_monitor.fw			optional iwimonitorfw | iwifw		\
 	dependency	"$S/contrib/dev/iwi/ipw2200-sniffer.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwi_monitor.fw"
 dev/iwm/if_iwm.c		optional iwm
 dev/iwm/if_iwm_7000.c		optional iwm
 dev/iwm/if_iwm_8000.c		optional iwm
 dev/iwm/if_iwm_binding.c	optional iwm
+dev/iwm/if_iwm_fw.c		optional iwm
 dev/iwm/if_iwm_led.c		optional iwm
 dev/iwm/if_iwm_mac_ctxt.c	optional iwm
 dev/iwm/if_iwm_notif_wait.c	optional iwm
 dev/iwm/if_iwm_pcie_trans.c	optional iwm
 dev/iwm/if_iwm_phy_ctxt.c	optional iwm
 dev/iwm/if_iwm_phy_db.c		optional iwm
 dev/iwm/if_iwm_power.c		optional iwm
 dev/iwm/if_iwm_scan.c		optional iwm
 dev/iwm/if_iwm_time_event.c	optional iwm
 dev/iwm/if_iwm_util.c		optional iwm
 iwm3160fw.c			optional iwm3160fw | iwmfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwm3160.fw:iwm3160fw -miwm3160fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwm3160fw.c"
 iwm3160fw.fwo			optional iwm3160fw | iwmfw		\
 	dependency	"iwm3160.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwm3160fw.fwo"
 iwm3160.fw			optional iwm3160fw | iwmfw		\
 	dependency	"$S/contrib/dev/iwm/iwm-3160-17.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwm3160.fw"
 iwm7260fw.c			optional iwm7260fw | iwmfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwm7260.fw:iwm7260fw -miwm7260fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwm7260fw.c"
 iwm7260fw.fwo			optional iwm7260fw | iwmfw		\
 	dependency	"iwm7260.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwm7260fw.fwo"
 iwm7260.fw			optional iwm7260fw | iwmfw		\
 	dependency	"$S/contrib/dev/iwm/iwm-7260-17.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwm7260.fw"
 iwm7265fw.c			optional iwm7265fw | iwmfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwm7265.fw:iwm7265fw -miwm7265fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwm7265fw.c"
 iwm7265fw.fwo			optional iwm7265fw | iwmfw		\
 	dependency	"iwm7265.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwm7265fw.fwo"
 iwm7265.fw			optional iwm7265fw | iwmfw		\
 	dependency	"$S/contrib/dev/iwm/iwm-7265-17.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwm7265.fw"
 iwm7265Dfw.c			optional iwm7265Dfw | iwmfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwm7265D.fw:iwm7265Dfw -miwm7265Dfw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwm7265Dfw.c"
 iwm7265Dfw.fwo			optional iwm7265Dfw | iwmfw		\
 	dependency	"iwm7265D.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwm7265Dfw.fwo"
 iwm7265D.fw			optional iwm7265Dfw | iwmfw		\
 	dependency	"$S/contrib/dev/iwm/iwm-7265D-17.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwm7265D.fw"
 iwm8000Cfw.c			optional iwm8000Cfw | iwmfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwm8000C.fw:iwm8000Cfw -miwm8000Cfw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwm8000Cfw.c"
 iwm8000Cfw.fwo			optional iwm8000Cfw | iwmfw		\
 	dependency	"iwm8000C.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwm8000Cfw.fwo"
 iwm8000C.fw			optional iwm8000Cfw | iwmfw		\
 	dependency	"$S/contrib/dev/iwm/iwm-8000C-16.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwm8000C.fw"
 dev/iwn/if_iwn.c		optional iwn
 iwn1000fw.c			optional iwn1000fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn1000.fw:iwn1000fw -miwn1000fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwn1000fw.c"
 iwn1000fw.fwo			optional iwn1000fw | iwnfw		\
 	dependency	"iwn1000.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn1000fw.fwo"
 iwn1000.fw			optional iwn1000fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-1000-39.31.5.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn1000.fw"
 iwn100fw.c			optional iwn100fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn100.fw:iwn100fw -miwn100fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwn100fw.c"
 iwn100fw.fwo			optional iwn100fw | iwnfw		\
 	dependency	"iwn100.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn100fw.fwo"
 iwn100.fw			optional iwn100fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-100-39.31.5.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn100.fw"
 iwn105fw.c			optional iwn105fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn105.fw:iwn105fw -miwn105fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwn105fw.c"
 iwn105fw.fwo			optional iwn105fw | iwnfw		\
 	dependency	"iwn105.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn105fw.fwo"
 iwn105.fw			optional iwn105fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-105-6-18.168.6.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn105.fw"
 iwn135fw.c			optional iwn135fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn135.fw:iwn135fw -miwn135fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwn135fw.c"
 iwn135fw.fwo			optional iwn135fw | iwnfw		\
 	dependency	"iwn135.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn135fw.fwo"
 iwn135.fw			optional iwn135fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-135-6-18.168.6.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn135.fw"
 iwn2000fw.c			optional iwn2000fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn2000.fw:iwn2000fw -miwn2000fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwn2000fw.c"
 iwn2000fw.fwo			optional iwn2000fw | iwnfw		\
 	dependency	"iwn2000.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn2000fw.fwo"
 iwn2000.fw			optional iwn2000fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-2000-18.168.6.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn2000.fw"
 iwn2030fw.c			optional iwn2030fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn2030.fw:iwn2030fw -miwn2030fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwn2030fw.c"
 iwn2030fw.fwo			optional iwn2030fw | iwnfw		\
 	dependency	"iwn2030.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn2030fw.fwo"
 iwn2030.fw			optional iwn2030fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwnwifi-2030-18.168.6.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn2030.fw"
 iwn4965fw.c			optional iwn4965fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn4965.fw:iwn4965fw -miwn4965fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwn4965fw.c"
 iwn4965fw.fwo			optional iwn4965fw | iwnfw		\
 	dependency	"iwn4965.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn4965fw.fwo"
 iwn4965.fw			optional iwn4965fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-4965-228.61.2.24.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn4965.fw"
 iwn5000fw.c			optional iwn5000fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn5000.fw:iwn5000fw -miwn5000fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwn5000fw.c"
 iwn5000fw.fwo		optional iwn5000fw | iwnfw			\
 	dependency	"iwn5000.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn5000fw.fwo"
 iwn5000.fw			optional iwn5000fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-5000-8.83.5.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn5000.fw"
 iwn5150fw.c			optional iwn5150fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn5150.fw:iwn5150fw -miwn5150fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwn5150fw.c"
 iwn5150fw.fwo			optional iwn5150fw | iwnfw		\
 	dependency	"iwn5150.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn5150fw.fwo"
 iwn5150.fw			optional iwn5150fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-5150-8.24.2.2.fw.uu"\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn5150.fw"
 iwn6000fw.c			optional iwn6000fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn6000.fw:iwn6000fw -miwn6000fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwn6000fw.c"
 iwn6000fw.fwo			optional iwn6000fw | iwnfw		\
 	dependency	"iwn6000.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn6000fw.fwo"
 iwn6000.fw			optional iwn6000fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-6000-9.221.4.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn6000.fw"
 iwn6000g2afw.c			optional iwn6000g2afw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn6000g2a.fw:iwn6000g2afw -miwn6000g2afw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwn6000g2afw.c"
 iwn6000g2afw.fwo		optional iwn6000g2afw | iwnfw		\
 	dependency	"iwn6000g2a.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn6000g2afw.fwo"
 iwn6000g2a.fw			optional iwn6000g2afw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-6000g2a-18.168.6.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn6000g2a.fw"
 iwn6000g2bfw.c			optional iwn6000g2bfw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn6000g2b.fw:iwn6000g2bfw -miwn6000g2bfw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwn6000g2bfw.c"
 iwn6000g2bfw.fwo		optional iwn6000g2bfw | iwnfw		\
 	dependency	"iwn6000g2b.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn6000g2bfw.fwo"
 iwn6000g2b.fw			optional iwn6000g2bfw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-6000g2b-18.168.6.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn6000g2b.fw"
 iwn6050fw.c			optional iwn6050fw | iwnfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk iwn6050.fw:iwn6050fw -miwn6050fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"iwn6050fw.c"
 iwn6050fw.fwo			optional iwn6050fw | iwnfw		\
 	dependency	"iwn6050.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"iwn6050fw.fwo"
 iwn6050.fw			optional iwn6050fw | iwnfw		\
 	dependency	"$S/contrib/dev/iwn/iwlwifi-6050-41.28.5.1.fw.uu" \
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"iwn6050.fw"
 dev/ixgb/if_ixgb.c		optional ixgb
 dev/ixgb/ixgb_ee.c		optional ixgb
 dev/ixgb/ixgb_hw.c		optional ixgb
 dev/ixgbe/if_ix.c		optional ix inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe -DSMP"
 dev/ixgbe/if_ixv.c		optional ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe -DSMP"
 dev/ixgbe/ix_txrx.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_osdep.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_phy.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_api.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_common.c	optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_mbx.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_vf.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_82598.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_82599.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_x540.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_x550.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_dcb.c		optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_dcb_82598.c	optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/ixgbe/ixgbe_dcb_82599.c	optional ix inet | ixv inet \
 	compile-with "${NORMAL_C} -I$S/dev/ixgbe"
 dev/jedec_ts/jedec_ts.c		optional jedec_ts smbus
 dev/jme/if_jme.c		optional jme pci
 dev/joy/joy.c			optional joy
 dev/joy/joy_isa.c		optional joy isa
 dev/kbd/kbd.c			optional atkbd | pckbd | sc | ukbd | vt
 dev/kbdmux/kbdmux.c		optional kbdmux
 dev/ksyms/ksyms.c		optional ksyms
 dev/le/am7990.c			optional le
 dev/le/am79900.c		optional le
 dev/le/if_le_pci.c		optional le pci
 dev/le/lance.c			optional le
 dev/led/led.c			standard
 dev/lge/if_lge.c		optional lge
 dev/lmc/if_lmc.c		optional lmc
 dev/malo/if_malo.c		optional malo
 dev/malo/if_malohal.c		optional malo
 dev/malo/if_malo_pci.c		optional malo pci
 dev/mc146818/mc146818.c		optional mc146818
 dev/md/md.c			optional md
 dev/mdio/mdio_if.m		optional miiproxy | mdio
 dev/mdio/mdio.c			optional miiproxy | mdio
 dev/mem/memdev.c		optional mem
 dev/mem/memutil.c		optional mem
 dev/mfi/mfi.c			optional mfi
 dev/mfi/mfi_debug.c		optional mfi
 dev/mfi/mfi_pci.c		optional mfi pci
 dev/mfi/mfi_disk.c		optional mfi
 dev/mfi/mfi_syspd.c		optional mfi
 dev/mfi/mfi_tbolt.c		optional mfi
 dev/mfi/mfi_linux.c		optional mfi compat_linux
 dev/mfi/mfi_cam.c		optional mfip scbus
 dev/mii/acphy.c			optional miibus | acphy
 dev/mii/amphy.c			optional miibus | amphy
 dev/mii/atphy.c			optional miibus | atphy
 dev/mii/axphy.c			optional miibus | axphy
 dev/mii/bmtphy.c		optional miibus | bmtphy
 dev/mii/brgphy.c		optional miibus | brgphy
 dev/mii/ciphy.c			optional miibus | ciphy
 dev/mii/e1000phy.c		optional miibus | e1000phy
 dev/mii/gentbi.c		optional miibus | gentbi
 dev/mii/icsphy.c		optional miibus | icsphy
 dev/mii/ip1000phy.c		optional miibus | ip1000phy
 dev/mii/jmphy.c			optional miibus | jmphy
 dev/mii/lxtphy.c		optional miibus | lxtphy
 dev/mii/micphy.c		optional miibus fdt | micphy fdt
 dev/mii/mii.c			optional miibus | mii
 dev/mii/mii_bitbang.c		optional miibus | mii_bitbang
 dev/mii/mii_physubr.c		optional miibus | mii
 dev/mii/miibus_if.m		optional miibus | mii
 dev/mii/mlphy.c			optional miibus | mlphy
 dev/mii/nsgphy.c		optional miibus | nsgphy
 dev/mii/nsphy.c			optional miibus | nsphy
 dev/mii/nsphyter.c		optional miibus | nsphyter
 dev/mii/pnaphy.c		optional miibus | pnaphy
 dev/mii/qsphy.c			optional miibus | qsphy
 dev/mii/rdcphy.c		optional miibus | rdcphy
 dev/mii/rgephy.c		optional miibus | rgephy
 dev/mii/rlphy.c			optional miibus | rlphy
 dev/mii/rlswitch.c		optional rlswitch
 dev/mii/smcphy.c		optional miibus | smcphy
 dev/mii/smscphy.c		optional miibus | smscphy
 dev/mii/tdkphy.c		optional miibus | tdkphy
 dev/mii/tlphy.c			optional miibus | tlphy
 dev/mii/truephy.c		optional miibus | truephy
 dev/mii/ukphy.c			optional miibus | mii
 dev/mii/ukphy_subr.c		optional miibus | mii
 dev/mii/xmphy.c			optional miibus | xmphy
 dev/mk48txx/mk48txx.c		optional mk48txx
 dev/mlx/mlx.c			optional mlx
 dev/mlx/mlx_disk.c		optional mlx
 dev/mlx/mlx_pci.c		optional mlx pci
 dev/mly/mly.c			optional mly
 dev/mmc/mmc.c			optional mmc
 dev/mmc/mmcbr_if.m		standard
 dev/mmc/mmcbus_if.m		standard
 dev/mmc/mmcsd.c			optional mmcsd
 dev/mn/if_mn.c			optional mn pci
 dev/mpr/mpr.c			optional mpr
 dev/mpr/mpr_config.c		optional mpr
 # XXX Work around clang warning, until maintainer approves fix.
 dev/mpr/mpr_mapping.c		optional mpr \
 	compile-with "${NORMAL_C} ${NO_WSOMETIMES_UNINITIALIZED}"
 dev/mpr/mpr_pci.c		optional mpr pci
 dev/mpr/mpr_sas.c		optional mpr \
 	compile-with "${NORMAL_C} ${NO_WUNNEEDED_INTERNAL_DECL}"
 dev/mpr/mpr_sas_lsi.c		optional mpr
 dev/mpr/mpr_table.c		optional mpr
 dev/mpr/mpr_user.c		optional mpr
 dev/mps/mps.c			optional mps
 dev/mps/mps_config.c		optional mps
 # XXX Work around clang warning, until maintainer approves fix.
 dev/mps/mps_mapping.c		optional mps \
 	compile-with "${NORMAL_C} ${NO_WSOMETIMES_UNINITIALIZED}"
 dev/mps/mps_pci.c		optional mps pci
 dev/mps/mps_sas.c		optional mps \
 	compile-with "${NORMAL_C} ${NO_WUNNEEDED_INTERNAL_DECL}"
 dev/mps/mps_sas_lsi.c		optional mps
 dev/mps/mps_table.c		optional mps
 dev/mps/mps_user.c		optional mps
 dev/mpt/mpt.c			optional mpt
 dev/mpt/mpt_cam.c		optional mpt
 dev/mpt/mpt_debug.c		optional mpt
 dev/mpt/mpt_pci.c		optional mpt pci
 dev/mpt/mpt_raid.c		optional mpt
 dev/mpt/mpt_user.c		optional mpt
 dev/mrsas/mrsas.c		optional mrsas
 dev/mrsas/mrsas_cam.c		optional mrsas
 dev/mrsas/mrsas_ioctl.c		optional mrsas
 dev/mrsas/mrsas_fp.c		optional mrsas
 dev/msk/if_msk.c		optional msk
 dev/mvs/mvs.c			optional mvs
 dev/mvs/mvs_if.m		optional mvs
 dev/mvs/mvs_pci.c		optional mvs pci
 dev/mwl/if_mwl.c		optional mwl
 dev/mwl/if_mwl_pci.c		optional mwl pci
 dev/mwl/mwlhal.c		optional mwl
 mwlfw.c				optional mwlfw				\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk mw88W8363.fw:mw88W8363fw mwlboot.fw:mwlboot -mmwl -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"mwlfw.c"
 mw88W8363.fwo		optional mwlfw					\
 	dependency	"mw88W8363.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"mw88W8363.fwo"
 mw88W8363.fw		optional mwlfw					\
 	dependency	"$S/contrib/dev/mwl/mw88W8363.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"mw88W8363.fw"
 mwlboot.fwo		optional mwlfw					\
 	dependency	"mwlboot.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"mwlboot.fwo"
 mwlboot.fw		optional mwlfw					\
 	dependency	"$S/contrib/dev/mwl/mwlboot.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"mwlboot.fw"
 dev/mxge/if_mxge.c		optional mxge pci
 dev/mxge/mxge_eth_z8e.c		optional mxge pci
 dev/mxge/mxge_ethp_z8e.c	optional mxge pci
 dev/mxge/mxge_rss_eth_z8e.c	optional mxge pci
 dev/mxge/mxge_rss_ethp_z8e.c	optional mxge pci
 dev/my/if_my.c			optional my
 dev/nand/nand.c			optional nand
 dev/nand/nand_bbt.c		optional nand
 dev/nand/nand_cdev.c		optional nand
 dev/nand/nand_generic.c		optional nand
 dev/nand/nand_geom.c		optional nand
 dev/nand/nand_id.c		optional nand
 dev/nand/nandbus.c		optional nand
 dev/nand/nandbus_if.m		optional nand
 dev/nand/nand_if.m		optional nand
 dev/nand/nandsim.c		optional nandsim nand
 dev/nand/nandsim_chip.c		optional nandsim nand
 dev/nand/nandsim_ctrl.c		optional nandsim nand
 dev/nand/nandsim_log.c		optional nandsim nand
 dev/nand/nandsim_swap.c		optional nandsim nand
 dev/nand/nfc_if.m		optional nand
 dev/ncr/ncr.c			optional ncr pci
 dev/ncv/ncr53c500.c		optional ncv
 dev/ncv/ncr53c500_pccard.c	optional ncv pccard
 dev/netmap/if_ptnet.c		optional netmap inet
 dev/netmap/netmap.c		optional netmap
 dev/netmap/netmap_freebsd.c	optional netmap
 dev/netmap/netmap_generic.c	optional netmap
 dev/netmap/netmap_mbq.c		optional netmap
 dev/netmap/netmap_mem2.c	optional netmap
 dev/netmap/netmap_monitor.c	optional netmap
 dev/netmap/netmap_offloadings.c	optional netmap
 dev/netmap/netmap_pipe.c	optional netmap
 dev/netmap/netmap_pt.c		optional netmap
 dev/netmap/netmap_vale.c	optional netmap
 # compile-with "${NORMAL_C} -Wconversion -Wextra"
 dev/nfsmb/nfsmb.c		optional nfsmb pci
 dev/nge/if_nge.c		optional nge
 dev/nxge/if_nxge.c		optional nxge \
 	compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
 dev/nxge/xgehal/xgehal-device.c	optional nxge \
 	compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
 dev/nxge/xgehal/xgehal-mm.c	optional nxge
 dev/nxge/xgehal/xge-queue.c	optional nxge
 dev/nxge/xgehal/xgehal-driver.c	optional nxge \
 	compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
 dev/nxge/xgehal/xgehal-ring.c	optional nxge \
 	compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
 dev/nxge/xgehal/xgehal-channel.c	optional nxge \
 	compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
 dev/nxge/xgehal/xgehal-fifo.c	optional nxge \
 	compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
 dev/nxge/xgehal/xgehal-stats.c	optional nxge \
 	compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
 dev/nxge/xgehal/xgehal-config.c	optional nxge
 dev/nxge/xgehal/xgehal-mgmt.c	optional nxge \
 	compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
 dev/nmdm/nmdm.c			optional nmdm
 dev/nsp/nsp.c			optional nsp
 dev/nsp/nsp_pccard.c		optional nsp pccard
 dev/null/null.c			standard
 dev/oce/oce_hw.c		optional oce pci
 dev/oce/oce_if.c		optional oce pci
 dev/oce/oce_mbox.c		optional oce pci
 dev/oce/oce_queue.c		optional oce pci
 dev/oce/oce_sysctl.c		optional oce pci
 dev/oce/oce_util.c		optional oce pci
 dev/ofw/ofw_bus_if.m		optional fdt
 dev/ofw/ofw_bus_subr.c		optional fdt
 dev/ofw/ofw_cpu.c		optional fdt
 dev/ofw/ofw_fdt.c		optional fdt
 dev/ofw/ofw_if.m		optional fdt
 dev/ofw/ofw_subr.c		optional fdt
 dev/ofw/ofwbus.c		optional fdt
 dev/ofw/openfirm.c		optional fdt
 dev/ofw/openfirmio.c		optional fdt
 dev/ow/ow.c			optional ow				\
 	dependency	"owll_if.h"					\
 	dependency	"own_if.h"
 dev/ow/owll_if.m		optional ow
 dev/ow/own_if.m			optional ow
 dev/ow/ow_temp.c		optional ow_temp
 dev/ow/owc_gpiobus.c		optional owc gpio
 dev/patm/if_patm.c		optional patm pci
 dev/patm/if_patm_attach.c	optional patm pci
 dev/patm/if_patm_intr.c		optional patm pci
 dev/patm/if_patm_ioctl.c	optional patm pci
 dev/patm/if_patm_rtables.c	optional patm pci
 dev/patm/if_patm_rx.c		optional patm pci
 dev/patm/if_patm_tx.c		optional patm pci
 dev/pbio/pbio.c			optional pbio isa
 dev/pccard/card_if.m		standard
 dev/pccard/pccard.c		optional pccard
 dev/pccard/pccard_cis.c		optional pccard
 dev/pccard/pccard_cis_quirks.c	optional pccard
 dev/pccard/pccard_device.c	optional pccard
 dev/pccard/power_if.m		standard
 dev/pccbb/pccbb.c		optional cbb
 dev/pccbb/pccbb_isa.c		optional cbb isa
 dev/pccbb/pccbb_pci.c		optional cbb pci
 dev/pcf/pcf.c			optional pcf
 dev/pci/fixup_pci.c		optional pci
 dev/pci/hostb_pci.c		optional pci
 dev/pci/ignore_pci.c		optional pci
 dev/pci/isa_pci.c		optional pci isa
 dev/pci/pci.c			optional pci
 dev/pci/pci_if.m		standard
 dev/pci/pci_iov.c		optional pci pci_iov
 dev/pci/pci_iov_if.m		standard
 dev/pci/pci_iov_schema.c	optional pci pci_iov
 dev/pci/pci_pci.c		optional pci
 dev/pci/pci_subr.c		optional pci
 dev/pci/pci_user.c		optional pci
 dev/pci/pcib_if.m		standard
 dev/pci/pcib_support.c		standard
 dev/pci/vga_pci.c		optional pci
 dev/pcn/if_pcn.c		optional pcn pci
 dev/pdq/if_fpa.c		optional fpa pci
 dev/pdq/pdq.c			optional nowerror fpa pci
 dev/pdq/pdq_ifsubr.c		optional nowerror fpa pci
 dev/pms/freebsd/driver/ini/src/agtiapi.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sadisc.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/mpi.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/saframe.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sahw.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sainit.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/saint.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sampicmd.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sampirsp.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/saphy.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/saport.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sasata.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sasmp.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sassp.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/satimer.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/sautil.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sallsdk/spc/mpidebug.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/discovery/dm/dminit.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/discovery/dm/dmsmp.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/discovery/dm/dmdisc.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/discovery/dm/dmport.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/discovery/dm/dmtimer.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/discovery/dm/dmmisc.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sat/src/sminit.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sat/src/smmisc.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sat/src/smsat.c				optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sat/src/smsatcb.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sat/src/smsathw.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/sat/src/smtimer.c			optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdinit.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdmisc.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdesgl.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdport.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdint.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdioctl.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdhw.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/ossacmnapi.c	optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tddmcmnapi.c	optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdsmcmnapi.c	optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/common/tdtimers.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/sas/ini/itdio.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/sas/ini/itdcb.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/sas/ini/itdinit.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/sas/ini/itddisc.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/sata/host/sat.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/sata/host/ossasat.c	optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/pms/RefTisa/tisa/sassata/sata/host/sathw.c		optional pmspcv \
 	compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w"
 dev/ppbus/if_plip.c		optional plip
 dev/ppbus/immio.c		optional vpo
 dev/ppbus/lpbb.c		optional lpbb
 dev/ppbus/lpt.c			optional lpt
 dev/ppbus/pcfclock.c		optional pcfclock
 dev/ppbus/ppb_1284.c		optional ppbus
 dev/ppbus/ppb_base.c		optional ppbus
 dev/ppbus/ppb_msq.c		optional ppbus
 dev/ppbus/ppbconf.c		optional ppbus
 dev/ppbus/ppbus_if.m		optional ppbus
 dev/ppbus/ppi.c			optional ppi
 dev/ppbus/pps.c			optional pps
 dev/ppbus/vpo.c			optional vpo
 dev/ppbus/vpoio.c		optional vpo
 dev/ppc/ppc.c			optional ppc
 dev/ppc/ppc_acpi.c		optional ppc acpi
 dev/ppc/ppc_isa.c		optional ppc isa
 dev/ppc/ppc_pci.c		optional ppc pci
 dev/ppc/ppc_puc.c		optional ppc puc
 dev/proto/proto_bus_isa.c	optional proto acpi | proto isa
 dev/proto/proto_bus_pci.c	optional proto pci
 dev/proto/proto_busdma.c	optional proto
 dev/proto/proto_core.c		optional proto
 dev/pst/pst-iop.c		optional pst
 dev/pst/pst-pci.c		optional pst pci
 dev/pst/pst-raid.c		optional pst
 dev/pty/pty.c			optional pty
 dev/puc/puc.c			optional puc
 dev/puc/puc_cfg.c		optional puc
 dev/puc/puc_pccard.c		optional puc pccard
 dev/puc/puc_pci.c		optional puc pci
 dev/puc/pucdata.c		optional puc pci
 dev/quicc/quicc_core.c		optional quicc
 dev/ral/rt2560.c		optional ral
 dev/ral/rt2661.c		optional ral
 dev/ral/rt2860.c		optional ral
 dev/ral/if_ral_pci.c		optional ral pci
 rt2561fw.c			optional rt2561fw | ralfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rt2561.fw:rt2561fw -mrt2561 -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"rt2561fw.c"
 rt2561fw.fwo			optional rt2561fw | ralfw		\
 	dependency	"rt2561.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rt2561fw.fwo"
 rt2561.fw			optional rt2561fw | ralfw		\
 	dependency	"$S/contrib/dev/ral/rt2561.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rt2561.fw"
 rt2561sfw.c			optional rt2561sfw | ralfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rt2561s.fw:rt2561sfw -mrt2561s -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"rt2561sfw.c"
 rt2561sfw.fwo			optional rt2561sfw | ralfw		\
 	dependency	"rt2561s.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rt2561sfw.fwo"
 rt2561s.fw			optional rt2561sfw | ralfw		\
 	dependency	"$S/contrib/dev/ral/rt2561s.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rt2561s.fw"
 rt2661fw.c			optional rt2661fw | ralfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rt2661.fw:rt2661fw -mrt2661 -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"rt2661fw.c"
 rt2661fw.fwo			optional rt2661fw | ralfw		\
 	dependency	"rt2661.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rt2661fw.fwo"
 rt2661.fw			optional rt2661fw | ralfw		\
 	dependency	"$S/contrib/dev/ral/rt2661.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rt2661.fw"
 rt2860fw.c			optional rt2860fw | ralfw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rt2860.fw:rt2860fw -mrt2860 -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"rt2860fw.c"
 rt2860fw.fwo			optional rt2860fw | ralfw		\
 	dependency	"rt2860.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rt2860fw.fwo"
 rt2860.fw			optional rt2860fw | ralfw		\
 	dependency	"$S/contrib/dev/ral/rt2860.fw.uu"		\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rt2860.fw"
 dev/random/random_infra.c	optional random
 dev/random/random_harvestq.c	optional random
 dev/random/randomdev.c		optional random random_yarrow | \
 					 random !random_yarrow !random_loadable
 dev/random/yarrow.c		optional random random_yarrow
 dev/random/fortuna.c		optional random !random_yarrow !random_loadable
 dev/random/hash.c		optional random random_yarrow | \
 					 random !random_yarrow !random_loadable
 dev/rc/rc.c			optional rc
 dev/rccgpio/rccgpio.c		optional rccgpio gpio
 dev/re/if_re.c			optional re
 dev/rl/if_rl.c			optional rl pci
 dev/rndtest/rndtest.c		optional rndtest
 dev/rp/rp.c			optional rp
 dev/rp/rp_isa.c			optional rp isa
 dev/rp/rp_pci.c			optional rp pci
 #
 dev/rtwn/if_rtwn.c		optional rtwn
 dev/rtwn/if_rtwn_beacon.c	optional rtwn
 dev/rtwn/if_rtwn_calib.c	optional rtwn
 dev/rtwn/if_rtwn_cam.c		optional rtwn
 dev/rtwn/if_rtwn_efuse.c	optional rtwn
 dev/rtwn/if_rtwn_fw.c		optional rtwn
 dev/rtwn/if_rtwn_rx.c		optional rtwn
 dev/rtwn/if_rtwn_task.c		optional rtwn
 dev/rtwn/if_rtwn_tx.c		optional rtwn
 #
 dev/rtwn/pci/rtwn_pci_attach.c	optional rtwn_pci pci
 dev/rtwn/pci/rtwn_pci_reg.c	optional rtwn_pci pci
 dev/rtwn/pci/rtwn_pci_rx.c	optional rtwn_pci pci
 dev/rtwn/pci/rtwn_pci_tx.c	optional rtwn_pci pci
 #
 dev/rtwn/usb/rtwn_usb_attach.c	optional rtwn_usb
 dev/rtwn/usb/rtwn_usb_ep.c	optional rtwn_usb
 dev/rtwn/usb/rtwn_usb_reg.c	optional rtwn_usb
 dev/rtwn/usb/rtwn_usb_rx.c	optional rtwn_usb
 dev/rtwn/usb/rtwn_usb_tx.c	optional rtwn_usb
 # RTL8188E
 dev/rtwn/rtl8188e/r88e_beacon.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_calib.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_chan.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_fw.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_init.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_led.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_tx.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_rf.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_rom.c	optional rtwn
 dev/rtwn/rtl8188e/r88e_rx.c	optional rtwn
 dev/rtwn/rtl8188e/usb/r88eu_attach.c	optional rtwn_usb
 dev/rtwn/rtl8188e/usb/r88eu_init.c	optional rtwn_usb
 dev/rtwn/rtl8188e/usb/r88eu_rx.c	optional rtwn_usb
 # RTL8192C
 dev/rtwn/rtl8192c/r92c_attach.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_beacon.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_calib.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_chan.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_fw.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_init.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_llt.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_rf.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_rom.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_rx.c	optional rtwn
 dev/rtwn/rtl8192c/r92c_tx.c	optional rtwn
 dev/rtwn/rtl8192c/pci/r92ce_attach.c	optional rtwn_pci pci
 dev/rtwn/rtl8192c/pci/r92ce_calib.c	optional rtwn_pci pci
 dev/rtwn/rtl8192c/pci/r92ce_fw.c	optional rtwn_pci pci
 dev/rtwn/rtl8192c/pci/r92ce_init.c	optional rtwn_pci pci
 dev/rtwn/rtl8192c/pci/r92ce_led.c	optional rtwn_pci pci
 dev/rtwn/rtl8192c/pci/r92ce_rx.c	optional rtwn_pci pci
 dev/rtwn/rtl8192c/pci/r92ce_tx.c	optional rtwn_pci pci
 dev/rtwn/rtl8192c/usb/r92cu_attach.c	optional rtwn_usb
 dev/rtwn/rtl8192c/usb/r92cu_init.c	optional rtwn_usb
 dev/rtwn/rtl8192c/usb/r92cu_led.c	optional rtwn_usb
 dev/rtwn/rtl8192c/usb/r92cu_rx.c	optional rtwn_usb
 dev/rtwn/rtl8192c/usb/r92cu_tx.c	optional rtwn_usb
 # RTL8192E
 dev/rtwn/rtl8192e/r92e_chan.c	optional rtwn
 dev/rtwn/rtl8192e/r92e_fw.c	optional rtwn
 dev/rtwn/rtl8192e/r92e_init.c	optional rtwn
 dev/rtwn/rtl8192e/r92e_led.c	optional rtwn
 dev/rtwn/rtl8192e/r92e_rf.c	optional rtwn
 dev/rtwn/rtl8192e/r92e_rom.c	optional rtwn
 dev/rtwn/rtl8192e/r92e_rx.c	optional rtwn
 dev/rtwn/rtl8192e/usb/r92eu_attach.c	optional rtwn_usb
 dev/rtwn/rtl8192e/usb/r92eu_init.c	optional rtwn_usb
 # RTL8812A
 dev/rtwn/rtl8812a/r12a_beacon.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_calib.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_caps.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_chan.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_fw.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_init.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_led.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_rf.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_rom.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_rx.c	optional rtwn
 dev/rtwn/rtl8812a/r12a_tx.c	optional rtwn
 dev/rtwn/rtl8812a/usb/r12au_attach.c	optional rtwn_usb
 dev/rtwn/rtl8812a/usb/r12au_init.c	optional rtwn_usb
 dev/rtwn/rtl8812a/usb/r12au_rx.c	optional rtwn_usb
 dev/rtwn/rtl8812a/usb/r12au_tx.c	optional rtwn_usb
 # RTL8821A
 dev/rtwn/rtl8821a/r21a_beacon.c	optional rtwn
 dev/rtwn/rtl8821a/r21a_calib.c	optional rtwn
 dev/rtwn/rtl8821a/r21a_chan.c	optional rtwn
 dev/rtwn/rtl8821a/r21a_fw.c	optional rtwn
 dev/rtwn/rtl8821a/r21a_init.c	optional rtwn
 dev/rtwn/rtl8821a/r21a_led.c	optional rtwn
 dev/rtwn/rtl8821a/r21a_rom.c	optional rtwn
 dev/rtwn/rtl8821a/r21a_rx.c	optional rtwn
 dev/rtwn/rtl8821a/usb/r21au_attach.c	optional rtwn_usb
 dev/rtwn/rtl8821a/usb/r21au_dfs.c	optional rtwn_usb
 dev/rtwn/rtl8821a/usb/r21au_init.c	optional rtwn_usb
 rtwn-rtl8188eufw.c		optional rtwn-rtl8188eufw | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8188eufw.fw:rtwn-rtl8188eufw:111 -mrtwn-rtl8188eufw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"rtwn-rtl8188eufw.c"
 rtwn-rtl8188eufw.fwo		optional rtwn-rtl8188eufw | rtwnfw	\
 	dependency	"rtwn-rtl8188eufw.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8188eufw.fwo"
 rtwn-rtl8188eufw.fw		optional rtwn-rtl8188eufw | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8188eufw.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8188eufw.fw"
 rtwn-rtl8192cfwE.c		optional rtwn-rtl8192cfwE | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8192cfwE.fw:rtwn-rtl8192cfwE:111 -mrtwn-rtl8192cfwE -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"rtwn-rtl8192cfwE.c"
 rtwn-rtl8192cfwE.fwo		optional rtwn-rtl8192cfwE | rtwnfw	\
 	dependency	"rtwn-rtl8192cfwE.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwE.fwo"
 rtwn-rtl8192cfwE.fw		optional rtwn-rtl8192cfwE | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8192cfwE.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwE.fw"
 rtwn-rtl8192cfwE_B.c		optional rtwn-rtl8192cfwE_B | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8192cfwE_B.fw:rtwn-rtl8192cfwE_B:111 -mrtwn-rtl8192cfwE_B -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"rtwn-rtl8192cfwE_B.c"
 rtwn-rtl8192cfwE_B.fwo		optional rtwn-rtl8192cfwE_B | rtwnfw	\
 	dependency	"rtwn-rtl8192cfwE_B.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwE_B.fwo"
 rtwn-rtl8192cfwE_B.fw		optional rtwn-rtl8192cfwE_B | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8192cfwE_B.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwE_B.fw"
 rtwn-rtl8192cfwT.c		optional rtwn-rtl8192cfwT | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8192cfwT.fw:rtwn-rtl8192cfwT:111 -mrtwn-rtl8192cfwT -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"rtwn-rtl8192cfwT.c"
 rtwn-rtl8192cfwT.fwo		optional rtwn-rtl8192cfwT | rtwnfw	\
 	dependency	"rtwn-rtl8192cfwT.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwT.fwo"
 rtwn-rtl8192cfwT.fw		optional rtwn-rtl8192cfwT | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8192cfwT.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwT.fw"
 rtwn-rtl8192cfwU.c		optional rtwn-rtl8192cfwU | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8192cfwU.fw:rtwn-rtl8192cfwU:111 -mrtwn-rtl8192cfwU -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"rtwn-rtl8192cfwU.c"
 rtwn-rtl8192cfwU.fwo		optional rtwn-rtl8192cfwU | rtwnfw	\
 	dependency	"rtwn-rtl8192cfwU.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwU.fwo"
 rtwn-rtl8192cfwU.fw		optional rtwn-rtl8192cfwU | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8192cfwU.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8192cfwU.fw"
 rtwn-rtl8192eufw.c		optional rtwn-rtl8192eufw | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8192eufw.fw:rtwn-rtl8192eufw:111 -mrtwn-rtl8192eufw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"rtwn-rtl8192eufw.c"
 rtwn-rtl8192eufw.fwo		optional rtwn-rtl8192eufw | rtwnfw	\
 	dependency	"rtwn-rtl8192eufw.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8192eufw.fwo"
 rtwn-rtl8192eufw.fw		optional rtwn-rtl8192eufw | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8192eufw.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8192eufw.fw"
 rtwn-rtl8812aufw.c		optional rtwn-rtl8812aufw | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8812aufw.fw:rtwn-rtl8812aufw:111 -mrtwn-rtl8812aufw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"rtwn-rtl8812aufw.c"
 rtwn-rtl8812aufw.fwo		optional rtwn-rtl8812aufw | rtwnfw	\
 	dependency	"rtwn-rtl8812aufw.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8812aufw.fwo"
 rtwn-rtl8812aufw.fw		optional rtwn-rtl8812aufw | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8812aufw.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8812aufw.fw"
 rtwn-rtl8821aufw.c		optional rtwn-rtl8821aufw | rtwnfw	\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rtwn-rtl8821aufw.fw:rtwn-rtl8821aufw:111 -mrtwn-rtl8821aufw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"rtwn-rtl8821aufw.c"
 rtwn-rtl8821aufw.fwo		optional rtwn-rtl8821aufw | rtwnfw	\
 	dependency	"rtwn-rtl8821aufw.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rtwn-rtl8821aufw.fwo"
 rtwn-rtl8821aufw.fw		optional rtwn-rtl8821aufw | rtwnfw	\
 	dependency	"$S/contrib/dev/rtwn/rtwn-rtl8821aufw.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rtwn-rtl8821aufw.fw"
 dev/safe/safe.c			optional safe
 dev/scc/scc_if.m		optional scc
 dev/scc/scc_bfe_ebus.c		optional scc ebus
 dev/scc/scc_bfe_quicc.c		optional scc quicc
 dev/scc/scc_bfe_sbus.c		optional scc fhc | scc sbus
 dev/scc/scc_core.c		optional scc
 dev/scc/scc_dev_quicc.c		optional scc quicc
 dev/scc/scc_dev_sab82532.c	optional scc
 dev/scc/scc_dev_z8530.c		optional scc
 dev/sdhci/sdhci.c		optional sdhci
 dev/sdhci/sdhci_fdt_gpio.c	optional sdhci fdt gpio
 dev/sdhci/sdhci_if.m		optional sdhci
 dev/sdhci/sdhci_acpi.c		optional sdhci acpi
 dev/sdhci/sdhci_pci.c		optional sdhci pci
 dev/sf/if_sf.c			optional sf pci
 dev/sge/if_sge.c		optional sge pci
 dev/siba/siba_bwn.c		optional siba_bwn pci
 dev/siba/siba_core.c		optional siba_bwn pci
 dev/siis/siis.c			optional siis pci
 dev/sis/if_sis.c		optional sis pci
 dev/sk/if_sk.c			optional sk pci
 dev/smbus/smb.c			optional smb
 dev/smbus/smbconf.c		optional smbus
 dev/smbus/smbus.c		optional smbus
 dev/smbus/smbus_if.m		optional smbus
 dev/smc/if_smc.c		optional smc
 dev/smc/if_smc_fdt.c		optional smc fdt
 dev/sn/if_sn.c			optional sn
 dev/sn/if_sn_isa.c		optional sn isa
 dev/sn/if_sn_pccard.c		optional sn pccard
 dev/snp/snp.c			optional snp
 dev/sound/clone.c		optional sound
 dev/sound/unit.c		optional sound
 dev/sound/isa/ad1816.c		optional snd_ad1816 isa
 dev/sound/isa/ess.c		optional snd_ess isa
 dev/sound/isa/gusc.c		optional snd_gusc isa
 dev/sound/isa/mss.c		optional snd_mss isa
 dev/sound/isa/sb16.c		optional snd_sb16 isa
 dev/sound/isa/sb8.c		optional snd_sb8 isa
 dev/sound/isa/sbc.c		optional snd_sbc isa
 dev/sound/isa/sndbuf_dma.c	optional sound isa
 dev/sound/pci/als4000.c		optional snd_als4000 pci
 dev/sound/pci/atiixp.c		optional snd_atiixp pci
 dev/sound/pci/cmi.c		optional snd_cmi pci
 dev/sound/pci/cs4281.c		optional snd_cs4281 pci
 dev/sound/pci/csa.c		optional snd_csa pci
 dev/sound/pci/csapcm.c		optional snd_csa pci
 dev/sound/pci/ds1.c		optional snd_ds1 pci
 dev/sound/pci/emu10k1.c		optional snd_emu10k1 pci
 dev/sound/pci/emu10kx.c		optional snd_emu10kx pci
 dev/sound/pci/emu10kx-pcm.c	optional snd_emu10kx pci
 dev/sound/pci/emu10kx-midi.c	optional snd_emu10kx pci
 dev/sound/pci/envy24.c		optional snd_envy24 pci
 dev/sound/pci/envy24ht.c	optional snd_envy24ht pci
 dev/sound/pci/es137x.c		optional snd_es137x pci
 dev/sound/pci/fm801.c		optional snd_fm801 pci
 dev/sound/pci/ich.c		optional snd_ich pci
 dev/sound/pci/maestro.c		optional snd_maestro pci
 dev/sound/pci/maestro3.c	optional snd_maestro3 pci
 dev/sound/pci/neomagic.c	optional snd_neomagic pci
 dev/sound/pci/solo.c		optional snd_solo pci
 dev/sound/pci/spicds.c		optional snd_spicds pci
 dev/sound/pci/t4dwave.c		optional snd_t4dwave pci
 dev/sound/pci/via8233.c		optional snd_via8233 pci
 dev/sound/pci/via82c686.c	optional snd_via82c686 pci
 dev/sound/pci/vibes.c		optional snd_vibes pci
 dev/sound/pci/hda/hdaa.c	optional snd_hda pci
 dev/sound/pci/hda/hdaa_patches.c	optional snd_hda pci
 dev/sound/pci/hda/hdac.c	optional snd_hda pci
 dev/sound/pci/hda/hdac_if.m	optional snd_hda pci
 dev/sound/pci/hda/hdacc.c	optional snd_hda pci
 dev/sound/pci/hdspe.c		optional snd_hdspe pci
 dev/sound/pci/hdspe-pcm.c	optional snd_hdspe pci
 dev/sound/pcm/ac97.c		optional sound
 dev/sound/pcm/ac97_if.m		optional sound
 dev/sound/pcm/ac97_patch.c	optional sound
 dev/sound/pcm/buffer.c		optional sound	\
 	dependency	"snd_fxdiv_gen.h"
 dev/sound/pcm/channel.c		optional sound
 dev/sound/pcm/channel_if.m	optional sound
 dev/sound/pcm/dsp.c		optional sound
 dev/sound/pcm/feeder.c		optional sound
 dev/sound/pcm/feeder_chain.c	optional sound
 dev/sound/pcm/feeder_eq.c	optional sound	\
 	dependency	"feeder_eq_gen.h"	\
 	dependency	"snd_fxdiv_gen.h"
 dev/sound/pcm/feeder_if.m	optional sound
 dev/sound/pcm/feeder_format.c	optional sound  \
 	dependency	"snd_fxdiv_gen.h"
 dev/sound/pcm/feeder_matrix.c	optional sound  \
 	dependency	"snd_fxdiv_gen.h"
 dev/sound/pcm/feeder_mixer.c	optional sound  \
 	dependency	"snd_fxdiv_gen.h"
 dev/sound/pcm/feeder_rate.c	optional sound	\
 	dependency	"feeder_rate_gen.h"	\
 	dependency	"snd_fxdiv_gen.h"
 dev/sound/pcm/feeder_volume.c	optional sound  \
 	dependency	"snd_fxdiv_gen.h"
 dev/sound/pcm/mixer.c		optional sound
 dev/sound/pcm/mixer_if.m	optional sound
 dev/sound/pcm/sndstat.c		optional sound
 dev/sound/pcm/sound.c		optional sound
 dev/sound/pcm/vchan.c		optional sound
 dev/sound/usb/uaudio.c		optional snd_uaudio usb
 dev/sound/usb/uaudio_pcm.c	optional snd_uaudio usb
 dev/sound/midi/midi.c		optional sound
 dev/sound/midi/mpu401.c		optional sound
 dev/sound/midi/mpu_if.m		optional sound
 dev/sound/midi/mpufoi_if.m	optional sound
 dev/sound/midi/sequencer.c	optional sound
 dev/sound/midi/synth_if.m	optional sound
 dev/spibus/ofw_spibus.c		optional fdt spibus
 dev/spibus/spibus.c		optional spibus				\
 	dependency	"spibus_if.h"
 dev/spibus/spigen.c		optional spigen
 dev/spibus/spibus_if.m		optional spibus
 dev/ste/if_ste.c		optional ste pci
 dev/stg/tmc18c30.c		optional stg
 dev/stg/tmc18c30_isa.c		optional stg isa
 dev/stg/tmc18c30_pccard.c	optional stg pccard
 dev/stg/tmc18c30_pci.c		optional stg pci
 dev/stg/tmc18c30_subr.c		optional stg
 dev/stge/if_stge.c		optional stge
 dev/streams/streams.c		optional streams
 dev/sym/sym_hipd.c		optional sym				\
 	dependency	"$S/dev/sym/sym_{conf,defs}.h"
 dev/syscons/blank/blank_saver.c	optional blank_saver
 dev/syscons/daemon/daemon_saver.c optional daemon_saver
 dev/syscons/dragon/dragon_saver.c optional dragon_saver
 dev/syscons/fade/fade_saver.c	optional fade_saver
 dev/syscons/fire/fire_saver.c	optional fire_saver
 dev/syscons/green/green_saver.c	optional green_saver
 dev/syscons/logo/logo.c		optional logo_saver
 dev/syscons/logo/logo_saver.c	optional logo_saver
 dev/syscons/rain/rain_saver.c	optional rain_saver
 dev/syscons/schistory.c		optional sc
 dev/syscons/scmouse.c		optional sc
 dev/syscons/scterm.c		optional sc
 dev/syscons/scvidctl.c		optional sc
 dev/syscons/snake/snake_saver.c	optional snake_saver
 dev/syscons/star/star_saver.c	optional star_saver
 dev/syscons/syscons.c		optional sc
 dev/syscons/sysmouse.c		optional sc
 dev/syscons/warp/warp_saver.c	optional warp_saver
 dev/tdfx/tdfx_linux.c		optional tdfx_linux tdfx compat_linux
 dev/tdfx/tdfx_pci.c		optional tdfx pci
 dev/ti/if_ti.c			optional ti pci
 dev/tl/if_tl.c			optional tl pci
 dev/trm/trm.c			optional trm
 dev/twa/tw_cl_init.c		optional twa \
 	compile-with "${NORMAL_C} -I$S/dev/twa"
 dev/twa/tw_cl_intr.c		optional twa \
 	compile-with "${NORMAL_C} -I$S/dev/twa"
 dev/twa/tw_cl_io.c		optional twa \
 	compile-with "${NORMAL_C} -I$S/dev/twa"
 dev/twa/tw_cl_misc.c		optional twa \
 	compile-with "${NORMAL_C} -I$S/dev/twa"
 dev/twa/tw_osl_cam.c		optional twa \
 	compile-with "${NORMAL_C} -I$S/dev/twa"
 dev/twa/tw_osl_freebsd.c	optional twa \
 	compile-with "${NORMAL_C} -I$S/dev/twa"
 dev/twe/twe.c			optional twe
 dev/twe/twe_freebsd.c		optional twe
 dev/tws/tws.c			optional tws
 dev/tws/tws_cam.c		optional tws
 dev/tws/tws_hdm.c		optional tws
 dev/tws/tws_services.c		optional tws
 dev/tws/tws_user.c		optional tws
 dev/tx/if_tx.c			optional tx
 dev/txp/if_txp.c		optional txp
 dev/uart/uart_bus_acpi.c	optional uart acpi
 dev/uart/uart_bus_ebus.c	optional uart ebus
 dev/uart/uart_bus_fdt.c		optional uart fdt
 dev/uart/uart_bus_isa.c		optional uart isa
 dev/uart/uart_bus_pccard.c	optional uart pccard
 dev/uart/uart_bus_pci.c		optional uart pci
 dev/uart/uart_bus_puc.c		optional uart puc
 dev/uart/uart_bus_scc.c		optional uart scc
 dev/uart/uart_core.c		optional uart
 dev/uart/uart_dbg.c		optional uart gdb
 dev/uart/uart_dev_ns8250.c	optional uart uart_ns8250 | uart uart_snps
 dev/uart/uart_dev_pl011.c	optional uart pl011
 dev/uart/uart_dev_quicc.c	optional uart quicc
 dev/uart/uart_dev_sab82532.c	optional uart uart_sab82532
 dev/uart/uart_dev_sab82532.c	optional uart scc
 dev/uart/uart_dev_snps.c	optional uart uart_snps fdt
 dev/uart/uart_dev_z8530.c	optional uart uart_z8530
 dev/uart/uart_dev_z8530.c	optional uart scc
 dev/uart/uart_if.m		optional uart
 dev/uart/uart_subr.c		optional uart
 dev/uart/uart_tty.c		optional uart
 dev/ubsec/ubsec.c		optional ubsec
 #
 # USB controller drivers
 #
 dev/usb/controller/at91dci.c		optional at91dci
 dev/usb/controller/at91dci_atmelarm.c	optional at91dci at91rm9200
 dev/usb/controller/musb_otg.c		optional musb
 dev/usb/controller/musb_otg_atmelarm.c	optional musb at91rm9200
 dev/usb/controller/dwc_otg.c		optional dwcotg
 dev/usb/controller/dwc_otg_fdt.c	optional dwcotg fdt
 dev/usb/controller/ehci.c		optional ehci
 dev/usb/controller/ehci_pci.c		optional ehci pci
 dev/usb/controller/ohci.c		optional ohci
 dev/usb/controller/ohci_pci.c		optional ohci pci
 dev/usb/controller/uhci.c		optional uhci
 dev/usb/controller/uhci_pci.c		optional uhci pci
 dev/usb/controller/xhci.c		optional xhci
 dev/usb/controller/xhci_pci.c		optional xhci pci
 dev/usb/controller/saf1761_otg.c	optional saf1761otg
 dev/usb/controller/saf1761_otg_fdt.c	optional saf1761otg fdt
 dev/usb/controller/uss820dci.c		optional uss820dci
 dev/usb/controller/uss820dci_atmelarm.c	optional uss820dci at91rm9200
 dev/usb/controller/usb_controller.c	optional usb
 #
 # USB storage drivers
 #
 dev/usb/storage/cfumass.c	optional cfumass ctl
 dev/usb/storage/umass.c		optional umass
 dev/usb/storage/urio.c		optional urio
 dev/usb/storage/ustorage_fs.c	optional usfs
 #
 # USB core
 #
 dev/usb/usb_busdma.c		optional usb
 dev/usb/usb_core.c		optional usb
 dev/usb/usb_debug.c		optional usb
 dev/usb/usb_dev.c		optional usb
 dev/usb/usb_device.c		optional usb
 dev/usb/usb_dynamic.c		optional usb
 dev/usb/usb_error.c		optional usb
 dev/usb/usb_generic.c		optional usb
 dev/usb/usb_handle_request.c	optional usb
 dev/usb/usb_hid.c		optional usb
 dev/usb/usb_hub.c		optional usb
 dev/usb/usb_if.m		optional usb
 dev/usb/usb_lookup.c		optional usb
 dev/usb/usb_mbuf.c		optional usb
 dev/usb/usb_msctest.c		optional usb
 dev/usb/usb_parse.c		optional usb
 dev/usb/usb_pf.c		optional usb
 dev/usb/usb_process.c		optional usb
 dev/usb/usb_request.c		optional usb
 dev/usb/usb_transfer.c		optional usb
 dev/usb/usb_util.c		optional usb
 #
 # USB network drivers
 #
 dev/usb/net/if_aue.c		optional aue
 dev/usb/net/if_axe.c		optional axe
 dev/usb/net/if_axge.c		optional axge
 dev/usb/net/if_cdce.c		optional cdce
 dev/usb/net/if_cue.c		optional cue
 dev/usb/net/if_ipheth.c		optional ipheth
 dev/usb/net/if_kue.c		optional kue
 dev/usb/net/if_mos.c		optional mos
 dev/usb/net/if_rue.c		optional rue
 dev/usb/net/if_smsc.c		optional smsc
 dev/usb/net/if_udav.c		optional udav
 dev/usb/net/if_ure.c		optional ure
 dev/usb/net/if_usie.c		optional usie
 dev/usb/net/if_urndis.c		optional urndis
 dev/usb/net/ruephy.c		optional rue
 dev/usb/net/usb_ethernet.c	optional uether | aue | axe | axge | cdce | \
 					 cue | ipheth | kue | mos | rue | \
 					 smsc | udav | ure | urndis
 dev/usb/net/uhso.c		optional uhso
 #
 # USB WLAN drivers
 #
 dev/usb/wlan/if_rsu.c		optional rsu
 rsu-rtl8712fw.c			optional rsu-rtl8712fw | rsufw		\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk rsu-rtl8712fw.fw:rsu-rtl8712fw:120 -mrsu-rtl8712fw -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"rsu-rtl8712fw.c"
 rsu-rtl8712fw.fwo		optional rsu-rtl8712fw | rsufw		\
 	dependency	"rsu-rtl8712fw.fw"				\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"rsu-rtl8712fw.fwo"
 rsu-rtl8712fw.fw		optional rsu-rtl8712.fw | rsufw		\
 	dependency	"$S/contrib/dev/rsu/rsu-rtl8712fw.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"rsu-rtl8712fw.fw"
 dev/usb/wlan/if_rum.c		optional rum
 dev/usb/wlan/if_run.c		optional run
 runfw.c				optional runfw							\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk run.fw:runfw -mrunfw -c${.TARGET}"	\
 	no-implicit-rule before-depend local							\
 	clean		"runfw.c"
 runfw.fwo			optional runfw							\
 	dependency	"run.fw"								\
 	compile-with	"${NORMAL_FWO}"								\
 	no-implicit-rule									\
 	clean		"runfw.fwo"
 run.fw				optional runfw							\
 	dependency	"$S/contrib/dev/run/rt2870.fw.uu"					\
 	compile-with	"${NORMAL_FW}"								\
 	no-obj no-implicit-rule									\
 	clean		"run.fw"
 dev/usb/wlan/if_uath.c		optional uath
 dev/usb/wlan/if_upgt.c		optional upgt
 dev/usb/wlan/if_ural.c		optional ural
 dev/usb/wlan/if_urtw.c		optional urtw
 dev/usb/wlan/if_zyd.c		optional zyd
 #
 # USB serial and parallel port drivers
 #
 dev/usb/serial/u3g.c		optional u3g
 dev/usb/serial/uark.c		optional uark
 dev/usb/serial/ubsa.c		optional ubsa
 dev/usb/serial/ubser.c		optional ubser
 dev/usb/serial/uchcom.c		optional uchcom
 dev/usb/serial/ucycom.c		optional ucycom
 dev/usb/serial/ufoma.c		optional ufoma
 dev/usb/serial/uftdi.c		optional uftdi
 dev/usb/serial/ugensa.c		optional ugensa
 dev/usb/serial/uipaq.c		optional uipaq
 dev/usb/serial/ulpt.c		optional ulpt
 dev/usb/serial/umcs.c		optional umcs
 dev/usb/serial/umct.c		optional umct
 dev/usb/serial/umodem.c		optional umodem
 dev/usb/serial/umoscom.c	optional umoscom
 dev/usb/serial/uplcom.c		optional uplcom
 dev/usb/serial/uslcom.c		optional uslcom
 dev/usb/serial/uvisor.c		optional uvisor
 dev/usb/serial/uvscom.c		optional uvscom
 dev/usb/serial/usb_serial.c 	optional ucom | u3g | uark | ubsa | ubser | \
 					 uchcom | ucycom | ufoma | uftdi | \
 					 ugensa | uipaq | umcs | umct | \
 					 umodem | umoscom | uplcom | usie | \
 					 uslcom | uvisor | uvscom
 #
 # USB misc drivers
 #
 dev/usb/misc/ufm.c		optional ufm
 dev/usb/misc/udbp.c		optional udbp
 dev/usb/misc/ugold.c		optional ugold
 dev/usb/misc/uled.c		optional uled
 #
 # USB input drivers
 #
 dev/usb/input/atp.c		optional atp
 dev/usb/input/uep.c		optional uep
 dev/usb/input/uhid.c		optional uhid
 dev/usb/input/ukbd.c		optional ukbd
 dev/usb/input/ums.c		optional ums
 dev/usb/input/wsp.c		optional wsp
 #
 # USB quirks
 #
 dev/usb/quirk/usb_quirk.c	optional usb
 #
 # USB templates
 #
 dev/usb/template/usb_template.c		optional usb_template
 dev/usb/template/usb_template_audio.c	optional usb_template
 dev/usb/template/usb_template_cdce.c	optional usb_template
 dev/usb/template/usb_template_kbd.c	optional usb_template
 dev/usb/template/usb_template_modem.c	optional usb_template
 dev/usb/template/usb_template_mouse.c	optional usb_template
 dev/usb/template/usb_template_msc.c	optional usb_template
 dev/usb/template/usb_template_mtp.c	optional usb_template
 dev/usb/template/usb_template_phone.c	optional usb_template
 dev/usb/template/usb_template_serialnet.c	optional usb_template
 dev/usb/template/usb_template_midi.c	optional usb_template
 #
 # USB video drivers
 #
 dev/usb/video/udl.c			optional udl
 #
 # USB END
 #
 dev/videomode/videomode.c		optional videomode
 dev/videomode/edid.c			optional videomode
 dev/videomode/pickmode.c		optional videomode
 dev/videomode/vesagtf.c			optional videomode
 dev/utopia/idtphy.c		optional utopia
 dev/utopia/suni.c		optional utopia
 dev/utopia/utopia.c		optional utopia
 dev/vge/if_vge.c		optional vge
 dev/viapm/viapm.c		optional viapm pci
 dev/virtio/virtio.c			optional	virtio
 dev/virtio/virtqueue.c			optional	virtio
 dev/virtio/virtio_bus_if.m		optional	virtio
 dev/virtio/virtio_if.m			optional	virtio
 dev/virtio/pci/virtio_pci.c		optional	virtio_pci
 dev/virtio/mmio/virtio_mmio.c		optional	virtio_mmio fdt
 dev/virtio/mmio/virtio_mmio_if.m	optional	virtio_mmio fdt
 dev/virtio/network/if_vtnet.c		optional	vtnet
 dev/virtio/block/virtio_blk.c		optional	virtio_blk
 dev/virtio/balloon/virtio_balloon.c	optional	virtio_balloon
 dev/virtio/scsi/virtio_scsi.c		optional	virtio_scsi
 dev/virtio/random/virtio_random.c	optional	virtio_random
 dev/virtio/console/virtio_console.c	optional	virtio_console
 dev/vkbd/vkbd.c			optional vkbd
 dev/vr/if_vr.c			optional vr pci
 dev/vt/colors/vt_termcolors.c	optional vt
 dev/vt/font/vt_font_default.c	optional vt
 dev/vt/font/vt_mouse_cursor.c	optional vt
 dev/vt/hw/efifb/efifb.c		optional vt_efifb
 dev/vt/hw/fb/vt_fb.c		optional vt
 dev/vt/hw/vga/vt_vga.c		optional vt vt_vga
 dev/vt/logo/logo_freebsd.c	optional vt splash
 dev/vt/logo/logo_beastie.c	optional vt splash
 dev/vt/vt_buf.c			optional vt
 dev/vt/vt_consolectl.c		optional vt
 dev/vt/vt_core.c		optional vt
 dev/vt/vt_cpulogos.c		optional vt splash
 dev/vt/vt_font.c		optional vt
 dev/vt/vt_sysmouse.c		optional vt
 dev/vte/if_vte.c		optional vte pci
 dev/vx/if_vx.c			optional vx
 dev/vx/if_vx_pci.c		optional vx pci
 dev/vxge/vxge.c				optional vxge
 dev/vxge/vxgehal/vxgehal-ifmsg.c	optional vxge
 dev/vxge/vxgehal/vxgehal-mrpcim.c	optional vxge
 dev/vxge/vxgehal/vxge-queue.c		optional vxge
 dev/vxge/vxgehal/vxgehal-ring.c		optional vxge
 dev/vxge/vxgehal/vxgehal-swapper.c	optional vxge
 dev/vxge/vxgehal/vxgehal-mgmt.c		optional vxge
 dev/vxge/vxgehal/vxgehal-srpcim.c	optional vxge
 dev/vxge/vxgehal/vxgehal-config.c	optional vxge
 dev/vxge/vxgehal/vxgehal-blockpool.c	optional vxge
 dev/vxge/vxgehal/vxgehal-doorbells.c	optional vxge
 dev/vxge/vxgehal/vxgehal-mgmtaux.c	optional vxge
 dev/vxge/vxgehal/vxgehal-device.c	optional vxge
 dev/vxge/vxgehal/vxgehal-mm.c		optional vxge
 dev/vxge/vxgehal/vxgehal-driver.c	optional vxge
 dev/vxge/vxgehal/vxgehal-virtualpath.c	optional vxge
 dev/vxge/vxgehal/vxgehal-channel.c	optional vxge
 dev/vxge/vxgehal/vxgehal-fifo.c		optional vxge
 dev/watchdog/watchdog.c		standard
 dev/wb/if_wb.c			optional wb pci
 dev/wi/if_wi.c			optional wi
 dev/wi/if_wi_pccard.c		optional wi pccard
 dev/wi/if_wi_pci.c		optional wi pci
 dev/wpi/if_wpi.c		optional wpi pci
 wpifw.c			optional wpifw					\
 	compile-with	"${AWK} -f $S/tools/fw_stub.awk wpi.fw:wpifw:153229 -mwpi -c${.TARGET}" \
 	no-implicit-rule before-depend local				\
 	clean		"wpifw.c"
 wpifw.fwo			optional wpifw				\
 	dependency	"wpi.fw"					\
 	compile-with	"${NORMAL_FWO}"					\
 	no-implicit-rule						\
 	clean		"wpifw.fwo"
 wpi.fw			optional wpifw					\
 	dependency	"$S/contrib/dev/wpi/iwlwifi-3945-15.32.2.9.fw.uu"	\
 	compile-with	"${NORMAL_FW}"					\
 	no-obj no-implicit-rule						\
 	clean		"wpi.fw"
 dev/xdma/xdma.c			optional xdma
 dev/xdma/xdma_if.m		optional xdma
 dev/xdma/xdma_fdt_test.c	optional xdma xdma_test fdt
 dev/xe/if_xe.c			optional xe
 dev/xe/if_xe_pccard.c		optional xe pccard
 dev/xen/balloon/balloon.c	optional xenhvm
 dev/xen/blkfront/blkfront.c	optional xenhvm
 dev/xen/blkback/blkback.c	optional xenhvm
 dev/xen/console/xen_console.c	optional xenhvm
 dev/xen/control/control.c	optional xenhvm
 dev/xen/grant_table/grant_table.c	optional xenhvm
 dev/xen/netback/netback.c	optional xenhvm
 dev/xen/netfront/netfront.c	optional xenhvm
 dev/xen/xenpci/xenpci.c		optional xenpci
 dev/xen/timer/timer.c		optional xenhvm
 dev/xen/pvcpu/pvcpu.c		optional xenhvm
 dev/xen/xenstore/xenstore.c	optional xenhvm
 dev/xen/xenstore/xenstore_dev.c	optional xenhvm
 dev/xen/xenstore/xenstored_dev.c	optional xenhvm
 dev/xen/evtchn/evtchn_dev.c	optional xenhvm
 dev/xen/privcmd/privcmd.c	optional xenhvm
 dev/xen/gntdev/gntdev.c		optional xenhvm
 dev/xen/debug/debug.c		optional xenhvm
 dev/xl/if_xl.c			optional xl pci
 dev/xl/xlphy.c			optional xl pci
 fs/autofs/autofs.c		optional autofs
 fs/autofs/autofs_vfsops.c	optional autofs
 fs/autofs/autofs_vnops.c	optional autofs
 fs/deadfs/dead_vnops.c		standard
 fs/devfs/devfs_devs.c		standard
 fs/devfs/devfs_dir.c		standard
 fs/devfs/devfs_rule.c		standard
 fs/devfs/devfs_vfsops.c		standard
 fs/devfs/devfs_vnops.c		standard
 fs/fdescfs/fdesc_vfsops.c	optional fdescfs
 fs/fdescfs/fdesc_vnops.c	optional fdescfs
 fs/fifofs/fifo_vnops.c		standard
 fs/cuse/cuse.c			optional cuse
 fs/fuse/fuse_device.c		optional fuse
 fs/fuse/fuse_file.c		optional fuse
 fs/fuse/fuse_internal.c		optional fuse
 fs/fuse/fuse_io.c		optional fuse
 fs/fuse/fuse_ipc.c		optional fuse
 fs/fuse/fuse_main.c		optional fuse
 fs/fuse/fuse_node.c		optional fuse
 fs/fuse/fuse_vfsops.c		optional fuse
 fs/fuse/fuse_vnops.c		optional fuse
 fs/msdosfs/msdosfs_conv.c	optional msdosfs
 fs/msdosfs/msdosfs_denode.c	optional msdosfs
 fs/msdosfs/msdosfs_fat.c	optional msdosfs
 fs/msdosfs/msdosfs_fileno.c	optional msdosfs
 fs/msdosfs/msdosfs_iconv.c	optional msdosfs_iconv
 fs/msdosfs/msdosfs_lookup.c	optional msdosfs
 fs/msdosfs/msdosfs_vfsops.c	optional msdosfs
 fs/msdosfs/msdosfs_vnops.c	optional msdosfs
 fs/nandfs/bmap.c		optional nandfs
 fs/nandfs/nandfs_alloc.c	optional nandfs
 fs/nandfs/nandfs_bmap.c		optional nandfs
 fs/nandfs/nandfs_buffer.c	optional nandfs
 fs/nandfs/nandfs_cleaner.c	optional nandfs
 fs/nandfs/nandfs_cpfile.c	optional nandfs
 fs/nandfs/nandfs_dat.c		optional nandfs
 fs/nandfs/nandfs_dir.c		optional nandfs
 fs/nandfs/nandfs_ifile.c	optional nandfs
 fs/nandfs/nandfs_segment.c	optional nandfs
 fs/nandfs/nandfs_subr.c		optional nandfs
 fs/nandfs/nandfs_sufile.c	optional nandfs
 fs/nandfs/nandfs_vfsops.c	optional nandfs
 fs/nandfs/nandfs_vnops.c	optional nandfs
 fs/nfs/nfs_commonkrpc.c		optional nfscl | nfsd
 fs/nfs/nfs_commonsubs.c		optional nfscl | nfsd
 fs/nfs/nfs_commonport.c		optional nfscl | nfsd
 fs/nfs/nfs_commonacl.c		optional nfscl | nfsd
 fs/nfsclient/nfs_clcomsubs.c	optional nfscl
 fs/nfsclient/nfs_clsubs.c	optional nfscl
 fs/nfsclient/nfs_clstate.c	optional nfscl
 fs/nfsclient/nfs_clkrpc.c	optional nfscl
 fs/nfsclient/nfs_clrpcops.c	optional nfscl
 fs/nfsclient/nfs_clvnops.c	optional nfscl
 fs/nfsclient/nfs_clnode.c	optional nfscl
 fs/nfsclient/nfs_clvfsops.c	optional nfscl
 fs/nfsclient/nfs_clport.c	optional nfscl
 fs/nfsclient/nfs_clbio.c	optional nfscl
 fs/nfsclient/nfs_clnfsiod.c	optional nfscl
 fs/nfsserver/nfs_fha_new.c	optional nfsd inet
 fs/nfsserver/nfs_nfsdsocket.c	optional nfsd inet
 fs/nfsserver/nfs_nfsdsubs.c	optional nfsd inet
 fs/nfsserver/nfs_nfsdstate.c	optional nfsd inet
 fs/nfsserver/nfs_nfsdkrpc.c	optional nfsd inet
 fs/nfsserver/nfs_nfsdserv.c	optional nfsd inet
 fs/nfsserver/nfs_nfsdport.c	optional nfsd inet
 fs/nfsserver/nfs_nfsdcache.c	optional nfsd inet
 fs/nullfs/null_subr.c		optional nullfs
 fs/nullfs/null_vfsops.c		optional nullfs
 fs/nullfs/null_vnops.c		optional nullfs
 fs/procfs/procfs.c		optional procfs
 fs/procfs/procfs_ctl.c		optional procfs
 fs/procfs/procfs_dbregs.c	optional procfs
 fs/procfs/procfs_fpregs.c	optional procfs
 fs/procfs/procfs_ioctl.c	optional procfs
 fs/procfs/procfs_map.c		optional procfs
 fs/procfs/procfs_mem.c		optional procfs
 fs/procfs/procfs_note.c		optional procfs
 fs/procfs/procfs_osrel.c	optional procfs
 fs/procfs/procfs_regs.c		optional procfs
 fs/procfs/procfs_rlimit.c	optional procfs
 fs/procfs/procfs_status.c	optional procfs
 fs/procfs/procfs_type.c		optional procfs
 fs/pseudofs/pseudofs.c		optional pseudofs
 fs/pseudofs/pseudofs_fileno.c	optional pseudofs
 fs/pseudofs/pseudofs_vncache.c	optional pseudofs
 fs/pseudofs/pseudofs_vnops.c	optional pseudofs
 fs/smbfs/smbfs_io.c		optional smbfs
 fs/smbfs/smbfs_node.c		optional smbfs
 fs/smbfs/smbfs_smb.c		optional smbfs
 fs/smbfs/smbfs_subr.c		optional smbfs
 fs/smbfs/smbfs_vfsops.c		optional smbfs
 fs/smbfs/smbfs_vnops.c		optional smbfs
 fs/udf/osta.c			optional udf
 fs/udf/udf_iconv.c		optional udf_iconv
 fs/udf/udf_vfsops.c		optional udf
 fs/udf/udf_vnops.c		optional udf
 fs/unionfs/union_subr.c		optional unionfs
 fs/unionfs/union_vfsops.c	optional unionfs
 fs/unionfs/union_vnops.c	optional unionfs
 fs/tmpfs/tmpfs_vnops.c		optional tmpfs
 fs/tmpfs/tmpfs_fifoops.c 	optional tmpfs
 fs/tmpfs/tmpfs_vfsops.c 	optional tmpfs
 fs/tmpfs/tmpfs_subr.c 		optional tmpfs
 gdb/gdb_cons.c			optional gdb
 gdb/gdb_main.c			optional gdb
 gdb/gdb_packet.c		optional gdb
 geom/bde/g_bde.c		optional geom_bde
 geom/bde/g_bde_crypt.c		optional geom_bde
 geom/bde/g_bde_lock.c		optional geom_bde
 geom/bde/g_bde_work.c		optional geom_bde
 geom/cache/g_cache.c		optional geom_cache
 geom/concat/g_concat.c		optional geom_concat
 geom/eli/g_eli.c		optional geom_eli
 geom/eli/g_eli_crypto.c		optional geom_eli
 geom/eli/g_eli_ctl.c		optional geom_eli
 geom/eli/g_eli_hmac.c		optional geom_eli
 geom/eli/g_eli_integrity.c	optional geom_eli
 geom/eli/g_eli_key.c		optional geom_eli
 geom/eli/g_eli_key_cache.c	optional geom_eli
 geom/eli/g_eli_privacy.c	optional geom_eli
 geom/eli/pkcs5v2.c		optional geom_eli
 geom/gate/g_gate.c		optional geom_gate
 geom/geom_aes.c			optional geom_aes
 geom/geom_bsd.c			optional geom_bsd
 geom/geom_bsd_enc.c		optional geom_bsd | geom_part_bsd
 geom/geom_ccd.c			optional ccd | geom_ccd
 geom/geom_ctl.c			standard
 geom/geom_dev.c			standard
 geom/geom_disk.c		standard
 geom/geom_dump.c		standard
 geom/geom_event.c		standard
 geom/geom_fox.c			optional geom_fox
 geom/geom_flashmap.c		optional fdt cfi | fdt nand | fdt mx25l
 geom/geom_io.c			standard
 geom/geom_kern.c		standard
 geom/geom_map.c			optional geom_map
 geom/geom_mbr.c			optional geom_mbr
 geom/geom_mbr_enc.c		optional geom_mbr
 geom/geom_redboot.c		optional geom_redboot
 geom/geom_slice.c		standard
 geom/geom_subr.c		standard
 geom/geom_sunlabel.c		optional geom_sunlabel
 geom/geom_sunlabel_enc.c	optional geom_sunlabel
 geom/geom_vfs.c			standard
 geom/geom_vol_ffs.c		optional geom_vol
 geom/journal/g_journal.c	optional geom_journal
 geom/journal/g_journal_ufs.c	optional geom_journal
 geom/label/g_label.c		optional geom_label | geom_label_gpt
 geom/label/g_label_ext2fs.c	optional geom_label
 geom/label/g_label_iso9660.c	optional geom_label
 geom/label/g_label_msdosfs.c	optional geom_label
 geom/label/g_label_ntfs.c	optional geom_label
 geom/label/g_label_reiserfs.c	optional geom_label
 geom/label/g_label_ufs.c	optional geom_label
 geom/label/g_label_gpt.c	optional geom_label | geom_label_gpt
 geom/label/g_label_disk_ident.c	optional geom_label
 geom/linux_lvm/g_linux_lvm.c	optional geom_linux_lvm
 geom/mirror/g_mirror.c		optional geom_mirror
 geom/mirror/g_mirror_ctl.c	optional geom_mirror
 geom/mountver/g_mountver.c	optional geom_mountver
 geom/multipath/g_multipath.c	optional geom_multipath
 geom/nop/g_nop.c		optional geom_nop
 geom/part/g_part.c		standard
 geom/part/g_part_if.m		standard
 geom/part/g_part_apm.c		optional geom_part_apm
 geom/part/g_part_bsd.c		optional geom_part_bsd
 geom/part/g_part_bsd64.c	optional geom_part_bsd64
 geom/part/g_part_ebr.c		optional geom_part_ebr
 geom/part/g_part_gpt.c		optional geom_part_gpt
 geom/part/g_part_ldm.c		optional geom_part_ldm
 geom/part/g_part_mbr.c		optional geom_part_mbr
 geom/part/g_part_vtoc8.c	optional geom_part_vtoc8
 geom/raid/g_raid.c		optional geom_raid
 geom/raid/g_raid_ctl.c		optional geom_raid
 geom/raid/g_raid_md_if.m	optional geom_raid
 geom/raid/g_raid_tr_if.m	optional geom_raid
 geom/raid/md_ddf.c		optional geom_raid
 geom/raid/md_intel.c		optional geom_raid
 geom/raid/md_jmicron.c		optional geom_raid
 geom/raid/md_nvidia.c		optional geom_raid
 geom/raid/md_promise.c		optional geom_raid
 geom/raid/md_sii.c		optional geom_raid
 geom/raid/tr_concat.c		optional geom_raid
 geom/raid/tr_raid0.c		optional geom_raid
 geom/raid/tr_raid1.c		optional geom_raid
 geom/raid/tr_raid1e.c		optional geom_raid
 geom/raid/tr_raid5.c		optional geom_raid
 geom/raid3/g_raid3.c		optional geom_raid3
 geom/raid3/g_raid3_ctl.c	optional geom_raid3
 geom/shsec/g_shsec.c		optional geom_shsec
 geom/stripe/g_stripe.c		optional geom_stripe
 contrib/xz-embedded/freebsd/xz_malloc.c	\
 	optional xz_embedded | geom_uzip \
 	compile-with "${NORMAL_C} -I$S/contrib/xz-embedded/freebsd/ -I$S/contrib/xz-embedded/linux/lib/xz/ -I$S/contrib/xz-embedded/linux/include/linux/"
 contrib/xz-embedded/linux/lib/xz/xz_crc32.c \
 	optional xz_embedded | geom_uzip \
 	compile-with "${NORMAL_C} -I$S/contrib/xz-embedded/freebsd/ -I$S/contrib/xz-embedded/linux/lib/xz/ -I$S/contrib/xz-embedded/linux/include/linux/"
 contrib/xz-embedded/linux/lib/xz/xz_dec_bcj.c \
 	optional xz_embedded | geom_uzip \
 	compile-with "${NORMAL_C} -I$S/contrib/xz-embedded/freebsd/ -I$S/contrib/xz-embedded/linux/lib/xz/ -I$S/contrib/xz-embedded/linux/include/linux/"
 contrib/xz-embedded/linux/lib/xz/xz_dec_lzma2.c \
 	optional xz_embedded | geom_uzip \
 	compile-with "${NORMAL_C} -I$S/contrib/xz-embedded/freebsd/ -I$S/contrib/xz-embedded/linux/lib/xz/ -I$S/contrib/xz-embedded/linux/include/linux/"
 contrib/xz-embedded/linux/lib/xz/xz_dec_stream.c \
 	optional xz_embedded | geom_uzip \
 	compile-with "${NORMAL_C} -I$S/contrib/xz-embedded/freebsd/ -I$S/contrib/xz-embedded/linux/lib/xz/ -I$S/contrib/xz-embedded/linux/include/linux/"
 geom/uzip/g_uzip.c		optional geom_uzip
 geom/uzip/g_uzip_lzma.c		optional geom_uzip
 geom/uzip/g_uzip_wrkthr.c	optional geom_uzip
 geom/uzip/g_uzip_zlib.c		optional geom_uzip
 geom/vinum/geom_vinum.c		optional geom_vinum
 geom/vinum/geom_vinum_create.c	optional geom_vinum
 geom/vinum/geom_vinum_drive.c	optional geom_vinum
 geom/vinum/geom_vinum_plex.c	optional geom_vinum
 geom/vinum/geom_vinum_volume.c	optional geom_vinum
 geom/vinum/geom_vinum_subr.c	optional geom_vinum
 geom/vinum/geom_vinum_raid5.c	optional geom_vinum
 geom/vinum/geom_vinum_share.c	optional geom_vinum
 geom/vinum/geom_vinum_list.c	optional geom_vinum
 geom/vinum/geom_vinum_rm.c	optional geom_vinum
 geom/vinum/geom_vinum_init.c	optional geom_vinum
 geom/vinum/geom_vinum_state.c	optional geom_vinum
 geom/vinum/geom_vinum_rename.c	optional geom_vinum
 geom/vinum/geom_vinum_move.c	optional geom_vinum
 geom/vinum/geom_vinum_events.c	optional geom_vinum
 geom/virstor/binstream.c	optional geom_virstor
 geom/virstor/g_virstor.c	optional geom_virstor
 geom/virstor/g_virstor_md.c	optional geom_virstor
 geom/zero/g_zero.c		optional geom_zero
 fs/ext2fs/ext2_alloc.c		optional ext2fs
 fs/ext2fs/ext2_balloc.c		optional ext2fs
 fs/ext2fs/ext2_bmap.c		optional ext2fs
 fs/ext2fs/ext2_extents.c	optional ext2fs
 fs/ext2fs/ext2_inode.c		optional ext2fs
 fs/ext2fs/ext2_inode_cnv.c	optional ext2fs
 fs/ext2fs/ext2_hash.c		optional ext2fs
 fs/ext2fs/ext2_htree.c		optional ext2fs
 fs/ext2fs/ext2_lookup.c		optional ext2fs
 fs/ext2fs/ext2_subr.c		optional ext2fs
 fs/ext2fs/ext2_vfsops.c		optional ext2fs
 fs/ext2fs/ext2_vnops.c		optional ext2fs
 #
 isa/isa_if.m			standard
 isa/isa_common.c		optional isa
 isa/isahint.c			optional isa
 isa/pnp.c			optional isa isapnp
 isa/pnpparse.c			optional isa isapnp
 fs/cd9660/cd9660_bmap.c	optional cd9660
 fs/cd9660/cd9660_lookup.c	optional cd9660
 fs/cd9660/cd9660_node.c	optional cd9660
 fs/cd9660/cd9660_rrip.c	optional cd9660
 fs/cd9660/cd9660_util.c	optional cd9660
 fs/cd9660/cd9660_vfsops.c	optional cd9660
 fs/cd9660/cd9660_vnops.c	optional cd9660
 fs/cd9660/cd9660_iconv.c	optional cd9660_iconv
 kern/bus_if.m			standard
 kern/clock_if.m			standard
 kern/cpufreq_if.m		standard
 kern/device_if.m		standard
 kern/imgact_binmisc.c		optional	imagact_binmisc
 kern/imgact_elf.c		standard
 kern/imgact_elf32.c		optional compat_freebsd32
 kern/imgact_shell.c		standard
 kern/inflate.c			optional gzip
 kern/init_main.c		standard
 kern/init_sysent.c		standard
 kern/ksched.c			optional _kposix_priority_scheduling
 kern/kern_acct.c		standard
 kern/kern_alq.c			optional alq
 kern/kern_clock.c		standard
 kern/kern_condvar.c		standard
 kern/kern_conf.c		standard
 kern/kern_cons.c		standard
 kern/kern_cpu.c			standard
 kern/kern_cpuset.c		standard
 kern/kern_context.c		standard
 kern/kern_descrip.c		standard
 kern/kern_dtrace.c		optional kdtrace_hooks
 kern/kern_dump.c		standard
 kern/kern_environment.c		standard
 kern/kern_et.c			standard
 kern/kern_event.c		standard
 kern/kern_exec.c		standard
 kern/kern_exit.c		standard
 kern/kern_fail.c		standard
 kern/kern_ffclock.c		standard
 kern/kern_fork.c		standard
 kern/kern_gzio.c		optional gzio
 kern/kern_hhook.c		standard
 kern/kern_idle.c		standard
 kern/kern_intr.c		standard
 kern/kern_jail.c		standard
 kern/kern_khelp.c		standard
 kern/kern_kthread.c		standard
 kern/kern_ktr.c			optional ktr
 kern/kern_ktrace.c		standard
 kern/kern_linker.c		standard
 kern/kern_lock.c		standard
 kern/kern_lockf.c		standard
 kern/kern_lockstat.c		optional kdtrace_hooks
 kern/kern_loginclass.c		standard
 kern/kern_malloc.c		standard
 kern/kern_mbuf.c		standard
 kern/kern_mib.c			standard
 kern/kern_module.c		standard
 kern/kern_mtxpool.c		standard
 kern/kern_mutex.c		standard
 kern/kern_ntptime.c		standard
 kern/kern_numa.c		standard
 kern/kern_osd.c			standard
 kern/kern_physio.c		standard
 kern/kern_pmc.c			standard
 kern/kern_poll.c		optional device_polling
 kern/kern_priv.c		standard
 kern/kern_proc.c		standard
 kern/kern_procctl.c		standard
 kern/kern_prot.c		standard
 kern/kern_racct.c		standard
 kern/kern_rangelock.c		standard
 kern/kern_rctl.c		standard
 kern/kern_resource.c		standard
 kern/kern_rmlock.c		standard
 kern/kern_rwlock.c		standard
 kern/kern_sdt.c			optional kdtrace_hooks
 kern/kern_sema.c		standard
 kern/kern_sendfile.c		standard
 kern/kern_sharedpage.c		standard
 kern/kern_shutdown.c		standard
 kern/kern_sig.c			standard
 kern/kern_switch.c		standard
 kern/kern_sx.c			standard
 kern/kern_synch.c		standard
 kern/kern_syscalls.c		standard
 kern/kern_sysctl.c		standard
 kern/kern_tc.c			standard
 kern/kern_thr.c			standard
 kern/kern_thread.c		standard
 kern/kern_time.c		standard
 kern/kern_timeout.c		standard
 kern/kern_umtx.c		standard
 kern/kern_uuid.c		standard
 kern/kern_xxx.c			standard
 kern/link_elf.c			standard
 kern/linker_if.m		standard
 kern/md4c.c			optional netsmb
 kern/md5c.c			standard
 kern/p1003_1b.c			standard
 kern/posix4_mib.c		standard
 kern/sched_4bsd.c		optional sched_4bsd
 kern/sched_ule.c		optional sched_ule
 kern/serdev_if.m		standard
 kern/stack_protector.c		standard \
 	compile-with "${NORMAL_C:N-fstack-protector*}"
 kern/subr_acl_nfs4.c		optional ufs_acl | zfs
 kern/subr_acl_posix1e.c		optional ufs_acl
 kern/subr_autoconf.c		standard
 kern/subr_blist.c		standard
 kern/subr_bus.c			standard
 kern/subr_bus_dma.c		standard
 kern/subr_bufring.c		standard
 kern/subr_capability.c		standard
 kern/subr_clock.c		standard
 kern/subr_counter.c		standard
 kern/subr_devstat.c		standard
 kern/subr_disk.c		standard
 kern/subr_eventhandler.c	standard
 kern/subr_fattime.c		standard
 kern/subr_firmware.c		optional firmware
 kern/subr_gtaskqueue.c		standard
 kern/subr_hash.c		standard
 kern/subr_hints.c		standard
 kern/subr_kdb.c			standard
 kern/subr_kobj.c		standard
 kern/subr_lock.c		standard
 kern/subr_log.c			standard
 kern/subr_mbpool.c		optional libmbpool
 kern/subr_mchain.c		optional libmchain
 kern/subr_module.c		standard
 kern/subr_msgbuf.c		standard
 kern/subr_param.c		standard
 kern/subr_pcpu.c		standard
 kern/subr_pctrie.c		standard
 kern/subr_power.c		standard
 kern/subr_prf.c			standard
 kern/subr_prof.c		standard
 kern/subr_rman.c		standard
 kern/subr_rtc.c			standard
 kern/subr_sbuf.c		standard
 kern/subr_scanf.c		standard
 kern/subr_sglist.c		standard
 kern/subr_sleepqueue.c		standard
 kern/subr_smp.c			standard
 kern/subr_stack.c		optional ddb | stack | ktr
 kern/subr_taskqueue.c		standard
 kern/subr_terminal.c		optional vt
 kern/subr_trap.c		standard
 kern/subr_turnstile.c		standard
 kern/subr_uio.c			standard
 kern/subr_unit.c		standard
 kern/subr_vmem.c		standard
 kern/subr_witness.c		optional witness
 kern/sys_capability.c		standard
 kern/sys_generic.c		standard
 kern/sys_pipe.c			standard
 kern/sys_procdesc.c		standard
 kern/sys_process.c		standard
 kern/sys_socket.c		standard
 kern/syscalls.c			standard
 kern/sysv_ipc.c			standard
 kern/sysv_msg.c			optional sysvmsg
 kern/sysv_sem.c			optional sysvsem
 kern/sysv_shm.c			optional sysvshm
 kern/tty.c			standard
 kern/tty_compat.c		optional compat_43tty
 kern/tty_info.c			standard
 kern/tty_inq.c			standard
 kern/tty_outq.c			standard
 kern/tty_pts.c			standard
 kern/tty_tty.c			standard
 kern/tty_ttydisc.c		standard
 kern/uipc_accf.c		standard
 kern/uipc_debug.c		optional ddb
 kern/uipc_domain.c		standard
 kern/uipc_mbuf.c		standard
 kern/uipc_mbuf2.c		standard
 kern/uipc_mbufhash.c		standard
 kern/uipc_mqueue.c		optional p1003_1b_mqueue
 kern/uipc_sem.c			optional p1003_1b_semaphores
 kern/uipc_shm.c			standard
 kern/uipc_sockbuf.c		standard
 kern/uipc_socket.c		standard
 kern/uipc_syscalls.c		standard
 kern/uipc_usrreq.c		standard
 kern/vfs_acl.c			standard
 kern/vfs_aio.c			standard
 kern/vfs_bio.c			standard
 kern/vfs_cache.c		standard
 kern/vfs_cluster.c		standard
 kern/vfs_default.c		standard
 kern/vfs_export.c		standard
 kern/vfs_extattr.c		standard
 kern/vfs_hash.c			standard
 kern/vfs_init.c			standard
 kern/vfs_lookup.c		standard
 kern/vfs_mount.c		standard
 kern/vfs_mountroot.c		standard
 kern/vfs_subr.c			standard
 kern/vfs_syscalls.c		standard
 kern/vfs_vnops.c		standard
 #
 # Kernel GSS-API
 #
 gssd.h				optional kgssapi			\
 	dependency		"$S/kgssapi/gssd.x"			\
 	compile-with		"RPCGEN_CPP='${CPP}' rpcgen -hM $S/kgssapi/gssd.x | grep -v pthread.h > gssd.h" \
 	no-obj no-implicit-rule before-depend local			\
 	clean			"gssd.h"
 gssd_xdr.c			optional kgssapi			\
 	dependency		"$S/kgssapi/gssd.x gssd.h"		\
 	compile-with		"RPCGEN_CPP='${CPP}' rpcgen -c $S/kgssapi/gssd.x -o gssd_xdr.c" \
 	no-implicit-rule before-depend local				\
 	clean			"gssd_xdr.c"
 gssd_clnt.c			optional kgssapi			\
 	dependency		"$S/kgssapi/gssd.x gssd.h"		\
 	compile-with		"RPCGEN_CPP='${CPP}' rpcgen -lM $S/kgssapi/gssd.x | grep -v string.h > gssd_clnt.c" \
 	no-implicit-rule before-depend local				\
 	clean			"gssd_clnt.c"
 kgssapi/gss_accept_sec_context.c optional kgssapi
 kgssapi/gss_add_oid_set_member.c optional kgssapi
 kgssapi/gss_acquire_cred.c	optional kgssapi
 kgssapi/gss_canonicalize_name.c	optional kgssapi
 kgssapi/gss_create_empty_oid_set.c optional kgssapi
 kgssapi/gss_delete_sec_context.c optional kgssapi
 kgssapi/gss_display_status.c	optional kgssapi
 kgssapi/gss_export_name.c	optional kgssapi
 kgssapi/gss_get_mic.c		optional kgssapi
 kgssapi/gss_init_sec_context.c	optional kgssapi
 kgssapi/gss_impl.c		optional kgssapi
 kgssapi/gss_import_name.c	optional kgssapi
 kgssapi/gss_names.c		optional kgssapi
 kgssapi/gss_pname_to_uid.c	optional kgssapi
 kgssapi/gss_release_buffer.c	optional kgssapi
 kgssapi/gss_release_cred.c	optional kgssapi
 kgssapi/gss_release_name.c	optional kgssapi
 kgssapi/gss_release_oid_set.c	optional kgssapi
 kgssapi/gss_set_cred_option.c	optional kgssapi
 kgssapi/gss_test_oid_set_member.c optional kgssapi
 kgssapi/gss_unwrap.c		optional kgssapi
 kgssapi/gss_verify_mic.c	optional kgssapi
 kgssapi/gss_wrap.c		optional kgssapi
 kgssapi/gss_wrap_size_limit.c	optional kgssapi
 kgssapi/gssd_prot.c		optional kgssapi
 kgssapi/krb5/krb5_mech.c	optional kgssapi
 kgssapi/krb5/kcrypto.c		optional kgssapi
 kgssapi/krb5/kcrypto_aes.c	optional kgssapi
 kgssapi/krb5/kcrypto_arcfour.c	optional kgssapi
 kgssapi/krb5/kcrypto_des.c	optional kgssapi
 kgssapi/krb5/kcrypto_des3.c	optional kgssapi
 kgssapi/kgss_if.m		optional kgssapi
 kgssapi/gsstest.c		optional kgssapi_debug
 # These files in libkern/ are those needed by all architectures.  Some
 # of the files in libkern/ are only needed on some architectures, e.g.,
 # libkern/divdi3.c is needed by i386 but not alpha.  Also, some of these
 # routines may be optimized for a particular platform.  In either case,
 # the file should be moved to conf/files.<arch> from here.
 #
 libkern/arc4random.c		standard
 libkern/asprintf.c		standard
 libkern/bcd.c			standard
 libkern/bsearch.c		standard
 libkern/crc32.c			standard
 libkern/explicit_bzero.c	standard
 libkern/fnmatch.c		standard
 libkern/iconv.c			optional libiconv
 libkern/iconv_converter_if.m	optional libiconv
 libkern/iconv_ucs.c		optional libiconv
 libkern/iconv_xlat.c		optional libiconv
 libkern/iconv_xlat16.c		optional libiconv
 libkern/inet_aton.c		standard
 libkern/inet_ntoa.c		standard
 libkern/inet_ntop.c		standard
 libkern/inet_pton.c		standard
 libkern/jenkins_hash.c		standard
 libkern/murmur3_32.c		standard
 libkern/mcount.c		optional profiling-routine
 libkern/memcchr.c		standard
 libkern/memchr.c		standard
 libkern/memcmp.c		standard
 libkern/memmem.c		optional gdb
 libkern/qsort.c			standard
 libkern/qsort_r.c		standard
 libkern/random.c		standard
 libkern/scanc.c			standard
 libkern/strcasecmp.c		standard
 libkern/strcat.c		standard
 libkern/strchr.c		standard
 libkern/strcmp.c		standard
 libkern/strcpy.c		standard
 libkern/strcspn.c		standard
 libkern/strdup.c		standard
 libkern/strndup.c		standard
 libkern/strlcat.c		standard
 libkern/strlcpy.c		standard
 libkern/strlen.c		standard
 libkern/strncat.c		standard
 libkern/strncmp.c		standard
 libkern/strncpy.c		standard
 libkern/strnlen.c		standard
 libkern/strrchr.c		standard
 libkern/strsep.c		standard
 libkern/strspn.c		standard
 libkern/strstr.c		standard
 libkern/strtol.c		standard
 libkern/strtoq.c		standard
 libkern/strtoul.c		standard
 libkern/strtouq.c		standard
 libkern/strvalid.c		standard
 libkern/timingsafe_bcmp.c	standard
 libkern/zlib.c			optional crypto | geom_uzip | ipsec | \
 	ipsec_support | mxge | netgraph_deflate | ddb_ctf | gzio
 net/altq/altq_cbq.c		optional altq
 net/altq/altq_cdnr.c		optional altq
 net/altq/altq_codel.c		optional altq
 net/altq/altq_hfsc.c		optional altq
 net/altq/altq_fairq.c		optional altq
 net/altq/altq_priq.c		optional altq
 net/altq/altq_red.c		optional altq
 net/altq/altq_rio.c		optional altq
 net/altq/altq_rmclass.c		optional altq
 net/altq/altq_subr.c		optional altq
 net/bpf.c			standard
 net/bpf_buffer.c		optional bpf
 net/bpf_jitter.c		optional bpf_jitter
 net/bpf_filter.c		optional bpf | netgraph_bpf
 net/bpf_zerocopy.c		optional bpf
 net/bridgestp.c			optional bridge | if_bridge
 net/flowtable.c			optional flowtable inet | flowtable inet6
 net/ieee8023ad_lacp.c		optional lagg
 net/if.c			standard
 net/if_arcsubr.c		optional arcnet
 net/if_atmsubr.c		optional atm
 net/if_bridge.c			optional bridge inet | if_bridge inet
 net/if_clone.c			standard
 net/if_dead.c			standard
 net/if_debug.c			optional ddb
 net/if_disc.c			optional disc
 net/if_edsc.c			optional edsc
 net/if_enc.c			optional enc inet | enc inet6
 net/if_epair.c			optional epair
 net/if_ethersubr.c		optional ether
 net/if_fddisubr.c		optional fddi
 net/if_fwsubr.c			optional fwip
 net/if_gif.c			optional gif inet | gif inet6 | \
 					 netgraph_gif inet | netgraph_gif inet6
 net/if_gre.c			optional gre inet | gre inet6
 net/if_ipsec.c			optional inet ipsec | inet6 ipsec
 net/if_iso88025subr.c		optional token
 net/if_lagg.c			optional lagg
 net/if_loop.c			optional loop
 net/if_llatbl.c			standard
 net/if_me.c			optional me inet
 net/if_media.c			standard
 net/if_mib.c			standard
 net/if_spppfr.c			optional sppp | netgraph_sppp
 net/if_spppsubr.c		optional sppp | netgraph_sppp
 net/if_stf.c			optional stf inet inet6
 net/if_tun.c			optional tun
 net/if_tap.c			optional tap
 net/if_vlan.c			optional vlan
 net/if_vxlan.c			optional vxlan inet | vxlan inet6
 net/ifdi_if.m			optional ether pci
 net/iflib.c			optional ether pci
 net/mp_ring.c			optional ether
 net/mppcc.c			optional netgraph_mppc_compression
 net/mppcd.c			optional netgraph_mppc_compression
 net/netisr.c			standard
 net/pfil.c			optional ether | inet
 net/radix.c			standard
 net/radix_mpath.c		standard
 net/raw_cb.c			standard
 net/raw_usrreq.c		standard
 net/route.c			standard
 net/rss_config.c		optional inet rss | inet6 rss
 net/rtsock.c			standard
 net/slcompress.c		optional netgraph_vjc | sppp | \
 					 netgraph_sppp
 net/toeplitz.c			optional inet rss | inet6 rss
 net/vnet.c			optional vimage
 net80211/ieee80211.c		optional wlan
 net80211/ieee80211_acl.c	optional wlan wlan_acl
 net80211/ieee80211_action.c	optional wlan
 net80211/ieee80211_ageq.c	optional wlan
 net80211/ieee80211_adhoc.c	optional wlan \
 	compile-with "${NORMAL_C} -Wno-unused-function"
 net80211/ieee80211_ageq.c	optional wlan
 net80211/ieee80211_amrr.c	optional wlan | wlan_amrr
 net80211/ieee80211_crypto.c	optional wlan \
 	compile-with "${NORMAL_C} -Wno-unused-function"
 net80211/ieee80211_crypto_ccmp.c optional wlan wlan_ccmp
 net80211/ieee80211_crypto_none.c optional wlan
 net80211/ieee80211_crypto_tkip.c optional wlan wlan_tkip
 net80211/ieee80211_crypto_wep.c	optional wlan wlan_wep
 net80211/ieee80211_ddb.c	optional wlan ddb
 net80211/ieee80211_dfs.c	optional wlan
 net80211/ieee80211_freebsd.c	optional wlan
 net80211/ieee80211_hostap.c	optional wlan \
 	compile-with "${NORMAL_C} -Wno-unused-function"
 net80211/ieee80211_ht.c		optional wlan
 net80211/ieee80211_hwmp.c	optional wlan ieee80211_support_mesh
 net80211/ieee80211_input.c	optional wlan
 net80211/ieee80211_ioctl.c	optional wlan
 net80211/ieee80211_mesh.c	optional wlan ieee80211_support_mesh \
 	compile-with "${NORMAL_C} -Wno-unused-function"
 net80211/ieee80211_monitor.c	optional wlan
 net80211/ieee80211_node.c	optional wlan
 net80211/ieee80211_output.c	optional wlan
 net80211/ieee80211_phy.c	optional wlan
 net80211/ieee80211_power.c	optional wlan
 net80211/ieee80211_proto.c	optional wlan
 net80211/ieee80211_radiotap.c	optional wlan
 net80211/ieee80211_ratectl.c	optional wlan
 net80211/ieee80211_ratectl_none.c optional wlan
 net80211/ieee80211_regdomain.c	optional wlan
 net80211/ieee80211_rssadapt.c	optional wlan wlan_rssadapt
 net80211/ieee80211_scan.c	optional wlan
 net80211/ieee80211_scan_sta.c	optional wlan
 net80211/ieee80211_sta.c	optional wlan \
 	compile-with "${NORMAL_C} -Wno-unused-function"
 net80211/ieee80211_superg.c	optional wlan ieee80211_support_superg
 net80211/ieee80211_scan_sw.c	optional wlan
 net80211/ieee80211_tdma.c	optional wlan ieee80211_support_tdma
 net80211/ieee80211_vht.c	optional wlan
 net80211/ieee80211_wds.c	optional wlan
 net80211/ieee80211_xauth.c	optional wlan wlan_xauth
 net80211/ieee80211_alq.c	optional wlan ieee80211_alq
 netgraph/atm/ccatm/ng_ccatm.c	optional ngatm_ccatm \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 netgraph/atm/ng_atm.c		optional ngatm_atm
 netgraph/atm/ngatmbase.c	optional ngatm_atmbase \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 netgraph/atm/sscfu/ng_sscfu.c	optional ngatm_sscfu \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 netgraph/atm/sscop/ng_sscop.c optional ngatm_sscop \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 netgraph/atm/uni/ng_uni.c	optional ngatm_uni \
 	compile-with "${NORMAL_C} -I$S/contrib/ngatm"
 netgraph/bluetooth/common/ng_bluetooth.c optional netgraph_bluetooth
 netgraph/bluetooth/drivers/bt3c/ng_bt3c_pccard.c optional netgraph_bluetooth_bt3c
 netgraph/bluetooth/drivers/h4/ng_h4.c optional netgraph_bluetooth_h4
 netgraph/bluetooth/drivers/ubt/ng_ubt.c optional netgraph_bluetooth_ubt usb
 netgraph/bluetooth/drivers/ubtbcmfw/ubtbcmfw.c optional netgraph_bluetooth_ubtbcmfw usb
 netgraph/bluetooth/hci/ng_hci_cmds.c optional netgraph_bluetooth_hci
 netgraph/bluetooth/hci/ng_hci_evnt.c optional netgraph_bluetooth_hci
 netgraph/bluetooth/hci/ng_hci_main.c optional netgraph_bluetooth_hci
 netgraph/bluetooth/hci/ng_hci_misc.c optional netgraph_bluetooth_hci
 netgraph/bluetooth/hci/ng_hci_ulpi.c optional netgraph_bluetooth_hci
 netgraph/bluetooth/l2cap/ng_l2cap_cmds.c optional netgraph_bluetooth_l2cap
 netgraph/bluetooth/l2cap/ng_l2cap_evnt.c optional netgraph_bluetooth_l2cap
 netgraph/bluetooth/l2cap/ng_l2cap_llpi.c optional netgraph_bluetooth_l2cap
 netgraph/bluetooth/l2cap/ng_l2cap_main.c optional netgraph_bluetooth_l2cap
 netgraph/bluetooth/l2cap/ng_l2cap_misc.c optional netgraph_bluetooth_l2cap
 netgraph/bluetooth/l2cap/ng_l2cap_ulpi.c optional netgraph_bluetooth_l2cap
 netgraph/bluetooth/socket/ng_btsocket.c optional netgraph_bluetooth_socket
 netgraph/bluetooth/socket/ng_btsocket_hci_raw.c	optional netgraph_bluetooth_socket
 netgraph/bluetooth/socket/ng_btsocket_l2cap.c optional netgraph_bluetooth_socket
 netgraph/bluetooth/socket/ng_btsocket_l2cap_raw.c optional netgraph_bluetooth_socket
 netgraph/bluetooth/socket/ng_btsocket_rfcomm.c optional netgraph_bluetooth_socket
 netgraph/bluetooth/socket/ng_btsocket_sco.c optional netgraph_bluetooth_socket
 netgraph/netflow/netflow.c	optional netgraph_netflow
 netgraph/netflow/netflow_v9.c	optional netgraph_netflow
 netgraph/netflow/ng_netflow.c	optional netgraph_netflow
 netgraph/ng_UI.c		optional netgraph_UI
 netgraph/ng_async.c		optional netgraph_async
 netgraph/ng_atmllc.c		optional netgraph_atmllc
 netgraph/ng_base.c		optional netgraph
 netgraph/ng_bpf.c		optional netgraph_bpf
 netgraph/ng_bridge.c		optional netgraph_bridge
 netgraph/ng_car.c		optional netgraph_car
 netgraph/ng_cisco.c		optional netgraph_cisco
 netgraph/ng_deflate.c		optional netgraph_deflate
 netgraph/ng_device.c		optional netgraph_device
 netgraph/ng_echo.c		optional netgraph_echo
 netgraph/ng_eiface.c		optional netgraph_eiface
 netgraph/ng_ether.c		optional netgraph_ether
 netgraph/ng_ether_echo.c	optional netgraph_ether_echo
 netgraph/ng_frame_relay.c	optional netgraph_frame_relay
 netgraph/ng_gif.c		optional netgraph_gif inet6 | netgraph_gif inet
 netgraph/ng_gif_demux.c		optional netgraph_gif_demux
 netgraph/ng_hole.c		optional netgraph_hole
 netgraph/ng_iface.c		optional netgraph_iface
 netgraph/ng_ip_input.c		optional netgraph_ip_input
 netgraph/ng_ipfw.c		optional netgraph_ipfw inet ipfirewall
 netgraph/ng_ksocket.c		optional netgraph_ksocket
 netgraph/ng_l2tp.c		optional netgraph_l2tp
 netgraph/ng_lmi.c		optional netgraph_lmi
 netgraph/ng_mppc.c		optional netgraph_mppc_compression | \
 					 netgraph_mppc_encryption
 netgraph/ng_nat.c		optional netgraph_nat inet libalias
 netgraph/ng_one2many.c		optional netgraph_one2many
 netgraph/ng_parse.c		optional netgraph
 netgraph/ng_patch.c		optional netgraph_patch
 netgraph/ng_pipe.c		optional netgraph_pipe
 netgraph/ng_ppp.c		optional netgraph_ppp
 netgraph/ng_pppoe.c		optional netgraph_pppoe
 netgraph/ng_pptpgre.c		optional netgraph_pptpgre
 netgraph/ng_pred1.c		optional netgraph_pred1
 netgraph/ng_rfc1490.c		optional netgraph_rfc1490
 netgraph/ng_socket.c		optional netgraph_socket
 netgraph/ng_split.c		optional netgraph_split
 netgraph/ng_sppp.c		optional netgraph_sppp
 netgraph/ng_tag.c		optional netgraph_tag
 netgraph/ng_tcpmss.c		optional netgraph_tcpmss
 netgraph/ng_tee.c		optional netgraph_tee
 netgraph/ng_tty.c		optional netgraph_tty
 netgraph/ng_vjc.c		optional netgraph_vjc
 netgraph/ng_vlan.c		optional netgraph_vlan
 netinet/accf_data.c		optional accept_filter_data inet
 netinet/accf_dns.c		optional accept_filter_dns inet
 netinet/accf_http.c		optional accept_filter_http inet
 netinet/if_atm.c		optional atm
 netinet/if_ether.c		optional inet ether
 netinet/igmp.c			optional inet
 netinet/in.c			optional inet
 netinet/in_debug.c		optional inet ddb
 netinet/in_kdtrace.c		optional inet | inet6
 netinet/ip_carp.c		optional inet carp | inet6 carp
 netinet/in_fib.c		optional inet
 netinet/in_gif.c		optional gif inet | netgraph_gif inet
 netinet/ip_gre.c		optional gre inet
 netinet/ip_id.c			optional inet
 netinet/in_jail.c		optional inet
 netinet/in_mcast.c		optional inet
 netinet/in_pcb.c		optional inet | inet6
 netinet/in_pcbgroup.c		optional inet pcbgroup | inet6 pcbgroup
 netinet/in_prot.c		optional inet | inet6
 netinet/in_proto.c		optional inet | inet6
 netinet/in_rmx.c		optional inet
 netinet/in_rss.c		optional inet rss
 netinet/ip_divert.c		optional inet ipdivert ipfirewall
 netinet/ip_ecn.c		optional inet | inet6
 netinet/ip_encap.c		optional inet | inet6
 netinet/ip_fastfwd.c		optional inet
 netinet/ip_icmp.c		optional inet | inet6
 netinet/ip_input.c		optional inet
 netinet/ip_mroute.c		optional mrouting inet
 netinet/ip_options.c		optional inet
 netinet/ip_output.c		optional inet
 netinet/ip_reass.c		optional inet
 netinet/raw_ip.c		optional inet | inet6
 netinet/cc/cc.c			optional inet | inet6
 netinet/cc/cc_newreno.c		optional inet | inet6
 netinet/sctp_asconf.c		optional inet sctp | inet6 sctp
 netinet/sctp_auth.c		optional inet sctp | inet6 sctp
 netinet/sctp_bsd_addr.c		optional inet sctp | inet6 sctp
 netinet/sctp_cc_functions.c	optional inet sctp | inet6 sctp
 netinet/sctp_crc32.c		optional inet sctp | inet6 sctp
 netinet/sctp_indata.c		optional inet sctp | inet6 sctp
 netinet/sctp_input.c		optional inet sctp | inet6 sctp
 netinet/sctp_output.c		optional inet sctp | inet6 sctp
 netinet/sctp_pcb.c		optional inet sctp | inet6 sctp
 netinet/sctp_peeloff.c		optional inet sctp | inet6 sctp
 netinet/sctp_ss_functions.c	optional inet sctp | inet6 sctp
 netinet/sctp_syscalls.c		optional inet sctp | inet6 sctp
 netinet/sctp_sysctl.c		optional inet sctp | inet6 sctp
 netinet/sctp_timer.c		optional inet sctp | inet6 sctp
 netinet/sctp_usrreq.c		optional inet sctp | inet6 sctp
 netinet/sctputil.c		optional inet sctp | inet6 sctp
 netinet/siftr.c			optional inet siftr alq | inet6 siftr alq
 netinet/tcp_debug.c		optional tcpdebug
 netinet/tcp_fastopen.c		optional inet tcp_rfc7413 | inet6 tcp_rfc7413
 netinet/tcp_hostcache.c		optional inet | inet6
 netinet/tcp_input.c		optional inet | inet6
 netinet/tcp_lro.c		optional inet | inet6
 netinet/tcp_output.c		optional inet | inet6
 netinet/tcp_offload.c		optional tcp_offload inet | tcp_offload inet6
 netinet/tcp_pcap.c		optional inet tcppcap | inet6 tcppcap
 netinet/tcp_reass.c		optional inet | inet6
 netinet/tcp_sack.c		optional inet | inet6
 netinet/tcp_subr.c		optional inet | inet6
 netinet/tcp_syncache.c		optional inet | inet6
 netinet/tcp_timer.c		optional inet | inet6
 netinet/tcp_timewait.c		optional inet | inet6
 netinet/tcp_usrreq.c		optional inet | inet6
 netinet/udp_usrreq.c		optional inet | inet6
 netinet/libalias/alias.c	optional libalias inet | netgraph_nat inet
 netinet/libalias/alias_db.c	optional libalias inet | netgraph_nat inet
 netinet/libalias/alias_mod.c	optional libalias | netgraph_nat
 netinet/libalias/alias_proxy.c	optional libalias inet | netgraph_nat inet
 netinet/libalias/alias_util.c	optional libalias inet | netgraph_nat inet
 netinet/libalias/alias_sctp.c	optional libalias inet | netgraph_nat inet
 netinet6/dest6.c		optional inet6
 netinet6/frag6.c		optional inet6
 netinet6/icmp6.c		optional inet6
 netinet6/in6.c			optional inet6
 netinet6/in6_cksum.c		optional inet6
 netinet6/in6_fib.c		optional inet6
 netinet6/in6_gif.c		optional gif inet6 | netgraph_gif inet6
 netinet6/in6_ifattach.c		optional inet6
 netinet6/in6_jail.c		optional inet6
 netinet6/in6_mcast.c		optional inet6
 netinet6/in6_pcb.c		optional inet6
 netinet6/in6_pcbgroup.c		optional inet6 pcbgroup
 netinet6/in6_proto.c		optional inet6
 netinet6/in6_rmx.c		optional inet6
 netinet6/in6_rss.c		optional inet6 rss
 netinet6/in6_src.c		optional inet6
 netinet6/ip6_fastfwd.c		optional inet6
 netinet6/ip6_forward.c		optional inet6
 netinet6/ip6_gre.c		optional gre inet6
 netinet6/ip6_id.c		optional inet6
 netinet6/ip6_input.c		optional inet6
 netinet6/ip6_mroute.c		optional mrouting inet6
 netinet6/ip6_output.c		optional inet6
 netinet6/mld6.c			optional inet6
 netinet6/nd6.c			optional inet6
 netinet6/nd6_nbr.c		optional inet6
 netinet6/nd6_rtr.c		optional inet6
 netinet6/raw_ip6.c		optional inet6
 netinet6/route6.c		optional inet6
 netinet6/scope6.c		optional inet6
 netinet6/sctp6_usrreq.c		optional inet6 sctp
 netinet6/udp6_usrreq.c		optional inet6
 netipsec/ipsec.c		optional ipsec inet | ipsec inet6
 netipsec/ipsec_input.c		optional ipsec inet | ipsec inet6
 netipsec/ipsec_mbuf.c		optional ipsec inet | ipsec inet6
 netipsec/ipsec_mod.c		optional ipsec inet | ipsec inet6
 netipsec/ipsec_output.c		optional ipsec inet | ipsec inet6
 netipsec/ipsec_pcb.c		optional ipsec inet | ipsec inet6 | \
 	ipsec_support inet | ipsec_support inet6
 netipsec/key.c			optional ipsec inet | ipsec inet6 | \
 	ipsec_support inet | ipsec_support inet6
 netipsec/key_debug.c		optional ipsec inet | ipsec inet6 | \
 	ipsec_support inet | ipsec_support inet6
 netipsec/keysock.c		optional ipsec inet | ipsec inet6 | \
 	ipsec_support inet | ipsec_support inet6
 netipsec/subr_ipsec.c		optional ipsec inet | ipsec inet6 | \
 	ipsec_support inet | ipsec_support inet6
 netipsec/udpencap.c		optional ipsec inet
 netipsec/xform_ah.c		optional ipsec inet | ipsec inet6
 netipsec/xform_esp.c		optional ipsec inet | ipsec inet6
 netipsec/xform_ipcomp.c		optional ipsec inet | ipsec inet6
 netipsec/xform_tcp.c		optional ipsec inet tcp_signature | \
 	 ipsec inet6 tcp_signature | ipsec_support inet tcp_signature | \
 	 ipsec_support inet6 tcp_signature
 netnatm/natm.c			optional natm
 netnatm/natm_pcb.c		optional natm
 netnatm/natm_proto.c		optional natm
 netpfil/ipfw/dn_aqm_codel.c	optional inet dummynet
 netpfil/ipfw/dn_aqm_pie.c	optional inet dummynet
 netpfil/ipfw/dn_heap.c		optional inet dummynet
 netpfil/ipfw/dn_sched_fifo.c	optional inet dummynet
 netpfil/ipfw/dn_sched_fq_codel.c	optional inet dummynet
 netpfil/ipfw/dn_sched_fq_pie.c	optional inet dummynet
 netpfil/ipfw/dn_sched_prio.c	optional inet dummynet
 netpfil/ipfw/dn_sched_qfq.c	optional inet dummynet
 netpfil/ipfw/dn_sched_rr.c	optional inet dummynet
 netpfil/ipfw/dn_sched_wf2q.c	optional inet dummynet
 netpfil/ipfw/ip_dummynet.c	optional inet dummynet
 netpfil/ipfw/ip_dn_io.c		optional inet dummynet
 netpfil/ipfw/ip_dn_glue.c	optional inet dummynet
 netpfil/ipfw/ip_fw2.c		optional inet ipfirewall
 netpfil/ipfw/ip_fw_bpf.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_dynamic.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_eaction.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_log.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_pfil.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_sockopt.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_table.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_table_algo.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_table_value.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_iface.c	optional inet ipfirewall
 netpfil/ipfw/ip_fw_nat.c	optional inet ipfirewall_nat
 netpfil/ipfw/nat64/ip_fw_nat64.c	optional inet inet6 ipfirewall \
 	ipfirewall_nat64
 netpfil/ipfw/nat64/nat64lsn.c	optional inet inet6 ipfirewall \
 	ipfirewall_nat64
 netpfil/ipfw/nat64/nat64lsn_control.c	optional inet inet6 ipfirewall \
 	ipfirewall_nat64
 netpfil/ipfw/nat64/nat64stl.c	optional inet inet6 ipfirewall \
 	ipfirewall_nat64
 netpfil/ipfw/nat64/nat64stl_control.c	optional inet inet6 ipfirewall \
 	ipfirewall_nat64
 netpfil/ipfw/nat64/nat64_translate.c	optional inet inet6 ipfirewall \
 	ipfirewall_nat64
 netpfil/ipfw/nptv6/ip_fw_nptv6.c	optional inet inet6 ipfirewall \
 	ipfirewall_nptv6
 netpfil/ipfw/nptv6/nptv6.c	optional inet inet6 ipfirewall \
 	ipfirewall_nptv6
 netpfil/pf/if_pflog.c		optional pflog pf inet
 netpfil/pf/if_pfsync.c		optional pfsync pf inet
 netpfil/pf/pf.c			optional pf inet
 netpfil/pf/pf_if.c		optional pf inet
 netpfil/pf/pf_ioctl.c		optional pf inet
 netpfil/pf/pf_lb.c		optional pf inet
 netpfil/pf/pf_norm.c		optional pf inet
 netpfil/pf/pf_osfp.c		optional pf inet
 netpfil/pf/pf_ruleset.c		optional pf inet
 netpfil/pf/pf_table.c		optional pf inet
 netpfil/pf/in4_cksum.c		optional pf inet
 netsmb/smb_conn.c		optional netsmb
 netsmb/smb_crypt.c		optional netsmb
 netsmb/smb_dev.c		optional netsmb
 netsmb/smb_iod.c		optional netsmb
 netsmb/smb_rq.c			optional netsmb
 netsmb/smb_smb.c		optional netsmb
 netsmb/smb_subr.c		optional netsmb
 netsmb/smb_trantcp.c		optional netsmb
 netsmb/smb_usr.c		optional netsmb
 nfs/bootp_subr.c		optional bootp nfscl
 nfs/krpc_subr.c			optional bootp nfscl
 nfs/nfs_diskless.c		optional nfscl nfs_root
 nfs/nfs_fha.c			optional nfsd
 nfs/nfs_lock.c			optional nfscl | nfslockd | nfsd
 nfs/nfs_nfssvc.c		optional nfscl | nfsd
 nlm/nlm_advlock.c		optional nfslockd | nfsd
 nlm/nlm_prot_clnt.c		optional nfslockd | nfsd
 nlm/nlm_prot_impl.c		optional nfslockd | nfsd
 nlm/nlm_prot_server.c		optional nfslockd | nfsd
 nlm/nlm_prot_svc.c		optional nfslockd | nfsd
 nlm/nlm_prot_xdr.c		optional nfslockd | nfsd
 nlm/sm_inter_xdr.c		optional nfslockd | nfsd
 
 # Linux Kernel Programming Interface
 compat/linuxkpi/common/src/linux_kmod.c		optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_compat.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_current.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_kthread.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_page.c		optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_pci.c		optional compat_linuxkpi pci \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_tasklet.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_idr.c		optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_radix.c	optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C}"
 compat/linuxkpi/common/src/linux_rcu.c		optional compat_linuxkpi \
 	compile-with "${LINUXKPI_C} -I$S/contrib/ck/include"
 compat/linuxkpi/common/src/linux_usb.c		optional compat_linuxkpi usb \
 	compile-with "${LINUXKPI_C}"
 
 # OpenFabrics Enterprise Distribution (Infiniband)
 ofed/drivers/infiniband/core/addr.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/agent.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/cache.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 # XXX Mad.c must be ordered before cm.c for sysinit sets to occur in
 # the correct order.
 ofed/drivers/infiniband/core/mad.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/cm.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/ -Wno-unused-function"
 ofed/drivers/infiniband/core/cma.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/device.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/fmr_pool.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/iwcm.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/mad_rmpp.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/multicast.c	optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/packer.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/peer_mem.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/sa_query.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/smi.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/sysfs.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/ucm.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/ucma.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/ud_header.c	optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/umem.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/user_mad.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/uverbs_cmd.c	optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/uverbs_main.c	optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/uverbs_marshall.c	optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 ofed/drivers/infiniband/core/verbs.c		optional ofed		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/core/"
 
 ofed/drivers/infiniband/ulp/ipoib/ipoib_cm.c	optional ipoib		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/ipoib/"
 #ofed/drivers/infiniband/ulp/ipoib/ipoib_fs.c	optional ipoib		\
 #	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/ipoib/"
 ofed/drivers/infiniband/ulp/ipoib/ipoib_ib.c	optional ipoib		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/ipoib/"
 ofed/drivers/infiniband/ulp/ipoib/ipoib_main.c	optional ipoib		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/ipoib/"
 ofed/drivers/infiniband/ulp/ipoib/ipoib_multicast.c	optional ipoib	\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/ipoib/"
 ofed/drivers/infiniband/ulp/ipoib/ipoib_verbs.c	optional ipoib		\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/ipoib/"
 #ofed/drivers/infiniband/ulp/ipoib/ipoib_vlan.c	optional ipoib		\
 #	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/ipoib/"
 
 ofed/drivers/infiniband/ulp/sdp/sdp_bcopy.c	optional sdp inet	\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/sdp/"
 ofed/drivers/infiniband/ulp/sdp/sdp_main.c	optional sdp inet 	\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/sdp/"
 ofed/drivers/infiniband/ulp/sdp/sdp_rx.c	optional sdp inet 	\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/sdp/"
 ofed/drivers/infiniband/ulp/sdp/sdp_cma.c	optional sdp inet 	\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/sdp/"
 ofed/drivers/infiniband/ulp/sdp/sdp_tx.c	optional sdp inet 	\
 	compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/sdp/"
 
 dev/mlx4/mlx4_ib/mlx4_ib_alias_GUID.c		optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_mcg.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_sysfs.c		optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_cm.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_ah.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_cq.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_doorbell.c		optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_mad.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_main.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_exp.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_mr.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_qp.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_srq.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_ib/mlx4_ib_wc.c			optional mlx4ib pci ofed \
 	compile-with "${OFED_C}"
 
 dev/mlx4/mlx4_core/mlx4_alloc.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_catas.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_cmd.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_cq.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_eq.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_fw.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_icm.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_intf.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_main.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_mcg.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_mr.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_pd.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_port.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_profile.c		optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_qp.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_reset.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_sense.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_srq.c			optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_resource_tracker.c	optional mlx4 pci \
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_core/mlx4_sys_tune.c		optional mlx4 pci \
 	compile-with "${OFED_C}"
 
 dev/mlx4/mlx4_en/mlx4_en_cq.c			optional mlx4en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_en/mlx4_en_main.c			optional mlx4en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_en/mlx4_en_netdev.c		optional mlx4en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_en/mlx4_en_port.c			optional mlx4en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_en/mlx4_en_resources.c		optional mlx4en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_en/mlx4_en_rx.c			optional mlx4en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx4/mlx4_en/mlx4_en_tx.c			optional mlx4en pci inet inet6	\
 	compile-with "${OFED_C}"
 
 dev/mlx5/mlx5_core/mlx5_alloc.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_cmd.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_cq.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_diagnostics.c		optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_eq.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_flow_table.c		optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_fw.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_health.c		optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_mad.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_main.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_mcg.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_mr.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_pagealloc.c		optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_pd.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_port.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_qp.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_srq.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_transobj.c		optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_uar.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_vport.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_core/mlx5_wq.c			optional mlx5 pci	\
 	compile-with "${OFED_C}"
 
 dev/mlx5/mlx5_en/mlx5_en_ethtool.c		optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_main.c			optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_tx.c			optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_flow_table.c		optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_rx.c			optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 dev/mlx5/mlx5_en/mlx5_en_txrx.c			optional mlx5en pci inet inet6	\
 	compile-with "${OFED_C}"
 
 ofed/drivers/infiniband/hw/mthca/mthca_allocator.c	optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_av.c		optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_catas.c		optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_cmd.c		optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_cq.c		optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_eq.c		optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_mad.c		optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_main.c		optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_mcg.c		optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_memfree.c	optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_mr.c		optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_pd.c		optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_profile.c	optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_provider.c	optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_qp.c		optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_reset.c		optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_srq.c		optional mthca	\
 	compile-with "${OFED_C}"
 ofed/drivers/infiniband/hw/mthca/mthca_uar.c		optional mthca	\
 	compile-with "${OFED_C}"
 
 # crypto support
 opencrypto/cast.c		optional crypto | ipsec | ipsec_support
 opencrypto/criov.c		optional crypto | ipsec | ipsec_support
 opencrypto/crypto.c		optional crypto | ipsec | ipsec_support
 opencrypto/cryptodev.c		optional cryptodev
 opencrypto/cryptodev_if.m	optional crypto | ipsec | ipsec_support
 opencrypto/cryptosoft.c		optional crypto | ipsec | ipsec_support
 opencrypto/cryptodeflate.c	optional crypto | ipsec | ipsec_support
 opencrypto/gmac.c		optional crypto | ipsec | ipsec_support
 opencrypto/gfmult.c		optional crypto | ipsec | ipsec_support
 opencrypto/rmd160.c		optional crypto | ipsec | ipsec_support
 opencrypto/skipjack.c		optional crypto | ipsec | ipsec_support
 opencrypto/xform.c		optional crypto | ipsec | ipsec_support
 rpc/auth_none.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/auth_unix.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/authunix_prot.c		optional krpc | nfslockd | nfscl | nfsd
 rpc/clnt_bck.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/clnt_dg.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/clnt_rc.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/clnt_vc.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/getnetconfig.c		optional krpc | nfslockd | nfscl | nfsd
 rpc/replay.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/rpc_callmsg.c		optional krpc | nfslockd | nfscl | nfsd
 rpc/rpc_generic.c		optional krpc | nfslockd | nfscl | nfsd
 rpc/rpc_prot.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/rpcb_clnt.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/rpcb_prot.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/svc.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/svc_auth.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/svc_auth_unix.c		optional krpc | nfslockd | nfscl | nfsd
 rpc/svc_dg.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/svc_generic.c		optional krpc | nfslockd | nfscl | nfsd
 rpc/svc_vc.c			optional krpc | nfslockd | nfscl | nfsd
 rpc/rpcsec_gss/rpcsec_gss.c	optional krpc kgssapi | nfslockd kgssapi | nfscl kgssapi | nfsd kgssapi
 rpc/rpcsec_gss/rpcsec_gss_conf.c optional krpc kgssapi | nfslockd kgssapi | nfscl kgssapi | nfsd kgssapi
 rpc/rpcsec_gss/rpcsec_gss_misc.c optional krpc kgssapi | nfslockd kgssapi | nfscl kgssapi | nfsd kgssapi
 rpc/rpcsec_gss/rpcsec_gss_prot.c optional krpc kgssapi | nfslockd kgssapi | nfscl kgssapi | nfsd kgssapi
 rpc/rpcsec_gss/svc_rpcsec_gss.c	optional krpc kgssapi | nfslockd kgssapi | nfscl kgssapi | nfsd kgssapi
 security/audit/audit.c		optional audit
 security/audit/audit_arg.c	optional audit
 security/audit/audit_bsm.c	optional audit
 security/audit/audit_bsm_klib.c	optional audit
 security/audit/audit_pipe.c	optional audit
 security/audit/audit_syscalls.c	standard
 security/audit/audit_trigger.c	optional audit
 security/audit/audit_worker.c	optional audit
 security/audit/bsm_domain.c	optional audit
 security/audit/bsm_errno.c	optional audit
 security/audit/bsm_fcntl.c	optional audit
 security/audit/bsm_socket_type.c	optional audit
 security/audit/bsm_token.c	optional audit
 security/mac/mac_audit.c	optional mac audit
 security/mac/mac_cred.c		optional mac
 security/mac/mac_framework.c	optional mac
 security/mac/mac_inet.c		optional mac inet | mac inet6
 security/mac/mac_inet6.c	optional mac inet6
 security/mac/mac_label.c	optional mac
 security/mac/mac_net.c		optional mac
 security/mac/mac_pipe.c		optional mac
 security/mac/mac_posix_sem.c	optional mac
 security/mac/mac_posix_shm.c	optional mac
 security/mac/mac_priv.c		optional mac
 security/mac/mac_process.c	optional mac
 security/mac/mac_socket.c	optional mac
 security/mac/mac_syscalls.c	standard
 security/mac/mac_system.c	optional mac
 security/mac/mac_sysv_msg.c	optional mac
 security/mac/mac_sysv_sem.c	optional mac
 security/mac/mac_sysv_shm.c	optional mac
 security/mac/mac_vfs.c		optional mac
 security/mac_biba/mac_biba.c	optional mac_biba
 security/mac_bsdextended/mac_bsdextended.c	optional mac_bsdextended
 security/mac_bsdextended/ugidfw_system.c	optional mac_bsdextended
 security/mac_bsdextended/ugidfw_vnode.c		optional mac_bsdextended
 security/mac_ifoff/mac_ifoff.c	optional mac_ifoff
 security/mac_lomac/mac_lomac.c	optional mac_lomac
 security/mac_mls/mac_mls.c	optional mac_mls
 security/mac_none/mac_none.c	optional mac_none
 security/mac_partition/mac_partition.c optional mac_partition
 security/mac_portacl/mac_portacl.c optional mac_portacl
 security/mac_seeotheruids/mac_seeotheruids.c optional mac_seeotheruids
 security/mac_stub/mac_stub.c	optional mac_stub
 security/mac_test/mac_test.c	optional mac_test
 teken/teken.c			optional sc | vt
 ufs/ffs/ffs_alloc.c		optional ffs
 ufs/ffs/ffs_balloc.c		optional ffs
 ufs/ffs/ffs_inode.c		optional ffs
 ufs/ffs/ffs_snapshot.c		optional ffs
 ufs/ffs/ffs_softdep.c		optional ffs
 ufs/ffs/ffs_subr.c		optional ffs
 ufs/ffs/ffs_tables.c		optional ffs
 ufs/ffs/ffs_vfsops.c		optional ffs
 ufs/ffs/ffs_vnops.c		optional ffs
 ufs/ffs/ffs_rawread.c		optional ffs directio
 ufs/ffs/ffs_suspend.c		optional ffs
 ufs/ufs/ufs_acl.c		optional ffs
 ufs/ufs/ufs_bmap.c		optional ffs
 ufs/ufs/ufs_dirhash.c		optional ffs
 ufs/ufs/ufs_extattr.c		optional ffs
 ufs/ufs/ufs_gjournal.c		optional ffs UFS_GJOURNAL
 ufs/ufs/ufs_inode.c		optional ffs
 ufs/ufs/ufs_lookup.c		optional ffs
 ufs/ufs/ufs_quota.c		optional ffs
 ufs/ufs/ufs_vfsops.c		optional ffs
 ufs/ufs/ufs_vnops.c		optional ffs
 vm/default_pager.c		standard
 vm/device_pager.c		standard
 vm/phys_pager.c			standard
 vm/redzone.c			optional DEBUG_REDZONE
 vm/sg_pager.c			standard
 vm/swap_pager.c			standard
 vm/uma_core.c			standard
 vm/uma_dbg.c			standard
 vm/memguard.c			optional DEBUG_MEMGUARD
 vm/vm_fault.c			standard
 vm/vm_glue.c			standard
 vm/vm_init.c			standard
 vm/vm_kern.c			standard
 vm/vm_map.c			standard
 vm/vm_meter.c			standard
 vm/vm_mmap.c			standard
 vm/vm_object.c			standard
 vm/vm_page.c			standard
 vm/vm_pageout.c			standard
 vm/vm_pager.c			standard
 vm/vm_phys.c			standard
 vm/vm_radix.c			standard
 vm/vm_reserv.c			standard
 vm/vm_domain.c			standard
 vm/vm_unix.c			standard
 vm/vnode_pager.c		standard
 xen/features.c			optional xenhvm
 xen/xenbus/xenbus_if.m		optional xenhvm
 xen/xenbus/xenbus.c		optional xenhvm
 xen/xenbus/xenbusb_if.m		optional xenhvm
 xen/xenbus/xenbusb.c		optional xenhvm
 xen/xenbus/xenbusb_front.c	optional xenhvm
 xen/xenbus/xenbusb_back.c	optional xenhvm
 xen/xenmem/xenmem_if.m		optional xenhvm
 xdr/xdr.c			optional krpc | nfslockd | nfscl | nfsd
 xdr/xdr_array.c			optional krpc | nfslockd | nfscl | nfsd
 xdr/xdr_mbuf.c			optional krpc | nfslockd | nfscl | nfsd
 xdr/xdr_mem.c			optional krpc | nfslockd | nfscl | nfsd
 xdr/xdr_reference.c		optional krpc | nfslockd | nfscl | nfsd
 xdr/xdr_sizeof.c		optional krpc | nfslockd | nfscl | nfsd
Index: head/sys/dev/iwm/if_iwm.c
===================================================================
--- head/sys/dev/iwm/if_iwm.c	(revision 314191)
+++ head/sys/dev/iwm/if_iwm.c	(revision 314192)
@@ -1,6522 +1,6538 @@
 /*	$OpenBSD: if_iwm.c,v 1.42 2015/05/30 02:49:23 deraadt Exp $	*/
 
 /*
  * Copyright (c) 2014 genua mbh <info@genua.de>
  * Copyright (c) 2014 Fixup Software Ltd.
  *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
  *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
 /*-
  * Based on BSD-licensed source modules in the Linux iwlwifi driver,
  * which were used as the reference documentation for this implementation.
  *
  * Driver version we are currently based off of is
  * Linux 3.14.3 (tag id a2df521e42b1d9a23f620ac79dbfe8655a8391dd)
  *
  ***********************************************************************
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
  * redistributing this file, you may do so under either license.
  *
  * GPL LICENSE SUMMARY
  *
  * Copyright(c) 2007 - 2013 Intel Corporation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of version 2 of the GNU General Public License as
  * published by the Free Software Foundation.
  *
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  * General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  * USA
  *
  * The full GNU General Public License is included in this distribution
  * in the file called COPYING.
  *
  * Contact Information:
  *  Intel Linux Wireless <ilw@linux.intel.com>
  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  *
  *
  * BSD LICENSE
  *
  * Copyright(c) 2005 - 2013 Intel Corporation. All rights reserved.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  *
  *  * Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  *  * Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in
  *    the documentation and/or other materials provided with the
  *    distribution.
  *  * Neither the name Intel Corporation nor the names of its
  *    contributors may be used to endorse or promote products derived
  *    from this software without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
 /*-
  * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr>
  *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
  *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
 #include "opt_wlan.h"
 
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/conf.h>
 #include <sys/endian.h>
 #include <sys/firmware.h>
 #include <sys/kernel.h>
 #include <sys/malloc.h>
 #include <sys/mbuf.h>
 #include <sys/mutex.h>
 #include <sys/module.h>
 #include <sys/proc.h>
 #include <sys/rman.h>
 #include <sys/socket.h>
 #include <sys/sockio.h>
 #include <sys/sysctl.h>
 #include <sys/linker.h>
 
 #include <machine/bus.h>
 #include <machine/endian.h>
 #include <machine/resource.h>
 
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pcireg.h>
 
 #include <net/bpf.h>
 
 #include <net/if.h>
 #include <net/if_var.h>
 #include <net/if_arp.h>
 #include <net/if_dl.h>
 #include <net/if_media.h>
 #include <net/if_types.h>
 
 #include <netinet/in.h>
 #include <netinet/in_systm.h>
 #include <netinet/if_ether.h>
 #include <netinet/ip.h>
 
 #include <net80211/ieee80211_var.h>
 #include <net80211/ieee80211_regdomain.h>
 #include <net80211/ieee80211_ratectl.h>
 #include <net80211/ieee80211_radiotap.h>
 
 #include <dev/iwm/if_iwmreg.h>
 #include <dev/iwm/if_iwmvar.h>
 #include <dev/iwm/if_iwm_config.h>
 #include <dev/iwm/if_iwm_debug.h>
 #include <dev/iwm/if_iwm_notif_wait.h>
 #include <dev/iwm/if_iwm_util.h>
 #include <dev/iwm/if_iwm_binding.h>
 #include <dev/iwm/if_iwm_phy_db.h>
 #include <dev/iwm/if_iwm_mac_ctxt.h>
 #include <dev/iwm/if_iwm_phy_ctxt.h>
 #include <dev/iwm/if_iwm_time_event.h>
 #include <dev/iwm/if_iwm_power.h>
 #include <dev/iwm/if_iwm_scan.h>
 
 #include <dev/iwm/if_iwm_pcie_trans.h>
 #include <dev/iwm/if_iwm_led.h>
+#include <dev/iwm/if_iwm_fw.h>
 
 const uint8_t iwm_nvm_channels[] = {
 	/* 2.4 GHz */
 	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
 	/* 5 GHz */
 	36, 40, 44, 48, 52, 56, 60, 64,
 	100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
 	149, 153, 157, 161, 165
 };
 _Static_assert(nitems(iwm_nvm_channels) <= IWM_NUM_CHANNELS,
     "IWM_NUM_CHANNELS is too small");
 
 const uint8_t iwm_nvm_channels_8000[] = {
 	/* 2.4 GHz */
 	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
 	/* 5 GHz */
 	36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
 	96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
 	149, 153, 157, 161, 165, 169, 173, 177, 181
 };
 _Static_assert(nitems(iwm_nvm_channels_8000) <= IWM_NUM_CHANNELS_8000,
     "IWM_NUM_CHANNELS_8000 is too small");
 
 #define IWM_NUM_2GHZ_CHANNELS	14
 #define IWM_N_HW_ADDR_MASK	0xF
 
 /*
  * XXX For now, there's simply a fixed set of rate table entries
  * that are populated.
  */
 const struct iwm_rate {
 	uint8_t rate;
 	uint8_t plcp;
 } iwm_rates[] = {
 	{   2,	IWM_RATE_1M_PLCP  },
 	{   4,	IWM_RATE_2M_PLCP  },
 	{  11,	IWM_RATE_5M_PLCP  },
 	{  22,	IWM_RATE_11M_PLCP },
 	{  12,	IWM_RATE_6M_PLCP  },
 	{  18,	IWM_RATE_9M_PLCP  },
 	{  24,	IWM_RATE_12M_PLCP },
 	{  36,	IWM_RATE_18M_PLCP },
 	{  48,	IWM_RATE_24M_PLCP },
 	{  72,	IWM_RATE_36M_PLCP },
 	{  96,	IWM_RATE_48M_PLCP },
 	{ 108,	IWM_RATE_54M_PLCP },
 };
 #define IWM_RIDX_CCK	0
 #define IWM_RIDX_OFDM	4
 #define IWM_RIDX_MAX	(nitems(iwm_rates)-1)
 #define IWM_RIDX_IS_CCK(_i_) ((_i_) < IWM_RIDX_OFDM)
 #define IWM_RIDX_IS_OFDM(_i_) ((_i_) >= IWM_RIDX_OFDM)
 
 struct iwm_nvm_section {
 	uint16_t length;
 	uint8_t *data;
 };
 
 #define IWM_MVM_UCODE_ALIVE_TIMEOUT	hz
 #define IWM_MVM_UCODE_CALIB_TIMEOUT	(2*hz)
 
 struct iwm_mvm_alive_data {
 	int valid;
 	uint32_t scd_base_addr;
 };
 
 static int	iwm_store_cscheme(struct iwm_softc *, const uint8_t *, size_t);
 static int	iwm_firmware_store_section(struct iwm_softc *,
                                            enum iwm_ucode_type,
                                            const uint8_t *, size_t);
 static int	iwm_set_default_calib(struct iwm_softc *, const void *);
 static void	iwm_fw_info_free(struct iwm_fw_info *);
 static int	iwm_read_firmware(struct iwm_softc *, enum iwm_ucode_type);
 static int	iwm_alloc_fwmem(struct iwm_softc *);
 static int	iwm_alloc_sched(struct iwm_softc *);
 static int	iwm_alloc_kw(struct iwm_softc *);
 static int	iwm_alloc_ict(struct iwm_softc *);
 static int	iwm_alloc_rx_ring(struct iwm_softc *, struct iwm_rx_ring *);
 static void	iwm_reset_rx_ring(struct iwm_softc *, struct iwm_rx_ring *);
 static void	iwm_free_rx_ring(struct iwm_softc *, struct iwm_rx_ring *);
 static int	iwm_alloc_tx_ring(struct iwm_softc *, struct iwm_tx_ring *,
                                   int);
 static void	iwm_reset_tx_ring(struct iwm_softc *, struct iwm_tx_ring *);
 static void	iwm_free_tx_ring(struct iwm_softc *, struct iwm_tx_ring *);
 static void	iwm_enable_interrupts(struct iwm_softc *);
 static void	iwm_restore_interrupts(struct iwm_softc *);
 static void	iwm_disable_interrupts(struct iwm_softc *);
 static void	iwm_ict_reset(struct iwm_softc *);
 static int	iwm_allow_mcast(struct ieee80211vap *, struct iwm_softc *);
 static void	iwm_stop_device(struct iwm_softc *);
 static void	iwm_mvm_nic_config(struct iwm_softc *);
 static int	iwm_nic_rx_init(struct iwm_softc *);
 static int	iwm_nic_tx_init(struct iwm_softc *);
 static int	iwm_nic_init(struct iwm_softc *);
 static int	iwm_enable_txq(struct iwm_softc *, int, int, int);
 static int	iwm_trans_pcie_fw_alive(struct iwm_softc *, uint32_t);
 static int	iwm_nvm_read_chunk(struct iwm_softc *, uint16_t, uint16_t,
                                    uint16_t, uint8_t *, uint16_t *);
 static int	iwm_nvm_read_section(struct iwm_softc *, uint16_t, uint8_t *,
 				     uint16_t *, uint32_t);
 static uint32_t	iwm_eeprom_channel_flags(uint16_t);
 static void	iwm_add_channel_band(struct iwm_softc *,
 		    struct ieee80211_channel[], int, int *, int, size_t,
 		    const uint8_t[]);
 static void	iwm_init_channel_map(struct ieee80211com *, int, int *,
 		    struct ieee80211_channel[]);
 static struct iwm_nvm_data *
 	iwm_parse_nvm_data(struct iwm_softc *, const uint16_t *,
 			   const uint16_t *, const uint16_t *,
 			   const uint16_t *, const uint16_t *,
 			   const uint16_t *);
 static void	iwm_free_nvm_data(struct iwm_nvm_data *);
 static void	iwm_set_hw_address_family_8000(struct iwm_softc *,
 					       struct iwm_nvm_data *,
 					       const uint16_t *,
 					       const uint16_t *);
 static int	iwm_get_sku(const struct iwm_softc *, const uint16_t *,
 			    const uint16_t *);
 static int	iwm_get_nvm_version(const struct iwm_softc *, const uint16_t *);
 static int	iwm_get_radio_cfg(const struct iwm_softc *, const uint16_t *,
 				  const uint16_t *);
 static int	iwm_get_n_hw_addrs(const struct iwm_softc *,
 				   const uint16_t *);
 static void	iwm_set_radio_cfg(const struct iwm_softc *,
 				  struct iwm_nvm_data *, uint32_t);
 static struct iwm_nvm_data *
 	iwm_parse_nvm_sections(struct iwm_softc *, struct iwm_nvm_section *);
 static int	iwm_nvm_init(struct iwm_softc *);
 static int	iwm_pcie_load_section(struct iwm_softc *, uint8_t,
 				      const struct iwm_fw_desc *);
 static int	iwm_pcie_load_firmware_chunk(struct iwm_softc *, uint32_t,
 					     bus_addr_t, uint32_t);
 static int	iwm_pcie_load_cpu_sections_8000(struct iwm_softc *sc,
 						const struct iwm_fw_sects *,
 						int, int *);
 static int	iwm_pcie_load_cpu_sections(struct iwm_softc *,
 					   const struct iwm_fw_sects *,
 					   int, int *);
 static int	iwm_pcie_load_given_ucode_8000(struct iwm_softc *,
 					       const struct iwm_fw_sects *);
 static int	iwm_pcie_load_given_ucode(struct iwm_softc *,
 					  const struct iwm_fw_sects *);
 static int	iwm_start_fw(struct iwm_softc *, const struct iwm_fw_sects *);
 static int	iwm_send_tx_ant_cfg(struct iwm_softc *, uint8_t);
 static int	iwm_send_phy_cfg_cmd(struct iwm_softc *);
 static int	iwm_mvm_load_ucode_wait_alive(struct iwm_softc *,
                                               enum iwm_ucode_type);
 static int	iwm_run_init_mvm_ucode(struct iwm_softc *, int);
 static int	iwm_rx_addbuf(struct iwm_softc *, int, int);
 static int	iwm_mvm_calc_rssi(struct iwm_softc *, struct iwm_rx_phy_info *);
 static int	iwm_mvm_get_signal_strength(struct iwm_softc *,
 					    struct iwm_rx_phy_info *);
 static void	iwm_mvm_rx_rx_phy_cmd(struct iwm_softc *,
                                       struct iwm_rx_packet *,
                                       struct iwm_rx_data *);
 static int	iwm_get_noise(struct iwm_softc *sc,
 		    const struct iwm_mvm_statistics_rx_non_phy *);
 static void	iwm_mvm_rx_rx_mpdu(struct iwm_softc *, struct iwm_rx_packet *,
                                    struct iwm_rx_data *);
 static int	iwm_mvm_rx_tx_cmd_single(struct iwm_softc *,
                                          struct iwm_rx_packet *,
 				         struct iwm_node *);
 static void	iwm_mvm_rx_tx_cmd(struct iwm_softc *, struct iwm_rx_packet *,
                                   struct iwm_rx_data *);
 static void	iwm_cmd_done(struct iwm_softc *, struct iwm_rx_packet *);
 #if 0
 static void	iwm_update_sched(struct iwm_softc *, int, int, uint8_t,
                                  uint16_t);
 #endif
 static const struct iwm_rate *
 	iwm_tx_fill_cmd(struct iwm_softc *, struct iwm_node *,
 			struct mbuf *, struct iwm_tx_cmd *);
 static int	iwm_tx(struct iwm_softc *, struct mbuf *,
                        struct ieee80211_node *, int);
 static int	iwm_raw_xmit(struct ieee80211_node *, struct mbuf *,
 			     const struct ieee80211_bpf_params *);
 static int	iwm_mvm_flush_tx_path(struct iwm_softc *sc,
 				      uint32_t tfd_msk, uint32_t flags);
 static int	iwm_mvm_send_add_sta_cmd_status(struct iwm_softc *,
 					        struct iwm_mvm_add_sta_cmd_v7 *,
                                                 int *);
 static int	iwm_mvm_sta_send_to_fw(struct iwm_softc *, struct iwm_node *,
                                        int);
 static int	iwm_mvm_add_sta(struct iwm_softc *, struct iwm_node *);
 static int	iwm_mvm_update_sta(struct iwm_softc *, struct iwm_node *);
 static int	iwm_mvm_add_int_sta_common(struct iwm_softc *,
                                            struct iwm_int_sta *,
 				           const uint8_t *, uint16_t, uint16_t);
 static int	iwm_mvm_add_aux_sta(struct iwm_softc *);
 static int	iwm_mvm_update_quotas(struct iwm_softc *, struct iwm_node *);
 static int	iwm_auth(struct ieee80211vap *, struct iwm_softc *);
 static int	iwm_assoc(struct ieee80211vap *, struct iwm_softc *);
 static int	iwm_release(struct iwm_softc *, struct iwm_node *);
 static struct ieee80211_node *
 		iwm_node_alloc(struct ieee80211vap *,
 		               const uint8_t[IEEE80211_ADDR_LEN]);
 static void	iwm_setrates(struct iwm_softc *, struct iwm_node *);
 static int	iwm_media_change(struct ifnet *);
 static int	iwm_newstate(struct ieee80211vap *, enum ieee80211_state, int);
 static void	iwm_endscan_cb(void *, int);
 static void	iwm_mvm_fill_sf_command(struct iwm_softc *,
 					struct iwm_sf_cfg_cmd *,
 					struct ieee80211_node *);
 static int	iwm_mvm_sf_config(struct iwm_softc *, enum iwm_sf_state);
 static int	iwm_send_bt_init_conf(struct iwm_softc *);
 static int	iwm_send_update_mcc_cmd(struct iwm_softc *, const char *);
 static void	iwm_mvm_tt_tx_backoff(struct iwm_softc *, uint32_t);
 static int	iwm_init_hw(struct iwm_softc *);
 static void	iwm_init(struct iwm_softc *);
 static void	iwm_start(struct iwm_softc *);
 static void	iwm_stop(struct iwm_softc *);
 static void	iwm_watchdog(void *);
 static void	iwm_parent(struct ieee80211com *);
 #ifdef IWM_DEBUG
 static const char *
 		iwm_desc_lookup(uint32_t);
 static void	iwm_nic_error(struct iwm_softc *);
 static void	iwm_nic_umac_error(struct iwm_softc *);
 #endif
 static void	iwm_notif_intr(struct iwm_softc *);
 static void	iwm_intr(void *);
 static int	iwm_attach(device_t);
 static int	iwm_is_valid_ether_addr(uint8_t *);
 static void	iwm_preinit(void *);
 static int	iwm_detach_local(struct iwm_softc *sc, int);
 static void	iwm_init_task(void *);
 static void	iwm_radiotap_attach(struct iwm_softc *);
 static struct ieee80211vap *
 		iwm_vap_create(struct ieee80211com *,
 		               const char [IFNAMSIZ], int,
 		               enum ieee80211_opmode, int,
 		               const uint8_t [IEEE80211_ADDR_LEN],
 		               const uint8_t [IEEE80211_ADDR_LEN]);
 static void	iwm_vap_delete(struct ieee80211vap *);
 static void	iwm_scan_start(struct ieee80211com *);
 static void	iwm_scan_end(struct ieee80211com *);
 static void	iwm_update_mcast(struct ieee80211com *);
 static void	iwm_set_channel(struct ieee80211com *);
 static void	iwm_scan_curchan(struct ieee80211_scan_state *, unsigned long);
 static void	iwm_scan_mindwell(struct ieee80211_scan_state *);
 static int	iwm_detach(device_t);
 
 /*
  * Firmware parser.
  */
 
 static int
 iwm_store_cscheme(struct iwm_softc *sc, const uint8_t *data, size_t dlen)
 {
 	const struct iwm_fw_cscheme_list *l = (const void *)data;
 
 	if (dlen < sizeof(*l) ||
 	    dlen < sizeof(l->size) + l->size * sizeof(*l->cs))
 		return EINVAL;
 
 	/* we don't actually store anything for now, always use s/w crypto */
 
 	return 0;
 }
 
 static int
 iwm_firmware_store_section(struct iwm_softc *sc,
     enum iwm_ucode_type type, const uint8_t *data, size_t dlen)
 {
 	struct iwm_fw_sects *fws;
 	struct iwm_fw_desc *fwone;
 
 	if (type >= IWM_UCODE_TYPE_MAX)
 		return EINVAL;
 	if (dlen < sizeof(uint32_t))
 		return EINVAL;
 
 	fws = &sc->sc_fw.fw_sects[type];
 	if (fws->fw_count >= IWM_UCODE_SECTION_MAX)
 		return EINVAL;
 
 	fwone = &fws->fw_sect[fws->fw_count];
 
 	/* first 32bit are device load offset */
 	memcpy(&fwone->offset, data, sizeof(uint32_t));
 
 	/* rest is data */
 	fwone->data = data + sizeof(uint32_t);
 	fwone->len = dlen - sizeof(uint32_t);
 
 	fws->fw_count++;
 
 	return 0;
 }
 
 #define IWM_DEFAULT_SCAN_CHANNELS 40
 
 /* iwlwifi: iwl-drv.c */
 struct iwm_tlv_calib_data {
 	uint32_t ucode_type;
 	struct iwm_tlv_calib_ctrl calib;
 } __packed;
 
 static int
 iwm_set_default_calib(struct iwm_softc *sc, const void *data)
 {
 	const struct iwm_tlv_calib_data *def_calib = data;
 	uint32_t ucode_type = le32toh(def_calib->ucode_type);
 
 	if (ucode_type >= IWM_UCODE_TYPE_MAX) {
 		device_printf(sc->sc_dev,
 		    "Wrong ucode_type %u for default "
 		    "calibration.\n", ucode_type);
 		return EINVAL;
 	}
 
 	sc->sc_default_calib[ucode_type].flow_trigger =
 	    def_calib->calib.flow_trigger;
 	sc->sc_default_calib[ucode_type].event_trigger =
 	    def_calib->calib.event_trigger;
 
 	return 0;
 }
 
 static void
 iwm_fw_info_free(struct iwm_fw_info *fw)
 {
 	firmware_put(fw->fw_fp, FIRMWARE_UNLOAD);
 	fw->fw_fp = NULL;
 	/* don't touch fw->fw_status */
 	memset(fw->fw_sects, 0, sizeof(fw->fw_sects));
 }
 
 static int
 iwm_read_firmware(struct iwm_softc *sc, enum iwm_ucode_type ucode_type)
 {
 	struct iwm_fw_info *fw = &sc->sc_fw;
 	const struct iwm_tlv_ucode_header *uhdr;
 	struct iwm_ucode_tlv tlv;
 	enum iwm_ucode_tlv_type tlv_type;
 	const struct firmware *fwp;
 	const uint8_t *data;
 	uint32_t usniffer_img;
 	uint32_t paging_mem_size;
 	int num_of_cpus;
 	int error = 0;
 	size_t len;
 
 	if (fw->fw_status == IWM_FW_STATUS_DONE &&
 	    ucode_type != IWM_UCODE_INIT)
 		return 0;
 
 	while (fw->fw_status == IWM_FW_STATUS_INPROGRESS)
 		msleep(&sc->sc_fw, &sc->sc_mtx, 0, "iwmfwp", 0);
 	fw->fw_status = IWM_FW_STATUS_INPROGRESS;
 
 	if (fw->fw_fp != NULL)
 		iwm_fw_info_free(fw);
 
 	/*
 	 * Load firmware into driver memory.
 	 * fw_fp will be set.
 	 */
 	IWM_UNLOCK(sc);
 	fwp = firmware_get(sc->cfg->fw_name);
 	IWM_LOCK(sc);
 	if (fwp == NULL) {
 		device_printf(sc->sc_dev,
 		    "could not read firmware %s (error %d)\n",
 		    sc->cfg->fw_name, error);
 		goto out;
 	}
 	fw->fw_fp = fwp;
 
 	/* (Re-)Initialize default values. */
 	sc->sc_capaflags = 0;
 	sc->sc_capa_n_scan_channels = IWM_DEFAULT_SCAN_CHANNELS;
 	memset(sc->sc_enabled_capa, 0, sizeof(sc->sc_enabled_capa));
 	memset(sc->sc_fw_mcc, 0, sizeof(sc->sc_fw_mcc));
 
 	/*
 	 * Parse firmware contents
 	 */
 
 	uhdr = (const void *)fw->fw_fp->data;
 	if (*(const uint32_t *)fw->fw_fp->data != 0
 	    || le32toh(uhdr->magic) != IWM_TLV_UCODE_MAGIC) {
 		device_printf(sc->sc_dev, "invalid firmware %s\n",
 		    sc->cfg->fw_name);
 		error = EINVAL;
 		goto out;
 	}
 
 	snprintf(sc->sc_fwver, sizeof(sc->sc_fwver), "%d.%d (API ver %d)",
 	    IWM_UCODE_MAJOR(le32toh(uhdr->ver)),
 	    IWM_UCODE_MINOR(le32toh(uhdr->ver)),
 	    IWM_UCODE_API(le32toh(uhdr->ver)));
 	data = uhdr->data;
 	len = fw->fw_fp->datasize - sizeof(*uhdr);
 
 	while (len >= sizeof(tlv)) {
 		size_t tlv_len;
 		const void *tlv_data;
 
 		memcpy(&tlv, data, sizeof(tlv));
 		tlv_len = le32toh(tlv.length);
 		tlv_type = le32toh(tlv.type);
 
 		len -= sizeof(tlv);
 		data += sizeof(tlv);
 		tlv_data = data;
 
 		if (len < tlv_len) {
 			device_printf(sc->sc_dev,
 			    "firmware too short: %zu bytes\n",
 			    len);
 			error = EINVAL;
 			goto parse_out;
 		}
 
 		switch ((int)tlv_type) {
 		case IWM_UCODE_TLV_PROBE_MAX_LEN:
 			if (tlv_len < sizeof(uint32_t)) {
 				device_printf(sc->sc_dev,
 				    "%s: PROBE_MAX_LEN (%d) < sizeof(uint32_t)\n",
 				    __func__,
 				    (int) tlv_len);
 				error = EINVAL;
 				goto parse_out;
 			}
 			sc->sc_capa_max_probe_len
 			    = le32toh(*(const uint32_t *)tlv_data);
 			/* limit it to something sensible */
 			if (sc->sc_capa_max_probe_len >
 			    IWM_SCAN_OFFLOAD_PROBE_REQ_SIZE) {
 				IWM_DPRINTF(sc, IWM_DEBUG_FIRMWARE_TLV,
 				    "%s: IWM_UCODE_TLV_PROBE_MAX_LEN "
 				    "ridiculous\n", __func__);
 				error = EINVAL;
 				goto parse_out;
 			}
 			break;
 		case IWM_UCODE_TLV_PAN:
 			if (tlv_len) {
 				device_printf(sc->sc_dev,
 				    "%s: IWM_UCODE_TLV_PAN: tlv_len (%d) > 0\n",
 				    __func__,
 				    (int) tlv_len);
 				error = EINVAL;
 				goto parse_out;
 			}
 			sc->sc_capaflags |= IWM_UCODE_TLV_FLAGS_PAN;
 			break;
 		case IWM_UCODE_TLV_FLAGS:
 			if (tlv_len < sizeof(uint32_t)) {
 				device_printf(sc->sc_dev,
 				    "%s: IWM_UCODE_TLV_FLAGS: tlv_len (%d) < sizeof(uint32_t)\n",
 				    __func__,
 				    (int) tlv_len);
 				error = EINVAL;
 				goto parse_out;
 			}
 			/*
 			 * Apparently there can be many flags, but Linux driver
 			 * parses only the first one, and so do we.
 			 *
 			 * XXX: why does this override IWM_UCODE_TLV_PAN?
 			 * Intentional or a bug?  Observations from
 			 * current firmware file:
 			 *  1) TLV_PAN is parsed first
 			 *  2) TLV_FLAGS contains TLV_FLAGS_PAN
 			 * ==> this resets TLV_PAN to itself... hnnnk
 			 */
 			sc->sc_capaflags = le32toh(*(const uint32_t *)tlv_data);
 			break;
 		case IWM_UCODE_TLV_CSCHEME:
 			if ((error = iwm_store_cscheme(sc,
 			    tlv_data, tlv_len)) != 0) {
 				device_printf(sc->sc_dev,
 				    "%s: iwm_store_cscheme(): returned %d\n",
 				    __func__,
 				    error);
 				goto parse_out;
 			}
 			break;
 		case IWM_UCODE_TLV_NUM_OF_CPU:
 			if (tlv_len != sizeof(uint32_t)) {
 				device_printf(sc->sc_dev,
 				    "%s: IWM_UCODE_TLV_NUM_OF_CPU: tlv_len (%d) != sizeof(uint32_t)\n",
 				    __func__,
 				    (int) tlv_len);
 				error = EINVAL;
 				goto parse_out;
 			}
 			num_of_cpus = le32toh(*(const uint32_t *)tlv_data);
 			if (num_of_cpus == 2) {
 				fw->fw_sects[IWM_UCODE_REGULAR].is_dual_cpus =
 					TRUE;
 				fw->fw_sects[IWM_UCODE_INIT].is_dual_cpus =
 					TRUE;
 				fw->fw_sects[IWM_UCODE_WOWLAN].is_dual_cpus =
 					TRUE;
 			} else if ((num_of_cpus > 2) || (num_of_cpus < 1)) {
 				device_printf(sc->sc_dev,
 				    "%s: Driver supports only 1 or 2 CPUs\n",
 				    __func__);
 				error = EINVAL;
 				goto parse_out;
 			}
 			break;
 		case IWM_UCODE_TLV_SEC_RT:
 			if ((error = iwm_firmware_store_section(sc,
 			    IWM_UCODE_REGULAR, tlv_data, tlv_len)) != 0) {
 				device_printf(sc->sc_dev,
 				    "%s: IWM_UCODE_REGULAR: iwm_firmware_store_section() failed; %d\n",
 				    __func__,
 				    error);
 				goto parse_out;
 			}
 			break;
 		case IWM_UCODE_TLV_SEC_INIT:
 			if ((error = iwm_firmware_store_section(sc,
 			    IWM_UCODE_INIT, tlv_data, tlv_len)) != 0) {
 				device_printf(sc->sc_dev,
 				    "%s: IWM_UCODE_INIT: iwm_firmware_store_section() failed; %d\n",
 				    __func__,
 				    error);
 				goto parse_out;
 			}
 			break;
 		case IWM_UCODE_TLV_SEC_WOWLAN:
 			if ((error = iwm_firmware_store_section(sc,
 			    IWM_UCODE_WOWLAN, tlv_data, tlv_len)) != 0) {
 				device_printf(sc->sc_dev,
 				    "%s: IWM_UCODE_WOWLAN: iwm_firmware_store_section() failed; %d\n",
 				    __func__,
 				    error);
 				goto parse_out;
 			}
 			break;
 		case IWM_UCODE_TLV_DEF_CALIB:
 			if (tlv_len != sizeof(struct iwm_tlv_calib_data)) {
 				device_printf(sc->sc_dev,
 				    "%s: IWM_UCODE_TLV_DEV_CALIB: tlv_len (%d) < sizeof(iwm_tlv_calib_data) (%d)\n",
 				    __func__,
 				    (int) tlv_len,
 				    (int) sizeof(struct iwm_tlv_calib_data));
 				error = EINVAL;
 				goto parse_out;
 			}
 			if ((error = iwm_set_default_calib(sc, tlv_data)) != 0) {
 				device_printf(sc->sc_dev,
 				    "%s: iwm_set_default_calib() failed: %d\n",
 				    __func__,
 				    error);
 				goto parse_out;
 			}
 			break;
 		case IWM_UCODE_TLV_PHY_SKU:
 			if (tlv_len != sizeof(uint32_t)) {
 				error = EINVAL;
 				device_printf(sc->sc_dev,
 				    "%s: IWM_UCODE_TLV_PHY_SKU: tlv_len (%d) < sizeof(uint32_t)\n",
 				    __func__,
 				    (int) tlv_len);
 				goto parse_out;
 			}
 			sc->sc_fw.phy_config =
 			    le32toh(*(const uint32_t *)tlv_data);
 			sc->sc_fw.valid_tx_ant = (sc->sc_fw.phy_config &
 						  IWM_FW_PHY_CFG_TX_CHAIN) >>
 						  IWM_FW_PHY_CFG_TX_CHAIN_POS;
 			sc->sc_fw.valid_rx_ant = (sc->sc_fw.phy_config &
 						  IWM_FW_PHY_CFG_RX_CHAIN) >>
 						  IWM_FW_PHY_CFG_RX_CHAIN_POS;
 			break;
 
 		case IWM_UCODE_TLV_API_CHANGES_SET: {
 			const struct iwm_ucode_api *api;
 			if (tlv_len != sizeof(*api)) {
 				error = EINVAL;
 				goto parse_out;
 			}
 			api = (const struct iwm_ucode_api *)tlv_data;
 			/* Flags may exceed 32 bits in future firmware. */
 			if (le32toh(api->api_index) > 0) {
 				device_printf(sc->sc_dev,
 				    "unsupported API index %d\n",
 				    le32toh(api->api_index));
 				goto parse_out;
 			}
 			sc->sc_ucode_api = le32toh(api->api_flags);
 			break;
 		}
 
 		case IWM_UCODE_TLV_ENABLED_CAPABILITIES: {
 			const struct iwm_ucode_capa *capa;
 			int idx, i;
 			if (tlv_len != sizeof(*capa)) {
 				error = EINVAL;
 				goto parse_out;
 			}
 			capa = (const struct iwm_ucode_capa *)tlv_data;
 			idx = le32toh(capa->api_index);
 			if (idx >= howmany(IWM_NUM_UCODE_TLV_CAPA, 32)) {
 				device_printf(sc->sc_dev,
 				    "unsupported API index %d\n", idx);
 				goto parse_out;
 			}
 			for (i = 0; i < 32; i++) {
 				if ((le32toh(capa->api_capa) & (1U << i)) == 0)
 					continue;
 				setbit(sc->sc_enabled_capa, i + (32 * idx));
 			}
 			break;
 		}
 
 		case 48: /* undocumented TLV */
 		case IWM_UCODE_TLV_SDIO_ADMA_ADDR:
 		case IWM_UCODE_TLV_FW_GSCAN_CAPA:
 			/* ignore, not used by current driver */
 			break;
 
 		case IWM_UCODE_TLV_SEC_RT_USNIFFER:
 			if ((error = iwm_firmware_store_section(sc,
 			    IWM_UCODE_REGULAR_USNIFFER, tlv_data,
 			    tlv_len)) != 0)
 				goto parse_out;
 			break;
 
 		case IWM_UCODE_TLV_PAGING:
 			if (tlv_len != sizeof(uint32_t)) {
 				error = EINVAL;
 				goto parse_out;
 			}
 			paging_mem_size = le32toh(*(const uint32_t *)tlv_data);
 
 			IWM_DPRINTF(sc, IWM_DEBUG_FIRMWARE_TLV,
 			    "%s: Paging: paging enabled (size = %u bytes)\n",
 			    __func__, paging_mem_size);
 			if (paging_mem_size > IWM_MAX_PAGING_IMAGE_SIZE) {
 				device_printf(sc->sc_dev,
 					"%s: Paging: driver supports up to %u bytes for paging image\n",
 					__func__, IWM_MAX_PAGING_IMAGE_SIZE);
 				error = EINVAL;
 				goto out;
 			}
 			if (paging_mem_size & (IWM_FW_PAGING_SIZE - 1)) {
 				device_printf(sc->sc_dev,
 				    "%s: Paging: image isn't multiple %u\n",
 				    __func__, IWM_FW_PAGING_SIZE);
 				error = EINVAL;
 				goto out;
 			}
 
 			sc->sc_fw.fw_sects[IWM_UCODE_REGULAR].paging_mem_size =
 			    paging_mem_size;
 			usniffer_img = IWM_UCODE_REGULAR_USNIFFER;
 			sc->sc_fw.fw_sects[usniffer_img].paging_mem_size =
 			    paging_mem_size;
 			break;
 
 		case IWM_UCODE_TLV_N_SCAN_CHANNELS:
 			if (tlv_len != sizeof(uint32_t)) {
 				error = EINVAL;
 				goto parse_out;
 			}
 			sc->sc_capa_n_scan_channels =
 			  le32toh(*(const uint32_t *)tlv_data);
 			break;
 
 		case IWM_UCODE_TLV_FW_VERSION:
 			if (tlv_len != sizeof(uint32_t) * 3) {
 				error = EINVAL;
 				goto parse_out;
 			}
 			snprintf(sc->sc_fwver, sizeof(sc->sc_fwver),
 			    "%d.%d.%d",
 			    le32toh(((const uint32_t *)tlv_data)[0]),
 			    le32toh(((const uint32_t *)tlv_data)[1]),
 			    le32toh(((const uint32_t *)tlv_data)[2]));
 			break;
 
 		case IWM_UCODE_TLV_FW_MEM_SEG:
 			break;
 
 		default:
 			device_printf(sc->sc_dev,
 			    "%s: unknown firmware section %d, abort\n",
 			    __func__, tlv_type);
 			error = EINVAL;
 			goto parse_out;
 		}
 
 		len -= roundup(tlv_len, 4);
 		data += roundup(tlv_len, 4);
 	}
 
 	KASSERT(error == 0, ("unhandled error"));
 
  parse_out:
 	if (error) {
 		device_printf(sc->sc_dev, "firmware parse error %d, "
 		    "section type %d\n", error, tlv_type);
 	}
 
 	if (!(sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_PM_CMD_SUPPORT)) {
 		device_printf(sc->sc_dev,
 		    "device uses unsupported power ops\n");
 		error = ENOTSUP;
 	}
 
  out:
 	if (error) {
 		fw->fw_status = IWM_FW_STATUS_NONE;
 		if (fw->fw_fp != NULL)
 			iwm_fw_info_free(fw);
 	} else
 		fw->fw_status = IWM_FW_STATUS_DONE;
 	wakeup(&sc->sc_fw);
 
 	return error;
 }
 
 /*
  * DMA resource routines
  */
 
 /* fwmem is used to load firmware onto the card */
 static int
 iwm_alloc_fwmem(struct iwm_softc *sc)
 {
 	/* Must be aligned on a 16-byte boundary. */
 	return iwm_dma_contig_alloc(sc->sc_dmat, &sc->fw_dma,
 	    IWM_FH_MEM_TB_MAX_LENGTH, 16);
 }
 
 /* tx scheduler rings.  not used? */
 static int
 iwm_alloc_sched(struct iwm_softc *sc)
 {
 	/* TX scheduler rings must be aligned on a 1KB boundary. */
 	return iwm_dma_contig_alloc(sc->sc_dmat, &sc->sched_dma,
 	    nitems(sc->txq) * sizeof(struct iwm_agn_scd_bc_tbl), 1024);
 }
 
 /* keep-warm page is used internally by the card.  see iwl-fh.h for more info */
 static int
 iwm_alloc_kw(struct iwm_softc *sc)
 {
 	return iwm_dma_contig_alloc(sc->sc_dmat, &sc->kw_dma, 4096, 4096);
 }
 
 /* interrupt cause table */
 static int
 iwm_alloc_ict(struct iwm_softc *sc)
 {
 	return iwm_dma_contig_alloc(sc->sc_dmat, &sc->ict_dma,
 	    IWM_ICT_SIZE, 1<<IWM_ICT_PADDR_SHIFT);
 }
 
 static int
 iwm_alloc_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring)
 {
 	bus_size_t size;
 	int i, error;
 
 	ring->cur = 0;
 
 	/* Allocate RX descriptors (256-byte aligned). */
 	size = IWM_RX_RING_COUNT * sizeof(uint32_t);
 	error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma, size, 256);
 	if (error != 0) {
 		device_printf(sc->sc_dev,
 		    "could not allocate RX ring DMA memory\n");
 		goto fail;
 	}
 	ring->desc = ring->desc_dma.vaddr;
 
 	/* Allocate RX status area (16-byte aligned). */
 	error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->stat_dma,
 	    sizeof(*ring->stat), 16);
 	if (error != 0) {
 		device_printf(sc->sc_dev,
 		    "could not allocate RX status DMA memory\n");
 		goto fail;
 	}
 	ring->stat = ring->stat_dma.vaddr;
 
         /* Create RX buffer DMA tag. */
         error = bus_dma_tag_create(sc->sc_dmat, 1, 0,
             BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
             IWM_RBUF_SIZE, 1, IWM_RBUF_SIZE, 0, NULL, NULL, &ring->data_dmat);
         if (error != 0) {
                 device_printf(sc->sc_dev,
                     "%s: could not create RX buf DMA tag, error %d\n",
                     __func__, error);
                 goto fail;
         }
 
 	/* Allocate spare bus_dmamap_t for iwm_rx_addbuf() */
 	error = bus_dmamap_create(ring->data_dmat, 0, &ring->spare_map);
 	if (error != 0) {
 		device_printf(sc->sc_dev,
 		    "%s: could not create RX buf DMA map, error %d\n",
 		    __func__, error);
 		goto fail;
 	}
 	/*
 	 * Allocate and map RX buffers.
 	 */
 	for (i = 0; i < IWM_RX_RING_COUNT; i++) {
 		struct iwm_rx_data *data = &ring->data[i];
 		error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
 		if (error != 0) {
 			device_printf(sc->sc_dev,
 			    "%s: could not create RX buf DMA map, error %d\n",
 			    __func__, error);
 			goto fail;
 		}
 		data->m = NULL;
 
 		if ((error = iwm_rx_addbuf(sc, IWM_RBUF_SIZE, i)) != 0) {
 			goto fail;
 		}
 	}
 	return 0;
 
 fail:	iwm_free_rx_ring(sc, ring);
 	return error;
 }
 
 static void
 iwm_reset_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring)
 {
 	/* Reset the ring state */
 	ring->cur = 0;
 
 	/*
 	 * The hw rx ring index in shared memory must also be cleared,
 	 * otherwise the discrepancy can cause reprocessing chaos.
 	 */
 	memset(sc->rxq.stat, 0, sizeof(*sc->rxq.stat));
 }
 
 static void
 iwm_free_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring)
 {
 	int i;
 
 	iwm_dma_contig_free(&ring->desc_dma);
 	iwm_dma_contig_free(&ring->stat_dma);
 
 	for (i = 0; i < IWM_RX_RING_COUNT; i++) {
 		struct iwm_rx_data *data = &ring->data[i];
 
 		if (data->m != NULL) {
 			bus_dmamap_sync(ring->data_dmat, data->map,
 			    BUS_DMASYNC_POSTREAD);
 			bus_dmamap_unload(ring->data_dmat, data->map);
 			m_freem(data->m);
 			data->m = NULL;
 		}
 		if (data->map != NULL) {
 			bus_dmamap_destroy(ring->data_dmat, data->map);
 			data->map = NULL;
 		}
 	}
 	if (ring->spare_map != NULL) {
 		bus_dmamap_destroy(ring->data_dmat, ring->spare_map);
 		ring->spare_map = NULL;
 	}
 	if (ring->data_dmat != NULL) {
 		bus_dma_tag_destroy(ring->data_dmat);
 		ring->data_dmat = NULL;
 	}
 }
 
 static int
 iwm_alloc_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring, int qid)
 {
 	bus_addr_t paddr;
 	bus_size_t size;
 	size_t maxsize;
 	int nsegments;
 	int i, error;
 
 	ring->qid = qid;
 	ring->queued = 0;
 	ring->cur = 0;
 
 	/* Allocate TX descriptors (256-byte aligned). */
 	size = IWM_TX_RING_COUNT * sizeof (struct iwm_tfd);
 	error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma, size, 256);
 	if (error != 0) {
 		device_printf(sc->sc_dev,
 		    "could not allocate TX ring DMA memory\n");
 		goto fail;
 	}
 	ring->desc = ring->desc_dma.vaddr;
 
 	/*
 	 * We only use rings 0 through 9 (4 EDCA + cmd) so there is no need
 	 * to allocate commands space for other rings.
 	 */
 	if (qid > IWM_MVM_CMD_QUEUE)
 		return 0;
 
 	size = IWM_TX_RING_COUNT * sizeof(struct iwm_device_cmd);
 	error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->cmd_dma, size, 4);
 	if (error != 0) {
 		device_printf(sc->sc_dev,
 		    "could not allocate TX cmd DMA memory\n");
 		goto fail;
 	}
 	ring->cmd = ring->cmd_dma.vaddr;
 
 	/* FW commands may require more mapped space than packets. */
 	if (qid == IWM_MVM_CMD_QUEUE) {
 		maxsize = IWM_RBUF_SIZE;
 		nsegments = 1;
 	} else {
 		maxsize = MCLBYTES;
 		nsegments = IWM_MAX_SCATTER - 2;
 	}
 
 	error = bus_dma_tag_create(sc->sc_dmat, 1, 0,
 	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, maxsize,
             nsegments, maxsize, 0, NULL, NULL, &ring->data_dmat);
 	if (error != 0) {
 		device_printf(sc->sc_dev, "could not create TX buf DMA tag\n");
 		goto fail;
 	}
 
 	paddr = ring->cmd_dma.paddr;
 	for (i = 0; i < IWM_TX_RING_COUNT; i++) {
 		struct iwm_tx_data *data = &ring->data[i];
 
 		data->cmd_paddr = paddr;
 		data->scratch_paddr = paddr + sizeof(struct iwm_cmd_header)
 		    + offsetof(struct iwm_tx_cmd, scratch);
 		paddr += sizeof(struct iwm_device_cmd);
 
 		error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
 		if (error != 0) {
 			device_printf(sc->sc_dev,
 			    "could not create TX buf DMA map\n");
 			goto fail;
 		}
 	}
 	KASSERT(paddr == ring->cmd_dma.paddr + size,
 	    ("invalid physical address"));
 	return 0;
 
 fail:	iwm_free_tx_ring(sc, ring);
 	return error;
 }
 
 static void
 iwm_reset_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring)
 {
 	int i;
 
 	for (i = 0; i < IWM_TX_RING_COUNT; i++) {
 		struct iwm_tx_data *data = &ring->data[i];
 
 		if (data->m != NULL) {
 			bus_dmamap_sync(ring->data_dmat, data->map,
 			    BUS_DMASYNC_POSTWRITE);
 			bus_dmamap_unload(ring->data_dmat, data->map);
 			m_freem(data->m);
 			data->m = NULL;
 		}
 	}
 	/* Clear TX descriptors. */
 	memset(ring->desc, 0, ring->desc_dma.size);
 	bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
 	    BUS_DMASYNC_PREWRITE);
 	sc->qfullmsk &= ~(1 << ring->qid);
 	ring->queued = 0;
 	ring->cur = 0;
 
 	if (ring->qid == IWM_MVM_CMD_QUEUE && sc->cmd_hold_nic_awake)
 		iwm_pcie_clear_cmd_in_flight(sc);
 }
 
 static void
 iwm_free_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring)
 {
 	int i;
 
 	iwm_dma_contig_free(&ring->desc_dma);
 	iwm_dma_contig_free(&ring->cmd_dma);
 
 	for (i = 0; i < IWM_TX_RING_COUNT; i++) {
 		struct iwm_tx_data *data = &ring->data[i];
 
 		if (data->m != NULL) {
 			bus_dmamap_sync(ring->data_dmat, data->map,
 			    BUS_DMASYNC_POSTWRITE);
 			bus_dmamap_unload(ring->data_dmat, data->map);
 			m_freem(data->m);
 			data->m = NULL;
 		}
 		if (data->map != NULL) {
 			bus_dmamap_destroy(ring->data_dmat, data->map);
 			data->map = NULL;
 		}
 	}
 	if (ring->data_dmat != NULL) {
 		bus_dma_tag_destroy(ring->data_dmat);
 		ring->data_dmat = NULL;
 	}
 }
 
 /*
  * High-level hardware frobbing routines
  */
 
 static void
 iwm_enable_interrupts(struct iwm_softc *sc)
 {
 	sc->sc_intmask = IWM_CSR_INI_SET_MASK;
 	IWM_WRITE(sc, IWM_CSR_INT_MASK, sc->sc_intmask);
 }
 
 static void
 iwm_restore_interrupts(struct iwm_softc *sc)
 {
 	IWM_WRITE(sc, IWM_CSR_INT_MASK, sc->sc_intmask);
 }
 
 static void
 iwm_disable_interrupts(struct iwm_softc *sc)
 {
 	/* disable interrupts */
 	IWM_WRITE(sc, IWM_CSR_INT_MASK, 0);
 
 	/* acknowledge all interrupts */
 	IWM_WRITE(sc, IWM_CSR_INT, ~0);
 	IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, ~0);
 }
 
 static void
 iwm_ict_reset(struct iwm_softc *sc)
 {
 	iwm_disable_interrupts(sc);
 
 	/* Reset ICT table. */
 	memset(sc->ict_dma.vaddr, 0, IWM_ICT_SIZE);
 	sc->ict_cur = 0;
 
 	/* Set physical address of ICT table (4KB aligned). */
 	IWM_WRITE(sc, IWM_CSR_DRAM_INT_TBL_REG,
 	    IWM_CSR_DRAM_INT_TBL_ENABLE
 	    | IWM_CSR_DRAM_INIT_TBL_WRITE_POINTER
 	    | IWM_CSR_DRAM_INIT_TBL_WRAP_CHECK
 	    | sc->ict_dma.paddr >> IWM_ICT_PADDR_SHIFT);
 
 	/* Switch to ICT interrupt mode in driver. */
 	sc->sc_flags |= IWM_FLAG_USE_ICT;
 
 	/* Re-enable interrupts. */
 	IWM_WRITE(sc, IWM_CSR_INT, ~0);
 	iwm_enable_interrupts(sc);
 }
 
 /* iwlwifi pcie/trans.c */
 
 /*
  * Since this .. hard-resets things, it's time to actually
  * mark the first vap (if any) as having no mac context.
  * It's annoying, but since the driver is potentially being
  * stop/start'ed whilst active (thanks openbsd port!) we
  * have to correctly track this.
  */
 static void
 iwm_stop_device(struct iwm_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
 	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
 	int chnl, qid;
 	uint32_t mask = 0;
 
 	/* tell the device to stop sending interrupts */
 	iwm_disable_interrupts(sc);
 
 	/*
 	 * FreeBSD-local: mark the first vap as not-uploaded,
 	 * so the next transition through auth/assoc
 	 * will correctly populate the MAC context.
 	 */
 	if (vap) {
 		struct iwm_vap *iv = IWM_VAP(vap);
 		iv->is_uploaded = 0;
 	}
 
 	/* device going down, Stop using ICT table */
 	sc->sc_flags &= ~IWM_FLAG_USE_ICT;
 
 	/* stop tx and rx.  tx and rx bits, as usual, are from if_iwn */
 
 	iwm_write_prph(sc, IWM_SCD_TXFACT, 0);
 
 	if (iwm_nic_lock(sc)) {
 		/* Stop each Tx DMA channel */
 		for (chnl = 0; chnl < IWM_FH_TCSR_CHNL_NUM; chnl++) {
 			IWM_WRITE(sc,
 			    IWM_FH_TCSR_CHNL_TX_CONFIG_REG(chnl), 0);
 			mask |= IWM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(chnl);
 		}
 
 		/* Wait for DMA channels to be idle */
 		if (!iwm_poll_bit(sc, IWM_FH_TSSR_TX_STATUS_REG, mask, mask,
 		    5000)) {
 			device_printf(sc->sc_dev,
 			    "Failing on timeout while stopping DMA channel: [0x%08x]\n",
 			    IWM_READ(sc, IWM_FH_TSSR_TX_STATUS_REG));
 		}
 		iwm_nic_unlock(sc);
 	}
 	iwm_pcie_rx_stop(sc);
 
 	/* Stop RX ring. */
 	iwm_reset_rx_ring(sc, &sc->rxq);
 
 	/* Reset all TX rings. */
 	for (qid = 0; qid < nitems(sc->txq); qid++)
 		iwm_reset_tx_ring(sc, &sc->txq[qid]);
 
 	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_7000) {
 		/* Power-down device's busmaster DMA clocks */
 		iwm_write_prph(sc, IWM_APMG_CLK_DIS_REG,
 		    IWM_APMG_CLK_VAL_DMA_CLK_RQT);
 		DELAY(5);
 	}
 
 	/* Make sure (redundant) we've released our request to stay awake */
 	IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL,
 	    IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
 
 	/* Stop the device, and put it in low power state */
 	iwm_apm_stop(sc);
 
 	/* Upon stop, the APM issues an interrupt if HW RF kill is set.
 	 * Clean again the interrupt here
 	 */
 	iwm_disable_interrupts(sc);
 	/* stop and reset the on-board processor */
 	IWM_WRITE(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_SW_RESET);
 
 	/*
 	 * Even if we stop the HW, we still want the RF kill
 	 * interrupt
 	 */
 	iwm_enable_rfkill_int(sc);
 	iwm_check_rfkill(sc);
 }
 
 /* iwlwifi: mvm/ops.c */
 static void
 iwm_mvm_nic_config(struct iwm_softc *sc)
 {
 	uint8_t radio_cfg_type, radio_cfg_step, radio_cfg_dash;
 	uint32_t reg_val = 0;
 	uint32_t phy_config = iwm_mvm_get_phy_config(sc);
 
 	radio_cfg_type = (phy_config & IWM_FW_PHY_CFG_RADIO_TYPE) >>
 	    IWM_FW_PHY_CFG_RADIO_TYPE_POS;
 	radio_cfg_step = (phy_config & IWM_FW_PHY_CFG_RADIO_STEP) >>
 	    IWM_FW_PHY_CFG_RADIO_STEP_POS;
 	radio_cfg_dash = (phy_config & IWM_FW_PHY_CFG_RADIO_DASH) >>
 	    IWM_FW_PHY_CFG_RADIO_DASH_POS;
 
 	/* SKU control */
 	reg_val |= IWM_CSR_HW_REV_STEP(sc->sc_hw_rev) <<
 	    IWM_CSR_HW_IF_CONFIG_REG_POS_MAC_STEP;
 	reg_val |= IWM_CSR_HW_REV_DASH(sc->sc_hw_rev) <<
 	    IWM_CSR_HW_IF_CONFIG_REG_POS_MAC_DASH;
 
 	/* radio configuration */
 	reg_val |= radio_cfg_type << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE;
 	reg_val |= radio_cfg_step << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_STEP;
 	reg_val |= radio_cfg_dash << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_DASH;
 
 	IWM_WRITE(sc, IWM_CSR_HW_IF_CONFIG_REG, reg_val);
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RESET,
 	    "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type,
 	    radio_cfg_step, radio_cfg_dash);
 
 	/*
 	 * W/A : NIC is stuck in a reset state after Early PCIe power off
 	 * (PCIe power is lost before PERST# is asserted), causing ME FW
 	 * to lose ownership and not being able to obtain it back.
 	 */
 	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_7000) {
 		iwm_set_bits_mask_prph(sc, IWM_APMG_PS_CTRL_REG,
 		    IWM_APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
 		    ~IWM_APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
 	}
 }
 
 static int
 iwm_nic_rx_init(struct iwm_softc *sc)
 {
 	/*
 	 * Initialize RX ring.  This is from the iwn driver.
 	 */
 	memset(sc->rxq.stat, 0, sizeof(*sc->rxq.stat));
 
 	/* Stop Rx DMA */
 	iwm_pcie_rx_stop(sc);
 
 	if (!iwm_nic_lock(sc))
 		return EBUSY;
 
 	/* reset and flush pointers */
 	IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_RBDCB_WPTR, 0);
 	IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_FLUSH_RB_REQ, 0);
 	IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_RDPTR, 0);
 	IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
 
 	/* Set physical address of RX ring (256-byte aligned). */
 	IWM_WRITE(sc,
 	    IWM_FH_RSCSR_CHNL0_RBDCB_BASE_REG, sc->rxq.desc_dma.paddr >> 8);
 
 	/* Set physical address of RX status (16-byte aligned). */
 	IWM_WRITE(sc,
 	    IWM_FH_RSCSR_CHNL0_STTS_WPTR_REG, sc->rxq.stat_dma.paddr >> 4);
 
 	/* Enable RX. */
 	IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG,
 	    IWM_FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL		|
 	    IWM_FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY		|  /* HW bug */
 	    IWM_FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL	|
 	    IWM_FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK	|
 	    (IWM_RX_RB_TIMEOUT << IWM_FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS) |
 	    IWM_FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K		|
 	    IWM_RX_QUEUE_SIZE_LOG << IWM_FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS);
 
 	IWM_WRITE_1(sc, IWM_CSR_INT_COALESCING, IWM_HOST_INT_TIMEOUT_DEF);
 
 	/* W/A for interrupt coalescing bug in 7260 and 3160 */
 	if (sc->cfg->host_interrupt_operation_mode)
 		IWM_SETBITS(sc, IWM_CSR_INT_COALESCING, IWM_HOST_INT_OPER_MODE);
 
 	/*
 	 * Thus sayeth el jefe (iwlwifi) via a comment:
 	 *
 	 * This value should initially be 0 (before preparing any
 	 * RBs), should be 8 after preparing the first 8 RBs (for example)
 	 */
 	IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_WPTR, 8);
 
 	iwm_nic_unlock(sc);
 
 	return 0;
 }
 
 static int
 iwm_nic_tx_init(struct iwm_softc *sc)
 {
 	int qid;
 
 	if (!iwm_nic_lock(sc))
 		return EBUSY;
 
 	/* Deactivate TX scheduler. */
 	iwm_write_prph(sc, IWM_SCD_TXFACT, 0);
 
 	/* Set physical address of "keep warm" page (16-byte aligned). */
 	IWM_WRITE(sc, IWM_FH_KW_MEM_ADDR_REG, sc->kw_dma.paddr >> 4);
 
 	/* Initialize TX rings. */
 	for (qid = 0; qid < nitems(sc->txq); qid++) {
 		struct iwm_tx_ring *txq = &sc->txq[qid];
 
 		/* Set physical address of TX ring (256-byte aligned). */
 		IWM_WRITE(sc, IWM_FH_MEM_CBBC_QUEUE(qid),
 		    txq->desc_dma.paddr >> 8);
 		IWM_DPRINTF(sc, IWM_DEBUG_XMIT,
 		    "%s: loading ring %d descriptors (%p) at %lx\n",
 		    __func__,
 		    qid, txq->desc,
 		    (unsigned long) (txq->desc_dma.paddr >> 8));
 	}
 
 	iwm_write_prph(sc, IWM_SCD_GP_CTRL, IWM_SCD_GP_CTRL_AUTO_ACTIVE_MODE);
 
 	iwm_nic_unlock(sc);
 
 	return 0;
 }
 
 static int
 iwm_nic_init(struct iwm_softc *sc)
 {
 	int error;
 
 	iwm_apm_init(sc);
 	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_7000)
 		iwm_set_pwr(sc);
 
 	iwm_mvm_nic_config(sc);
 
 	if ((error = iwm_nic_rx_init(sc)) != 0)
 		return error;
 
 	/*
 	 * Ditto for TX, from iwn
 	 */
 	if ((error = iwm_nic_tx_init(sc)) != 0)
 		return error;
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RESET,
 	    "%s: shadow registers enabled\n", __func__);
 	IWM_SETBITS(sc, IWM_CSR_MAC_SHADOW_REG_CTRL, 0x800fffff);
 
 	return 0;
 }
 
 const uint8_t iwm_mvm_ac_to_tx_fifo[] = {
 	IWM_MVM_TX_FIFO_VO,
 	IWM_MVM_TX_FIFO_VI,
 	IWM_MVM_TX_FIFO_BE,
 	IWM_MVM_TX_FIFO_BK,
 };
 
 static int
 iwm_enable_txq(struct iwm_softc *sc, int sta_id, int qid, int fifo)
 {
 	if (!iwm_nic_lock(sc)) {
 		device_printf(sc->sc_dev,
 		    "%s: cannot enable txq %d\n",
 		    __func__,
 		    qid);
 		return EBUSY;
 	}
 
 	IWM_WRITE(sc, IWM_HBUS_TARG_WRPTR, qid << 8 | 0);
 
 	if (qid == IWM_MVM_CMD_QUEUE) {
 		/* unactivate before configuration */
 		iwm_write_prph(sc, IWM_SCD_QUEUE_STATUS_BITS(qid),
 		    (0 << IWM_SCD_QUEUE_STTS_REG_POS_ACTIVE)
 		    | (1 << IWM_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
 
 		iwm_nic_unlock(sc);
 
 		iwm_clear_bits_prph(sc, IWM_SCD_AGGR_SEL, (1 << qid));
 
 		if (!iwm_nic_lock(sc)) {
 			device_printf(sc->sc_dev,
 			    "%s: cannot enable txq %d\n", __func__, qid);
 			return EBUSY;
 		}
 		iwm_write_prph(sc, IWM_SCD_QUEUE_RDPTR(qid), 0);
 		iwm_nic_unlock(sc);
 
 		iwm_write_mem32(sc, sc->scd_base_addr + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid), 0);
 		/* Set scheduler window size and frame limit. */
 		iwm_write_mem32(sc,
 		    sc->scd_base_addr + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid) +
 		    sizeof(uint32_t),
 		    ((IWM_FRAME_LIMIT << IWM_SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) &
 		    IWM_SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) |
 		    ((IWM_FRAME_LIMIT << IWM_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 		    IWM_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK));
 
 		if (!iwm_nic_lock(sc)) {
 			device_printf(sc->sc_dev,
 			    "%s: cannot enable txq %d\n", __func__, qid);
 			return EBUSY;
 		}
 		iwm_write_prph(sc, IWM_SCD_QUEUE_STATUS_BITS(qid),
 		    (1 << IWM_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 		    (fifo << IWM_SCD_QUEUE_STTS_REG_POS_TXF) |
 		    (1 << IWM_SCD_QUEUE_STTS_REG_POS_WSL) |
 		    IWM_SCD_QUEUE_STTS_REG_MSK);
 	} else {
 		struct iwm_scd_txq_cfg_cmd cmd;
 		int error;
 
 		iwm_nic_unlock(sc);
 
 		memset(&cmd, 0, sizeof(cmd));
 		cmd.scd_queue = qid;
 		cmd.enable = 1;
 		cmd.sta_id = sta_id;
 		cmd.tx_fifo = fifo;
 		cmd.aggregate = 0;
 		cmd.window = IWM_FRAME_LIMIT;
 
 		error = iwm_mvm_send_cmd_pdu(sc, IWM_SCD_QUEUE_CFG, IWM_CMD_SYNC,
 		    sizeof(cmd), &cmd);
 		if (error) {
 			device_printf(sc->sc_dev,
 			    "cannot enable txq %d\n", qid);
 			return error;
 		}
 
 		if (!iwm_nic_lock(sc))
 			return EBUSY;
 	}
 
 	iwm_write_prph(sc, IWM_SCD_EN_CTRL,
 	    iwm_read_prph(sc, IWM_SCD_EN_CTRL) | qid);
 
 	iwm_nic_unlock(sc);
 
 	IWM_DPRINTF(sc, IWM_DEBUG_XMIT, "%s: enabled txq %d FIFO %d\n",
 	    __func__, qid, fifo);
 
 	return 0;
 }
 
 static int
 iwm_trans_pcie_fw_alive(struct iwm_softc *sc, uint32_t scd_base_addr)
 {
 	int error, chnl;
 
 	int clear_dwords = (IWM_SCD_TRANS_TBL_MEM_UPPER_BOUND -
 	    IWM_SCD_CONTEXT_MEM_LOWER_BOUND) / sizeof(uint32_t);
 
 	if (!iwm_nic_lock(sc))
 		return EBUSY;
 
 	iwm_ict_reset(sc);
 
 	iwm_nic_unlock(sc);
 
 	sc->scd_base_addr = iwm_read_prph(sc, IWM_SCD_SRAM_BASE_ADDR);
 	if (scd_base_addr != 0 &&
 	    scd_base_addr != sc->scd_base_addr) {
 		device_printf(sc->sc_dev,
 		    "%s: sched addr mismatch: alive: 0x%x prph: 0x%x\n",
 		    __func__, sc->scd_base_addr, scd_base_addr);
 	}
 
 	/* reset context data, TX status and translation data */
 	error = iwm_write_mem(sc,
 	    sc->scd_base_addr + IWM_SCD_CONTEXT_MEM_LOWER_BOUND,
 	    NULL, clear_dwords);
 	if (error)
 		return EBUSY;
 
 	if (!iwm_nic_lock(sc))
 		return EBUSY;
 
 	/* Set physical address of TX scheduler rings (1KB aligned). */
 	iwm_write_prph(sc, IWM_SCD_DRAM_BASE_ADDR, sc->sched_dma.paddr >> 10);
 
 	iwm_write_prph(sc, IWM_SCD_CHAINEXT_EN, 0);
 
 	iwm_nic_unlock(sc);
 
 	/* enable command channel */
 	error = iwm_enable_txq(sc, 0 /* unused */, IWM_MVM_CMD_QUEUE, 7);
 	if (error)
 		return error;
 
 	if (!iwm_nic_lock(sc))
 		return EBUSY;
 
 	iwm_write_prph(sc, IWM_SCD_TXFACT, 0xff);
 
 	/* Enable DMA channels. */
 	for (chnl = 0; chnl < IWM_FH_TCSR_CHNL_NUM; chnl++) {
 		IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(chnl),
 		    IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
 		    IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
 	}
 
 	IWM_SETBITS(sc, IWM_FH_TX_CHICKEN_BITS_REG,
 	    IWM_FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
 
 	iwm_nic_unlock(sc);
 
 	/* Enable L1-Active */
 	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000) {
 		iwm_clear_bits_prph(sc, IWM_APMG_PCIDEV_STT_REG,
 		    IWM_APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 	}
 
 	return error;
 }
 
 /*
  * NVM read access and content parsing.  We do not support
  * external NVM or writing NVM.
  * iwlwifi/mvm/nvm.c
  */
 
 /* Default NVM size to read */
 #define IWM_NVM_DEFAULT_CHUNK_SIZE	(2*1024)
 
 #define IWM_NVM_WRITE_OPCODE 1
 #define IWM_NVM_READ_OPCODE 0
 
 /* load nvm chunk response */
 enum {
 	IWM_READ_NVM_CHUNK_SUCCEED = 0,
 	IWM_READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
 };
 
 static int
 iwm_nvm_read_chunk(struct iwm_softc *sc, uint16_t section,
 	uint16_t offset, uint16_t length, uint8_t *data, uint16_t *len)
 {
 	struct iwm_nvm_access_cmd nvm_access_cmd = {
 		.offset = htole16(offset),
 		.length = htole16(length),
 		.type = htole16(section),
 		.op_code = IWM_NVM_READ_OPCODE,
 	};
 	struct iwm_nvm_access_resp *nvm_resp;
 	struct iwm_rx_packet *pkt;
 	struct iwm_host_cmd cmd = {
 		.id = IWM_NVM_ACCESS_CMD,
 		.flags = IWM_CMD_WANT_SKB | IWM_CMD_SEND_IN_RFKILL,
 		.data = { &nvm_access_cmd, },
 	};
 	int ret, bytes_read, offset_read;
 	uint8_t *resp_data;
 
 	cmd.len[0] = sizeof(struct iwm_nvm_access_cmd);
 
 	ret = iwm_send_cmd(sc, &cmd);
 	if (ret) {
 		device_printf(sc->sc_dev,
 		    "Could not send NVM_ACCESS command (error=%d)\n", ret);
 		return ret;
 	}
 
 	pkt = cmd.resp_pkt;
 
 	/* Extract NVM response */
 	nvm_resp = (void *)pkt->data;
 	ret = le16toh(nvm_resp->status);
 	bytes_read = le16toh(nvm_resp->length);
 	offset_read = le16toh(nvm_resp->offset);
 	resp_data = nvm_resp->data;
 	if (ret) {
 		if ((offset != 0) &&
 		    (ret == IWM_READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
 			/*
 			 * meaning of NOT_VALID_ADDRESS:
 			 * driver try to read chunk from address that is
 			 * multiple of 2K and got an error since addr is empty.
 			 * meaning of (offset != 0): driver already
 			 * read valid data from another chunk so this case
 			 * is not an error.
 			 */
 			IWM_DPRINTF(sc, IWM_DEBUG_EEPROM | IWM_DEBUG_RESET,
 				    "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
 				    offset);
 			*len = 0;
 			ret = 0;
 		} else {
 			IWM_DPRINTF(sc, IWM_DEBUG_EEPROM | IWM_DEBUG_RESET,
 				    "NVM access command failed with status %d\n", ret);
 			ret = EIO;
 		}
 		goto exit;
 	}
 
 	if (offset_read != offset) {
 		device_printf(sc->sc_dev,
 		    "NVM ACCESS response with invalid offset %d\n",
 		    offset_read);
 		ret = EINVAL;
 		goto exit;
 	}
 
 	if (bytes_read > length) {
 		device_printf(sc->sc_dev,
 		    "NVM ACCESS response with too much data "
 		    "(%d bytes requested, %d bytes received)\n",
 		    length, bytes_read);
 		ret = EINVAL;
 		goto exit;
 	}
 
 	/* Write data to NVM */
 	memcpy(data + offset, resp_data, bytes_read);
 	*len = bytes_read;
 
  exit:
 	iwm_free_resp(sc, &cmd);
 	return ret;
 }
 
 /*
  * Reads an NVM section completely.
  * NICs prior to 7000 family don't have a real NVM, but just read
  * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
  * by uCode, we need to manually check in this case that we don't
  * overflow and try to read more than the EEPROM size.
  * For 7000 family NICs, we supply the maximal size we can read, and
  * the uCode fills the response with as much data as we can,
  * without overflowing, so no check is needed.
  */
 static int
 iwm_nvm_read_section(struct iwm_softc *sc,
 	uint16_t section, uint8_t *data, uint16_t *len, uint32_t size_read)
 {
 	uint16_t seglen, length, offset = 0;
 	int ret;
 
 	/* Set nvm section read length */
 	length = IWM_NVM_DEFAULT_CHUNK_SIZE;
 
 	seglen = length;
 
 	/* Read the NVM until exhausted (reading less than requested) */
 	while (seglen == length) {
 		/* Check no memory assumptions fail and cause an overflow */
 		if ((size_read + offset + length) >
 		    sc->cfg->eeprom_size) {
 			device_printf(sc->sc_dev,
 			    "EEPROM size is too small for NVM\n");
 			return ENOBUFS;
 		}
 
 		ret = iwm_nvm_read_chunk(sc, section, offset, length, data, &seglen);
 		if (ret) {
 			IWM_DPRINTF(sc, IWM_DEBUG_EEPROM | IWM_DEBUG_RESET,
 				    "Cannot read NVM from section %d offset %d, length %d\n",
 				    section, offset, length);
 			return ret;
 		}
 		offset += seglen;
 	}
 
 	IWM_DPRINTF(sc, IWM_DEBUG_EEPROM | IWM_DEBUG_RESET,
 		    "NVM section %d read completed\n", section);
 	*len = offset;
 	return 0;
 }
 
 /*
  * BEGIN IWM_NVM_PARSE
  */
 
 /* iwlwifi/iwl-nvm-parse.c */
 
 /* NVM offsets (in words) definitions */
 enum iwm_nvm_offsets {
 	/* NVM HW-Section offset (in words) definitions */
 	IWM_HW_ADDR = 0x15,
 
 /* NVM SW-Section offset (in words) definitions */
 	IWM_NVM_SW_SECTION = 0x1C0,
 	IWM_NVM_VERSION = 0,
 	IWM_RADIO_CFG = 1,
 	IWM_SKU = 2,
 	IWM_N_HW_ADDRS = 3,
 	IWM_NVM_CHANNELS = 0x1E0 - IWM_NVM_SW_SECTION,
 
 /* NVM calibration section offset (in words) definitions */
 	IWM_NVM_CALIB_SECTION = 0x2B8,
 	IWM_XTAL_CALIB = 0x316 - IWM_NVM_CALIB_SECTION
 };
 
 enum iwm_8000_nvm_offsets {
 	/* NVM HW-Section offset (in words) definitions */
 	IWM_HW_ADDR0_WFPM_8000 = 0x12,
 	IWM_HW_ADDR1_WFPM_8000 = 0x16,
 	IWM_HW_ADDR0_PCIE_8000 = 0x8A,
 	IWM_HW_ADDR1_PCIE_8000 = 0x8E,
 	IWM_MAC_ADDRESS_OVERRIDE_8000 = 1,
 
 	/* NVM SW-Section offset (in words) definitions */
 	IWM_NVM_SW_SECTION_8000 = 0x1C0,
 	IWM_NVM_VERSION_8000 = 0,
 	IWM_RADIO_CFG_8000 = 0,
 	IWM_SKU_8000 = 2,
 	IWM_N_HW_ADDRS_8000 = 3,
 
 	/* NVM REGULATORY -Section offset (in words) definitions */
 	IWM_NVM_CHANNELS_8000 = 0,
 	IWM_NVM_LAR_OFFSET_8000_OLD = 0x4C7,
 	IWM_NVM_LAR_OFFSET_8000 = 0x507,
 	IWM_NVM_LAR_ENABLED_8000 = 0x7,
 
 	/* NVM calibration section offset (in words) definitions */
 	IWM_NVM_CALIB_SECTION_8000 = 0x2B8,
 	IWM_XTAL_CALIB_8000 = 0x316 - IWM_NVM_CALIB_SECTION_8000
 };
 
 /* SKU Capabilities (actual values from NVM definition) */
 enum nvm_sku_bits {
 	IWM_NVM_SKU_CAP_BAND_24GHZ	= (1 << 0),
 	IWM_NVM_SKU_CAP_BAND_52GHZ	= (1 << 1),
 	IWM_NVM_SKU_CAP_11N_ENABLE	= (1 << 2),
 	IWM_NVM_SKU_CAP_11AC_ENABLE	= (1 << 3),
 };
 
 /* radio config bits (actual values from NVM definition) */
 #define IWM_NVM_RF_CFG_DASH_MSK(x)   (x & 0x3)         /* bits 0-1   */
 #define IWM_NVM_RF_CFG_STEP_MSK(x)   ((x >> 2)  & 0x3) /* bits 2-3   */
 #define IWM_NVM_RF_CFG_TYPE_MSK(x)   ((x >> 4)  & 0x3) /* bits 4-5   */
 #define IWM_NVM_RF_CFG_PNUM_MSK(x)   ((x >> 6)  & 0x3) /* bits 6-7   */
 #define IWM_NVM_RF_CFG_TX_ANT_MSK(x) ((x >> 8)  & 0xF) /* bits 8-11  */
 #define IWM_NVM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
 
 #define IWM_NVM_RF_CFG_FLAVOR_MSK_8000(x)	(x & 0xF)
 #define IWM_NVM_RF_CFG_DASH_MSK_8000(x)		((x >> 4) & 0xF)
 #define IWM_NVM_RF_CFG_STEP_MSK_8000(x)		((x >> 8) & 0xF)
 #define IWM_NVM_RF_CFG_TYPE_MSK_8000(x)		((x >> 12) & 0xFFF)
 #define IWM_NVM_RF_CFG_TX_ANT_MSK_8000(x)	((x >> 24) & 0xF)
 #define IWM_NVM_RF_CFG_RX_ANT_MSK_8000(x)	((x >> 28) & 0xF)
 
 #define DEFAULT_MAX_TX_POWER 16
 
 /**
  * enum iwm_nvm_channel_flags - channel flags in NVM
  * @IWM_NVM_CHANNEL_VALID: channel is usable for this SKU/geo
  * @IWM_NVM_CHANNEL_IBSS: usable as an IBSS channel
  * @IWM_NVM_CHANNEL_ACTIVE: active scanning allowed
  * @IWM_NVM_CHANNEL_RADAR: radar detection required
  * XXX cannot find this (DFS) flag in iwm-nvm-parse.c
  * @IWM_NVM_CHANNEL_DFS: dynamic freq selection candidate
  * @IWM_NVM_CHANNEL_WIDE: 20 MHz channel okay (?)
  * @IWM_NVM_CHANNEL_40MHZ: 40 MHz channel okay (?)
  * @IWM_NVM_CHANNEL_80MHZ: 80 MHz channel okay (?)
  * @IWM_NVM_CHANNEL_160MHZ: 160 MHz channel okay (?)
  */
 enum iwm_nvm_channel_flags {
 	IWM_NVM_CHANNEL_VALID = (1 << 0),
 	IWM_NVM_CHANNEL_IBSS = (1 << 1),
 	IWM_NVM_CHANNEL_ACTIVE = (1 << 3),
 	IWM_NVM_CHANNEL_RADAR = (1 << 4),
 	IWM_NVM_CHANNEL_DFS = (1 << 7),
 	IWM_NVM_CHANNEL_WIDE = (1 << 8),
 	IWM_NVM_CHANNEL_40MHZ = (1 << 9),
 	IWM_NVM_CHANNEL_80MHZ = (1 << 10),
 	IWM_NVM_CHANNEL_160MHZ = (1 << 11),
 };
 
 /*
  * Translate EEPROM flags to net80211.
  */
 static uint32_t
 iwm_eeprom_channel_flags(uint16_t ch_flags)
 {
 	uint32_t nflags;
 
 	nflags = 0;
 	if ((ch_flags & IWM_NVM_CHANNEL_ACTIVE) == 0)
 		nflags |= IEEE80211_CHAN_PASSIVE;
 	if ((ch_flags & IWM_NVM_CHANNEL_IBSS) == 0)
 		nflags |= IEEE80211_CHAN_NOADHOC;
 	if (ch_flags & IWM_NVM_CHANNEL_RADAR) {
 		nflags |= IEEE80211_CHAN_DFS;
 		/* Just in case. */
 		nflags |= IEEE80211_CHAN_NOADHOC;
 	}
 
 	return (nflags);
 }
 
 static void
 iwm_add_channel_band(struct iwm_softc *sc, struct ieee80211_channel chans[],
     int maxchans, int *nchans, int ch_idx, size_t ch_num,
     const uint8_t bands[])
 {
 	const uint16_t * const nvm_ch_flags = sc->nvm_data->nvm_ch_flags;
 	uint32_t nflags;
 	uint16_t ch_flags;
 	uint8_t ieee;
 	int error;
 
 	for (; ch_idx < ch_num; ch_idx++) {
 		ch_flags = le16_to_cpup(nvm_ch_flags + ch_idx);
 		if (sc->cfg->device_family == IWM_DEVICE_FAMILY_7000)
 			ieee = iwm_nvm_channels[ch_idx];
 		else
 			ieee = iwm_nvm_channels_8000[ch_idx];
 
 		if (!(ch_flags & IWM_NVM_CHANNEL_VALID)) {
 			IWM_DPRINTF(sc, IWM_DEBUG_EEPROM,
 			    "Ch. %d Flags %x [%sGHz] - No traffic\n",
 			    ieee, ch_flags,
 			    (ch_idx >= IWM_NUM_2GHZ_CHANNELS) ?
 			    "5.2" : "2.4");
 			continue;
 		}
 
 		nflags = iwm_eeprom_channel_flags(ch_flags);
 		error = ieee80211_add_channel(chans, maxchans, nchans,
 		    ieee, 0, 0, nflags, bands);
 		if (error != 0)
 			break;
 
 		IWM_DPRINTF(sc, IWM_DEBUG_EEPROM,
 		    "Ch. %d Flags %x [%sGHz] - Added\n",
 		    ieee, ch_flags,
 		    (ch_idx >= IWM_NUM_2GHZ_CHANNELS) ?
 		    "5.2" : "2.4");
 	}
 }
 
 static void
 iwm_init_channel_map(struct ieee80211com *ic, int maxchans, int *nchans,
     struct ieee80211_channel chans[])
 {
 	struct iwm_softc *sc = ic->ic_softc;
 	struct iwm_nvm_data *data = sc->nvm_data;
 	uint8_t bands[IEEE80211_MODE_BYTES];
 	size_t ch_num;
 
 	memset(bands, 0, sizeof(bands));
 	/* 1-13: 11b/g channels. */
 	setbit(bands, IEEE80211_MODE_11B);
 	setbit(bands, IEEE80211_MODE_11G);
 	iwm_add_channel_band(sc, chans, maxchans, nchans, 0,
 	    IWM_NUM_2GHZ_CHANNELS - 1, bands);
 
 	/* 14: 11b channel only. */
 	clrbit(bands, IEEE80211_MODE_11G);
 	iwm_add_channel_band(sc, chans, maxchans, nchans,
 	    IWM_NUM_2GHZ_CHANNELS - 1, IWM_NUM_2GHZ_CHANNELS, bands);
 
 	if (data->sku_cap_band_52GHz_enable) {
 		if (sc->cfg->device_family == IWM_DEVICE_FAMILY_7000)
 			ch_num = nitems(iwm_nvm_channels);
 		else
 			ch_num = nitems(iwm_nvm_channels_8000);
 		memset(bands, 0, sizeof(bands));
 		setbit(bands, IEEE80211_MODE_11A);
 		iwm_add_channel_band(sc, chans, maxchans, nchans,
 		    IWM_NUM_2GHZ_CHANNELS, ch_num, bands);
 	}
 }
 
 static void
 iwm_set_hw_address_family_8000(struct iwm_softc *sc, struct iwm_nvm_data *data,
 	const uint16_t *mac_override, const uint16_t *nvm_hw)
 {
 	const uint8_t *hw_addr;
 
 	if (mac_override) {
 		static const uint8_t reserved_mac[] = {
 			0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00
 		};
 
 		hw_addr = (const uint8_t *)(mac_override +
 				 IWM_MAC_ADDRESS_OVERRIDE_8000);
 
 		/*
 		 * Store the MAC address from MAO section.
 		 * No byte swapping is required in MAO section
 		 */
 		IEEE80211_ADDR_COPY(data->hw_addr, hw_addr);
 
 		/*
 		 * Force the use of the OTP MAC address in case of reserved MAC
 		 * address in the NVM, or if address is given but invalid.
 		 */
 		if (!IEEE80211_ADDR_EQ(reserved_mac, hw_addr) &&
 		    !IEEE80211_ADDR_EQ(ieee80211broadcastaddr, data->hw_addr) &&
 		    iwm_is_valid_ether_addr(data->hw_addr) &&
 		    !IEEE80211_IS_MULTICAST(data->hw_addr))
 			return;
 
 		IWM_DPRINTF(sc, IWM_DEBUG_RESET,
 		    "%s: mac address from nvm override section invalid\n",
 		    __func__);
 	}
 
 	if (nvm_hw) {
 		/* read the mac address from WFMP registers */
 		uint32_t mac_addr0 =
 		    htole32(iwm_read_prph(sc, IWM_WFMP_MAC_ADDR_0));
 		uint32_t mac_addr1 =
 		    htole32(iwm_read_prph(sc, IWM_WFMP_MAC_ADDR_1));
 
 		hw_addr = (const uint8_t *)&mac_addr0;
 		data->hw_addr[0] = hw_addr[3];
 		data->hw_addr[1] = hw_addr[2];
 		data->hw_addr[2] = hw_addr[1];
 		data->hw_addr[3] = hw_addr[0];
 
 		hw_addr = (const uint8_t *)&mac_addr1;
 		data->hw_addr[4] = hw_addr[1];
 		data->hw_addr[5] = hw_addr[0];
 
 		return;
 	}
 
 	device_printf(sc->sc_dev, "%s: mac address not found\n", __func__);
 	memset(data->hw_addr, 0, sizeof(data->hw_addr));
 }
 
 static int
 iwm_get_sku(const struct iwm_softc *sc, const uint16_t *nvm_sw,
 	    const uint16_t *phy_sku)
 {
 	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000)
 		return le16_to_cpup(nvm_sw + IWM_SKU);
 
 	return le32_to_cpup((const uint32_t *)(phy_sku + IWM_SKU_8000));
 }
 
 static int
 iwm_get_nvm_version(const struct iwm_softc *sc, const uint16_t *nvm_sw)
 {
 	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000)
 		return le16_to_cpup(nvm_sw + IWM_NVM_VERSION);
 	else
 		return le32_to_cpup((const uint32_t *)(nvm_sw +
 						IWM_NVM_VERSION_8000));
 }
 
 static int
 iwm_get_radio_cfg(const struct iwm_softc *sc, const uint16_t *nvm_sw,
 		  const uint16_t *phy_sku)
 {
         if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000)
                 return le16_to_cpup(nvm_sw + IWM_RADIO_CFG);
 
         return le32_to_cpup((const uint32_t *)(phy_sku + IWM_RADIO_CFG_8000));
 }
 
 static int
 iwm_get_n_hw_addrs(const struct iwm_softc *sc, const uint16_t *nvm_sw)
 {
 	int n_hw_addr;
 
 	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000)
 		return le16_to_cpup(nvm_sw + IWM_N_HW_ADDRS);
 
 	n_hw_addr = le32_to_cpup((const uint32_t *)(nvm_sw + IWM_N_HW_ADDRS_8000));
 
         return n_hw_addr & IWM_N_HW_ADDR_MASK;
 }
 
 static void
 iwm_set_radio_cfg(const struct iwm_softc *sc, struct iwm_nvm_data *data,
 		  uint32_t radio_cfg)
 {
 	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000) {
 		data->radio_cfg_type = IWM_NVM_RF_CFG_TYPE_MSK(radio_cfg);
 		data->radio_cfg_step = IWM_NVM_RF_CFG_STEP_MSK(radio_cfg);
 		data->radio_cfg_dash = IWM_NVM_RF_CFG_DASH_MSK(radio_cfg);
 		data->radio_cfg_pnum = IWM_NVM_RF_CFG_PNUM_MSK(radio_cfg);
 		return;
 	}
 
 	/* set the radio configuration for family 8000 */
 	data->radio_cfg_type = IWM_NVM_RF_CFG_TYPE_MSK_8000(radio_cfg);
 	data->radio_cfg_step = IWM_NVM_RF_CFG_STEP_MSK_8000(radio_cfg);
 	data->radio_cfg_dash = IWM_NVM_RF_CFG_DASH_MSK_8000(radio_cfg);
 	data->radio_cfg_pnum = IWM_NVM_RF_CFG_FLAVOR_MSK_8000(radio_cfg);
 	data->valid_tx_ant = IWM_NVM_RF_CFG_TX_ANT_MSK_8000(radio_cfg);
 	data->valid_rx_ant = IWM_NVM_RF_CFG_RX_ANT_MSK_8000(radio_cfg);
 }
 
 static int
 iwm_set_hw_address(struct iwm_softc *sc, struct iwm_nvm_data *data,
 		   const uint16_t *nvm_hw, const uint16_t *mac_override)
 {
 #ifdef notyet /* for FAMILY 9000 */
 	if (cfg->mac_addr_from_csr) {
 		iwm_set_hw_address_from_csr(sc, data);
         } else
 #endif
 	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000) {
 		const uint8_t *hw_addr = (const uint8_t *)(nvm_hw + IWM_HW_ADDR);
 
 		/* The byte order is little endian 16 bit, meaning 214365 */
 		data->hw_addr[0] = hw_addr[1];
 		data->hw_addr[1] = hw_addr[0];
 		data->hw_addr[2] = hw_addr[3];
 		data->hw_addr[3] = hw_addr[2];
 		data->hw_addr[4] = hw_addr[5];
 		data->hw_addr[5] = hw_addr[4];
 	} else {
 		iwm_set_hw_address_family_8000(sc, data, mac_override, nvm_hw);
 	}
 
 	if (!iwm_is_valid_ether_addr(data->hw_addr)) {
 		device_printf(sc->sc_dev, "no valid mac address was found\n");
 		return EINVAL;
 	}
 
 	return 0;
 }
 
 static struct iwm_nvm_data *
 iwm_parse_nvm_data(struct iwm_softc *sc,
 		   const uint16_t *nvm_hw, const uint16_t *nvm_sw,
 		   const uint16_t *nvm_calib, const uint16_t *mac_override,
 		   const uint16_t *phy_sku, const uint16_t *regulatory)
 {
 	struct iwm_nvm_data *data;
 	uint32_t sku, radio_cfg;
 
 	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000) {
 		data = malloc(sizeof(*data) +
 		    IWM_NUM_CHANNELS * sizeof(uint16_t),
 		    M_DEVBUF, M_NOWAIT | M_ZERO);
 	} else {
 		data = malloc(sizeof(*data) +
 		    IWM_NUM_CHANNELS_8000 * sizeof(uint16_t),
 		    M_DEVBUF, M_NOWAIT | M_ZERO);
 	}
 	if (!data)
 		return NULL;
 
 	data->nvm_version = iwm_get_nvm_version(sc, nvm_sw);
 
 	radio_cfg = iwm_get_radio_cfg(sc, nvm_sw, phy_sku);
 	iwm_set_radio_cfg(sc, data, radio_cfg);
 
 	sku = iwm_get_sku(sc, nvm_sw, phy_sku);
 	data->sku_cap_band_24GHz_enable = sku & IWM_NVM_SKU_CAP_BAND_24GHZ;
 	data->sku_cap_band_52GHz_enable = sku & IWM_NVM_SKU_CAP_BAND_52GHZ;
 	data->sku_cap_11n_enable = 0;
 
 	data->n_hw_addrs = iwm_get_n_hw_addrs(sc, nvm_sw);
 
 	/* If no valid mac address was found - bail out */
 	if (iwm_set_hw_address(sc, data, nvm_hw, mac_override)) {
 		free(data, M_DEVBUF);
 		return NULL;
 	}
 
 	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_7000) {
 		memcpy(data->nvm_ch_flags, &nvm_sw[IWM_NVM_CHANNELS],
 		    IWM_NUM_CHANNELS * sizeof(uint16_t));
 	} else {
 		memcpy(data->nvm_ch_flags, &regulatory[IWM_NVM_CHANNELS_8000],
 		    IWM_NUM_CHANNELS_8000 * sizeof(uint16_t));
 	}
 
 	return data;
 }
 
 static void
 iwm_free_nvm_data(struct iwm_nvm_data *data)
 {
 	if (data != NULL)
 		free(data, M_DEVBUF);
 }
 
 static struct iwm_nvm_data *
 iwm_parse_nvm_sections(struct iwm_softc *sc, struct iwm_nvm_section *sections)
 {
 	const uint16_t *hw, *sw, *calib, *regulatory, *mac_override, *phy_sku;
 
 	/* Checking for required sections */
 	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_7000) {
 		if (!sections[IWM_NVM_SECTION_TYPE_SW].data ||
 		    !sections[sc->cfg->nvm_hw_section_num].data) {
 			device_printf(sc->sc_dev,
 			    "Can't parse empty OTP/NVM sections\n");
 			return NULL;
 		}
 	} else if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000) {
 		/* SW and REGULATORY sections are mandatory */
 		if (!sections[IWM_NVM_SECTION_TYPE_SW].data ||
 		    !sections[IWM_NVM_SECTION_TYPE_REGULATORY].data) {
 			device_printf(sc->sc_dev,
 			    "Can't parse empty OTP/NVM sections\n");
 			return NULL;
 		}
 		/* MAC_OVERRIDE or at least HW section must exist */
 		if (!sections[sc->cfg->nvm_hw_section_num].data &&
 		    !sections[IWM_NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
 			device_printf(sc->sc_dev,
 			    "Can't parse mac_address, empty sections\n");
 			return NULL;
 		}
 
 		/* PHY_SKU section is mandatory in B0 */
 		if (!sections[IWM_NVM_SECTION_TYPE_PHY_SKU].data) {
 			device_printf(sc->sc_dev,
 			    "Can't parse phy_sku in B0, empty sections\n");
 			return NULL;
 		}
 	} else {
 		panic("unknown device family %d\n", sc->cfg->device_family);
 	}
 
 	hw = (const uint16_t *) sections[sc->cfg->nvm_hw_section_num].data;
 	sw = (const uint16_t *)sections[IWM_NVM_SECTION_TYPE_SW].data;
 	calib = (const uint16_t *)
 	    sections[IWM_NVM_SECTION_TYPE_CALIBRATION].data;
 	regulatory = (const uint16_t *)
 	    sections[IWM_NVM_SECTION_TYPE_REGULATORY].data;
 	mac_override = (const uint16_t *)
 	    sections[IWM_NVM_SECTION_TYPE_MAC_OVERRIDE].data;
 	phy_sku = (const uint16_t *)sections[IWM_NVM_SECTION_TYPE_PHY_SKU].data;
 
 	return iwm_parse_nvm_data(sc, hw, sw, calib, mac_override,
 	    phy_sku, regulatory);
 }
 
 static int
 iwm_nvm_init(struct iwm_softc *sc)
 {
 	struct iwm_nvm_section nvm_sections[IWM_NVM_MAX_NUM_SECTIONS];
 	int i, ret, section;
 	uint32_t size_read = 0;
 	uint8_t *nvm_buffer, *temp;
 	uint16_t len;
 
 	memset(nvm_sections, 0, sizeof(nvm_sections));
 
 	if (sc->cfg->nvm_hw_section_num >= IWM_NVM_MAX_NUM_SECTIONS)
 		return EINVAL;
 
 	/* load NVM values from nic */
 	/* Read From FW NVM */
 	IWM_DPRINTF(sc, IWM_DEBUG_EEPROM, "Read from NVM\n");
 
 	nvm_buffer = malloc(sc->cfg->eeprom_size, M_DEVBUF, M_NOWAIT | M_ZERO);
 	if (!nvm_buffer)
 		return ENOMEM;
 	for (section = 0; section < IWM_NVM_MAX_NUM_SECTIONS; section++) {
 		/* we override the constness for initial read */
 		ret = iwm_nvm_read_section(sc, section, nvm_buffer,
 					   &len, size_read);
 		if (ret)
 			continue;
 		size_read += len;
 		temp = malloc(len, M_DEVBUF, M_NOWAIT);
 		if (!temp) {
 			ret = ENOMEM;
 			break;
 		}
 		memcpy(temp, nvm_buffer, len);
 
 		nvm_sections[section].data = temp;
 		nvm_sections[section].length = len;
 	}
 	if (!size_read)
 		device_printf(sc->sc_dev, "OTP is blank\n");
 	free(nvm_buffer, M_DEVBUF);
 
 	sc->nvm_data = iwm_parse_nvm_sections(sc, nvm_sections);
 	if (!sc->nvm_data)
 		return EINVAL;
 	IWM_DPRINTF(sc, IWM_DEBUG_EEPROM | IWM_DEBUG_RESET,
 		    "nvm version = %x\n", sc->nvm_data->nvm_version);
 
 	for (i = 0; i < IWM_NVM_MAX_NUM_SECTIONS; i++) {
 		if (nvm_sections[i].data != NULL)
 			free(nvm_sections[i].data, M_DEVBUF);
 	}
 
 	return 0;
 }
 
 static int
 iwm_pcie_load_section(struct iwm_softc *sc, uint8_t section_num,
 	const struct iwm_fw_desc *section)
 {
 	struct iwm_dma_info *dma = &sc->fw_dma;
 	uint8_t *v_addr;
 	bus_addr_t p_addr;
 	uint32_t offset, chunk_sz = MIN(IWM_FH_MEM_TB_MAX_LENGTH, section->len);
 	int ret = 0;
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RESET,
 		    "%s: [%d] uCode section being loaded...\n",
 		    __func__, section_num);
 
 	v_addr = dma->vaddr;
 	p_addr = dma->paddr;
 
 	for (offset = 0; offset < section->len; offset += chunk_sz) {
 		uint32_t copy_size, dst_addr;
 		int extended_addr = FALSE;
 
 		copy_size = MIN(chunk_sz, section->len - offset);
 		dst_addr = section->offset + offset;
 
 		if (dst_addr >= IWM_FW_MEM_EXTENDED_START &&
 		    dst_addr <= IWM_FW_MEM_EXTENDED_END)
 			extended_addr = TRUE;
 
 		if (extended_addr)
 			iwm_set_bits_prph(sc, IWM_LMPM_CHICK,
 					  IWM_LMPM_CHICK_EXTENDED_ADDR_SPACE);
 
 		memcpy(v_addr, (const uint8_t *)section->data + offset,
 		    copy_size);
 		bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
 		ret = iwm_pcie_load_firmware_chunk(sc, dst_addr, p_addr,
 						   copy_size);
 
 		if (extended_addr)
 			iwm_clear_bits_prph(sc, IWM_LMPM_CHICK,
 					    IWM_LMPM_CHICK_EXTENDED_ADDR_SPACE);
 
 		if (ret) {
 			device_printf(sc->sc_dev,
 			    "%s: Could not load the [%d] uCode section\n",
 			    __func__, section_num);
 			break;
 		}
 	}
 
 	return ret;
 }
 
 /*
  * ucode
  */
 static int
 iwm_pcie_load_firmware_chunk(struct iwm_softc *sc, uint32_t dst_addr,
 			     bus_addr_t phy_addr, uint32_t byte_cnt)
 {
 	int ret;
 
 	sc->sc_fw_chunk_done = 0;
 
 	if (!iwm_nic_lock(sc))
 		return EBUSY;
 
 	IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(IWM_FH_SRVC_CHNL),
 	    IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
 
 	IWM_WRITE(sc, IWM_FH_SRVC_CHNL_SRAM_ADDR_REG(IWM_FH_SRVC_CHNL),
 	    dst_addr);
 
 	IWM_WRITE(sc, IWM_FH_TFDIB_CTRL0_REG(IWM_FH_SRVC_CHNL),
 	    phy_addr & IWM_FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
 
 	IWM_WRITE(sc, IWM_FH_TFDIB_CTRL1_REG(IWM_FH_SRVC_CHNL),
 	    (iwm_get_dma_hi_addr(phy_addr)
 	     << IWM_FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
 
 	IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_BUF_STS_REG(IWM_FH_SRVC_CHNL),
 	    1 << IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
 	    1 << IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
 	    IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
 
 	IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(IWM_FH_SRVC_CHNL),
 	    IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE    |
 	    IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE |
 	    IWM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
 
 	iwm_nic_unlock(sc);
 
 	/* wait up to 5s for this segment to load */
 	ret = 0;
 	while (!sc->sc_fw_chunk_done) {
 		ret = msleep(&sc->sc_fw, &sc->sc_mtx, 0, "iwmfw", hz);
 		if (ret)
 			break;
 	}
 
 	if (ret != 0) {
 		device_printf(sc->sc_dev,
 		    "fw chunk addr 0x%x len %d failed to load\n",
 		    dst_addr, byte_cnt);
 		return ETIMEDOUT;
 	}
 
 	return 0;
 }
 
 static int
 iwm_pcie_load_cpu_sections_8000(struct iwm_softc *sc,
 	const struct iwm_fw_sects *image, int cpu, int *first_ucode_section)
 {
 	int shift_param;
 	int i, ret = 0, sec_num = 0x1;
 	uint32_t val, last_read_idx = 0;
 
 	if (cpu == 1) {
 		shift_param = 0;
 		*first_ucode_section = 0;
 	} else {
 		shift_param = 16;
 		(*first_ucode_section)++;
 	}
 
 	for (i = *first_ucode_section; i < IWM_UCODE_SECTION_MAX; i++) {
 		last_read_idx = i;
 
 		/*
 		 * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between
 		 * CPU1 to CPU2.
 		 * PAGING_SEPARATOR_SECTION delimiter - separate between
 		 * CPU2 non paged to CPU2 paging sec.
 		 */
 		if (!image->fw_sect[i].data ||
 		    image->fw_sect[i].offset == IWM_CPU1_CPU2_SEPARATOR_SECTION ||
 		    image->fw_sect[i].offset == IWM_PAGING_SEPARATOR_SECTION) {
 			IWM_DPRINTF(sc, IWM_DEBUG_RESET,
 				    "Break since Data not valid or Empty section, sec = %d\n",
 				    i);
 			break;
 		}
 		ret = iwm_pcie_load_section(sc, i, &image->fw_sect[i]);
 		if (ret)
 			return ret;
 
 		/* Notify the ucode of the loaded section number and status */
 		if (iwm_nic_lock(sc)) {
 			val = IWM_READ(sc, IWM_FH_UCODE_LOAD_STATUS);
 			val = val | (sec_num << shift_param);
 			IWM_WRITE(sc, IWM_FH_UCODE_LOAD_STATUS, val);
 			sec_num = (sec_num << 1) | 0x1;
 			iwm_nic_unlock(sc);
 		}
 	}
 
 	*first_ucode_section = last_read_idx;
 
 	iwm_enable_interrupts(sc);
 
 	if (iwm_nic_lock(sc)) {
 		if (cpu == 1)
 			IWM_WRITE(sc, IWM_FH_UCODE_LOAD_STATUS, 0xFFFF);
 		else
 			IWM_WRITE(sc, IWM_FH_UCODE_LOAD_STATUS, 0xFFFFFFFF);
 		iwm_nic_unlock(sc);
 	}
 
 	return 0;
 }
 
 static int
 iwm_pcie_load_cpu_sections(struct iwm_softc *sc,
 	const struct iwm_fw_sects *image, int cpu, int *first_ucode_section)
 {
 	int shift_param;
 	int i, ret = 0;
 	uint32_t last_read_idx = 0;
 
 	if (cpu == 1) {
 		shift_param = 0;
 		*first_ucode_section = 0;
 	} else {
 		shift_param = 16;
 		(*first_ucode_section)++;
 	}
 
 	for (i = *first_ucode_section; i < IWM_UCODE_SECTION_MAX; i++) {
 		last_read_idx = i;
 
 		/*
 		 * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between
 		 * CPU1 to CPU2.
 		 * PAGING_SEPARATOR_SECTION delimiter - separate between
 		 * CPU2 non paged to CPU2 paging sec.
 		 */
 		if (!image->fw_sect[i].data ||
 		    image->fw_sect[i].offset == IWM_CPU1_CPU2_SEPARATOR_SECTION ||
 		    image->fw_sect[i].offset == IWM_PAGING_SEPARATOR_SECTION) {
 			IWM_DPRINTF(sc, IWM_DEBUG_RESET,
 				    "Break since Data not valid or Empty section, sec = %d\n",
 				     i);
 			break;
 		}
 
 		ret = iwm_pcie_load_section(sc, i, &image->fw_sect[i]);
 		if (ret)
 			return ret;
 	}
 
 	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000)
 		iwm_set_bits_prph(sc,
 				  IWM_CSR_UCODE_LOAD_STATUS_ADDR,
 				  (IWM_LMPM_CPU_UCODE_LOADING_COMPLETED |
 				   IWM_LMPM_CPU_HDRS_LOADING_COMPLETED |
 				   IWM_LMPM_CPU_UCODE_LOADING_STARTED) <<
 					shift_param);
 
 	*first_ucode_section = last_read_idx;
 
 	return 0;
 
 }
 
 static int
 iwm_pcie_load_given_ucode(struct iwm_softc *sc,
 	const struct iwm_fw_sects *image)
 {
 	int ret = 0;
 	int first_ucode_section;
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RESET, "working with %s CPU\n",
 		     image->is_dual_cpus ? "Dual" : "Single");
 
 	/* load to FW the binary non secured sections of CPU1 */
 	ret = iwm_pcie_load_cpu_sections(sc, image, 1, &first_ucode_section);
 	if (ret)
 		return ret;
 
 	if (image->is_dual_cpus) {
 		/* set CPU2 header address */
                 iwm_write_prph(sc,
 			       IWM_LMPM_SECURE_UCODE_LOAD_CPU2_HDR_ADDR,
 			       IWM_LMPM_SECURE_CPU2_HDR_MEM_SPACE);
 
 		/* load to FW the binary sections of CPU2 */
 		ret = iwm_pcie_load_cpu_sections(sc, image, 2,
 						 &first_ucode_section);
 		if (ret)
 			return ret;
 	}
 
 	iwm_enable_interrupts(sc);
 
 	/* release CPU reset */
 	IWM_WRITE(sc, IWM_CSR_RESET, 0);
 
 	return 0;
 }
 
 int
 iwm_pcie_load_given_ucode_8000(struct iwm_softc *sc,
 	const struct iwm_fw_sects *image)
 {
 	int ret = 0;
 	int first_ucode_section;
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RESET, "working with %s CPU\n",
 		    image->is_dual_cpus ? "Dual" : "Single");
 
 	/* configure the ucode to be ready to get the secured image */
 	/* release CPU reset */
 	iwm_write_prph(sc, IWM_RELEASE_CPU_RESET, IWM_RELEASE_CPU_RESET_BIT);
 
 	/* load to FW the binary Secured sections of CPU1 */
 	ret = iwm_pcie_load_cpu_sections_8000(sc, image, 1,
 	    &first_ucode_section);
 	if (ret)
 		return ret;
 
 	/* load to FW the binary sections of CPU2 */
 	return iwm_pcie_load_cpu_sections_8000(sc, image, 2,
 	    &first_ucode_section);
 }
 
 /* XXX Get rid of this definition */
 static inline void
 iwm_enable_fw_load_int(struct iwm_softc *sc)
 {
 	IWM_DPRINTF(sc, IWM_DEBUG_INTR, "Enabling FW load interrupt\n");
 	sc->sc_intmask = IWM_CSR_INT_BIT_FH_TX;
 	IWM_WRITE(sc, IWM_CSR_INT_MASK, sc->sc_intmask);
 }
 
 /* XXX Add proper rfkill support code */
 static int
 iwm_start_fw(struct iwm_softc *sc,
 	const struct iwm_fw_sects *fw)
 {
 	int ret;
 
 	/* This may fail if AMT took ownership of the device */
 	if (iwm_prepare_card_hw(sc)) {
 		device_printf(sc->sc_dev,
 		    "%s: Exit HW not ready\n", __func__);
 		ret = EIO;
 		goto out;
 	}
 
 	IWM_WRITE(sc, IWM_CSR_INT, 0xFFFFFFFF);
 
 	iwm_disable_interrupts(sc);
 
 	/* make sure rfkill handshake bits are cleared */
 	IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL);
 	IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR,
 	    IWM_CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 
 	/* clear (again), then enable host interrupts */
 	IWM_WRITE(sc, IWM_CSR_INT, 0xFFFFFFFF);
 
 	ret = iwm_nic_init(sc);
 	if (ret) {
 		device_printf(sc->sc_dev, "%s: Unable to init nic\n", __func__);
 		goto out;
 	}
 
 	/*
 	 * Now, we load the firmware and don't want to be interrupted, even
 	 * by the RF-Kill interrupt (hence mask all the interrupt besides the
 	 * FH_TX interrupt which is needed to load the firmware). If the
 	 * RF-Kill switch is toggled, we will find out after having loaded
 	 * the firmware and return the proper value to the caller.
 	 */
 	iwm_enable_fw_load_int(sc);
 
 	/* really make sure rfkill handshake bits are cleared */
 	/* maybe we should write a few times more?  just to make sure */
 	IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL);
 	IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL);
 
 	/* Load the given image to the HW */
 	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000)
 		ret = iwm_pcie_load_given_ucode_8000(sc, fw);
 	else
 		ret = iwm_pcie_load_given_ucode(sc, fw);
 
 	/* XXX re-check RF-Kill state */
 
 out:
 	return ret;
 }
 
 static int
 iwm_send_tx_ant_cfg(struct iwm_softc *sc, uint8_t valid_tx_ant)
 {
 	struct iwm_tx_ant_cfg_cmd tx_ant_cmd = {
 		.valid = htole32(valid_tx_ant),
 	};
 
 	return iwm_mvm_send_cmd_pdu(sc, IWM_TX_ANT_CONFIGURATION_CMD,
 	    IWM_CMD_SYNC, sizeof(tx_ant_cmd), &tx_ant_cmd);
 }
 
 /* iwlwifi: mvm/fw.c */
 static int
 iwm_send_phy_cfg_cmd(struct iwm_softc *sc)
 {
 	struct iwm_phy_cfg_cmd phy_cfg_cmd;
 	enum iwm_ucode_type ucode_type = sc->cur_ucode;
 
 	/* Set parameters */
 	phy_cfg_cmd.phy_cfg = htole32(iwm_mvm_get_phy_config(sc));
 	phy_cfg_cmd.calib_control.event_trigger =
 	    sc->sc_default_calib[ucode_type].event_trigger;
 	phy_cfg_cmd.calib_control.flow_trigger =
 	    sc->sc_default_calib[ucode_type].flow_trigger;
 
 	IWM_DPRINTF(sc, IWM_DEBUG_CMD | IWM_DEBUG_RESET,
 	    "Sending Phy CFG command: 0x%x\n", phy_cfg_cmd.phy_cfg);
 	return iwm_mvm_send_cmd_pdu(sc, IWM_PHY_CONFIGURATION_CMD, IWM_CMD_SYNC,
 	    sizeof(phy_cfg_cmd), &phy_cfg_cmd);
 }
 
 static int
 iwm_alive_fn(struct iwm_softc *sc, struct iwm_rx_packet *pkt, void *data)
 {
 	struct iwm_mvm_alive_data *alive_data = data;
 	struct iwm_mvm_alive_resp_ver1 *palive1;
 	struct iwm_mvm_alive_resp_ver2 *palive2;
 	struct iwm_mvm_alive_resp *palive;
 
 	if (iwm_rx_packet_payload_len(pkt) == sizeof(*palive1)) {
 		palive1 = (void *)pkt->data;
 
 		sc->support_umac_log = FALSE;
                 sc->error_event_table =
                         le32toh(palive1->error_event_table_ptr);
                 sc->log_event_table =
                         le32toh(palive1->log_event_table_ptr);
                 alive_data->scd_base_addr = le32toh(palive1->scd_base_ptr);
 
                 alive_data->valid = le16toh(palive1->status) ==
                                     IWM_ALIVE_STATUS_OK;
                 IWM_DPRINTF(sc, IWM_DEBUG_RESET,
 			    "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
 			     le16toh(palive1->status), palive1->ver_type,
                              palive1->ver_subtype, palive1->flags);
 	} else if (iwm_rx_packet_payload_len(pkt) == sizeof(*palive2)) {
 		palive2 = (void *)pkt->data;
 		sc->error_event_table =
 			le32toh(palive2->error_event_table_ptr);
 		sc->log_event_table =
 			le32toh(palive2->log_event_table_ptr);
 		alive_data->scd_base_addr = le32toh(palive2->scd_base_ptr);
 		sc->umac_error_event_table =
                         le32toh(palive2->error_info_addr);
 
 		alive_data->valid = le16toh(palive2->status) ==
 				    IWM_ALIVE_STATUS_OK;
 		if (sc->umac_error_event_table)
 			sc->support_umac_log = TRUE;
 
 		IWM_DPRINTF(sc, IWM_DEBUG_RESET,
 			    "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
 			    le16toh(palive2->status), palive2->ver_type,
 			    palive2->ver_subtype, palive2->flags);
 
 		IWM_DPRINTF(sc, IWM_DEBUG_RESET,
 			    "UMAC version: Major - 0x%x, Minor - 0x%x\n",
 			    palive2->umac_major, palive2->umac_minor);
 	} else if (iwm_rx_packet_payload_len(pkt) == sizeof(*palive)) {
 		palive = (void *)pkt->data;
 
 		sc->error_event_table =
 			le32toh(palive->error_event_table_ptr);
 		sc->log_event_table =
 			le32toh(palive->log_event_table_ptr);
 		alive_data->scd_base_addr = le32toh(palive->scd_base_ptr);
 		sc->umac_error_event_table =
 			le32toh(palive->error_info_addr);
 
 		alive_data->valid = le16toh(palive->status) ==
 				    IWM_ALIVE_STATUS_OK;
 		if (sc->umac_error_event_table)
 			sc->support_umac_log = TRUE;
 
 		IWM_DPRINTF(sc, IWM_DEBUG_RESET,
 			    "Alive VER3 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
 			    le16toh(palive->status), palive->ver_type,
 			    palive->ver_subtype, palive->flags);
 
 		IWM_DPRINTF(sc, IWM_DEBUG_RESET,
 			    "UMAC version: Major - 0x%x, Minor - 0x%x\n",
 			    le32toh(palive->umac_major),
 			    le32toh(palive->umac_minor));
 	}
 
 	return TRUE;
 }
 
 static int
 iwm_wait_phy_db_entry(struct iwm_softc *sc,
 	struct iwm_rx_packet *pkt, void *data)
 {
 	struct iwm_phy_db *phy_db = data;
 
 	if (pkt->hdr.code != IWM_CALIB_RES_NOTIF_PHY_DB) {
 		if(pkt->hdr.code != IWM_INIT_COMPLETE_NOTIF) {
 			device_printf(sc->sc_dev, "%s: Unexpected cmd: %d\n",
 			    __func__, pkt->hdr.code);
 		}
 		return TRUE;
 	}
 
 	if (iwm_phy_db_set_section(phy_db, pkt)) {
 		device_printf(sc->sc_dev,
 		    "%s: iwm_phy_db_set_section failed\n", __func__);
 	}
 
 	return FALSE;
 }
 
 static int
 iwm_mvm_load_ucode_wait_alive(struct iwm_softc *sc,
 	enum iwm_ucode_type ucode_type)
 {
 	struct iwm_notification_wait alive_wait;
 	struct iwm_mvm_alive_data alive_data;
 	const struct iwm_fw_sects *fw;
 	enum iwm_ucode_type old_type = sc->cur_ucode;
 	int error;
 	static const uint16_t alive_cmd[] = { IWM_MVM_ALIVE };
 
 	if ((error = iwm_read_firmware(sc, ucode_type)) != 0) {
 		device_printf(sc->sc_dev, "iwm_read_firmware: failed %d\n",
 			error);
 		return error;
 	}
 	fw = &sc->sc_fw.fw_sects[ucode_type];
 	sc->cur_ucode = ucode_type;
 	sc->ucode_loaded = FALSE;
 
 	memset(&alive_data, 0, sizeof(alive_data));
 	iwm_init_notification_wait(sc->sc_notif_wait, &alive_wait,
 				   alive_cmd, nitems(alive_cmd),
 				   iwm_alive_fn, &alive_data);
 
 	error = iwm_start_fw(sc, fw);
 	if (error) {
 		device_printf(sc->sc_dev, "iwm_start_fw: failed %d\n", error);
 		sc->cur_ucode = old_type;
 		iwm_remove_notification(sc->sc_notif_wait, &alive_wait);
 		return error;
 	}
 
 	/*
 	 * Some things may run in the background now, but we
 	 * just wait for the ALIVE notification here.
 	 */
 	IWM_UNLOCK(sc);
 	error = iwm_wait_notification(sc->sc_notif_wait, &alive_wait,
 				      IWM_MVM_UCODE_ALIVE_TIMEOUT);
 	IWM_LOCK(sc);
 	if (error) {
 		if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000) {
 			device_printf(sc->sc_dev,
 			    "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
 			    iwm_read_prph(sc, IWM_SB_CPU_1_STATUS),
 			    iwm_read_prph(sc, IWM_SB_CPU_2_STATUS));
 		}
 		sc->cur_ucode = old_type;
 		return error;
 	}
 
 	if (!alive_data.valid) {
 		device_printf(sc->sc_dev, "%s: Loaded ucode is not valid\n",
 		    __func__);
 		sc->cur_ucode = old_type;
 		return EIO;
 	}
 
 	iwm_trans_pcie_fw_alive(sc, alive_data.scd_base_addr);
 
 	/*
 	 * configure and operate fw paging mechanism.
 	 * driver configures the paging flow only once, CPU2 paging image
 	 * included in the IWM_UCODE_INIT image.
 	 */
 	if (fw->paging_mem_size) {
-		/* XXX implement FW paging */
-		device_printf(sc->sc_dev,
-		    "%s: XXX FW paging not implemented yet\n", __func__);
+		error = iwm_save_fw_paging(sc, fw);
+		if (error) {
+			device_printf(sc->sc_dev,
+			    "%s: failed to save the FW paging image\n",
+			    __func__);
+			return error;
+		}
+
+		error = iwm_send_paging_cmd(sc, fw);
+		if (error) {
+			device_printf(sc->sc_dev,
+			    "%s: failed to send the paging cmd\n", __func__);
+			iwm_free_fw_paging(sc);
+			return error;
+		}
 	}
 
 	if (!error)
 		sc->ucode_loaded = TRUE;
 	return error;
 }
 
 /*
  * mvm misc bits
  */
 
 /*
  * follows iwlwifi/fw.c
  */
 static int
 iwm_run_init_mvm_ucode(struct iwm_softc *sc, int justnvm)
 {
 	struct iwm_notification_wait calib_wait;
 	static const uint16_t init_complete[] = {
 		IWM_INIT_COMPLETE_NOTIF,
 		IWM_CALIB_RES_NOTIF_PHY_DB
 	};
 	int ret;
 
 	/* do not operate with rfkill switch turned on */
 	if ((sc->sc_flags & IWM_FLAG_RFKILL) && !justnvm) {
 		device_printf(sc->sc_dev,
 		    "radio is disabled by hardware switch\n");
 		return EPERM;
 	}
 
 	iwm_init_notification_wait(sc->sc_notif_wait,
 				   &calib_wait,
 				   init_complete,
 				   nitems(init_complete),
 				   iwm_wait_phy_db_entry,
 				   sc->sc_phy_db);
 
 	/* Will also start the device */
 	ret = iwm_mvm_load_ucode_wait_alive(sc, IWM_UCODE_INIT);
 	if (ret) {
 		device_printf(sc->sc_dev, "Failed to start INIT ucode: %d\n",
 		    ret);
 		goto error;
 	}
 
 	if (justnvm) {
 		/* Read nvm */
 		ret = iwm_nvm_init(sc);
 		if (ret) {
 			device_printf(sc->sc_dev, "failed to read nvm\n");
 			goto error;
 		}
 		IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, sc->nvm_data->hw_addr);
 		goto error;
 	}
 
 	ret = iwm_send_bt_init_conf(sc);
 	if (ret) {
 		device_printf(sc->sc_dev,
 		    "failed to send bt coex configuration: %d\n", ret);
 		goto error;
 	}
 
 	/* Init Smart FIFO. */
 	ret = iwm_mvm_sf_config(sc, IWM_SF_INIT_OFF);
 	if (ret)
 		goto error;
 
 	/* Send TX valid antennas before triggering calibrations */
 	ret = iwm_send_tx_ant_cfg(sc, iwm_mvm_get_valid_tx_ant(sc));
 	if (ret) {
 		device_printf(sc->sc_dev,
 		    "failed to send antennas before calibration: %d\n", ret);
 		goto error;
 	}
 
 	/*
 	 * Send phy configurations command to init uCode
 	 * to start the 16.0 uCode init image internal calibrations.
 	 */
 	ret = iwm_send_phy_cfg_cmd(sc);
 	if (ret) {
 		device_printf(sc->sc_dev,
 		    "%s: Failed to run INIT calibrations: %d\n",
 		    __func__, ret);
 		goto error;
 	}
 
 	/*
 	 * Nothing to do but wait for the init complete notification
 	 * from the firmware.
 	 */
 	IWM_UNLOCK(sc);
 	ret = iwm_wait_notification(sc->sc_notif_wait, &calib_wait,
 	    IWM_MVM_UCODE_CALIB_TIMEOUT);
 	IWM_LOCK(sc);
 
 
 	goto out;
 
 error:
 	iwm_remove_notification(sc->sc_notif_wait, &calib_wait);
 out:
 	return ret;
 }
 
 /*
  * receive side
  */
 
 /* (re)stock rx ring, called at init-time and at runtime */
 static int
 iwm_rx_addbuf(struct iwm_softc *sc, int size, int idx)
 {
 	struct iwm_rx_ring *ring = &sc->rxq;
 	struct iwm_rx_data *data = &ring->data[idx];
 	struct mbuf *m;
 	bus_dmamap_t dmamap = NULL;
 	bus_dma_segment_t seg;
 	int nsegs, error;
 
 	m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, IWM_RBUF_SIZE);
 	if (m == NULL)
 		return ENOBUFS;
 
 	m->m_len = m->m_pkthdr.len = m->m_ext.ext_size;
 	error = bus_dmamap_load_mbuf_sg(ring->data_dmat, ring->spare_map, m,
 	    &seg, &nsegs, BUS_DMA_NOWAIT);
 	if (error != 0) {
 		device_printf(sc->sc_dev,
 		    "%s: can't map mbuf, error %d\n", __func__, error);
 		goto fail;
 	}
 
 	if (data->m != NULL)
 		bus_dmamap_unload(ring->data_dmat, data->map);
 
 	/* Swap ring->spare_map with data->map */
 	dmamap = data->map;
 	data->map = ring->spare_map;
 	ring->spare_map = dmamap;
 
 	bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREREAD);
 	data->m = m;
 
 	/* Update RX descriptor. */
 	KASSERT((seg.ds_addr & 255) == 0, ("seg.ds_addr not aligned"));
 	ring->desc[idx] = htole32(seg.ds_addr >> 8);
 	bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
 	    BUS_DMASYNC_PREWRITE);
 
 	return 0;
 fail:
 	m_freem(m);
 	return error;
 }
 
 /* iwlwifi: mvm/rx.c */
 #define IWM_RSSI_OFFSET 50
 static int
 iwm_mvm_calc_rssi(struct iwm_softc *sc, struct iwm_rx_phy_info *phy_info)
 {
 	int rssi_a, rssi_b, rssi_a_dbm, rssi_b_dbm, max_rssi_dbm;
 	uint32_t agc_a, agc_b;
 	uint32_t val;
 
 	val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_AGC_IDX]);
 	agc_a = (val & IWM_OFDM_AGC_A_MSK) >> IWM_OFDM_AGC_A_POS;
 	agc_b = (val & IWM_OFDM_AGC_B_MSK) >> IWM_OFDM_AGC_B_POS;
 
 	val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_RSSI_AB_IDX]);
 	rssi_a = (val & IWM_OFDM_RSSI_INBAND_A_MSK) >> IWM_OFDM_RSSI_A_POS;
 	rssi_b = (val & IWM_OFDM_RSSI_INBAND_B_MSK) >> IWM_OFDM_RSSI_B_POS;
 
 	/*
 	 * dBm = rssi dB - agc dB - constant.
 	 * Higher AGC (higher radio gain) means lower signal.
 	 */
 	rssi_a_dbm = rssi_a - IWM_RSSI_OFFSET - agc_a;
 	rssi_b_dbm = rssi_b - IWM_RSSI_OFFSET - agc_b;
 	max_rssi_dbm = MAX(rssi_a_dbm, rssi_b_dbm);
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RECV,
 	    "Rssi In A %d B %d Max %d AGCA %d AGCB %d\n",
 	    rssi_a_dbm, rssi_b_dbm, max_rssi_dbm, agc_a, agc_b);
 
 	return max_rssi_dbm;
 }
 
 /* iwlwifi: mvm/rx.c */
 /*
  * iwm_mvm_get_signal_strength - use new rx PHY INFO API
  * values are reported by the fw as positive values - need to negate
  * to obtain their dBM.  Account for missing antennas by replacing 0
  * values by -256dBm: practically 0 power and a non-feasible 8 bit value.
  */
 static int
 iwm_mvm_get_signal_strength(struct iwm_softc *sc, struct iwm_rx_phy_info *phy_info)
 {
 	int energy_a, energy_b, energy_c, max_energy;
 	uint32_t val;
 
 	val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_ENERGY_ANT_ABC_IDX]);
 	energy_a = (val & IWM_RX_INFO_ENERGY_ANT_A_MSK) >>
 	    IWM_RX_INFO_ENERGY_ANT_A_POS;
 	energy_a = energy_a ? -energy_a : -256;
 	energy_b = (val & IWM_RX_INFO_ENERGY_ANT_B_MSK) >>
 	    IWM_RX_INFO_ENERGY_ANT_B_POS;
 	energy_b = energy_b ? -energy_b : -256;
 	energy_c = (val & IWM_RX_INFO_ENERGY_ANT_C_MSK) >>
 	    IWM_RX_INFO_ENERGY_ANT_C_POS;
 	energy_c = energy_c ? -energy_c : -256;
 	max_energy = MAX(energy_a, energy_b);
 	max_energy = MAX(max_energy, energy_c);
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RECV,
 	    "energy In A %d B %d C %d , and max %d\n",
 	    energy_a, energy_b, energy_c, max_energy);
 
 	return max_energy;
 }
 
 static void
 iwm_mvm_rx_rx_phy_cmd(struct iwm_softc *sc,
 	struct iwm_rx_packet *pkt, struct iwm_rx_data *data)
 {
 	struct iwm_rx_phy_info *phy_info = (void *)pkt->data;
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RECV, "received PHY stats\n");
 	bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
 
 	memcpy(&sc->sc_last_phy_info, phy_info, sizeof(sc->sc_last_phy_info));
 }
 
 /*
  * Retrieve the average noise (in dBm) among receivers.
  */
 static int
 iwm_get_noise(struct iwm_softc *sc,
     const struct iwm_mvm_statistics_rx_non_phy *stats)
 {
 	int i, total, nbant, noise;
 
 	total = nbant = noise = 0;
 	for (i = 0; i < 3; i++) {
 		noise = le32toh(stats->beacon_silence_rssi[i]) & 0xff;
 		IWM_DPRINTF(sc, IWM_DEBUG_RECV, "%s: i=%d, noise=%d\n",
 		    __func__,
 		    i,
 		    noise);
 
 		if (noise) {
 			total += noise;
 			nbant++;
 		}
 	}
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RECV, "%s: nbant=%d, total=%d\n",
 	    __func__, nbant, total);
 #if 0
 	/* There should be at least one antenna but check anyway. */
 	return (nbant == 0) ? -127 : (total / nbant) - 107;
 #else
 	/* For now, just hard-code it to -96 to be safe */
 	return (-96);
 #endif
 }
 
 /*
  * iwm_mvm_rx_rx_mpdu - IWM_REPLY_RX_MPDU_CMD handler
  *
  * Handles the actual data of the Rx packet from the fw
  */
 static void
 iwm_mvm_rx_rx_mpdu(struct iwm_softc *sc,
 	struct iwm_rx_packet *pkt, struct iwm_rx_data *data)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
 	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
 	struct ieee80211_frame *wh;
 	struct ieee80211_node *ni;
 	struct ieee80211_rx_stats rxs;
 	struct mbuf *m;
 	struct iwm_rx_phy_info *phy_info;
 	struct iwm_rx_mpdu_res_start *rx_res;
 	uint32_t len;
 	uint32_t rx_pkt_status;
 	int rssi;
 
 	bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
 
 	phy_info = &sc->sc_last_phy_info;
 	rx_res = (struct iwm_rx_mpdu_res_start *)pkt->data;
 	wh = (struct ieee80211_frame *)(pkt->data + sizeof(*rx_res));
 	len = le16toh(rx_res->byte_count);
 	rx_pkt_status = le32toh(*(uint32_t *)(pkt->data + sizeof(*rx_res) + len));
 
 	m = data->m;
 	m->m_data = pkt->data + sizeof(*rx_res);
 	m->m_pkthdr.len = m->m_len = len;
 
 	if (__predict_false(phy_info->cfg_phy_cnt > 20)) {
 		device_printf(sc->sc_dev,
 		    "dsp size out of range [0,20]: %d\n",
 		    phy_info->cfg_phy_cnt);
 		goto fail;
 	}
 
 	if (!(rx_pkt_status & IWM_RX_MPDU_RES_STATUS_CRC_OK) ||
 	    !(rx_pkt_status & IWM_RX_MPDU_RES_STATUS_OVERRUN_OK)) {
 		IWM_DPRINTF(sc, IWM_DEBUG_RECV,
 		    "Bad CRC or FIFO: 0x%08X.\n", rx_pkt_status);
 		goto fail;
 	}
 
 	if (sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_RX_ENERGY_API) {
 		rssi = iwm_mvm_get_signal_strength(sc, phy_info);
 	} else {
 		rssi = iwm_mvm_calc_rssi(sc, phy_info);
 	}
 
 	/* Note: RSSI is absolute (ie a -ve value) */
 	if (rssi < IWM_MIN_DBM)
 		rssi = IWM_MIN_DBM;
 	else if (rssi > IWM_MAX_DBM)
 		rssi = IWM_MAX_DBM;
 
 	/* Map it to relative value */
 	rssi = rssi - sc->sc_noise;
 
 	/* replenish ring for the buffer we're going to feed to the sharks */
 	if (iwm_rx_addbuf(sc, IWM_RBUF_SIZE, sc->rxq.cur) != 0) {
 		device_printf(sc->sc_dev, "%s: unable to add more buffers\n",
 		    __func__);
 		goto fail;
 	}
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RECV,
 	    "%s: rssi=%d, noise=%d\n", __func__, rssi, sc->sc_noise);
 
 	ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RECV,
 	    "%s: phy_info: channel=%d, flags=0x%08x\n",
 	    __func__,
 	    le16toh(phy_info->channel),
 	    le16toh(phy_info->phy_flags));
 
 	/*
 	 * Populate an RX state struct with the provided information.
 	 */
 	bzero(&rxs, sizeof(rxs));
 	rxs.r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ;
 	rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI;
 	rxs.c_ieee = le16toh(phy_info->channel);
 	if (le16toh(phy_info->phy_flags & IWM_RX_RES_PHY_FLAGS_BAND_24)) {
 		rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_2GHZ);
 	} else {
 		rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_5GHZ);
 	}
 
 	/* rssi is in 1/2db units */
 	rxs.c_rssi = rssi * 2;
 	rxs.c_nf = sc->sc_noise;
 	if (ieee80211_add_rx_params(m, &rxs) == 0) {
 		if (ni)
 			ieee80211_free_node(ni);
 		goto fail;
 	}
 
 	if (ieee80211_radiotap_active_vap(vap)) {
 		struct iwm_rx_radiotap_header *tap = &sc->sc_rxtap;
 
 		tap->wr_flags = 0;
 		if (phy_info->phy_flags & htole16(IWM_PHY_INFO_FLAG_SHPREAMBLE))
 			tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
 		tap->wr_chan_freq = htole16(rxs.c_freq);
 		/* XXX only if ic->ic_curchan->ic_ieee == rxs.c_ieee */
 		tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
 		tap->wr_dbm_antsignal = (int8_t)rssi;
 		tap->wr_dbm_antnoise = (int8_t)sc->sc_noise;
 		tap->wr_tsft = phy_info->system_timestamp;
 		switch (phy_info->rate) {
 		/* CCK rates. */
 		case  10: tap->wr_rate =   2; break;
 		case  20: tap->wr_rate =   4; break;
 		case  55: tap->wr_rate =  11; break;
 		case 110: tap->wr_rate =  22; break;
 		/* OFDM rates. */
 		case 0xd: tap->wr_rate =  12; break;
 		case 0xf: tap->wr_rate =  18; break;
 		case 0x5: tap->wr_rate =  24; break;
 		case 0x7: tap->wr_rate =  36; break;
 		case 0x9: tap->wr_rate =  48; break;
 		case 0xb: tap->wr_rate =  72; break;
 		case 0x1: tap->wr_rate =  96; break;
 		case 0x3: tap->wr_rate = 108; break;
 		/* Unknown rate: should not happen. */
 		default:  tap->wr_rate =   0;
 		}
 	}
 
 	IWM_UNLOCK(sc);
 	if (ni != NULL) {
 		IWM_DPRINTF(sc, IWM_DEBUG_RECV, "input m %p\n", m);
 		ieee80211_input_mimo(ni, m);
 		ieee80211_free_node(ni);
 	} else {
 		IWM_DPRINTF(sc, IWM_DEBUG_RECV, "inputall m %p\n", m);
 		ieee80211_input_mimo_all(ic, m);
 	}
 	IWM_LOCK(sc);
 
 	return;
 
 fail:
 	counter_u64_add(ic->ic_ierrors, 1);
 }
 
 static int
 iwm_mvm_rx_tx_cmd_single(struct iwm_softc *sc, struct iwm_rx_packet *pkt,
 	struct iwm_node *in)
 {
 	struct iwm_mvm_tx_resp *tx_resp = (void *)pkt->data;
 	struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
 	struct ieee80211_node *ni = &in->in_ni;
 	int status = le16toh(tx_resp->status.status) & IWM_TX_STATUS_MSK;
 
 	KASSERT(tx_resp->frame_count == 1, ("too many frames"));
 
 	/* Update rate control statistics. */
 	IWM_DPRINTF(sc, IWM_DEBUG_XMIT, "%s: status=0x%04x, seq=%d, fc=%d, btc=%d, frts=%d, ff=%d, irate=%08x, wmt=%d\n",
 	    __func__,
 	    (int) le16toh(tx_resp->status.status),
 	    (int) le16toh(tx_resp->status.sequence),
 	    tx_resp->frame_count,
 	    tx_resp->bt_kill_count,
 	    tx_resp->failure_rts,
 	    tx_resp->failure_frame,
 	    le32toh(tx_resp->initial_rate),
 	    (int) le16toh(tx_resp->wireless_media_time));
 
 	txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
 		     IEEE80211_RATECTL_STATUS_LONG_RETRY;
 	txs->short_retries = tx_resp->failure_rts;
 	txs->long_retries = tx_resp->failure_frame;
 	if (status != IWM_TX_STATUS_SUCCESS &&
 	    status != IWM_TX_STATUS_DIRECT_DONE) {
 		switch (status) {
 		case IWM_TX_STATUS_FAIL_SHORT_LIMIT:
 			txs->status = IEEE80211_RATECTL_TX_FAIL_SHORT;
 			break;
 		case IWM_TX_STATUS_FAIL_LONG_LIMIT:
 			txs->status = IEEE80211_RATECTL_TX_FAIL_LONG;
 			break;
 		case IWM_TX_STATUS_FAIL_LIFE_EXPIRE:
 			txs->status = IEEE80211_RATECTL_TX_FAIL_EXPIRED;
 			break;
 		default:
 			txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
 			break;
 		}
 	} else {
 		txs->status = IEEE80211_RATECTL_TX_SUCCESS;
 	}
 	ieee80211_ratectl_tx_complete(ni, txs);
 
 	return (txs->status != IEEE80211_RATECTL_TX_SUCCESS);
 }
 
 static void
 iwm_mvm_rx_tx_cmd(struct iwm_softc *sc,
 	struct iwm_rx_packet *pkt, struct iwm_rx_data *data)
 {
 	struct iwm_cmd_header *cmd_hdr = &pkt->hdr;
 	int idx = cmd_hdr->idx;
 	int qid = cmd_hdr->qid;
 	struct iwm_tx_ring *ring = &sc->txq[qid];
 	struct iwm_tx_data *txd = &ring->data[idx];
 	struct iwm_node *in = txd->in;
 	struct mbuf *m = txd->m;
 	int status;
 
 	KASSERT(txd->done == 0, ("txd not done"));
 	KASSERT(txd->in != NULL, ("txd without node"));
 	KASSERT(txd->m != NULL, ("txd without mbuf"));
 
 	bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
 
 	sc->sc_tx_timer = 0;
 
 	status = iwm_mvm_rx_tx_cmd_single(sc, pkt, in);
 
 	/* Unmap and free mbuf. */
 	bus_dmamap_sync(ring->data_dmat, txd->map, BUS_DMASYNC_POSTWRITE);
 	bus_dmamap_unload(ring->data_dmat, txd->map);
 
 	IWM_DPRINTF(sc, IWM_DEBUG_XMIT,
 	    "free txd %p, in %p\n", txd, txd->in);
 	txd->done = 1;
 	txd->m = NULL;
 	txd->in = NULL;
 
 	ieee80211_tx_complete(&in->in_ni, m, status);
 
 	if (--ring->queued < IWM_TX_RING_LOMARK) {
 		sc->qfullmsk &= ~(1 << ring->qid);
 		if (sc->qfullmsk == 0) {
 			iwm_start(sc);
 		}
 	}
 }
 
 /*
  * transmit side
  */
 
 /*
  * Process a "command done" firmware notification.  This is where we wakeup
  * processes waiting for a synchronous command completion.
  * from if_iwn
  */
 static void
 iwm_cmd_done(struct iwm_softc *sc, struct iwm_rx_packet *pkt)
 {
 	struct iwm_tx_ring *ring = &sc->txq[IWM_MVM_CMD_QUEUE];
 	struct iwm_tx_data *data;
 
 	if (pkt->hdr.qid != IWM_MVM_CMD_QUEUE) {
 		return;	/* Not a command ack. */
 	}
 
 	/* XXX wide commands? */
 	IWM_DPRINTF(sc, IWM_DEBUG_CMD,
 	    "cmd notification type 0x%x qid %d idx %d\n",
 	    pkt->hdr.code, pkt->hdr.qid, pkt->hdr.idx);
 
 	data = &ring->data[pkt->hdr.idx];
 
 	/* If the command was mapped in an mbuf, free it. */
 	if (data->m != NULL) {
 		bus_dmamap_sync(ring->data_dmat, data->map,
 		    BUS_DMASYNC_POSTWRITE);
 		bus_dmamap_unload(ring->data_dmat, data->map);
 		m_freem(data->m);
 		data->m = NULL;
 	}
 	wakeup(&ring->desc[pkt->hdr.idx]);
 
 	if (((pkt->hdr.idx + ring->queued) % IWM_TX_RING_COUNT) != ring->cur) {
 		device_printf(sc->sc_dev,
 		    "%s: Some HCMDs skipped?: idx=%d queued=%d cur=%d\n",
 		    __func__, pkt->hdr.idx, ring->queued, ring->cur);
 		/* XXX call iwm_force_nmi() */
 	}
 
 	KASSERT(ring->queued > 0, ("ring->queued is empty?"));
 	ring->queued--;
 	if (ring->queued == 0)
 		iwm_pcie_clear_cmd_in_flight(sc);
 }
 
 #if 0
 /*
  * necessary only for block ack mode
  */
 void
 iwm_update_sched(struct iwm_softc *sc, int qid, int idx, uint8_t sta_id,
 	uint16_t len)
 {
 	struct iwm_agn_scd_bc_tbl *scd_bc_tbl;
 	uint16_t w_val;
 
 	scd_bc_tbl = sc->sched_dma.vaddr;
 
 	len += 8; /* magic numbers came naturally from paris */
 	if (sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_DW_BC_TABLE)
 		len = roundup(len, 4) / 4;
 
 	w_val = htole16(sta_id << 12 | len);
 
 	/* Update TX scheduler. */
 	scd_bc_tbl[qid].tfd_offset[idx] = w_val;
 	bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
 	    BUS_DMASYNC_PREWRITE);
 
 	/* I really wonder what this is ?!? */
 	if (idx < IWM_TFD_QUEUE_SIZE_BC_DUP) {
 		scd_bc_tbl[qid].tfd_offset[IWM_TFD_QUEUE_SIZE_MAX + idx] = w_val;
 		bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
 		    BUS_DMASYNC_PREWRITE);
 	}
 }
 #endif
 
 /*
  * Take an 802.11 (non-n) rate, find the relevant rate
  * table entry.  return the index into in_ridx[].
  *
  * The caller then uses that index back into in_ridx
  * to figure out the rate index programmed /into/
  * the firmware for this given node.
  */
 static int
 iwm_tx_rateidx_lookup(struct iwm_softc *sc, struct iwm_node *in,
     uint8_t rate)
 {
 	int i;
 	uint8_t r;
 
 	for (i = 0; i < nitems(in->in_ridx); i++) {
 		r = iwm_rates[in->in_ridx[i]].rate;
 		if (rate == r)
 			return (i);
 	}
 
 	IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TXRATE,
 	    "%s: couldn't find an entry for rate=%d\n",
 	    __func__,
 	    rate);
 
 	/* XXX Return the first */
 	/* XXX TODO: have it return the /lowest/ */
 	return (0);
 }
 
 static int
 iwm_tx_rateidx_global_lookup(struct iwm_softc *sc, uint8_t rate)
 {
 	int i;
 
 	for (i = 0; i < nitems(iwm_rates); i++) {
 		if (iwm_rates[i].rate == rate)
 			return (i);
 	}
 	/* XXX error? */
 	IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TXRATE,
 	    "%s: couldn't find an entry for rate=%d\n",
 	    __func__,
 	    rate);
 	return (0);
 }
 
 /*
  * Fill in the rate related information for a transmit command.
  */
 static const struct iwm_rate *
 iwm_tx_fill_cmd(struct iwm_softc *sc, struct iwm_node *in,
 	struct mbuf *m, struct iwm_tx_cmd *tx)
 {
 	struct ieee80211_node *ni = &in->in_ni;
 	struct ieee80211_frame *wh;
 	const struct ieee80211_txparam *tp = ni->ni_txparms;
 	const struct iwm_rate *rinfo;
 	int type;
 	int ridx, rate_flags;
 
 	wh = mtod(m, struct ieee80211_frame *);
 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
 
 	tx->rts_retry_limit = IWM_RTS_DFAULT_RETRY_LIMIT;
 	tx->data_retry_limit = IWM_DEFAULT_TX_RETRY;
 
 	if (type == IEEE80211_FC0_TYPE_MGT) {
 		ridx = iwm_tx_rateidx_global_lookup(sc, tp->mgmtrate);
 		IWM_DPRINTF(sc, IWM_DEBUG_TXRATE,
 		    "%s: MGT (%d)\n", __func__, tp->mgmtrate);
 	} else if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
 		ridx = iwm_tx_rateidx_global_lookup(sc, tp->mcastrate);
 		IWM_DPRINTF(sc, IWM_DEBUG_TXRATE,
 		    "%s: MCAST (%d)\n", __func__, tp->mcastrate);
 	} else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
 		ridx = iwm_tx_rateidx_global_lookup(sc, tp->ucastrate);
 		IWM_DPRINTF(sc, IWM_DEBUG_TXRATE,
 		    "%s: FIXED_RATE (%d)\n", __func__, tp->ucastrate);
 	} else if (m->m_flags & M_EAPOL) {
 		ridx = iwm_tx_rateidx_global_lookup(sc, tp->mgmtrate);
 		IWM_DPRINTF(sc, IWM_DEBUG_TXRATE,
 		    "%s: EAPOL\n", __func__);
 	} else if (type == IEEE80211_FC0_TYPE_DATA) {
 		int i;
 
 		/* for data frames, use RS table */
 		IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, "%s: DATA\n", __func__);
 		/* XXX pass pktlen */
 		(void) ieee80211_ratectl_rate(ni, NULL, 0);
 		i = iwm_tx_rateidx_lookup(sc, in, ni->ni_txrate);
 		ridx = in->in_ridx[i];
 
 		/* This is the index into the programmed table */
 		tx->initial_rate_index = i;
 		tx->tx_flags |= htole32(IWM_TX_CMD_FLG_STA_RATE);
 
 		IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TXRATE,
 		    "%s: start with i=%d, txrate %d\n",
 		    __func__, i, iwm_rates[ridx].rate);
 	} else {
 		ridx = iwm_tx_rateidx_global_lookup(sc, tp->mgmtrate);
 		IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, "%s: DEFAULT (%d)\n",
 		    __func__, tp->mgmtrate);
 	}
 
 	IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TXRATE,
 	    "%s: frame type=%d txrate %d\n",
 	        __func__, type, iwm_rates[ridx].rate);
 
 	rinfo = &iwm_rates[ridx];
 
 	IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, "%s: ridx=%d; rate=%d, CCK=%d\n",
 	    __func__, ridx,
 	    rinfo->rate,
 	    !! (IWM_RIDX_IS_CCK(ridx))
 	    );
 
 	/* XXX TODO: hard-coded TX antenna? */
 	rate_flags = 1 << IWM_RATE_MCS_ANT_POS;
 	if (IWM_RIDX_IS_CCK(ridx))
 		rate_flags |= IWM_RATE_MCS_CCK_MSK;
 	tx->rate_n_flags = htole32(rate_flags | rinfo->plcp);
 
 	return rinfo;
 }
 
 #define TB0_SIZE 16
 static int
 iwm_tx(struct iwm_softc *sc, struct mbuf *m, struct ieee80211_node *ni, int ac)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
 	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
 	struct iwm_node *in = IWM_NODE(ni);
 	struct iwm_tx_ring *ring;
 	struct iwm_tx_data *data;
 	struct iwm_tfd *desc;
 	struct iwm_device_cmd *cmd;
 	struct iwm_tx_cmd *tx;
 	struct ieee80211_frame *wh;
 	struct ieee80211_key *k = NULL;
 	struct mbuf *m1;
 	const struct iwm_rate *rinfo;
 	uint32_t flags;
 	u_int hdrlen;
 	bus_dma_segment_t *seg, segs[IWM_MAX_SCATTER];
 	int nsegs;
 	uint8_t tid, type;
 	int i, totlen, error, pad;
 
 	wh = mtod(m, struct ieee80211_frame *);
 	hdrlen = ieee80211_anyhdrsize(wh);
 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
 	tid = 0;
 	ring = &sc->txq[ac];
 	desc = &ring->desc[ring->cur];
 	memset(desc, 0, sizeof(*desc));
 	data = &ring->data[ring->cur];
 
 	/* Fill out iwm_tx_cmd to send to the firmware */
 	cmd = &ring->cmd[ring->cur];
 	cmd->hdr.code = IWM_TX_CMD;
 	cmd->hdr.flags = 0;
 	cmd->hdr.qid = ring->qid;
 	cmd->hdr.idx = ring->cur;
 
 	tx = (void *)cmd->data;
 	memset(tx, 0, sizeof(*tx));
 
 	rinfo = iwm_tx_fill_cmd(sc, in, m, tx);
 
 	/* Encrypt the frame if need be. */
 	if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
 		/* Retrieve key for TX && do software encryption. */
 		k = ieee80211_crypto_encap(ni, m);
 		if (k == NULL) {
 			m_freem(m);
 			return (ENOBUFS);
 		}
 		/* 802.11 header may have moved. */
 		wh = mtod(m, struct ieee80211_frame *);
 	}
 
 	if (ieee80211_radiotap_active_vap(vap)) {
 		struct iwm_tx_radiotap_header *tap = &sc->sc_txtap;
 
 		tap->wt_flags = 0;
 		tap->wt_chan_freq = htole16(ni->ni_chan->ic_freq);
 		tap->wt_chan_flags = htole16(ni->ni_chan->ic_flags);
 		tap->wt_rate = rinfo->rate;
 		if (k != NULL)
 			tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
 		ieee80211_radiotap_tx(vap, m);
 	}
 
 
 	totlen = m->m_pkthdr.len;
 
 	flags = 0;
 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
 		flags |= IWM_TX_CMD_FLG_ACK;
 	}
 
 	if (type == IEEE80211_FC0_TYPE_DATA
 	    && (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
 	    && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
 		flags |= IWM_TX_CMD_FLG_PROT_REQUIRE;
 	}
 
 	if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
 	    type != IEEE80211_FC0_TYPE_DATA)
 		tx->sta_id = sc->sc_aux_sta.sta_id;
 	else
 		tx->sta_id = IWM_STATION_ID;
 
 	if (type == IEEE80211_FC0_TYPE_MGT) {
 		uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
 
 		if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
 		    subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ) {
 			tx->pm_frame_timeout = htole16(IWM_PM_FRAME_ASSOC);
 		} else if (subtype == IEEE80211_FC0_SUBTYPE_ACTION) {
 			tx->pm_frame_timeout = htole16(IWM_PM_FRAME_NONE);
 		} else {
 			tx->pm_frame_timeout = htole16(IWM_PM_FRAME_MGMT);
 		}
 	} else {
 		tx->pm_frame_timeout = htole16(IWM_PM_FRAME_NONE);
 	}
 
 	if (hdrlen & 3) {
 		/* First segment length must be a multiple of 4. */
 		flags |= IWM_TX_CMD_FLG_MH_PAD;
 		pad = 4 - (hdrlen & 3);
 	} else
 		pad = 0;
 
 	tx->driver_txop = 0;
 	tx->next_frame_len = 0;
 
 	tx->len = htole16(totlen);
 	tx->tid_tspec = tid;
 	tx->life_time = htole32(IWM_TX_CMD_LIFE_TIME_INFINITE);
 
 	/* Set physical address of "scratch area". */
 	tx->dram_lsb_ptr = htole32(data->scratch_paddr);
 	tx->dram_msb_ptr = iwm_get_dma_hi_addr(data->scratch_paddr);
 
 	/* Copy 802.11 header in TX command. */
 	memcpy(((uint8_t *)tx) + sizeof(*tx), wh, hdrlen);
 
 	flags |= IWM_TX_CMD_FLG_BT_DIS | IWM_TX_CMD_FLG_SEQ_CTL;
 
 	tx->sec_ctl = 0;
 	tx->tx_flags |= htole32(flags);
 
 	/* Trim 802.11 header. */
 	m_adj(m, hdrlen);
 	error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
 	    segs, &nsegs, BUS_DMA_NOWAIT);
 	if (error != 0) {
 		if (error != EFBIG) {
 			device_printf(sc->sc_dev, "can't map mbuf (error %d)\n",
 			    error);
 			m_freem(m);
 			return error;
 		}
 		/* Too many DMA segments, linearize mbuf. */
 		m1 = m_collapse(m, M_NOWAIT, IWM_MAX_SCATTER - 2);
 		if (m1 == NULL) {
 			device_printf(sc->sc_dev,
 			    "%s: could not defrag mbuf\n", __func__);
 			m_freem(m);
 			return (ENOBUFS);
 		}
 		m = m1;
 
 		error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
 		    segs, &nsegs, BUS_DMA_NOWAIT);
 		if (error != 0) {
 			device_printf(sc->sc_dev, "can't map mbuf (error %d)\n",
 			    error);
 			m_freem(m);
 			return error;
 		}
 	}
 	data->m = m;
 	data->in = in;
 	data->done = 0;
 
 	IWM_DPRINTF(sc, IWM_DEBUG_XMIT,
 	    "sending txd %p, in %p\n", data, data->in);
 	KASSERT(data->in != NULL, ("node is NULL"));
 
 	IWM_DPRINTF(sc, IWM_DEBUG_XMIT,
 	    "sending data: qid=%d idx=%d len=%d nsegs=%d txflags=0x%08x rate_n_flags=0x%08x rateidx=%u\n",
 	    ring->qid, ring->cur, totlen, nsegs,
 	    le32toh(tx->tx_flags),
 	    le32toh(tx->rate_n_flags),
 	    tx->initial_rate_index
 	    );
 
 	/* Fill TX descriptor. */
 	desc->num_tbs = 2 + nsegs;
 
 	desc->tbs[0].lo = htole32(data->cmd_paddr);
 	desc->tbs[0].hi_n_len = htole16(iwm_get_dma_hi_addr(data->cmd_paddr)) |
 	    (TB0_SIZE << 4);
 	desc->tbs[1].lo = htole32(data->cmd_paddr + TB0_SIZE);
 	desc->tbs[1].hi_n_len = htole16(iwm_get_dma_hi_addr(data->cmd_paddr)) |
 	    ((sizeof(struct iwm_cmd_header) + sizeof(*tx)
 	      + hdrlen + pad - TB0_SIZE) << 4);
 
 	/* Other DMA segments are for data payload. */
 	for (i = 0; i < nsegs; i++) {
 		seg = &segs[i];
 		desc->tbs[i+2].lo = htole32(seg->ds_addr);
 		desc->tbs[i+2].hi_n_len = \
 		    htole16(iwm_get_dma_hi_addr(seg->ds_addr))
 		    | ((seg->ds_len) << 4);
 	}
 
 	bus_dmamap_sync(ring->data_dmat, data->map,
 	    BUS_DMASYNC_PREWRITE);
 	bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
 	    BUS_DMASYNC_PREWRITE);
 	bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
 	    BUS_DMASYNC_PREWRITE);
 
 #if 0
 	iwm_update_sched(sc, ring->qid, ring->cur, tx->sta_id, le16toh(tx->len));
 #endif
 
 	/* Kick TX ring. */
 	ring->cur = (ring->cur + 1) % IWM_TX_RING_COUNT;
 	IWM_WRITE(sc, IWM_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
 
 	/* Mark TX ring as full if we reach a certain threshold. */
 	if (++ring->queued > IWM_TX_RING_HIMARK) {
 		sc->qfullmsk |= 1 << ring->qid;
 	}
 
 	return 0;
 }
 
 static int
 iwm_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
     const struct ieee80211_bpf_params *params)
 {
 	struct ieee80211com *ic = ni->ni_ic;
 	struct iwm_softc *sc = ic->ic_softc;
 	int error = 0;
 
 	IWM_DPRINTF(sc, IWM_DEBUG_XMIT,
 	    "->%s begin\n", __func__);
 
 	if ((sc->sc_flags & IWM_FLAG_HW_INITED) == 0) {
 		m_freem(m);
 		IWM_DPRINTF(sc, IWM_DEBUG_XMIT,
 		    "<-%s not RUNNING\n", __func__);
 		return (ENETDOWN);
         }
 
 	IWM_LOCK(sc);
 	/* XXX fix this */
         if (params == NULL) {
 		error = iwm_tx(sc, m, ni, 0);
 	} else {
 		error = iwm_tx(sc, m, ni, 0);
 	}
 	sc->sc_tx_timer = 5;
 	IWM_UNLOCK(sc);
 
         return (error);
 }
 
 /*
  * mvm/tx.c
  */
 
 /*
  * Note that there are transports that buffer frames before they reach
  * the firmware. This means that after flush_tx_path is called, the
  * queue might not be empty. The race-free way to handle this is to:
  * 1) set the station as draining
  * 2) flush the Tx path
  * 3) wait for the transport queues to be empty
  */
 int
 iwm_mvm_flush_tx_path(struct iwm_softc *sc, uint32_t tfd_msk, uint32_t flags)
 {
 	int ret;
 	struct iwm_tx_path_flush_cmd flush_cmd = {
 		.queues_ctl = htole32(tfd_msk),
 		.flush_ctl = htole16(IWM_DUMP_TX_FIFO_FLUSH),
 	};
 
 	ret = iwm_mvm_send_cmd_pdu(sc, IWM_TXPATH_FLUSH, flags,
 	    sizeof(flush_cmd), &flush_cmd);
 	if (ret)
                 device_printf(sc->sc_dev,
 		    "Flushing tx queue failed: %d\n", ret);
 	return ret;
 }
 
 /*
  * BEGIN mvm/sta.c
  */
 
 static int
 iwm_mvm_send_add_sta_cmd_status(struct iwm_softc *sc,
 	struct iwm_mvm_add_sta_cmd_v7 *cmd, int *status)
 {
 	return iwm_mvm_send_cmd_pdu_status(sc, IWM_ADD_STA, sizeof(*cmd),
 	    cmd, status);
 }
 
 /* send station add/update command to firmware */
 static int
 iwm_mvm_sta_send_to_fw(struct iwm_softc *sc, struct iwm_node *in, int update)
 {
 	struct iwm_mvm_add_sta_cmd_v7 add_sta_cmd;
 	int ret;
 	uint32_t status;
 
 	memset(&add_sta_cmd, 0, sizeof(add_sta_cmd));
 
 	add_sta_cmd.sta_id = IWM_STATION_ID;
 	add_sta_cmd.mac_id_n_color
 	    = htole32(IWM_FW_CMD_ID_AND_COLOR(IWM_DEFAULT_MACID,
 	        IWM_DEFAULT_COLOR));
 	if (!update) {
 		int ac;
 		for (ac = 0; ac < WME_NUM_AC; ac++) {
 			add_sta_cmd.tfd_queue_msk |=
 			    htole32(1 << iwm_mvm_ac_to_tx_fifo[ac]);
 		}
 		IEEE80211_ADDR_COPY(&add_sta_cmd.addr, in->in_ni.ni_bssid);
 	}
 	add_sta_cmd.add_modify = update ? 1 : 0;
 	add_sta_cmd.station_flags_msk
 	    |= htole32(IWM_STA_FLG_FAT_EN_MSK | IWM_STA_FLG_MIMO_EN_MSK);
 	add_sta_cmd.tid_disable_tx = htole16(0xffff);
 	if (update)
 		add_sta_cmd.modify_mask |= (IWM_STA_MODIFY_TID_DISABLE_TX);
 
 	status = IWM_ADD_STA_SUCCESS;
 	ret = iwm_mvm_send_add_sta_cmd_status(sc, &add_sta_cmd, &status);
 	if (ret)
 		return ret;
 
 	switch (status) {
 	case IWM_ADD_STA_SUCCESS:
 		break;
 	default:
 		ret = EIO;
 		device_printf(sc->sc_dev, "IWM_ADD_STA failed\n");
 		break;
 	}
 
 	return ret;
 }
 
 static int
 iwm_mvm_add_sta(struct iwm_softc *sc, struct iwm_node *in)
 {
 	return iwm_mvm_sta_send_to_fw(sc, in, 0);
 }
 
 static int
 iwm_mvm_update_sta(struct iwm_softc *sc, struct iwm_node *in)
 {
 	return iwm_mvm_sta_send_to_fw(sc, in, 1);
 }
 
 static int
 iwm_mvm_add_int_sta_common(struct iwm_softc *sc, struct iwm_int_sta *sta,
 	const uint8_t *addr, uint16_t mac_id, uint16_t color)
 {
 	struct iwm_mvm_add_sta_cmd_v7 cmd;
 	int ret;
 	uint32_t status;
 
 	memset(&cmd, 0, sizeof(cmd));
 	cmd.sta_id = sta->sta_id;
 	cmd.mac_id_n_color = htole32(IWM_FW_CMD_ID_AND_COLOR(mac_id, color));
 
 	cmd.tfd_queue_msk = htole32(sta->tfd_queue_msk);
 	cmd.tid_disable_tx = htole16(0xffff);
 
 	if (addr)
 		IEEE80211_ADDR_COPY(cmd.addr, addr);
 
 	ret = iwm_mvm_send_add_sta_cmd_status(sc, &cmd, &status);
 	if (ret)
 		return ret;
 
 	switch (status) {
 	case IWM_ADD_STA_SUCCESS:
 		IWM_DPRINTF(sc, IWM_DEBUG_RESET,
 		    "%s: Internal station added.\n", __func__);
 		return 0;
 	default:
 		device_printf(sc->sc_dev,
 		    "%s: Add internal station failed, status=0x%x\n",
 		    __func__, status);
 		ret = EIO;
 		break;
 	}
 	return ret;
 }
 
 static int
 iwm_mvm_add_aux_sta(struct iwm_softc *sc)
 {
 	int ret;
 
 	sc->sc_aux_sta.sta_id = IWM_AUX_STA_ID;
 	sc->sc_aux_sta.tfd_queue_msk = (1 << IWM_MVM_AUX_QUEUE);
 
 	ret = iwm_enable_txq(sc, 0, IWM_MVM_AUX_QUEUE, IWM_MVM_TX_FIFO_MCAST);
 	if (ret)
 		return ret;
 
 	ret = iwm_mvm_add_int_sta_common(sc,
 	    &sc->sc_aux_sta, NULL, IWM_MAC_INDEX_AUX, 0);
 
 	if (ret)
 		memset(&sc->sc_aux_sta, 0, sizeof(sc->sc_aux_sta));
 	return ret;
 }
 
 /*
  * END mvm/sta.c
  */
 
 /*
  * BEGIN mvm/quota.c
  */
 
 static int
 iwm_mvm_update_quotas(struct iwm_softc *sc, struct iwm_node *in)
 {
 	struct iwm_time_quota_cmd cmd;
 	int i, idx, ret, num_active_macs, quota, quota_rem;
 	int colors[IWM_MAX_BINDINGS] = { -1, -1, -1, -1, };
 	int n_ifs[IWM_MAX_BINDINGS] = {0, };
 	uint16_t id;
 
 	memset(&cmd, 0, sizeof(cmd));
 
 	/* currently, PHY ID == binding ID */
 	if (in) {
 		id = in->in_phyctxt->id;
 		KASSERT(id < IWM_MAX_BINDINGS, ("invalid id"));
 		colors[id] = in->in_phyctxt->color;
 
 		if (1)
 			n_ifs[id] = 1;
 	}
 
 	/*
 	 * The FW's scheduling session consists of
 	 * IWM_MVM_MAX_QUOTA fragments. Divide these fragments
 	 * equally between all the bindings that require quota
 	 */
 	num_active_macs = 0;
 	for (i = 0; i < IWM_MAX_BINDINGS; i++) {
 		cmd.quotas[i].id_and_color = htole32(IWM_FW_CTXT_INVALID);
 		num_active_macs += n_ifs[i];
 	}
 
 	quota = 0;
 	quota_rem = 0;
 	if (num_active_macs) {
 		quota = IWM_MVM_MAX_QUOTA / num_active_macs;
 		quota_rem = IWM_MVM_MAX_QUOTA % num_active_macs;
 	}
 
 	for (idx = 0, i = 0; i < IWM_MAX_BINDINGS; i++) {
 		if (colors[i] < 0)
 			continue;
 
 		cmd.quotas[idx].id_and_color =
 			htole32(IWM_FW_CMD_ID_AND_COLOR(i, colors[i]));
 
 		if (n_ifs[i] <= 0) {
 			cmd.quotas[idx].quota = htole32(0);
 			cmd.quotas[idx].max_duration = htole32(0);
 		} else {
 			cmd.quotas[idx].quota = htole32(quota * n_ifs[i]);
 			cmd.quotas[idx].max_duration = htole32(0);
 		}
 		idx++;
 	}
 
 	/* Give the remainder of the session to the first binding */
 	cmd.quotas[0].quota = htole32(le32toh(cmd.quotas[0].quota) + quota_rem);
 
 	ret = iwm_mvm_send_cmd_pdu(sc, IWM_TIME_QUOTA_CMD, IWM_CMD_SYNC,
 	    sizeof(cmd), &cmd);
 	if (ret)
 		device_printf(sc->sc_dev,
 		    "%s: Failed to send quota: %d\n", __func__, ret);
 	return ret;
 }
 
 /*
  * END mvm/quota.c
  */
 
 /*
  * ieee80211 routines
  */
 
 /*
  * Change to AUTH state in 80211 state machine.  Roughly matches what
  * Linux does in bss_info_changed().
  */
 static int
 iwm_auth(struct ieee80211vap *vap, struct iwm_softc *sc)
 {
 	struct ieee80211_node *ni;
 	struct iwm_node *in;
 	struct iwm_vap *iv = IWM_VAP(vap);
 	uint32_t duration;
 	int error;
 
 	/*
 	 * XXX i have a feeling that the vap node is being
 	 * freed from underneath us. Grr.
 	 */
 	ni = ieee80211_ref_node(vap->iv_bss);
 	in = IWM_NODE(ni);
 	IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_STATE,
 	    "%s: called; vap=%p, bss ni=%p\n",
 	    __func__,
 	    vap,
 	    ni);
 
 	in->in_assoc = 0;
 
 	error = iwm_mvm_sf_config(sc, IWM_SF_FULL_ON);
 	if (error != 0)
 		return error;
 
 	error = iwm_allow_mcast(vap, sc);
 	if (error) {
 		device_printf(sc->sc_dev,
 		    "%s: failed to set multicast\n", __func__);
 		goto out;
 	}
 
 	/*
 	 * This is where it deviates from what Linux does.
 	 *
 	 * Linux iwlwifi doesn't reset the nic each time, nor does it
 	 * call ctxt_add() here.  Instead, it adds it during vap creation,
 	 * and always does a mac_ctx_changed().
 	 *
 	 * The openbsd port doesn't attempt to do that - it reset things
 	 * at odd states and does the add here.
 	 *
 	 * So, until the state handling is fixed (ie, we never reset
 	 * the NIC except for a firmware failure, which should drag
 	 * the NIC back to IDLE, re-setup and re-add all the mac/phy
 	 * contexts that are required), let's do a dirty hack here.
 	 */
 	if (iv->is_uploaded) {
 		if ((error = iwm_mvm_mac_ctxt_changed(sc, vap)) != 0) {
 			device_printf(sc->sc_dev,
 			    "%s: failed to update MAC\n", __func__);
 			goto out;
 		}
 		if ((error = iwm_mvm_phy_ctxt_changed(sc, &sc->sc_phyctxt[0],
 		    in->in_ni.ni_chan, 1, 1)) != 0) {
 			device_printf(sc->sc_dev,
 			    "%s: failed update phy ctxt\n", __func__);
 			goto out;
 		}
 		in->in_phyctxt = &sc->sc_phyctxt[0];
 
 		if ((error = iwm_mvm_binding_update(sc, in)) != 0) {
 			device_printf(sc->sc_dev,
 			    "%s: binding update cmd\n", __func__);
 			goto out;
 		}
 		if ((error = iwm_mvm_update_sta(sc, in)) != 0) {
 			device_printf(sc->sc_dev,
 			    "%s: failed to update sta\n", __func__);
 			goto out;
 		}
 	} else {
 		if ((error = iwm_mvm_mac_ctxt_add(sc, vap)) != 0) {
 			device_printf(sc->sc_dev,
 			    "%s: failed to add MAC\n", __func__);
 			goto out;
 		}
 		if ((error = iwm_mvm_phy_ctxt_changed(sc, &sc->sc_phyctxt[0],
 		    in->in_ni.ni_chan, 1, 1)) != 0) {
 			device_printf(sc->sc_dev,
 			    "%s: failed add phy ctxt!\n", __func__);
 			error = ETIMEDOUT;
 			goto out;
 		}
 		in->in_phyctxt = &sc->sc_phyctxt[0];
 
 		if ((error = iwm_mvm_binding_add_vif(sc, in)) != 0) {
 			device_printf(sc->sc_dev,
 			    "%s: binding add cmd\n", __func__);
 			goto out;
 		}
 		if ((error = iwm_mvm_add_sta(sc, in)) != 0) {
 			device_printf(sc->sc_dev,
 			    "%s: failed to add sta\n", __func__);
 			goto out;
 		}
 	}
 
 	/*
 	 * Prevent the FW from wandering off channel during association
 	 * by "protecting" the session with a time event.
 	 */
 	/* XXX duration is in units of TU, not MS */
 	duration = IWM_MVM_TE_SESSION_PROTECTION_MAX_TIME_MS;
 	iwm_mvm_protect_session(sc, in, duration, 500 /* XXX magic number */);
 	DELAY(100);
 
 	error = 0;
 out:
 	ieee80211_free_node(ni);
 	return (error);
 }
 
 static int
 iwm_assoc(struct ieee80211vap *vap, struct iwm_softc *sc)
 {
 	struct iwm_node *in = IWM_NODE(vap->iv_bss);
 	int error;
 
 	if ((error = iwm_mvm_update_sta(sc, in)) != 0) {
 		device_printf(sc->sc_dev,
 		    "%s: failed to update STA\n", __func__);
 		return error;
 	}
 
 	in->in_assoc = 1;
 	if ((error = iwm_mvm_mac_ctxt_changed(sc, vap)) != 0) {
 		device_printf(sc->sc_dev,
 		    "%s: failed to update MAC\n", __func__);
 		return error;
 	}
 
 	return 0;
 }
 
 static int
 iwm_release(struct iwm_softc *sc, struct iwm_node *in)
 {
 	uint32_t tfd_msk;
 
 	/*
 	 * Ok, so *technically* the proper set of calls for going
 	 * from RUN back to SCAN is:
 	 *
 	 * iwm_mvm_power_mac_disable(sc, in);
 	 * iwm_mvm_mac_ctxt_changed(sc, in);
 	 * iwm_mvm_rm_sta(sc, in);
 	 * iwm_mvm_update_quotas(sc, NULL);
 	 * iwm_mvm_mac_ctxt_changed(sc, in);
 	 * iwm_mvm_binding_remove_vif(sc, in);
 	 * iwm_mvm_mac_ctxt_remove(sc, in);
 	 *
 	 * However, that freezes the device not matter which permutations
 	 * and modifications are attempted.  Obviously, this driver is missing
 	 * something since it works in the Linux driver, but figuring out what
 	 * is missing is a little more complicated.  Now, since we're going
 	 * back to nothing anyway, we'll just do a complete device reset.
 	 * Up your's, device!
 	 */
 	/*
 	 * Just using 0xf for the queues mask is fine as long as we only
 	 * get here from RUN state.
 	 */
 	tfd_msk = 0xf;
 	mbufq_drain(&sc->sc_snd);
 	iwm_mvm_flush_tx_path(sc, tfd_msk, IWM_CMD_SYNC);
 	/*
 	 * We seem to get away with just synchronously sending the
 	 * IWM_TXPATH_FLUSH command.
 	 */
 //	iwm_trans_wait_tx_queue_empty(sc, tfd_msk);
 	iwm_stop_device(sc);
 	iwm_init_hw(sc);
 	if (in)
 		in->in_assoc = 0;
 	return 0;
 
 #if 0
 	int error;
 
 	iwm_mvm_power_mac_disable(sc, in);
 
 	if ((error = iwm_mvm_mac_ctxt_changed(sc, in)) != 0) {
 		device_printf(sc->sc_dev, "mac ctxt change fail 1 %d\n", error);
 		return error;
 	}
 
 	if ((error = iwm_mvm_rm_sta(sc, in)) != 0) {
 		device_printf(sc->sc_dev, "sta remove fail %d\n", error);
 		return error;
 	}
 	error = iwm_mvm_rm_sta(sc, in);
 	in->in_assoc = 0;
 	iwm_mvm_update_quotas(sc, NULL);
 	if ((error = iwm_mvm_mac_ctxt_changed(sc, in)) != 0) {
 		device_printf(sc->sc_dev, "mac ctxt change fail 2 %d\n", error);
 		return error;
 	}
 	iwm_mvm_binding_remove_vif(sc, in);
 
 	iwm_mvm_mac_ctxt_remove(sc, in);
 
 	return error;
 #endif
 }
 
 static struct ieee80211_node *
 iwm_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
 {
 	return malloc(sizeof (struct iwm_node), M_80211_NODE,
 	    M_NOWAIT | M_ZERO);
 }
 
 static void
 iwm_setrates(struct iwm_softc *sc, struct iwm_node *in)
 {
 	struct ieee80211_node *ni = &in->in_ni;
 	struct iwm_lq_cmd *lq = &in->in_lq;
 	int nrates = ni->ni_rates.rs_nrates;
 	int i, ridx, tab = 0;
 //	int txant = 0;
 
 	if (nrates > nitems(lq->rs_table)) {
 		device_printf(sc->sc_dev,
 		    "%s: node supports %d rates, driver handles "
 		    "only %zu\n", __func__, nrates, nitems(lq->rs_table));
 		return;
 	}
 	if (nrates == 0) {
 		device_printf(sc->sc_dev,
 		    "%s: node supports 0 rates, odd!\n", __func__);
 		return;
 	}
 
 	/*
 	 * XXX .. and most of iwm_node is not initialised explicitly;
 	 * it's all just 0x0 passed to the firmware.
 	 */
 
 	/* first figure out which rates we should support */
 	/* XXX TODO: this isn't 11n aware /at all/ */
 	memset(&in->in_ridx, -1, sizeof(in->in_ridx));
 	IWM_DPRINTF(sc, IWM_DEBUG_TXRATE,
 	    "%s: nrates=%d\n", __func__, nrates);
 
 	/*
 	 * Loop over nrates and populate in_ridx from the highest
 	 * rate to the lowest rate.  Remember, in_ridx[] has
 	 * IEEE80211_RATE_MAXSIZE entries!
 	 */
 	for (i = 0; i < min(nrates, IEEE80211_RATE_MAXSIZE); i++) {
 		int rate = ni->ni_rates.rs_rates[(nrates - 1) - i] & IEEE80211_RATE_VAL;
 
 		/* Map 802.11 rate to HW rate index. */
 		for (ridx = 0; ridx <= IWM_RIDX_MAX; ridx++)
 			if (iwm_rates[ridx].rate == rate)
 				break;
 		if (ridx > IWM_RIDX_MAX) {
 			device_printf(sc->sc_dev,
 			    "%s: WARNING: device rate for %d not found!\n",
 			    __func__, rate);
 		} else {
 			IWM_DPRINTF(sc, IWM_DEBUG_TXRATE,
 			    "%s: rate: i: %d, rate=%d, ridx=%d\n",
 			    __func__,
 			    i,
 			    rate,
 			    ridx);
 			in->in_ridx[i] = ridx;
 		}
 	}
 
 	/* then construct a lq_cmd based on those */
 	memset(lq, 0, sizeof(*lq));
 	lq->sta_id = IWM_STATION_ID;
 
 	/* For HT, always enable RTS/CTS to avoid excessive retries. */
 	if (ni->ni_flags & IEEE80211_NODE_HT)
 		lq->flags |= IWM_LQ_FLAG_USE_RTS_MSK;
 
 	/*
 	 * are these used? (we don't do SISO or MIMO)
 	 * need to set them to non-zero, though, or we get an error.
 	 */
 	lq->single_stream_ant_msk = 1;
 	lq->dual_stream_ant_msk = 1;
 
 	/*
 	 * Build the actual rate selection table.
 	 * The lowest bits are the rates.  Additionally,
 	 * CCK needs bit 9 to be set.  The rest of the bits
 	 * we add to the table select the tx antenna
 	 * Note that we add the rates in the highest rate first
 	 * (opposite of ni_rates).
 	 */
 	/*
 	 * XXX TODO: this should be looping over the min of nrates
 	 * and LQ_MAX_RETRY_NUM.  Sigh.
 	 */
 	for (i = 0; i < nrates; i++) {
 		int nextant;
 
 #if 0
 		if (txant == 0)
 			txant = iwm_mvm_get_valid_tx_ant(sc);
 		nextant = 1<<(ffs(txant)-1);
 		txant &= ~nextant;
 #else
 		nextant = iwm_mvm_get_valid_tx_ant(sc);
 #endif
 		/*
 		 * Map the rate id into a rate index into
 		 * our hardware table containing the
 		 * configuration to use for this rate.
 		 */
 		ridx = in->in_ridx[i];
 		tab = iwm_rates[ridx].plcp;
 		tab |= nextant << IWM_RATE_MCS_ANT_POS;
 		if (IWM_RIDX_IS_CCK(ridx))
 			tab |= IWM_RATE_MCS_CCK_MSK;
 		IWM_DPRINTF(sc, IWM_DEBUG_TXRATE,
 		    "station rate i=%d, rate=%d, hw=%x\n",
 		    i, iwm_rates[ridx].rate, tab);
 		lq->rs_table[i] = htole32(tab);
 	}
 	/* then fill the rest with the lowest possible rate */
 	for (i = nrates; i < nitems(lq->rs_table); i++) {
 		KASSERT(tab != 0, ("invalid tab"));
 		lq->rs_table[i] = htole32(tab);
 	}
 }
 
 static int
 iwm_media_change(struct ifnet *ifp)
 {
 	struct ieee80211vap *vap = ifp->if_softc;
 	struct ieee80211com *ic = vap->iv_ic;
 	struct iwm_softc *sc = ic->ic_softc;
 	int error;
 
 	error = ieee80211_media_change(ifp);
 	if (error != ENETRESET)
 		return error;
 
 	IWM_LOCK(sc);
 	if (ic->ic_nrunning > 0) {
 		iwm_stop(sc);
 		iwm_init(sc);
 	}
 	IWM_UNLOCK(sc);
 	return error;
 }
 
 
 static int
 iwm_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
 {
 	struct iwm_vap *ivp = IWM_VAP(vap);
 	struct ieee80211com *ic = vap->iv_ic;
 	struct iwm_softc *sc = ic->ic_softc;
 	struct iwm_node *in;
 	int error;
 
 	IWM_DPRINTF(sc, IWM_DEBUG_STATE,
 	    "switching state %s -> %s\n",
 	    ieee80211_state_name[vap->iv_state],
 	    ieee80211_state_name[nstate]);
 	IEEE80211_UNLOCK(ic);
 	IWM_LOCK(sc);
 
 	if (vap->iv_state == IEEE80211_S_SCAN && nstate != vap->iv_state)
 		iwm_led_blink_stop(sc);
 
 	/* disable beacon filtering if we're hopping out of RUN */
 	if (vap->iv_state == IEEE80211_S_RUN && nstate != vap->iv_state) {
 		iwm_mvm_disable_beacon_filter(sc);
 
 		if (((in = IWM_NODE(vap->iv_bss)) != NULL))
 			in->in_assoc = 0;
 
 		if (nstate == IEEE80211_S_INIT) {
 			IWM_UNLOCK(sc);
 			IEEE80211_LOCK(ic);
 			error = ivp->iv_newstate(vap, nstate, arg);
 			IEEE80211_UNLOCK(ic);
 			IWM_LOCK(sc);
 			iwm_release(sc, NULL);
 			IWM_UNLOCK(sc);
 			IEEE80211_LOCK(ic);
 			return error;
 		}
 
 		/*
 		 * It's impossible to directly go RUN->SCAN. If we iwm_release()
 		 * above then the card will be completely reinitialized,
 		 * so the driver must do everything necessary to bring the card
 		 * from INIT to SCAN.
 		 *
 		 * Additionally, upon receiving deauth frame from AP,
 		 * OpenBSD 802.11 stack puts the driver in IEEE80211_S_AUTH
 		 * state. This will also fail with this driver, so bring the FSM
 		 * from IEEE80211_S_RUN to IEEE80211_S_SCAN in this case as well.
 		 *
 		 * XXX TODO: fix this for FreeBSD!
 		 */
 		if (nstate == IEEE80211_S_SCAN ||
 		    nstate == IEEE80211_S_AUTH ||
 		    nstate == IEEE80211_S_ASSOC) {
 			IWM_DPRINTF(sc, IWM_DEBUG_STATE,
 			    "Force transition to INIT; MGT=%d\n", arg);
 			IWM_UNLOCK(sc);
 			IEEE80211_LOCK(ic);
 			/* Always pass arg as -1 since we can't Tx right now. */
 			/*
 			 * XXX arg is just ignored anyway when transitioning
 			 *     to IEEE80211_S_INIT.
 			 */
 			vap->iv_newstate(vap, IEEE80211_S_INIT, -1);
 			IWM_DPRINTF(sc, IWM_DEBUG_STATE,
 			    "Going INIT->SCAN\n");
 			nstate = IEEE80211_S_SCAN;
 			IEEE80211_UNLOCK(ic);
 			IWM_LOCK(sc);
 		}
 	}
 
 	switch (nstate) {
 	case IEEE80211_S_INIT:
 		break;
 
 	case IEEE80211_S_AUTH:
 		if ((error = iwm_auth(vap, sc)) != 0) {
 			device_printf(sc->sc_dev,
 			    "%s: could not move to auth state: %d\n",
 			    __func__, error);
 			break;
 		}
 		break;
 
 	case IEEE80211_S_ASSOC:
 		if ((error = iwm_assoc(vap, sc)) != 0) {
 			device_printf(sc->sc_dev,
 			    "%s: failed to associate: %d\n", __func__,
 			    error);
 			break;
 		}
 		break;
 
 	case IEEE80211_S_RUN:
 	{
 		struct iwm_host_cmd cmd = {
 			.id = IWM_LQ_CMD,
 			.len = { sizeof(in->in_lq), },
 			.flags = IWM_CMD_SYNC,
 		};
 
 		/* Update the association state, now we have it all */
 		/* (eg associd comes in at this point */
 		error = iwm_assoc(vap, sc);
 		if (error != 0) {
 			device_printf(sc->sc_dev,
 			    "%s: failed to update association state: %d\n",
 			    __func__,
 			    error);
 			break;
 		}
 
 		in = IWM_NODE(vap->iv_bss);
 		iwm_mvm_power_mac_update_mode(sc, in);
 		iwm_mvm_enable_beacon_filter(sc, in);
 		iwm_mvm_update_quotas(sc, in);
 		iwm_setrates(sc, in);
 
 		cmd.data[0] = &in->in_lq;
 		if ((error = iwm_send_cmd(sc, &cmd)) != 0) {
 			device_printf(sc->sc_dev,
 			    "%s: IWM_LQ_CMD failed\n", __func__);
 		}
 
 		iwm_mvm_led_enable(sc);
 		break;
 	}
 
 	default:
 		break;
 	}
 	IWM_UNLOCK(sc);
 	IEEE80211_LOCK(ic);
 
 	return (ivp->iv_newstate(vap, nstate, arg));
 }
 
 void
 iwm_endscan_cb(void *arg, int pending)
 {
 	struct iwm_softc *sc = arg;
 	struct ieee80211com *ic = &sc->sc_ic;
 
 	IWM_DPRINTF(sc, IWM_DEBUG_SCAN | IWM_DEBUG_TRACE,
 	    "%s: scan ended\n",
 	    __func__);
 
 	ieee80211_scan_done(TAILQ_FIRST(&ic->ic_vaps));
 }
 
 /*
  * Aging and idle timeouts for the different possible scenarios
  * in default configuration
  */
 static const uint32_t
 iwm_sf_full_timeout_def[IWM_SF_NUM_SCENARIO][IWM_SF_NUM_TIMEOUT_TYPES] = {
 	{
 		htole32(IWM_SF_SINGLE_UNICAST_AGING_TIMER_DEF),
 		htole32(IWM_SF_SINGLE_UNICAST_IDLE_TIMER_DEF)
 	},
 	{
 		htole32(IWM_SF_AGG_UNICAST_AGING_TIMER_DEF),
 		htole32(IWM_SF_AGG_UNICAST_IDLE_TIMER_DEF)
 	},
 	{
 		htole32(IWM_SF_MCAST_AGING_TIMER_DEF),
 		htole32(IWM_SF_MCAST_IDLE_TIMER_DEF)
 	},
 	{
 		htole32(IWM_SF_BA_AGING_TIMER_DEF),
 		htole32(IWM_SF_BA_IDLE_TIMER_DEF)
 	},
 	{
 		htole32(IWM_SF_TX_RE_AGING_TIMER_DEF),
 		htole32(IWM_SF_TX_RE_IDLE_TIMER_DEF)
 	},
 };
 
 /*
  * Aging and idle timeouts for the different possible scenarios
  * in single BSS MAC configuration.
  */
 static const uint32_t
 iwm_sf_full_timeout[IWM_SF_NUM_SCENARIO][IWM_SF_NUM_TIMEOUT_TYPES] = {
 	{
 		htole32(IWM_SF_SINGLE_UNICAST_AGING_TIMER),
 		htole32(IWM_SF_SINGLE_UNICAST_IDLE_TIMER)
 	},
 	{
 		htole32(IWM_SF_AGG_UNICAST_AGING_TIMER),
 		htole32(IWM_SF_AGG_UNICAST_IDLE_TIMER)
 	},
 	{
 		htole32(IWM_SF_MCAST_AGING_TIMER),
 		htole32(IWM_SF_MCAST_IDLE_TIMER)
 	},
 	{
 		htole32(IWM_SF_BA_AGING_TIMER),
 		htole32(IWM_SF_BA_IDLE_TIMER)
 	},
 	{
 		htole32(IWM_SF_TX_RE_AGING_TIMER),
 		htole32(IWM_SF_TX_RE_IDLE_TIMER)
 	},
 };
 
 static void
 iwm_mvm_fill_sf_command(struct iwm_softc *sc, struct iwm_sf_cfg_cmd *sf_cmd,
     struct ieee80211_node *ni)
 {
 	int i, j, watermark;
 
 	sf_cmd->watermark[IWM_SF_LONG_DELAY_ON] = htole32(IWM_SF_W_MARK_SCAN);
 
 	/*
 	 * If we are in association flow - check antenna configuration
 	 * capabilities of the AP station, and choose the watermark accordingly.
 	 */
 	if (ni) {
 		if (ni->ni_flags & IEEE80211_NODE_HT) {
 #ifdef notyet
 			if (ni->ni_rxmcs[2] != 0)
 				watermark = IWM_SF_W_MARK_MIMO3;
 			else if (ni->ni_rxmcs[1] != 0)
 				watermark = IWM_SF_W_MARK_MIMO2;
 			else
 #endif
 				watermark = IWM_SF_W_MARK_SISO;
 		} else {
 			watermark = IWM_SF_W_MARK_LEGACY;
 		}
 	/* default watermark value for unassociated mode. */
 	} else {
 		watermark = IWM_SF_W_MARK_MIMO2;
 	}
 	sf_cmd->watermark[IWM_SF_FULL_ON] = htole32(watermark);
 
 	for (i = 0; i < IWM_SF_NUM_SCENARIO; i++) {
 		for (j = 0; j < IWM_SF_NUM_TIMEOUT_TYPES; j++) {
 			sf_cmd->long_delay_timeouts[i][j] =
 					htole32(IWM_SF_LONG_DELAY_AGING_TIMER);
 		}
 	}
 
 	if (ni) {
 		memcpy(sf_cmd->full_on_timeouts, iwm_sf_full_timeout,
 		       sizeof(iwm_sf_full_timeout));
 	} else {
 		memcpy(sf_cmd->full_on_timeouts, iwm_sf_full_timeout_def,
 		       sizeof(iwm_sf_full_timeout_def));
 	}
 }
 
 static int
 iwm_mvm_sf_config(struct iwm_softc *sc, enum iwm_sf_state new_state)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
 	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
 	struct iwm_sf_cfg_cmd sf_cmd = {
 		.state = htole32(IWM_SF_FULL_ON),
 	};
 	int ret = 0;
 
 	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000)
 		sf_cmd.state |= htole32(IWM_SF_CFG_DUMMY_NOTIF_OFF);
 
 	switch (new_state) {
 	case IWM_SF_UNINIT:
 	case IWM_SF_INIT_OFF:
 		iwm_mvm_fill_sf_command(sc, &sf_cmd, NULL);
 		break;
 	case IWM_SF_FULL_ON:
 		iwm_mvm_fill_sf_command(sc, &sf_cmd, vap->iv_bss);
 		break;
 	default:
 		IWM_DPRINTF(sc, IWM_DEBUG_PWRSAVE,
 		    "Invalid state: %d. not sending Smart Fifo cmd\n",
 			  new_state);
 		return EINVAL;
 	}
 
 	ret = iwm_mvm_send_cmd_pdu(sc, IWM_REPLY_SF_CFG_CMD, IWM_CMD_ASYNC,
 				   sizeof(sf_cmd), &sf_cmd);
 	return ret;
 }
 
 static int
 iwm_send_bt_init_conf(struct iwm_softc *sc)
 {
 	struct iwm_bt_coex_cmd bt_cmd;
 
 	bt_cmd.mode = htole32(IWM_BT_COEX_WIFI);
 	bt_cmd.enabled_modules = htole32(IWM_BT_COEX_HIGH_BAND_RET);
 
 	return iwm_mvm_send_cmd_pdu(sc, IWM_BT_CONFIG, 0, sizeof(bt_cmd),
 	    &bt_cmd);
 }
 
 static int
 iwm_send_update_mcc_cmd(struct iwm_softc *sc, const char *alpha2)
 {
 	struct iwm_mcc_update_cmd mcc_cmd;
 	struct iwm_host_cmd hcmd = {
 		.id = IWM_MCC_UPDATE_CMD,
 		.flags = (IWM_CMD_SYNC | IWM_CMD_WANT_SKB),
 		.data = { &mcc_cmd },
 	};
 	int ret;
 #ifdef IWM_DEBUG
 	struct iwm_rx_packet *pkt;
 	struct iwm_mcc_update_resp_v1 *mcc_resp_v1 = NULL;
 	struct iwm_mcc_update_resp *mcc_resp;
 	int n_channels;
 	uint16_t mcc;
 #endif
 	int resp_v2 = isset(sc->sc_enabled_capa,
 	    IWM_UCODE_TLV_CAPA_LAR_SUPPORT_V2);
 
 	memset(&mcc_cmd, 0, sizeof(mcc_cmd));
 	mcc_cmd.mcc = htole16(alpha2[0] << 8 | alpha2[1]);
 	if ((sc->sc_ucode_api & IWM_UCODE_TLV_API_WIFI_MCC_UPDATE) ||
 	    isset(sc->sc_enabled_capa, IWM_UCODE_TLV_CAPA_LAR_MULTI_MCC))
 		mcc_cmd.source_id = IWM_MCC_SOURCE_GET_CURRENT;
 	else
 		mcc_cmd.source_id = IWM_MCC_SOURCE_OLD_FW;
 
 	if (resp_v2)
 		hcmd.len[0] = sizeof(struct iwm_mcc_update_cmd);
 	else
 		hcmd.len[0] = sizeof(struct iwm_mcc_update_cmd_v1);
 
 	IWM_DPRINTF(sc, IWM_DEBUG_NODE,
 	    "send MCC update to FW with '%c%c' src = %d\n",
 	    alpha2[0], alpha2[1], mcc_cmd.source_id);
 
 	ret = iwm_send_cmd(sc, &hcmd);
 	if (ret)
 		return ret;
 
 #ifdef IWM_DEBUG
 	pkt = hcmd.resp_pkt;
 
 	/* Extract MCC response */
 	if (resp_v2) {
 		mcc_resp = (void *)pkt->data;
 		mcc = mcc_resp->mcc;
 		n_channels =  le32toh(mcc_resp->n_channels);
 	} else {
 		mcc_resp_v1 = (void *)pkt->data;
 		mcc = mcc_resp_v1->mcc;
 		n_channels =  le32toh(mcc_resp_v1->n_channels);
 	}
 
 	/* W/A for a FW/NVM issue - returns 0x00 for the world domain */
 	if (mcc == 0)
 		mcc = 0x3030;  /* "00" - world */
 
 	IWM_DPRINTF(sc, IWM_DEBUG_NODE,
 	    "regulatory domain '%c%c' (%d channels available)\n",
 	    mcc >> 8, mcc & 0xff, n_channels);
 #endif
 	iwm_free_resp(sc, &hcmd);
 
 	return 0;
 }
 
 static void
 iwm_mvm_tt_tx_backoff(struct iwm_softc *sc, uint32_t backoff)
 {
 	struct iwm_host_cmd cmd = {
 		.id = IWM_REPLY_THERMAL_MNG_BACKOFF,
 		.len = { sizeof(uint32_t), },
 		.data = { &backoff, },
 	};
 
 	if (iwm_send_cmd(sc, &cmd) != 0) {
 		device_printf(sc->sc_dev,
 		    "failed to change thermal tx backoff\n");
 	}
 }
 
 static int
 iwm_init_hw(struct iwm_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
 	int error, i, ac;
 
 	if ((error = iwm_start_hw(sc)) != 0) {
 		printf("iwm_start_hw: failed %d\n", error);
 		return error;
 	}
 
 	if ((error = iwm_run_init_mvm_ucode(sc, 0)) != 0) {
 		printf("iwm_run_init_mvm_ucode: failed %d\n", error);
 		return error;
 	}
 
 	/*
 	 * should stop and start HW since that INIT
 	 * image just loaded
 	 */
 	iwm_stop_device(sc);
 	if ((error = iwm_start_hw(sc)) != 0) {
 		device_printf(sc->sc_dev, "could not initialize hardware\n");
 		return error;
 	}
 
 	/* omstart, this time with the regular firmware */
 	error = iwm_mvm_load_ucode_wait_alive(sc, IWM_UCODE_REGULAR);
 	if (error) {
 		device_printf(sc->sc_dev, "could not load firmware\n");
 		goto error;
 	}
 
 	if ((error = iwm_send_bt_init_conf(sc)) != 0) {
 		device_printf(sc->sc_dev, "bt init conf failed\n");
 		goto error;
 	}
 
 	error = iwm_send_tx_ant_cfg(sc, iwm_mvm_get_valid_tx_ant(sc));
 	if (error != 0) {
 		device_printf(sc->sc_dev, "antenna config failed\n");
 		goto error;
 	}
 
 	/* Send phy db control command and then phy db calibration */
 	if ((error = iwm_send_phy_db_data(sc->sc_phy_db)) != 0)
 		goto error;
 
 	if ((error = iwm_send_phy_cfg_cmd(sc)) != 0) {
 		device_printf(sc->sc_dev, "phy_cfg_cmd failed\n");
 		goto error;
 	}
 
 	/* Add auxiliary station for scanning */
 	if ((error = iwm_mvm_add_aux_sta(sc)) != 0) {
 		device_printf(sc->sc_dev, "add_aux_sta failed\n");
 		goto error;
 	}
 
 	for (i = 0; i < IWM_NUM_PHY_CTX; i++) {
 		/*
 		 * The channel used here isn't relevant as it's
 		 * going to be overwritten in the other flows.
 		 * For now use the first channel we have.
 		 */
 		if ((error = iwm_mvm_phy_ctxt_add(sc,
 		    &sc->sc_phyctxt[i], &ic->ic_channels[1], 1, 1)) != 0)
 			goto error;
 	}
 
 	/* Initialize tx backoffs to the minimum. */
 	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_7000)
 		iwm_mvm_tt_tx_backoff(sc, 0);
 
 	error = iwm_mvm_power_update_device(sc);
 	if (error)
 		goto error;
 
 	if (isset(sc->sc_enabled_capa, IWM_UCODE_TLV_CAPA_LAR_SUPPORT)) {
 		if ((error = iwm_send_update_mcc_cmd(sc, "ZZ")) != 0)
 			goto error;
 	}
 
 	if (isset(sc->sc_enabled_capa, IWM_UCODE_TLV_CAPA_UMAC_SCAN)) {
 		if ((error = iwm_mvm_config_umac_scan(sc)) != 0)
 			goto error;
 	}
 
 	/* Enable Tx queues. */
 	for (ac = 0; ac < WME_NUM_AC; ac++) {
 		error = iwm_enable_txq(sc, IWM_STATION_ID, ac,
 		    iwm_mvm_ac_to_tx_fifo[ac]);
 		if (error)
 			goto error;
 	}
 
 	if ((error = iwm_mvm_disable_beacon_filter(sc)) != 0) {
 		device_printf(sc->sc_dev, "failed to disable beacon filter\n");
 		goto error;
 	}
 
 	return 0;
 
  error:
 	iwm_stop_device(sc);
 	return error;
 }
 
 /* Allow multicast from our BSSID. */
 static int
 iwm_allow_mcast(struct ieee80211vap *vap, struct iwm_softc *sc)
 {
 	struct ieee80211_node *ni = vap->iv_bss;
 	struct iwm_mcast_filter_cmd *cmd;
 	size_t size;
 	int error;
 
 	size = roundup(sizeof(*cmd), 4);
 	cmd = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
 	if (cmd == NULL)
 		return ENOMEM;
 	cmd->filter_own = 1;
 	cmd->port_id = 0;
 	cmd->count = 0;
 	cmd->pass_all = 1;
 	IEEE80211_ADDR_COPY(cmd->bssid, ni->ni_bssid);
 
 	error = iwm_mvm_send_cmd_pdu(sc, IWM_MCAST_FILTER_CMD,
 	    IWM_CMD_SYNC, size, cmd);
 	free(cmd, M_DEVBUF);
 
 	return (error);
 }
 
 /*
  * ifnet interfaces
  */
 
 static void
 iwm_init(struct iwm_softc *sc)
 {
 	int error;
 
 	if (sc->sc_flags & IWM_FLAG_HW_INITED) {
 		return;
 	}
 	sc->sc_generation++;
 	sc->sc_flags &= ~IWM_FLAG_STOPPED;
 
 	if ((error = iwm_init_hw(sc)) != 0) {
 		printf("iwm_init_hw failed %d\n", error);
 		iwm_stop(sc);
 		return;
 	}
 
 	/*
 	 * Ok, firmware loaded and we are jogging
 	 */
 	sc->sc_flags |= IWM_FLAG_HW_INITED;
 	callout_reset(&sc->sc_watchdog_to, hz, iwm_watchdog, sc);
 }
 
 static int
 iwm_transmit(struct ieee80211com *ic, struct mbuf *m)
 {
 	struct iwm_softc *sc;
 	int error;
 
 	sc = ic->ic_softc;
 
 	IWM_LOCK(sc);
 	if ((sc->sc_flags & IWM_FLAG_HW_INITED) == 0) {
 		IWM_UNLOCK(sc);
 		return (ENXIO);
 	}
 	error = mbufq_enqueue(&sc->sc_snd, m);
 	if (error) {
 		IWM_UNLOCK(sc);
 		return (error);
 	}
 	iwm_start(sc);
 	IWM_UNLOCK(sc);
 	return (0);
 }
 
 /*
  * Dequeue packets from sendq and call send.
  */
 static void
 iwm_start(struct iwm_softc *sc)
 {
 	struct ieee80211_node *ni;
 	struct mbuf *m;
 	int ac = 0;
 
 	IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TRACE, "->%s\n", __func__);
 	while (sc->qfullmsk == 0 &&
 		(m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
 		ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
 		if (iwm_tx(sc, m, ni, ac) != 0) {
 			if_inc_counter(ni->ni_vap->iv_ifp,
 			    IFCOUNTER_OERRORS, 1);
 			ieee80211_free_node(ni);
 			continue;
 		}
 		sc->sc_tx_timer = 15;
 	}
 	IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TRACE, "<-%s\n", __func__);
 }
 
 static void
 iwm_stop(struct iwm_softc *sc)
 {
 
 	sc->sc_flags &= ~IWM_FLAG_HW_INITED;
 	sc->sc_flags |= IWM_FLAG_STOPPED;
 	sc->sc_generation++;
 	iwm_led_blink_stop(sc);
 	sc->sc_tx_timer = 0;
 	iwm_stop_device(sc);
 	sc->sc_flags &= ~IWM_FLAG_SCAN_RUNNING;
 }
 
 static void
 iwm_watchdog(void *arg)
 {
 	struct iwm_softc *sc = arg;
 	struct ieee80211com *ic = &sc->sc_ic;
 
 	if (sc->sc_tx_timer > 0) {
 		if (--sc->sc_tx_timer == 0) {
 			device_printf(sc->sc_dev, "device timeout\n");
 #ifdef IWM_DEBUG
 			iwm_nic_error(sc);
 #endif
 			ieee80211_restart_all(ic);
 			counter_u64_add(sc->sc_ic.ic_oerrors, 1);
 			return;
 		}
 	}
 	callout_reset(&sc->sc_watchdog_to, hz, iwm_watchdog, sc);
 }
 
 static void
 iwm_parent(struct ieee80211com *ic)
 {
 	struct iwm_softc *sc = ic->ic_softc;
 	int startall = 0;
 
 	IWM_LOCK(sc);
 	if (ic->ic_nrunning > 0) {
 		if (!(sc->sc_flags & IWM_FLAG_HW_INITED)) {
 			iwm_init(sc);
 			startall = 1;
 		}
 	} else if (sc->sc_flags & IWM_FLAG_HW_INITED)
 		iwm_stop(sc);
 	IWM_UNLOCK(sc);
 	if (startall)
 		ieee80211_start_all(ic);
 }
 
 /*
  * The interrupt side of things
  */
 
 /*
  * error dumping routines are from iwlwifi/mvm/utils.c
  */
 
 /*
  * Note: This structure is read from the device with IO accesses,
  * and the reading already does the endian conversion. As it is
  * read with uint32_t-sized accesses, any members with a different size
  * need to be ordered correctly though!
  */
 struct iwm_error_event_table {
 	uint32_t valid;		/* (nonzero) valid, (0) log is empty */
 	uint32_t error_id;		/* type of error */
 	uint32_t trm_hw_status0;	/* TRM HW status */
 	uint32_t trm_hw_status1;	/* TRM HW status */
 	uint32_t blink2;		/* branch link */
 	uint32_t ilink1;		/* interrupt link */
 	uint32_t ilink2;		/* interrupt link */
 	uint32_t data1;		/* error-specific data */
 	uint32_t data2;		/* error-specific data */
 	uint32_t data3;		/* error-specific data */
 	uint32_t bcon_time;		/* beacon timer */
 	uint32_t tsf_low;		/* network timestamp function timer */
 	uint32_t tsf_hi;		/* network timestamp function timer */
 	uint32_t gp1;		/* GP1 timer register */
 	uint32_t gp2;		/* GP2 timer register */
 	uint32_t fw_rev_type;	/* firmware revision type */
 	uint32_t major;		/* uCode version major */
 	uint32_t minor;		/* uCode version minor */
 	uint32_t hw_ver;		/* HW Silicon version */
 	uint32_t brd_ver;		/* HW board version */
 	uint32_t log_pc;		/* log program counter */
 	uint32_t frame_ptr;		/* frame pointer */
 	uint32_t stack_ptr;		/* stack pointer */
 	uint32_t hcmd;		/* last host command header */
 	uint32_t isr0;		/* isr status register LMPM_NIC_ISR0:
 				 * rxtx_flag */
 	uint32_t isr1;		/* isr status register LMPM_NIC_ISR1:
 				 * host_flag */
 	uint32_t isr2;		/* isr status register LMPM_NIC_ISR2:
 				 * enc_flag */
 	uint32_t isr3;		/* isr status register LMPM_NIC_ISR3:
 				 * time_flag */
 	uint32_t isr4;		/* isr status register LMPM_NIC_ISR4:
 				 * wico interrupt */
 	uint32_t last_cmd_id;	/* last HCMD id handled by the firmware */
 	uint32_t wait_event;		/* wait event() caller address */
 	uint32_t l2p_control;	/* L2pControlField */
 	uint32_t l2p_duration;	/* L2pDurationField */
 	uint32_t l2p_mhvalid;	/* L2pMhValidBits */
 	uint32_t l2p_addr_match;	/* L2pAddrMatchStat */
 	uint32_t lmpm_pmg_sel;	/* indicate which clocks are turned on
 				 * (LMPM_PMG_SEL) */
 	uint32_t u_timestamp;	/* indicate when the date and time of the
 				 * compilation */
 	uint32_t flow_handler;	/* FH read/write pointers, RX credit */
 } __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
 
 /*
  * UMAC error struct - relevant starting from family 8000 chip.
  * Note: This structure is read from the device with IO accesses,
  * and the reading already does the endian conversion. As it is
  * read with u32-sized accesses, any members with a different size
  * need to be ordered correctly though!
  */
 struct iwm_umac_error_event_table {
 	uint32_t valid;		/* (nonzero) valid, (0) log is empty */
 	uint32_t error_id;	/* type of error */
 	uint32_t blink1;	/* branch link */
 	uint32_t blink2;	/* branch link */
 	uint32_t ilink1;	/* interrupt link */
 	uint32_t ilink2;	/* interrupt link */
 	uint32_t data1;		/* error-specific data */
 	uint32_t data2;		/* error-specific data */
 	uint32_t data3;		/* error-specific data */
 	uint32_t umac_major;
 	uint32_t umac_minor;
 	uint32_t frame_pointer;	/* core register 27*/
 	uint32_t stack_pointer;	/* core register 28 */
 	uint32_t cmd_header;	/* latest host cmd sent to UMAC */
 	uint32_t nic_isr_pref;	/* ISR status register */
 } __packed;
 
 #define ERROR_START_OFFSET  (1 * sizeof(uint32_t))
 #define ERROR_ELEM_SIZE     (7 * sizeof(uint32_t))
 
 #ifdef IWM_DEBUG
 struct {
 	const char *name;
 	uint8_t num;
 } advanced_lookup[] = {
 	{ "NMI_INTERRUPT_WDG", 0x34 },
 	{ "SYSASSERT", 0x35 },
 	{ "UCODE_VERSION_MISMATCH", 0x37 },
 	{ "BAD_COMMAND", 0x38 },
 	{ "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
 	{ "FATAL_ERROR", 0x3D },
 	{ "NMI_TRM_HW_ERR", 0x46 },
 	{ "NMI_INTERRUPT_TRM", 0x4C },
 	{ "NMI_INTERRUPT_BREAK_POINT", 0x54 },
 	{ "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
 	{ "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
 	{ "NMI_INTERRUPT_HOST", 0x66 },
 	{ "NMI_INTERRUPT_ACTION_PT", 0x7C },
 	{ "NMI_INTERRUPT_UNKNOWN", 0x84 },
 	{ "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
 	{ "ADVANCED_SYSASSERT", 0 },
 };
 
 static const char *
 iwm_desc_lookup(uint32_t num)
 {
 	int i;
 
 	for (i = 0; i < nitems(advanced_lookup) - 1; i++)
 		if (advanced_lookup[i].num == num)
 			return advanced_lookup[i].name;
 
 	/* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
 	return advanced_lookup[i].name;
 }
 
 static void
 iwm_nic_umac_error(struct iwm_softc *sc)
 {
 	struct iwm_umac_error_event_table table;
 	uint32_t base;
 
 	base = sc->umac_error_event_table;
 
 	if (base < 0x800000) {
 		device_printf(sc->sc_dev, "Invalid error log pointer 0x%08x\n",
 		    base);
 		return;
 	}
 
 	if (iwm_read_mem(sc, base, &table, sizeof(table)/sizeof(uint32_t))) {
 		device_printf(sc->sc_dev, "reading errlog failed\n");
 		return;
 	}
 
 	if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
 		device_printf(sc->sc_dev, "Start UMAC Error Log Dump:\n");
 		device_printf(sc->sc_dev, "Status: 0x%x, count: %d\n",
 		    sc->sc_flags, table.valid);
 	}
 
 	device_printf(sc->sc_dev, "0x%08X | %s\n", table.error_id,
 		iwm_desc_lookup(table.error_id));
 	device_printf(sc->sc_dev, "0x%08X | umac branchlink1\n", table.blink1);
 	device_printf(sc->sc_dev, "0x%08X | umac branchlink2\n", table.blink2);
 	device_printf(sc->sc_dev, "0x%08X | umac interruptlink1\n",
 	    table.ilink1);
 	device_printf(sc->sc_dev, "0x%08X | umac interruptlink2\n",
 	    table.ilink2);
 	device_printf(sc->sc_dev, "0x%08X | umac data1\n", table.data1);
 	device_printf(sc->sc_dev, "0x%08X | umac data2\n", table.data2);
 	device_printf(sc->sc_dev, "0x%08X | umac data3\n", table.data3);
 	device_printf(sc->sc_dev, "0x%08X | umac major\n", table.umac_major);
 	device_printf(sc->sc_dev, "0x%08X | umac minor\n", table.umac_minor);
 	device_printf(sc->sc_dev, "0x%08X | frame pointer\n",
 	    table.frame_pointer);
 	device_printf(sc->sc_dev, "0x%08X | stack pointer\n",
 	    table.stack_pointer);
 	device_printf(sc->sc_dev, "0x%08X | last host cmd\n", table.cmd_header);
 	device_printf(sc->sc_dev, "0x%08X | isr status reg\n",
 	    table.nic_isr_pref);
 }
 
 /*
  * Support for dumping the error log seemed like a good idea ...
  * but it's mostly hex junk and the only sensible thing is the
  * hw/ucode revision (which we know anyway).  Since it's here,
  * I'll just leave it in, just in case e.g. the Intel guys want to
  * help us decipher some "ADVANCED_SYSASSERT" later.
  */
 static void
 iwm_nic_error(struct iwm_softc *sc)
 {
 	struct iwm_error_event_table table;
 	uint32_t base;
 
 	device_printf(sc->sc_dev, "dumping device error log\n");
 	base = sc->error_event_table;
 	if (base < 0x800000) {
 		device_printf(sc->sc_dev,
 		    "Invalid error log pointer 0x%08x\n", base);
 		return;
 	}
 
 	if (iwm_read_mem(sc, base, &table, sizeof(table)/sizeof(uint32_t))) {
 		device_printf(sc->sc_dev, "reading errlog failed\n");
 		return;
 	}
 
 	if (!table.valid) {
 		device_printf(sc->sc_dev, "errlog not found, skipping\n");
 		return;
 	}
 
 	if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
 		device_printf(sc->sc_dev, "Start Error Log Dump:\n");
 		device_printf(sc->sc_dev, "Status: 0x%x, count: %d\n",
 		    sc->sc_flags, table.valid);
 	}
 
 	device_printf(sc->sc_dev, "0x%08X | %-28s\n", table.error_id,
 	    iwm_desc_lookup(table.error_id));
 	device_printf(sc->sc_dev, "%08X | trm_hw_status0\n",
 	    table.trm_hw_status0);
 	device_printf(sc->sc_dev, "%08X | trm_hw_status1\n",
 	    table.trm_hw_status1);
 	device_printf(sc->sc_dev, "%08X | branchlink2\n", table.blink2);
 	device_printf(sc->sc_dev, "%08X | interruptlink1\n", table.ilink1);
 	device_printf(sc->sc_dev, "%08X | interruptlink2\n", table.ilink2);
 	device_printf(sc->sc_dev, "%08X | data1\n", table.data1);
 	device_printf(sc->sc_dev, "%08X | data2\n", table.data2);
 	device_printf(sc->sc_dev, "%08X | data3\n", table.data3);
 	device_printf(sc->sc_dev, "%08X | beacon time\n", table.bcon_time);
 	device_printf(sc->sc_dev, "%08X | tsf low\n", table.tsf_low);
 	device_printf(sc->sc_dev, "%08X | tsf hi\n", table.tsf_hi);
 	device_printf(sc->sc_dev, "%08X | time gp1\n", table.gp1);
 	device_printf(sc->sc_dev, "%08X | time gp2\n", table.gp2);
 	device_printf(sc->sc_dev, "%08X | uCode revision type\n",
 	    table.fw_rev_type);
 	device_printf(sc->sc_dev, "%08X | uCode version major\n", table.major);
 	device_printf(sc->sc_dev, "%08X | uCode version minor\n", table.minor);
 	device_printf(sc->sc_dev, "%08X | hw version\n", table.hw_ver);
 	device_printf(sc->sc_dev, "%08X | board version\n", table.brd_ver);
 	device_printf(sc->sc_dev, "%08X | hcmd\n", table.hcmd);
 	device_printf(sc->sc_dev, "%08X | isr0\n", table.isr0);
 	device_printf(sc->sc_dev, "%08X | isr1\n", table.isr1);
 	device_printf(sc->sc_dev, "%08X | isr2\n", table.isr2);
 	device_printf(sc->sc_dev, "%08X | isr3\n", table.isr3);
 	device_printf(sc->sc_dev, "%08X | isr4\n", table.isr4);
 	device_printf(sc->sc_dev, "%08X | last cmd Id\n", table.last_cmd_id);
 	device_printf(sc->sc_dev, "%08X | wait_event\n", table.wait_event);
 	device_printf(sc->sc_dev, "%08X | l2p_control\n", table.l2p_control);
 	device_printf(sc->sc_dev, "%08X | l2p_duration\n", table.l2p_duration);
 	device_printf(sc->sc_dev, "%08X | l2p_mhvalid\n", table.l2p_mhvalid);
 	device_printf(sc->sc_dev, "%08X | l2p_addr_match\n", table.l2p_addr_match);
 	device_printf(sc->sc_dev, "%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
 	device_printf(sc->sc_dev, "%08X | timestamp\n", table.u_timestamp);
 	device_printf(sc->sc_dev, "%08X | flow_handler\n", table.flow_handler);
 
 	if (sc->umac_error_event_table)
 		iwm_nic_umac_error(sc);
 }
 #endif
 
 #define ADVANCE_RXQ(sc) (sc->rxq.cur = (sc->rxq.cur + 1) % IWM_RX_RING_COUNT);
 
 /*
  * Process an IWM_CSR_INT_BIT_FH_RX or IWM_CSR_INT_BIT_SW_RX interrupt.
  * Basic structure from if_iwn
  */
 static void
 iwm_notif_intr(struct iwm_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
 	uint16_t hw;
 
 	bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
 	    BUS_DMASYNC_POSTREAD);
 
 	hw = le16toh(sc->rxq.stat->closed_rb_num) & 0xfff;
 
 	/*
 	 * Process responses
 	 */
 	while (sc->rxq.cur != hw) {
 		struct iwm_rx_ring *ring = &sc->rxq;
 		struct iwm_rx_data *data = &ring->data[ring->cur];
 		struct iwm_rx_packet *pkt;
 		struct iwm_cmd_response *cresp;
 		int qid, idx, code;
 
 		bus_dmamap_sync(ring->data_dmat, data->map,
 		    BUS_DMASYNC_POSTREAD);
 		pkt = mtod(data->m, struct iwm_rx_packet *);
 
 		qid = pkt->hdr.qid & ~0x80;
 		idx = pkt->hdr.idx;
 
 		code = IWM_WIDE_ID(pkt->hdr.flags, pkt->hdr.code);
 		IWM_DPRINTF(sc, IWM_DEBUG_INTR,
 		    "rx packet qid=%d idx=%d type=%x %d %d\n",
 		    pkt->hdr.qid & ~0x80, pkt->hdr.idx, code, ring->cur, hw);
 
 		/*
 		 * randomly get these from the firmware, no idea why.
 		 * they at least seem harmless, so just ignore them for now
 		 */
 		if (__predict_false((pkt->hdr.code == 0 && qid == 0 && idx == 0)
 		    || pkt->len_n_flags == htole32(0x55550000))) {
 			ADVANCE_RXQ(sc);
 			continue;
 		}
 
 		iwm_notification_wait_notify(sc->sc_notif_wait, code, pkt);
 
 		switch (code) {
 		case IWM_REPLY_RX_PHY_CMD:
 			iwm_mvm_rx_rx_phy_cmd(sc, pkt, data);
 			break;
 
 		case IWM_REPLY_RX_MPDU_CMD:
 			iwm_mvm_rx_rx_mpdu(sc, pkt, data);
 			break;
 
 		case IWM_TX_CMD:
 			iwm_mvm_rx_tx_cmd(sc, pkt, data);
 			break;
 
 		case IWM_MISSED_BEACONS_NOTIFICATION: {
 			struct iwm_missed_beacons_notif *resp;
 			int missed;
 
 			/* XXX look at mac_id to determine interface ID */
 			struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
 
 			resp = (void *)pkt->data;
 			missed = le32toh(resp->consec_missed_beacons);
 
 			IWM_DPRINTF(sc, IWM_DEBUG_BEACON | IWM_DEBUG_STATE,
 			    "%s: MISSED_BEACON: mac_id=%d, "
 			    "consec_since_last_rx=%d, consec=%d, num_expect=%d "
 			    "num_rx=%d\n",
 			    __func__,
 			    le32toh(resp->mac_id),
 			    le32toh(resp->consec_missed_beacons_since_last_rx),
 			    le32toh(resp->consec_missed_beacons),
 			    le32toh(resp->num_expected_beacons),
 			    le32toh(resp->num_recvd_beacons));
 
 			/* Be paranoid */
 			if (vap == NULL)
 				break;
 
 			/* XXX no net80211 locking? */
 			if (vap->iv_state == IEEE80211_S_RUN &&
 			    (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
 				if (missed > vap->iv_bmissthreshold) {
 					/* XXX bad locking; turn into task */
 					IWM_UNLOCK(sc);
 					ieee80211_beacon_miss(ic);
 					IWM_LOCK(sc);
 				}
 			}
 
 			break; }
 
 		case IWM_MFUART_LOAD_NOTIFICATION:
 			break;
 
 		case IWM_MVM_ALIVE:
 			break;
 
 		case IWM_CALIB_RES_NOTIF_PHY_DB:
 			break;
 
 		case IWM_STATISTICS_NOTIFICATION: {
 			struct iwm_notif_statistics *stats;
 			stats = (void *)pkt->data;
 			memcpy(&sc->sc_stats, stats, sizeof(sc->sc_stats));
 			sc->sc_noise = iwm_get_noise(sc, &stats->rx.general);
 			break; }
 
 		case IWM_NVM_ACCESS_CMD:
 		case IWM_MCC_UPDATE_CMD:
 			if (sc->sc_wantresp == ((qid << 16) | idx)) {
 				memcpy(sc->sc_cmd_resp,
 				    pkt, sizeof(sc->sc_cmd_resp));
 			}
 			break;
 
 		case IWM_MCC_CHUB_UPDATE_CMD: {
 			struct iwm_mcc_chub_notif *notif;
 			notif = (void *)pkt->data;
 
 			sc->sc_fw_mcc[0] = (notif->mcc & 0xff00) >> 8;
 			sc->sc_fw_mcc[1] = notif->mcc & 0xff;
 			sc->sc_fw_mcc[2] = '\0';
 			IWM_DPRINTF(sc, IWM_DEBUG_RESET,
 			    "fw source %d sent CC '%s'\n",
 			    notif->source_id, sc->sc_fw_mcc);
 			break; }
 
 		case IWM_DTS_MEASUREMENT_NOTIFICATION:
 		case IWM_WIDE_ID(IWM_PHY_OPS_GROUP,
 				 IWM_DTS_MEASUREMENT_NOTIF_WIDE): {
 			struct iwm_dts_measurement_notif_v1 *notif;
 
 			if (iwm_rx_packet_payload_len(pkt) < sizeof(*notif)) {
 				device_printf(sc->sc_dev,
 				    "Invalid DTS_MEASUREMENT_NOTIFICATION\n");
 				break;
 			}
 			notif = (void *)pkt->data;
 			IWM_DPRINTF(sc, IWM_DEBUG_TEMP,
 			    "IWM_DTS_MEASUREMENT_NOTIFICATION - %d\n",
 			    notif->temp);
 			break;
 		}
 
 		case IWM_PHY_CONFIGURATION_CMD:
 		case IWM_TX_ANT_CONFIGURATION_CMD:
 		case IWM_ADD_STA:
 		case IWM_MAC_CONTEXT_CMD:
 		case IWM_REPLY_SF_CFG_CMD:
 		case IWM_POWER_TABLE_CMD:
 		case IWM_PHY_CONTEXT_CMD:
 		case IWM_BINDING_CONTEXT_CMD:
 		case IWM_TIME_EVENT_CMD:
 		case IWM_WIDE_ID(IWM_ALWAYS_LONG_GROUP, IWM_SCAN_CFG_CMD):
 		case IWM_WIDE_ID(IWM_ALWAYS_LONG_GROUP, IWM_SCAN_REQ_UMAC):
 		case IWM_SCAN_ABORT_UMAC:
 		case IWM_SCAN_OFFLOAD_REQUEST_CMD:
 		case IWM_SCAN_OFFLOAD_ABORT_CMD:
 		case IWM_REPLY_BEACON_FILTERING_CMD:
 		case IWM_MAC_PM_POWER_TABLE:
 		case IWM_TIME_QUOTA_CMD:
 		case IWM_REMOVE_STA:
 		case IWM_TXPATH_FLUSH:
 		case IWM_LQ_CMD:
+		case IWM_FW_PAGING_BLOCK_CMD:
 		case IWM_BT_CONFIG:
 		case IWM_REPLY_THERMAL_MNG_BACKOFF:
 			cresp = (void *)pkt->data;
 			if (sc->sc_wantresp == ((qid << 16) | idx)) {
 				memcpy(sc->sc_cmd_resp,
 				    pkt, sizeof(*pkt)+sizeof(*cresp));
 			}
 			break;
 
 		/* ignore */
 		case 0x6c: /* IWM_PHY_DB_CMD, no idea why it's not in fw-api.h */
 			break;
 
 		case IWM_INIT_COMPLETE_NOTIF:
 			break;
 
 		case IWM_SCAN_OFFLOAD_COMPLETE: {
 			struct iwm_periodic_scan_complete *notif;
 			notif = (void *)pkt->data;
 			if (sc->sc_flags & IWM_FLAG_SCAN_RUNNING) {
 				sc->sc_flags &= ~IWM_FLAG_SCAN_RUNNING;
 				ieee80211_runtask(ic, &sc->sc_es_task);
 			}
 			break;
 		}
 
 		case IWM_SCAN_ITERATION_COMPLETE: {
 			struct iwm_lmac_scan_complete_notif *notif;
 			notif = (void *)pkt->data;
 			ieee80211_runtask(&sc->sc_ic, &sc->sc_es_task);
  			break;
 		}
  
 		case IWM_SCAN_COMPLETE_UMAC: {
 			struct iwm_umac_scan_complete *notif;
 			notif = (void *)pkt->data;
 
 			IWM_DPRINTF(sc, IWM_DEBUG_SCAN,
 			    "UMAC scan complete, status=0x%x\n",
 			    notif->status);
 			if (sc->sc_flags & IWM_FLAG_SCAN_RUNNING) {
 				sc->sc_flags &= ~IWM_FLAG_SCAN_RUNNING;
 				ieee80211_runtask(ic, &sc->sc_es_task);
 			}
 			break;
 		}
 
 		case IWM_SCAN_ITERATION_COMPLETE_UMAC: {
 			struct iwm_umac_scan_iter_complete_notif *notif;
 			notif = (void *)pkt->data;
 
 			IWM_DPRINTF(sc, IWM_DEBUG_SCAN, "UMAC scan iteration "
 			    "complete, status=0x%x, %d channels scanned\n",
 			    notif->status, notif->scanned_channels);
 			ieee80211_runtask(&sc->sc_ic, &sc->sc_es_task);
 			break;
 		}
 
 		case IWM_REPLY_ERROR: {
 			struct iwm_error_resp *resp;
 			resp = (void *)pkt->data;
 
 			device_printf(sc->sc_dev,
 			    "firmware error 0x%x, cmd 0x%x\n",
 			    le32toh(resp->error_type),
 			    resp->cmd_id);
 			break;
 		}
 
 		case IWM_TIME_EVENT_NOTIFICATION: {
 			struct iwm_time_event_notif *notif;
 			notif = (void *)pkt->data;
 
 			IWM_DPRINTF(sc, IWM_DEBUG_INTR,
 			    "TE notif status = 0x%x action = 0x%x\n",
 			    notif->status, notif->action);
 			break;
 		}
 
 		case IWM_MCAST_FILTER_CMD:
 			break;
 
 		case IWM_SCD_QUEUE_CFG: {
 			struct iwm_scd_txq_cfg_rsp *rsp;
 			rsp = (void *)pkt->data;
 
 			IWM_DPRINTF(sc, IWM_DEBUG_CMD,
 			    "queue cfg token=0x%x sta_id=%d "
 			    "tid=%d scd_queue=%d\n",
 			    rsp->token, rsp->sta_id, rsp->tid,
 			    rsp->scd_queue);
 			break;
 		}
 
 		default:
 			device_printf(sc->sc_dev,
 			    "frame %d/%d %x UNHANDLED (this should "
 			    "not happen)\n", qid, idx,
 			    pkt->len_n_flags);
 			break;
 		}
 
 		/*
 		 * Why test bit 0x80?  The Linux driver:
 		 *
 		 * There is one exception:  uCode sets bit 15 when it
 		 * originates the response/notification, i.e. when the
 		 * response/notification is not a direct response to a
 		 * command sent by the driver.  For example, uCode issues
 		 * IWM_REPLY_RX when it sends a received frame to the driver;
 		 * it is not a direct response to any driver command.
 		 *
 		 * Ok, so since when is 7 == 15?  Well, the Linux driver
 		 * uses a slightly different format for pkt->hdr, and "qid"
 		 * is actually the upper byte of a two-byte field.
 		 */
 		if (!(pkt->hdr.qid & (1 << 7))) {
 			iwm_cmd_done(sc, pkt);
 		}
 
 		ADVANCE_RXQ(sc);
 	}
 
 	/*
 	 * Tell the firmware what we have processed.
 	 * Seems like the hardware gets upset unless we align
 	 * the write by 8??
 	 */
 	hw = (hw == 0) ? IWM_RX_RING_COUNT - 1 : hw - 1;
 	IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_WPTR, hw & ~7);
 }
 
 static void
 iwm_intr(void *arg)
 {
 	struct iwm_softc *sc = arg;
 	int handled = 0;
 	int r1, r2, rv = 0;
 	int isperiodic = 0;
 
 	IWM_LOCK(sc);
 	IWM_WRITE(sc, IWM_CSR_INT_MASK, 0);
 
 	if (sc->sc_flags & IWM_FLAG_USE_ICT) {
 		uint32_t *ict = sc->ict_dma.vaddr;
 		int tmp;
 
 		tmp = htole32(ict[sc->ict_cur]);
 		if (!tmp)
 			goto out_ena;
 
 		/*
 		 * ok, there was something.  keep plowing until we have all.
 		 */
 		r1 = r2 = 0;
 		while (tmp) {
 			r1 |= tmp;
 			ict[sc->ict_cur] = 0;
 			sc->ict_cur = (sc->ict_cur+1) % IWM_ICT_COUNT;
 			tmp = htole32(ict[sc->ict_cur]);
 		}
 
 		/* this is where the fun begins.  don't ask */
 		if (r1 == 0xffffffff)
 			r1 = 0;
 
 		/* i am not expected to understand this */
 		if (r1 & 0xc0000)
 			r1 |= 0x8000;
 		r1 = (0xff & r1) | ((0xff00 & r1) << 16);
 	} else {
 		r1 = IWM_READ(sc, IWM_CSR_INT);
 		/* "hardware gone" (where, fishing?) */
 		if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0)
 			goto out;
 		r2 = IWM_READ(sc, IWM_CSR_FH_INT_STATUS);
 	}
 	if (r1 == 0 && r2 == 0) {
 		goto out_ena;
 	}
 
 	IWM_WRITE(sc, IWM_CSR_INT, r1 | ~sc->sc_intmask);
 
 	/* Safely ignore these bits for debug checks below */
 	r1 &= ~(IWM_CSR_INT_BIT_ALIVE | IWM_CSR_INT_BIT_SCD);
 
 	if (r1 & IWM_CSR_INT_BIT_SW_ERR) {
 		int i;
 		struct ieee80211com *ic = &sc->sc_ic;
 		struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
 
 #ifdef IWM_DEBUG
 		iwm_nic_error(sc);
 #endif
 		/* Dump driver status (TX and RX rings) while we're here. */
 		device_printf(sc->sc_dev, "driver status:\n");
 		for (i = 0; i < IWM_MVM_MAX_QUEUES; i++) {
 			struct iwm_tx_ring *ring = &sc->txq[i];
 			device_printf(sc->sc_dev,
 			    "  tx ring %2d: qid=%-2d cur=%-3d "
 			    "queued=%-3d\n",
 			    i, ring->qid, ring->cur, ring->queued);
 		}
 		device_printf(sc->sc_dev,
 		    "  rx ring: cur=%d\n", sc->rxq.cur);
 		device_printf(sc->sc_dev,
 		    "  802.11 state %d\n", (vap == NULL) ? -1 : vap->iv_state);
 
 		/* Don't stop the device; just do a VAP restart */
 		IWM_UNLOCK(sc);
 
 		if (vap == NULL) {
 			printf("%s: null vap\n", __func__);
 			return;
 		}
 
 		device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; "
 		    "restarting\n", __func__, vap->iv_state);
 
 		/* XXX TODO: turn this into a callout/taskqueue */
 		ieee80211_restart_all(ic);
 		return;
 	}
 
 	if (r1 & IWM_CSR_INT_BIT_HW_ERR) {
 		handled |= IWM_CSR_INT_BIT_HW_ERR;
 		device_printf(sc->sc_dev, "hardware error, stopping device\n");
 		iwm_stop(sc);
 		rv = 1;
 		goto out;
 	}
 
 	/* firmware chunk loaded */
 	if (r1 & IWM_CSR_INT_BIT_FH_TX) {
 		IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, IWM_CSR_FH_INT_TX_MASK);
 		handled |= IWM_CSR_INT_BIT_FH_TX;
 		sc->sc_fw_chunk_done = 1;
 		wakeup(&sc->sc_fw);
 	}
 
 	if (r1 & IWM_CSR_INT_BIT_RF_KILL) {
 		handled |= IWM_CSR_INT_BIT_RF_KILL;
 		if (iwm_check_rfkill(sc)) {
 			device_printf(sc->sc_dev,
 			    "%s: rfkill switch, disabling interface\n",
 			    __func__);
 			iwm_stop(sc);
 		}
 	}
 
 	/*
 	 * The Linux driver uses periodic interrupts to avoid races.
 	 * We cargo-cult like it's going out of fashion.
 	 */
 	if (r1 & IWM_CSR_INT_BIT_RX_PERIODIC) {
 		handled |= IWM_CSR_INT_BIT_RX_PERIODIC;
 		IWM_WRITE(sc, IWM_CSR_INT, IWM_CSR_INT_BIT_RX_PERIODIC);
 		if ((r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX)) == 0)
 			IWM_WRITE_1(sc,
 			    IWM_CSR_INT_PERIODIC_REG, IWM_CSR_INT_PERIODIC_DIS);
 		isperiodic = 1;
 	}
 
 	if ((r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX)) || isperiodic) {
 		handled |= (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX);
 		IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, IWM_CSR_FH_INT_RX_MASK);
 
 		iwm_notif_intr(sc);
 
 		/* enable periodic interrupt, see above */
 		if (r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX) && !isperiodic)
 			IWM_WRITE_1(sc, IWM_CSR_INT_PERIODIC_REG,
 			    IWM_CSR_INT_PERIODIC_ENA);
 	}
 
 	if (__predict_false(r1 & ~handled))
 		IWM_DPRINTF(sc, IWM_DEBUG_INTR,
 		    "%s: unhandled interrupts: %x\n", __func__, r1);
 	rv = 1;
 
  out_ena:
 	iwm_restore_interrupts(sc);
  out:
 	IWM_UNLOCK(sc);
 	return;
 }
 
 /*
  * Autoconf glue-sniffing
  */
 #define	PCI_VENDOR_INTEL		0x8086
 #define	PCI_PRODUCT_INTEL_WL_3160_1	0x08b3
 #define	PCI_PRODUCT_INTEL_WL_3160_2	0x08b4
 #define	PCI_PRODUCT_INTEL_WL_3165_1	0x3165
 #define	PCI_PRODUCT_INTEL_WL_3165_2	0x3166
 #define	PCI_PRODUCT_INTEL_WL_7260_1	0x08b1
 #define	PCI_PRODUCT_INTEL_WL_7260_2	0x08b2
 #define	PCI_PRODUCT_INTEL_WL_7265_1	0x095a
 #define	PCI_PRODUCT_INTEL_WL_7265_2	0x095b
 #define	PCI_PRODUCT_INTEL_WL_8260_1	0x24f3
 #define	PCI_PRODUCT_INTEL_WL_8260_2	0x24f4
 
 static const struct iwm_devices {
 	uint16_t		device;
 	const struct iwm_cfg	*cfg;
 } iwm_devices[] = {
 	{ PCI_PRODUCT_INTEL_WL_3160_1, &iwm3160_cfg },
 	{ PCI_PRODUCT_INTEL_WL_3160_2, &iwm3160_cfg },
 	{ PCI_PRODUCT_INTEL_WL_3165_1, &iwm3165_cfg },
 	{ PCI_PRODUCT_INTEL_WL_3165_2, &iwm3165_cfg },
 	{ PCI_PRODUCT_INTEL_WL_7260_1, &iwm7260_cfg },
 	{ PCI_PRODUCT_INTEL_WL_7260_2, &iwm7260_cfg },
 	{ PCI_PRODUCT_INTEL_WL_7265_1, &iwm7265_cfg },
 	{ PCI_PRODUCT_INTEL_WL_7265_2, &iwm7265_cfg },
 	{ PCI_PRODUCT_INTEL_WL_8260_1, &iwm8260_cfg },
 	{ PCI_PRODUCT_INTEL_WL_8260_2, &iwm8260_cfg },
 };
 
 static int
 iwm_probe(device_t dev)
 {
 	int i;
 
 	for (i = 0; i < nitems(iwm_devices); i++) {
 		if (pci_get_vendor(dev) == PCI_VENDOR_INTEL &&
 		    pci_get_device(dev) == iwm_devices[i].device) {
 			device_set_desc(dev, iwm_devices[i].cfg->name);
 			return (BUS_PROBE_DEFAULT);
 		}
 	}
 
 	return (ENXIO);
 }
 
 static int
 iwm_dev_check(device_t dev)
 {
 	struct iwm_softc *sc;
 	uint16_t devid;
 	int i;
 
 	sc = device_get_softc(dev);
 
 	devid = pci_get_device(dev);
 	for (i = 0; i < nitems(iwm_devices); i++) {
 		if (iwm_devices[i].device == devid) {
 			sc->cfg = iwm_devices[i].cfg;
 			return (0);
 		}
 	}
 	device_printf(dev, "unknown adapter type\n");
 	return ENXIO;
 }
 
 /* PCI registers */
 #define PCI_CFG_RETRY_TIMEOUT	0x041
 
 static int
 iwm_pci_attach(device_t dev)
 {
 	struct iwm_softc *sc;
 	int count, error, rid;
 	uint16_t reg;
 
 	sc = device_get_softc(dev);
 
 	/* We disable the RETRY_TIMEOUT register (0x41) to keep
 	 * PCI Tx retries from interfering with C3 CPU state */
 	pci_write_config(dev, PCI_CFG_RETRY_TIMEOUT, 0x00, 1);
 
 	/* Enable bus-mastering and hardware bug workaround. */
 	pci_enable_busmaster(dev);
 	reg = pci_read_config(dev, PCIR_STATUS, sizeof(reg));
 	/* if !MSI */
 	if (reg & PCIM_STATUS_INTxSTATE) {
 		reg &= ~PCIM_STATUS_INTxSTATE;
 	}
 	pci_write_config(dev, PCIR_STATUS, reg, sizeof(reg));
 
 	rid = PCIR_BAR(0);
 	sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
 	    RF_ACTIVE);
 	if (sc->sc_mem == NULL) {
 		device_printf(sc->sc_dev, "can't map mem space\n");
 		return (ENXIO);
 	}
 	sc->sc_st = rman_get_bustag(sc->sc_mem);
 	sc->sc_sh = rman_get_bushandle(sc->sc_mem);
 
 	/* Install interrupt handler. */
 	count = 1;
 	rid = 0;
 	if (pci_alloc_msi(dev, &count) == 0)
 		rid = 1;
 	sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
 	    (rid != 0 ? 0 : RF_SHAREABLE));
 	if (sc->sc_irq == NULL) {
 		device_printf(dev, "can't map interrupt\n");
 			return (ENXIO);
 	}
 	error = bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE,
 	    NULL, iwm_intr, sc, &sc->sc_ih);
 	if (sc->sc_ih == NULL) {
 		device_printf(dev, "can't establish interrupt");
 			return (ENXIO);
 	}
 	sc->sc_dmat = bus_get_dma_tag(sc->sc_dev);
 
 	return (0);
 }
 
 static void
 iwm_pci_detach(device_t dev)
 {
 	struct iwm_softc *sc = device_get_softc(dev);
 
 	if (sc->sc_irq != NULL) {
 		bus_teardown_intr(dev, sc->sc_irq, sc->sc_ih);
 		bus_release_resource(dev, SYS_RES_IRQ,
 		    rman_get_rid(sc->sc_irq), sc->sc_irq);
 		pci_release_msi(dev);
         }
 	if (sc->sc_mem != NULL)
 		bus_release_resource(dev, SYS_RES_MEMORY,
 		    rman_get_rid(sc->sc_mem), sc->sc_mem);
 }
 
 
 
 static int
 iwm_attach(device_t dev)
 {
 	struct iwm_softc *sc = device_get_softc(dev);
 	struct ieee80211com *ic = &sc->sc_ic;
 	int error;
 	int txq_i, i;
 
 	sc->sc_dev = dev;
 	sc->sc_attached = 1;
 	IWM_LOCK_INIT(sc);
 	mbufq_init(&sc->sc_snd, ifqmaxlen);
 	callout_init_mtx(&sc->sc_watchdog_to, &sc->sc_mtx, 0);
 	callout_init_mtx(&sc->sc_led_blink_to, &sc->sc_mtx, 0);
 	TASK_INIT(&sc->sc_es_task, 0, iwm_endscan_cb, sc);
 
 	sc->sc_notif_wait = iwm_notification_wait_init(sc);
 	if (sc->sc_notif_wait == NULL) {
 		device_printf(dev, "failed to init notification wait struct\n");
 		goto fail;
 	}
 
 	/* Init phy db */
 	sc->sc_phy_db = iwm_phy_db_init(sc);
 	if (!sc->sc_phy_db) {
 		device_printf(dev, "Cannot init phy_db\n");
 		goto fail;
 	}
 
 	/* PCI attach */
 	error = iwm_pci_attach(dev);
 	if (error != 0)
 		goto fail;
 
 	sc->sc_wantresp = -1;
 
 	/* Check device type */
 	error = iwm_dev_check(dev);
 	if (error != 0)
 		goto fail;
 
 	sc->sc_hw_rev = IWM_READ(sc, IWM_CSR_HW_REV);
 	/*
 	 * In the 8000 HW family the format of the 4 bytes of CSR_HW_REV have
 	 * changed, and now the revision step also includes bit 0-1 (no more
 	 * "dash" value). To keep hw_rev backwards compatible - we'll store it
 	 * in the old format.
 	 */
 	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000)
 		sc->sc_hw_rev = (sc->sc_hw_rev & 0xfff0) |
 				(IWM_CSR_HW_REV_STEP(sc->sc_hw_rev << 2) << 2);
 
 	if (iwm_prepare_card_hw(sc) != 0) {
 		device_printf(dev, "could not initialize hardware\n");
 		goto fail;
 	}
 
 	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000) {
 		int ret;
 		uint32_t hw_step;
 
 		/*
 		 * In order to recognize C step the driver should read the
 		 * chip version id located at the AUX bus MISC address.
 		 */
 		IWM_SETBITS(sc, IWM_CSR_GP_CNTRL,
 			    IWM_CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 		DELAY(2);
 
 		ret = iwm_poll_bit(sc, IWM_CSR_GP_CNTRL,
 				   IWM_CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 				   IWM_CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 				   25000);
 		if (!ret) {
 			device_printf(sc->sc_dev,
 			    "Failed to wake up the nic\n");
 			goto fail;
 		}
 
 		if (iwm_nic_lock(sc)) {
 			hw_step = iwm_read_prph(sc, IWM_WFPM_CTRL_REG);
 			hw_step |= IWM_ENABLE_WFPM;
 			iwm_write_prph(sc, IWM_WFPM_CTRL_REG, hw_step);
 			hw_step = iwm_read_prph(sc, IWM_AUX_MISC_REG);
 			hw_step = (hw_step >> IWM_HW_STEP_LOCATION_BITS) & 0xF;
 			if (hw_step == 0x3)
 				sc->sc_hw_rev = (sc->sc_hw_rev & 0xFFFFFFF3) |
 						(IWM_SILICON_C_STEP << 2);
 			iwm_nic_unlock(sc);
 		} else {
 			device_printf(sc->sc_dev, "Failed to lock the nic\n");
 			goto fail;
 		}
 	}
 
 	/* special-case 7265D, it has the same PCI IDs. */
 	if (sc->cfg == &iwm7265_cfg &&
 	    (sc->sc_hw_rev & IWM_CSR_HW_REV_TYPE_MSK) == IWM_CSR_HW_REV_TYPE_7265D) {
 		sc->cfg = &iwm7265d_cfg;
 	}
 
 	/* Allocate DMA memory for firmware transfers. */
 	if ((error = iwm_alloc_fwmem(sc)) != 0) {
 		device_printf(dev, "could not allocate memory for firmware\n");
 		goto fail;
 	}
 
 	/* Allocate "Keep Warm" page. */
 	if ((error = iwm_alloc_kw(sc)) != 0) {
 		device_printf(dev, "could not allocate keep warm page\n");
 		goto fail;
 	}
 
 	/* We use ICT interrupts */
 	if ((error = iwm_alloc_ict(sc)) != 0) {
 		device_printf(dev, "could not allocate ICT table\n");
 		goto fail;
 	}
 
 	/* Allocate TX scheduler "rings". */
 	if ((error = iwm_alloc_sched(sc)) != 0) {
 		device_printf(dev, "could not allocate TX scheduler rings\n");
 		goto fail;
 	}
 
 	/* Allocate TX rings */
 	for (txq_i = 0; txq_i < nitems(sc->txq); txq_i++) {
 		if ((error = iwm_alloc_tx_ring(sc,
 		    &sc->txq[txq_i], txq_i)) != 0) {
 			device_printf(dev,
 			    "could not allocate TX ring %d\n",
 			    txq_i);
 			goto fail;
 		}
 	}
 
 	/* Allocate RX ring. */
 	if ((error = iwm_alloc_rx_ring(sc, &sc->rxq)) != 0) {
 		device_printf(dev, "could not allocate RX ring\n");
 		goto fail;
 	}
 
 	/* Clear pending interrupts. */
 	IWM_WRITE(sc, IWM_CSR_INT, 0xffffffff);
 
 	ic->ic_softc = sc;
 	ic->ic_name = device_get_nameunit(sc->sc_dev);
 	ic->ic_phytype = IEEE80211_T_OFDM;	/* not only, but not used */
 	ic->ic_opmode = IEEE80211_M_STA;	/* default to BSS mode */
 
 	/* Set device capabilities. */
 	ic->ic_caps =
 	    IEEE80211_C_STA |
 	    IEEE80211_C_WPA |		/* WPA/RSN */
 	    IEEE80211_C_WME |
 	    IEEE80211_C_SHSLOT |	/* short slot time supported */
 	    IEEE80211_C_SHPREAMBLE	/* short preamble supported */
 //	    IEEE80211_C_BGSCAN		/* capable of bg scanning */
 	    ;
 	/* Advertise full-offload scanning */
 	ic->ic_flags_ext = IEEE80211_FEXT_SCAN_OFFLOAD;
 	for (i = 0; i < nitems(sc->sc_phyctxt); i++) {
 		sc->sc_phyctxt[i].id = i;
 		sc->sc_phyctxt[i].color = 0;
 		sc->sc_phyctxt[i].ref = 0;
 		sc->sc_phyctxt[i].channel = NULL;
 	}
 
 	/* Default noise floor */
 	sc->sc_noise = -96;
 
 	/* Max RSSI */
 	sc->sc_max_rssi = IWM_MAX_DBM - IWM_MIN_DBM;
 
 	sc->sc_preinit_hook.ich_func = iwm_preinit;
 	sc->sc_preinit_hook.ich_arg = sc;
 	if (config_intrhook_establish(&sc->sc_preinit_hook) != 0) {
 		device_printf(dev, "config_intrhook_establish failed\n");
 		goto fail;
 	}
 
 #ifdef IWM_DEBUG
 	SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
 	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "debug",
 	    CTLFLAG_RW, &sc->sc_debug, 0, "control debugging");
 #endif
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE,
 	    "<-%s\n", __func__);
 
 	return 0;
 
 	/* Free allocated memory if something failed during attachment. */
 fail:
 	iwm_detach_local(sc, 0);
 
 	return ENXIO;
 }
 
 static int
 iwm_is_valid_ether_addr(uint8_t *addr)
 {
 	char zero_addr[IEEE80211_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
 
 	if ((addr[0] & 1) || IEEE80211_ADDR_EQ(zero_addr, addr))
 		return (FALSE);
 
 	return (TRUE);
 }
 
 static int
 iwm_update_edca(struct ieee80211com *ic)
 {
 	struct iwm_softc *sc = ic->ic_softc;
 
 	device_printf(sc->sc_dev, "%s: called\n", __func__);
 	return (0);
 }
 
 static void
 iwm_preinit(void *arg)
 {
 	struct iwm_softc *sc = arg;
 	device_t dev = sc->sc_dev;
 	struct ieee80211com *ic = &sc->sc_ic;
 	int error;
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE,
 	    "->%s\n", __func__);
 
 	IWM_LOCK(sc);
 	if ((error = iwm_start_hw(sc)) != 0) {
 		device_printf(dev, "could not initialize hardware\n");
 		IWM_UNLOCK(sc);
 		goto fail;
 	}
 
 	error = iwm_run_init_mvm_ucode(sc, 1);
 	iwm_stop_device(sc);
 	if (error) {
 		IWM_UNLOCK(sc);
 		goto fail;
 	}
 	device_printf(dev,
 	    "hw rev 0x%x, fw ver %s, address %s\n",
 	    sc->sc_hw_rev & IWM_CSR_HW_REV_TYPE_MSK,
 	    sc->sc_fwver, ether_sprintf(sc->nvm_data->hw_addr));
 
 	/* not all hardware can do 5GHz band */
 	if (!sc->nvm_data->sku_cap_band_52GHz_enable)
 		memset(&ic->ic_sup_rates[IEEE80211_MODE_11A], 0,
 		    sizeof(ic->ic_sup_rates[IEEE80211_MODE_11A]));
 	IWM_UNLOCK(sc);
 
 	iwm_init_channel_map(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans,
 	    ic->ic_channels);
 
 	/*
 	 * At this point we've committed - if we fail to do setup,
 	 * we now also have to tear down the net80211 state.
 	 */
 	ieee80211_ifattach(ic);
 	ic->ic_vap_create = iwm_vap_create;
 	ic->ic_vap_delete = iwm_vap_delete;
 	ic->ic_raw_xmit = iwm_raw_xmit;
 	ic->ic_node_alloc = iwm_node_alloc;
 	ic->ic_scan_start = iwm_scan_start;
 	ic->ic_scan_end = iwm_scan_end;
 	ic->ic_update_mcast = iwm_update_mcast;
 	ic->ic_getradiocaps = iwm_init_channel_map;
 	ic->ic_set_channel = iwm_set_channel;
 	ic->ic_scan_curchan = iwm_scan_curchan;
 	ic->ic_scan_mindwell = iwm_scan_mindwell;
 	ic->ic_wme.wme_update = iwm_update_edca;
 	ic->ic_parent = iwm_parent;
 	ic->ic_transmit = iwm_transmit;
 	iwm_radiotap_attach(sc);
 	if (bootverbose)
 		ieee80211_announce(ic);
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE,
 	    "<-%s\n", __func__);
 	config_intrhook_disestablish(&sc->sc_preinit_hook);
 
 	return;
 fail:
 	config_intrhook_disestablish(&sc->sc_preinit_hook);
 	iwm_detach_local(sc, 0);
 }
 
 /*
  * Attach the interface to 802.11 radiotap.
  */
 static void
 iwm_radiotap_attach(struct iwm_softc *sc)
 {
         struct ieee80211com *ic = &sc->sc_ic;
 
 	IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE,
 	    "->%s begin\n", __func__);
         ieee80211_radiotap_attach(ic,
             &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
                 IWM_TX_RADIOTAP_PRESENT,
             &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
                 IWM_RX_RADIOTAP_PRESENT);
 	IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE,
 	    "->%s end\n", __func__);
 }
 
 static struct ieee80211vap *
 iwm_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
     enum ieee80211_opmode opmode, int flags,
     const uint8_t bssid[IEEE80211_ADDR_LEN],
     const uint8_t mac[IEEE80211_ADDR_LEN])
 {
 	struct iwm_vap *ivp;
 	struct ieee80211vap *vap;
 
 	if (!TAILQ_EMPTY(&ic->ic_vaps))         /* only one at a time */
 		return NULL;
 	ivp = malloc(sizeof(struct iwm_vap), M_80211_VAP, M_WAITOK | M_ZERO);
 	vap = &ivp->iv_vap;
 	ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
 	vap->iv_bmissthreshold = 10;            /* override default */
 	/* Override with driver methods. */
 	ivp->iv_newstate = vap->iv_newstate;
 	vap->iv_newstate = iwm_newstate;
 
 	ieee80211_ratectl_init(vap);
 	/* Complete setup. */
 	ieee80211_vap_attach(vap, iwm_media_change, ieee80211_media_status,
 	    mac);
 	ic->ic_opmode = opmode;
 
 	return vap;
 }
 
 static void
 iwm_vap_delete(struct ieee80211vap *vap)
 {
 	struct iwm_vap *ivp = IWM_VAP(vap);
 
 	ieee80211_ratectl_deinit(vap);
 	ieee80211_vap_detach(vap);
 	free(ivp, M_80211_VAP);
 }
 
 static void
 iwm_scan_start(struct ieee80211com *ic)
 {
 	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
 	struct iwm_softc *sc = ic->ic_softc;
 	int error;
 
 	IWM_LOCK(sc);
 	if (sc->sc_flags & IWM_FLAG_SCAN_RUNNING) {
 		/* This should not be possible */
 		device_printf(sc->sc_dev,
 		    "%s: Previous scan not completed yet\n", __func__);
 	}
 	if (isset(sc->sc_enabled_capa, IWM_UCODE_TLV_CAPA_UMAC_SCAN))
 		error = iwm_mvm_umac_scan(sc);
 	else
 		error = iwm_mvm_lmac_scan(sc);
 	if (error != 0) {
 		device_printf(sc->sc_dev, "could not initiate scan\n");
 		IWM_UNLOCK(sc);
 		ieee80211_cancel_scan(vap);
 	} else {
 		sc->sc_flags |= IWM_FLAG_SCAN_RUNNING;
 		iwm_led_blink_start(sc);
 		IWM_UNLOCK(sc);
 	}
 }
 
 static void
 iwm_scan_end(struct ieee80211com *ic)
 {
 	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
 	struct iwm_softc *sc = ic->ic_softc;
 
 	IWM_LOCK(sc);
 	iwm_led_blink_stop(sc);
 	if (vap->iv_state == IEEE80211_S_RUN)
 		iwm_mvm_led_enable(sc);
 	if (sc->sc_flags & IWM_FLAG_SCAN_RUNNING) {
 		/*
 		 * Removing IWM_FLAG_SCAN_RUNNING now, is fine because
 		 * both iwm_scan_end and iwm_scan_start run in the ic->ic_tq
 		 * taskqueue.
 		 */
 		sc->sc_flags &= ~IWM_FLAG_SCAN_RUNNING;
 		iwm_mvm_scan_stop_wait(sc);
 	}
 	IWM_UNLOCK(sc);
 
 	/*
 	 * Make sure we don't race, if sc_es_task is still enqueued here.
 	 * This is to make sure that it won't call ieee80211_scan_done
 	 * when we have already started the next scan.
 	 */
 	taskqueue_cancel(ic->ic_tq, &sc->sc_es_task, NULL);
 }
 
 static void
 iwm_update_mcast(struct ieee80211com *ic)
 {
 }
 
 static void
 iwm_set_channel(struct ieee80211com *ic)
 {
 }
 
 static void
 iwm_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
 {
 }
 
 static void
 iwm_scan_mindwell(struct ieee80211_scan_state *ss)
 {
 	return;
 }
 
 void
 iwm_init_task(void *arg1)
 {
 	struct iwm_softc *sc = arg1;
 
 	IWM_LOCK(sc);
 	while (sc->sc_flags & IWM_FLAG_BUSY)
 		msleep(&sc->sc_flags, &sc->sc_mtx, 0, "iwmpwr", 0);
 	sc->sc_flags |= IWM_FLAG_BUSY;
 	iwm_stop(sc);
 	if (sc->sc_ic.ic_nrunning > 0)
 		iwm_init(sc);
 	sc->sc_flags &= ~IWM_FLAG_BUSY;
 	wakeup(&sc->sc_flags);
 	IWM_UNLOCK(sc);
 }
 
 static int
 iwm_resume(device_t dev)
 {
 	struct iwm_softc *sc = device_get_softc(dev);
 	int do_reinit = 0;
 
 	/*
 	 * We disable the RETRY_TIMEOUT register (0x41) to keep
 	 * PCI Tx retries from interfering with C3 CPU state.
 	 */
 	pci_write_config(dev, PCI_CFG_RETRY_TIMEOUT, 0x00, 1);
 	iwm_init_task(device_get_softc(dev));
 
 	IWM_LOCK(sc);
 	if (sc->sc_flags & IWM_FLAG_SCANNING) {
 		sc->sc_flags &= ~IWM_FLAG_SCANNING;
 		do_reinit = 1;
 	}
 	IWM_UNLOCK(sc);
 
 	if (do_reinit)
 		ieee80211_resume_all(&sc->sc_ic);
 
 	return 0;
 }
 
 static int
 iwm_suspend(device_t dev)
 {
 	int do_stop = 0;
 	struct iwm_softc *sc = device_get_softc(dev);
 
 	do_stop = !! (sc->sc_ic.ic_nrunning > 0);
 
 	ieee80211_suspend_all(&sc->sc_ic);
 
 	if (do_stop) {
 		IWM_LOCK(sc);
 		iwm_stop(sc);
 		sc->sc_flags |= IWM_FLAG_SCANNING;
 		IWM_UNLOCK(sc);
 	}
 
 	return (0);
 }
 
 static int
 iwm_detach_local(struct iwm_softc *sc, int do_net80211)
 {
 	struct iwm_fw_info *fw = &sc->sc_fw;
 	device_t dev = sc->sc_dev;
 	int i;
 
 	if (!sc->sc_attached)
 		return 0;
 	sc->sc_attached = 0;
 
 	if (do_net80211)
 		ieee80211_draintask(&sc->sc_ic, &sc->sc_es_task);
 
 	callout_drain(&sc->sc_led_blink_to);
 	callout_drain(&sc->sc_watchdog_to);
 	iwm_stop_device(sc);
 	if (do_net80211) {
 		ieee80211_ifdetach(&sc->sc_ic);
 	}
 
 	iwm_phy_db_free(sc->sc_phy_db);
 	sc->sc_phy_db = NULL;
 
 	iwm_free_nvm_data(sc->nvm_data);
 
 	/* Free descriptor rings */
 	iwm_free_rx_ring(sc, &sc->rxq);
 	for (i = 0; i < nitems(sc->txq); i++)
 		iwm_free_tx_ring(sc, &sc->txq[i]);
 
 	/* Free firmware */
 	if (fw->fw_fp != NULL)
 		iwm_fw_info_free(fw);
 
 	/* Free scheduler */
 	iwm_dma_contig_free(&sc->sched_dma);
 	iwm_dma_contig_free(&sc->ict_dma);
 	iwm_dma_contig_free(&sc->kw_dma);
 	iwm_dma_contig_free(&sc->fw_dma);
+
+	iwm_free_fw_paging(sc);
 
 	/* Finished with the hardware - detach things */
 	iwm_pci_detach(dev);
 
 	if (sc->sc_notif_wait != NULL) {
 		iwm_notification_wait_free(sc->sc_notif_wait);
 		sc->sc_notif_wait = NULL;
 	}
 
 	mbufq_drain(&sc->sc_snd);
 	IWM_LOCK_DESTROY(sc);
 
 	return (0);
 }
 
 static int
 iwm_detach(device_t dev)
 {
 	struct iwm_softc *sc = device_get_softc(dev);
 
 	return (iwm_detach_local(sc, 1));
 }
 
 static device_method_t iwm_pci_methods[] = {
         /* Device interface */
         DEVMETHOD(device_probe,         iwm_probe),
         DEVMETHOD(device_attach,        iwm_attach),
         DEVMETHOD(device_detach,        iwm_detach),
         DEVMETHOD(device_suspend,       iwm_suspend),
         DEVMETHOD(device_resume,        iwm_resume),
 
         DEVMETHOD_END
 };
 
 static driver_t iwm_pci_driver = {
         "iwm",
         iwm_pci_methods,
         sizeof (struct iwm_softc)
 };
 
 static devclass_t iwm_devclass;
 
 DRIVER_MODULE(iwm, pci, iwm_pci_driver, iwm_devclass, NULL, NULL);
 MODULE_DEPEND(iwm, firmware, 1, 1, 1);
 MODULE_DEPEND(iwm, pci, 1, 1, 1);
 MODULE_DEPEND(iwm, wlan, 1, 1, 1);
Index: head/sys/dev/iwm/if_iwm_debug.h
===================================================================
--- head/sys/dev/iwm/if_iwm_debug.h	(revision 314191)
+++ head/sys/dev/iwm/if_iwm_debug.h	(revision 314192)
@@ -1,59 +1,60 @@
 /*-
  * Copyright (c) 2015 Adrian Chadd <adrian@FreeBSD.org>
  *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
  *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  *
  * $FreeBSD$
  */
 
 #ifndef	__IF_IWM_DEBUG_H__
 #define	__IF_IWM_DEBUG_H__
 
 #ifdef	IWM_DEBUG
 enum {
 	IWM_DEBUG_XMIT		= 0x00000001,	/* basic xmit operation */
 	IWM_DEBUG_RECV		= 0x00000002,	/* basic recv operation */
 	IWM_DEBUG_STATE		= 0x00000004,	/* 802.11 state transitions */
 	IWM_DEBUG_TXPOW		= 0x00000008,	/* tx power processing */
 	IWM_DEBUG_RESET		= 0x00000010,	/* reset processing */
 	IWM_DEBUG_OPS		= 0x00000020,	/* iwm_ops processing */
 	IWM_DEBUG_BEACON 	= 0x00000040,	/* beacon handling */
 	IWM_DEBUG_WATCHDOG 	= 0x00000080,	/* watchdog timeout */
 	IWM_DEBUG_INTR		= 0x00000100,	/* ISR */
 	IWM_DEBUG_CALIBRATE	= 0x00000200,	/* periodic calibration */
 	IWM_DEBUG_NODE		= 0x00000400,	/* node management */
 	IWM_DEBUG_LED		= 0x00000800,	/* led management */
 	IWM_DEBUG_CMD		= 0x00001000,	/* cmd submission */
 	IWM_DEBUG_TXRATE	= 0x00002000,	/* TX rate debugging */
 	IWM_DEBUG_PWRSAVE	= 0x00004000,	/* Power save operations */
 	IWM_DEBUG_SCAN		= 0x00008000,	/* Scan related operations */
 	IWM_DEBUG_STATS		= 0x00010000,	/* Statistics updates */
 	IWM_DEBUG_FIRMWARE_TLV	= 0x00020000,	/* Firmware TLV parsing */
 	IWM_DEBUG_TRANS		= 0x00040000,	/* Transport layer (eg PCIe) */
 	IWM_DEBUG_EEPROM	= 0x00080000,	/* EEPROM/channel information */
 	IWM_DEBUG_TEMP		= 0x00100000,	/* Thermal Sensor handling */
+	IWM_DEBUG_FW		= 0x00200000,	/* Firmware management */
 	IWM_DEBUG_REGISTER	= 0x20000000,	/* print chipset register */
 	IWM_DEBUG_TRACE		= 0x40000000,	/* Print begin and start driver function */
 	IWM_DEBUG_FATAL		= 0x80000000,	/* fatal errors */
 	IWM_DEBUG_ANY		= 0xffffffff
 };
 
 #define IWM_DPRINTF(sc, m, fmt, ...) do {			\
 	if (sc->sc_debug & (m))				\
 		device_printf(sc->sc_dev, fmt, ##__VA_ARGS__);	\
 } while (0)
 #else
 #define IWM_DPRINTF(sc, m, fmt, ...) do { (void) sc; } while (0)
 #endif
 
 #endif	/* __IF_IWM_DEBUG_H__ */
Index: head/sys/dev/iwm/if_iwmreg.h
===================================================================
--- head/sys/dev/iwm/if_iwmreg.h	(revision 314191)
+++ head/sys/dev/iwm/if_iwmreg.h	(revision 314192)
@@ -1,6181 +1,6193 @@
 /*	$OpenBSD: if_iwmreg.h,v 1.4 2015/06/15 08:06:11 stsp Exp $	*/
 /*	$FreeBSD$ */
 
 /******************************************************************************
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
  * redistributing this file, you may do so under either license.
  *
  * GPL LICENSE SUMMARY
  *
  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of version 2 of the GNU General Public License as
  * published by the Free Software Foundation.
  *
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  * General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  * USA
  *
  * The full GNU General Public License is included in this distribution
  * in the file called COPYING.
  *
  * Contact Information:
  *  Intel Linux Wireless <ilw@linux.intel.com>
  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  *
  * BSD LICENSE
  *
  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  *
  *  * Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  *  * Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in
  *    the documentation and/or other materials provided with the
  *    distribution.
  *  * Neither the name Intel Corporation nor the names of its
  *    contributors may be used to endorse or promote products derived
  *    from this software without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  *****************************************************************************/
 #ifndef	__IF_IWM_REG_H__
 #define	__IF_IWM_REG_H__
 
 #define	le16_to_cpup(_a_)	(le16toh(*(const uint16_t *)(_a_)))
 #define	le32_to_cpup(_a_)	(le32toh(*(const uint32_t *)(_a_)))
 
 /*
  * BEGIN iwl-csr.h
  */
 
 /*
  * CSR (control and status registers)
  *
  * CSR registers are mapped directly into PCI bus space, and are accessible
  * whenever platform supplies power to device, even when device is in
  * low power states due to driver-invoked device resets
  * (e.g. IWM_CSR_RESET_REG_FLAG_SW_RESET) or uCode-driven power-saving modes.
  *
  * Use iwl_write32() and iwl_read32() family to access these registers;
  * these provide simple PCI bus access, without waking up the MAC.
  * Do not use iwl_write_direct32() family for these registers;
  * no need to "grab nic access" via IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ.
  * The MAC (uCode processor, etc.) does not need to be powered up for accessing
  * the CSR registers.
  *
  * NOTE:  Device does need to be awake in order to read this memory
  *        via IWM_CSR_EEPROM and IWM_CSR_OTP registers
  */
 #define IWM_CSR_HW_IF_CONFIG_REG    (0x000) /* hardware interface config */
 #define IWM_CSR_INT_COALESCING      (0x004) /* accum ints, 32-usec units */
 #define IWM_CSR_INT                 (0x008) /* host interrupt status/ack */
 #define IWM_CSR_INT_MASK            (0x00c) /* host interrupt enable */
 #define IWM_CSR_FH_INT_STATUS       (0x010) /* busmaster int status/ack*/
 #define IWM_CSR_GPIO_IN             (0x018) /* read external chip pins */
 #define IWM_CSR_RESET               (0x020) /* busmaster enable, NMI, etc*/
 #define IWM_CSR_GP_CNTRL            (0x024)
 
 /* 2nd byte of IWM_CSR_INT_COALESCING, not accessible via iwl_write32()! */
 #define IWM_CSR_INT_PERIODIC_REG	(0x005)
 
 /*
  * Hardware revision info
  * Bit fields:
  * 31-16:  Reserved
  *  15-4:  Type of device:  see IWM_CSR_HW_REV_TYPE_xxx definitions
  *  3-2:  Revision step:  0 = A, 1 = B, 2 = C, 3 = D
  *  1-0:  "Dash" (-) value, as in A-1, etc.
  */
 #define IWM_CSR_HW_REV              (0x028)
 
 /*
  * EEPROM and OTP (one-time-programmable) memory reads
  *
  * NOTE:  Device must be awake, initialized via apm_ops.init(),
  *        in order to read.
  */
 #define IWM_CSR_EEPROM_REG          (0x02c)
 #define IWM_CSR_EEPROM_GP           (0x030)
 #define IWM_CSR_OTP_GP_REG          (0x034)
 
 #define IWM_CSR_GIO_REG		(0x03C)
 #define IWM_CSR_GP_UCODE_REG	(0x048)
 #define IWM_CSR_GP_DRIVER_REG	(0x050)
 
 /*
  * UCODE-DRIVER GP (general purpose) mailbox registers.
  * SET/CLR registers set/clear bit(s) if "1" is written.
  */
 #define IWM_CSR_UCODE_DRV_GP1       (0x054)
 #define IWM_CSR_UCODE_DRV_GP1_SET   (0x058)
 #define IWM_CSR_UCODE_DRV_GP1_CLR   (0x05c)
 #define IWM_CSR_UCODE_DRV_GP2       (0x060)
 
 #define IWM_CSR_MBOX_SET_REG		(0x088)
 #define IWM_CSR_MBOX_SET_REG_OS_ALIVE	0x20
 
 #define IWM_CSR_LED_REG			(0x094)
 #define IWM_CSR_DRAM_INT_TBL_REG	(0x0A0)
 #define IWM_CSR_MAC_SHADOW_REG_CTRL	(0x0A8) /* 6000 and up */
 
 
 /* GIO Chicken Bits (PCI Express bus link power management) */
 #define IWM_CSR_GIO_CHICKEN_BITS    (0x100)
 
 /* Analog phase-lock-loop configuration  */
 #define IWM_CSR_ANA_PLL_CFG         (0x20c)
 
 /*
  * CSR Hardware Revision Workaround Register.  Indicates hardware rev;
  * "step" determines CCK backoff for txpower calculation.  Used for 4965 only.
  * See also IWM_CSR_HW_REV register.
  * Bit fields:
  *  3-2:  0 = A, 1 = B, 2 = C, 3 = D step
  *  1-0:  "Dash" (-) value, as in C-1, etc.
  */
 #define IWM_CSR_HW_REV_WA_REG		(0x22C)
 
 #define IWM_CSR_DBG_HPET_MEM_REG	(0x240)
 #define IWM_CSR_DBG_LINK_PWR_MGMT_REG	(0x250)
 
 /* Bits for IWM_CSR_HW_IF_CONFIG_REG */
 #define IWM_CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH	(0x00000003)
 #define IWM_CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP	(0x0000000C)
 #define IWM_CSR_HW_IF_CONFIG_REG_MSK_BOARD_VER	(0x000000C0)
 #define IWM_CSR_HW_IF_CONFIG_REG_BIT_MAC_SI	(0x00000100)
 #define IWM_CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI	(0x00000200)
 #define IWM_CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE	(0x00000C00)
 #define IWM_CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH	(0x00003000)
 #define IWM_CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP	(0x0000C000)
 
 #define IWM_CSR_HW_IF_CONFIG_REG_POS_MAC_DASH	(0)
 #define IWM_CSR_HW_IF_CONFIG_REG_POS_MAC_STEP	(2)
 #define IWM_CSR_HW_IF_CONFIG_REG_POS_BOARD_VER	(6)
 #define IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE	(10)
 #define IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_DASH	(12)
 #define IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_STEP	(14)
 
 #define IWM_CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A	(0x00080000)
 #define IWM_CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM	(0x00200000)
 #define IWM_CSR_HW_IF_CONFIG_REG_BIT_NIC_READY	(0x00400000) /* PCI_OWN_SEM */
 #define IWM_CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE (0x02000000) /* ME_OWN */
 #define IWM_CSR_HW_IF_CONFIG_REG_PREPARE	(0x08000000) /* WAKE_ME */
 #define IWM_CSR_HW_IF_CONFIG_REG_ENABLE_PME	(0x10000000)
 #define IWM_CSR_HW_IF_CONFIG_REG_PERSIST_MODE	(0x40000000) /* PERSISTENCE */
 
 #define IWM_CSR_INT_PERIODIC_DIS		(0x00) /* disable periodic int*/
 #define IWM_CSR_INT_PERIODIC_ENA		(0xFF) /* 255*32 usec ~ 8 msec*/
 
 /* interrupt flags in INTA, set by uCode or hardware (e.g. dma),
  * acknowledged (reset) by host writing "1" to flagged bits. */
 #define IWM_CSR_INT_BIT_FH_RX	(1 << 31) /* Rx DMA, cmd responses, FH_INT[17:16] */
 #define IWM_CSR_INT_BIT_HW_ERR	(1 << 29) /* DMA hardware error FH_INT[31] */
 #define IWM_CSR_INT_BIT_RX_PERIODIC	(1 << 28) /* Rx periodic */
 #define IWM_CSR_INT_BIT_FH_TX	(1 << 27) /* Tx DMA FH_INT[1:0] */
 #define IWM_CSR_INT_BIT_SCD	(1 << 26) /* TXQ pointer advanced */
 #define IWM_CSR_INT_BIT_SW_ERR	(1 << 25) /* uCode error */
 #define IWM_CSR_INT_BIT_RF_KILL	(1 << 7)  /* HW RFKILL switch GP_CNTRL[27] toggled */
 #define IWM_CSR_INT_BIT_CT_KILL	(1 << 6)  /* Critical temp (chip too hot) rfkill */
 #define IWM_CSR_INT_BIT_SW_RX	(1 << 3)  /* Rx, command responses */
 #define IWM_CSR_INT_BIT_WAKEUP	(1 << 1)  /* NIC controller waking up (pwr mgmt) */
 #define IWM_CSR_INT_BIT_ALIVE	(1 << 0)  /* uCode interrupts once it initializes */
 
 #define IWM_CSR_INI_SET_MASK	(IWM_CSR_INT_BIT_FH_RX   | \
 				 IWM_CSR_INT_BIT_HW_ERR  | \
 				 IWM_CSR_INT_BIT_FH_TX   | \
 				 IWM_CSR_INT_BIT_SW_ERR  | \
 				 IWM_CSR_INT_BIT_RF_KILL | \
 				 IWM_CSR_INT_BIT_SW_RX   | \
 				 IWM_CSR_INT_BIT_WAKEUP  | \
 				 IWM_CSR_INT_BIT_ALIVE   | \
 				 IWM_CSR_INT_BIT_RX_PERIODIC)
 
 /* interrupt flags in FH (flow handler) (PCI busmaster DMA) */
 #define IWM_CSR_FH_INT_BIT_ERR       (1 << 31) /* Error */
 #define IWM_CSR_FH_INT_BIT_HI_PRIOR  (1 << 30) /* High priority Rx, bypass coalescing */
 #define IWM_CSR_FH_INT_BIT_RX_CHNL1  (1 << 17) /* Rx channel 1 */
 #define IWM_CSR_FH_INT_BIT_RX_CHNL0  (1 << 16) /* Rx channel 0 */
 #define IWM_CSR_FH_INT_BIT_TX_CHNL1  (1 << 1)  /* Tx channel 1 */
 #define IWM_CSR_FH_INT_BIT_TX_CHNL0  (1 << 0)  /* Tx channel 0 */
 
 #define IWM_CSR_FH_INT_RX_MASK	(IWM_CSR_FH_INT_BIT_HI_PRIOR | \
 				IWM_CSR_FH_INT_BIT_RX_CHNL1 | \
 				IWM_CSR_FH_INT_BIT_RX_CHNL0)
 
 #define IWM_CSR_FH_INT_TX_MASK	(IWM_CSR_FH_INT_BIT_TX_CHNL1 | \
 				IWM_CSR_FH_INT_BIT_TX_CHNL0)
 
 /* GPIO */
 #define IWM_CSR_GPIO_IN_BIT_AUX_POWER                   (0x00000200)
 #define IWM_CSR_GPIO_IN_VAL_VAUX_PWR_SRC                (0x00000000)
 #define IWM_CSR_GPIO_IN_VAL_VMAIN_PWR_SRC               (0x00000200)
 
 /* RESET */
 #define IWM_CSR_RESET_REG_FLAG_NEVO_RESET                (0x00000001)
 #define IWM_CSR_RESET_REG_FLAG_FORCE_NMI                 (0x00000002)
 #define IWM_CSR_RESET_REG_FLAG_SW_RESET                  (0x00000080)
 #define IWM_CSR_RESET_REG_FLAG_MASTER_DISABLED           (0x00000100)
 #define IWM_CSR_RESET_REG_FLAG_STOP_MASTER               (0x00000200)
 #define IWM_CSR_RESET_LINK_PWR_MGMT_DISABLED             (0x80000000)
 
 /*
  * GP (general purpose) CONTROL REGISTER
  * Bit fields:
  *    27:  HW_RF_KILL_SW
  *         Indicates state of (platform's) hardware RF-Kill switch
  * 26-24:  POWER_SAVE_TYPE
  *         Indicates current power-saving mode:
  *         000 -- No power saving
  *         001 -- MAC power-down
  *         010 -- PHY (radio) power-down
  *         011 -- Error
  *   9-6:  SYS_CONFIG
  *         Indicates current system configuration, reflecting pins on chip
  *         as forced high/low by device circuit board.
  *     4:  GOING_TO_SLEEP
  *         Indicates MAC is entering a power-saving sleep power-down.
  *         Not a good time to access device-internal resources.
  *     3:  MAC_ACCESS_REQ
  *         Host sets this to request and maintain MAC wakeup, to allow host
  *         access to device-internal resources.  Host must wait for
  *         MAC_CLOCK_READY (and !GOING_TO_SLEEP) before accessing non-CSR
  *         device registers.
  *     2:  INIT_DONE
  *         Host sets this to put device into fully operational D0 power mode.
  *         Host resets this after SW_RESET to put device into low power mode.
  *     0:  MAC_CLOCK_READY
  *         Indicates MAC (ucode processor, etc.) is powered up and can run.
  *         Internal resources are accessible.
  *         NOTE:  This does not indicate that the processor is actually running.
  *         NOTE:  This does not indicate that device has completed
  *                init or post-power-down restore of internal SRAM memory.
  *                Use IWM_CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that
  *                SRAM is restored and uCode is in normal operation mode.
  *                Later devices (5xxx/6xxx/1xxx) use non-volatile SRAM, and
  *                do not need to save/restore it.
  *         NOTE:  After device reset, this bit remains "0" until host sets
  *                INIT_DONE
  */
 #define IWM_CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY        (0x00000001)
 #define IWM_CSR_GP_CNTRL_REG_FLAG_INIT_DONE              (0x00000004)
 #define IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ         (0x00000008)
 #define IWM_CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP         (0x00000010)
 
 #define IWM_CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN           (0x00000001)
 
 #define IWM_CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE         (0x07000000)
 #define IWM_CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE         (0x04000000)
 #define IWM_CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW          (0x08000000)
 
 
 /* HW REV */
 #define IWM_CSR_HW_REV_DASH(_val)          (((_val) & 0x0000003) >> 0)
 #define IWM_CSR_HW_REV_STEP(_val)          (((_val) & 0x000000C) >> 2)
 
 /**
  *  hw_rev values
  */
 enum {
 	IWM_SILICON_A_STEP = 0,
 	IWM_SILICON_B_STEP,
 	IWM_SILICON_C_STEP,
 };
 
 
 #define IWM_CSR_HW_REV_TYPE_MSK		(0x000FFF0)
 #define IWM_CSR_HW_REV_TYPE_5300	(0x0000020)
 #define IWM_CSR_HW_REV_TYPE_5350	(0x0000030)
 #define IWM_CSR_HW_REV_TYPE_5100	(0x0000050)
 #define IWM_CSR_HW_REV_TYPE_5150	(0x0000040)
 #define IWM_CSR_HW_REV_TYPE_1000	(0x0000060)
 #define IWM_CSR_HW_REV_TYPE_6x00	(0x0000070)
 #define IWM_CSR_HW_REV_TYPE_6x50	(0x0000080)
 #define IWM_CSR_HW_REV_TYPE_6150	(0x0000084)
 #define IWM_CSR_HW_REV_TYPE_6x05	(0x00000B0)
 #define IWM_CSR_HW_REV_TYPE_6x30	IWM_CSR_HW_REV_TYPE_6x05
 #define IWM_CSR_HW_REV_TYPE_6x35	IWM_CSR_HW_REV_TYPE_6x05
 #define IWM_CSR_HW_REV_TYPE_2x30	(0x00000C0)
 #define IWM_CSR_HW_REV_TYPE_2x00	(0x0000100)
 #define IWM_CSR_HW_REV_TYPE_105		(0x0000110)
 #define IWM_CSR_HW_REV_TYPE_135		(0x0000120)
 #define IWM_CSR_HW_REV_TYPE_7265D	(0x0000210)
 #define IWM_CSR_HW_REV_TYPE_NONE	(0x00001F0)
 
 /* EEPROM REG */
 #define IWM_CSR_EEPROM_REG_READ_VALID_MSK	(0x00000001)
 #define IWM_CSR_EEPROM_REG_BIT_CMD		(0x00000002)
 #define IWM_CSR_EEPROM_REG_MSK_ADDR		(0x0000FFFC)
 #define IWM_CSR_EEPROM_REG_MSK_DATA		(0xFFFF0000)
 
 /* EEPROM GP */
 #define IWM_CSR_EEPROM_GP_VALID_MSK		(0x00000007) /* signature */
 #define IWM_CSR_EEPROM_GP_IF_OWNER_MSK	(0x00000180)
 #define IWM_CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP	(0x00000000)
 #define IWM_CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP		(0x00000001)
 #define IWM_CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K		(0x00000002)
 #define IWM_CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K		(0x00000004)
 
 /* One-time-programmable memory general purpose reg */
 #define IWM_CSR_OTP_GP_REG_DEVICE_SELECT  (0x00010000) /* 0 - EEPROM, 1 - OTP */
 #define IWM_CSR_OTP_GP_REG_OTP_ACCESS_MODE  (0x00020000) /* 0 - absolute, 1 - relative */
 #define IWM_CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK    (0x00100000) /* bit 20 */
 #define IWM_CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK  (0x00200000) /* bit 21 */
 
 /* GP REG */
 #define IWM_CSR_GP_REG_POWER_SAVE_STATUS_MSK    (0x03000000) /* bit 24/25 */
 #define IWM_CSR_GP_REG_NO_POWER_SAVE            (0x00000000)
 #define IWM_CSR_GP_REG_MAC_POWER_SAVE           (0x01000000)
 #define IWM_CSR_GP_REG_PHY_POWER_SAVE           (0x02000000)
 #define IWM_CSR_GP_REG_POWER_SAVE_ERROR         (0x03000000)
 
 
 /* CSR GIO */
 #define IWM_CSR_GIO_REG_VAL_L0S_ENABLED	(0x00000002)
 
 /*
  * UCODE-DRIVER GP (general purpose) mailbox register 1
  * Host driver and uCode write and/or read this register to communicate with
  * each other.
  * Bit fields:
  *     4:  UCODE_DISABLE
  *         Host sets this to request permanent halt of uCode, same as
  *         sending CARD_STATE command with "halt" bit set.
  *     3:  CT_KILL_EXIT
  *         Host sets this to request exit from CT_KILL state, i.e. host thinks
  *         device temperature is low enough to continue normal operation.
  *     2:  CMD_BLOCKED
  *         Host sets this during RF KILL power-down sequence (HW, SW, CT KILL)
  *         to release uCode to clear all Tx and command queues, enter
  *         unassociated mode, and power down.
  *         NOTE:  Some devices also use HBUS_TARG_MBX_C register for this bit.
  *     1:  SW_BIT_RFKILL
  *         Host sets this when issuing CARD_STATE command to request
  *         device sleep.
  *     0:  MAC_SLEEP
  *         uCode sets this when preparing a power-saving power-down.
  *         uCode resets this when power-up is complete and SRAM is sane.
  *         NOTE:  device saves internal SRAM data to host when powering down,
  *                and must restore this data after powering back up.
  *                MAC_SLEEP is the best indication that restore is complete.
  *                Later devices (5xxx/6xxx/1xxx) use non-volatile SRAM, and
  *                do not need to save/restore it.
  */
 #define IWM_CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP             (0x00000001)
 #define IWM_CSR_UCODE_SW_BIT_RFKILL                     (0x00000002)
 #define IWM_CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED           (0x00000004)
 #define IWM_CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT      (0x00000008)
 #define IWM_CSR_UCODE_DRV_GP1_BIT_D3_CFG_COMPLETE       (0x00000020)
 
 /* GP Driver */
 #define IWM_CSR_GP_DRIVER_REG_BIT_RADIO_SKU_MSK		    (0x00000003)
 #define IWM_CSR_GP_DRIVER_REG_BIT_RADIO_SKU_3x3_HYB	    (0x00000000)
 #define IWM_CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_HYB	    (0x00000001)
 #define IWM_CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA	    (0x00000002)
 #define IWM_CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6	    (0x00000004)
 #define IWM_CSR_GP_DRIVER_REG_BIT_6050_1x2		    (0x00000008)
 
 #define IWM_CSR_GP_DRIVER_REG_BIT_RADIO_IQ_INVER	    (0x00000080)
 
 /* GIO Chicken Bits (PCI Express bus link power management) */
 #define IWM_CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX  (0x00800000)
 #define IWM_CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER  (0x20000000)
 
 /* LED */
 #define IWM_CSR_LED_BSM_CTRL_MSK (0xFFFFFFDF)
 #define IWM_CSR_LED_REG_TURN_ON (0x60)
 #define IWM_CSR_LED_REG_TURN_OFF (0x20)
 
 /* ANA_PLL */
 #define IWM_CSR50_ANA_PLL_CFG_VAL        (0x00880300)
 
 /* HPET MEM debug */
 #define IWM_CSR_DBG_HPET_MEM_REG_VAL	(0xFFFF0000)
 
 /* DRAM INT TABLE */
 #define IWM_CSR_DRAM_INT_TBL_ENABLE		(1 << 31)
 #define IWM_CSR_DRAM_INIT_TBL_WRITE_POINTER	(1 << 28)
 #define IWM_CSR_DRAM_INIT_TBL_WRAP_CHECK	(1 << 27)
 
 /* SECURE boot registers */
 #define IWM_CSR_SECURE_BOOT_CONFIG_ADDR	(0x100)
 enum iwm_secure_boot_config_reg {
 	IWM_CSR_SECURE_BOOT_CONFIG_INSPECTOR_BURNED_IN_OTP	= 0x00000001,
 	IWM_CSR_SECURE_BOOT_CONFIG_INSPECTOR_NOT_REQ	= 0x00000002,
 };
 
 #define IWM_CSR_SECURE_BOOT_CPU1_STATUS_ADDR	(0x100)
 #define IWM_CSR_SECURE_BOOT_CPU2_STATUS_ADDR	(0x100)
 enum iwm_secure_boot_status_reg {
 	IWM_CSR_SECURE_BOOT_CPU_STATUS_VERF_STATUS		= 0x00000003,
 	IWM_CSR_SECURE_BOOT_CPU_STATUS_VERF_COMPLETED	= 0x00000002,
 	IWM_CSR_SECURE_BOOT_CPU_STATUS_VERF_SUCCESS		= 0x00000004,
 	IWM_CSR_SECURE_BOOT_CPU_STATUS_VERF_FAIL		= 0x00000008,
 	IWM_CSR_SECURE_BOOT_CPU_STATUS_SIGN_VERF_FAIL	= 0x00000010,
 };
 
 #define IWM_FH_UCODE_LOAD_STATUS	0x1af0
 #define IWM_CSR_UCODE_LOAD_STATUS_ADDR	0x1e70
 enum iwm_secure_load_status_reg {
 	IWM_LMPM_CPU_UCODE_LOADING_STARTED		= 0x00000001,
 	IWM_LMPM_CPU_HDRS_LOADING_COMPLETED		= 0x00000003,
 	IWM_LMPM_CPU_UCODE_LOADING_COMPLETED		= 0x00000007,
 	IWM_LMPM_CPU_STATUS_NUM_OF_LAST_COMPLETED	= 0x000000F8,
 	IWM_LMPM_CPU_STATUS_NUM_OF_LAST_LOADED_BLOCK	= 0x0000FF00,
 };
 #define IWM_FH_MEM_TB_MAX_LENGTH	0x20000
 
 #define IWM_LMPM_SECURE_INSPECTOR_CODE_ADDR		0x1e38
 #define IWM_LMPM_SECURE_INSPECTOR_DATA_ADDR		0x1e3c
 #define IWM_LMPM_SECURE_UCODE_LOAD_CPU1_HDR_ADDR	0x1e78
 #define IWM_LMPM_SECURE_UCODE_LOAD_CPU2_HDR_ADDR	0x1e7c
 
 #define IWM_LMPM_SECURE_INSPECTOR_CODE_MEM_SPACE	0x400000
 #define IWM_LMPM_SECURE_INSPECTOR_DATA_MEM_SPACE	0x402000
 #define IWM_LMPM_SECURE_CPU1_HDR_MEM_SPACE		0x420000
 #define IWM_LMPM_SECURE_CPU2_HDR_MEM_SPACE		0x420400
 
 #define IWM_CSR_SECURE_TIME_OUT	(100)
 
 /* extended range in FW SRAM */
 #define IWM_FW_MEM_EXTENDED_START       0x40000
 #define IWM_FW_MEM_EXTENDED_END         0x57FFF
 
 /* FW chicken bits */
 #define IWM_LMPM_CHICK				0xa01ff8
 #define IWM_LMPM_CHICK_EXTENDED_ADDR_SPACE	0x01
 
 #define IWM_FH_TCSR_0_REG0 (0x1D00)
 
 /*
  * HBUS (Host-side Bus)
  *
  * HBUS registers are mapped directly into PCI bus space, but are used
  * to indirectly access device's internal memory or registers that
  * may be powered-down.
  *
  * Use iwl_write_direct32()/iwl_read_direct32() family for these registers;
  * host must "grab nic access" via CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ
  * to make sure the MAC (uCode processor, etc.) is powered up for accessing
  * internal resources.
  *
  * Do not use iwl_write32()/iwl_read32() family to access these registers;
  * these provide only simple PCI bus access, without waking up the MAC.
  */
 #define IWM_HBUS_BASE	(0x400)
 
 /*
  * Registers for accessing device's internal SRAM memory (e.g. SCD SRAM
  * structures, error log, event log, verifying uCode load).
  * First write to address register, then read from or write to data register
  * to complete the job.  Once the address register is set up, accesses to
  * data registers auto-increment the address by one dword.
  * Bit usage for address registers (read or write):
  *  0-31:  memory address within device
  */
 #define IWM_HBUS_TARG_MEM_RADDR     (IWM_HBUS_BASE+0x00c)
 #define IWM_HBUS_TARG_MEM_WADDR     (IWM_HBUS_BASE+0x010)
 #define IWM_HBUS_TARG_MEM_WDAT      (IWM_HBUS_BASE+0x018)
 #define IWM_HBUS_TARG_MEM_RDAT      (IWM_HBUS_BASE+0x01c)
 
 /* Mailbox C, used as workaround alternative to CSR_UCODE_DRV_GP1 mailbox */
 #define IWM_HBUS_TARG_MBX_C         (IWM_HBUS_BASE+0x030)
 #define IWM_HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED         (0x00000004)
 
 /*
  * Registers for accessing device's internal peripheral registers
  * (e.g. SCD, BSM, etc.).  First write to address register,
  * then read from or write to data register to complete the job.
  * Bit usage for address registers (read or write):
  *  0-15:  register address (offset) within device
  * 24-25:  (# bytes - 1) to read or write (e.g. 3 for dword)
  */
 #define IWM_HBUS_TARG_PRPH_WADDR    (IWM_HBUS_BASE+0x044)
 #define IWM_HBUS_TARG_PRPH_RADDR    (IWM_HBUS_BASE+0x048)
 #define IWM_HBUS_TARG_PRPH_WDAT     (IWM_HBUS_BASE+0x04c)
 #define IWM_HBUS_TARG_PRPH_RDAT     (IWM_HBUS_BASE+0x050)
 
 /* enable the ID buf for read */
 #define IWM_WFPM_PS_CTL_CLR			0xa0300c
 #define IWM_WFMP_MAC_ADDR_0			0xa03080
 #define IWM_WFMP_MAC_ADDR_1			0xa03084
 #define IWM_LMPM_PMG_EN				0xa01cec
 #define IWM_RADIO_REG_SYS_MANUAL_DFT_0		0xad4078
 #define IWM_RFIC_REG_RD				0xad0470
 #define IWM_WFPM_CTRL_REG			0xa03030
 #define IWM_WFPM_AUX_CTL_AUX_IF_MAC_OWNER_MSK	0x08000000
 #define IWM_ENABLE_WFPM				0x80000000
 
 #define IWM_AUX_MISC_REG			0xa200b0
 #define IWM_HW_STEP_LOCATION_BITS		24
 
 #define IWM_AUX_MISC_MASTER1_EN			0xa20818
 #define IWM_AUX_MISC_MASTER1_EN_SBE_MSK		0x1
 #define IWM_AUX_MISC_MASTER1_SMPHR_STATUS	0xa20800
 #define IWM_RSA_ENABLE				0xa24b08
 #define IWM_PREG_AUX_BUS_WPROT_0		0xa04cc0
 #define IWM_SB_CFG_OVERRIDE_ADDR		0xa26c78
 #define IWM_SB_CFG_OVERRIDE_ENABLE		0x8000
 #define IWM_SB_CFG_BASE_OVERRIDE		0xa20000
 #define IWM_SB_MODIFY_CFG_FLAG			0xa03088
 #define IWM_SB_CPU_1_STATUS			0xa01e30
 #define IWM_SB_CPU_2_STATUS			0Xa01e34
 
 /* Used to enable DBGM */
 #define IWM_HBUS_TARG_TEST_REG	(IWM_HBUS_BASE+0x05c)
 
 /*
  * Per-Tx-queue write pointer (index, really!)
  * Indicates index to next TFD that driver will fill (1 past latest filled).
  * Bit usage:
  *  0-7:  queue write index
  * 11-8:  queue selector
  */
 #define IWM_HBUS_TARG_WRPTR         (IWM_HBUS_BASE+0x060)
 
 /**********************************************************
  * CSR values
  **********************************************************/
  /*
  * host interrupt timeout value
  * used with setting interrupt coalescing timer
  * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit
  *
  * default interrupt coalescing timer is 64 x 32 = 2048 usecs
  */
 #define IWM_HOST_INT_TIMEOUT_MAX	(0xFF)
 #define IWM_HOST_INT_TIMEOUT_DEF	(0x40)
 #define IWM_HOST_INT_TIMEOUT_MIN	(0x0)
 #define IWM_HOST_INT_OPER_MODE		(1 << 31)
 
 /*****************************************************************************
  *                        7000/3000 series SHR DTS addresses                 *
  *****************************************************************************/
 
 /* Diode Results Register Structure: */
 enum iwm_dtd_diode_reg {
 	IWM_DTS_DIODE_REG_DIG_VAL		= 0x000000FF, /* bits [7:0] */
 	IWM_DTS_DIODE_REG_VREF_LOW		= 0x0000FF00, /* bits [15:8] */
 	IWM_DTS_DIODE_REG_VREF_HIGH		= 0x00FF0000, /* bits [23:16] */
 	IWM_DTS_DIODE_REG_VREF_ID		= 0x03000000, /* bits [25:24] */
 	IWM_DTS_DIODE_REG_PASS_ONCE		= 0x80000000, /* bits [31:31] */
 	IWM_DTS_DIODE_REG_FLAGS_MSK		= 0xFF000000, /* bits [31:24] */
 /* Those are the masks INSIDE the flags bit-field: */
 	IWM_DTS_DIODE_REG_FLAGS_VREFS_ID_POS	= 0,
 	IWM_DTS_DIODE_REG_FLAGS_VREFS_ID	= 0x00000003, /* bits [1:0] */
 	IWM_DTS_DIODE_REG_FLAGS_PASS_ONCE_POS	= 7,
 	IWM_DTS_DIODE_REG_FLAGS_PASS_ONCE	= 0x00000080, /* bits [7:7] */
 };
 
 /*
  * END iwl-csr.h
  */
 
 /*
  * BEGIN iwl-fw.h
  */
 
 /**
  * enum iwm_ucode_tlv_flag - ucode API flags
  * @IWM_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
  *	was a separate TLV but moved here to save space.
  * @IWM_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behaviour on hidden SSID,
  *	treats good CRC threshold as a boolean
  * @IWM_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
  * @IWM_UCODE_TLV_FLAGS_P2P: This uCode image supports P2P.
  * @IWM_UCODE_TLV_FLAGS_DW_BC_TABLE: The SCD byte count table is in DWORDS
  * @IWM_UCODE_TLV_FLAGS_UAPSD: This uCode image supports uAPSD
  * @IWM_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of black list instead of 64 in scan
  *	offload profile config command.
  * @IWM_UCODE_TLV_FLAGS_RX_ENERGY_API: supports rx signal strength api
  * @IWM_UCODE_TLV_FLAGS_TIME_EVENT_API_V2: using the new time event API.
  * @IWM_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six
  *	(rather than two) IPv6 addresses
  * @IWM_UCODE_TLV_FLAGS_BF_UPDATED: new beacon filtering API
  * @IWM_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element
  *	from the probe request template.
  * @IWM_UCODE_TLV_FLAGS_D3_CONTINUITY_API: modified D3 API to allow keeping
  *	connection when going back to D0
  * @IWM_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)
  * @IWM_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
  * @IWM_UCODE_TLV_FLAGS_SCHED_SCAN: this uCode image supports scheduled scan.
  * @IWM_UCODE_TLV_FLAGS_STA_KEY_CMD: new ADD_STA and ADD_STA_KEY command API
  * @IWM_UCODE_TLV_FLAGS_DEVICE_PS_CMD: support device wide power command
  *	containing CAM (Continuous Active Mode) indication.
  * @IWM_UCODE_TLV_FLAGS_P2P_PS: P2P client power save is supported (only on a
  *	single bound interface).
  * @IWM_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
  * @IWM_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
  * @IWM_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
  * @IWM_UCODE_TLV_FLAGS_BCAST_FILTERING: uCode supports broadcast filtering.
  * @IWM_UCODE_TLV_FLAGS_GO_UAPSD: AP/GO interfaces support uAPSD clients
  *
  */
 enum iwm_ucode_tlv_flag {
 	IWM_UCODE_TLV_FLAGS_PAN			= (1 << 0),
 	IWM_UCODE_TLV_FLAGS_NEWSCAN		= (1 << 1),
 	IWM_UCODE_TLV_FLAGS_MFP			= (1 << 2),
 	IWM_UCODE_TLV_FLAGS_P2P			= (1 << 3),
 	IWM_UCODE_TLV_FLAGS_DW_BC_TABLE		= (1 << 4),
 	IWM_UCODE_TLV_FLAGS_NEWBT_COEX		= (1 << 5),
 	IWM_UCODE_TLV_FLAGS_PM_CMD_SUPPORT	= (1 << 6),
 	IWM_UCODE_TLV_FLAGS_SHORT_BL		= (1 << 7),
 	IWM_UCODE_TLV_FLAGS_RX_ENERGY_API	= (1 << 8),
 	IWM_UCODE_TLV_FLAGS_TIME_EVENT_API_V2	= (1 << 9),
 	IWM_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS	= (1 << 10),
 	IWM_UCODE_TLV_FLAGS_BF_UPDATED		= (1 << 11),
 	IWM_UCODE_TLV_FLAGS_NO_BASIC_SSID	= (1 << 12),
 	IWM_UCODE_TLV_FLAGS_D3_CONTINUITY_API	= (1 << 14),
 	IWM_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL	= (1 << 15),
 	IWM_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE	= (1 << 16),
 	IWM_UCODE_TLV_FLAGS_SCHED_SCAN		= (1 << 17),
 	IWM_UCODE_TLV_FLAGS_STA_KEY_CMD		= (1 << 19),
 	IWM_UCODE_TLV_FLAGS_DEVICE_PS_CMD	= (1 << 20),
 	IWM_UCODE_TLV_FLAGS_P2P_PS		= (1 << 21),
 	IWM_UCODE_TLV_FLAGS_BSS_P2P_PS_DCM	= (1 << 22),
 	IWM_UCODE_TLV_FLAGS_BSS_P2P_PS_SCM	= (1 << 23),
 	IWM_UCODE_TLV_FLAGS_UAPSD_SUPPORT	= (1 << 24),
 	IWM_UCODE_TLV_FLAGS_EBS_SUPPORT		= (1 << 25),
 	IWM_UCODE_TLV_FLAGS_P2P_PS_UAPSD	= (1 << 26),
 	IWM_UCODE_TLV_FLAGS_BCAST_FILTERING	= (1 << 29),
 	IWM_UCODE_TLV_FLAGS_GO_UAPSD		= (1 << 30),
 	IWM_UCODE_TLV_FLAGS_LTE_COEX		= (1 << 31),
 };
 
 #define IWM_UCODE_TLV_FLAG_BITS \
 	"\020\1PAN\2NEWSCAN\3MFP\4P2P\5DW_BC_TABLE\6NEWBT_COEX\7PM_CMD\10SHORT_BL\11RX_ENERG \
 Y\12TIME_EVENT_V2\13D3_6_IPV6\14BF_UPDATED\15NO_BASIC_SSID\17D3_CONTINUITY\20NEW_NSOFF \
 L_S\21NEW_NSOFFL_L\22SCHED_SCAN\24STA_KEY_CMD\25DEVICE_PS_CMD\26P2P_PS\27P2P_PS_DCM\30 \
 P2P_PS_SCM\31UAPSD_SUPPORT\32EBS\33P2P_PS_UAPSD\36BCAST_FILTERING\37GO_UAPSD\40LTE_COEX"
 
 /**
  * enum iwm_ucode_tlv_api - ucode api
  * @IWM_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
  *	longer than the passive one, which is essential for fragmented scan.
  * @IWM_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
  * @IWM_UCODE_TLV_API_WIDE_CMD_HDR: ucode supports wide command header
  * @IWM_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
  * @IWM_UCODE_TLV_API_EXT_SCAN_PRIORITY: scan APIs use 8-level priority
  *	instead of 3.
  * @IWM_UCODE_TLV_API_TX_POWER_CHAIN: TX power API has larger command size
  *	(command version 3) that supports per-chain limits
  *
  * @IWM_NUM_UCODE_TLV_API: number of bits used
  */
 enum iwm_ucode_tlv_api {
 	IWM_UCODE_TLV_API_FRAGMENTED_SCAN	= (1 << 8),
 	IWM_UCODE_TLV_API_WIFI_MCC_UPDATE	= (1 << 9),
 	IWM_UCODE_TLV_API_WIDE_CMD_HDR		= (1 << 14),
 	IWM_UCODE_TLV_API_LQ_SS_PARAMS		= (1 << 18),
 	IWM_UCODE_TLV_API_EXT_SCAN_PRIORITY	= (1 << 24),
 	IWM_UCODE_TLV_API_TX_POWER_CHAIN	= (1 << 27),
 
 	IWM_NUM_UCODE_TLV_API = 32
 };
 
 #define IWM_UCODE_TLV_API_BITS \
 	"\020\10FRAGMENTED_SCAN\11WIFI_MCC_UPDATE\16WIDE_CMD_HDR\22LQ_SS_PARAMS\30EXT_SCAN_PRIO\33TX_POWER_CHAIN"
 
 /**
  * enum iwm_ucode_tlv_capa - ucode capabilities
  * @IWM_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
  * @IWM_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory
  * @IWM_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.
  * @IWM_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer
  * @IWM_UCODE_TLV_CAPA_TOF_SUPPORT: supports Time of Flight (802.11mc FTM)
  * @IWM_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality
  * @IWM_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current
  *	tx power value into TPC Report action frame and Link Measurement Report
  *	action frame
  * @IWM_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current
  *	channel in DS parameter set element in probe requests.
  * @IWM_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in
  *	probe requests.
  * @IWM_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests
  * @IWM_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),
  *	which also implies support for the scheduler configuration command
  * @IWM_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
  * @IWM_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image
  * @IWM_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command
  * @IWM_UCODE_TLV_CAPA_DC2DC_SUPPORT: supports DC2DC Command
  * @IWM_UCODE_TLV_CAPA_2G_COEX_SUPPORT: supports 2G coex Command
  * @IWM_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload
  * @IWM_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics
  * @IWM_UCODE_TLV_CAPA_P2P_STANDALONE_UAPSD: support p2p standalone U-APSD
  * @IWM_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running
  * @IWM_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
  *	sources for the MCC. This TLV bit is a future replacement to
  *	IWM_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR
  *	is supported.
  * @IWM_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC
  * @IWM_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan
  * @IWM_UCODE_TLV_CAPA_NAN_SUPPORT: supports NAN
  * @IWM_UCODE_TLV_CAPA_UMAC_UPLOAD: supports upload mode in umac (1=supported,
  *	0=no support)
  * @IWM_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
  * @IWM_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts
  * @IWM_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT
  * @IWM_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what
  *	antenna the beacon should be transmitted
  * @IWM_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon
  *	from AP and will send it upon d0i3 exit.
  * @IWM_UCODE_TLV_CAPA_LAR_SUPPORT_V2: support LAR API V2
  * @IWM_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill
  * @IWM_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature
  *	thresholds reporting
  * @IWM_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command
  * @IWM_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in
  *	regular image.
  * @IWM_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared
  *	memory addresses from the firmware.
  * @IWM_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement
  * @IWM_UCODE_TLV_CAPA_LMAC_UPLOAD: supports upload mode in lmac (1=supported,
  *	0=no support)
  *
  * @IWM_NUM_UCODE_TLV_CAPA: number of bits used
  */
 enum iwm_ucode_tlv_capa {
 	IWM_UCODE_TLV_CAPA_D0I3_SUPPORT			= 0,
 	IWM_UCODE_TLV_CAPA_LAR_SUPPORT			= 1,
 	IWM_UCODE_TLV_CAPA_UMAC_SCAN			= 2,
 	IWM_UCODE_TLV_CAPA_BEAMFORMER			= 3,
 	IWM_UCODE_TLV_CAPA_TOF_SUPPORT                  = 5,
 	IWM_UCODE_TLV_CAPA_TDLS_SUPPORT			= 6,
 	IWM_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT	= 8,
 	IWM_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT	= 9,
 	IWM_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT	= 10,
 	IWM_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT		= 11,
 	IWM_UCODE_TLV_CAPA_DQA_SUPPORT			= 12,
 	IWM_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH		= 13,
 	IWM_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG		= 17,
 	IWM_UCODE_TLV_CAPA_HOTSPOT_SUPPORT		= 18,
 	IWM_UCODE_TLV_CAPA_DC2DC_CONFIG_SUPPORT		= 19,
 	IWM_UCODE_TLV_CAPA_2G_COEX_SUPPORT		= 20,
 	IWM_UCODE_TLV_CAPA_CSUM_SUPPORT			= 21,
 	IWM_UCODE_TLV_CAPA_RADIO_BEACON_STATS		= 22,
 	IWM_UCODE_TLV_CAPA_P2P_STANDALONE_UAPSD		= 26,
 	IWM_UCODE_TLV_CAPA_BT_COEX_PLCR			= 28,
 	IWM_UCODE_TLV_CAPA_LAR_MULTI_MCC		= 29,
 	IWM_UCODE_TLV_CAPA_BT_COEX_RRC			= 30,
 	IWM_UCODE_TLV_CAPA_GSCAN_SUPPORT		= 31,
 	IWM_UCODE_TLV_CAPA_NAN_SUPPORT			= 34,
 	IWM_UCODE_TLV_CAPA_UMAC_UPLOAD			= 35,
 	IWM_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE		= 64,
 	IWM_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS		= 65,
 	IWM_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT		= 67,
 	IWM_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT	= 68,
 	IWM_UCODE_TLV_CAPA_BEACON_ANT_SELECTION		= 71,
 	IWM_UCODE_TLV_CAPA_BEACON_STORING		= 72,
 	IWM_UCODE_TLV_CAPA_LAR_SUPPORT_V2		= 73,
 	IWM_UCODE_TLV_CAPA_CT_KILL_BY_FW		= 74,
 	IWM_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT	= 75,
 	IWM_UCODE_TLV_CAPA_CTDP_SUPPORT			= 76,
 	IWM_UCODE_TLV_CAPA_USNIFFER_UNIFIED		= 77,
 	IWM_UCODE_TLV_CAPA_LMAC_UPLOAD			= 79,
 	IWM_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG	= 80,
 	IWM_UCODE_TLV_CAPA_LQM_SUPPORT			= 81,
 
 	IWM_NUM_UCODE_TLV_CAPA = 128
 };
 
 /* The default calibrate table size if not specified by firmware file */
 #define IWM_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE	18
 #define IWM_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE		19
 #define IWM_MAX_PHY_CALIBRATE_TBL_SIZE			253
 
 /* The default max probe length if not specified by the firmware file */
 #define IWM_DEFAULT_MAX_PROBE_LENGTH	200
 
 /*
  * enumeration of ucode section.
  * This enumeration is used directly for older firmware (before 16.0).
  * For new firmware, there can be up to 4 sections (see below) but the
  * first one packaged into the firmware file is the DATA section and
  * some debugging code accesses that.
  */
 enum iwm_ucode_sec {
 	IWM_UCODE_SECTION_DATA,
 	IWM_UCODE_SECTION_INST,
 };
 /*
  * For 16.0 uCode and above, there is no differentiation between sections,
  * just an offset to the HW address.
  */
 #define IWM_CPU1_CPU2_SEPARATOR_SECTION		0xFFFFCCCC
 #define IWM_PAGING_SEPARATOR_SECTION		0xAAAABBBB
 
 /* uCode version contains 4 values: Major/Minor/API/Serial */
 #define IWM_UCODE_MAJOR(ver)	(((ver) & 0xFF000000) >> 24)
 #define IWM_UCODE_MINOR(ver)	(((ver) & 0x00FF0000) >> 16)
 #define IWM_UCODE_API(ver)	(((ver) & 0x0000FF00) >> 8)
 #define IWM_UCODE_SERIAL(ver)	((ver) & 0x000000FF)
 
 /*
  * Calibration control struct.
  * Sent as part of the phy configuration command.
  * @flow_trigger: bitmap for which calibrations to perform according to
  *		flow triggers.
  * @event_trigger: bitmap for which calibrations to perform according to
  *		event triggers.
  */
 struct iwm_tlv_calib_ctrl {
 	uint32_t flow_trigger;
 	uint32_t event_trigger;
 } __packed;
 
 enum iwm_fw_phy_cfg {
 	IWM_FW_PHY_CFG_RADIO_TYPE_POS = 0,
 	IWM_FW_PHY_CFG_RADIO_TYPE = 0x3 << IWM_FW_PHY_CFG_RADIO_TYPE_POS,
 	IWM_FW_PHY_CFG_RADIO_STEP_POS = 2,
 	IWM_FW_PHY_CFG_RADIO_STEP = 0x3 << IWM_FW_PHY_CFG_RADIO_STEP_POS,
 	IWM_FW_PHY_CFG_RADIO_DASH_POS = 4,
 	IWM_FW_PHY_CFG_RADIO_DASH = 0x3 << IWM_FW_PHY_CFG_RADIO_DASH_POS,
 	IWM_FW_PHY_CFG_TX_CHAIN_POS = 16,
 	IWM_FW_PHY_CFG_TX_CHAIN = 0xf << IWM_FW_PHY_CFG_TX_CHAIN_POS,
 	IWM_FW_PHY_CFG_RX_CHAIN_POS = 20,
 	IWM_FW_PHY_CFG_RX_CHAIN = 0xf << IWM_FW_PHY_CFG_RX_CHAIN_POS,
 };
 
 #define IWM_UCODE_MAX_CS		1
 
 /**
  * struct iwm_fw_cipher_scheme - a cipher scheme supported by FW.
  * @cipher: a cipher suite selector
  * @flags: cipher scheme flags (currently reserved for a future use)
  * @hdr_len: a size of MPDU security header
  * @pn_len: a size of PN
  * @pn_off: an offset of pn from the beginning of the security header
  * @key_idx_off: an offset of key index byte in the security header
  * @key_idx_mask: a bit mask of key_idx bits
  * @key_idx_shift: bit shift needed to get key_idx
  * @mic_len: mic length in bytes
  * @hw_cipher: a HW cipher index used in host commands
  */
 struct iwm_fw_cipher_scheme {
 	uint32_t cipher;
 	uint8_t flags;
 	uint8_t hdr_len;
 	uint8_t pn_len;
 	uint8_t pn_off;
 	uint8_t key_idx_off;
 	uint8_t key_idx_mask;
 	uint8_t key_idx_shift;
 	uint8_t mic_len;
 	uint8_t hw_cipher;
 } __packed;
 
-/*
- * Block paging calculations
- */
-#define IWM_PAGE_2_EXP_SIZE 12 /* 4K == 2^12 */
-#define IWM_FW_PAGING_SIZE (1 << IWM_PAGE_2_EXP_SIZE) /* page size is 4KB */
-#define IWM_PAGE_PER_GROUP_2_EXP_SIZE 3
-/* 8 pages per group */
-#define IWM_NUM_OF_PAGE_PER_GROUP (1 << IWM_PAGE_PER_GROUP_2_EXP_SIZE)
-/* don't change, support only 32KB size */
-#define IWM_PAGING_BLOCK_SIZE (IWM_NUM_OF_PAGE_PER_GROUP * IWM_FW_PAGING_SIZE)
-/* 32K == 2^15 */
-#define IWM_BLOCK_2_EXP_SIZE (IWM_PAGE_2_EXP_SIZE + IWM_PAGE_PER_GROUP_2_EXP_SIZE)
-
-/*
- * Image paging calculations
- */
-#define IWM_BLOCK_PER_IMAGE_2_EXP_SIZE 5
-/* 2^5 == 32 blocks per image */
-#define IWM_NUM_OF_BLOCK_PER_IMAGE (1 << IWM_BLOCK_PER_IMAGE_2_EXP_SIZE)
-/* maximum image size 1024KB */
-#define IWM_MAX_PAGING_IMAGE_SIZE (IWM_NUM_OF_BLOCK_PER_IMAGE * IWM_PAGING_BLOCK_SIZE)
-
 /**
  * struct iwm_fw_cscheme_list - a cipher scheme list
  * @size: a number of entries
  * @cs: cipher scheme entries
  */
 struct iwm_fw_cscheme_list {
 	uint8_t size;
 	struct iwm_fw_cipher_scheme cs[];
 } __packed;
 
 /*
  * END iwl-fw.h
  */
 
 /*
  * BEGIN iwl-fw-file.h
  */
 
 /* v1/v2 uCode file layout */
 struct iwm_ucode_header {
 	uint32_t ver;	/* major/minor/API/serial */
 	union {
 		struct {
 			uint32_t inst_size;	/* bytes of runtime code */
 			uint32_t data_size;	/* bytes of runtime data */
 			uint32_t init_size;	/* bytes of init code */
 			uint32_t init_data_size;	/* bytes of init data */
 			uint32_t boot_size;	/* bytes of bootstrap code */
 			uint8_t data[0];		/* in same order as sizes */
 		} v1;
 		struct {
 			uint32_t build;		/* build number */
 			uint32_t inst_size;	/* bytes of runtime code */
 			uint32_t data_size;	/* bytes of runtime data */
 			uint32_t init_size;	/* bytes of init code */
 			uint32_t init_data_size;	/* bytes of init data */
 			uint32_t boot_size;	/* bytes of bootstrap code */
 			uint8_t data[0];		/* in same order as sizes */
 		} v2;
 	} u;
 };
 
 /*
  * new TLV uCode file layout
  *
  * The new TLV file format contains TLVs, that each specify
  * some piece of data.
  */
 
 enum iwm_ucode_tlv_type {
 	IWM_UCODE_TLV_INVALID		= 0, /* unused */
 	IWM_UCODE_TLV_INST		= 1,
 	IWM_UCODE_TLV_DATA		= 2,
 	IWM_UCODE_TLV_INIT		= 3,
 	IWM_UCODE_TLV_INIT_DATA		= 4,
 	IWM_UCODE_TLV_BOOT		= 5,
 	IWM_UCODE_TLV_PROBE_MAX_LEN	= 6, /* a uint32_t value */
 	IWM_UCODE_TLV_PAN		= 7,
 	IWM_UCODE_TLV_RUNT_EVTLOG_PTR	= 8,
 	IWM_UCODE_TLV_RUNT_EVTLOG_SIZE	= 9,
 	IWM_UCODE_TLV_RUNT_ERRLOG_PTR	= 10,
 	IWM_UCODE_TLV_INIT_EVTLOG_PTR	= 11,
 	IWM_UCODE_TLV_INIT_EVTLOG_SIZE	= 12,
 	IWM_UCODE_TLV_INIT_ERRLOG_PTR	= 13,
 	IWM_UCODE_TLV_ENHANCE_SENS_TBL	= 14,
 	IWM_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
 	IWM_UCODE_TLV_WOWLAN_INST	= 16,
 	IWM_UCODE_TLV_WOWLAN_DATA	= 17,
 	IWM_UCODE_TLV_FLAGS		= 18,
 	IWM_UCODE_TLV_SEC_RT		= 19,
 	IWM_UCODE_TLV_SEC_INIT		= 20,
 	IWM_UCODE_TLV_SEC_WOWLAN	= 21,
 	IWM_UCODE_TLV_DEF_CALIB		= 22,
 	IWM_UCODE_TLV_PHY_SKU		= 23,
 	IWM_UCODE_TLV_SECURE_SEC_RT	= 24,
 	IWM_UCODE_TLV_SECURE_SEC_INIT	= 25,
 	IWM_UCODE_TLV_SECURE_SEC_WOWLAN	= 26,
 	IWM_UCODE_TLV_NUM_OF_CPU	= 27,
 	IWM_UCODE_TLV_CSCHEME		= 28,
 
 	/*
 	 * Following two are not in our base tag, but allow
 	 * handling ucode version 9.
 	 */
 	IWM_UCODE_TLV_API_CHANGES_SET	= 29,
 	IWM_UCODE_TLV_ENABLED_CAPABILITIES = 30,
 
 	IWM_UCODE_TLV_N_SCAN_CHANNELS	= 31,
 	IWM_UCODE_TLV_PAGING		= 32,
 	IWM_UCODE_TLV_SEC_RT_USNIFFER	= 34,
 	IWM_UCODE_TLV_SDIO_ADMA_ADDR	= 35,
 	IWM_UCODE_TLV_FW_VERSION	= 36,
 	IWM_UCODE_TLV_FW_DBG_DEST	= 38,
 	IWM_UCODE_TLV_FW_DBG_CONF	= 39,
 	IWM_UCODE_TLV_FW_DBG_TRIGGER	= 40,
 	IWM_UCODE_TLV_FW_GSCAN_CAPA	= 50,
 	IWM_UCODE_TLV_FW_MEM_SEG	= 51,
 };
 
 struct iwm_ucode_tlv {
 	uint32_t type;		/* see above */
 	uint32_t length;		/* not including type/length fields */
 	uint8_t data[0];
 };
 
 struct iwm_ucode_api {
 	uint32_t api_index;
 	uint32_t api_flags;
 } __packed;
 
 struct iwm_ucode_capa {
 	uint32_t api_index;
 	uint32_t api_capa;
 } __packed;
 
 #define IWM_TLV_UCODE_MAGIC	0x0a4c5749
 
 struct iwm_tlv_ucode_header {
 	/*
 	 * The TLV style ucode header is distinguished from
 	 * the v1/v2 style header by first four bytes being
 	 * zero, as such is an invalid combination of
 	 * major/minor/API/serial versions.
 	 */
 	uint32_t zero;
 	uint32_t magic;
 	uint8_t human_readable[64];
 	uint32_t ver;		/* major/minor/API/serial */
 	uint32_t build;
 	uint64_t ignore;
 	/*
 	 * The data contained herein has a TLV layout,
 	 * see above for the TLV header and types.
 	 * Note that each TLV is padded to a length
 	 * that is a multiple of 4 for alignment.
 	 */
 	uint8_t data[0];
 };
 
 /*
  * END iwl-fw-file.h
  */
 
 /*
  * BEGIN iwl-prph.h
  */
 
 /*
  * Registers in this file are internal, not PCI bus memory mapped.
  * Driver accesses these via IWM_HBUS_TARG_PRPH_* registers.
  */
 #define IWM_PRPH_BASE	(0x00000)
 #define IWM_PRPH_END	(0xFFFFF)
 
 /* APMG (power management) constants */
 #define IWM_APMG_BASE			(IWM_PRPH_BASE + 0x3000)
 #define IWM_APMG_CLK_CTRL_REG		(IWM_APMG_BASE + 0x0000)
 #define IWM_APMG_CLK_EN_REG		(IWM_APMG_BASE + 0x0004)
 #define IWM_APMG_CLK_DIS_REG		(IWM_APMG_BASE + 0x0008)
 #define IWM_APMG_PS_CTRL_REG		(IWM_APMG_BASE + 0x000c)
 #define IWM_APMG_PCIDEV_STT_REG		(IWM_APMG_BASE + 0x0010)
 #define IWM_APMG_RFKILL_REG		(IWM_APMG_BASE + 0x0014)
 #define IWM_APMG_RTC_INT_STT_REG	(IWM_APMG_BASE + 0x001c)
 #define IWM_APMG_RTC_INT_MSK_REG	(IWM_APMG_BASE + 0x0020)
 #define IWM_APMG_DIGITAL_SVR_REG	(IWM_APMG_BASE + 0x0058)
 #define IWM_APMG_ANALOG_SVR_REG		(IWM_APMG_BASE + 0x006C)
 
 #define IWM_APMS_CLK_VAL_MRB_FUNC_MODE	(0x00000001)
 #define IWM_APMG_CLK_VAL_DMA_CLK_RQT	(0x00000200)
 #define IWM_APMG_CLK_VAL_BSM_CLK_RQT	(0x00000800)
 
 #define IWM_APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS	(0x00400000)
 #define IWM_APMG_PS_CTRL_VAL_RESET_REQ			(0x04000000)
 #define IWM_APMG_PS_CTRL_MSK_PWR_SRC			(0x03000000)
 #define IWM_APMG_PS_CTRL_VAL_PWR_SRC_VMAIN		(0x00000000)
 #define IWM_APMG_PS_CTRL_VAL_PWR_SRC_VAUX		(0x02000000)
 #define IWM_APMG_SVR_VOLTAGE_CONFIG_BIT_MSK		(0x000001E0) /* bit 8:5 */
 #define IWM_APMG_SVR_DIGITAL_VOLTAGE_1_32		(0x00000060)
 
 #define IWM_APMG_PCIDEV_STT_VAL_L1_ACT_DIS		(0x00000800)
 
 #define IWM_APMG_RTC_INT_STT_RFKILL			(0x10000000)
 
 /* Device system time */
 #define IWM_DEVICE_SYSTEM_TIME_REG 0xA0206C
 
 /* Device NMI register */
 #define IWM_DEVICE_SET_NMI_REG		0x00a01c30
 #define IWM_DEVICE_SET_NMI_VAL_HW	0x01
 #define IWM_DEVICE_SET_NMI_VAL_DRV	0x80
 #define IWM_DEVICE_SET_NMI_8000_REG	0x00a01c24
 #define IWM_DEVICE_SET_NMI_8000_VAL	0x1000000
 
 /*
  * Device reset for family 8000
  * write to bit 24 in order to reset the CPU
  */
 #define IWM_RELEASE_CPU_RESET		0x300c
 #define IWM_RELEASE_CPU_RESET_BIT	0x1000000
 
 
 /*****************************************************************************
  *                        7000/3000 series SHR DTS addresses                 *
  *****************************************************************************/
 
 #define IWM_SHR_MISC_WFM_DTS_EN		(0x00a10024)
 #define IWM_DTSC_CFG_MODE		(0x00a10604)
 #define IWM_DTSC_VREF_AVG		(0x00a10648)
 #define IWM_DTSC_VREF5_AVG		(0x00a1064c)
 #define IWM_DTSC_CFG_MODE_PERIODIC	(0x2)
 #define IWM_DTSC_PTAT_AVG		(0x00a10650)
 
 
 /**
  * Tx Scheduler
  *
  * The Tx Scheduler selects the next frame to be transmitted, choosing TFDs
  * (Transmit Frame Descriptors) from up to 16 circular Tx queues resident in
  * host DRAM.  It steers each frame's Tx command (which contains the frame
  * data) into one of up to 7 prioritized Tx DMA FIFO channels within the
  * device.  A queue maps to only one (selectable by driver) Tx DMA channel,
  * but one DMA channel may take input from several queues.
  *
  * Tx DMA FIFOs have dedicated purposes.
  *
  * For 5000 series and up, they are used differently
  * (cf. iwl5000_default_queue_to_tx_fifo in iwl-5000.c):
  *
  * 0 -- EDCA BK (background) frames, lowest priority
  * 1 -- EDCA BE (best effort) frames, normal priority
  * 2 -- EDCA VI (video) frames, higher priority
  * 3 -- EDCA VO (voice) and management frames, highest priority
  * 4 -- unused
  * 5 -- unused
  * 6 -- unused
  * 7 -- Commands
  *
  * Driver should normally map queues 0-6 to Tx DMA/FIFO channels 0-6.
  * In addition, driver can map the remaining queues to Tx DMA/FIFO
  * channels 0-3 to support 11n aggregation via EDCA DMA channels.
  *
  * The driver sets up each queue to work in one of two modes:
  *
  * 1)  Scheduler-Ack, in which the scheduler automatically supports a
  *     block-ack (BA) window of up to 64 TFDs.  In this mode, each queue
  *     contains TFDs for a unique combination of Recipient Address (RA)
  *     and Traffic Identifier (TID), that is, traffic of a given
  *     Quality-Of-Service (QOS) priority, destined for a single station.
  *
  *     In scheduler-ack mode, the scheduler keeps track of the Tx status of
  *     each frame within the BA window, including whether it's been transmitted,
  *     and whether it's been acknowledged by the receiving station.  The device
  *     automatically processes block-acks received from the receiving STA,
  *     and reschedules un-acked frames to be retransmitted (successful
  *     Tx completion may end up being out-of-order).
  *
  *     The driver must maintain the queue's Byte Count table in host DRAM
  *     for this mode.
  *     This mode does not support fragmentation.
  *
  * 2)  FIFO (a.k.a. non-Scheduler-ACK), in which each TFD is processed in order.
  *     The device may automatically retry Tx, but will retry only one frame
  *     at a time, until receiving ACK from receiving station, or reaching
  *     retry limit and giving up.
  *
  *     The command queue (#4/#9) must use this mode!
  *     This mode does not require use of the Byte Count table in host DRAM.
  *
  * Driver controls scheduler operation via 3 means:
  * 1)  Scheduler registers
  * 2)  Shared scheduler data base in internal SRAM
  * 3)  Shared data in host DRAM
  *
  * Initialization:
  *
  * When loading, driver should allocate memory for:
  * 1)  16 TFD circular buffers, each with space for (typically) 256 TFDs.
  * 2)  16 Byte Count circular buffers in 16 KBytes contiguous memory
  *     (1024 bytes for each queue).
  *
  * After receiving "Alive" response from uCode, driver must initialize
  * the scheduler (especially for queue #4/#9, the command queue, otherwise
  * the driver can't issue commands!):
  */
 #define IWM_SCD_MEM_LOWER_BOUND		(0x0000)
 
 /**
  * Max Tx window size is the max number of contiguous TFDs that the scheduler
  * can keep track of at one time when creating block-ack chains of frames.
  * Note that "64" matches the number of ack bits in a block-ack packet.
  */
 #define IWM_SCD_WIN_SIZE				64
 #define IWM_SCD_FRAME_LIMIT				64
 
 #define IWM_SCD_TXFIFO_POS_TID			(0)
 #define IWM_SCD_TXFIFO_POS_RA			(4)
 #define IWM_SCD_QUEUE_RA_TID_MAP_RATID_MSK	(0x01FF)
 
 /* agn SCD */
 #define IWM_SCD_QUEUE_STTS_REG_POS_TXF		(0)
 #define IWM_SCD_QUEUE_STTS_REG_POS_ACTIVE	(3)
 #define IWM_SCD_QUEUE_STTS_REG_POS_WSL		(4)
 #define IWM_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN	(19)
 #define IWM_SCD_QUEUE_STTS_REG_MSK		(0x017F0000)
 
 #define IWM_SCD_QUEUE_CTX_REG1_CREDIT_POS	(8)
 #define IWM_SCD_QUEUE_CTX_REG1_CREDIT_MSK	(0x00FFFF00)
 #define IWM_SCD_QUEUE_CTX_REG1_SUPER_CREDIT_POS	(24)
 #define IWM_SCD_QUEUE_CTX_REG1_SUPER_CREDIT_MSK	(0xFF000000)
 #define IWM_SCD_QUEUE_CTX_REG2_WIN_SIZE_POS	(0)
 #define IWM_SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK	(0x0000007F)
 #define IWM_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS	(16)
 #define IWM_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK	(0x007F0000)
 #define IWM_SCD_GP_CTRL_ENABLE_31_QUEUES	(1 << 0)
 #define IWM_SCD_GP_CTRL_AUTO_ACTIVE_MODE	(1 << 18)
 
 /* Context Data */
 #define IWM_SCD_CONTEXT_MEM_LOWER_BOUND	(IWM_SCD_MEM_LOWER_BOUND + 0x600)
 #define IWM_SCD_CONTEXT_MEM_UPPER_BOUND	(IWM_SCD_MEM_LOWER_BOUND + 0x6A0)
 
 /* Tx status */
 #define IWM_SCD_TX_STTS_MEM_LOWER_BOUND	(IWM_SCD_MEM_LOWER_BOUND + 0x6A0)
 #define IWM_SCD_TX_STTS_MEM_UPPER_BOUND	(IWM_SCD_MEM_LOWER_BOUND + 0x7E0)
 
 /* Translation Data */
 #define IWM_SCD_TRANS_TBL_MEM_LOWER_BOUND (IWM_SCD_MEM_LOWER_BOUND + 0x7E0)
 #define IWM_SCD_TRANS_TBL_MEM_UPPER_BOUND (IWM_SCD_MEM_LOWER_BOUND + 0x808)
 
 #define IWM_SCD_CONTEXT_QUEUE_OFFSET(x)\
 	(IWM_SCD_CONTEXT_MEM_LOWER_BOUND + ((x) * 8))
 
 #define IWM_SCD_TX_STTS_QUEUE_OFFSET(x)\
 	(IWM_SCD_TX_STTS_MEM_LOWER_BOUND + ((x) * 16))
 
 #define IWM_SCD_TRANS_TBL_OFFSET_QUEUE(x) \
 	((IWM_SCD_TRANS_TBL_MEM_LOWER_BOUND + ((x) * 2)) & 0xfffc)
 
 #define IWM_SCD_BASE			(IWM_PRPH_BASE + 0xa02c00)
 
 #define IWM_SCD_SRAM_BASE_ADDR	(IWM_SCD_BASE + 0x0)
 #define IWM_SCD_DRAM_BASE_ADDR	(IWM_SCD_BASE + 0x8)
 #define IWM_SCD_AIT		(IWM_SCD_BASE + 0x0c)
 #define IWM_SCD_TXFACT		(IWM_SCD_BASE + 0x10)
 #define IWM_SCD_ACTIVE		(IWM_SCD_BASE + 0x14)
 #define IWM_SCD_QUEUECHAIN_SEL	(IWM_SCD_BASE + 0xe8)
 #define IWM_SCD_CHAINEXT_EN	(IWM_SCD_BASE + 0x244)
 #define IWM_SCD_AGGR_SEL	(IWM_SCD_BASE + 0x248)
 #define IWM_SCD_INTERRUPT_MASK	(IWM_SCD_BASE + 0x108)
 #define IWM_SCD_GP_CTRL		(IWM_SCD_BASE + 0x1a8)
 #define IWM_SCD_EN_CTRL		(IWM_SCD_BASE + 0x254)
 
 static inline unsigned int IWM_SCD_QUEUE_WRPTR(unsigned int chnl)
 {
 	if (chnl < 20)
 		return IWM_SCD_BASE + 0x18 + chnl * 4;
 	return IWM_SCD_BASE + 0x284 + (chnl - 20) * 4;
 }
 
 static inline unsigned int IWM_SCD_QUEUE_RDPTR(unsigned int chnl)
 {
 	if (chnl < 20)
 		return IWM_SCD_BASE + 0x68 + chnl * 4;
 	return IWM_SCD_BASE + 0x2B4 + (chnl - 20) * 4;
 }
 
 static inline unsigned int IWM_SCD_QUEUE_STATUS_BITS(unsigned int chnl)
 {
 	if (chnl < 20)
 		return IWM_SCD_BASE + 0x10c + chnl * 4;
 	return IWM_SCD_BASE + 0x384 + (chnl - 20) * 4;
 }
 
 /*********************** END TX SCHEDULER *************************************/
 
 /* Oscillator clock */
 #define IWM_OSC_CLK				(0xa04068)
 #define IWM_OSC_CLK_FORCE_CONTROL		(0x8)
 
 /*
  * END iwl-prph.h
  */
 
 /*
  * BEGIN iwl-fh.h
  */
 
 /****************************/
 /* Flow Handler Definitions */
 /****************************/
 
 /**
  * This I/O area is directly read/writable by driver (e.g. Linux uses writel())
  * Addresses are offsets from device's PCI hardware base address.
  */
 #define IWM_FH_MEM_LOWER_BOUND                   (0x1000)
 #define IWM_FH_MEM_UPPER_BOUND                   (0x2000)
 
 /**
  * Keep-Warm (KW) buffer base address.
  *
  * Driver must allocate a 4KByte buffer that is for keeping the
  * host DRAM powered on (via dummy accesses to DRAM) to maintain low-latency
  * DRAM access when doing Txing or Rxing.  The dummy accesses prevent host
  * from going into a power-savings mode that would cause higher DRAM latency,
  * and possible data over/under-runs, before all Tx/Rx is complete.
  *
  * Driver loads IWM_FH_KW_MEM_ADDR_REG with the physical address (bits 35:4)
  * of the buffer, which must be 4K aligned.  Once this is set up, the device
  * automatically invokes keep-warm accesses when normal accesses might not
  * be sufficient to maintain fast DRAM response.
  *
  * Bit fields:
  *  31-0:  Keep-warm buffer physical base address [35:4], must be 4K aligned
  */
 #define IWM_FH_KW_MEM_ADDR_REG		     (IWM_FH_MEM_LOWER_BOUND + 0x97C)
 
 
 /**
  * TFD Circular Buffers Base (CBBC) addresses
  *
  * Device has 16 base pointer registers, one for each of 16 host-DRAM-resident
  * circular buffers (CBs/queues) containing Transmit Frame Descriptors (TFDs)
  * (see struct iwm_tfd_frame).  These 16 pointer registers are offset by 0x04
  * bytes from one another.  Each TFD circular buffer in DRAM must be 256-byte
  * aligned (address bits 0-7 must be 0).
  * Later devices have 20 (5000 series) or 30 (higher) queues, but the registers
  * for them are in different places.
  *
  * Bit fields in each pointer register:
  *  27-0: TFD CB physical base address [35:8], must be 256-byte aligned
  */
 #define IWM_FH_MEM_CBBC_0_15_LOWER_BOUND	(IWM_FH_MEM_LOWER_BOUND + 0x9D0)
 #define IWM_FH_MEM_CBBC_0_15_UPPER_BOUN		(IWM_FH_MEM_LOWER_BOUND + 0xA10)
 #define IWM_FH_MEM_CBBC_16_19_LOWER_BOUND	(IWM_FH_MEM_LOWER_BOUND + 0xBF0)
 #define IWM_FH_MEM_CBBC_16_19_UPPER_BOUND	(IWM_FH_MEM_LOWER_BOUND + 0xC00)
 #define IWM_FH_MEM_CBBC_20_31_LOWER_BOUND	(IWM_FH_MEM_LOWER_BOUND + 0xB20)
 #define IWM_FH_MEM_CBBC_20_31_UPPER_BOUND	(IWM_FH_MEM_LOWER_BOUND + 0xB80)
 
 /* Find TFD CB base pointer for given queue */
 static inline unsigned int IWM_FH_MEM_CBBC_QUEUE(unsigned int chnl)
 {
 	if (chnl < 16)
 		return IWM_FH_MEM_CBBC_0_15_LOWER_BOUND + 4 * chnl;
 	if (chnl < 20)
 		return IWM_FH_MEM_CBBC_16_19_LOWER_BOUND + 4 * (chnl - 16);
 	return IWM_FH_MEM_CBBC_20_31_LOWER_BOUND + 4 * (chnl - 20);
 }
 
 
 /**
  * Rx SRAM Control and Status Registers (RSCSR)
  *
  * These registers provide handshake between driver and device for the Rx queue
  * (this queue handles *all* command responses, notifications, Rx data, etc.
  * sent from uCode to host driver).  Unlike Tx, there is only one Rx
  * queue, and only one Rx DMA/FIFO channel.  Also unlike Tx, which can
  * concatenate up to 20 DRAM buffers to form a Tx frame, each Receive Buffer
  * Descriptor (RBD) points to only one Rx Buffer (RB); there is a 1:1
  * mapping between RBDs and RBs.
  *
  * Driver must allocate host DRAM memory for the following, and set the
  * physical address of each into device registers:
  *
  * 1)  Receive Buffer Descriptor (RBD) circular buffer (CB), typically with 256
  *     entries (although any power of 2, up to 4096, is selectable by driver).
  *     Each entry (1 dword) points to a receive buffer (RB) of consistent size
  *     (typically 4K, although 8K or 16K are also selectable by driver).
  *     Driver sets up RB size and number of RBDs in the CB via Rx config
  *     register IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG.
  *
  *     Bit fields within one RBD:
  *     27-0:  Receive Buffer physical address bits [35:8], 256-byte aligned
  *
  *     Driver sets physical address [35:8] of base of RBD circular buffer
  *     into IWM_FH_RSCSR_CHNL0_RBDCB_BASE_REG [27:0].
  *
  * 2)  Rx status buffer, 8 bytes, in which uCode indicates which Rx Buffers
  *     (RBs) have been filled, via a "write pointer", actually the index of
  *     the RB's corresponding RBD within the circular buffer.  Driver sets
  *     physical address [35:4] into IWM_FH_RSCSR_CHNL0_STTS_WPTR_REG [31:0].
  *
  *     Bit fields in lower dword of Rx status buffer (upper dword not used
  *     by driver:
  *     31-12:  Not used by driver
  *     11- 0:  Index of last filled Rx buffer descriptor
  *             (device writes, driver reads this value)
  *
  * As the driver prepares Receive Buffers (RBs) for device to fill, driver must
  * enter pointers to these RBs into contiguous RBD circular buffer entries,
  * and update the device's "write" index register,
  * IWM_FH_RSCSR_CHNL0_RBDCB_WPTR_REG.
  *
  * This "write" index corresponds to the *next* RBD that the driver will make
  * available, i.e. one RBD past the tail of the ready-to-fill RBDs within
  * the circular buffer.  This value should initially be 0 (before preparing any
  * RBs), should be 8 after preparing the first 8 RBs (for example), and must
  * wrap back to 0 at the end of the circular buffer (but don't wrap before
  * "read" index has advanced past 1!  See below).
  * NOTE:  DEVICE EXPECTS THE WRITE INDEX TO BE INCREMENTED IN MULTIPLES OF 8.
  *
  * As the device fills RBs (referenced from contiguous RBDs within the circular
  * buffer), it updates the Rx status buffer in host DRAM, 2) described above,
  * to tell the driver the index of the latest filled RBD.  The driver must
  * read this "read" index from DRAM after receiving an Rx interrupt from device
  *
  * The driver must also internally keep track of a third index, which is the
  * next RBD to process.  When receiving an Rx interrupt, driver should process
  * all filled but unprocessed RBs up to, but not including, the RB
  * corresponding to the "read" index.  For example, if "read" index becomes "1",
  * driver may process the RB pointed to by RBD 0.  Depending on volume of
  * traffic, there may be many RBs to process.
  *
  * If read index == write index, device thinks there is no room to put new data.
  * Due to this, the maximum number of filled RBs is 255, instead of 256.  To
  * be safe, make sure that there is a gap of at least 2 RBDs between "write"
  * and "read" indexes; that is, make sure that there are no more than 254
  * buffers waiting to be filled.
  */
 #define IWM_FH_MEM_RSCSR_LOWER_BOUND	(IWM_FH_MEM_LOWER_BOUND + 0xBC0)
 #define IWM_FH_MEM_RSCSR_UPPER_BOUND	(IWM_FH_MEM_LOWER_BOUND + 0xC00)
 #define IWM_FH_MEM_RSCSR_CHNL0		(IWM_FH_MEM_RSCSR_LOWER_BOUND)
 
 /**
  * Physical base address of 8-byte Rx Status buffer.
  * Bit fields:
  *  31-0: Rx status buffer physical base address [35:4], must 16-byte aligned.
  */
 #define IWM_FH_RSCSR_CHNL0_STTS_WPTR_REG	(IWM_FH_MEM_RSCSR_CHNL0)
 
 /**
  * Physical base address of Rx Buffer Descriptor Circular Buffer.
  * Bit fields:
  *  27-0:  RBD CD physical base address [35:8], must be 256-byte aligned.
  */
 #define IWM_FH_RSCSR_CHNL0_RBDCB_BASE_REG	(IWM_FH_MEM_RSCSR_CHNL0 + 0x004)
 
 /**
  * Rx write pointer (index, really!).
  * Bit fields:
  *  11-0:  Index of driver's most recent prepared-to-be-filled RBD, + 1.
  *         NOTE:  For 256-entry circular buffer, use only bits [7:0].
  */
 #define IWM_FH_RSCSR_CHNL0_RBDCB_WPTR_REG	(IWM_FH_MEM_RSCSR_CHNL0 + 0x008)
 #define IWM_FH_RSCSR_CHNL0_WPTR		(IWM_FH_RSCSR_CHNL0_RBDCB_WPTR_REG)
 
 #define IWM_FW_RSCSR_CHNL0_RXDCB_RDPTR_REG	(IWM_FH_MEM_RSCSR_CHNL0 + 0x00c)
 #define IWM_FH_RSCSR_CHNL0_RDPTR		IWM_FW_RSCSR_CHNL0_RXDCB_RDPTR_REG
 
 /**
  * Rx Config/Status Registers (RCSR)
  * Rx Config Reg for channel 0 (only channel used)
  *
  * Driver must initialize IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG as follows for
  * normal operation (see bit fields).
  *
  * Clearing IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG to 0 turns off Rx DMA.
  * Driver should poll IWM_FH_MEM_RSSR_RX_STATUS_REG	for
  * IWM_FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE (bit 24) before continuing.
  *
  * Bit fields:
  * 31-30: Rx DMA channel enable: '00' off/pause, '01' pause at end of frame,
  *        '10' operate normally
  * 29-24: reserved
  * 23-20: # RBDs in circular buffer = 2^value; use "8" for 256 RBDs (normal),
  *        min "5" for 32 RBDs, max "12" for 4096 RBDs.
  * 19-18: reserved
  * 17-16: size of each receive buffer; '00' 4K (normal), '01' 8K,
  *        '10' 12K, '11' 16K.
  * 15-14: reserved
  * 13-12: IRQ destination; '00' none, '01' host driver (normal operation)
  * 11- 4: timeout for closing Rx buffer and interrupting host (units 32 usec)
  *        typical value 0x10 (about 1/2 msec)
  *  3- 0: reserved
  */
 #define IWM_FH_MEM_RCSR_LOWER_BOUND      (IWM_FH_MEM_LOWER_BOUND + 0xC00)
 #define IWM_FH_MEM_RCSR_UPPER_BOUND      (IWM_FH_MEM_LOWER_BOUND + 0xCC0)
 #define IWM_FH_MEM_RCSR_CHNL0            (IWM_FH_MEM_RCSR_LOWER_BOUND)
 
 #define IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG	(IWM_FH_MEM_RCSR_CHNL0)
 #define IWM_FH_MEM_RCSR_CHNL0_RBDCB_WPTR	(IWM_FH_MEM_RCSR_CHNL0 + 0x8)
 #define IWM_FH_MEM_RCSR_CHNL0_FLUSH_RB_REQ	(IWM_FH_MEM_RCSR_CHNL0 + 0x10)
 
 #define IWM_FH_RCSR_CHNL0_RX_CONFIG_RB_TIMEOUT_MSK (0x00000FF0) /* bits 4-11 */
 #define IWM_FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_MSK   (0x00001000) /* bits 12 */
 #define IWM_FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK (0x00008000) /* bit 15 */
 #define IWM_FH_RCSR_CHNL0_RX_CONFIG_RB_SIZE_MSK   (0x00030000) /* bits 16-17 */
 #define IWM_FH_RCSR_CHNL0_RX_CONFIG_RBDBC_SIZE_MSK (0x00F00000) /* bits 20-23 */
 #define IWM_FH_RCSR_CHNL0_RX_CONFIG_DMA_CHNL_EN_MSK (0xC0000000) /* bits 30-31*/
 
 #define IWM_FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS	(20)
 #define IWM_FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS	(4)
 #define IWM_RX_RB_TIMEOUT	(0x11)
 
 #define IWM_FH_RCSR_RX_CONFIG_CHNL_EN_PAUSE_VAL         (0x00000000)
 #define IWM_FH_RCSR_RX_CONFIG_CHNL_EN_PAUSE_EOF_VAL     (0x40000000)
 #define IWM_FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL        (0x80000000)
 
 #define IWM_FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K    (0x00000000)
 #define IWM_FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K    (0x00010000)
 #define IWM_FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_12K   (0x00020000)
 #define IWM_FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_16K   (0x00030000)
 
 #define IWM_FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY              (0x00000004)
 #define IWM_FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_NO_INT_VAL    (0x00000000)
 #define IWM_FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL  (0x00001000)
 
 /**
  * Rx Shared Status Registers (RSSR)
  *
  * After stopping Rx DMA channel (writing 0 to
  * IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG), driver must poll
  * IWM_FH_MEM_RSSR_RX_STATUS_REG until Rx channel is idle.
  *
  * Bit fields:
  *  24:  1 = Channel 0 is idle
  *
  * IWM_FH_MEM_RSSR_SHARED_CTRL_REG and IWM_FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV
  * contain default values that should not be altered by the driver.
  */
 #define IWM_FH_MEM_RSSR_LOWER_BOUND     (IWM_FH_MEM_LOWER_BOUND + 0xC40)
 #define IWM_FH_MEM_RSSR_UPPER_BOUND     (IWM_FH_MEM_LOWER_BOUND + 0xD00)
 
 #define IWM_FH_MEM_RSSR_SHARED_CTRL_REG (IWM_FH_MEM_RSSR_LOWER_BOUND)
 #define IWM_FH_MEM_RSSR_RX_STATUS_REG	(IWM_FH_MEM_RSSR_LOWER_BOUND + 0x004)
 #define IWM_FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV\
 					(IWM_FH_MEM_RSSR_LOWER_BOUND + 0x008)
 
 #define IWM_FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE	(0x01000000)
 
 #define IWM_FH_MEM_TFDIB_REG1_ADDR_BITSHIFT	28
 
 /* TFDB  Area - TFDs buffer table */
 #define IWM_FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK      (0xFFFFFFFF)
 #define IWM_FH_TFDIB_LOWER_BOUND       (IWM_FH_MEM_LOWER_BOUND + 0x900)
 #define IWM_FH_TFDIB_UPPER_BOUND       (IWM_FH_MEM_LOWER_BOUND + 0x958)
 #define IWM_FH_TFDIB_CTRL0_REG(_chnl)  (IWM_FH_TFDIB_LOWER_BOUND + 0x8 * (_chnl))
 #define IWM_FH_TFDIB_CTRL1_REG(_chnl)  (IWM_FH_TFDIB_LOWER_BOUND + 0x8 * (_chnl) + 0x4)
 
 /**
  * Transmit DMA Channel Control/Status Registers (TCSR)
  *
  * Device has one configuration register for each of 8 Tx DMA/FIFO channels
  * supported in hardware (don't confuse these with the 16 Tx queues in DRAM,
  * which feed the DMA/FIFO channels); config regs are separated by 0x20 bytes.
  *
  * To use a Tx DMA channel, driver must initialize its
  * IWM_FH_TCSR_CHNL_TX_CONFIG_REG(chnl) with:
  *
  * IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
  * IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL
  *
  * All other bits should be 0.
  *
  * Bit fields:
  * 31-30: Tx DMA channel enable: '00' off/pause, '01' pause at end of frame,
  *        '10' operate normally
  * 29- 4: Reserved, set to "0"
  *     3: Enable internal DMA requests (1, normal operation), disable (0)
  *  2- 0: Reserved, set to "0"
  */
 #define IWM_FH_TCSR_LOWER_BOUND  (IWM_FH_MEM_LOWER_BOUND + 0xD00)
 #define IWM_FH_TCSR_UPPER_BOUND  (IWM_FH_MEM_LOWER_BOUND + 0xE60)
 
 /* Find Control/Status reg for given Tx DMA/FIFO channel */
 #define IWM_FH_TCSR_CHNL_NUM                            (8)
 
 /* TCSR: tx_config register values */
 #define IWM_FH_TCSR_CHNL_TX_CONFIG_REG(_chnl)	\
 		(IWM_FH_TCSR_LOWER_BOUND + 0x20 * (_chnl))
 #define IWM_FH_TCSR_CHNL_TX_CREDIT_REG(_chnl)	\
 		(IWM_FH_TCSR_LOWER_BOUND + 0x20 * (_chnl) + 0x4)
 #define IWM_FH_TCSR_CHNL_TX_BUF_STS_REG(_chnl)	\
 		(IWM_FH_TCSR_LOWER_BOUND + 0x20 * (_chnl) + 0x8)
 
 #define IWM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF	(0x00000000)
 #define IWM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_DRV	(0x00000001)
 
 #define IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE	(0x00000000)
 #define IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE		(0x00000008)
 
 #define IWM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_NOINT	(0x00000000)
 #define IWM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD	(0x00100000)
 #define IWM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD	(0x00200000)
 
 #define IWM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT	(0x00000000)
 #define IWM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_ENDTFD	(0x00400000)
 #define IWM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_IFTFD	(0x00800000)
 
 #define IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE		(0x00000000)
 #define IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE_EOF	(0x40000000)
 #define IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE		(0x80000000)
 
 #define IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_EMPTY	(0x00000000)
 #define IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_WAIT	(0x00002000)
 #define IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID	(0x00000003)
 
 #define IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM		(20)
 #define IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX		(12)
 
 /**
  * Tx Shared Status Registers (TSSR)
  *
  * After stopping Tx DMA channel (writing 0 to
  * IWM_FH_TCSR_CHNL_TX_CONFIG_REG(chnl)), driver must poll
  * IWM_FH_TSSR_TX_STATUS_REG until selected Tx channel is idle
  * (channel's buffers empty | no pending requests).
  *
  * Bit fields:
  * 31-24:  1 = Channel buffers empty (channel 7:0)
  * 23-16:  1 = No pending requests (channel 7:0)
  */
 #define IWM_FH_TSSR_LOWER_BOUND		(IWM_FH_MEM_LOWER_BOUND + 0xEA0)
 #define IWM_FH_TSSR_UPPER_BOUND		(IWM_FH_MEM_LOWER_BOUND + 0xEC0)
 
 #define IWM_FH_TSSR_TX_STATUS_REG	(IWM_FH_TSSR_LOWER_BOUND + 0x010)
 
 /**
  * Bit fields for TSSR(Tx Shared Status & Control) error status register:
  * 31:  Indicates an address error when accessed to internal memory
  *	uCode/driver must write "1" in order to clear this flag
  * 30:  Indicates that Host did not send the expected number of dwords to FH
  *	uCode/driver must write "1" in order to clear this flag
  * 16-9:Each status bit is for one channel. Indicates that an (Error) ActDMA
  *	command was received from the scheduler while the TRB was already full
  *	with previous command
  *	uCode/driver must write "1" in order to clear this flag
  * 7-0: Each status bit indicates a channel's TxCredit error. When an error
  *	bit is set, it indicates that the FH has received a full indication
  *	from the RTC TxFIFO and the current value of the TxCredit counter was
  *	not equal to zero. This mean that the credit mechanism was not
  *	synchronized to the TxFIFO status
  *	uCode/driver must write "1" in order to clear this flag
  */
 #define IWM_FH_TSSR_TX_ERROR_REG	(IWM_FH_TSSR_LOWER_BOUND + 0x018)
 #define IWM_FH_TSSR_TX_MSG_CONFIG_REG	(IWM_FH_TSSR_LOWER_BOUND + 0x008)
 
 #define IWM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(_chnl) ((1 << (_chnl)) << 16)
 
 /* Tx service channels */
 #define IWM_FH_SRVC_CHNL		(9)
 #define IWM_FH_SRVC_LOWER_BOUND	(IWM_FH_MEM_LOWER_BOUND + 0x9C8)
 #define IWM_FH_SRVC_UPPER_BOUND	(IWM_FH_MEM_LOWER_BOUND + 0x9D0)
 #define IWM_FH_SRVC_CHNL_SRAM_ADDR_REG(_chnl) \
 		(IWM_FH_SRVC_LOWER_BOUND + ((_chnl) - 9) * 0x4)
 
 #define IWM_FH_TX_CHICKEN_BITS_REG	(IWM_FH_MEM_LOWER_BOUND + 0xE98)
 #define IWM_FH_TX_TRB_REG(_chan)	(IWM_FH_MEM_LOWER_BOUND + 0x958 + \
 					(_chan) * 4)
 
 /* Instruct FH to increment the retry count of a packet when
  * it is brought from the memory to TX-FIFO
  */
 #define IWM_FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN	(0x00000002)
 
 #define IWM_RX_QUEUE_SIZE                         256
 #define IWM_RX_QUEUE_MASK                         255
 #define IWM_RX_QUEUE_SIZE_LOG                     8
 
 /*
  * RX related structures and functions
  */
 #define IWM_RX_FREE_BUFFERS 64
 #define IWM_RX_LOW_WATERMARK 8
 
 /**
  * struct iwm_rb_status - reseve buffer status
  * 	host memory mapped FH registers
  * @closed_rb_num [0:11] - Indicates the index of the RB which was closed
  * @closed_fr_num [0:11] - Indicates the index of the RX Frame which was closed
  * @finished_rb_num [0:11] - Indicates the index of the current RB
  * 	in which the last frame was written to
  * @finished_fr_num [0:11] - Indicates the index of the RX Frame
  * 	which was transferred
  */
 struct iwm_rb_status {
 	uint16_t closed_rb_num;
 	uint16_t closed_fr_num;
 	uint16_t finished_rb_num;
 	uint16_t finished_fr_nam;
 	uint32_t unused;
 } __packed;
 
 
 #define IWM_TFD_QUEUE_SIZE_MAX		(256)
 #define IWM_TFD_QUEUE_SIZE_BC_DUP	(64)
 #define IWM_TFD_QUEUE_BC_SIZE		(IWM_TFD_QUEUE_SIZE_MAX + \
 					IWM_TFD_QUEUE_SIZE_BC_DUP)
 #define IWM_TX_DMA_MASK        DMA_BIT_MASK(36)
 #define IWM_NUM_OF_TBS		20
 
 static inline uint8_t iwm_get_dma_hi_addr(bus_addr_t addr)
 {
 	return (sizeof(addr) > sizeof(uint32_t) ? (addr >> 16) >> 16 : 0) & 0xF;
 }
 /**
  * struct iwm_tfd_tb transmit buffer descriptor within transmit frame descriptor
  *
  * This structure contains dma address and length of transmission address
  *
  * @lo: low [31:0] portion of the dma address of TX buffer
  * 	every even is unaligned on 16 bit boundary
  * @hi_n_len 0-3 [35:32] portion of dma
  *	     4-15 length of the tx buffer
  */
 struct iwm_tfd_tb {
 	uint32_t lo;
 	uint16_t hi_n_len;
 } __packed;
 
 /**
  * struct iwm_tfd
  *
  * Transmit Frame Descriptor (TFD)
  *
  * @ __reserved1[3] reserved
  * @ num_tbs 0-4 number of active tbs
  *	     5   reserved
  * 	     6-7 padding (not used)
  * @ tbs[20]	transmit frame buffer descriptors
  * @ __pad 	padding
  *
  * Each Tx queue uses a circular buffer of 256 TFDs stored in host DRAM.
  * Both driver and device share these circular buffers, each of which must be
  * contiguous 256 TFDs x 128 bytes-per-TFD = 32 KBytes
  *
  * Driver must indicate the physical address of the base of each
  * circular buffer via the IWM_FH_MEM_CBBC_QUEUE registers.
  *
  * Each TFD contains pointer/size information for up to 20 data buffers
  * in host DRAM.  These buffers collectively contain the (one) frame described
  * by the TFD.  Each buffer must be a single contiguous block of memory within
  * itself, but buffers may be scattered in host DRAM.  Each buffer has max size
  * of (4K - 4).  The concatenates all of a TFD's buffers into a single
  * Tx frame, up to 8 KBytes in size.
  *
  * A maximum of 255 (not 256!) TFDs may be on a queue waiting for Tx.
  */
 struct iwm_tfd {
 	uint8_t __reserved1[3];
 	uint8_t num_tbs;
 	struct iwm_tfd_tb tbs[IWM_NUM_OF_TBS];
 	uint32_t __pad;
 } __packed;
 
 /* Keep Warm Size */
 #define IWM_KW_SIZE 0x1000	/* 4k */
 
 /* Fixed (non-configurable) rx data from phy */
 
 /**
  * struct iwm_agn_schedq_bc_tbl scheduler byte count table
  *	base physical address provided by IWM_SCD_DRAM_BASE_ADDR
  * @tfd_offset  0-12 - tx command byte count
  *	       12-16 - station index
  */
 struct iwm_agn_scd_bc_tbl {
 	uint16_t tfd_offset[IWM_TFD_QUEUE_BC_SIZE];
 } __packed;
 
 /*
  * END iwl-fh.h
  */
 
 /*
  * BEGIN mvm/fw-api.h
  */
 
 /* Maximum number of Tx queues. */
 #define IWM_MVM_MAX_QUEUES	31
 
 /* Tx queue numbers */
 enum {
 	IWM_MVM_OFFCHANNEL_QUEUE = 8,
 	IWM_MVM_CMD_QUEUE = 9,
 	IWM_MVM_AUX_QUEUE = 15,
 };
 
 enum iwm_mvm_tx_fifo {
 	IWM_MVM_TX_FIFO_BK = 0,
 	IWM_MVM_TX_FIFO_BE,
 	IWM_MVM_TX_FIFO_VI,
 	IWM_MVM_TX_FIFO_VO,
 	IWM_MVM_TX_FIFO_MCAST = 5,
 	IWM_MVM_TX_FIFO_CMD = 7,
 };
 
 #define IWM_MVM_STATION_COUNT	16
 
 /* commands */
 enum {
 	IWM_MVM_ALIVE = 0x1,
 	IWM_REPLY_ERROR = 0x2,
 
 	IWM_INIT_COMPLETE_NOTIF = 0x4,
 
 	/* PHY context commands */
 	IWM_PHY_CONTEXT_CMD = 0x8,
 	IWM_DBG_CFG = 0x9,
 
 	/* UMAC scan commands */
 	IWM_SCAN_ITERATION_COMPLETE_UMAC = 0xb5,
 	IWM_SCAN_CFG_CMD = 0xc,
 	IWM_SCAN_REQ_UMAC = 0xd,
 	IWM_SCAN_ABORT_UMAC = 0xe,
 	IWM_SCAN_COMPLETE_UMAC = 0xf,
 
 	/* station table */
 	IWM_ADD_STA_KEY = 0x17,
 	IWM_ADD_STA = 0x18,
 	IWM_REMOVE_STA = 0x19,
 
 	/* TX */
 	IWM_TX_CMD = 0x1c,
 	IWM_TXPATH_FLUSH = 0x1e,
 	IWM_MGMT_MCAST_KEY = 0x1f,
 
 	/* scheduler config */
 	IWM_SCD_QUEUE_CFG = 0x1d,
 
 	/* global key */
 	IWM_WEP_KEY = 0x20,
 
 	/* MAC and Binding commands */
 	IWM_MAC_CONTEXT_CMD = 0x28,
 	IWM_TIME_EVENT_CMD = 0x29, /* both CMD and response */
 	IWM_TIME_EVENT_NOTIFICATION = 0x2a,
 	IWM_BINDING_CONTEXT_CMD = 0x2b,
 	IWM_TIME_QUOTA_CMD = 0x2c,
 	IWM_NON_QOS_TX_COUNTER_CMD = 0x2d,
 
 	IWM_LQ_CMD = 0x4e,
 
-	/* Calibration */
-	IWM_TEMPERATURE_NOTIFICATION = 0x62,
-	IWM_CALIBRATION_CFG_CMD = 0x65,
-	IWM_CALIBRATION_RES_NOTIFICATION = 0x66,
-	IWM_CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
-	IWM_RADIO_VERSION_NOTIFICATION = 0x68,
+	/* paging block to FW cpu2 */
+	IWM_FW_PAGING_BLOCK_CMD = 0x4f,
 
 	/* Scan offload */
 	IWM_SCAN_OFFLOAD_REQUEST_CMD = 0x51,
 	IWM_SCAN_OFFLOAD_ABORT_CMD = 0x52,
 	IWM_HOT_SPOT_CMD = 0x53,
 	IWM_SCAN_OFFLOAD_COMPLETE = 0x6d,
 	IWM_SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6e,
 	IWM_SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
 	IWM_MATCH_FOUND_NOTIFICATION = 0xd9,
 	IWM_SCAN_ITERATION_COMPLETE = 0xe7,
 
 	/* Phy */
 	IWM_PHY_CONFIGURATION_CMD = 0x6a,
 	IWM_CALIB_RES_NOTIF_PHY_DB = 0x6b,
 	/* IWM_PHY_DB_CMD = 0x6c, */
 
 	/* Power - legacy power table command */
 	IWM_POWER_TABLE_CMD = 0x77,
 	IWM_PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
 
 	/* Thermal Throttling*/
 	IWM_REPLY_THERMAL_MNG_BACKOFF = 0x7e,
 
 	/* Scanning */
 	IWM_SCAN_ABORT_CMD = 0x81,
 	IWM_SCAN_START_NOTIFICATION = 0x82,
 	IWM_SCAN_RESULTS_NOTIFICATION = 0x83,
 
 	/* NVM */
 	IWM_NVM_ACCESS_CMD = 0x88,
 
 	IWM_SET_CALIB_DEFAULT_CMD = 0x8e,
 
 	IWM_BEACON_NOTIFICATION = 0x90,
 	IWM_BEACON_TEMPLATE_CMD = 0x91,
 	IWM_TX_ANT_CONFIGURATION_CMD = 0x98,
 	IWM_BT_CONFIG = 0x9b,
 	IWM_STATISTICS_NOTIFICATION = 0x9d,
 	IWM_REDUCE_TX_POWER_CMD = 0x9f,
 
 	/* RF-KILL commands and notifications */
 	IWM_CARD_STATE_CMD = 0xa0,
 	IWM_CARD_STATE_NOTIFICATION = 0xa1,
 
 	IWM_MISSED_BEACONS_NOTIFICATION = 0xa2,
 
 	IWM_MFUART_LOAD_NOTIFICATION = 0xb1,
 
 	/* Power - new power table command */
 	IWM_MAC_PM_POWER_TABLE = 0xa9,
 
 	IWM_REPLY_RX_PHY_CMD = 0xc0,
 	IWM_REPLY_RX_MPDU_CMD = 0xc1,
 	IWM_BA_NOTIF = 0xc5,
 
 	/* Location Aware Regulatory */
 	IWM_MCC_UPDATE_CMD = 0xc8,
 	IWM_MCC_CHUB_UPDATE_CMD = 0xc9,
 
 	/* BT Coex */
 	IWM_BT_COEX_PRIO_TABLE = 0xcc,
 	IWM_BT_COEX_PROT_ENV = 0xcd,
 	IWM_BT_PROFILE_NOTIFICATION = 0xce,
 	IWM_BT_COEX_CI = 0x5d,
 
 	IWM_REPLY_SF_CFG_CMD = 0xd1,
 	IWM_REPLY_BEACON_FILTERING_CMD = 0xd2,
 
 	/* DTS measurements */
 	IWM_CMD_DTS_MEASUREMENT_TRIGGER = 0xdc,
 	IWM_DTS_MEASUREMENT_NOTIFICATION = 0xdd,
 
 	IWM_REPLY_DEBUG_CMD = 0xf0,
 	IWM_DEBUG_LOG_MSG = 0xf7,
 
 	IWM_MCAST_FILTER_CMD = 0xd0,
 
 	/* D3 commands/notifications */
 	IWM_D3_CONFIG_CMD = 0xd3,
 	IWM_PROT_OFFLOAD_CONFIG_CMD = 0xd4,
 	IWM_OFFLOADS_QUERY_CMD = 0xd5,
 	IWM_REMOTE_WAKE_CONFIG_CMD = 0xd6,
 
 	/* for WoWLAN in particular */
 	IWM_WOWLAN_PATTERNS = 0xe0,
 	IWM_WOWLAN_CONFIGURATION = 0xe1,
 	IWM_WOWLAN_TSC_RSC_PARAM = 0xe2,
 	IWM_WOWLAN_TKIP_PARAM = 0xe3,
 	IWM_WOWLAN_KEK_KCK_MATERIAL = 0xe4,
 	IWM_WOWLAN_GET_STATUSES = 0xe5,
 	IWM_WOWLAN_TX_POWER_PER_DB = 0xe6,
 
 	/* and for NetDetect */
 	IWM_NET_DETECT_CONFIG_CMD = 0x54,
 	IWM_NET_DETECT_PROFILES_QUERY_CMD = 0x56,
 	IWM_NET_DETECT_PROFILES_CMD = 0x57,
 	IWM_NET_DETECT_HOTSPOTS_CMD = 0x58,
 	IWM_NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59,
 
 	IWM_REPLY_MAX = 0xff,
 };
 
 enum iwm_phy_ops_subcmd_ids {
 	IWM_CMD_DTS_MEASUREMENT_TRIGGER_WIDE = 0x0,
 	IWM_CTDP_CONFIG_CMD = 0x03,
 	IWM_TEMP_REPORTING_THRESHOLDS_CMD = 0x04,
 	IWM_CT_KILL_NOTIFICATION = 0xFE,
 	IWM_DTS_MEASUREMENT_NOTIF_WIDE = 0xFF,
 };
 
 /* command groups */
 enum {
 	IWM_LEGACY_GROUP = 0x0,
 	IWM_LONG_GROUP = 0x1,
 	IWM_SYSTEM_GROUP = 0x2,
 	IWM_MAC_CONF_GROUP = 0x3,
 	IWM_PHY_OPS_GROUP = 0x4,
 	IWM_DATA_PATH_GROUP = 0x5,
 	IWM_PROT_OFFLOAD_GROUP = 0xb,
 };
 
 /**
  * struct iwm_cmd_response - generic response struct for most commands
  * @status: status of the command asked, changes for each one
  */
 struct iwm_cmd_response {
 	uint32_t status;
 };
 
 /*
  * struct iwm_tx_ant_cfg_cmd
  * @valid: valid antenna configuration
  */
 struct iwm_tx_ant_cfg_cmd {
 	uint32_t valid;
 } __packed;
 
 /**
  * struct iwm_reduce_tx_power_cmd - TX power reduction command
  * IWM_REDUCE_TX_POWER_CMD = 0x9f
  * @flags: (reserved for future implementation)
  * @mac_context_id: id of the mac ctx for which we are reducing TX power.
  * @pwr_restriction: TX power restriction in dBms.
  */
 struct iwm_reduce_tx_power_cmd {
 	uint8_t flags;
 	uint8_t mac_context_id;
 	uint16_t pwr_restriction;
 } __packed; /* IWM_TX_REDUCED_POWER_API_S_VER_1 */
 
 /*
  * Calibration control struct.
  * Sent as part of the phy configuration command.
  * @flow_trigger: bitmap for which calibrations to perform according to
  *		flow triggers.
  * @event_trigger: bitmap for which calibrations to perform according to
  *		event triggers.
  */
 struct iwm_calib_ctrl {
 	uint32_t flow_trigger;
 	uint32_t event_trigger;
 } __packed;
 
 /* This enum defines the bitmap of various calibrations to enable in both
  * init ucode and runtime ucode through IWM_CALIBRATION_CFG_CMD.
  */
 enum iwm_calib_cfg {
 	IWM_CALIB_CFG_XTAL_IDX			= (1 << 0),
 	IWM_CALIB_CFG_TEMPERATURE_IDX		= (1 << 1),
 	IWM_CALIB_CFG_VOLTAGE_READ_IDX		= (1 << 2),
 	IWM_CALIB_CFG_PAPD_IDX			= (1 << 3),
 	IWM_CALIB_CFG_TX_PWR_IDX		= (1 << 4),
 	IWM_CALIB_CFG_DC_IDX			= (1 << 5),
 	IWM_CALIB_CFG_BB_FILTER_IDX		= (1 << 6),
 	IWM_CALIB_CFG_LO_LEAKAGE_IDX		= (1 << 7),
 	IWM_CALIB_CFG_TX_IQ_IDX			= (1 << 8),
 	IWM_CALIB_CFG_TX_IQ_SKEW_IDX		= (1 << 9),
 	IWM_CALIB_CFG_RX_IQ_IDX			= (1 << 10),
 	IWM_CALIB_CFG_RX_IQ_SKEW_IDX		= (1 << 11),
 	IWM_CALIB_CFG_SENSITIVITY_IDX		= (1 << 12),
 	IWM_CALIB_CFG_CHAIN_NOISE_IDX		= (1 << 13),
 	IWM_CALIB_CFG_DISCONNECTED_ANT_IDX	= (1 << 14),
 	IWM_CALIB_CFG_ANT_COUPLING_IDX		= (1 << 15),
 	IWM_CALIB_CFG_DAC_IDX			= (1 << 16),
 	IWM_CALIB_CFG_ABS_IDX			= (1 << 17),
 	IWM_CALIB_CFG_AGC_IDX			= (1 << 18),
 };
 
 /*
  * Phy configuration command.
  */
 struct iwm_phy_cfg_cmd {
 	uint32_t	phy_cfg;
 	struct iwm_calib_ctrl calib_control;
 } __packed;
 
 #define IWM_PHY_CFG_RADIO_TYPE	((1 << 0) | (1 << 1))
 #define IWM_PHY_CFG_RADIO_STEP	((1 << 2) | (1 << 3))
 #define IWM_PHY_CFG_RADIO_DASH	((1 << 4) | (1 << 5))
 #define IWM_PHY_CFG_PRODUCT_NUMBER	((1 << 6) | (1 << 7))
 #define IWM_PHY_CFG_TX_CHAIN_A	(1 << 8)
 #define IWM_PHY_CFG_TX_CHAIN_B	(1 << 9)
 #define IWM_PHY_CFG_TX_CHAIN_C	(1 << 10)
 #define IWM_PHY_CFG_RX_CHAIN_A	(1 << 12)
 #define IWM_PHY_CFG_RX_CHAIN_B	(1 << 13)
 #define IWM_PHY_CFG_RX_CHAIN_C	(1 << 14)
 
 
 /* Target of the IWM_NVM_ACCESS_CMD */
 enum {
 	IWM_NVM_ACCESS_TARGET_CACHE = 0,
 	IWM_NVM_ACCESS_TARGET_OTP = 1,
 	IWM_NVM_ACCESS_TARGET_EEPROM = 2,
 };
 
 /* Section types for IWM_NVM_ACCESS_CMD */
 enum {
 	IWM_NVM_SECTION_TYPE_SW = 1,
 	IWM_NVM_SECTION_TYPE_REGULATORY = 3,
 	IWM_NVM_SECTION_TYPE_CALIBRATION = 4,
 	IWM_NVM_SECTION_TYPE_PRODUCTION = 5,
 	IWM_NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
 	IWM_NVM_SECTION_TYPE_PHY_SKU = 12,
 	IWM_NVM_MAX_NUM_SECTIONS = 13,
 };
 
 /**
  * struct iwm_nvm_access_cmd_ver2 - Request the device to send an NVM section
  * @op_code: 0 - read, 1 - write
  * @target: IWM_NVM_ACCESS_TARGET_*
  * @type: IWM_NVM_SECTION_TYPE_*
  * @offset: offset in bytes into the section
  * @length: in bytes, to read/write
  * @data: if write operation, the data to write. On read its empty
  */
 struct iwm_nvm_access_cmd {
 	uint8_t op_code;
 	uint8_t target;
 	uint16_t type;
 	uint16_t offset;
 	uint16_t length;
 	uint8_t data[];
 } __packed; /* IWM_NVM_ACCESS_CMD_API_S_VER_2 */
+
+#define IWM_NUM_OF_FW_PAGING_BLOCKS 33 /* 32 for data and 1 block for CSS */
+
+/*
+ * struct iwm_fw_paging_cmd - paging layout
+ *
+ * (IWM_FW_PAGING_BLOCK_CMD = 0x4f)
+ *
+ * Send to FW the paging layout in the driver.
+ *
+ * @flags: various flags for the command
+ * @block_size: the block size in powers of 2
+ * @block_num: number of blocks specified in the command.
+ * @device_phy_addr: virtual addresses from device side
+*/
+struct iwm_fw_paging_cmd {
+	uint32_t flags;
+	uint32_t block_size;
+	uint32_t block_num;
+	uint32_t device_phy_addr[IWM_NUM_OF_FW_PAGING_BLOCKS];
+} __packed; /* IWM_FW_PAGING_BLOCK_CMD_API_S_VER_1 */
+
+/*
+ * Fw items ID's
+ *
+ * @IWM_FW_ITEM_ID_PAGING: Address of the pages that the FW will upload
+ *      download
+ */
+enum iwm_fw_item_id {
+	IWM_FW_ITEM_ID_PAGING = 3,
+};
+
+/*
+ * struct iwm_fw_get_item_cmd - get an item from the fw
+ */
+struct iwm_fw_get_item_cmd {
+	uint32_t item_id;
+} __packed; /* IWM_FW_GET_ITEM_CMD_API_S_VER_1 */
 
 /**
  * struct iwm_nvm_access_resp_ver2 - response to IWM_NVM_ACCESS_CMD
  * @offset: offset in bytes into the section
  * @length: in bytes, either how much was written or read
  * @type: IWM_NVM_SECTION_TYPE_*
  * @status: 0 for success, fail otherwise
  * @data: if read operation, the data returned. Empty on write.
  */
 struct iwm_nvm_access_resp {
 	uint16_t offset;
 	uint16_t length;
 	uint16_t type;
 	uint16_t status;
 	uint8_t data[];
 } __packed; /* IWM_NVM_ACCESS_CMD_RESP_API_S_VER_2 */
 
 /* IWM_MVM_ALIVE 0x1 */
 
 /* alive response is_valid values */
 #define IWM_ALIVE_RESP_UCODE_OK	(1 << 0)
 #define IWM_ALIVE_RESP_RFKILL	(1 << 1)
 
 /* alive response ver_type values */
 enum {
 	IWM_FW_TYPE_HW = 0,
 	IWM_FW_TYPE_PROT = 1,
 	IWM_FW_TYPE_AP = 2,
 	IWM_FW_TYPE_WOWLAN = 3,
 	IWM_FW_TYPE_TIMING = 4,
 	IWM_FW_TYPE_WIPAN = 5
 };
 
 /* alive response ver_subtype values */
 enum {
 	IWM_FW_SUBTYPE_FULL_FEATURE = 0,
 	IWM_FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
 	IWM_FW_SUBTYPE_REDUCED = 2,
 	IWM_FW_SUBTYPE_ALIVE_ONLY = 3,
 	IWM_FW_SUBTYPE_WOWLAN = 4,
 	IWM_FW_SUBTYPE_AP_SUBTYPE = 5,
 	IWM_FW_SUBTYPE_WIPAN = 6,
 	IWM_FW_SUBTYPE_INITIALIZE = 9
 };
 
 #define IWM_ALIVE_STATUS_ERR 0xDEAD
 #define IWM_ALIVE_STATUS_OK 0xCAFE
 
 #define IWM_ALIVE_FLG_RFKILL	(1 << 0)
 
 struct iwm_mvm_alive_resp_ver1 {
 	uint16_t status;
 	uint16_t flags;
 	uint8_t ucode_minor;
 	uint8_t ucode_major;
 	uint16_t id;
 	uint8_t api_minor;
 	uint8_t api_major;
 	uint8_t ver_subtype;
 	uint8_t ver_type;
 	uint8_t mac;
 	uint8_t opt;
 	uint16_t reserved2;
 	uint32_t timestamp;
 	uint32_t error_event_table_ptr;	/* SRAM address for error log */
 	uint32_t log_event_table_ptr;	/* SRAM address for event log */
 	uint32_t cpu_register_ptr;
 	uint32_t dbgm_config_ptr;
 	uint32_t alive_counter_ptr;
 	uint32_t scd_base_ptr;		/* SRAM address for SCD */
 } __packed; /* IWM_ALIVE_RES_API_S_VER_1 */
 
 struct iwm_mvm_alive_resp_ver2 {
 	uint16_t status;
 	uint16_t flags;
 	uint8_t ucode_minor;
 	uint8_t ucode_major;
 	uint16_t id;
 	uint8_t api_minor;
 	uint8_t api_major;
 	uint8_t ver_subtype;
 	uint8_t ver_type;
 	uint8_t mac;
 	uint8_t opt;
 	uint16_t reserved2;
 	uint32_t timestamp;
 	uint32_t error_event_table_ptr;	/* SRAM address for error log */
 	uint32_t log_event_table_ptr;	/* SRAM address for LMAC event log */
 	uint32_t cpu_register_ptr;
 	uint32_t dbgm_config_ptr;
 	uint32_t alive_counter_ptr;
 	uint32_t scd_base_ptr;		/* SRAM address for SCD */
 	uint32_t st_fwrd_addr;		/* pointer to Store and forward */
 	uint32_t st_fwrd_size;
 	uint8_t umac_minor;		/* UMAC version: minor */
 	uint8_t umac_major;		/* UMAC version: major */
 	uint16_t umac_id;		/* UMAC version: id */
 	uint32_t error_info_addr;	/* SRAM address for UMAC error log */
 	uint32_t dbg_print_buff_addr;
 } __packed; /* ALIVE_RES_API_S_VER_2 */
 
 struct iwm_mvm_alive_resp {
 	uint16_t status;
 	uint16_t flags;
 	uint32_t ucode_minor;
 	uint32_t ucode_major;
 	uint8_t ver_subtype;
 	uint8_t ver_type;
 	uint8_t mac;
 	uint8_t opt;
 	uint32_t timestamp;
 	uint32_t error_event_table_ptr;	/* SRAM address for error log */
 	uint32_t log_event_table_ptr;	/* SRAM address for LMAC event log */
 	uint32_t cpu_register_ptr;
 	uint32_t dbgm_config_ptr;
 	uint32_t alive_counter_ptr;
 	uint32_t scd_base_ptr;		/* SRAM address for SCD */
 	uint32_t st_fwrd_addr;		/* pointer to Store and forward */
 	uint32_t st_fwrd_size;
 	uint32_t umac_minor;		/* UMAC version: minor */
 	uint32_t umac_major;		/* UMAC version: major */
 	uint32_t error_info_addr;	/* SRAM address for UMAC error log */
 	uint32_t dbg_print_buff_addr;
 } __packed; /* ALIVE_RES_API_S_VER_3 */
 
 /* Error response/notification */
 enum {
 	IWM_FW_ERR_UNKNOWN_CMD = 0x0,
 	IWM_FW_ERR_INVALID_CMD_PARAM = 0x1,
 	IWM_FW_ERR_SERVICE = 0x2,
 	IWM_FW_ERR_ARC_MEMORY = 0x3,
 	IWM_FW_ERR_ARC_CODE = 0x4,
 	IWM_FW_ERR_WATCH_DOG = 0x5,
 	IWM_FW_ERR_WEP_GRP_KEY_INDX = 0x10,
 	IWM_FW_ERR_WEP_KEY_SIZE = 0x11,
 	IWM_FW_ERR_OBSOLETE_FUNC = 0x12,
 	IWM_FW_ERR_UNEXPECTED = 0xFE,
 	IWM_FW_ERR_FATAL = 0xFF
 };
 
 /**
  * struct iwm_error_resp - FW error indication
  * ( IWM_REPLY_ERROR = 0x2 )
  * @error_type: one of IWM_FW_ERR_*
  * @cmd_id: the command ID for which the error occurred
  * @bad_cmd_seq_num: sequence number of the erroneous command
  * @error_service: which service created the error, applicable only if
  *	error_type = 2, otherwise 0
  * @timestamp: TSF in usecs.
  */
 struct iwm_error_resp {
 	uint32_t error_type;
 	uint8_t cmd_id;
 	uint8_t reserved1;
 	uint16_t bad_cmd_seq_num;
 	uint32_t error_service;
 	uint64_t timestamp;
 } __packed;
 
 
 /* Common PHY, MAC and Bindings definitions */
 
 #define IWM_MAX_MACS_IN_BINDING	(3)
 #define IWM_MAX_BINDINGS		(4)
 #define IWM_AUX_BINDING_INDEX	(3)
 #define IWM_MAX_PHYS		(4)
 
 /* Used to extract ID and color from the context dword */
 #define IWM_FW_CTXT_ID_POS	  (0)
 #define IWM_FW_CTXT_ID_MSK	  (0xff << IWM_FW_CTXT_ID_POS)
 #define IWM_FW_CTXT_COLOR_POS (8)
 #define IWM_FW_CTXT_COLOR_MSK (0xff << IWM_FW_CTXT_COLOR_POS)
 #define IWM_FW_CTXT_INVALID	  (0xffffffff)
 
 #define IWM_FW_CMD_ID_AND_COLOR(_id, _color) ((_id << IWM_FW_CTXT_ID_POS) |\
 					  (_color << IWM_FW_CTXT_COLOR_POS))
 
 /* Possible actions on PHYs, MACs and Bindings */
 enum {
 	IWM_FW_CTXT_ACTION_STUB = 0,
 	IWM_FW_CTXT_ACTION_ADD,
 	IWM_FW_CTXT_ACTION_MODIFY,
 	IWM_FW_CTXT_ACTION_REMOVE,
 	IWM_FW_CTXT_ACTION_NUM
 }; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
 
 /* Time Events */
 
 /* Time Event types, according to MAC type */
 enum iwm_time_event_type {
 	/* BSS Station Events */
 	IWM_TE_BSS_STA_AGGRESSIVE_ASSOC,
 	IWM_TE_BSS_STA_ASSOC,
 	IWM_TE_BSS_EAP_DHCP_PROT,
 	IWM_TE_BSS_QUIET_PERIOD,
 
 	/* P2P Device Events */
 	IWM_TE_P2P_DEVICE_DISCOVERABLE,
 	IWM_TE_P2P_DEVICE_LISTEN,
 	IWM_TE_P2P_DEVICE_ACTION_SCAN,
 	IWM_TE_P2P_DEVICE_FULL_SCAN,
 
 	/* P2P Client Events */
 	IWM_TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
 	IWM_TE_P2P_CLIENT_ASSOC,
 	IWM_TE_P2P_CLIENT_QUIET_PERIOD,
 
 	/* P2P GO Events */
 	IWM_TE_P2P_GO_ASSOC_PROT,
 	IWM_TE_P2P_GO_REPETITIVE_NOA,
 	IWM_TE_P2P_GO_CT_WINDOW,
 
 	/* WiDi Sync Events */
 	IWM_TE_WIDI_TX_SYNC,
 
 	IWM_TE_MAX
 }; /* IWM_MAC_EVENT_TYPE_API_E_VER_1 */
 
 
 
 /* Time event - defines for command API v1 */
 
 /*
  * @IWM_TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
  * @IWM_TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
  *	the first fragment is scheduled.
  * @IWM_TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
  *	the first 2 fragments are scheduled.
  * @IWM_TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
  *	number of fragments are valid.
  *
  * Other than the constant defined above, specifying a fragmentation value 'x'
  * means that the event can be fragmented but only the first 'x' will be
  * scheduled.
  */
 enum {
 	IWM_TE_V1_FRAG_NONE = 0,
 	IWM_TE_V1_FRAG_SINGLE = 1,
 	IWM_TE_V1_FRAG_DUAL = 2,
 	IWM_TE_V1_FRAG_ENDLESS = 0xffffffff
 };
 
 /* If a Time Event can be fragmented, this is the max number of fragments */
 #define IWM_TE_V1_FRAG_MAX_MSK		0x0fffffff
 /* Repeat the time event endlessly (until removed) */
 #define IWM_TE_V1_REPEAT_ENDLESS	0xffffffff
 /* If a Time Event has bounded repetitions, this is the maximal value */
 #define IWM_TE_V1_REPEAT_MAX_MSK_V1	0x0fffffff
 
 /* Time Event dependencies: none, on another TE, or in a specific time */
 enum {
 	IWM_TE_V1_INDEPENDENT		= 0,
 	IWM_TE_V1_DEP_OTHER		= (1 << 0),
 	IWM_TE_V1_DEP_TSF		= (1 << 1),
 	IWM_TE_V1_EVENT_SOCIOPATHIC	= (1 << 2),
 }; /* IWM_MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
 
 /*
  * @IWM_TE_V1_NOTIF_NONE: no notifications
  * @IWM_TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
  * @IWM_TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
  * @IWM_TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
  * @IWM_TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
  * @IWM_TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
  * @IWM_TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
  * @IWM_TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
  * @IWM_TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
  *
  * Supported Time event notifications configuration.
  * A notification (both event and fragment) includes a status indicating weather
  * the FW was able to schedule the event or not. For fragment start/end
  * notification the status is always success. There is no start/end fragment
  * notification for monolithic events.
  */
 enum {
 	IWM_TE_V1_NOTIF_NONE = 0,
 	IWM_TE_V1_NOTIF_HOST_EVENT_START = (1 << 0),
 	IWM_TE_V1_NOTIF_HOST_EVENT_END = (1 << 1),
 	IWM_TE_V1_NOTIF_INTERNAL_EVENT_START = (1 << 2),
 	IWM_TE_V1_NOTIF_INTERNAL_EVENT_END = (1 << 3),
 	IWM_TE_V1_NOTIF_HOST_FRAG_START = (1 << 4),
 	IWM_TE_V1_NOTIF_HOST_FRAG_END = (1 << 5),
 	IWM_TE_V1_NOTIF_INTERNAL_FRAG_START = (1 << 6),
 	IWM_TE_V1_NOTIF_INTERNAL_FRAG_END = (1 << 7),
 	IWM_T2_V2_START_IMMEDIATELY = (1 << 11),
 }; /* IWM_MAC_EVENT_ACTION_API_E_VER_2 */
 
 
 /**
  * struct iwm_time_event_cmd_api_v1 - configuring Time Events
  * with struct IWM_MAC_TIME_EVENT_DATA_API_S_VER_1 (see also
  * with version 2. determined by IWM_UCODE_TLV_FLAGS)
  * ( IWM_TIME_EVENT_CMD = 0x29 )
  * @id_and_color: ID and color of the relevant MAC
  * @action: action to perform, one of IWM_FW_CTXT_ACTION_*
  * @id: this field has two meanings, depending on the action:
  *	If the action is ADD, then it means the type of event to add.
  *	For all other actions it is the unique event ID assigned when the
  *	event was added by the FW.
  * @apply_time: When to start the Time Event (in GP2)
  * @max_delay: maximum delay to event's start (apply time), in TU
  * @depends_on: the unique ID of the event we depend on (if any)
  * @interval: interval between repetitions, in TU
  * @interval_reciprocal: 2^32 / interval
  * @duration: duration of event in TU
  * @repeat: how many repetitions to do, can be IWM_TE_REPEAT_ENDLESS
  * @dep_policy: one of IWM_TE_V1_INDEPENDENT, IWM_TE_V1_DEP_OTHER, IWM_TE_V1_DEP_TSF
  *	and IWM_TE_V1_EVENT_SOCIOPATHIC
  * @is_present: 0 or 1, are we present or absent during the Time Event
  * @max_frags: maximal number of fragments the Time Event can be divided to
  * @notify: notifications using IWM_TE_V1_NOTIF_* (whom to notify when)
  */
 struct iwm_time_event_cmd_v1 {
 	/* COMMON_INDEX_HDR_API_S_VER_1 */
 	uint32_t id_and_color;
 	uint32_t action;
 	uint32_t id;
 	/* IWM_MAC_TIME_EVENT_DATA_API_S_VER_1 */
 	uint32_t apply_time;
 	uint32_t max_delay;
 	uint32_t dep_policy;
 	uint32_t depends_on;
 	uint32_t is_present;
 	uint32_t max_frags;
 	uint32_t interval;
 	uint32_t interval_reciprocal;
 	uint32_t duration;
 	uint32_t repeat;
 	uint32_t notify;
 } __packed; /* IWM_MAC_TIME_EVENT_CMD_API_S_VER_1 */
 
 
 /* Time event - defines for command API v2 */
 
 /*
  * @IWM_TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
  * @IWM_TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
  *  the first fragment is scheduled.
  * @IWM_TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
  *  the first 2 fragments are scheduled.
  * @IWM_TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
  *  number of fragments are valid.
  *
  * Other than the constant defined above, specifying a fragmentation value 'x'
  * means that the event can be fragmented but only the first 'x' will be
  * scheduled.
  */
 enum {
 	IWM_TE_V2_FRAG_NONE = 0,
 	IWM_TE_V2_FRAG_SINGLE = 1,
 	IWM_TE_V2_FRAG_DUAL = 2,
 	IWM_TE_V2_FRAG_MAX = 0xfe,
 	IWM_TE_V2_FRAG_ENDLESS = 0xff
 };
 
 /* Repeat the time event endlessly (until removed) */
 #define IWM_TE_V2_REPEAT_ENDLESS	0xff
 /* If a Time Event has bounded repetitions, this is the maximal value */
 #define IWM_TE_V2_REPEAT_MAX	0xfe
 
 #define IWM_TE_V2_PLACEMENT_POS	12
 #define IWM_TE_V2_ABSENCE_POS	15
 
 /* Time event policy values (for time event cmd api v2)
  * A notification (both event and fragment) includes a status indicating weather
  * the FW was able to schedule the event or not. For fragment start/end
  * notification the status is always success. There is no start/end fragment
  * notification for monolithic events.
  *
  * @IWM_TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
  * @IWM_TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
  * @IWM_TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
  * @IWM_TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
  * @IWM_TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
  * @IWM_TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
  * @IWM_TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
  * @IWM_TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
  * @IWM_TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
  * @IWM_TE_V2_DEP_OTHER: depends on another time event
  * @IWM_TE_V2_DEP_TSF: depends on a specific time
  * @IWM_TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
  * @IWM_TE_V2_ABSENCE: are we present or absent during the Time Event.
  */
 enum {
 	IWM_TE_V2_DEFAULT_POLICY = 0x0,
 
 	/* notifications (event start/stop, fragment start/stop) */
 	IWM_TE_V2_NOTIF_HOST_EVENT_START = (1 << 0),
 	IWM_TE_V2_NOTIF_HOST_EVENT_END = (1 << 1),
 	IWM_TE_V2_NOTIF_INTERNAL_EVENT_START = (1 << 2),
 	IWM_TE_V2_NOTIF_INTERNAL_EVENT_END = (1 << 3),
 
 	IWM_TE_V2_NOTIF_HOST_FRAG_START = (1 << 4),
 	IWM_TE_V2_NOTIF_HOST_FRAG_END = (1 << 5),
 	IWM_TE_V2_NOTIF_INTERNAL_FRAG_START = (1 << 6),
 	IWM_TE_V2_NOTIF_INTERNAL_FRAG_END = (1 << 7),
 
 	IWM_TE_V2_NOTIF_MSK = 0xff,
 
 	/* placement characteristics */
 	IWM_TE_V2_DEP_OTHER = (1 << IWM_TE_V2_PLACEMENT_POS),
 	IWM_TE_V2_DEP_TSF = (1 << (IWM_TE_V2_PLACEMENT_POS + 1)),
 	IWM_TE_V2_EVENT_SOCIOPATHIC = (1 << (IWM_TE_V2_PLACEMENT_POS + 2)),
 
 	/* are we present or absent during the Time Event. */
 	IWM_TE_V2_ABSENCE = (1 << IWM_TE_V2_ABSENCE_POS),
 };
 
 /**
  * struct iwm_time_event_cmd_api_v2 - configuring Time Events
  * with struct IWM_MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
  * with version 1. determined by IWM_UCODE_TLV_FLAGS)
  * ( IWM_TIME_EVENT_CMD = 0x29 )
  * @id_and_color: ID and color of the relevant MAC
  * @action: action to perform, one of IWM_FW_CTXT_ACTION_*
  * @id: this field has two meanings, depending on the action:
  *	If the action is ADD, then it means the type of event to add.
  *	For all other actions it is the unique event ID assigned when the
  *	event was added by the FW.
  * @apply_time: When to start the Time Event (in GP2)
  * @max_delay: maximum delay to event's start (apply time), in TU
  * @depends_on: the unique ID of the event we depend on (if any)
  * @interval: interval between repetitions, in TU
  * @duration: duration of event in TU
  * @repeat: how many repetitions to do, can be IWM_TE_REPEAT_ENDLESS
  * @max_frags: maximal number of fragments the Time Event can be divided to
  * @policy: defines whether uCode shall notify the host or other uCode modules
  *	on event and/or fragment start and/or end
  *	using one of IWM_TE_INDEPENDENT, IWM_TE_DEP_OTHER, IWM_TE_DEP_TSF
  *	IWM_TE_EVENT_SOCIOPATHIC
  *	using IWM_TE_ABSENCE and using IWM_TE_NOTIF_*
  */
 struct iwm_time_event_cmd_v2 {
 	/* COMMON_INDEX_HDR_API_S_VER_1 */
 	uint32_t id_and_color;
 	uint32_t action;
 	uint32_t id;
 	/* IWM_MAC_TIME_EVENT_DATA_API_S_VER_2 */
 	uint32_t apply_time;
 	uint32_t max_delay;
 	uint32_t depends_on;
 	uint32_t interval;
 	uint32_t duration;
 	uint8_t repeat;
 	uint8_t max_frags;
 	uint16_t policy;
 } __packed; /* IWM_MAC_TIME_EVENT_CMD_API_S_VER_2 */
 
 /**
  * struct iwm_time_event_resp - response structure to iwm_time_event_cmd
  * @status: bit 0 indicates success, all others specify errors
  * @id: the Time Event type
  * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
  * @id_and_color: ID and color of the relevant MAC
  */
 struct iwm_time_event_resp {
 	uint32_t status;
 	uint32_t id;
 	uint32_t unique_id;
 	uint32_t id_and_color;
 } __packed; /* IWM_MAC_TIME_EVENT_RSP_API_S_VER_1 */
 
 /**
  * struct iwm_time_event_notif - notifications of time event start/stop
  * ( IWM_TIME_EVENT_NOTIFICATION = 0x2a )
  * @timestamp: action timestamp in GP2
  * @session_id: session's unique id
  * @unique_id: unique id of the Time Event itself
  * @id_and_color: ID and color of the relevant MAC
  * @action: one of IWM_TE_NOTIF_START or IWM_TE_NOTIF_END
  * @status: true if scheduled, false otherwise (not executed)
  */
 struct iwm_time_event_notif {
 	uint32_t timestamp;
 	uint32_t session_id;
 	uint32_t unique_id;
 	uint32_t id_and_color;
 	uint32_t action;
 	uint32_t status;
 } __packed; /* IWM_MAC_TIME_EVENT_NTFY_API_S_VER_1 */
 
 
 /* Bindings and Time Quota */
 
 /**
  * struct iwm_binding_cmd - configuring bindings
  * ( IWM_BINDING_CONTEXT_CMD = 0x2b )
  * @id_and_color: ID and color of the relevant Binding
  * @action: action to perform, one of IWM_FW_CTXT_ACTION_*
  * @macs: array of MAC id and colors which belong to the binding
  * @phy: PHY id and color which belongs to the binding
  */
 struct iwm_binding_cmd {
 	/* COMMON_INDEX_HDR_API_S_VER_1 */
 	uint32_t id_and_color;
 	uint32_t action;
 	/* IWM_BINDING_DATA_API_S_VER_1 */
 	uint32_t macs[IWM_MAX_MACS_IN_BINDING];
 	uint32_t phy;
 } __packed; /* IWM_BINDING_CMD_API_S_VER_1 */
 
 /* The maximal number of fragments in the FW's schedule session */
 #define IWM_MVM_MAX_QUOTA 128
 
 /**
  * struct iwm_time_quota_data - configuration of time quota per binding
  * @id_and_color: ID and color of the relevant Binding
  * @quota: absolute time quota in TU. The scheduler will try to divide the
  *	remainig quota (after Time Events) according to this quota.
  * @max_duration: max uninterrupted context duration in TU
  */
 struct iwm_time_quota_data {
 	uint32_t id_and_color;
 	uint32_t quota;
 	uint32_t max_duration;
 } __packed; /* IWM_TIME_QUOTA_DATA_API_S_VER_1 */
 
 /**
  * struct iwm_time_quota_cmd - configuration of time quota between bindings
  * ( IWM_TIME_QUOTA_CMD = 0x2c )
  * @quotas: allocations per binding
  */
 struct iwm_time_quota_cmd {
 	struct iwm_time_quota_data quotas[IWM_MAX_BINDINGS];
 } __packed; /* IWM_TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
 
 
 /* PHY context */
 
 /* Supported bands */
 #define IWM_PHY_BAND_5  (0)
 #define IWM_PHY_BAND_24 (1)
 
 /* Supported channel width, vary if there is VHT support */
 #define IWM_PHY_VHT_CHANNEL_MODE20	(0x0)
 #define IWM_PHY_VHT_CHANNEL_MODE40	(0x1)
 #define IWM_PHY_VHT_CHANNEL_MODE80	(0x2)
 #define IWM_PHY_VHT_CHANNEL_MODE160	(0x3)
 
 /*
  * Control channel position:
  * For legacy set bit means upper channel, otherwise lower.
  * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
  *   bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
  *                                   center_freq
  *                                        |
  * 40Mhz                          |_______|_______|
  * 80Mhz                  |_______|_______|_______|_______|
  * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
  * code      011     010     001     000  |  100     101     110    111
  */
 #define IWM_PHY_VHT_CTRL_POS_1_BELOW  (0x0)
 #define IWM_PHY_VHT_CTRL_POS_2_BELOW  (0x1)
 #define IWM_PHY_VHT_CTRL_POS_3_BELOW  (0x2)
 #define IWM_PHY_VHT_CTRL_POS_4_BELOW  (0x3)
 #define IWM_PHY_VHT_CTRL_POS_1_ABOVE  (0x4)
 #define IWM_PHY_VHT_CTRL_POS_2_ABOVE  (0x5)
 #define IWM_PHY_VHT_CTRL_POS_3_ABOVE  (0x6)
 #define IWM_PHY_VHT_CTRL_POS_4_ABOVE  (0x7)
 
 /*
  * @band: IWM_PHY_BAND_*
  * @channel: channel number
  * @width: PHY_[VHT|LEGACY]_CHANNEL_*
  * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
  */
 struct iwm_fw_channel_info {
 	uint8_t band;
 	uint8_t channel;
 	uint8_t width;
 	uint8_t ctrl_pos;
 } __packed;
 
 #define IWM_PHY_RX_CHAIN_DRIVER_FORCE_POS	(0)
 #define IWM_PHY_RX_CHAIN_DRIVER_FORCE_MSK \
 	(0x1 << IWM_PHY_RX_CHAIN_DRIVER_FORCE_POS)
 #define IWM_PHY_RX_CHAIN_VALID_POS		(1)
 #define IWM_PHY_RX_CHAIN_VALID_MSK \
 	(0x7 << IWM_PHY_RX_CHAIN_VALID_POS)
 #define IWM_PHY_RX_CHAIN_FORCE_SEL_POS	(4)
 #define IWM_PHY_RX_CHAIN_FORCE_SEL_MSK \
 	(0x7 << IWM_PHY_RX_CHAIN_FORCE_SEL_POS)
 #define IWM_PHY_RX_CHAIN_FORCE_MIMO_SEL_POS	(7)
 #define IWM_PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
 	(0x7 << IWM_PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
 #define IWM_PHY_RX_CHAIN_CNT_POS		(10)
 #define IWM_PHY_RX_CHAIN_CNT_MSK \
 	(0x3 << IWM_PHY_RX_CHAIN_CNT_POS)
 #define IWM_PHY_RX_CHAIN_MIMO_CNT_POS	(12)
 #define IWM_PHY_RX_CHAIN_MIMO_CNT_MSK \
 	(0x3 << IWM_PHY_RX_CHAIN_MIMO_CNT_POS)
 #define IWM_PHY_RX_CHAIN_MIMO_FORCE_POS	(14)
 #define IWM_PHY_RX_CHAIN_MIMO_FORCE_MSK \
 	(0x1 << IWM_PHY_RX_CHAIN_MIMO_FORCE_POS)
 
 /* TODO: fix the value, make it depend on firmware at runtime? */
 #define IWM_NUM_PHY_CTX	3
 
 /* TODO: complete missing documentation */
 /**
  * struct iwm_phy_context_cmd - config of the PHY context
  * ( IWM_PHY_CONTEXT_CMD = 0x8 )
  * @id_and_color: ID and color of the relevant Binding
  * @action: action to perform, one of IWM_FW_CTXT_ACTION_*
  * @apply_time: 0 means immediate apply and context switch.
  *	other value means apply new params after X usecs
  * @tx_param_color: ???
  * @channel_info:
  * @txchain_info: ???
  * @rxchain_info: ???
  * @acquisition_data: ???
  * @dsp_cfg_flags: set to 0
  */
 struct iwm_phy_context_cmd {
 	/* COMMON_INDEX_HDR_API_S_VER_1 */
 	uint32_t id_and_color;
 	uint32_t action;
 	/* IWM_PHY_CONTEXT_DATA_API_S_VER_1 */
 	uint32_t apply_time;
 	uint32_t tx_param_color;
 	struct iwm_fw_channel_info ci;
 	uint32_t txchain_info;
 	uint32_t rxchain_info;
 	uint32_t acquisition_data;
 	uint32_t dsp_cfg_flags;
 } __packed; /* IWM_PHY_CONTEXT_CMD_API_VER_1 */
 
 #define IWM_RX_INFO_PHY_CNT 8
 #define IWM_RX_INFO_ENERGY_ANT_ABC_IDX 1
 #define IWM_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
 #define IWM_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
 #define IWM_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
 #define IWM_RX_INFO_ENERGY_ANT_A_POS 0
 #define IWM_RX_INFO_ENERGY_ANT_B_POS 8
 #define IWM_RX_INFO_ENERGY_ANT_C_POS 16
 
 #define IWM_RX_INFO_AGC_IDX 1
 #define IWM_RX_INFO_RSSI_AB_IDX 2
 #define IWM_OFDM_AGC_A_MSK 0x0000007f
 #define IWM_OFDM_AGC_A_POS 0
 #define IWM_OFDM_AGC_B_MSK 0x00003f80
 #define IWM_OFDM_AGC_B_POS 7
 #define IWM_OFDM_AGC_CODE_MSK 0x3fe00000
 #define IWM_OFDM_AGC_CODE_POS 20
 #define IWM_OFDM_RSSI_INBAND_A_MSK 0x00ff
 #define IWM_OFDM_RSSI_A_POS 0
 #define IWM_OFDM_RSSI_ALLBAND_A_MSK 0xff00
 #define IWM_OFDM_RSSI_ALLBAND_A_POS 8
 #define IWM_OFDM_RSSI_INBAND_B_MSK 0xff0000
 #define IWM_OFDM_RSSI_B_POS 16
 #define IWM_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
 #define IWM_OFDM_RSSI_ALLBAND_B_POS 24
 
 /**
  * struct iwm_rx_phy_info - phy info
  * (IWM_REPLY_RX_PHY_CMD = 0xc0)
  * @non_cfg_phy_cnt: non configurable DSP phy data byte count
  * @cfg_phy_cnt: configurable DSP phy data byte count
  * @stat_id: configurable DSP phy data set ID
  * @reserved1:
  * @system_timestamp: GP2  at on air rise
  * @timestamp: TSF at on air rise
  * @beacon_time_stamp: beacon at on-air rise
  * @phy_flags: general phy flags: band, modulation, ...
  * @channel: channel number
  * @non_cfg_phy_buf: for various implementations of non_cfg_phy
  * @rate_n_flags: IWM_RATE_MCS_*
  * @byte_count: frame's byte-count
  * @frame_time: frame's time on the air, based on byte count and frame rate
  *	calculation
  * @mac_active_msk: what MACs were active when the frame was received
  *
  * Before each Rx, the device sends this data. It contains PHY information
  * about the reception of the packet.
  */
 struct iwm_rx_phy_info {
 	uint8_t non_cfg_phy_cnt;
 	uint8_t cfg_phy_cnt;
 	uint8_t stat_id;
 	uint8_t reserved1;
 	uint32_t system_timestamp;
 	uint64_t timestamp;
 	uint32_t beacon_time_stamp;
 	uint16_t phy_flags;
 #define IWM_PHY_INFO_FLAG_SHPREAMBLE	(1 << 2)
 	uint16_t channel;
 	uint32_t non_cfg_phy[IWM_RX_INFO_PHY_CNT];
 	uint8_t rate;
 	uint8_t rflags;
 	uint16_t xrflags;
 	uint32_t byte_count;
 	uint16_t mac_active_msk;
 	uint16_t frame_time;
 } __packed;
 
 struct iwm_rx_mpdu_res_start {
 	uint16_t byte_count;
 	uint16_t reserved;
 } __packed;
 
 /**
  * enum iwm_rx_phy_flags - to parse %iwm_rx_phy_info phy_flags
  * @IWM_RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
  * @IWM_RX_RES_PHY_FLAGS_MOD_CCK:
  * @IWM_RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
  * @IWM_RX_RES_PHY_FLAGS_NARROW_BAND:
  * @IWM_RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
  * @IWM_RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
  * @IWM_RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
  * @IWM_RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
  * @IWM_RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
  */
 enum iwm_rx_phy_flags {
 	IWM_RX_RES_PHY_FLAGS_BAND_24		= (1 << 0),
 	IWM_RX_RES_PHY_FLAGS_MOD_CCK		= (1 << 1),
 	IWM_RX_RES_PHY_FLAGS_SHORT_PREAMBLE	= (1 << 2),
 	IWM_RX_RES_PHY_FLAGS_NARROW_BAND	= (1 << 3),
 	IWM_RX_RES_PHY_FLAGS_ANTENNA		= (0x7 << 4),
 	IWM_RX_RES_PHY_FLAGS_ANTENNA_POS	= 4,
 	IWM_RX_RES_PHY_FLAGS_AGG		= (1 << 7),
 	IWM_RX_RES_PHY_FLAGS_OFDM_HT		= (1 << 8),
 	IWM_RX_RES_PHY_FLAGS_OFDM_GF		= (1 << 9),
 	IWM_RX_RES_PHY_FLAGS_OFDM_VHT		= (1 << 10),
 };
 
 /**
  * enum iwm_mvm_rx_status - written by fw for each Rx packet
  * @IWM_RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
  * @IWM_RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
  * @IWM_RX_MPDU_RES_STATUS_SRC_STA_FOUND:
  * @IWM_RX_MPDU_RES_STATUS_KEY_VALID:
  * @IWM_RX_MPDU_RES_STATUS_KEY_PARAM_OK:
  * @IWM_RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
  * @IWM_RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
  *	in the driver.
  * @IWM_RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
  * @IWM_RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR:  valid for alg = CCM_CMAC or
  *	alg = CCM only. Checks replay attack for 11w frames. Relevant only if
  *	%IWM_RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
  * @IWM_RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
  * @IWM_RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
  * @IWM_RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
  * @IWM_RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
  * @IWM_RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
  * @IWM_RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
  * @IWM_RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
  * @IWM_RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
  * @IWM_RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
  * @IWM_RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
  * @IWM_RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
  * @IWM_RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
  * @IWM_RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
  * @IWM_RX_MPDU_RES_STATUS_STA_ID_MSK:
  * @IWM_RX_MPDU_RES_STATUS_RRF_KILL:
  * @IWM_RX_MPDU_RES_STATUS_FILTERING_MSK:
  * @IWM_RX_MPDU_RES_STATUS2_FILTERING_MSK:
  */
 enum iwm_mvm_rx_status {
 	IWM_RX_MPDU_RES_STATUS_CRC_OK			= (1 << 0),
 	IWM_RX_MPDU_RES_STATUS_OVERRUN_OK		= (1 << 1),
 	IWM_RX_MPDU_RES_STATUS_SRC_STA_FOUND		= (1 << 2),
 	IWM_RX_MPDU_RES_STATUS_KEY_VALID		= (1 << 3),
 	IWM_RX_MPDU_RES_STATUS_KEY_PARAM_OK		= (1 << 4),
 	IWM_RX_MPDU_RES_STATUS_ICV_OK			= (1 << 5),
 	IWM_RX_MPDU_RES_STATUS_MIC_OK			= (1 << 6),
 	IWM_RX_MPDU_RES_STATUS_TTAK_OK			= (1 << 7),
 	IWM_RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR	= (1 << 7),
 	IWM_RX_MPDU_RES_STATUS_SEC_NO_ENC		= (0 << 8),
 	IWM_RX_MPDU_RES_STATUS_SEC_WEP_ENC		= (1 << 8),
 	IWM_RX_MPDU_RES_STATUS_SEC_CCM_ENC		= (2 << 8),
 	IWM_RX_MPDU_RES_STATUS_SEC_TKIP_ENC		= (3 << 8),
 	IWM_RX_MPDU_RES_STATUS_SEC_EXT_ENC		= (4 << 8),
 	IWM_RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC		= (6 << 8),
 	IWM_RX_MPDU_RES_STATUS_SEC_ENC_ERR		= (7 << 8),
 	IWM_RX_MPDU_RES_STATUS_SEC_ENC_MSK		= (7 << 8),
 	IWM_RX_MPDU_RES_STATUS_DEC_DONE			= (1 << 11),
 	IWM_RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP	= (1 << 12),
 	IWM_RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP		= (1 << 13),
 	IWM_RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT		= (1 << 14),
 	IWM_RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME		= (1 << 15),
 	IWM_RX_MPDU_RES_STATUS_HASH_INDEX_MSK		= (0x3F0000),
 	IWM_RX_MPDU_RES_STATUS_STA_ID_MSK		= (0x1f000000),
 	IWM_RX_MPDU_RES_STATUS_RRF_KILL			= (1 << 29),
 	IWM_RX_MPDU_RES_STATUS_FILTERING_MSK		= (0xc00000),
 	IWM_RX_MPDU_RES_STATUS2_FILTERING_MSK		= (0xc0000000),
 };
 
 /**
  * struct iwm_radio_version_notif - information on the radio version
  * ( IWM_RADIO_VERSION_NOTIFICATION = 0x68 )
  * @radio_flavor:
  * @radio_step:
  * @radio_dash:
  */
 struct iwm_radio_version_notif {
 	uint32_t radio_flavor;
 	uint32_t radio_step;
 	uint32_t radio_dash;
 } __packed; /* IWM_RADIO_VERSION_NOTOFICATION_S_VER_1 */
 
 enum iwm_card_state_flags {
 	IWM_CARD_ENABLED		= 0x00,
 	IWM_HW_CARD_DISABLED	= 0x01,
 	IWM_SW_CARD_DISABLED	= 0x02,
 	IWM_CT_KILL_CARD_DISABLED	= 0x04,
 	IWM_HALT_CARD_DISABLED	= 0x08,
 	IWM_CARD_DISABLED_MSK	= 0x0f,
 	IWM_CARD_IS_RX_ON		= 0x10,
 };
 
 /**
  * struct iwm_radio_version_notif - information on the radio version
  * (IWM_CARD_STATE_NOTIFICATION = 0xa1 )
  * @flags: %iwm_card_state_flags
  */
 struct iwm_card_state_notif {
 	uint32_t flags;
 } __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
 
 /**
  * struct iwm_missed_beacons_notif - information on missed beacons
  * ( IWM_MISSED_BEACONS_NOTIFICATION = 0xa2 )
  * @mac_id: interface ID
  * @consec_missed_beacons_since_last_rx: number of consecutive missed
  *	beacons since last RX.
  * @consec_missed_beacons: number of consecutive missed beacons
  * @num_expected_beacons:
  * @num_recvd_beacons:
  */
 struct iwm_missed_beacons_notif {
 	uint32_t mac_id;
 	uint32_t consec_missed_beacons_since_last_rx;
 	uint32_t consec_missed_beacons;
 	uint32_t num_expected_beacons;
 	uint32_t num_recvd_beacons;
 } __packed; /* IWM_MISSED_BEACON_NTFY_API_S_VER_3 */
 
 /**
  * struct iwm_mfuart_load_notif - mfuart image version & status
  * ( IWM_MFUART_LOAD_NOTIFICATION = 0xb1 )
  * @installed_ver: installed image version
  * @external_ver: external image version
  * @status: MFUART loading status
  * @duration: MFUART loading time
 */
 struct iwm_mfuart_load_notif {
 	uint32_t installed_ver;
 	uint32_t external_ver;
 	uint32_t status;
 	uint32_t duration;
 } __packed; /*MFU_LOADER_NTFY_API_S_VER_1*/
 
 /**
  * struct iwm_set_calib_default_cmd - set default value for calibration.
  * ( IWM_SET_CALIB_DEFAULT_CMD = 0x8e )
  * @calib_index: the calibration to set value for
  * @length: of data
  * @data: the value to set for the calibration result
  */
 struct iwm_set_calib_default_cmd {
 	uint16_t calib_index;
 	uint16_t length;
 	uint8_t data[0];
 } __packed; /* IWM_PHY_CALIB_OVERRIDE_VALUES_S */
 
 #define IWM_MAX_PORT_ID_NUM	2
 #define IWM_MAX_MCAST_FILTERING_ADDRESSES 256
 
 /**
  * struct iwm_mcast_filter_cmd - configure multicast filter.
  * @filter_own: Set 1 to filter out multicast packets sent by station itself
  * @port_id:	Multicast MAC addresses array specifier. This is a strange way
  *		to identify network interface adopted in host-device IF.
  *		It is used by FW as index in array of addresses. This array has
  *		IWM_MAX_PORT_ID_NUM members.
  * @count:	Number of MAC addresses in the array
  * @pass_all:	Set 1 to pass all multicast packets.
  * @bssid:	current association BSSID.
  * @addr_list:	Place holder for array of MAC addresses.
  *		IMPORTANT: add padding if necessary to ensure DWORD alignment.
  */
 struct iwm_mcast_filter_cmd {
 	uint8_t filter_own;
 	uint8_t port_id;
 	uint8_t count;
 	uint8_t pass_all;
 	uint8_t bssid[6];
 	uint8_t reserved[2];
 	uint8_t addr_list[0];
 } __packed; /* IWM_MCAST_FILTERING_CMD_API_S_VER_1 */
 
 struct iwm_mvm_statistics_dbg {
 	uint32_t burst_check;
 	uint32_t burst_count;
 	uint32_t wait_for_silence_timeout_cnt;
 	uint32_t reserved[3];
 } __packed; /* IWM_STATISTICS_DEBUG_API_S_VER_2 */
 
 struct iwm_mvm_statistics_div {
 	uint32_t tx_on_a;
 	uint32_t tx_on_b;
 	uint32_t exec_time;
 	uint32_t probe_time;
 	uint32_t rssi_ant;
 	uint32_t reserved2;
 } __packed; /* IWM_STATISTICS_SLOW_DIV_API_S_VER_2 */
 
 struct iwm_mvm_statistics_general_common {
 	uint32_t temperature;   /* radio temperature */
 	uint32_t temperature_m; /* radio voltage */
 	struct iwm_mvm_statistics_dbg dbg;
 	uint32_t sleep_time;
 	uint32_t slots_out;
 	uint32_t slots_idle;
 	uint32_t ttl_timestamp;
 	struct iwm_mvm_statistics_div div;
 	uint32_t rx_enable_counter;
 	/*
 	 * num_of_sos_states:
 	 *  count the number of times we have to re-tune
 	 *  in order to get out of bad PHY status
 	 */
 	uint32_t num_of_sos_states;
 } __packed; /* IWM_STATISTICS_GENERAL_API_S_VER_5 */
 
 struct iwm_mvm_statistics_rx_non_phy {
 	uint32_t bogus_cts;	/* CTS received when not expecting CTS */
 	uint32_t bogus_ack;	/* ACK received when not expecting ACK */
 	uint32_t non_bssid_frames;	/* number of frames with BSSID that
 					 * doesn't belong to the STA BSSID */
 	uint32_t filtered_frames;	/* count frames that were dumped in the
 				 * filtering process */
 	uint32_t non_channel_beacons;	/* beacons with our bss id but not on
 					 * our serving channel */
 	uint32_t channel_beacons;	/* beacons with our bss id and in our
 				 * serving channel */
 	uint32_t num_missed_bcon;	/* number of missed beacons */
 	uint32_t adc_rx_saturation_time;	/* count in 0.8us units the time the
 					 * ADC was in saturation */
 	uint32_t ina_detection_search_time;/* total time (in 0.8us) searched
 					  * for INA */
 	uint32_t beacon_silence_rssi[3];/* RSSI silence after beacon frame */
 	uint32_t interference_data_flag;	/* flag for interference data
 					 * availability. 1 when data is
 					 * available. */
 	uint32_t channel_load;		/* counts RX Enable time in uSec */
 	uint32_t dsp_false_alarms;	/* DSP false alarm (both OFDM
 					 * and CCK) counter */
 	uint32_t beacon_rssi_a;
 	uint32_t beacon_rssi_b;
 	uint32_t beacon_rssi_c;
 	uint32_t beacon_energy_a;
 	uint32_t beacon_energy_b;
 	uint32_t beacon_energy_c;
 	uint32_t num_bt_kills;
 	uint32_t mac_id;
 	uint32_t directed_data_mpdu;
 } __packed; /* IWM_STATISTICS_RX_NON_PHY_API_S_VER_3 */
 
 struct iwm_mvm_statistics_rx_phy {
 	uint32_t ina_cnt;
 	uint32_t fina_cnt;
 	uint32_t plcp_err;
 	uint32_t crc32_err;
 	uint32_t overrun_err;
 	uint32_t early_overrun_err;
 	uint32_t crc32_good;
 	uint32_t false_alarm_cnt;
 	uint32_t fina_sync_err_cnt;
 	uint32_t sfd_timeout;
 	uint32_t fina_timeout;
 	uint32_t unresponded_rts;
 	uint32_t rxe_frame_limit_overrun;
 	uint32_t sent_ack_cnt;
 	uint32_t sent_cts_cnt;
 	uint32_t sent_ba_rsp_cnt;
 	uint32_t dsp_self_kill;
 	uint32_t mh_format_err;
 	uint32_t re_acq_main_rssi_sum;
 	uint32_t reserved;
 } __packed; /* IWM_STATISTICS_RX_PHY_API_S_VER_2 */
 
 struct iwm_mvm_statistics_rx_ht_phy {
 	uint32_t plcp_err;
 	uint32_t overrun_err;
 	uint32_t early_overrun_err;
 	uint32_t crc32_good;
 	uint32_t crc32_err;
 	uint32_t mh_format_err;
 	uint32_t agg_crc32_good;
 	uint32_t agg_mpdu_cnt;
 	uint32_t agg_cnt;
 	uint32_t unsupport_mcs;
 } __packed;  /* IWM_STATISTICS_HT_RX_PHY_API_S_VER_1 */
 
 #define IWM_MAX_CHAINS 3
 
 struct iwm_mvm_statistics_tx_non_phy_agg {
 	uint32_t ba_timeout;
 	uint32_t ba_reschedule_frames;
 	uint32_t scd_query_agg_frame_cnt;
 	uint32_t scd_query_no_agg;
 	uint32_t scd_query_agg;
 	uint32_t scd_query_mismatch;
 	uint32_t frame_not_ready;
 	uint32_t underrun;
 	uint32_t bt_prio_kill;
 	uint32_t rx_ba_rsp_cnt;
 	int8_t txpower[IWM_MAX_CHAINS];
 	int8_t reserved;
 	uint32_t reserved2;
 } __packed; /* IWM_STATISTICS_TX_NON_PHY_AGG_API_S_VER_1 */
 
 struct iwm_mvm_statistics_tx_channel_width {
 	uint32_t ext_cca_narrow_ch20[1];
 	uint32_t ext_cca_narrow_ch40[2];
 	uint32_t ext_cca_narrow_ch80[3];
 	uint32_t ext_cca_narrow_ch160[4];
 	uint32_t last_tx_ch_width_indx;
 	uint32_t rx_detected_per_ch_width[4];
 	uint32_t success_per_ch_width[4];
 	uint32_t fail_per_ch_width[4];
 }; /* IWM_STATISTICS_TX_CHANNEL_WIDTH_API_S_VER_1 */
 
 struct iwm_mvm_statistics_tx {
 	uint32_t preamble_cnt;
 	uint32_t rx_detected_cnt;
 	uint32_t bt_prio_defer_cnt;
 	uint32_t bt_prio_kill_cnt;
 	uint32_t few_bytes_cnt;
 	uint32_t cts_timeout;
 	uint32_t ack_timeout;
 	uint32_t expected_ack_cnt;
 	uint32_t actual_ack_cnt;
 	uint32_t dump_msdu_cnt;
 	uint32_t burst_abort_next_frame_mismatch_cnt;
 	uint32_t burst_abort_missing_next_frame_cnt;
 	uint32_t cts_timeout_collision;
 	uint32_t ack_or_ba_timeout_collision;
 	struct iwm_mvm_statistics_tx_non_phy_agg agg;
 	struct iwm_mvm_statistics_tx_channel_width channel_width;
 } __packed; /* IWM_STATISTICS_TX_API_S_VER_4 */
 
 
 struct iwm_mvm_statistics_bt_activity {
 	uint32_t hi_priority_tx_req_cnt;
 	uint32_t hi_priority_tx_denied_cnt;
 	uint32_t lo_priority_tx_req_cnt;
 	uint32_t lo_priority_tx_denied_cnt;
 	uint32_t hi_priority_rx_req_cnt;
 	uint32_t hi_priority_rx_denied_cnt;
 	uint32_t lo_priority_rx_req_cnt;
 	uint32_t lo_priority_rx_denied_cnt;
 } __packed;  /* IWM_STATISTICS_BT_ACTIVITY_API_S_VER_1 */
 
 struct iwm_mvm_statistics_general {
 	struct iwm_mvm_statistics_general_common common;
 	uint32_t beacon_filtered;
 	uint32_t missed_beacons;
 	int8_t beacon_filter_average_energy;
 	int8_t beacon_filter_reason;
 	int8_t beacon_filter_current_energy;
 	int8_t beacon_filter_reserved;
 	uint32_t beacon_filter_delta_time;
 	struct iwm_mvm_statistics_bt_activity bt_activity;
 } __packed; /* IWM_STATISTICS_GENERAL_API_S_VER_5 */
 
 struct iwm_mvm_statistics_rx {
 	struct iwm_mvm_statistics_rx_phy ofdm;
 	struct iwm_mvm_statistics_rx_phy cck;
 	struct iwm_mvm_statistics_rx_non_phy general;
 	struct iwm_mvm_statistics_rx_ht_phy ofdm_ht;
 } __packed; /* IWM_STATISTICS_RX_API_S_VER_3 */
 
 /*
  * IWM_STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
  *
  * By default, uCode issues this notification after receiving a beacon
  * while associated.  To disable this behavior, set DISABLE_NOTIF flag in the
  * IWM_REPLY_STATISTICS_CMD 0x9c, above.
  *
  * Statistics counters continue to increment beacon after beacon, but are
  * cleared when changing channels or when driver issues IWM_REPLY_STATISTICS_CMD
  * 0x9c with CLEAR_STATS bit set (see above).
  *
  * uCode also issues this notification during scans.  uCode clears statistics
  * appropriately so that each notification contains statistics for only the
  * one channel that has just been scanned.
  */
 
 struct iwm_notif_statistics { /* IWM_STATISTICS_NTFY_API_S_VER_8 */
 	uint32_t flag;
 	struct iwm_mvm_statistics_rx rx;
 	struct iwm_mvm_statistics_tx tx;
 	struct iwm_mvm_statistics_general general;
 } __packed;
 
 /***********************************
  * Smart Fifo API
  ***********************************/
 /* Smart Fifo state */
 enum iwm_sf_state {
 	IWM_SF_LONG_DELAY_ON = 0, /* should never be called by driver */
 	IWM_SF_FULL_ON,
 	IWM_SF_UNINIT,
 	IWM_SF_INIT_OFF,
 	IWM_SF_HW_NUM_STATES
 };
 
 /* Smart Fifo possible scenario */
 enum iwm_sf_scenario {
 	IWM_SF_SCENARIO_SINGLE_UNICAST,
 	IWM_SF_SCENARIO_AGG_UNICAST,
 	IWM_SF_SCENARIO_MULTICAST,
 	IWM_SF_SCENARIO_BA_RESP,
 	IWM_SF_SCENARIO_TX_RESP,
 	IWM_SF_NUM_SCENARIO
 };
 
 #define IWM_SF_TRANSIENT_STATES_NUMBER 2 /* IWM_SF_LONG_DELAY_ON and IWM_SF_FULL_ON */
 #define IWM_SF_NUM_TIMEOUT_TYPES 2	/* Aging timer and Idle timer */
 
 /* smart FIFO default values */
 #define IWM_SF_W_MARK_SISO 4096
 #define IWM_SF_W_MARK_MIMO2 8192
 #define IWM_SF_W_MARK_MIMO3 6144
 #define IWM_SF_W_MARK_LEGACY 4096
 #define IWM_SF_W_MARK_SCAN 4096
 
 /* SF Scenarios timers for default configuration (aligned to 32 uSec) */
 #define IWM_SF_SINGLE_UNICAST_IDLE_TIMER_DEF 160	/* 150 uSec  */
 #define IWM_SF_SINGLE_UNICAST_AGING_TIMER_DEF 400	/* 0.4 mSec */
 #define IWM_SF_AGG_UNICAST_IDLE_TIMER_DEF 160		/* 150 uSec */
 #define IWM_SF_AGG_UNICAST_AGING_TIMER_DEF 400		/* 0.4 mSec */
 #define IWM_SF_MCAST_IDLE_TIMER_DEF 160			/* 150 uSec */
 #define IWM_SF_MCAST_AGING_TIMER_DEF 400		/* 0.4 mSec */
 #define IWM_SF_BA_IDLE_TIMER_DEF 160			/* 150 uSec */
 #define IWM_SF_BA_AGING_TIMER_DEF 400			/* 0.4 mSec */
 #define IWM_SF_TX_RE_IDLE_TIMER_DEF 160			/* 150 uSec */
 #define IWM_SF_TX_RE_AGING_TIMER_DEF 400		/* 0.4 mSec */
 
 /* SF Scenarios timers for FULL_ON state (aligned to 32 uSec) */
 #define IWM_SF_SINGLE_UNICAST_IDLE_TIMER 320	/* 300 uSec  */
 #define IWM_SF_SINGLE_UNICAST_AGING_TIMER 2016	/* 2 mSec */
 #define IWM_SF_AGG_UNICAST_IDLE_TIMER 320	/* 300 uSec */
 #define IWM_SF_AGG_UNICAST_AGING_TIMER 2016	/* 2 mSec */
 #define IWM_SF_MCAST_IDLE_TIMER 2016		/* 2 mSec */
 #define IWM_SF_MCAST_AGING_TIMER 10016		/* 10 mSec */
 #define IWM_SF_BA_IDLE_TIMER 320		/* 300 uSec */
 #define IWM_SF_BA_AGING_TIMER 2016		/* 2 mSec */
 #define IWM_SF_TX_RE_IDLE_TIMER 320		/* 300 uSec */
 #define IWM_SF_TX_RE_AGING_TIMER 2016		/* 2 mSec */
 
 #define IWM_SF_LONG_DELAY_AGING_TIMER 1000000	/* 1 Sec */
 
 #define IWM_SF_CFG_DUMMY_NOTIF_OFF	(1 << 16)
 
 /**
  * Smart Fifo configuration command.
  * @state: smart fifo state, types listed in iwm_sf_state.
  * @watermark: Minimum allowed available free space in RXF for transient state.
  * @long_delay_timeouts: aging and idle timer values for each scenario
  * in long delay state.
  * @full_on_timeouts: timer values for each scenario in full on state.
  */
 struct iwm_sf_cfg_cmd {
 	uint32_t state;
 	uint32_t watermark[IWM_SF_TRANSIENT_STATES_NUMBER];
 	uint32_t long_delay_timeouts[IWM_SF_NUM_SCENARIO][IWM_SF_NUM_TIMEOUT_TYPES];
 	uint32_t full_on_timeouts[IWM_SF_NUM_SCENARIO][IWM_SF_NUM_TIMEOUT_TYPES];
 } __packed; /* IWM_SF_CFG_API_S_VER_2 */
 
 /*
  * END mvm/fw-api.h
  */
 
 /*
  * BEGIN mvm/fw-api-mac.h
  */
 
 /*
  * The first MAC indices (starting from 0)
  * are available to the driver, AUX follows
  */
 #define IWM_MAC_INDEX_AUX		4
 #define IWM_MAC_INDEX_MIN_DRIVER	0
 #define IWM_NUM_MAC_INDEX_DRIVER	IWM_MAC_INDEX_AUX
 
 enum iwm_ac {
 	IWM_AC_BK,
 	IWM_AC_BE,
 	IWM_AC_VI,
 	IWM_AC_VO,
 	IWM_AC_NUM,
 };
 
 /**
  * enum iwm_mac_protection_flags - MAC context flags
  * @IWM_MAC_PROT_FLG_TGG_PROTECT: 11g protection when transmitting OFDM frames,
  *	this will require CCK RTS/CTS2self.
  *	RTS/CTS will protect full burst time.
  * @IWM_MAC_PROT_FLG_HT_PROT: enable HT protection
  * @IWM_MAC_PROT_FLG_FAT_PROT: protect 40 MHz transmissions
  * @IWM_MAC_PROT_FLG_SELF_CTS_EN: allow CTS2self
  */
 enum iwm_mac_protection_flags {
 	IWM_MAC_PROT_FLG_TGG_PROTECT	= (1 << 3),
 	IWM_MAC_PROT_FLG_HT_PROT		= (1 << 23),
 	IWM_MAC_PROT_FLG_FAT_PROT		= (1 << 24),
 	IWM_MAC_PROT_FLG_SELF_CTS_EN	= (1 << 30),
 };
 
 #define IWM_MAC_FLG_SHORT_SLOT		(1 << 4)
 #define IWM_MAC_FLG_SHORT_PREAMBLE		(1 << 5)
 
 /**
  * enum iwm_mac_types - Supported MAC types
  * @IWM_FW_MAC_TYPE_FIRST: lowest supported MAC type
  * @IWM_FW_MAC_TYPE_AUX: Auxiliary MAC (internal)
  * @IWM_FW_MAC_TYPE_LISTENER: monitor MAC type (?)
  * @IWM_FW_MAC_TYPE_PIBSS: Pseudo-IBSS
  * @IWM_FW_MAC_TYPE_IBSS: IBSS
  * @IWM_FW_MAC_TYPE_BSS_STA: BSS (managed) station
  * @IWM_FW_MAC_TYPE_P2P_DEVICE: P2P Device
  * @IWM_FW_MAC_TYPE_P2P_STA: P2P client
  * @IWM_FW_MAC_TYPE_GO: P2P GO
  * @IWM_FW_MAC_TYPE_TEST: ?
  * @IWM_FW_MAC_TYPE_MAX: highest support MAC type
  */
 enum iwm_mac_types {
 	IWM_FW_MAC_TYPE_FIRST = 1,
 	IWM_FW_MAC_TYPE_AUX = IWM_FW_MAC_TYPE_FIRST,
 	IWM_FW_MAC_TYPE_LISTENER,
 	IWM_FW_MAC_TYPE_PIBSS,
 	IWM_FW_MAC_TYPE_IBSS,
 	IWM_FW_MAC_TYPE_BSS_STA,
 	IWM_FW_MAC_TYPE_P2P_DEVICE,
 	IWM_FW_MAC_TYPE_P2P_STA,
 	IWM_FW_MAC_TYPE_GO,
 	IWM_FW_MAC_TYPE_TEST,
 	IWM_FW_MAC_TYPE_MAX = IWM_FW_MAC_TYPE_TEST
 }; /* IWM_MAC_CONTEXT_TYPE_API_E_VER_1 */
 
 /**
  * enum iwm_tsf_id - TSF hw timer ID
  * @IWM_TSF_ID_A: use TSF A
  * @IWM_TSF_ID_B: use TSF B
  * @IWM_TSF_ID_C: use TSF C
  * @IWM_TSF_ID_D: use TSF D
  * @IWM_NUM_TSF_IDS: number of TSF timers available
  */
 enum iwm_tsf_id {
 	IWM_TSF_ID_A = 0,
 	IWM_TSF_ID_B = 1,
 	IWM_TSF_ID_C = 2,
 	IWM_TSF_ID_D = 3,
 	IWM_NUM_TSF_IDS = 4,
 }; /* IWM_TSF_ID_API_E_VER_1 */
 
 /**
  * struct iwm_mac_data_ap - configuration data for AP MAC context
  * @beacon_time: beacon transmit time in system time
  * @beacon_tsf: beacon transmit time in TSF
  * @bi: beacon interval in TU
  * @bi_reciprocal: 2^32 / bi
  * @dtim_interval: dtim transmit time in TU
  * @dtim_reciprocal: 2^32 / dtim_interval
  * @mcast_qid: queue ID for multicast traffic
  * @beacon_template: beacon template ID
  */
 struct iwm_mac_data_ap {
 	uint32_t beacon_time;
 	uint64_t beacon_tsf;
 	uint32_t bi;
 	uint32_t bi_reciprocal;
 	uint32_t dtim_interval;
 	uint32_t dtim_reciprocal;
 	uint32_t mcast_qid;
 	uint32_t beacon_template;
 } __packed; /* AP_MAC_DATA_API_S_VER_1 */
 
 /**
  * struct iwm_mac_data_ibss - configuration data for IBSS MAC context
  * @beacon_time: beacon transmit time in system time
  * @beacon_tsf: beacon transmit time in TSF
  * @bi: beacon interval in TU
  * @bi_reciprocal: 2^32 / bi
  * @beacon_template: beacon template ID
  */
 struct iwm_mac_data_ibss {
 	uint32_t beacon_time;
 	uint64_t beacon_tsf;
 	uint32_t bi;
 	uint32_t bi_reciprocal;
 	uint32_t beacon_template;
 } __packed; /* IBSS_MAC_DATA_API_S_VER_1 */
 
 /**
  * struct iwm_mac_data_sta - configuration data for station MAC context
  * @is_assoc: 1 for associated state, 0 otherwise
  * @dtim_time: DTIM arrival time in system time
  * @dtim_tsf: DTIM arrival time in TSF
  * @bi: beacon interval in TU, applicable only when associated
  * @bi_reciprocal: 2^32 / bi , applicable only when associated
  * @dtim_interval: DTIM interval in TU, applicable only when associated
  * @dtim_reciprocal: 2^32 / dtim_interval , applicable only when associated
  * @listen_interval: in beacon intervals, applicable only when associated
  * @assoc_id: unique ID assigned by the AP during association
  */
 struct iwm_mac_data_sta {
 	uint32_t is_assoc;
 	uint32_t dtim_time;
 	uint64_t dtim_tsf;
 	uint32_t bi;
 	uint32_t bi_reciprocal;
 	uint32_t dtim_interval;
 	uint32_t dtim_reciprocal;
 	uint32_t listen_interval;
 	uint32_t assoc_id;
 	uint32_t assoc_beacon_arrive_time;
 } __packed; /* IWM_STA_MAC_DATA_API_S_VER_1 */
 
 /**
  * struct iwm_mac_data_go - configuration data for P2P GO MAC context
  * @ap: iwm_mac_data_ap struct with most config data
  * @ctwin: client traffic window in TU (period after TBTT when GO is present).
  *	0 indicates that there is no CT window.
  * @opp_ps_enabled: indicate that opportunistic PS allowed
  */
 struct iwm_mac_data_go {
 	struct iwm_mac_data_ap ap;
 	uint32_t ctwin;
 	uint32_t opp_ps_enabled;
 } __packed; /* GO_MAC_DATA_API_S_VER_1 */
 
 /**
  * struct iwm_mac_data_p2p_sta - configuration data for P2P client MAC context
  * @sta: iwm_mac_data_sta struct with most config data
  * @ctwin: client traffic window in TU (period after TBTT when GO is present).
  *	0 indicates that there is no CT window.
  */
 struct iwm_mac_data_p2p_sta {
 	struct iwm_mac_data_sta sta;
 	uint32_t ctwin;
 } __packed; /* P2P_STA_MAC_DATA_API_S_VER_1 */
 
 /**
  * struct iwm_mac_data_pibss - Pseudo IBSS config data
  * @stats_interval: interval in TU between statistics notifications to host.
  */
 struct iwm_mac_data_pibss {
 	uint32_t stats_interval;
 } __packed; /* PIBSS_MAC_DATA_API_S_VER_1 */
 
 /*
  * struct iwm_mac_data_p2p_dev - configuration data for the P2P Device MAC
  * context.
  * @is_disc_extended: if set to true, P2P Device discoverability is enabled on
  *	other channels as well. This should be to true only in case that the
  *	device is discoverable and there is an active GO. Note that setting this
  *	field when not needed, will increase the number of interrupts and have
  *	effect on the platform power, as this setting opens the Rx filters on
  *	all macs.
  */
 struct iwm_mac_data_p2p_dev {
 	uint32_t is_disc_extended;
 } __packed; /* _P2P_DEV_MAC_DATA_API_S_VER_1 */
 
 /**
  * enum iwm_mac_filter_flags - MAC context filter flags
  * @IWM_MAC_FILTER_IN_PROMISC: accept all data frames
  * @IWM_MAC_FILTER_IN_CONTROL_AND_MGMT: pass all mangement and
  *	control frames to the host
  * @IWM_MAC_FILTER_ACCEPT_GRP: accept multicast frames
  * @IWM_MAC_FILTER_DIS_DECRYPT: don't decrypt unicast frames
  * @IWM_MAC_FILTER_DIS_GRP_DECRYPT: don't decrypt multicast frames
  * @IWM_MAC_FILTER_IN_BEACON: transfer foreign BSS's beacons to host
  *	(in station mode when associated)
  * @IWM_MAC_FILTER_OUT_BCAST: filter out all broadcast frames
  * @IWM_MAC_FILTER_IN_CRC32: extract FCS and append it to frames
  * @IWM_MAC_FILTER_IN_PROBE_REQUEST: pass probe requests to host
  */
 enum iwm_mac_filter_flags {
 	IWM_MAC_FILTER_IN_PROMISC		= (1 << 0),
 	IWM_MAC_FILTER_IN_CONTROL_AND_MGMT	= (1 << 1),
 	IWM_MAC_FILTER_ACCEPT_GRP		= (1 << 2),
 	IWM_MAC_FILTER_DIS_DECRYPT		= (1 << 3),
 	IWM_MAC_FILTER_DIS_GRP_DECRYPT		= (1 << 4),
 	IWM_MAC_FILTER_IN_BEACON		= (1 << 6),
 	IWM_MAC_FILTER_OUT_BCAST		= (1 << 8),
 	IWM_MAC_FILTER_IN_CRC32			= (1 << 11),
 	IWM_MAC_FILTER_IN_PROBE_REQUEST		= (1 << 12),
 };
 
 /**
  * enum iwm_mac_qos_flags - QoS flags
  * @IWM_MAC_QOS_FLG_UPDATE_EDCA: ?
  * @IWM_MAC_QOS_FLG_TGN: HT is enabled
  * @IWM_MAC_QOS_FLG_TXOP_TYPE: ?
  *
  */
 enum iwm_mac_qos_flags {
 	IWM_MAC_QOS_FLG_UPDATE_EDCA	= (1 << 0),
 	IWM_MAC_QOS_FLG_TGN		= (1 << 1),
 	IWM_MAC_QOS_FLG_TXOP_TYPE	= (1 << 4),
 };
 
 /**
  * struct iwm_ac_qos - QOS timing params for IWM_MAC_CONTEXT_CMD
  * @cw_min: Contention window, start value in numbers of slots.
  *	Should be a power-of-2, minus 1.  Device's default is 0x0f.
  * @cw_max: Contention window, max value in numbers of slots.
  *	Should be a power-of-2, minus 1.  Device's default is 0x3f.
  * @aifsn:  Number of slots in Arbitration Interframe Space (before
  *	performing random backoff timing prior to Tx).  Device default 1.
  * @fifos_mask: FIFOs used by this MAC for this AC
  * @edca_txop:  Length of Tx opportunity, in uSecs.  Device default is 0.
  *
  * One instance of this config struct for each of 4 EDCA access categories
  * in struct iwm_qosparam_cmd.
  *
  * Device will automatically increase contention window by (2*CW) + 1 for each
  * transmission retry.  Device uses cw_max as a bit mask, ANDed with new CW
  * value, to cap the CW value.
  */
 struct iwm_ac_qos {
 	uint16_t cw_min;
 	uint16_t cw_max;
 	uint8_t aifsn;
 	uint8_t fifos_mask;
 	uint16_t edca_txop;
 } __packed; /* IWM_AC_QOS_API_S_VER_2 */
 
 /**
  * struct iwm_mac_ctx_cmd - command structure to configure MAC contexts
  * ( IWM_MAC_CONTEXT_CMD = 0x28 )
  * @id_and_color: ID and color of the MAC
  * @action: action to perform, one of IWM_FW_CTXT_ACTION_*
  * @mac_type: one of IWM_FW_MAC_TYPE_*
  * @tsd_id: TSF HW timer, one of IWM_TSF_ID_*
  * @node_addr: MAC address
  * @bssid_addr: BSSID
  * @cck_rates: basic rates available for CCK
  * @ofdm_rates: basic rates available for OFDM
  * @protection_flags: combination of IWM_MAC_PROT_FLG_FLAG_*
  * @cck_short_preamble: 0x20 for enabling short preamble, 0 otherwise
  * @short_slot: 0x10 for enabling short slots, 0 otherwise
  * @filter_flags: combination of IWM_MAC_FILTER_*
  * @qos_flags: from IWM_MAC_QOS_FLG_*
  * @ac: one iwm_mac_qos configuration for each AC
  * @mac_specific: one of struct iwm_mac_data_*, according to mac_type
  */
 struct iwm_mac_ctx_cmd {
 	/* COMMON_INDEX_HDR_API_S_VER_1 */
 	uint32_t id_and_color;
 	uint32_t action;
 	/* IWM_MAC_CONTEXT_COMMON_DATA_API_S_VER_1 */
 	uint32_t mac_type;
 	uint32_t tsf_id;
 	uint8_t node_addr[6];
 	uint16_t reserved_for_node_addr;
 	uint8_t bssid_addr[6];
 	uint16_t reserved_for_bssid_addr;
 	uint32_t cck_rates;
 	uint32_t ofdm_rates;
 	uint32_t protection_flags;
 	uint32_t cck_short_preamble;
 	uint32_t short_slot;
 	uint32_t filter_flags;
 	/* IWM_MAC_QOS_PARAM_API_S_VER_1 */
 	uint32_t qos_flags;
 	struct iwm_ac_qos ac[IWM_AC_NUM+1];
 	/* IWM_MAC_CONTEXT_COMMON_DATA_API_S */
 	union {
 		struct iwm_mac_data_ap ap;
 		struct iwm_mac_data_go go;
 		struct iwm_mac_data_sta sta;
 		struct iwm_mac_data_p2p_sta p2p_sta;
 		struct iwm_mac_data_p2p_dev p2p_dev;
 		struct iwm_mac_data_pibss pibss;
 		struct iwm_mac_data_ibss ibss;
 	};
 } __packed; /* IWM_MAC_CONTEXT_CMD_API_S_VER_1 */
 
 static inline uint32_t iwm_mvm_reciprocal(uint32_t v)
 {
 	if (!v)
 		return 0;
 	return 0xFFFFFFFF / v;
 }
 
 #define IWM_NONQOS_SEQ_GET	0x1
 #define IWM_NONQOS_SEQ_SET	0x2
 struct iwm_nonqos_seq_query_cmd {
 	uint32_t get_set_flag;
 	uint32_t mac_id_n_color;
 	uint16_t value;
 	uint16_t reserved;
 } __packed; /* IWM_NON_QOS_TX_COUNTER_GET_SET_API_S_VER_1 */
 
 /*
  * END mvm/fw-api-mac.h
  */
 
 /*
  * BEGIN mvm/fw-api-power.h
  */
 
 /* Power Management Commands, Responses, Notifications */
 
 /* Radio LP RX Energy Threshold measured in dBm */
 #define IWM_POWER_LPRX_RSSI_THRESHOLD	75
 #define IWM_POWER_LPRX_RSSI_THRESHOLD_MAX	94
 #define IWM_POWER_LPRX_RSSI_THRESHOLD_MIN	30
 
 /**
  * enum iwm_scan_flags - masks for power table command flags
  * @IWM_POWER_FLAGS_POWER_SAVE_ENA_MSK: '1' Allow to save power by turning off
  *		receiver and transmitter. '0' - does not allow.
  * @IWM_POWER_FLAGS_POWER_MANAGEMENT_ENA_MSK: '0' Driver disables power management,
  *		'1' Driver enables PM (use rest of parameters)
  * @IWM_POWER_FLAGS_SKIP_OVER_DTIM_MSK: '0' PM have to walk up every DTIM,
  *		'1' PM could sleep over DTIM till listen Interval.
  * @IWM_POWER_FLAGS_SNOOZE_ENA_MSK: Enable snoozing only if uAPSD is enabled and all
  *		access categories are both delivery and trigger enabled.
  * @IWM_POWER_FLAGS_BT_SCO_ENA: Enable BT SCO coex only if uAPSD and
  *		PBW Snoozing enabled
  * @IWM_POWER_FLAGS_ADVANCE_PM_ENA_MSK: Advanced PM (uAPSD) enable mask
  * @IWM_POWER_FLAGS_LPRX_ENA_MSK: Low Power RX enable.
  * @IWM_POWER_FLAGS_AP_UAPSD_MISBEHAVING_ENA_MSK: AP/GO's uAPSD misbehaving
  *		detection enablement
 */
 enum iwm_power_flags {
 	IWM_POWER_FLAGS_POWER_SAVE_ENA_MSK		= (1 << 0),
 	IWM_POWER_FLAGS_POWER_MANAGEMENT_ENA_MSK	= (1 << 1),
 	IWM_POWER_FLAGS_SKIP_OVER_DTIM_MSK		= (1 << 2),
 	IWM_POWER_FLAGS_SNOOZE_ENA_MSK		= (1 << 5),
 	IWM_POWER_FLAGS_BT_SCO_ENA			= (1 << 8),
 	IWM_POWER_FLAGS_ADVANCE_PM_ENA_MSK		= (1 << 9),
 	IWM_POWER_FLAGS_LPRX_ENA_MSK		= (1 << 11),
 	IWM_POWER_FLAGS_UAPSD_MISBEHAVING_ENA_MSK	= (1 << 12),
 };
 
 #define IWM_POWER_VEC_SIZE 5
 
 /**
  * struct iwm_powertable_cmd - legacy power command. Beside old API support this
  *	is used also with a new	power API for device wide power settings.
  * IWM_POWER_TABLE_CMD = 0x77 (command, has simple generic response)
  *
  * @flags:		Power table command flags from IWM_POWER_FLAGS_*
  * @keep_alive_seconds: Keep alive period in seconds. Default - 25 sec.
  *			Minimum allowed:- 3 * DTIM. Keep alive period must be
  *			set regardless of power scheme or current power state.
  *			FW use this value also when PM is disabled.
  * @rx_data_timeout:    Minimum time (usec) from last Rx packet for AM to
  *			PSM transition - legacy PM
  * @tx_data_timeout:    Minimum time (usec) from last Tx packet for AM to
  *			PSM transition - legacy PM
  * @sleep_interval:	not in use
  * @skip_dtim_periods:	Number of DTIM periods to skip if Skip over DTIM flag
  *			is set. For example, if it is required to skip over
  *			one DTIM, this value need to be set to 2 (DTIM periods).
  * @lprx_rssi_threshold: Signal strength up to which LP RX can be enabled.
  *			Default: 80dbm
  */
 struct iwm_powertable_cmd {
 	/* PM_POWER_TABLE_CMD_API_S_VER_6 */
 	uint16_t flags;
 	uint8_t keep_alive_seconds;
 	uint8_t debug_flags;
 	uint32_t rx_data_timeout;
 	uint32_t tx_data_timeout;
 	uint32_t sleep_interval[IWM_POWER_VEC_SIZE];
 	uint32_t skip_dtim_periods;
 	uint32_t lprx_rssi_threshold;
 } __packed;
 
 /**
  * enum iwm_device_power_flags - masks for device power command flags
  * @DEVIC_POWER_FLAGS_POWER_SAVE_ENA_MSK: '1' Allow to save power by turning off
  *	receiver and transmitter. '0' - does not allow. This flag should be
  *	always set to '1' unless one need to disable actual power down for debug
  *	purposes.
  * @IWM_DEVICE_POWER_FLAGS_CAM_MSK: '1' CAM (Continuous Active Mode) is set, meaning
  *	that power management is disabled. '0' Power management is enabled, one
  *	of power schemes is applied.
 */
 enum iwm_device_power_flags {
 	IWM_DEVICE_POWER_FLAGS_POWER_SAVE_ENA_MSK	= (1 << 0),
 	IWM_DEVICE_POWER_FLAGS_CAM_MSK		= (1 << 13),
 };
 
 /**
  * struct iwm_device_power_cmd - device wide power command.
  * IWM_DEVICE_POWER_CMD = 0x77 (command, has simple generic response)
  *
  * @flags:	Power table command flags from IWM_DEVICE_POWER_FLAGS_*
  */
 struct iwm_device_power_cmd {
 	/* PM_POWER_TABLE_CMD_API_S_VER_6 */
 	uint16_t flags;
 	uint16_t reserved;
 } __packed;
 
 /**
  * struct iwm_mac_power_cmd - New power command containing uAPSD support
  * IWM_MAC_PM_POWER_TABLE = 0xA9 (command, has simple generic response)
  * @id_and_color:	MAC contex identifier
  * @flags:		Power table command flags from POWER_FLAGS_*
  * @keep_alive_seconds:	Keep alive period in seconds. Default - 25 sec.
  *			Minimum allowed:- 3 * DTIM. Keep alive period must be
  *			set regardless of power scheme or current power state.
  *			FW use this value also when PM is disabled.
  * @rx_data_timeout:    Minimum time (usec) from last Rx packet for AM to
  *			PSM transition - legacy PM
  * @tx_data_timeout:    Minimum time (usec) from last Tx packet for AM to
  *			PSM transition - legacy PM
  * @sleep_interval:	not in use
  * @skip_dtim_periods:	Number of DTIM periods to skip if Skip over DTIM flag
  *			is set. For example, if it is required to skip over
  *			one DTIM, this value need to be set to 2 (DTIM periods).
  * @rx_data_timeout_uapsd: Minimum time (usec) from last Rx packet for AM to
  *			PSM transition - uAPSD
  * @tx_data_timeout_uapsd: Minimum time (usec) from last Tx packet for AM to
  *			PSM transition - uAPSD
  * @lprx_rssi_threshold: Signal strength up to which LP RX can be enabled.
  *			Default: 80dbm
  * @num_skip_dtim:	Number of DTIMs to skip if Skip over DTIM flag is set
  * @snooze_interval:	Maximum time between attempts to retrieve buffered data
  *			from the AP [msec]
  * @snooze_window:	A window of time in which PBW snoozing insures that all
  *			packets received. It is also the minimum time from last
  *			received unicast RX packet, before client stops snoozing
  *			for data. [msec]
  * @snooze_step:	TBD
  * @qndp_tid:		TID client shall use for uAPSD QNDP triggers
  * @uapsd_ac_flags:	Set trigger-enabled and delivery-enabled indication for
  *			each corresponding AC.
  *			Use IEEE80211_WMM_IE_STA_QOSINFO_AC* for correct values.
  * @uapsd_max_sp:	Use IEEE80211_WMM_IE_STA_QOSINFO_SP_* for correct
  *			values.
  * @heavy_tx_thld_packets:	TX threshold measured in number of packets
  * @heavy_rx_thld_packets:	RX threshold measured in number of packets
  * @heavy_tx_thld_percentage:	TX threshold measured in load's percentage
  * @heavy_rx_thld_percentage:	RX threshold measured in load's percentage
  * @limited_ps_threshold:
 */
 struct iwm_mac_power_cmd {
 	/* CONTEXT_DESC_API_T_VER_1 */
 	uint32_t id_and_color;
 
 	/* CLIENT_PM_POWER_TABLE_S_VER_1 */
 	uint16_t flags;
 	uint16_t keep_alive_seconds;
 	uint32_t rx_data_timeout;
 	uint32_t tx_data_timeout;
 	uint32_t rx_data_timeout_uapsd;
 	uint32_t tx_data_timeout_uapsd;
 	uint8_t lprx_rssi_threshold;
 	uint8_t skip_dtim_periods;
 	uint16_t snooze_interval;
 	uint16_t snooze_window;
 	uint8_t snooze_step;
 	uint8_t qndp_tid;
 	uint8_t uapsd_ac_flags;
 	uint8_t uapsd_max_sp;
 	uint8_t heavy_tx_thld_packets;
 	uint8_t heavy_rx_thld_packets;
 	uint8_t heavy_tx_thld_percentage;
 	uint8_t heavy_rx_thld_percentage;
 	uint8_t limited_ps_threshold;
 	uint8_t reserved;
 } __packed;
 
 /*
  * struct iwm_uapsd_misbehaving_ap_notif - FW sends this notification when
  * associated AP is identified as improperly implementing uAPSD protocol.
  * IWM_PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78
  * @sta_id: index of station in uCode's station table - associated AP ID in
  *	    this context.
  */
 struct iwm_uapsd_misbehaving_ap_notif {
 	uint32_t sta_id;
 	uint8_t mac_id;
 	uint8_t reserved[3];
 } __packed;
 
 /**
  * struct iwm_beacon_filter_cmd
  * IWM_REPLY_BEACON_FILTERING_CMD = 0xd2 (command)
  * @id_and_color: MAC contex identifier
  * @bf_energy_delta: Used for RSSI filtering, if in 'normal' state. Send beacon
  *      to driver if delta in Energy values calculated for this and last
  *      passed beacon is greater than this threshold. Zero value means that
  *      the Energy change is ignored for beacon filtering, and beacon will
  *      not be forced to be sent to driver regardless of this delta. Typical
  *      energy delta 5dB.
  * @bf_roaming_energy_delta: Used for RSSI filtering, if in 'roaming' state.
  *      Send beacon to driver if delta in Energy values calculated for this
  *      and last passed beacon is greater than this threshold. Zero value
  *      means that the Energy change is ignored for beacon filtering while in
  *      Roaming state, typical energy delta 1dB.
  * @bf_roaming_state: Used for RSSI filtering. If absolute Energy values
  *      calculated for current beacon is less than the threshold, use
  *      Roaming Energy Delta Threshold, otherwise use normal Energy Delta
  *      Threshold. Typical energy threshold is -72dBm.
  * @bf_temp_threshold: This threshold determines the type of temperature
  *	filtering (Slow or Fast) that is selected (Units are in Celsuis):
  *      If the current temperature is above this threshold - Fast filter
  *	will be used, If the current temperature is below this threshold -
  *	Slow filter will be used.
  * @bf_temp_fast_filter: Send Beacon to driver if delta in temperature values
  *      calculated for this and the last passed beacon is greater than this
  *      threshold. Zero value means that the temperature change is ignored for
  *      beacon filtering; beacons will not be  forced to be sent to driver
  *      regardless of whether its temperature has been changed.
  * @bf_temp_slow_filter: Send Beacon to driver if delta in temperature values
  *      calculated for this and the last passed beacon is greater than this
  *      threshold. Zero value means that the temperature change is ignored for
  *      beacon filtering; beacons will not be forced to be sent to driver
  *      regardless of whether its temperature has been changed.
  * @bf_enable_beacon_filter: 1, beacon filtering is enabled; 0, disabled.
  * @bf_filter_escape_timer: Send beacons to to driver if no beacons were passed
  *      for a specific period of time. Units: Beacons.
  * @ba_escape_timer: Fully receive and parse beacon if no beacons were passed
  *      for a longer period of time then this escape-timeout. Units: Beacons.
  * @ba_enable_beacon_abort: 1, beacon abort is enabled; 0, disabled.
  */
 struct iwm_beacon_filter_cmd {
 	uint32_t bf_energy_delta;
 	uint32_t bf_roaming_energy_delta;
 	uint32_t bf_roaming_state;
 	uint32_t bf_temp_threshold;
 	uint32_t bf_temp_fast_filter;
 	uint32_t bf_temp_slow_filter;
 	uint32_t bf_enable_beacon_filter;
 	uint32_t bf_debug_flag;
 	uint32_t bf_escape_timer;
 	uint32_t ba_escape_timer;
 	uint32_t ba_enable_beacon_abort;
 } __packed;
 
 /* Beacon filtering and beacon abort */
 #define IWM_BF_ENERGY_DELTA_DEFAULT 5
 #define IWM_BF_ENERGY_DELTA_MAX 255
 #define IWM_BF_ENERGY_DELTA_MIN 0
 
 #define IWM_BF_ROAMING_ENERGY_DELTA_DEFAULT 1
 #define IWM_BF_ROAMING_ENERGY_DELTA_MAX 255
 #define IWM_BF_ROAMING_ENERGY_DELTA_MIN 0
 
 #define IWM_BF_ROAMING_STATE_DEFAULT 72
 #define IWM_BF_ROAMING_STATE_MAX 255
 #define IWM_BF_ROAMING_STATE_MIN 0
 
 #define IWM_BF_TEMP_THRESHOLD_DEFAULT 112
 #define IWM_BF_TEMP_THRESHOLD_MAX 255
 #define IWM_BF_TEMP_THRESHOLD_MIN 0
 
 #define IWM_BF_TEMP_FAST_FILTER_DEFAULT 1
 #define IWM_BF_TEMP_FAST_FILTER_MAX 255
 #define IWM_BF_TEMP_FAST_FILTER_MIN 0
 
 #define IWM_BF_TEMP_SLOW_FILTER_DEFAULT 5
 #define IWM_BF_TEMP_SLOW_FILTER_MAX 255
 #define IWM_BF_TEMP_SLOW_FILTER_MIN 0
 
 #define IWM_BF_ENABLE_BEACON_FILTER_DEFAULT 1
 
 #define IWM_BF_DEBUG_FLAG_DEFAULT 0
 
 #define IWM_BF_ESCAPE_TIMER_DEFAULT 50
 #define IWM_BF_ESCAPE_TIMER_MAX 1024
 #define IWM_BF_ESCAPE_TIMER_MIN 0
 
 #define IWM_BA_ESCAPE_TIMER_DEFAULT 6
 #define IWM_BA_ESCAPE_TIMER_D3 9
 #define IWM_BA_ESCAPE_TIMER_MAX 1024
 #define IWM_BA_ESCAPE_TIMER_MIN 0
 
 #define IWM_BA_ENABLE_BEACON_ABORT_DEFAULT 1
 
 #define IWM_BF_CMD_CONFIG_DEFAULTS					     \
 	.bf_energy_delta = htole32(IWM_BF_ENERGY_DELTA_DEFAULT),	     \
 	.bf_roaming_energy_delta =					     \
 		htole32(IWM_BF_ROAMING_ENERGY_DELTA_DEFAULT),	     \
 	.bf_roaming_state = htole32(IWM_BF_ROAMING_STATE_DEFAULT),	     \
 	.bf_temp_threshold = htole32(IWM_BF_TEMP_THRESHOLD_DEFAULT),     \
 	.bf_temp_fast_filter = htole32(IWM_BF_TEMP_FAST_FILTER_DEFAULT), \
 	.bf_temp_slow_filter = htole32(IWM_BF_TEMP_SLOW_FILTER_DEFAULT), \
 	.bf_debug_flag = htole32(IWM_BF_DEBUG_FLAG_DEFAULT),	     \
 	.bf_escape_timer = htole32(IWM_BF_ESCAPE_TIMER_DEFAULT),	     \
 	.ba_escape_timer = htole32(IWM_BA_ESCAPE_TIMER_DEFAULT)
 
 /*
  * END mvm/fw-api-power.h
  */
 
 /*
  * BEGIN mvm/fw-api-rs.h
  */
 
 /*
  * These serve as indexes into
  * struct iwm_rate_info fw_rate_idx_to_plcp[IWM_RATE_COUNT];
  * TODO: avoid overlap between legacy and HT rates
  */
 enum {
 	IWM_RATE_1M_INDEX = 0,
 	IWM_FIRST_CCK_RATE = IWM_RATE_1M_INDEX,
 	IWM_RATE_2M_INDEX,
 	IWM_RATE_5M_INDEX,
 	IWM_RATE_11M_INDEX,
 	IWM_LAST_CCK_RATE = IWM_RATE_11M_INDEX,
 	IWM_RATE_6M_INDEX,
 	IWM_FIRST_OFDM_RATE = IWM_RATE_6M_INDEX,
 	IWM_RATE_MCS_0_INDEX = IWM_RATE_6M_INDEX,
 	IWM_FIRST_HT_RATE = IWM_RATE_MCS_0_INDEX,
 	IWM_FIRST_VHT_RATE = IWM_RATE_MCS_0_INDEX,
 	IWM_RATE_9M_INDEX,
 	IWM_RATE_12M_INDEX,
 	IWM_RATE_MCS_1_INDEX = IWM_RATE_12M_INDEX,
 	IWM_RATE_18M_INDEX,
 	IWM_RATE_MCS_2_INDEX = IWM_RATE_18M_INDEX,
 	IWM_RATE_24M_INDEX,
 	IWM_RATE_MCS_3_INDEX = IWM_RATE_24M_INDEX,
 	IWM_RATE_36M_INDEX,
 	IWM_RATE_MCS_4_INDEX = IWM_RATE_36M_INDEX,
 	IWM_RATE_48M_INDEX,
 	IWM_RATE_MCS_5_INDEX = IWM_RATE_48M_INDEX,
 	IWM_RATE_54M_INDEX,
 	IWM_RATE_MCS_6_INDEX = IWM_RATE_54M_INDEX,
 	IWM_LAST_NON_HT_RATE = IWM_RATE_54M_INDEX,
 	IWM_RATE_60M_INDEX,
 	IWM_RATE_MCS_7_INDEX = IWM_RATE_60M_INDEX,
 	IWM_LAST_HT_RATE = IWM_RATE_MCS_7_INDEX,
 	IWM_RATE_MCS_8_INDEX,
 	IWM_RATE_MCS_9_INDEX,
 	IWM_LAST_VHT_RATE = IWM_RATE_MCS_9_INDEX,
 	IWM_RATE_COUNT_LEGACY = IWM_LAST_NON_HT_RATE + 1,
 	IWM_RATE_COUNT = IWM_LAST_VHT_RATE + 1,
 };
 
 #define IWM_RATE_BIT_MSK(r) (1 << (IWM_RATE_##r##M_INDEX))
 
 /* fw API values for legacy bit rates, both OFDM and CCK */
 enum {
 	IWM_RATE_6M_PLCP  = 13,
 	IWM_RATE_9M_PLCP  = 15,
 	IWM_RATE_12M_PLCP = 5,
 	IWM_RATE_18M_PLCP = 7,
 	IWM_RATE_24M_PLCP = 9,
 	IWM_RATE_36M_PLCP = 11,
 	IWM_RATE_48M_PLCP = 1,
 	IWM_RATE_54M_PLCP = 3,
 	IWM_RATE_1M_PLCP  = 10,
 	IWM_RATE_2M_PLCP  = 20,
 	IWM_RATE_5M_PLCP  = 55,
 	IWM_RATE_11M_PLCP = 110,
 	IWM_RATE_INVM_PLCP = -1,
 };
 
 /*
  * rate_n_flags bit fields
  *
  * The 32-bit value has different layouts in the low 8 bites depending on the
  * format. There are three formats, HT, VHT and legacy (11abg, with subformats
  * for CCK and OFDM).
  *
  * High-throughput (HT) rate format
  *	bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM)
  * Very High-throughput (VHT) rate format
  *	bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM)
  * Legacy OFDM rate format for bits 7:0
  *	bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM)
  * Legacy CCK rate format for bits 7:0:
  *	bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK)
  */
 
 /* Bit 8: (1) HT format, (0) legacy or VHT format */
 #define IWM_RATE_MCS_HT_POS 8
 #define IWM_RATE_MCS_HT_MSK (1 << IWM_RATE_MCS_HT_POS)
 
 /* Bit 9: (1) CCK, (0) OFDM.  HT (bit 8) must be "0" for this bit to be valid */
 #define IWM_RATE_MCS_CCK_POS 9
 #define IWM_RATE_MCS_CCK_MSK (1 << IWM_RATE_MCS_CCK_POS)
 
 /* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */
 #define IWM_RATE_MCS_VHT_POS 26
 #define IWM_RATE_MCS_VHT_MSK (1 << IWM_RATE_MCS_VHT_POS)
 
 
 /*
  * High-throughput (HT) rate format for bits 7:0
  *
  *  2-0:  MCS rate base
  *        0)   6 Mbps
  *        1)  12 Mbps
  *        2)  18 Mbps
  *        3)  24 Mbps
  *        4)  36 Mbps
  *        5)  48 Mbps
  *        6)  54 Mbps
  *        7)  60 Mbps
  *  4-3:  0)  Single stream (SISO)
  *        1)  Dual stream (MIMO)
  *        2)  Triple stream (MIMO)
  *    5:  Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
  *  (bits 7-6 are zero)
  *
  * Together the low 5 bits work out to the MCS index because we don't
  * support MCSes above 15/23, and 0-7 have one stream, 8-15 have two
  * streams and 16-23 have three streams. We could also support MCS 32
  * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.)
  */
 #define IWM_RATE_HT_MCS_RATE_CODE_MSK	0x7
 #define IWM_RATE_HT_MCS_NSS_POS             3
 #define IWM_RATE_HT_MCS_NSS_MSK             (3 << IWM_RATE_HT_MCS_NSS_POS)
 
 /* Bit 10: (1) Use Green Field preamble */
 #define IWM_RATE_HT_MCS_GF_POS		10
 #define IWM_RATE_HT_MCS_GF_MSK		(1 << IWM_RATE_HT_MCS_GF_POS)
 
 #define IWM_RATE_HT_MCS_INDEX_MSK		0x3f
 
 /*
  * Very High-throughput (VHT) rate format for bits 7:0
  *
  *  3-0:  VHT MCS (0-9)
  *  5-4:  number of streams - 1:
  *        0)  Single stream (SISO)
  *        1)  Dual stream (MIMO)
  *        2)  Triple stream (MIMO)
  */
 
 /* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */
 #define IWM_RATE_VHT_MCS_RATE_CODE_MSK	0xf
 #define IWM_RATE_VHT_MCS_NSS_POS		4
 #define IWM_RATE_VHT_MCS_NSS_MSK		(3 << IWM_RATE_VHT_MCS_NSS_POS)
 
 /*
  * Legacy OFDM rate format for bits 7:0
  *
  *  3-0:  0xD)   6 Mbps
  *        0xF)   9 Mbps
  *        0x5)  12 Mbps
  *        0x7)  18 Mbps
  *        0x9)  24 Mbps
  *        0xB)  36 Mbps
  *        0x1)  48 Mbps
  *        0x3)  54 Mbps
  * (bits 7-4 are 0)
  *
  * Legacy CCK rate format for bits 7:0:
  * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK):
  *
  *  6-0:   10)  1 Mbps
  *         20)  2 Mbps
  *         55)  5.5 Mbps
  *        110)  11 Mbps
  * (bit 7 is 0)
  */
 #define IWM_RATE_LEGACY_RATE_MSK 0xff
 
 
 /*
  * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz
  * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT
  */
 #define IWM_RATE_MCS_CHAN_WIDTH_POS		11
 #define IWM_RATE_MCS_CHAN_WIDTH_MSK		(3 << IWM_RATE_MCS_CHAN_WIDTH_POS)
 #define IWM_RATE_MCS_CHAN_WIDTH_20		(0 << IWM_RATE_MCS_CHAN_WIDTH_POS)
 #define IWM_RATE_MCS_CHAN_WIDTH_40		(1 << IWM_RATE_MCS_CHAN_WIDTH_POS)
 #define IWM_RATE_MCS_CHAN_WIDTH_80		(2 << IWM_RATE_MCS_CHAN_WIDTH_POS)
 #define IWM_RATE_MCS_CHAN_WIDTH_160		(3 << IWM_RATE_MCS_CHAN_WIDTH_POS)
 
 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
 #define IWM_RATE_MCS_SGI_POS		13
 #define IWM_RATE_MCS_SGI_MSK		(1 << IWM_RATE_MCS_SGI_POS)
 
 /* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */
 #define IWM_RATE_MCS_ANT_POS		14
 #define IWM_RATE_MCS_ANT_A_MSK		(1 << IWM_RATE_MCS_ANT_POS)
 #define IWM_RATE_MCS_ANT_B_MSK		(2 << IWM_RATE_MCS_ANT_POS)
 #define IWM_RATE_MCS_ANT_C_MSK		(4 << IWM_RATE_MCS_ANT_POS)
 #define IWM_RATE_MCS_ANT_AB_MSK		(IWM_RATE_MCS_ANT_A_MSK | \
 					 IWM_RATE_MCS_ANT_B_MSK)
 #define IWM_RATE_MCS_ANT_ABC_MSK		(IWM_RATE_MCS_ANT_AB_MSK | \
 					 IWM_RATE_MCS_ANT_C_MSK)
 #define IWM_RATE_MCS_ANT_MSK		IWM_RATE_MCS_ANT_ABC_MSK
 #define IWM_RATE_MCS_ANT_NUM 3
 
 /* Bit 17-18: (0) SS, (1) SS*2 */
 #define IWM_RATE_MCS_STBC_POS		17
 #define IWM_RATE_MCS_STBC_MSK		(1 << IWM_RATE_MCS_STBC_POS)
 
 /* Bit 19: (0) Beamforming is off, (1) Beamforming is on */
 #define IWM_RATE_MCS_BF_POS			19
 #define IWM_RATE_MCS_BF_MSK			(1 << IWM_RATE_MCS_BF_POS)
 
 /* Bit 20: (0) ZLF is off, (1) ZLF is on */
 #define IWM_RATE_MCS_ZLF_POS		20
 #define IWM_RATE_MCS_ZLF_MSK		(1 << IWM_RATE_MCS_ZLF_POS)
 
 /* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */
 #define IWM_RATE_MCS_DUP_POS		24
 #define IWM_RATE_MCS_DUP_MSK		(3 << IWM_RATE_MCS_DUP_POS)
 
 /* Bit 27: (1) LDPC enabled, (0) LDPC disabled */
 #define IWM_RATE_MCS_LDPC_POS		27
 #define IWM_RATE_MCS_LDPC_MSK		(1 << IWM_RATE_MCS_LDPC_POS)
 
 
 /* Link Quality definitions */
 
 /* # entries in rate scale table to support Tx retries */
 #define  IWM_LQ_MAX_RETRY_NUM 16
 
 /* Link quality command flags bit fields */
 
 /* Bit 0: (0) Don't use RTS (1) Use RTS */
 #define IWM_LQ_FLAG_USE_RTS_POS             0
 #define IWM_LQ_FLAG_USE_RTS_MSK	        (1 << IWM_LQ_FLAG_USE_RTS_POS)
 
 /* Bit 1-3: LQ command color. Used to match responses to LQ commands */
 #define IWM_LQ_FLAG_COLOR_POS               1
 #define IWM_LQ_FLAG_COLOR_MSK               (7 << IWM_LQ_FLAG_COLOR_POS)
 
 /* Bit 4-5: Tx RTS BW Signalling
  * (0) No RTS BW signalling
  * (1) Static BW signalling
  * (2) Dynamic BW signalling
  */
 #define IWM_LQ_FLAG_RTS_BW_SIG_POS          4
 #define IWM_LQ_FLAG_RTS_BW_SIG_NONE         (0 << IWM_LQ_FLAG_RTS_BW_SIG_POS)
 #define IWM_LQ_FLAG_RTS_BW_SIG_STATIC       (1 << IWM_LQ_FLAG_RTS_BW_SIG_POS)
 #define IWM_LQ_FLAG_RTS_BW_SIG_DYNAMIC      (2 << IWM_LQ_FLAG_RTS_BW_SIG_POS)
 
 /* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection
  * Dyanmic BW selection allows Tx with narrower BW then requested in rates
  */
 #define IWM_LQ_FLAG_DYNAMIC_BW_POS          6
 #define IWM_LQ_FLAG_DYNAMIC_BW_MSK          (1 << IWM_LQ_FLAG_DYNAMIC_BW_POS)
 
 /**
  * struct iwm_lq_cmd - link quality command
  * @sta_id: station to update
  * @control: not used
  * @flags: combination of IWM_LQ_FLAG_*
  * @mimo_delim: the first SISO index in rs_table, which separates MIMO
  *	and SISO rates
  * @single_stream_ant_msk: best antenna for SISO (can be dual in CDD).
  *	Should be ANT_[ABC]
  * @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC]
  * @initial_rate_index: first index from rs_table per AC category
  * @agg_time_limit: aggregation max time threshold in usec/100, meaning
  *	value of 100 is one usec. Range is 100 to 8000
  * @agg_disable_start_th: try-count threshold for starting aggregation.
  *	If a frame has higher try-count, it should not be selected for
  *	starting an aggregation sequence.
  * @agg_frame_cnt_limit: max frame count in an aggregation.
  *	0: no limit
  *	1: no aggregation (one frame per aggregation)
  *	2 - 0x3f: maximal number of frames (up to 3f == 63)
  * @rs_table: array of rates for each TX try, each is rate_n_flags,
  *	meaning it is a combination of IWM_RATE_MCS_* and IWM_RATE_*_PLCP
  * @bf_params: beam forming params, currently not used
  */
 struct iwm_lq_cmd {
 	uint8_t sta_id;
 	uint8_t reserved1;
 	uint16_t control;
 	/* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */
 	uint8_t flags;
 	uint8_t mimo_delim;
 	uint8_t single_stream_ant_msk;
 	uint8_t dual_stream_ant_msk;
 	uint8_t initial_rate_index[IWM_AC_NUM];
 	/* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */
 	uint16_t agg_time_limit;
 	uint8_t agg_disable_start_th;
 	uint8_t agg_frame_cnt_limit;
 	uint32_t reserved2;
 	uint32_t rs_table[IWM_LQ_MAX_RETRY_NUM];
 	uint32_t bf_params;
 }; /* LINK_QUALITY_CMD_API_S_VER_1 */
 
 /*
  * END mvm/fw-api-rs.h
  */
 
 /*
  * BEGIN mvm/fw-api-tx.h
  */
 
 /**
  * enum iwm_tx_flags - bitmasks for tx_flags in TX command
  * @IWM_TX_CMD_FLG_PROT_REQUIRE: use RTS or CTS-to-self to protect the frame
  * @IWM_TX_CMD_FLG_ACK: expect ACK from receiving station
  * @IWM_TX_CMD_FLG_STA_RATE: use RS table with initial index from the TX command.
  *	Otherwise, use rate_n_flags from the TX command
  * @IWM_TX_CMD_FLG_BA: this frame is a block ack
  * @IWM_TX_CMD_FLG_BAR: this frame is a BA request, immediate BAR is expected
  *	Must set IWM_TX_CMD_FLG_ACK with this flag.
  * @IWM_TX_CMD_FLG_TXOP_PROT: protect frame with full TXOP protection
  * @IWM_TX_CMD_FLG_VHT_NDPA: mark frame is NDPA for VHT beamformer sequence
  * @IWM_TX_CMD_FLG_HT_NDPA: mark frame is NDPA for HT beamformer sequence
  * @IWM_TX_CMD_FLG_CSI_FDBK2HOST: mark to send feedback to host (only if good CRC)
  * @IWM_TX_CMD_FLG_BT_DIS: disable BT priority for this frame
  * @IWM_TX_CMD_FLG_SEQ_CTL: set if FW should override the sequence control.
  *	Should be set for mgmt, non-QOS data, mcast, bcast and in scan command
  * @IWM_TX_CMD_FLG_MORE_FRAG: this frame is non-last MPDU
  * @IWM_TX_CMD_FLG_NEXT_FRAME: this frame includes information of the next frame
  * @IWM_TX_CMD_FLG_TSF: FW should calculate and insert TSF in the frame
  *	Should be set for beacons and probe responses
  * @IWM_TX_CMD_FLG_CALIB: activate PA TX power calibrations
  * @IWM_TX_CMD_FLG_KEEP_SEQ_CTL: if seq_ctl is set, don't increase inner seq count
  * @IWM_TX_CMD_FLG_AGG_START: allow this frame to start aggregation
  * @IWM_TX_CMD_FLG_MH_PAD: driver inserted 2 byte padding after MAC header.
  *	Should be set for 26/30 length MAC headers
  * @IWM_TX_CMD_FLG_RESP_TO_DRV: zero this if the response should go only to FW
  * @IWM_TX_CMD_FLG_CCMP_AGG: this frame uses CCMP for aggregation acceleration
  * @IWM_TX_CMD_FLG_TKIP_MIC_DONE: FW already performed TKIP MIC calculation
  * @IWM_TX_CMD_FLG_DUR: disable duration overwriting used in PS-Poll Assoc-id
  * @IWM_TX_CMD_FLG_FW_DROP: FW should mark frame to be dropped
  * @IWM_TX_CMD_FLG_EXEC_PAPD: execute PAPD
  * @IWM_TX_CMD_FLG_PAPD_TYPE: 0 for reference power, 1 for nominal power
  * @IWM_TX_CMD_FLG_HCCA_CHUNK: mark start of TSPEC chunk
  */
 enum iwm_tx_flags {
 	IWM_TX_CMD_FLG_PROT_REQUIRE	= (1 << 0),
 	IWM_TX_CMD_FLG_ACK		= (1 << 3),
 	IWM_TX_CMD_FLG_STA_RATE		= (1 << 4),
 	IWM_TX_CMD_FLG_BA		= (1 << 5),
 	IWM_TX_CMD_FLG_BAR		= (1 << 6),
 	IWM_TX_CMD_FLG_TXOP_PROT	= (1 << 7),
 	IWM_TX_CMD_FLG_VHT_NDPA		= (1 << 8),
 	IWM_TX_CMD_FLG_HT_NDPA		= (1 << 9),
 	IWM_TX_CMD_FLG_CSI_FDBK2HOST	= (1 << 10),
 	IWM_TX_CMD_FLG_BT_DIS		= (1 << 12),
 	IWM_TX_CMD_FLG_SEQ_CTL		= (1 << 13),
 	IWM_TX_CMD_FLG_MORE_FRAG	= (1 << 14),
 	IWM_TX_CMD_FLG_NEXT_FRAME	= (1 << 15),
 	IWM_TX_CMD_FLG_TSF		= (1 << 16),
 	IWM_TX_CMD_FLG_CALIB		= (1 << 17),
 	IWM_TX_CMD_FLG_KEEP_SEQ_CTL	= (1 << 18),
 	IWM_TX_CMD_FLG_AGG_START	= (1 << 19),
 	IWM_TX_CMD_FLG_MH_PAD		= (1 << 20),
 	IWM_TX_CMD_FLG_RESP_TO_DRV	= (1 << 21),
 	IWM_TX_CMD_FLG_CCMP_AGG		= (1 << 22),
 	IWM_TX_CMD_FLG_TKIP_MIC_DONE	= (1 << 23),
 	IWM_TX_CMD_FLG_DUR		= (1 << 25),
 	IWM_TX_CMD_FLG_FW_DROP		= (1 << 26),
 	IWM_TX_CMD_FLG_EXEC_PAPD	= (1 << 27),
 	IWM_TX_CMD_FLG_PAPD_TYPE	= (1 << 28),
 	IWM_TX_CMD_FLG_HCCA_CHUNK	= (1 << 31)
 }; /* IWM_TX_FLAGS_BITS_API_S_VER_1 */
 
 /**
  * enum iwm_tx_pm_timeouts - pm timeout values in TX command
  * @IWM_PM_FRAME_NONE: no need to suspend sleep mode
  * @IWM_PM_FRAME_MGMT: fw suspend sleep mode for 100TU
  * @IWM_PM_FRAME_ASSOC: fw suspend sleep mode for 10sec
  */
 enum iwm_tx_pm_timeouts {
 	IWM_PM_FRAME_NONE           = 0,
 	IWM_PM_FRAME_MGMT           = 2,
 	IWM_PM_FRAME_ASSOC          = 3,
 };
 
 /*
  * TX command security control
  */
 #define IWM_TX_CMD_SEC_WEP		0x01
 #define IWM_TX_CMD_SEC_CCM		0x02
 #define IWM_TX_CMD_SEC_TKIP		0x03
 #define IWM_TX_CMD_SEC_EXT		0x04
 #define IWM_TX_CMD_SEC_MSK		0x07
 #define IWM_TX_CMD_SEC_WEP_KEY_IDX_POS	6
 #define IWM_TX_CMD_SEC_WEP_KEY_IDX_MSK	0xc0
 #define IWM_TX_CMD_SEC_KEY128		0x08
 
 /* TODO: how does these values are OK with only 16 bit variable??? */
 /*
  * TX command next frame info
  *
  * bits 0:2 - security control (IWM_TX_CMD_SEC_*)
  * bit 3 - immediate ACK required
  * bit 4 - rate is taken from STA table
  * bit 5 - frame belongs to BA stream
  * bit 6 - immediate BA response expected
  * bit 7 - unused
  * bits 8:15 - Station ID
  * bits 16:31 - rate
  */
 #define IWM_TX_CMD_NEXT_FRAME_ACK_MSK		(0x8)
 #define IWM_TX_CMD_NEXT_FRAME_STA_RATE_MSK	(0x10)
 #define IWM_TX_CMD_NEXT_FRAME_BA_MSK		(0x20)
 #define IWM_TX_CMD_NEXT_FRAME_IMM_BA_RSP_MSK	(0x40)
 #define IWM_TX_CMD_NEXT_FRAME_FLAGS_MSK		(0xf8)
 #define IWM_TX_CMD_NEXT_FRAME_STA_ID_MSK	(0xff00)
 #define IWM_TX_CMD_NEXT_FRAME_STA_ID_POS	(8)
 #define IWM_TX_CMD_NEXT_FRAME_RATE_MSK		(0xffff0000)
 #define IWM_TX_CMD_NEXT_FRAME_RATE_POS		(16)
 
 /*
  * TX command Frame life time in us - to be written in pm_frame_timeout
  */
 #define IWM_TX_CMD_LIFE_TIME_INFINITE	0xFFFFFFFF
 #define IWM_TX_CMD_LIFE_TIME_DEFAULT	2000000 /* 2000 ms*/
 #define IWM_TX_CMD_LIFE_TIME_PROBE_RESP	40000 /* 40 ms */
 #define IWM_TX_CMD_LIFE_TIME_EXPIRED_FRAME	0
 
 /*
  * TID for non QoS frames - to be written in tid_tspec
  */
 #define IWM_TID_NON_QOS	IWM_MAX_TID_COUNT
 
 /*
  * Limits on the retransmissions - to be written in {data,rts}_retry_limit
  */
 #define IWM_DEFAULT_TX_RETRY			15
 #define IWM_MGMT_DFAULT_RETRY_LIMIT		3
 #define IWM_RTS_DFAULT_RETRY_LIMIT		60
 #define IWM_BAR_DFAULT_RETRY_LIMIT		60
 #define IWM_LOW_RETRY_LIMIT			7
 
 /* TODO: complete documentation for try_cnt and btkill_cnt */
 /**
  * struct iwm_tx_cmd - TX command struct to FW
  * ( IWM_TX_CMD = 0x1c )
  * @len: in bytes of the payload, see below for details
  * @next_frame_len: same as len, but for next frame (0 if not applicable)
  *	Used for fragmentation and bursting, but not in 11n aggregation.
  * @tx_flags: combination of IWM_TX_CMD_FLG_*
  * @rate_n_flags: rate for *all* Tx attempts, if IWM_TX_CMD_FLG_STA_RATE_MSK is
  *	cleared. Combination of IWM_RATE_MCS_*
  * @sta_id: index of destination station in FW station table
  * @sec_ctl: security control, IWM_TX_CMD_SEC_*
  * @initial_rate_index: index into the rate table for initial TX attempt.
  *	Applied if IWM_TX_CMD_FLG_STA_RATE_MSK is set, normally 0 for data frames.
  * @key: security key
  * @next_frame_flags: IWM_TX_CMD_SEC_* and IWM_TX_CMD_NEXT_FRAME_*
  * @life_time: frame life time (usecs??)
  * @dram_lsb_ptr: Physical address of scratch area in the command (try_cnt +
  *	btkill_cnd + reserved), first 32 bits. "0" disables usage.
  * @dram_msb_ptr: upper bits of the scratch physical address
  * @rts_retry_limit: max attempts for RTS
  * @data_retry_limit: max attempts to send the data packet
  * @tid_spec: TID/tspec
  * @pm_frame_timeout: PM TX frame timeout
  * @driver_txop: duration od EDCA TXOP, in 32-usec units. Set this if not
  *	specified by HCCA protocol
  *
  * The byte count (both len and next_frame_len) includes MAC header
  * (24/26/30/32 bytes)
  * + 2 bytes pad if 26/30 header size
  * + 8 byte IV for CCM or TKIP (not used for WEP)
  * + Data payload
  * + 8-byte MIC (not used for CCM/WEP)
  * It does not include post-MAC padding, i.e.,
  * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.
  * Range of len: 14-2342 bytes.
  *
  * After the struct fields the MAC header is placed, plus any padding,
  * and then the actial payload.
  */
 struct iwm_tx_cmd {
 	uint16_t len;
 	uint16_t next_frame_len;
 	uint32_t tx_flags;
 	struct {
 		uint8_t try_cnt;
 		uint8_t btkill_cnt;
 		uint16_t reserved;
 	} scratch; /* DRAM_SCRATCH_API_U_VER_1 */
 	uint32_t rate_n_flags;
 	uint8_t sta_id;
 	uint8_t sec_ctl;
 	uint8_t initial_rate_index;
 	uint8_t reserved2;
 	uint8_t key[16];
 	uint16_t next_frame_flags;
 	uint16_t reserved3;
 	uint32_t life_time;
 	uint32_t dram_lsb_ptr;
 	uint8_t dram_msb_ptr;
 	uint8_t rts_retry_limit;
 	uint8_t data_retry_limit;
 	uint8_t tid_tspec;
 	uint16_t pm_frame_timeout;
 	uint16_t driver_txop;
 	uint8_t payload[0];
 	struct ieee80211_frame hdr[0];
 } __packed; /* IWM_TX_CMD_API_S_VER_3 */
 
 /*
  * TX response related data
  */
 
 /*
  * enum iwm_tx_status - status that is returned by the fw after attempts to Tx
  * @IWM_TX_STATUS_SUCCESS:
  * @IWM_TX_STATUS_DIRECT_DONE:
  * @IWM_TX_STATUS_POSTPONE_DELAY:
  * @IWM_TX_STATUS_POSTPONE_FEW_BYTES:
  * @IWM_TX_STATUS_POSTPONE_BT_PRIO:
  * @IWM_TX_STATUS_POSTPONE_QUIET_PERIOD:
  * @IWM_TX_STATUS_POSTPONE_CALC_TTAK:
  * @IWM_TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY:
  * @IWM_TX_STATUS_FAIL_SHORT_LIMIT:
  * @IWM_TX_STATUS_FAIL_LONG_LIMIT:
  * @IWM_TX_STATUS_FAIL_UNDERRUN:
  * @IWM_TX_STATUS_FAIL_DRAIN_FLOW:
  * @IWM_TX_STATUS_FAIL_RFKILL_FLUSH:
  * @IWM_TX_STATUS_FAIL_LIFE_EXPIRE:
  * @IWM_TX_STATUS_FAIL_DEST_PS:
  * @IWM_TX_STATUS_FAIL_HOST_ABORTED:
  * @IWM_TX_STATUS_FAIL_BT_RETRY:
  * @IWM_TX_STATUS_FAIL_STA_INVALID:
  * @IWM_TX_TATUS_FAIL_FRAG_DROPPED:
  * @IWM_TX_STATUS_FAIL_TID_DISABLE:
  * @IWM_TX_STATUS_FAIL_FIFO_FLUSHED:
  * @IWM_TX_STATUS_FAIL_SMALL_CF_POLL:
  * @IWM_TX_STATUS_FAIL_FW_DROP:
  * @IWM_TX_STATUS_FAIL_STA_COLOR_MISMATCH: mismatch between color of Tx cmd and
  *	STA table
  * @IWM_TX_FRAME_STATUS_INTERNAL_ABORT:
  * @IWM_TX_MODE_MSK:
  * @IWM_TX_MODE_NO_BURST:
  * @IWM_TX_MODE_IN_BURST_SEQ:
  * @IWM_TX_MODE_FIRST_IN_BURST:
  * @IWM_TX_QUEUE_NUM_MSK:
  *
  * Valid only if frame_count =1
  * TODO: complete documentation
  */
 enum iwm_tx_status {
 	IWM_TX_STATUS_MSK = 0x000000ff,
 	IWM_TX_STATUS_SUCCESS = 0x01,
 	IWM_TX_STATUS_DIRECT_DONE = 0x02,
 	/* postpone TX */
 	IWM_TX_STATUS_POSTPONE_DELAY = 0x40,
 	IWM_TX_STATUS_POSTPONE_FEW_BYTES = 0x41,
 	IWM_TX_STATUS_POSTPONE_BT_PRIO = 0x42,
 	IWM_TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43,
 	IWM_TX_STATUS_POSTPONE_CALC_TTAK = 0x44,
 	/* abort TX */
 	IWM_TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81,
 	IWM_TX_STATUS_FAIL_SHORT_LIMIT = 0x82,
 	IWM_TX_STATUS_FAIL_LONG_LIMIT = 0x83,
 	IWM_TX_STATUS_FAIL_UNDERRUN = 0x84,
 	IWM_TX_STATUS_FAIL_DRAIN_FLOW = 0x85,
 	IWM_TX_STATUS_FAIL_RFKILL_FLUSH = 0x86,
 	IWM_TX_STATUS_FAIL_LIFE_EXPIRE = 0x87,
 	IWM_TX_STATUS_FAIL_DEST_PS = 0x88,
 	IWM_TX_STATUS_FAIL_HOST_ABORTED = 0x89,
 	IWM_TX_STATUS_FAIL_BT_RETRY = 0x8a,
 	IWM_TX_STATUS_FAIL_STA_INVALID = 0x8b,
 	IWM_TX_STATUS_FAIL_FRAG_DROPPED = 0x8c,
 	IWM_TX_STATUS_FAIL_TID_DISABLE = 0x8d,
 	IWM_TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e,
 	IWM_TX_STATUS_FAIL_SMALL_CF_POLL = 0x8f,
 	IWM_TX_STATUS_FAIL_FW_DROP = 0x90,
 	IWM_TX_STATUS_FAIL_STA_COLOR_MISMATCH = 0x91,
 	IWM_TX_STATUS_INTERNAL_ABORT = 0x92,
 	IWM_TX_MODE_MSK = 0x00000f00,
 	IWM_TX_MODE_NO_BURST = 0x00000000,
 	IWM_TX_MODE_IN_BURST_SEQ = 0x00000100,
 	IWM_TX_MODE_FIRST_IN_BURST = 0x00000200,
 	IWM_TX_QUEUE_NUM_MSK = 0x0001f000,
 	IWM_TX_NARROW_BW_MSK = 0x00060000,
 	IWM_TX_NARROW_BW_1DIV2 = 0x00020000,
 	IWM_TX_NARROW_BW_1DIV4 = 0x00040000,
 	IWM_TX_NARROW_BW_1DIV8 = 0x00060000,
 };
 
 /*
  * enum iwm_tx_agg_status - TX aggregation status
  * @IWM_AGG_TX_STATE_STATUS_MSK:
  * @IWM_AGG_TX_STATE_TRANSMITTED:
  * @IWM_AGG_TX_STATE_UNDERRUN:
  * @IWM_AGG_TX_STATE_BT_PRIO:
  * @IWM_AGG_TX_STATE_FEW_BYTES:
  * @IWM_AGG_TX_STATE_ABORT:
  * @IWM_AGG_TX_STATE_LAST_SENT_TTL:
  * @IWM_AGG_TX_STATE_LAST_SENT_TRY_CNT:
  * @IWM_AGG_TX_STATE_LAST_SENT_BT_KILL:
  * @IWM_AGG_TX_STATE_SCD_QUERY:
  * @IWM_AGG_TX_STATE_TEST_BAD_CRC32:
  * @IWM_AGG_TX_STATE_RESPONSE:
  * @IWM_AGG_TX_STATE_DUMP_TX:
  * @IWM_AGG_TX_STATE_DELAY_TX:
  * @IWM_AGG_TX_STATE_TRY_CNT_MSK: Retry count for 1st frame in aggregation (retries
  *	occur if tx failed for this frame when it was a member of a previous
  *	aggregation block). If rate scaling is used, retry count indicates the
  *	rate table entry used for all frames in the new agg.
  *@ IWM_AGG_TX_STATE_SEQ_NUM_MSK: Command ID and sequence number of Tx command for
  *	this frame
  *
  * TODO: complete documentation
  */
 enum iwm_tx_agg_status {
 	IWM_AGG_TX_STATE_STATUS_MSK = 0x00fff,
 	IWM_AGG_TX_STATE_TRANSMITTED = 0x000,
 	IWM_AGG_TX_STATE_UNDERRUN = 0x001,
 	IWM_AGG_TX_STATE_BT_PRIO = 0x002,
 	IWM_AGG_TX_STATE_FEW_BYTES = 0x004,
 	IWM_AGG_TX_STATE_ABORT = 0x008,
 	IWM_AGG_TX_STATE_LAST_SENT_TTL = 0x010,
 	IWM_AGG_TX_STATE_LAST_SENT_TRY_CNT = 0x020,
 	IWM_AGG_TX_STATE_LAST_SENT_BT_KILL = 0x040,
 	IWM_AGG_TX_STATE_SCD_QUERY = 0x080,
 	IWM_AGG_TX_STATE_TEST_BAD_CRC32 = 0x0100,
 	IWM_AGG_TX_STATE_RESPONSE = 0x1ff,
 	IWM_AGG_TX_STATE_DUMP_TX = 0x200,
 	IWM_AGG_TX_STATE_DELAY_TX = 0x400,
 	IWM_AGG_TX_STATE_TRY_CNT_POS = 12,
 	IWM_AGG_TX_STATE_TRY_CNT_MSK = 0xf << IWM_AGG_TX_STATE_TRY_CNT_POS,
 };
 
 #define IWM_AGG_TX_STATE_LAST_SENT_MSK  (IWM_AGG_TX_STATE_LAST_SENT_TTL| \
 				     IWM_AGG_TX_STATE_LAST_SENT_TRY_CNT| \
 				     IWM_AGG_TX_STATE_LAST_SENT_BT_KILL)
 
 /*
  * The mask below describes a status where we are absolutely sure that the MPDU
  * wasn't sent. For BA/Underrun we cannot be that sure. All we know that we've
  * written the bytes to the TXE, but we know nothing about what the DSP did.
  */
 #define IWM_AGG_TX_STAT_FRAME_NOT_SENT (IWM_AGG_TX_STATE_FEW_BYTES | \
 				    IWM_AGG_TX_STATE_ABORT | \
 				    IWM_AGG_TX_STATE_SCD_QUERY)
 
 /*
  * IWM_REPLY_TX = 0x1c (response)
  *
  * This response may be in one of two slightly different formats, indicated
  * by the frame_count field:
  *
  * 1)	No aggregation (frame_count == 1).  This reports Tx results for a single
  *	frame. Multiple attempts, at various bit rates, may have been made for
  *	this frame.
  *
  * 2)	Aggregation (frame_count > 1).  This reports Tx results for two or more
  *	frames that used block-acknowledge.  All frames were transmitted at
  *	same rate. Rate scaling may have been used if first frame in this new
  *	agg block failed in previous agg block(s).
  *
  *	Note that, for aggregation, ACK (block-ack) status is not delivered
  *	here; block-ack has not been received by the time the device records
  *	this status.
  *	This status relates to reasons the tx might have been blocked or aborted
  *	within the device, rather than whether it was received successfully by
  *	the destination station.
  */
 
 /**
  * struct iwm_agg_tx_status - per packet TX aggregation status
  * @status: enum iwm_tx_agg_status
  * @sequence: Sequence # for this frame's Tx cmd (not SSN!)
  */
 struct iwm_agg_tx_status {
 	uint16_t status;
 	uint16_t sequence;
 } __packed;
 
 /*
  * definitions for initial rate index field
  * bits [3:0] initial rate index
  * bits [6:4] rate table color, used for the initial rate
  * bit-7 invalid rate indication
  */
 #define IWM_TX_RES_INIT_RATE_INDEX_MSK 0x0f
 #define IWM_TX_RES_RATE_TABLE_COLOR_MSK 0x70
 #define IWM_TX_RES_INV_RATE_INDEX_MSK 0x80
 
 #define IWM_MVM_TX_RES_GET_TID(_ra_tid) ((_ra_tid) & 0x0f)
 #define IWM_MVM_TX_RES_GET_RA(_ra_tid) ((_ra_tid) >> 4)
 
 /**
  * struct iwm_mvm_tx_resp - notifies that fw is TXing a packet
  * ( IWM_REPLY_TX = 0x1c )
  * @frame_count: 1 no aggregation, >1 aggregation
  * @bt_kill_count: num of times blocked by bluetooth (unused for agg)
  * @failure_rts: num of failures due to unsuccessful RTS
  * @failure_frame: num failures due to no ACK (unused for agg)
  * @initial_rate: for non-agg: rate of the successful Tx. For agg: rate of the
  *	Tx of all the batch. IWM_RATE_MCS_*
  * @wireless_media_time: for non-agg: RTS + CTS + frame tx attempts time + ACK.
  *	for agg: RTS + CTS + aggregation tx time + block-ack time.
  *	in usec.
  * @pa_status: tx power info
  * @pa_integ_res_a: tx power info
  * @pa_integ_res_b: tx power info
  * @pa_integ_res_c: tx power info
  * @measurement_req_id: tx power info
  * @tfd_info: TFD information set by the FH
  * @seq_ctl: sequence control from the Tx cmd
  * @byte_cnt: byte count from the Tx cmd
  * @tlc_info: TLC rate info
  * @ra_tid: bits [3:0] = ra, bits [7:4] = tid
  * @frame_ctrl: frame control
  * @status: for non-agg:  frame status IWM_TX_STATUS_*
  *	for agg: status of 1st frame, IWM_AGG_TX_STATE_*; other frame status fields
  *	follow this one, up to frame_count.
  *
  * After the array of statuses comes the SSN of the SCD. Look at
  * %iwm_mvm_get_scd_ssn for more details.
  */
 struct iwm_mvm_tx_resp {
 	uint8_t frame_count;
 	uint8_t bt_kill_count;
 	uint8_t failure_rts;
 	uint8_t failure_frame;
 	uint32_t initial_rate;
 	uint16_t wireless_media_time;
 
 	uint8_t pa_status;
 	uint8_t pa_integ_res_a[3];
 	uint8_t pa_integ_res_b[3];
 	uint8_t pa_integ_res_c[3];
 	uint16_t measurement_req_id;
 	uint16_t reserved;
 
 	uint32_t tfd_info;
 	uint16_t seq_ctl;
 	uint16_t byte_cnt;
 	uint8_t tlc_info;
 	uint8_t ra_tid;
 	uint16_t frame_ctrl;
 
 	struct iwm_agg_tx_status status;
 } __packed; /* IWM_TX_RSP_API_S_VER_3 */
 
 /**
  * struct iwm_mvm_ba_notif - notifies about reception of BA
  * ( IWM_BA_NOTIF = 0xc5 )
  * @sta_addr_lo32: lower 32 bits of the MAC address
  * @sta_addr_hi16: upper 16 bits of the MAC address
  * @sta_id: Index of recipient (BA-sending) station in fw's station table
  * @tid: tid of the session
  * @seq_ctl:
  * @bitmap: the bitmap of the BA notification as seen in the air
  * @scd_flow: the tx queue this BA relates to
  * @scd_ssn: the index of the last contiguously sent packet
  * @txed: number of Txed frames in this batch
  * @txed_2_done: number of Acked frames in this batch
  */
 struct iwm_mvm_ba_notif {
 	uint32_t sta_addr_lo32;
 	uint16_t sta_addr_hi16;
 	uint16_t reserved;
 
 	uint8_t sta_id;
 	uint8_t tid;
 	uint16_t seq_ctl;
 	uint64_t bitmap;
 	uint16_t scd_flow;
 	uint16_t scd_ssn;
 	uint8_t txed;
 	uint8_t txed_2_done;
 	uint16_t reserved1;
 } __packed;
 
 /*
  * struct iwm_mac_beacon_cmd - beacon template command
  * @tx: the tx commands associated with the beacon frame
  * @template_id: currently equal to the mac context id of the coresponding
  *  mac.
  * @tim_idx: the offset of the tim IE in the beacon
  * @tim_size: the length of the tim IE
  * @frame: the template of the beacon frame
  */
 struct iwm_mac_beacon_cmd {
 	struct iwm_tx_cmd tx;
 	uint32_t template_id;
 	uint32_t tim_idx;
 	uint32_t tim_size;
 	struct ieee80211_frame frame[0];
 } __packed;
 
 struct iwm_beacon_notif {
 	struct iwm_mvm_tx_resp beacon_notify_hdr;
 	uint64_t tsf;
 	uint32_t ibss_mgr_status;
 } __packed;
 
 /**
  * enum iwm_dump_control - dump (flush) control flags
  * @IWM_DUMP_TX_FIFO_FLUSH: Dump MSDUs until the FIFO is empty
  *	and the TFD queues are empty.
  */
 enum iwm_dump_control {
 	IWM_DUMP_TX_FIFO_FLUSH	= (1 << 1),
 };
 
 /**
  * struct iwm_tx_path_flush_cmd -- queue/FIFO flush command
  * @queues_ctl: bitmap of queues to flush
  * @flush_ctl: control flags
  * @reserved: reserved
  */
 struct iwm_tx_path_flush_cmd {
 	uint32_t queues_ctl;
 	uint16_t flush_ctl;
 	uint16_t reserved;
 } __packed; /* IWM_TX_PATH_FLUSH_CMD_API_S_VER_1 */
 
 /**
  * iwm_mvm_get_scd_ssn - returns the SSN of the SCD
  * @tx_resp: the Tx response from the fw (agg or non-agg)
  *
  * When the fw sends an AMPDU, it fetches the MPDUs one after the other. Since
  * it can't know that everything will go well until the end of the AMPDU, it
  * can't know in advance the number of MPDUs that will be sent in the current
  * batch. This is why it writes the agg Tx response while it fetches the MPDUs.
  * Hence, it can't know in advance what the SSN of the SCD will be at the end
  * of the batch. This is why the SSN of the SCD is written at the end of the
  * whole struct at a variable offset. This function knows how to cope with the
  * variable offset and returns the SSN of the SCD.
  */
 static inline uint32_t iwm_mvm_get_scd_ssn(struct iwm_mvm_tx_resp *tx_resp)
 {
 	return le32_to_cpup((uint32_t *)&tx_resp->status +
 			    tx_resp->frame_count) & 0xfff;
 }
 
 /*
  * END mvm/fw-api-tx.h
  */
 
 /*
  * BEGIN mvm/fw-api-scan.h
  */
 
 /**
  * struct iwm_scd_txq_cfg_cmd - New txq hw scheduler config command
  * @token:
  * @sta_id: station id
  * @tid:
  * @scd_queue: scheduler queue to confiug
  * @enable: 1 queue enable, 0 queue disable
  * @aggregate: 1 aggregated queue, 0 otherwise
  * @tx_fifo: %enum iwm_mvm_tx_fifo
  * @window: BA window size
  * @ssn: SSN for the BA agreement
  */
 struct iwm_scd_txq_cfg_cmd {
 	uint8_t token;
 	uint8_t sta_id;
 	uint8_t tid;
 	uint8_t scd_queue;
 	uint8_t enable;
 	uint8_t aggregate;
 	uint8_t tx_fifo;
 	uint8_t window;
 	uint16_t ssn;
 	uint16_t reserved;
 } __packed; /* SCD_QUEUE_CFG_CMD_API_S_VER_1 */
 
 /**
  * struct iwm_scd_txq_cfg_rsp
  * @token: taken from the command
  * @sta_id: station id from the command
  * @tid: tid from the command
  * @scd_queue: scd_queue from the command
  */
 struct iwm_scd_txq_cfg_rsp {
 	uint8_t token;
 	uint8_t sta_id;
 	uint8_t tid;
 	uint8_t scd_queue;
 } __packed; /* SCD_QUEUE_CFG_RSP_API_S_VER_1 */
 
 
 /* Scan Commands, Responses, Notifications */
 
 /* Masks for iwm_scan_channel.type flags */
 #define IWM_SCAN_CHANNEL_TYPE_ACTIVE	(1 << 0)
 #define IWM_SCAN_CHANNEL_NSSIDS(x)	(((1 << (x)) - 1) << 1)
 
 /* Max number of IEs for direct SSID scans in a command */
 #define IWM_PROBE_OPTION_MAX		20
 
 /**
  * struct iwm_ssid_ie - directed scan network information element
  *
  * Up to 20 of these may appear in IWM_REPLY_SCAN_CMD,
  * selected by "type" bit field in struct iwm_scan_channel;
  * each channel may select different ssids from among the 20 entries.
  * SSID IEs get transmitted in reverse order of entry.
  */
 struct iwm_ssid_ie {
 	uint8_t id;
 	uint8_t len;
 	uint8_t ssid[IEEE80211_NWID_LEN];
 } __packed; /* IWM_SCAN_DIRECT_SSID_IE_API_S_VER_1 */
 
 /* scan offload */
 #define IWM_SCAN_MAX_BLACKLIST_LEN	64
 #define IWM_SCAN_SHORT_BLACKLIST_LEN	16
 #define IWM_SCAN_MAX_PROFILES		11
 #define IWM_SCAN_OFFLOAD_PROBE_REQ_SIZE	512
 
 /* Default watchdog (in MS) for scheduled scan iteration */
 #define IWM_SCHED_SCAN_WATCHDOG cpu_to_le16(15000)
 
 #define IWM_GOOD_CRC_TH_DEFAULT cpu_to_le16(1)
 #define IWM_CAN_ABORT_STATUS 1
 
 #define IWM_FULL_SCAN_MULTIPLIER 5
 #define IWM_FAST_SCHED_SCAN_ITERATIONS 3
 #define IWM_MAX_SCHED_SCAN_PLANS 2
 
 /**
  * iwm_scan_schedule_lmac - schedule of scan offload
  * @delay:		delay between iterations, in seconds.
  * @iterations:		num of scan iterations
  * @full_scan_mul:	number of partial scans before each full scan
  */
 struct iwm_scan_schedule_lmac {
 	uint16_t delay;
 	uint8_t iterations;
 	uint8_t full_scan_mul;
 } __packed; /* SCAN_SCHEDULE_API_S */
 
 /**
  * iwm_scan_req_tx_cmd - SCAN_REQ_TX_CMD_API_S
  * @tx_flags: combination of TX_CMD_FLG_*
  * @rate_n_flags: rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is
  *	cleared. Combination of RATE_MCS_*
  * @sta_id: index of destination station in FW station table
  * @reserved: for alignment and future use
  */
 struct iwm_scan_req_tx_cmd {
 	uint32_t tx_flags;
 	uint32_t rate_n_flags;
 	uint8_t sta_id;
 	uint8_t reserved[3];
 } __packed;
 
 enum iwm_scan_channel_flags_lmac {
 	IWM_UNIFIED_SCAN_CHANNEL_FULL		= (1 << 27),
 	IWM_UNIFIED_SCAN_CHANNEL_PARTIAL	= (1 << 28),
 };
 
 /**
  * iwm_scan_channel_cfg_lmac - SCAN_CHANNEL_CFG_S_VER2
  * @flags:		bits 1-20: directed scan to i'th ssid
  *			other bits &enum iwm_scan_channel_flags_lmac
  * @channel_number:	channel number 1-13 etc
  * @iter_count:		scan iteration on this channel
  * @iter_interval:	interval in seconds between iterations on one channel
  */
 struct iwm_scan_channel_cfg_lmac {
 	uint32_t flags;
 	uint16_t channel_num;
 	uint16_t iter_count;
 	uint32_t iter_interval;
 } __packed;
 
 /*
  * iwm_scan_probe_segment - PROBE_SEGMENT_API_S_VER_1
  * @offset: offset in the data block
  * @len: length of the segment
  */
 struct iwm_scan_probe_segment {
 	uint16_t offset;
 	uint16_t len;
 } __packed;
 
 /* iwm_scan_probe_req - PROBE_REQUEST_FRAME_API_S_VER_2
  * @mac_header: first (and common) part of the probe
  * @band_data: band specific data
  * @common_data: last (and common) part of the probe
  * @buf: raw data block
  */
 struct iwm_scan_probe_req {
 	struct iwm_scan_probe_segment mac_header;
 	struct iwm_scan_probe_segment band_data[2];
 	struct iwm_scan_probe_segment common_data;
 	uint8_t buf[IWM_SCAN_OFFLOAD_PROBE_REQ_SIZE];
 } __packed;
 
 enum iwm_scan_channel_flags {
 	IWM_SCAN_CHANNEL_FLAG_EBS		= (1 << 0),
 	IWM_SCAN_CHANNEL_FLAG_EBS_ACCURATE	= (1 << 1),
 	IWM_SCAN_CHANNEL_FLAG_CACHE_ADD		= (1 << 2),
 };
 
 /* iwm_scan_channel_opt - CHANNEL_OPTIMIZATION_API_S
  * @flags: enum iwm_scan_channel_flags
  * @non_ebs_ratio: defines the ratio of number of scan iterations where EBS is
  *	involved.
  *	1 - EBS is disabled.
  *	2 - every second scan will be full scan(and so on).
  */
 struct iwm_scan_channel_opt {
 	uint16_t flags;
 	uint16_t non_ebs_ratio;
 } __packed;
 
 /**
  * iwm_mvm_lmac_scan_flags
  * @IWM_MVM_LMAC_SCAN_FLAG_PASS_ALL: pass all beacons and probe responses
  *      without filtering.
  * @IWM_MVM_LMAC_SCAN_FLAG_PASSIVE: force passive scan on all channels
  * @IWM_MVM_LMAC_SCAN_FLAG_PRE_CONNECTION: single channel scan
  * @IWM_MVM_LMAC_SCAN_FLAG_ITER_COMPLETE: send iteration complete notification
  * @IWM_MVM_LMAC_SCAN_FLAG_MULTIPLE_SSIDS multiple SSID matching
  * @IWM_MVM_LMAC_SCAN_FLAG_FRAGMENTED: all passive scans will be fragmented
  * @IWM_MVM_LMAC_SCAN_FLAGS_RRM_ENABLED: insert WFA vendor-specific TPC report
  *      and DS parameter set IEs into probe requests.
  * @IWM_MVM_LMAC_SCAN_FLAG_EXTENDED_DWELL: use extended dwell time on channels
  *      1, 6 and 11.
  * @IWM_MVM_LMAC_SCAN_FLAG_MATCH: Send match found notification on matches
  */
 enum iwm_mvm_lmac_scan_flags {
 	IWM_MVM_LMAC_SCAN_FLAG_PASS_ALL		= (1 << 0),
 	IWM_MVM_LMAC_SCAN_FLAG_PASSIVE		= (1 << 1),
 	IWM_MVM_LMAC_SCAN_FLAG_PRE_CONNECTION	= (1 << 2),
 	IWM_MVM_LMAC_SCAN_FLAG_ITER_COMPLETE	= (1 << 3),
 	IWM_MVM_LMAC_SCAN_FLAG_MULTIPLE_SSIDS	= (1 << 4),
 	IWM_MVM_LMAC_SCAN_FLAG_FRAGMENTED	= (1 << 5),
 	IWM_MVM_LMAC_SCAN_FLAGS_RRM_ENABLED	= (1 << 6),
 	IWM_MVM_LMAC_SCAN_FLAG_EXTENDED_DWELL	= (1 << 7),
 	IWM_MVM_LMAC_SCAN_FLAG_MATCH		= (1 << 9),
 };
 
 enum iwm_scan_priority {
 	IWM_SCAN_PRIORITY_LOW,
 	IWM_SCAN_PRIORITY_MEDIUM,
 	IWM_SCAN_PRIORITY_HIGH,
 };
 
 /**
  * iwm_scan_req_lmac - SCAN_REQUEST_CMD_API_S_VER_1
  * @reserved1: for alignment and future use
  * @channel_num: num of channels to scan
  * @active-dwell: dwell time for active channels
  * @passive-dwell: dwell time for passive channels
  * @fragmented-dwell: dwell time for fragmented passive scan
  * @extended_dwell: dwell time for channels 1, 6 and 11 (in certain cases)
  * @reserved2: for alignment and future use
  * @rx_chain_selct: PHY_RX_CHAIN_* flags
  * @scan_flags: &enum iwm_mvm_lmac_scan_flags
  * @max_out_time: max time (in TU) to be out of associated channel
  * @suspend_time: pause scan this long (TUs) when returning to service channel
  * @flags: RXON flags
  * @filter_flags: RXON filter
  * @tx_cmd: tx command for active scan; for 2GHz and for 5GHz
  * @direct_scan: list of SSIDs for directed active scan
  * @scan_prio: enum iwm_scan_priority
  * @iter_num: number of scan iterations
  * @delay: delay in seconds before first iteration
  * @schedule: two scheduling plans. The first one is finite, the second one can
  *	be infinite.
  * @channel_opt: channel optimization options, for full and partial scan
  * @data: channel configuration and probe request packet.
  */
 struct iwm_scan_req_lmac {
 	/* SCAN_REQUEST_FIXED_PART_API_S_VER_7 */
 	uint32_t reserved1;
 	uint8_t n_channels;
 	uint8_t active_dwell;
 	uint8_t passive_dwell;
 	uint8_t fragmented_dwell;
 	uint8_t extended_dwell;
 	uint8_t reserved2;
 	uint16_t rx_chain_select;
 	uint32_t scan_flags;
 	uint32_t max_out_time;
 	uint32_t suspend_time;
 	/* RX_ON_FLAGS_API_S_VER_1 */
 	uint32_t flags;
 	uint32_t filter_flags;
 	struct iwm_scan_req_tx_cmd tx_cmd[2];
 	struct iwm_ssid_ie direct_scan[IWM_PROBE_OPTION_MAX];
 	uint32_t scan_prio;
 	/* SCAN_REQ_PERIODIC_PARAMS_API_S */
 	uint32_t iter_num;
 	uint32_t delay;
 	struct iwm_scan_schedule_lmac schedule[IWM_MAX_SCHED_SCAN_PLANS];
 	struct iwm_scan_channel_opt channel_opt[2];
 	uint8_t data[];
 } __packed;
 
 /**
  * iwm_scan_offload_complete - PERIODIC_SCAN_COMPLETE_NTF_API_S_VER_2
  * @last_schedule_line: last schedule line executed (fast or regular)
  * @last_schedule_iteration: last scan iteration executed before scan abort
  * @status: enum iwm_scan_offload_complete_status
  * @ebs_status: EBS success status &enum iwm_scan_ebs_status
  * @time_after_last_iter; time in seconds elapsed after last iteration
  */
 struct iwm_periodic_scan_complete {
 	uint8_t last_schedule_line;
 	uint8_t last_schedule_iteration;
 	uint8_t status;
 	uint8_t ebs_status;
 	uint32_t time_after_last_iter;
 	uint32_t reserved;
 } __packed;
 
 /* How many statistics are gathered for each channel */
 #define IWM_SCAN_RESULTS_STATISTICS 1
 
 /**
  * enum iwm_scan_complete_status - status codes for scan complete notifications
  * @IWM_SCAN_COMP_STATUS_OK:  scan completed successfully
  * @IWM_SCAN_COMP_STATUS_ABORT: scan was aborted by user
  * @IWM_SCAN_COMP_STATUS_ERR_SLEEP: sending null sleep packet failed
  * @IWM_SCAN_COMP_STATUS_ERR_CHAN_TIMEOUT: timeout before channel is ready
  * @IWM_SCAN_COMP_STATUS_ERR_PROBE: sending probe request failed
  * @IWM_SCAN_COMP_STATUS_ERR_WAKEUP: sending null wakeup packet failed
  * @IWM_SCAN_COMP_STATUS_ERR_ANTENNAS: invalid antennas chosen at scan command
  * @IWM_SCAN_COMP_STATUS_ERR_INTERNAL: internal error caused scan abort
  * @IWM_SCAN_COMP_STATUS_ERR_COEX: medium was lost ot WiMax
  * @IWM_SCAN_COMP_STATUS_P2P_ACTION_OK: P2P public action frame TX was successful
  *	(not an error!)
  * @IWM_SCAN_COMP_STATUS_ITERATION_END: indicates end of one repeatition the driver
  *	asked for
  * @IWM_SCAN_COMP_STATUS_ERR_ALLOC_TE: scan could not allocate time events
 */
 enum iwm_scan_complete_status {
 	IWM_SCAN_COMP_STATUS_OK = 0x1,
 	IWM_SCAN_COMP_STATUS_ABORT = 0x2,
 	IWM_SCAN_COMP_STATUS_ERR_SLEEP = 0x3,
 	IWM_SCAN_COMP_STATUS_ERR_CHAN_TIMEOUT = 0x4,
 	IWM_SCAN_COMP_STATUS_ERR_PROBE = 0x5,
 	IWM_SCAN_COMP_STATUS_ERR_WAKEUP = 0x6,
 	IWM_SCAN_COMP_STATUS_ERR_ANTENNAS = 0x7,
 	IWM_SCAN_COMP_STATUS_ERR_INTERNAL = 0x8,
 	IWM_SCAN_COMP_STATUS_ERR_COEX = 0x9,
 	IWM_SCAN_COMP_STATUS_P2P_ACTION_OK = 0xA,
 	IWM_SCAN_COMP_STATUS_ITERATION_END = 0x0B,
 	IWM_SCAN_COMP_STATUS_ERR_ALLOC_TE = 0x0C,
 };
 
 /**
  * struct iwm_scan_results_notif - scan results for one channel
  * ( IWM_SCAN_RESULTS_NOTIFICATION = 0x83 )
  * @channel: which channel the results are from
  * @band: 0 for 5.2 GHz, 1 for 2.4 GHz
  * @probe_status: IWM_SCAN_PROBE_STATUS_*, indicates success of probe request
  * @num_probe_not_sent: # of request that weren't sent due to not enough time
  * @duration: duration spent in channel, in usecs
  * @statistics: statistics gathered for this channel
  */
 struct iwm_scan_results_notif {
 	uint8_t channel;
 	uint8_t band;
 	uint8_t probe_status;
 	uint8_t num_probe_not_sent;
 	uint32_t duration;
 	uint32_t statistics[IWM_SCAN_RESULTS_STATISTICS];
 } __packed; /* IWM_SCAN_RESULT_NTF_API_S_VER_2 */
 
 enum iwm_scan_framework_client {
 	IWM_SCAN_CLIENT_SCHED_SCAN	= (1 << 0),
 	IWM_SCAN_CLIENT_NETDETECT	= (1 << 1),
 	IWM_SCAN_CLIENT_ASSET_TRACKING	= (1 << 2),
 };
 
 /**
  * iwm_scan_offload_blacklist - IWM_SCAN_OFFLOAD_BLACKLIST_S
  * @ssid:		MAC address to filter out
  * @reported_rssi:	AP rssi reported to the host
  * @client_bitmap: clients ignore this entry  - enum scan_framework_client
  */
 struct iwm_scan_offload_blacklist {
 	uint8_t ssid[IEEE80211_ADDR_LEN];
 	uint8_t reported_rssi;
 	uint8_t client_bitmap;
 } __packed;
 
 enum iwm_scan_offload_network_type {
 	IWM_NETWORK_TYPE_BSS	= 1,
 	IWM_NETWORK_TYPE_IBSS	= 2,
 	IWM_NETWORK_TYPE_ANY	= 3,
 };
 
 enum iwm_scan_offload_band_selection {
 	IWM_SCAN_OFFLOAD_SELECT_2_4	= 0x4,
 	IWM_SCAN_OFFLOAD_SELECT_5_2	= 0x8,
 	IWM_SCAN_OFFLOAD_SELECT_ANY	= 0xc,
 };
 
 /**
  * iwm_scan_offload_profile - IWM_SCAN_OFFLOAD_PROFILE_S
  * @ssid_index:		index to ssid list in fixed part
  * @unicast_cipher:	encryption olgorithm to match - bitmap
  * @aut_alg:		authentication olgorithm to match - bitmap
  * @network_type:	enum iwm_scan_offload_network_type
  * @band_selection:	enum iwm_scan_offload_band_selection
  * @client_bitmap:	clients waiting for match - enum scan_framework_client
  */
 struct iwm_scan_offload_profile {
 	uint8_t ssid_index;
 	uint8_t unicast_cipher;
 	uint8_t auth_alg;
 	uint8_t network_type;
 	uint8_t band_selection;
 	uint8_t client_bitmap;
 	uint8_t reserved[2];
 } __packed;
 
 /**
  * iwm_scan_offload_profile_cfg - IWM_SCAN_OFFLOAD_PROFILES_CFG_API_S_VER_1
  * @blaclist:		AP list to filter off from scan results
  * @profiles:		profiles to search for match
  * @blacklist_len:	length of blacklist
  * @num_profiles:	num of profiles in the list
  * @match_notify:	clients waiting for match found notification
  * @pass_match:		clients waiting for the results
  * @active_clients:	active clients bitmap - enum scan_framework_client
  * @any_beacon_notify:	clients waiting for match notification without match
  */
 struct iwm_scan_offload_profile_cfg {
 	struct iwm_scan_offload_profile profiles[IWM_SCAN_MAX_PROFILES];
 	uint8_t blacklist_len;
 	uint8_t num_profiles;
 	uint8_t match_notify;
 	uint8_t pass_match;
 	uint8_t active_clients;
 	uint8_t any_beacon_notify;
 	uint8_t reserved[2];
 } __packed;
 
 enum iwm_scan_offload_complete_status {
 	IWM_SCAN_OFFLOAD_COMPLETED	= 1,
 	IWM_SCAN_OFFLOAD_ABORTED	= 2,
 };
 
 /**
  * struct iwm_lmac_scan_complete_notif - notifies end of scanning (all channels)
  *	SCAN_COMPLETE_NTF_API_S_VER_3
  * @scanned_channels: number of channels scanned (and number of valid results)
  * @status: one of SCAN_COMP_STATUS_*
  * @bt_status: BT on/off status
  * @last_channel: last channel that was scanned
  * @tsf_low: TSF timer (lower half) in usecs
  * @tsf_high: TSF timer (higher half) in usecs
  * @results: an array of scan results, only "scanned_channels" of them are valid
  */
 struct iwm_lmac_scan_complete_notif {
 	uint8_t scanned_channels;
 	uint8_t status;
 	uint8_t bt_status;
 	uint8_t last_channel;
 	uint32_t tsf_low;
 	uint32_t tsf_high;
 	struct iwm_scan_results_notif results[];
 } __packed;
 
 
 /*
  * END mvm/fw-api-scan.h
  */
 
 /*
  * BEGIN mvm/fw-api-sta.h
  */
 
 /* UMAC Scan API */
 
 /* The maximum of either of these cannot exceed 8, because we use an
  * 8-bit mask (see IWM_MVM_SCAN_MASK).
  */
 #define IWM_MVM_MAX_UMAC_SCANS 8
 #define IWM_MVM_MAX_LMAC_SCANS 1
 
 enum iwm_scan_config_flags {
 	IWM_SCAN_CONFIG_FLAG_ACTIVATE			= (1 << 0),
 	IWM_SCAN_CONFIG_FLAG_DEACTIVATE			= (1 << 1),
 	IWM_SCAN_CONFIG_FLAG_FORBID_CHUB_REQS		= (1 << 2),
 	IWM_SCAN_CONFIG_FLAG_ALLOW_CHUB_REQS		= (1 << 3),
 	IWM_SCAN_CONFIG_FLAG_SET_TX_CHAINS		= (1 << 8),
 	IWM_SCAN_CONFIG_FLAG_SET_RX_CHAINS		= (1 << 9),
 	IWM_SCAN_CONFIG_FLAG_SET_AUX_STA_ID		= (1 << 10),
 	IWM_SCAN_CONFIG_FLAG_SET_ALL_TIMES		= (1 << 11),
 	IWM_SCAN_CONFIG_FLAG_SET_EFFECTIVE_TIMES	= (1 << 12),
 	IWM_SCAN_CONFIG_FLAG_SET_CHANNEL_FLAGS		= (1 << 13),
 	IWM_SCAN_CONFIG_FLAG_SET_LEGACY_RATES		= (1 << 14),
 	IWM_SCAN_CONFIG_FLAG_SET_MAC_ADDR		= (1 << 15),
 	IWM_SCAN_CONFIG_FLAG_SET_FRAGMENTED		= (1 << 16),
 	IWM_SCAN_CONFIG_FLAG_CLEAR_FRAGMENTED		= (1 << 17),
 	IWM_SCAN_CONFIG_FLAG_SET_CAM_MODE		= (1 << 18),
 	IWM_SCAN_CONFIG_FLAG_CLEAR_CAM_MODE		= (1 << 19),
 	IWM_SCAN_CONFIG_FLAG_SET_PROMISC_MODE		= (1 << 20),
 	IWM_SCAN_CONFIG_FLAG_CLEAR_PROMISC_MODE		= (1 << 21),
 
 	/* Bits 26-31 are for num of channels in channel_array */
 #define IWM_SCAN_CONFIG_N_CHANNELS(n) ((n) << 26)
 };
 
 enum iwm_scan_config_rates {
 	/* OFDM basic rates */
 	IWM_SCAN_CONFIG_RATE_6M		= (1 << 0),
 	IWM_SCAN_CONFIG_RATE_9M		= (1 << 1),
 	IWM_SCAN_CONFIG_RATE_12M	= (1 << 2),
 	IWM_SCAN_CONFIG_RATE_18M	= (1 << 3),
 	IWM_SCAN_CONFIG_RATE_24M	= (1 << 4),
 	IWM_SCAN_CONFIG_RATE_36M	= (1 << 5),
 	IWM_SCAN_CONFIG_RATE_48M	= (1 << 6),
 	IWM_SCAN_CONFIG_RATE_54M	= (1 << 7),
 	/* CCK basic rates */
 	IWM_SCAN_CONFIG_RATE_1M		= (1 << 8),
 	IWM_SCAN_CONFIG_RATE_2M		= (1 << 9),
 	IWM_SCAN_CONFIG_RATE_5M		= (1 << 10),
 	IWM_SCAN_CONFIG_RATE_11M	= (1 << 11),
 
 	/* Bits 16-27 are for supported rates */
 #define IWM_SCAN_CONFIG_SUPPORTED_RATE(rate)	((rate) << 16)
 };
 
 enum iwm_channel_flags {
 	IWM_CHANNEL_FLAG_EBS				= (1 << 0),
 	IWM_CHANNEL_FLAG_ACCURATE_EBS			= (1 << 1),
 	IWM_CHANNEL_FLAG_EBS_ADD			= (1 << 2),
 	IWM_CHANNEL_FLAG_PRE_SCAN_PASSIVE2ACTIVE	= (1 << 3),
 };
 
 /**
  * struct iwm_scan_config
  * @flags:			enum scan_config_flags
  * @tx_chains:			valid_tx antenna - ANT_* definitions
  * @rx_chains:			valid_rx antenna - ANT_* definitions
  * @legacy_rates:		default legacy rates - enum scan_config_rates
  * @out_of_channel_time:	default max out of serving channel time
  * @suspend_time:		default max suspend time
  * @dwell_active:		default dwell time for active scan
  * @dwell_passive:		default dwell time for passive scan
  * @dwell_fragmented:		default dwell time for fragmented scan
  * @dwell_extended:		default dwell time for channels 1, 6 and 11
  * @mac_addr:			default mac address to be used in probes
  * @bcast_sta_id:		the index of the station in the fw
  * @channel_flags:		default channel flags - enum iwm_channel_flags
  *				scan_config_channel_flag
  * @channel_array:		default supported channels
  */
 struct iwm_scan_config {
 	uint32_t flags;
 	uint32_t tx_chains;
 	uint32_t rx_chains;
 	uint32_t legacy_rates;
 	uint32_t out_of_channel_time;
 	uint32_t suspend_time;
 	uint8_t dwell_active;
 	uint8_t dwell_passive;
 	uint8_t dwell_fragmented;
 	uint8_t dwell_extended;
 	uint8_t mac_addr[IEEE80211_ADDR_LEN];
 	uint8_t bcast_sta_id;
 	uint8_t channel_flags;
 	uint8_t channel_array[];
 } __packed; /* SCAN_CONFIG_DB_CMD_API_S */
 
 /**
  * iwm_umac_scan_flags
  *@IWM_UMAC_SCAN_FLAG_PREEMPTIVE: scan process triggered by this scan request
  *	can be preempted by other scan requests with higher priority.
  *	The low priority scan will be resumed when the higher proirity scan is
  *	completed.
  *@IWM_UMAC_SCAN_FLAG_START_NOTIF: notification will be sent to the driver
  *	when scan starts.
  */
 enum iwm_umac_scan_flags {
 	IWM_UMAC_SCAN_FLAG_PREEMPTIVE		= (1 << 0),
 	IWM_UMAC_SCAN_FLAG_START_NOTIF		= (1 << 1),
 };
 
 enum iwm_umac_scan_uid_offsets {
 	IWM_UMAC_SCAN_UID_TYPE_OFFSET		= 0,
 	IWM_UMAC_SCAN_UID_SEQ_OFFSET		= 8,
 };
 
 enum iwm_umac_scan_general_flags {
 	IWM_UMAC_SCAN_GEN_FLAGS_PERIODIC	= (1 << 0),
 	IWM_UMAC_SCAN_GEN_FLAGS_OVER_BT		= (1 << 1),
 	IWM_UMAC_SCAN_GEN_FLAGS_PASS_ALL	= (1 << 2),
 	IWM_UMAC_SCAN_GEN_FLAGS_PASSIVE		= (1 << 3),
 	IWM_UMAC_SCAN_GEN_FLAGS_PRE_CONNECT	= (1 << 4),
 	IWM_UMAC_SCAN_GEN_FLAGS_ITER_COMPLETE	= (1 << 5),
 	IWM_UMAC_SCAN_GEN_FLAGS_MULTIPLE_SSID	= (1 << 6),
 	IWM_UMAC_SCAN_GEN_FLAGS_FRAGMENTED	= (1 << 7),
 	IWM_UMAC_SCAN_GEN_FLAGS_RRM_ENABLED	= (1 << 8),
 	IWM_UMAC_SCAN_GEN_FLAGS_MATCH		= (1 << 9),
 	IWM_UMAC_SCAN_GEN_FLAGS_EXTENDED_DWELL	= (1 << 10),
 };
 
 /**
  * struct iwm_scan_channel_cfg_umac
  * @flags:		bitmap - 0-19:	directed scan to i'th ssid.
  * @channel_num:	channel number 1-13 etc.
  * @iter_count:		repetition count for the channel.
  * @iter_interval:	interval between two scan iterations on one channel.
  */
 struct iwm_scan_channel_cfg_umac {
 	uint32_t flags;
 #define IWM_SCAN_CHANNEL_UMAC_NSSIDS(x)		((1 << (x)) - 1)
 
 	uint8_t channel_num;
 	uint8_t iter_count;
 	uint16_t iter_interval;
 } __packed; /* SCAN_CHANNEL_CFG_S_VER2 */
 
 /**
  * struct iwm_scan_umac_schedule
  * @interval: interval in seconds between scan iterations
  * @iter_count: num of scan iterations for schedule plan, 0xff for infinite loop
  * @reserved: for alignment and future use
  */
 struct iwm_scan_umac_schedule {
 	uint16_t interval;
 	uint8_t iter_count;
 	uint8_t reserved;
 } __packed; /* SCAN_SCHED_PARAM_API_S_VER_1 */
 
 /**
  * struct iwm_scan_req_umac_tail - the rest of the UMAC scan request command
  *      parameters following channels configuration array.
  * @schedule: two scheduling plans.
  * @delay: delay in TUs before starting the first scan iteration
  * @reserved: for future use and alignment
  * @preq: probe request with IEs blocks
  * @direct_scan: list of SSIDs for directed active scan
  */
 struct iwm_scan_req_umac_tail {
 	/* SCAN_PERIODIC_PARAMS_API_S_VER_1 */
 	struct iwm_scan_umac_schedule schedule[IWM_MAX_SCHED_SCAN_PLANS];
 	uint16_t delay;
 	uint16_t reserved;
 	/* SCAN_PROBE_PARAMS_API_S_VER_1 */
 	struct iwm_scan_probe_req preq;
 	struct iwm_ssid_ie direct_scan[IWM_PROBE_OPTION_MAX];
 } __packed;
 
 /**
  * struct iwm_scan_req_umac
  * @flags: &enum iwm_umac_scan_flags
  * @uid: scan id, &enum iwm_umac_scan_uid_offsets
  * @ooc_priority: out of channel priority - &enum iwm_scan_priority
  * @general_flags: &enum iwm_umac_scan_general_flags
  * @extended_dwell: dwell time for channels 1, 6 and 11
  * @active_dwell: dwell time for active scan
  * @passive_dwell: dwell time for passive scan
  * @fragmented_dwell: dwell time for fragmented passive scan
  * @max_out_time: max out of serving channel time
  * @suspend_time: max suspend time
  * @scan_priority: scan internal prioritization &enum iwm_scan_priority
  * @channel_flags: &enum iwm_scan_channel_flags
  * @n_channels: num of channels in scan request
  * @reserved: for future use and alignment
  * @data: &struct iwm_scan_channel_cfg_umac and
  *	&struct iwm_scan_req_umac_tail
  */
 struct iwm_scan_req_umac {
 	uint32_t flags;
 	uint32_t uid;
 	uint32_t ooc_priority;
 	/* SCAN_GENERAL_PARAMS_API_S_VER_1 */
 	uint32_t general_flags;
 	uint8_t extended_dwell;
 	uint8_t active_dwell;
 	uint8_t passive_dwell;
 	uint8_t fragmented_dwell;
 	uint32_t max_out_time;
 	uint32_t suspend_time;
 	uint32_t scan_priority;
 	/* SCAN_CHANNEL_PARAMS_API_S_VER_1 */
 	uint8_t channel_flags;
 	uint8_t n_channels;
 	uint16_t reserved;
 	uint8_t data[];
 } __packed; /* SCAN_REQUEST_CMD_UMAC_API_S_VER_1 */
 
 /**
  * struct iwm_umac_scan_abort
  * @uid: scan id, &enum iwm_umac_scan_uid_offsets
  * @flags: reserved
  */
 struct iwm_umac_scan_abort {
 	uint32_t uid;
 	uint32_t flags;
 } __packed; /* SCAN_ABORT_CMD_UMAC_API_S_VER_1 */
 
 /**
  * struct iwm_umac_scan_complete
  * @uid: scan id, &enum iwm_umac_scan_uid_offsets
  * @last_schedule: last scheduling line
  * @last_iter:	last scan iteration number
  * @scan status: &enum iwm_scan_offload_complete_status
  * @ebs_status: &enum iwm_scan_ebs_status
  * @time_from_last_iter: time elapsed from last iteration
  * @reserved: for future use
  */
 struct iwm_umac_scan_complete {
 	uint32_t uid;
 	uint8_t last_schedule;
 	uint8_t last_iter;
 	uint8_t status;
 	uint8_t ebs_status;
 	uint32_t time_from_last_iter;
 	uint32_t reserved;
 } __packed; /* SCAN_COMPLETE_NTF_UMAC_API_S_VER_1 */
 
 #define IWM_SCAN_OFFLOAD_MATCHING_CHANNELS_LEN 5
 /**
  * struct iwm_scan_offload_profile_match - match information
  * @bssid: matched bssid
  * @channel: channel where the match occurred
  * @energy:
  * @matching_feature:
  * @matching_channels: bitmap of channels that matched, referencing
  *	the channels passed in tue scan offload request
  */
 struct iwm_scan_offload_profile_match {
 	uint8_t bssid[IEEE80211_ADDR_LEN];
 	uint16_t reserved;
 	uint8_t channel;
 	uint8_t energy;
 	uint8_t matching_feature;
 	uint8_t matching_channels[IWM_SCAN_OFFLOAD_MATCHING_CHANNELS_LEN];
 } __packed; /* SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S_VER_1 */
 
 /**
  * struct iwm_scan_offload_profiles_query - match results query response
  * @matched_profiles: bitmap of matched profiles, referencing the
  *	matches passed in the scan offload request
  * @last_scan_age: age of the last offloaded scan
  * @n_scans_done: number of offloaded scans done
  * @gp2_d0u: GP2 when D0U occurred
  * @gp2_invoked: GP2 when scan offload was invoked
  * @resume_while_scanning: not used
  * @self_recovery: obsolete
  * @reserved: reserved
  * @matches: array of match information, one for each match
  */
 struct iwm_scan_offload_profiles_query {
 	uint32_t matched_profiles;
 	uint32_t last_scan_age;
 	uint32_t n_scans_done;
 	uint32_t gp2_d0u;
 	uint32_t gp2_invoked;
 	uint8_t resume_while_scanning;
 	uint8_t self_recovery;
 	uint16_t reserved;
 	struct iwm_scan_offload_profile_match matches[IWM_SCAN_MAX_PROFILES];
 } __packed; /* SCAN_OFFLOAD_PROFILES_QUERY_RSP_S_VER_2 */
 
 /**
  * struct iwm_umac_scan_iter_complete_notif - notifies end of scanning iteration
  * @uid: scan id, &enum iwm_umac_scan_uid_offsets
  * @scanned_channels: number of channels scanned and number of valid elements in
  *	results array
  * @status: one of SCAN_COMP_STATUS_*
  * @bt_status: BT on/off status
  * @last_channel: last channel that was scanned
  * @tsf_low: TSF timer (lower half) in usecs
  * @tsf_high: TSF timer (higher half) in usecs
  * @results: array of scan results, only "scanned_channels" of them are valid
  */
 struct iwm_umac_scan_iter_complete_notif {
 	uint32_t uid;
 	uint8_t scanned_channels;
 	uint8_t status;
 	uint8_t bt_status;
 	uint8_t last_channel;
 	uint32_t tsf_low;
 	uint32_t tsf_high;
 	struct iwm_scan_results_notif results[];
 } __packed; /* SCAN_ITER_COMPLETE_NTF_UMAC_API_S_VER_1 */
 
 /* Please keep this enum *SORTED* by hex value.
  * Needed for binary search, otherwise a warning will be triggered.
  */
 enum iwm_scan_subcmd_ids {
 	IWM_GSCAN_START_CMD = 0x0,
 	IWM_GSCAN_STOP_CMD = 0x1,
 	IWM_GSCAN_SET_HOTLIST_CMD = 0x2,
 	IWM_GSCAN_RESET_HOTLIST_CMD = 0x3,
 	IWM_GSCAN_SET_SIGNIFICANT_CHANGE_CMD = 0x4,
 	IWM_GSCAN_RESET_SIGNIFICANT_CHANGE_CMD = 0x5,
 	IWM_GSCAN_SIGNIFICANT_CHANGE_EVENT = 0xFD,
 	IWM_GSCAN_HOTLIST_CHANGE_EVENT = 0xFE,
 	IWM_GSCAN_RESULTS_AVAILABLE_EVENT = 0xFF,
 };
 
 /* STA API */
 
 /**
  * enum iwm_sta_flags - flags for the ADD_STA host command
  * @IWM_STA_FLG_REDUCED_TX_PWR_CTRL:
  * @IWM_STA_FLG_REDUCED_TX_PWR_DATA:
  * @IWM_STA_FLG_DISABLE_TX: set if TX should be disabled
  * @IWM_STA_FLG_PS: set if STA is in Power Save
  * @IWM_STA_FLG_INVALID: set if STA is invalid
  * @IWM_STA_FLG_DLP_EN: Direct Link Protocol is enabled
  * @IWM_STA_FLG_SET_ALL_KEYS: the current key applies to all key IDs
  * @IWM_STA_FLG_DRAIN_FLOW: drain flow
  * @IWM_STA_FLG_PAN: STA is for PAN interface
  * @IWM_STA_FLG_CLASS_AUTH:
  * @IWM_STA_FLG_CLASS_ASSOC:
  * @IWM_STA_FLG_CLASS_MIMO_PROT:
  * @IWM_STA_FLG_MAX_AGG_SIZE_MSK: maximal size for A-MPDU
  * @IWM_STA_FLG_AGG_MPDU_DENS_MSK: maximal MPDU density for Tx aggregation
  * @IWM_STA_FLG_FAT_EN_MSK: support for channel width (for Tx). This flag is
  *	initialised by driver and can be updated by fw upon reception of
  *	action frames that can change the channel width. When cleared the fw
  *	will send all the frames in 20MHz even when FAT channel is requested.
  * @IWM_STA_FLG_MIMO_EN_MSK: support for MIMO. This flag is initialised by the
  *	driver and can be updated by fw upon reception of action frames.
  * @IWM_STA_FLG_MFP_EN: Management Frame Protection
  */
 enum iwm_sta_flags {
 	IWM_STA_FLG_REDUCED_TX_PWR_CTRL	= (1 << 3),
 	IWM_STA_FLG_REDUCED_TX_PWR_DATA	= (1 << 6),
 
 	IWM_STA_FLG_DISABLE_TX		= (1 << 4),
 
 	IWM_STA_FLG_PS			= (1 << 8),
 	IWM_STA_FLG_DRAIN_FLOW		= (1 << 12),
 	IWM_STA_FLG_PAN			= (1 << 13),
 	IWM_STA_FLG_CLASS_AUTH		= (1 << 14),
 	IWM_STA_FLG_CLASS_ASSOC		= (1 << 15),
 	IWM_STA_FLG_RTS_MIMO_PROT	= (1 << 17),
 
 	IWM_STA_FLG_MAX_AGG_SIZE_SHIFT	= 19,
 	IWM_STA_FLG_MAX_AGG_SIZE_8K	= (0 << IWM_STA_FLG_MAX_AGG_SIZE_SHIFT),
 	IWM_STA_FLG_MAX_AGG_SIZE_16K	= (1 << IWM_STA_FLG_MAX_AGG_SIZE_SHIFT),
 	IWM_STA_FLG_MAX_AGG_SIZE_32K	= (2 << IWM_STA_FLG_MAX_AGG_SIZE_SHIFT),
 	IWM_STA_FLG_MAX_AGG_SIZE_64K	= (3 << IWM_STA_FLG_MAX_AGG_SIZE_SHIFT),
 	IWM_STA_FLG_MAX_AGG_SIZE_128K	= (4 << IWM_STA_FLG_MAX_AGG_SIZE_SHIFT),
 	IWM_STA_FLG_MAX_AGG_SIZE_256K	= (5 << IWM_STA_FLG_MAX_AGG_SIZE_SHIFT),
 	IWM_STA_FLG_MAX_AGG_SIZE_512K	= (6 << IWM_STA_FLG_MAX_AGG_SIZE_SHIFT),
 	IWM_STA_FLG_MAX_AGG_SIZE_1024K	= (7 << IWM_STA_FLG_MAX_AGG_SIZE_SHIFT),
 	IWM_STA_FLG_MAX_AGG_SIZE_MSK	= (7 << IWM_STA_FLG_MAX_AGG_SIZE_SHIFT),
 
 	IWM_STA_FLG_AGG_MPDU_DENS_SHIFT	= 23,
 	IWM_STA_FLG_AGG_MPDU_DENS_2US	= (4 << IWM_STA_FLG_AGG_MPDU_DENS_SHIFT),
 	IWM_STA_FLG_AGG_MPDU_DENS_4US	= (5 << IWM_STA_FLG_AGG_MPDU_DENS_SHIFT),
 	IWM_STA_FLG_AGG_MPDU_DENS_8US	= (6 << IWM_STA_FLG_AGG_MPDU_DENS_SHIFT),
 	IWM_STA_FLG_AGG_MPDU_DENS_16US	= (7 << IWM_STA_FLG_AGG_MPDU_DENS_SHIFT),
 	IWM_STA_FLG_AGG_MPDU_DENS_MSK	= (7 << IWM_STA_FLG_AGG_MPDU_DENS_SHIFT),
 
 	IWM_STA_FLG_FAT_EN_20MHZ	= (0 << 26),
 	IWM_STA_FLG_FAT_EN_40MHZ	= (1 << 26),
 	IWM_STA_FLG_FAT_EN_80MHZ	= (2 << 26),
 	IWM_STA_FLG_FAT_EN_160MHZ	= (3 << 26),
 	IWM_STA_FLG_FAT_EN_MSK		= (3 << 26),
 
 	IWM_STA_FLG_MIMO_EN_SISO	= (0 << 28),
 	IWM_STA_FLG_MIMO_EN_MIMO2	= (1 << 28),
 	IWM_STA_FLG_MIMO_EN_MIMO3	= (2 << 28),
 	IWM_STA_FLG_MIMO_EN_MSK		= (3 << 28),
 };
 
 /**
  * enum iwm_sta_key_flag - key flags for the ADD_STA host command
  * @IWM_STA_KEY_FLG_NO_ENC: no encryption
  * @IWM_STA_KEY_FLG_WEP: WEP encryption algorithm
  * @IWM_STA_KEY_FLG_CCM: CCMP encryption algorithm
  * @IWM_STA_KEY_FLG_TKIP: TKIP encryption algorithm
  * @IWM_STA_KEY_FLG_EXT: extended cipher algorithm (depends on the FW support)
  * @IWM_STA_KEY_FLG_CMAC: CMAC encryption algorithm
  * @IWM_STA_KEY_FLG_ENC_UNKNOWN: unknown encryption algorithm
  * @IWM_STA_KEY_FLG_EN_MSK: mask for encryption algorithmi value
  * @IWM_STA_KEY_FLG_WEP_KEY_MAP: wep is either a group key (0 - legacy WEP) or from
  *	station info array (1 - n 1X mode)
  * @IWM_STA_KEY_FLG_KEYID_MSK: the index of the key
  * @IWM_STA_KEY_NOT_VALID: key is invalid
  * @IWM_STA_KEY_FLG_WEP_13BYTES: set for 13 bytes WEP key
  * @IWM_STA_KEY_MULTICAST: set for multical key
  * @IWM_STA_KEY_MFP: key is used for Management Frame Protection
  */
 enum iwm_sta_key_flag {
 	IWM_STA_KEY_FLG_NO_ENC		= (0 << 0),
 	IWM_STA_KEY_FLG_WEP		= (1 << 0),
 	IWM_STA_KEY_FLG_CCM		= (2 << 0),
 	IWM_STA_KEY_FLG_TKIP		= (3 << 0),
 	IWM_STA_KEY_FLG_EXT		= (4 << 0),
 	IWM_STA_KEY_FLG_CMAC		= (6 << 0),
 	IWM_STA_KEY_FLG_ENC_UNKNOWN	= (7 << 0),
 	IWM_STA_KEY_FLG_EN_MSK		= (7 << 0),
 
 	IWM_STA_KEY_FLG_WEP_KEY_MAP	= (1 << 3),
 	IWM_STA_KEY_FLG_KEYID_POS	= 8,
 	IWM_STA_KEY_FLG_KEYID_MSK	= (3 << IWM_STA_KEY_FLG_KEYID_POS),
 	IWM_STA_KEY_NOT_VALID		= (1 << 11),
 	IWM_STA_KEY_FLG_WEP_13BYTES	= (1 << 12),
 	IWM_STA_KEY_MULTICAST		= (1 << 14),
 	IWM_STA_KEY_MFP			= (1 << 15),
 };
 
 /**
  * enum iwm_sta_modify_flag - indicate to the fw what flag are being changed
  * @IWM_STA_MODIFY_QUEUE_REMOVAL: this command removes a queue
  * @IWM_STA_MODIFY_TID_DISABLE_TX: this command modifies %tid_disable_tx
  * @IWM_STA_MODIFY_TX_RATE: unused
  * @IWM_STA_MODIFY_ADD_BA_TID: this command modifies %add_immediate_ba_tid
  * @IWM_STA_MODIFY_REMOVE_BA_TID: this command modifies %remove_immediate_ba_tid
  * @IWM_STA_MODIFY_SLEEPING_STA_TX_COUNT: this command modifies %sleep_tx_count
  * @IWM_STA_MODIFY_PROT_TH:
  * @IWM_STA_MODIFY_QUEUES: modify the queues used by this station
  */
 enum iwm_sta_modify_flag {
 	IWM_STA_MODIFY_QUEUE_REMOVAL		= (1 << 0),
 	IWM_STA_MODIFY_TID_DISABLE_TX		= (1 << 1),
 	IWM_STA_MODIFY_TX_RATE			= (1 << 2),
 	IWM_STA_MODIFY_ADD_BA_TID		= (1 << 3),
 	IWM_STA_MODIFY_REMOVE_BA_TID		= (1 << 4),
 	IWM_STA_MODIFY_SLEEPING_STA_TX_COUNT	= (1 << 5),
 	IWM_STA_MODIFY_PROT_TH			= (1 << 6),
 	IWM_STA_MODIFY_QUEUES			= (1 << 7),
 };
 
 #define IWM_STA_MODE_MODIFY	1
 
 /**
  * enum iwm_sta_sleep_flag - type of sleep of the station
  * @IWM_STA_SLEEP_STATE_AWAKE:
  * @IWM_STA_SLEEP_STATE_PS_POLL:
  * @IWM_STA_SLEEP_STATE_UAPSD:
  * @IWM_STA_SLEEP_STATE_MOREDATA: set more-data bit on
  *	(last) released frame
  */
 enum iwm_sta_sleep_flag {
 	IWM_STA_SLEEP_STATE_AWAKE	= 0,
 	IWM_STA_SLEEP_STATE_PS_POLL	= (1 << 0),
 	IWM_STA_SLEEP_STATE_UAPSD	= (1 << 1),
 	IWM_STA_SLEEP_STATE_MOREDATA	= (1 << 2),
 };
 
 /* STA ID and color bits definitions */
 #define IWM_STA_ID_SEED		(0x0f)
 #define IWM_STA_ID_POS		(0)
 #define IWM_STA_ID_MSK		(IWM_STA_ID_SEED << IWM_STA_ID_POS)
 
 #define IWM_STA_COLOR_SEED	(0x7)
 #define IWM_STA_COLOR_POS	(4)
 #define IWM_STA_COLOR_MSK	(IWM_STA_COLOR_SEED << IWM_STA_COLOR_POS)
 
 #define IWM_STA_ID_N_COLOR_GET_COLOR(id_n_color) \
 	(((id_n_color) & IWM_STA_COLOR_MSK) >> IWM_STA_COLOR_POS)
 #define IWM_STA_ID_N_COLOR_GET_ID(id_n_color)    \
 	(((id_n_color) & IWM_STA_ID_MSK) >> IWM_STA_ID_POS)
 
 #define IWM_STA_KEY_MAX_NUM (16)
 #define IWM_STA_KEY_IDX_INVALID (0xff)
 #define IWM_STA_KEY_MAX_DATA_KEY_NUM (4)
 #define IWM_MAX_GLOBAL_KEYS (4)
 #define IWM_STA_KEY_LEN_WEP40 (5)
 #define IWM_STA_KEY_LEN_WEP104 (13)
 
 /**
  * struct iwm_mvm_keyinfo - key information
  * @key_flags: type %iwm_sta_key_flag
  * @tkip_rx_tsc_byte2: TSC[2] for key mix ph1 detection
  * @tkip_rx_ttak: 10-byte unicast TKIP TTAK for Rx
  * @key_offset: key offset in the fw's key table
  * @key: 16-byte unicast decryption key
  * @tx_secur_seq_cnt: initial RSC / PN needed for replay check
  * @hw_tkip_mic_rx_key: byte: MIC Rx Key - used for TKIP only
  * @hw_tkip_mic_tx_key: byte: MIC Tx Key - used for TKIP only
  */
 struct iwm_mvm_keyinfo {
 	uint16_t key_flags;
 	uint8_t tkip_rx_tsc_byte2;
 	uint8_t reserved1;
 	uint16_t tkip_rx_ttak[5];
 	uint8_t key_offset;
 	uint8_t reserved2;
 	uint8_t key[16];
 	uint64_t tx_secur_seq_cnt;
 	uint64_t hw_tkip_mic_rx_key;
 	uint64_t hw_tkip_mic_tx_key;
 } __packed;
 
 #define IWM_ADD_STA_STATUS_MASK		0xFF
 #define IWM_ADD_STA_BAID_VALID_MASK	0x8000
 #define IWM_ADD_STA_BAID_MASK		0x7F00
 #define IWM_ADD_STA_BAID_SHIFT		8
 
 /**
  * struct iwm_mvm_add_sta_cmd_v7 - Add/modify a station in the fw's sta table.
  * ( REPLY_ADD_STA = 0x18 )
  * @add_modify: 1: modify existing, 0: add new station
  * @awake_acs:
  * @tid_disable_tx: is tid BIT(tid) enabled for Tx. Clear BIT(x) to enable
  *	AMPDU for tid x. Set %IWM_STA_MODIFY_TID_DISABLE_TX to change this field.
  * @mac_id_n_color: the Mac context this station belongs to
  * @addr[IEEE80211_ADDR_LEN]: station's MAC address
  * @sta_id: index of station in uCode's station table
  * @modify_mask: IWM_STA_MODIFY_*, selects which parameters to modify vs. leave
  *	alone. 1 - modify, 0 - don't change.
  * @station_flags: look at %iwm_sta_flags
  * @station_flags_msk: what of %station_flags have changed
  * @add_immediate_ba_tid: tid for which to add block-ack support (Rx)
  *	Set %IWM_STA_MODIFY_ADD_BA_TID to use this field, and also set
  *	add_immediate_ba_ssn.
  * @remove_immediate_ba_tid: tid for which to remove block-ack support (Rx)
  *	Set %IWM_STA_MODIFY_REMOVE_BA_TID to use this field
  * @add_immediate_ba_ssn: ssn for the Rx block-ack session. Used together with
  *	add_immediate_ba_tid.
  * @sleep_tx_count: number of packets to transmit to station even though it is
  *	asleep. Used to synchronise PS-poll and u-APSD responses while ucode
  *	keeps track of STA sleep state.
  * @sleep_state_flags: Look at %iwm_sta_sleep_flag.
  * @assoc_id: assoc_id to be sent in VHT PLCP (9-bit), for grp use 0, for AP
  *	mac-addr.
  * @beamform_flags: beam forming controls
  * @tfd_queue_msk: tfd queues used by this station
  *
  * The device contains an internal table of per-station information, with info
  * on security keys, aggregation parameters, and Tx rates for initial Tx
  * attempt and any retries (set by IWM_REPLY_TX_LINK_QUALITY_CMD).
  *
  * ADD_STA sets up the table entry for one station, either creating a new
  * entry, or modifying a pre-existing one.
  */
 struct iwm_mvm_add_sta_cmd_v7 {
 	uint8_t add_modify;
 	uint8_t awake_acs;
 	uint16_t tid_disable_tx;
 	uint32_t mac_id_n_color;
 	uint8_t addr[IEEE80211_ADDR_LEN]; /* _STA_ID_MODIFY_INFO_API_S_VER_1 */
 	uint16_t reserved2;
 	uint8_t sta_id;
 	uint8_t modify_mask;
 	uint16_t reserved3;
 	uint32_t station_flags;
 	uint32_t station_flags_msk;
 	uint8_t add_immediate_ba_tid;
 	uint8_t remove_immediate_ba_tid;
 	uint16_t add_immediate_ba_ssn;
 	uint16_t sleep_tx_count;
 	uint16_t sleep_state_flags;
 	uint16_t assoc_id;
 	uint16_t beamform_flags;
 	uint32_t tfd_queue_msk;
 } __packed; /* ADD_STA_CMD_API_S_VER_7 */
 
 /**
  * struct iwm_mvm_add_sta_key_cmd - add/modify sta key
  * ( IWM_REPLY_ADD_STA_KEY = 0x17 )
  * @sta_id: index of station in uCode's station table
  * @key_offset: key offset in key storage
  * @key_flags: type %iwm_sta_key_flag
  * @key: key material data
  * @key2: key material data
  * @rx_secur_seq_cnt: RX security sequence counter for the key
  * @tkip_rx_tsc_byte2: TSC[2] for key mix ph1 detection
  * @tkip_rx_ttak: 10-byte unicast TKIP TTAK for Rx
  */
 struct iwm_mvm_add_sta_key_cmd {
 	uint8_t sta_id;
 	uint8_t key_offset;
 	uint16_t key_flags;
 	uint8_t key[16];
 	uint8_t key2[16];
 	uint8_t rx_secur_seq_cnt[16];
 	uint8_t tkip_rx_tsc_byte2;
 	uint8_t reserved;
 	uint16_t tkip_rx_ttak[5];
 } __packed; /* IWM_ADD_MODIFY_STA_KEY_API_S_VER_1 */
 
 /**
  * enum iwm_mvm_add_sta_rsp_status - status in the response to ADD_STA command
  * @IWM_ADD_STA_SUCCESS: operation was executed successfully
  * @IWM_ADD_STA_STATIONS_OVERLOAD: no room left in the fw's station table
  * @IWM_ADD_STA_IMMEDIATE_BA_FAILURE: can't add Rx block ack session
  * @IWM_ADD_STA_MODIFY_NON_EXISTING_STA: driver requested to modify a station
  *	that doesn't exist.
  */
 enum iwm_mvm_add_sta_rsp_status {
 	IWM_ADD_STA_SUCCESS			= 0x1,
 	IWM_ADD_STA_STATIONS_OVERLOAD		= 0x2,
 	IWM_ADD_STA_IMMEDIATE_BA_FAILURE	= 0x4,
 	IWM_ADD_STA_MODIFY_NON_EXISTING_STA	= 0x8,
 };
 
 /**
  * struct iwm_mvm_rm_sta_cmd - Add / modify a station in the fw's station table
  * ( IWM_REMOVE_STA = 0x19 )
  * @sta_id: the station id of the station to be removed
  */
 struct iwm_mvm_rm_sta_cmd {
 	uint8_t sta_id;
 	uint8_t reserved[3];
 } __packed; /* IWM_REMOVE_STA_CMD_API_S_VER_2 */
 
 /**
  * struct iwm_mvm_mgmt_mcast_key_cmd
  * ( IWM_MGMT_MCAST_KEY = 0x1f )
  * @ctrl_flags: %iwm_sta_key_flag
  * @IGTK:
  * @K1: IGTK master key
  * @K2: IGTK sub key
  * @sta_id: station ID that support IGTK
  * @key_id:
  * @receive_seq_cnt: initial RSC/PN needed for replay check
  */
 struct iwm_mvm_mgmt_mcast_key_cmd {
 	uint32_t ctrl_flags;
 	uint8_t IGTK[16];
 	uint8_t K1[16];
 	uint8_t K2[16];
 	uint32_t key_id;
 	uint32_t sta_id;
 	uint64_t receive_seq_cnt;
 } __packed; /* SEC_MGMT_MULTICAST_KEY_CMD_API_S_VER_1 */
 
 struct iwm_mvm_wep_key {
 	uint8_t key_index;
 	uint8_t key_offset;
 	uint16_t reserved1;
 	uint8_t key_size;
 	uint8_t reserved2[3];
 	uint8_t key[16];
 } __packed;
 
 struct iwm_mvm_wep_key_cmd {
 	uint32_t mac_id_n_color;
 	uint8_t num_keys;
 	uint8_t decryption_type;
 	uint8_t flags;
 	uint8_t reserved;
 	struct iwm_mvm_wep_key wep_key[0];
 } __packed; /* SEC_CURR_WEP_KEY_CMD_API_S_VER_2 */
 
 /*
  * END mvm/fw-api-sta.h
  */
 
 /*
  * BT coex
  */
 
 enum iwm_bt_coex_mode {
 	IWM_BT_COEX_DISABLE		= 0x0,
 	IWM_BT_COEX_NW			= 0x1,
 	IWM_BT_COEX_BT			= 0x2,
 	IWM_BT_COEX_WIFI		= 0x3,
 }; /* BT_COEX_MODES_E */
 
 enum iwm_bt_coex_enabled_modules {
 	IWM_BT_COEX_MPLUT_ENABLED	= (1 << 0),
 	IWM_BT_COEX_MPLUT_BOOST_ENABLED	= (1 << 1),
 	IWM_BT_COEX_SYNC2SCO_ENABLED	= (1 << 2),
 	IWM_BT_COEX_CORUN_ENABLED	= (1 << 3),
 	IWM_BT_COEX_HIGH_BAND_RET	= (1 << 4),
 }; /* BT_COEX_MODULES_ENABLE_E_VER_1 */
 
 /**
  * struct iwm_bt_coex_cmd - bt coex configuration command
  * @mode: enum %iwm_bt_coex_mode
  * @enabled_modules: enum %iwm_bt_coex_enabled_modules
  *
  * The structure is used for the BT_COEX command.
  */
 struct iwm_bt_coex_cmd {
 	uint32_t mode;
 	uint32_t enabled_modules;
 } __packed; /* BT_COEX_CMD_API_S_VER_6 */
 
 
 /*
  * Location Aware Regulatory (LAR) API - MCC updates
  */
 
 /**
  * struct iwm_mcc_update_cmd_v1 - Request the device to update geographic
  * regulatory profile according to the given MCC (Mobile Country Code).
  * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
  * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
  * MCC in the cmd response will be the relevant MCC in the NVM.
  * @mcc: given mobile country code
  * @source_id: the source from where we got the MCC, see iwm_mcc_source
  * @reserved: reserved for alignment
  */
 struct iwm_mcc_update_cmd_v1 {
 	uint16_t mcc;
 	uint8_t source_id;
 	uint8_t reserved;
 } __packed; /* LAR_UPDATE_MCC_CMD_API_S_VER_1 */
 
 /**
  * struct iwm_mcc_update_cmd - Request the device to update geographic
  * regulatory profile according to the given MCC (Mobile Country Code).
  * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
  * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
  * MCC in the cmd response will be the relevant MCC in the NVM.
  * @mcc: given mobile country code
  * @source_id: the source from where we got the MCC, see iwm_mcc_source
  * @reserved: reserved for alignment
  * @key: integrity key for MCC API OEM testing
  * @reserved2: reserved
  */
 struct iwm_mcc_update_cmd {
 	uint16_t mcc;
 	uint8_t source_id;
 	uint8_t reserved;
 	uint32_t key;
 	uint32_t reserved2[5];
 } __packed; /* LAR_UPDATE_MCC_CMD_API_S_VER_2 */
 
 /**
  * iwm_mcc_update_resp_v1  - response to MCC_UPDATE_CMD.
  * Contains the new channel control profile map, if changed, and the new MCC
  * (mobile country code).
  * The new MCC may be different than what was requested in MCC_UPDATE_CMD.
  * @status: see &enum iwm_mcc_update_status
  * @mcc: the new applied MCC
  * @cap: capabilities for all channels which matches the MCC
  * @source_id: the MCC source, see iwm_mcc_source
  * @n_channels: number of channels in @channels_data (may be 14, 39, 50 or 51
  *		channels, depending on platform)
  * @channels: channel control data map, DWORD for each channel. Only the first
  *	16bits are used.
  */
 struct iwm_mcc_update_resp_v1  {
 	uint32_t status;
 	uint16_t mcc;
 	uint8_t cap;
 	uint8_t source_id;
 	uint32_t n_channels;
 	uint32_t channels[0];
 } __packed; /* LAR_UPDATE_MCC_CMD_RESP_S_VER_1 */
 
 /**
  * iwm_mcc_update_resp - response to MCC_UPDATE_CMD.
  * Contains the new channel control profile map, if changed, and the new MCC
  * (mobile country code).
  * The new MCC may be different than what was requested in MCC_UPDATE_CMD.
  * @status: see &enum iwm_mcc_update_status
  * @mcc: the new applied MCC
  * @cap: capabilities for all channels which matches the MCC
  * @source_id: the MCC source, see iwm_mcc_source
  * @time: time elapsed from the MCC test start (in 30 seconds TU)
  * @reserved: reserved.
  * @n_channels: number of channels in @channels_data (may be 14, 39, 50 or 51
  *		channels, depending on platform)
  * @channels: channel control data map, DWORD for each channel. Only the first
  *	16bits are used.
  */
 struct iwm_mcc_update_resp {
 	uint32_t status;
 	uint16_t mcc;
 	uint8_t cap;
 	uint8_t source_id;
 	uint16_t time;
 	uint16_t reserved;
 	uint32_t n_channels;
 	uint32_t channels[0];
 } __packed; /* LAR_UPDATE_MCC_CMD_RESP_S_VER_2 */
 
 /**
  * struct iwm_mcc_chub_notif - chub notifies of mcc change
  * (MCC_CHUB_UPDATE_CMD = 0xc9)
  * The Chub (Communication Hub, CommsHUB) is a HW component that connects to
  * the cellular and connectivity cores that gets updates of the mcc, and
  * notifies the ucode directly of any mcc change.
  * The ucode requests the driver to request the device to update geographic
  * regulatory  profile according to the given MCC (Mobile Country Code).
  * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
  * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
  * MCC in the cmd response will be the relevant MCC in the NVM.
  * @mcc: given mobile country code
  * @source_id: identity of the change originator, see iwm_mcc_source
  * @reserved1: reserved for alignment
  */
 struct iwm_mcc_chub_notif {
 	uint16_t mcc;
 	uint8_t source_id;
 	uint8_t reserved1;
 } __packed; /* LAR_MCC_NOTIFY_S */
 
 enum iwm_mcc_update_status {
 	IWM_MCC_RESP_NEW_CHAN_PROFILE,
 	IWM_MCC_RESP_SAME_CHAN_PROFILE,
 	IWM_MCC_RESP_INVALID,
 	IWM_MCC_RESP_NVM_DISABLED,
 	IWM_MCC_RESP_ILLEGAL,
 	IWM_MCC_RESP_LOW_PRIORITY,
 	IWM_MCC_RESP_TEST_MODE_ACTIVE,
 	IWM_MCC_RESP_TEST_MODE_NOT_ACTIVE,
 	IWM_MCC_RESP_TEST_MODE_DENIAL_OF_SERVICE,
 };
 
 enum iwm_mcc_source {
 	IWM_MCC_SOURCE_OLD_FW = 0,
 	IWM_MCC_SOURCE_ME = 1,
 	IWM_MCC_SOURCE_BIOS = 2,
 	IWM_MCC_SOURCE_3G_LTE_HOST = 3,
 	IWM_MCC_SOURCE_3G_LTE_DEVICE = 4,
 	IWM_MCC_SOURCE_WIFI = 5,
 	IWM_MCC_SOURCE_RESERVED = 6,
 	IWM_MCC_SOURCE_DEFAULT = 7,
 	IWM_MCC_SOURCE_UNINITIALIZED = 8,
 	IWM_MCC_SOURCE_MCC_API = 9,
 	IWM_MCC_SOURCE_GET_CURRENT = 0x10,
 	IWM_MCC_SOURCE_GETTING_MCC_TEST_MODE = 0x11,
 };
 
 /**
  * struct iwm_dts_measurement_notif_v1 - measurements notification
  *
  * @temp: the measured temperature
  * @voltage: the measured voltage
  */
 struct iwm_dts_measurement_notif_v1 {
 	int32_t temp;
 	int32_t voltage;
 } __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_NTFY_S_VER_1*/
 
 /**
  * struct iwm_dts_measurement_notif_v2 - measurements notification
  *
  * @temp: the measured temperature
  * @voltage: the measured voltage
  * @threshold_idx: the trip index that was crossed
  */
 struct iwm_dts_measurement_notif_v2 {
 	int32_t temp;
 	int32_t voltage;
 	int32_t threshold_idx;
 } __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_NTFY_S_VER_2 */
 
 /*
  * Some cherry-picked definitions
  */
 
 #define IWM_FRAME_LIMIT	64
 
 /*
  * From Linux commit ab02165ccec4c78162501acedeef1a768acdb811:
  *   As the firmware is slowly running out of command IDs and grouping of
  *   commands is desirable anyway, the firmware is extending the command
  *   header from 4 bytes to 8 bytes to introduce a group (in place of the
  *   former flags field, since that's always 0 on commands and thus can
  *   be easily used to distinguish between the two).
  *
  * These functions retrieve specific information from the id field in
  * the iwm_host_cmd struct which contains the command id, the group id,
  * and the version of the command.
 */
 static inline uint8_t
 iwm_cmd_opcode(uint32_t cmdid)
 {
 	return cmdid & 0xff;
 }
 
 static inline uint8_t
 iwm_cmd_groupid(uint32_t cmdid)
 {
 	return ((cmdid & 0Xff00) >> 8);
 }
 
 static inline uint8_t
 iwm_cmd_version(uint32_t cmdid)
 {
 	return ((cmdid & 0xff0000) >> 16);
 }
 
 static inline uint32_t
 iwm_cmd_id(uint8_t opcode, uint8_t groupid, uint8_t version)
 {
 	return opcode + (groupid << 8) + (version << 16);
 }
 
 /* make uint16_t wide id out of uint8_t group and opcode */
 #define IWM_WIDE_ID(grp, opcode) ((grp << 8) | opcode)
 
 /* due to the conversion, this group is special */
 #define IWM_ALWAYS_LONG_GROUP	1
 
 struct iwm_cmd_header {
 	uint8_t code;
 	uint8_t flags;
 	uint8_t idx;
 	uint8_t qid;
 } __packed;
 
 struct iwm_cmd_header_wide {
 	uint8_t opcode;
 	uint8_t group_id;
 	uint8_t idx;
 	uint8_t qid;
 	uint16_t length;
 	uint8_t reserved;
 	uint8_t version;
 } __packed;
 
 enum iwm_power_scheme {
 	IWM_POWER_SCHEME_CAM = 1,
 	IWM_POWER_SCHEME_BPS,
 	IWM_POWER_SCHEME_LP
 };
 
 #define IWM_DEF_CMD_PAYLOAD_SIZE 320
 #define IWM_MAX_CMD_PAYLOAD_SIZE ((4096 - 4) - sizeof(struct iwm_cmd_header))
 #define IWM_CMD_FAILED_MSK 0x40
 
 /**
  * struct iwm_device_cmd
  *
  * For allocation of the command and tx queues, this establishes the overall
  * size of the largest command we send to uCode, except for commands that
  * aren't fully copied and use other TFD space.
  */
 struct iwm_device_cmd {
 	union {
 		struct {
 			struct iwm_cmd_header hdr;
 			uint8_t data[IWM_DEF_CMD_PAYLOAD_SIZE];
 		};
 		struct {
 			struct iwm_cmd_header_wide hdr_wide;
 			uint8_t data_wide[IWM_DEF_CMD_PAYLOAD_SIZE -
 					sizeof(struct iwm_cmd_header_wide) +
 					sizeof(struct iwm_cmd_header)];
 		};
 	};
 } __packed;
 
 struct iwm_rx_packet {
 	/*
 	 * The first 4 bytes of the RX frame header contain both the RX frame
 	 * size and some flags.
 	 * Bit fields:
 	 * 31:    flag flush RB request
 	 * 30:    flag ignore TC (terminal counter) request
 	 * 29:    flag fast IRQ request
 	 * 28-14: Reserved
 	 * 13-00: RX frame size
 	 */
 	uint32_t len_n_flags;
 	struct iwm_cmd_header hdr;
 	uint8_t data[];
 } __packed;
 
 #define	IWM_FH_RSCSR_FRAME_SIZE_MSK	0x00003fff
 
 static inline uint32_t
 iwm_rx_packet_len(const struct iwm_rx_packet *pkt)
 {
 
 	return le32toh(pkt->len_n_flags) & IWM_FH_RSCSR_FRAME_SIZE_MSK;
 }
 
 static inline uint32_t
 iwm_rx_packet_payload_len(const struct iwm_rx_packet *pkt)
 {
 
 	return iwm_rx_packet_len(pkt) - sizeof(pkt->hdr);
 }
 
 
 #define IWM_MIN_DBM	-100
 #define IWM_MAX_DBM	-33	/* realistic guess */
 
 #define IWM_READ(sc, reg)						\
 	bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
 
 #define IWM_WRITE(sc, reg, val)						\
 	bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
 
 #define IWM_WRITE_1(sc, reg, val)					\
 	bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
 
 #define IWM_SETBITS(sc, reg, mask)					\
 	IWM_WRITE(sc, reg, IWM_READ(sc, reg) | (mask))
 
 #define IWM_CLRBITS(sc, reg, mask)					\
 	IWM_WRITE(sc, reg, IWM_READ(sc, reg) & ~(mask))
 
 #define IWM_BARRIER_WRITE(sc)						\
 	bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, (sc)->sc_sz,	\
 	    BUS_SPACE_BARRIER_WRITE)
 
 #define IWM_BARRIER_READ_WRITE(sc)					\
 	bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, (sc)->sc_sz,	\
 	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)
 
 #endif	/* __IF_IWM_REG_H__ */
Index: head/sys/dev/iwm/if_iwmvar.h
===================================================================
--- head/sys/dev/iwm/if_iwmvar.h	(revision 314191)
+++ head/sys/dev/iwm/if_iwmvar.h	(revision 314192)
@@ -1,510 +1,528 @@
 /*	$OpenBSD: if_iwmvar.h,v 1.7 2015/03/02 13:51:10 jsg Exp $	*/
 /*	$FreeBSD$ */
 
 /*
  * Copyright (c) 2014 genua mbh <info@genua.de>
  * Copyright (c) 2014 Fixup Software Ltd.
  *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
  *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
 /*-
  * Based on BSD-licensed source modules in the Linux iwlwifi driver,
  * which were used as the reference documentation for this implementation.
  *
  * Driver version we are currently based off of is
  * Linux 3.14.3 (tag id a2df521e42b1d9a23f620ac79dbfe8655a8391dd)
  *
  ***********************************************************************
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
  * redistributing this file, you may do so under either license.
  *
  * GPL LICENSE SUMMARY
  *
  * Copyright(c) 2007 - 2013 Intel Corporation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of version 2 of the GNU General Public License as
  * published by the Free Software Foundation.
  *
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  * General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  * USA
  *
  * The full GNU General Public License is included in this distribution
  * in the file called COPYING.
  *
  * Contact Information:
  *  Intel Linux Wireless <ilw@linux.intel.com>
  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  *
  *
  * BSD LICENSE
  *
  * Copyright(c) 2005 - 2013 Intel Corporation. All rights reserved.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  *
  *  * Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  *  * Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in
  *    the documentation and/or other materials provided with the
  *    distribution.
  *  * Neither the name Intel Corporation nor the names of its
  *    contributors may be used to endorse or promote products derived
  *    from this software without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
 /*-
  * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr>
  *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
  *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
 struct iwm_rx_radiotap_header {
 	struct ieee80211_radiotap_header wr_ihdr;
 	uint64_t	wr_tsft;
 	uint8_t		wr_flags;
 	uint8_t		wr_rate;
 	uint16_t	wr_chan_freq;
 	uint16_t	wr_chan_flags;
 	int8_t		wr_dbm_antsignal;
 	int8_t		wr_dbm_antnoise;
 } __packed;
 
 #define IWM_RX_RADIOTAP_PRESENT						\
 	((1 << IEEE80211_RADIOTAP_TSFT) |				\
 	 (1 << IEEE80211_RADIOTAP_FLAGS) |				\
 	 (1 << IEEE80211_RADIOTAP_RATE) |				\
 	 (1 << IEEE80211_RADIOTAP_CHANNEL) |				\
 	 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |			\
 	 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE))
 
 struct iwm_tx_radiotap_header {
 	struct ieee80211_radiotap_header wt_ihdr;
 	uint8_t		wt_flags;
 	uint8_t		wt_rate;
 	uint16_t	wt_chan_freq;
 	uint16_t	wt_chan_flags;
 } __packed;
 
 #define IWM_TX_RADIOTAP_PRESENT						\
 	((1 << IEEE80211_RADIOTAP_FLAGS) |				\
 	 (1 << IEEE80211_RADIOTAP_RATE) |				\
 	 (1 << IEEE80211_RADIOTAP_CHANNEL))
 
 
 #define IWM_UCODE_SECTION_MAX 16
 
 /*
  * fw_status is used to determine if we've already parsed the firmware file
  *
  * In addition to the following, status < 0 ==> -error
  */
 #define IWM_FW_STATUS_NONE		0
 #define IWM_FW_STATUS_INPROGRESS	1
 #define IWM_FW_STATUS_DONE		2
 
 /**
  * enum iwm_ucode_type
  *
  * The type of ucode.
  *
  * @IWM_UCODE_REGULAR: Normal runtime ucode
  * @IWM_UCODE_INIT: Initial ucode
  * @IWM_UCODE_WOWLAN: Wake on Wireless enabled ucode
  * @IWM_UCODE_REGULAR_USNIFFER: Normal runtime ucode when using usniffer image
  */
 enum iwm_ucode_type {
 	IWM_UCODE_REGULAR,
 	IWM_UCODE_INIT,
 	IWM_UCODE_WOWLAN,
 	IWM_UCODE_REGULAR_USNIFFER,
 	IWM_UCODE_TYPE_MAX
 };
 
 /* one for each uCode image (inst/data, init/runtime/wowlan) */
 struct iwm_fw_desc {
 	const void *data;	/* vmalloc'ed data */
 	uint32_t len;		/* size in bytes */
 	uint32_t offset;	/* offset in the device */
 };
 
 struct iwm_fw_info {
 	const struct firmware *fw_fp;
 	int fw_status;
 
 	struct iwm_fw_sects {
 		struct iwm_fw_desc fw_sect[IWM_UCODE_SECTION_MAX];
 		int fw_count;
 		int is_dual_cpus;
 		uint32_t paging_mem_size;
 	} fw_sects[IWM_UCODE_TYPE_MAX];
 
 	uint32_t phy_config;
 	uint8_t valid_tx_ant;
 	uint8_t valid_rx_ant;
 };
 
 struct iwm_nvm_data {
 	int n_hw_addrs;
 	uint8_t hw_addr[IEEE80211_ADDR_LEN];
 
 	int sku_cap_band_24GHz_enable;
 	int sku_cap_band_52GHz_enable;
 	int sku_cap_11n_enable;
 	int sku_cap_amt_enable;
 	int sku_cap_ipan_enable;
 
 	uint8_t radio_cfg_type;
 	uint8_t radio_cfg_step;
 	uint8_t radio_cfg_dash;
 	uint8_t radio_cfg_pnum;
 	uint8_t valid_tx_ant, valid_rx_ant;
 #define IWM_NUM_CHANNELS	39
 #define IWM_NUM_CHANNELS_8000	51
 
 	uint16_t nvm_version;
 	uint8_t max_tx_pwr_half_dbm;
 
 	uint16_t nvm_ch_flags[];
 };
 
 /* max bufs per tfd the driver will use */
 #define IWM_MAX_CMD_TBS_PER_TFD 2
 
 struct iwm_rx_packet;
 struct iwm_host_cmd {
 	const void *data[IWM_MAX_CMD_TBS_PER_TFD];
 	struct iwm_rx_packet *resp_pkt;
 	unsigned long _rx_page_addr;
 	uint32_t _rx_page_order;
 	int handler_status;
 
 	uint32_t flags;
 	uint32_t id;
 	uint16_t len[IWM_MAX_CMD_TBS_PER_TFD];
 	uint8_t dataflags[IWM_MAX_CMD_TBS_PER_TFD];
 };
 
 /*
  * DMA glue is from iwn
  */
 
 typedef caddr_t iwm_caddr_t;
 typedef void *iwm_hookarg_t;
 
 struct iwm_dma_info {
 	bus_dma_tag_t		tag;
 	bus_dmamap_t		map;
 	bus_dma_segment_t	seg;
 	bus_addr_t		paddr;
 	void 			*vaddr;
 	bus_size_t		size;
 };
 
+/**
+ * struct iwm_fw_paging
+ * @fw_paging_block: dma memory info
+ * @fw_paging_size: page size
+ */
+struct iwm_fw_paging {
+	struct iwm_dma_info fw_paging_block;
+	uint32_t fw_paging_size;
+};
+
 #define IWM_TX_RING_COUNT	256
 #define IWM_TX_RING_LOMARK	192
 #define IWM_TX_RING_HIMARK	224
 
 struct iwm_tx_data {
 	bus_dmamap_t		map;
 	bus_addr_t		cmd_paddr;
 	bus_addr_t		scratch_paddr;
 	struct mbuf		*m;
 	struct iwm_node 	*in;
 	int			done;
 };
 
 struct iwm_tx_ring {
 	struct iwm_dma_info	desc_dma;
 	struct iwm_dma_info	cmd_dma;
 	struct iwm_tfd		*desc;
 	struct iwm_device_cmd	*cmd;
 	bus_dma_tag_t		data_dmat;
 	struct iwm_tx_data	data[IWM_TX_RING_COUNT];
 	int			qid;
 	int			queued;
 	int			cur;
 };
 
 #define IWM_RX_RING_COUNT	256
 #define IWM_RBUF_COUNT		(IWM_RX_RING_COUNT + 32)
 /* Linux driver optionally uses 8k buffer */
 #define IWM_RBUF_SIZE		4096
 
 #define	IWM_MAX_SCATTER		20
 
 struct iwm_rx_data {
 	struct mbuf	*m;
 	bus_dmamap_t	map;
 };
 
 struct iwm_rx_ring {
 	struct iwm_dma_info	desc_dma;
 	struct iwm_dma_info	stat_dma;
 	struct iwm_dma_info	buf_dma;
 	uint32_t		*desc;
 	struct iwm_rb_status	*stat;
 	struct iwm_rx_data	data[IWM_RX_RING_COUNT];
 	bus_dmamap_t		spare_map;	/* for iwm_rx_addbuf() */
 	bus_dma_tag_t           data_dmat;
 	int			cur;
 };
 
 #define IWM_CMD_RESP_MAX PAGE_SIZE
 
 #define IWM_MVM_TE_SESSION_PROTECTION_MAX_TIME_MS 500
 #define IWM_MVM_TE_SESSION_PROTECTION_MIN_TIME_MS 400
 
 /*
  * Command headers are in iwl-trans.h, which is full of all
  * kinds of other junk, so we just replicate the structures here.
  * First the software bits:
  */
 enum IWM_CMD_MODE {
 	IWM_CMD_SYNC		= 0,
 	IWM_CMD_ASYNC		= (1 << 0),
 	IWM_CMD_WANT_SKB	= (1 << 1),
 	IWM_CMD_SEND_IN_RFKILL	= (1 << 2),
 };
 enum iwm_hcmd_dataflag {
 	IWM_HCMD_DFL_NOCOPY     = (1 << 0),
 	IWM_HCMD_DFL_DUP        = (1 << 1),
 };
 
 struct iwm_int_sta {
 	uint32_t sta_id;
 	uint32_t tfd_queue_msk;
 };
 
 struct iwm_mvm_phy_ctxt {
 	uint16_t id;
 	uint16_t color;
 	uint32_t ref;
 	struct ieee80211_channel *channel;
 };
 
 struct iwm_bf_data {
 	int bf_enabled;		/* filtering	*/
 	int ba_enabled;		/* abort	*/
 	int ave_beacon_signal;
 	int last_cqm_event;
 };
 
 struct iwm_vap {
 	struct ieee80211vap	iv_vap;
 	int			is_uploaded;
 
 	int			(*iv_newstate)(struct ieee80211vap *,
 				    enum ieee80211_state, int);
 };
 #define IWM_VAP(_vap)		((struct iwm_vap *)(_vap))
 
 struct iwm_node {
 	struct ieee80211_node	in_ni;
 	struct iwm_mvm_phy_ctxt	*in_phyctxt;
 
 	/* status "bits" */
 	int			in_assoc;
 
 	struct iwm_lq_cmd	in_lq;
 
 	uint8_t			in_ridx[IEEE80211_RATE_MAXSIZE];
 };
 #define IWM_NODE(_ni)		((struct iwm_node *)(_ni))
 
 #define IWM_STATION_ID 0
 #define IWM_AUX_STA_ID 1
 
 #define	IWM_DEFAULT_MACID	0
 #define	IWM_DEFAULT_COLOR	0
 #define	IWM_DEFAULT_TSFID	0
 
 #define IWM_ICT_SIZE		4096
 #define IWM_ICT_COUNT		(IWM_ICT_SIZE / sizeof (uint32_t))
 #define IWM_ICT_PADDR_SHIFT	12
 
 struct iwm_cfg;
 
 struct iwm_softc {
 	device_t		sc_dev;
 	uint32_t		sc_debug;
 	int			sc_attached;
 
 	struct mtx		sc_mtx;
 	struct mbufq		sc_snd;
 	struct ieee80211com	sc_ic;
 	struct ieee80211_ratectl_tx_status sc_txs;
 
 	int			sc_flags;
 #define IWM_FLAG_USE_ICT	(1 << 0)
 #define IWM_FLAG_HW_INITED	(1 << 1)
 #define IWM_FLAG_STOPPED	(1 << 2)
 #define IWM_FLAG_RFKILL		(1 << 3)
 #define IWM_FLAG_BUSY		(1 << 4)
 #define IWM_FLAG_SCANNING	(1 << 5)
 #define IWM_FLAG_SCAN_RUNNING	(1 << 6)
 
 	struct intr_config_hook sc_preinit_hook;
 	struct callout		sc_watchdog_to;
 	struct callout		sc_led_blink_to;
 
 	struct task		init_task;
 
 	struct resource		*sc_irq;
 	struct resource		*sc_mem;
 	bus_space_tag_t		sc_st;
 	bus_space_handle_t	sc_sh;
 	bus_size_t		sc_sz;
 	bus_dma_tag_t		sc_dmat;
 	void			*sc_ih;
 
 	/* TX scheduler rings. */
 	struct iwm_dma_info	sched_dma;
 	uint32_t		scd_base_addr;
 
 	/* TX/RX rings. */
 	struct iwm_tx_ring	txq[IWM_MVM_MAX_QUEUES];
 	struct iwm_rx_ring	rxq;
 	int			qfullmsk;
 
 	int			sc_sf_state;
 
 	/* ICT table. */
 	struct iwm_dma_info	ict_dma;
 	int			ict_cur;
 
 	int			sc_hw_rev;
 	int			sc_hw_id;
 
 	struct iwm_dma_info	kw_dma;
 	struct iwm_dma_info	fw_dma;
 
 	int			sc_fw_chunk_done;
 
 	enum iwm_ucode_type	cur_ucode;
 	int			ucode_loaded;
 	char			sc_fwver[32];
 
 	int			sc_capaflags;
 	int			sc_capa_max_probe_len;
 	int sc_capa_n_scan_channels;
 	uint32_t sc_ucode_api;
 	uint8_t sc_enabled_capa[howmany(IWM_NUM_UCODE_TLV_CAPA, NBBY)];
 	char sc_fw_mcc[3];
 
 	int			sc_intmask;
 
 	/*
 	 * So why do we need a separate stopped flag and a generation?
 	 * the former protects the device from issuing commands when it's
 	 * stopped (duh).  The latter protects against race from a very
 	 * fast stop/unstop cycle where threads waiting for responses do
 	 * not have a chance to run in between.  Notably: we want to stop
 	 * the device from interrupt context when it craps out, so we
 	 * don't have the luxury of waiting for quiescense.
 	 */
 	int			sc_generation;
 
 	struct iwm_fw_info	sc_fw;
 	struct iwm_tlv_calib_ctrl sc_default_calib[IWM_UCODE_TYPE_MAX];
 
 	const struct iwm_cfg	*cfg;
 	struct iwm_nvm_data	*nvm_data;
 	struct iwm_phy_db	*sc_phy_db;
 
 	struct iwm_bf_data	sc_bf;
 
 	int			sc_tx_timer;
 
 	int			sc_scan_last_antenna;
 
 	int			sc_fixed_ridx;
 
 	int			sc_staid;
 	int			sc_nodecolor;
 
 	uint8_t			sc_cmd_resp[IWM_CMD_RESP_MAX];
 	int			sc_wantresp;
 
 	struct task		sc_es_task;
 
 	struct iwm_rx_phy_info	sc_last_phy_info;
 	int			sc_ampdu_ref;
 
 	struct iwm_int_sta	sc_aux_sta;
 
 	/* phy contexts.  we only use the first one */
 	struct iwm_mvm_phy_ctxt	sc_phyctxt[IWM_NUM_PHY_CTX];
 
 	struct iwm_notif_statistics sc_stats;
 	int			sc_noise;
 
 	caddr_t			sc_drvbpf;
 
 	struct iwm_rx_radiotap_header sc_rxtap;
 	struct iwm_tx_radiotap_header sc_txtap;
 
 	int			sc_max_rssi;
 
 	struct iwm_notif_wait_data *sc_notif_wait;
 
 	int			cmd_hold_nic_awake;
 
 	/* Firmware status */
 	uint32_t		error_event_table;
 	uint32_t		log_event_table;
 	uint32_t		umac_error_event_table;
 	int			support_umac_log;
+
+	/*
+	 * Paging parameters - All of the parameters should be set by the
+	 * opmode when paging is enabled
+	 */
+	struct iwm_fw_paging	fw_paging_db[IWM_NUM_OF_FW_PAGING_BLOCKS];
+	uint16_t		num_of_paging_blk;
+	uint16_t		num_of_pages_in_last_blk;
 };
 
 #define IWM_LOCK_INIT(_sc) \
 	mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->sc_dev), \
 	    MTX_NETWORK_LOCK, MTX_DEF);
 #define	IWM_LOCK(_sc)		mtx_lock(&(_sc)->sc_mtx)
 #define	IWM_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
 #define IWM_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->sc_mtx)
Index: head/sys/modules/iwm/Makefile
===================================================================
--- head/sys/modules/iwm/Makefile	(revision 314191)
+++ head/sys/modules/iwm/Makefile	(revision 314192)
@@ -1,17 +1,17 @@
 # $FreeBSD$
 
 .PATH:  ${.CURDIR}/../../dev/iwm
 
 KMOD=	if_iwm
 # Main driver
 SRCS=	if_iwm.c if_iwm_binding.c if_iwm_util.c if_iwm_phy_db.c
 SRCS+=	if_iwm_mac_ctxt.c if_iwm_phy_ctxt.c if_iwm_time_event.c
 SRCS+=	if_iwm_power.c if_iwm_scan.c if_iwm_led.c if_iwm_notif_wait.c
-SRCS+=	if_iwm_7000.c if_iwm_8000.c
+SRCS+=	if_iwm_7000.c if_iwm_8000.c if_iwm_fw.c
 # bus layer
 SRCS+=	if_iwm_pcie_trans.c
 SRCS+=	device_if.h bus_if.h pci_if.h opt_wlan.h
 
 CFLAGS+= -DIWM_DEBUG
 
 .include <bsd.kmod.mk>