Index: head/sys/dev/ath/ath_hal/ar5210/ar5210.h =================================================================== --- head/sys/dev/ath/ath_hal/ar5210/ar5210.h (revision 313490) +++ head/sys/dev/ath/ath_hal/ar5210/ar5210.h (revision 313491) @@ -1,301 +1,303 @@ /* * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2004 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * $FreeBSD$ */ #ifndef _ATH_AR5210_H_ #define _ATH_AR5210_H_ #define AR5210_MAGIC 0x19980124 #if 0 /* * RTS_ENABLE includes LONG_PKT because they essentially * imply the same thing, and are set or not set together * for this chip */ #define AR5210_TXD_CTRL_A_HDR_LEN(_val) (((_val) ) & 0x0003f) #define AR5210_TXD_CTRL_A_TX_RATE(_val) (((_val) << 6) & 0x003c0) #define AR5210_TXD_CTRL_A_RTS_ENABLE ( 0x00c00) #define AR5210_TXD_CTRL_A_CLEAR_DEST_MASK(_val) (((_val) << 12) & 0x01000) #define AR5210_TXD_CTRL_A_ANT_MODE(_val) (((_val) << 13) & 0x02000) #define AR5210_TXD_CTRL_A_PKT_TYPE(_val) (((_val) << 14) & 0x1c000) #define AR5210_TXD_CTRL_A_INT_REQ ( 0x20000) #define AR5210_TXD_CTRL_A_KEY_VALID ( 0x40000) #define AR5210_TXD_CTRL_B_KEY_ID(_val) (((_val) ) & 0x0003f) #define AR5210_TXD_CTRL_B_RTS_DURATION(_val) (((_val) << 6) & 0x7ffc0) #endif #define INIT_CONFIG_STATUS 0x00000000 #define INIT_ACKTOPS 0x00000008 #define INIT_BCON_CNTRL_REG 0x00000000 #define INIT_SLOT_TIME 0x00000168 #define INIT_SLOT_TIME_TURBO 0x000001e0 /* More aggressive turbo slot timing = 6 us */ #define INIT_ACK_CTS_TIMEOUT 0x04000400 #define INIT_ACK_CTS_TIMEOUT_TURBO 0x08000800 #define INIT_USEC 0x27 #define INIT_USEC_TURBO 0x4f #define INIT_USEC_32 0x1f #define INIT_TX_LATENCY 0x36 #define INIT_RX_LATENCY 0x1D #define INIT_TRANSMIT_LATENCY \ ((INIT_RX_LATENCY << AR_USEC_RX_LATENCY_S) | \ (INIT_TX_LATENCY << AR_USEC_TX_LATENCY_S) | \ (INIT_USEC_32 << 7) | INIT_USEC ) #define INIT_TRANSMIT_LATENCY_TURBO \ ((INIT_RX_LATENCY << AR_USEC_RX_LATENCY_S) | \ (INIT_TX_LATENCY << AR_USEC_TX_LATENCY_S) | \ (INIT_USEC_32 << 7) | INIT_USEC_TURBO) #define INIT_SIFS 0x230 /* = 16 us - 2 us */ #define INIT_SIFS_TURBO 0x1E0 /* More aggressive turbo SIFS timing - 8 us - 2 us */ /* * Various fifo fill before Tx start, in 64-byte units * i.e. put the frame in the air while still DMAing */ #define MIN_TX_FIFO_THRESHOLD 0x1 #define MAX_TX_FIFO_THRESHOLD ((IEEE80211_MAX_LEN / 64) + 1) #define INIT_NEXT_CFP_START 0xffffffff #define INIT_BEACON_PERIOD 0xffff #define INIT_BEACON_EN 0 /* this should be set by AP only when it's ready */ #define INIT_BEACON_CONTROL \ ((INIT_RESET_TSF << 24) | (INIT_BEACON_EN << 23) | \ (INIT_TIM_OFFSET<<16) | INIT_BEACON_PERIOD) #define INIT_RSSI_THR 0x00000700 /* Missed beacon counter initialized to max value of 7 */ #define INIT_ProgIFS 0x398 /* PIFS - 2us */ #define INIT_ProgIFS_TURBO 0x3C0 #define INIT_EIFS 0xd70 #define INIT_EIFS_TURBO 0x1ae0 #define INIT_CARR_SENSE_EN 1 #define INIT_PROTO_TIME_CNTRL ( (INIT_CARR_SENSE_EN << 26) | (INIT_EIFS << 12) | \ (INIT_ProgIFS) ) #define INIT_PROTO_TIME_CNTRL_TURBO ( (INIT_CARR_SENSE_EN << 26) | (INIT_EIFS_TURBO << 12) | \ (INIT_ProgIFS_TURBO) ) #define AR5210_MAX_RATE_POWER 60 #undef HAL_NUM_TX_QUEUES /* from ah.h */ #define HAL_NUM_TX_QUEUES 3 struct ath_hal_5210 { struct ath_hal_private ah_priv; /* base definitions */ uint8_t ah_macaddr[IEEE80211_ADDR_LEN]; /* * Runtime state. */ uint32_t ah_maskReg; /* shadow of IMR+IER regs */ uint32_t ah_txOkInterruptMask; uint32_t ah_txErrInterruptMask; uint32_t ah_txDescInterruptMask; uint32_t ah_txEolInterruptMask; uint32_t ah_txUrnInterruptMask; uint8_t ah_bssid[IEEE80211_ADDR_LEN]; HAL_TX_QUEUE_INFO ah_txq[HAL_NUM_TX_QUEUES]; /* beacon+cab+data */ /* * Station mode support. */ uint32_t ah_staId1Defaults; /* STA_ID1 default settings */ uint32_t ah_rssiThr; /* RSSI_THR settings */ u_int ah_sifstime; /* user-specified sifs time */ u_int ah_slottime; /* user-specified slot time */ u_int ah_acktimeout; /* user-specified ack timeout */ u_int ah_ctstimeout; /* user-specified cts timeout */ uint16_t ah_associd; /* association id */ }; #define AH5210(ah) ((struct ath_hal_5210 *)(ah)) struct ath_hal; extern void ar5210Detach(struct ath_hal *ah); extern HAL_BOOL ar5210Reset(struct ath_hal *, HAL_OPMODE, struct ieee80211_channel *, HAL_BOOL bChannelChange, HAL_RESET_TYPE, HAL_STATUS *); extern void ar5210SetPCUConfig(struct ath_hal *); extern HAL_BOOL ar5210PhyDisable(struct ath_hal *); extern HAL_BOOL ar5210Disable(struct ath_hal *); extern HAL_BOOL ar5210ChipReset(struct ath_hal *, struct ieee80211_channel *); extern HAL_BOOL ar5210PerCalibration(struct ath_hal *, struct ieee80211_channel *, HAL_BOOL *); extern HAL_BOOL ar5210PerCalibrationN(struct ath_hal *ah, struct ieee80211_channel *chan, u_int chainMask, HAL_BOOL longCal, HAL_BOOL *isCalDone); extern HAL_BOOL ar5210ResetCalValid(struct ath_hal *ah, const struct ieee80211_channel *); extern int16_t ar5210GetNoiseFloor(struct ath_hal *); extern int16_t ar5210GetNfAdjust(struct ath_hal *, const HAL_CHANNEL_INTERNAL *); extern HAL_BOOL ar5210SetTxPowerLimit(struct ath_hal *, uint32_t limit); extern HAL_BOOL ar5210SetTransmitPower(struct ath_hal *, const struct ieee80211_channel *); extern HAL_BOOL ar5210CalNoiseFloor(struct ath_hal *, HAL_CHANNEL_INTERNAL *); extern HAL_BOOL ar5210ResetDma(struct ath_hal *, HAL_OPMODE); extern HAL_BOOL ar5210SetTxQueueProps(struct ath_hal *ah, int q, const HAL_TXQ_INFO *qInfo); extern HAL_BOOL ar5210GetTxQueueProps(struct ath_hal *ah, int q, HAL_TXQ_INFO *qInfo); extern int ar5210SetupTxQueue(struct ath_hal *ah, HAL_TX_QUEUE type, const HAL_TXQ_INFO *qInfo); extern HAL_BOOL ar5210ReleaseTxQueue(struct ath_hal *ah, u_int q); extern HAL_BOOL ar5210ResetTxQueue(struct ath_hal *ah, u_int q); extern uint32_t ar5210GetTxDP(struct ath_hal *, u_int); extern HAL_BOOL ar5210SetTxDP(struct ath_hal *, u_int, uint32_t txdp); extern HAL_BOOL ar5210UpdateTxTrigLevel(struct ath_hal *, HAL_BOOL); extern uint32_t ar5210NumTxPending(struct ath_hal *, u_int); extern HAL_BOOL ar5210StartTxDma(struct ath_hal *, u_int); extern HAL_BOOL ar5210StopTxDma(struct ath_hal *, u_int); extern HAL_BOOL ar5210SetupTxDesc(struct ath_hal *, struct ath_desc *, u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, u_int txPower, u_int txRate0, u_int txRetries0, u_int keyIx, u_int antMode, u_int flags, u_int rtsctsRate, u_int rtsctsDuration, u_int compicvLen, u_int compivLen, u_int comp); extern HAL_BOOL ar5210SetupXTxDesc(struct ath_hal *, struct ath_desc *, u_int txRate1, u_int txRetries1, u_int txRate2, u_int txRetries2, u_int txRate3, u_int txRetries3); extern HAL_BOOL ar5210FillTxDesc(struct ath_hal *, struct ath_desc *, HAL_DMA_ADDR *bufAddrList, uint32_t *segLenList, u_int descId, u_int qcuId, HAL_BOOL firstSeg, HAL_BOOL lastSeg, const struct ath_desc *ds0); extern HAL_STATUS ar5210ProcTxDesc(struct ath_hal *, struct ath_desc *, struct ath_tx_status *); extern void ar5210GetTxIntrQueue(struct ath_hal *ah, uint32_t *); extern void ar5210IntrReqTxDesc(struct ath_hal *ah, struct ath_desc *); extern HAL_BOOL ar5210GetTxCompletionRates(struct ath_hal *ah, const struct ath_desc *, int *rates, int *tries); extern void ar5210SetTxDescLink(struct ath_hal *ah, void *ds, uint32_t link); extern void ar5210GetTxDescLink(struct ath_hal *ah, void *ds, uint32_t *link); extern void ar5210GetTxDescLinkPtr(struct ath_hal *ah, void *ds, uint32_t **linkptr); extern uint32_t ar5210GetRxDP(struct ath_hal *, HAL_RX_QUEUE); extern void ar5210SetRxDP(struct ath_hal *, uint32_t rxdp, HAL_RX_QUEUE); extern void ar5210EnableReceive(struct ath_hal *); extern HAL_BOOL ar5210StopDmaReceive(struct ath_hal *); extern void ar5210StartPcuReceive(struct ath_hal *); extern void ar5210StopPcuReceive(struct ath_hal *); extern void ar5210SetMulticastFilter(struct ath_hal *, uint32_t filter0, uint32_t filter1); extern HAL_BOOL ar5210ClrMulticastFilterIndex(struct ath_hal *, uint32_t); extern HAL_BOOL ar5210SetMulticastFilterIndex(struct ath_hal *, uint32_t); extern uint32_t ar5210GetRxFilter(struct ath_hal *); extern void ar5210SetRxFilter(struct ath_hal *, uint32_t); extern HAL_BOOL ar5210SetupRxDesc(struct ath_hal *, struct ath_desc *, uint32_t, u_int flags); extern HAL_STATUS ar5210ProcRxDesc(struct ath_hal *, struct ath_desc *, uint32_t, struct ath_desc *, uint64_t, struct ath_rx_status *); extern void ar5210GetMacAddress(struct ath_hal *, uint8_t *); extern HAL_BOOL ar5210SetMacAddress(struct ath_hal *ah, const uint8_t *); extern void ar5210GetBssIdMask(struct ath_hal *, uint8_t *); extern HAL_BOOL ar5210SetBssIdMask(struct ath_hal *, const uint8_t *); extern HAL_BOOL ar5210EepromRead(struct ath_hal *, u_int off, uint16_t *data); extern HAL_BOOL ar5210EepromWrite(struct ath_hal *, u_int off, uint16_t data); extern HAL_BOOL ar5210SetRegulatoryDomain(struct ath_hal *, uint16_t, HAL_STATUS *); extern u_int ar5210GetWirelessModes(struct ath_hal *ah); extern void ar5210EnableRfKill(struct ath_hal *); extern HAL_BOOL ar5210GpioCfgInput(struct ath_hal *, uint32_t gpio); extern HAL_BOOL ar5210GpioCfgOutput(struct ath_hal *, uint32_t gpio, HAL_GPIO_MUX_TYPE); extern uint32_t ar5210GpioGet(struct ath_hal *, uint32_t gpio); extern HAL_BOOL ar5210GpioSet(struct ath_hal *, uint32_t gpio, uint32_t); extern void ar5210Gpio0SetIntr(struct ath_hal *, u_int, uint32_t ilevel); extern void ar5210SetLedState(struct ath_hal *, HAL_LED_STATE); extern u_int ar5210GetDefAntenna(struct ath_hal *); extern void ar5210SetDefAntenna(struct ath_hal *, u_int); extern HAL_ANT_SETTING ar5210GetAntennaSwitch(struct ath_hal *); extern HAL_BOOL ar5210SetAntennaSwitch(struct ath_hal *, HAL_ANT_SETTING); extern void ar5210WriteAssocid(struct ath_hal *, const uint8_t *bssid, uint16_t assocId); extern uint32_t ar5210GetTsf32(struct ath_hal *); extern uint64_t ar5210GetTsf64(struct ath_hal *); extern void ar5210ResetTsf(struct ath_hal *); extern uint32_t ar5210GetRandomSeed(struct ath_hal *); extern HAL_BOOL ar5210DetectCardPresent(struct ath_hal *); extern void ar5210UpdateMibCounters(struct ath_hal *, HAL_MIB_STATS *); extern void ar5210EnableHwEncryption(struct ath_hal *); extern void ar5210DisableHwEncryption(struct ath_hal *); extern HAL_RFGAIN ar5210GetRfgain(struct ath_hal *); extern HAL_BOOL ar5210SetSifsTime(struct ath_hal *, u_int); extern u_int ar5210GetSifsTime(struct ath_hal *); extern HAL_BOOL ar5210SetSlotTime(struct ath_hal *, u_int); extern u_int ar5210GetSlotTime(struct ath_hal *); extern HAL_BOOL ar5210SetAckTimeout(struct ath_hal *, u_int); extern u_int ar5210GetAckTimeout(struct ath_hal *); extern HAL_BOOL ar5210SetAckCTSRate(struct ath_hal *, u_int); extern u_int ar5210GetAckCTSRate(struct ath_hal *); extern HAL_BOOL ar5210SetCTSTimeout(struct ath_hal *, u_int); extern u_int ar5210GetCTSTimeout(struct ath_hal *); extern HAL_BOOL ar5210SetDecompMask(struct ath_hal *, uint16_t, int); void ar5210SetCoverageClass(struct ath_hal *, uint8_t, int); +extern HAL_STATUS ar5210SetQuiet(struct ath_hal *, uint32_t, uint32_t, + uint32_t, HAL_QUIET_FLAG); extern HAL_STATUS ar5210GetCapability(struct ath_hal *, HAL_CAPABILITY_TYPE, uint32_t, uint32_t *); extern HAL_BOOL ar5210SetCapability(struct ath_hal *, HAL_CAPABILITY_TYPE, uint32_t, uint32_t, HAL_STATUS *); extern HAL_BOOL ar5210GetDiagState(struct ath_hal *ah, int request, const void *args, uint32_t argsize, void **result, uint32_t *resultsize); extern uint32_t ar5210Get11nExtBusy(struct ath_hal *); extern HAL_BOOL ar5210GetMibCycleCounts(struct ath_hal *, HAL_SURVEY_SAMPLE *); extern void ar5210SetChainMasks(struct ath_hal *, uint32_t, uint32_t); extern void ar5210EnableDfs(struct ath_hal *, HAL_PHYERR_PARAM *); extern void ar5210GetDfsThresh(struct ath_hal *, HAL_PHYERR_PARAM *); extern void ar5210UpdateDiagReg(struct ath_hal *ah, uint32_t val); extern u_int ar5210GetKeyCacheSize(struct ath_hal *); extern HAL_BOOL ar5210IsKeyCacheEntryValid(struct ath_hal *, uint16_t); extern HAL_BOOL ar5210ResetKeyCacheEntry(struct ath_hal *, uint16_t entry); extern HAL_BOOL ar5210SetKeyCacheEntry(struct ath_hal *, uint16_t entry, const HAL_KEYVAL *, const uint8_t *mac, int xorKey); extern HAL_BOOL ar5210SetKeyCacheEntryMac(struct ath_hal *, uint16_t, const uint8_t *); extern HAL_BOOL ar5210SetPowerMode(struct ath_hal *, uint32_t powerRequest, int setChip); extern HAL_POWER_MODE ar5210GetPowerMode(struct ath_hal *); extern void ar5210SetBeaconTimers(struct ath_hal *, const HAL_BEACON_TIMERS *); extern void ar5210BeaconInit(struct ath_hal *, uint32_t, uint32_t); extern void ar5210SetStaBeaconTimers(struct ath_hal *, const HAL_BEACON_STATE *); extern void ar5210ResetStaBeaconTimers(struct ath_hal *); extern uint64_t ar5210GetNextTBTT(struct ath_hal *); extern HAL_BOOL ar5210IsInterruptPending(struct ath_hal *); extern HAL_BOOL ar5210GetPendingInterrupts(struct ath_hal *, HAL_INT *); extern HAL_INT ar5210GetInterrupts(struct ath_hal *); extern HAL_INT ar5210SetInterrupts(struct ath_hal *, HAL_INT ints); extern const HAL_RATE_TABLE *ar5210GetRateTable(struct ath_hal *, u_int mode); extern HAL_BOOL ar5210AniControl(struct ath_hal *, HAL_ANI_CMD, int ); extern void ar5210AniPoll(struct ath_hal *, const struct ieee80211_channel *); extern void ar5210RxMonitor(struct ath_hal *, const HAL_NODE_STATS *, const struct ieee80211_channel *); extern void ar5210MibEvent(struct ath_hal *, const HAL_NODE_STATS *); #endif /* _ATH_AR5210_H_ */ Index: head/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c =================================================================== --- head/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c (revision 313490) +++ head/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c (revision 313491) @@ -1,416 +1,417 @@ /* * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2004 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * $FreeBSD$ */ #include "opt_ah.h" #include "ah.h" #include "ah_internal.h" #include "ah_devid.h" #include "ar5210/ar5210.h" #include "ar5210/ar5210reg.h" #include "ar5210/ar5210phy.h" #include "ah_eeprom_v1.h" static HAL_BOOL ar5210GetChannelEdges(struct ath_hal *, uint16_t flags, uint16_t *low, uint16_t *high); static HAL_BOOL ar5210GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan); static void ar5210ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_on); static void ar5210DisablePCIE(struct ath_hal *ah); static const struct ath_hal_private ar5210hal = {{ .ah_magic = AR5210_MAGIC, .ah_getRateTable = ar5210GetRateTable, .ah_detach = ar5210Detach, /* Reset Functions */ .ah_reset = ar5210Reset, .ah_phyDisable = ar5210PhyDisable, .ah_disable = ar5210Disable, .ah_configPCIE = ar5210ConfigPCIE, .ah_disablePCIE = ar5210DisablePCIE, .ah_setPCUConfig = ar5210SetPCUConfig, .ah_perCalibration = ar5210PerCalibration, .ah_perCalibrationN = ar5210PerCalibrationN, .ah_resetCalValid = ar5210ResetCalValid, .ah_setTxPowerLimit = ar5210SetTxPowerLimit, .ah_getChanNoise = ath_hal_getChanNoise, /* Transmit functions */ .ah_updateTxTrigLevel = ar5210UpdateTxTrigLevel, .ah_setupTxQueue = ar5210SetupTxQueue, .ah_setTxQueueProps = ar5210SetTxQueueProps, .ah_getTxQueueProps = ar5210GetTxQueueProps, .ah_releaseTxQueue = ar5210ReleaseTxQueue, .ah_resetTxQueue = ar5210ResetTxQueue, .ah_getTxDP = ar5210GetTxDP, .ah_setTxDP = ar5210SetTxDP, .ah_numTxPending = ar5210NumTxPending, .ah_startTxDma = ar5210StartTxDma, .ah_stopTxDma = ar5210StopTxDma, .ah_setupTxDesc = ar5210SetupTxDesc, .ah_setupXTxDesc = ar5210SetupXTxDesc, .ah_fillTxDesc = ar5210FillTxDesc, .ah_procTxDesc = ar5210ProcTxDesc, .ah_getTxIntrQueue = ar5210GetTxIntrQueue, .ah_reqTxIntrDesc = ar5210IntrReqTxDesc, .ah_getTxCompletionRates = ar5210GetTxCompletionRates, .ah_setTxDescLink = ar5210SetTxDescLink, .ah_getTxDescLink = ar5210GetTxDescLink, .ah_getTxDescLinkPtr = ar5210GetTxDescLinkPtr, /* RX Functions */ .ah_getRxDP = ar5210GetRxDP, .ah_setRxDP = ar5210SetRxDP, .ah_enableReceive = ar5210EnableReceive, .ah_stopDmaReceive = ar5210StopDmaReceive, .ah_startPcuReceive = ar5210StartPcuReceive, .ah_stopPcuReceive = ar5210StopPcuReceive, .ah_setMulticastFilter = ar5210SetMulticastFilter, .ah_setMulticastFilterIndex = ar5210SetMulticastFilterIndex, .ah_clrMulticastFilterIndex = ar5210ClrMulticastFilterIndex, .ah_getRxFilter = ar5210GetRxFilter, .ah_setRxFilter = ar5210SetRxFilter, .ah_setupRxDesc = ar5210SetupRxDesc, .ah_procRxDesc = ar5210ProcRxDesc, .ah_rxMonitor = ar5210RxMonitor, .ah_aniPoll = ar5210AniPoll, .ah_procMibEvent = ar5210MibEvent, /* Misc Functions */ .ah_getCapability = ar5210GetCapability, .ah_setCapability = ar5210SetCapability, .ah_getDiagState = ar5210GetDiagState, .ah_getMacAddress = ar5210GetMacAddress, .ah_setMacAddress = ar5210SetMacAddress, .ah_getBssIdMask = ar5210GetBssIdMask, .ah_setBssIdMask = ar5210SetBssIdMask, .ah_setRegulatoryDomain = ar5210SetRegulatoryDomain, .ah_setLedState = ar5210SetLedState, .ah_writeAssocid = ar5210WriteAssocid, .ah_gpioCfgInput = ar5210GpioCfgInput, .ah_gpioCfgOutput = ar5210GpioCfgOutput, .ah_gpioGet = ar5210GpioGet, .ah_gpioSet = ar5210GpioSet, .ah_gpioSetIntr = ar5210Gpio0SetIntr, .ah_getTsf32 = ar5210GetTsf32, .ah_getTsf64 = ar5210GetTsf64, .ah_resetTsf = ar5210ResetTsf, .ah_detectCardPresent = ar5210DetectCardPresent, .ah_updateMibCounters = ar5210UpdateMibCounters, .ah_getRfGain = ar5210GetRfgain, .ah_getDefAntenna = ar5210GetDefAntenna, .ah_setDefAntenna = ar5210SetDefAntenna, .ah_getAntennaSwitch = ar5210GetAntennaSwitch, .ah_setAntennaSwitch = ar5210SetAntennaSwitch, .ah_setSifsTime = ar5210SetSifsTime, .ah_getSifsTime = ar5210GetSifsTime, .ah_setSlotTime = ar5210SetSlotTime, .ah_getSlotTime = ar5210GetSlotTime, .ah_setAckTimeout = ar5210SetAckTimeout, .ah_getAckTimeout = ar5210GetAckTimeout, .ah_setAckCTSRate = ar5210SetAckCTSRate, .ah_getAckCTSRate = ar5210GetAckCTSRate, .ah_setCTSTimeout = ar5210SetCTSTimeout, .ah_getCTSTimeout = ar5210GetCTSTimeout, .ah_setDecompMask = ar5210SetDecompMask, .ah_setCoverageClass = ar5210SetCoverageClass, + .ah_setQuiet = ar5210SetQuiet, .ah_get11nExtBusy = ar5210Get11nExtBusy, .ah_getMibCycleCounts = ar5210GetMibCycleCounts, .ah_setChainMasks = ar5210SetChainMasks, .ah_enableDfs = ar5210EnableDfs, .ah_getDfsThresh = ar5210GetDfsThresh, /* XXX procRadarEvent */ /* XXX isFastClockEnabled */ /* Key Cache Functions */ .ah_getKeyCacheSize = ar5210GetKeyCacheSize, .ah_resetKeyCacheEntry = ar5210ResetKeyCacheEntry, .ah_isKeyCacheEntryValid = ar5210IsKeyCacheEntryValid, .ah_setKeyCacheEntry = ar5210SetKeyCacheEntry, .ah_setKeyCacheEntryMac = ar5210SetKeyCacheEntryMac, /* Power Management Functions */ .ah_setPowerMode = ar5210SetPowerMode, .ah_getPowerMode = ar5210GetPowerMode, /* Beacon Functions */ .ah_setBeaconTimers = ar5210SetBeaconTimers, .ah_beaconInit = ar5210BeaconInit, .ah_setStationBeaconTimers = ar5210SetStaBeaconTimers, .ah_resetStationBeaconTimers = ar5210ResetStaBeaconTimers, .ah_getNextTBTT = ar5210GetNextTBTT, /* Interrupt Functions */ .ah_isInterruptPending = ar5210IsInterruptPending, .ah_getPendingInterrupts = ar5210GetPendingInterrupts, .ah_getInterrupts = ar5210GetInterrupts, .ah_setInterrupts = ar5210SetInterrupts }, .ah_getChannelEdges = ar5210GetChannelEdges, .ah_getWirelessModes = ar5210GetWirelessModes, .ah_eepromRead = ar5210EepromRead, #ifdef AH_SUPPORT_WRITE_EEPROM .ah_eepromWrite = ar5210EepromWrite, #endif .ah_getChipPowerLimits = ar5210GetChipPowerLimits, }; static HAL_BOOL ar5210FillCapabilityInfo(struct ath_hal *ah); /* * Attach for an AR5210 part. */ static struct ath_hal * ar5210Attach(uint16_t devid, HAL_SOFTC sc, HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata, HAL_OPS_CONFIG *ah_config, HAL_STATUS *status) { #define N(a) (sizeof(a)/sizeof(a[0])) struct ath_hal_5210 *ahp; struct ath_hal *ah; uint32_t revid, pcicfg; uint16_t eeval; HAL_STATUS ecode; int i; HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: devid 0x%x sc %p st %p sh %p\n", __func__, devid, sc, (void*) st, (void*) sh); /* NB: memory is returned zero'd */ ahp = ath_hal_malloc(sizeof (struct ath_hal_5210)); if (ahp == AH_NULL) { HALDEBUG(AH_NULL, HAL_DEBUG_ANY, "%s: no memory for state block\n", __func__); ecode = HAL_ENOMEM; goto bad; } ah = &ahp->ah_priv.h; /* set initial values */ OS_MEMCPY(&ahp->ah_priv, &ar5210hal, sizeof(struct ath_hal_private)); ah->ah_sc = sc; ah->ah_st = st; ah->ah_sh = sh; ah->ah_devid = devid; /* NB: for AH_DEBUG_ALQ */ AH_PRIVATE(ah)->ah_devid = devid; AH_PRIVATE(ah)->ah_subvendorid = 0; /* XXX */ AH_PRIVATE(ah)->ah_powerLimit = AR5210_MAX_RATE_POWER; AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX; /* no scaling */ ah->ah_powerMode = HAL_PM_UNDEFINED; ahp->ah_staId1Defaults = 0; ahp->ah_rssiThr = INIT_RSSI_THR; ahp->ah_sifstime = (u_int) -1; ahp->ah_slottime = (u_int) -1; ahp->ah_acktimeout = (u_int) -1; ahp->ah_ctstimeout = (u_int) -1; if (!ar5210ChipReset(ah, AH_NULL)) { /* reset chip */ HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__); ecode = HAL_EIO; goto bad; } /* Read Revisions from Chips */ AH_PRIVATE(ah)->ah_macVersion = 1; AH_PRIVATE(ah)->ah_macRev = OS_REG_READ(ah, AR_SREV) & 0xff; AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIPID); AH_PRIVATE(ah)->ah_analog2GhzRev = 0; /* Read Radio Chip Rev Extract */ OS_REG_WRITE(ah, (AR_PHY_BASE + (0x34 << 2)), 0x00001c16); for (i = 0; i < 4; i++) OS_REG_WRITE(ah, (AR_PHY_BASE + (0x20 << 2)), 0x00010000); revid = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 28) & 0xf; /* Chip labelling is 1 greater than revision register for AR5110 */ AH_PRIVATE(ah)->ah_analog5GhzRev = ath_hal_reverseBits(revid, 4) + 1; /* * Read all the settings from the EEPROM and stash * ones we'll use later. */ pcicfg = OS_REG_READ(ah, AR_PCICFG); OS_REG_WRITE(ah, AR_PCICFG, pcicfg | AR_PCICFG_EEPROMSEL); ecode = ath_hal_v1EepromAttach(ah); if (ecode != HAL_OK) { goto eebad; } ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval); if (ecode != HAL_OK) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: cannot read regulatory domain from EEPROM\n", __func__); goto eebad; } AH_PRIVATE(ah)->ah_currentRD = eeval; ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr); if (ecode != HAL_OK) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: error getting mac address from EEPROM\n", __func__); goto eebad; } OS_REG_WRITE(ah, AR_PCICFG, pcicfg); /* disable EEPROM access */ AH_PRIVATE(ah)->ah_getNfAdjust = ar5210GetNfAdjust; /* * Got everything we need now to setup the capabilities. */ (void) ar5210FillCapabilityInfo(ah); HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__); return ah; eebad: OS_REG_WRITE(ah, AR_PCICFG, pcicfg); /* disable EEPROM access */ bad: if (ahp) ath_hal_free(ahp); if (status) *status = ecode; return AH_NULL; #undef N } void ar5210Detach(struct ath_hal *ah) { HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__); HALASSERT(ah != AH_NULL); HALASSERT(ah->ah_magic == AR5210_MAGIC); ath_hal_eepromDetach(ah); ath_hal_free(ah); } /* * Store the channel edges for the requested operational mode */ static HAL_BOOL ar5210GetChannelEdges(struct ath_hal *ah, uint16_t flags, uint16_t *low, uint16_t *high) { if (flags & IEEE80211_CHAN_5GHZ) { *low = 5120; *high = 5430; return AH_TRUE; } else { return AH_FALSE; } } static HAL_BOOL ar5210GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan) { /* XXX fill in, this is just a placeholder */ HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: no min/max power for %u/0x%x\n", __func__, chan->ic_freq, chan->ic_flags); chan->ic_maxpower = AR5210_MAX_RATE_POWER; chan->ic_minpower = 0; return AH_TRUE; } static void ar5210ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off) { } static void ar5210DisablePCIE(struct ath_hal *ah) { } /* * Fill all software cached or static hardware state information. */ static HAL_BOOL ar5210FillCapabilityInfo(struct ath_hal *ah) { struct ath_hal_private *ahpriv = AH_PRIVATE(ah); HAL_CAPABILITIES *pCap = &ahpriv->ah_caps; pCap->halWirelessModes |= HAL_MODE_11A; pCap->halLow5GhzChan = 5120; pCap->halHigh5GhzChan = 5430; pCap->halSleepAfterBeaconBroken = AH_TRUE; pCap->halPSPollBroken = AH_FALSE; pCap->halNumMRRetries = 1; /* No hardware MRR support */ pCap->halNumTxMaps = 1; /* Single TX ptr per descr */ pCap->halTotalQueues = HAL_NUM_TX_QUEUES; pCap->halKeyCacheSize = 64; /* XXX not needed */ pCap->halChanHalfRate = AH_FALSE; pCap->halChanQuarterRate = AH_FALSE; /* * RSSI uses the combined field; some 11n NICs may use * the control chain RSSI. */ pCap->halUseCombinedRadarRssi = AH_TRUE; if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL)) { /* * Setup initial rfsilent settings based on the EEPROM * contents. Pin 0, polarity 0 is fixed; record this * using the EEPROM format found in later parts. */ ahpriv->ah_rfsilent = SM(0, AR_EEPROM_RFSILENT_GPIO_SEL) | SM(0, AR_EEPROM_RFSILENT_POLARITY); ahpriv->ah_rfkillEnabled = AH_TRUE; pCap->halRfSilentSupport = AH_TRUE; } pCap->halTxTstampPrecision = 16; pCap->halRxTstampPrecision = 15; /* NB: s/w extended from 13 */ pCap->halIntrMask = (HAL_INT_COMMON - HAL_INT_BNR) | HAL_INT_RX | HAL_INT_TX | HAL_INT_FATAL ; pCap->hal4kbSplitTransSupport = AH_TRUE; pCap->halHasRxSelfLinkedTail = AH_TRUE; ahpriv->ah_rxornIsFatal = AH_TRUE; return AH_TRUE; } static const char* ar5210Probe(uint16_t vendorid, uint16_t devid) { if (vendorid == ATHEROS_VENDOR_ID && (devid == AR5210_PROD || devid == AR5210_DEFAULT)) return "Atheros 5210"; return AH_NULL; } AH_CHIP(AR5210, ar5210Probe, ar5210Attach); Index: head/sys/dev/ath/ath_hal/ar5210/ar5210_misc.c =================================================================== --- head/sys/dev/ath/ath_hal/ar5210/ar5210_misc.c (revision 313490) +++ head/sys/dev/ath/ath_hal/ar5210/ar5210_misc.c (revision 313491) @@ -1,703 +1,710 @@ /* * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2004 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * $FreeBSD$ */ #include "opt_ah.h" #include "ah.h" #include "ah_internal.h" #include "ar5210/ar5210.h" #include "ar5210/ar5210reg.h" #include "ar5210/ar5210phy.h" #include "ah_eeprom_v1.h" #define AR_NUM_GPIO 6 /* 6 GPIO bits */ #define AR_GPIOD_MASK 0x2f /* 6-bit mask */ void ar5210GetMacAddress(struct ath_hal *ah, uint8_t *mac) { struct ath_hal_5210 *ahp = AH5210(ah); OS_MEMCPY(mac, ahp->ah_macaddr, IEEE80211_ADDR_LEN); } HAL_BOOL ar5210SetMacAddress(struct ath_hal *ah, const uint8_t *mac) { struct ath_hal_5210 *ahp = AH5210(ah); OS_MEMCPY(ahp->ah_macaddr, mac, IEEE80211_ADDR_LEN); return AH_TRUE; } void ar5210GetBssIdMask(struct ath_hal *ah, uint8_t *mask) { static const uint8_t ones[IEEE80211_ADDR_LEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; OS_MEMCPY(mask, ones, IEEE80211_ADDR_LEN); } HAL_BOOL ar5210SetBssIdMask(struct ath_hal *ah, const uint8_t *mask) { return AH_FALSE; } /* * Read 16 bits of data from the specified EEPROM offset. */ HAL_BOOL ar5210EepromRead(struct ath_hal *ah, u_int off, uint16_t *data) { (void) OS_REG_READ(ah, AR_EP_AIR(off)); /* activate read op */ if (!ath_hal_wait(ah, AR_EP_STA, AR_EP_STA_RDCMPLT | AR_EP_STA_RDERR, AR_EP_STA_RDCMPLT)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: read failed for entry 0x%x\n", __func__, AR_EP_AIR(off)); return AH_FALSE; } *data = OS_REG_READ(ah, AR_EP_RDATA) & 0xffff; return AH_TRUE; } #ifdef AH_SUPPORT_WRITE_EEPROM /* * Write 16 bits of data to the specified EEPROM offset. */ HAL_BOOL ar5210EepromWrite(struct ath_hal *ah, u_int off, uint16_t data) { return AH_FALSE; } #endif /* AH_SUPPORT_WRITE_EEPROM */ /* * Attempt to change the cards operating regulatory domain to the given value */ HAL_BOOL ar5210SetRegulatoryDomain(struct ath_hal *ah, uint16_t regDomain, HAL_STATUS *status) { HAL_STATUS ecode; if (AH_PRIVATE(ah)->ah_currentRD == regDomain) { ecode = HAL_EINVAL; goto bad; } /* * Check if EEPROM is configured to allow this; must * be a proper version and the protection bits must * permit re-writing that segment of the EEPROM. */ if (ath_hal_eepromGetFlag(ah, AR_EEP_WRITEPROTECT)) { ecode = HAL_EEWRITE; goto bad; } ecode = HAL_EIO; /* disallow all writes */ bad: if (status) *status = ecode; return AH_FALSE; } /* * Return the wireless modes (a,b,g,t) supported by hardware. * * This value is what is actually supported by the hardware * and is unaffected by regulatory/country code settings. * */ u_int ar5210GetWirelessModes(struct ath_hal *ah) { /* XXX could enable turbo mode but can't do all rates */ return HAL_MODE_11A; } /* * Called if RfKill is supported (according to EEPROM). Set the interrupt and * GPIO values so the ISR and can disable RF on a switch signal */ void ar5210EnableRfKill(struct ath_hal *ah) { uint16_t rfsilent = AH_PRIVATE(ah)->ah_rfsilent; int select = MS(rfsilent, AR_EEPROM_RFSILENT_GPIO_SEL); int polarity = MS(rfsilent, AR_EEPROM_RFSILENT_POLARITY); /* * If radio disable switch connection to GPIO bit 0 is enabled * program GPIO interrupt. * If rfkill bit on eeprom is 1, setupeeprommap routine has already * verified that it is a later version of eeprom, it has a place for * rfkill bit and it is set to 1, indicating that GPIO bit 0 hardware * connection is present. */ ar5210Gpio0SetIntr(ah, select, (ar5210GpioGet(ah, select) == polarity)); } /* * Configure GPIO Output lines */ HAL_BOOL ar5210GpioCfgOutput(struct ath_hal *ah, uint32_t gpio, HAL_GPIO_MUX_TYPE type) { HALASSERT(gpio < AR_NUM_GPIO); OS_REG_WRITE(ah, AR_GPIOCR, (OS_REG_READ(ah, AR_GPIOCR) &~ AR_GPIOCR_ALL(gpio)) | AR_GPIOCR_OUT1(gpio)); return AH_TRUE; } /* * Configure GPIO Input lines */ HAL_BOOL ar5210GpioCfgInput(struct ath_hal *ah, uint32_t gpio) { HALASSERT(gpio < AR_NUM_GPIO); OS_REG_WRITE(ah, AR_GPIOCR, (OS_REG_READ(ah, AR_GPIOCR) &~ AR_GPIOCR_ALL(gpio)) | AR_GPIOCR_IN(gpio)); return AH_TRUE; } /* * Once configured for I/O - set output lines */ HAL_BOOL ar5210GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val) { uint32_t reg; HALASSERT(gpio < AR_NUM_GPIO); reg = OS_REG_READ(ah, AR_GPIODO); reg &= ~(1 << gpio); reg |= (val&1) << gpio; OS_REG_WRITE(ah, AR_GPIODO, reg); return AH_TRUE; } /* * Once configured for I/O - get input lines */ uint32_t ar5210GpioGet(struct ath_hal *ah, uint32_t gpio) { if (gpio < AR_NUM_GPIO) { uint32_t val = OS_REG_READ(ah, AR_GPIODI); val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1; return val; } else { return 0xffffffff; } } /* * Set the GPIO 0 Interrupt */ void ar5210Gpio0SetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel) { uint32_t val = OS_REG_READ(ah, AR_GPIOCR); /* Clear the bits that we will modify. */ val &= ~(AR_GPIOCR_INT_SEL(gpio) | AR_GPIOCR_INT_SELH | AR_GPIOCR_INT_ENA | AR_GPIOCR_ALL(gpio)); val |= AR_GPIOCR_INT_SEL(gpio) | AR_GPIOCR_INT_ENA; if (ilevel) val |= AR_GPIOCR_INT_SELH; /* Don't need to change anything for low level interrupt. */ OS_REG_WRITE(ah, AR_GPIOCR, val); /* Change the interrupt mask. */ ar5210SetInterrupts(ah, AH5210(ah)->ah_maskReg | HAL_INT_GPIO); } /* * Change the LED blinking pattern to correspond to the connectivity */ void ar5210SetLedState(struct ath_hal *ah, HAL_LED_STATE state) { uint32_t val; val = OS_REG_READ(ah, AR_PCICFG); switch (state) { case HAL_LED_INIT: val &= ~(AR_PCICFG_LED_PEND | AR_PCICFG_LED_ACT); break; case HAL_LED_RUN: /* normal blink when connected */ val &= ~AR_PCICFG_LED_PEND; val |= AR_PCICFG_LED_ACT; break; default: val |= AR_PCICFG_LED_PEND; val &= ~AR_PCICFG_LED_ACT; break; } OS_REG_WRITE(ah, AR_PCICFG, val); } /* * Return 1 or 2 for the corresponding antenna that is in use */ u_int ar5210GetDefAntenna(struct ath_hal *ah) { uint32_t val = OS_REG_READ(ah, AR_STA_ID1); return (val & AR_STA_ID1_DEFAULT_ANTENNA ? 2 : 1); } void ar5210SetDefAntenna(struct ath_hal *ah, u_int antenna) { uint32_t val = OS_REG_READ(ah, AR_STA_ID1); if (antenna != (val & AR_STA_ID1_DEFAULT_ANTENNA ? 2 : 1)) { /* * Antenna change requested, force a toggle of the default. */ OS_REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_DEFAULT_ANTENNA); } } HAL_ANT_SETTING ar5210GetAntennaSwitch(struct ath_hal *ah) { return HAL_ANT_VARIABLE; } HAL_BOOL ar5210SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings) { /* XXX not sure how to fix antenna */ return (settings == HAL_ANT_VARIABLE); } /* * Change association related fields programmed into the hardware. * Writing a valid BSSID to the hardware effectively enables the hardware * to synchronize its TSF to the correct beacons and receive frames coming * from that BSSID. It is called by the SME JOIN operation. */ void ar5210WriteAssocid(struct ath_hal *ah, const uint8_t *bssid, uint16_t assocId) { struct ath_hal_5210 *ahp = AH5210(ah); /* XXX save bssid for possible re-use on reset */ OS_MEMCPY(ahp->ah_bssid, bssid, IEEE80211_ADDR_LEN); ahp->ah_associd = assocId; OS_REG_WRITE(ah, AR_BSS_ID0, LE_READ_4(ahp->ah_bssid)); OS_REG_WRITE(ah, AR_BSS_ID1, LE_READ_2(ahp->ah_bssid+4) | ((assocId & 0x3fff)<> 19) & 0x1ff; if (nf & 0x100) nf = 0 - ((nf ^ 0x1ff) + 1); return (OS_REG_READ(ah, AR_TSF_U32) ^ OS_REG_READ(ah, AR_TSF_L32) ^ nf); } /* * Detect if our card is present */ HAL_BOOL ar5210DetectCardPresent(struct ath_hal *ah) { /* * Read the Silicon Revision register and compare that * to what we read at attach time. If the same, we say * a card/device is present. */ return (AH_PRIVATE(ah)->ah_macRev == (OS_REG_READ(ah, AR_SREV) & 0xff)); } /* * Update MIB Counters */ void ar5210UpdateMibCounters(struct ath_hal *ah, HAL_MIB_STATS *stats) { stats->ackrcv_bad += OS_REG_READ(ah, AR_ACK_FAIL); stats->rts_bad += OS_REG_READ(ah, AR_RTS_FAIL); stats->fcs_bad += OS_REG_READ(ah, AR_FCS_FAIL); stats->rts_good += OS_REG_READ(ah, AR_RTS_OK); stats->beacons += OS_REG_READ(ah, AR_BEACON_CNT); } HAL_BOOL ar5210SetSifsTime(struct ath_hal *ah, u_int us) { struct ath_hal_5210 *ahp = AH5210(ah); if (us > ath_hal_mac_usec(ah, 0x7ff)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: bad SIFS time %u\n", __func__, us); ahp->ah_sifstime = (u_int) -1; /* restore default handling */ return AH_FALSE; } else { /* convert to system clocks */ OS_REG_RMW_FIELD(ah, AR_IFS0, AR_IFS0_SIFS, ath_hal_mac_clks(ah, us)); ahp->ah_sifstime = us; return AH_TRUE; } } u_int ar5210GetSifsTime(struct ath_hal *ah) { u_int clks = OS_REG_READ(ah, AR_IFS0) & 0x7ff; return ath_hal_mac_usec(ah, clks); /* convert from system clocks */ } HAL_BOOL ar5210SetSlotTime(struct ath_hal *ah, u_int us) { struct ath_hal_5210 *ahp = AH5210(ah); if (us < HAL_SLOT_TIME_9 || us > ath_hal_mac_usec(ah, 0xffff)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: bad slot time %u\n", __func__, us); ahp->ah_slottime = (u_int) -1; /* restore default handling */ return AH_FALSE; } else { /* convert to system clocks */ OS_REG_WRITE(ah, AR_SLOT_TIME, ath_hal_mac_clks(ah, us)); ahp->ah_slottime = us; return AH_TRUE; } } u_int ar5210GetSlotTime(struct ath_hal *ah) { u_int clks = OS_REG_READ(ah, AR_SLOT_TIME) & 0xffff; return ath_hal_mac_usec(ah, clks); /* convert from system clocks */ } HAL_BOOL ar5210SetAckTimeout(struct ath_hal *ah, u_int us) { struct ath_hal_5210 *ahp = AH5210(ah); if (us > ath_hal_mac_usec(ah, MS(0xffffffff, AR_TIME_OUT_ACK))) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: bad ack timeout %u\n", __func__, us); ahp->ah_acktimeout = (u_int) -1; /* restore default handling */ return AH_FALSE; } else { /* convert to system clocks */ OS_REG_RMW_FIELD(ah, AR_TIME_OUT, AR_TIME_OUT_ACK, ath_hal_mac_clks(ah, us)); ahp->ah_acktimeout = us; return AH_TRUE; } } u_int ar5210GetAckTimeout(struct ath_hal *ah) { u_int clks = MS(OS_REG_READ(ah, AR_TIME_OUT), AR_TIME_OUT_ACK); return ath_hal_mac_usec(ah, clks); /* convert from system clocks */ } u_int ar5210GetAckCTSRate(struct ath_hal *ah) { return ((AH5210(ah)->ah_staId1Defaults & AR_STA_ID1_ACKCTS_6MB) == 0); } HAL_BOOL ar5210SetAckCTSRate(struct ath_hal *ah, u_int high) { struct ath_hal_5210 *ahp = AH5210(ah); if (high) { OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_ACKCTS_6MB); ahp->ah_staId1Defaults &= ~AR_STA_ID1_ACKCTS_6MB; } else { OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_ACKCTS_6MB); ahp->ah_staId1Defaults |= AR_STA_ID1_ACKCTS_6MB; } return AH_TRUE; } HAL_BOOL ar5210SetCTSTimeout(struct ath_hal *ah, u_int us) { struct ath_hal_5210 *ahp = AH5210(ah); if (us > ath_hal_mac_usec(ah, MS(0xffffffff, AR_TIME_OUT_CTS))) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: bad cts timeout %u\n", __func__, us); ahp->ah_ctstimeout = (u_int) -1; /* restore default handling */ return AH_FALSE; } else { /* convert to system clocks */ OS_REG_RMW_FIELD(ah, AR_TIME_OUT, AR_TIME_OUT_CTS, ath_hal_mac_clks(ah, us)); ahp->ah_ctstimeout = us; return AH_TRUE; } } u_int ar5210GetCTSTimeout(struct ath_hal *ah) { u_int clks = MS(OS_REG_READ(ah, AR_TIME_OUT), AR_TIME_OUT_CTS); return ath_hal_mac_usec(ah, clks); /* convert from system clocks */ } HAL_BOOL ar5210SetDecompMask(struct ath_hal *ah, uint16_t keyidx, int en) { /* nothing to do */ return AH_TRUE; } void ar5210SetCoverageClass(struct ath_hal *ah, uint8_t coverageclass, int now) { } +HAL_STATUS +ar5210SetQuiet(struct ath_hal *ah, uint32_t period, uint32_t duration, + uint32_t next_start, HAL_QUIET_FLAG flags) +{ + return HAL_OK; +} + /* * Control Adaptive Noise Immunity Parameters */ HAL_BOOL ar5210AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param) { return AH_FALSE; } void ar5210RxMonitor(struct ath_hal *ah, const HAL_NODE_STATS *stats, const struct ieee80211_channel *chan) { } void ar5210AniPoll(struct ath_hal *ah, const struct ieee80211_channel *chan) { } void ar5210MibEvent(struct ath_hal *ah, const HAL_NODE_STATS *stats) { } HAL_STATUS ar5210GetCapability(struct ath_hal *ah, HAL_CAPABILITY_TYPE type, uint32_t capability, uint32_t *result) { switch (type) { case HAL_CAP_CIPHER: /* cipher handled in hardware */ #if 0 return (capability == HAL_CIPHER_WEP ? HAL_OK : HAL_ENOTSUPP); #else return HAL_ENOTSUPP; #endif default: return ath_hal_getcapability(ah, type, capability, result); } } HAL_BOOL ar5210SetCapability(struct ath_hal *ah, HAL_CAPABILITY_TYPE type, uint32_t capability, uint32_t setting, HAL_STATUS *status) { switch (type) { case HAL_CAP_DIAG: /* hardware diagnostic support */ /* * NB: could split this up into virtual capabilities, * (e.g. 1 => ACK, 2 => CTS, etc.) but it hardly * seems worth the additional complexity. */ #ifdef AH_DEBUG AH_PRIVATE(ah)->ah_diagreg = setting; #else AH_PRIVATE(ah)->ah_diagreg = setting & 0x6; /* ACK+CTS */ #endif ar5210UpdateDiagReg(ah, AH_PRIVATE(ah)->ah_diagreg); return AH_TRUE; case HAL_CAP_RXORN_FATAL: /* HAL_INT_RXORN treated as fatal */ return AH_FALSE; /* NB: disallow */ default: return ath_hal_setcapability(ah, type, capability, setting, status); } } HAL_BOOL ar5210GetDiagState(struct ath_hal *ah, int request, const void *args, uint32_t argsize, void **result, uint32_t *resultsize) { #ifdef AH_PRIVATE_DIAG uint32_t pcicfg; HAL_BOOL ok; switch (request) { case HAL_DIAG_EEPROM: /* XXX */ break; case HAL_DIAG_EEREAD: if (argsize != sizeof(uint16_t)) return AH_FALSE; pcicfg = OS_REG_READ(ah, AR_PCICFG); OS_REG_WRITE(ah, AR_PCICFG, pcicfg | AR_PCICFG_EEPROMSEL); ok = ath_hal_eepromRead(ah, *(const uint16_t *)args, *result); OS_REG_WRITE(ah, AR_PCICFG, pcicfg); if (ok) *resultsize = sizeof(uint16_t); return ok; } #endif return ath_hal_getdiagstate(ah, request, args, argsize, result, resultsize); } /* * Return what percentage of the extension channel is busy. * This is always disabled for AR5210 series NICs. */ uint32_t ar5210Get11nExtBusy(struct ath_hal *ah) { return (0); } /* * There's no channel survey support for the AR5210. */ HAL_BOOL ar5210GetMibCycleCounts(struct ath_hal *ah, HAL_SURVEY_SAMPLE *hsample) { return (AH_FALSE); } void ar5210SetChainMasks(struct ath_hal *ah, uint32_t txchainmask, uint32_t rxchainmask) { } void ar5210EnableDfs(struct ath_hal *ah, HAL_PHYERR_PARAM *pe) { } void ar5210GetDfsThresh(struct ath_hal *ah, HAL_PHYERR_PARAM *pe) { } /* * Update the diagnostic register. * * This merges in the diagnostic register setting with the default * value, which may or may not involve disabling hardware encryption. */ void ar5210UpdateDiagReg(struct ath_hal *ah, uint32_t val) { /* Disable all hardware encryption */ val |= AR_DIAG_SW_DIS_CRYPTO; OS_REG_WRITE(ah, AR_DIAG_SW, val); } Index: head/sys/dev/ath/ath_hal/ar5211/ar5211.h =================================================================== --- head/sys/dev/ath/ath_hal/ar5211/ar5211.h (revision 313490) +++ head/sys/dev/ath/ath_hal/ar5211/ar5211.h (revision 313491) @@ -1,327 +1,329 @@ /* * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2006 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * $FreeBSD$ */ #ifndef _ATH_AR5211_H_ #define _ATH_AR5211_H_ #include "ah_eeprom.h" #define AR5211_MAGIC 0x19570405 /* Classes for WME streams */ #define AC_BK 0 #define AC_BE 1 #define AC_VI 2 #define AC_VO 3 /* DCU Transmit Filter macros */ #define CALC_MMR(dcu, idx) \ ( (4 * dcu) + (idx < 32 ? 0 : (idx < 64 ? 1 : (idx < 96 ? 2 : 3))) ) #define TXBLK_FROM_MMR(mmr) \ (AR_D_TXBLK_BASE + ((mmr & 0x1f) << 6) + ((mmr & 0x20) >> 3)) #define CALC_TXBLK_ADDR(dcu, idx) (TXBLK_FROM_MMR(CALC_MMR(dcu, idx))) #define CALC_TXBLK_VALUE(idx) (1 << (idx & 0x1f)) /* MAC register values */ #define INIT_INTERRUPT_MASK \ ( AR_IMR_TXERR | AR_IMR_TXOK | AR_IMR_RXORN | \ AR_IMR_RXERR | AR_IMR_RXOK | AR_IMR_TXURN | \ AR_IMR_HIUERR ) #define INIT_BEACON_CONTROL \ ( (INIT_RESET_TSF << 24) | (INIT_BEACON_EN << 23) | \ (INIT_TIM_OFFSET << 16) | INIT_BEACON_PERIOD ) #define INIT_CONFIG_STATUS 0x00000000 #define INIT_RSSI_THR 0x00000700 /* Missed beacon counter initialized to 0x7 (max is 0xff) */ #define INIT_IQCAL_LOG_COUNT_MAX 0xF #define INIT_BCON_CNTRL_REG 0x00000000 #define INIT_BEACON_PERIOD 0xffff #define INIT_TIM_OFFSET 0 #define INIT_BEACON_EN 0 /* this should be set by AP only when it's ready */ #define INIT_RESET_TSF 0 /* * Various fifo fill before Tx start, in 64-byte units * i.e. put the frame in the air while still DMAing */ #define MIN_TX_FIFO_THRESHOLD 0x1 #define MAX_TX_FIFO_THRESHOLD ((IEEE80211_MAX_LEN / 64) + 1) #define INIT_TX_FIFO_THRESHOLD MIN_TX_FIFO_THRESHOLD /* * Gain support. */ typedef struct _gainOptStep { int16_t paramVal[4]; int32_t stepGain; int8_t stepName[16]; } GAIN_OPTIMIZATION_STEP; typedef struct { uint32_t numStepsInLadder; uint32_t defaultStepNum; GAIN_OPTIMIZATION_STEP optStep[10]; } GAIN_OPTIMIZATION_LADDER; typedef struct { uint32_t currStepNum; uint32_t currGain; uint32_t targetGain; uint32_t loTrig; uint32_t hiTrig; uint32_t active; const GAIN_OPTIMIZATION_STEP *currStep; } GAIN_VALUES; enum { RFGAIN_INACTIVE, RFGAIN_READ_REQUESTED, RFGAIN_NEED_CHANGE }; /* * Header Info - general parameters and * values set for each chipset board solution * that are programmed every reset */ struct ath_hal_5211 { struct ath_hal_private ah_priv; /* base class */ GAIN_VALUES ah_gainValues; uint8_t ah_macaddr[IEEE80211_ADDR_LEN]; uint8_t ah_bssid[IEEE80211_ADDR_LEN]; /* * Runtime state. */ uint32_t ah_maskReg; /* copy of AR_IMR */ uint32_t ah_txOkInterruptMask; uint32_t ah_txErrInterruptMask; uint32_t ah_txDescInterruptMask; uint32_t ah_txEolInterruptMask; uint32_t ah_txUrnInterruptMask; HAL_TX_QUEUE_INFO ah_txq[HAL_NUM_TX_QUEUES]; HAL_ANT_SETTING ah_diversityControl; /* antenna setting */ uint32_t ah_calibrationTime; HAL_BOOL ah_bIQCalibration; int ah_rfgainState; uint32_t ah_tx6PowerInHalfDbm; /* power output for 6Mb tx */ uint32_t ah_staId1Defaults; /* STA_ID1 default settings */ uint32_t ah_beaconInterval; uint32_t ah_rssiThr; /* RSSI_THR settings */ u_int ah_sifstime; /* user-specified sifs time */ u_int ah_slottime; /* user-specified slot time */ u_int ah_acktimeout; /* user-specified ack timeout */ u_int ah_ctstimeout; /* user-specified cts timeout */ /* * RF Silent handling. */ uint32_t ah_gpioSelect; /* GPIO pin to use */ uint32_t ah_polarity; /* polarity to disable RF */ uint32_t ah_gpioBit; /* after init, prev value */ }; #define AH5211(ah) ((struct ath_hal_5211 *)(ah)) struct ath_hal; extern void ar5211Detach(struct ath_hal *); extern HAL_BOOL ar5211Reset(struct ath_hal *, HAL_OPMODE, struct ieee80211_channel *, HAL_BOOL bChannelChange, HAL_RESET_TYPE, HAL_STATUS *); extern HAL_BOOL ar5211PhyDisable(struct ath_hal *); extern HAL_BOOL ar5211Disable(struct ath_hal *); extern HAL_BOOL ar5211ChipReset(struct ath_hal *, const struct ieee80211_channel *); extern HAL_BOOL ar5211PerCalibration(struct ath_hal *, struct ieee80211_channel *, HAL_BOOL *); extern HAL_BOOL ar5211PerCalibrationN(struct ath_hal *ah, struct ieee80211_channel *chan, u_int chainMask, HAL_BOOL longCal, HAL_BOOL *isCalDone); extern HAL_BOOL ar5211ResetCalValid(struct ath_hal *ah, const struct ieee80211_channel *); extern HAL_BOOL ar5211SetTxPowerLimit(struct ath_hal *, uint32_t limit); extern HAL_BOOL ar5211CalNoiseFloor(struct ath_hal *, const struct ieee80211_channel *); extern HAL_BOOL ar5211SetAntennaSwitchInternal(struct ath_hal *, HAL_ANT_SETTING, const struct ieee80211_channel *); extern int16_t ar5211GetNfAdjust(struct ath_hal *, const HAL_CHANNEL_INTERNAL *); extern HAL_BOOL ar5211ResetDma(struct ath_hal *, HAL_OPMODE); extern void ar5211InitializeGainValues(struct ath_hal *); extern HAL_RFGAIN ar5211GetRfgain(struct ath_hal *); extern void ar5211SetPCUConfig(struct ath_hal *); extern HAL_BOOL ar5211SetTxQueueProps(struct ath_hal *ah, int q, const HAL_TXQ_INFO *qInfo); extern HAL_BOOL ar5211GetTxQueueProps(struct ath_hal *ah, int q, HAL_TXQ_INFO *qInfo); extern int ar5211SetupTxQueue(struct ath_hal *ah, HAL_TX_QUEUE type, const HAL_TXQ_INFO *qInfo); extern HAL_BOOL ar5211ReleaseTxQueue(struct ath_hal *ah, u_int q); extern HAL_BOOL ar5211ResetTxQueue(struct ath_hal *ah, u_int q); extern uint32_t ar5211GetTxDP(struct ath_hal *, u_int); extern HAL_BOOL ar5211SetTxDP(struct ath_hal *, u_int, uint32_t txdp); extern HAL_BOOL ar5211UpdateTxTrigLevel(struct ath_hal *, HAL_BOOL); extern HAL_BOOL ar5211StartTxDma(struct ath_hal *, u_int); extern HAL_BOOL ar5211StopTxDma(struct ath_hal *, u_int); extern uint32_t ar5211NumTxPending(struct ath_hal *, u_int qnum); extern HAL_BOOL ar5211IsTxQueueStopped(struct ath_hal *, u_int); extern HAL_BOOL ar5211GetTransmitFilterIndex(struct ath_hal *, uint32_t); extern HAL_BOOL ar5211SetupTxDesc(struct ath_hal *, struct ath_desc *, u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, u_int txPower, u_int txRate0, u_int txTries0, u_int keyIx, u_int antMode, u_int flags, u_int rtsctsRate, u_int rtsctsDuration, u_int compicvLen, u_int compivLen, u_int comp); extern HAL_BOOL ar5211SetupXTxDesc(struct ath_hal *, struct ath_desc *, u_int txRate1, u_int txRetries1, u_int txRate2, u_int txRetries2, u_int txRate3, u_int txRetries3); extern HAL_BOOL ar5211FillTxDesc(struct ath_hal *, struct ath_desc *, HAL_DMA_ADDR *bufAddrList, uint32_t *segLenList, u_int descId, u_int qcuId, HAL_BOOL firstSeg, HAL_BOOL lastSeg, const struct ath_desc *ds0); extern HAL_STATUS ar5211ProcTxDesc(struct ath_hal *, struct ath_desc *, struct ath_tx_status *); extern void ar5211GetTxIntrQueue(struct ath_hal *ah, uint32_t *); extern void ar5211IntrReqTxDesc(struct ath_hal *ah, struct ath_desc *); extern HAL_BOOL ar5211GetTxCompletionRates(struct ath_hal *ah, const struct ath_desc *ds0, int *rates, int *tries); extern void ar5211SetTxDescLink(struct ath_hal *ah, void *ds, uint32_t link); extern void ar5211GetTxDescLink(struct ath_hal *ah, void *ds, uint32_t *link); extern void ar5211GetTxDescLinkPtr(struct ath_hal *ah, void *ds, uint32_t **linkptr); extern uint32_t ar5211GetRxDP(struct ath_hal *, HAL_RX_QUEUE); extern void ar5211SetRxDP(struct ath_hal *, uint32_t rxdp, HAL_RX_QUEUE); extern void ar5211EnableReceive(struct ath_hal *); extern HAL_BOOL ar5211StopDmaReceive(struct ath_hal *); extern void ar5211StartPcuReceive(struct ath_hal *); extern void ar5211StopPcuReceive(struct ath_hal *); extern void ar5211SetMulticastFilter(struct ath_hal *, uint32_t filter0, uint32_t filter1); extern HAL_BOOL ar5211ClrMulticastFilterIndex(struct ath_hal *, uint32_t); extern HAL_BOOL ar5211SetMulticastFilterIndex(struct ath_hal *, uint32_t); extern uint32_t ar5211GetRxFilter(struct ath_hal *); extern void ar5211SetRxFilter(struct ath_hal *, uint32_t); extern HAL_BOOL ar5211SetupRxDesc(struct ath_hal *, struct ath_desc *, uint32_t, u_int flags); extern HAL_STATUS ar5211ProcRxDesc(struct ath_hal *, struct ath_desc *, uint32_t, struct ath_desc *, uint64_t, struct ath_rx_status *); extern void ar5211GetMacAddress(struct ath_hal *, uint8_t *); extern HAL_BOOL ar5211SetMacAddress(struct ath_hal *ah, const uint8_t *); extern void ar5211GetBssIdMask(struct ath_hal *, uint8_t *); extern HAL_BOOL ar5211SetBssIdMask(struct ath_hal *, const uint8_t *); extern HAL_BOOL ar5211EepromRead(struct ath_hal *, u_int off, uint16_t *data); extern HAL_BOOL ar5211EepromWrite(struct ath_hal *, u_int off, uint16_t data); extern HAL_BOOL ar5211SetRegulatoryDomain(struct ath_hal *, uint16_t, HAL_STATUS *); extern u_int ar5211GetWirelessModes(struct ath_hal *); extern void ar5211EnableRfKill(struct ath_hal *); extern uint32_t ar5211GpioGet(struct ath_hal *, uint32_t gpio); extern void ar5211GpioSetIntr(struct ath_hal *, u_int, uint32_t ilevel); extern HAL_BOOL ar5211GpioCfgOutput(struct ath_hal *, uint32_t gpio, HAL_GPIO_MUX_TYPE); extern HAL_BOOL ar5211GpioCfgInput(struct ath_hal *, uint32_t gpio); extern HAL_BOOL ar5211GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val); extern void ar5211SetLedState(struct ath_hal *, HAL_LED_STATE); extern u_int ar5211AntennaGet(struct ath_hal *); extern void ar5211WriteAssocid(struct ath_hal *, const uint8_t *bssid, uint16_t assocId); extern uint64_t ar5211GetTsf64(struct ath_hal *); extern uint32_t ar5211GetTsf32(struct ath_hal *); extern void ar5211ResetTsf(struct ath_hal *); extern uint32_t ar5211GetMaxTurboRate(struct ath_hal *); extern uint32_t ar5211GetRandomSeed(struct ath_hal *); extern HAL_BOOL ar5211DetectCardPresent(struct ath_hal *); extern void ar5211UpdateMibCounters(struct ath_hal *, HAL_MIB_STATS *); extern void ar5211EnableHwEncryption(struct ath_hal *); extern void ar5211DisableHwEncryption(struct ath_hal *); extern HAL_BOOL ar5211SetSlotTime(struct ath_hal *, u_int); extern u_int ar5211GetSlotTime(struct ath_hal *); extern HAL_BOOL ar5211SetAckTimeout(struct ath_hal *, u_int); extern u_int ar5211GetAckTimeout(struct ath_hal *); extern HAL_BOOL ar5211SetAckCTSRate(struct ath_hal *, u_int); extern u_int ar5211GetAckCTSRate(struct ath_hal *); extern HAL_BOOL ar5211SetCTSTimeout(struct ath_hal *, u_int); extern u_int ar5211GetCTSTimeout(struct ath_hal *); extern HAL_BOOL ar5211SetSifsTime(struct ath_hal *, u_int); extern u_int ar5211GetSifsTime(struct ath_hal *); extern HAL_BOOL ar5211SetDecompMask(struct ath_hal *, uint16_t, int); extern void ar5211SetCoverageClass(struct ath_hal *, uint8_t, int); +extern HAL_STATUS ar5211SetQuiet(struct ath_hal *, uint32_t, uint32_t, + uint32_t, HAL_QUIET_FLAG); extern uint32_t ar5211GetCurRssi(struct ath_hal *); extern u_int ar5211GetDefAntenna(struct ath_hal *); extern void ar5211SetDefAntenna(struct ath_hal *ah, u_int antenna); extern HAL_ANT_SETTING ar5211GetAntennaSwitch(struct ath_hal *); extern HAL_BOOL ar5211SetAntennaSwitch(struct ath_hal *, HAL_ANT_SETTING); extern HAL_STATUS ar5211GetCapability(struct ath_hal *, HAL_CAPABILITY_TYPE, uint32_t, uint32_t *); extern HAL_BOOL ar5211SetCapability(struct ath_hal *, HAL_CAPABILITY_TYPE, uint32_t, uint32_t, HAL_STATUS *); extern HAL_BOOL ar5211GetDiagState(struct ath_hal *ah, int request, const void *args, uint32_t argsize, void **result, uint32_t *resultsize); extern uint32_t ar5211Get11nExtBusy(struct ath_hal *); extern HAL_BOOL ar5211GetMibCycleCounts(struct ath_hal *, HAL_SURVEY_SAMPLE *); extern void ar5211SetChainMasks(struct ath_hal *ah, uint32_t, uint32_t); extern void ar5211EnableDfs(struct ath_hal *, HAL_PHYERR_PARAM *); extern void ar5211GetDfsThresh(struct ath_hal *, HAL_PHYERR_PARAM *); extern u_int ar5211GetKeyCacheSize(struct ath_hal *); extern HAL_BOOL ar5211IsKeyCacheEntryValid(struct ath_hal *, uint16_t); extern HAL_BOOL ar5211ResetKeyCacheEntry(struct ath_hal *, uint16_t entry); extern HAL_BOOL ar5211SetKeyCacheEntry(struct ath_hal *, uint16_t entry, const HAL_KEYVAL *, const uint8_t *mac, int xorKey); extern HAL_BOOL ar5211SetKeyCacheEntryMac(struct ath_hal *, uint16_t, const uint8_t *); extern HAL_BOOL ar5211SetPowerMode(struct ath_hal *, uint32_t powerRequest, int setChip); extern HAL_POWER_MODE ar5211GetPowerMode(struct ath_hal *); extern void ar5211SetBeaconTimers(struct ath_hal *, const HAL_BEACON_TIMERS *); extern void ar5211BeaconInit(struct ath_hal *, uint32_t, uint32_t); extern void ar5211SetStaBeaconTimers(struct ath_hal *, const HAL_BEACON_STATE *); extern void ar5211ResetStaBeaconTimers(struct ath_hal *); extern uint64_t ar5211GetNextTBTT(struct ath_hal *); extern HAL_BOOL ar5211IsInterruptPending(struct ath_hal *); extern HAL_BOOL ar5211GetPendingInterrupts(struct ath_hal *, HAL_INT *); extern HAL_INT ar5211GetInterrupts(struct ath_hal *); extern HAL_INT ar5211SetInterrupts(struct ath_hal *, HAL_INT ints); extern const HAL_RATE_TABLE *ar5211GetRateTable(struct ath_hal *, u_int mode); extern HAL_BOOL ar5211AniControl(struct ath_hal *, HAL_ANI_CMD, int ); extern void ar5211RxMonitor(struct ath_hal *, const HAL_NODE_STATS *, const struct ieee80211_channel *); extern void ar5211AniPoll(struct ath_hal *, const struct ieee80211_channel *); extern void ar5211MibEvent(struct ath_hal *, const HAL_NODE_STATS *); #endif /* _ATH_AR5211_H_ */ Index: head/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c =================================================================== --- head/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c (revision 313490) +++ head/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c (revision 313491) @@ -1,553 +1,554 @@ /* * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2006 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * $FreeBSD$ */ #include "opt_ah.h" #include "ah.h" #include "ah_internal.h" #include "ah_devid.h" #include "ar5211/ar5211.h" #include "ar5211/ar5211reg.h" #include "ar5211/ar5211phy.h" #include "ah_eeprom_v3.h" static HAL_BOOL ar5211GetChannelEdges(struct ath_hal *ah, uint16_t flags, uint16_t *low, uint16_t *high); static HAL_BOOL ar5211GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan); static void ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off); static void ar5211DisablePCIE(struct ath_hal *ah); static const struct ath_hal_private ar5211hal = {{ .ah_magic = AR5211_MAGIC, .ah_getRateTable = ar5211GetRateTable, .ah_detach = ar5211Detach, /* Reset Functions */ .ah_reset = ar5211Reset, .ah_phyDisable = ar5211PhyDisable, .ah_disable = ar5211Disable, .ah_configPCIE = ar5211ConfigPCIE, .ah_disablePCIE = ar5211DisablePCIE, .ah_setPCUConfig = ar5211SetPCUConfig, .ah_perCalibration = ar5211PerCalibration, .ah_perCalibrationN = ar5211PerCalibrationN, .ah_resetCalValid = ar5211ResetCalValid, .ah_setTxPowerLimit = ar5211SetTxPowerLimit, .ah_getChanNoise = ath_hal_getChanNoise, /* Transmit functions */ .ah_updateTxTrigLevel = ar5211UpdateTxTrigLevel, .ah_setupTxQueue = ar5211SetupTxQueue, .ah_setTxQueueProps = ar5211SetTxQueueProps, .ah_getTxQueueProps = ar5211GetTxQueueProps, .ah_releaseTxQueue = ar5211ReleaseTxQueue, .ah_resetTxQueue = ar5211ResetTxQueue, .ah_getTxDP = ar5211GetTxDP, .ah_setTxDP = ar5211SetTxDP, .ah_numTxPending = ar5211NumTxPending, .ah_startTxDma = ar5211StartTxDma, .ah_stopTxDma = ar5211StopTxDma, .ah_setupTxDesc = ar5211SetupTxDesc, .ah_setupXTxDesc = ar5211SetupXTxDesc, .ah_fillTxDesc = ar5211FillTxDesc, .ah_procTxDesc = ar5211ProcTxDesc, .ah_getTxIntrQueue = ar5211GetTxIntrQueue, .ah_reqTxIntrDesc = ar5211IntrReqTxDesc, .ah_getTxCompletionRates = ar5211GetTxCompletionRates, .ah_setTxDescLink = ar5211SetTxDescLink, .ah_getTxDescLink = ar5211GetTxDescLink, .ah_getTxDescLinkPtr = ar5211GetTxDescLinkPtr, /* RX Functions */ .ah_getRxDP = ar5211GetRxDP, .ah_setRxDP = ar5211SetRxDP, .ah_enableReceive = ar5211EnableReceive, .ah_stopDmaReceive = ar5211StopDmaReceive, .ah_startPcuReceive = ar5211StartPcuReceive, .ah_stopPcuReceive = ar5211StopPcuReceive, .ah_setMulticastFilter = ar5211SetMulticastFilter, .ah_setMulticastFilterIndex = ar5211SetMulticastFilterIndex, .ah_clrMulticastFilterIndex = ar5211ClrMulticastFilterIndex, .ah_getRxFilter = ar5211GetRxFilter, .ah_setRxFilter = ar5211SetRxFilter, .ah_setupRxDesc = ar5211SetupRxDesc, .ah_procRxDesc = ar5211ProcRxDesc, .ah_rxMonitor = ar5211RxMonitor, .ah_aniPoll = ar5211AniPoll, .ah_procMibEvent = ar5211MibEvent, /* Misc Functions */ .ah_getCapability = ar5211GetCapability, .ah_setCapability = ar5211SetCapability, .ah_getDiagState = ar5211GetDiagState, .ah_getMacAddress = ar5211GetMacAddress, .ah_setMacAddress = ar5211SetMacAddress, .ah_getBssIdMask = ar5211GetBssIdMask, .ah_setBssIdMask = ar5211SetBssIdMask, .ah_setRegulatoryDomain = ar5211SetRegulatoryDomain, .ah_setLedState = ar5211SetLedState, .ah_writeAssocid = ar5211WriteAssocid, .ah_gpioCfgInput = ar5211GpioCfgInput, .ah_gpioCfgOutput = ar5211GpioCfgOutput, .ah_gpioGet = ar5211GpioGet, .ah_gpioSet = ar5211GpioSet, .ah_gpioSetIntr = ar5211GpioSetIntr, .ah_getTsf32 = ar5211GetTsf32, .ah_getTsf64 = ar5211GetTsf64, .ah_resetTsf = ar5211ResetTsf, .ah_detectCardPresent = ar5211DetectCardPresent, .ah_updateMibCounters = ar5211UpdateMibCounters, .ah_getRfGain = ar5211GetRfgain, .ah_getDefAntenna = ar5211GetDefAntenna, .ah_setDefAntenna = ar5211SetDefAntenna, .ah_getAntennaSwitch = ar5211GetAntennaSwitch, .ah_setAntennaSwitch = ar5211SetAntennaSwitch, .ah_setSifsTime = ar5211SetSifsTime, .ah_getSifsTime = ar5211GetSifsTime, .ah_setSlotTime = ar5211SetSlotTime, .ah_getSlotTime = ar5211GetSlotTime, .ah_setAckTimeout = ar5211SetAckTimeout, .ah_getAckTimeout = ar5211GetAckTimeout, .ah_setAckCTSRate = ar5211SetAckCTSRate, .ah_getAckCTSRate = ar5211GetAckCTSRate, .ah_setCTSTimeout = ar5211SetCTSTimeout, .ah_getCTSTimeout = ar5211GetCTSTimeout, .ah_setDecompMask = ar5211SetDecompMask, .ah_setCoverageClass = ar5211SetCoverageClass, + .ah_setQuiet = ar5211SetQuiet, .ah_get11nExtBusy = ar5211Get11nExtBusy, .ah_getMibCycleCounts = ar5211GetMibCycleCounts, .ah_setChainMasks = ar5211SetChainMasks, .ah_enableDfs = ar5211EnableDfs, .ah_getDfsThresh = ar5211GetDfsThresh, /* XXX procRadarEvent */ /* XXX isFastClockEnabled */ /* Key Cache Functions */ .ah_getKeyCacheSize = ar5211GetKeyCacheSize, .ah_resetKeyCacheEntry = ar5211ResetKeyCacheEntry, .ah_isKeyCacheEntryValid = ar5211IsKeyCacheEntryValid, .ah_setKeyCacheEntry = ar5211SetKeyCacheEntry, .ah_setKeyCacheEntryMac = ar5211SetKeyCacheEntryMac, /* Power Management Functions */ .ah_setPowerMode = ar5211SetPowerMode, .ah_getPowerMode = ar5211GetPowerMode, /* Beacon Functions */ .ah_setBeaconTimers = ar5211SetBeaconTimers, .ah_beaconInit = ar5211BeaconInit, .ah_setStationBeaconTimers = ar5211SetStaBeaconTimers, .ah_resetStationBeaconTimers = ar5211ResetStaBeaconTimers, .ah_getNextTBTT = ar5211GetNextTBTT, /* Interrupt Functions */ .ah_isInterruptPending = ar5211IsInterruptPending, .ah_getPendingInterrupts = ar5211GetPendingInterrupts, .ah_getInterrupts = ar5211GetInterrupts, .ah_setInterrupts = ar5211SetInterrupts }, .ah_getChannelEdges = ar5211GetChannelEdges, .ah_getWirelessModes = ar5211GetWirelessModes, .ah_eepromRead = ar5211EepromRead, #ifdef AH_SUPPORT_WRITE_EEPROM .ah_eepromWrite = ar5211EepromWrite, #endif .ah_getChipPowerLimits = ar5211GetChipPowerLimits, }; static HAL_BOOL ar5211ChipTest(struct ath_hal *); static HAL_BOOL ar5211FillCapabilityInfo(struct ath_hal *ah); /* * Return the revsion id for the radio chip. This * fetched via the PHY. */ static uint32_t ar5211GetRadioRev(struct ath_hal *ah) { uint32_t val; int i; OS_REG_WRITE(ah, (AR_PHY_BASE + (0x34 << 2)), 0x00001c16); for (i = 0; i < 8; i++) OS_REG_WRITE(ah, (AR_PHY_BASE + (0x20 << 2)), 0x00010000); val = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 24) & 0xff; val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4); return ath_hal_reverseBits(val, 8); } /* * Attach for an AR5211 part. */ static struct ath_hal * ar5211Attach(uint16_t devid, HAL_SOFTC sc, HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata, HAL_OPS_CONFIG *ah_config, HAL_STATUS *status) { #define N(a) (sizeof(a)/sizeof(a[0])) struct ath_hal_5211 *ahp; struct ath_hal *ah; uint32_t val; uint16_t eeval; HAL_STATUS ecode; HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n", __func__, sc, (void*) st, (void*) sh); /* NB: memory is returned zero'd */ ahp = ath_hal_malloc(sizeof (struct ath_hal_5211)); if (ahp == AH_NULL) { HALDEBUG(AH_NULL, HAL_DEBUG_ANY, "%s: cannot allocate memory for state block\n", __func__); ecode = HAL_ENOMEM; goto bad; } ah = &ahp->ah_priv.h; /* set initial values */ OS_MEMCPY(&ahp->ah_priv, &ar5211hal, sizeof(struct ath_hal_private)); ah->ah_sc = sc; ah->ah_st = st; ah->ah_sh = sh; ah->ah_devid = devid; /* NB: for AH_DEBUG_ALQ */ AH_PRIVATE(ah)->ah_devid = devid; AH_PRIVATE(ah)->ah_subvendorid = 0; /* XXX */ AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER; AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX; /* no scaling */ ahp->ah_diversityControl = HAL_ANT_VARIABLE; ahp->ah_staId1Defaults = 0; ahp->ah_rssiThr = INIT_RSSI_THR; ahp->ah_sifstime = (u_int) -1; ahp->ah_slottime = (u_int) -1; ahp->ah_acktimeout = (u_int) -1; ahp->ah_ctstimeout = (u_int) -1; if (!ar5211ChipReset(ah, AH_NULL)) { /* reset chip */ HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__); ecode = HAL_EIO; goto bad; } if (AH_PRIVATE(ah)->ah_devid == AR5211_FPGA11B) { /* set it back to OFDM mode to be able to read analog rev id */ OS_REG_WRITE(ah, AR5211_PHY_MODE, AR5211_PHY_MODE_OFDM); OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44); OS_DELAY(1000); } /* Read Revisions from Chips */ val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID_M; AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S; AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION_M; if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_MAUI_2 || AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_OAHU) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: Mac Chip Rev 0x%x is not supported by this driver\n", __func__, AH_PRIVATE(ah)->ah_macVersion); ecode = HAL_ENOTSUPP; goto bad; } AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID); if (!ar5211ChipTest(ah)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n", __func__); ecode = HAL_ESELFTEST; goto bad; } /* Set correct Baseband to analog shift setting to access analog chips. */ if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU) { OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007); } else { OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000047); } OS_DELAY(2000); /* Read Radio Chip Rev Extract */ AH_PRIVATE(ah)->ah_analog5GhzRev = ar5211GetRadioRev(ah); if ((AH_PRIVATE(ah)->ah_analog5GhzRev & 0xf0) != RAD5_SREV_MAJOR) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: 5G Radio Chip Rev 0x%02X is not supported by this " "driver\n", __func__, AH_PRIVATE(ah)->ah_analog5GhzRev); ecode = HAL_ENOTSUPP; goto bad; } val = (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_EEPROM_SIZE_M) >> AR_PCICFG_EEPROM_SIZE_S; if (val != AR_PCICFG_EEPROM_SIZE_16K) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unsupported EEPROM size " "%u (0x%x) found\n", __func__, val, val); ecode = HAL_EESIZE; goto bad; } ecode = ath_hal_legacyEepromAttach(ah); if (ecode != HAL_OK) { goto bad; } /* If Bmode and AR5211, verify 2.4 analog exists */ if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU && ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) { /* Set correct Baseband to analog shift setting to access analog chips. */ OS_REG_WRITE(ah, AR_PHY_BASE, 0x00004007); OS_DELAY(2000); AH_PRIVATE(ah)->ah_analog2GhzRev = ar5211GetRadioRev(ah); /* Set baseband for 5GHz chip */ OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007); OS_DELAY(2000); if ((AH_PRIVATE(ah)->ah_analog2GhzRev & 0xF0) != RAD2_SREV_MAJOR) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: 2G Radio Chip Rev 0x%x is not supported by " "this driver\n", __func__, AH_PRIVATE(ah)->ah_analog2GhzRev); ecode = HAL_ENOTSUPP; goto bad; } } else { ath_hal_eepromSet(ah, AR_EEP_BMODE, AH_FALSE); } ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval); if (ecode != HAL_OK) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: cannot read regulatory domain from EEPROM\n", __func__); goto bad; } AH_PRIVATE(ah)->ah_currentRD = eeval; AH_PRIVATE(ah)->ah_getNfAdjust = ar5211GetNfAdjust; /* * Got everything we need now to setup the capabilities. */ (void) ar5211FillCapabilityInfo(ah); /* Initialize gain ladder thermal calibration structure */ ar5211InitializeGainValues(ah); ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr); if (ecode != HAL_OK) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: error getting mac address from EEPROM\n", __func__); goto bad; } HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__); return ah; bad: if (ahp) ar5211Detach((struct ath_hal *) ahp); if (status) *status = ecode; return AH_NULL; #undef N } void ar5211Detach(struct ath_hal *ah) { HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__); HALASSERT(ah != AH_NULL); HALASSERT(ah->ah_magic == AR5211_MAGIC); ath_hal_eepromDetach(ah); ath_hal_free(ah); } static HAL_BOOL ar5211ChipTest(struct ath_hal *ah) { uint32_t regAddr[2] = { AR_STA_ID0, AR_PHY_BASE+(8 << 2) }; uint32_t regHold[2]; uint32_t patternData[4] = { 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999 }; int i, j; /* Test PHY & MAC registers */ for (i = 0; i < 2; i++) { uint32_t addr = regAddr[i]; uint32_t wrData, rdData; regHold[i] = OS_REG_READ(ah, addr); for (j = 0; j < 0x100; j++) { wrData = (j << 16) | j; OS_REG_WRITE(ah, addr, wrData); rdData = OS_REG_READ(ah, addr); if (rdData != wrData) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n", __func__, addr, wrData, rdData); return AH_FALSE; } } for (j = 0; j < 4; j++) { wrData = patternData[j]; OS_REG_WRITE(ah, addr, wrData); rdData = OS_REG_READ(ah, addr); if (wrData != rdData) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n", __func__, addr, wrData, rdData); return AH_FALSE; } } OS_REG_WRITE(ah, regAddr[i], regHold[i]); } OS_DELAY(100); return AH_TRUE; } /* * Store the channel edges for the requested operational mode */ static HAL_BOOL ar5211GetChannelEdges(struct ath_hal *ah, uint16_t flags, uint16_t *low, uint16_t *high) { if (flags & IEEE80211_CHAN_5GHZ) { *low = 4920; *high = 6100; return AH_TRUE; } if (flags & IEEE80211_CHAN_2GHZ && ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) { *low = 2312; *high = 2732; return AH_TRUE; } return AH_FALSE; } static HAL_BOOL ar5211GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan) { /* XXX fill in, this is just a placeholder */ HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: no min/max power for %u/0x%x\n", __func__, chan->ic_freq, chan->ic_flags); chan->ic_maxpower = MAX_RATE_POWER; chan->ic_minpower = 0; return AH_TRUE; } static void ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off) { } static void ar5211DisablePCIE(struct ath_hal *ah) { } /* * Fill all software cached or static hardware state information. */ static HAL_BOOL ar5211FillCapabilityInfo(struct ath_hal *ah) { struct ath_hal_private *ahpriv = AH_PRIVATE(ah); HAL_CAPABILITIES *pCap = &ahpriv->ah_caps; /* Construct wireless mode from EEPROM */ pCap->halWirelessModes = 0; if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) { pCap->halWirelessModes |= HAL_MODE_11A; if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO5DISABLE)) pCap->halWirelessModes |= HAL_MODE_TURBO; } if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) pCap->halWirelessModes |= HAL_MODE_11B; pCap->halLow2GhzChan = 2312; pCap->halHigh2GhzChan = 2732; pCap->halLow5GhzChan = 4920; pCap->halHigh5GhzChan = 6100; pCap->halChanSpreadSupport = AH_TRUE; pCap->halSleepAfterBeaconBroken = AH_TRUE; pCap->halPSPollBroken = AH_TRUE; pCap->halVEOLSupport = AH_TRUE; pCap->halNumMRRetries = 1; /* No hardware MRR support */ pCap->halNumTxMaps = 1; /* Single TX ptr per descr */ pCap->halTotalQueues = HAL_NUM_TX_QUEUES; pCap->halKeyCacheSize = 128; /* XXX not needed */ pCap->halChanHalfRate = AH_FALSE; pCap->halChanQuarterRate = AH_FALSE; /* * RSSI uses the combined field; some 11n NICs may use * the control chain RSSI. */ pCap->halUseCombinedRadarRssi = AH_TRUE; if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) && ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == HAL_OK) { /* NB: enabled by default */ ahpriv->ah_rfkillEnabled = AH_TRUE; pCap->halRfSilentSupport = AH_TRUE; } pCap->halRxTstampPrecision = 13; pCap->halTxTstampPrecision = 16; pCap->halIntrMask = HAL_INT_COMMON | HAL_INT_RX | HAL_INT_TX | HAL_INT_FATAL | HAL_INT_BNR | HAL_INT_TIM ; pCap->hal4kbSplitTransSupport = AH_TRUE; pCap->halHasRxSelfLinkedTail = AH_TRUE; /* XXX might be ok w/ some chip revs */ ahpriv->ah_rxornIsFatal = AH_TRUE; return AH_TRUE; } static const char* ar5211Probe(uint16_t vendorid, uint16_t devid) { if (vendorid == ATHEROS_VENDOR_ID) { if (devid == AR5211_DEVID || devid == AR5311_DEVID || devid == AR5211_DEFAULT) return "Atheros 5211"; if (devid == AR5211_FPGA11B) return "Atheros 5211 (FPGA)"; } return AH_NULL; } AH_CHIP(AR5211, ar5211Probe, ar5211Attach); Index: head/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c =================================================================== --- head/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c (revision 313490) +++ head/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c (revision 313491) @@ -1,727 +1,734 @@ /* * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting * Copyright (c) 2002-2006 Atheros Communications, Inc. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * $FreeBSD$ */ #include "opt_ah.h" #include "ah.h" #include "ah_internal.h" #include "ar5211/ar5211.h" #include "ar5211/ar5211reg.h" #include "ar5211/ar5211phy.h" #include "ah_eeprom_v3.h" #define AR_NUM_GPIO 6 /* 6 GPIO bits */ #define AR_GPIOD_MASK 0x2f /* 6-bit mask */ void ar5211GetMacAddress(struct ath_hal *ah, uint8_t *mac) { struct ath_hal_5211 *ahp = AH5211(ah); OS_MEMCPY(mac, ahp->ah_macaddr, IEEE80211_ADDR_LEN); } HAL_BOOL ar5211SetMacAddress(struct ath_hal *ah, const uint8_t *mac) { struct ath_hal_5211 *ahp = AH5211(ah); OS_MEMCPY(ahp->ah_macaddr, mac, IEEE80211_ADDR_LEN); return AH_TRUE; } void ar5211GetBssIdMask(struct ath_hal *ah, uint8_t *mask) { static const uint8_t ones[IEEE80211_ADDR_LEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; OS_MEMCPY(mask, ones, IEEE80211_ADDR_LEN); } HAL_BOOL ar5211SetBssIdMask(struct ath_hal *ah, const uint8_t *mask) { return AH_FALSE; } /* * Read 16 bits of data from the specified EEPROM offset. */ HAL_BOOL ar5211EepromRead(struct ath_hal *ah, u_int off, uint16_t *data) { OS_REG_WRITE(ah, AR_EEPROM_ADDR, off); OS_REG_WRITE(ah, AR_EEPROM_CMD, AR_EEPROM_CMD_READ); if (!ath_hal_wait(ah, AR_EEPROM_STS, AR_EEPROM_STS_READ_COMPLETE | AR_EEPROM_STS_READ_ERROR, AR_EEPROM_STS_READ_COMPLETE)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: read failed for entry 0x%x\n", __func__, off); return AH_FALSE; } *data = OS_REG_READ(ah, AR_EEPROM_DATA) & 0xffff; return AH_TRUE; } #ifdef AH_SUPPORT_WRITE_EEPROM /* * Write 16 bits of data to the specified EEPROM offset. */ HAL_BOOL ar5211EepromWrite(struct ath_hal *ah, u_int off, uint16_t data) { return AH_FALSE; } #endif /* AH_SUPPORT_WRITE_EEPROM */ /* * Attempt to change the cards operating regulatory domain to the given value */ HAL_BOOL ar5211SetRegulatoryDomain(struct ath_hal *ah, uint16_t regDomain, HAL_STATUS *status) { HAL_STATUS ecode; if (AH_PRIVATE(ah)->ah_currentRD == regDomain) { ecode = HAL_EINVAL; goto bad; } /* * Check if EEPROM is configured to allow this; must * be a proper version and the protection bits must * permit re-writing that segment of the EEPROM. */ if (ath_hal_eepromGetFlag(ah, AR_EEP_WRITEPROTECT)) { ecode = HAL_EEWRITE; goto bad; } #ifdef AH_SUPPORT_WRITE_REGDOMAIN if (ar5211EepromWrite(ah, AR_EEPROM_REG_DOMAIN, regDomain)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: set regulatory domain to %u (0x%x)\n", __func__, regDomain, regDomain); AH_PRIVATE(ah)->ah_currentRD = regDomain; return AH_TRUE; } #endif ecode = HAL_EIO; bad: if (status) *status = ecode; return AH_FALSE; } /* * Return the wireless modes (a,b,g,t) supported by hardware. * * This value is what is actually supported by the hardware * and is unaffected by regulatory/country code settings. * */ u_int ar5211GetWirelessModes(struct ath_hal *ah) { u_int mode = 0; if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) { mode = HAL_MODE_11A; if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO5DISABLE)) mode |= HAL_MODE_TURBO | HAL_MODE_108A; } if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) mode |= HAL_MODE_11B; return mode; } #if 0 HAL_BOOL ar5211GetTurboDisable(struct ath_hal *ah) { return (AH5211(ah)->ah_turboDisable != 0); } #endif /* * Called if RfKill is supported (according to EEPROM). Set the interrupt and * GPIO values so the ISR and can disable RF on a switch signal */ void ar5211EnableRfKill(struct ath_hal *ah) { uint16_t rfsilent = AH_PRIVATE(ah)->ah_rfsilent; int select = MS(rfsilent, AR_EEPROM_RFSILENT_GPIO_SEL); int polarity = MS(rfsilent, AR_EEPROM_RFSILENT_POLARITY); /* * Configure the desired GPIO port for input * and enable baseband rf silence. */ ar5211GpioCfgInput(ah, select); OS_REG_SET_BIT(ah, AR_PHY_BASE, 0x00002000); /* * If radio disable switch connection to GPIO bit x is enabled * program GPIO interrupt. * If rfkill bit on eeprom is 1, setupeeprommap routine has already * verified that it is a later version of eeprom, it has a place for * rfkill bit and it is set to 1, indicating that GPIO bit x hardware * connection is present. */ ar5211GpioSetIntr(ah, select, (ar5211GpioGet(ah, select) != polarity)); } /* * Configure GPIO Output lines */ HAL_BOOL ar5211GpioCfgOutput(struct ath_hal *ah, uint32_t gpio, HAL_GPIO_MUX_TYPE type) { uint32_t reg; HALASSERT(gpio < AR_NUM_GPIO); reg = OS_REG_READ(ah, AR_GPIOCR); reg &= ~(AR_GPIOCR_0_CR_A << (gpio * AR_GPIOCR_CR_SHIFT)); reg |= AR_GPIOCR_0_CR_A << (gpio * AR_GPIOCR_CR_SHIFT); OS_REG_WRITE(ah, AR_GPIOCR, reg); return AH_TRUE; } /* * Configure GPIO Input lines */ HAL_BOOL ar5211GpioCfgInput(struct ath_hal *ah, uint32_t gpio) { uint32_t reg; HALASSERT(gpio < AR_NUM_GPIO); reg = OS_REG_READ(ah, AR_GPIOCR); reg &= ~(AR_GPIOCR_0_CR_A << (gpio * AR_GPIOCR_CR_SHIFT)); reg |= AR_GPIOCR_0_CR_N << (gpio * AR_GPIOCR_CR_SHIFT); OS_REG_WRITE(ah, AR_GPIOCR, reg); return AH_TRUE; } /* * Once configured for I/O - set output lines */ HAL_BOOL ar5211GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val) { uint32_t reg; HALASSERT(gpio < AR_NUM_GPIO); reg = OS_REG_READ(ah, AR_GPIODO); reg &= ~(1 << gpio); reg |= (val&1) << gpio; OS_REG_WRITE(ah, AR_GPIODO, reg); return AH_TRUE; } /* * Once configured for I/O - get input lines */ uint32_t ar5211GpioGet(struct ath_hal *ah, uint32_t gpio) { if (gpio < AR_NUM_GPIO) { uint32_t val = OS_REG_READ(ah, AR_GPIODI); val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1; return val; } else { return 0xffffffff; } } /* * Set the GPIO 0 Interrupt (gpio is ignored) */ void ar5211GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel) { uint32_t val = OS_REG_READ(ah, AR_GPIOCR); /* Clear the bits that we will modify. */ val &= ~(AR_GPIOCR_INT_SEL0 | AR_GPIOCR_INT_SELH | AR_GPIOCR_INT_ENA | AR_GPIOCR_0_CR_A); val |= AR_GPIOCR_INT_SEL0 | AR_GPIOCR_INT_ENA; if (ilevel) val |= AR_GPIOCR_INT_SELH; /* Don't need to change anything for low level interrupt. */ OS_REG_WRITE(ah, AR_GPIOCR, val); /* Change the interrupt mask. */ ar5211SetInterrupts(ah, AH5211(ah)->ah_maskReg | HAL_INT_GPIO); } /* * Change the LED blinking pattern to correspond to the connectivity */ void ar5211SetLedState(struct ath_hal *ah, HAL_LED_STATE state) { static const uint32_t ledbits[8] = { AR_PCICFG_LEDCTL_NONE|AR_PCICFG_LEDMODE_PROP, /* HAL_LED_INIT */ AR_PCICFG_LEDCTL_PEND|AR_PCICFG_LEDMODE_PROP, /* HAL_LED_SCAN */ AR_PCICFG_LEDCTL_PEND|AR_PCICFG_LEDMODE_PROP, /* HAL_LED_AUTH */ AR_PCICFG_LEDCTL_ASSOC|AR_PCICFG_LEDMODE_PROP,/* HAL_LED_ASSOC*/ AR_PCICFG_LEDCTL_ASSOC|AR_PCICFG_LEDMODE_PROP,/* HAL_LED_RUN */ AR_PCICFG_LEDCTL_NONE|AR_PCICFG_LEDMODE_RAND, AR_PCICFG_LEDCTL_NONE|AR_PCICFG_LEDMODE_RAND, AR_PCICFG_LEDCTL_NONE|AR_PCICFG_LEDMODE_RAND, }; OS_REG_WRITE(ah, AR_PCICFG, (OS_REG_READ(ah, AR_PCICFG) &~ (AR_PCICFG_LEDCTL | AR_PCICFG_LEDMODE)) | ledbits[state & 0x7] ); } /* * Change association related fields programmed into the hardware. * Writing a valid BSSID to the hardware effectively enables the hardware * to synchronize its TSF to the correct beacons and receive frames coming * from that BSSID. It is called by the SME JOIN operation. */ void ar5211WriteAssocid(struct ath_hal *ah, const uint8_t *bssid, uint16_t assocId) { struct ath_hal_5211 *ahp = AH5211(ah); /* XXX save bssid for possible re-use on reset */ OS_MEMCPY(ahp->ah_bssid, bssid, IEEE80211_ADDR_LEN); OS_REG_WRITE(ah, AR_BSS_ID0, LE_READ_4(ahp->ah_bssid)); OS_REG_WRITE(ah, AR_BSS_ID1, LE_READ_2(ahp->ah_bssid+4) | ((assocId & 0x3fff)<> 19) & 0x1ff; if (nf & 0x100) nf = 0 - ((nf ^ 0x1ff) + 1); return (OS_REG_READ(ah, AR_TSF_U32) ^ OS_REG_READ(ah, AR_TSF_L32) ^ nf); } /* * Detect if our card is present */ HAL_BOOL ar5211DetectCardPresent(struct ath_hal *ah) { uint16_t macVersion, macRev; uint32_t v; /* * Read the Silicon Revision register and compare that * to what we read at attach time. If the same, we say * a card/device is present. */ v = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID_M; macVersion = v >> AR_SREV_ID_S; macRev = v & AR_SREV_REVISION_M; return (AH_PRIVATE(ah)->ah_macVersion == macVersion && AH_PRIVATE(ah)->ah_macRev == macRev); } /* * Update MIB Counters */ void ar5211UpdateMibCounters(struct ath_hal *ah, HAL_MIB_STATS *stats) { stats->ackrcv_bad += OS_REG_READ(ah, AR_ACK_FAIL); stats->rts_bad += OS_REG_READ(ah, AR_RTS_FAIL); stats->fcs_bad += OS_REG_READ(ah, AR_FCS_FAIL); stats->rts_good += OS_REG_READ(ah, AR_RTS_OK); stats->beacons += OS_REG_READ(ah, AR_BEACON_CNT); } HAL_BOOL ar5211SetSifsTime(struct ath_hal *ah, u_int us) { struct ath_hal_5211 *ahp = AH5211(ah); if (us > ath_hal_mac_usec(ah, 0xffff)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: bad SIFS time %u\n", __func__, us); ahp->ah_sifstime = (u_int) -1; /* restore default handling */ return AH_FALSE; } else { /* convert to system clocks */ OS_REG_WRITE(ah, AR_D_GBL_IFS_SIFS, ath_hal_mac_clks(ah, us)); ahp->ah_slottime = us; return AH_TRUE; } } u_int ar5211GetSifsTime(struct ath_hal *ah) { u_int clks = OS_REG_READ(ah, AR_D_GBL_IFS_SIFS) & 0xffff; return ath_hal_mac_usec(ah, clks); /* convert from system clocks */ } HAL_BOOL ar5211SetSlotTime(struct ath_hal *ah, u_int us) { struct ath_hal_5211 *ahp = AH5211(ah); if (us < HAL_SLOT_TIME_9 || us > ath_hal_mac_usec(ah, 0xffff)) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: bad slot time %u\n", __func__, us); ahp->ah_slottime = us; /* restore default handling */ return AH_FALSE; } else { /* convert to system clocks */ OS_REG_WRITE(ah, AR_D_GBL_IFS_SLOT, ath_hal_mac_clks(ah, us)); ahp->ah_slottime = us; return AH_TRUE; } } u_int ar5211GetSlotTime(struct ath_hal *ah) { u_int clks = OS_REG_READ(ah, AR_D_GBL_IFS_SLOT) & 0xffff; return ath_hal_mac_usec(ah, clks); /* convert from system clocks */ } HAL_BOOL ar5211SetAckTimeout(struct ath_hal *ah, u_int us) { struct ath_hal_5211 *ahp = AH5211(ah); if (us > ath_hal_mac_usec(ah, MS(0xffffffff, AR_TIME_OUT_ACK))) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: bad ack timeout %u\n", __func__, us); ahp->ah_acktimeout = (u_int) -1; /* restore default handling */ return AH_FALSE; } else { /* convert to system clocks */ OS_REG_RMW_FIELD(ah, AR_TIME_OUT, AR_TIME_OUT_ACK, ath_hal_mac_clks(ah, us)); ahp->ah_acktimeout = us; return AH_TRUE; } } u_int ar5211GetAckTimeout(struct ath_hal *ah) { u_int clks = MS(OS_REG_READ(ah, AR_TIME_OUT), AR_TIME_OUT_ACK); return ath_hal_mac_usec(ah, clks); /* convert from system clocks */ } u_int ar5211GetAckCTSRate(struct ath_hal *ah) { return ((AH5211(ah)->ah_staId1Defaults & AR_STA_ID1_ACKCTS_6MB) == 0); } HAL_BOOL ar5211SetAckCTSRate(struct ath_hal *ah, u_int high) { struct ath_hal_5211 *ahp = AH5211(ah); if (high) { OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_ACKCTS_6MB); ahp->ah_staId1Defaults &= ~AR_STA_ID1_ACKCTS_6MB; } else { OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_ACKCTS_6MB); ahp->ah_staId1Defaults |= AR_STA_ID1_ACKCTS_6MB; } return AH_TRUE; } HAL_BOOL ar5211SetCTSTimeout(struct ath_hal *ah, u_int us) { struct ath_hal_5211 *ahp = AH5211(ah); if (us > ath_hal_mac_usec(ah, MS(0xffffffff, AR_TIME_OUT_CTS))) { HALDEBUG(ah, HAL_DEBUG_ANY, "%s: bad cts timeout %u\n", __func__, us); ahp->ah_ctstimeout = (u_int) -1; /* restore default handling */ return AH_FALSE; } else { /* convert to system clocks */ OS_REG_RMW_FIELD(ah, AR_TIME_OUT, AR_TIME_OUT_CTS, ath_hal_mac_clks(ah, us)); ahp->ah_ctstimeout = us; return AH_TRUE; } } u_int ar5211GetCTSTimeout(struct ath_hal *ah) { u_int clks = MS(OS_REG_READ(ah, AR_TIME_OUT), AR_TIME_OUT_CTS); return ath_hal_mac_usec(ah, clks); /* convert from system clocks */ } HAL_BOOL ar5211SetDecompMask(struct ath_hal *ah, uint16_t keyidx, int en) { /* nothing to do */ return AH_TRUE; } void ar5211SetCoverageClass(struct ath_hal *ah, uint8_t coverageclass, int now) { } +HAL_STATUS +ar5211SetQuiet(struct ath_hal *ah, uint32_t period, uint32_t duration, + uint32_t next_start, HAL_QUIET_FLAG flags) +{ + return HAL_OK; +} + /* * Control Adaptive Noise Immunity Parameters */ HAL_BOOL ar5211AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param) { return AH_FALSE; } void ar5211AniPoll(struct ath_hal *ah, const struct ieee80211_channel *chan) { } void ar5211RxMonitor(struct ath_hal *ah, const HAL_NODE_STATS *stats, const struct ieee80211_channel *chan) { } void ar5211MibEvent(struct ath_hal *ah, const HAL_NODE_STATS *stats) { } /* * Get the rssi of frame curently being received. */ uint32_t ar5211GetCurRssi(struct ath_hal *ah) { return (OS_REG_READ(ah, AR_PHY_CURRENT_RSSI) & 0xff); } u_int ar5211GetDefAntenna(struct ath_hal *ah) { return (OS_REG_READ(ah, AR_DEF_ANTENNA) & 0x7); } void ar5211SetDefAntenna(struct ath_hal *ah, u_int antenna) { OS_REG_WRITE(ah, AR_DEF_ANTENNA, (antenna & 0x7)); } HAL_ANT_SETTING ar5211GetAntennaSwitch(struct ath_hal *ah) { return AH5211(ah)->ah_diversityControl; } HAL_BOOL ar5211SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings) { const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; if (chan == AH_NULL) { AH5211(ah)->ah_diversityControl = settings; return AH_TRUE; } return ar5211SetAntennaSwitchInternal(ah, settings, chan); } HAL_STATUS ar5211GetCapability(struct ath_hal *ah, HAL_CAPABILITY_TYPE type, uint32_t capability, uint32_t *result) { switch (type) { case HAL_CAP_CIPHER: /* cipher handled in hardware */ switch (capability) { case HAL_CIPHER_AES_OCB: case HAL_CIPHER_WEP: case HAL_CIPHER_CLR: return HAL_OK; default: return HAL_ENOTSUPP; } default: return ath_hal_getcapability(ah, type, capability, result); } } HAL_BOOL ar5211SetCapability(struct ath_hal *ah, HAL_CAPABILITY_TYPE type, uint32_t capability, uint32_t setting, HAL_STATUS *status) { switch (type) { case HAL_CAP_DIAG: /* hardware diagnostic support */ /* * NB: could split this up into virtual capabilities, * (e.g. 1 => ACK, 2 => CTS, etc.) but it hardly * seems worth the additional complexity. */ #ifdef AH_DEBUG AH_PRIVATE(ah)->ah_diagreg = setting; #else AH_PRIVATE(ah)->ah_diagreg = setting & 0x6; /* ACK+CTS */ #endif OS_REG_WRITE(ah, AR_DIAG_SW, AH_PRIVATE(ah)->ah_diagreg); return AH_TRUE; default: return ath_hal_setcapability(ah, type, capability, setting, status); } } HAL_BOOL ar5211GetDiagState(struct ath_hal *ah, int request, const void *args, uint32_t argsize, void **result, uint32_t *resultsize) { struct ath_hal_5211 *ahp = AH5211(ah); (void) ahp; if (ath_hal_getdiagstate(ah, request, args, argsize, result, resultsize)) return AH_TRUE; switch (request) { case HAL_DIAG_EEPROM: return ath_hal_eepromDiag(ah, request, args, argsize, result, resultsize); case HAL_DIAG_RFGAIN: *result = &ahp->ah_gainValues; *resultsize = sizeof(GAIN_VALUES); return AH_TRUE; case HAL_DIAG_RFGAIN_CURSTEP: *result = __DECONST(void *, ahp->ah_gainValues.currStep); *resultsize = (*result == AH_NULL) ? 0 : sizeof(GAIN_OPTIMIZATION_STEP); return AH_TRUE; } return AH_FALSE; } /* * Return what percentage of the extension channel is busy. * This is always disabled for AR5211 series NICs. */ uint32_t ar5211Get11nExtBusy(struct ath_hal *ah) { return (0); } /* * There's no channel survey support for the AR5211. */ HAL_BOOL ar5211GetMibCycleCounts(struct ath_hal *ah, HAL_SURVEY_SAMPLE *hsample) { return (AH_FALSE); } void ar5211SetChainMasks(struct ath_hal *ah, uint32_t txchainmask, uint32_t rxchainmask) { } void ar5211EnableDfs(struct ath_hal *ah, HAL_PHYERR_PARAM *pe) { } void ar5211GetDfsThresh(struct ath_hal *ah, HAL_PHYERR_PARAM *pe) { }