Index: head/sys/dev/rtwn/if_rtwn.c =================================================================== --- head/sys/dev/rtwn/if_rtwn.c (revision 312314) +++ head/sys/dev/rtwn/if_rtwn.c (revision 312315) @@ -1,2018 +1,2019 @@ /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2014 Kevin Lo * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include __FBSDID("$FreeBSD$"); /* * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188EU/RTL8188RU/RTL8192CU/RTL8812AU/RTL8821AU. */ #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include static void rtwn_radiotap_attach(struct rtwn_softc *); static void rtwn_vap_decrement_counters(struct rtwn_softc *, enum ieee80211_opmode, int); static void rtwn_set_ic_opmode(struct rtwn_softc *); static struct ieee80211vap *rtwn_vap_create(struct ieee80211com *, const char [IFNAMSIZ], int, enum ieee80211_opmode, int, const uint8_t [IEEE80211_ADDR_LEN], const uint8_t [IEEE80211_ADDR_LEN]); static void rtwn_vap_delete(struct ieee80211vap *); static int rtwn_read_chipid(struct rtwn_softc *); static int rtwn_ioctl_reset(struct ieee80211vap *, u_long); #ifndef RTWN_WITHOUT_UCODE static void rtwn_set_media_status(struct rtwn_softc *, union sec_param *); static int rtwn_tx_fwpkt_check(struct rtwn_softc *, struct ieee80211vap *); static int rtwn_construct_nulldata(struct rtwn_softc *, struct ieee80211vap *, uint8_t *, int); static int rtwn_push_nulldata(struct rtwn_softc *, struct ieee80211vap *); static void rtwn_pwrmode_init(void *); static void rtwn_set_pwrmode_cb(struct rtwn_softc *, union sec_param *); #endif static void rtwn_tsf_sync_adhoc(void *); static void rtwn_tsf_sync_adhoc_task(void *, int); static void rtwn_tsf_sync_enable(struct rtwn_softc *, struct ieee80211vap *); static void rtwn_set_ack_preamble(struct rtwn_softc *); static void rtwn_set_mode(struct rtwn_softc *, uint8_t, int); static int rtwn_monitor_newstate(struct ieee80211vap *, enum ieee80211_state, int); static int rtwn_newstate(struct ieee80211vap *, enum ieee80211_state, int); static void rtwn_calc_basicrates(struct rtwn_softc *); static int rtwn_run(struct rtwn_softc *, struct ieee80211vap *); #ifndef D4054 static void rtwn_watchdog(void *); #endif static void rtwn_parent(struct ieee80211com *); static int rtwn_llt_write(struct rtwn_softc *, uint32_t, uint32_t); static int rtwn_llt_init(struct rtwn_softc *); static int rtwn_dma_init(struct rtwn_softc *); static int rtwn_mac_init(struct rtwn_softc *); static void rtwn_mrr_init(struct rtwn_softc *); static void rtwn_scan_start(struct ieee80211com *); static void rtwn_scan_curchan(struct ieee80211_scan_state *, unsigned long); static void rtwn_scan_end(struct ieee80211com *); static void rtwn_getradiocaps(struct ieee80211com *, int, int *, struct ieee80211_channel[]); static void rtwn_update_chw(struct ieee80211com *); static void rtwn_set_channel(struct ieee80211com *); static int rtwn_wme_update(struct ieee80211com *); static void rtwn_update_slot(struct ieee80211com *); static void rtwn_update_slot_cb(struct rtwn_softc *, union sec_param *); static void rtwn_update_aifs(struct rtwn_softc *, uint8_t); static void rtwn_update_promisc(struct ieee80211com *); static void rtwn_update_mcast(struct ieee80211com *); static int rtwn_set_bssid(struct rtwn_softc *, const uint8_t *, int); static int rtwn_set_macaddr(struct rtwn_softc *, const uint8_t *, int); static struct ieee80211_node *rtwn_node_alloc(struct ieee80211vap *, const uint8_t mac[IEEE80211_ADDR_LEN]); static void rtwn_newassoc(struct ieee80211_node *, int); static void rtwn_node_free(struct ieee80211_node *); static void rtwn_init_beacon_reg(struct rtwn_softc *); static int rtwn_init(struct rtwn_softc *); static void rtwn_stop(struct rtwn_softc *); MALLOC_DEFINE(M_RTWN_PRIV, "rtwn_priv", "rtwn driver private state"); static const uint8_t rtwn_chan_2ghz[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 }; static const uint16_t wme2reg[] = { R92C_EDCA_BE_PARAM, R92C_EDCA_BK_PARAM, R92C_EDCA_VI_PARAM, R92C_EDCA_VO_PARAM }; int rtwn_attach(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; int error; sc->cur_bcnq_id = RTWN_VAP_ID_INVALID; RTWN_NT_LOCK_INIT(sc); rtwn_cmdq_init(sc); #ifndef D4054 callout_init_mtx(&sc->sc_watchdog_to, &sc->sc_mtx, 0); #endif callout_init(&sc->sc_calib_to, 0); callout_init(&sc->sc_pwrmode_init, 0); mbufq_init(&sc->sc_snd, ifqmaxlen); RTWN_LOCK(sc); error = rtwn_read_chipid(sc); RTWN_UNLOCK(sc); if (error != 0) { device_printf(sc->sc_dev, "unsupported test chip\n"); goto detach; } error = rtwn_read_rom(sc); if (error != 0) { device_printf(sc->sc_dev, "%s: cannot read rom, error %d\n", __func__, error); goto detach; } if (sc->macid_limit > RTWN_MACID_LIMIT) { device_printf(sc->sc_dev, "macid limit will be reduced from %d to %d\n", sc->macid_limit, RTWN_MACID_LIMIT); sc->macid_limit = RTWN_MACID_LIMIT; } if (sc->cam_entry_limit > RTWN_CAM_ENTRY_LIMIT) { device_printf(sc->sc_dev, "cam entry limit will be reduced from %d to %d\n", sc->cam_entry_limit, RTWN_CAM_ENTRY_LIMIT); sc->cam_entry_limit = RTWN_CAM_ENTRY_LIMIT; } if (sc->txdesc_len > RTWN_TX_DESC_SIZE) { device_printf(sc->sc_dev, "adjust size for Tx descriptor (current %d, needed %d)\n", RTWN_TX_DESC_SIZE, sc->txdesc_len); goto detach; } device_printf(sc->sc_dev, "MAC/BB %s, RF 6052 %dT%dR\n", sc->name, sc->ntxchains, sc->nrxchains); ic->ic_softc = sc; ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ /* set device capabilities */ ic->ic_caps = IEEE80211_C_STA /* station mode */ | IEEE80211_C_MONITOR /* monitor mode */ | IEEE80211_C_IBSS /* adhoc mode */ | IEEE80211_C_HOSTAP /* hostap mode */ #if 0 /* TODO: HRPWM register setup */ #ifndef RTWN_WITHOUT_UCODE | IEEE80211_C_PMGT /* Station-side power mgmt */ #endif #endif | IEEE80211_C_SHPREAMBLE /* short preamble supported */ | IEEE80211_C_SHSLOT /* short slot time supported */ #if 0 | IEEE80211_C_BGSCAN /* capable of bg scanning */ #endif | IEEE80211_C_WPA /* 802.11i */ | IEEE80211_C_WME /* 802.11e */ | IEEE80211_C_SWAMSDUTX /* Do software A-MSDU TX */ | IEEE80211_C_FF /* Atheros fast-frames */ ; if (sc->sc_hwcrypto != RTWN_CRYPTO_SW) { ic->ic_cryptocaps = IEEE80211_CRYPTO_WEP | IEEE80211_CRYPTO_TKIP | IEEE80211_CRYPTO_AES_CCM; } ic->ic_htcaps = IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */ | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */ | IEEE80211_HTCAP_SMPS_OFF /* SM PS mode disabled */ /* s/w capabilities */ | IEEE80211_HTC_HT /* HT operation */ | IEEE80211_HTC_AMPDU /* A-MPDU tx */ | IEEE80211_HTC_AMSDU /* A-MSDU tx */ ; if (sc->sc_ht40) { ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40 /* 40 MHz channel width */ | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */ ; } ic->ic_txstream = sc->ntxchains; ic->ic_rxstream = sc->nrxchains; /* Enable TX watchdog */ #ifdef D4054 ic->ic_flags_ext |= IEEE80211_FEXT_WATCHDOG; #endif /* Adjust capabilities. */ rtwn_adj_devcaps(sc); rtwn_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, ic->ic_channels); /* XXX TODO: setup regdomain if R92C_CHANNEL_PLAN_BY_HW bit is set. */ ieee80211_ifattach(ic); ic->ic_raw_xmit = rtwn_raw_xmit; ic->ic_scan_start = rtwn_scan_start; sc->sc_scan_curchan = ic->ic_scan_curchan; ic->ic_scan_curchan = rtwn_scan_curchan; ic->ic_scan_end = rtwn_scan_end; ic->ic_getradiocaps = rtwn_getradiocaps; ic->ic_update_chw = rtwn_update_chw; ic->ic_set_channel = rtwn_set_channel; ic->ic_transmit = rtwn_transmit; ic->ic_parent = rtwn_parent; ic->ic_vap_create = rtwn_vap_create; ic->ic_vap_delete = rtwn_vap_delete; ic->ic_wme.wme_update = rtwn_wme_update; ic->ic_updateslot = rtwn_update_slot; ic->ic_update_promisc = rtwn_update_promisc; ic->ic_update_mcast = rtwn_update_mcast; ic->ic_node_alloc = rtwn_node_alloc; ic->ic_newassoc = rtwn_newassoc; sc->sc_node_free = ic->ic_node_free; ic->ic_node_free = rtwn_node_free; rtwn_postattach(sc); rtwn_radiotap_attach(sc); if (bootverbose) ieee80211_announce(ic); return (0); detach: return (ENXIO); /* failure */ } static void rtwn_radiotap_attach(struct rtwn_softc *sc) { struct rtwn_rx_radiotap_header *rxtap = &sc->sc_rxtap; struct rtwn_tx_radiotap_header *txtap = &sc->sc_txtap; ieee80211_radiotap_attach(&sc->sc_ic, &txtap->wt_ihdr, sizeof(*txtap), RTWN_TX_RADIOTAP_PRESENT, &rxtap->wr_ihdr, sizeof(*rxtap), RTWN_RX_RADIOTAP_PRESENT); } void rtwn_sysctlattach(struct rtwn_softc *sc) { struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); #if 1 sc->sc_ht40 = 0; SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "ht40", CTLFLAG_RDTUN, &sc->sc_ht40, sc->sc_ht40, "Enable 40 MHz mode support"); #endif #ifdef RTWN_DEBUG SYSCTL_ADD_U32(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "debug", CTLFLAG_RWTUN, &sc->sc_debug, sc->sc_debug, "Control debugging printfs"); #endif sc->sc_hwcrypto = RTWN_CRYPTO_PAIR; SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "hwcrypto", CTLFLAG_RDTUN, &sc->sc_hwcrypto, sc->sc_hwcrypto, "Enable h/w crypto: " "0 - disable, 1 - pairwise keys, 2 - all keys"); if (sc->sc_hwcrypto >= RTWN_CRYPTO_MAX) sc->sc_hwcrypto = RTWN_CRYPTO_FULL; sc->sc_ratectl_sysctl = RTWN_RATECTL_NET80211; SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "ratectl", CTLFLAG_RDTUN, &sc->sc_ratectl_sysctl, sc->sc_ratectl_sysctl, "Select rate control mechanism: " "0 - disabled, 1 - via net80211, 2 - via firmware"); if (sc->sc_ratectl_sysctl >= RTWN_RATECTL_MAX) sc->sc_ratectl_sysctl = RTWN_RATECTL_FW; sc->sc_ratectl = sc->sc_ratectl_sysctl; SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "ratectl_selected", CTLFLAG_RD, &sc->sc_ratectl, sc->sc_ratectl, "Currently selected rate control mechanism (by the driver)"); } void rtwn_detach(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; if (ic->ic_softc == sc) { /* Stop command queue. */ RTWN_CMDQ_LOCK(sc); sc->sc_detached = 1; RTWN_CMDQ_UNLOCK(sc); ieee80211_draintask(ic, &sc->cmdq_task); ieee80211_ifdetach(ic); } rtwn_cmdq_destroy(sc); if (RTWN_NT_LOCK_INITIALIZED(sc)) RTWN_NT_LOCK_DESTROY(sc); } void rtwn_suspend(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; ieee80211_suspend_all(ic); } void rtwn_resume(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; ieee80211_resume_all(ic); } static void rtwn_vap_decrement_counters(struct rtwn_softc *sc, enum ieee80211_opmode opmode, int id) { RTWN_ASSERT_LOCKED(sc); if (id != RTWN_VAP_ID_INVALID) { KASSERT(id == 0 || id == 1, ("wrong vap id %d!\n", id)); KASSERT(sc->vaps[id] != NULL, ("vap pointer is NULL\n")); sc->vaps[id] = NULL; } switch (opmode) { case IEEE80211_M_HOSTAP: sc->ap_vaps--; /* FALLTHROUGH */ case IEEE80211_M_IBSS: sc->bcn_vaps--; /* FALLTHROUGH */ case IEEE80211_M_STA: sc->nvaps--; break; case IEEE80211_M_MONITOR: sc->mon_vaps--; break; default: KASSERT(0, ("wrong opmode %d\n", opmode)); break; } KASSERT(sc->vaps_running >= 0 && sc->monvaps_running >= 0, ("number of running vaps is negative (vaps %d, monvaps %d)\n", sc->vaps_running, sc->monvaps_running)); KASSERT(sc->vaps_running - sc->monvaps_running <= RTWN_PORT_COUNT, ("number of running vaps is too big (vaps %d, monvaps %d)\n", sc->vaps_running, sc->monvaps_running)); KASSERT(sc->nvaps >= 0 && sc->nvaps <= RTWN_PORT_COUNT, ("wrong value %d for nvaps\n", sc->nvaps)); KASSERT(sc->mon_vaps >= 0, ("mon_vaps is negative (%d)\n", sc->mon_vaps)); KASSERT(sc->bcn_vaps >= 0 && ((RTWN_CHIP_HAS_BCNQ1(sc) && sc->bcn_vaps <= RTWN_PORT_COUNT) || sc->bcn_vaps <= 1), ("bcn_vaps value %d is wrong\n", sc->bcn_vaps)); KASSERT(sc->ap_vaps >= 0 && ((RTWN_CHIP_HAS_BCNQ1(sc) && sc->ap_vaps <= RTWN_PORT_COUNT) || sc->ap_vaps <= 1), ("ap_vaps value %d is wrong\n", sc->ap_vaps)); } static void rtwn_set_ic_opmode(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; RTWN_ASSERT_LOCKED(sc); /* for ieee80211_reset_erp() */ if (sc->bcn_vaps - sc->ap_vaps > 0) ic->ic_opmode = IEEE80211_M_IBSS; else if (sc->ap_vaps > 0) ic->ic_opmode = IEEE80211_M_HOSTAP; else if (sc->nvaps > 0) ic->ic_opmode = IEEE80211_M_STA; else ic->ic_opmode = IEEE80211_M_MONITOR; } static struct ieee80211vap * rtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, enum ieee80211_opmode opmode, int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], const uint8_t mac[IEEE80211_ADDR_LEN]) { struct rtwn_softc *sc = ic->ic_softc; struct rtwn_vap *uvp; struct ieee80211vap *vap; int id = RTWN_VAP_ID_INVALID; RTWN_LOCK(sc); KASSERT(sc->nvaps <= RTWN_PORT_COUNT, ("nvaps overflow (%d > %d)\n", sc->nvaps, RTWN_PORT_COUNT)); KASSERT(sc->ap_vaps <= RTWN_PORT_COUNT, ("ap_vaps overflow (%d > %d)\n", sc->ap_vaps, RTWN_PORT_COUNT)); KASSERT(sc->bcn_vaps <= RTWN_PORT_COUNT, ("bcn_vaps overflow (%d > %d)\n", sc->bcn_vaps, RTWN_PORT_COUNT)); if (opmode != IEEE80211_M_MONITOR) { switch (sc->nvaps) { case 0: id = 0; break; case 1: if (sc->vaps[1] == NULL) id = 1; else if (sc->vaps[0] == NULL) id = 0; KASSERT(id != RTWN_VAP_ID_INVALID, ("no free ports left\n")); break; case 2: default: goto fail; } if (opmode == IEEE80211_M_IBSS || opmode == IEEE80211_M_HOSTAP) { if ((sc->bcn_vaps == 1 && !RTWN_CHIP_HAS_BCNQ1(sc)) || sc->bcn_vaps == RTWN_PORT_COUNT) goto fail; } } switch (opmode) { case IEEE80211_M_HOSTAP: sc->ap_vaps++; /* FALLTHROUGH */ case IEEE80211_M_IBSS: sc->bcn_vaps++; /* FALLTHROUGH */ case IEEE80211_M_STA: sc->nvaps++; break; case IEEE80211_M_MONITOR: sc->mon_vaps++; break; default: KASSERT(0, ("unknown opmode %d\n", opmode)); goto fail; } RTWN_UNLOCK(sc); uvp = malloc(sizeof(struct rtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO); uvp->id = id; if (id != RTWN_VAP_ID_INVALID) { RTWN_LOCK(sc); sc->vaps[id] = uvp; RTWN_UNLOCK(sc); } vap = &uvp->vap; /* enable s/w bmiss handling for sta mode */ if (ieee80211_vap_setup(ic, vap, name, unit, opmode, flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { /* out of memory */ free(uvp, M_80211_VAP); RTWN_LOCK(sc); rtwn_vap_decrement_counters(sc, opmode, id); RTWN_UNLOCK(sc); return (NULL); } rtwn_beacon_init(sc, &uvp->bcn_desc.txd[0], uvp->id); rtwn_vap_preattach(sc, vap); /* override state transition machine */ uvp->newstate = vap->iv_newstate; if (opmode == IEEE80211_M_MONITOR) vap->iv_newstate = rtwn_monitor_newstate; else vap->iv_newstate = rtwn_newstate; vap->iv_update_beacon = rtwn_update_beacon; vap->iv_reset = rtwn_ioctl_reset; vap->iv_key_alloc = rtwn_key_alloc; vap->iv_key_set = rtwn_key_set; vap->iv_key_delete = rtwn_key_delete; vap->iv_max_aid = sc->macid_limit; /* 802.11n parameters */ vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16; vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K; TIMEOUT_TASK_INIT(taskqueue_thread, &uvp->tx_beacon_csa, 0, rtwn_tx_beacon_csa, vap); if (opmode == IEEE80211_M_IBSS) { uvp->recv_mgmt = vap->iv_recv_mgmt; vap->iv_recv_mgmt = rtwn_adhoc_recv_mgmt; TASK_INIT(&uvp->tsf_sync_adhoc_task, 0, rtwn_tsf_sync_adhoc_task, vap); callout_init(&uvp->tsf_sync_adhoc, 0); } /* * NB: driver can select net80211 RA even when user requests * another mechanism. */ ieee80211_ratectl_init(vap); /* complete setup */ ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status, mac); RTWN_LOCK(sc); rtwn_set_ic_opmode(sc); if (sc->sc_flags & RTWN_RUNNING) { if (uvp->id != RTWN_VAP_ID_INVALID) rtwn_set_macaddr(sc, vap->iv_myaddr, uvp->id); rtwn_rxfilter_update(sc); } RTWN_UNLOCK(sc); return (vap); fail: RTWN_UNLOCK(sc); return (NULL); } static void rtwn_vap_delete(struct ieee80211vap *vap) { struct ieee80211com *ic = vap->iv_ic; struct rtwn_softc *sc = ic->ic_softc; struct rtwn_vap *uvp = RTWN_VAP(vap); /* Put vap into INIT state + stop device if needed. */ ieee80211_stop(vap); ieee80211_draintask(ic, &vap->iv_nstate_task); ieee80211_draintask(ic, &ic->ic_parent_task); RTWN_LOCK(sc); /* Cancel any unfinished Tx. */ rtwn_reset_lists(sc, vap); if (uvp->bcn_mbuf != NULL) m_freem(uvp->bcn_mbuf); rtwn_vap_decrement_counters(sc, vap->iv_opmode, uvp->id); rtwn_set_ic_opmode(sc); if (sc->sc_flags & RTWN_RUNNING) rtwn_rxfilter_update(sc); RTWN_UNLOCK(sc); if (vap->iv_opmode == IEEE80211_M_IBSS) { ieee80211_draintask(ic, &uvp->tsf_sync_adhoc_task); callout_drain(&uvp->tsf_sync_adhoc); } ieee80211_ratectl_deinit(vap); ieee80211_vap_detach(vap); free(uvp, M_80211_VAP); } static int rtwn_read_chipid(struct rtwn_softc *sc) { uint32_t reg; reg = rtwn_read_4(sc, R92C_SYS_CFG); if (reg & R92C_SYS_CFG_TRP_VAUX_EN) /* test chip */ return (EOPNOTSUPP); rtwn_read_chipid_vendor(sc, reg); return (0); } static int rtwn_ioctl_reset(struct ieee80211vap *vap, u_long cmd) { int error; switch (cmd) { #ifndef RTWN_WITHOUT_UCODE case IEEE80211_IOC_POWERSAVE: case IEEE80211_IOC_POWERSAVESLEEP: { struct rtwn_softc *sc = vap->iv_ic->ic_softc; struct rtwn_vap *uvp = RTWN_VAP(vap); if (vap->iv_opmode == IEEE80211_M_STA && uvp->id == 0) { RTWN_LOCK(sc); if (sc->sc_flags & RTWN_RUNNING) error = rtwn_set_pwrmode(sc, vap, 1); else error = 0; RTWN_UNLOCK(sc); if (error != 0) error = ENETRESET; } else error = EOPNOTSUPP; break; } #endif case IEEE80211_IOC_SHORTGI: case IEEE80211_IOC_RTSTHRESHOLD: case IEEE80211_IOC_PROTMODE: case IEEE80211_IOC_HTPROTMODE: error = 0; break; default: error = ENETRESET; break; } return (error); } #ifndef RTWN_WITHOUT_UCODE static void rtwn_set_media_status(struct rtwn_softc *sc, union sec_param *data) { sc->sc_set_media_status(sc, data->macid); } static int rtwn_tx_fwpkt_check(struct rtwn_softc *sc, struct ieee80211vap *vap) { int ntries, error; for (ntries = 0; ntries < 5; ntries++) { error = rtwn_push_nulldata(sc, vap); if (error == 0) break; } if (ntries == 5) { device_printf(sc->sc_dev, "%s: cannot push f/w frames into chip, error %d!\n", __func__, error); return (error); } return (0); } static int rtwn_construct_nulldata(struct rtwn_softc *sc, struct ieee80211vap *vap, uint8_t *ptr, int qos) { struct rtwn_vap *uvp = RTWN_VAP(vap); struct ieee80211com *ic = &sc->sc_ic; struct rtwn_tx_desc_common *txd; struct ieee80211_frame *wh; int pktlen; /* XXX obtain from net80211 */ wh = (struct ieee80211_frame *)(ptr + sc->txdesc_len); wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_DATA; wh->i_fc[1] = IEEE80211_FC1_DIR_TODS; IEEE80211_ADDR_COPY(wh->i_addr1, vap->iv_bss->ni_bssid); IEEE80211_ADDR_COPY(wh->i_addr2, vap->iv_myaddr); IEEE80211_ADDR_COPY(wh->i_addr3, vap->iv_bss->ni_macaddr); txd = (struct rtwn_tx_desc_common *)ptr; txd->offset = sc->txdesc_len; pktlen = sc->txdesc_len; if (qos) { struct ieee80211_qosframe *qwh; const int tid = WME_AC_TO_TID(WME_AC_BE); qwh = (struct ieee80211_qosframe *)wh; qwh->i_fc[0] |= IEEE80211_FC0_SUBTYPE_QOS_NULL; qwh->i_qos[0] = tid & IEEE80211_QOS_TID; txd->pktlen = htole16(sizeof(struct ieee80211_qosframe)); pktlen += sizeof(struct ieee80211_qosframe); } else { wh->i_fc[0] |= IEEE80211_FC0_SUBTYPE_NODATA; txd->pktlen = htole16(sizeof(struct ieee80211_frame)); pktlen += sizeof(struct ieee80211_frame); } rtwn_fill_tx_desc_null(sc, ptr, ic->ic_curmode == IEEE80211_MODE_11B, qos, uvp->id); return (pktlen); } static int rtwn_push_nulldata(struct rtwn_softc *sc, struct ieee80211vap *vap) { struct rtwn_vap *uvp = RTWN_VAP(vap); struct ieee80211com *ic = vap->iv_ic; struct ieee80211_channel *c = ic->ic_curchan; struct mbuf *m; uint8_t *ptr; int required_size, bcn_size, null_size, null_data, error; if (!(sc->sc_flags & RTWN_FW_LOADED)) return (0); /* requires firmware */ KASSERT(sc->page_size > 0, ("page size was not set!\n")); /* Leave some space for beacon (multi-vap) */ bcn_size = roundup(RTWN_BCN_MAX_SIZE, sc->page_size); /* 1 page for Null Data + 1 page for Qos Null Data frames. */ required_size = bcn_size + sc->page_size * 2; m = m_get2(required_size, M_NOWAIT, MT_DATA, M_PKTHDR); if (m == NULL) return (ENOMEM); /* Setup beacon descriptor. */ rtwn_beacon_set_rate(sc, &uvp->bcn_desc.txd[0], IEEE80211_IS_CHAN_5GHZ(c)); ptr = mtod(m, uint8_t *); memset(ptr, 0, required_size - sc->txdesc_len); /* Construct Null Data frame. */ ptr += bcn_size - sc->txdesc_len; null_size = rtwn_construct_nulldata(sc, vap, ptr, 0); KASSERT(null_size < sc->page_size, ("recalculate size for Null Data frame\n")); /* Construct Qos Null Data frame. */ ptr += roundup(null_size, sc->page_size); null_size = rtwn_construct_nulldata(sc, vap, ptr, 1); KASSERT(null_size < sc->page_size, ("recalculate size for Qos Null Data frame\n")); /* Do not try to detect a beacon here. */ rtwn_setbits_1_shift(sc, R92C_CR, 0, R92C_CR_ENSWBCN, 1); rtwn_setbits_1_shift(sc, R92C_FWHW_TXQ_CTRL, R92C_FWHW_TXQ_CTRL_REAL_BEACON, 0, 2); if (uvp->bcn_mbuf != NULL) { rtwn_beacon_unload(sc, uvp->id); m_freem(uvp->bcn_mbuf); } m->m_pkthdr.len = m->m_len = required_size - sc->txdesc_len; uvp->bcn_mbuf = m; error = rtwn_tx_beacon_check(sc, uvp); if (error != 0) { RTWN_DPRINTF(sc, RTWN_DEBUG_BEACON, "%s: frame was not recognized!\n", __func__); goto fail; } /* Setup addresses in firmware. */ null_data = howmany(bcn_size, sc->page_size); error = rtwn_set_rsvd_page(sc, 0, null_data, null_data + 1); if (error != 0) { device_printf(sc->sc_dev, "%s: CMD_RSVD_PAGE was not sent, error %d\n", __func__, error); goto fail; } fail: /* Re-enable beacon detection. */ rtwn_setbits_1_shift(sc, R92C_FWHW_TXQ_CTRL, 0, R92C_FWHW_TXQ_CTRL_REAL_BEACON, 2); rtwn_setbits_1_shift(sc, R92C_CR, R92C_CR_ENSWBCN, 0, 1); /* Restore beacon (if present). */ if (sc->bcn_vaps > 0 && sc->vaps[!uvp->id] != NULL) { struct rtwn_vap *uvp2 = sc->vaps[!uvp->id]; if (uvp2->curr_mode != R92C_MSR_NOLINK) error = rtwn_tx_beacon_check(sc, uvp2); } return (error); } static void rtwn_pwrmode_init(void *arg) { struct rtwn_softc *sc = arg; rtwn_cmd_sleepable(sc, NULL, 0, rtwn_set_pwrmode_cb); } static void rtwn_set_pwrmode_cb(struct rtwn_softc *sc, union sec_param *data) { struct ieee80211vap *vap = &sc->vaps[0]->vap; if (vap != NULL) rtwn_set_pwrmode(sc, vap, 1); } #endif static void rtwn_tsf_sync_adhoc(void *arg) { struct ieee80211vap *vap = arg; struct ieee80211com *ic = vap->iv_ic; struct rtwn_vap *uvp = RTWN_VAP(vap); if (uvp->curr_mode != R92C_MSR_NOLINK) { /* Do it in process context. */ ieee80211_runtask(ic, &uvp->tsf_sync_adhoc_task); } } /* * Workaround for TSF synchronization: * when BSSID filter in IBSS mode is not set * (and TSF synchronization is enabled), then any beacon may update it. * This routine synchronizes it when BSSID matching is enabled (IBSS merge * is not possible during this period). * * NOTE: there is no race with rtwn_newstate(), since it uses the same * taskqueue. */ static void rtwn_tsf_sync_adhoc_task(void *arg, int pending) { struct ieee80211vap *vap = arg; struct rtwn_vap *uvp = RTWN_VAP(vap); struct rtwn_softc *sc = vap->iv_ic->ic_softc; struct ieee80211_node *ni; RTWN_LOCK(sc); ni = ieee80211_ref_node(vap->iv_bss); /* Accept beacons with the same BSSID. */ rtwn_set_rx_bssid_all(sc, 0); /* Deny RCR updates. */ sc->sc_flags |= RTWN_RCR_LOCKED; /* Enable synchronization. */ rtwn_setbits_1(sc, R92C_BCN_CTRL(uvp->id), R92C_BCN_CTRL_DIS_TSF_UDT0, 0); /* Synchronize. */ rtwn_delay(sc, ni->ni_intval * 5 * 1000); /* Disable synchronization. */ rtwn_setbits_1(sc, R92C_BCN_CTRL(uvp->id), 0, R92C_BCN_CTRL_DIS_TSF_UDT0); /* Accept all beacons. */ sc->sc_flags &= ~RTWN_RCR_LOCKED; rtwn_set_rx_bssid_all(sc, 1); /* Schedule next TSF synchronization. */ callout_reset(&uvp->tsf_sync_adhoc, 60*hz, rtwn_tsf_sync_adhoc, vap); ieee80211_free_node(ni); RTWN_UNLOCK(sc); } static void rtwn_tsf_sync_enable(struct rtwn_softc *sc, struct ieee80211vap *vap) { struct ieee80211com *ic = &sc->sc_ic; struct rtwn_vap *uvp = RTWN_VAP(vap); /* Reset TSF. */ rtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RESET(uvp->id)); switch (vap->iv_opmode) { case IEEE80211_M_STA: /* Enable TSF synchronization. */ rtwn_setbits_1(sc, R92C_BCN_CTRL(uvp->id), R92C_BCN_CTRL_DIS_TSF_UDT0, 0); break; case IEEE80211_M_IBSS: ieee80211_runtask(ic, &uvp->tsf_sync_adhoc_task); /* FALLTHROUGH */ case IEEE80211_M_HOSTAP: /* Enable beaconing. */ rtwn_beacon_enable(sc, uvp->id, 1); break; default: device_printf(sc->sc_dev, "undefined opmode %d\n", vap->iv_opmode); return; } } static void rtwn_set_ack_preamble(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; uint32_t reg; reg = rtwn_read_4(sc, R92C_WMAC_TRXPTCL_CTL); if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) reg |= R92C_WMAC_TRXPTCL_SHPRE; else reg &= ~R92C_WMAC_TRXPTCL_SHPRE; rtwn_write_4(sc, R92C_WMAC_TRXPTCL_CTL, reg); } static void rtwn_set_mode(struct rtwn_softc *sc, uint8_t mode, int id) { rtwn_setbits_1(sc, R92C_MSR, R92C_MSR_MASK << id * 2, mode << id * 2); if (sc->vaps[id] != NULL) sc->vaps[id]->curr_mode = mode; } static int rtwn_monitor_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) { struct ieee80211com *ic = vap->iv_ic; struct rtwn_softc *sc = ic->ic_softc; struct rtwn_vap *uvp = RTWN_VAP(vap); RTWN_DPRINTF(sc, RTWN_DEBUG_STATE, "%s -> %s\n", ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]); if (vap->iv_state != nstate) { IEEE80211_UNLOCK(ic); RTWN_LOCK(sc); switch (nstate) { case IEEE80211_S_INIT: sc->vaps_running--; sc->monvaps_running--; if (sc->vaps_running == 0) { /* Turn link LED off. */ rtwn_set_led(sc, RTWN_LED_LINK, 0); } break; case IEEE80211_S_RUN: sc->vaps_running++; sc->monvaps_running++; if (sc->vaps_running == 1) { /* Turn link LED on. */ rtwn_set_led(sc, RTWN_LED_LINK, 1); } break; default: /* NOTREACHED */ break; } RTWN_UNLOCK(sc); IEEE80211_LOCK(ic); } return (uvp->newstate(vap, nstate, arg)); } static int rtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) { struct rtwn_vap *uvp = RTWN_VAP(vap); struct ieee80211com *ic = vap->iv_ic; struct rtwn_softc *sc = ic->ic_softc; enum ieee80211_state ostate; int error, early_newstate; ostate = vap->iv_state; RTWN_DPRINTF(sc, RTWN_DEBUG_STATE, "%s -> %s\n", ieee80211_state_name[ostate], ieee80211_state_name[nstate]); if (vap->iv_bss->ni_chan == IEEE80211_CHAN_ANYC && ostate == IEEE80211_S_INIT && nstate == IEEE80211_S_RUN) { /* need to call iv_newstate() firstly */ error = uvp->newstate(vap, nstate, arg); if (error != 0) return (error); early_newstate = 1; } else early_newstate = 0; if (ostate == IEEE80211_S_CSA) { taskqueue_cancel_timeout(taskqueue_thread, &uvp->tx_beacon_csa, NULL); /* * In multi-vap case second counter may not be cleared * properly. */ vap->iv_csa_count = 0; } IEEE80211_UNLOCK(ic); RTWN_LOCK(sc); if (ostate == IEEE80211_S_CSA) { /* Unblock all queues (multi-vap case). */ rtwn_write_1(sc, R92C_TXPAUSE, 0); } if ((ostate == IEEE80211_S_RUN && nstate != IEEE80211_S_CSA) || ostate == IEEE80211_S_CSA) { sc->vaps_running--; /* Set media status to 'No Link'. */ rtwn_set_mode(sc, R92C_MSR_NOLINK, uvp->id); if (vap->iv_opmode == IEEE80211_M_IBSS) { /* Stop periodical TSF synchronization. */ callout_stop(&uvp->tsf_sync_adhoc); } /* Disable TSF synchronization / beaconing. */ rtwn_beacon_enable(sc, uvp->id, 0); rtwn_setbits_1(sc, R92C_BCN_CTRL(uvp->id), 0, R92C_BCN_CTRL_DIS_TSF_UDT0); /* NB: monitor mode vaps are using port 0. */ if (uvp->id != 0 || sc->monvaps_running == 0) { /* Reset TSF. */ rtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RESET(uvp->id)); } #ifndef RTWN_WITHOUT_UCODE if ((ic->ic_caps & IEEE80211_C_PMGT) != 0 && uvp->id == 0) { /* Disable power management. */ callout_stop(&sc->sc_pwrmode_init); rtwn_set_pwrmode(sc, vap, 0); } #endif if (sc->vaps_running - sc->monvaps_running > 0) { /* Recalculate basic rates bitmap. */ rtwn_calc_basicrates(sc); } if (sc->vaps_running == sc->monvaps_running) { /* Stop calibration. */ callout_stop(&sc->sc_calib_to); /* Stop Rx of data frames. */ rtwn_write_2(sc, R92C_RXFLTMAP2, 0); /* Reset EDCA parameters. */ rtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); rtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); rtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); rtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); if (sc->vaps_running == 0) { /* Turn link LED off. */ rtwn_set_led(sc, RTWN_LED_LINK, 0); } } } error = 0; switch (nstate) { case IEEE80211_S_SCAN: /* Pause AC Tx queues. */ if (sc->vaps_running == 0) rtwn_setbits_1(sc, R92C_TXPAUSE, 0, R92C_TX_QUEUE_AC); break; case IEEE80211_S_RUN: error = rtwn_run(sc, vap); if (error != 0) { device_printf(sc->sc_dev, "%s: could not move to RUN state\n", __func__); break; } sc->vaps_running++; break; case IEEE80211_S_CSA: /* Block all Tx queues (except beacon queue). */ rtwn_setbits_1(sc, R92C_TXPAUSE, 0, R92C_TX_QUEUE_AC | R92C_TX_QUEUE_MGT | R92C_TX_QUEUE_HIGH); break; default: break; } RTWN_UNLOCK(sc); IEEE80211_LOCK(ic); if (error != 0) return (error); return (early_newstate ? 0 : uvp->newstate(vap, nstate, arg)); } static void rtwn_calc_basicrates(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; uint32_t basicrates; int i; RTWN_ASSERT_LOCKED(sc); if (ic->ic_flags & IEEE80211_F_SCAN) return; /* will be done by rtwn_scan_end(). */ basicrates = 0; for (i = 0; i < nitems(sc->vaps); i++) { struct rtwn_vap *rvp; struct ieee80211vap *vap; struct ieee80211_node *ni; uint32_t rates; rvp = sc->vaps[i]; if (rvp == NULL || rvp->curr_mode == R92C_MSR_NOLINK) continue; vap = &rvp->vap; if (vap->iv_bss == NULL) continue; ni = ieee80211_ref_node(vap->iv_bss); rtwn_get_rates(sc, &ni->ni_rates, NULL, &rates, NULL, 1); basicrates |= rates; ieee80211_free_node(ni); } if (basicrates == 0) return; /* XXX initial RTS rate? */ rtwn_set_basicrates(sc, basicrates); } static int rtwn_run(struct rtwn_softc *sc, struct ieee80211vap *vap) { struct ieee80211com *ic = vap->iv_ic; struct rtwn_vap *uvp = RTWN_VAP(vap); struct ieee80211_node *ni; uint8_t mode; int error; RTWN_ASSERT_LOCKED(sc); error = 0; ni = ieee80211_ref_node(vap->iv_bss); if (ic->ic_bsschan == IEEE80211_CHAN_ANYC || ni->ni_chan == IEEE80211_CHAN_ANYC) { error = EINVAL; goto fail; } switch (vap->iv_opmode) { case IEEE80211_M_STA: mode = R92C_MSR_INFRA; break; case IEEE80211_M_IBSS: mode = R92C_MSR_ADHOC; break; case IEEE80211_M_HOSTAP: mode = R92C_MSR_AP; break; default: KASSERT(0, ("undefined opmode %d\n", vap->iv_opmode)); error = EINVAL; goto fail; } /* Set media status to 'Associated'. */ rtwn_set_mode(sc, mode, uvp->id); /* Set AssocID. */ /* XXX multi-vap? */ rtwn_write_2(sc, R92C_BCN_PSR_RPT, 0xc000 | IEEE80211_NODE_AID(ni)); /* Set BSSID. */ rtwn_set_bssid(sc, ni->ni_bssid, uvp->id); /* Set beacon interval. */ rtwn_write_2(sc, R92C_BCN_INTERVAL(uvp->id), ni->ni_intval); if (sc->vaps_running == sc->monvaps_running) { /* Enable Rx of data frames. */ rtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); /* Flush all AC queues. */ rtwn_write_1(sc, R92C_TXPAUSE, 0); } #ifndef RTWN_WITHOUT_UCODE /* Upload (QoS) Null Data frame to firmware. */ /* Note: do this for port 0 only. */ if ((ic->ic_caps & IEEE80211_C_PMGT) != 0 && vap->iv_opmode == IEEE80211_M_STA && uvp->id == 0) { error = rtwn_tx_fwpkt_check(sc, vap); if (error != 0) goto fail; /* Setup power management. */ /* * NB: it will be enabled immediately - delay it, * so 4-Way handshake will not be interrupted. */ callout_reset(&sc->sc_pwrmode_init, 5*hz, rtwn_pwrmode_init, sc); } #endif /* Enable TSF synchronization. */ rtwn_tsf_sync_enable(sc, vap); if (vap->iv_opmode == IEEE80211_M_HOSTAP || vap->iv_opmode == IEEE80211_M_IBSS) { error = rtwn_setup_beacon(sc, ni); if (error != 0) { device_printf(sc->sc_dev, "unable to push beacon into the chip, " "error %d\n", error); goto fail; } } /* Set ACK preamble type. */ rtwn_set_ack_preamble(sc); /* Set basic rates mask. */ rtwn_calc_basicrates(sc); #ifdef RTWN_TODO rtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); rtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); rtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); rtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); rtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); rtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); #endif if (sc->vaps_running == sc->monvaps_running) { /* Reset temperature calibration state machine. */ sc->sc_flags &= ~RTWN_TEMP_MEASURED; sc->thcal_temp = sc->thermal_meter; /* Start periodic calibration. */ callout_reset(&sc->sc_calib_to, 2*hz, rtwn_calib_to, sc); if (sc->vaps_running == 0) { /* Turn link LED on. */ rtwn_set_led(sc, RTWN_LED_LINK, 1); } } fail: ieee80211_free_node(ni); return (error); } #ifndef D4054 static void rtwn_watchdog(void *arg) { struct rtwn_softc *sc = arg; struct ieee80211com *ic = &sc->sc_ic; RTWN_ASSERT_LOCKED(sc); KASSERT(sc->sc_flags & RTWN_RUNNING, ("not running")); if (sc->sc_tx_timer != 0 && --sc->sc_tx_timer == 0) { ic_printf(ic, "device timeout\n"); ieee80211_restart_all(ic); return; } callout_reset(&sc->sc_watchdog_to, hz, rtwn_watchdog, sc); } #endif static void rtwn_parent(struct ieee80211com *ic) { struct rtwn_softc *sc = ic->ic_softc; struct ieee80211vap *vap; if (ic->ic_nrunning > 0) { if (rtwn_init(sc) != 0) { IEEE80211_LOCK(ic); TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) ieee80211_stop_locked(vap); IEEE80211_UNLOCK(ic); } else ieee80211_start_all(ic); } else rtwn_stop(sc); } static int rtwn_llt_write(struct rtwn_softc *sc, uint32_t addr, uint32_t data) { int ntries, error; error = rtwn_write_4(sc, R92C_LLT_INIT, SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | SM(R92C_LLT_INIT_ADDR, addr) | SM(R92C_LLT_INIT_DATA, data)); if (error != 0) return (error); /* Wait for write operation to complete. */ for (ntries = 0; ntries < 20; ntries++) { if (MS(rtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == R92C_LLT_INIT_OP_NO_ACTIVE) return (0); rtwn_delay(sc, 10); } return (ETIMEDOUT); } static int rtwn_llt_init(struct rtwn_softc *sc) { int i, error; /* Reserve pages [0; page_count]. */ for (i = 0; i < sc->page_count; i++) { if ((error = rtwn_llt_write(sc, i, i + 1)) != 0) return (error); } /* NB: 0xff indicates end-of-list. */ if ((error = rtwn_llt_write(sc, i, 0xff)) != 0) return (error); /* * Use pages [page_count + 1; pktbuf_count - 1] * as ring buffer. */ for (++i; i < sc->pktbuf_count - 1; i++) { if ((error = rtwn_llt_write(sc, i, i + 1)) != 0) return (error); } /* Make the last page point to the beginning of the ring buffer. */ error = rtwn_llt_write(sc, i, sc->page_count + 1); return (error); } static int rtwn_dma_init(struct rtwn_softc *sc) { #define RTWN_CHK(res) do { \ if (res != 0) \ return (EIO); \ } while(0) uint16_t reg; uint8_t tx_boundary; int error; /* Initialize LLT table. */ error = rtwn_llt_init(sc); if (error != 0) return (error); /* Set the number of pages for each queue. */ RTWN_DPRINTF(sc, RTWN_DEBUG_RESET, "%s: pages per queue: high %d, normal %d, low %d, public %d\n", __func__, sc->nhqpages, sc->nnqpages, sc->nlqpages, sc->npubqpages); RTWN_CHK(rtwn_write_1(sc, R92C_RQPN_NPQ, sc->nnqpages)); RTWN_CHK(rtwn_write_4(sc, R92C_RQPN, /* Set number of pages for public queue. */ SM(R92C_RQPN_PUBQ, sc->npubqpages) | /* Set number of pages for high priority queue. */ SM(R92C_RQPN_HPQ, sc->nhqpages) | /* Set number of pages for low priority queue. */ SM(R92C_RQPN_LPQ, sc->nlqpages) | /* Load values. */ R92C_RQPN_LD)); /* Initialize TX buffer boundary. */ KASSERT(sc->page_count < 255 && sc->page_count > 0, ("page_count is %d\n", sc->page_count)); tx_boundary = sc->page_count + 1; RTWN_CHK(rtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, tx_boundary)); RTWN_CHK(rtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, tx_boundary)); RTWN_CHK(rtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, tx_boundary)); RTWN_CHK(rtwn_write_1(sc, R92C_TRXFF_BNDY, tx_boundary)); RTWN_CHK(rtwn_write_1(sc, R92C_TDECTRL + 1, tx_boundary)); error = rtwn_init_bcnq1_boundary(sc); if (error != 0) return (error); /* Set queue to USB pipe mapping. */ /* Note: PCIe devices are using some magic number here. */ reg = rtwn_get_qmap(sc); RTWN_CHK(rtwn_setbits_2(sc, R92C_TRXDMA_CTRL, R92C_TRXDMA_CTRL_QMAP_M, reg)); /* Configure Tx/Rx DMA (PCIe). */ rtwn_set_desc_addr(sc); /* Set Tx/Rx transfer page boundary. */ RTWN_CHK(rtwn_write_2(sc, R92C_TRXFF_BNDY + 2, sc->rx_dma_size - 1)); /* Set Tx/Rx transfer page size. */ rtwn_set_page_size(sc); return (0); } static int rtwn_mac_init(struct rtwn_softc *sc) { int i, error; /* Write MAC initialization values. */ for (i = 0; i < sc->mac_size; i++) { error = rtwn_write_1(sc, sc->mac_prog[i].reg, sc->mac_prog[i].val); if (error != 0) return (error); } return (0); } static void rtwn_mrr_init(struct rtwn_softc *sc) { int i; /* Drop rate index by 1 per retry. */ for (i = 0; i < R92C_DARFRC_SIZE; i++) { rtwn_write_1(sc, R92C_DARFRC + i, i + 1); rtwn_write_1(sc, R92C_RARFRC + i, i + 1); } } static void rtwn_scan_start(struct ieee80211com *ic) { struct rtwn_softc *sc = ic->ic_softc; RTWN_LOCK(sc); /* Pause beaconing. */ rtwn_setbits_1(sc, R92C_TXPAUSE, 0, R92C_TX_QUEUE_BCN); /* Receive beacons / probe responses from any BSSID. */ if (sc->bcn_vaps == 0) rtwn_set_rx_bssid_all(sc, 1); RTWN_UNLOCK(sc); } static void rtwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell) { struct rtwn_softc *sc = ss->ss_ic->ic_softc; /* Make link LED blink during scan. */ RTWN_LOCK(sc); rtwn_set_led(sc, RTWN_LED_LINK, !sc->ledlink); RTWN_UNLOCK(sc); sc->sc_scan_curchan(ss, maxdwell); } static void rtwn_scan_end(struct ieee80211com *ic) { struct rtwn_softc *sc = ic->ic_softc; RTWN_LOCK(sc); /* Restore limitations. */ if (ic->ic_promisc == 0 && sc->bcn_vaps == 0) rtwn_set_rx_bssid_all(sc, 0); /* Restore LED state. */ rtwn_set_led(sc, RTWN_LED_LINK, (sc->vaps_running != 0)); /* Restore basic rates mask. */ rtwn_calc_basicrates(sc); /* Resume beaconing. */ rtwn_setbits_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_BCN, 0); RTWN_UNLOCK(sc); } static void rtwn_getradiocaps(struct ieee80211com *ic, int maxchans, int *nchans, struct ieee80211_channel chans[]) { struct rtwn_softc *sc = ic->ic_softc; uint8_t bands[IEEE80211_MODE_BYTES]; int i; memset(bands, 0, sizeof(bands)); setbit(bands, IEEE80211_MODE_11B); setbit(bands, IEEE80211_MODE_11G); setbit(bands, IEEE80211_MODE_11NG); ieee80211_add_channel_list_2ghz(chans, maxchans, nchans, rtwn_chan_2ghz, nitems(rtwn_chan_2ghz), bands, !!(ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40)); /* XXX workaround add_channel_list() limitations */ setbit(bands, IEEE80211_MODE_11A); setbit(bands, IEEE80211_MODE_11NA); for (i = 0; i < nitems(sc->chan_num_5ghz); i++) { if (sc->chan_num_5ghz[i] == 0) continue; ieee80211_add_channel_list_5ghz(chans, maxchans, nchans, sc->chan_list_5ghz[i], sc->chan_num_5ghz[i], bands, !!(ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40)); } } static void rtwn_update_chw(struct ieee80211com *ic) { } static void rtwn_set_channel(struct ieee80211com *ic) { struct rtwn_softc *sc = ic->ic_softc; struct ieee80211_channel *c = ic->ic_curchan; RTWN_LOCK(sc); rtwn_set_chan(sc, c); sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq); sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags); sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq); sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags); RTWN_UNLOCK(sc); } static int rtwn_wme_update(struct ieee80211com *ic) { struct ieee80211_channel *c = ic->ic_curchan; struct rtwn_softc *sc = ic->ic_softc; struct wmeParams *wmep = sc->cap_wmeParams; uint8_t aifs, acm, slottime; int ac; /* Prevent possible races. */ IEEE80211_LOCK(ic); /* XXX */ RTWN_LOCK(sc); memcpy(wmep, ic->ic_wme.wme_chanParams.cap_wmeParams, sizeof(sc->cap_wmeParams)); RTWN_UNLOCK(sc); IEEE80211_UNLOCK(ic); acm = 0; slottime = IEEE80211_GET_SLOTTIME(ic); RTWN_LOCK(sc); for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ aifs = wmep[ac].wmep_aifsn * slottime + (IEEE80211_IS_CHAN_5GHZ(c) ? IEEE80211_DUR_OFDM_SIFS : IEEE80211_DUR_SIFS); rtwn_write_4(sc, wme2reg[ac], SM(R92C_EDCA_PARAM_TXOP, wmep[ac].wmep_txopLimit) | SM(R92C_EDCA_PARAM_ECWMIN, wmep[ac].wmep_logcwmin) | SM(R92C_EDCA_PARAM_ECWMAX, wmep[ac].wmep_logcwmax) | SM(R92C_EDCA_PARAM_AIFS, aifs)); if (ac != WME_AC_BE) acm |= wmep[ac].wmep_acm << ac; } if (acm != 0) acm |= R92C_ACMHWCTRL_EN; rtwn_setbits_1(sc, R92C_ACMHWCTRL, R92C_ACMHWCTRL_ACM_MASK, acm); RTWN_UNLOCK(sc); return 0; } static void rtwn_update_slot(struct ieee80211com *ic) { rtwn_cmd_sleepable(ic->ic_softc, NULL, 0, rtwn_update_slot_cb); } static void rtwn_update_slot_cb(struct rtwn_softc *sc, union sec_param *data) { struct ieee80211com *ic = &sc->sc_ic; uint8_t slottime; slottime = IEEE80211_GET_SLOTTIME(ic); RTWN_DPRINTF(sc, RTWN_DEBUG_STATE, "%s: setting slot time to %uus\n", __func__, slottime); rtwn_write_1(sc, R92C_SLOT, slottime); rtwn_update_aifs(sc, slottime); } static void rtwn_update_aifs(struct rtwn_softc *sc, uint8_t slottime) { struct ieee80211_channel *c = sc->sc_ic.ic_curchan; const struct wmeParams *wmep = sc->cap_wmeParams; uint8_t aifs, ac; for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ aifs = wmep[ac].wmep_aifsn * slottime + (IEEE80211_IS_CHAN_5GHZ(c) ? IEEE80211_DUR_OFDM_SIFS : IEEE80211_DUR_SIFS); rtwn_write_1(sc, wme2reg[ac], aifs); } } static void rtwn_update_promisc(struct ieee80211com *ic) { struct rtwn_softc *sc = ic->ic_softc; RTWN_LOCK(sc); if (sc->sc_flags & RTWN_RUNNING) rtwn_set_promisc(sc); RTWN_UNLOCK(sc); } static void rtwn_update_mcast(struct ieee80211com *ic) { struct rtwn_softc *sc = ic->ic_softc; RTWN_LOCK(sc); if (sc->sc_flags & RTWN_RUNNING) rtwn_set_multi(sc); RTWN_UNLOCK(sc); } static int rtwn_set_bssid(struct rtwn_softc *sc, const uint8_t *bssid, int id) { int error; error = rtwn_write_4(sc, R92C_BSSID(id), le32dec(&bssid[0])); if (error != 0) return (error); error = rtwn_write_2(sc, R92C_BSSID(id) + 4, le16dec(&bssid[4])); return (error); } static int rtwn_set_macaddr(struct rtwn_softc *sc, const uint8_t *addr, int id) { int error; error = rtwn_write_4(sc, R92C_MACID(id), le32dec(&addr[0])); if (error != 0) return (error); error = rtwn_write_2(sc, R92C_MACID(id) + 4, le16dec(&addr[4])); return (error); } static struct ieee80211_node * rtwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN]) { struct rtwn_node *un; un = malloc(sizeof (struct rtwn_node), M_80211_NODE, M_NOWAIT | M_ZERO); if (un == NULL) return NULL; un->id = RTWN_MACID_UNDEFINED; un->avg_pwdb = -1; return &un->ni; } static void rtwn_newassoc(struct ieee80211_node *ni, int isnew) { struct rtwn_softc *sc = ni->ni_ic->ic_softc; struct rtwn_node *un = RTWN_NODE(ni); int id; if (!isnew) return; RTWN_NT_LOCK(sc); for (id = 0; id <= sc->macid_limit; id++) { if (id != RTWN_MACID_BC && sc->node_list[id] == NULL) { un->id = id; sc->node_list[id] = ni; break; } } RTWN_NT_UNLOCK(sc); if (id > sc->macid_limit) { device_printf(sc->sc_dev, "%s: node table is full\n", __func__); return; } #ifndef RTWN_WITHOUT_UCODE /* Notify firmware. */ id |= RTWN_MACID_VALID; rtwn_cmd_sleepable(sc, &id, sizeof(id), rtwn_set_media_status); #endif } static void rtwn_node_free(struct ieee80211_node *ni) { struct rtwn_softc *sc = ni->ni_ic->ic_softc; struct rtwn_node *un = RTWN_NODE(ni); RTWN_NT_LOCK(sc); if (un->id != RTWN_MACID_UNDEFINED) { sc->node_list[un->id] = NULL; #ifndef RTWN_WITHOUT_UCODE rtwn_cmd_sleepable(sc, &un->id, sizeof(un->id), rtwn_set_media_status); #endif } RTWN_NT_UNLOCK(sc); sc->sc_node_free(ni); } static void rtwn_init_beacon_reg(struct rtwn_softc *sc) { rtwn_write_1(sc, R92C_BCN_CTRL(0), R92C_BCN_CTRL_DIS_TSF_UDT0); rtwn_write_1(sc, R92C_BCN_CTRL(1), R92C_BCN_CTRL_DIS_TSF_UDT0); rtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); rtwn_write_1(sc, R92C_DRVERLYINT, 0x05); rtwn_write_1(sc, R92C_BCNDMATIM, 0x02); rtwn_write_2(sc, R92C_BCNTCFG, 0x660f); } static int rtwn_init(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; int i, error; RTWN_LOCK(sc); if (sc->sc_flags & RTWN_RUNNING) { RTWN_UNLOCK(sc); return (0); } sc->sc_flags |= RTWN_STARTED; /* Power on adapter. */ error = rtwn_power_on(sc); if (error != 0) goto fail; #ifndef RTWN_WITHOUT_UCODE /* Load 8051 microcode. */ error = rtwn_load_firmware(sc); if (error == 0) sc->sc_flags |= RTWN_FW_LOADED; /* Init firmware commands ring. */ sc->fwcur = 0; #endif /* Initialize MAC block. */ error = rtwn_mac_init(sc); if (error != 0) { device_printf(sc->sc_dev, "%s: error while initializing MAC block\n", __func__); goto fail; } /* Initialize DMA. */ error = rtwn_dma_init(sc); if (error != 0) goto fail; /* Drop incorrect TX (USB). */ rtwn_drop_incorrect_tx(sc); /* Set info size in Rx descriptors (in 64-bit words). */ rtwn_write_1(sc, R92C_RX_DRVINFO_SZ, R92C_RX_DRVINFO_SZ_DEF); /* Init interrupts. */ rtwn_init_intr(sc); for (i = 0; i < nitems(sc->vaps); i++) { struct rtwn_vap *uvp = sc->vaps[i]; /* Set initial network type. */ rtwn_set_mode(sc, R92C_MSR_NOLINK, i); if (uvp == NULL) continue; /* Set MAC address. */ error = rtwn_set_macaddr(sc, uvp->vap.iv_myaddr, uvp->id); if (error != 0) goto fail; } /* Initialize Rx filter. */ rtwn_rxfilter_init(sc); /* Set short/long retry limits. */ rtwn_write_2(sc, R92C_RL, SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); /* Initialize EDCA parameters. */ rtwn_init_edca(sc); rtwn_setbits_1(sc, R92C_FWHW_TXQ_CTRL, 0, R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); /* Set ACK timeout. */ rtwn_write_1(sc, R92C_ACKTO, sc->ackto); /* Setup aggregation. */ /* Tx aggregation. */ rtwn_init_tx_agg(sc); rtwn_init_rx_agg(sc); /* Initialize beacon parameters. */ rtwn_init_beacon_reg(sc); /* Init A-MPDU parameters. */ rtwn_init_ampdu(sc); /* Init MACTXEN / MACRXEN after setting RxFF boundary. */ rtwn_setbits_1(sc, R92C_CR, 0, R92C_CR_MACTXEN | R92C_CR_MACRXEN); /* Initialize BB/RF blocks. */ rtwn_init_bb(sc); rtwn_init_rf(sc); /* Initialize wireless band. */ rtwn_set_chan(sc, ic->ic_curchan); /* Clear per-station keys table. */ rtwn_init_cam(sc); /* Enable decryption / encryption. */ rtwn_init_seccfg(sc); /* Install static keys (if any). */ for (i = 0; i < nitems(sc->vaps); i++) { if (sc->vaps[i] != NULL) { error = rtwn_init_static_keys(sc, sc->vaps[i]); if (error != 0) goto fail; } } /* Initialize antenna selection. */ rtwn_init_antsel(sc); /* Enable hardware sequence numbering. */ rtwn_write_1(sc, R92C_HWSEQ_CTRL, R92C_TX_QUEUE_ALL); /* Disable BAR. */ rtwn_write_4(sc, R92C_BAR_MODE_CTRL, 0x0201ffff); /* NAV limit. */ rtwn_write_1(sc, R92C_NAV_UPPER, 0); /* Initialize GPIO setting. */ rtwn_setbits_1(sc, R92C_GPIO_MUXCFG, R92C_GPIO_MUXCFG_ENBT, 0); /* Initialize MRR. */ rtwn_mrr_init(sc); /* Device-specific post initialization. */ rtwn_post_init(sc); rtwn_start_xfers(sc); #ifndef D4054 callout_reset(&sc->sc_watchdog_to, hz, rtwn_watchdog, sc); #endif sc->sc_flags |= RTWN_RUNNING; fail: RTWN_UNLOCK(sc); return (error); } static void rtwn_stop(struct rtwn_softc *sc) { RTWN_LOCK(sc); if (!(sc->sc_flags & RTWN_STARTED)) { RTWN_UNLOCK(sc); return; } #ifndef D4054 callout_stop(&sc->sc_watchdog_to); sc->sc_tx_timer = 0; #endif sc->sc_flags &= ~(RTWN_STARTED | RTWN_RUNNING | RTWN_FW_LOADED); sc->sc_flags &= ~RTWN_TEMP_MEASURED; sc->fwver = 0; sc->thcal_temp = 0; sc->cur_bcnq_id = RTWN_VAP_ID_INVALID; + bzero(&sc->last_physt, sizeof(sc->last_physt)); #ifdef D4054 ieee80211_tx_watchdog_stop(&sc->sc_ic); #endif rtwn_abort_xfers(sc); rtwn_drain_mbufq(sc); rtwn_power_off(sc); rtwn_reset_lists(sc, NULL); RTWN_UNLOCK(sc); } MODULE_VERSION(rtwn, 2); MODULE_DEPEND(rtwn, wlan, 1, 1, 1); #ifndef RTWN_WITHOUT_UCODE MODULE_DEPEND(rtwn, firmware, 1, 1, 1); #endif Index: head/sys/dev/rtwn/if_rtwn_rx.c =================================================================== --- head/sys/dev/rtwn/if_rtwn_rx.c (revision 312314) +++ head/sys/dev/rtwn/if_rtwn_rx.c (revision 312315) @@ -1,464 +1,517 @@ /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2014 Kevin Lo * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include void rtwn_get_rates(struct rtwn_softc *sc, const struct ieee80211_rateset *rs, const struct ieee80211_htrateset *rs_ht, uint32_t *rates_p, int *maxrate_p, int basic_rates) { uint32_t rates; uint8_t ridx; int i, maxrate; /* Get rates mask. */ rates = 0; maxrate = 0; /* This is for 11bg */ for (i = 0; i < rs->rs_nrates; i++) { /* Convert 802.11 rate to HW rate index. */ ridx = rate2ridx(IEEE80211_RV(rs->rs_rates[i])); if (ridx == RTWN_RIDX_UNKNOWN) /* Unknown rate, skip. */ continue; if (((rs->rs_rates[i] & IEEE80211_RATE_BASIC) != 0) || !basic_rates) { rates |= 1 << ridx; if (ridx > maxrate) maxrate = ridx; } } /* If we're doing 11n, enable 11n rates */ if (rs_ht != NULL && !basic_rates) { for (i = 0; i < rs_ht->rs_nrates; i++) { if ((rs_ht->rs_rates[i] & 0x7f) > 0xf) continue; /* 11n rates start at index 12 */ ridx = RTWN_RIDX_MCS((rs_ht->rs_rates[i]) & 0xf); rates |= (1 << ridx); /* Guard against the rate table being oddly ordered */ if (ridx > maxrate) maxrate = ridx; } } RTWN_DPRINTF(sc, RTWN_DEBUG_RA, "%s: rates 0x%08X, maxrate %d\n", __func__, rates, maxrate); if (rates_p != NULL) *rates_p = rates; if (maxrate_p != NULL) *maxrate_p = maxrate; } void rtwn_set_basicrates(struct rtwn_softc *sc, uint32_t rates) { RTWN_DPRINTF(sc, RTWN_DEBUG_RA, "%s: rates 0x%08X\n", __func__, rates); rtwn_setbits_4(sc, R92C_RRSR, R92C_RRSR_RATE_BITMAP_M, rates); } static void -rtwn_update_avgrssi(struct rtwn_softc *sc, struct rtwn_node *un, int rate) +rtwn_update_avgrssi(struct rtwn_softc *sc, struct rtwn_node *un, int8_t rssi, + int is_cck) { int pwdb; /* Convert antenna signal to percentage. */ - if (un->last_rssi <= -100 || un->last_rssi >= 20) + if (rssi <= -100 || rssi >= 20) pwdb = 0; - else if (un->last_rssi >= 0) + else if (rssi >= 0) pwdb = 100; else - pwdb = 100 + un->last_rssi; - if (RTWN_RATE_IS_CCK(rate)) { + pwdb = 100 + rssi; + if (is_cck) { /* CCK gain is smaller than OFDM/MCS gain. */ pwdb += 6; if (pwdb > 100) pwdb = 100; if (pwdb <= 14) pwdb -= 4; else if (pwdb <= 26) pwdb -= 8; else if (pwdb <= 34) pwdb -= 6; else if (pwdb <= 42) pwdb -= 2; } if (un->avg_pwdb == -1) /* Init. */ un->avg_pwdb = pwdb; else if (un->avg_pwdb < pwdb) un->avg_pwdb = ((un->avg_pwdb * 19 + pwdb) / 20) + 1; else un->avg_pwdb = ((un->avg_pwdb * 19 + pwdb) / 20); RTWN_DPRINTF(sc, RTWN_DEBUG_RSSI, "MACID %d, PWDB %d, EMA %d\n", un->id, pwdb, un->avg_pwdb); } static int8_t -rtwn_get_rssi(struct rtwn_softc *sc, int rate, void *physt) +rtwn_get_rssi(struct rtwn_softc *sc, void *physt, int is_cck) { int8_t rssi; - if (RTWN_RATE_IS_CCK(rate)) + if (is_cck) rssi = rtwn_get_rssi_cck(sc, physt); else /* OFDM/HT. */ rssi = rtwn_get_rssi_ofdm(sc, physt); return (rssi); } static uint32_t rtwn_get_tsf_low(struct rtwn_softc *sc, int id) { return (rtwn_read_4(sc, R92C_TSFTR(id))); } static uint32_t rtwn_get_tsf_high(struct rtwn_softc *sc, int id) { return (rtwn_read_4(sc, R92C_TSFTR(id) + 4)); } static void rtwn_get_tsf(struct rtwn_softc *sc, uint64_t *buf, int id) { /* NB: we cannot read it at once. */ *buf = rtwn_get_tsf_high(sc, id); *buf <<= 32; *buf += rtwn_get_tsf_low(sc, id); } +static uint64_t +rtwn_extend_rx_tsf(struct rtwn_softc *sc, const struct r92c_rx_stat *stat) +{ + uint64_t tsft; + uint32_t rxdw3, tsfl, tsfl_curr; + int id; + + rxdw3 = le32toh(stat->rxdw3); + tsfl = le32toh(stat->tsf_low); + id = MS(rxdw3, R92C_RXDW3_BSSID_FIT); + + switch (id) { + case 1: + case 2: + id >>= 1; + tsfl_curr = rtwn_get_tsf_low(sc, id); + break; + default: + { + uint32_t tsfl0, tsfl1; + + tsfl0 = rtwn_get_tsf_low(sc, 0); + tsfl1 = rtwn_get_tsf_low(sc, 1); + + if (abs(tsfl0 - tsfl) < abs(tsfl1 - tsfl)) { + id = 0; + tsfl_curr = tsfl0; + } else { + id = 1; + tsfl_curr = tsfl1; + } + break; + } + } + + tsft = rtwn_get_tsf_high(sc, id); + if (tsfl > tsfl_curr && tsfl > 0xffff0000) + tsft--; + tsft <<= 32; + tsft += tsfl; + + return (tsft); +} + struct ieee80211_node * -rtwn_rx_common(struct rtwn_softc *sc, struct mbuf *m, void *desc, - int8_t *rssi) +rtwn_rx_common(struct rtwn_softc *sc, struct mbuf *m, void *desc) { struct ieee80211com *ic = &sc->sc_ic; struct ieee80211_node *ni; struct ieee80211_frame_min *wh; + struct ieee80211_rx_stats rxs; struct rtwn_node *un; struct r92c_rx_stat *stat; - uint32_t rxdw0, rxdw3; - int cipher, infosz, pktlen, rate, shift; + void *physt; + uint32_t rxdw0; + int8_t rssi; + int cipher, infosz, is_cck, pktlen, shift; stat = desc; rxdw0 = le32toh(stat->rxdw0); - rxdw3 = le32toh(stat->rxdw3); cipher = MS(rxdw0, R92C_RXDW0_CIPHER); infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); shift = MS(rxdw0, R92C_RXDW0_SHIFT); - rate = MS(rxdw3, R92C_RXDW3_RATE); wh = (struct ieee80211_frame_min *)(mtodo(m, shift + infosz)); if ((wh->i_fc[1] & IEEE80211_FC1_PROTECTED) && cipher != R92C_CAM_ALGO_NONE) m->m_flags |= M_WEP; - if (pktlen >= sizeof(*wh)) + if (pktlen >= sizeof(*wh)) { ni = ieee80211_find_rxnode(ic, wh); - else + if (ni != NULL && (ni->ni_flags & IEEE80211_NODE_HT)) + m->m_flags |= M_AMPDU; + } else ni = NULL; un = RTWN_NODE(ni); - /* Get RSSI from PHY status descriptor if present. */ - if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { - *rssi = rtwn_get_rssi(sc, rate, mtod(m, void *)); - RTWN_DPRINTF(sc, RTWN_DEBUG_RSSI, "%s: rssi %d, ridx %d\n", - __func__, *rssi, rate); + if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) + physt = (void *)mtodo(m, shift); + else + physt = (un != NULL) ? &un->last_physt : &sc->last_physt; - sc->last_rssi = *rssi; - if (un != NULL) { - un->last_rssi = *rssi; + bzero(&rxs, sizeof(rxs)); + rtwn_get_rx_stats(sc, &rxs, desc, physt); + if (rxs.c_pktflags & IEEE80211_RX_F_AMPDU) { + /* Next MPDU will come without PHY info. */ + memcpy(&sc->last_physt, physt, sizeof(sc->last_physt)); + if (un != NULL) + memcpy(&un->last_physt, physt, sizeof(sc->last_physt)); + } - /* Update our average RSSI. */ - rtwn_update_avgrssi(sc, un, rate); - } - } else - *rssi = (un != NULL) ? un->last_rssi : sc->last_rssi; + /* Add some common bits. */ + /* NB: should not happen. */ + if (rxdw0 & R92C_RXDW0_CRCERR) + rxs.c_pktflags |= IEEE80211_RX_F_FAIL_FCSCRC; - if (ieee80211_radiotap_active(ic)) { - struct rtwn_rx_radiotap_header *tap = &sc->sc_rxtap; - int id = RTWN_VAP_ID_INVALID; + rxs.r_flags |= IEEE80211_R_TSF_START; /* XXX undocumented */ + rxs.r_flags |= IEEE80211_R_TSF64; + rxs.c_rx_tsf = rtwn_extend_rx_tsf(sc, stat); - if (ni != NULL) - id = RTWN_VAP(ni->ni_vap)->id; - if (id == RTWN_VAP_ID_INVALID) - id = 0; + /* Get RSSI from PHY status descriptor. */ + is_cck = (rxs.c_pktflags & IEEE80211_RX_F_CCK) != 0; + rssi = rtwn_get_rssi(sc, physt, is_cck); - tap->wr_flags = rtwn_rx_radiotap_flags(sc, desc); - tap->wr_tsft = rtwn_get_tsf_high(sc, id); - if (le32toh(stat->tsf_low) > rtwn_get_tsf_low(sc, id)) - tap->wr_tsft--; - tap->wr_tsft = (uint64_t)htole32(tap->wr_tsft) << 32; - tap->wr_tsft += stat->tsf_low; + /* XXX TODO: we really need a rate-to-string method */ + RTWN_DPRINTF(sc, RTWN_DEBUG_RSSI, "%s: rssi %d, rate %d\n", + __func__, rssi, rxs.c_rate); + if (un != NULL && infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { + /* Update our average RSSI. */ + rtwn_update_avgrssi(sc, un, rssi, is_cck); + } - /* XXX 20/40? */ + rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI; + rxs.c_nf = RTWN_NOISE_FLOOR; + rxs.c_rssi = rssi - rxs.c_nf; + (void) ieee80211_add_rx_params(m, &rxs); - /* Map HW rate index to 802.11 rate. */ - if (rate < RTWN_RIDX_MCS(0)) - tap->wr_rate = ridx2rate[rate]; - else /* MCS0~15. */ - tap->wr_rate = IEEE80211_RATE_MCS | (rate - 12); + if (ieee80211_radiotap_active(ic)) { + struct rtwn_rx_radiotap_header *tap = &sc->sc_rxtap; - tap->wr_dbm_antsignal = *rssi; - tap->wr_dbm_antnoise = RTWN_NOISE_FLOOR; + tap->wr_flags = rtwn_rx_radiotap_flags(sc, desc); + tap->wr_tsft = htole64(rxs.c_rx_tsf); + tap->wr_rate = rxs.c_rate; + tap->wr_dbm_antsignal = rssi; + tap->wr_dbm_antnoise = rxs.c_nf; } /* Drop PHY descriptor. */ m_adj(m, infosz + shift); return (ni); } void rtwn_adhoc_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, const struct ieee80211_rx_stats *rxs, int rssi, int nf) { struct ieee80211vap *vap = ni->ni_vap; struct rtwn_softc *sc = vap->iv_ic->ic_softc; struct rtwn_vap *uvp = RTWN_VAP(vap); uint64_t ni_tstamp, curr_tstamp; uvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); if (vap->iv_state == IEEE80211_S_RUN && (subtype == IEEE80211_FC0_SUBTYPE_BEACON || subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { ni_tstamp = le64toh(ni->ni_tstamp.tsf); RTWN_LOCK(sc); rtwn_get_tsf(sc, &curr_tstamp, uvp->id); RTWN_UNLOCK(sc); if (ni_tstamp >= curr_tstamp) (void) ieee80211_ibss_merge(ni); } } static uint8_t rtwn_get_multi_pos(const uint8_t maddr[]) { uint64_t mask = 0x00004d101df481b4; uint8_t pos = 0x27; /* initial value */ int i, j; for (i = 0; i < IEEE80211_ADDR_LEN; i++) for (j = (i == 0) ? 1 : 0; j < 8; j++) if ((maddr[i] >> j) & 1) pos ^= (mask >> (i * 8 + j - 1)); pos &= 0x3f; return (pos); } void rtwn_set_multi(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; uint32_t mfilt[2]; RTWN_ASSERT_LOCKED(sc); /* general structure was copied from ath(4). */ if (ic->ic_allmulti == 0) { struct ieee80211vap *vap; struct ifnet *ifp; struct ifmultiaddr *ifma; /* * Merge multicast addresses to form the hardware filter. */ mfilt[0] = mfilt[1] = 0; TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) { ifp = vap->iv_ifp; if_maddr_rlock(ifp); TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { caddr_t dl; uint8_t pos; dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); pos = rtwn_get_multi_pos(dl); mfilt[pos / 32] |= (1 << (pos % 32)); } if_maddr_runlock(ifp); } } else mfilt[0] = mfilt[1] = ~0; rtwn_write_4(sc, R92C_MAR + 0, mfilt[0]); rtwn_write_4(sc, R92C_MAR + 4, mfilt[1]); RTWN_DPRINTF(sc, RTWN_DEBUG_STATE, "%s: MC filter %08x:%08x\n", __func__, mfilt[0], mfilt[1]); } static void rtwn_rxfilter_update_mgt(struct rtwn_softc *sc) { uint16_t filter; filter = 0x7f7f; if (sc->bcn_vaps == 0) { /* STA and/or MONITOR mode vaps */ filter &= ~( R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_REQ) | R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_REQ) | R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_PROBE_REQ)); } if (sc->ap_vaps == sc->nvaps - sc->mon_vaps) { /* AP vaps only */ filter &= ~( R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_RESP) | R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_RESP)); } rtwn_write_2(sc, R92C_RXFLTMAP0, filter); } void rtwn_rxfilter_update(struct rtwn_softc *sc) { RTWN_ASSERT_LOCKED(sc); /* Filter for management frames. */ rtwn_rxfilter_update_mgt(sc); /* Update Rx filter. */ rtwn_set_promisc(sc); } void rtwn_rxfilter_init(struct rtwn_softc *sc) { RTWN_ASSERT_LOCKED(sc); /* Setup multicast filter. */ rtwn_set_multi(sc); /* Reject all control frames. */ rtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); /* Reject all data frames. */ rtwn_write_2(sc, R92C_RXFLTMAP2, 0x0000); /* Append generic Rx filter bits. */ sc->rcr |= R92C_RCR_AM | R92C_RCR_AB | R92C_RCR_APM | R92C_RCR_HTC_LOC_CTRL | R92C_RCR_APP_PHYSTS | R92C_RCR_APP_ICV | R92C_RCR_APP_MIC; /* Update dynamic Rx filter parts. */ rtwn_rxfilter_update(sc); } void rtwn_rxfilter_set(struct rtwn_softc *sc) { if (!(sc->sc_flags & RTWN_RCR_LOCKED)) rtwn_write_4(sc, R92C_RCR, sc->rcr); } void rtwn_set_rx_bssid_all(struct rtwn_softc *sc, int enable) { if (enable) sc->rcr &= ~R92C_RCR_CBSSID_BCN; else sc->rcr |= R92C_RCR_CBSSID_BCN; rtwn_rxfilter_set(sc); } void rtwn_set_promisc(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; uint32_t mask_all, mask_min; RTWN_ASSERT_LOCKED(sc); mask_all = R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | R92C_RCR_AAP; mask_min = R92C_RCR_APM; if (sc->bcn_vaps == 0) mask_min |= R92C_RCR_CBSSID_BCN; if (sc->ap_vaps == 0) mask_min |= R92C_RCR_CBSSID_DATA; if (ic->ic_promisc == 0 && sc->mon_vaps == 0) { if (sc->bcn_vaps != 0) mask_all |= R92C_RCR_CBSSID_BCN; if (sc->ap_vaps != 0) /* for Null data frames */ mask_all |= R92C_RCR_CBSSID_DATA; sc->rcr &= ~mask_all; sc->rcr |= mask_min; } else { sc->rcr &= ~mask_min; sc->rcr |= mask_all; } rtwn_rxfilter_set(sc); } Index: head/sys/dev/rtwn/if_rtwn_rx.h =================================================================== --- head/sys/dev/rtwn/if_rtwn_rx.h (revision 312314) +++ head/sys/dev/rtwn/if_rtwn_rx.h (revision 312315) @@ -1,39 +1,39 @@ /*- * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * $FreeBSD$ */ #ifndef IF_RTWN_RX_H #define IF_RTWN_RX_H #define RTWN_NOISE_FLOOR -95 void rtwn_get_rates(struct rtwn_softc *, const struct ieee80211_rateset *, const struct ieee80211_htrateset *, uint32_t *, int *, int); void rtwn_set_basicrates(struct rtwn_softc *, uint32_t); struct ieee80211_node * rtwn_rx_common(struct rtwn_softc *, struct mbuf *, - void *, int8_t *); + void *); void rtwn_adhoc_recv_mgmt(struct ieee80211_node *, struct mbuf *, int, const struct ieee80211_rx_stats *, int, int); void rtwn_set_multi(struct rtwn_softc *); void rtwn_rxfilter_update(struct rtwn_softc *); void rtwn_rxfilter_init(struct rtwn_softc *); void rtwn_rxfilter_set(struct rtwn_softc *); void rtwn_set_rx_bssid_all(struct rtwn_softc *, int); void rtwn_set_promisc(struct rtwn_softc *); #endif /* IF_RTWN_RX_H */ Index: head/sys/dev/rtwn/if_rtwnvar.h =================================================================== --- head/sys/dev/rtwn/if_rtwnvar.h (revision 312314) +++ head/sys/dev/rtwn/if_rtwnvar.h (revision 312315) @@ -1,624 +1,636 @@ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $ * $FreeBSD$ */ #ifndef IF_RTWNVAR_H #define IF_RTWNVAR_H #include "opt_rtwn.h" #define RTWN_TX_DESC_SIZE 64 #define RTWN_TXBUFSZ (16 * 1024) #define RTWN_BCN_MAX_SIZE 512 #define RTWN_CAM_ENTRY_LIMIT 64 #define RTWN_MACID_BC 1 /* Broadcast. */ #define RTWN_MACID_UNDEFINED 0x7fff #define RTWN_MACID_VALID 0x8000 #define RTWN_MACID_LIMIT 128 #define RTWN_TX_TIMEOUT 5000 /* ms */ #define RTWN_MAX_EPOUT 4 #define RTWN_PORT_COUNT 2 #define RTWN_LED_LINK 0 #define RTWN_LED_DATA 1 struct rtwn_rx_radiotap_header { struct ieee80211_radiotap_header wr_ihdr; uint64_t wr_tsft; uint8_t wr_flags; uint8_t wr_rate; uint16_t wr_chan_freq; uint16_t wr_chan_flags; int8_t wr_dbm_antsignal; int8_t wr_dbm_antnoise; } __packed __aligned(8); #define RTWN_RX_RADIOTAP_PRESENT \ (1 << IEEE80211_RADIOTAP_TSFT | \ 1 << IEEE80211_RADIOTAP_FLAGS | \ 1 << IEEE80211_RADIOTAP_RATE | \ 1 << IEEE80211_RADIOTAP_CHANNEL | \ 1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL | \ 1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) struct rtwn_tx_radiotap_header { struct ieee80211_radiotap_header wt_ihdr; uint8_t wt_flags; uint16_t wt_chan_freq; uint16_t wt_chan_flags; } __packed __aligned(8); #define RTWN_TX_RADIOTAP_PRESENT \ (1 << IEEE80211_RADIOTAP_FLAGS | \ 1 << IEEE80211_RADIOTAP_CHANNEL) struct rtwn_tx_buf { uint8_t txd[RTWN_TX_DESC_SIZE]; } __attribute__((aligned(4))); +#define RTWN_PHY_STATUS_SIZE 32 +struct rtwn_tx_phystat { + uint32_t phydw[RTWN_PHY_STATUS_SIZE / sizeof(uint32_t)]; +}; + + struct rtwn_softc; union sec_param { struct ieee80211_key key; int macid; }; #define CMD_FUNC_PROTO void (*func)(struct rtwn_softc *, \ union sec_param *) struct rtwn_cmdq { union sec_param data; CMD_FUNC_PROTO; }; #define RTWN_CMDQ_SIZE 16 struct rtwn_node { struct ieee80211_node ni; /* must be the first */ int id; - int8_t last_rssi; + + struct rtwn_tx_phystat last_physt; int avg_pwdb; }; #define RTWN_NODE(ni) ((struct rtwn_node *)(ni)) struct rtwn_vap { struct ieee80211vap vap; int id; #define RTWN_VAP_ID_INVALID -1 int curr_mode; struct rtwn_tx_buf bcn_desc; struct mbuf *bcn_mbuf; struct timeout_task tx_beacon_csa; struct callout tsf_sync_adhoc; struct task tsf_sync_adhoc_task; const struct ieee80211_key *keys[IEEE80211_WEP_NKID]; int (*newstate)(struct ieee80211vap *, enum ieee80211_state, int); void (*recv_mgmt)(struct ieee80211_node *, struct mbuf *, int, const struct ieee80211_rx_stats *, int, int); }; #define RTWN_VAP(vap) ((struct rtwn_vap *)(vap)) /* * Rx data types. */ enum { RTWN_RX_DATA, RTWN_RX_TX_REPORT, RTWN_RX_OTHER }; /* * Firmware reset reasons. */ enum { RTWN_FW_RESET_DOWNLOAD, RTWN_FW_RESET_CHECKSUM, RTWN_FW_RESET_SHUTDOWN }; /* * Rate control algorithm selection. */ enum { RTWN_RATECTL_NONE, RTWN_RATECTL_NET80211, RTWN_RATECTL_FW, RTWN_RATECTL_MAX }; /* * Control h/w crypto usage. */ enum { RTWN_CRYPTO_SW, RTWN_CRYPTO_PAIR, RTWN_CRYPTO_FULL, RTWN_CRYPTO_MAX, }; struct rtwn_softc { struct ieee80211com sc_ic; struct mbufq sc_snd; device_t sc_dev; #if 1 int sc_ht40; #endif uint32_t sc_debug; int sc_hwcrypto; int sc_ratectl_sysctl; int sc_ratectl; uint8_t sc_detached; uint8_t sc_flags; /* Device flags */ #define RTWN_FLAG_CCK_HIPWR 0x01 #define RTWN_FLAG_EXT_HDR 0x02 #define RTWN_FLAG_CAM_FIXED 0x04 /* Driver state */ #define RTWN_STARTED 0x08 #define RTWN_RUNNING 0x10 #define RTWN_FW_LOADED 0x20 #define RTWN_TEMP_MEASURED 0x40 #define RTWN_RCR_LOCKED 0x80 #define RTWN_CHIP_HAS_BCNQ1(_sc) \ ((_sc)->bcn_status_reg[0] != (_sc)->bcn_status_reg[1]) void *sc_priv; const char *name; int sc_ant; - int8_t last_rssi; + struct rtwn_tx_phystat last_physt; uint8_t thcal_temp; int cur_bcnq_id; int nvaps; int ap_vaps; int bcn_vaps; int mon_vaps; int vaps_running; int monvaps_running; uint16_t next_rom_addr; uint8_t keys_bmap[howmany(RTWN_CAM_ENTRY_LIMIT, NBBY)]; struct rtwn_vap *vaps[RTWN_PORT_COUNT]; struct ieee80211_node *node_list[RTWN_MACID_LIMIT]; struct mtx nt_mtx; struct callout sc_calib_to; struct callout sc_pwrmode_init; #ifndef D4054 struct callout sc_watchdog_to; int sc_tx_timer; #endif struct mtx sc_mtx; struct rtwn_cmdq cmdq[RTWN_CMDQ_SIZE]; struct mtx cmdq_mtx; struct task cmdq_task; uint8_t cmdq_first; uint8_t cmdq_last; struct wmeParams cap_wmeParams[WME_NUM_AC]; struct rtwn_rx_radiotap_header sc_rxtap; struct rtwn_tx_radiotap_header sc_txtap; int ntxchains; int nrxchains; int ledlink; uint8_t thermal_meter; int sc_tx_n_active; uint8_t qfullmsk; /* Firmware-specific */ const char *fwname; uint16_t fwver; uint16_t fwsig; int fwcur; void (*sc_node_free)(struct ieee80211_node *); void (*sc_scan_curchan)(struct ieee80211_scan_state *, unsigned long); /* Interface-specific. */ int (*sc_write_1)(struct rtwn_softc *, uint16_t, uint8_t); int (*sc_write_2)(struct rtwn_softc *, uint16_t, uint16_t); int (*sc_write_4)(struct rtwn_softc *, uint16_t, uint32_t); uint8_t (*sc_read_1)(struct rtwn_softc *, uint16_t); uint16_t (*sc_read_2)(struct rtwn_softc *, uint16_t); uint32_t (*sc_read_4)(struct rtwn_softc *, uint16_t); /* XXX eliminate */ void (*sc_delay)(struct rtwn_softc *, int); int (*sc_tx_start)(struct rtwn_softc *, struct ieee80211_node *, struct mbuf *, uint8_t *, uint8_t, int); void (*sc_start_xfers)(struct rtwn_softc *); void (*sc_reset_lists)(struct rtwn_softc *, struct ieee80211vap *); void (*sc_abort_xfers)(struct rtwn_softc *); int (*sc_fw_write_block)(struct rtwn_softc *, const uint8_t *, uint16_t, int); uint16_t (*sc_get_qmap)(struct rtwn_softc *); void (*sc_set_desc_addr)(struct rtwn_softc *); void (*sc_drop_incorrect_tx)(struct rtwn_softc *); void (*sc_beacon_update_begin)(struct rtwn_softc *, struct ieee80211vap *); void (*sc_beacon_update_end)(struct rtwn_softc *, struct ieee80211vap *); void (*sc_beacon_unload)(struct rtwn_softc *, int); /* XXX drop checks for PCIe? */ int bcn_check_interval; /* Device-specific. */ uint32_t (*sc_rf_read)(struct rtwn_softc *, int, uint8_t); void (*sc_rf_write)(struct rtwn_softc *, int, uint8_t, uint32_t); int (*sc_check_condition)(struct rtwn_softc *, const uint8_t[]); void (*sc_efuse_postread)(struct rtwn_softc *); void (*sc_parse_rom)(struct rtwn_softc *, uint8_t *); void (*sc_set_led)(struct rtwn_softc *, int, int); int (*sc_power_on)(struct rtwn_softc *); void (*sc_power_off)(struct rtwn_softc *); #ifndef RTWN_WITHOUT_UCODE void (*sc_fw_reset)(struct rtwn_softc *, int); void (*sc_fw_download_enable)(struct rtwn_softc *, int); #endif int (*sc_set_page_size)(struct rtwn_softc *); void (*sc_lc_calib)(struct rtwn_softc *); void (*sc_iq_calib)(struct rtwn_softc *); void (*sc_read_chipid_vendor)(struct rtwn_softc *, uint32_t); void (*sc_adj_devcaps)(struct rtwn_softc *); void (*sc_vap_preattach)(struct rtwn_softc *, struct ieee80211vap *); void (*sc_postattach)(struct rtwn_softc *); void (*sc_detach_private)(struct rtwn_softc *); void (*sc_fill_tx_desc)(struct rtwn_softc *, struct ieee80211_node *, struct mbuf *, void *, uint8_t, int); void (*sc_fill_tx_desc_raw)(struct rtwn_softc *, struct ieee80211_node *, struct mbuf *, void *, const struct ieee80211_bpf_params *); void (*sc_fill_tx_desc_null)(struct rtwn_softc *, void *, int, int, int); void (*sc_dump_tx_desc)(struct rtwn_softc *, const void *); uint8_t (*sc_tx_radiotap_flags)(const void *); uint8_t (*sc_rx_radiotap_flags)(const void *); void (*sc_beacon_init)(struct rtwn_softc *, void *, int); void (*sc_beacon_enable)(struct rtwn_softc *, int, int); void (*sc_beacon_set_rate)(void *, int); void (*sc_beacon_select)(struct rtwn_softc *, int); void (*sc_set_chan)(struct rtwn_softc *, struct ieee80211_channel *); void (*sc_set_media_status)(struct rtwn_softc *, int); #ifndef RTWN_WITHOUT_UCODE int (*sc_set_rsvd_page)(struct rtwn_softc *, int, int, int); int (*sc_set_pwrmode)(struct rtwn_softc *, struct ieee80211vap *, int); void (*sc_set_rssi)(struct rtwn_softc *); #endif + void (*sc_get_rx_stats)(struct rtwn_softc *, + struct ieee80211_rx_stats *, const void *, + const void *); int8_t (*sc_get_rssi_cck)(struct rtwn_softc *, void *); int8_t (*sc_get_rssi_ofdm)(struct rtwn_softc *, void *); int (*sc_classify_intr)(struct rtwn_softc *, void *, int); void (*sc_handle_tx_report)(struct rtwn_softc *, uint8_t *, int); void (*sc_handle_c2h_report)(struct rtwn_softc *, uint8_t *, int); int (*sc_check_frame)(struct rtwn_softc *, struct mbuf *); void (*sc_temp_measure)(struct rtwn_softc *); uint8_t (*sc_temp_read)(struct rtwn_softc *); void (*sc_init_tx_agg)(struct rtwn_softc *); void (*sc_init_rx_agg)(struct rtwn_softc *); void (*sc_init_intr)(struct rtwn_softc *); void (*sc_init_ampdu)(struct rtwn_softc *); void (*sc_init_edca)(struct rtwn_softc *); void (*sc_init_bb)(struct rtwn_softc *); void (*sc_init_rf)(struct rtwn_softc *); void (*sc_init_antsel)(struct rtwn_softc *); void (*sc_post_init)(struct rtwn_softc *); int (*sc_init_bcnq1_boundary)(struct rtwn_softc *); const uint8_t *chan_list_5ghz[3]; int chan_num_5ghz[3]; const struct rtwn_mac_prog *mac_prog; int mac_size; const struct rtwn_bb_prog *bb_prog; int bb_size; const struct rtwn_agc_prog *agc_prog; int agc_size; const struct rtwn_rf_prog *rf_prog; int page_count; int pktbuf_count; int ackto; int npubqpages; int nhqpages; int nnqpages; int nlqpages; int page_size; int txdesc_len; int efuse_maxlen; int efuse_maplen; uint16_t rx_dma_size; int macid_limit; int cam_entry_limit; int fwsize_limit; int temp_delta; uint16_t bcn_status_reg[RTWN_PORT_COUNT]; uint32_t rcr; /* Rx filter */ }; MALLOC_DECLARE(M_RTWN_PRIV); #define RTWN_LOCK(sc) mtx_lock(&(sc)->sc_mtx) #define RTWN_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx) #define RTWN_ASSERT_LOCKED(sc) mtx_assert(&(sc)->sc_mtx, MA_OWNED) #define RTWN_CMDQ_LOCK_INIT(sc) \ mtx_init(&(sc)->cmdq_mtx, "cmdq lock", NULL, MTX_DEF) #define RTWN_CMDQ_LOCK(sc) mtx_lock(&(sc)->cmdq_mtx) #define RTWN_CMDQ_UNLOCK(sc) mtx_unlock(&(sc)->cmdq_mtx) #define RTWN_CMDQ_LOCK_INITIALIZED(sc) mtx_initialized(&(sc)->cmdq_mtx) #define RTWN_CMDQ_LOCK_DESTROY(sc) mtx_destroy(&(sc)->cmdq_mtx) #define RTWN_NT_LOCK_INIT(sc) \ mtx_init(&(sc)->nt_mtx, "node table lock", NULL, MTX_DEF) #define RTWN_NT_LOCK(sc) mtx_lock(&(sc)->nt_mtx) #define RTWN_NT_UNLOCK(sc) mtx_unlock(&(sc)->nt_mtx) #define RTWN_NT_LOCK_INITIALIZED(sc) mtx_initialized(&(sc)->nt_mtx) #define RTWN_NT_LOCK_DESTROY(sc) mtx_destroy(&(sc)->nt_mtx) void rtwn_sysctlattach(struct rtwn_softc *); int rtwn_attach(struct rtwn_softc *); void rtwn_detach(struct rtwn_softc *); void rtwn_resume(struct rtwn_softc *); void rtwn_suspend(struct rtwn_softc *); /* Interface-specific. */ #define rtwn_write_1(_sc, _addr, _val) \ (((_sc)->sc_write_1)((_sc), (_addr), (_val))) #define rtwn_write_2(_sc, _addr, _val) \ (((_sc)->sc_write_2)((_sc), (_addr), (_val))) #define rtwn_write_4(_sc, _addr, _val) \ (((_sc)->sc_write_4)((_sc), (_addr), (_val))) #define rtwn_read_1(_sc, _addr) \ (((_sc)->sc_read_1)((_sc), (_addr))) #define rtwn_read_2(_sc, _addr) \ (((_sc)->sc_read_2)((_sc), (_addr))) #define rtwn_read_4(_sc, _addr) \ (((_sc)->sc_read_4)((_sc), (_addr))) #define rtwn_delay(_sc, _usec) \ (((_sc)->sc_delay)((_sc), (_usec))) #define rtwn_tx_start(_sc, _ni, _m, _desc, _type, _id) \ (((_sc)->sc_tx_start)((_sc), (_ni), (_m), (_desc), (_type), (_id))) #define rtwn_start_xfers(_sc) \ (((_sc)->sc_start_xfers)((_sc))) #define rtwn_reset_lists(_sc, _vap) \ (((_sc)->sc_reset_lists)((_sc), (_vap))) #define rtwn_abort_xfers(_sc) \ (((_sc)->sc_abort_xfers)((_sc))) #define rtwn_fw_write_block(_sc, _buf, _reg, _len) \ (((_sc)->sc_fw_write_block)((_sc), (_buf), (_reg), (_len))) #define rtwn_get_qmap(_sc) \ (((_sc)->sc_get_qmap)((_sc))) #define rtwn_set_desc_addr(_sc) \ (((_sc)->sc_set_desc_addr)((_sc))) #define rtwn_drop_incorrect_tx(_sc) \ (((_sc)->sc_drop_incorrect_tx)((_sc))) #define rtwn_beacon_update_begin(_sc, _vap) \ (((_sc)->sc_beacon_update_begin)((_sc), (_vap))) #define rtwn_beacon_update_end(_sc, _vap) \ (((_sc)->sc_beacon_update_end)((_sc), (_vap))) #define rtwn_beacon_unload(_sc, _id) \ (((_sc)->sc_beacon_unload)((_sc), (_id))) /* Aliases. */ #define rtwn_bb_write rtwn_write_4 #define rtwn_bb_read rtwn_read_4 #define rtwn_bb_setbits rtwn_setbits_4 /* Device-specific. */ #define rtwn_rf_read(_sc, _chain, _addr) \ (((_sc)->sc_rf_read)((_sc), (_chain), (_addr))) #define rtwn_rf_write(_sc, _chain, _addr, _val) \ (((_sc)->sc_rf_write)((_sc), (_chain), (_addr), (_val))) #define rtwn_check_condition(_sc, _cond) \ (((_sc)->sc_check_condition)((_sc), (_cond))) #define rtwn_efuse_postread(_sc) \ (((_sc)->sc_efuse_postread)((_sc))) #define rtwn_parse_rom(_sc, _rom) \ (((_sc)->sc_parse_rom)((_sc), (_rom))) #define rtwn_set_led(_sc, _led, _on) \ (((_sc)->sc_set_led)((_sc), (_led), (_on))) +#define rtwn_get_rx_stats(_sc, _rxs, _desc, _physt) \ + (((_sc)->sc_get_rx_stats((_sc), (_rxs), (_desc), (_physt)))) #define rtwn_get_rssi_cck(_sc, _physt) \ (((_sc)->sc_get_rssi_cck)((_sc), (_physt))) #define rtwn_get_rssi_ofdm(_sc, _physt) \ (((_sc)->sc_get_rssi_ofdm)((_sc), (_physt))) #define rtwn_power_on(_sc) \ (((_sc)->sc_power_on)((_sc))) #define rtwn_power_off(_sc) \ (((_sc)->sc_power_off)((_sc))) #ifndef RTWN_WITHOUT_UCODE #define rtwn_fw_reset(_sc, _reason) \ (((_sc)->sc_fw_reset)((_sc), (_reason))) #define rtwn_fw_download_enable(_sc, _enable) \ (((_sc)->sc_fw_download_enable)((_sc), (_enable))) #endif #define rtwn_set_page_size(_sc) \ (((_sc)->sc_set_page_size)((_sc))) #define rtwn_lc_calib(_sc) \ (((_sc)->sc_lc_calib)((_sc))) #define rtwn_iq_calib(_sc) \ (((_sc)->sc_iq_calib)((_sc))) #define rtwn_read_chipid_vendor(_sc, _reg) \ (((_sc)->sc_read_chipid_vendor)((_sc), (_reg))) #define rtwn_adj_devcaps(_sc) \ (((_sc)->sc_adj_devcaps)((_sc))) #define rtwn_vap_preattach(_sc, _vap) \ (((_sc)->sc_vap_preattach)((_sc), (_vap))) #define rtwn_postattach(_sc) \ (((_sc)->sc_postattach)((_sc))) #define rtwn_detach_private(_sc) \ (((_sc)->sc_detach_private)((_sc))) #define rtwn_fill_tx_desc(_sc, _ni, _m, \ _buf, _ridx, _maxretry) \ (((_sc)->sc_fill_tx_desc)((_sc), (_ni), \ (_m), (_buf), (_ridx), (_maxretry))) #define rtwn_fill_tx_desc_raw(_sc, _ni, _m, \ _buf, _params) \ (((_sc)->sc_fill_tx_desc_raw)((_sc), (_ni), \ (_m), (_buf), (_params))) #define rtwn_fill_tx_desc_null(_sc, _buf, _11b, _qos, _id) \ (((_sc)->sc_fill_tx_desc_null)((_sc), \ (_buf), (_11b), (_qos), (_id))) #define rtwn_dump_tx_desc(_sc, _desc) \ (((_sc)->sc_dump_tx_desc)((_sc), (_desc))) #define rtwn_tx_radiotap_flags(_sc, _buf) \ (((_sc)->sc_tx_radiotap_flags)((_buf))) #define rtwn_rx_radiotap_flags(_sc, _buf) \ (((_sc)->sc_rx_radiotap_flags)((_buf))) #define rtwn_set_chan(_sc, _c) \ (((_sc)->sc_set_chan)((_sc), (_c))) #ifndef RTWN_WITHOUT_UCODE #define rtwn_set_rsvd_page(_sc, _resp, _null, _qos_null) \ (((_sc)->sc_set_rsvd_page)((_sc), \ (_resp), (_null), (_qos_null))) #define rtwn_set_pwrmode(_sc, _vap, _off) \ (((_sc)->sc_set_pwrmode)((_sc), (_vap), (_off))) #define rtwn_set_rssi(_sc) \ (((_sc)->sc_set_rssi)((_sc))) #endif #define rtwn_classify_intr(_sc, _buf, _len) \ (((_sc)->sc_classify_intr)((_sc), (_buf), (_len))) #define rtwn_handle_tx_report(_sc, _buf, _len) \ (((_sc)->sc_handle_tx_report)((_sc), (_buf), (_len))) #define rtwn_handle_c2h_report(_sc, _buf, _len) \ (((_sc)->sc_handle_c2h_report)((_sc), (_buf), (_len))) #define rtwn_check_frame(_sc, _m) \ (((_sc)->sc_check_frame)((_sc), (_m))) #define rtwn_beacon_init(_sc, _buf, _id) \ (((_sc)->sc_beacon_init)((_sc), (_buf), (_id))) #define rtwn_beacon_enable(_sc, _id, _enable) \ (((_sc)->sc_beacon_enable)((_sc), (_id), (_enable))) #define rtwn_beacon_set_rate(_sc, _buf, _is5ghz) \ (((_sc)->sc_beacon_set_rate)((_buf), (_is5ghz))) #define rtwn_beacon_select(_sc, _id) \ (((_sc)->sc_beacon_select)((_sc), (_id))) #define rtwn_temp_measure(_sc) \ (((_sc)->sc_temp_measure)((_sc))) #define rtwn_temp_read(_sc) \ (((_sc)->sc_temp_read)((_sc))) #define rtwn_init_tx_agg(_sc) \ (((_sc)->sc_init_tx_agg)((_sc))) #define rtwn_init_rx_agg(_sc) \ (((_sc)->sc_init_rx_agg)((_sc))) #define rtwn_init_intr(_sc) \ (((_sc)->sc_init_intr)((_sc))) #define rtwn_init_ampdu(_sc) \ (((_sc)->sc_init_ampdu)((_sc))) #define rtwn_init_edca(_sc) \ (((_sc)->sc_init_edca)((_sc))) #define rtwn_init_bb(_sc) \ (((_sc)->sc_init_bb)((_sc))) #define rtwn_init_rf(_sc) \ (((_sc)->sc_init_rf)((_sc))) #define rtwn_init_antsel(_sc) \ (((_sc)->sc_init_antsel)((_sc))) #define rtwn_post_init(_sc) \ (((_sc)->sc_post_init)((_sc))) #define rtwn_init_bcnq1_boundary(_sc) \ (((_sc)->sc_init_bcnq1_boundary)((_sc))) /* * Methods to access subfields in registers. */ static __inline int rtwn_setbits_1(struct rtwn_softc *sc, uint16_t addr, uint8_t clr, uint8_t set) { return (rtwn_write_1(sc, addr, (rtwn_read_1(sc, addr) & ~clr) | set)); } static __inline int rtwn_setbits_1_shift(struct rtwn_softc *sc, uint16_t addr, uint32_t clr, uint32_t set, int shift) { return (rtwn_setbits_1(sc, addr + shift, clr >> shift * NBBY, set >> shift * NBBY)); } static __inline int rtwn_setbits_2(struct rtwn_softc *sc, uint16_t addr, uint16_t clr, uint16_t set) { return (rtwn_write_2(sc, addr, (rtwn_read_2(sc, addr) & ~clr) | set)); } static __inline int rtwn_setbits_4(struct rtwn_softc *sc, uint16_t addr, uint32_t clr, uint32_t set) { return (rtwn_write_4(sc, addr, (rtwn_read_4(sc, addr) & ~clr) | set)); } static __inline void rtwn_rf_setbits(struct rtwn_softc *sc, int chain, uint8_t addr, uint32_t clr, uint32_t set) { rtwn_rf_write(sc, chain, addr, (rtwn_rf_read(sc, chain, addr) & ~clr) | set); } #endif /* IF_RTWNVAR_H */ Index: head/sys/dev/rtwn/pci/rtwn_pci_rx.c =================================================================== --- head/sys/dev/rtwn/pci/rtwn_pci_rx.c (revision 312314) +++ head/sys/dev/rtwn/pci/rtwn_pci_rx.c (revision 312315) @@ -1,327 +1,325 @@ /* $OpenBSD: if_rtwn.c,v 1.6 2015/08/28 00:03:53 deraadt Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2015 Stefan Sperling * Copyright (c) 2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include void rtwn_pci_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error) { if (error != 0) return; KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs)); *(bus_addr_t *)arg = segs[0].ds_addr; } void rtwn_pci_setup_rx_desc(struct rtwn_pci_softc *pc, struct r92ce_rx_stat *desc, bus_addr_t addr, size_t len, int idx) { memset(desc, 0, sizeof(*desc)); desc->rxdw0 = htole32(SM(R92C_RXDW0_PKTLEN, len) | ((idx == RTWN_PCI_RX_LIST_COUNT - 1) ? R92C_RXDW0_EOR : 0)); desc->rxbufaddr = htole32(addr); bus_space_barrier(pc->pc_st, pc->pc_sh, 0, pc->pc_mapsize, BUS_SPACE_BARRIER_WRITE); desc->rxdw0 |= htole32(R92C_RXDW0_OWN); } static void rtwn_pci_rx_frame(struct rtwn_softc *sc, struct r92ce_rx_stat *rx_desc, int desc_idx) { struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc); struct rtwn_rx_ring *ring = &pc->rx_ring; struct rtwn_rx_data *rx_data = &ring->rx_data[desc_idx]; struct ieee80211com *ic = &sc->sc_ic; struct ieee80211_node *ni; uint32_t rxdw0; struct mbuf *m, *m1; - int8_t rssi = 0, nf; int infosz, pktlen, shift, error; /* Dump Rx descriptor. */ RTWN_DPRINTF(sc, RTWN_DEBUG_RECV_DESC, "%s: dw: 0 %08X, 1 %08X, 2 %08X, 3 %08X, 4 %08X, tsfl %08X, " "addr: %08X (64: %08X)\n", __func__, le32toh(rx_desc->rxdw0), le32toh(rx_desc->rxdw1), le32toh(rx_desc->rxdw2), le32toh(rx_desc->rxdw3), le32toh(rx_desc->rxdw4), le32toh(rx_desc->tsf_low), le32toh(rx_desc->rxbufaddr), le32toh(rx_desc->rxbufaddr64)); rxdw0 = le32toh(rx_desc->rxdw0); if (__predict_false(rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR))) { /* * This should not happen since we setup our Rx filter * to not receive these frames. */ RTWN_DPRINTF(sc, RTWN_DEBUG_RECV, "%s: RX flags error (%s)\n", __func__, rxdw0 & R92C_RXDW0_CRCERR ? "CRC" : "ICV"); goto fail; } pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); if (__predict_false(pktlen < sizeof(struct ieee80211_frame_ack) || pktlen > MJUMPAGESIZE)) { RTWN_DPRINTF(sc, RTWN_DEBUG_RECV, "%s: frame is too short/long: %d\n", __func__, pktlen); goto fail; } infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; shift = MS(rxdw0, R92C_RXDW0_SHIFT); m1 = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE); if (__predict_false(m1 == NULL)) { device_printf(sc->sc_dev, "%s: could not allocate RX mbuf\n", __func__); goto fail; } bus_dmamap_sync(ring->data_dmat, rx_data->map, BUS_DMASYNC_POSTREAD); bus_dmamap_unload(ring->data_dmat, rx_data->map); error = bus_dmamap_load(ring->data_dmat, rx_data->map, mtod(m1, void *), MJUMPAGESIZE, rtwn_pci_dma_map_addr, &rx_data->paddr, 0); if (error != 0) { m_freem(m1); error = bus_dmamap_load(ring->data_dmat, rx_data->map, mtod(rx_data->m, void *), MJUMPAGESIZE, rtwn_pci_dma_map_addr, &rx_data->paddr, BUS_DMA_NOWAIT); if (error != 0) panic("%s: could not load old RX mbuf", device_get_name(sc->sc_dev)); /* Physical address may have changed. */ rtwn_pci_setup_rx_desc(pc, rx_desc, rx_data->paddr, MJUMPAGESIZE, desc_idx); goto fail; } /* Finalize mbuf. */ m = rx_data->m; rx_data->m = m1; m->m_pkthdr.len = m->m_len = pktlen + infosz + shift; - nf = RTWN_NOISE_FLOOR; - ni = rtwn_rx_common(sc, m, rx_desc, &rssi); + ni = rtwn_rx_common(sc, m, rx_desc); RTWN_DPRINTF(sc, RTWN_DEBUG_RECV, - "%s: Rx frame len %d, infosz %d, shift %d, rssi %d\n", - __func__, pktlen, infosz, shift, rssi); + "%s: Rx frame len %d, infosz %d, shift %d\n", + __func__, pktlen, infosz, shift); /* Update RX descriptor. */ rtwn_pci_setup_rx_desc(pc, rx_desc, rx_data->paddr, MJUMPAGESIZE, desc_idx); /* Send the frame to the 802.11 layer. */ RTWN_UNLOCK(sc); if (ni != NULL) { - (void)ieee80211_input(ni, m, rssi - nf, nf); + (void)ieee80211_input_mimo(ni, m); /* Node is no longer needed. */ ieee80211_free_node(ni); } else - (void)ieee80211_input_all(ic, m, rssi - nf, nf); + (void)ieee80211_input_mimo_all(ic, m); RTWN_LOCK(sc); return; fail: counter_u64_add(ic->ic_ierrors, 1); } static void rtwn_pci_tx_done(struct rtwn_softc *sc, int qid) { struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc); struct rtwn_tx_ring *ring = &pc->tx_ring[qid]; struct rtwn_tx_desc_common *desc; struct rtwn_tx_data *data; RTWN_DPRINTF(sc, RTWN_DEBUG_INTR, "%s: qid %d, last %d, cur %d\n", __func__, qid, ring->last, ring->cur); bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_POSTREAD); while(ring->last != ring->cur) { data = &ring->tx_data[ring->last]; desc = (struct rtwn_tx_desc_common *) ((uint8_t *)ring->desc + sc->txdesc_len * ring->last); KASSERT(data->m != NULL, ("no mbuf")); if (desc->flags0 & RTWN_FLAGS0_OWN) break; /* Unmap and free mbuf. */ bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE); bus_dmamap_unload(ring->data_dmat, data->map); if (data->ni != NULL) { /* not a beacon frame */ ieee80211_tx_complete(data->ni, data->m, 0); data->ni = NULL; ring->queued--; KASSERT(ring->queued >= 0, ("ring->queued (qid %d) underflow!\n", qid)); } else m_freem(data->m); data->m = NULL; ring->last = (ring->last + 1) % RTWN_PCI_TX_LIST_COUNT; #ifndef D4054 if (ring->queued > 0) sc->sc_tx_timer = 5; else sc->sc_tx_timer = 0; #endif } if ((sc->qfullmsk & (1 << qid)) != 0 && ring->queued < (RTWN_PCI_TX_LIST_COUNT - 1)) { sc->qfullmsk &= ~(1 << qid); rtwn_start(sc); } #ifdef IEEE80211_SUPPORT_SUPERG /* * If the TX active queue drops below a certain * threshold, ensure we age fast-frames out so they're * transmitted. */ if (sc->sc_ratectl != RTWN_RATECTL_NET80211 && ring->queued <= 1) { /* * XXX TODO: just make this a callout timer schedule * so we can flush the FF staging queue if we're * approaching idle. */ rtwn_cmd_sleepable(sc, NULL, 0, rtwn_ff_flush_all); } #endif } static void rtwn_pci_rx_done(struct rtwn_softc *sc) { struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc); struct rtwn_rx_ring *ring = &pc->rx_ring; bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_POSTREAD); for (;;) { struct r92ce_rx_stat *rx_desc = &ring->desc[ring->cur]; if (le32toh(rx_desc->rxdw0) & R92C_RXDW0_OWN) break; rtwn_pci_rx_frame(sc, rx_desc, ring->cur); if (!(sc->sc_flags & RTWN_RUNNING)) return; ring->cur = (ring->cur + 1) % RTWN_PCI_RX_LIST_COUNT; } /* Finished receive; age anything left on the FF queue by a little bump */ /* * XXX TODO: just make this a callout timer schedule so we can * flush the FF staging queue if we're approaching idle. */ #ifdef IEEE80211_SUPPORT_SUPERG if (!(sc->sc_flags & RTWN_FW_LOADED) || sc->sc_ratectl != RTWN_RATECTL_NET80211) rtwn_cmd_sleepable(sc, NULL, 0, rtwn_ff_flush_all); #endif } void rtwn_pci_intr(void *arg) { struct rtwn_softc *sc = arg; struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc); int i, status, tx_rings; RTWN_LOCK(sc); status = rtwn_classify_intr(sc, &tx_rings, 0); RTWN_DPRINTF(sc, RTWN_DEBUG_INTR, "%s: status %08X, tx_rings %08X\n", __func__, status, tx_rings); if (status == 0 && tx_rings == 0) goto unlock; if (status & RTWN_PCI_INTR_RX) { rtwn_pci_rx_done(sc); if (!(sc->sc_flags & RTWN_RUNNING)) goto unlock; } if (tx_rings != 0) for (i = 0; i < RTWN_PCI_NTXQUEUES; i++) if (tx_rings & (1 << i)) rtwn_pci_tx_done(sc, i); if (sc->sc_flags & RTWN_RUNNING) rtwn_pci_enable_intr(pc); unlock: RTWN_UNLOCK(sc); } Index: head/sys/dev/rtwn/rtl8188e/r88e.h =================================================================== --- head/sys/dev/rtwn/rtl8188e/r88e.h (revision 312314) +++ head/sys/dev/rtwn/rtl8188e/r88e.h (revision 312315) @@ -1,94 +1,96 @@ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $ * $FreeBSD$ */ #ifndef RTL8188E_H #define RTL8188E_H /* * Global definitions. */ #define R88E_PUBQ_NPAGES 142 #define R88E_TXPKTBUF_COUNT 177 #define R88E_TX_PAGE_COUNT 169 #define R88E_MACID_MAX 63 #define R88E_RX_DMA_BUFFER_SIZE 0x2400 #define R88E_INTR_MSG_LEN 60 #define R88E_CALIB_THRESHOLD 4 /* * Function declarations. */ /* r88e_beacon.c */ void r88e_beacon_enable(struct rtwn_softc *, int, int); /* r88e_calib.c */ void r88e_iq_calib(struct rtwn_softc *); void r88e_temp_measure(struct rtwn_softc *); uint8_t r88e_temp_read(struct rtwn_softc *); /* r88e_chan.c */ void r88e_get_txpower(struct rtwn_softc *, int, struct ieee80211_channel *, uint16_t[]); void r88e_set_bw20(struct rtwn_softc *, uint8_t); void r88e_set_gain(struct rtwn_softc *, uint8_t); /* r88e_fw.c */ #ifndef RTWN_WITHOUT_UCODE int r88e_fw_cmd(struct rtwn_softc *, uint8_t, const void *, int); void r88e_fw_reset(struct rtwn_softc *, int); void r88e_fw_download_enable(struct rtwn_softc *, int); #endif void r88e_macid_enable_link(struct rtwn_softc *, int, int); void r88e_set_media_status(struct rtwn_softc *, int); #ifndef RTWN_WITHOUT_UCODE int r88e_set_rsvd_page(struct rtwn_softc *, int, int, int); int r88e_set_pwrmode(struct rtwn_softc *, struct ieee80211vap *, int); #endif /* r88e_init.c */ void r88e_init_bb(struct rtwn_softc *); void r88e_init_rf(struct rtwn_softc *); int r88e_power_on(struct rtwn_softc *); /* r88e_led.c */ void r88e_set_led(struct rtwn_softc *, int, int); /* r88e_rf.c */ void r88e_rf_write(struct rtwn_softc *, int, uint8_t, uint32_t); /* r88e_rom.c */ void r88e_parse_rom(struct rtwn_softc *, uint8_t *); /* r88e_rx.c */ void r88e_ratectl_tx_complete(struct rtwn_softc *, uint8_t *, int); void r88e_handle_c2h_report(struct rtwn_softc *, uint8_t *, int); int8_t r88e_get_rssi_cck(struct rtwn_softc *, void *); int8_t r88e_get_rssi_ofdm(struct rtwn_softc *, void *); +void r88e_get_rx_stats(struct rtwn_softc *, struct ieee80211_rx_stats *, + const void *, const void *); /* r88e_tx.c */ void r88e_tx_enable_ampdu(void *, int); void r88e_tx_setup_hwseq(void *); void r88e_tx_setup_macid(void *, int); #endif /* RTL8188E_H */ Index: head/sys/dev/rtwn/rtl8188e/r88e_rx.c =================================================================== --- head/sys/dev/rtwn/rtl8188e/r88e_rx.c (revision 312314) +++ head/sys/dev/rtwn/rtl8188e/r88e_rx.c (revision 312315) @@ -1,211 +1,228 @@ /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2014 Kevin Lo * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include +#include #include #include void r88e_ratectl_tx_complete(struct rtwn_softc *sc, uint8_t *buf, int len) { #if __FreeBSD_version >= 1200012 struct ieee80211_ratectl_tx_status txs; #endif struct r88e_tx_rpt_ccx *rpt; struct ieee80211_node *ni; uint8_t macid; int ntries; /* Skip Rx descriptor. */ buf += sizeof(struct r92c_rx_stat); len -= sizeof(struct r92c_rx_stat); rpt = (struct r88e_tx_rpt_ccx *)buf; if (len != sizeof(*rpt)) { RTWN_DPRINTF(sc, RTWN_DEBUG_INTR, "%s: wrong report size (%d, must be %zu)\n", __func__, len, sizeof(*rpt)); return; } RTWN_DPRINTF(sc, RTWN_DEBUG_INTR, "%s: ccx report dump: 0: %02X, 1: %02X, 2: %02X, queue time: " "low %02X, high %02X, final ridx: %02X, 6: %02X, 7: %02X\n", __func__, rpt->rptb0, rpt->rptb1, rpt->rptb2, rpt->queue_time_low, rpt->queue_time_high, rpt->final_rate, rpt->rptb6, rpt->rptb7); macid = MS(rpt->rptb1, R88E_RPTB1_MACID); if (macid > sc->macid_limit) { device_printf(sc->sc_dev, "macid %u is too big; increase MACID_MAX limit\n", macid); return; } ntries = MS(rpt->rptb2, R88E_RPTB2_RETRY_CNT); ni = sc->node_list[macid]; if (ni != NULL) { RTWN_DPRINTF(sc, RTWN_DEBUG_INTR, "%s: frame for macid %u was" "%s sent (%d retries)\n", __func__, macid, (rpt->rptb1 & R88E_RPTB1_PKT_OK) ? "" : " not", ntries); #if __FreeBSD_version >= 1200012 txs.flags = IEEE80211_RATECTL_STATUS_LONG_RETRY | IEEE80211_RATECTL_STATUS_FINAL_RATE; txs.long_retries = ntries; if (rpt->final_rate > RTWN_RIDX_OFDM54) { /* MCS */ txs.final_rate = (rpt->final_rate - 12) | IEEE80211_RATE_MCS; } else txs.final_rate = ridx2rate[rpt->final_rate]; if (rpt->rptb1 & R88E_RPTB1_PKT_OK) txs.status = IEEE80211_RATECTL_TX_SUCCESS; else if (rpt->rptb2 & R88E_RPTB2_RETRY_OVER) txs.status = IEEE80211_RATECTL_TX_FAIL_LONG; else if (rpt->rptb2 & R88E_RPTB2_LIFE_EXPIRE) txs.status = IEEE80211_RATECTL_TX_FAIL_EXPIRED; else txs.status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED; ieee80211_ratectl_tx_complete(ni, &txs); #else struct ieee80211vap *vap = ni->ni_vap; if (rpt->rptb1 & R88E_RPTB1_PKT_OK) { ieee80211_ratectl_tx_complete(vap, ni, IEEE80211_RATECTL_TX_SUCCESS, &ntries, NULL); } else { ieee80211_ratectl_tx_complete(vap, ni, IEEE80211_RATECTL_TX_FAILURE, &ntries, NULL); } #endif } else { RTWN_DPRINTF(sc, RTWN_DEBUG_INTR, "%s: macid %u, ni is NULL\n", __func__, macid); } } void r88e_handle_c2h_report(struct rtwn_softc *sc, uint8_t *buf, int len) { /* Skip Rx descriptor. */ buf += sizeof(struct r92c_rx_stat); len -= sizeof(struct r92c_rx_stat); if (len != R88E_INTR_MSG_LEN) { RTWN_DPRINTF(sc, RTWN_DEBUG_INTR, "%s: wrong interrupt message size (%d, must be %d)\n", __func__, len, R88E_INTR_MSG_LEN); return; } /* XXX TODO */ } int8_t r88e_get_rssi_cck(struct rtwn_softc *sc, void *physt) { struct r88e_rx_phystat *phy = (struct r88e_rx_phystat *)physt; int8_t lna_idx, vga_idx, rssi; lna_idx = (phy->agc_rpt & 0xe0) >> 5; vga_idx = (phy->agc_rpt & 0x1f); rssi = 6 - 2 * vga_idx; switch (lna_idx) { case 7: if (vga_idx > 27) rssi = -100 + 6; else rssi += -100 + 2 * 27; break; case 6: rssi += -48 + 2 * 2; break; case 5: rssi += -42 + 2 * 7; break; case 4: rssi += -36 + 2 * 7; break; case 3: rssi += -24 + 2 * 7; break; case 2: rssi += -6 + 2 * 5; if (sc->sc_flags & RTWN_FLAG_CCK_HIPWR) rssi -= 6; break; case 1: rssi += 8; break; case 0: rssi += 14; break; } return (rssi); } int8_t r88e_get_rssi_ofdm(struct rtwn_softc *sc, void *physt) { struct r88e_rx_phystat *phy = (struct r88e_rx_phystat *)physt; int rssi; /* Get average RSSI. */ rssi = ((phy->sig_qual >> 1) & 0x7f) - 110; return (rssi); +} + +void +r88e_get_rx_stats(struct rtwn_softc *sc, struct ieee80211_rx_stats *rxs, + const void *desc, const void *physt_ptr) +{ + const struct r88e_rx_phystat *physt = physt_ptr; + + r92c_get_rx_stats(sc, rxs, desc, physt_ptr); + + if (!sc->sc_ht40) { /* XXX center channel */ + rxs->r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ; + rxs->c_ieee = le16toh(physt->chan); + rxs->c_freq = ieee80211_ieee2mhz(rxs->c_ieee, + IEEE80211_CHAN_2GHZ); + } } Index: head/sys/dev/rtwn/rtl8188e/usb/r88eu_attach.c =================================================================== --- head/sys/dev/rtwn/rtl8188e/usb/r88eu_attach.c (revision 312314) +++ head/sys/dev/rtwn/rtl8188e/usb/r88eu_attach.c (revision 312315) @@ -1,216 +1,217 @@ /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2014 Kevin Lo * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include static struct rtwn_r88e_txpwr r88e_txpwr; void r88eu_attach(struct rtwn_usb_softc *); static void r88e_postattach(struct rtwn_softc *sc) { struct r92c_softc *rs = sc->sc_priv; struct ieee80211com *ic = &sc->sc_ic; rs->rs_scan_start = ic->ic_scan_start; ic->ic_scan_start = r92c_scan_start; rs->rs_scan_end = ic->ic_scan_end; ic->ic_scan_end = r92c_scan_end; } static void r88eu_attach_private(struct rtwn_softc *sc) { struct r92c_softc *rs; rs = malloc(sizeof(struct r92c_softc), M_RTWN_PRIV, M_WAITOK | M_ZERO); rs->rs_txpwr = &r88e_txpwr; rs->rs_txagc = &r88e_txagc; rs->rs_set_bw20 = r88e_set_bw20; rs->rs_get_txpower = r88e_get_txpower; rs->rs_set_gain = r88e_set_gain; rs->rs_tx_enable_ampdu = r88e_tx_enable_ampdu; rs->rs_tx_setup_hwseq = r88e_tx_setup_hwseq; rs->rs_tx_setup_macid = r88e_tx_setup_macid; rs->rs_set_name = rtwn_nop_softc; /* not used */ rs->rf_read_delay[0] = 10; rs->rf_read_delay[1] = 100; rs->rf_read_delay[2] = 10; sc->sc_priv = rs; } static void r88eu_adj_devcaps(struct rtwn_softc *sc) { /* XXX TODO? */ } void r88eu_attach(struct rtwn_usb_softc *uc) { struct rtwn_softc *sc = &uc->uc_sc; /* USB part. */ uc->uc_align_rx = r92cu_align_rx; uc->tx_agg_desc_num = 6; /* Common part. */ sc->sc_flags = RTWN_FLAG_EXT_HDR; sc->sc_set_chan = r92c_set_chan; sc->sc_fill_tx_desc = r92c_fill_tx_desc; sc->sc_fill_tx_desc_raw = r92c_fill_tx_desc_raw; sc->sc_fill_tx_desc_null = r92c_fill_tx_desc_null; sc->sc_dump_tx_desc = r92cu_dump_tx_desc; sc->sc_tx_radiotap_flags = r92c_tx_radiotap_flags; sc->sc_rx_radiotap_flags = r92c_rx_radiotap_flags; + sc->sc_get_rx_stats = r88e_get_rx_stats; sc->sc_get_rssi_cck = r88e_get_rssi_cck; sc->sc_get_rssi_ofdm = r88e_get_rssi_ofdm; sc->sc_classify_intr = r88eu_classify_intr; sc->sc_handle_tx_report = r88e_ratectl_tx_complete; sc->sc_handle_c2h_report = r88e_handle_c2h_report; sc->sc_check_frame = rtwn_nop_int_softc_mbuf; sc->sc_rf_read = r92c_rf_read; sc->sc_rf_write = r88e_rf_write; sc->sc_check_condition = r92c_check_condition; sc->sc_efuse_postread = rtwn_nop_softc; sc->sc_parse_rom = r88e_parse_rom; sc->sc_set_led = r88e_set_led; sc->sc_power_on = r88e_power_on; sc->sc_power_off = r88eu_power_off; #ifndef RTWN_WITHOUT_UCODE sc->sc_fw_reset = r88e_fw_reset; sc->sc_fw_download_enable = r88e_fw_download_enable; #endif sc->sc_set_page_size = r92c_set_page_size; sc->sc_lc_calib = r92c_lc_calib; sc->sc_iq_calib = r88e_iq_calib; /* XXX TODO */ sc->sc_read_chipid_vendor = rtwn_nop_softc_uint32; sc->sc_adj_devcaps = r88eu_adj_devcaps; sc->sc_vap_preattach = rtwn_nop_softc_vap; sc->sc_postattach = r88e_postattach; sc->sc_detach_private = r92c_detach_private; sc->sc_set_media_status = r88e_set_media_status; #ifndef RTWN_WITHOUT_UCODE sc->sc_set_rsvd_page = r88e_set_rsvd_page; sc->sc_set_pwrmode = r88e_set_pwrmode; sc->sc_set_rssi = rtwn_nop_softc; /* XXX TODO? */ #endif sc->sc_beacon_init = r92c_beacon_init; sc->sc_beacon_enable = r88e_beacon_enable; sc->sc_beacon_set_rate = rtwn_nop_void_int; sc->sc_beacon_select = rtwn_nop_softc_int; sc->sc_temp_measure = r88e_temp_measure; sc->sc_temp_read = r88e_temp_read; sc->sc_init_tx_agg = r92cu_init_tx_agg; sc->sc_init_rx_agg = r88eu_init_rx_agg; sc->sc_init_ampdu = rtwn_nop_softc; sc->sc_init_intr = r88eu_init_intr; sc->sc_init_edca = r92c_init_edca; sc->sc_init_bb = r88e_init_bb; sc->sc_init_rf = r92c_init_rf; sc->sc_init_antsel = rtwn_nop_softc; sc->sc_post_init = r88eu_post_init; sc->sc_init_bcnq1_boundary = rtwn_nop_int_softc; sc->mac_prog = &rtl8188eu_mac[0]; sc->mac_size = nitems(rtl8188eu_mac); sc->bb_prog = &rtl8188eu_bb[0]; sc->bb_size = nitems(rtl8188eu_bb); sc->agc_prog = &rtl8188eu_agc[0]; sc->agc_size = nitems(rtl8188eu_agc); sc->rf_prog = &rtl8188eu_rf[0]; sc->name = "RTL8188EU"; sc->fwname = "rtwn-rtl8188eufw"; sc->fwsig = 0x88e; sc->page_count = R88E_TX_PAGE_COUNT; sc->pktbuf_count = R88E_TXPKTBUF_COUNT; sc->ackto = 0x40; sc->npubqpages = R88E_PUBQ_NPAGES; sc->page_size = R92C_TX_PAGE_SIZE; sc->txdesc_len = sizeof(struct r92cu_tx_desc); sc->efuse_maxlen = R88E_EFUSE_MAX_LEN; sc->efuse_maplen = R88E_EFUSE_MAP_LEN; sc->rx_dma_size = R88E_RX_DMA_BUFFER_SIZE; sc->macid_limit = R88E_MACID_MAX + 1; sc->cam_entry_limit = R92C_CAM_ENTRY_COUNT; sc->fwsize_limit = R92C_MAX_FW_SIZE; sc->temp_delta = R88E_CALIB_THRESHOLD; sc->bcn_status_reg[0] = R92C_TDECTRL; sc->bcn_status_reg[1] = R92C_TDECTRL; sc->rcr = 0; sc->ntxchains = 1; sc->nrxchains = 1; r88eu_attach_private(sc); } Index: head/sys/dev/rtwn/rtl8192c/pci/r92ce_attach.c =================================================================== --- head/sys/dev/rtwn/rtl8192c/pci/r92ce_attach.c (revision 312314) +++ head/sys/dev/rtwn/rtl8192c/pci/r92ce_attach.c (revision 312315) @@ -1,263 +1,264 @@ /* $OpenBSD: if_rtwn.c,v 1.6 2015/08/28 00:03:53 deraadt Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2015 Stefan Sperling * Copyright (c) 2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include static struct rtwn_r92c_txpwr r92c_txpwr; void r92ce_attach(struct rtwn_pci_softc *); static void r92ce_postattach(struct rtwn_softc *sc) { struct r92c_softc *rs = sc->sc_priv; struct ieee80211com *ic = &sc->sc_ic; if (!(rs->chip & R92C_CHIP_92C) && rs->board_type == R92C_BOARD_TYPE_HIGHPA) rs->rs_txagc = &rtl8188ru_txagc[0]; else rs->rs_txagc = &rtl8192cu_txagc[0]; if ((rs->chip & (R92C_CHIP_UMC_A_CUT | R92C_CHIP_92C)) == R92C_CHIP_UMC_A_CUT) sc->fwname = "rtwn-rtl8192cfwE"; else sc->fwname = "rtwn-rtl8192cfwE_B"; sc->fwsig = 0x88c; rs->rs_scan_start = ic->ic_scan_start; ic->ic_scan_start = r92c_scan_start; rs->rs_scan_end = ic->ic_scan_end; ic->ic_scan_end = r92c_scan_end; } static void r92ce_set_name(struct rtwn_softc *sc) { struct r92c_softc *rs = sc->sc_priv; if (rs->chip & R92C_CHIP_92C) sc->name = "RTL8192CE"; else sc->name = "RTL8188CE"; } static void r92ce_attach_private(struct rtwn_softc *sc) { struct r92c_softc *rs; rs = malloc(sizeof(struct r92c_softc), M_RTWN_PRIV, M_WAITOK | M_ZERO); rs->rs_txpwr = &r92c_txpwr; rs->rs_set_bw20 = r92c_set_bw20; rs->rs_get_txpower = r92c_get_txpower; rs->rs_set_gain = r92c_set_gain; rs->rs_tx_enable_ampdu = r92c_tx_enable_ampdu; rs->rs_tx_setup_hwseq = r92c_tx_setup_hwseq; rs->rs_tx_setup_macid = r92c_tx_setup_macid; rs->rs_set_name = r92ce_set_name; /* XXX TODO: test with net80211 ratectl! */ #ifndef RTWN_WITHOUT_UCODE rs->rs_c2h_timeout = hz; callout_init_mtx(&rs->rs_c2h_report, &sc->sc_mtx, 0); #endif rs->rf_read_delay[0] = 1000; rs->rf_read_delay[1] = 1000; rs->rf_read_delay[2] = 1000; sc->sc_priv = rs; } static void r92ce_adj_devcaps(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; /* * XXX do NOT enable PMGT until RSVD_PAGE command * will not be tested / fixed + HRPWM register must be set too. */ ic->ic_caps &= ~IEEE80211_C_PMGT; } void r92ce_attach(struct rtwn_pci_softc *pc) { struct rtwn_softc *sc = &pc->pc_sc; /* PCIe part. */ pc->pc_setup_tx_desc = r92ce_setup_tx_desc; pc->pc_tx_postsetup = r92ce_tx_postsetup; pc->pc_copy_tx_desc = r92ce_copy_tx_desc; pc->pc_enable_intr = r92ce_enable_intr; pc->pc_qmap = 0xf771; pc->tcr = R92C_TCR_CFENDFORM | (1 << 12) | (1 << 13); /* Common part. */ /* RTL8192C* cannot use pairwise keys from first 4 slots */ sc->sc_flags = RTWN_FLAG_CAM_FIXED; sc->sc_start_xfers = r92ce_start_xfers; sc->sc_set_chan = r92c_set_chan; sc->sc_fill_tx_desc = r92c_fill_tx_desc; sc->sc_fill_tx_desc_raw = r92c_fill_tx_desc_raw; sc->sc_fill_tx_desc_null = r92c_fill_tx_desc_null; /* XXX recheck */ sc->sc_dump_tx_desc = r92ce_dump_tx_desc; sc->sc_tx_radiotap_flags = r92c_tx_radiotap_flags; sc->sc_rx_radiotap_flags = r92c_rx_radiotap_flags; + sc->sc_get_rx_stats = r92c_get_rx_stats; sc->sc_get_rssi_cck = r92c_get_rssi_cck; sc->sc_get_rssi_ofdm = r92c_get_rssi_ofdm; sc->sc_classify_intr = r92ce_classify_intr; sc->sc_handle_tx_report = rtwn_nop_softc_uint8_int; sc->sc_handle_c2h_report = rtwn_nop_softc_uint8_int; sc->sc_check_frame = rtwn_nop_int_softc_mbuf; sc->sc_rf_read = r92c_rf_read; sc->sc_rf_write = r92c_rf_write; sc->sc_check_condition = r92c_check_condition; sc->sc_efuse_postread = r92c_efuse_postread; sc->sc_parse_rom = r92c_parse_rom; sc->sc_set_led = r92ce_set_led; sc->sc_power_on = r92ce_power_on; sc->sc_power_off = r92ce_power_off; #ifndef RTWN_WITHOUT_UCODE sc->sc_fw_reset = r92ce_fw_reset; sc->sc_fw_download_enable = r92c_fw_download_enable; #endif sc->sc_set_page_size = r92c_set_page_size; sc->sc_lc_calib = r92c_lc_calib; sc->sc_iq_calib = r92ce_iq_calib; sc->sc_read_chipid_vendor = r92c_read_chipid_vendor; sc->sc_adj_devcaps = r92ce_adj_devcaps; sc->sc_vap_preattach = rtwn_nop_softc_vap; sc->sc_postattach = r92ce_postattach; sc->sc_detach_private = r92c_detach_private; sc->sc_set_media_status = r92c_joinbss_rpt; #ifndef RTWN_WITHOUT_UCODE sc->sc_set_rsvd_page = r92c_set_rsvd_page; sc->sc_set_pwrmode = r92c_set_pwrmode; sc->sc_set_rssi = r92c_set_rssi; #endif sc->sc_beacon_init = r92c_beacon_init; sc->sc_beacon_enable = r92c_beacon_enable; sc->sc_beacon_set_rate = rtwn_nop_void_int; sc->sc_beacon_select = rtwn_nop_softc_int; sc->sc_temp_measure = r92c_temp_measure; sc->sc_temp_read = r92c_temp_read; sc->sc_init_tx_agg = rtwn_nop_softc; sc->sc_init_rx_agg = rtwn_nop_softc; sc->sc_init_ampdu = r92ce_init_ampdu; sc->sc_init_intr = r92ce_init_intr; sc->sc_init_edca = r92ce_init_edca; sc->sc_init_bb = r92ce_init_bb; sc->sc_init_rf = r92c_init_rf; sc->sc_init_antsel = rtwn_nop_softc; sc->sc_post_init = r92ce_post_init; sc->sc_init_bcnq1_boundary = rtwn_nop_int_softc; sc->mac_prog = &rtl8192ce_mac[0]; sc->mac_size = nitems(rtl8192ce_mac); sc->bb_prog = &rtl8192ce_bb[0]; sc->bb_size = nitems(rtl8192ce_bb); sc->agc_prog = &rtl8192ce_agc[0]; sc->agc_size = nitems(rtl8192ce_agc); sc->rf_prog = &rtl8192c_rf[0]; sc->page_count = R92CE_TX_PAGE_COUNT; sc->pktbuf_count = R92C_TXPKTBUF_COUNT; sc->ackto = 0x40; sc->npubqpages = R92CE_PUBQ_NPAGES; sc->nhqpages = R92CE_HPQ_NPAGES; sc->nnqpages = 0; sc->nlqpages = R92CE_LPQ_NPAGES; sc->page_size = R92C_TX_PAGE_SIZE; sc->txdesc_len = sizeof(struct r92ce_tx_desc); sc->efuse_maxlen = R92C_EFUSE_MAX_LEN; sc->efuse_maplen = R92C_EFUSE_MAP_LEN; sc->rx_dma_size = R92C_RX_DMA_BUFFER_SIZE; sc->macid_limit = R92C_MACID_MAX + 1; sc->cam_entry_limit = R92C_CAM_ENTRY_COUNT; sc->fwsize_limit = R92C_MAX_FW_SIZE; sc->temp_delta = R92C_CALIB_THRESHOLD; sc->bcn_status_reg[0] = R92C_TDECTRL; /* * TODO: some additional setup is required * to maintain few beacons at the same time. * * XXX BCNQ1 mechanism is not needed here; move it to the USB module. */ sc->bcn_status_reg[1] = R92C_TDECTRL; sc->rcr = 0; r92ce_attach_private(sc); } Index: head/sys/dev/rtwn/rtl8192c/r92c.h =================================================================== --- head/sys/dev/rtwn/rtl8192c/r92c.h (revision 312314) +++ head/sys/dev/rtwn/rtl8192c/r92c.h (revision 312315) @@ -1,114 +1,116 @@ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $ * $FreeBSD$ */ #ifndef RTL8192C_H #define RTL8192C_H /* * Global definitions. */ #define R92C_TXPKTBUF_COUNT 256 #define R92C_TX_PAGE_SIZE 128 #define R92C_RX_DMA_BUFFER_SIZE 0x2800 #define R92C_MAX_FW_SIZE 0x4000 #define R92C_MACID_MAX 31 #define R92C_CAM_ENTRY_COUNT 32 #define R92C_CALIB_THRESHOLD 2 /* * Function declarations. */ /* r92c_attach.c */ void r92c_detach_private(struct rtwn_softc *); void r92c_read_chipid_vendor(struct rtwn_softc *, uint32_t); /* r92c_beacon.c */ void r92c_beacon_init(struct rtwn_softc *, void *, int); void r92c_beacon_enable(struct rtwn_softc *, int, int); /* r92c_calib.c */ void r92c_iq_calib(struct rtwn_softc *); void r92c_lc_calib(struct rtwn_softc *); void r92c_temp_measure(struct rtwn_softc *); uint8_t r92c_temp_read(struct rtwn_softc *); /* r92c_chan.c */ void r92c_get_txpower(struct rtwn_softc *, int, struct ieee80211_channel *, uint16_t[]); void r92c_set_bw20(struct rtwn_softc *, uint8_t); void r92c_set_chan(struct rtwn_softc *, struct ieee80211_channel *); void r92c_set_gain(struct rtwn_softc *, uint8_t); void r92c_scan_start(struct ieee80211com *); void r92c_scan_end(struct ieee80211com *); /* r92c_fw.c */ #ifndef RTWN_WITHOUT_UCODE void r92c_fw_reset(struct rtwn_softc *, int); void r92c_fw_download_enable(struct rtwn_softc *, int); #endif void r92c_joinbss_rpt(struct rtwn_softc *, int); #ifndef RTWN_WITHOUT_UCODE int r92c_set_rsvd_page(struct rtwn_softc *, int, int, int); int r92c_set_pwrmode(struct rtwn_softc *, struct ieee80211vap *, int); void r92c_set_rssi(struct rtwn_softc *); void r92c_handle_c2h_report(void *); #endif /* r92c_init.c */ int r92c_check_condition(struct rtwn_softc *, const uint8_t[]); int r92c_set_page_size(struct rtwn_softc *); void r92c_init_bb_common(struct rtwn_softc *); int r92c_init_rf_chain(struct rtwn_softc *, const struct rtwn_rf_prog *, int); void r92c_init_rf(struct rtwn_softc *); void r92c_init_edca(struct rtwn_softc *); void r92c_init_ampdu(struct rtwn_softc *); void r92c_init_antsel(struct rtwn_softc *); void r92c_pa_bias_init(struct rtwn_softc *); /* r92c_rf.c */ uint32_t r92c_rf_read(struct rtwn_softc *, int, uint8_t); void r92c_rf_write(struct rtwn_softc *, int, uint8_t, uint32_t); /* r92c_rom.c */ void r92c_efuse_postread(struct rtwn_softc *); void r92c_parse_rom(struct rtwn_softc *, uint8_t *); /* r92c_rx.c */ int8_t r92c_get_rssi_cck(struct rtwn_softc *, void *); int8_t r92c_get_rssi_ofdm(struct rtwn_softc *, void *); uint8_t r92c_rx_radiotap_flags(const void *); +void r92c_get_rx_stats(struct rtwn_softc *, struct ieee80211_rx_stats *, + const void *, const void *); /* r92c_tx.c */ void r92c_tx_enable_ampdu(void *, int); void r92c_tx_setup_hwseq(void *); void r92c_tx_setup_macid(void *, int); void r92c_fill_tx_desc(struct rtwn_softc *, struct ieee80211_node *, struct mbuf *, void *, uint8_t, int); void r92c_fill_tx_desc_raw(struct rtwn_softc *, struct ieee80211_node *, struct mbuf *, void *, const struct ieee80211_bpf_params *); void r92c_fill_tx_desc_null(struct rtwn_softc *, void *, int, int, int); uint8_t r92c_tx_radiotap_flags(const void *); #endif /* RTL8192C_H */ Index: head/sys/dev/rtwn/rtl8192c/r92c_reg.h =================================================================== --- head/sys/dev/rtwn/rtl8192c/r92c_reg.h (revision 312314) +++ head/sys/dev/rtwn/rtl8192c/r92c_reg.h (revision 312315) @@ -1,855 +1,857 @@ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2015 Stefan Sperling * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $ * $FreeBSD$ */ #ifndef R92C_REG_H #define R92C_REG_H /* * MAC registers. */ /* System Configuration. */ #define R92C_SYS_ISO_CTRL 0x000 #define R92C_SYS_FUNC_EN 0x002 #define R92C_APS_FSMCO 0x004 #define R92C_SYS_CLKR 0x008 #define R92C_AFE_MISC 0x010 #define R92C_SPS0_CTRL 0x011 #define R92C_SPS_OCP_CFG 0x018 #define R92C_RSV_CTRL 0x01c #define R92C_RF_CTRL 0x01f #define R92C_LDOA15_CTRL 0x020 #define R92C_LDOV12D_CTRL 0x021 #define R92C_LDOHCI12_CTRL 0x022 #define R92C_LPLDO_CTRL 0x023 #define R92C_AFE_XTAL_CTRL 0x024 #define R92C_AFE_PLL_CTRL 0x028 #define R92C_APE_PLL_CTRL_EXT 0x02c #define R92C_MAC_PHY_CTRL R92C_APE_PLL_CTRL_EXT #define R92C_EFUSE_CTRL 0x030 #define R92C_EFUSE_TEST 0x034 #define R92C_PWR_DATA 0x038 #define R92C_CAL_TIMER 0x03c #define R92C_ACLK_MON 0x03e #define R92C_GPIO_MUXCFG 0x040 #define R92C_GPIO_IO_SEL 0x042 #define R92C_MAC_PINMUX_CFG 0x043 #define R92C_GPIO_PIN_CTRL 0x044 #define R92C_GPIO_IN 0x044 #define R92C_GPIO_OUT 0x045 #define R92C_GPIO_IOSEL 0x046 #define R92C_GPIO_MOD 0x047 #define R92C_GPIO_INTM 0x048 #define R92C_LEDCFG0 0x04c #define R92C_LEDCFG1 0x04d #define R92C_LEDCFG2 0x04e #define R92C_LEDCFG3 0x04f #define R92C_FSIMR 0x050 #define R92C_FSISR 0x054 #define R92C_HSIMR 0x058 #define R92C_HSISR 0x05c #define R92C_MULTI_FUNC_CTRL 0x068 #define R92C_MCUFWDL 0x080 #define R92C_HMEBOX_EXT(idx) (0x088 + (idx) * 2) #define R92C_EFUSE_ACCESS 0x0cf #define R92C_BIST_SCAN 0x0d0 #define R92C_BIST_RPT 0x0d4 #define R92C_BIST_ROM_RPT 0x0d8 #define R92C_HPON_FSM 0x0ec #define R92C_SYS_CFG 0x0f0 #define R92C_TYPE_ID 0x0fc /* MAC General Configuration. */ #define R92C_CR 0x100 #define R92C_MSR 0x102 #define R92C_PBP 0x104 #define R92C_TRXDMA_CTRL 0x10c #define R92C_TRXFF_BNDY 0x114 #define R92C_TRXFF_STATUS 0x118 #define R92C_RXFF_PTR 0x11c #define R92C_HIMR 0x120 #define R92C_HISR 0x124 #define R92C_HIMRE 0x128 #define R92C_HISRE 0x12c #define R92C_CPWM 0x12f #define R92C_FWIMR 0x130 #define R92C_FWISR 0x134 #define R92C_PKTBUF_DBG_CTRL 0x140 #define R92C_PKTBUF_DBG_DATA_L 0x144 #define R92C_PKTBUF_DBG_DATA_H 0x148 #define R92C_TC0_CTRL(i) (0x150 + (i) * 4) #define R92C_TCUNIT_BASE 0x164 #define R92C_MBIST_START 0x174 #define R92C_MBIST_DONE 0x178 #define R92C_MBIST_FAIL 0x17c #define R92C_C2H_EVT_MSG 0x1a0 #define R92C_C2H_EVT_CLEAR 0x1af #define R92C_C2H_EVT_MSG_TEST 0x1b8 #define R92C_MCUTST_1 0x1c0 #define R92C_FMETHR 0x1c8 #define R92C_HMETFR 0x1cc #define R92C_HMEBOX(idx) (0x1d0 + (idx) * 4) #define R92C_LLT_INIT 0x1e0 #define R92C_BB_ACCESS_CTRL 0x1e8 #define R92C_BB_ACCESS_DATA 0x1ec /* Tx DMA Configuration. */ #define R92C_RQPN 0x200 #define R92C_FIFOPAGE 0x204 #define R92C_TDECTRL 0x208 #define R92C_TXDMA_OFFSET_CHK 0x20c #define R92C_TXDMA_STATUS 0x210 #define R92C_RQPN_NPQ 0x214 /* Rx DMA Configuration. */ #define R92C_RXDMA_AGG_PG_TH 0x280 #define R92C_RXPKT_NUM 0x284 #define R92C_RXDMA_STATUS 0x288 /* Protocol Configuration. */ #define R92C_VOQ_INFORMATION 0x400 #define R92C_VIQ_INFORMATION 0x404 #define R92C_BEQ_INFORMATION 0x408 #define R92C_BKQ_INFORMATION 0x40c #define R92C_MGQ_INFORMATION 0x410 #define R92C_HGQ_INFORMATION 0x414 #define R92C_BCNQ_INFORMATION 0x418 #define R92C_CPU_MGQ_INFORMATION 0x41c #define R92C_FWHW_TXQ_CTRL 0x420 #define R92C_HWSEQ_CTRL 0x423 #define R92C_TXPKTBUF_BCNQ_BDNY 0x424 #define R92C_TXPKTBUF_MGQ_BDNY 0x425 #define R92C_SPEC_SIFS 0x428 #define R92C_RL 0x42a #define R92C_DARFRC 0x430 #define R92C_RARFRC 0x438 #define R92C_RRSR 0x440 #define R92C_ARFR(i) (0x444 + (i) * 4) #define R92C_AGGLEN_LMT 0x458 #define R92C_AMPDU_MIN_SPACE 0x45c #define R92C_TXPKTBUF_WMAC_LBK_BF_HD 0x45d #define R92C_FAST_EDCA_CTRL 0x460 #define R92C_RD_RESP_PKT_TH 0x463 #define R92C_INIRTS_RATE_SEL 0x480 #define R92C_INIDATA_RATE_SEL(macid) (0x484 + (macid)) #define R92C_QUEUE_CTRL 0x4c6 #define R92C_MAX_AGGR_NUM 0x4ca #define R92C_BAR_MODE_CTRL 0x4cc /* EDCA Configuration. */ #define R92C_EDCA_VO_PARAM 0x500 #define R92C_EDCA_VI_PARAM 0x504 #define R92C_EDCA_BE_PARAM 0x508 #define R92C_EDCA_BK_PARAM 0x50c #define R92C_BCNTCFG 0x510 #define R92C_PIFS 0x512 #define R92C_RDG_PIFS 0x513 #define R92C_SIFS_CCK 0x514 #define R92C_SIFS_OFDM 0x516 #define R92C_AGGR_BREAK_TIME 0x51a #define R92C_SLOT 0x51b #define R92C_TX_PTCL_CTRL 0x520 #define R92C_TXPAUSE 0x522 #define R92C_DIS_TXREQ_CLR 0x523 #define R92C_RD_CTRL 0x524 #define R92C_TBTT_PROHIBIT 0x540 #define R92C_RD_NAV_NXT 0x544 #define R92C_NAV_PROT_LEN 0x546 #define R92C_BCN_CTRL(id) ((id) + 0x550) /* WARNING: R92C_USTIME_TSF == 0x55c, not 0x551 */ #define R92C_MBID_NUM 0x552 #define R92C_DUAL_TSF_RST 0x553 #define R92C_BCN_INTERVAL(id) (0x554 + (id) * 2) #define R92C_DRVERLYINT 0x558 #define R92C_BCNDMATIM 0x559 #define R92C_ATIMWND 0x55a #define R92C_USTIME_TSF 0x55c #define R92C_BCN_MAX_ERR 0x55d #define R92C_RXTSF_OFFSET_CCK 0x55e #define R92C_RXTSF_OFFSET_OFDM 0x55f #define R92C_TSFTR(i) (0x560 + (i) * 8) #define R92C_PSTIMER 0x580 #define R92C_TIMER0 0x584 #define R92C_TIMER1 0x588 #define R92C_ACMHWCTRL 0x5c0 #define R92C_ACMRSTCTRL 0x5c1 #define R92C_ACMAVG 0x5c2 #define R92C_VO_ADMTIME 0x5c4 #define R92C_VI_ADMTIME 0x5c6 #define R92C_BE_ADMTIME 0x5c8 #define R92C_EDCA_RANDOM_GEN 0x5cc #define R92C_SCH_TXCMD 0x5d0 /* WMAC Configuration. */ #define R92C_APSD_CTRL 0x600 #define R92C_BWOPMODE 0x603 #define R92C_TCR 0x604 #define R92C_RCR 0x608 #define R92C_RX_PKT_LIMIT 0x60c #define R92C_RX_DRVINFO_SZ 0x60f #define R92C_MACID0 0x610 #define R92C_BSSID0 0x618 #define R92C_MAR 0x620 #define R92C_USTIME_EDCA 0x638 #define R92C_MAC_SPEC_SIFS 0x63a #define R92C_R2T_SIFS 0x63c #define R92C_T2T_SIFS 0x63e #define R92C_ACKTO 0x640 #define R92C_NAV_UPPER 0x652 #define R92C_WMAC_TRXPTCL_CTL 0x668 #define R92C_CAMCMD 0x670 #define R92C_CAMWRITE 0x674 #define R92C_CAMREAD 0x678 #define R92C_CAMDBG 0x67c #define R92C_SECCFG 0x680 #define R92C_RXFLTMAP0 0x6a0 #define R92C_RXFLTMAP1 0x6a2 #define R92C_RXFLTMAP2 0x6a4 #define R92C_BCN_PSR_RPT 0x6a8 #define R92C_MACID1 0x700 #define R92C_BSSID1 0x708 #define R92C_MACID(id) ((id) == 0 ? R92C_MACID0 : R92C_MACID1) #define R92C_BSSID(id) ((id) == 0 ? R92C_BSSID0 : R92C_BSSID1) /* Bits for R92C_SYS_ISO_CTRL. */ #define R92C_SYS_ISO_CTRL_MD2PP 0x0001 #define R92C_SYS_ISO_CTRL_UA2USB 0x0002 #define R92C_SYS_ISO_CTRL_UD2CORE 0x0004 #define R92C_SYS_ISO_CTRL_PA2PCIE 0x0008 #define R92C_SYS_ISO_CTRL_PD2CORE 0x0010 #define R92C_SYS_ISO_CTRL_IP2MAC 0x0020 #define R92C_SYS_ISO_CTRL_DIOP 0x0040 #define R92C_SYS_ISO_CTRL_DIOE 0x0080 #define R92C_SYS_ISO_CTRL_EB2CORE 0x0100 #define R92C_SYS_ISO_CTRL_DIOR 0x0200 #define R92C_SYS_ISO_CTRL_PWC_EV25V 0x4000 #define R92C_SYS_ISO_CTRL_PWC_EV12V 0x8000 /* Bits for R92C_SYS_FUNC_EN. */ #define R92C_SYS_FUNC_EN_BBRSTB 0x0001 #define R92C_SYS_FUNC_EN_BB_GLB_RST 0x0002 #define R92C_SYS_FUNC_EN_USBA 0x0004 #define R92C_SYS_FUNC_EN_UPLL 0x0008 #define R92C_SYS_FUNC_EN_USBD 0x0010 #define R92C_SYS_FUNC_EN_DIO_PCIE 0x0020 #define R92C_SYS_FUNC_EN_PCIEA 0x0040 #define R92C_SYS_FUNC_EN_PPLL 0x0080 #define R92C_SYS_FUNC_EN_PCIED 0x0100 #define R92C_SYS_FUNC_EN_DIOE 0x0200 #define R92C_SYS_FUNC_EN_CPUEN 0x0400 #define R92C_SYS_FUNC_EN_DCORE 0x0800 #define R92C_SYS_FUNC_EN_ELDR 0x1000 #define R92C_SYS_FUNC_EN_DIO_RF 0x2000 #define R92C_SYS_FUNC_EN_HWPDN 0x4000 #define R92C_SYS_FUNC_EN_MREGEN 0x8000 /* Bits for R92C_APS_FSMCO. */ #define R92C_APS_FSMCO_PFM_LDALL 0x00000001 #define R92C_APS_FSMCO_PFM_ALDN 0x00000002 #define R92C_APS_FSMCO_PFM_LDKP 0x00000004 #define R92C_APS_FSMCO_PFM_WOWL 0x00000008 #define R92C_APS_FSMCO_PDN_EN 0x00000010 #define R92C_APS_FSMCO_PDN_PL 0x00000020 #define R92C_APS_FSMCO_APFM_ONMAC 0x00000100 #define R92C_APS_FSMCO_APFM_OFF 0x00000200 #define R92C_APS_FSMCO_APFM_RSM 0x00000400 #define R92C_APS_FSMCO_AFSM_HSUS 0x00000800 #define R92C_APS_FSMCO_AFSM_PCIE 0x00001000 #define R92C_APS_FSMCO_APDM_MAC 0x00002000 #define R92C_APS_FSMCO_APDM_HOST 0x00004000 #define R92C_APS_FSMCO_APDM_HPDN 0x00008000 #define R92C_APS_FSMCO_RDY_MACON 0x00010000 #define R92C_APS_FSMCO_SUS_HOST 0x00020000 #define R92C_APS_FSMCO_ROP_ALD 0x00100000 #define R92C_APS_FSMCO_ROP_PWR 0x00200000 #define R92C_APS_FSMCO_ROP_SPS 0x00400000 #define R92C_APS_FSMCO_SOP_MRST 0x02000000 #define R92C_APS_FSMCO_SOP_FUSE 0x04000000 #define R92C_APS_FSMCO_SOP_ABG 0x08000000 #define R92C_APS_FSMCO_SOP_AMB 0x10000000 #define R92C_APS_FSMCO_SOP_RCK 0x20000000 #define R92C_APS_FSMCO_SOP_A8M 0x40000000 #define R92C_APS_FSMCO_XOP_BTCK 0x80000000 /* Bits for R92C_SYS_CLKR. */ #define R92C_SYS_CLKR_ANAD16V_EN 0x00000001 #define R92C_SYS_CLKR_ANA8M 0x00000002 #define R92C_SYS_CLKR_MACSLP 0x00000010 #define R92C_SYS_CLKR_LOADER_EN 0x00000020 #define R92C_SYS_CLKR_80M_SSC_DIS 0x00000080 #define R92C_SYS_CLKR_80M_SSC_EN_HO 0x00000100 #define R92C_SYS_CLKR_PHY_SSC_RSTB 0x00000200 #define R92C_SYS_CLKR_SEC_EN 0x00000400 #define R92C_SYS_CLKR_MAC_EN 0x00000800 #define R92C_SYS_CLKR_SYS_EN 0x00001000 #define R92C_SYS_CLKR_RING_EN 0x00002000 /* Bits for R92C_RF_CTRL. */ #define R92C_RF_CTRL_EN 0x01 #define R92C_RF_CTRL_RSTB 0x02 #define R92C_RF_CTRL_SDMRSTB 0x04 /* Bits for R92C_LDOA15_CTRL. */ #define R92C_LDOA15_CTRL_EN 0x01 #define R92C_LDOA15_CTRL_STBY 0x02 #define R92C_LDOA15_CTRL_OBUF 0x04 #define R92C_LDOA15_CTRL_REG_VOS 0x08 /* Bits for R92C_LDOV12D_CTRL. */ #define R92C_LDOV12D_CTRL_LDV12_EN 0x01 /* Bits for R92C_LPLDO_CTRL. */ #define R92C_LPLDO_CTRL_SLEEP 0x10 /* Bits for R92C_AFE_XTAL_CTRL. */ #define R92C_AFE_XTAL_CTRL_ADDR_M 0x007ff800 #define R92C_AFE_XTAL_CTRL_ADDR_S 11 /* Bits for R92C_AFE_PLL_CTRL. */ #define R92C_AFE_PLL_CTRL_EN 0x0001 #define R92C_AFE_PLL_CTRL_320_EN 0x0002 #define R92C_AFE_PLL_CTRL_FREF_SEL 0x0004 #define R92C_AFE_PLL_CTRL_EDGE_SEL 0x0008 #define R92C_AFE_PLL_CTRL_WDOGB 0x0010 #define R92C_AFE_PLL_CTRL_LPFEN 0x0020 /* Bits for R92C_EFUSE_CTRL. */ #define R92C_EFUSE_CTRL_DATA_M 0x000000ff #define R92C_EFUSE_CTRL_DATA_S 0 #define R92C_EFUSE_CTRL_ADDR_M 0x0003ff00 #define R92C_EFUSE_CTRL_ADDR_S 8 #define R92C_EFUSE_CTRL_VALID 0x80000000 /* Bits for R92C_GPIO_MUXCFG. */ #define R92C_GPIO_MUXCFG_ENBT 0x0020 /* Bits for R92C_LEDCFG0. */ #define R92C_LEDCFG0_DIS 0x08 /* Bits for R92C_MULTI_FUNC_CTRL. */ #define R92C_MULTI_BT_FUNC_EN 0x00040000 /* Bits for R92C_MCUFWDL. */ #define R92C_MCUFWDL_EN 0x00000001 #define R92C_MCUFWDL_RDY 0x00000002 #define R92C_MCUFWDL_CHKSUM_RPT 0x00000004 #define R92C_MCUFWDL_MACINI_RDY 0x00000008 #define R92C_MCUFWDL_BBINI_RDY 0x00000010 #define R92C_MCUFWDL_RFINI_RDY 0x00000020 #define R92C_MCUFWDL_WINTINI_RDY 0x00000040 #define R92C_MCUFWDL_RAM_DL_SEL 0x00000080 /* 1: RAM, 0: ROM */ #define R92C_MCUFWDL_PAGE_M 0x00070000 #define R92C_MCUFWDL_PAGE_S 16 #define R92C_MCUFWDL_ROM_DLEN 0x00080000 #define R92C_MCUFWDL_CPRST 0x00800000 /* Bits for R92C_EFUSE_ACCESS. */ #define R92C_EFUSE_ACCESS_OFF 0x00 #define R92C_EFUSE_ACCESS_ON 0x69 /* Bits for R92C_HPON_FSM. */ #define R92C_HPON_FSM_CHIP_BONDING_ID_S 22 #define R92C_HPON_FSM_CHIP_BONDING_ID_M 0x00c00000 #define R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R 1 /* Bits for R92C_SYS_CFG. */ #define R92C_SYS_CFG_XCLK_VLD 0x00000001 #define R92C_SYS_CFG_ACLK_VLD 0x00000002 #define R92C_SYS_CFG_UCLK_VLD 0x00000004 #define R92C_SYS_CFG_PCLK_VLD 0x00000008 #define R92C_SYS_CFG_PCIRSTB 0x00000010 #define R92C_SYS_CFG_V15_VLD 0x00000020 #define R92C_SYS_CFG_TRP_B15V_EN 0x00000080 #define R92C_SYS_CFG_SIC_IDLE 0x00000100 #define R92C_SYS_CFG_BD_MAC2 0x00000200 #define R92C_SYS_CFG_BD_MAC1 0x00000400 #define R92C_SYS_CFG_IC_MACPHY_MODE 0x00000800 #define R92C_SYS_CFG_CHIP_VER_RTL_M 0x0000f000 #define R92C_SYS_CFG_CHIP_VER_RTL_S 12 #define R92C_SYS_CFG_BT_FUNC 0x00010000 #define R92C_SYS_CFG_VENDOR_UMC 0x00080000 #define R92C_SYS_CFG_PAD_HWPD_IDN 0x00400000 #define R92C_SYS_CFG_TRP_VAUX_EN 0x00800000 #define R92C_SYS_CFG_TRP_BT_EN 0x01000000 #define R92C_SYS_CFG_BD_PKG_SEL 0x02000000 #define R92C_SYS_CFG_BD_HCI_SEL 0x04000000 #define R92C_SYS_CFG_TYPE_92C 0x08000000 /* Bits for R92C_CR. */ #define R92C_CR_HCI_TXDMA_EN 0x0001 #define R92C_CR_HCI_RXDMA_EN 0x0002 #define R92C_CR_TXDMA_EN 0x0004 #define R92C_CR_RXDMA_EN 0x0008 #define R92C_CR_PROTOCOL_EN 0x0010 #define R92C_CR_SCHEDULE_EN 0x0020 #define R92C_CR_MACTXEN 0x0040 #define R92C_CR_MACRXEN 0x0080 #define R92C_CR_ENSWBCN 0x0100 #define R92C_CR_ENSEC 0x0200 #define R92C_CR_CALTMR_EN 0x0400 /* Bits for R92C_MSR. */ #define R92C_MSR_NOLINK 0x00 #define R92C_MSR_ADHOC 0x01 #define R92C_MSR_INFRA 0x02 #define R92C_MSR_AP 0x03 #define R92C_MSR_MASK (R92C_MSR_AP) /* Bits for R92C_PBP. */ #define R92C_PBP_PSRX_M 0x0f #define R92C_PBP_PSRX_S 0 #define R92C_PBP_PSTX_M 0xf0 #define R92C_PBP_PSTX_S 4 #define R92C_PBP_64 0 #define R92C_PBP_128 1 #define R92C_PBP_256 2 #define R92C_PBP_512 3 #define R92C_PBP_1024 4 /* Bits for R92C_TRXDMA_CTRL. */ +#define R92C_TRXDMA_CTRL_RX_SHIFT_EN 0x0002 #define R92C_TRXDMA_CTRL_RXDMA_AGG_EN 0x0004 #define R92C_TRXDMA_CTRL_TXDMA_VOQ_MAP_M 0x0030 #define R92C_TRXDMA_CTRL_TXDMA_VOQ_MAP_S 4 #define R92C_TRXDMA_CTRL_TXDMA_VIQ_MAP_M 0x00c0 #define R92C_TRXDMA_CTRL_TXDMA_VIQ_MAP_S 6 #define R92C_TRXDMA_CTRL_TXDMA_BEQ_MAP_M 0x0300 #define R92C_TRXDMA_CTRL_TXDMA_BEQ_MAP_S 8 #define R92C_TRXDMA_CTRL_TXDMA_BKQ_MAP_M 0x0c00 #define R92C_TRXDMA_CTRL_TXDMA_BKQ_MAP_S 10 #define R92C_TRXDMA_CTRL_TXDMA_MGQ_MAP_M 0x3000 #define R92C_TRXDMA_CTRL_TXDMA_MGQ_MAP_S 12 #define R92C_TRXDMA_CTRL_TXDMA_HIQ_MAP_M 0xc000 #define R92C_TRXDMA_CTRL_TXDMA_HIQ_MAP_S 14 #define R92C_TRXDMA_CTRL_QUEUE_LOW 1 #define R92C_TRXDMA_CTRL_QUEUE_NORMAL 2 #define R92C_TRXDMA_CTRL_QUEUE_HIGH 3 #define R92C_TRXDMA_CTRL_QMAP_M 0xfff0 /* Shortcuts. */ #define R92C_TRXDMA_CTRL_QMAP_3EP 0xf5b0 #define R92C_TRXDMA_CTRL_QMAP_HQ_LQ 0xf5f0 #define R92C_TRXDMA_CTRL_QMAP_HQ_NQ 0xfaf0 #define R92C_TRXDMA_CTRL_QMAP_LQ 0x5550 #define R92C_TRXDMA_CTRL_QMAP_NQ 0xaaa0 #define R92C_TRXDMA_CTRL_QMAP_HQ 0xfff0 /* Bits for R92C_C2H_EVT_CLEAR. */ #define R92C_C2H_EVT_HOST_CLOSE 0x00 #define R92C_C2H_EVT_FW_CLOSE 0xff /* Bits for R92C_LLT_INIT. */ #define R92C_LLT_INIT_DATA_M 0x000000ff #define R92C_LLT_INIT_DATA_S 0 #define R92C_LLT_INIT_ADDR_M 0x0000ff00 #define R92C_LLT_INIT_ADDR_S 8 #define R92C_LLT_INIT_OP_M 0xc0000000 #define R92C_LLT_INIT_OP_S 30 #define R92C_LLT_INIT_OP_NO_ACTIVE 0 #define R92C_LLT_INIT_OP_WRITE 1 /* Bits for R92C_RQPN. */ #define R92C_RQPN_HPQ_M 0x000000ff #define R92C_RQPN_HPQ_S 0 #define R92C_RQPN_LPQ_M 0x0000ff00 #define R92C_RQPN_LPQ_S 8 #define R92C_RQPN_PUBQ_M 0x00ff0000 #define R92C_RQPN_PUBQ_S 16 #define R92C_RQPN_LD 0x80000000 /* Bits for R92C_TDECTRL. */ #define R92C_TDECTRL_BLK_DESC_NUM_M 0x000000f0 #define R92C_TDECTRL_BLK_DESC_NUM_S 4 #define R92C_TDECTRL_BCN_VALID 0x00010000 /* Bits for R92C_TXDMA_OFFSET_CHK. */ #define R92C_TXDMA_OFFSET_DROP_DATA_EN 0x00000200 /* Bits for R92C_FWHW_TXQ_CTRL. */ #define R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW 0x80 #define R92C_FWHW_TXQ_CTRL_REAL_BEACON 0x400000 /* Bits for R92C_SPEC_SIFS. */ #define R92C_SPEC_SIFS_CCK_M 0x00ff #define R92C_SPEC_SIFS_CCK_S 0 #define R92C_SPEC_SIFS_OFDM_M 0xff00 #define R92C_SPEC_SIFS_OFDM_S 8 /* Bits for R92C_RL. */ #define R92C_RL_LRL_M 0x003f #define R92C_RL_LRL_S 0 #define R92C_RL_SRL_M 0x3f00 #define R92C_RL_SRL_S 8 /* Size of R92C_DARFRC. */ #define R92C_DARFRC_SIZE 8 /* Bits for R92C_RRSR. */ #define R92C_RRSR_RATE_BITMAP_M 0x000fffff #define R92C_RRSR_RATE_BITMAP_S 0 #define R92C_RRSR_RATE_CCK_ONLY_1M 0xffff1 #define R92C_RRSR_RATE_ALL 0xfffff #define R92C_RRSR_RSC_LOWSUBCHNL 0x00200000 #define R92C_RRSR_RSC_UPSUBCHNL 0x00400000 #define R92C_RRSR_SHORT 0x00800000 /* Bits for R92C_EDCA_XX_PARAM. */ #define R92C_EDCA_PARAM_AIFS_M 0x000000ff #define R92C_EDCA_PARAM_AIFS_S 0 #define R92C_EDCA_PARAM_ECWMIN_M 0x00000f00 #define R92C_EDCA_PARAM_ECWMIN_S 8 #define R92C_EDCA_PARAM_ECWMAX_M 0x0000f000 #define R92C_EDCA_PARAM_ECWMAX_S 12 #define R92C_EDCA_PARAM_TXOP_M 0xffff0000 #define R92C_EDCA_PARAM_TXOP_S 16 /* Bits for R92C_HWSEQ_CTRL / R92C_TXPAUSE. */ #define R92C_TX_QUEUE_VO 0x01 #define R92C_TX_QUEUE_VI 0x02 #define R92C_TX_QUEUE_BE 0x04 #define R92C_TX_QUEUE_BK 0x08 #define R92C_TX_QUEUE_MGT 0x10 #define R92C_TX_QUEUE_HIGH 0x20 #define R92C_TX_QUEUE_BCN 0x40 /* Shortcuts. */ #define R92C_TX_QUEUE_AC \ (R92C_TX_QUEUE_VO | R92C_TX_QUEUE_VI | \ R92C_TX_QUEUE_BE | R92C_TX_QUEUE_BK) #define R92C_TX_QUEUE_ALL \ (R92C_TX_QUEUE_AC | R92C_TX_QUEUE_MGT | \ R92C_TX_QUEUE_HIGH | R92C_TX_QUEUE_BCN | 0x80) /* XXX */ /* Bits for R92C_BCN_CTRL. */ #define R92C_BCN_CTRL_EN_MBSSID 0x02 #define R92C_BCN_CTRL_TXBCN_RPT 0x04 #define R92C_BCN_CTRL_EN_BCN 0x08 #define R92C_BCN_CTRL_DIS_TSF_UDT0 0x10 /* Bits for R92C_DUAL_TSF_RST. */ #define R92C_DUAL_TSF_RESET(id) (0x01 << (id)) #define R92C_DUAL_TSF_RST_TXOK 0x20 /* Bits for R92C_ACMHWCTRL. */ #define R92C_ACMHWCTRL_EN 0x01 #define R92C_ACMHWCTRL_BE 0x02 #define R92C_ACMHWCTRL_VI 0x04 #define R92C_ACMHWCTRL_VO 0x08 #define R92C_ACMHWCTRL_ACM_MASK 0x0f /* Bits for R92C_APSD_CTRL. */ #define R92C_APSD_CTRL_OFF 0x40 #define R92C_APSD_CTRL_OFF_STATUS 0x80 /* Bits for R92C_BWOPMODE. */ #define R92C_BWOPMODE_11J 0x01 #define R92C_BWOPMODE_5G 0x02 #define R92C_BWOPMODE_20MHZ 0x04 /* Bits for R92C_TCR. */ #define R92C_TCR_TSFRST 0x00000001 #define R92C_TCR_DIS_GCLK 0x00000002 #define R92C_TCR_PAD_SEL 0x00000004 #define R92C_TCR_PWR_ST 0x00000040 #define R92C_TCR_PWRBIT_OW_EN 0x00000080 #define R92C_TCR_ACRC 0x00000100 #define R92C_TCR_CFENDFORM 0x00000200 #define R92C_TCR_ICV 0x00000400 /* Bits for R92C_RCR. */ #define R92C_RCR_AAP 0x00000001 #define R92C_RCR_APM 0x00000002 #define R92C_RCR_AM 0x00000004 #define R92C_RCR_AB 0x00000008 #define R92C_RCR_ADD3 0x00000010 #define R92C_RCR_APWRMGT 0x00000020 #define R92C_RCR_CBSSID_DATA 0x00000040 #define R92C_RCR_CBSSID_BCN 0x00000080 #define R92C_RCR_ACRC32 0x00000100 #define R92C_RCR_AICV 0x00000200 #define R92C_RCR_ADF 0x00000800 #define R92C_RCR_ACF 0x00001000 #define R92C_RCR_AMF 0x00002000 #define R92C_RCR_HTC_LOC_CTRL 0x00004000 #define R92C_RCR_MFBEN 0x00400000 #define R92C_RCR_LSIGEN 0x00800000 #define R92C_RCR_ENMBID 0x01000000 #define R92C_RCR_APP_BA_SSN 0x08000000 #define R92C_RCR_APP_PHYSTS 0x10000000 #define R92C_RCR_APP_ICV 0x20000000 #define R92C_RCR_APP_MIC 0x40000000 #define R92C_RCR_APPFCS 0x80000000 /* Bits for R92C_RX_DRVINFO_SZ. */ -#define R92C_RX_DRVINFO_SZ_DEF 4 /* XXX other values will not work */ +/* XXX other values will not work */ +#define R92C_RX_DRVINFO_SZ_DEF ((RTWN_PHY_STATUS_SIZE) / 8) /* Bits for R92C_WMAC_TRXPTCL_CTL. */ #define R92C_WMAC_TRXPTCL_SHPRE 0x00020000 /* Bits for R92C_CAMCMD. */ #define R92C_CAMCMD_ADDR_M 0x0000ffff #define R92C_CAMCMD_ADDR_S 0 #define R92C_CAMCMD_WRITE 0x00010000 #define R92C_CAMCMD_CLR 0x40000000 #define R92C_CAMCMD_POLLING 0x80000000 /* * CAM entries. */ #define R92C_CAM_CTL0(entry) ((entry) * 8 + 0) #define R92C_CAM_CTL1(entry) ((entry) * 8 + 1) #define R92C_CAM_KEY(entry, i) ((entry) * 8 + 2 + (i)) #define R92C_CAM_CTL6(entry) ((entry) * 8 + 6) #define R92C_CAM_CTL7(entry) ((entry) * 8 + 7) /* Bits for R92C_CAM_CTL0(i). */ #define R92C_CAM_KEYID_M 0x00000003 #define R92C_CAM_KEYID_S 0 #define R92C_CAM_ALGO_M 0x0000001c #define R92C_CAM_ALGO_S 2 #define R92C_CAM_ALGO_NONE 0 #define R92C_CAM_ALGO_WEP40 1 #define R92C_CAM_ALGO_TKIP 2 #define R92C_CAM_ALGO_AES 4 #define R92C_CAM_ALGO_WEP104 5 #define R92C_CAM_VALID 0x00008000 #define R92C_CAM_MACLO_M 0xffff0000 #define R92C_CAM_MACLO_S 16 /* Bits for R92C_SECCFG. */ #define R92C_SECCFG_TXUCKEY_DEF 0x0001 #define R92C_SECCFG_RXUCKEY_DEF 0x0002 #define R92C_SECCFG_TXENC_ENA 0x0004 #define R92C_SECCFG_RXDEC_ENA 0x0008 #define R92C_SECCFG_CMP_A2 0x0010 #define R92C_SECCFG_MC_SRCH_DIS 0x0020 #define R92C_SECCFG_TXBCKEY_DEF 0x0040 #define R92C_SECCFG_RXBCKEY_DEF 0x0080 /* Bits for R92C_RXFLTMAP*. */ #define R92C_RXFLTMAP_SUBTYPE(subtype) \ (1 << ((subtype) >> IEEE80211_FC0_SUBTYPE_SHIFT)) /* * Baseband registers. */ #define R92C_FPGA0_RFMOD 0x800 #define R92C_FPGA0_TXINFO 0x804 #define R92C_HSSI_PARAM1(chain) (0x820 + (chain) * 8) #define R92C_HSSI_PARAM2(chain) (0x824 + (chain) * 8) #define R92C_TXAGC_RATE18_06(i) (((i) == 0) ? 0xe00 : 0x830) #define R92C_TXAGC_RATE54_24(i) (((i) == 0) ? 0xe04 : 0x834) #define R92C_TXAGC_A_CCK1_MCS32 0xe08 #define R92C_TXAGC_B_CCK1_55_MCS32 0x838 #define R92C_TXAGC_B_CCK11_A_CCK2_11 0x86c #define R92C_TXAGC_MCS03_MCS00(i) (((i) == 0) ? 0xe10 : 0x83c) #define R92C_TXAGC_MCS07_MCS04(i) (((i) == 0) ? 0xe14 : 0x848) #define R92C_TXAGC_MCS11_MCS08(i) (((i) == 0) ? 0xe18 : 0x84c) #define R92C_TXAGC_MCS15_MCS12(i) (((i) == 0) ? 0xe1c : 0x868) #define R92C_LSSI_PARAM(chain) (0x840 + (chain) * 4) #define R92C_FPGA0_RFIFACEOE(chain) (0x860 + (chain) * 4) #define R92C_FPGA0_RFIFACESW(idx) (0x870 + (idx) * 4) #define R92C_FPGA0_RFPARAM(idx) (0x878 + (idx) * 4) #define R92C_FPGA0_ANAPARAM2 0x884 #define R92C_LSSI_READBACK(chain) (0x8a0 + (chain) * 4) #define R92C_HSPI_READBACK(chain) (0x8b8 + (chain) * 4) #define R92C_FPGA1_RFMOD 0x900 #define R92C_FPGA1_TXINFO 0x90c #define R92C_CCK0_SYSTEM 0xa00 #define R92C_CCK0_AFESETTING 0xa04 #define R92C_OFDM0_TRXPATHENA 0xc04 #define R92C_OFDM0_TRMUXPAR 0xc08 #define R92C_OFDM0_RXIQIMBALANCE(chain) (0xc14 + (chain) * 8) #define R92C_OFDM0_ECCATHRESHOLD 0xc4c #define R92C_OFDM0_AGCCORE1(chain) (0xc50 + (chain) * 8) #define R92C_OFDM0_AGCPARAM1 0xc70 #define R92C_OFDM0_AGCRSSITABLE 0xc78 #define R92C_OFDM0_TXIQIMBALANCE(chain) (0xc80 + (chain) * 8) #define R92C_OFDM0_TXAFE(chain) (0xc94 + (chain) * 8) #define R92C_OFDM0_RXIQEXTANTA 0xca0 #define R92C_OFDM1_LSTF 0xd00 /* Bits for R92C_FPGA[01]_RFMOD. */ #define R92C_RFMOD_40MHZ 0x00000001 #define R92C_RFMOD_JAPAN 0x00000002 #define R92C_RFMOD_CCK_TXSC 0x00000030 #define R92C_RFMOD_CCK_EN 0x01000000 #define R92C_RFMOD_OFDM_EN 0x02000000 /* Bits for R92C_HSSI_PARAM1(i). */ #define R92C_HSSI_PARAM1_PI 0x00000100 /* Bits for R92C_HSSI_PARAM2(i). */ #define R92C_HSSI_PARAM2_CCK_HIPWR 0x00000200 #define R92C_HSSI_PARAM2_ADDR_LENGTH 0x00000400 #define R92C_HSSI_PARAM2_DATA_LENGTH 0x00000800 #define R92C_HSSI_PARAM2_READ_ADDR_M 0x7f800000 #define R92C_HSSI_PARAM2_READ_ADDR_S 23 #define R92C_HSSI_PARAM2_READ_EDGE 0x80000000 /* Bits for R92C_TXAGC_A_CCK1_MCS32. */ #define R92C_TXAGC_A_CCK1_M 0x0000ff00 #define R92C_TXAGC_A_CCK1_S 8 /* Bits for R92C_TXAGC_B_CCK11_A_CCK2_11. */ #define R92C_TXAGC_B_CCK11_M 0x000000ff #define R92C_TXAGC_B_CCK11_S 0 #define R92C_TXAGC_A_CCK2_M 0x0000ff00 #define R92C_TXAGC_A_CCK2_S 8 #define R92C_TXAGC_A_CCK55_M 0x00ff0000 #define R92C_TXAGC_A_CCK55_S 16 #define R92C_TXAGC_A_CCK11_M 0xff000000 #define R92C_TXAGC_A_CCK11_S 24 /* Bits for R92C_TXAGC_B_CCK1_55_MCS32. */ #define R92C_TXAGC_B_CCK1_M 0x0000ff00 #define R92C_TXAGC_B_CCK1_S 8 #define R92C_TXAGC_B_CCK2_M 0x00ff0000 #define R92C_TXAGC_B_CCK2_S 16 #define R92C_TXAGC_B_CCK55_M 0xff000000 #define R92C_TXAGC_B_CCK55_S 24 /* Bits for R92C_TXAGC_RATE18_06(x). */ #define R92C_TXAGC_RATE06_M 0x000000ff #define R92C_TXAGC_RATE06_S 0 #define R92C_TXAGC_RATE09_M 0x0000ff00 #define R92C_TXAGC_RATE09_S 8 #define R92C_TXAGC_RATE12_M 0x00ff0000 #define R92C_TXAGC_RATE12_S 16 #define R92C_TXAGC_RATE18_M 0xff000000 #define R92C_TXAGC_RATE18_S 24 /* Bits for R92C_TXAGC_RATE54_24(x). */ #define R92C_TXAGC_RATE24_M 0x000000ff #define R92C_TXAGC_RATE24_S 0 #define R92C_TXAGC_RATE36_M 0x0000ff00 #define R92C_TXAGC_RATE36_S 8 #define R92C_TXAGC_RATE48_M 0x00ff0000 #define R92C_TXAGC_RATE48_S 16 #define R92C_TXAGC_RATE54_M 0xff000000 #define R92C_TXAGC_RATE54_S 24 /* Bits for R92C_TXAGC_MCS03_MCS00(x). */ #define R92C_TXAGC_MCS00_M 0x000000ff #define R92C_TXAGC_MCS00_S 0 #define R92C_TXAGC_MCS01_M 0x0000ff00 #define R92C_TXAGC_MCS01_S 8 #define R92C_TXAGC_MCS02_M 0x00ff0000 #define R92C_TXAGC_MCS02_S 16 #define R92C_TXAGC_MCS03_M 0xff000000 #define R92C_TXAGC_MCS03_S 24 /* Bits for R92C_TXAGC_MCS07_MCS04(x). */ #define R92C_TXAGC_MCS04_M 0x000000ff #define R92C_TXAGC_MCS04_S 0 #define R92C_TXAGC_MCS05_M 0x0000ff00 #define R92C_TXAGC_MCS05_S 8 #define R92C_TXAGC_MCS06_M 0x00ff0000 #define R92C_TXAGC_MCS06_S 16 #define R92C_TXAGC_MCS07_M 0xff000000 #define R92C_TXAGC_MCS07_S 24 /* Bits for R92C_TXAGC_MCS11_MCS08(x). */ #define R92C_TXAGC_MCS08_M 0x000000ff #define R92C_TXAGC_MCS08_S 0 #define R92C_TXAGC_MCS09_M 0x0000ff00 #define R92C_TXAGC_MCS09_S 8 #define R92C_TXAGC_MCS10_M 0x00ff0000 #define R92C_TXAGC_MCS10_S 16 #define R92C_TXAGC_MCS11_M 0xff000000 #define R92C_TXAGC_MCS11_S 24 /* Bits for R92C_TXAGC_MCS15_MCS12(x). */ #define R92C_TXAGC_MCS12_M 0x000000ff #define R92C_TXAGC_MCS12_S 0 #define R92C_TXAGC_MCS13_M 0x0000ff00 #define R92C_TXAGC_MCS13_S 8 #define R92C_TXAGC_MCS14_M 0x00ff0000 #define R92C_TXAGC_MCS14_S 16 #define R92C_TXAGC_MCS15_M 0xff000000 #define R92C_TXAGC_MCS15_S 24 /* Bits for R92C_LSSI_PARAM(i). */ #define R92C_LSSI_PARAM_DATA_M 0x000fffff #define R92C_LSSI_PARAM_DATA_S 0 #define R92C_LSSI_PARAM_ADDR_M 0x03f00000 #define R92C_LSSI_PARAM_ADDR_S 20 /* Bits for R92C_FPGA0_RFIFACEOE(0). */ #define R92C_FPGA0_RFIFACEOE0_ANT_M 0x00000300 #define R92C_FPGA0_RFIFACEOE0_ANT_S 8 /* Bits for R92C_FPGA0_ANAPARAM2. */ #define R92C_FPGA0_ANAPARAM2_CBW20 0x00000400 /* Bits for R92C_LSSI_READBACK(i). */ #define R92C_LSSI_READBACK_DATA_M 0x000fffff #define R92C_LSSI_READBACK_DATA_S 0 /* Bits for R92C_OFDM0_AGCCORE1(i). */ #define R92C_OFDM0_AGCCORE1_GAIN_M 0x0000007f #define R92C_OFDM0_AGCCORE1_GAIN_S 0 /* * RF (6052) registers. */ #define R92C_RF_AC 0x00 #define R92C_RF_IQADJ_G(i) (0x01 + (i)) #define R92C_RF_POW_TRSW 0x05 #define R92C_RF_GAIN_RX 0x06 #define R92C_RF_GAIN_TX 0x07 #define R92C_RF_TXM_IDAC 0x08 #define R92C_RF_BS_IQGEN 0x0f #define R92C_RF_MODE1 0x10 #define R92C_RF_MODE2 0x11 #define R92C_RF_RX_AGC_HP 0x12 #define R92C_RF_TX_AGC 0x13 #define R92C_RF_BIAS 0x14 #define R92C_RF_IPA 0x15 #define R92C_RF_POW_ABILITY 0x17 #define R92C_RF_CHNLBW 0x18 #define R92C_RF_RX_G1 0x1a #define R92C_RF_RX_G2 0x1b #define R92C_RF_RX_BB2 0x1c #define R92C_RF_RX_BB1 0x1d #define R92C_RF_RCK1 0x1e #define R92C_RF_RCK2 0x1f #define R92C_RF_TX_G(i) (0x20 + (i)) #define R92C_RF_TX_BB1 0x23 #define R92C_RF_T_METER 0x24 #define R92C_RF_SYN_G(i) (0x25 + (i)) #define R92C_RF_RCK_OS 0x30 #define R92C_RF_TXPA_G(i) (0x31 + (i)) /* Bits for R92C_RF_AC. */ #define R92C_RF_AC_MODE_M 0x70000 #define R92C_RF_AC_MODE_S 16 #define R92C_RF_AC_MODE_STANDBY 1 /* Bits for R92C_RF_CHNLBW. */ #define R92C_RF_CHNLBW_CHNL_M 0x003ff #define R92C_RF_CHNLBW_CHNL_S 0 #define R92C_RF_CHNLBW_BW20 0x00400 #define R92C_RF_CHNLBW_LCSTART 0x08000 /* Bits for R92C_RF_T_METER. */ #define R92C_RF_T_METER_START 0x60 #define R92C_RF_T_METER_VAL_M 0x1f #define R92C_RF_T_METER_VAL_S 0 #endif /* R92C_REG_H */ Index: head/sys/dev/rtwn/rtl8192c/r92c_rx.c =================================================================== --- head/sys/dev/rtwn/rtl8192c/r92c_rx.c (revision 312314) +++ head/sys/dev/rtwn/rtl8192c/r92c_rx.c (revision 312315) @@ -1,102 +1,146 @@ /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2014 Kevin Lo * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include int8_t r92c_get_rssi_cck(struct rtwn_softc *sc, void *physt) { static const int8_t cckoff[] = { 16, -12, -26, -46 }; struct r92c_rx_cck *cck = (struct r92c_rx_cck *)physt; uint8_t rpt; int8_t rssi; if (sc->sc_flags & RTWN_FLAG_CCK_HIPWR) { rpt = (cck->agc_rpt >> 5) & 0x03; rssi = (cck->agc_rpt & 0x1f) << 1; } else { rpt = (cck->agc_rpt >> 6) & 0x03; rssi = cck->agc_rpt & 0x3e; } rssi = cckoff[rpt] - rssi; return (rssi); } int8_t r92c_get_rssi_ofdm(struct rtwn_softc *sc, void *physt) { struct r92c_rx_phystat *phy = (struct r92c_rx_phystat *)physt; int rssi; /* Get average RSSI. */ rssi = ((phy->pwdb_all >> 1) & 0x7f) - 110; return (rssi); } uint8_t r92c_rx_radiotap_flags(const void *buf) { const struct r92c_rx_stat *stat = buf; uint8_t flags, rate; if (!(stat->rxdw3 & htole32(R92C_RXDW3_SPLCP))) return (0); rate = MS(le32toh(stat->rxdw3), R92C_RXDW3_RATE); if (RTWN_RATE_IS_CCK(rate)) flags = IEEE80211_RADIOTAP_F_SHORTPRE; else flags = IEEE80211_RADIOTAP_F_SHORTGI; return (flags); } + +void +r92c_get_rx_stats(struct rtwn_softc *sc, struct ieee80211_rx_stats *rxs, + const void *desc, const void *physt_ptr) +{ + const struct r92c_rx_stat *stat = desc; + uint32_t rxdw1, rxdw3; + uint8_t rate; + + rxdw1 = le32toh(stat->rxdw1); + rxdw3 = le32toh(stat->rxdw3); + rate = MS(rxdw3, R92C_RXDW3_RATE); + + if (rxdw1 & R92C_RXDW1_AMPDU) + rxs->c_pktflags |= IEEE80211_RX_F_AMPDU; + else if (rxdw1 & R92C_RXDW1_AMPDU_MORE) + rxs->c_pktflags |= IEEE80211_RX_F_AMPDU_MORE; + if ((rxdw3 & R92C_RXDW3_SPLCP) && rate >= RTWN_RIDX_MCS(0)) + rxs->c_pktflags |= IEEE80211_RX_F_SHORTGI; + + if (rxdw3 & R92C_RXDW3_HT40) + rxs->c_width = IEEE80211_RX_FW_40MHZ; + else + rxs->c_width = IEEE80211_RX_FW_20MHZ; + + if (RTWN_RATE_IS_CCK(rate)) + rxs->c_phytype = IEEE80211_RX_FP_11B; + else if (rate < RTWN_RIDX_MCS(0)) + rxs->c_phytype = IEEE80211_RX_FP_11G; + else + rxs->c_phytype = IEEE80211_RX_FP_11NG; + + /* Map HW rate index to 802.11 rate. */ + if (rate < RTWN_RIDX_MCS(0)) { + rxs->c_rate = ridx2rate[rate]; + if (RTWN_RATE_IS_CCK(rate)) + rxs->c_pktflags |= IEEE80211_RX_F_CCK; + else + rxs->c_pktflags |= IEEE80211_RX_F_OFDM; + } else { /* MCS0~15. */ + rxs->c_rate = IEEE80211_RATE_MCS | (rate - 12); + rxs->c_pktflags |= IEEE80211_RX_F_HT; + } +} Index: head/sys/dev/rtwn/rtl8192c/r92c_rx_desc.h =================================================================== --- head/sys/dev/rtwn/rtl8192c/r92c_rx_desc.h (revision 312314) +++ head/sys/dev/rtwn/rtl8192c/r92c_rx_desc.h (revision 312315) @@ -1,95 +1,100 @@ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $ * $FreeBSD$ */ #ifndef R92C_RX_DESC_H #define R92C_RX_DESC_H /* Rx MAC descriptor (common parts / USB). */ struct r92c_rx_stat { uint32_t rxdw0; #define R92C_RXDW0_PKTLEN_M 0x00003fff #define R92C_RXDW0_PKTLEN_S 0 #define R92C_RXDW0_CRCERR 0x00004000 #define R92C_RXDW0_ICVERR 0x00008000 #define R92C_RXDW0_INFOSZ_M 0x000f0000 #define R92C_RXDW0_INFOSZ_S 16 #define R92C_RXDW0_CIPHER_M 0x00700000 #define R92C_RXDW0_CIPHER_S 20 #define R92C_RXDW0_QOS 0x00800000 #define R92C_RXDW0_SHIFT_M 0x03000000 #define R92C_RXDW0_SHIFT_S 24 #define R92C_RXDW0_PHYST 0x04000000 #define R92C_RXDW0_SWDEC 0x08000000 #define R92C_RXDW0_LS 0x10000000 #define R92C_RXDW0_FS 0x20000000 #define R92C_RXDW0_EOR 0x40000000 #define R92C_RXDW0_OWN 0x80000000 uint32_t rxdw1; #define R92C_RXDW1_MACID_M 0x0000001f #define R92C_RXDW1_MACID_S 0 +#define R92C_RXDW1_AMSDU 0x00002000 +#define R92C_RXDW1_AMPDU_MORE 0x00004000 +#define R92C_RXDW1_AMPDU 0x00008000 #define R92C_RXDW1_MC 0x40000000 #define R92C_RXDW1_BC 0x80000000 uint32_t rxdw2; uint32_t rxdw3; #define R92C_RXDW3_RATE_M 0x0000003f #define R92C_RXDW3_RATE_S 0 #define R92C_RXDW3_HT 0x00000040 #define R92C_RXDW3_SPLCP 0x00000100 #define R92C_RXDW3_HT40 0x00000200 #define R92C_RXDW3_HTC 0x00000400 +#define R92C_RXDW3_BSSID_FIT_M 0x00003000 +#define R92C_RXDW3_BSSID_FIT_S 12 uint32_t rxdw4; uint32_t tsf_low; } __packed __attribute__((aligned(4))); /* Rx PHY CCK descriptor. */ struct r92c_rx_cck { uint8_t adc_pwdb[4]; uint8_t sq_rpt; uint8_t agc_rpt; } __packed; /* Rx PHY descriptor. */ struct r92c_rx_phystat { uint8_t trsw_gain[4]; uint8_t pwdb_all; uint8_t cfosho[4]; uint8_t cfotail[4]; uint8_t rxevm[2]; uint8_t rxsnr[4]; uint8_t pdsnr[2]; uint8_t csi_current[2]; uint8_t csi_target[2]; uint8_t sigevm; uint8_t max_ex_pwr; uint8_t phy_byte28; #define R92C_PHY_BYTE28_ANTSEL 0x01 #define R92C_PHY_BYTE28_ANTSEL_B 0x02 #define R92C_PHY_BYTE28_ANT_TRAIN_EN 0x04 #define R92C_PHY_BYTE28_IDLE_LONG 0x08 #define R92C_PHY_BYTE28_RXSC_M 0x30 #define R92C_PHY_BYTE28_RXSC_S 4 #define R92C_PHY_BYTE28_SGI_EN 0x40 #define R92C_PHY_BYTE28_EX_INTF_FLG 0x80 } __packed; #endif /* R92C_RX_DESC_H */ Index: head/sys/dev/rtwn/rtl8192c/usb/r92cu_attach.c =================================================================== --- head/sys/dev/rtwn/rtl8192c/usb/r92cu_attach.c (revision 312314) +++ head/sys/dev/rtwn/rtl8192c/usb/r92cu_attach.c (revision 312315) @@ -1,245 +1,246 @@ /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2014 Kevin Lo * Copyright (c) 2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include static struct rtwn_r92c_txpwr r92c_txpwr; void r92cu_attach(struct rtwn_usb_softc *); static void r92cu_postattach(struct rtwn_softc *sc) { struct r92c_softc *rs = sc->sc_priv; struct ieee80211com *ic = &sc->sc_ic; if (!(rs->chip & R92C_CHIP_92C) && rs->board_type == R92C_BOARD_TYPE_HIGHPA) { sc->agc_prog = &rtl8188ru_agc[0]; sc->agc_size = nitems(rtl8188ru_agc); rs->rs_txagc = &rtl8188ru_txagc[0]; } else { sc->agc_prog = &rtl8192ce_agc[0]; sc->agc_size = nitems(rtl8192ce_agc); rs->rs_txagc = &rtl8192cu_txagc[0]; } if ((rs->chip & (R92C_CHIP_UMC_A_CUT | R92C_CHIP_92C)) == R92C_CHIP_UMC_A_CUT) { sc->fwname = "rtwn-rtl8192cfwU"; } else { sc->fwname = "rtwn-rtl8192cfwT"; } sc->fwsig = 0x88c; rs->rs_scan_start = ic->ic_scan_start; ic->ic_scan_start = r92c_scan_start; rs->rs_scan_end = ic->ic_scan_end; ic->ic_scan_end = r92c_scan_end; } static void r92cu_set_name(struct rtwn_softc *sc) { struct r92c_softc *rs = sc->sc_priv; if (!(rs->chip & R92C_CHIP_92C)) { if (rs->board_type == R92C_BOARD_TYPE_HIGHPA) sc->name = "RTL8188RU"; else if (rs->board_type == R92C_BOARD_TYPE_MINICARD) sc->name = "RTL8188CU-VAU"; else sc->name = "RTL8188CUS"; } else sc->name = "RTL8192CU"; } static void r92cu_attach_private(struct rtwn_softc *sc) { struct r92c_softc *rs; rs = malloc(sizeof(struct r92c_softc), M_RTWN_PRIV, M_WAITOK | M_ZERO); rs->rs_txpwr = &r92c_txpwr; rs->rs_set_bw20 = r92c_set_bw20; rs->rs_get_txpower = r92c_get_txpower; rs->rs_set_gain = r92c_set_gain; rs->rs_tx_enable_ampdu = r92c_tx_enable_ampdu; rs->rs_tx_setup_hwseq = r92c_tx_setup_hwseq; rs->rs_tx_setup_macid = r92c_tx_setup_macid; rs->rs_set_name = r92cu_set_name; #ifndef RTWN_WITHOUT_UCODE rs->rs_c2h_timeout = hz; callout_init_mtx(&rs->rs_c2h_report, &sc->sc_mtx, 0); #endif rs->rf_read_delay[0] = 10; rs->rf_read_delay[1] = 100; rs->rf_read_delay[2] = 10; sc->sc_priv = rs; } static void r92cu_adj_devcaps(struct rtwn_softc *sc) { /* XXX Currently broken / incomplete. */ sc->sc_ic.ic_caps &= ~IEEE80211_C_PMGT; } void r92cu_attach(struct rtwn_usb_softc *uc) { struct rtwn_softc *sc = &uc->uc_sc; /* USB part. */ uc->uc_align_rx = r92cu_align_rx; uc->tx_agg_desc_num = 6; /* Common part. */ sc->sc_flags = RTWN_FLAG_CAM_FIXED; sc->sc_set_chan = r92c_set_chan; sc->sc_fill_tx_desc = r92c_fill_tx_desc; sc->sc_fill_tx_desc_raw = r92c_fill_tx_desc_raw; sc->sc_fill_tx_desc_null = r92c_fill_tx_desc_null; sc->sc_dump_tx_desc = r92cu_dump_tx_desc; sc->sc_tx_radiotap_flags = r92c_tx_radiotap_flags; sc->sc_rx_radiotap_flags = r92c_rx_radiotap_flags; + sc->sc_get_rx_stats = r92c_get_rx_stats; sc->sc_get_rssi_cck = r92c_get_rssi_cck; sc->sc_get_rssi_ofdm = r92c_get_rssi_ofdm; sc->sc_classify_intr = r92cu_classify_intr; sc->sc_handle_tx_report = rtwn_nop_softc_uint8_int; sc->sc_handle_c2h_report = rtwn_nop_softc_uint8_int; sc->sc_check_frame = rtwn_nop_int_softc_mbuf; sc->sc_rf_read = r92c_rf_read; sc->sc_rf_write = r92c_rf_write; sc->sc_check_condition = r92c_check_condition; sc->sc_efuse_postread = r92c_efuse_postread; sc->sc_parse_rom = r92c_parse_rom; sc->sc_set_led = r92cu_set_led; sc->sc_power_on = r92cu_power_on; sc->sc_power_off = r92cu_power_off; #ifndef RTWN_WITHOUT_UCODE sc->sc_fw_reset = r92c_fw_reset; sc->sc_fw_download_enable = r92c_fw_download_enable; #endif sc->sc_set_page_size = r92c_set_page_size; sc->sc_lc_calib = r92c_lc_calib; sc->sc_iq_calib = r92c_iq_calib; /* XXX TODO */ sc->sc_read_chipid_vendor = r92c_read_chipid_vendor; sc->sc_adj_devcaps = r92cu_adj_devcaps; sc->sc_vap_preattach = rtwn_nop_softc_vap; sc->sc_postattach = r92cu_postattach; sc->sc_detach_private = r92c_detach_private; sc->sc_set_media_status = r92c_joinbss_rpt; #ifndef RTWN_WITHOUT_UCODE sc->sc_set_rsvd_page = r92c_set_rsvd_page; sc->sc_set_pwrmode = r92c_set_pwrmode; sc->sc_set_rssi = r92c_set_rssi; #endif sc->sc_beacon_init = r92c_beacon_init; sc->sc_beacon_enable = r92c_beacon_enable; sc->sc_beacon_set_rate = rtwn_nop_void_int; sc->sc_beacon_select = rtwn_nop_softc_int; sc->sc_temp_measure = r92c_temp_measure; sc->sc_temp_read = r92c_temp_read; sc->sc_init_tx_agg = r92cu_init_tx_agg; sc->sc_init_rx_agg = r92cu_init_rx_agg; sc->sc_init_ampdu = r92c_init_ampdu; sc->sc_init_intr = r92cu_init_intr; sc->sc_init_edca = r92c_init_edca; sc->sc_init_bb = r92cu_init_bb; sc->sc_init_rf = r92c_init_rf; sc->sc_init_antsel = r92c_init_antsel; sc->sc_post_init = r92cu_post_init; sc->sc_init_bcnq1_boundary = rtwn_nop_int_softc; sc->mac_prog = &rtl8192cu_mac[0]; sc->mac_size = nitems(rtl8192cu_mac); sc->bb_prog = &rtl8192cu_bb[0]; sc->bb_size = nitems(rtl8192cu_bb); sc->rf_prog = &rtl8192c_rf[0]; sc->page_count = R92CU_TX_PAGE_COUNT; sc->pktbuf_count = R92C_TXPKTBUF_COUNT; sc->ackto = 0x40; sc->npubqpages = R92CU_PUBQ_NPAGES; sc->page_size = R92C_TX_PAGE_SIZE; sc->txdesc_len = sizeof(struct r92cu_tx_desc); sc->efuse_maxlen = R92C_EFUSE_MAX_LEN; sc->efuse_maplen = R92C_EFUSE_MAP_LEN; sc->rx_dma_size = R92C_RX_DMA_BUFFER_SIZE; sc->macid_limit = R92C_MACID_MAX + 1; sc->cam_entry_limit = R92C_CAM_ENTRY_COUNT; sc->fwsize_limit = R92C_MAX_FW_SIZE; sc->temp_delta = R92C_CALIB_THRESHOLD; sc->bcn_status_reg[0] = R92C_TDECTRL; sc->bcn_status_reg[1] = R92C_TDECTRL; sc->rcr = 0; r92cu_attach_private(sc); } Index: head/sys/dev/rtwn/rtl8812a/r12a.h =================================================================== --- head/sys/dev/rtwn/rtl8812a/r12a.h (revision 312314) +++ head/sys/dev/rtwn/rtl8812a/r12a.h (revision 312315) @@ -1,140 +1,142 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #ifndef RTL8812A_H #define RTL8812A_H /* * Global definitions. */ #define R12A_PUBQ_NPAGES 219 #define R12A_TXPKTBUF_COUNT 255 #define R12A_TX_PAGE_COUNT 248 #define R12A_TX_PAGE_SIZE 512 #define R12A_RX_DMA_BUFFER_SIZE 0x3e80 #define R12A_MAX_FW_SIZE 0x8000 #define R12A_MACID_MAX 127 #define R12A_CAM_ENTRY_COUNT 64 #define R12A_INTR_MSG_LEN 60 static const uint8_t r12a_chan_5ghz_0[] = { 36, 40, 44, 48, 52, 56, 60, 64 }; static const uint8_t r12a_chan_5ghz_1[] = { 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144 }; static const uint8_t r12a_chan_5ghz_2[] = { 149, 153, 157, 161, 165, 169, 173, 177 }; /* * Function declarations. */ /* r12a_attach.c */ void r12a_vap_preattach(struct rtwn_softc *, struct ieee80211vap *); void r12a_detach_private(struct rtwn_softc *); /* r12a_beacon.c */ void r12a_beacon_init(struct rtwn_softc *, void *, int); void r12a_beacon_set_rate(void *, int); /* r12a_calib.c */ void r12a_save_bb_afe_vals(struct rtwn_softc *, uint32_t[], const uint16_t[], int); void r12a_restore_bb_afe_vals(struct rtwn_softc *, uint32_t[], const uint16_t[], int); void r12a_save_rf_vals(struct rtwn_softc *, uint32_t[], const uint8_t[], int); void r12a_restore_rf_vals(struct rtwn_softc *, uint32_t[], const uint8_t[], int); void r12a_lc_calib(struct rtwn_softc *); #ifndef RTWN_WITHOUT_UCODE int r12a_iq_calib_fw_supported(struct rtwn_softc *); #endif void r12a_iq_calib_sw(struct rtwn_softc *); void r12a_iq_calib(struct rtwn_softc *); /* r12a_caps.c */ int r12a_ioctl_net(struct ieee80211com *, u_long, void *); /* r12a_chan.c */ void r12a_fix_spur(struct rtwn_softc *, struct ieee80211_channel *); void r12a_set_chan(struct rtwn_softc *, struct ieee80211_channel *); void r12a_set_band_2ghz(struct rtwn_softc *, uint32_t); void r12a_set_band_5ghz(struct rtwn_softc *, uint32_t); /* r12a_fw.c */ #ifndef RTWN_WITHOUT_UCODE void r12a_fw_reset(struct rtwn_softc *, int); void r12a_fw_download_enable(struct rtwn_softc *, int); void r12a_set_media_status(struct rtwn_softc *, int); int r12a_set_pwrmode(struct rtwn_softc *, struct ieee80211vap *, int); void r12a_iq_calib_fw(struct rtwn_softc *); #endif /* r12a_init.c */ int r12a_check_condition(struct rtwn_softc *, const uint8_t[]); int r12a_set_page_size(struct rtwn_softc *); void r12a_init_edca(struct rtwn_softc *); void r12a_init_bb(struct rtwn_softc *); void r12a_init_rf(struct rtwn_softc *); void r12a_crystalcap_write(struct rtwn_softc *); int r12a_power_on(struct rtwn_softc *); void r12a_power_off(struct rtwn_softc *); void r12a_init_intr(struct rtwn_softc *); void r12a_init_antsel(struct rtwn_softc *); /* r12a_led.c */ void r12a_set_led(struct rtwn_softc *, int, int); /* r12a_rf.c */ uint32_t r12a_rf_read(struct rtwn_softc *, int, uint8_t); uint32_t r12a_c_cut_rf_read(struct rtwn_softc *, int, uint8_t); void r12a_rf_write(struct rtwn_softc *, int, uint8_t, uint32_t); /* r12a_rom.c */ void r12a_parse_rom_common(struct rtwn_softc *, uint8_t *); void r12a_parse_rom(struct rtwn_softc *, uint8_t *); /* r12a_rx.c */ void r12a_ratectl_tx_complete(struct rtwn_softc *, uint8_t *, int); void r12a_handle_c2h_report(struct rtwn_softc *, uint8_t *, int); int r12a_check_frame_checksum(struct rtwn_softc *, struct mbuf *); uint8_t r12a_rx_radiotap_flags(const void *); +void r12a_get_rx_stats(struct rtwn_softc *, struct ieee80211_rx_stats *, + const void *, const void *); /* r12a_tx.c */ void r12a_fill_tx_desc(struct rtwn_softc *, struct ieee80211_node *, struct mbuf *, void *, uint8_t, int); void r12a_fill_tx_desc_raw(struct rtwn_softc *, struct ieee80211_node *, struct mbuf *, void *, const struct ieee80211_bpf_params *); void r12a_fill_tx_desc_null(struct rtwn_softc *, void *, int, int, int); uint8_t r12a_tx_radiotap_flags(const void *); #endif /* RTL8812A_H */ Index: head/sys/dev/rtwn/rtl8812a/r12a_rx.c =================================================================== --- head/sys/dev/rtwn/rtl8812a/r12a_rx.c (revision 312314) +++ head/sys/dev/rtwn/rtl8812a/r12a_rx.c (revision 312315) @@ -1,238 +1,325 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #ifndef RTWN_WITHOUT_UCODE void r12a_ratectl_tx_complete(struct rtwn_softc *sc, uint8_t *buf, int len) { #if __FreeBSD_version >= 1200012 struct ieee80211_ratectl_tx_status txs; #endif struct r12a_c2h_tx_rpt *rpt; struct ieee80211_node *ni; int ntries; /* Skip Rx descriptor / report id / sequence fields. */ buf += sizeof(struct r92c_rx_stat) + 2; len -= sizeof(struct r92c_rx_stat) + 2; rpt = (struct r12a_c2h_tx_rpt *)buf; if (len != sizeof(*rpt)) { device_printf(sc->sc_dev, "%s: wrong report size (%d, must be %zu)\n", __func__, len, sizeof(*rpt)); return; } RTWN_DPRINTF(sc, RTWN_DEBUG_INTR, "%s: ccx report dump: 0: %02X, id: %02X, 2: %02X, queue time: " "low %02X, high %02X, final ridx: %02X, rsvd: %04X\n", __func__, rpt->txrptb0, rpt->macid, rpt->txrptb2, rpt->queue_time_low, rpt->queue_time_high, rpt->final_rate, rpt->reserved); if (rpt->macid > sc->macid_limit) { device_printf(sc->sc_dev, "macid %u is too big; increase MACID_MAX limit\n", rpt->macid); return; } ntries = MS(rpt->txrptb2, R12A_TXRPTB2_RETRY_CNT); ni = sc->node_list[rpt->macid]; if (ni != NULL) { RTWN_DPRINTF(sc, RTWN_DEBUG_INTR, "%s: frame for macid %u was" "%s sent (%d retries)\n", __func__, rpt->macid, (rpt->txrptb0 & (R12A_TXRPTB0_RETRY_OVER | R12A_TXRPTB0_LIFE_EXPIRE)) ? " not" : "", ntries); #if __FreeBSD_version >= 1200012 txs.flags = IEEE80211_RATECTL_STATUS_LONG_RETRY | IEEE80211_RATECTL_STATUS_FINAL_RATE; txs.long_retries = ntries; if (rpt->final_rate > RTWN_RIDX_OFDM54) { /* MCS */ txs.final_rate = (rpt->final_rate - 12) | IEEE80211_RATE_MCS; } else txs.final_rate = ridx2rate[rpt->final_rate]; if (rpt->txrptb0 & R12A_TXRPTB0_RETRY_OVER) txs.status = IEEE80211_RATECTL_TX_FAIL_LONG; else if (rpt->txrptb0 & R12A_TXRPTB0_LIFE_EXPIRE) txs.status = IEEE80211_RATECTL_TX_FAIL_EXPIRED; else txs.status = IEEE80211_RATECTL_TX_SUCCESS; ieee80211_ratectl_tx_complete(ni, &txs); #else struct ieee80211vap *vap = ni->ni_vap; if (rpt->txrptb0 & R12A_TXRPTB0_RETRY_OVER) { ieee80211_ratectl_tx_complete(vap, ni, IEEE80211_RATECTL_TX_FAILURE, &ntries, NULL); } else { ieee80211_ratectl_tx_complete(vap, ni, IEEE80211_RATECTL_TX_SUCCESS, &ntries, NULL); } #endif } else { RTWN_DPRINTF(sc, RTWN_DEBUG_INTR, "%s: macid %u, ni is NULL\n", __func__, rpt->macid); } } void r12a_handle_c2h_report(struct rtwn_softc *sc, uint8_t *buf, int len) { struct r12a_softc *rs = sc->sc_priv; /* Skip Rx descriptor. */ buf += sizeof(struct r92c_rx_stat); len -= sizeof(struct r92c_rx_stat); if (len < 2) { device_printf(sc->sc_dev, "C2H report too short (len %d)\n", len); return; } len -= 2; switch (buf[0]) { /* command id */ case R12A_C2H_TX_REPORT: /* NOTREACHED */ KASSERT(0, ("use handle_tx_report() instead of %s\n", __func__)); break; case R12A_C2H_IQK_FINISHED: RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB, "FW IQ calibration finished\n"); rs->rs_flags &= ~R12A_IQK_RUNNING; break; default: device_printf(sc->sc_dev, "%s: C2H report %u was not handled\n", __func__, buf[0]); } } #else void r12a_ratectl_tx_complete(struct rtwn_softc *sc, uint8_t *buf, int len) { /* Should not happen. */ device_printf(sc->sc_dev, "%s: called\n", __func__); } void r12a_handle_c2h_report(struct rtwn_softc *sc, uint8_t *buf, int len) { /* Should not happen. */ device_printf(sc->sc_dev, "%s: called\n", __func__); } #endif int r12a_check_frame_checksum(struct rtwn_softc *sc, struct mbuf *m) { struct r12a_softc *rs = sc->sc_priv; struct r92c_rx_stat *stat; uint32_t rxdw1; stat = mtod(m, struct r92c_rx_stat *); rxdw1 = le32toh(stat->rxdw1); if (rxdw1 & R12A_RXDW1_CKSUM) { RTWN_DPRINTF(sc, RTWN_DEBUG_RECV, "%s: %s/%s checksum is %s\n", __func__, (rxdw1 & R12A_RXDW1_UDP) ? "UDP" : "TCP", (rxdw1 & R12A_RXDW1_IPV6) ? "IPv6" : "IP", (rxdw1 & R12A_RXDW1_CKSUM_ERR) ? "invalid" : "valid"); if (rxdw1 & R12A_RXDW1_CKSUM_ERR) return (-1); if ((rxdw1 & R12A_RXDW1_IPV6) ? (rs->rs_flags & R12A_RXCKSUM6_EN) : (rs->rs_flags & R12A_RXCKSUM_EN)) { m->m_pkthdr.csum_flags = CSUM_IP_CHECKED | CSUM_IP_VALID | CSUM_DATA_VALID | CSUM_PSEUDO_HDR; m->m_pkthdr.csum_data = 0xffff; } } return (0); } uint8_t r12a_rx_radiotap_flags(const void *buf) { const struct r92c_rx_stat *stat = buf; uint8_t flags, rate; if (!(stat->rxdw4 & htole32(R12A_RXDW4_SPLCP))) return (0); - rate = MS(le32toh(stat->rxdw3), R92C_RXDW3_RATE); + rate = MS(le32toh(stat->rxdw3), R12A_RXDW3_RATE); if (RTWN_RATE_IS_CCK(rate)) flags = IEEE80211_RADIOTAP_F_SHORTPRE; else flags = IEEE80211_RADIOTAP_F_SHORTGI; return (flags); +} + +void +r12a_get_rx_stats(struct rtwn_softc *sc, struct ieee80211_rx_stats *rxs, + const void *desc, const void *physt_ptr) +{ + const struct r92c_rx_stat *stat = desc; + const struct r12a_rx_phystat *physt = physt_ptr; + uint32_t rxdw0, rxdw1, rxdw3, rxdw4; + uint8_t rate; + + rxdw0 = le32toh(stat->rxdw0); + rxdw1 = le32toh(stat->rxdw1); + rxdw3 = le32toh(stat->rxdw3); + rxdw4 = le32toh(stat->rxdw4); + rate = MS(rxdw3, R12A_RXDW3_RATE); + + /* TODO: STBC, LDPC */ + if (rxdw1 & R12A_RXDW1_AMPDU) { + if (rxdw0 & R92C_RXDW0_PHYST) + rxs->c_pktflags |= IEEE80211_RX_F_AMPDU; + else + rxs->c_pktflags |= IEEE80211_RX_F_AMPDU_MORE; + } + + if ((rxdw4 & R12A_RXDW4_SPLCP) && rate >= RTWN_RIDX_MCS(0)) + rxs->c_pktflags |= IEEE80211_RX_F_SHORTGI; + + switch (MS(rxdw4, R12A_RXDW4_BW)) { + case R12A_RXDW4_BW20: + rxs->c_width = IEEE80211_RX_FW_20MHZ; + break; + case R12A_RXDW4_BW40: + rxs->c_width = IEEE80211_RX_FW_40MHZ; + break; + case R12A_RXDW4_BW80: + rxs->c_width = IEEE80211_RX_FW_80MHZ; + break; + default: + break; + } + + if (RTWN_RATE_IS_CCK(rate)) + rxs->c_phytype = IEEE80211_RX_FP_11B; + else { + int is5ghz; + + /* XXX magic */ + /* XXX check with RTL8812AU */ + is5ghz = (physt->cfosho[2] != 0x01); + + if (rate < RTWN_RIDX_MCS(0)) { + if (is5ghz) + rxs->c_phytype = IEEE80211_RX_FP_11A; + else + rxs->c_phytype = IEEE80211_RX_FP_11G; + } else { + if (is5ghz) + rxs->c_phytype = IEEE80211_RX_FP_11NA; + else + rxs->c_phytype = IEEE80211_RX_FP_11NG; + } + } + + /* Map HW rate index to 802.11 rate. */ + if (rate < RTWN_RIDX_MCS(0)) { + rxs->c_rate = ridx2rate[rate]; + if (RTWN_RATE_IS_CCK(rate)) + rxs->c_pktflags |= IEEE80211_RX_F_CCK; + else + rxs->c_pktflags |= IEEE80211_RX_F_OFDM; + } else { /* MCS0~15. */ + /* TODO: VHT rates */ + rxs->c_rate = IEEE80211_RATE_MCS | (rate - 12); + rxs->c_pktflags |= IEEE80211_RX_F_HT; + } + + /* + * XXX always zero for RTL8821AU + * (vendor driver does not check this field) + */ +#if 0 + rxs->r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ; + rxs->c_ieee = MS(le16toh(physt->phyw1), R12A_PHYW1_CHAN); + rxs->c_freq = ieee80211_ieee2mhz(rxs->c_ieee, + (rxs->c_ieee < 36) ? IEEE80211_CHAN_2GHZ : IEEE80211_CHAN_5GHZ); +#endif } Index: head/sys/dev/rtwn/rtl8812a/r12a_rx_desc.h =================================================================== --- head/sys/dev/rtwn/rtl8812a/r12a_rx_desc.h (revision 312314) +++ head/sys/dev/rtwn/rtl8812a/r12a_rx_desc.h (revision 312315) @@ -1,79 +1,87 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #ifndef R12A_RX_DESC_H #define R12A_RX_DESC_H #include /* Rx MAC descriptor defines (chip-specific). */ /* Rx dword 1 */ #define R12A_RXDW1_AMSDU 0x00002000 +#define R12A_RXDW1_AMPDU 0x00008000 #define R12A_RXDW1_CKSUM_ERR 0x00100000 #define R12A_RXDW1_IPV6 0x00200000 #define R12A_RXDW1_UDP 0x00400000 #define R12A_RXDW1_CKSUM 0x00800000 /* Rx dword 2 */ #define R12A_RXDW2_RPT_C2H 0x10000000 +/* Rx dword 3 */ +#define R12A_RXDW3_RATE_M 0x0000007f +#define R12A_RXDW3_RATE_S 0 /* Rx dword 4 */ #define R12A_RXDW4_SPLCP 0x00000001 #define R12A_RXDW4_LDPC 0x00000002 #define R12A_RXDW4_STBC 0x00000004 #define R12A_RXDW4_BW_M 0x00000030 #define R12A_RXDW4_BW_S 4 +#define R12A_RXDW4_BW20 0 +#define R12A_RXDW4_BW40 1 +#define R12A_RXDW4_BW80 2 +#define R12A_RXDW4_BW160 3 /* Rx PHY descriptor. */ struct r12a_rx_phystat { uint8_t gain_trsw[2]; uint16_t phyw1; #define R12A_PHYW1_CHAN_M 0x03ff #define R12A_PHYW1_CHAN_S 0 #define R12A_PHYW1_CHAN_EXT_M 0x3c00 #define R12A_PHYW1_CHAN_EXT_S 10 #define R12A_PHYW1_RFMOD_M 0xc000 #define R12A_PHYW1_RFMOD_S 14 uint8_t pwdb_all; uint8_t cfosho[4]; uint8_t cfotail[4]; uint8_t rxevm[2]; uint8_t rxsnr[2]; uint8_t pcts_msk_rpt[2]; uint8_t pdsnr[2]; uint8_t csi_current[2]; uint8_t rx_gain_c; uint8_t rx_gain_d; uint8_t sigevm; uint16_t phyw13; #define R12A_PHYW13_ANTIDX_A_M 0x0700 #define R12A_PHYW13_ANTIDX_A_S 8 #define R12A_PHYW13_ANTIDX_B_M 0x3800 #define R12A_PHYW13_ANTIDX_B_S 11 } __packed; #endif /* R12A_RX_DESC_H */ Index: head/sys/dev/rtwn/rtl8812a/usb/r12au_attach.c =================================================================== --- head/sys/dev/rtwn/rtl8812a/usb/r12au_attach.c (revision 312314) +++ head/sys/dev/rtwn/rtl8812a/usb/r12au_attach.c (revision 312315) @@ -1,288 +1,289 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include void r12au_attach(struct rtwn_usb_softc *); static void r12au_postattach(struct rtwn_softc *sc) { struct rtwn_usb_softc *uc = RTWN_USB_SOFTC(sc); struct r12a_softc *rs = sc->sc_priv; if (usbd_get_speed(uc->uc_udev) == USB_SPEED_SUPER) { rs->ac_usb_dma_size = 0x07; rs->ac_usb_dma_time = 0x1a; } else { rs->ac_usb_dma_size = 0x01; rs->ac_usb_dma_time = 0x10; } if (rs->chip & R12A_CHIP_C_CUT) sc->sc_rf_read = r12a_c_cut_rf_read; else sc->sc_rf_read = r12a_rf_read; if (rs->board_type == R92C_BOARD_TYPE_MINICARD || rs->board_type == R92C_BOARD_TYPE_SOLO || rs->board_type == R92C_BOARD_TYPE_COMBO) sc->sc_set_led = r88e_set_led; else sc->sc_set_led = r12a_set_led; if (!(rs->ext_pa_2g || rs->ext_lna_2g || rs->ext_pa_5g || rs->ext_lna_5g)) sc->mac_prog = &rtl8812au_mac_no_ext_pa_lna[0]; sc->sc_ic.ic_ioctl = r12a_ioctl_net; } void r12a_vap_preattach(struct rtwn_softc *sc, struct ieee80211vap *vap) { struct r12a_softc *rs = sc->sc_priv; struct ifnet *ifp = vap->iv_ifp; ifp->if_capabilities = IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6; RTWN_LOCK(sc); if (rs->rs_flags & R12A_RXCKSUM_EN) ifp->if_capenable |= IFCAP_RXCSUM; if (rs->rs_flags & R12A_RXCKSUM6_EN) ifp->if_capenable |= IFCAP_RXCSUM_IPV6; RTWN_UNLOCK(sc); } static void r12a_attach_private(struct rtwn_softc *sc) { struct r12a_softc *rs; rs = malloc(sizeof(struct r12a_softc), M_RTWN_PRIV, M_WAITOK | M_ZERO); rs->rs_flags = R12A_RXCKSUM_EN | R12A_RXCKSUM6_EN; rs->rs_fix_spur = r12a_fix_spur; rs->rs_set_band_2ghz = r12a_set_band_2ghz; rs->rs_set_band_5ghz = r12a_set_band_5ghz; rs->rs_init_burstlen = r12au_init_burstlen; rs->rs_init_ampdu_fwhw = r12au_init_ampdu_fwhw; rs->rs_crystalcap_write = r12a_crystalcap_write; #ifndef RTWN_WITHOUT_UCODE rs->rs_iq_calib_fw_supported = r12a_iq_calib_fw_supported; #endif rs->rs_iq_calib_sw = r12a_iq_calib_sw; rs->ampdu_max_time = 0x70; sc->sc_priv = rs; } void r12a_detach_private(struct rtwn_softc *sc) { struct r12a_softc *rs = sc->sc_priv; free(rs, M_RTWN_PRIV); } static void r12a_read_chipid_vendor(struct rtwn_softc *sc, uint32_t reg_sys_cfg) { struct r12a_softc *rs = sc->sc_priv; if (MS(reg_sys_cfg, R92C_SYS_CFG_CHIP_VER_RTL) == 1) rs->chip |= R12A_CHIP_C_CUT; } static void r12au_adj_devcaps(struct rtwn_softc *sc) { /* TODO: LDPC, STBC etc */ } void r12au_attach(struct rtwn_usb_softc *uc) { struct rtwn_softc *sc = &uc->uc_sc; /* USB part. */ uc->uc_align_rx = r12au_align_rx; uc->tx_agg_desc_num = 1; /* Common part. */ sc->sc_flags = RTWN_FLAG_EXT_HDR; sc->sc_set_chan = r12a_set_chan; sc->sc_fill_tx_desc = r12a_fill_tx_desc; sc->sc_fill_tx_desc_raw = r12a_fill_tx_desc_raw; sc->sc_fill_tx_desc_null = r12a_fill_tx_desc_null; sc->sc_dump_tx_desc = r12au_dump_tx_desc; sc->sc_tx_radiotap_flags = r12a_tx_radiotap_flags; sc->sc_rx_radiotap_flags = r12a_rx_radiotap_flags; + sc->sc_get_rx_stats = r12a_get_rx_stats; sc->sc_get_rssi_cck = r88e_get_rssi_cck; sc->sc_get_rssi_ofdm = r88e_get_rssi_ofdm; sc->sc_classify_intr = r12au_classify_intr; sc->sc_handle_tx_report = r12a_ratectl_tx_complete; sc->sc_handle_c2h_report = r12a_handle_c2h_report; sc->sc_check_frame = r12a_check_frame_checksum; sc->sc_rf_write = r12a_rf_write; sc->sc_check_condition = r12a_check_condition; sc->sc_efuse_postread = rtwn_nop_softc; sc->sc_parse_rom = r12a_parse_rom; sc->sc_power_on = r12a_power_on; sc->sc_power_off = r12a_power_off; #ifndef RTWN_WITHOUT_UCODE sc->sc_fw_reset = r12a_fw_reset; sc->sc_fw_download_enable = r12a_fw_download_enable; #endif sc->sc_set_page_size = r12a_set_page_size; sc->sc_lc_calib = r12a_lc_calib; sc->sc_iq_calib = r12a_iq_calib; sc->sc_read_chipid_vendor = r12a_read_chipid_vendor; sc->sc_adj_devcaps = r12au_adj_devcaps; sc->sc_vap_preattach = r12a_vap_preattach; sc->sc_postattach = r12au_postattach; sc->sc_detach_private = r12a_detach_private; #ifndef RTWN_WITHOUT_UCODE sc->sc_set_media_status = r12a_set_media_status; sc->sc_set_rsvd_page = r88e_set_rsvd_page; sc->sc_set_pwrmode = r12a_set_pwrmode; sc->sc_set_rssi = rtwn_nop_softc; /* XXX TODO */ #else sc->sc_set_media_status = rtwn_nop_softc_int; #endif sc->sc_beacon_init = r12a_beacon_init; sc->sc_beacon_enable = r92c_beacon_enable; sc->sc_beacon_set_rate = r12a_beacon_set_rate; sc->sc_beacon_select = rtwn_nop_softc_int; sc->sc_temp_measure = r88e_temp_measure; sc->sc_temp_read = r88e_temp_read; sc->sc_init_tx_agg = r92cu_init_tx_agg; sc->sc_init_rx_agg = r12au_init_rx_agg; sc->sc_init_ampdu = r12au_init_ampdu; sc->sc_init_intr = r12a_init_intr; sc->sc_init_edca = r12a_init_edca; sc->sc_init_bb = r12a_init_bb; sc->sc_init_rf = r12a_init_rf; sc->sc_init_antsel = r12a_init_antsel; sc->sc_post_init = r12au_post_init; sc->sc_init_bcnq1_boundary = rtwn_nop_int_softc; sc->chan_list_5ghz[0] = r12a_chan_5ghz_0; sc->chan_list_5ghz[1] = r12a_chan_5ghz_1; sc->chan_list_5ghz[2] = r12a_chan_5ghz_2; sc->chan_num_5ghz[0] = nitems(r12a_chan_5ghz_0); sc->chan_num_5ghz[1] = nitems(r12a_chan_5ghz_1); sc->chan_num_5ghz[2] = nitems(r12a_chan_5ghz_2); sc->mac_prog = &rtl8812au_mac[0]; sc->mac_size = nitems(rtl8812au_mac); sc->bb_prog = &rtl8812au_bb[0]; sc->bb_size = nitems(rtl8812au_bb); sc->agc_prog = &rtl8812au_agc[0]; sc->agc_size = nitems(rtl8812au_agc); sc->rf_prog = &rtl8812au_rf[0]; sc->name = "RTL8812AU"; sc->fwname = "rtwn-rtl8812aufw"; sc->fwsig = 0x950; sc->page_count = R12A_TX_PAGE_COUNT; sc->pktbuf_count = R12A_TXPKTBUF_COUNT; sc->ackto = 0x80; sc->npubqpages = R12A_PUBQ_NPAGES; sc->page_size = R12A_TX_PAGE_SIZE; sc->txdesc_len = sizeof(struct r12au_tx_desc); sc->efuse_maxlen = R12A_EFUSE_MAX_LEN; sc->efuse_maplen = R12A_EFUSE_MAP_LEN; sc->rx_dma_size = R12A_RX_DMA_BUFFER_SIZE; sc->macid_limit = R12A_MACID_MAX + 1; sc->cam_entry_limit = R12A_CAM_ENTRY_COUNT; sc->fwsize_limit = R12A_MAX_FW_SIZE; sc->temp_delta = R88E_CALIB_THRESHOLD; sc->bcn_status_reg[0] = R92C_TDECTRL; sc->bcn_status_reg[1] = R92C_TDECTRL; sc->rcr = R12A_RCR_DIS_CHK_14 | R12A_RCR_VHT_ACK | R12A_RCR_TCP_OFFLD_EN; sc->ntxchains = 2; sc->nrxchains = 2; r12a_attach_private(sc); } Index: head/sys/dev/rtwn/rtl8821a/usb/r21au_attach.c =================================================================== --- head/sys/dev/rtwn/rtl8821a/usb/r21au_attach.c (revision 312314) +++ head/sys/dev/rtwn/rtl8821a/usb/r21au_attach.c (revision 312315) @@ -1,281 +1,282 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include void r21au_attach(struct rtwn_usb_softc *); static void r21a_postattach(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; struct r12a_softc *rs = sc->sc_priv; if (rs->board_type == R92C_BOARD_TYPE_MINICARD || rs->board_type == R92C_BOARD_TYPE_SOLO || rs->board_type == R92C_BOARD_TYPE_COMBO) sc->sc_set_led = r88e_set_led; else sc->sc_set_led = r21a_set_led; TIMEOUT_TASK_INIT(taskqueue_thread, &rs->rs_chan_check, 0, r21au_chan_check, sc); /* RXCKSUM */ ic->ic_ioctl = r12a_ioctl_net; /* DFS */ rs->rs_scan_start = ic->ic_scan_start; ic->ic_scan_start = r21au_scan_start; rs->rs_scan_end = ic->ic_scan_end; ic->ic_scan_end = r21au_scan_end; } static void r21au_vap_preattach(struct rtwn_softc *sc, struct ieee80211vap *vap) { struct rtwn_vap *rvp = RTWN_VAP(vap); struct r12a_softc *rs = sc->sc_priv; r12a_vap_preattach(sc, vap); /* Install DFS newstate handler (non-monitor vaps only). */ if (rvp->id != RTWN_VAP_ID_INVALID) { KASSERT(rvp->id >= 0 && rvp->id <= nitems(rs->rs_newstate), ("%s: wrong vap id %d\n", __func__, rvp->id)); rs->rs_newstate[rvp->id] = vap->iv_newstate; vap->iv_newstate = r21au_newstate; } } static void r21a_attach_private(struct rtwn_softc *sc) { struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); struct r12a_softc *rs; rs = malloc(sizeof(struct r12a_softc), M_RTWN_PRIV, M_WAITOK | M_ZERO); rs->rs_flags = R12A_RXCKSUM_EN | R12A_RXCKSUM6_EN; rs->rs_radar = 0; SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "radar_detection", CTLFLAG_RDTUN, &rs->rs_radar, rs->rs_radar, "Enable radar detection (untested)"); rs->rs_fix_spur = rtwn_nop_softc_chan; rs->rs_set_band_2ghz = r21a_set_band_2ghz; rs->rs_set_band_5ghz = r21a_set_band_5ghz; rs->rs_init_burstlen = r21au_init_burstlen; rs->rs_init_ampdu_fwhw = r21a_init_ampdu_fwhw; rs->rs_crystalcap_write = r21a_crystalcap_write; #ifndef RTWN_WITHOUT_UCODE rs->rs_iq_calib_fw_supported = r21a_iq_calib_fw_supported; #endif rs->rs_iq_calib_sw = r21a_iq_calib_sw; rs->ampdu_max_time = 0x5e; rs->ac_usb_dma_size = 0x01; rs->ac_usb_dma_time = 0x10; sc->sc_priv = rs; } static void r21au_adj_devcaps(struct rtwn_softc *sc) { struct ieee80211com *ic = &sc->sc_ic; struct r12a_softc *rs = sc->sc_priv; if (rs->rs_radar != 0) ic->ic_caps |= IEEE80211_C_DFS; /* TODO: LDPC etc */ } void r21au_attach(struct rtwn_usb_softc *uc) { struct rtwn_softc *sc = &uc->uc_sc; /* USB part. */ uc->uc_align_rx = r12au_align_rx; uc->tx_agg_desc_num = 6; /* Common part. */ sc->sc_flags = RTWN_FLAG_EXT_HDR; sc->sc_set_chan = r12a_set_chan; sc->sc_fill_tx_desc = r12a_fill_tx_desc; sc->sc_fill_tx_desc_raw = r12a_fill_tx_desc_raw; sc->sc_fill_tx_desc_null = r12a_fill_tx_desc_null; sc->sc_dump_tx_desc = r12au_dump_tx_desc; sc->sc_tx_radiotap_flags = r12a_tx_radiotap_flags; sc->sc_rx_radiotap_flags = r12a_rx_radiotap_flags; + sc->sc_get_rx_stats = r12a_get_rx_stats; sc->sc_get_rssi_cck = r21a_get_rssi_cck; sc->sc_get_rssi_ofdm = r88e_get_rssi_ofdm; sc->sc_classify_intr = r12au_classify_intr; sc->sc_handle_tx_report = r12a_ratectl_tx_complete; sc->sc_handle_c2h_report = r12a_handle_c2h_report; sc->sc_check_frame = r12a_check_frame_checksum; sc->sc_rf_read = r12a_c_cut_rf_read; sc->sc_rf_write = r12a_rf_write; sc->sc_check_condition = r21a_check_condition; sc->sc_efuse_postread = rtwn_nop_softc; sc->sc_parse_rom = r21a_parse_rom; sc->sc_power_on = r21a_power_on; sc->sc_power_off = r21a_power_off; #ifndef RTWN_WITHOUT_UCODE sc->sc_fw_reset = r21a_fw_reset; sc->sc_fw_download_enable = r12a_fw_download_enable; #endif sc->sc_set_page_size = rtwn_nop_int_softc; sc->sc_lc_calib = rtwn_nop_softc; /* XXX not used */ sc->sc_iq_calib = r12a_iq_calib; sc->sc_read_chipid_vendor = rtwn_nop_softc_uint32; sc->sc_adj_devcaps = r21au_adj_devcaps; sc->sc_vap_preattach = r21au_vap_preattach; sc->sc_postattach = r21a_postattach; sc->sc_detach_private = r12a_detach_private; #ifndef RTWN_WITHOUT_UCODE sc->sc_set_media_status = r12a_set_media_status; sc->sc_set_rsvd_page = r88e_set_rsvd_page; sc->sc_set_pwrmode = r12a_set_pwrmode; sc->sc_set_rssi = rtwn_nop_softc; /* XXX TODO */ #else sc->sc_set_media_status = rtwn_nop_softc_int; #endif sc->sc_beacon_init = r21a_beacon_init; sc->sc_beacon_enable = r92c_beacon_enable; sc->sc_beacon_set_rate = r12a_beacon_set_rate; sc->sc_beacon_select = r21a_beacon_select; sc->sc_temp_measure = r88e_temp_measure; sc->sc_temp_read = r88e_temp_read; sc->sc_init_tx_agg = r21au_init_tx_agg; sc->sc_init_rx_agg = r12au_init_rx_agg; sc->sc_init_ampdu = r12au_init_ampdu; sc->sc_init_intr = r12a_init_intr; sc->sc_init_edca = r12a_init_edca; sc->sc_init_bb = r12a_init_bb; sc->sc_init_rf = r12a_init_rf; sc->sc_init_antsel = r12a_init_antsel; sc->sc_post_init = r12au_post_init; sc->sc_init_bcnq1_boundary = r21a_init_bcnq1_boundary; sc->chan_list_5ghz[0] = r12a_chan_5ghz_0; sc->chan_list_5ghz[1] = r12a_chan_5ghz_1; sc->chan_list_5ghz[2] = r12a_chan_5ghz_2; sc->chan_num_5ghz[0] = nitems(r12a_chan_5ghz_0); sc->chan_num_5ghz[1] = nitems(r12a_chan_5ghz_1); sc->chan_num_5ghz[2] = nitems(r12a_chan_5ghz_2); sc->mac_prog = &rtl8821au_mac[0]; sc->mac_size = nitems(rtl8821au_mac); sc->bb_prog = &rtl8821au_bb[0]; sc->bb_size = nitems(rtl8821au_bb); sc->agc_prog = &rtl8821au_agc[0]; sc->agc_size = nitems(rtl8821au_agc); sc->rf_prog = &rtl8821au_rf[0]; sc->name = "RTL8821AU"; sc->fwname = "rtwn-rtl8821aufw"; sc->fwsig = 0x210; sc->page_count = R21A_TX_PAGE_COUNT; sc->pktbuf_count = R12A_TXPKTBUF_COUNT; sc->ackto = 0x80; sc->npubqpages = R12A_PUBQ_NPAGES; sc->page_size = R21A_TX_PAGE_SIZE; sc->txdesc_len = sizeof(struct r12au_tx_desc); sc->efuse_maxlen = R12A_EFUSE_MAX_LEN; sc->efuse_maplen = R12A_EFUSE_MAP_LEN; sc->rx_dma_size = R12A_RX_DMA_BUFFER_SIZE; sc->macid_limit = R12A_MACID_MAX + 1; sc->cam_entry_limit = R12A_CAM_ENTRY_COUNT; sc->fwsize_limit = R12A_MAX_FW_SIZE; sc->temp_delta = R88E_CALIB_THRESHOLD; sc->bcn_status_reg[0] = R92C_TDECTRL; sc->bcn_status_reg[1] = R21A_DWBCN1_CTRL; sc->rcr = R12A_RCR_DIS_CHK_14 | R12A_RCR_VHT_ACK | R12A_RCR_TCP_OFFLD_EN; sc->ntxchains = 1; sc->nrxchains = 1; r21a_attach_private(sc); } Index: head/sys/dev/rtwn/usb/rtwn_usb_rx.c =================================================================== --- head/sys/dev/rtwn/usb/rtwn_usb_rx.c (revision 312314) +++ head/sys/dev/rtwn/usb/rtwn_usb_rx.c (revision 312315) @@ -1,340 +1,335 @@ /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2014 Kevin Lo * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #ifdef IEEE80211_SUPPORT_SUPERG #include #endif #include #include #include #include #include #include #include #include #include #include #include #include /* for CAM_ALGO_NONE */ #include static struct mbuf * rtwn_rx_copy_to_mbuf(struct rtwn_softc *sc, struct r92c_rx_stat *stat, int totlen) { struct ieee80211com *ic = &sc->sc_ic; struct mbuf *m; uint32_t rxdw0; int pktlen; RTWN_ASSERT_LOCKED(sc); /* Dump Rx descriptor. */ RTWN_DPRINTF(sc, RTWN_DEBUG_RECV_DESC, "%s: dw: 0 %08X, 1 %08X, 2 %08X, 3 %08X, 4 %08X, tsfl %08X\n", __func__, le32toh(stat->rxdw0), le32toh(stat->rxdw1), le32toh(stat->rxdw2), le32toh(stat->rxdw3), le32toh(stat->rxdw4), le32toh(stat->tsf_low)); /* * don't pass packets to the ieee80211 framework if the driver isn't * RUNNING. */ if (!(sc->sc_flags & RTWN_RUNNING)) return (NULL); rxdw0 = le32toh(stat->rxdw0); if (__predict_false(rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR))) { /* * This should not happen since we setup our Rx filter * to not receive these frames. */ RTWN_DPRINTF(sc, RTWN_DEBUG_RECV, "%s: RX flags error (%s)\n", __func__, rxdw0 & R92C_RXDW0_CRCERR ? "CRC" : "ICV"); goto fail; } pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); if (__predict_false(pktlen < sizeof(struct ieee80211_frame_ack))) { /* * Should not happen (because of Rx filter setup). */ RTWN_DPRINTF(sc, RTWN_DEBUG_RECV, "%s: frame is too short: %d\n", __func__, pktlen); goto fail; } m = m_get2(totlen, M_NOWAIT, MT_DATA, M_PKTHDR); if (__predict_false(m == NULL)) { device_printf(sc->sc_dev, "%s: could not allocate RX mbuf\n", __func__); goto fail; } /* Finalize mbuf. */ memcpy(mtod(m, uint8_t *), (uint8_t *)stat, totlen); m->m_pkthdr.len = m->m_len = totlen; if (rtwn_check_frame(sc, m) != 0) { m_freem(m); goto fail; } return (m); fail: counter_u64_add(ic->ic_ierrors, 1); return (NULL); } static struct mbuf * rtwn_rxeof(struct rtwn_softc *sc, uint8_t *buf, int len) { struct rtwn_usb_softc *uc = RTWN_USB_SOFTC(sc); struct r92c_rx_stat *stat; struct mbuf *m, *m0 = NULL; uint32_t rxdw0; int totlen, pktlen, infosz; /* Process packets. */ while (len >= sizeof(*stat)) { stat = (struct r92c_rx_stat *)buf; rxdw0 = le32toh(stat->rxdw0); pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); if (__predict_false(pktlen == 0)) break; infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; /* Make sure everything fits in xfer. */ totlen = sizeof(*stat) + infosz + pktlen; if (totlen > len) { device_printf(sc->sc_dev, "%s: totlen (%d) > len (%d)!\n", __func__, totlen, len); break; } if (m0 == NULL) m0 = m = rtwn_rx_copy_to_mbuf(sc, stat, totlen); else { m->m_next = rtwn_rx_copy_to_mbuf(sc, stat, totlen); if (m->m_next != NULL) m = m->m_next; } /* Align next frame. */ totlen = rtwn_usb_align_rx(uc, totlen, len); buf += totlen; len -= totlen; } return (m0); } static struct mbuf * rtwn_report_intr(struct rtwn_usb_softc *uc, struct usb_xfer *xfer, struct rtwn_data *data) { struct rtwn_softc *sc = &uc->uc_sc; struct ieee80211com *ic = &sc->sc_ic; uint8_t *buf; int len; usbd_xfer_status(xfer, &len, NULL, NULL, NULL); if (__predict_false(len < sizeof(struct r92c_rx_stat))) { counter_u64_add(ic->ic_ierrors, 1); return (NULL); } buf = data->buf; switch (rtwn_classify_intr(sc, buf, len)) { case RTWN_RX_DATA: return (rtwn_rxeof(sc, buf, len)); case RTWN_RX_TX_REPORT: if (sc->sc_ratectl != RTWN_RATECTL_NET80211) { /* shouldn't happen */ device_printf(sc->sc_dev, "%s called while ratectl = %d!\n", __func__, sc->sc_ratectl); break; } RTWN_NT_LOCK(sc); rtwn_handle_tx_report(sc, buf, len); RTWN_NT_UNLOCK(sc); #ifdef IEEE80211_SUPPORT_SUPERG /* * NB: this will executed only when 'report' bit is set. */ if (sc->sc_tx_n_active > 0 && --sc->sc_tx_n_active <= 1) rtwn_cmd_sleepable(sc, NULL, 0, rtwn_ff_flush_all); #endif break; case RTWN_RX_OTHER: rtwn_handle_c2h_report(sc, buf, len); break; default: /* NOTREACHED */ KASSERT(0, ("unknown Rx classification code")); break; } return (NULL); } static struct ieee80211_node * -rtwn_rx_frame(struct rtwn_softc *sc, struct mbuf *m, int8_t *rssi) +rtwn_rx_frame(struct rtwn_softc *sc, struct mbuf *m) { struct r92c_rx_stat stat; /* Imitate PCIe layout. */ m_copydata(m, 0, sizeof(struct r92c_rx_stat), (caddr_t)&stat); m_adj(m, sizeof(struct r92c_rx_stat)); - return (rtwn_rx_common(sc, m, &stat, rssi)); + return (rtwn_rx_common(sc, m, &stat)); } void rtwn_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) { struct rtwn_usb_softc *uc = usbd_xfer_softc(xfer); struct rtwn_softc *sc = &uc->uc_sc; struct ieee80211com *ic = &sc->sc_ic; struct ieee80211_node *ni; struct mbuf *m = NULL, *next; struct rtwn_data *data; - int8_t nf, rssi; RTWN_ASSERT_LOCKED(sc); switch (USB_GET_STATE(xfer)) { case USB_ST_TRANSFERRED: data = STAILQ_FIRST(&uc->uc_rx_active); if (data == NULL) goto tr_setup; STAILQ_REMOVE_HEAD(&uc->uc_rx_active, next); m = rtwn_report_intr(uc, xfer, data); STAILQ_INSERT_TAIL(&uc->uc_rx_inactive, data, next); /* FALLTHROUGH */ case USB_ST_SETUP: tr_setup: data = STAILQ_FIRST(&uc->uc_rx_inactive); if (data == NULL) { KASSERT(m == NULL, ("mbuf isn't NULL")); goto finish; } STAILQ_REMOVE_HEAD(&uc->uc_rx_inactive, next); STAILQ_INSERT_TAIL(&uc->uc_rx_active, data, next); usbd_xfer_set_frame_data(xfer, 0, data->buf, usbd_xfer_max_len(xfer)); usbd_transfer_submit(xfer); /* * To avoid LOR we should unlock our private mutex here to call * ieee80211_input() because here is at the end of a USB * callback and safe to unlock. */ while (m != NULL) { next = m->m_next; m->m_next = NULL; - ni = rtwn_rx_frame(sc, m, &rssi); + ni = rtwn_rx_frame(sc, m); RTWN_UNLOCK(sc); - nf = RTWN_NOISE_FLOOR; if (ni != NULL) { - if (ni->ni_flags & IEEE80211_NODE_HT) - m->m_flags |= M_AMPDU; - (void)ieee80211_input(ni, m, rssi - nf, nf); + (void)ieee80211_input_mimo(ni, m); ieee80211_free_node(ni); } else { - (void)ieee80211_input_all(ic, m, - rssi - nf, nf); + (void)ieee80211_input_mimo_all(ic, m); } RTWN_LOCK(sc); m = next; } break; default: /* needs it to the inactive queue due to a error. */ data = STAILQ_FIRST(&uc->uc_rx_active); if (data != NULL) { STAILQ_REMOVE_HEAD(&uc->uc_rx_active, next); STAILQ_INSERT_TAIL(&uc->uc_rx_inactive, data, next); } if (error != USB_ERR_CANCELLED) { usbd_xfer_set_stall(xfer); counter_u64_add(ic->ic_ierrors, 1); goto tr_setup; } break; } finish: /* Finished receive; age anything left on the FF queue by a little bump */ /* * XXX TODO: just make this a callout timer schedule so we can * flush the FF staging queue if we're approaching idle. */ #ifdef IEEE80211_SUPPORT_SUPERG if (!(sc->sc_flags & RTWN_FW_LOADED) || sc->sc_ratectl != RTWN_RATECTL_NET80211) rtwn_cmd_sleepable(sc, NULL, 0, rtwn_ff_flush_all); #endif /* Kick-start more transmit in case we stalled */ rtwn_start(sc); }