Index: head/sys/boot/fdt/dts/arm/a83t.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/a83t.dtsi (revision 310971) +++ head/sys/boot/fdt/dts/arm/a83t.dtsi (revision 310972) @@ -1,290 +1,290 @@ /*- * Copyright (c) 2016 Jared McNeill * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ / { cpus { cpu@0 { clocks = <&c0_cpux_clk>; clock-latency = <2000000>; }; cpu@100 { clocks = <&c1_cpux_clk>; clock-latency = <2000000>; }; }; pmu { compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu"; /* Cluster 0 only */ interrupts = , , , ; }; clocks { pll_c0cpux: clk@01c20000 { #clock-cells = <0>; compatible = "allwinner,sun8i-a83t-pllcpux-clk"; reg = <0x01c20000 0x4>; clocks = <&osc24M>; clock-output-names = "pll_c0cpux"; }; pll_c1cpux: clk@01c20004 { #clock-cells = <0>; compatible = "allwinner,sun8i-a83t-pllcpux-clk"; reg = <0x01c20004 0x4>; clocks = <&osc24M>; clock-output-names = "pll_c1cpux"; }; c0_cpux_clk: c0clk@01c20050 { #clock-cells = <0>; compatible = "allwinner,sun8i-a83t-c0cpu-clk"; reg = <0x01c20050 0x4>; clocks = <&osc24M>, <&pll_c0cpux>; clock-output-names = "c0_cpux"; }; c1_cpux_clk: c1clk@01c20050 { #clock-cells = <0>; compatible = "allwinner,sun8i-a83t-c1cpu-clk"; reg = <0x01c20050 0x4>; clocks = <&osc24M>, <&pll_c1cpux>; clock-output-names = "c1_cpux"; }; /* cpus_clk compatible in gnu dt is incorrect */ cpus_clk: clk@01f01400 { compatible = "allwinner,sun8i-a83t-cpus-clk"; }; pll_hsic: clk@01c20044 { #clock-cells = <0>; compatible = "allwinner,sun9i-a80-pll4-clk"; reg = <0x01c20044 0x4>; clocks = <&osc24M>; clock-output-names = "pll_hsic"; }; usb_clk: clk@01c200cc { #clock-cells = <1>; #reset-cells = <1>; compatible = "allwinner,sun8i-a83t-usb-clk"; reg = <0x01c200cc 0x4>; clocks = <&osc24M>, <&pll_hsic>; clock-indices = <8>, <9>, <10>, <11>, <16>; clock-output-names = "usb_phy0", "usb_phy1", "usb_hsic_pll", "usb_hsic_12m", "usb_ohci0"; }; mii_phy_tx_clk: clk@1 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <25000000>; clock-output-names = "mii_phy_tx"; }; emac_int_tx_clk: clk@2 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <125000000>; clock-output-names = "emac_int_tx"; }; emac_tx_clk: clk@01c00030 { #clock-cells = <0>; compatible = "allwinner,sun8i-a83t-emac-clk"; reg = <0x01c00030 0x4>; clocks = <&mii_phy_tx_clk>, <&emac_int_tx_clk>; clock-output-names = "emac_tx"; }; }; soc { nmi_intc: interrupt-controller@01f00c0c { compatible = "allwinner,sun6i-a31-sc-nmi"; interrupt-controller; #interrupt-cells = <2>; reg = <0x01f00c0c 0x38>; interrupts = ; }; i2c0: i2c@01c2ac00 { compatible = "allwinner,sun8i-a83t-i2c"; reg = <0x01c2ac00 0x400>; interrupts = ; clocks = <&bus_gates 96>; resets = <&apb2_reset 0>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; i2c1: i2c@01c2b000 { compatible = "allwinner,sun8i-a83t-i2c"; reg = <0x01c2b000 0x400>; interrupts = ; clocks = <&bus_gates 97>; resets = <&apb2_reset 1>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; i2c2: i2c@01c2b400 { compatible = "allwinner,sun8i-a83t-i2c"; reg = <0x01c2b400 0x400>; interrupts = ; clocks = <&bus_gates 98>; resets = <&apb2_reset 2>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; usbphy: phy@01c19400 { compatible = "allwinner,sun8i-a83t-usb-phy"; reg = <0x01c19400 0x2c>, <0x01c1a800 0x4>, - <0x01c1a800 0x4>; + <0x01c1b800 0x4>; clocks = <&usb_clk 8>, <&usb_clk 9>, <&usb_clk 10>, <&usb_clk 11>; clock-names = "usb0_phy", "usb1_phy", "hsic_pll", "hsic_12m"; resets = <&usb_clk 0>, <&usb_clk 1>, <&usb_clk 2>; reset-names = "usb0_reset", "usb1_reset", "usb2_reset"; status = "disabled"; #phy-cells = <1>; }; ehci0: usb@01c1a000 { compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci"; reg = <0x01c1a000 0x100>; interrupts = ; clocks = <&bus_gates 26>; resets = <&ahb_reset 26>; phys = <&usbphy 1>; phy-names = "usb"; status = "disabled"; }; ehci1: usb@01c1b000 { compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci"; reg = <0x01c1b000 0x100>; interrupts = ; clocks = <&bus_gates 27>; resets = <&ahb_reset 27>; phys = <&usbphy 2>; phy-names = "usb"; status = "disabled"; }; emac: ethernet@01c30000 { compatible = "allwinner,sun8i-a83t-emac"; reg = <0x01c30000 0x100>; interrupts = ; interrupt-names = "macirq"; clocks = <&bus_gates 17>, <&emac_tx_clk>; clock-names = "ahb", "tx"; resets = <&ahb_reset 17>; reset-names = "ahb"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; sid: eeprom@01c14000 { compatible = "allwinner,sun8i-a83t-sid"; reg = <0x01c14000 0x400>; }; rtp: rtp@01f04000 { compatible = "allwinner,sun8i-a83t-ts"; reg = <0x01f04000 0x400>; interrupts = ; #thermal-sensor-cells = <0>; }; }; }; &pio { mmc2_8bit_pins: mmc2_8bit { allwinner,pins = "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; allwinner,function = "mmc2"; allwinner,drive = ; allwinner,pull = ; }; emac_pins_rgmii_a: emac_rgmii@0 { allwinner,pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD11", "PD12", "PD13", "PD14", "PD18", "PD19", "PD20", "PD21", "PD22", "PD23"; allwinner,function = "emac"; allwinner,drive = ; allwinner,pull = ; }; i2c0_pins_a: i2c0@0 { allwinner,pins = "PH0", "PH1"; allwinner,function = "i2c0"; allwinner,drive = ; allwinner,pull = ; }; i2c1_pins_a: i2c1@0 { allwinner,pins = "PH2", "PH3"; allwinner,function = "i2c1"; allwinner,drive = ; allwinner,pull = ; }; i2c2_pins_a: i2c2@0 { allwinner,pins = "PH4", "PH5"; allwinner,function = "i2c2"; allwinner,drive = ; allwinner,pull = ; }; };