Index: head/sys/dev/rtwn/rtl8188e/usb/r88eu_attach.c =================================================================== --- head/sys/dev/rtwn/rtl8188e/usb/r88eu_attach.c (revision 310304) +++ head/sys/dev/rtwn/rtl8188e/usb/r88eu_attach.c (revision 310305) @@ -1,216 +1,216 @@ /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2014 Kevin Lo * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include static struct rtwn_r88e_txpwr r88e_txpwr; void r88eu_attach(struct rtwn_usb_softc *); static void r88e_postattach(struct rtwn_softc *sc) { struct r92c_softc *rs = sc->sc_priv; struct ieee80211com *ic = &sc->sc_ic; rs->rs_scan_start = ic->ic_scan_start; ic->ic_scan_start = r92c_scan_start; rs->rs_scan_end = ic->ic_scan_end; ic->ic_scan_end = r92c_scan_end; } static void r88eu_attach_private(struct rtwn_softc *sc) { struct r92c_softc *rs; rs = malloc(sizeof(struct r92c_softc), M_RTWN_PRIV, M_WAITOK | M_ZERO); rs->rs_txpwr = &r88e_txpwr; rs->rs_txagc = &r88e_txagc; rs->rs_set_bw20 = r88e_set_bw20; rs->rs_get_txpower = r88e_get_txpower; rs->rs_set_gain = r88e_set_gain; rs->rs_tx_enable_ampdu = r88e_tx_enable_ampdu; rs->rs_tx_setup_hwseq = r88e_tx_setup_hwseq; rs->rs_tx_setup_macid = r88e_tx_setup_macid; rs->rs_set_name = rtwn_nop_softc; /* not used */ rs->rf_read_delay[0] = 10; rs->rf_read_delay[1] = 100; rs->rf_read_delay[2] = 10; sc->sc_priv = rs; } static void r88eu_adj_devcaps(struct rtwn_softc *sc) { /* XXX TODO? */ } void r88eu_attach(struct rtwn_usb_softc *uc) { struct rtwn_softc *sc = &uc->uc_sc; /* USB part. */ uc->uc_align_rx = r92cu_align_rx; uc->tx_agg_desc_num = 6; /* Common part. */ sc->sc_flags = RTWN_FLAG_EXT_HDR; sc->sc_set_chan = r92c_set_chan; sc->sc_fill_tx_desc = r92c_fill_tx_desc; sc->sc_fill_tx_desc_raw = r92c_fill_tx_desc_raw; sc->sc_fill_tx_desc_null = r92c_fill_tx_desc_null; sc->sc_dump_tx_desc = r92cu_dump_tx_desc; sc->sc_tx_radiotap_flags = r92c_tx_radiotap_flags; sc->sc_rx_radiotap_flags = r92c_rx_radiotap_flags; sc->sc_get_rssi_cck = r88e_get_rssi_cck; sc->sc_get_rssi_ofdm = r88e_get_rssi_ofdm; sc->sc_classify_intr = r88eu_classify_intr; sc->sc_handle_tx_report = r88e_ratectl_tx_complete; sc->sc_handle_c2h_report = r88e_handle_c2h_report; sc->sc_check_frame = rtwn_nop_int_softc_mbuf; sc->sc_rf_read = r92c_rf_read; sc->sc_rf_write = r88e_rf_write; sc->sc_check_condition = r92c_check_condition; sc->sc_efuse_postread = rtwn_nop_softc; sc->sc_parse_rom = r88e_parse_rom; sc->sc_set_led = r88e_set_led; sc->sc_power_on = r88e_power_on; sc->sc_power_off = r88eu_power_off; #ifndef RTWN_WITHOUT_UCODE sc->sc_fw_reset = r88e_fw_reset; sc->sc_fw_download_enable = r88e_fw_download_enable; #endif sc->sc_set_page_size = r92c_set_page_size; sc->sc_lc_calib = r92c_lc_calib; sc->sc_iq_calib = r88e_iq_calib; /* XXX TODO */ sc->sc_read_chipid_vendor = rtwn_nop_softc_uint32; sc->sc_adj_devcaps = r88eu_adj_devcaps; sc->sc_vap_preattach = rtwn_nop_softc_vap; sc->sc_postattach = r88e_postattach; sc->sc_detach_private = r92c_detach_private; sc->sc_set_media_status = r88e_set_media_status; #ifndef RTWN_WITHOUT_UCODE sc->sc_set_rsvd_page = r88e_set_rsvd_page; sc->sc_set_pwrmode = r88e_set_pwrmode; sc->sc_set_rssi = rtwn_nop_softc; /* XXX TODO? */ #endif sc->sc_beacon_init = r92c_beacon_init; sc->sc_beacon_enable = r88e_beacon_enable; sc->sc_beacon_set_rate = rtwn_nop_void_int; sc->sc_beacon_select = rtwn_nop_softc_int; sc->sc_temp_measure = r88e_temp_measure; sc->sc_temp_read = r88e_temp_read; sc->sc_init_tx_agg = r92cu_init_tx_agg; sc->sc_init_rx_agg = r88eu_init_rx_agg; sc->sc_init_ampdu = rtwn_nop_softc; sc->sc_init_intr = r88eu_init_intr; sc->sc_init_edca = r92c_init_edca; sc->sc_init_bb = r88e_init_bb; - sc->sc_init_rf = r92c_init_rf_common; + sc->sc_init_rf = r92c_init_rf; sc->sc_init_antsel = rtwn_nop_softc; sc->sc_post_init = r88eu_post_init; sc->sc_init_bcnq1_boundary = rtwn_nop_int_softc; sc->mac_prog = &rtl8188eu_mac[0]; sc->mac_size = nitems(rtl8188eu_mac); sc->bb_prog = &rtl8188eu_bb[0]; sc->bb_size = nitems(rtl8188eu_bb); sc->agc_prog = &rtl8188eu_agc[0]; sc->agc_size = nitems(rtl8188eu_agc); sc->rf_prog = &rtl8188eu_rf[0]; sc->name = "RTL8188EU"; sc->fwname = "rtwn-rtl8188eufw"; sc->fwsig = 0x88e; sc->page_count = R88E_TX_PAGE_COUNT; sc->pktbuf_count = R88E_TXPKTBUF_COUNT; sc->ackto = 0x40; sc->npubqpages = R88E_PUBQ_NPAGES; sc->page_size = R92C_TX_PAGE_SIZE; sc->txdesc_len = sizeof(struct r92cu_tx_desc); sc->efuse_maxlen = R88E_EFUSE_MAX_LEN; sc->efuse_maplen = R88E_EFUSE_MAP_LEN; sc->rx_dma_size = R88E_RX_DMA_BUFFER_SIZE; sc->macid_limit = R88E_MACID_MAX + 1; sc->cam_entry_limit = R92C_CAM_ENTRY_COUNT; sc->fwsize_limit = R92C_MAX_FW_SIZE; sc->temp_delta = R88E_CALIB_THRESHOLD; sc->bcn_status_reg[0] = R92C_TDECTRL; sc->bcn_status_reg[1] = R92C_TDECTRL; sc->rcr = 0; sc->ntxchains = 1; sc->nrxchains = 1; r88eu_attach_private(sc); } Index: head/sys/dev/rtwn/rtl8188e/usb/r88eu_init.c =================================================================== --- head/sys/dev/rtwn/rtl8188e/usb/r88eu_init.c (revision 310304) +++ head/sys/dev/rtwn/rtl8188e/usb/r88eu_init.c (revision 310305) @@ -1,227 +1,224 @@ /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2014 Kevin Lo * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include void r88eu_power_off(struct rtwn_softc *sc) { uint8_t reg; int error, ntries; /* Disable any kind of TX reports. */ error = rtwn_setbits_1(sc, R88E_TX_RPT_CTRL, R88E_TX_RPT1_ENA | R88E_TX_RPT2_ENA, 0); if (error == ENXIO) /* hardware gone */ return; /* Stop Rx. */ rtwn_write_1(sc, R92C_CR, 0); /* Move card to Low Power State. */ /* Block all Tx queues. */ rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); for (ntries = 0; ntries < 10; ntries++) { /* Should be zero if no packet is transmitting. */ if (rtwn_read_4(sc, R88E_SCH_TXCMD) == 0) break; rtwn_delay(sc, 5000); } if (ntries == 10) { device_printf(sc->sc_dev, "%s: failed to block Tx queues\n", __func__); return; } /* CCK and OFDM are disabled, and clock are gated. */ rtwn_setbits_1(sc, R92C_SYS_FUNC_EN, R92C_SYS_FUNC_EN_BBRSTB, 0); rtwn_delay(sc, 1); /* Reset MAC TRX */ rtwn_write_1(sc, R92C_CR, R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | R92C_CR_SCHEDULE_EN); /* check if removed later */ rtwn_setbits_1_shift(sc, R92C_CR, R92C_CR_ENSEC, 0, 1); /* Respond TxOK to scheduler */ rtwn_setbits_1(sc, R92C_DUAL_TSF_RST, 0, 0x20); /* If firmware in ram code, do reset. */ #ifndef RTWN_WITHOUT_UCODE if (rtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) r88e_fw_reset(sc, RTWN_FW_RESET_SHUTDOWN); #endif /* Reset MCU ready status. */ rtwn_write_1(sc, R92C_MCUFWDL, 0); /* Disable 32k. */ rtwn_setbits_1(sc, R88E_32K_CTRL, 0x01, 0); /* Move card to Disabled state. */ /* Turn off RF. */ rtwn_write_1(sc, R92C_RF_CTRL, 0); /* LDO Sleep mode. */ rtwn_setbits_1(sc, R92C_LPLDO_CTRL, 0, R92C_LPLDO_CTRL_SLEEP); /* Turn off MAC by HW state machine */ rtwn_setbits_1_shift(sc, R92C_APS_FSMCO, 0, R92C_APS_FSMCO_APFM_OFF, 1); for (ntries = 0; ntries < 10; ntries++) { /* Wait until it will be disabled. */ if ((rtwn_read_2(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_APFM_OFF) == 0) break; rtwn_delay(sc, 5000); } if (ntries == 10) { device_printf(sc->sc_dev, "%s: could not turn off MAC\n", __func__); return; } /* schmit trigger */ rtwn_setbits_1(sc, R92C_AFE_XTAL_CTRL + 2, 0, 0x80); /* Enable WL suspend. */ rtwn_setbits_1_shift(sc, R92C_APS_FSMCO, R92C_APS_FSMCO_AFSM_PCIE, R92C_APS_FSMCO_AFSM_HSUS, 1); /* Enable bandgap mbias in suspend. */ rtwn_write_1(sc, R92C_APS_FSMCO + 3, 0); /* Clear SIC_EN register. */ rtwn_setbits_1(sc, R92C_GPIO_MUXCFG + 1, 0x10, 0); /* Set USB suspend enable local register */ rtwn_setbits_1(sc, R92C_USB_SUSPEND, 0, 0x10); /* Reset MCU IO Wrapper. */ reg = rtwn_read_1(sc, R92C_RSV_CTRL + 1); rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08); rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08); /* marked as 'For Power Consumption' code. */ rtwn_write_1(sc, R92C_GPIO_OUT, rtwn_read_1(sc, R92C_GPIO_IN)); rtwn_write_1(sc, R92C_GPIO_IOSEL, 0xff); rtwn_write_1(sc, R92C_GPIO_IO_SEL, rtwn_read_1(sc, R92C_GPIO_IO_SEL) << 4); rtwn_setbits_1(sc, R92C_GPIO_MOD, 0, 0x0f); /* Set LNA, TRSW, EX_PA Pin to output mode. */ rtwn_write_4(sc, R88E_BB_PAD_CTRL, 0x00080808); } void r88eu_init_intr(struct rtwn_softc *sc) { /* TODO: adjust */ rtwn_write_4(sc, R88E_HISR, 0xffffffff); rtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM | R88E_HIMR_CPWM2 | R88E_HIMR_TBDER | R88E_HIMR_PSTIMEOUT); rtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW | R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR | R88E_HIMRE_TXERR); rtwn_setbits_1(sc, R92C_USB_SPECIAL_OPTION, 0, R92C_USB_SPECIAL_OPTION_INT_BULK_SEL); } void r88eu_init_rx_agg(struct rtwn_softc *sc) { /* XXX merge? */ rtwn_setbits_1(sc, R92C_TRXDMA_CTRL, 0, R92C_TRXDMA_CTRL_RXDMA_AGG_EN); /* XXX dehardcode */ rtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48); rtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, 4); } void r88eu_post_init(struct rtwn_softc *sc) { - /* Turn CCK and OFDM blocks on. */ - rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, 0, R92C_RFMOD_CCK_EN); - rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, 0, R92C_RFMOD_OFDM_EN); /* Enable per-packet TX report. */ rtwn_setbits_1(sc, R88E_TX_RPT_CTRL, 0, R88E_TX_RPT1_ENA); /* Disable Tx if MACID is not associated. */ rtwn_write_4(sc, R88E_MACID_NO_LINK, 0xffffffff); rtwn_write_4(sc, R88E_MACID_NO_LINK + 4, 0xffffffff); r88e_macid_enable_link(sc, RTWN_MACID_BC, 1); /* Perform LO and IQ calibrations. */ r88e_iq_calib(sc); /* Perform LC calibration. */ r92c_lc_calib(sc); rtwn_write_1(sc, R92C_USB_HRPWM, 0); if (sc->sc_ratectl_sysctl == RTWN_RATECTL_FW) { /* No support (yet?) for f/w rate adaptation. */ sc->sc_ratectl = RTWN_RATECTL_NET80211; } else sc->sc_ratectl = sc->sc_ratectl_sysctl; } Index: head/sys/dev/rtwn/rtl8192c/r92c.h =================================================================== --- head/sys/dev/rtwn/rtl8192c/r92c.h (revision 310304) +++ head/sys/dev/rtwn/rtl8192c/r92c.h (revision 310305) @@ -1,115 +1,114 @@ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $ * $FreeBSD$ */ #ifndef RTL8192C_H #define RTL8192C_H /* * Global definitions. */ #define R92C_TXPKTBUF_COUNT 256 #define R92C_TX_PAGE_SIZE 128 #define R92C_RX_DMA_BUFFER_SIZE 0x2800 #define R92C_MAX_FW_SIZE 0x4000 #define R92C_MACID_MAX 31 #define R92C_CAM_ENTRY_COUNT 32 #define R92C_CALIB_THRESHOLD 2 /* * Function declarations. */ /* r92c_attach.c */ void r92c_detach_private(struct rtwn_softc *); void r92c_read_chipid_vendor(struct rtwn_softc *, uint32_t); /* r92c_beacon.c */ void r92c_beacon_init(struct rtwn_softc *, void *, int); void r92c_beacon_enable(struct rtwn_softc *, int, int); /* r92c_calib.c */ void r92c_iq_calib(struct rtwn_softc *); void r92c_lc_calib(struct rtwn_softc *); void r92c_temp_measure(struct rtwn_softc *); uint8_t r92c_temp_read(struct rtwn_softc *); /* r92c_chan.c */ void r92c_get_txpower(struct rtwn_softc *, int, struct ieee80211_channel *, uint16_t[]); void r92c_set_bw20(struct rtwn_softc *, uint8_t); void r92c_set_chan(struct rtwn_softc *, struct ieee80211_channel *); void r92c_set_gain(struct rtwn_softc *, uint8_t); void r92c_scan_start(struct ieee80211com *); void r92c_scan_end(struct ieee80211com *); /* r92c_fw.c */ #ifndef RTWN_WITHOUT_UCODE void r92c_fw_reset(struct rtwn_softc *, int); void r92c_fw_download_enable(struct rtwn_softc *, int); #endif void r92c_joinbss_rpt(struct rtwn_softc *, int); #ifndef RTWN_WITHOUT_UCODE int r92c_set_rsvd_page(struct rtwn_softc *, int, int, int); int r92c_set_pwrmode(struct rtwn_softc *, struct ieee80211vap *, int); void r92c_set_rssi(struct rtwn_softc *); void r92c_handle_c2h_report(void *); #endif /* r92c_init.c */ int r92c_check_condition(struct rtwn_softc *, const uint8_t[]); int r92c_set_page_size(struct rtwn_softc *); void r92c_init_bb_common(struct rtwn_softc *); int r92c_init_rf_chain(struct rtwn_softc *, const struct rtwn_rf_prog *, int); -void r92c_init_rf_common(struct rtwn_softc *); void r92c_init_rf(struct rtwn_softc *); void r92c_init_edca(struct rtwn_softc *); void r92c_init_ampdu(struct rtwn_softc *); void r92c_init_antsel(struct rtwn_softc *); void r92c_pa_bias_init(struct rtwn_softc *); /* r92c_rf.c */ uint32_t r92c_rf_read(struct rtwn_softc *, int, uint8_t); void r92c_rf_write(struct rtwn_softc *, int, uint8_t, uint32_t); /* r92c_rom.c */ void r92c_efuse_postread(struct rtwn_softc *); void r92c_parse_rom(struct rtwn_softc *, uint8_t *); /* r92c_rx.c */ int8_t r92c_get_rssi_cck(struct rtwn_softc *, void *); int8_t r92c_get_rssi_ofdm(struct rtwn_softc *, void *); uint8_t r92c_rx_radiotap_flags(const void *); /* r92c_tx.c */ void r92c_tx_enable_ampdu(void *, int); void r92c_tx_setup_hwseq(void *); void r92c_tx_setup_macid(void *, int); void r92c_fill_tx_desc(struct rtwn_softc *, struct ieee80211_node *, struct mbuf *, void *, uint8_t, int); void r92c_fill_tx_desc_raw(struct rtwn_softc *, struct ieee80211_node *, struct mbuf *, void *, const struct ieee80211_bpf_params *); void r92c_fill_tx_desc_null(struct rtwn_softc *, void *, int, int, int); uint8_t r92c_tx_radiotap_flags(const void *); #endif /* RTL8192C_H */ Index: head/sys/dev/rtwn/rtl8192c/r92c_init.c =================================================================== --- head/sys/dev/rtwn/rtl8192c/r92c_init.c (revision 310304) +++ head/sys/dev/rtwn/rtl8192c/r92c_init.c (revision 310305) @@ -1,322 +1,314 @@ /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini * Copyright (c) 2014 Kevin Lo * Copyright (c) 2015-2016 Andriy Voskoboinyk * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include int r92c_check_condition(struct rtwn_softc *sc, const uint8_t cond[]) { struct r92c_softc *rs = sc->sc_priv; uint8_t mask; int i; if (cond[0] == 0) return (1); RTWN_DPRINTF(sc, RTWN_DEBUG_RESET, "%s: condition byte 0: %02X; chip %02X, board %02X\n", __func__, cond[0], rs->chip, rs->board_type); if (!(rs->chip & R92C_CHIP_92C)) { if (rs->board_type == R92C_BOARD_TYPE_HIGHPA) mask = R92C_COND_RTL8188RU; else if (rs->board_type == R92C_BOARD_TYPE_MINICARD) mask = R92C_COND_RTL8188CE; else mask = R92C_COND_RTL8188CU; } else { if (rs->board_type == R92C_BOARD_TYPE_MINICARD) mask = R92C_COND_RTL8192CE; else mask = R92C_COND_RTL8192CU; } for (i = 0; i < RTWN_MAX_CONDITIONS && cond[i] != 0; i++) if ((cond[i] & mask) == mask) return (1); return (0); } int r92c_set_page_size(struct rtwn_softc *sc) { return (rtwn_write_1(sc, R92C_PBP, SM(R92C_PBP_PSRX, R92C_PBP_128) | SM(R92C_PBP_PSTX, R92C_PBP_128)) == 0); } void r92c_init_bb_common(struct rtwn_softc *sc) { struct r92c_softc *rs = sc->sc_priv; int i, j; /* Write BB initialization values. */ for (i = 0; i < sc->bb_size; i++) { const struct rtwn_bb_prog *bb_prog = &sc->bb_prog[i]; while (!rtwn_check_condition(sc, bb_prog->cond)) { KASSERT(bb_prog->next != NULL, ("%s: wrong condition value (i %d)\n", __func__, i)); bb_prog = bb_prog->next; } for (j = 0; j < bb_prog->count; j++) { RTWN_DPRINTF(sc, RTWN_DEBUG_RESET, "BB: reg 0x%03x, val 0x%08x\n", bb_prog->reg[j], bb_prog->val[j]); rtwn_bb_write(sc, bb_prog->reg[j], bb_prog->val[j]); rtwn_delay(sc, 1); } } if (rs->chip & R92C_CHIP_92C_1T2R) { /* 8192C 1T only configuration. */ rtwn_bb_setbits(sc, R92C_FPGA0_TXINFO, 0x03, 0x02); rtwn_bb_setbits(sc, R92C_FPGA1_TXINFO, 0x300033, 0x200022); rtwn_bb_setbits(sc, R92C_CCK0_AFESETTING, 0xff000000, 0x45000000); rtwn_bb_setbits(sc, R92C_OFDM0_TRXPATHENA, 0xff, 0x23); rtwn_bb_setbits(sc, R92C_OFDM0_AGCPARAM1, 0x30, 0x10); rtwn_bb_setbits(sc, 0xe74, 0x0c000000, 0x08000000); rtwn_bb_setbits(sc, 0xe78, 0x0c000000, 0x08000000); rtwn_bb_setbits(sc, 0xe7c, 0x0c000000, 0x08000000); rtwn_bb_setbits(sc, 0xe80, 0x0c000000, 0x08000000); rtwn_bb_setbits(sc, 0xe88, 0x0c000000, 0x08000000); } /* Write AGC values. */ for (i = 0; i < sc->agc_size; i++) { const struct rtwn_agc_prog *agc_prog = &sc->agc_prog[i]; while (!rtwn_check_condition(sc, agc_prog->cond)) { KASSERT(agc_prog->next != NULL, ("%s: wrong condition value (2) (i %d)\n", __func__, i)); agc_prog = agc_prog->next; } for (j = 0; j < agc_prog->count; j++) { RTWN_DPRINTF(sc, RTWN_DEBUG_RESET, "AGC: val 0x%08x\n", agc_prog->val[j]); rtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, agc_prog->val[j]); rtwn_delay(sc, 1); } } } int r92c_init_rf_chain(struct rtwn_softc *sc, const struct rtwn_rf_prog *rf_prog, int chain) { int i, j; RTWN_DPRINTF(sc, RTWN_DEBUG_RESET, "%s: chain %d\n", __func__, chain); for (i = 0; rf_prog[i].reg != NULL; i++) { const struct rtwn_rf_prog *prog = &rf_prog[i]; while (!rtwn_check_condition(sc, prog->cond)) { KASSERT(prog->next != NULL, ("%s: wrong condition value (i %d)\n", __func__, i)); prog = prog->next; } for (j = 0; j < prog->count; j++) { RTWN_DPRINTF(sc, RTWN_DEBUG_RESET, "RF: reg 0x%02x, val 0x%05x\n", prog->reg[j], prog->val[j]); /* * These are fake RF registers offsets that * indicate a delay is required. */ /* NB: we are using 'value' to store required delay. */ if (prog->reg[j] > 0xf8) { rtwn_delay(sc, prog->val[j]); continue; } rtwn_rf_write(sc, chain, prog->reg[j], prog->val[j]); rtwn_delay(sc, 1); } } return (i); } void -r92c_init_rf_common(struct rtwn_softc *sc) +r92c_init_rf(struct rtwn_softc *sc) { struct r92c_softc *rs = sc->sc_priv; uint32_t reg, type; int i, chain, idx, off; for (chain = 0, i = 0; chain < sc->nrxchains; chain++, i++) { /* Save RF_ENV control type. */ idx = chain / 2; off = (chain % 2) * 16; reg = rtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); type = (reg >> off) & 0x10; /* Set RF_ENV enable. */ rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(chain), 0, 0x100000); rtwn_delay(sc, 1); /* Set RF_ENV output high. */ rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(chain), 0, 0x10); rtwn_delay(sc, 1); /* Set address and data lengths of RF registers. */ rtwn_bb_setbits(sc, R92C_HSSI_PARAM2(chain), R92C_HSSI_PARAM2_ADDR_LENGTH, 0); rtwn_delay(sc, 1); rtwn_bb_setbits(sc, R92C_HSSI_PARAM2(chain), R92C_HSSI_PARAM2_DATA_LENGTH, 0); rtwn_delay(sc, 1); /* Write RF initialization values for this chain. */ i += r92c_init_rf_chain(sc, &sc->rf_prog[i], chain); /* Restore RF_ENV control type. */ rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACESW(idx), 0x10 << off, type << off); /* Cache RF register CHNLBW. */ rs->rf_chnlbw[chain] = rtwn_rf_read(sc, chain, R92C_RF_CHNLBW); } -} - -void -r92c_init_rf(struct rtwn_softc *sc) -{ - struct r92c_softc *rs = sc->sc_priv; - - r92c_init_rf_common(sc); if ((rs->chip & (R92C_CHIP_UMC_A_CUT | R92C_CHIP_92C)) == R92C_CHIP_UMC_A_CUT) { rtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); rtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); } /* Turn CCK and OFDM blocks on. */ rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, 0, R92C_RFMOD_CCK_EN); rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, 0, R92C_RFMOD_OFDM_EN); } void r92c_init_edca(struct rtwn_softc *sc) { /* SIFS */ rtwn_write_2(sc, R92C_SPEC_SIFS, 0x100a); rtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x100a); rtwn_write_2(sc, R92C_SIFS_CCK, 0x100a); rtwn_write_2(sc, R92C_SIFS_OFDM, 0x100a); /* TXOP */ rtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); rtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); rtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005ea324); rtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002fa226); } void r92c_init_ampdu(struct rtwn_softc *sc) { /* Setup AMPDU aggregation. */ rtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ rtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); rtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x0708); } void r92c_init_antsel(struct rtwn_softc *sc) { uint32_t reg; if (sc->ntxchains != 1 || sc->nrxchains != 1) return; rtwn_setbits_1(sc, R92C_LEDCFG2, 0, 0x80); rtwn_bb_setbits(sc, R92C_FPGA0_RFPARAM(0), 0, 0x2000); reg = rtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(0)); sc->sc_ant = MS(reg, R92C_FPGA0_RFIFACEOE0_ANT); /* XXX */ } void r92c_pa_bias_init(struct rtwn_softc *sc) { struct r92c_softc *rs = sc->sc_priv; int i; for (i = 0; i < sc->nrxchains; i++) { if (rs->pa_setting & (1 << i)) continue; r92c_rf_write(sc, i, R92C_RF_IPA, 0x0f406); r92c_rf_write(sc, i, R92C_RF_IPA, 0x4f406); r92c_rf_write(sc, i, R92C_RF_IPA, 0x8f406); r92c_rf_write(sc, i, R92C_RF_IPA, 0xcf406); } if (!(rs->pa_setting & 0x10)) rtwn_setbits_1(sc, 0x16, 0xf0, 0x90); } Index: head/sys/dev/rtwn/rtl8812a/r12a_priv.h =================================================================== --- head/sys/dev/rtwn/rtl8812a/r12a_priv.h (revision 310304) +++ head/sys/dev/rtwn/rtl8812a/r12a_priv.h (revision 310305) @@ -1,852 +1,852 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #ifndef R12A_PRIV_H #define R12A_PRIV_H /* * MAC initialization values. */ #define RTL8812AU_MAC_PROG_START \ { 0x010, 0x0c }, #define RTL8812AU_MAC_PROG_END \ { 0x025, 0x0f }, { 0x072, 0x00 }, { 0x420, 0x80 }, { 0x428, 0x0a }, \ { 0x429, 0x10 }, { 0x430, 0x00 }, { 0x431, 0x00 }, { 0x432, 0x00 }, \ { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 }, { 0x436, 0x07 }, \ { 0x437, 0x08 }, { 0x43c, 0x04 }, { 0x43d, 0x05 }, { 0x43e, 0x07 }, \ { 0x43f, 0x08 }, { 0x440, 0x5d }, { 0x441, 0x01 }, { 0x442, 0x00 }, \ { 0x444, 0x10 }, { 0x445, 0x00 }, { 0x446, 0x00 }, { 0x447, 0x00 }, \ { 0x448, 0x00 }, { 0x449, 0xf0 }, { 0x44a, 0x0f }, { 0x44b, 0x3e }, \ { 0x44c, 0x10 }, { 0x44d, 0x00 }, { 0x44e, 0x00 }, { 0x44f, 0x00 }, \ { 0x450, 0x00 }, { 0x451, 0xf0 }, { 0x452, 0x0f }, { 0x453, 0x00 }, \ { 0x45b, 0x80 }, { 0x460, 0x66 }, { 0x461, 0x66 }, { 0x4c8, 0xff }, \ { 0x4c9, 0x08 }, { 0x4cc, 0xff }, { 0x4cd, 0xff }, { 0x4ce, 0x01 }, \ { 0x500, 0x26 }, { 0x501, 0xa2 }, { 0x502, 0x2f }, { 0x503, 0x00 }, \ { 0x504, 0x28 }, { 0x505, 0xa3 }, { 0x506, 0x5e }, { 0x507, 0x00 }, \ { 0x508, 0x2b }, { 0x509, 0xa4 }, { 0x50a, 0x5e }, { 0x50b, 0x00 }, \ { 0x50c, 0x4f }, { 0x50d, 0xa4 }, { 0x50e, 0x00 }, { 0x50f, 0x00 }, \ { 0x512, 0x1c }, { 0x514, 0x0a }, { 0x516, 0x0a }, { 0x525, 0x4f }, \ { 0x550, 0x10 }, { 0x551, 0x10 }, { 0x559, 0x02 }, { 0x55c, 0x50 }, \ { 0x55d, 0xff }, { 0x604, 0x09 }, { 0x605, 0x30 }, { 0x607, 0x03 }, \ { 0x608, 0x0e }, { 0x609, 0x2a }, { 0x620, 0xff }, { 0x621, 0xff }, \ { 0x622, 0xff }, { 0x623, 0xff }, { 0x624, 0xff }, { 0x625, 0xff }, \ { 0x626, 0xff }, { 0x627, 0xff }, { 0x638, 0x50 }, { 0x63c, 0x0a }, \ { 0x63d, 0x0a }, { 0x63e, 0x0e }, { 0x63f, 0x0e }, { 0x640, 0x80 }, \ { 0x642, 0x40 }, { 0x643, 0x00 }, { 0x652, 0xc8 }, { 0x66e, 0x05 }, \ { 0x700, 0x21 }, { 0x701, 0x43 }, { 0x702, 0x65 }, { 0x703, 0x87 }, \ { 0x708, 0x21 }, { 0x709, 0x43 }, { 0x70a, 0x65 }, { 0x70b, 0x87 }, \ { 0x718, 0x40 } static const struct rtwn_mac_prog rtl8812au_mac_no_ext_pa_lna[] = { RTL8812AU_MAC_PROG_START { 0x11, 0x66 }, RTL8812AU_MAC_PROG_END }, rtl8812au_mac[] = { RTL8812AU_MAC_PROG_START { 0x11, 0x5a }, RTL8812AU_MAC_PROG_END }; /* * Baseband initialization values. */ #define R12A_COND_GPA 0x01 #define R12A_COND_APA 0x02 #define R12A_COND_GLNA 0x04 #define R12A_COND_ALNA 0x08 #define R12A_COND_TYPE(t) ((t) << 4) static const uint16_t rtl8812au_bb_regs0[] = { 0x800, 0x804, 0x808, 0x80c, 0x810, 0x814, 0x818, 0x820, 0x824, 0x828, 0x82c, 0x830, 0x834, 0x838, 0x83c, 0x840, 0x844, 0x848, 0x84c, 0x850, 0x854, 0x858, 0x85c, 0x860, 0x864, 0x868, 0x86c, 0x870, 0x874, 0x878, 0x87c, 0x8a0, 0x8a4, 0x8a8, 0x8ac, 0x8b0, 0x8b4, 0x8b8, 0x8bc, 0x8c0, 0x8c4, 0x8c8, 0x8cc, 0x8d0, 0x8dc, 0x8d4, 0x8d8, 0x8f8, 0x8fc, 0x900, 0x90c, 0x910, 0x914, 0x918, 0x91c, 0x920, 0x924, 0x928, 0x92c, 0x930, 0x934, 0x960, 0x964, 0x968, 0x96c, 0x970, 0x978, 0x97c, 0x980, 0x984, 0x988, 0x990, 0x994, 0x998, 0x99c, 0x9a0, 0x9a4, 0x9a8, 0x9ac, 0x9b0, 0x9b4, 0x9b8, 0x9bc, 0x9d0, 0x9d4, 0x9d8, 0x9dc, 0x9e4, 0x9e8, 0xa00, 0xa04, 0xa08, 0xa0c, 0xa10, 0xa14, 0xa18, 0xa1c, 0xa20, 0xa24, 0xa28, 0xa2c, 0xa70, 0xa74, 0xa78, 0xa7c, 0xa80, 0xa84, 0xb00, 0xb04, 0xb08, 0xb0c, 0xb10, 0xb14, 0xb18, 0xb1c, 0xb20, 0xb24, 0xb28, 0xb2c, 0xb30, 0xb34, 0xb38, 0xb3c, 0xb40, 0xb44, 0xb48, 0xb4c, 0xb50, 0xb54, 0xb58, 0xb5c, 0xc00, 0xc04, 0xc08, 0xc0c, 0xc10, 0xc14, 0xc1c, 0xc20, 0xc24, 0xc28, 0xc2c, 0xc30, 0xc34, 0xc38, 0xc3c, 0xc40, 0xc44, 0xc48, 0xc4c, 0xc50, 0xc54, 0xc58, 0xc5c, 0xc60, 0xc64 }, rtl8812au_bb_regs1[] = { 0xc68 }, rtl8812au_bb_regs2[] = { 0xc6c, 0xc70, 0xc74, 0xc78, 0xc7c, 0xc80, 0xc84, 0xc94, 0xc98, 0xc9c, 0xca0, 0xca4, 0xca8, 0xcb0, 0xcb4, 0xcb8, 0xe00, 0xe04, 0xe08, 0xe0c, 0xe10, 0xe14, 0xe1c, 0xe20, 0xe24, 0xe28, 0xe2c, 0xe30, 0xe34, 0xe38, 0xe3c, 0xe40, 0xe44, 0xe48, 0xe4c, 0xe50, 0xe54, 0xe58, 0xe5c, 0xe60, 0xe64, 0xe68, 0xe6c, 0xe70, 0xe74, 0xe78, 0xe7c, 0xe80, 0xe84, 0xe94, 0xe98, 0xe9c, 0xea0, 0xea4, 0xea8, 0xeb0, 0xeb4, 0xeb8 }; static const uint32_t rtl8812au_bb_vals0[] = { 0x8020d010, 0x080112e0, 0x0e028233, 0x12131113, 0x20101263, 0x020c3d10, 0x03a00385, 0x00000000, 0x00030fe0, 0x00000000, 0x002083dd, 0x2eaaeeb8, 0x0037a706, 0x06c89b44, 0x0000095b, 0xc0000001, 0x40003cde, 0x6210ff8b, 0x6cfdffb8, 0x28874706, 0x0001520c, 0x8060e000, 0x74210168, 0x6929c321, 0x79727432, 0x8ca7a314, 0x338c2878, 0x03333333, 0x31602c2e, 0x00003152, 0x000fc000, 0x00000013, 0x7f7f7f7f, 0xa202033e, 0x0ff0fa0a, 0x00000600, 0x000fc080, 0x6c0057ff, 0x4ca520a3, 0x27f00020, 0x00000000, 0x00012d69, 0x08248492, 0x0000b800, 0x00000000, 0x940008a0, 0x290b5612, 0x400002c0, 0x00000000, 0x00000701, 0x00000000, 0x0000fc00, 0x00000404, 0x1c1028c0, 0x64b11a1c, 0xe0767233, 0x055aa500, 0x00000004, 0xfffe0000, 0xfffffffe, 0x001fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x801fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x27100000, 0xffff0100, 0xffffff5c, 0xffffffff, 0x000000ff, 0x00080080, 0x00000000, 0x00000000, 0x81081008, 0x00000000, 0x01081008, 0x01081008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000003, 0x000002d5, 0x00d047c8, 0x01ff000c, 0x8c838300, 0x2e7f000f, 0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000, 0x090e1217, 0x00000305, 0x00900000, 0x101fff00, 0x00000008, 0x00000900, 0x225b0606, 0x218075b2, 0x001f8c80, 0x03100000, 0x0000b000, 0xae0201eb, 0x01003207, 0x00009807, 0x01000000, 0x00000002, 0x00000002, 0x0000001f, 0x03020100, 0x07060504, 0x0b0a0908, 0x0f0e0d0c, 0x13121110, 0x17161514, 0x0000003a, 0x00000000, 0x00000000, 0x13000032, 0x48080000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000007, 0x00042020, 0x80410231, 0x00000000, 0x00000100, 0x01000000, 0x40000003, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x00000020, 0x0008121c, 0x30000c1c, 0x00000058, 0x34344443, 0x07003333 }, rtl8812au_bb_vals1_ext_pa_lna[] = { 0x59791979 }, rtl8812au_bb_vals1[] = { 0x59799979 }, rtl8812au_bb_vals2[] = { 0x59795979, 0x19795979, 0x19795979, 0x19791979, 0x19791979, 0x19791979, 0x19791979, 0x0100005c, 0x00000000, 0x00000000, 0x00000029, 0x08040201, 0x80402010, 0x77547777, 0x00000077, 0x00508242, 0x00000007, 0x00042020, 0x80410231, 0x00000000, 0x00000100, 0x01000000, 0x40000003, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x00000020, 0x0008121c, 0x30000c1c, 0x00000058, 0x34344443, 0x07003333, 0x59791979, 0x59795979, 0x19795979, 0x19795979, 0x19791979, 0x19791979, 0x19791979, 0x19791979, 0x0100005c, 0x00000000, 0x00000000, 0x00000029, 0x08040201, 0x80402010, 0x77547777, 0x00000077, 0x00508242 }; static const struct rtwn_bb_prog rtl8812au_bb[] = { { nitems(rtl8812au_bb_regs0), rtl8812au_bb_regs0, rtl8812au_bb_vals0, { 0 }, NULL }, /* * Devices with: * * External 2GHz PA, type 0; * * External 5GHz PA, type 0 or 5; * * External 2GHz LNA, type 0 or 5; * * External 5GHz LNA, type 0; */ { nitems(rtl8812au_bb_regs1), rtl8812au_bb_regs1, rtl8812au_bb_vals1_ext_pa_lna, { R12A_COND_GPA | R12A_COND_GLNA | R12A_COND_APA | R12A_COND_ALNA | R12A_COND_TYPE(0x0), R12A_COND_APA | R12A_COND_GLNA | R12A_COND_TYPE(0x5), 0 }, /* * Others. */ &(const struct rtwn_bb_prog){ nitems(rtl8812au_bb_regs1), rtl8812au_bb_regs1, rtl8812au_bb_vals1, { 0 }, NULL } }, { nitems(rtl8812au_bb_regs2), rtl8812au_bb_regs2, rtl8812au_bb_vals2, { 0 }, NULL } }; static const uint32_t rtl8812au_agc_vals0_lna_g0[] = { 0xfc000001, 0xfb020001, 0xfa040001, 0xf9060001, 0xf8080001, 0xf70a0001, 0xf60c0001, 0xf50e0001, 0xf4100001, 0xf3120001, 0xf2140001, 0xf1160001, 0xf0180001, 0xef1a0001, 0xee1c0001, 0xed1e0001, 0xec200001, 0xeb220001, 0xea240001, 0xcd260001, 0xcc280001, 0xcb2a0001, 0xca2c0001, 0xc92e0001, 0xc8300001, 0xa6320001, 0xa5340001, 0xa4360001, 0xa3380001, 0xa23a0001, 0x883c0001, 0x873e0001, 0x86400001, 0x85420001, 0x84440001, 0x83460001, 0x82480001, 0x814a0001, 0x484c0001, 0x474e0001, 0x46500001, 0x45520001, 0x44540001, 0x43560001, 0x42580001, 0x415a0001, 0x255c0001, 0x245e0001, 0x23600001, 0x22620001, 0x21640001, 0x21660001, 0x21680001, 0x216a0001, 0x216c0001, 0x216e0001, 0x21700001, 0x21720001, 0x21740001, 0x21760001, 0x21780001, 0x217a0001, 0x217c0001, 0x217e0001 }, rtl8812au_agc_vals0_lna_g5[] = { 0xf9000001, 0xf8020001, 0xf7040001, 0xf6060001, 0xf5080001, 0xf40a0001, 0xf30c0001, 0xf20e0001, 0xf1100001, 0xf0120001, 0xef140001, 0xee160001, 0xed180001, 0xec1a0001, 0xeb1c0001, 0xea1e0001, 0xcd200001, 0xcc220001, 0xcb240001, 0xca260001, 0xc9280001, 0xc82a0001, 0xc72c0001, 0xc62e0001, 0xa5300001, 0xa4320001, 0xa3340001, 0xa2360001, 0x88380001, 0x873a0001, 0x863c0001, 0x853e0001, 0x84400001, 0x83420001, 0x82440001, 0x81460001, 0x48480001, 0x474a0001, 0x464c0001, 0x454e0001, 0x44500001, 0x43520001, 0x42540001, 0x41560001, 0x25580001, 0x245a0001, 0x235c0001, 0x225e0001, 0x21600001, 0x21620001, 0x21640001, 0x21660001, 0x21680001, 0x216a0001, 0x236c0001, 0x226e0001, 0x21700001, 0x21720001, 0x21740001, 0x21760001, 0x21780001, 0x217a0001, 0x217c0001, 0x217e0001 }, rtl8812au_agc_vals0[] = { 0xff000001, 0xff020001, 0xff040001, 0xff060001, 0xff080001, 0xfe0a0001, 0xfd0c0001, 0xfc0e0001, 0xfb100001, 0xfa120001, 0xf9140001, 0xf8160001, 0xf7180001, 0xf61a0001, 0xf51c0001, 0xf41e0001, 0xf3200001, 0xf2220001, 0xf1240001, 0xf0260001, 0xef280001, 0xee2a0001, 0xed2c0001, 0xec2e0001, 0xeb300001, 0xea320001, 0xe9340001, 0xe8360001, 0xe7380001, 0xe63a0001, 0xe53c0001, 0xc73e0001, 0xc6400001, 0xc5420001, 0xc4440001, 0xc3460001, 0xc2480001, 0xc14a0001, 0xa74c0001, 0xa64e0001, 0xa5500001, 0xa4520001, 0xa3540001, 0xa2560001, 0xa1580001, 0x675a0001, 0x665c0001, 0x655e0001, 0x64600001, 0x63620001, 0x48640001, 0x47660001, 0x46680001, 0x456a0001, 0x446c0001, 0x436e0001, 0x42700001, 0x41720001, 0x41740001, 0x41760001, 0x41780001, 0x417a0001, 0x417c0001, 0x417e0001 }, rtl8812au_agc_vals1_lna_a0[] = { 0xfc800001, 0xfb820001, 0xfa840001, 0xf9860001, 0xf8880001, 0xf78a0001, 0xf68c0001, 0xf58e0001, 0xf4900001, 0xf3920001, 0xf2940001, 0xf1960001, 0xf0980001, 0xef9a0001, 0xee9c0001, 0xed9e0001, 0xeca00001, 0xeba20001, 0xeaa40001, 0xe9a60001, 0xe8a80001, 0xe7aa0001, 0xe6ac0001, 0xe5ae0001, 0xe4b00001, 0xe3b20001, 0xa8b40001, 0xa7b60001, 0xa6b80001, 0xa5ba0001, 0xa4bc0001, 0xa3be0001, 0xa2c00001, 0xa1c20001, 0x68c40001, 0x67c60001, 0x66c80001, 0x65ca0001, 0x64cc0001, 0x47ce0001, 0x46d00001, 0x45d20001, 0x44d40001, 0x43d60001, 0x42d80001, 0x08da0001, 0x07dc0001, 0x06de0001, 0x05e00001, 0x04e20001, 0x03e40001, 0x02e60001, 0x01e80001, 0x01ea0001, 0x01ec0001, 0x01ee0001, 0x01f00001, 0x01f20001, 0x01f40001, 0x01f60001, 0x01f80001, 0x01fa0001, 0x01fc0001, 0x01fe0001 }, rtl8812au_agc_vals1[] = { 0xff800001, 0xff820001, 0xff840001, 0xfe860001, 0xfd880001, 0xfc8a0001, 0xfb8c0001, 0xfa8e0001, 0xf9900001, 0xf8920001, 0xf7940001, 0xf6960001, 0xf5980001, 0xf49a0001, 0xf39c0001, 0xf29e0001, 0xf1a00001, 0xf0a20001, 0xefa40001, 0xeea60001, 0xeda80001, 0xecaa0001, 0xebac0001, 0xeaae0001, 0xe9b00001, 0xe8b20001, 0xe7b40001, 0xe6b60001, 0xe5b80001, 0xe4ba0001, 0xe3bc0001, 0xa8be0001, 0xa7c00001, 0xa6c20001, 0xa5c40001, 0xa4c60001, 0xa3c80001, 0xa2ca0001, 0xa1cc0001, 0x68ce0001, 0x67d00001, 0x66d20001, 0x65d40001, 0x64d60001, 0x47d80001, 0x46da0001, 0x45dc0001, 0x44de0001, 0x43e00001, 0x42e20001, 0x08e40001, 0x07e60001, 0x06e80001, 0x05ea0001, 0x04ec0001, 0x03ee0001, 0x02f00001, 0x01f20001, 0x01f40001, 0x01f60001, 0x01f80001, 0x01fa0001, 0x01fc0001, 0x01fe0001 }; static const struct rtwn_agc_prog rtl8812au_agc[] = { /* * External 2GHz LNA (type 0). */ { nitems(rtl8812au_agc_vals0_lna_g0), rtl8812au_agc_vals0_lna_g0, { R12A_COND_GLNA | R12A_COND_TYPE(0x0), 0 }, /* * External 2GHz LNA (type 5). */ &(const struct rtwn_agc_prog){ nitems(rtl8812au_agc_vals0_lna_g5), rtl8812au_agc_vals0_lna_g5, { R12A_COND_GLNA | R12A_COND_TYPE(0x5), 0 }, /* * Others. */ &(const struct rtwn_agc_prog){ nitems(rtl8812au_agc_vals0), rtl8812au_agc_vals0, { 0 }, NULL } } }, /* * External 5GHz LNA (type 0). */ { nitems(rtl8812au_agc_vals1_lna_a0), rtl8812au_agc_vals1_lna_a0, { R12A_COND_ALNA | R12A_COND_TYPE(0x0), 0 }, /* * Others. */ &(const struct rtwn_agc_prog){ nitems(rtl8812au_agc_vals1), rtl8812au_agc_vals1, { 0 }, NULL } } }; /* * RF initialization values. */ static const uint8_t rtl8812au_rf0_regs0[] = { 0x00, 0x18, 0x56, 0x66, 0x1e, 0x89 }, rtl8812au_rf0_regs1[] = { 0x86 }, rtl8812au_rf0_regs2[] = { 0x8b }, rtl8812au_rf0_regs3[] = { 0xb1, 0xb3, 0xb4, 0xba, 0x18, 0xef }, rtl8812au_rf0_regs4[] = { 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b }, rtl8812au_rf0_regs5[] = { 0xef, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34 }, rtl8812au_rf0_regs6[] = { 0xef, 0xef, 0xdf, 0x35, 0x35, 0x35, 0x36, 0x36, 0x36, 0x36, 0xef, 0x51, 0x52, 0x53, 0x54, 0xef, 0x08, 0x18, 0xef, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0x3a, 0x3b, 0x3c, 0xef }, rtl8812au_rf0_regs7[] = { 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34 }, rtl8812au_rf0_regs8[] = { 0xef, 0x18, 0xef, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0xef, 0x18, 0xef, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xef, 0xef, 0x3c, 0x3c, 0x3c, }, rtl8812au_rf0_regs9[] = { 0xef, 0x18, 0xef, 0xdf, 0x1f }, rtl8812au_rf0_regs10[] = { 0x61, 0x62, 0x63, 0x64, 0x65 }, rtl8812au_rf0_regs11[] = { 0x08, 0x1c, 0xb4, 0x18, 0xfe, 0xfe, 0xfe, 0xfe, 0xb4, 0x18 }, rtl8812au_rf1_regs0[] = { 0x56, 0x66, 0x89 }, rtl8812au_rf1_regs3[] = { 0xb1, 0xb3, 0xb4, 0xba, 0x18, 0xef }; static const uint32_t rtl8812au_rf0_vals0[] = { 0x10000, 0x1712a, 0x51cf2, 0x40000, 0x80000, 0x00080 }, rtl8812au_rf0_vals1_lna_g0_g5[] = { 0x14b3a }, rtl8812au_rf0_vals1[] = { 0x14b38 }, rtl8812au_rf0_vals2_lna_a0[] = { 0x80180 }, rtl8812au_rf0_vals2[] = { 0x87180 }, rtl8812au_rf0_vals3[] = { 0x1fc1a, 0xf0810, 0x1a78d, 0x86180, 0x00006, 0x02000 }, rtl8812au_rf0_vals4_lna_g0_g5[] = { 0x3f218, 0x30a58, 0x2fa58, 0x22590, 0x1fa50, 0x10248, 0x08240 }, rtl8812au_rf0_vals4[] = { 0x38a58, 0x37a58, 0x2a590, 0x27a50, 0x18248, 0x10240, 0x08240 }, rtl8812au_rf0_vals5_pa_g0[] = { 0x00100, 0x0a4ee, 0x09076, 0x08073, 0x07070, 0x0606d, 0x0506a, 0x04049, 0x03046, 0x02028, 0x01025, 0x00022 }, rtl8812au_rf0_vals5[] = { 0x00100, 0x0adf4, 0x09df1, 0x08dee, 0x07deb, 0x06de8, 0x05de5, 0x04de2, 0x03ce6, 0x024e7, 0x014e4, 0x004e1 }, rtl8812au_rf0_vals6[] = { 0x00000, 0x020a2, 0x00080, 0x00192, 0x08192, 0x10192, 0x00024, 0x08024, 0x10024, 0x18024, 0x00000, 0x00c21, 0x006d9, 0xfc649, 0x0017e, 0x00002, 0x08400, 0x1712a, 0x01000, 0x00080, 0x3a02c, 0x04000, 0x00400, 0x3202c, 0x10000, 0x000a0, 0x2b064, 0x04000, 0x000d8, 0x23070, 0x04000, 0x00468, 0x1b870, 0x10000, 0x00098, 0x12085, 0xe4000, 0x00418, 0x0a080, 0xf0000, 0x00418, 0x02080, 0x10000, 0x00080, 0x7a02c, 0x04000, 0x00400, 0x7202c, 0x10000, 0x000a0, 0x6b064, 0x04000, 0x000d8, 0x63070, 0x04000, 0x00468, 0x5b870, 0x10000, 0x00098, 0x52085, 0xe4000, 0x00418, 0x4a080, 0xf0000, 0x00418, 0x42080, 0x10000, 0x00080, 0xba02c, 0x04000, 0x00400, 0xb202c, 0x10000, 0x000a0, 0xab064, 0x04000, 0x000d8, 0xa3070, 0x04000, 0x00468, 0x9b870, 0x10000, 0x00098, 0x92085, 0xe4000, 0x00418, 0x8a080, 0xf0000, 0x00418, 0x82080, 0x10000, 0x01100 }, rtl8812au_rf0_vals7_pa_a0[] = { 0x4a0b2, 0x490af, 0x48070, 0x4706d, 0x46050, 0x4504d, 0x4404a, 0x43047, 0x4200a, 0x41007, 0x40004, 0x2a0b2, 0x290af, 0x28070, 0x2706d, 0x26050, 0x2504d, 0x2404a, 0x23047, 0x2200a, 0x21007, 0x20004, 0x0a0b2, 0x090af, 0x08070, 0x0706d, 0x06050, 0x0504d, 0x0404a, 0x03047, 0x0200a, 0x01007, 0x00004 }, rtl8812au_rf0_vals7_pa_a5[] = { 0x4a0b2, 0x490af, 0x48070, 0x4706d, 0x4604d, 0x4504a, 0x44047, 0x43044, 0x42007, 0x41004, 0x40001, 0x2a0b4, 0x290b1, 0x28072, 0x2706f, 0x2604f, 0x2504c, 0x24049, 0x23046, 0x22009, 0x21006, 0x20003, 0x0a0b2, 0x090af, 0x08070, 0x0706d, 0x0604d, 0x0504a, 0x04047, 0x03044, 0x02007, 0x01004, 0x00001 }, rtl8812au_rf0_vals7[] = { 0x4adf5, 0x49df2, 0x48def, 0x47dec, 0x46de9, 0x45de6, 0x44de3, 0x438c8, 0x428c5, 0x418c2, 0x408c0, 0x2adf5, 0x29df2, 0x28def, 0x27dec, 0x26de9, 0x25de6, 0x24de3, 0x238c8, 0x228c5, 0x218c2, 0x208c0, 0x0aff7, 0x09df7, 0x08df4, 0x07df1, 0x06dee, 0x05deb, 0x04de8, 0x038cc, 0x028c9, 0x018c6, 0x008c3 }, rtl8812au_rf0_vals8_pa_a0_a5[] = { 0x00000, 0x1712a, 0x00040, 0x001d4, 0x081d4, 0x101d4, 0x201b4, 0x281b4, 0x301b4, 0x401b4, 0x481b4, 0x501b4, 0x00000, 0x1712a, 0x00010, 0x04bfb, 0x0cbfb, 0x14bfb, 0x1cbfb, 0x24f4b, 0x2cf4b, 0x34f4b, 0x3cf4b, 0x44f4b, 0x4cf4b, 0x54f4b, 0x5cf4b, 0x00000, 0x00008, 0x002cc, 0x00522, 0x00902 }, rtl8812au_rf0_vals8[] = { 0x00000, 0x1712a, 0x00040, 0x00188, 0x08147, 0x10147, 0x201d7, 0x281d7, 0x301d7, 0x401d8, 0x481d8, 0x501d8, 0x00000, 0x1712a, 0x00010, 0x84eb4, 0x8cc35, 0x94c35, 0x9cc35, 0xa4c35, 0xacc35, 0xb4c35, 0xbcc35, 0xc4c34, 0xccc35, 0xd4c35, 0xdcc35, 0x00000, 0x00008, 0x002a8, 0x005a2, 0x00880 }, rtl8812au_rf0_vals9[] = { 0x00000, 0x1712a, 0x00002, 0x00080, 0x00064 }, rtl8812au_rf0_vals10_pa_a0[] = { 0xfdd43, 0x38f4b, 0x32117, 0x194ac, 0x931d1 }, rtl8812au_rf0_vals10_pa_a5[] = { 0xfdd43, 0x38f4b, 0x32117, 0x194ac, 0x931d2 }, rtl8812au_rf0_vals10[] = { 0xe5d53, 0x38fcd, 0x114eb, 0x196ac, 0x911d7 }, rtl8812au_rf0_vals11[] = { 0x08400, 0x739d2, 0x1e78d, 0x1f12a, 0x0c350, 0x0c350, 0x0c350, 0x0c350, 0x1a78d, 0x1712a }, rtl8812au_rf1_vals0[] = { 0x51cf2, 0x40000, 0x00080 }, rtl8812au_rf1_vals3[] = { 0x1fc1a, 0xf0810, 0x1a78d, 0x86180, 0x00006, 0x02000 }, rtl8812au_rf1_vals6[] = { 0x00000, 0x020a2, 0x00080, 0x00192, 0x08192, 0x10192, 0x00024, 0x08024, 0x10024, 0x18024, 0x00000, 0x00c21, 0x006d9, 0xfc649, 0x0017e, 0x00002, 0x08400, 0x1712a, 0x01000, 0x00080, 0x3a02c, 0x04000, 0x00400, 0x3202c, 0x10000, 0x000a0, 0x2b064, 0x04000, 0x000d8, 0x23070, 0x04000, 0x00468, 0x1b870, 0x10000, 0x00098, 0x12085, 0xe4000, 0x00418, 0x0a080, 0xf0000, 0x00418, 0x02080, 0x10000, 0x00080, 0x7a02c, 0x04000, 0x00400, 0x7202c, 0x10000, 0x000a0, 0x6b064, 0x04000, 0x000d8, 0x63070, 0x04000, 0x00468, 0x5b870, 0x10000, 0x00098, 0x52085, 0xe4000, 0x00418, 0x4a080, 0xf0000, 0x00418, 0x42080, 0x10000, 0x00080, 0xba02c, 0x04000, 0x00400, 0xb202c, 0x10000, 0x000a0, 0xab064, 0x04000, 0x000d8, 0xa3070, 0x04000, 0x00468, 0x9b870, 0x10000, 0x00098, 0x92085, 0xe4000, 0x00418, 0x8a080, 0xf0000, 0x00418, 0x82080, 0x10000, 0x01100 }, rtl8812au_rf1_vals7_pa_a5[] = { 0x4a0b1, 0x490ae, 0x4806f, 0x4706c, 0x4604c, 0x45049, 0x44046, 0x43043, 0x42006, 0x41003, 0x40000, 0x2a0b3, 0x290b0, 0x28071, 0x2706e, 0x2604e, 0x2504b, 0x24048, 0x23045, 0x22008, 0x21005, 0x20002, 0x0a0b3, 0x090b0, 0x08070, 0x0706d, 0x0604d, 0x0504a, 0x04047, 0x03044, 0x02007, 0x01004, 0x00001 }, rtl8812au_rf1_vals8_pa_a0_a5[] = { 0x00000, 0x1712a, 0x00040, 0x001c5, 0x081c5, 0x101c5, 0x20174, 0x28174, 0x30174, 0x40185, 0x48185, 0x50185, 0x00000, 0x1712a, 0x00010, 0x05b8b, 0x0db8b, 0x15b8b, 0x1db8b, 0x262db, 0x2e2db, 0x362db, 0x3e2db, 0x4553b, 0x4d53b, 0x5553b, 0x5d53b, 0x00000, 0x00008, 0x002dc, 0x00524, 0x00902 }, rtl8812au_rf1_vals10_pa_g0_a0[] = { 0xeac43, 0x38f47, 0x31157, 0x1c4ac, 0x931d1 }, rtl8812au_rf1_vals10_pa_a5[] = { 0xeac43, 0x38f47, 0x31157, 0x1c4ac, 0x931d2 }; static const struct rtwn_rf_prog rtl8812au_rf[] = { /* RF chain 0. */ { nitems(rtl8812au_rf0_regs0), rtl8812au_rf0_regs0, rtl8812au_rf0_vals0, { 0 }, NULL }, /* External 2GHz LNA, type 0 or 5. */ { nitems(rtl8812au_rf0_regs1), rtl8812au_rf0_regs1, rtl8812au_rf0_vals1_lna_g0_g5, { R12A_COND_GLNA | R12A_COND_TYPE(0x0), R12A_COND_GLNA | R12A_COND_TYPE(0x5), 0 }, /* Others. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs1), rtl8812au_rf0_regs1, rtl8812au_rf0_vals1, { 0 }, NULL } }, /* External 5GHz LNA, type 0. */ { nitems(rtl8812au_rf0_regs2), rtl8812au_rf0_regs2, rtl8812au_rf0_vals2_lna_a0, { R12A_COND_ALNA | R12A_COND_TYPE(0x0), 0 }, /* Others. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs2), rtl8812au_rf0_regs2, rtl8812au_rf0_vals2, { 0 }, NULL } }, { nitems(rtl8812au_rf0_regs3), rtl8812au_rf0_regs3, rtl8812au_rf0_vals3, { 0 }, NULL }, /* External 2GHz LNA, type 0 or 5. */ { nitems(rtl8812au_rf0_regs4), rtl8812au_rf0_regs4, rtl8812au_rf0_vals4_lna_g0_g5, { R12A_COND_GLNA | R12A_COND_TYPE(0x0), R12A_COND_GLNA | R12A_COND_TYPE(0x5), 0 }, /* Others */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs4), rtl8812au_rf0_regs4, rtl8812au_rf0_vals4, { 0 }, NULL } }, /* External 2GHz PA, type 0. */ { nitems(rtl8812au_rf0_regs5), rtl8812au_rf0_regs5, rtl8812au_rf0_vals5_pa_g0, { R12A_COND_GPA | R12A_COND_TYPE(0x0), 0 }, /* Others. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs5), rtl8812au_rf0_regs5, rtl8812au_rf0_vals5, { 0 }, NULL } }, { nitems(rtl8812au_rf0_regs6), rtl8812au_rf0_regs6, rtl8812au_rf0_vals6, { 0 }, NULL }, /* External 5GHz PA, type 0. */ { nitems(rtl8812au_rf0_regs7), rtl8812au_rf0_regs7, rtl8812au_rf0_vals7_pa_a0, { R12A_COND_APA | R12A_COND_TYPE(0x0), 0 }, /* External 5GHz PA, type 5. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs7), rtl8812au_rf0_regs7, rtl8812au_rf0_vals7_pa_a5, { R12A_COND_APA | R12A_COND_TYPE(0x5), 0 }, /* Others. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs7), rtl8812au_rf0_regs7, rtl8812au_rf0_vals7, { 0 }, NULL } } }, /* External 5GHz PA, type 0 or 5. */ { nitems(rtl8812au_rf0_regs8), rtl8812au_rf0_regs8, rtl8812au_rf0_vals8_pa_a0_a5, { R12A_COND_APA | R12A_COND_TYPE(0x0), R12A_COND_APA | R12A_COND_TYPE(0x5), 0 }, /* Others. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs8), rtl8812au_rf0_regs8, rtl8812au_rf0_vals8, { 0 }, NULL } }, { nitems(rtl8812au_rf0_regs9), rtl8812au_rf0_regs9, rtl8812au_rf0_vals9, { 0 }, NULL }, /* External 5GHz PA, type 0. */ { nitems(rtl8812au_rf0_regs10), rtl8812au_rf0_regs10, rtl8812au_rf0_vals10_pa_a0, { R12A_COND_APA | R12A_COND_TYPE(0x0), 0 }, /* External 5GHz PA, type 5. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs10), rtl8812au_rf0_regs10, rtl8812au_rf0_vals10_pa_a5, { R12A_COND_APA | R12A_COND_TYPE(0x5), 0 }, /* Others. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs10), rtl8812au_rf0_regs10, rtl8812au_rf0_vals10, { 0 }, NULL } } }, { nitems(rtl8812au_rf0_regs11), rtl8812au_rf0_regs11, rtl8812au_rf0_vals11, { 0 }, NULL }, { 0, NULL, NULL, { 0 }, NULL }, - /* RF path 2. */ + /* RF chain 1. */ { nitems(rtl8812au_rf1_regs0), rtl8812au_rf1_regs0, rtl8812au_rf1_vals0, { 0 }, NULL }, /* rtl8812au_rf[1] */ /* External 2GHz LNA, type 0 or 5. */ { nitems(rtl8812au_rf0_regs1), rtl8812au_rf0_regs1, rtl8812au_rf0_vals1_lna_g0_g5, { R12A_COND_GLNA | R12A_COND_TYPE(0x0), R12A_COND_GLNA | R12A_COND_TYPE(0x5), 0 }, /* Others. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs1), rtl8812au_rf0_regs1, rtl8812au_rf0_vals1, { 0 }, NULL } }, /* rtl8812au_rf[2] */ /* External 5GHz LNA, type 0. */ { nitems(rtl8812au_rf0_regs2), rtl8812au_rf0_regs2, rtl8812au_rf0_vals2_lna_a0, { R12A_COND_ALNA | R12A_COND_TYPE(0x0), 0 }, /* Others. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs2), rtl8812au_rf0_regs2, rtl8812au_rf0_vals2, { 0 }, NULL } }, { nitems(rtl8812au_rf1_regs3), rtl8812au_rf1_regs3, rtl8812au_rf1_vals3, { 0 }, NULL }, /* rtl8812au_rf[4] */ /* External 2GHz LNA, type 0 or 5. */ { nitems(rtl8812au_rf0_regs4), rtl8812au_rf0_regs4, rtl8812au_rf0_vals4_lna_g0_g5, { R12A_COND_GLNA | R12A_COND_TYPE(0x0), R12A_COND_GLNA | R12A_COND_TYPE(0x5), 0 }, /* Others */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs4), rtl8812au_rf0_regs4, rtl8812au_rf0_vals4, { 0 }, NULL } }, /* rtl8812au_rf[5] */ /* External 2GHz PA, type 0. */ { nitems(rtl8812au_rf0_regs5), rtl8812au_rf0_regs5, rtl8812au_rf0_vals5_pa_g0, { R12A_COND_GPA | R12A_COND_TYPE(0x0), 0 }, /* Others. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs5), rtl8812au_rf0_regs5, rtl8812au_rf0_vals5, { 0 }, NULL } }, { nitems(rtl8812au_rf0_regs6), rtl8812au_rf0_regs6, rtl8812au_rf1_vals6, { 0 }, NULL }, /* External 5GHz PA, type 0. */ { nitems(rtl8812au_rf0_regs7), rtl8812au_rf0_regs7, rtl8812au_rf0_vals7_pa_a0, { R12A_COND_APA | R12A_COND_TYPE(0x0), 0 }, /* External 5GHz PA, type 5. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs7), rtl8812au_rf0_regs7, rtl8812au_rf1_vals7_pa_a5, { R12A_COND_APA | R12A_COND_TYPE(0x5), 0 }, /* Others. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs7), rtl8812au_rf0_regs7, rtl8812au_rf0_vals7, { 0 }, NULL } } }, /* External 5GHz PA, type 0 or 5. */ { nitems(rtl8812au_rf0_regs8), rtl8812au_rf0_regs8, rtl8812au_rf1_vals8_pa_a0_a5, { R12A_COND_APA | R12A_COND_TYPE(0x0), R12A_COND_APA | R12A_COND_TYPE(0x5), 0 }, /* Others. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs8), rtl8812au_rf0_regs8, rtl8812au_rf0_vals8, { 0 }, NULL } }, { nitems(rtl8812au_rf0_regs9) - 1, rtl8812au_rf0_regs9, rtl8812au_rf0_vals9, { 0 }, NULL }, /* External 2GHz or 5GHz PA, type 0. */ { nitems(rtl8812au_rf0_regs10), rtl8812au_rf0_regs10, rtl8812au_rf1_vals10_pa_g0_a0, { R12A_COND_GPA | R12A_COND_TYPE(0x0), R12A_COND_APA | R12A_COND_TYPE(0x0), 0 }, /* External 5GHz PA, type 5. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs10), rtl8812au_rf0_regs10, rtl8812au_rf1_vals10_pa_a5, { R12A_COND_APA | R12A_COND_TYPE(0x5), 0 }, /* Others. */ &(const struct rtwn_rf_prog){ nitems(rtl8812au_rf0_regs10), rtl8812au_rf0_regs10, rtl8812au_rf0_vals10, { 0 }, NULL } } }, { 1, rtl8812au_rf0_regs11, rtl8812au_rf0_vals11, { 0 }, NULL }, { 0, NULL, NULL, { 0 }, NULL } }; /* * Registers to save before IQ calibration. */ static const uint16_t r12a_iq_bb_regs[] = { 0x520, 0x550, 0x808, 0xa04, 0x90c, 0xc00, 0xe00, 0x838, 0x82c }; static const uint16_t r12a_iq_afe_regs[] = { 0xc5c, 0xc60, 0xc64, 0xc68, 0xcb0, 0xcb4, 0xe5c, 0xe60, 0xe64, 0xe68, 0xeb0, 0xeb4 }; static const uint8_t r12a_iq_rf_regs[] = { 0x65, 0x8f, 0x0 }; #endif /* R12A_PRIV_H */