Index: head/sys/dev/rtwn/rtl8812a/r12a_rom.c =================================================================== --- head/sys/dev/rtwn/rtl8812a/r12a_rom.c (revision 308824) +++ head/sys/dev/rtwn/rtl8812a/r12a_rom.c (revision 308825) @@ -1,221 +1,222 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include "opt_wlan.h" #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include void r12a_parse_rom_common(struct rtwn_softc *sc, uint8_t *buf) { struct r12a_softc *rs = sc->sc_priv; struct r12a_rom *rom = (struct r12a_rom *)buf; - int i, j; + int i, j, k; sc->thermal_meter = rom->thermal_meter; rs->crystalcap = RTWN_GET_ROM_VAR(rom->crystalcap, R12A_ROM_CRYSTALCAP_DEF); rs->tx_bbswing_2g = RTWN_GET_ROM_VAR(rom->tx_bbswing_2g, 0); rs->tx_bbswing_5g = RTWN_GET_ROM_VAR(rom->tx_bbswing_5g, 0); for (i = 0; i < sc->ntxchains; i++) { struct r12a_tx_pwr_2g *pwr_2g = &rom->tx_pwr[i].pwr_2g; struct r12a_tx_pwr_5g *pwr_5g = &rom->tx_pwr[i].pwr_5g; struct r12a_tx_pwr_diff_2g *pwr_diff_2g = &rom->tx_pwr[i].pwr_diff_2g; struct r12a_tx_pwr_diff_5g *pwr_diff_5g = &rom->tx_pwr[i].pwr_diff_5g; for (j = 0; j < R12A_GROUP_2G - 1; j++) { rs->cck_tx_pwr[i][j] = RTWN_GET_ROM_VAR(pwr_2g->cck[j], R12A_DEF_TX_PWR_2G); rs->ht40_tx_pwr_2g[i][j] = RTWN_GET_ROM_VAR(pwr_2g->ht40[j], R12A_DEF_TX_PWR_2G); } rs->cck_tx_pwr[i][j] = RTWN_GET_ROM_VAR(pwr_2g->cck[j], R12A_DEF_TX_PWR_2G); rs->cck_tx_pwr_diff_2g[i][0] = 0; rs->ofdm_tx_pwr_diff_2g[i][0] = RTWN_SIGN4TO8( MS(pwr_diff_2g->ht20_ofdm, LOW_PART)); rs->bw20_tx_pwr_diff_2g[i][0] = RTWN_SIGN4TO8( MS(pwr_diff_2g->ht20_ofdm, HIGH_PART)); rs->bw40_tx_pwr_diff_2g[i][0] = 0; - for (j = 1; j < nitems(pwr_diff_2g->diff123); j++) { + for (j = 1, k = 0; k < nitems(pwr_diff_2g->diff123); j++, k++) { rs->cck_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8( - MS(pwr_diff_2g->diff123[j].ofdm_cck, LOW_PART)); + MS(pwr_diff_2g->diff123[k].ofdm_cck, LOW_PART)); rs->ofdm_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8( - MS(pwr_diff_2g->diff123[j].ofdm_cck, HIGH_PART)); + MS(pwr_diff_2g->diff123[k].ofdm_cck, HIGH_PART)); rs->bw20_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8( - MS(pwr_diff_2g->diff123[j].ht40_ht20, LOW_PART)); + MS(pwr_diff_2g->diff123[k].ht40_ht20, LOW_PART)); rs->bw40_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8( - MS(pwr_diff_2g->diff123[j].ht40_ht20, HIGH_PART)); + MS(pwr_diff_2g->diff123[k].ht40_ht20, HIGH_PART)); } for (j = 0; j < R12A_GROUP_5G; j++) { rs->ht40_tx_pwr_5g[i][j] = RTWN_GET_ROM_VAR(pwr_5g->ht40[j], R12A_DEF_TX_PWR_5G); } rs->ofdm_tx_pwr_diff_5g[i][0] = RTWN_SIGN4TO8( MS(pwr_diff_5g->ht20_ofdm, LOW_PART)); rs->ofdm_tx_pwr_diff_5g[i][1] = RTWN_SIGN4TO8( MS(pwr_diff_5g->ofdm_ofdm[0], HIGH_PART)); rs->ofdm_tx_pwr_diff_5g[i][2] = RTWN_SIGN4TO8( MS(pwr_diff_5g->ofdm_ofdm[0], LOW_PART)); rs->ofdm_tx_pwr_diff_5g[i][3] = RTWN_SIGN4TO8( MS(pwr_diff_5g->ofdm_ofdm[1], LOW_PART)); rs->bw20_tx_pwr_diff_5g[i][0] = RTWN_SIGN4TO8( MS(pwr_diff_5g->ht20_ofdm, HIGH_PART)); rs->bw40_tx_pwr_diff_5g[i][0] = 0; - for (j = 1; j < nitems(pwr_diff_5g->ht40_ht20); j++) { + for (j = 1, k = 0; k < nitems(pwr_diff_5g->ht40_ht20); + j++, k++) { rs->bw20_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8( - MS(pwr_diff_5g->ht40_ht20[j], LOW_PART)); + MS(pwr_diff_5g->ht40_ht20[k], LOW_PART)); rs->bw40_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8( - MS(pwr_diff_5g->ht40_ht20[j], HIGH_PART)); + MS(pwr_diff_5g->ht40_ht20[k], HIGH_PART)); } for (j = 0; j < nitems(pwr_diff_5g->ht80_ht160); j++) { rs->bw80_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8( MS(pwr_diff_5g->ht80_ht160[j], HIGH_PART)); rs->bw160_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8( MS(pwr_diff_5g->ht80_ht160[j], LOW_PART)); } } rs->regulatory = MS(rom->rf_board_opt, R92C_ROM_RF1_REGULATORY); rs->board_type = MS(RTWN_GET_ROM_VAR(rom->rf_board_opt, R92C_BOARD_TYPE_DONGLE), R92C_ROM_RF1_BOARD_TYPE); RTWN_DPRINTF(sc, RTWN_DEBUG_ROM, "%s: regulatory type=%d\n", __func__, rs->regulatory); } void r12a_parse_rom(struct rtwn_softc *sc, uint8_t *buf) { struct r12a_softc *rs = sc->sc_priv; struct r12a_rom *rom = (struct r12a_rom *)buf; uint8_t pa_type, lna_type_2g, lna_type_5g; /* Read PA/LNA types. */ pa_type = RTWN_GET_ROM_VAR(rom->pa_type, 0); lna_type_2g = RTWN_GET_ROM_VAR(rom->lna_type_2g, 0); lna_type_5g = RTWN_GET_ROM_VAR(rom->lna_type_5g, 0); rs->ext_pa_2g = R12A_ROM_IS_PA_EXT_2GHZ(pa_type); rs->ext_pa_5g = R12A_ROM_IS_PA_EXT_5GHZ(pa_type); rs->ext_lna_2g = R21A_ROM_IS_LNA_EXT(lna_type_2g); rs->ext_lna_5g = R21A_ROM_IS_LNA_EXT(lna_type_5g); rs->bt_coex = (MS(rom->rf_board_opt, R92C_ROM_RF1_BOARD_TYPE) == R92C_BOARD_TYPE_HIGHPA); rs->bt_ant_num = (rom->rf_bt_opt & R12A_RF_BT_OPT_ANT_NUM); if (rs->ext_pa_2g) { rs->type_pa_2g = R12A_GET_ROM_PA_TYPE(lna_type_2g, 0) | (R12A_GET_ROM_PA_TYPE(lna_type_2g, 1) << 2); } if (rs->ext_pa_5g) { rs->type_pa_5g = R12A_GET_ROM_PA_TYPE(lna_type_5g, 0) | (R12A_GET_ROM_PA_TYPE(lna_type_5g, 1) << 2); } if (rs->ext_lna_2g) { rs->type_lna_2g = R12A_GET_ROM_LNA_TYPE(lna_type_2g, 0) | (R12A_GET_ROM_LNA_TYPE(lna_type_2g, 1) << 2); } if (rs->ext_lna_5g) { rs->type_lna_5g = R12A_GET_ROM_LNA_TYPE(lna_type_5g, 0) | (R12A_GET_ROM_LNA_TYPE(lna_type_5g, 1) << 2); } if (rom->rfe_option & 0x80) { if (rs->ext_lna_5g) { if (rs->ext_pa_5g) { if (rs->ext_pa_2g && rs->ext_lna_2g) rs->rfe_type = 3; else rs->rfe_type = 0; } else rs->rfe_type = 2; } else rs->rfe_type = 4; } else { rs->rfe_type = rom->rfe_option & 0x3f; /* workaround for incorrect EFUSE map */ if (rs->rfe_type == 4 && rs->ext_pa_2g && rs->ext_lna_2g && rs->ext_pa_5g && rs->ext_lna_5g) rs->rfe_type = 0; } /* Read MAC address. */ IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr_12a); /* Execute common part of initialization. */ r12a_parse_rom_common(sc, buf); } Index: head/sys/dev/rtwn/rtl8812a/r12a_var.h =================================================================== --- head/sys/dev/rtwn/rtl8812a/r12a_var.h (revision 308824) +++ head/sys/dev/rtwn/rtl8812a/r12a_var.h (revision 308825) @@ -1,117 +1,117 @@ /*- * Copyright (c) 2016 Andriy Voskoboinyk * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #ifndef R12A_VAR_H #define R12A_VAR_H #include struct r12a_softc { uint8_t chip; #define R12A_CHIP_C_CUT 0x01 uint8_t rs_flags; #define R12A_RXCKSUM_EN 0x01 #define R12A_RXCKSUM6_EN 0x02 #define R12A_IQK_RUNNING 0x04 /* ROM variables */ int ext_pa_2g:1, ext_pa_5g:1, ext_lna_2g:1, ext_lna_5g:1, type_pa_2g:4, type_pa_5g:4, type_lna_2g:4, type_lna_5g:4, bt_coex:1, bt_ant_num:1; uint8_t board_type; uint8_t regulatory; uint8_t crystalcap; uint8_t rfe_type; uint8_t tx_bbswing_2g; uint8_t tx_bbswing_5g; uint8_t cck_tx_pwr[R12A_MAX_RF_PATH][R12A_GROUP_2G]; uint8_t ht40_tx_pwr_2g[R12A_MAX_RF_PATH][R12A_GROUP_2G]; uint8_t ht40_tx_pwr_5g[R12A_MAX_RF_PATH][R12A_GROUP_5G]; - uint8_t cck_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; - uint8_t ofdm_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; - uint8_t bw20_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; - uint8_t bw40_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; + int8_t cck_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; + int8_t ofdm_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; + int8_t bw20_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; + int8_t bw40_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; - uint8_t ofdm_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; - uint8_t bw20_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; - uint8_t bw40_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; - uint8_t bw80_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; - uint8_t bw160_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; + int8_t ofdm_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; + int8_t bw20_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; + int8_t bw40_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; + int8_t bw80_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; + int8_t bw160_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT]; int sc_ant; void (*rs_crystalcap_write)(struct rtwn_softc *); void (*rs_fix_spur)(struct rtwn_softc *, struct ieee80211_channel *); void (*rs_set_band_2ghz)(struct rtwn_softc *, uint32_t); void (*rs_set_band_5ghz)(struct rtwn_softc *, uint32_t); void (*rs_init_burstlen)(struct rtwn_softc *); void (*rs_init_ampdu_fwhw)(struct rtwn_softc *); #ifndef RTWN_WITHOUT_UCODE int (*rs_iq_calib_fw_supported)(struct rtwn_softc *); #endif void (*rs_iq_calib_sw)(struct rtwn_softc *); int ac_usb_dma_size; int ac_usb_dma_time; int ampdu_max_time; }; #define R12A_SOFTC(_sc) ((struct r12a_softc *)((_sc)->sc_priv)) #define rtwn_r12a_fix_spur(_sc, _c) \ ((R12A_SOFTC(_sc)->rs_fix_spur)((_sc), (_c))) #define rtwn_r12a_set_band_2ghz(_sc, _rates) \ ((R12A_SOFTC(_sc)->rs_set_band_2ghz)((_sc), (_rates))) #define rtwn_r12a_set_band_5ghz(_sc, _rates) \ ((R12A_SOFTC(_sc)->rs_set_band_5ghz)((_sc), (_rates))) #define rtwn_r12a_init_burstlen(_sc) \ ((R12A_SOFTC(_sc)->rs_init_burstlen)((_sc))) #define rtwn_r12a_init_ampdu_fwhw(_sc) \ ((R12A_SOFTC(_sc)->rs_init_ampdu_fwhw)((_sc))) #define rtwn_r12a_crystalcap_write(_sc) \ ((R12A_SOFTC(_sc)->rs_crystalcap_write)((_sc))) #ifndef RTWN_WITHOUT_UCODE #define rtwn_r12a_iq_calib_fw_supported(_sc) \ ((R12A_SOFTC(_sc)->rs_iq_calib_fw_supported)((_sc))) #endif #define rtwn_r12a_iq_calib_sw(_sc) \ ((R12A_SOFTC(_sc)->rs_iq_calib_sw)((_sc))) #endif /* R12A_VAR_H */