Index: head/sys/boot/fdt/dts/powerpc/p2041rdb.dts =================================================================== --- head/sys/boot/fdt/dts/powerpc/p2041rdb.dts (revision 308583) +++ head/sys/boot/fdt/dts/powerpc/p2041rdb.dts (revision 308584) @@ -1,490 +1,449 @@ /* * P2041RDB Device Tree Source * * Copyright 2011 Freescale Semiconductor Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of Freescale Semiconductor nor the * names of its contributors may be used to endorse or promote products * derived from this software without specific prior written permission. * * * ALTERNATIVELY, this software may be distributed under the terms of the * GNU General Public License ("GPL") as published by the Free Software * Foundation, either version 2 of that License or (at your option) any * later version. * * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* $FreeBSD$ */ /include/ "p2041si.dtsi" / { model = "fsl,P2041RDB"; compatible = "fsl,P2041RDB"; #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&mpic>; aliases { phy_rgmii_0 = &phy_rgmii_0; phy_rgmii_1 = &phy_rgmii_1; phy_sgmii_2 = &phy_sgmii_2; phy_sgmii_3 = &phy_sgmii_3; phy_sgmii_4 = &phy_sgmii_4; phy_sgmii_1c = &phy_sgmii_1c; phy_sgmii_1d = &phy_sgmii_1d; phy_sgmii_1e = &phy_sgmii_1e; phy_sgmii_1f = &phy_sgmii_1f; phy_xgmii_2 = &phy_xgmii_2; }; memory { device_type = "memory"; reg = <0x00000000 0x00000000 0x00000000 0x80000000>; }; dcsr: dcsr@f00000000 { ranges = <0x00000000 0xf 0x00000000 0x01008000>; }; bman-portals@ff4000000 { bman-portal@0 { cpu-handle = <&cpu0>; }; bman-portal@4000 { cpu-handle = <&cpu1>; }; bman-portal@8000 { cpu-handle = <&cpu2>; }; bman-portal@c000 { cpu-handle = <&cpu3>; }; bman-portal@10000 { }; bman-portal@14000 { }; bman-portal@18000 { }; bman-portal@1c000 { }; bman-portal@20000 { }; bman-portal@24000 { }; buffer-pool@0 { compatible = "fsl,p2041-bpool", "fsl,bpool"; fsl,bpid = <0>; fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; }; }; qman-portals@ff4200000 { qportal0: qman-portal@0 { cpu-handle = <&cpu0>; fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal1: qman-portal@4000 { cpu-handle = <&cpu1>; fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal2: qman-portal@8000 { cpu-handle = <&cpu2>; fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal3: qman-portal@c000 { cpu-handle = <&cpu3>; fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal4: qman-portal@10000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal5: qman-portal@14000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal6: qman-portal@18000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal7: qman-portal@1c000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal8: qman-portal@20000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal9: qman-portal@24000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; }; soc: soc@ffe000000 { spi@110000 { flash@0 { #address-cells = <1>; #size-cells = <1>; compatible = "spansion,s25sl12801"; reg = <0>; spi-max-frequency = <40000000>; /* input clock */ partition@u-boot { label = "u-boot"; reg = <0x00000000 0x00100000>; read-only; }; partition@kernel { label = "kernel"; reg = <0x00100000 0x00500000>; read-only; }; partition@dtb { label = "dtb"; reg = <0x00600000 0x00100000>; read-only; }; partition@fs { label = "file system"; reg = <0x00700000 0x00900000>; }; }; }; i2c@118000 { lm75b@48 { compatible = "nxp,lm75a"; reg = <0x48>; }; eeprom@50 { compatible = "at24,24c256"; reg = <0x50>; }; rtc@68 { compatible = "pericom,pt7c4338"; reg = <0x68>; }; }; i2c@118100 { eeprom@50 { compatible = "at24,24c256"; reg = <0x50>; }; }; usb1: usb@211000 { dr_mode = "host"; }; pme: pme@316000 { /* Commented out, use default allocation */ /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ }; qman: qman@318000 { /* Commented out, use default allocation */ /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ }; bman: bman@31a000 { /* Same as fsl,qman-*, use default allocation */ /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ }; fman0: fman@400000 { enet0: ethernet@e0000 { tbi-handle = <&tbi0>; phy-handle = <&phy_sgmii_2>; phy-connection-type = "sgmii"; }; mdio0: mdio@e1120 { tbi0: tbi-phy@8 { reg = <0x8>; device_type = "tbi-phy"; }; phy_rgmii_0: ethernet-phy@0 { reg = <0x0>; }; phy_rgmii_1: ethernet-phy@1 { reg = <0x1>; }; phy_sgmii_2: ethernet-phy@2 { reg = <0x2>; }; phy_sgmii_3: ethernet-phy@3 { reg = <0x3>; }; phy_sgmii_4: ethernet-phy@4 { reg = <0x4>; }; phy_sgmii_1c: ethernet-phy@1c { reg = <0x1c>; }; phy_sgmii_1d: ethernet-phy@1d { reg = <0x1d>; }; phy_sgmii_1e: ethernet-phy@1e { reg = <0x1e>; }; phy_sgmii_1f: ethernet-phy@1f { reg = <0x1f>; }; }; enet1: ethernet@e2000 { tbi-handle = <&tbi1>; phy-handle = <&phy_sgmii_3>; phy-connection-type = "sgmii"; }; mdio@e3120 { tbi1: tbi-phy@8 { reg = <8>; device_type = "tbi-phy"; }; }; enet2: ethernet@e4000 { tbi-handle = <&tbi2>; phy-handle = <&phy_sgmii_4>; phy-connection-type = "sgmii"; }; mdio@e5120 { tbi2: tbi-phy@8 { reg = <8>; device_type = "tbi-phy"; }; }; enet3: ethernet@e6000 { tbi-handle = <&tbi3>; phy-handle = <&phy_rgmii_1>; phy-connection-type = "rgmii"; }; mdio@e7120 { tbi3: tbi-phy@8 { reg = <8>; device_type = "tbi-phy"; }; }; enet4: ethernet@e8000 { tbi-handle = <&tbi4>; phy-handle = <&phy_rgmii_0>; phy-connection-type = "rgmii"; }; mdio@e9120 { tbi4: tbi-phy@8 { reg = <8>; device_type = "tbi-phy"; }; }; enet5: ethernet@f0000 { /* * phy-handle will be updated by U-Boot to * reflect the actual slot the XAUI card is in. */ phy-handle = <&phy_xgmii_2>; phy-connection-type = "xgmii"; }; mdio@f1000 { /* XAUI card in slot 2 */ phy_xgmii_2: ethernet-phy@0 { reg = <0x0>; }; }; }; }; rapidio@ffe0c0000 { reg = <0xf 0xfe0c0000 0 0x11000>; port1 { ranges = <0 0 0xc 0x20000000 0 0x10000000>; }; port2 { ranges = <0 0 0xc 0x30000000 0 0x10000000>; }; }; localbus@ffe124000 { reg = <0xf 0xfe124000 0 0x1000>; ranges = <0 0 0xf 0xb8000000 0x04000000>; flash@0,0 { compatible = "cfi-flash"; /* * Map 64Mb of 128MB NOR flash memory. Since highest * line of address of NOR flash memory are set by * FPGA, memory are divided into two pages equal to * 64MB. One of the pages can be accessed at once. */ reg = <0 0 0x04000000>; bank-width = <2>; device-width = <2>; }; }; pci0: pcie@ffe200000 { reg = <0xf 0xfe200000 0 0x1000>; ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000 0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0x80000000 0x02000000 0 0x80000000 0 0x10000000 0x01000000 0 0x00000000 0x01000000 0 0xff000000 0 0x00010000>; }; }; pci1: pcie@ffe201000 { reg = <0xf 0xfe201000 0 0x1000>; ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000 0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0x90000000 0x02000000 0 0x90000000 0 0x10000000 0x01000000 0 0x00000000 0x01000000 0 0xff010000 0 0x00010000>; }; }; pci2: pcie@ffe202000 { reg = <0xf 0xfe202000 0 0x1000>; ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000 0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0xa0000000 0x02000000 0 0xa0000000 0 0x10000000 0x01000000 0 0x00000000 0x01000000 0 0xff020000 0 0x00010000>; }; }; - fsl,dpaa { - compatible = "fsl,p2041-dpaa", "fsl,dpaa"; - - ethernet@0 { - compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet0>; - status = "okay"; - }; - ethernet@1 { - compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet1>; - status = "okay"; - }; - ethernet@2 { - compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet2>; - status = "okay"; - }; - ethernet@3 { - compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet3>; - status = "okay"; - }; - ethernet@4 { - compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet4>; - status = "okay"; - }; - ethernet@5 { - compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet5>; - status = "okay"; - }; - }; - chosen { stdin = "serial0"; stdout = "serial0"; }; }; Index: head/sys/boot/fdt/dts/powerpc/p2041si.dtsi =================================================================== --- head/sys/boot/fdt/dts/powerpc/p2041si.dtsi (revision 308583) +++ head/sys/boot/fdt/dts/powerpc/p2041si.dtsi (revision 308584) @@ -1,1296 +1,1296 @@ /* * P2041 Silicon Device Tree Source * * Copyright 2011 Freescale Semiconductor Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of Freescale Semiconductor nor the * names of its contributors may be used to endorse or promote products * derived from this software without specific prior written permission. * * * ALTERNATIVELY, this software may be distributed under the terms of the * GNU General Public License ("GPL") as published by the Free Software * Foundation, either version 2 of that License or (at your option) any * later version. * * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* $FreeBSD$ */ /dts-v1/; / { compatible = "fsl,P2041"; #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&mpic>; aliases { ccsr = &soc; dcsr = &dcsr; ethernet0 = &enet0; ethernet1 = &enet1; ethernet2 = &enet2; ethernet3 = &enet3; ethernet4 = &enet4; ethernet5 = &enet5; serial0 = &serial0; serial1 = &serial1; serial2 = &serial2; serial3 = &serial3; pci0 = &pci0; pci1 = &pci1; pci2 = &pci2; usb0 = &usb0; usb1 = &usb1; dma0 = &dma0; dma1 = &dma1; bman = &bman; qman = &qman; pme = &pme; rman = &rman; sdhc = &sdhc; msi0 = &msi0; msi1 = &msi1; msi2 = &msi2; crypto = &crypto; sec_jr0 = &sec_jr0; sec_jr1 = &sec_jr1; sec_jr2 = &sec_jr2; sec_jr3 = &sec_jr3; rtic_a = &rtic_a; rtic_b = &rtic_b; rtic_c = &rtic_c; rtic_d = &rtic_d; sec_mon = &sec_mon; fman0 = &fman0; fman0_oh0 = &fman0_oh0; fman0_oh1 = &fman0_oh1; fman0_oh2 = &fman0_oh2; fman0_oh3 = &fman0_oh3; fman0_oh4 = &fman0_oh4; fman0_oh5 = &fman0_oh5; fman0_oh6 = &fman0_oh6; fman0_rx0 = &fman0_rx0; fman0_rx1 = &fman0_rx1; fman0_rx2 = &fman0_rx2; fman0_rx3 = &fman0_rx3; fman0_rx4 = &fman0_rx4; fman0_rx5 = &fman0_rx5; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu0: PowerPC,e500mc@0 { device_type = "cpu"; reg = <0>; bus-frequency = <749999996>; next-level-cache = <&L2_0>; L2_0: l2-cache { next-level-cache = <&cpc>; }; }; cpu1: PowerPC,e500mc@1 { device_type = "cpu"; reg = <1>; next-level-cache = <&L2_1>; L2_1: l2-cache { next-level-cache = <&cpc>; }; }; cpu2: PowerPC,e500mc@2 { device_type = "cpu"; reg = <2>; next-level-cache = <&L2_2>; L2_2: l2-cache { next-level-cache = <&cpc>; }; }; cpu3: PowerPC,e500mc@3 { device_type = "cpu"; reg = <3>; next-level-cache = <&L2_3>; L2_3: l2-cache { next-level-cache = <&cpc>; }; }; }; dcsr: dcsr@f00000000 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,dcsr", "simple-bus"; dcsr-epu@0 { compatible = "fsl,dcsr-epu"; interrupts = <52 2 0 0 84 2 0 0 85 2 0 0>; interrupt-parent = <&mpic>; reg = <0x0 0x1000>; }; dcsr-npc { compatible = "fsl,dcsr-npc"; reg = <0x1000 0x1000 0x1000000 0x8000>; }; dcsr-nxc@2000 { compatible = "fsl,dcsr-nxc"; reg = <0x2000 0x1000>; }; dcsr-corenet { compatible = "fsl,dcsr-corenet"; reg = <0x8000 0x1000 0xB0000 0x1000>; }; dcsr-dpaa@9000 { compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa"; reg = <0x9000 0x1000>; }; dcsr-ocn@11000 { compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn"; reg = <0x11000 0x1000>; }; dcsr-ddr@12000 { compatible = "fsl,dcsr-ddr"; dev-handle = <&ddr>; reg = <0x12000 0x1000>; }; dcsr-nal@18000 { compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal"; reg = <0x18000 0x1000>; }; dcsr-rcpm@22000 { compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm"; reg = <0x22000 0x1000>; }; dcsr-cpu-sb-proxy@40000 { compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; cpu-handle = <&cpu0>; reg = <0x40000 0x1000>; }; dcsr-cpu-sb-proxy@41000 { compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; cpu-handle = <&cpu1>; reg = <0x41000 0x1000>; }; dcsr-cpu-sb-proxy@42000 { compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; cpu-handle = <&cpu2>; reg = <0x42000 0x1000>; }; dcsr-cpu-sb-proxy@43000 { compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; cpu-handle = <&cpu3>; reg = <0x43000 0x1000>; }; }; bman-portals@ff4000000 { #address-cells = <0x1>; #size-cells = <0x1>; - compatible = "bman-portals"; + compatible = "fsl,bman-portals"; ranges = <0x0 0xf 0xfde00000 0x200000>; bman-portal@0 { cell-index = <0x0>; compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; reg = <0x0 0x4000 0x100000 0x1000>; interrupts = <105 2 0 0>; }; bman-portal@4000 { cell-index = <0x1>; compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; reg = <0x4000 0x4000 0x101000 0x1000>; interrupts = <107 2 0 0>; }; bman-portal@8000 { cell-index = <2>; compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; reg = <0x8000 0x4000 0x102000 0x1000>; interrupts = <109 2 0 0>; }; bman-portal@c000 { cell-index = <0x3>; compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; reg = <0xc000 0x4000 0x103000 0x1000>; interrupts = <111 2 0 0>; }; bman-portal@10000 { cell-index = <0x4>; compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; reg = <0x10000 0x4000 0x104000 0x1000>; interrupts = <113 2 0 0>; }; bman-portal@14000 { cell-index = <0x5>; compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; reg = <0x14000 0x4000 0x105000 0x1000>; interrupts = <115 2 0 0>; }; bman-portal@18000 { cell-index = <0x6>; compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; reg = <0x18000 0x4000 0x106000 0x1000>; interrupts = <117 2 0 0>; }; bman-portal@1c000 { cell-index = <0x7>; compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; reg = <0x1c000 0x4000 0x107000 0x1000>; interrupts = <119 2 0 0>; }; bman-portal@20000 { cell-index = <0x8>; compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; reg = <0x20000 0x4000 0x108000 0x1000>; interrupts = <121 2 0 0>; }; bman-portal@24000 { cell-index = <0x9>; compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; reg = <0x24000 0x4000 0x109000 0x1000>; interrupts = <123 2 0 0>; }; buffer-pool@0 { compatible = "fsl,p2041-bpool", "fsl,bpool"; fsl,bpid = <0>; fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; }; }; qman-portals@ff4200000 { #address-cells = <0x1>; #size-cells = <0x1>; - compatible = "qman-portals"; + compatible = "fsl,qman-portals"; ranges = <0x0 0xf 0xfdc00000 0x200000>; qportal0: qman-portal@0 { cell-index = <0x0>; compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; reg = <0x0 0x4000 0x100000 0x1000>; interrupts = <104 0x2 0 0>; fsl,qman-channel-id = <0x0>; }; qportal1: qman-portal@4000 { cell-index = <0x1>; compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; reg = <0x4000 0x4000 0x101000 0x1000>; interrupts = <106 0x2 0 0>; fsl,qman-channel-id = <0x1>; }; qportal2: qman-portal@8000 { cell-index = <0x2>; compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; reg = <0x8000 0x4000 0x102000 0x1000>; interrupts = <108 0x2 0 0>; fsl,qman-channel-id = <0x2>; }; qportal3: qman-portal@c000 { cell-index = <0x3>; compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; reg = <0xc000 0x4000 0x103000 0x1000>; interrupts = <110 0x2 0 0>; fsl,qman-channel-id = <0x3>; }; qportal4: qman-portal@10000 { cell-index = <0x4>; compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; reg = <0x10000 0x4000 0x104000 0x1000>; interrupts = <112 0x2 0 0>; fsl,qman-channel-id = <0x4>; }; qportal5: qman-portal@14000 { cell-index = <0x5>; compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; reg = <0x14000 0x4000 0x105000 0x1000>; interrupts = <114 0x2 0 0>; fsl,qman-channel-id = <0x5>; }; qportal6: qman-portal@18000 { cell-index = <0x6>; compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; reg = <0x18000 0x4000 0x106000 0x1000>; interrupts = <116 0x2 0 0>; fsl,qman-channel-id = <0x6>; }; qportal7: qman-portal@1c000 { cell-index = <0x7>; compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; reg = <0x1c000 0x4000 0x107000 0x1000>; interrupts = <118 0x2 0 0>; fsl,qman-channel-id = <0x7>; }; qportal8: qman-portal@20000 { cell-index = <0x8>; compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; reg = <0x20000 0x4000 0x108000 0x1000>; interrupts = <120 0x2 0 0>; fsl,qman-channel-id = <0x8>; }; qportal9: qman-portal@24000 { cell-index = <0x9>; compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; reg = <0x24000 0x4000 0x109000 0x1000>; interrupts = <122 0x2 0 0>; fsl,qman-channel-id = <0x9>; }; qpool1: qman-pool@1 { cell-index = <1>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x21>; }; qpool2: qman-pool@2 { cell-index = <2>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x22>; }; qpool3: qman-pool@3 { cell-index = <3>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x23>; }; qpool4: qman-pool@4 { cell-index = <4>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x24>; }; qpool5: qman-pool@5 { cell-index = <5>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x25>; }; qpool6: qman-pool@6 { cell-index = <6>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x26>; }; qpool7: qman-pool@7 { cell-index = <7>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x27>; }; qpool8: qman-pool@8 { cell-index = <8>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x28>; }; qpool9: qman-pool@9 { cell-index = <9>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x29>; }; qpool10: qman-pool@10 { cell-index = <10>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2a>; }; qpool11: qman-pool@11 { cell-index = <11>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2b>; }; qpool12: qman-pool@12 { cell-index = <12>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2c>; }; qpool13: qman-pool@13 { cell-index = <13>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2d>; }; qpool14: qman-pool@14 { cell-index = <14>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2e>; }; qpool15: qman-pool@15 { cell-index = <15>; compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2f>; }; }; soc: soc@ffe000000 { #address-cells = <1>; #size-cells = <1>; device_type = "soc"; compatible = "simple-bus"; bus-frequency = <0>; // Filled out by kernel. ranges = <0x00000000 0xf 0xfe000000 0x1000000>; reg = <0xf 0xfe000000 0 0x00001000>; soc-sram-error { compatible = "fsl,soc-sram-error"; interrupts = <16 2 1 29>; }; corenet-law@0 { compatible = "fsl,corenet-law"; reg = <0x0 0x1000>; fsl,num-laws = <32>; }; ddr: memory-controller@8000 { compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; reg = <0x8000 0x1000>; interrupts = <16 2 1 23>; }; cpc: l3-cache-controller@10000 { compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; reg = <0x10000 0x1000>; interrupts = <16 2 1 27>; }; corenet-cf@18000 { compatible = "fsl,corenet-cf"; reg = <0x18000 0x1000>; interrupts = <16 2 1 31>; fsl,ccf-num-csdids = <32>; fsl,ccf-num-snoopids = <32>; }; iommu@20000 { compatible = "fsl,pamu-v1.0", "fsl,pamu"; reg = <0x20000 0x4000>; interrupts = < 24 2 0 0 16 2 1 30>; }; mpic: pic@40000 { clock-frequency = <0>; interrupt-controller; #address-cells = <0>; #interrupt-cells = <4>; reg = <0x40000 0x40000>; compatible = "fsl,mpic", "chrp,open-pic"; device_type = "open-pic"; }; msi0: msi@41600 { compatible = "fsl,mpic-msi"; reg = <0x41600 0x200>; msi-available-ranges = <0 0x100>; interrupts = < 0xe0 0 0 0 0xe1 0 0 0 0xe2 0 0 0 0xe3 0 0 0 0xe4 0 0 0 0xe5 0 0 0 0xe6 0 0 0 0xe7 0 0 0>; }; msi1: msi@41800 { compatible = "fsl,mpic-msi"; reg = <0x41800 0x200>; msi-available-ranges = <0 0x100>; interrupts = < 0xe8 0 0 0 0xe9 0 0 0 0xea 0 0 0 0xeb 0 0 0 0xec 0 0 0 0xed 0 0 0 0xee 0 0 0 0xef 0 0 0>; }; msi2: msi@41a00 { compatible = "fsl,mpic-msi"; reg = <0x41a00 0x200>; msi-available-ranges = <0 0x100>; interrupts = < 0xf0 0 0 0 0xf1 0 0 0 0xf2 0 0 0 0xf3 0 0 0 0xf4 0 0 0 0xf5 0 0 0 0xf6 0 0 0 0xf7 0 0 0>; }; guts: global-utilities@e0000 { compatible = "fsl,qoriq-device-config-1.0"; reg = <0xe0000 0xe00>; fsl,has-rstcr; #sleep-cells = <1>; fsl,liodn-bits = <12>; }; pins: global-utilities@e0e00 { compatible = "fsl,qoriq-pin-control-1.0"; reg = <0xe0e00 0x200>; #sleep-cells = <2>; }; clockgen: global-utilities@e1000 { compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0"; reg = <0xe1000 0x1000>; clock-frequency = <0>; }; rcpm: global-utilities@e2000 { compatible = "fsl,qoriq-rcpm-1.0"; reg = <0xe2000 0x1000>; #sleep-cells = <1>; }; sfp: sfp@e8000 { compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0"; reg = <0xe8000 0x1000>; }; serdes: serdes@ea000 { compatible = "fsl,p2041-serdes"; reg = <0xea000 0x1000>; }; dma0: dma@100300 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,p2041-dma", "fsl,eloplus-dma"; reg = <0x100300 0x4>; ranges = <0x0 0x100100 0x200>; cell-index = <0>; dma-channel@0 { compatible = "fsl,p2041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x0 0x80>; cell-index = <0>; interrupts = <28 2 0 0>; }; dma-channel@80 { compatible = "fsl,p2041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x80 0x80>; cell-index = <1>; interrupts = <29 2 0 0>; }; dma-channel@100 { compatible = "fsl,p2041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x100 0x80>; cell-index = <2>; interrupts = <30 2 0 0>; }; dma-channel@180 { compatible = "fsl,p2041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x180 0x80>; cell-index = <3>; interrupts = <31 2 0 0>; }; }; dma1: dma@101300 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,p2041-dma", "fsl,eloplus-dma"; reg = <0x101300 0x4>; ranges = <0x0 0x101100 0x200>; cell-index = <1>; dma-channel@0 { compatible = "fsl,p2041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x0 0x80>; cell-index = <0>; interrupts = <32 2 0 0>; }; dma-channel@80 { compatible = "fsl,p2041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x80 0x80>; cell-index = <1>; interrupts = <33 2 0 0>; }; dma-channel@100 { compatible = "fsl,p2041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x100 0x80>; cell-index = <2>; interrupts = <34 2 0 0>; }; dma-channel@180 { compatible = "fsl,p2041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x180 0x80>; cell-index = <3>; interrupts = <35 2 0 0>; }; }; spi@110000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,p2041-espi", "fsl,mpc8536-espi"; reg = <0x110000 0x1000>; interrupts = <53 0x2 0 0>; fsl,espi-num-chipselects = <4>; }; sdhc: sdhc@114000 { compatible = "fsl,p2041-esdhc", "fsl,esdhc"; reg = <0x114000 0x1000>; interrupts = <48 2 0 0>; sdhci,auto-cmd12; clock-frequency = <0>; }; i2c@118000 { #address-cells = <1>; #size-cells = <0>; cell-index = <0>; compatible = "fsl-i2c"; reg = <0x118000 0x100>; interrupts = <38 2 0 0>; dfsrr; }; i2c@118100 { #address-cells = <1>; #size-cells = <0>; cell-index = <1>; compatible = "fsl-i2c"; reg = <0x118100 0x100>; interrupts = <38 2 0 0>; dfsrr; }; i2c@119000 { #address-cells = <1>; #size-cells = <0>; cell-index = <2>; compatible = "fsl-i2c"; reg = <0x119000 0x100>; interrupts = <39 2 0 0>; dfsrr; }; i2c@119100 { #address-cells = <1>; #size-cells = <0>; cell-index = <3>; compatible = "fsl-i2c"; reg = <0x119100 0x100>; interrupts = <39 2 0 0>; dfsrr; }; serial0: serial@11c500 { cell-index = <0>; device_type = "serial"; compatible = "ns16550"; reg = <0x11c500 0x100>; clock-frequency = <0>; interrupts = <36 2 0 0>; }; serial1: serial@11c600 { cell-index = <1>; device_type = "serial"; compatible = "ns16550"; reg = <0x11c600 0x100>; clock-frequency = <0>; interrupts = <36 2 0 0>; }; serial2: serial@11d500 { cell-index = <2>; device_type = "serial"; compatible = "ns16550"; reg = <0x11d500 0x100>; clock-frequency = <0>; interrupts = <37 2 0 0>; }; serial3: serial@11d600 { cell-index = <3>; device_type = "serial"; compatible = "ns16550"; reg = <0x11d600 0x100>; clock-frequency = <0>; interrupts = <37 2 0 0>; }; gpio0: gpio@130000 { compatible = "fsl,p2041-gpio", "fsl,qoriq-gpio"; reg = <0x130000 0x1000>; interrupts = <55 2 0 0>; #gpio-cells = <2>; gpio-controller; }; rman: rman@1e0000 { compatible = "fsl,rman"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x1e0000 0x20000>; reg = <0x1e0000 0x20000>; interrupts = <16 2 1 11>; /* err_irq */ fsl,qman-channels-id = <0x62 0x63>; inbound-block@0 { compatible = "fsl,rman-inbound-block"; reg = <0x0 0x800>; }; global-cfg@b00 { compatible = "fsl,rman-global-cfg"; reg = <0xb00 0x500>; }; inbound-block@1000 { compatible = "fsl,rman-inbound-block"; reg = <0x1000 0x800>; }; inbound-block@2000 { compatible = "fsl,rman-inbound-block"; reg = <0x2000 0x800>; }; inbound-block@3000 { compatible = "fsl,rman-inbound-block"; reg = <0x3000 0x800>; }; }; usb0: usb@210000 { compatible = "fsl,p2041-usb2-mph", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; reg = <0x210000 0x1000>; #address-cells = <1>; #size-cells = <0>; interrupts = <44 0x2 0 0>; phy_type = "utmi"; port0; }; usb1: usb@211000 { compatible = "fsl,p2041-usb2-dr", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; reg = <0x211000 0x1000>; #address-cells = <1>; #size-cells = <0>; interrupts = <45 0x2 0 0>; phy_type = "utmi"; }; sata@220000 { compatible = "fsl,p2041-sata", "fsl,pq-sata-v2"; reg = <0x220000 0x1000>; interrupts = <68 0x2 0 0>; }; sata@221000 { compatible = "fsl,p2041-sata", "fsl,pq-sata-v2"; reg = <0x221000 0x1000>; interrupts = <69 0x2 0 0>; }; crypto: crypto@300000 { compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; #address-cells = <1>; #size-cells = <1>; reg = <0x300000 0x10000>; ranges = <0 0x300000 0x10000>; interrupts = <92 2 0 0>; sec_jr0: jr@1000 { compatible = "fsl,sec-v4.2-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x1000 0x1000>; interrupts = <88 2 0 0>; }; sec_jr1: jr@2000 { compatible = "fsl,sec-v4.2-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x2000 0x1000>; interrupts = <89 2 0 0>; }; sec_jr2: jr@3000 { compatible = "fsl,sec-v4.2-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x3000 0x1000>; interrupts = <90 2 0 0>; }; sec_jr3: jr@4000 { compatible = "fsl,sec-v4.2-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x4000 0x1000>; interrupts = <91 2 0 0>; }; rtic@6000 { compatible = "fsl,sec-v4.2-rtic", "fsl,sec-v4.0-rtic"; #address-cells = <1>; #size-cells = <1>; reg = <0x6000 0x100>; ranges = <0x0 0x6100 0xe00>; rtic_a: rtic-a@0 { compatible = "fsl,sec-v4.2-rtic-memory", "fsl,sec-v4.0-rtic-memory"; reg = <0x00 0x20 0x100 0x80>; }; rtic_b: rtic-b@20 { compatible = "fsl,sec-v4.2-rtic-memory", "fsl,sec-v4.0-rtic-memory"; reg = <0x20 0x20 0x200 0x80>; }; rtic_c: rtic-c@40 { compatible = "fsl,sec-v4.2-rtic-memory", "fsl,sec-v4.0-rtic-memory"; reg = <0x40 0x20 0x300 0x80>; }; rtic_d: rtic-d@60 { compatible = "fsl,sec-v4.2-rtic-memory", "fsl,sec-v4.0-rtic-memory"; reg = <0x60 0x20 0x500 0x80>; }; }; }; sec_mon: sec_mon@314000 { compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; reg = <0x314000 0x1000>; interrupts = <93 2 0 0>; }; pme: pme@316000 { compatible = "fsl,pme"; reg = <0x316000 0x10000>; - /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ + /* "fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ + /* "fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ interrupts = <16 2 1 5>; }; qman: qman@318000 { compatible = "fsl,p2041-qman", "fsl,qman"; reg = <0x318000 0x1000>; interrupts = <16 2 1 3>; /* Commented out, use default allocation */ - /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ + /* "fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ + /* "fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ }; bman: bman@31a000 { compatible = "fsl,p2041-bman", "fsl,bman"; reg = <0x31a000 0x1000>; interrupts = <16 2 1 2>; - /* Same as fsl,qman-*, use default allocation */ - /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ + /* Same as "fsl,qman-*, use default allocation */ + /* "fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ }; fman0: fman@400000 { #address-cells = <1>; #size-cells = <1>; cell-index = <0>; compatible = "fsl,p2041-fman", "fsl,fman", "simple-bus"; ranges = <0 0x400000 0x100000>; reg = <0x400000 0x100000>; clock-frequency = <0>; interrupts = < 96 2 0 0 16 2 1 1>; cc@0 { compatible = "fsl,p2041-fman-cc", "fsl,fman-cc"; }; parser@c7000 { compatible = "fsl,p2041-fman-parser", "fsl,fman-parser"; reg = <0xc7000 0x1000>; }; keygen@c1000 { compatible = "fsl,p2041-fman-keygen", "fsl,fman-keygen"; reg = <0xc1000 0x1000>; }; policer@c0000 { compatible = "fsl,p2041-fman-policer", "fsl,fman-policer"; reg = <0xc0000 0x1000>; }; muram@0 { compatible = "fsl,p2041-fman-muram", "fsl,fman-muram"; reg = <0x0 0x28000>; }; bmi@80000 { compatible = "fsl,p2041-fman-bmi", "fsl,fman-bmi"; reg = <0x80000 0x400>; }; qmi@80400 { compatible = "fsl,p2041-fman-qmi", "fsl,fman-qmi"; reg = <0x80400 0x400>; }; fman0_rx0: port@88000 { cell-index = <0>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x88000 0x1000>; }; fman0_rx1: port@89000 { cell-index = <1>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x89000 0x1000>; }; fman0_rx2: port@8a000 { cell-index = <2>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x8a000 0x1000>; }; fman0_rx3: port@8b000 { cell-index = <3>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x8b000 0x1000>; }; fman0_rx4: port@8c000 { cell-index = <4>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x8c000 0x1000>; }; fman0_rx5: port@90000 { cell-index = <0>; compatible = "fsl,p2041-fman-port-10g-rx", "fsl,fman-port-10g-rx"; reg = <0x90000 0x1000>; }; fman0_tx5: port@b0000 { cell-index = <0>; compatible = "fsl,p2041-fman-port-10g-tx", "fsl,fman-port-10g-tx"; reg = <0xb0000 0x1000>; fsl,qman-channel-id = <0x40>; }; fman0_tx0: port@a8000 { cell-index = <0>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xa8000 0x1000>; fsl,qman-channel-id = <0x41>; }; fman0_tx1: port@a9000 { cell-index = <1>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xa9000 0x1000>; fsl,qman-channel-id = <0x42>; }; fman0_tx2: port@aa000 { cell-index = <2>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xaa000 0x1000>; fsl,qman-channel-id = <0x43>; }; fman0_tx3: port@ab000 { cell-index = <3>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xab000 0x1000>; fsl,qman-channel-id = <0x44>; }; fman0_tx4: port@ac000 { cell-index = <4>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xac000 0x1000>; fsl,qman-channel-id = <0x45>; }; fman0_oh0: port@81000 { cell-index = <0>; compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; reg = <0x81000 0x1000>; fsl,qman-channel-id = <0x46>; }; fman0_oh1: port@82000 { cell-index = <1>; compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; reg = <0x82000 0x1000>; fsl,qman-channel-id = <0x47>; }; fman0_oh2: port@83000 { cell-index = <2>; compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; reg = <0x83000 0x1000>; fsl,qman-channel-id = <0x48>; }; fman0_oh3: port@84000 { cell-index = <3>; compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; reg = <0x84000 0x1000>; fsl,qman-channel-id = <0x49>; }; fman0_oh4: port@85000 { cell-index = <4>; compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; reg = <0x85000 0x1000>; fsl,qman-channel-id = <0x4a>; }; fman0_oh5: port@86000 { cell-index = <5>; compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; reg = <0x86000 0x1000>; fsl,qman-channel-id = <0x4b>; }; fman0_oh6: port@87000 { cell-index = <6>; compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; reg = <0x87000 0x1000>; }; enet0: ethernet@e0000 { cell-index = <0>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe0000 0x1000>; fsl,port-handles = <&fman0_rx0 &fman0_tx0>; }; mdio0: mdio@e1120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-mdio"; reg = <0xe1120 0xee0>; interrupts = <100 1 0 0>; }; enet1: ethernet@e2000 { cell-index = <1>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe2000 0x1000>; fsl,port-handles = <&fman0_rx1 &fman0_tx1>; }; mdio@e3120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-tbi"; reg = <0xe3120 0xee0>; interrupts = <100 1 0 0>; }; enet2: ethernet@e4000 { cell-index = <2>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe4000 0x1000>; fsl,port-handles = <&fman0_rx2 &fman0_tx2>; }; mdio@e5120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-tbi"; reg = <0xe5120 0xee0>; interrupts = <100 1 0 0>; }; enet3: ethernet@e6000 { cell-index = <3>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe6000 0x1000>; fsl,port-handles = <&fman0_rx3 &fman0_tx3>; }; mdio@e7120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-tbi"; reg = <0xe7120 0xee0>; interrupts = <100 1 0 0>; }; enet4: ethernet@e8000 { cell-index = <4>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe8000 0x1000>; fsl,port-handles = <&fman0_rx4 &fman0_tx4>; }; mdio@e9120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-tbi"; reg = <0xe9120 0xee0>; interrupts = <100 1 0 0>; }; enet5: ethernet@f0000 { cell-index = <0>; - compatible = "fsl,p2041-fman-10g-mac", "fsl,fman-10g-mac"; + compatible = "fsl,p2041-fman-10g-mac", "fsl,fman-10g-mac", "fsl,fman-xgec"; reg = <0xf0000 0x1000>; fsl,port-handles = <&fman0_rx5 &fman0_tx5>; }; mdio@f1000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-xmdio"; reg = <0xf1000 0x1000>; interrupts = <100 1 0 0>; }; }; }; rapidio@ffe0c0000 { compatible = "fsl,srio"; interrupts = <16 2 1 11>; #address-cells = <2>; #size-cells = <2>; ranges; port1 { #address-cells = <2>; #size-cells = <2>; cell-index = <1>; }; port2 { #address-cells = <2>; #size-cells = <2>; cell-index = <2>; }; }; localbus@ffe124000 { compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus"; interrupts = <25 2 0 0>; #address-cells = <2>; #size-cells = <1>; }; pci0: pcie@ffe200000 { compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; device_type = "pci"; status = "disabled"; #size-cells = <2>; #address-cells = <3>; bus-range = <0x0 0xff>; clock-frequency = <33333333>; fsl,msi = <&msi0>; interrupts = <16 2 1 15>; pcie@0 { reg = <0 0 0 0 0>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; device_type = "pci"; interrupts = <16 2 1 15>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = < /* IDSEL 0x0 */ 0000 0 0 1 &mpic 40 1 0 0 0000 0 0 2 &mpic 1 1 0 0 0000 0 0 3 &mpic 2 1 0 0 0000 0 0 4 &mpic 3 1 0 0 >; }; }; pci1: pcie@ffe201000 { compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; device_type = "pci"; status = "okay"; #size-cells = <2>; #address-cells = <3>; bus-range = <0 0xff>; clock-frequency = <33333333>; fsl,msi = <&msi1>; interrupts = <16 2 1 14>; pcie@0 { reg = <0 0 0 0 0>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; device_type = "pci"; interrupts = <16 2 1 14>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = < /* IDSEL 0x0 */ 0000 0 0 1 &mpic 41 1 0 0 0000 0 0 2 &mpic 5 1 0 0 0000 0 0 3 &mpic 6 1 0 0 0000 0 0 4 &mpic 7 1 0 0 >; }; }; pci2: pcie@ffe202000 { compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; device_type = "pci"; status = "disabled"; #size-cells = <2>; #address-cells = <3>; bus-range = <0x0 0xff>; clock-frequency = <33333333>; fsl,msi = <&msi2>; interrupts = <16 2 1 13>; pcie@0 { reg = <0 0 0 0 0>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; device_type = "pci"; interrupts = <16 2 1 13>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = < /* IDSEL 0x0 */ 0000 0 0 1 &mpic 42 1 0 0 0000 0 0 2 &mpic 9 1 0 0 0000 0 0 3 &mpic 10 1 0 0 0000 0 0 4 &mpic 11 1 0 0 >; }; }; }; Index: head/sys/boot/fdt/dts/powerpc/p3041ds.dts =================================================================== --- head/sys/boot/fdt/dts/powerpc/p3041ds.dts (revision 308583) +++ head/sys/boot/fdt/dts/powerpc/p3041ds.dts (revision 308584) @@ -1,587 +1,546 @@ /* * P3041DS Device Tree Source * * Copyright 2010-2011 Freescale Semiconductor Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of Freescale Semiconductor nor the * names of its contributors may be used to endorse or promote products * derived from this software without specific prior written permission. * * * ALTERNATIVELY, this software may be distributed under the terms of the * GNU General Public License ("GPL") as published by the Free Software * Foundation, either version 2 of that License or (at your option) any * later version. * * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* $FreeBSD$ */ /include/ "p3041si.dtsi" / { model = "fsl,P3041DS"; compatible = "fsl,P3041DS"; #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&mpic>; aliases { phy_rgmii_0 = &phy_rgmii_0; phy_rgmii_1 = &phy_rgmii_1; phy_sgmii_1c = &phy_sgmii_1c; phy_sgmii_1d = &phy_sgmii_1d; phy_sgmii_1e = &phy_sgmii_1e; phy_sgmii_1f = &phy_sgmii_1f; phy_xgmii_1 = &phy_xgmii_1; phy_xgmii_2 = &phy_xgmii_2; emi1_rgmii = &hydra_mdio_rgmii; emi1_sgmii = &hydra_mdio_sgmii; emi2_xgmii = &hydra_mdio_xgmii; }; memory { device_type = "memory"; reg = <0x00000000 0x00000000 0x00000000 0x80000000>; }; dcsr: dcsr@f00000000 { ranges = <0x00000000 0xf 0x00000000 0x01008000>; }; bman-portals@ff4000000 { bman-portal@0 { cpu-handle = <&cpu0>; }; bman-portal@4000 { cpu-handle = <&cpu1>; }; bman-portal@8000 { cpu-handle = <&cpu2>; }; bman-portal@c000 { cpu-handle = <&cpu3>; }; bman-portal@10000 { }; bman-portal@14000 { }; bman-portal@18000 { }; bman-portal@1c000 { }; bman-portal@20000 { }; bman-portal@24000 { }; buffer-pool@0 { compatible = "fsl,p3041-bpool", "fsl,bpool"; fsl,bpid = <0>; fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; }; }; qman-portals@ff4200000 { qportal0: qman-portal@0 { cpu-handle = <&cpu0>; fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal1: qman-portal@4000 { cpu-handle = <&cpu1>; fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal2: qman-portal@8000 { cpu-handle = <&cpu2>; fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal3: qman-portal@c000 { cpu-handle = <&cpu3>; fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal4: qman-portal@10000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal5: qman-portal@14000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal6: qman-portal@18000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal7: qman-portal@1c000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal8: qman-portal@20000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal9: qman-portal@24000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; }; soc: soc@ffe000000 { spi@110000 { flash@0 { #address-cells = <1>; #size-cells = <1>; compatible = "spansion,s25sl12801"; reg = <0>; spi-max-frequency = <35000000>; /* input clock */ partition@u-boot { label = "u-boot"; reg = <0x00000000 0x00100000>; read-only; }; partition@kernel { label = "kernel"; reg = <0x00100000 0x00500000>; read-only; }; partition@dtb { label = "dtb"; reg = <0x00600000 0x00100000>; read-only; }; partition@fs { label = "file system"; reg = <0x00700000 0x00900000>; }; }; }; i2c@118100 { eeprom@51 { compatible = "at24,24c256"; reg = <0x51>; }; eeprom@52 { compatible = "at24,24c256"; reg = <0x52>; }; }; i2c@119100 { rtc@68 { compatible = "dallas,ds3232"; reg = <0x68>; interrupts = <0x1 0x1 0 0>; }; }; pme: pme@316000 { /* Commented out, use default allocation */ /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ }; qman: qman@318000 { /* Commented out, use default allocation */ /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ }; bman: bman@31a000 { /* Same as fsl,qman-*, use default allocation */ /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ }; fman0: fman@400000 { enet0: ethernet@e0000 { tbi-handle = <&tbi0>; phy-handle = <&phy_rgmii_0>; phy-connection-type = "rgmii"; }; mdio0: mdio@e1120 { tbi0: tbi-phy@8 { reg = <0x8>; device_type = "tbi-phy"; }; /* * Virtual MDIO for the two on-board RGMII * ports. The fsl,hydra-mdio-muxval property * is already correct. */ hydra_mdio_rgmii: hydra-mdio-rgmii { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,hydra-mdio"; fsl,mdio-handle = <&mdio0>; fsl,hydra-mdio-muxval = <0x00>; status = "disabled"; phy_rgmii_0: ethernet-phy@0 { reg = <0x0>; }; phy_rgmii_1: ethernet-phy@1 { reg = <0x1>; }; }; /* * Virtual MDIO for the four-port SGMII card. * The fsl,hydra-mdio-muxval property will be * fixed-up by U-Boot based on the slot that * the SGMII card is in. * * Note: we do not support DTSEC5 connected to * SGMII, so this is the only SGMII node. */ hydra_mdio_sgmii: hydra-mdio-sgmii { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,hydra-mdio"; fsl,mdio-handle = <&mdio0>; fsl,hydra-mdio-muxval = <0x00>; status = "disabled"; phy_sgmii_1c: ethernet-phy@1c { reg = <0x1c>; }; phy_sgmii_1d: ethernet-phy@1d { reg = <0x1d>; }; phy_sgmii_1e: ethernet-phy@1e { reg = <0x1e>; }; phy_sgmii_1f: ethernet-phy@1f { reg = <0x1f>; }; }; }; enet1: ethernet@e2000 { tbi-handle = <&tbi1>; phy-handle = <&phy_sgmii_1d>; phy-connection-type = "sgmii"; }; mdio@e3120 { tbi1: tbi-phy@8 { reg = <8>; device_type = "tbi-phy"; }; }; enet2: ethernet@e4000 { tbi-handle = <&tbi2>; phy-handle = <&phy_sgmii_1e>; phy-connection-type = "sgmii"; }; mdio@e5120 { tbi2: tbi-phy@8 { reg = <8>; device_type = "tbi-phy"; }; }; enet3: ethernet@e6000 { tbi-handle = <&tbi3>; phy-handle = <&phy_sgmii_1f>; phy-connection-type = "sgmii"; }; mdio@e7120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-tbi"; reg = <0xe7120 0xee0>; interrupts = <100 1 0 0>; tbi3: tbi-phy@8 { reg = <8>; device_type = "tbi-phy"; }; }; enet4: ethernet@e8000 { tbi-handle = <&tbi4>; phy-handle = <&phy_rgmii_1>; phy-connection-type = "rgmii"; }; mdio@e9120 { tbi4: tbi-phy@8 { reg = <8>; device_type = "tbi-phy"; }; }; enet5: ethernet@f0000 { /* * phy-handle will be updated by U-Boot to * reflect the actual slot the XAUI card is in. */ phy-handle = <&phy_xgmii_1>; phy-connection-type = "xgmii"; }; /* * We only support one XAUI card, so the MDIO muxing * is set by U-Boot, and Linux never touches it. * Therefore, we don't need a virtual MDIO node. * However, the phy address depends on the slot, so * only one of the ethernet-phy nodes below will be * used. */ hydra_mdio_xgmii: mdio@f1000 { status = "disabled"; /* XAUI card in slot 1 */ phy_xgmii_1: ethernet-phy@4 { reg = <0x4>; }; /* XAUI card in slot 2 */ phy_xgmii_2: ethernet-phy@0 { reg = <0x0>; }; }; }; }; rapidio@ffe0c0000 { reg = <0xf 0xfe0c0000 0 0x11000>; port1 { ranges = <0 0 0xc 0x20000000 0 0x10000000>; }; port2 { ranges = <0 0 0xc 0x30000000 0 0x10000000>; }; }; localbus@ffe124000 { reg = <0xf 0xfe124000 0 0x1000>; ranges = <0 0 0xf 0xb8000000 0x04000000>; flash@0,0 { compatible = "cfi-flash"; /* * Map 64Mb of 128MB NOR flash memory. Since highest * line of address of NOR flash memory are set by * FPGA, memory are divided into two pages equal to * 64MB. One of the pages can be accessed at once. */ reg = <0 0 0x04000000>; bank-width = <2>; device-width = <2>; }; nand@2,0 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,elbc-fcm-nand"; reg = <0x2 0x0 0x40000>; partition@0 { label = "NAND U-Boot Image"; reg = <0x0 0x02000000>; read-only; }; partition@2000000 { label = "NAND Root File System"; reg = <0x02000000 0x10000000>; }; partition@12000000 { label = "NAND Compressed RFS Image"; reg = <0x12000000 0x08000000>; }; partition@1a000000 { label = "NAND Linux Kernel Image"; reg = <0x1a000000 0x04000000>; }; partition@1e000000 { label = "NAND DTB Image"; reg = <0x1e000000 0x01000000>; }; partition@1f000000 { label = "NAND Writable User area"; reg = <0x1f000000 0x21000000>; }; }; board-control@3,0 { compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis"; reg = <3 0 0x30>; }; }; pci0: pcie@ffe200000 { reg = <0xf 0xfe200000 0 0x1000>; ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000 0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0x80000000 0x02000000 0 0x80000000 0 0x10000000 0x01000000 0 0x00000000 0x01000000 0 0xff000000 0 0x00010000>; }; }; pci1: pcie@ffe201000 { reg = <0xf 0xfe201000 0 0x1000>; ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000 0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0x90000000 0x02000000 0 0x90000000 0 0x10000000 0x01000000 0 0x00000000 0x01000000 0 0xff010000 0 0x00010000>; }; }; pci2: pcie@ffe202000 { reg = <0xf 0xfe202000 0 0x1000>; ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000 0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0xa0000000 0x02000000 0 0xa0000000 0 0x10000000 0x01000000 0 0x00000000 0x01000000 0 0xff020000 0 0x00010000>; }; }; pci3: pcie@ffe203000 { reg = <0xf 0xfe203000 0 0x1000>; ranges = <0x02000000 0 0xb0000000 0x0 0xb0000000 0 0x08000000 0x01000000 0 0x00000000 0x0 0xff030000 0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0xb0000000 0x02000000 0 0xb0000000 0 0x08000000 0x01000000 0 0x00000000 0x01000000 0 0xff030000 0 0x00010000>; }; }; - fsl,dpaa { - compatible = "fsl,p3041-dpaa", "fsl,dpaa"; - - ethernet@0 { - compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet0>; - status="okay"; - }; - ethernet@1 { - compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet1>; - status = "disabled"; - }; - ethernet@2 { - compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet2>; - status = "disabled"; - }; - ethernet@3 { - compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet3>; - status = "disabled"; - }; - ethernet@4 { - compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet4>; - status = "okay"; - }; - ethernet@5 { - compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet5>; - status = "disabled"; - }; - }; - chosen { stdin = "serial0"; stdout = "serial0"; }; }; Index: head/sys/boot/fdt/dts/powerpc/p3041si.dtsi =================================================================== --- head/sys/boot/fdt/dts/powerpc/p3041si.dtsi (revision 308583) +++ head/sys/boot/fdt/dts/powerpc/p3041si.dtsi (revision 308584) @@ -1,1339 +1,1345 @@ /* * P3041 Silicon Device Tree Source * * Copyright 2010-2011 Freescale Semiconductor Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of Freescale Semiconductor nor the * names of its contributors may be used to endorse or promote products * derived from this software without specific prior written permission. * * * ALTERNATIVELY, this software may be distributed under the terms of the * GNU General Public License ("GPL") as published by the Free Software * Foundation, either version 2 of that License or (at your option) any * later version. * * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* $FreeBSD$ */ /dts-v1/; / { compatible = "fsl,P3041"; #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&mpic>; aliases { ccsr = &soc; dcsr = &dcsr; ethernet0 = &enet0; ethernet1 = &enet1; ethernet2 = &enet2; ethernet3 = &enet3; ethernet4 = &enet4; ethernet5 = &enet5; serial0 = &serial0; serial1 = &serial1; serial2 = &serial2; serial3 = &serial3; pci0 = &pci0; pci1 = &pci1; pci2 = &pci2; pci3 = &pci3; usb0 = &usb0; usb1 = &usb1; dma0 = &dma0; dma1 = &dma1; bman = &bman; qman = &qman; pme = &pme; rman = &rman; sdhc = &sdhc; msi0 = &msi0; msi1 = &msi1; msi2 = &msi2; crypto = &crypto; sec_jr0 = &sec_jr0; sec_jr1 = &sec_jr1; sec_jr2 = &sec_jr2; sec_jr3 = &sec_jr3; rtic_a = &rtic_a; rtic_b = &rtic_b; rtic_c = &rtic_c; rtic_d = &rtic_d; sec_mon = &sec_mon; fman0 = &fman0; fman0_oh0 = &fman0_oh0; fman0_oh1 = &fman0_oh1; fman0_oh2 = &fman0_oh2; fman0_oh3 = &fman0_oh3; fman0_oh4 = &fman0_oh4; fman0_oh5 = &fman0_oh5; fman0_oh6 = &fman0_oh6; fman0_rx0 = &fman0_rx0; fman0_rx1 = &fman0_rx1; fman0_rx2 = &fman0_rx2; fman0_rx3 = &fman0_rx3; fman0_rx4 = &fman0_rx4; fman0_rx5 = &fman0_rx5; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu0: PowerPC,e500mc@0 { device_type = "cpu"; reg = <0>; bus-frequency = <749999996>; next-level-cache = <&L2_0>; L2_0: l2-cache { next-level-cache = <&cpc>; }; }; cpu1: PowerPC,e500mc@1 { device_type = "cpu"; reg = <1>; next-level-cache = <&L2_1>; L2_1: l2-cache { next-level-cache = <&cpc>; }; }; cpu2: PowerPC,e500mc@2 { device_type = "cpu"; reg = <2>; next-level-cache = <&L2_2>; L2_2: l2-cache { next-level-cache = <&cpc>; }; }; cpu3: PowerPC,e500mc@3 { device_type = "cpu"; reg = <3>; next-level-cache = <&L2_3>; L2_3: l2-cache { next-level-cache = <&cpc>; }; }; }; dcsr: dcsr@f00000000 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,dcsr", "simple-bus"; dcsr-epu@0 { compatible = "fsl,dcsr-epu"; interrupts = <52 2 0 0 84 2 0 0 85 2 0 0>; interrupt-parent = <&mpic>; reg = <0x0 0x1000>; }; dcsr-npc { compatible = "fsl,dcsr-npc"; reg = <0x1000 0x1000 0x1000000 0x8000>; }; dcsr-nxc@2000 { compatible = "fsl,dcsr-nxc"; reg = <0x2000 0x1000>; }; dcsr-corenet { compatible = "fsl,dcsr-corenet"; reg = <0x8000 0x1000 0xB0000 0x1000>; }; dcsr-dpaa@9000 { compatible = "fsl,p43041-dcsr-dpaa", "fsl,dcsr-dpaa"; reg = <0x9000 0x1000>; }; dcsr-ocn@11000 { compatible = "fsl,p43041-dcsr-ocn", "fsl,dcsr-ocn"; reg = <0x11000 0x1000>; }; dcsr-ddr@12000 { compatible = "fsl,dcsr-ddr"; dev-handle = <&ddr>; reg = <0x12000 0x1000>; }; dcsr-nal@18000 { compatible = "fsl,p43041-dcsr-nal", "fsl,dcsr-nal"; reg = <0x18000 0x1000>; }; dcsr-rcpm@22000 { compatible = "fsl,p43041-dcsr-rcpm", "fsl,dcsr-rcpm"; reg = <0x22000 0x1000>; }; dcsr-cpu-sb-proxy@40000 { compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; cpu-handle = <&cpu0>; reg = <0x40000 0x1000>; }; dcsr-cpu-sb-proxy@41000 { compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; cpu-handle = <&cpu1>; reg = <0x41000 0x1000>; }; dcsr-cpu-sb-proxy@42000 { compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; cpu-handle = <&cpu2>; reg = <0x42000 0x1000>; }; dcsr-cpu-sb-proxy@43000 { compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; cpu-handle = <&cpu3>; reg = <0x43000 0x1000>; }; }; bman-portals@ff4000000 { #address-cells = <0x1>; #size-cells = <0x1>; - compatible = "bman-portals"; + compatible = "fsl,bman-portals"; ranges = <0x0 0xf 0xfde00000 0x200000>; bman-portal@0 { cell-index = <0x0>; compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; reg = <0x0 0x4000 0x100000 0x1000>; interrupts = <105 2 0 0>; }; bman-portal@4000 { cell-index = <0x1>; compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; reg = <0x4000 0x4000 0x101000 0x1000>; interrupts = <107 2 0 0>; }; bman-portal@8000 { cell-index = <2>; compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; reg = <0x8000 0x4000 0x102000 0x1000>; interrupts = <109 2 0 0>; }; bman-portal@c000 { cell-index = <0x3>; compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; reg = <0xc000 0x4000 0x103000 0x1000>; interrupts = <111 2 0 0>; }; bman-portal@10000 { cell-index = <0x4>; compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; reg = <0x10000 0x4000 0x104000 0x1000>; interrupts = <113 2 0 0>; }; bman-portal@14000 { cell-index = <0x5>; compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; reg = <0x14000 0x4000 0x105000 0x1000>; interrupts = <115 2 0 0>; }; bman-portal@18000 { cell-index = <0x6>; compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; reg = <0x18000 0x4000 0x106000 0x1000>; interrupts = <117 2 0 0>; }; bman-portal@1c000 { cell-index = <0x7>; compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; reg = <0x1c000 0x4000 0x107000 0x1000>; interrupts = <119 2 0 0>; }; bman-portal@20000 { cell-index = <0x8>; compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; reg = <0x20000 0x4000 0x108000 0x1000>; interrupts = <121 2 0 0>; }; bman-portal@24000 { cell-index = <0x9>; compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; reg = <0x24000 0x4000 0x109000 0x1000>; interrupts = <123 2 0 0>; }; buffer-pool@0 { compatible = "fsl,p3041-bpool", "fsl,bpool"; fsl,bpid = <0>; fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; }; }; qman-portals@ff4200000 { #address-cells = <0x1>; #size-cells = <0x1>; - compatible = "qman-portals"; + compatible = "fsl,qman-portals"; ranges = <0x0 0xf 0xfdc00000 0x200000>; qportal0: qman-portal@0 { cell-index = <0x0>; compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; reg = <0x0 0x4000 0x100000 0x1000>; interrupts = <104 0x2 0 0>; fsl,qman-channel-id = <0x0>; }; qportal1: qman-portal@4000 { cell-index = <0x1>; compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; reg = <0x4000 0x4000 0x101000 0x1000>; interrupts = <106 0x2 0 0>; fsl,qman-channel-id = <0x1>; }; qportal2: qman-portal@8000 { cell-index = <0x2>; compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; reg = <0x8000 0x4000 0x102000 0x1000>; interrupts = <108 0x2 0 0>; fsl,qman-channel-id = <0x2>; }; qportal3: qman-portal@c000 { cell-index = <0x3>; compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; reg = <0xc000 0x4000 0x103000 0x1000>; interrupts = <110 0x2 0 0>; fsl,qman-channel-id = <0x3>; }; qportal4: qman-portal@10000 { cell-index = <0x4>; compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; reg = <0x10000 0x4000 0x104000 0x1000>; interrupts = <112 0x2 0 0>; fsl,qman-channel-id = <0x4>; }; qportal5: qman-portal@14000 { cell-index = <0x5>; compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; reg = <0x14000 0x4000 0x105000 0x1000>; interrupts = <114 0x2 0 0>; fsl,qman-channel-id = <0x5>; }; qportal6: qman-portal@18000 { cell-index = <0x6>; compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; reg = <0x18000 0x4000 0x106000 0x1000>; interrupts = <116 0x2 0 0>; fsl,qman-channel-id = <0x6>; }; qportal7: qman-portal@1c000 { cell-index = <0x7>; compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; reg = <0x1c000 0x4000 0x107000 0x1000>; interrupts = <118 0x2 0 0>; fsl,qman-channel-id = <0x7>; }; qportal8: qman-portal@20000 { cell-index = <0x8>; compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; reg = <0x20000 0x4000 0x108000 0x1000>; interrupts = <120 0x2 0 0>; fsl,qman-channel-id = <0x8>; }; qportal9: qman-portal@24000 { cell-index = <0x9>; compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; reg = <0x24000 0x4000 0x109000 0x1000>; interrupts = <122 0x2 0 0>; fsl,qman-channel-id = <0x9>; }; qpool1: qman-pool@1 { cell-index = <1>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x21>; }; qpool2: qman-pool@2 { cell-index = <2>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x22>; }; qpool3: qman-pool@3 { cell-index = <3>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x23>; }; qpool4: qman-pool@4 { cell-index = <4>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x24>; }; qpool5: qman-pool@5 { cell-index = <5>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x25>; }; qpool6: qman-pool@6 { cell-index = <6>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x26>; }; qpool7: qman-pool@7 { cell-index = <7>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x27>; }; qpool8: qman-pool@8 { cell-index = <8>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x28>; }; qpool9: qman-pool@9 { cell-index = <9>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x29>; }; qpool10: qman-pool@10 { cell-index = <10>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2a>; }; qpool11: qman-pool@11 { cell-index = <11>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2b>; }; qpool12: qman-pool@12 { cell-index = <12>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2c>; }; qpool13: qman-pool@13 { cell-index = <13>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2d>; }; qpool14: qman-pool@14 { cell-index = <14>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2e>; }; qpool15: qman-pool@15 { cell-index = <15>; compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2f>; }; }; soc: soc@ffe000000 { #address-cells = <1>; #size-cells = <1>; device_type = "soc"; compatible = "simple-bus"; bus-frequency = <0>; // Filled out by kernel. ranges = <0x00000000 0xf 0xfe000000 0x1000000>; reg = <0xf 0xfe000000 0 0x00001000>; soc-sram-error { compatible = "fsl,soc-sram-error"; interrupts = <16 2 1 29>; }; corenet-law@0 { compatible = "fsl,corenet-law"; reg = <0x0 0x1000>; fsl,num-laws = <32>; }; ddr: memory-controller@8000 { compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; reg = <0x8000 0x1000>; interrupts = <16 2 1 23>; }; cpc: l3-cache-controller@10000 { compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; reg = <0x10000 0x1000>; interrupts = <16 2 1 27>; }; corenet-cf@18000 { compatible = "fsl,corenet-cf"; reg = <0x18000 0x1000>; interrupts = <16 2 1 31>; fsl,ccf-num-csdids = <32>; fsl,ccf-num-snoopids = <32>; }; iommu@20000 { compatible = "fsl,pamu-v1.0", "fsl,pamu"; reg = <0x20000 0x4000>; interrupts = < 24 2 0 0 16 2 1 30>; }; mpic: pic@40000 { clock-frequency = <0>; interrupt-controller; #address-cells = <0>; #interrupt-cells = <4>; reg = <0x40000 0x40000>; compatible = "fsl,mpic", "chrp,open-pic"; device_type = "open-pic"; }; msi0: msi@41600 { compatible = "fsl,mpic-msi"; reg = <0x41600 0x200>; msi-available-ranges = <0 0x100>; interrupts = < 0xe0 0 0 0 0xe1 0 0 0 0xe2 0 0 0 0xe3 0 0 0 0xe4 0 0 0 0xe5 0 0 0 0xe6 0 0 0 0xe7 0 0 0>; }; msi1: msi@41800 { compatible = "fsl,mpic-msi"; reg = <0x41800 0x200>; msi-available-ranges = <0 0x100>; interrupts = < 0xe8 0 0 0 0xe9 0 0 0 0xea 0 0 0 0xeb 0 0 0 0xec 0 0 0 0xed 0 0 0 0xee 0 0 0 0xef 0 0 0>; }; msi2: msi@41a00 { compatible = "fsl,mpic-msi"; reg = <0x41a00 0x200>; msi-available-ranges = <0 0x100>; interrupts = < 0xf0 0 0 0 0xf1 0 0 0 0xf2 0 0 0 0xf3 0 0 0 0xf4 0 0 0 0xf5 0 0 0 0xf6 0 0 0 0xf7 0 0 0>; }; guts: global-utilities@e0000 { compatible = "fsl,qoriq-device-config-1.0"; reg = <0xe0000 0xe00>; fsl,has-rstcr; #sleep-cells = <1>; fsl,liodn-bits = <12>; }; pins: global-utilities@e0e00 { compatible = "fsl,qoriq-pin-control-1.0"; reg = <0xe0e00 0x200>; #sleep-cells = <2>; }; clockgen: global-utilities@e1000 { compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0"; reg = <0xe1000 0x1000>; clock-frequency = <0>; }; rcpm: global-utilities@e2000 { compatible = "fsl,qoriq-rcpm-1.0"; reg = <0xe2000 0x1000>; #sleep-cells = <1>; }; sfp: sfp@e8000 { compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0"; reg = <0xe8000 0x1000>; }; serdes: serdes@ea000 { compatible = "fsl,p3041-serdes"; reg = <0xea000 0x1000>; }; dma0: dma@100300 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,p3041-dma", "fsl,eloplus-dma"; reg = <0x100300 0x4>; ranges = <0x0 0x100100 0x200>; cell-index = <0>; dma-channel@0 { compatible = "fsl,p3041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x0 0x80>; cell-index = <0>; interrupts = <28 2 0 0>; }; dma-channel@80 { compatible = "fsl,p3041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x80 0x80>; cell-index = <1>; interrupts = <29 2 0 0>; }; dma-channel@100 { compatible = "fsl,p3041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x100 0x80>; cell-index = <2>; interrupts = <30 2 0 0>; }; dma-channel@180 { compatible = "fsl,p3041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x180 0x80>; cell-index = <3>; interrupts = <31 2 0 0>; }; }; dma1: dma@101300 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,p3041-dma", "fsl,eloplus-dma"; reg = <0x101300 0x4>; ranges = <0x0 0x101100 0x200>; cell-index = <1>; dma-channel@0 { compatible = "fsl,p3041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x0 0x80>; cell-index = <0>; interrupts = <32 2 0 0>; }; dma-channel@80 { compatible = "fsl,p3041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x80 0x80>; cell-index = <1>; interrupts = <33 2 0 0>; }; dma-channel@100 { compatible = "fsl,p3041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x100 0x80>; cell-index = <2>; interrupts = <34 2 0 0>; }; dma-channel@180 { compatible = "fsl,p3041-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x180 0x80>; cell-index = <3>; interrupts = <35 2 0 0>; }; }; spi@110000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,p3041-espi", "fsl,mpc8536-espi"; reg = <0x110000 0x1000>; interrupts = <53 0x2 0 0>; fsl,espi-num-chipselects = <4>; }; sdhc: sdhc@114000 { compatible = "fsl,p3041-esdhc", "fsl,esdhc"; reg = <0x114000 0x1000>; interrupts = <48 2 0 0>; sdhci,auto-cmd12; clock-frequency = <0>; }; i2c@118000 { #address-cells = <1>; #size-cells = <0>; cell-index = <0>; compatible = "fsl-i2c"; reg = <0x118000 0x100>; interrupts = <38 2 0 0>; dfsrr; }; i2c@118100 { #address-cells = <1>; #size-cells = <0>; cell-index = <1>; compatible = "fsl-i2c"; reg = <0x118100 0x100>; interrupts = <38 2 0 0>; dfsrr; }; i2c@119000 { #address-cells = <1>; #size-cells = <0>; cell-index = <2>; compatible = "fsl-i2c"; reg = <0x119000 0x100>; interrupts = <39 2 0 0>; dfsrr; }; i2c@119100 { #address-cells = <1>; #size-cells = <0>; cell-index = <3>; compatible = "fsl-i2c"; reg = <0x119100 0x100>; interrupts = <39 2 0 0>; dfsrr; }; serial0: serial@11c500 { cell-index = <0>; device_type = "serial"; compatible = "ns16550"; reg = <0x11c500 0x100>; clock-frequency = <0>; interrupts = <36 2 0 0>; }; serial1: serial@11c600 { cell-index = <1>; device_type = "serial"; compatible = "ns16550"; reg = <0x11c600 0x100>; clock-frequency = <0>; interrupts = <36 2 0 0>; }; serial2: serial@11d500 { cell-index = <2>; device_type = "serial"; compatible = "ns16550"; reg = <0x11d500 0x100>; clock-frequency = <0>; interrupts = <37 2 0 0>; }; serial3: serial@11d600 { cell-index = <3>; device_type = "serial"; compatible = "ns16550"; reg = <0x11d600 0x100>; clock-frequency = <0>; interrupts = <37 2 0 0>; }; gpio0: gpio@130000 { compatible = "fsl,p3041-gpio", "fsl,qoriq-gpio"; reg = <0x130000 0x1000>; interrupts = <55 2 0 0>; #gpio-cells = <2>; gpio-controller; }; rman: rman@1e0000 { compatible = "fsl,rman"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x1e0000 0x20000>; reg = <0x1e0000 0x20000>; interrupts = <16 2 1 11>; /* err_irq */ fsl,qman-channels-id = <0x62 0x63>; inbound-block@0 { compatible = "fsl,rman-inbound-block"; reg = <0x0 0x800>; }; global-cfg@b00 { compatible = "fsl,rman-global-cfg"; reg = <0xb00 0x500>; }; inbound-block@1000 { compatible = "fsl,rman-inbound-block"; reg = <0x1000 0x800>; }; inbound-block@2000 { compatible = "fsl,rman-inbound-block"; reg = <0x2000 0x800>; }; inbound-block@3000 { compatible = "fsl,rman-inbound-block"; reg = <0x3000 0x800>; }; }; usb0: usb@210000 { compatible = "fsl,p3041-usb2-mph", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; reg = <0x210000 0x1000>; #address-cells = <1>; #size-cells = <0>; interrupts = <44 0x2 0 0>; phy_type = "utmi"; port0; }; usb1: usb@211000 { compatible = "fsl,p3041-usb2-dr", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; reg = <0x211000 0x1000>; #address-cells = <1>; #size-cells = <0>; interrupts = <45 0x2 0 0>; dr_mode = "host"; phy_type = "utmi"; }; sata@220000 { compatible = "fsl,p3041-sata", "fsl,pq-sata-v2"; reg = <0x220000 0x1000>; interrupts = <68 0x2 0 0>; }; sata@221000 { compatible = "fsl,p3041-sata", "fsl,pq-sata-v2"; reg = <0x221000 0x1000>; interrupts = <69 0x2 0 0>; }; crypto: crypto@300000 { compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; #address-cells = <1>; #size-cells = <1>; reg = <0x300000 0x10000>; ranges = <0 0x300000 0x10000>; interrupts = <92 2 0 0>; sec_jr0: jr@1000 { compatible = "fsl,sec-v4.2-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x1000 0x1000>; interrupts = <88 2 0 0>; }; sec_jr1: jr@2000 { compatible = "fsl,sec-v4.2-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x2000 0x1000>; interrupts = <89 2 0 0>; }; sec_jr2: jr@3000 { compatible = "fsl,sec-v4.2-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x3000 0x1000>; interrupts = <90 2 0 0>; }; sec_jr3: jr@4000 { compatible = "fsl,sec-v4.2-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x4000 0x1000>; interrupts = <91 2 0 0>; }; rtic@6000 { compatible = "fsl,sec-v4.2-rtic", "fsl,sec-v4.0-rtic"; #address-cells = <1>; #size-cells = <1>; reg = <0x6000 0x100>; ranges = <0x0 0x6100 0xe00>; rtic_a: rtic-a@0 { compatible = "fsl,sec-v4.2-rtic-memory", "fsl,sec-v4.0-rtic-memory"; reg = <0x00 0x20 0x100 0x80>; }; rtic_b: rtic-b@20 { compatible = "fsl,sec-v4.2-rtic-memory", "fsl,sec-v4.0-rtic-memory"; reg = <0x20 0x20 0x200 0x80>; }; rtic_c: rtic-c@40 { compatible = "fsl,sec-v4.2-rtic-memory", "fsl,sec-v4.0-rtic-memory"; reg = <0x40 0x20 0x300 0x80>; }; rtic_d: rtic-d@60 { compatible = "fsl,sec-v4.2-rtic-memory", "fsl,sec-v4.0-rtic-memory"; reg = <0x60 0x20 0x500 0x80>; }; }; }; sec_mon: sec_mon@314000 { compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; reg = <0x314000 0x1000>; interrupts = <93 2 0 0>; }; pme: pme@316000 { compatible = "fsl,pme"; reg = <0x316000 0x10000>; - /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ + /* "fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ + /* "fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ interrupts = <16 2 1 5>; }; qman: qman@318000 { compatible = "fsl,p3041-qman", "fsl,qman"; reg = <0x318000 0x1000>; interrupts = <16 2 1 3>; /* Commented out, use default allocation */ - /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ + /* "fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ + /* "fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ }; bman: bman@31a000 { compatible = "fsl,p3041-bman", "fsl,bman"; reg = <0x31a000 0x1000>; interrupts = <16 2 1 2>; - /* Same as fsl,qman-*, use default allocation */ - /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ + /* Same as "fsl,qman-*, use default allocation */ + /* "fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ }; fman0: fman@400000 { #address-cells = <1>; #size-cells = <1>; cell-index = <0>; compatible = "fsl,p3041-fman", "fsl,fman", "simple-bus"; ranges = <0 0x400000 0x100000>; reg = <0x400000 0x100000>; clock-frequency = <0>; interrupts = < 96 2 0 0 16 2 1 1>; cc@0 { compatible = "fsl,p3041-fman-cc", "fsl,fman-cc"; }; parser@c7000 { compatible = "fsl,p3041-fman-parser", "fsl,fman-parser"; reg = <0xc7000 0x1000>; }; keygen@c1000 { compatible = "fsl,p3041-fman-keygen", "fsl,fman-keygen"; reg = <0xc1000 0x1000>; }; policer@c0000 { compatible = "fsl,p3041-fman-policer", "fsl,fman-policer"; reg = <0xc0000 0x1000>; }; muram@0 { compatible = "fsl,p3041-fman-muram", "fsl,fman-muram"; reg = <0x0 0x28000>; }; bmi@80000 { compatible = "fsl,p3041-fman-bmi", "fsl,fman-bmi"; reg = <0x80000 0x400>; }; qmi@80400 { compatible = "fsl,p3041-fman-qmi", "fsl,fman-qmi"; reg = <0x80400 0x400>; }; fman0_rx0: port@88000 { cell-index = <0>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x88000 0x1000>; }; fman0_rx1: port@89000 { cell-index = <1>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x89000 0x1000>; }; fman0_rx2: port@8a000 { cell-index = <2>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x8a000 0x1000>; }; fman0_rx3: port@8b000 { cell-index = <3>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x8b000 0x1000>; }; fman0_rx4: port@8c000 { cell-index = <4>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x8c000 0x1000>; }; fman0_rx5: port@90000 { cell-index = <0>; compatible = "fsl,p3041-fman-port-10g-rx", "fsl,fman-port-10g-rx"; reg = <0x90000 0x1000>; }; fman0_tx5: port@b0000 { cell-index = <0>; compatible = "fsl,p3041-fman-port-10g-tx", "fsl,fman-port-10g-tx"; reg = <0xb0000 0x1000>; fsl,qman-channel-id = <0x40>; }; fman0_tx0: port@a8000 { cell-index = <0>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xa8000 0x1000>; fsl,qman-channel-id = <0x41>; }; fman0_tx1: port@a9000 { cell-index = <1>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xa9000 0x1000>; fsl,qman-channel-id = <0x42>; }; fman0_tx2: port@aa000 { cell-index = <2>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xaa000 0x1000>; fsl,qman-channel-id = <0x43>; }; fman0_tx3: port@ab000 { cell-index = <3>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xab000 0x1000>; fsl,qman-channel-id = <0x44>; }; fman0_tx4: port@ac000 { cell-index = <4>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xac000 0x1000>; fsl,qman-channel-id = <0x45>; }; fman0_oh0: port@81000 { cell-index = <0>; compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; reg = <0x81000 0x1000>; fsl,qman-channel-id = <0x46>; }; fman0_oh1: port@82000 { cell-index = <1>; compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; reg = <0x82000 0x1000>; fsl,qman-channel-id = <0x47>; }; fman0_oh2: port@83000 { cell-index = <2>; compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; reg = <0x83000 0x1000>; fsl,qman-channel-id = <0x48>; }; fman0_oh3: port@84000 { cell-index = <3>; compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; reg = <0x84000 0x1000>; fsl,qman-channel-id = <0x49>; }; fman0_oh4: port@85000 { cell-index = <4>; compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; reg = <0x85000 0x1000>; fsl,qman-channel-id = <0x4a>; }; fman0_oh5: port@86000 { cell-index = <5>; compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; reg = <0x86000 0x1000>; fsl,qman-channel-id = <0x4b>; }; fman0_oh6: port@87000 { cell-index = <6>; compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; reg = <0x87000 0x1000>; }; enet0: ethernet@e0000 { cell-index = <0>; - compatible = "fsl,p3041-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p3041-fman-1g-mac", + "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe0000 0x1000>; fsl,port-handles = <&fman0_rx0 &fman0_tx0>; ptimer-handle = <&ptp_timer0>; }; mdio0: mdio@e1120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-mdio"; reg = <0xe1120 0xee0>; interrupts = <100 1 0 0>; }; enet1: ethernet@e2000 { cell-index = <1>; - compatible = "fsl,p3041-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p3041-fman-1g-mac", + "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe2000 0x1000>; fsl,port-handles = <&fman0_rx1 &fman0_tx1>; ptimer-handle = <&ptp_timer0>; }; mdio@e3120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-tbi"; reg = <0xe3120 0xee0>; interrupts = <100 1 0 0>; }; enet2: ethernet@e4000 { cell-index = <2>; - compatible = "fsl,p3041-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p3041-fman-1g-mac", + "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe4000 0x1000>; fsl,port-handles = <&fman0_rx2 &fman0_tx2>; ptimer-handle = <&ptp_timer0>; }; mdio@e5120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-tbi"; reg = <0xe5120 0xee0>; interrupts = <100 1 0 0>; }; enet3: ethernet@e6000 { cell-index = <3>; - compatible = "fsl,p3041-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p3041-fman-1g-mac", + "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe6000 0x1000>; fsl,port-handles = <&fman0_rx3 &fman0_tx3>; }; mdio@e7120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-tbi"; reg = <0xe7120 0xee0>; interrupts = <100 1 0 0>; }; enet4: ethernet@e8000 { cell-index = <4>; - compatible = "fsl,p3041-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p3041-fman-1g-mac", + "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe8000 0x1000>; fsl,port-handles = <&fman0_rx4 &fman0_tx4>; ptimer-handle = <&ptp_timer0>; }; mdio@e9120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-tbi"; reg = <0xe9120 0xee0>; interrupts = <100 1 0 0>; }; enet5: ethernet@f0000 { cell-index = <0>; - compatible = "fsl,p3041-fman-10g-mac", "fsl,fman-10g-mac"; + compatible = "fsl,p3041-fman-10g-mac", + "fsl,fman-10g-mac", "fsl,fman-xgec"; reg = <0xf0000 0x1000>; fsl,port-handles = <&fman0_rx5 &fman0_tx5>; }; mdio@f1000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-xmdio"; reg = <0xf1000 0x1000>; interrupts = <100 1 0 0>; }; ptp_timer0: rtc@fe000 { compatible = "fsl,fman-rtc"; reg = <0xfe000 0x1000>; }; }; }; rapidio@ffe0c0000 { compatible = "fsl,srio"; interrupts = <16 2 1 11>; #address-cells = <2>; #size-cells = <2>; ranges; port1 { #address-cells = <2>; #size-cells = <2>; cell-index = <1>; }; port2 { #address-cells = <2>; #size-cells = <2>; cell-index = <2>; }; }; localbus@ffe124000 { compatible = "fsl,p3041-rev1.0-elbc", "simple-bus", "fsl,elbc"; interrupts = < 25 2 0 0 16 2 1 19 >; #address-cells = <2>; #size-cells = <1>; }; pci0: pcie@ffe200000 { compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; device_type = "pci"; status = "okay"; #size-cells = <2>; #address-cells = <3>; bus-range = <0x0 0xff>; clock-frequency = <0x1fca055>; fsl,msi = <&msi0>; interrupts = <16 2 1 15>; pcie@0 { reg = <0 0 0 0 0>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; device_type = "pci"; interrupts = <16 2 1 15>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = < /* IDSEL 0x0 */ 0000 0 0 1 &mpic 40 1 0 0 0000 0 0 2 &mpic 1 1 0 0 0000 0 0 3 &mpic 2 1 0 0 0000 0 0 4 &mpic 3 1 0 0 >; }; }; pci1: pcie@ffe201000 { compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; device_type = "pci"; status = "disabled"; #size-cells = <2>; #address-cells = <3>; bus-range = <0 0xff>; clock-frequency = <0x1fca055>; fsl,msi = <&msi1>; interrupts = <16 2 1 14>; pcie@0 { reg = <0 0 0 0 0>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; device_type = "pci"; interrupts = <16 2 1 14>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = < /* IDSEL 0x0 */ 0000 0 0 1 &mpic 41 1 0 0 0000 0 0 2 &mpic 5 1 0 0 0000 0 0 3 &mpic 6 1 0 0 0000 0 0 4 &mpic 7 1 0 0 >; }; }; pci2: pcie@ffe202000 { compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; device_type = "pci"; status = "okay"; #size-cells = <2>; #address-cells = <3>; bus-range = <0x0 0xff>; clock-frequency = <0x1fca055>; fsl,msi = <&msi2>; interrupts = <16 2 1 13>; pcie@0 { reg = <0 0 0 0 0>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; device_type = "pci"; interrupts = <16 2 1 13>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = < /* IDSEL 0x0 */ 0000 0 0 1 &mpic 42 1 0 0 0000 0 0 2 &mpic 9 1 0 0 0000 0 0 3 &mpic 10 1 0 0 0000 0 0 4 &mpic 11 1 0 0 >; }; }; pci3: pcie@ffe203000 { compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; device_type = "pci"; status = "disabled"; #size-cells = <2>; #address-cells = <3>; bus-range = <0x0 0xff>; clock-frequency = <0x1fca055>; fsl,msi = <&msi2>; interrupts = <16 2 1 12>; pcie@0 { reg = <0 0 0 0 0>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; device_type = "pci"; interrupts = <16 2 1 12>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = < /* IDSEL 0x0 */ 0000 0 0 1 &mpic 43 1 0 0 0000 0 0 2 &mpic 0 1 0 0 0000 0 0 3 &mpic 4 1 0 0 0000 0 0 4 &mpic 8 1 0 0 >; }; }; }; Index: head/sys/boot/fdt/dts/powerpc/p5020ds.dts =================================================================== --- head/sys/boot/fdt/dts/powerpc/p5020ds.dts (revision 308583) +++ head/sys/boot/fdt/dts/powerpc/p5020ds.dts (revision 308584) @@ -1,583 +1,542 @@ /* * P5020DS Device Tree Source * * Copyright 2010-2011 Freescale Semiconductor Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of Freescale Semiconductor nor the * names of its contributors may be used to endorse or promote products * derived from this software without specific prior written permission. * * * ALTERNATIVELY, this software may be distributed under the terms of the * GNU General Public License ("GPL") as published by the Free Software * Foundation, either version 2 of that License or (at your option) any * later version. * * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* $FreeBSD$ */ /include/ "p5020si.dtsi" / { model = "fsl,P5020DS"; compatible = "fsl,P5020DS"; #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&mpic>; aliases { phy_rgmii_0 = &phy_rgmii_0; phy_rgmii_1 = &phy_rgmii_1; phy_sgmii_1c = &phy_sgmii_1c; phy_sgmii_1d = &phy_sgmii_1d; phy_sgmii_1e = &phy_sgmii_1e; phy_sgmii_1f = &phy_sgmii_1f; phy_xgmii_1 = &phy_xgmii_1; phy_xgmii_2 = &phy_xgmii_2; emi1_rgmii = &hydra_mdio_rgmii; emi1_sgmii = &hydra_mdio_sgmii; emi2_xgmii = &hydra_mdio_xgmii; }; memory { device_type = "memory"; reg = <0x00000000 0x00000000 0x00000000 0x80000000>; }; dcsr: dcsr@f00000000 { ranges = <0x00000000 0xf 0x00000000 0x01008000>; }; bman-portals@ff4000000 { bman-portal@0 { cpu-handle = <&cpu0>; }; bman-portal@4000 { cpu-handle = <&cpu1>; }; bman-portal@8000 { }; bman-portal@c000 { }; bman-portal@10000 { }; bman-portal@14000 { }; bman-portal@18000 { }; bman-portal@1c000 { }; bman-portal@20000 { }; bman-portal@24000 { }; buffer-pool@0 { compatible = "fsl,p5020-bpool", "fsl,bpool"; fsl,bpid = <0>; fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; }; }; qman-portals@ff4200000 { qportal0: qman-portal@0 { cpu-handle = <&cpu0>; fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal1: qman-portal@4000 { cpu-handle = <&cpu1>; fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal2: qman-portal@8000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal3: qman-portal@c000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal4: qman-portal@10000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal5: qman-portal@14000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal6: qman-portal@18000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal7: qman-portal@1c000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal8: qman-portal@20000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; qportal9: qman-portal@24000 { fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 &qpool4 &qpool5 &qpool6 &qpool7 &qpool8 &qpool9 &qpool10 &qpool11 &qpool12 &qpool13 &qpool14 &qpool15>; }; }; soc: soc@ffe000000 { spi@110000 { flash@0 { #address-cells = <1>; #size-cells = <1>; compatible = "spansion,s25sl12801"; reg = <0>; spi-max-frequency = <40000000>; /* input clock */ partition@u-boot { label = "u-boot"; reg = <0x00000000 0x00100000>; read-only; }; partition@kernel { label = "kernel"; reg = <0x00100000 0x00500000>; read-only; }; partition@dtb { label = "dtb"; reg = <0x00600000 0x00100000>; read-only; }; partition@fs { label = "file system"; reg = <0x00700000 0x00900000>; }; }; }; i2c@118100 { eeprom@51 { compatible = "at24,24c256"; reg = <0x51>; }; eeprom@52 { compatible = "at24,24c256"; reg = <0x52>; }; }; i2c@119100 { rtc@68 { compatible = "dallas,ds3232"; reg = <0x68>; interrupts = <0x1 0x1 0 0>; }; }; pme: pme@316000 { /* Commented out, use default allocation */ /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ }; qman: qman@318000 { /* Commented out, use default allocation */ /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ }; bman: bman@31a000 { /* Same as fsl,qman-*, use default allocation */ /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ }; fman0: fman@400000 { enet0: ethernet@e0000 { tbi-handle = <&tbi0>; phy-handle = <&phy_rgmii_0>; phy-connection-type = "rgmii"; }; mdio0: mdio@e1120 { tbi0: tbi-phy@8 { reg = <0x8>; device_type = "tbi-phy"; }; /* * Virtual MDIO for the two on-board RGMII * ports. The fsl,hydra-mdio-muxval property * is already correct. */ hydra_mdio_rgmii: hydra-mdio-rgmii { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,hydra-mdio"; fsl,mdio-handle = <&mdio0>; fsl,hydra-mdio-muxval = <0x00>; status = "disabled"; phy_rgmii_0: ethernet-phy@0 { reg = <0x0>; }; phy_rgmii_1: ethernet-phy@1 { reg = <0x1>; }; }; /* * Virtual MDIO for the four-port SGMII card. * The fsl,hydra-mdio-muxval property will be * fixed-up by U-Boot based on the slot that * the SGMII card is in. * * Note: we do not support DTSEC5 connected to * SGMII, so this is the only SGMII node. */ hydra_mdio_sgmii: hydra-mdio-sgmii { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,hydra-mdio"; fsl,mdio-handle = <&mdio0>; fsl,hydra-mdio-muxval = <0x00>; status = "disabled"; phy_sgmii_1c: ethernet-phy@1c { reg = <0x1c>; }; phy_sgmii_1d: ethernet-phy@1d { reg = <0x1d>; }; phy_sgmii_1e: ethernet-phy@1e { reg = <0x1e>; }; phy_sgmii_1f: ethernet-phy@1f { reg = <0x1f>; }; }; }; enet1: ethernet@e2000 { tbi-handle = <&tbi1>; phy-handle = <&phy_sgmii_1d>; phy-connection-type = "sgmii"; }; mdio@e3120 { tbi1: tbi-phy@8 { reg = <8>; device_type = "tbi-phy"; }; }; enet2: ethernet@e4000 { tbi-handle = <&tbi2>; phy-handle = <&phy_sgmii_1e>; phy-connection-type = "sgmii"; }; mdio@e5120 { tbi2: tbi-phy@8 { reg = <8>; device_type = "tbi-phy"; }; }; enet3: ethernet@e6000 { tbi-handle = <&tbi3>; phy-handle = <&phy_sgmii_1f>; phy-connection-type = "sgmii"; }; mdio@e7120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-tbi"; reg = <0xe7120 0xee0>; interrupts = <100 1 0 0>; tbi3: tbi-phy@8 { reg = <8>; device_type = "tbi-phy"; }; }; enet4: ethernet@e8000 { tbi-handle = <&tbi4>; phy-handle = <&phy_rgmii_1>; phy-connection-type = "rgmii"; }; mdio@e9120 { tbi4: tbi-phy@8 { reg = <8>; device_type = "tbi-phy"; }; }; enet5: ethernet@f0000 { /* * phy-handle will be updated by U-Boot to * reflect the actual slot the XAUI card is in. */ phy-handle = <&phy_xgmii_1>; phy-connection-type = "xgmii"; }; /* * We only support one XAUI card, so the MDIO muxing * is set by U-Boot, and Linux never touches it. * Therefore, we don't need a virtual MDIO node. * However, the phy address depends on the slot, so * only one of the ethernet-phy nodes below will be * used. */ hydra_mdio_xgmii: mdio@f1000 { status = "disabled"; /* XAUI card in slot 1 */ phy_xgmii_1: ethernet-phy@4 { reg = <0x4>; }; /* XAUI card in slot 2 */ phy_xgmii_2: ethernet-phy@0 { reg = <0x0>; }; }; }; }; rapidio@ffe0c0000 { reg = <0xf 0xfe0c0000 0 0x11000>; port1 { ranges = <0 0 0xc 0x20000000 0 0x10000000>; }; port2 { ranges = <0 0 0xc 0x30000000 0 0x10000000>; }; }; localbus@ffe124000 { reg = <0xf 0xfe124000 0 0x1000>; ranges = <0 0 0xf 0xb8000000 0x04000000>; flash@0,0 { compatible = "cfi-flash"; /* * Map 64Mb of 128MB NOR flash memory. Since highest * line of address of NOR flash memory are set by * FPGA, memory are divided into two pages equal to * 64MB. One of the pages can be accessed at once. */ reg = <0 0 0x04000000>; bank-width = <2>; device-width = <2>; }; nand@2,0 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,elbc-fcm-nand"; reg = <0x2 0x0 0x40000>; partition@0 { label = "NAND U-Boot Image"; reg = <0x0 0x02000000>; read-only; }; partition@2000000 { label = "NAND Root File System"; reg = <0x02000000 0x10000000>; }; partition@12000000 { label = "NAND Compressed RFS Image"; reg = <0x12000000 0x08000000>; }; partition@1a000000 { label = "NAND Linux Kernel Image"; reg = <0x1a000000 0x04000000>; }; partition@1e000000 { label = "NAND DTB Image"; reg = <0x1e000000 0x01000000>; }; partition@1f000000 { label = "NAND Writable User area"; reg = <0x1f000000 0x21000000>; }; }; board-control@3,0 { compatible = "fsl,p5020ds-fpga", "fsl,fpga-ngpixis"; reg = <3 0 0x30>; }; }; pci0: pcie@ffe200000 { reg = <0xf 0xfe200000 0 0x1000>; ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000 0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0x80000000 0x02000000 0 0x80000000 0 0x10000000 0x01000000 0 0x00000000 0x01000000 0 0xff000000 0 0x00010000>; }; }; pci1: pcie@ffe201000 { reg = <0xf 0xfe201000 0 0x1000>; ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000 0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0x90000000 0x02000000 0 0x90000000 0 0x10000000 0x01000000 0 0x00000000 0x01000000 0 0xff010000 0 0x00010000>; }; }; pci2: pcie@ffe202000 { reg = <0xf 0xfe202000 0 0x1000>; ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000 0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0xa0000000 0x02000000 0 0xa0000000 0 0x10000000 0x01000000 0 0x00000000 0x01000000 0 0xff020000 0 0x00010000>; }; }; pci3: pcie@ffe203000 { reg = <0xf 0xfe203000 0 0x1000>; ranges = <0x02000000 0 0xb0000000 0x0 0xb0000000 0 0x08000000 0x01000000 0 0x00000000 0x0 0xff030000 0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0xb0000000 0x02000000 0 0xb0000000 0 0x08000000 0x01000000 0 0x00000000 0x01000000 0 0xff030000 0 0x00010000>; }; }; - fsl,dpaa { - compatible = "fsl,p5020-dpaa", "fsl,dpaa"; - - ethernet@0 { - compatible = "fsl,p5020-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet0>; - status = "okay"; - }; - ethernet@1 { - compatible = "fsl,p5020-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet1>; - status = "disabled"; - }; - ethernet@2 { - compatible = "fsl,p5020-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet2>; - status = "disabled"; - }; - ethernet@3 { - compatible = "fsl,p5020-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet3>; - status = "disabled"; - }; - ethernet@4 { - compatible = "fsl,p5020-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet4>; - status = "okay"; - }; - ethernet@5 { - compatible = "fsl,p5020-dpa-ethernet", "fsl,dpa-ethernet"; - fsl,qman-channel = <&qpool1>; - fsl,fman-mac = <&enet5>; - status = "disabled"; - }; - }; - chosen { stdin = "serial0"; stdout = "serial0"; }; }; Index: head/sys/boot/fdt/dts/powerpc/p5020si.dtsi =================================================================== --- head/sys/boot/fdt/dts/powerpc/p5020si.dtsi (revision 308583) +++ head/sys/boot/fdt/dts/powerpc/p5020si.dtsi (revision 308584) @@ -1,1389 +1,1389 @@ /* * P5020 Silicon Device Tree Source * * Copyright 2010-2011 Freescale Semiconductor Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of Freescale Semiconductor nor the * names of its contributors may be used to endorse or promote products * derived from this software without specific prior written permission. * * * ALTERNATIVELY, this software may be distributed under the terms of the * GNU General Public License ("GPL") as published by the Free Software * Foundation, either version 2 of that License or (at your option) any * later version. * * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* $FreeBSD$ */ /dts-v1/; / { compatible = "fsl,P5020"; #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&mpic>; aliases { ccsr = &soc; dcsr = &dcsr; ethernet0 = &enet0; ethernet1 = &enet1; ethernet2 = &enet2; ethernet3 = &enet3; ethernet4 = &enet4; ethernet5 = &enet5; serial0 = &serial0; serial1 = &serial1; serial2 = &serial2; serial3 = &serial3; pci0 = &pci0; pci1 = &pci1; pci2 = &pci2; pci3 = &pci3; usb0 = &usb0; usb1 = &usb1; dma0 = &dma0; dma1 = &dma1; bman = &bman; qman = &qman; pme = &pme; rman = &rman; sdhc = &sdhc; msi0 = &msi0; msi1 = &msi1; msi2 = &msi2; crypto = &crypto; sec_jr0 = &sec_jr0; sec_jr1 = &sec_jr1; sec_jr2 = &sec_jr2; sec_jr3 = &sec_jr3; rtic_a = &rtic_a; rtic_b = &rtic_b; rtic_c = &rtic_c; rtic_d = &rtic_d; sec_mon = &sec_mon; raideng = &raideng; raideng_jr0 = &raideng_jr0; raideng_jr1 = &raideng_jr1; raideng_jr2 = &raideng_jr2; raideng_jr3 = &raideng_jr3; fman0 = &fman0; fman0_oh0 = &fman0_oh0; fman0_oh1 = &fman0_oh1; fman0_oh2 = &fman0_oh2; fman0_oh3 = &fman0_oh3; fman0_oh4 = &fman0_oh4; fman0_oh5 = &fman0_oh5; fman0_oh6 = &fman0_oh6; fman0_rx0 = &fman0_rx0; fman0_rx1 = &fman0_rx1; fman0_rx2 = &fman0_rx2; fman0_rx3 = &fman0_rx3; fman0_rx4 = &fman0_rx4; fman0_rx5 = &fman0_rx5; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu0: PowerPC,e5500@0 { device_type = "cpu"; reg = <0>; bus-frequency = <799999998>; next-level-cache = <&L2_0>; L2_0: l2-cache { next-level-cache = <&cpc>; }; }; cpu1: PowerPC,e5500@1 { device_type = "cpu"; reg = <1>; next-level-cache = <&L2_1>; L2_1: l2-cache { next-level-cache = <&cpc>; }; }; }; dcsr: dcsr@f00000000 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,dcsr", "simple-bus"; dcsr-epu@0 { compatible = "fsl,dcsr-epu"; interrupts = <52 2 0 0 84 2 0 0 85 2 0 0>; interrupt-parent = <&mpic>; reg = <0x0 0x1000>; }; dcsr-npc { compatible = "fsl,dcsr-npc"; reg = <0x1000 0x1000 0x1000000 0x8000>; }; dcsr-nxc@2000 { compatible = "fsl,dcsr-nxc"; reg = <0x2000 0x1000>; }; dcsr-corenet { compatible = "fsl,dcsr-corenet"; reg = <0x8000 0x1000 0xB0000 0x1000>; }; dcsr-dpaa@9000 { compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa"; reg = <0x9000 0x1000>; }; dcsr-ocn@11000 { compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn"; reg = <0x11000 0x1000>; }; dcsr-ddr@12000 { compatible = "fsl,dcsr-ddr"; dev-handle = <&ddr1>; reg = <0x12000 0x1000>; }; dcsr-ddr@13000 { compatible = "fsl,dcsr-ddr"; dev-handle = <&ddr2>; reg = <0x13000 0x1000>; }; dcsr-nal@18000 { compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal"; reg = <0x18000 0x1000>; }; dcsr-rcpm@22000 { compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm"; reg = <0x22000 0x1000>; }; dcsr-cpu-sb-proxy@40000 { compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; cpu-handle = <&cpu0>; reg = <0x40000 0x1000>; }; dcsr-cpu-sb-proxy@41000 { compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; cpu-handle = <&cpu1>; reg = <0x41000 0x1000>; }; }; bman-portals@ff4000000 { #address-cells = <0x1>; #size-cells = <0x1>; - compatible = "bman-portals"; + compatible = "fsl,bman-portals"; ranges = <0x0 0xf 0xfde00000 0x200000>; bman-portal@0 { cell-index = <0x0>; compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; reg = <0x0 0x4000 0x100000 0x1000>; interrupts = <105 2 0 0>; }; bman-portal@4000 { cell-index = <0x1>; compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; reg = <0x4000 0x4000 0x101000 0x1000>; interrupts = <107 2 0 0>; }; bman-portal@8000 { cell-index = <2>; compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; reg = <0x8000 0x4000 0x102000 0x1000>; interrupts = <109 2 0 0>; }; bman-portal@c000 { cell-index = <0x3>; compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; reg = <0xc000 0x4000 0x103000 0x1000>; interrupts = <111 2 0 0>; }; bman-portal@10000 { cell-index = <0x4>; compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; reg = <0x10000 0x4000 0x104000 0x1000>; interrupts = <113 2 0 0>; }; bman-portal@14000 { cell-index = <0x5>; compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; reg = <0x14000 0x4000 0x105000 0x1000>; interrupts = <115 2 0 0>; }; bman-portal@18000 { cell-index = <0x6>; compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; reg = <0x18000 0x4000 0x106000 0x1000>; interrupts = <117 2 0 0>; }; bman-portal@1c000 { cell-index = <0x7>; compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; reg = <0x1c000 0x4000 0x107000 0x1000>; interrupts = <119 2 0 0>; }; bman-portal@20000 { cell-index = <0x8>; compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; reg = <0x20000 0x4000 0x108000 0x1000>; interrupts = <121 2 0 0>; }; bman-portal@24000 { cell-index = <0x9>; compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; reg = <0x24000 0x4000 0x109000 0x1000>; interrupts = <123 2 0 0>; }; buffer-pool@0 { compatible = "fsl,p5020-bpool", "fsl,bpool"; fsl,bpid = <0>; fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; }; }; qman-portals@ff4200000 { #address-cells = <0x1>; #size-cells = <0x1>; - compatible = "qman-portals"; + compatible = "fsl,qman-portals"; ranges = <0x0 0xf 0xfdc00000 0x200000>; qportal0: qman-portal@0 { cell-index = <0x0>; compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; reg = <0x0 0x4000 0x100000 0x1000>; interrupts = <104 0x2 0 0>; fsl,qman-channel-id = <0x0>; }; qportal1: qman-portal@4000 { cell-index = <0x1>; compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; reg = <0x4000 0x4000 0x101000 0x1000>; interrupts = <106 0x2 0 0>; fsl,qman-channel-id = <0x1>; }; qportal2: qman-portal@8000 { cell-index = <0x2>; compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; reg = <0x8000 0x4000 0x102000 0x1000>; interrupts = <108 0x2 0 0>; fsl,qman-channel-id = <0x2>; }; qportal3: qman-portal@c000 { cell-index = <0x3>; compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; reg = <0xc000 0x4000 0x103000 0x1000>; interrupts = <110 0x2 0 0>; fsl,qman-channel-id = <0x3>; }; qportal4: qman-portal@10000 { cell-index = <0x4>; compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; reg = <0x10000 0x4000 0x104000 0x1000>; interrupts = <112 0x2 0 0>; fsl,qman-channel-id = <0x4>; }; qportal5: qman-portal@14000 { cell-index = <0x5>; compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; reg = <0x14000 0x4000 0x105000 0x1000>; interrupts = <114 0x2 0 0>; fsl,qman-channel-id = <0x5>; }; qportal6: qman-portal@18000 { cell-index = <0x6>; compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; reg = <0x18000 0x4000 0x106000 0x1000>; interrupts = <116 0x2 0 0>; fsl,qman-channel-id = <0x6>; }; qportal7: qman-portal@1c000 { cell-index = <0x7>; compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; reg = <0x1c000 0x4000 0x107000 0x1000>; interrupts = <118 0x2 0 0>; fsl,qman-channel-id = <0x7>; }; qportal8: qman-portal@20000 { cell-index = <0x8>; compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; reg = <0x20000 0x4000 0x108000 0x1000>; interrupts = <120 0x2 0 0>; fsl,qman-channel-id = <0x8>; }; qportal9: qman-portal@24000 { cell-index = <0x9>; compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; reg = <0x24000 0x4000 0x109000 0x1000>; interrupts = <122 0x2 0 0>; fsl,qman-channel-id = <0x9>; }; qpool1: qman-pool@1 { cell-index = <1>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x21>; }; qpool2: qman-pool@2 { cell-index = <2>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x22>; }; qpool3: qman-pool@3 { cell-index = <3>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x23>; }; qpool4: qman-pool@4 { cell-index = <4>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x24>; }; qpool5: qman-pool@5 { cell-index = <5>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x25>; }; qpool6: qman-pool@6 { cell-index = <6>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x26>; }; qpool7: qman-pool@7 { cell-index = <7>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x27>; }; qpool8: qman-pool@8 { cell-index = <8>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x28>; }; qpool9: qman-pool@9 { cell-index = <9>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x29>; }; qpool10: qman-pool@10 { cell-index = <10>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2a>; }; qpool11: qman-pool@11 { cell-index = <11>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2b>; }; qpool12: qman-pool@12 { cell-index = <12>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2c>; }; qpool13: qman-pool@13 { cell-index = <13>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2d>; }; qpool14: qman-pool@14 { cell-index = <14>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2e>; }; qpool15: qman-pool@15 { cell-index = <15>; compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; fsl,qman-channel-id = <0x2f>; }; }; soc: soc@ffe000000 { #address-cells = <1>; #size-cells = <1>; device_type = "soc"; compatible = "simple-bus"; bus-frequency = <0>; // Filled out by kernel. ranges = <0x00000000 0xf 0xfe000000 0x1000000>; reg = <0xf 0xfe000000 0 0x00001000>; soc-sram-error { compatible = "fsl,soc-sram-error"; interrupts = <16 2 1 29>; }; corenet-law@0 { compatible = "fsl,corenet-law"; reg = <0x0 0x1000>; fsl,num-laws = <32>; }; ddr1: memory-controller@8000 { compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; reg = <0x8000 0x1000>; interrupts = <16 2 1 23>; }; ddr2: memory-controller@9000 { compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; reg = <0x9000 0x1000>; interrupts = <16 2 1 22>; }; cpc: l3-cache-controller@10000 { compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; reg = <0x10000 0x1000 0x11000 0x1000>; interrupts = <16 2 1 27 16 2 1 26>; }; corenet-cf@18000 { compatible = "fsl,corenet-cf"; reg = <0x18000 0x1000>; interrupts = <16 2 1 31>; fsl,ccf-num-csdids = <32>; fsl,ccf-num-snoopids = <32>; }; iommu@20000 { compatible = "fsl,pamu-v1.0", "fsl,pamu"; reg = <0x20000 0x4000>; interrupts = < 24 2 0 0 16 2 1 30>; }; mpic: pic@40000 { clock-frequency = <0>; interrupt-controller; #address-cells = <0>; #interrupt-cells = <4>; reg = <0x40000 0x40000>; compatible = "fsl,mpic", "chrp,open-pic"; device_type = "open-pic"; }; msi0: msi@41600 { compatible = "fsl,mpic-msi"; reg = <0x41600 0x200>; msi-available-ranges = <0 0x100>; interrupts = < 0xe0 0 0 0 0xe1 0 0 0 0xe2 0 0 0 0xe3 0 0 0 0xe4 0 0 0 0xe5 0 0 0 0xe6 0 0 0 0xe7 0 0 0>; }; msi1: msi@41800 { compatible = "fsl,mpic-msi"; reg = <0x41800 0x200>; msi-available-ranges = <0 0x100>; interrupts = < 0xe8 0 0 0 0xe9 0 0 0 0xea 0 0 0 0xeb 0 0 0 0xec 0 0 0 0xed 0 0 0 0xee 0 0 0 0xef 0 0 0>; }; msi2: msi@41a00 { compatible = "fsl,mpic-msi"; reg = <0x41a00 0x200>; msi-available-ranges = <0 0x100>; interrupts = < 0xf0 0 0 0 0xf1 0 0 0 0xf2 0 0 0 0xf3 0 0 0 0xf4 0 0 0 0xf5 0 0 0 0xf6 0 0 0 0xf7 0 0 0>; }; guts: global-utilities@e0000 { compatible = "fsl,qoriq-device-config-1.0"; reg = <0xe0000 0xe00>; fsl,has-rstcr; #sleep-cells = <1>; fsl,liodn-bits = <12>; }; pins: global-utilities@e0e00 { compatible = "fsl,qoriq-pin-control-1.0"; reg = <0xe0e00 0x200>; #sleep-cells = <2>; }; clockgen: global-utilities@e1000 { compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0"; reg = <0xe1000 0x1000>; clock-frequency = <0>; }; rcpm: global-utilities@e2000 { compatible = "fsl,qoriq-rcpm-1.0"; reg = <0xe2000 0x1000>; #sleep-cells = <1>; }; sfp: sfp@e8000 { compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0"; reg = <0xe8000 0x1000>; }; serdes: serdes@ea000 { compatible = "fsl,p5020-serdes"; reg = <0xea000 0x1000>; }; dma0: dma@100300 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,p5020-dma", "fsl,eloplus-dma"; reg = <0x100300 0x4>; ranges = <0x0 0x100100 0x200>; cell-index = <0>; dma-channel@0 { compatible = "fsl,p5020-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x0 0x80>; cell-index = <0>; interrupts = <28 2 0 0>; }; dma-channel@80 { compatible = "fsl,p5020-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x80 0x80>; cell-index = <1>; interrupts = <29 2 0 0>; }; dma-channel@100 { compatible = "fsl,p5020-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x100 0x80>; cell-index = <2>; interrupts = <30 2 0 0>; }; dma-channel@180 { compatible = "fsl,p5020-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x180 0x80>; cell-index = <3>; interrupts = <31 2 0 0>; }; }; dma1: dma@101300 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,p5020-dma", "fsl,eloplus-dma"; reg = <0x101300 0x4>; ranges = <0x0 0x101100 0x200>; cell-index = <1>; dma-channel@0 { compatible = "fsl,p5020-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x0 0x80>; cell-index = <0>; interrupts = <32 2 0 0>; }; dma-channel@80 { compatible = "fsl,p5020-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x80 0x80>; cell-index = <1>; interrupts = <33 2 0 0>; }; dma-channel@100 { compatible = "fsl,p5020-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x100 0x80>; cell-index = <2>; interrupts = <34 2 0 0>; }; dma-channel@180 { compatible = "fsl,p5020-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x180 0x80>; cell-index = <3>; interrupts = <35 2 0 0>; }; }; spi@110000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,p5020-espi", "fsl,mpc8536-espi"; reg = <0x110000 0x1000>; interrupts = <53 0x2 0 0>; fsl,espi-num-chipselects = <4>; }; sdhc: sdhc@114000 { compatible = "fsl,p5020-esdhc", "fsl,esdhc"; reg = <0x114000 0x1000>; interrupts = <48 2 0 0>; sdhci,auto-cmd12; clock-frequency = <0>; }; i2c@118000 { #address-cells = <1>; #size-cells = <0>; cell-index = <0>; compatible = "fsl-i2c"; reg = <0x118000 0x100>; interrupts = <38 2 0 0>; dfsrr; }; i2c@118100 { #address-cells = <1>; #size-cells = <0>; cell-index = <1>; compatible = "fsl-i2c"; reg = <0x118100 0x100>; interrupts = <38 2 0 0>; dfsrr; }; i2c@119000 { #address-cells = <1>; #size-cells = <0>; cell-index = <2>; compatible = "fsl-i2c"; reg = <0x119000 0x100>; interrupts = <39 2 0 0>; dfsrr; }; i2c@119100 { #address-cells = <1>; #size-cells = <0>; cell-index = <3>; compatible = "fsl-i2c"; reg = <0x119100 0x100>; interrupts = <39 2 0 0>; dfsrr; }; serial0: serial@11c500 { cell-index = <0>; device_type = "serial"; compatible = "ns16550"; reg = <0x11c500 0x100>; clock-frequency = <0>; interrupts = <36 2 0 0>; }; serial1: serial@11c600 { cell-index = <1>; device_type = "serial"; compatible = "ns16550"; reg = <0x11c600 0x100>; clock-frequency = <0>; interrupts = <36 2 0 0>; }; serial2: serial@11d500 { cell-index = <2>; device_type = "serial"; compatible = "ns16550"; reg = <0x11d500 0x100>; clock-frequency = <0>; interrupts = <37 2 0 0>; }; serial3: serial@11d600 { cell-index = <3>; device_type = "serial"; compatible = "ns16550"; reg = <0x11d600 0x100>; clock-frequency = <0>; interrupts = <37 2 0 0>; }; gpio0: gpio@130000 { compatible = "fsl,p5020-gpio", "fsl,qoriq-gpio"; reg = <0x130000 0x1000>; interrupts = <55 2 0 0>; #gpio-cells = <2>; gpio-controller; }; rman: rman@1e0000 { compatible = "fsl,rman"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x1e0000 0x20000>; reg = <0x1e0000 0x20000>; interrupts = <16 2 1 11>; /* err_irq */ fsl,qman-channels-id = <0x62 0x63>; inbound-block@0 { compatible = "fsl,rman-inbound-block"; reg = <0x0 0x800>; }; global-cfg@b00 { compatible = "fsl,rman-global-cfg"; reg = <0xb00 0x500>; }; inbound-block@1000 { compatible = "fsl,rman-inbound-block"; reg = <0x1000 0x800>; }; inbound-block@2000 { compatible = "fsl,rman-inbound-block"; reg = <0x2000 0x800>; }; inbound-block@3000 { compatible = "fsl,rman-inbound-block"; reg = <0x3000 0x800>; }; }; usb0: usb@210000 { compatible = "fsl,p5020-usb2-mph", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; reg = <0x210000 0x1000>; #address-cells = <1>; #size-cells = <0>; interrupts = <44 0x2 0 0>; phy_type = "utmi"; port0; }; usb1: usb@211000 { compatible = "fsl,p5020-usb2-dr", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; reg = <0x211000 0x1000>; #address-cells = <1>; #size-cells = <0>; interrupts = <45 0x2 0 0>; dr_mode = "host"; phy_type = "utmi"; }; sata@220000 { compatible = "fsl,p5020-sata", "fsl,pq-sata-v2"; reg = <0x220000 0x1000>; interrupts = <68 0x2 0 0>; }; sata@221000 { compatible = "fsl,p5020-sata", "fsl,pq-sata-v2"; reg = <0x221000 0x1000>; interrupts = <69 0x2 0 0>; }; crypto: crypto@300000 { compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; #address-cells = <1>; #size-cells = <1>; reg = <0x300000 0x10000>; ranges = <0 0x300000 0x10000>; interrupts = <92 2 0 0>; sec_jr0: jr@1000 { compatible = "fsl,sec-v4.2-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x1000 0x1000>; interrupts = <88 2 0 0>; }; sec_jr1: jr@2000 { compatible = "fsl,sec-v4.2-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x2000 0x1000>; interrupts = <89 2 0 0>; }; sec_jr2: jr@3000 { compatible = "fsl,sec-v4.2-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x3000 0x1000>; interrupts = <90 2 0 0>; }; sec_jr3: jr@4000 { compatible = "fsl,sec-v4.2-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x4000 0x1000>; interrupts = <91 2 0 0>; }; rtic@6000 { compatible = "fsl,sec-v4.2-rtic", "fsl,sec-v4.0-rtic"; #address-cells = <1>; #size-cells = <1>; reg = <0x6000 0x100>; ranges = <0x0 0x6100 0xe00>; rtic_a: rtic-a@0 { compatible = "fsl,sec-v4.2-rtic-memory", "fsl,sec-v4.0-rtic-memory"; reg = <0x00 0x20 0x100 0x80>; }; rtic_b: rtic-b@20 { compatible = "fsl,sec-v4.2-rtic-memory", "fsl,sec-v4.0-rtic-memory"; reg = <0x20 0x20 0x200 0x80>; }; rtic_c: rtic-c@40 { compatible = "fsl,sec-v4.2-rtic-memory", "fsl,sec-v4.0-rtic-memory"; reg = <0x40 0x20 0x300 0x80>; }; rtic_d: rtic-d@60 { compatible = "fsl,sec-v4.2-rtic-memory", "fsl,sec-v4.0-rtic-memory"; reg = <0x60 0x20 0x500 0x80>; }; }; }; sec_mon: sec_mon@314000 { compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; reg = <0x314000 0x1000>; interrupts = <93 2 0 0>; }; raideng: raideng@320000 { compatible = "fsl,raideng-v1.0"; #address-cells = <1>; #size-cells = <1>; reg = <0x320000 0x10000>; ranges = <0 0x320000 0x10000>; raideng_jq0@1000 { compatible = "fsl,raideng-v1.0-job-queue"; #address-cells = <1>; #size-cells = <1>; reg = <0x1000 0x1000>; ranges = <0x0 0x1000 0x1000>; raideng_jr0: jr@0 { compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring"; reg = <0x0 0x400>; interrupts = <139 2 0 0>; interrupt-parent = <&mpic>; }; raideng_jr1: jr@400 { compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring"; reg = <0x400 0x400>; interrupts = <140 2 0 0>; interrupt-parent = <&mpic>; }; }; raideng_jq1@2000 { compatible = "fsl,raideng-v1.0-job-queue"; #address-cells = <1>; #size-cells = <1>; reg = <0x2000 0x1000>; ranges = <0x0 0x2000 0x1000>; raideng_jr2: jr@0 { compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring"; reg = <0x0 0x400>; interrupts = <141 2 0 0>; interrupt-parent = <&mpic>; }; raideng_jr3: jr@400 { compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring"; reg = <0x400 0x400>; interrupts = <142 2 0 0>; interrupt-parent = <&mpic>; }; }; }; pme: pme@316000 { compatible = "fsl,pme"; reg = <0x316000 0x10000>; - /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ + /* "fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ + /* "fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ interrupts = <16 2 1 5>; }; qman: qman@318000 { compatible = "fsl,p5020-qman", "fsl,qman"; reg = <0x318000 0x1000>; interrupts = <16 2 1 3>; /* Commented out, use default allocation */ - /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ + /* "fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ + /* "fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ }; bman: bman@31a000 { compatible = "fsl,p5020-bman", "fsl,bman"; reg = <0x31a000 0x1000>; interrupts = <16 2 1 2>; - /* Same as fsl,qman-*, use default allocation */ - /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ + /* Same as "fsl,qman-*, use default allocation */ + /* "fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ }; fman0: fman@400000 { #address-cells = <1>; #size-cells = <1>; cell-index = <0>; compatible = "fsl,p5020-fman", "fsl,fman", "simple-bus"; ranges = <0 0x400000 0x100000>; reg = <0x400000 0x100000>; clock-frequency = <0>; interrupts = < 96 2 0 0 16 2 1 1>; cc@0 { compatible = "fsl,p5020-fman-cc", "fsl,fman-cc"; }; parser@c7000 { compatible = "fsl,p5020-fman-parser", "fsl,fman-parser"; reg = <0xc7000 0x1000>; }; keygen@c1000 { compatible = "fsl,p5020-fman-keygen", "fsl,fman-keygen"; reg = <0xc1000 0x1000>; }; policer@c0000 { compatible = "fsl,p5020-fman-policer", "fsl,fman-policer"; reg = <0xc0000 0x1000>; }; muram@0 { compatible = "fsl,p5020-fman-muram", "fsl,fman-muram"; reg = <0x0 0x28000>; }; bmi@80000 { compatible = "fsl,p5020-fman-bmi", "fsl,fman-bmi"; reg = <0x80000 0x400>; }; qmi@80400 { compatible = "fsl,p5020-fman-qmi", "fsl,fman-qmi"; reg = <0x80400 0x400>; }; fman0_rx0: port@88000 { cell-index = <0>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x88000 0x1000>; }; fman0_rx1: port@89000 { cell-index = <1>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x89000 0x1000>; }; fman0_rx2: port@8a000 { cell-index = <2>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x8a000 0x1000>; }; fman0_rx3: port@8b000 { cell-index = <3>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x8b000 0x1000>; }; fman0_rx4: port@8c000 { cell-index = <4>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx"; + compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; reg = <0x8c000 0x1000>; }; fman0_rx5: port@90000 { cell-index = <0>; compatible = "fsl,p5020-fman-port-10g-rx", "fsl,fman-port-10g-rx"; reg = <0x90000 0x1000>; }; fman0_tx5: port@b0000 { cell-index = <0>; compatible = "fsl,p5020-fman-port-10g-tx", "fsl,fman-port-10g-tx"; reg = <0xb0000 0x1000>; fsl,qman-channel-id = <0x40>; }; fman0_tx0: port@a8000 { cell-index = <0>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xa8000 0x1000>; fsl,qman-channel-id = <0x41>; }; fman0_tx1: port@a9000 { cell-index = <1>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xa9000 0x1000>; fsl,qman-channel-id = <0x42>; }; fman0_tx2: port@aa000 { cell-index = <2>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xaa000 0x1000>; fsl,qman-channel-id = <0x43>; }; fman0_tx3: port@ab000 { cell-index = <3>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xab000 0x1000>; fsl,qman-channel-id = <0x44>; }; fman0_tx4: port@ac000 { cell-index = <4>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx"; + compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; reg = <0xac000 0x1000>; fsl,qman-channel-id = <0x45>; }; fman0_oh0: port@81000 { cell-index = <0>; compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; reg = <0x81000 0x1000>; fsl,qman-channel-id = <0x46>; }; fman0_oh1: port@82000 { cell-index = <1>; compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; reg = <0x82000 0x1000>; fsl,qman-channel-id = <0x47>; }; fman0_oh2: port@83000 { cell-index = <2>; compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; reg = <0x83000 0x1000>; fsl,qman-channel-id = <0x48>; }; fman0_oh3: port@84000 { cell-index = <3>; compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; reg = <0x84000 0x1000>; fsl,qman-channel-id = <0x49>; }; fman0_oh4: port@85000 { cell-index = <4>; compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; reg = <0x85000 0x1000>; fsl,qman-channel-id = <0x4a>; }; fman0_oh5: port@86000 { cell-index = <5>; compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; reg = <0x86000 0x1000>; fsl,qman-channel-id = <0x4b>; }; fman0_oh6: port@87000 { cell-index = <6>; compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; reg = <0x87000 0x1000>; }; enet0: ethernet@e0000 { cell-index = <0>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe0000 0x1000>; fsl,port-handles = <&fman0_rx0 &fman0_tx0>; ptimer-handle = <&ptp_timer0>; }; mdio0: mdio@e1120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-mdio"; reg = <0xe1120 0xee0>; interrupts = <100 1 0 0>; }; enet1: ethernet@e2000 { cell-index = <1>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe2000 0x1000>; fsl,port-handles = <&fman0_rx1 &fman0_tx1>; ptimer-handle = <&ptp_timer0>; }; mdio@e3120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-tbi"; reg = <0xe3120 0xee0>; interrupts = <100 1 0 0>; }; enet2: ethernet@e4000 { cell-index = <2>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe4000 0x1000>; fsl,port-handles = <&fman0_rx2 &fman0_tx2>; ptimer-handle = <&ptp_timer0>; }; mdio@e5120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-tbi"; reg = <0xe5120 0xee0>; interrupts = <100 1 0 0>; }; enet3: ethernet@e6000 { cell-index = <3>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe6000 0x1000>; fsl,port-handles = <&fman0_rx3 &fman0_tx3>; ptimer-handle = <&ptp_timer0>; }; mdio@e7120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-tbi"; reg = <0xe7120 0xee0>; interrupts = <100 1 0 0>; }; enet4: ethernet@e8000 { cell-index = <4>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac"; + compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; reg = <0xe8000 0x1000>; fsl,port-handles = <&fman0_rx4 &fman0_tx4>; ptimer-handle = <&ptp_timer0>; }; mdio@e9120 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-tbi"; reg = <0xe9120 0xee0>; interrupts = <100 1 0 0>; }; enet5: ethernet@f0000 { cell-index = <0>; - compatible = "fsl,p5020-fman-10g-mac", "fsl,fman-10g-mac"; + compatible = "fsl,p5020-fman-10g-mac", "fsl,fman-10g-mac", "fsl,fman-xgec"; reg = <0xf0000 0x1000>; fsl,port-handles = <&fman0_rx5 &fman0_tx5>; }; mdio@f1000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-xmdio"; reg = <0xf1000 0x1000>; interrupts = <100 1 0 0>; }; ptp_timer0: rtc@fe000 { compatible = "fsl,fman-rtc"; reg = <0xfe000 0x1000>; }; }; }; rapidio@ffe0c0000 { compatible = "fsl,srio"; interrupts = <16 2 1 11>; #address-cells = <2>; #size-cells = <2>; ranges; port1 { #address-cells = <2>; #size-cells = <2>; cell-index = <1>; }; port2 { #address-cells = <2>; #size-cells = <2>; cell-index = <2>; }; }; localbus@ffe124000 { compatible = "fsl,p5020-rev1.0-elbc", "simple-bus", "fsl,elbc"; interrupts = < 25 2 0 0 16 2 1 19 >; #address-cells = <2>; #size-cells = <1>; }; pci0: pcie@ffe200000 { compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; device_type = "pci"; status = "okay"; #size-cells = <2>; #address-cells = <3>; cell-index = <0>; bus-range = <0x0 0xff>; clock-frequency = <0x1fca055>; fsl,msi = <&msi0>; interrupts = <16 2 1 15>; pcie@0 { reg = <0 0 0 0 0>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; device_type = "pci"; interrupts = <16 2 1 15>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = < /* IDSEL 0x0 */ 0000 0 0 1 &mpic 40 1 0 0 0000 0 0 2 &mpic 1 1 0 0 0000 0 0 3 &mpic 2 1 0 0 0000 0 0 4 &mpic 3 1 0 0 >; }; }; pci1: pcie@ffe201000 { compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; device_type = "pci"; status = "disabled"; #size-cells = <2>; #address-cells = <3>; cell-index = <1>; bus-range = <0 0xff>; clock-frequency = <0x1fca055>; fsl,msi = <&msi1>; interrupts = <16 2 1 14>; pcie@0 { reg = <0 0 0 0 0>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; device_type = "pci"; interrupts = <16 2 1 14>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = < /* IDSEL 0x0 */ 0000 0 0 1 &mpic 41 1 0 0 0000 0 0 2 &mpic 5 1 0 0 0000 0 0 3 &mpic 6 1 0 0 0000 0 0 4 &mpic 7 1 0 0 >; }; }; pci2: pcie@ffe202000 { compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; device_type = "pci"; status = "okay"; #size-cells = <2>; #address-cells = <3>; cell-index = <2>; bus-range = <0x0 0xff>; clock-frequency = <0x1fca055>; fsl,msi = <&msi2>; interrupts = <16 2 1 13>; pcie@0 { reg = <0 0 0 0 0>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; device_type = "pci"; interrupts = <16 2 1 13>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = < /* IDSEL 0x0 */ 0000 0 0 1 &mpic 42 1 0 0 0000 0 0 2 &mpic 9 1 0 0 0000 0 0 3 &mpic 10 1 0 0 0000 0 0 4 &mpic 11 1 0 0 >; }; }; pci3: pcie@ffe203000 { compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; device_type = "pci"; status = "disabled"; #size-cells = <2>; #address-cells = <3>; cell-index = <3>; bus-range = <0x0 0xff>; clock-frequency = <0x1fca055>; fsl,msi = <&msi2>; interrupts = <16 2 1 12>; pcie@0 { reg = <0 0 0 0 0>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; device_type = "pci"; interrupts = <16 2 1 12>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = < /* IDSEL 0x0 */ 0000 0 0 1 &mpic 43 1 0 0 0000 0 0 2 &mpic 0 1 0 0 0000 0 0 3 &mpic 4 1 0 0 0000 0 0 4 &mpic 8 1 0 0 >; }; }; }; Index: head/sys/dev/dpaa/dpaa.c =================================================================== --- head/sys/dev/dpaa/dpaa.c (revision 308583) +++ head/sys/dev/dpaa/dpaa.c (nonexistent) @@ -1,184 +0,0 @@ -/*- - * Copyright (c) 2012 Semihalf. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "opt_platform.h" - -static MALLOC_DEFINE(M_DPAA, "dpaa", "dpaa devices information"); - -static int dpaa_probe(device_t dev); -static int dpaa_attach(device_t dev); - -static const struct ofw_bus_devinfo *dpaa_get_devinfo(device_t bus, - device_t child); - -struct dpaa_softc { - -}; - -struct dpaa_devinfo { - struct ofw_bus_devinfo di_ofw; -}; - -static device_method_t dpaa_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, dpaa_probe), - DEVMETHOD(device_attach, dpaa_attach), - DEVMETHOD(device_detach, bus_generic_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* OFW bus interface */ - DEVMETHOD(ofw_bus_get_devinfo, dpaa_get_devinfo), - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - - {0, 0} -}; - -static driver_t dpaa_driver = { - "dpaa", - dpaa_methods, - sizeof(struct dpaa_softc), -}; - -static devclass_t dpaa_devclass; -DRIVER_MODULE_ORDERED(dpaa, ofwbus, dpaa_driver, dpaa_devclass, 0, 0, - SI_ORDER_ANY); - -static int -dpaa_probe(device_t dev) -{ - - if (!ofw_bus_is_compatible(dev, "fsl,dpaa")) - return (ENXIO); - - device_set_desc(dev, "Freescale Data Path Acceleration Architecture"); - - return (BUS_PROBE_DEFAULT); -} - -static int -dpaa_attach(device_t dev) -{ - device_t dev_child; - phandle_t dt_node, dt_child, enet_node; - struct dpaa_devinfo *di; - pcell_t cell_index; - - cell_index = 0; - /* - * Walk dpaa and add direct subordinates as our children. - */ - dt_node = ofw_bus_get_node(dev); - dt_child = OF_child(dt_node); - - for (; dt_child != 0; dt_child = OF_peer(dt_child)) { - - /* Check and process 'status' property. */ - if (!(fdt_is_enabled(dt_child))) - continue; - - di = (struct dpaa_devinfo *)malloc(sizeof(*di), M_DPAA, - M_WAITOK | M_ZERO); - - if (ofw_bus_gen_setup_devinfo(&di->di_ofw, dt_child) != 0) { - free(di, M_DPAA); - device_printf(dev, "could not set up devinfo\n"); - continue; - } - - /* - * dTSEC number from SoC is equal to number get from - * dts file. - */ - if (OF_getprop(dt_child, "fsl,fman-mac", - (void *)&enet_node, sizeof(enet_node)) == -1) { - device_printf(dev, "Could not get fsl,fman-mac " - "from dts\n"); - continue; - } - - if ((enet_node = OF_instance_to_package(enet_node)) == -1) { - device_printf(dev, "Could not get enet node\n"); - continue; - } - - if (OF_getprop(enet_node, "cell-index", - (void *)&cell_index, sizeof(cell_index)) == -1) { - device_printf(dev, "Could not get cell-index from enet " - "node\n"); - continue; - } - - /* Add newbus device for this FDT node */ - dev_child = device_add_child(dev, "dtsec", (int)cell_index); - if (dev_child == NULL) { - device_printf(dev, "could not add child: %s\n", - di->di_ofw.obd_name); - ofw_bus_gen_destroy_devinfo(&di->di_ofw); - free(di, M_DPAA); - continue; - } - -#ifdef DEBUG - device_printf(dev, "added child: %s\n\n", di->di_ofw.obd_name); -#endif - - device_set_ivars(dev_child, di); - } - - return (bus_generic_attach(dev)); -} - -static const struct ofw_bus_devinfo * -dpaa_get_devinfo(device_t bus, device_t child) -{ - struct dpaa_devinfo *di; - - di = device_get_ivars(child); - return (&di->di_ofw); -} Property changes on: head/sys/dev/dpaa/dpaa.c ___________________________________________________________________ Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -FreeBSD=%H \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -text/plain \ No newline at end of property Index: head/sys/dev/dpaa/bman_fdt.c =================================================================== --- head/sys/dev/dpaa/bman_fdt.c (revision 308583) +++ head/sys/dev/dpaa/bman_fdt.c (revision 308584) @@ -1,219 +1,241 @@ /*- * Copyright (c) 2011-2012 Semihalf. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include "opt_platform.h" #include __FBSDID("$FreeBSD$"); #include #include #include #include #include +#include #include #include #include #include #include "bman.h" #include "portals.h" #define FBMAN_DEVSTR "Freescale Buffer Manager" static int bman_fdt_probe(device_t); static device_method_t bman_methods[] = { /* Device interface */ DEVMETHOD(device_probe, bman_fdt_probe), DEVMETHOD(device_attach, bman_attach), DEVMETHOD(device_detach, bman_detach), DEVMETHOD(device_suspend, bman_suspend), DEVMETHOD(device_resume, bman_resume), DEVMETHOD(device_shutdown, bman_shutdown), { 0, 0 } }; static driver_t bman_driver = { "bman", bman_methods, sizeof(struct bman_softc), }; static devclass_t bman_devclass; DRIVER_MODULE(bman, simplebus, bman_driver, bman_devclass, 0, 0); static int bman_fdt_probe(device_t dev) { if (!ofw_bus_is_compatible(dev, "fsl,bman")) return (ENXIO); device_set_desc(dev, FBMAN_DEVSTR); return (BUS_PROBE_DEFAULT); } /* * BMAN Portals */ #define BMAN_PORT_DEVSTR "Freescale Buffer Manager - Portals" static device_probe_t bman_portals_fdt_probe; static device_attach_t bman_portals_fdt_attach; static device_method_t bm_portals_methods[] = { /* Device interface */ DEVMETHOD(device_probe, bman_portals_fdt_probe), DEVMETHOD(device_attach, bman_portals_fdt_attach), DEVMETHOD(device_detach, bman_portals_detach), { 0, 0 } }; static driver_t bm_portals_driver = { "bman-portals", bm_portals_methods, sizeof(struct dpaa_portals_softc), }; static devclass_t bm_portals_devclass; -DRIVER_MODULE(bman_portals, ofwbus, bm_portals_driver, bm_portals_devclass, 0, 0); +EARLY_DRIVER_MODULE(bman_portals, ofwbus, bm_portals_driver, + bm_portals_devclass, 0, 0, BUS_PASS_BUS); static void get_addr_props(phandle_t node, uint32_t *addrp, uint32_t *sizep) { *addrp = 2; *sizep = 1; OF_getencprop(node, "#address-cells", addrp, sizeof(*addrp)); OF_getencprop(node, "#size-cells", sizep, sizeof(*sizep)); } static int bman_portals_fdt_probe(device_t dev) { - if (!ofw_bus_is_compatible(dev, "bman-portals")) + if (!ofw_bus_is_compatible(dev, "fsl,bman-portals")) return (ENXIO); device_set_desc(dev, BMAN_PORT_DEVSTR); return (BUS_PROBE_DEFAULT); } +static phandle_t +bman_portal_find_cpu(int cpu) +{ + phandle_t node; + pcell_t reg; + + node = OF_finddevice("/cpus"); + if (node == -1) + return (node); + + for (node = OF_child(node); node != 0; node = OF_peer(node)) { + if (OF_getprop(node, "reg", ®, sizeof(reg)) <= 0) + continue; + if (reg == cpu) + return (node); + } + return (-1); +} + static int bman_portals_fdt_attach(device_t dev) { struct dpaa_portals_softc *sc; struct resource_list_entry *rle; phandle_t node, child, cpu_node; vm_paddr_t portal_pa; vm_size_t portal_size; uint32_t addr, size; ihandle_t cpu; int cpu_num, cpus, intr_rid; struct dpaa_portals_devinfo di; struct ofw_bus_devinfo ofw_di = {}; cpus = 0; sc = device_get_softc(dev); sc->sc_dev = dev; node = ofw_bus_get_node(dev); get_addr_props(node, &addr, &size); /* Find portals tied to CPUs */ for (child = OF_child(node); child != 0; child = OF_peer(child)) { + if (cpus >= mp_ncpus) + break; if (!ofw_bus_node_is_compatible(child, "fsl,bman-portal")) { continue; } /* Checkout related cpu */ if (OF_getprop(child, "cpu-handle", (void *)&cpu, sizeof(cpu)) <= 0) { - continue; + cpu = bman_portal_find_cpu(cpus); + if (cpu <= 0) + continue; } /* Acquire cpu number */ cpu_node = OF_instance_to_package(cpu); if (OF_getencprop(cpu_node, "reg", &cpu_num, sizeof(cpu_num)) <= 0) { device_printf(dev, "Could not retrieve CPU number.\n"); return (ENXIO); } cpus++; - - if (cpus > MAXCPU) - break; if (ofw_bus_gen_setup_devinfo(&ofw_di, child) != 0) { device_printf(dev, "could not set up devinfo\n"); continue; } resource_list_init(&di.di_res); if (ofw_bus_reg_to_rl(dev, child, addr, size, &di.di_res)) { device_printf(dev, "%s: could not process 'reg' " "property\n", ofw_di.obd_name); ofw_bus_gen_destroy_devinfo(&ofw_di); continue; } if (ofw_bus_intr_to_rl(dev, child, &di.di_res, &intr_rid)) { device_printf(dev, "%s: could not process " "'interrupts' property\n", ofw_di.obd_name); resource_list_free(&di.di_res); ofw_bus_gen_destroy_devinfo(&ofw_di); continue; } di.di_intr_rid = intr_rid; ofw_reg_to_paddr(child, 0, &portal_pa, &portal_size, NULL); rle = resource_list_find(&di.di_res, SYS_RES_MEMORY, 0); if (sc->sc_dp_pa == 0) sc->sc_dp_pa = portal_pa - rle->start; portal_size = rle->end + 1; rle = resource_list_find(&di.di_res, SYS_RES_MEMORY, 1); portal_size = ulmax(rle->end + 1, portal_size); sc->sc_dp_size = ulmax(sc->sc_dp_size, portal_size); if (dpaa_portal_alloc_res(dev, &di, cpu_num)) goto err; } ofw_bus_gen_destroy_devinfo(&ofw_di); return (bman_portals_attach(dev)); err: resource_list_free(&di.di_res); ofw_bus_gen_destroy_devinfo(&ofw_di); bman_portals_detach(dev); return (ENXIO); } Index: head/sys/dev/dpaa/fman.c =================================================================== --- head/sys/dev/dpaa/fman.c (revision 308583) +++ head/sys/dev/dpaa/fman.c (revision 308584) @@ -1,382 +1,410 @@ /*- * Copyright (c) 2011-2012 Semihalf. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include -#include #include #include #include #include "opt_platform.h" #include #include #include #include #include "fman.h" +static MALLOC_DEFINE(M_FMAN, "fman", "fman devices information"); + /** * @group FMan private defines. * @{ */ enum fman_irq_enum { FMAN_IRQ_NUM = 0, FMAN_ERR_IRQ_NUM = 1 }; enum fman_mu_ram_map { FMAN_MURAM_OFF = 0x0, FMAN_MURAM_SIZE = 0x28000 }; struct fman_config { device_t fman_device; uintptr_t mem_base_addr; uintptr_t irq_num; uintptr_t err_irq_num; uint8_t fm_id; t_FmExceptionsCallback *exception_callback; t_FmBusErrorCallback *bus_error_callback; }; /** * @group FMan private methods/members. * @{ */ /** * Frame Manager firmware. * We use the same firmware for both P3041 and P2041 devices. */ const uint32_t fman_firmware[] = FMAN_UC_IMG; const uint32_t fman_firmware_size = sizeof(fman_firmware); static struct fman_softc *fm_sc = NULL; static t_Handle fman_init(struct fman_softc *sc, struct fman_config *cfg) { struct ofw_bus_devinfo obd; phandle_t node; t_FmParams fm_params; t_Handle muram_handle, fm_handle; t_Error error; t_FmRevisionInfo revision_info; uint16_t clock; uint32_t tmp, mod; /* MURAM configuration */ muram_handle = FM_MURAM_ConfigAndInit(cfg->mem_base_addr + FMAN_MURAM_OFF, FMAN_MURAM_SIZE); if (muram_handle == NULL) { device_printf(cfg->fman_device, "couldn't init FM MURAM module" "\n"); return (NULL); } sc->muram_handle = muram_handle; /* Fill in FM configuration */ fm_params.fmId = cfg->fm_id; /* XXX we support only one partition thus each fman has master id */ fm_params.guestId = NCSW_MASTER_ID; fm_params.baseAddr = cfg->mem_base_addr; fm_params.h_FmMuram = muram_handle; /* Get FMan clock in Hz */ if ((tmp = fman_get_clock(sc)) == 0) return (NULL); /* Convert FMan clock to MHz */ clock = (uint16_t)(tmp / 1000000); mod = tmp % 1000000; if (mod >= 500000) ++clock; fm_params.fmClkFreq = clock; fm_params.f_Exception = cfg->exception_callback; fm_params.f_BusError = cfg->bus_error_callback; fm_params.h_App = cfg->fman_device; fm_params.irq = cfg->irq_num; fm_params.errIrq = cfg->err_irq_num; fm_params.firmware.size = fman_firmware_size; fm_params.firmware.p_Code = (uint32_t*)fman_firmware; fm_handle = FM_Config(&fm_params); if (fm_handle == NULL) { device_printf(cfg->fman_device, "couldn't configure FM " "module\n"); goto err; } FM_ConfigResetOnInit(fm_handle, TRUE); error = FM_Init(fm_handle); if (error != E_OK) { device_printf(cfg->fman_device, "couldn't init FM module\n"); goto err2; } error = FM_GetRevision(fm_handle, &revision_info); if (error != E_OK) { device_printf(cfg->fman_device, "couldn't get FM revision\n"); goto err2; } device_printf(cfg->fman_device, "Hardware version: %d.%d.\n", revision_info.majorRev, revision_info.minorRev); /* Initialize the simplebus part of things */ simplebus_init(sc->sc_base.dev, 0); node = ofw_bus_get_node(sc->sc_base.dev); for (node = OF_child(node); node > 0; node = OF_peer(node)) { if (ofw_bus_gen_setup_devinfo(&obd, node) != 0) continue; simplebus_add_device(sc->sc_base.dev, node, 0, NULL, -1, NULL); } return (fm_handle); err2: FM_Free(fm_handle); err: FM_MURAM_Free(muram_handle); return (NULL); } static void fman_exception_callback(t_Handle app_handle, e_FmExceptions exception) { struct fman_softc *sc; sc = app_handle; device_printf(sc->sc_base.dev, "FMan exception occurred.\n"); } static void fman_error_callback(t_Handle app_handle, e_FmPortType port_type, uint8_t port_id, uint64_t addr, uint8_t tnum, uint16_t liodn) { struct fman_softc *sc; sc = app_handle; device_printf(sc->sc_base.dev, "FMan error occurred.\n"); } /** @} */ /** * @group FMan driver interface. * @{ */ int fman_get_handle(t_Handle *fmh) { if (fm_sc == NULL) return (ENOMEM); *fmh = fm_sc->fm_handle; return (0); } int fman_get_muram_handle(t_Handle *muramh) { if (fm_sc == NULL) return (ENOMEM); *muramh = fm_sc->muram_handle; return (0); } int fman_get_bushandle(vm_offset_t *fm_base) { if (fm_sc == NULL) return (ENOMEM); *fm_base = rman_get_bushandle(fm_sc->mem_res); return (0); } int fman_get_dev(device_t *fm_dev) { if (fm_sc == NULL) return (ENOMEM); *fm_dev = fm_sc->sc_base.dev; return (0); } int fman_attach(device_t dev) { struct fman_softc *sc; struct fman_config cfg; + pcell_t qchan_range[2]; + phandle_t node; sc = device_get_softc(dev); sc->sc_base.dev = dev; fm_sc = sc; /* Check if MallocSmart allocator is ready */ if (XX_MallocSmartInit() != E_OK) { device_printf(dev, "could not initialize smart allocator.\n"); return (ENXIO); } XX_TrackInit(); + node = ofw_bus_get_node(dev); + if (OF_getencprop(node, "fsl,qman-channel-range", qchan_range, + sizeof(qchan_range)) <= 0) { + device_printf(dev, "Missing QMan channel range property!\n"); + return (ENXIO); + } + sc->qman_chan_base = qchan_range[0]; + sc->qman_chan_count = qchan_range[1]; sc->mem_rid = 0; sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid, RF_ACTIVE | RF_SHAREABLE); if (!sc->mem_res) { device_printf(dev, "could not allocate memory.\n"); return (ENXIO); } sc->irq_rid = 0; sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid, RF_ACTIVE); if (!sc->irq_res) { device_printf(dev, "could not allocate interrupt.\n"); goto err; } /* * XXX: Fix FMan interrupt. This is workaround for the issue with * interrupts directed to multiple CPUs by the interrupts subsystem. * Workaround is to bind the interrupt to only one CPU0. */ XX_FmanFixIntr(rman_get_start(sc->irq_res)); sc->err_irq_rid = 1; sc->err_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->err_irq_rid, RF_ACTIVE | RF_SHAREABLE); if (!sc->err_irq_res) { device_printf(dev, "could not allocate error interrupt.\n"); goto err; } /* Set FMan configuration */ cfg.fman_device = dev; cfg.fm_id = device_get_unit(dev); cfg.mem_base_addr = rman_get_bushandle(sc->mem_res); cfg.irq_num = (uintptr_t)sc->irq_res; cfg.err_irq_num = (uintptr_t)sc->err_irq_res; cfg.exception_callback = fman_exception_callback; cfg.bus_error_callback = fman_error_callback; sc->fm_handle = fman_init(sc, &cfg); if (sc->fm_handle == NULL) { device_printf(dev, "could not be configured\n"); return (ENXIO); } return (bus_generic_attach(dev)); err: fman_detach(dev); return (ENXIO); } int fman_detach(device_t dev) { struct fman_softc *sc; sc = device_get_softc(dev); if (sc->muram_handle) { FM_MURAM_Free(sc->muram_handle); } if (sc->fm_handle) { FM_Free(sc->fm_handle); } if (sc->mem_res) { bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem_res); } if (sc->irq_res) { bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, sc->irq_res); } if (sc->irq_res) { bus_release_resource(dev, SYS_RES_IRQ, sc->err_irq_rid, sc->err_irq_res); } return (0); } int fman_suspend(device_t dev) { return (0); } int fman_resume(device_t dev) { return (0); } int fman_shutdown(device_t dev) { + + return (0); +} + +int +fman_qman_channel_id(device_t dev, int port) +{ + struct fman_softc *sc; + int qman_port_id[] = {0x31, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, + 0x2f, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07}; + int i; + + sc = device_get_softc(dev); + for (i = 0; i < sc->qman_chan_count; i++) { + if (qman_port_id[i] == port) + return (sc->qman_chan_base + i); + } return (0); } /** @} */ Index: head/sys/dev/dpaa/fman.h =================================================================== --- head/sys/dev/dpaa/fman.h (revision 308583) +++ head/sys/dev/dpaa/fman.h (revision 308584) @@ -1,70 +1,73 @@ /*- * Copyright (c) 2011-2012 Semihalf. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #ifndef FMAN_H_ #define FMAN_H_ #include /** * FMan driver instance data. */ struct fman_softc { struct simplebus_softc sc_base; struct resource *mem_res; struct resource *irq_res; struct resource *err_irq_res; int mem_rid; int irq_rid; int err_irq_rid; + int qman_chan_base; + int qman_chan_count; t_Handle fm_handle; t_Handle muram_handle; }; /** * @group QMan bus interface. * @{ */ int fman_attach(device_t dev); int fman_detach(device_t dev); int fman_suspend(device_t dev); int fman_resume(device_t dev); int fman_shutdown(device_t dev); int fman_read_ivar(device_t dev, device_t child, int index, uintptr_t *result); +int fman_qman_channel_id(device_t, int); /** @} */ uint32_t fman_get_clock(struct fman_softc *sc); int fman_get_handle(t_Handle *fmh); int fman_get_muram_handle(t_Handle *muramh); int fman_get_bushandle(vm_offset_t *fm_base); int fman_get_dev(device_t *fmd); #endif /* FMAN_H_ */ Index: head/sys/dev/dpaa/if_dtsec.c =================================================================== --- head/sys/dev/dpaa/if_dtsec.c (revision 308583) +++ head/sys/dev/dpaa/if_dtsec.c (revision 308584) @@ -1,831 +1,829 @@ /*- * Copyright (c) 2011-2012 Semihalf. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include -#include -#include #include #include #include #include #include #include "miibus_if.h" #include #include #include #include "fman.h" #include "if_dtsec.h" #include "if_dtsec_im.h" #include "if_dtsec_rm.h" /** * @group dTSEC private defines. * @{ */ /** * dTSEC FMan MAC exceptions info struct. */ struct dtsec_fm_mac_ex_str { const int num; const char *str; }; /** @} */ /** * @group FMan MAC routines. * @{ */ #define DTSEC_MAC_EXCEPTIONS_END (-1) /** * FMan MAC exceptions. */ static const struct dtsec_fm_mac_ex_str dtsec_fm_mac_exceptions[] = { { e_FM_MAC_EX_10G_MDIO_SCAN_EVENTMDIO, "MDIO scan event" }, { e_FM_MAC_EX_10G_MDIO_CMD_CMPL, "MDIO command completion" }, { e_FM_MAC_EX_10G_REM_FAULT, "Remote fault" }, { e_FM_MAC_EX_10G_LOC_FAULT, "Local fault" }, { e_FM_MAC_EX_10G_1TX_ECC_ER, "Transmit frame ECC error" }, { e_FM_MAC_EX_10G_TX_FIFO_UNFL, "Transmit FIFO underflow" }, { e_FM_MAC_EX_10G_TX_FIFO_OVFL, "Receive FIFO overflow" }, { e_FM_MAC_EX_10G_TX_ER, "Transmit frame error" }, { e_FM_MAC_EX_10G_RX_FIFO_OVFL, "Receive FIFO overflow" }, { e_FM_MAC_EX_10G_RX_ECC_ER, "Receive frame ECC error" }, { e_FM_MAC_EX_10G_RX_JAB_FRM, "Receive jabber frame" }, { e_FM_MAC_EX_10G_RX_OVRSZ_FRM, "Receive oversized frame" }, { e_FM_MAC_EX_10G_RX_RUNT_FRM, "Receive runt frame" }, { e_FM_MAC_EX_10G_RX_FRAG_FRM, "Receive fragment frame" }, { e_FM_MAC_EX_10G_RX_LEN_ER, "Receive payload length error" }, { e_FM_MAC_EX_10G_RX_CRC_ER, "Receive CRC error" }, { e_FM_MAC_EX_10G_RX_ALIGN_ER, "Receive alignment error" }, { e_FM_MAC_EX_1G_BAB_RX, "Babbling receive error" }, { e_FM_MAC_EX_1G_RX_CTL, "Receive control (pause frame) interrupt" }, { e_FM_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET, "Graceful transmit stop " "complete" }, { e_FM_MAC_EX_1G_BAB_TX, "Babbling transmit error" }, { e_FM_MAC_EX_1G_TX_CTL, "Transmit control (pause frame) interrupt" }, { e_FM_MAC_EX_1G_TX_ERR, "Transmit error" }, { e_FM_MAC_EX_1G_LATE_COL, "Late collision" }, { e_FM_MAC_EX_1G_COL_RET_LMT, "Collision retry limit" }, { e_FM_MAC_EX_1G_TX_FIFO_UNDRN, "Transmit FIFO underrun" }, { e_FM_MAC_EX_1G_MAG_PCKT, "Magic Packet detected when dTSEC is in " "Magic Packet detection mode" }, { e_FM_MAC_EX_1G_MII_MNG_RD_COMPLET, "MII management read completion" }, { e_FM_MAC_EX_1G_MII_MNG_WR_COMPLET, "MII management write completion" }, { e_FM_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET, "Graceful receive stop " "complete" }, { e_FM_MAC_EX_1G_TX_DATA_ERR, "Internal data error on transmit" }, { e_FM_MAC_EX_1G_RX_DATA_ERR, "Internal data error on receive" }, { e_FM_MAC_EX_1G_1588_TS_RX_ERR, "Time-Stamp Receive Error" }, { e_FM_MAC_EX_1G_RX_MIB_CNT_OVFL, "MIB counter overflow" }, { DTSEC_MAC_EXCEPTIONS_END, "" } }; static const char * dtsec_fm_mac_ex_to_str(e_FmMacExceptions exception) { int i; for (i = 0; dtsec_fm_mac_exceptions[i].num != exception && dtsec_fm_mac_exceptions[i].num != DTSEC_MAC_EXCEPTIONS_END; ++i) ; if (dtsec_fm_mac_exceptions[i].num == DTSEC_MAC_EXCEPTIONS_END) return (""); return (dtsec_fm_mac_exceptions[i].str); } static void dtsec_fm_mac_mdio_event_callback(t_Handle h_App, e_FmMacExceptions exception) { struct dtsec_softc *sc; sc = h_App; device_printf(sc->sc_dev, "MDIO event %i: %s.\n", exception, dtsec_fm_mac_ex_to_str(exception)); } static void dtsec_fm_mac_exception_callback(t_Handle app, e_FmMacExceptions exception) { struct dtsec_softc *sc; sc = app; device_printf(sc->sc_dev, "MAC exception %i: %s.\n", exception, dtsec_fm_mac_ex_to_str(exception)); } static void dtsec_fm_mac_free(struct dtsec_softc *sc) { if (sc->sc_mach == NULL) return; FM_MAC_Disable(sc->sc_mach, e_COMM_MODE_RX_AND_TX); FM_MAC_Free(sc->sc_mach); sc->sc_mach = NULL; } static int dtsec_fm_mac_init(struct dtsec_softc *sc, uint8_t *mac) { t_FmMacParams params; t_Error error; memset(¶ms, 0, sizeof(params)); memcpy(¶ms.addr, mac, sizeof(params.addr)); params.baseAddr = sc->sc_fm_base + sc->sc_mac_mem_offset; params.enetMode = sc->sc_mac_enet_mode; params.macId = sc->sc_eth_id; params.mdioIrq = sc->sc_mac_mdio_irq; params.f_Event = dtsec_fm_mac_mdio_event_callback; params.f_Exception = dtsec_fm_mac_exception_callback; params.h_App = sc; params.h_Fm = sc->sc_fmh; sc->sc_mach = FM_MAC_Config(¶ms); if (sc->sc_mach == NULL) { device_printf(sc->sc_dev, "couldn't configure FM_MAC module.\n" ); return (ENXIO); } error = FM_MAC_ConfigResetOnInit(sc->sc_mach, TRUE); if (error != E_OK) { device_printf(sc->sc_dev, "couldn't enable reset on init " "feature.\n"); dtsec_fm_mac_free(sc); return (ENXIO); } /* Do not inform about pause frames */ error = FM_MAC_ConfigException(sc->sc_mach, e_FM_MAC_EX_1G_RX_CTL, FALSE); if (error != E_OK) { device_printf(sc->sc_dev, "couldn't disable pause frames " "exception.\n"); dtsec_fm_mac_free(sc); return (ENXIO); } error = FM_MAC_Init(sc->sc_mach); if (error != E_OK) { device_printf(sc->sc_dev, "couldn't initialize FM_MAC module." "\n"); dtsec_fm_mac_free(sc); return (ENXIO); } return (0); } /** @} */ /** * @group FMan PORT routines. * @{ */ static const char * dtsec_fm_port_ex_to_str(e_FmPortExceptions exception) { switch (exception) { case e_FM_PORT_EXCEPTION_IM_BUSY: return ("IM: RX busy"); default: return (""); } } void dtsec_fm_port_rx_exception_callback(t_Handle app, e_FmPortExceptions exception) { struct dtsec_softc *sc; sc = app; device_printf(sc->sc_dev, "RX exception: %i: %s.\n", exception, dtsec_fm_port_ex_to_str(exception)); } void dtsec_fm_port_tx_exception_callback(t_Handle app, e_FmPortExceptions exception) { struct dtsec_softc *sc; sc = app; device_printf(sc->sc_dev, "TX exception: %i: %s.\n", exception, dtsec_fm_port_ex_to_str(exception)); } e_FmPortType dtsec_fm_port_rx_type(enum eth_dev_type type) { switch (type) { case ETH_DTSEC: return (e_FM_PORT_TYPE_RX); case ETH_10GSEC: return (e_FM_PORT_TYPE_RX_10G); default: return (e_FM_PORT_TYPE_DUMMY); } } e_FmPortType dtsec_fm_port_tx_type(enum eth_dev_type type) { switch (type) { case ETH_DTSEC: return (e_FM_PORT_TYPE_TX); case ETH_10GSEC: return (e_FM_PORT_TYPE_TX_10G); default: return (e_FM_PORT_TYPE_DUMMY); } } static void dtsec_fm_port_free_both(struct dtsec_softc *sc) { if (sc->sc_rxph) { FM_PORT_Free(sc->sc_rxph); sc->sc_rxph = NULL; } if (sc->sc_txph) { FM_PORT_Free(sc->sc_txph); sc->sc_txph = NULL; } } /** @} */ /** * @group IFnet routines. * @{ */ static int dtsec_if_enable_locked(struct dtsec_softc *sc) { int error; DTSEC_LOCK_ASSERT(sc); error = FM_MAC_Enable(sc->sc_mach, e_COMM_MODE_RX_AND_TX); if (error != E_OK) return (EIO); error = FM_PORT_Enable(sc->sc_rxph); if (error != E_OK) return (EIO); error = FM_PORT_Enable(sc->sc_txph); if (error != E_OK) return (EIO); sc->sc_ifnet->if_drv_flags |= IFF_DRV_RUNNING; /* Refresh link state */ dtsec_miibus_statchg(sc->sc_dev); return (0); } static int dtsec_if_disable_locked(struct dtsec_softc *sc) { int error; DTSEC_LOCK_ASSERT(sc); error = FM_MAC_Disable(sc->sc_mach, e_COMM_MODE_RX_AND_TX); if (error != E_OK) return (EIO); error = FM_PORT_Disable(sc->sc_rxph); if (error != E_OK) return (EIO); error = FM_PORT_Disable(sc->sc_txph); if (error != E_OK) return (EIO); sc->sc_ifnet->if_drv_flags &= ~IFF_DRV_RUNNING; return (0); } static int dtsec_if_ioctl(struct ifnet *ifp, u_long command, caddr_t data) { struct dtsec_softc *sc; struct ifreq *ifr; int error; sc = ifp->if_softc; ifr = (struct ifreq *)data; error = 0; /* Basic functionality to achieve media status reports */ switch (command) { case SIOCSIFFLAGS: DTSEC_LOCK(sc); if (sc->sc_ifnet->if_flags & IFF_UP) error = dtsec_if_enable_locked(sc); else error = dtsec_if_disable_locked(sc); DTSEC_UNLOCK(sc); break; case SIOCGIFMEDIA: case SIOCSIFMEDIA: error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii->mii_media, command); break; default: error = ether_ioctl(ifp, command, data); } return (error); } static void dtsec_if_tick(void *arg) { struct dtsec_softc *sc; sc = arg; /* TODO */ DTSEC_LOCK(sc); mii_tick(sc->sc_mii); callout_reset(&sc->sc_tick_callout, hz, dtsec_if_tick, sc); DTSEC_UNLOCK(sc); } static void dtsec_if_deinit_locked(struct dtsec_softc *sc) { DTSEC_LOCK_ASSERT(sc); DTSEC_UNLOCK(sc); callout_drain(&sc->sc_tick_callout); DTSEC_LOCK(sc); } static void dtsec_if_init_locked(struct dtsec_softc *sc) { int error; DTSEC_LOCK_ASSERT(sc); /* Set MAC address */ error = FM_MAC_ModifyMacAddr(sc->sc_mach, (t_EnetAddr *)IF_LLADDR(sc->sc_ifnet)); if (error != E_OK) { device_printf(sc->sc_dev, "couldn't set MAC address.\n"); goto err; } /* Start MII polling */ if (sc->sc_mii) callout_reset(&sc->sc_tick_callout, hz, dtsec_if_tick, sc); if (sc->sc_ifnet->if_flags & IFF_UP) { error = dtsec_if_enable_locked(sc); if (error != 0) goto err; } else { error = dtsec_if_disable_locked(sc); if (error != 0) goto err; } return; err: dtsec_if_deinit_locked(sc); device_printf(sc->sc_dev, "initialization error.\n"); return; } static void dtsec_if_init(void *data) { struct dtsec_softc *sc; sc = data; DTSEC_LOCK(sc); dtsec_if_init_locked(sc); DTSEC_UNLOCK(sc); } static void dtsec_if_start(struct ifnet *ifp) { struct dtsec_softc *sc; sc = ifp->if_softc; DTSEC_LOCK(sc); sc->sc_start_locked(sc); DTSEC_UNLOCK(sc); } static void dtsec_if_watchdog(struct ifnet *ifp) { /* TODO */ } /** @} */ /** * @group IFmedia routines. * @{ */ static int dtsec_ifmedia_upd(struct ifnet *ifp) { struct dtsec_softc *sc = ifp->if_softc; DTSEC_LOCK(sc); mii_mediachg(sc->sc_mii); DTSEC_UNLOCK(sc); return (0); } static void dtsec_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) { struct dtsec_softc *sc = ifp->if_softc; DTSEC_LOCK(sc); mii_pollstat(sc->sc_mii); ifmr->ifm_active = sc->sc_mii->mii_media_active; ifmr->ifm_status = sc->sc_mii->mii_media_status; DTSEC_UNLOCK(sc); } /** @} */ /** * @group dTSEC bus interface. * @{ */ static void dtsec_configure_mode(struct dtsec_softc *sc) { char tunable[64]; snprintf(tunable, sizeof(tunable), "%s.independent_mode", device_get_nameunit(sc->sc_dev)); sc->sc_mode = DTSEC_MODE_REGULAR; TUNABLE_INT_FETCH(tunable, &sc->sc_mode); if (sc->sc_mode == DTSEC_MODE_REGULAR) { sc->sc_port_rx_init = dtsec_rm_fm_port_rx_init; sc->sc_port_tx_init = dtsec_rm_fm_port_tx_init; sc->sc_start_locked = dtsec_rm_if_start_locked; } else { sc->sc_port_rx_init = dtsec_im_fm_port_rx_init; sc->sc_port_tx_init = dtsec_im_fm_port_tx_init; sc->sc_start_locked = dtsec_im_if_start_locked; } device_printf(sc->sc_dev, "Configured for %s mode.\n", (sc->sc_mode == DTSEC_MODE_REGULAR) ? "regular" : "independent"); } int dtsec_attach(device_t dev) { struct dtsec_softc *sc; int error; struct ifnet *ifp; sc = device_get_softc(dev); sc->sc_dev = dev; sc->sc_mac_mdio_irq = NO_IRQ; sc->sc_eth_id = device_get_unit(dev); /* Check if MallocSmart allocator is ready */ if (XX_MallocSmartInit() != E_OK) return (ENXIO); XX_TrackInit(); /* Init locks */ mtx_init(&sc->sc_lock, device_get_nameunit(dev), "DTSEC Global Lock", MTX_DEF); mtx_init(&sc->sc_mii_lock, device_get_nameunit(dev), "DTSEC MII Lock", MTX_DEF); /* Init callouts */ callout_init(&sc->sc_tick_callout, CALLOUT_MPSAFE); /* Read configuraton */ if ((error = fman_get_handle(&sc->sc_fmh)) != 0) return (error); if ((error = fman_get_muram_handle(&sc->sc_muramh)) != 0) return (error); if ((error = fman_get_bushandle(&sc->sc_fm_base)) != 0) return (error); /* Configure working mode */ dtsec_configure_mode(sc); /* If we are working in regular mode configure BMAN and QMAN */ if (sc->sc_mode == DTSEC_MODE_REGULAR) { /* Create RX buffer pool */ error = dtsec_rm_pool_rx_init(sc); if (error != 0) return (EIO); /* Create RX frame queue range */ error = dtsec_rm_fqr_rx_init(sc); if (error != 0) return (EIO); /* Create frame info pool */ error = dtsec_rm_fi_pool_init(sc); if (error != 0) return (EIO); /* Create TX frame queue range */ error = dtsec_rm_fqr_tx_init(sc); if (error != 0) return (EIO); } /* Init FMan MAC module. */ error = dtsec_fm_mac_init(sc, sc->sc_mac_addr); if (error != 0) { dtsec_detach(dev); return (ENXIO); } /* Init FMan TX port */ error = sc->sc_port_tx_init(sc, device_get_unit(sc->sc_dev)); if (error != 0) { dtsec_detach(dev); return (ENXIO); } /* Init FMan RX port */ error = sc->sc_port_rx_init(sc, device_get_unit(sc->sc_dev)); if (error != 0) { dtsec_detach(dev); return (ENXIO); } /* Create network interface for upper layers */ ifp = sc->sc_ifnet = if_alloc(IFT_ETHER); if (ifp == NULL) { device_printf(sc->sc_dev, "if_alloc() failed.\n"); dtsec_detach(dev); return (ENOMEM); } ifp->if_softc = sc; ifp->if_mtu = ETHERMTU; /* TODO: Configure */ ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST; ifp->if_init = dtsec_if_init; ifp->if_start = dtsec_if_start; ifp->if_ioctl = dtsec_if_ioctl; ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; if (sc->sc_phy_addr >= 0) if_initname(ifp, device_get_name(sc->sc_dev), device_get_unit(sc->sc_dev)); else if_initname(ifp, "dtsec_phy", device_get_unit(sc->sc_dev)); /* TODO */ #if 0 IFQ_SET_MAXLEN(&ifp->if_snd, TSEC_TX_NUM_DESC - 1); ifp->if_snd.ifq_drv_maxlen = TSEC_TX_NUM_DESC - 1; IFQ_SET_READY(&ifp->if_snd); #endif ifp->if_capabilities = 0; /* TODO: Check */ ifp->if_capenable = ifp->if_capabilities; /* Attach PHY(s) */ error = mii_attach(sc->sc_dev, &sc->sc_mii_dev, ifp, dtsec_ifmedia_upd, dtsec_ifmedia_sts, BMSR_DEFCAPMASK, sc->sc_phy_addr, MII_OFFSET_ANY, 0); if (error) { device_printf(sc->sc_dev, "attaching PHYs failed: %d\n", error); dtsec_detach(sc->sc_dev); return (error); } sc->sc_mii = device_get_softc(sc->sc_mii_dev); /* Attach to stack */ ether_ifattach(ifp, sc->sc_mac_addr); return (0); } int dtsec_detach(device_t dev) { struct dtsec_softc *sc; if_t ifp; sc = device_get_softc(dev); ifp = sc->sc_ifnet; if (device_is_attached(dev)) { ether_ifdetach(ifp); /* Shutdown interface */ DTSEC_LOCK(sc); dtsec_if_deinit_locked(sc); DTSEC_UNLOCK(sc); } if (sc->sc_ifnet) { if_free(sc->sc_ifnet); sc->sc_ifnet = NULL; } if (sc->sc_mode == DTSEC_MODE_REGULAR) { /* Free RX/TX FQRs */ dtsec_rm_fqr_rx_free(sc); dtsec_rm_fqr_tx_free(sc); /* Free frame info pool */ dtsec_rm_fi_pool_free(sc); /* Free RX buffer pool */ dtsec_rm_pool_rx_free(sc); } dtsec_fm_mac_free(sc); dtsec_fm_port_free_both(sc); /* Destroy lock */ mtx_destroy(&sc->sc_lock); return (0); } int dtsec_suspend(device_t dev) { return (0); } int dtsec_resume(device_t dev) { return (0); } int dtsec_shutdown(device_t dev) { return (0); } /** @} */ /** * @group MII bus interface. * @{ */ int dtsec_miibus_readreg(device_t dev, int phy, int reg) { struct dtsec_softc *sc; sc = device_get_softc(dev); return (MIIBUS_READREG(sc->sc_mdio, phy, reg)); } int dtsec_miibus_writereg(device_t dev, int phy, int reg, int value) { struct dtsec_softc *sc; sc = device_get_softc(dev); return (MIIBUS_WRITEREG(sc->sc_mdio, phy, reg, value)); } void dtsec_miibus_statchg(device_t dev) { struct dtsec_softc *sc; e_EnetSpeed speed; bool duplex; int error; sc = device_get_softc(dev); DTSEC_LOCK_ASSERT(sc); duplex = ((sc->sc_mii->mii_media_active & IFM_GMASK) == IFM_FDX); switch (IFM_SUBTYPE(sc->sc_mii->mii_media_active)) { case IFM_1000_T: case IFM_1000_SX: speed = e_ENET_SPEED_1000; break; case IFM_100_TX: speed = e_ENET_SPEED_100; break; case IFM_10_T: speed = e_ENET_SPEED_10; break; default: speed = e_ENET_SPEED_10; } error = FM_MAC_AdjustLink(sc->sc_mach, speed, duplex); if (error != E_OK) device_printf(sc->sc_dev, "error while adjusting MAC speed.\n"); } /** @} */ Index: head/sys/dev/dpaa/if_dtsec_fdt.c =================================================================== --- head/sys/dev/dpaa/if_dtsec_fdt.c (revision 308583) +++ head/sys/dev/dpaa/if_dtsec_fdt.c (revision 308584) @@ -1,238 +1,230 @@ /*- * Copyright (c) 2012 Semihalf. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "miibus_if.h" #include #include #include "if_dtsec.h" #include "fman.h" static int dtsec_fdt_probe(device_t dev); static int dtsec_fdt_attach(device_t dev); static device_method_t dtsec_methods[] = { /* Device interface */ DEVMETHOD(device_probe, dtsec_fdt_probe), DEVMETHOD(device_attach, dtsec_fdt_attach), DEVMETHOD(device_detach, dtsec_detach), DEVMETHOD(device_shutdown, dtsec_shutdown), DEVMETHOD(device_suspend, dtsec_suspend), DEVMETHOD(device_resume, dtsec_resume), /* Bus interface */ DEVMETHOD(bus_print_child, bus_generic_print_child), DEVMETHOD(bus_driver_added, bus_generic_driver_added), /* MII interface */ DEVMETHOD(miibus_readreg, dtsec_miibus_readreg), DEVMETHOD(miibus_writereg, dtsec_miibus_writereg), DEVMETHOD(miibus_statchg, dtsec_miibus_statchg), { 0, 0 } }; static driver_t dtsec_driver = { "dtsec", dtsec_methods, sizeof(struct dtsec_softc), }; static devclass_t dtsec_devclass; -DRIVER_MODULE(dtsec, dpaa, dtsec_driver, dtsec_devclass, 0, 0); +DRIVER_MODULE(dtsec, fman, dtsec_driver, dtsec_devclass, 0, 0); DRIVER_MODULE(miibus, dtsec, miibus_driver, miibus_devclass, 0, 0); MODULE_DEPEND(dtsec, ether, 1, 1, 1); MODULE_DEPEND(dtsec, miibus, 1, 1, 1); static int dtsec_fdt_probe(device_t dev) { - if (!ofw_bus_is_compatible(dev, "fsl,dpa-ethernet")) + if (!ofw_bus_is_compatible(dev, "fsl,fman-dtsec") && + !ofw_bus_is_compatible(dev, "fsl,fman-xgec")) return (ENXIO); device_set_desc(dev, "Freescale Data Path Triple Speed Ethernet " "Controller"); return (BUS_PROBE_DEFAULT); } static int find_mdio(phandle_t phy_node, device_t mac, device_t *mdio_dev) { device_t bus; while (phy_node > 0) { if (ofw_bus_node_is_compatible(phy_node, "fsl,fman-mdio")) break; phy_node = OF_parent(phy_node); } if (phy_node <= 0) return (ENOENT); - if (fman_get_dev(&bus) < 0) - return (ENOENT); - + bus = device_get_parent(mac); *mdio_dev = ofw_bus_find_child_device_by_phandle(bus, phy_node); return (0); } static int dtsec_fdt_attach(device_t dev) { struct dtsec_softc *sc; - phandle_t node, enet_node, phy_node; + phandle_t enet_node, phy_node; phandle_t fman_rxtx_node[2]; char phy_type[6]; + pcell_t fman_tx_cell; sc = device_get_softc(dev); - node = ofw_bus_get_node(dev); + enet_node = ofw_bus_get_node(dev); - if (OF_getprop(node, "fsl,fman-mac", (void *)&enet_node, - sizeof(enet_node)) == -1) { - device_printf(dev, "Could not load fsl,fman-mac property " - "from DTS\n"); - return (ENXIO); - } - - enet_node = OF_instance_to_package(enet_node); - if (OF_getprop(enet_node, "local-mac-address", (void *)sc->sc_mac_addr, 6) == -1) { device_printf(dev, "Could not load local-mac-addr property from DTS\n"); return (ENXIO); } /* Get link speed */ - if (ofw_bus_node_is_compatible(enet_node, "fsl,fman-1g-mac") != 0) + if (ofw_bus_is_compatible(dev, "fsl,fman-dtsec") != 0) sc->sc_eth_dev_type = ETH_DTSEC; - else if (ofw_bus_node_is_compatible(enet_node, "fsl,fman-10g-mac") != 0) + else if (ofw_bus_is_compatible(dev, "fsl,fman-xgec") != 0) sc->sc_eth_dev_type = ETH_10GSEC; else return(ENXIO); /* Get MAC memory offset in SoC */ if (OF_getprop(enet_node, "reg", (void *)&sc->sc_mac_mem_offset, sizeof(sc->sc_mac_mem_offset)) <= 0) return (ENXIO); /* Get PHY address */ if (OF_getprop(enet_node, "phy-handle", (void *)&phy_node, sizeof(phy_node)) <= 0) return (ENXIO); phy_node = OF_instance_to_package(phy_node); if (OF_getprop(phy_node, "reg", (void *)&sc->sc_phy_addr, sizeof(sc->sc_phy_addr)) <= 0) return (ENXIO); if (find_mdio(phy_node, dev, &sc->sc_mdio) != 0) return (ENXIO); /* Get PHY connection type */ if (OF_getprop(enet_node, "phy-connection-type", (void *)phy_type, sizeof(phy_type)) <= 0) return (ENXIO); if (!strcmp(phy_type, "sgmii")) sc->sc_mac_enet_mode = e_ENET_MODE_SGMII_1000; else if (!strcmp(phy_type, "rgmii")) sc->sc_mac_enet_mode = e_ENET_MODE_RGMII_1000; else if (!strcmp(phy_type, "xgmii")) /* We set 10 Gigabit mode flag however we don't support it */ sc->sc_mac_enet_mode = e_ENET_MODE_XGMII_10000; else return (ENXIO); /* Get RX/TX port handles */ - if (OF_getprop(enet_node, "fsl,port-handles", (void *)fman_rxtx_node, + if (OF_getprop(enet_node, "fsl,fman-ports", (void *)fman_rxtx_node, sizeof(fman_rxtx_node)) <= 0) return (ENXIO); if (fman_rxtx_node[0] == 0) return (ENXIO); if (fman_rxtx_node[1] == 0) return (ENXIO); fman_rxtx_node[0] = OF_instance_to_package(fman_rxtx_node[0]); fman_rxtx_node[1] = OF_instance_to_package(fman_rxtx_node[1]); if (ofw_bus_node_is_compatible(fman_rxtx_node[0], - "fsl,fman-port-1g-rx") == 0) + "fsl,fman-v2-port-rx") == 0) return (ENXIO); if (ofw_bus_node_is_compatible(fman_rxtx_node[1], - "fsl,fman-port-1g-tx") == 0) + "fsl,fman-v2-port-tx") == 0) return (ENXIO); /* Get RX port HW id */ if (OF_getprop(fman_rxtx_node[0], "reg", (void *)&sc->sc_port_rx_hw_id, sizeof(sc->sc_port_rx_hw_id)) <= 0) return (ENXIO); /* Get TX port HW id */ if (OF_getprop(fman_rxtx_node[1], "reg", (void *)&sc->sc_port_tx_hw_id, sizeof(sc->sc_port_tx_hw_id)) <= 0) return (ENXIO); - /* Get QMan channel */ - if (OF_getprop(fman_rxtx_node[1], "fsl,qman-channel-id", - (void *)&sc->sc_port_tx_qman_chan, - sizeof(sc->sc_port_tx_qman_chan)) <= 0) + if (OF_getprop(fman_rxtx_node[1], "cell-index", &fman_tx_cell, + sizeof(fman_tx_cell)) <= 0) return (ENXIO); + /* Get QMan channel */ + sc->sc_port_tx_qman_chan = fman_qman_channel_id(device_get_parent(dev), + fman_tx_cell); return (dtsec_attach(dev)); } Index: head/sys/dev/dpaa/if_dtsec_rm.c =================================================================== --- head/sys/dev/dpaa/if_dtsec_rm.c (revision 308583) +++ head/sys/dev/dpaa/if_dtsec_rm.c (revision 308584) @@ -1,654 +1,655 @@ /*- * Copyright (c) 2012 Semihalf. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "miibus_if.h" #include #include #include #include "fman.h" #include "bman.h" #include "qman.h" #include "if_dtsec.h" #include "if_dtsec_rm.h" /** * @group dTSEC RM private defines. * @{ */ #define DTSEC_BPOOLS_USED (1) #define DTSEC_MAX_TX_QUEUE_LEN 256 struct dtsec_rm_frame_info { struct mbuf *fi_mbuf; t_DpaaSGTE fi_sgt[DPAA_NUM_OF_SG_TABLE_ENTRY]; }; enum dtsec_rm_pool_params { DTSEC_RM_POOL_RX_LOW_MARK = 16, DTSEC_RM_POOL_RX_HIGH_MARK = 64, DTSEC_RM_POOL_RX_MAX_SIZE = 256, DTSEC_RM_POOL_FI_LOW_MARK = 16, DTSEC_RM_POOL_FI_HIGH_MARK = 64, DTSEC_RM_POOL_FI_MAX_SIZE = 256, }; enum dtsec_rm_fqr_params { DTSEC_RM_FQR_RX_CHANNEL = e_QM_FQ_CHANNEL_POOL1, DTSEC_RM_FQR_RX_WQ = 1, DTSEC_RM_FQR_TX_CONF_CHANNEL = e_QM_FQ_CHANNEL_SWPORTAL0, DTSEC_RM_FQR_TX_WQ = 1, DTSEC_RM_FQR_TX_CONF_WQ = 1 }; /** @} */ /** * @group dTSEC Frame Info routines. * @{ */ void dtsec_rm_fi_pool_free(struct dtsec_softc *sc) { if (sc->sc_fi_zone != NULL) uma_zdestroy(sc->sc_fi_zone); } int dtsec_rm_fi_pool_init(struct dtsec_softc *sc) { snprintf(sc->sc_fi_zname, sizeof(sc->sc_fi_zname), "%s: Frame Info", device_get_nameunit(sc->sc_dev)); sc->sc_fi_zone = uma_zcreate(sc->sc_fi_zname, sizeof(struct dtsec_rm_frame_info), NULL, NULL, NULL, NULL, sizeof(void *), 0); if (sc->sc_fi_zone == NULL) return (EIO); return (0); } static struct dtsec_rm_frame_info * dtsec_rm_fi_alloc(struct dtsec_softc *sc) { struct dtsec_rm_frame_info *fi; fi = uma_zalloc(sc->sc_fi_zone, M_NOWAIT); return (fi); } static void dtsec_rm_fi_free(struct dtsec_softc *sc, struct dtsec_rm_frame_info *fi) { XX_UntrackAddress(fi); uma_zfree(sc->sc_fi_zone, fi); } /** @} */ /** * @group dTSEC FMan PORT routines. * @{ */ int dtsec_rm_fm_port_rx_init(struct dtsec_softc *sc, int unit) { t_FmPortParams params; t_FmPortRxParams *rx_params; t_FmPortExtPools *pool_params; t_Error error; memset(¶ms, 0, sizeof(params)); params.baseAddr = sc->sc_fm_base + sc->sc_port_rx_hw_id; params.h_Fm = sc->sc_fmh; params.portType = dtsec_fm_port_rx_type(sc->sc_eth_dev_type); params.portId = sc->sc_eth_id; params.independentModeEnable = FALSE; params.liodnBase = FM_PORT_LIODN_BASE; params.f_Exception = dtsec_fm_port_rx_exception_callback; params.h_App = sc; rx_params = ¶ms.specificParams.rxParams; rx_params->errFqid = sc->sc_rx_fqid; rx_params->dfltFqid = sc->sc_rx_fqid; rx_params->liodnOffset = 0; pool_params = &rx_params->extBufPools; pool_params->numOfPoolsUsed = DTSEC_BPOOLS_USED; pool_params->extBufPool->id = sc->sc_rx_bpid; pool_params->extBufPool->size = FM_PORT_BUFFER_SIZE; sc->sc_rxph = FM_PORT_Config(¶ms); if (sc->sc_rxph == NULL) { device_printf(sc->sc_dev, "couldn't configure FM Port RX.\n"); return (ENXIO); } error = FM_PORT_Init(sc->sc_rxph); if (error != E_OK) { device_printf(sc->sc_dev, "couldn't initialize FM Port RX.\n"); FM_PORT_Free(sc->sc_rxph); return (ENXIO); } if (bootverbose) device_printf(sc->sc_dev, "RX hw port 0x%02x initialized.\n", sc->sc_port_rx_hw_id); return (0); } int dtsec_rm_fm_port_tx_init(struct dtsec_softc *sc, int unit) { t_FmPortParams params; t_FmPortNonRxParams *tx_params; t_Error error; memset(¶ms, 0, sizeof(params)); params.baseAddr = sc->sc_fm_base + sc->sc_port_tx_hw_id; params.h_Fm = sc->sc_fmh; params.portType = dtsec_fm_port_tx_type(sc->sc_eth_dev_type); params.portId = sc->sc_eth_id; params.independentModeEnable = FALSE; params.liodnBase = FM_PORT_LIODN_BASE; params.f_Exception = dtsec_fm_port_tx_exception_callback; params.h_App = sc; tx_params = ¶ms.specificParams.nonRxParams; tx_params->errFqid = sc->sc_tx_conf_fqid; tx_params->dfltFqid = sc->sc_tx_conf_fqid; tx_params->qmChannel = sc->sc_port_tx_qman_chan; #ifdef FM_OP_PARTITION_ERRATA_FMANx8 tx_params->opLiodnOffset = 0; #endif sc->sc_txph = FM_PORT_Config(¶ms); if (sc->sc_txph == NULL) { device_printf(sc->sc_dev, "couldn't configure FM Port TX.\n"); return (ENXIO); } error = FM_PORT_Init(sc->sc_txph); if (error != E_OK) { device_printf(sc->sc_dev, "couldn't initialize FM Port TX.\n"); FM_PORT_Free(sc->sc_txph); return (ENXIO); } if (bootverbose) device_printf(sc->sc_dev, "TX hw port 0x%02x initialized.\n", sc->sc_port_tx_hw_id); return (0); } /** @} */ /** * @group dTSEC buffer pools routines. * @{ */ static t_Error dtsec_rm_pool_rx_put_buffer(t_Handle h_BufferPool, uint8_t *buffer, t_Handle context) { struct dtsec_softc *sc; sc = h_BufferPool; uma_zfree(sc->sc_rx_zone, buffer); return (E_OK); } static uint8_t * dtsec_rm_pool_rx_get_buffer(t_Handle h_BufferPool, t_Handle *context) { struct dtsec_softc *sc; uint8_t *buffer; sc = h_BufferPool; buffer = uma_zalloc(sc->sc_rx_zone, M_NOWAIT); return (buffer); } static void dtsec_rm_pool_rx_depleted(t_Handle h_App, bool in) { struct dtsec_softc *sc; unsigned int count; sc = h_App; if (!in) return; while (1) { count = bman_count(sc->sc_rx_pool); if (count > DTSEC_RM_POOL_RX_HIGH_MARK) return; bman_pool_fill(sc->sc_rx_pool, DTSEC_RM_POOL_RX_HIGH_MARK); } } void dtsec_rm_pool_rx_free(struct dtsec_softc *sc) { if (sc->sc_rx_pool != NULL) bman_pool_destroy(sc->sc_rx_pool); if (sc->sc_rx_zone != NULL) uma_zdestroy(sc->sc_rx_zone); } int dtsec_rm_pool_rx_init(struct dtsec_softc *sc) { /* FM_PORT_BUFFER_SIZE must be less than PAGE_SIZE */ CTASSERT(FM_PORT_BUFFER_SIZE < PAGE_SIZE); snprintf(sc->sc_rx_zname, sizeof(sc->sc_rx_zname), "%s: RX Buffers", device_get_nameunit(sc->sc_dev)); sc->sc_rx_zone = uma_zcreate(sc->sc_rx_zname, FM_PORT_BUFFER_SIZE, NULL, NULL, NULL, NULL, FM_PORT_BUFFER_SIZE, 0); if (sc->sc_rx_zone == NULL) return (EIO); sc->sc_rx_pool = bman_pool_create(&sc->sc_rx_bpid, FM_PORT_BUFFER_SIZE, 0, 0, DTSEC_RM_POOL_RX_MAX_SIZE, dtsec_rm_pool_rx_get_buffer, dtsec_rm_pool_rx_put_buffer, DTSEC_RM_POOL_RX_LOW_MARK, DTSEC_RM_POOL_RX_HIGH_MARK, 0, 0, dtsec_rm_pool_rx_depleted, sc, NULL, NULL); if (sc->sc_rx_pool == NULL) { + device_printf(sc->sc_dev, "NULL rx pool somehow\n"); dtsec_rm_pool_rx_free(sc); return (EIO); } return (0); } /** @} */ /** * @group dTSEC Frame Queue Range routines. * @{ */ static void dtsec_rm_fqr_mext_free(struct mbuf *m, void *buffer, void *arg) { struct dtsec_softc *sc; sc = arg; if (bman_count(sc->sc_rx_pool) <= DTSEC_RM_POOL_RX_MAX_SIZE) bman_put_buffer(sc->sc_rx_pool, buffer); else dtsec_rm_pool_rx_put_buffer(arg, buffer, NULL); } static e_RxStoreResponse dtsec_rm_fqr_rx_callback(t_Handle app, t_Handle fqr, t_Handle portal, uint32_t fqid_off, t_DpaaFD *frame) { struct dtsec_softc *sc; struct mbuf *m; m = NULL; sc = app; KASSERT(DPAA_FD_GET_FORMAT(frame) == e_DPAA_FD_FORMAT_TYPE_SHORT_SBSF, ("%s(): Got unsupported frame format 0x%02X!", __func__, DPAA_FD_GET_FORMAT(frame))); KASSERT(DPAA_FD_GET_OFFSET(frame) == 0, ("%s(): Only offset 0 is supported!", __func__)); if (DPAA_FD_GET_STATUS(frame) != 0) { device_printf(sc->sc_dev, "RX error: 0x%08X\n", DPAA_FD_GET_STATUS(frame)); goto err; } m = m_gethdr(M_NOWAIT, MT_HEADER); if (m == NULL) goto err; m_extadd(m, DPAA_FD_GET_ADDR(frame), FM_PORT_BUFFER_SIZE, dtsec_rm_fqr_mext_free, DPAA_FD_GET_ADDR(frame), sc, 0, EXT_NET_DRV); m->m_pkthdr.rcvif = sc->sc_ifnet; m->m_len = DPAA_FD_GET_LENGTH(frame); m_fixhdr(m); (*sc->sc_ifnet->if_input)(sc->sc_ifnet, m); return (e_RX_STORE_RESPONSE_CONTINUE); err: bman_put_buffer(sc->sc_rx_pool, DPAA_FD_GET_ADDR(frame)); if (m != NULL) m_freem(m); return (e_RX_STORE_RESPONSE_CONTINUE); } static e_RxStoreResponse dtsec_rm_fqr_tx_confirm_callback(t_Handle app, t_Handle fqr, t_Handle portal, uint32_t fqid_off, t_DpaaFD *frame) { struct dtsec_rm_frame_info *fi; struct dtsec_softc *sc; unsigned int qlen; t_DpaaSGTE *sgt0; sc = app; if (DPAA_FD_GET_STATUS(frame) != 0) device_printf(sc->sc_dev, "TX error: 0x%08X\n", DPAA_FD_GET_STATUS(frame)); /* * We are storing struct dtsec_rm_frame_info in first entry * of scatter-gather table. */ sgt0 = DPAA_FD_GET_ADDR(frame); fi = DPAA_SGTE_GET_ADDR(sgt0); /* Free transmitted frame */ m_freem(fi->fi_mbuf); dtsec_rm_fi_free(sc, fi); qlen = qman_fqr_get_counter(sc->sc_tx_conf_fqr, 0, e_QM_FQR_COUNTERS_FRAME); if (qlen == 0) { DTSEC_LOCK(sc); if (sc->sc_tx_fqr_full) { sc->sc_tx_fqr_full = 0; dtsec_rm_if_start_locked(sc); } DTSEC_UNLOCK(sc); } return (e_RX_STORE_RESPONSE_CONTINUE); } void dtsec_rm_fqr_rx_free(struct dtsec_softc *sc) { if (sc->sc_rx_fqr) qman_fqr_free(sc->sc_rx_fqr); } int dtsec_rm_fqr_rx_init(struct dtsec_softc *sc) { t_Error error; t_Handle fqr; /* Default Frame Queue */ fqr = qman_fqr_create(1, DTSEC_RM_FQR_RX_CHANNEL, DTSEC_RM_FQR_RX_WQ, FALSE, 0, FALSE, FALSE, TRUE, FALSE, 0, 0, 0); if (fqr == NULL) { device_printf(sc->sc_dev, "could not create default RX queue" "\n"); return (EIO); } sc->sc_rx_fqr = fqr; sc->sc_rx_fqid = qman_fqr_get_base_fqid(fqr); error = qman_fqr_register_cb(fqr, dtsec_rm_fqr_rx_callback, sc); if (error != E_OK) { device_printf(sc->sc_dev, "could not register RX callback\n"); dtsec_rm_fqr_rx_free(sc); return (EIO); } return (0); } void dtsec_rm_fqr_tx_free(struct dtsec_softc *sc) { if (sc->sc_tx_fqr) qman_fqr_free(sc->sc_tx_fqr); if (sc->sc_tx_conf_fqr) qman_fqr_free(sc->sc_tx_conf_fqr); } int dtsec_rm_fqr_tx_init(struct dtsec_softc *sc) { t_Error error; t_Handle fqr; /* TX Frame Queue */ fqr = qman_fqr_create(1, sc->sc_port_tx_qman_chan, DTSEC_RM_FQR_TX_WQ, FALSE, 0, FALSE, FALSE, TRUE, FALSE, 0, 0, 0); if (fqr == NULL) { device_printf(sc->sc_dev, "could not create default TX queue" "\n"); return (EIO); } sc->sc_tx_fqr = fqr; /* TX Confirmation Frame Queue */ fqr = qman_fqr_create(1, DTSEC_RM_FQR_TX_CONF_CHANNEL, DTSEC_RM_FQR_TX_CONF_WQ, FALSE, 0, FALSE, FALSE, TRUE, FALSE, 0, 0, 0); if (fqr == NULL) { device_printf(sc->sc_dev, "could not create TX confirmation " "queue\n"); dtsec_rm_fqr_tx_free(sc); return (EIO); } sc->sc_tx_conf_fqr = fqr; sc->sc_tx_conf_fqid = qman_fqr_get_base_fqid(fqr); error = qman_fqr_register_cb(fqr, dtsec_rm_fqr_tx_confirm_callback, sc); if (error != E_OK) { device_printf(sc->sc_dev, "could not register TX confirmation " "callback\n"); dtsec_rm_fqr_tx_free(sc); return (EIO); } return (0); } /** @} */ /** * @group dTSEC IFnet routines. * @{ */ void dtsec_rm_if_start_locked(struct dtsec_softc *sc) { vm_size_t dsize, psize, ssize; struct dtsec_rm_frame_info *fi; unsigned int qlen, i; struct mbuf *m0, *m; vm_offset_t vaddr; vm_paddr_t paddr; t_DpaaFD fd; DTSEC_LOCK_ASSERT(sc); /* TODO: IFF_DRV_OACTIVE */ if ((sc->sc_mii->mii_media_status & IFM_ACTIVE) == 0) return; if ((sc->sc_ifnet->if_drv_flags & IFF_DRV_RUNNING) != IFF_DRV_RUNNING) return; while (!IFQ_DRV_IS_EMPTY(&sc->sc_ifnet->if_snd)) { /* Check length of the TX queue */ qlen = qman_fqr_get_counter(sc->sc_tx_fqr, 0, e_QM_FQR_COUNTERS_FRAME); if (qlen >= DTSEC_MAX_TX_QUEUE_LEN) { sc->sc_tx_fqr_full = 1; return; } fi = dtsec_rm_fi_alloc(sc); if (fi == NULL) return; IFQ_DRV_DEQUEUE(&sc->sc_ifnet->if_snd, m0); if (m0 == NULL) { dtsec_rm_fi_free(sc, fi); return; } i = 0; m = m0; psize = 0; dsize = 0; fi->fi_mbuf = m0; while (m && i < DPAA_NUM_OF_SG_TABLE_ENTRY) { if (m->m_len == 0) continue; /* * First entry in scatter-gather table is used to keep * pointer to frame info structure. */ DPAA_SGTE_SET_ADDR(&fi->fi_sgt[i], (void *)fi); DPAA_SGTE_SET_LENGTH(&fi->fi_sgt[i], 0); DPAA_SGTE_SET_EXTENSION(&fi->fi_sgt[i], 0); DPAA_SGTE_SET_FINAL(&fi->fi_sgt[i], 0); DPAA_SGTE_SET_BPID(&fi->fi_sgt[i], 0); DPAA_SGTE_SET_OFFSET(&fi->fi_sgt[i], 0); i++; dsize = m->m_len; vaddr = (vm_offset_t)m->m_data; while (dsize > 0 && i < DPAA_NUM_OF_SG_TABLE_ENTRY) { paddr = XX_VirtToPhys((void *)vaddr); ssize = PAGE_SIZE - (paddr & PAGE_MASK); if (m->m_len < ssize) ssize = m->m_len; DPAA_SGTE_SET_ADDR(&fi->fi_sgt[i], (void *)vaddr); DPAA_SGTE_SET_LENGTH(&fi->fi_sgt[i], ssize); DPAA_SGTE_SET_EXTENSION(&fi->fi_sgt[i], 0); DPAA_SGTE_SET_FINAL(&fi->fi_sgt[i], 0); DPAA_SGTE_SET_BPID(&fi->fi_sgt[i], 0); DPAA_SGTE_SET_OFFSET(&fi->fi_sgt[i], 0); dsize -= ssize; vaddr += ssize; psize += ssize; i++; } if (dsize > 0) break; m = m->m_next; } /* Check if SG table was constructed properly */ if (m != NULL || dsize != 0) { dtsec_rm_fi_free(sc, fi); m_freem(m0); continue; } DPAA_SGTE_SET_FINAL(&fi->fi_sgt[i-1], 1); DPAA_FD_SET_ADDR(&fd, fi->fi_sgt); DPAA_FD_SET_LENGTH(&fd, psize); DPAA_FD_SET_FORMAT(&fd, e_DPAA_FD_FORMAT_TYPE_SHORT_MBSF); DPAA_FD_SET_DD(&fd, 0); DPAA_FD_SET_PID(&fd, 0); DPAA_FD_SET_BPID(&fd, 0); DPAA_FD_SET_OFFSET(&fd, 0); DPAA_FD_SET_STATUS(&fd, 0); DTSEC_UNLOCK(sc); if (qman_fqr_enqueue(sc->sc_tx_fqr, 0, &fd) != E_OK) { dtsec_rm_fi_free(sc, fi); m_freem(m0); } DTSEC_LOCK(sc); } } /** @} */ Index: head/sys/dev/dpaa/qman_fdt.c =================================================================== --- head/sys/dev/dpaa/qman_fdt.c (revision 308583) +++ head/sys/dev/dpaa/qman_fdt.c (revision 308584) @@ -1,219 +1,258 @@ /*- * Copyright (c) 2011-2012 Semihalf. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include "opt_platform.h" #include __FBSDID("$FreeBSD$"); #include #include #include #include #include +#include #include #include #include #include #include "qman.h" #include "portals.h" #define FBMAN_DEVSTR "Freescale Queue Manager" static int qman_fdt_probe(device_t); static device_method_t qman_methods[] = { /* Device interface */ DEVMETHOD(device_probe, qman_fdt_probe), DEVMETHOD(device_attach, qman_attach), DEVMETHOD(device_detach, qman_detach), DEVMETHOD(device_suspend, qman_suspend), DEVMETHOD(device_resume, qman_resume), DEVMETHOD(device_shutdown, qman_shutdown), { 0, 0 } }; static driver_t qman_driver = { "qman", qman_methods, sizeof(struct qman_softc), }; static devclass_t qman_devclass; DRIVER_MODULE(qman, simplebus, qman_driver, qman_devclass, 0, 0); static int qman_fdt_probe(device_t dev) { if (!ofw_bus_is_compatible(dev, "fsl,qman")) return (ENXIO); device_set_desc(dev, FBMAN_DEVSTR); return (BUS_PROBE_DEFAULT); } /* * BMAN Portals */ #define BMAN_PORT_DEVSTR "Freescale Queue Manager - Portals" static device_probe_t qman_portals_fdt_probe; static device_attach_t qman_portals_fdt_attach; static device_method_t qm_portals_methods[] = { /* Device interface */ DEVMETHOD(device_probe, qman_portals_fdt_probe), DEVMETHOD(device_attach, qman_portals_fdt_attach), DEVMETHOD(device_detach, qman_portals_detach), { 0, 0 } }; static driver_t qm_portals_driver = { "qman-portals", qm_portals_methods, sizeof(struct dpaa_portals_softc), }; static devclass_t qm_portals_devclass; -DRIVER_MODULE(qman_portals, ofwbus, qm_portals_driver, qm_portals_devclass, 0, 0); +EARLY_DRIVER_MODULE(qman_portals, ofwbus, qm_portals_driver, + qm_portals_devclass, 0, 0, BUS_PASS_BUS); static void get_addr_props(phandle_t node, uint32_t *addrp, uint32_t *sizep) { *addrp = 2; *sizep = 1; OF_getencprop(node, "#address-cells", addrp, sizeof(*addrp)); OF_getencprop(node, "#size-cells", sizep, sizeof(*sizep)); } static int qman_portals_fdt_probe(device_t dev) { - if (!ofw_bus_is_compatible(dev, "qman-portals")) + if (!ofw_bus_is_compatible(dev, "fsl,qman-portals")) return (ENXIO); device_set_desc(dev, BMAN_PORT_DEVSTR); return (BUS_PROBE_DEFAULT); } +static phandle_t +qman_portal_find_cpu(int cpu) +{ + phandle_t node; + pcell_t reg; + + node = OF_finddevice("/cpus"); + if (node == -1) + return (-1); + + for (node = OF_child(node); node != 0; node = OF_peer(node)) { + if (OF_getprop(node, "reg", ®, sizeof(reg)) <= 0) + continue; + if (reg == cpu) + return (node); + } + return (-1); +} + static int qman_portals_fdt_attach(device_t dev) { struct dpaa_portals_softc *sc; - struct resource_list_entry *rle; phandle_t node, child, cpu_node; - vm_paddr_t portal_pa; + vm_paddr_t portal_pa, portal_par_pa; vm_size_t portal_size; - uint32_t addr, size; + uint32_t addr, paddr, size; ihandle_t cpu; int cpu_num, cpus, intr_rid; struct dpaa_portals_devinfo di; struct ofw_bus_devinfo ofw_di = {}; + cell_t *range; + int nrange; + int i; cpus = 0; sc = device_get_softc(dev); sc->sc_dev = dev; node = ofw_bus_get_node(dev); + + /* Get this node's range */ + get_addr_props(ofw_bus_get_node(device_get_parent(dev)), &paddr, &size); get_addr_props(node, &addr, &size); + nrange = OF_getencprop_alloc(node, "ranges", + sizeof(*range), (void **)&range); + if (nrange < addr + paddr + size) + return (ENXIO); + portal_pa = portal_par_pa = 0; + portal_size = 0; + for (i = 0; i < addr; i++) { + portal_pa <<= 32; + portal_pa |= range[i]; + } + for (; i < paddr + addr; i++) { + portal_par_pa <<= 32; + portal_par_pa |= range[i]; + } + portal_pa += portal_par_pa; + for (; i < size + paddr + addr; i++) { + portal_size = (uintmax_t)portal_size << 32; + portal_size |= range[i]; + } + OF_prop_free(range); + sc->sc_dp_size = portal_size; + sc->sc_dp_pa = portal_pa; + /* Find portals tied to CPUs */ for (child = OF_child(node); child != 0; child = OF_peer(child)) { + if (cpus >= mp_ncpus) + break; if (!ofw_bus_node_is_compatible(child, "fsl,qman-portal")) { continue; } /* Checkout related cpu */ if (OF_getprop(child, "cpu-handle", (void *)&cpu, sizeof(cpu)) <= 0) { - continue; + cpu = qman_portal_find_cpu(cpus); + if (cpu <= 0) + continue; } /* Acquire cpu number */ cpu_node = OF_instance_to_package(cpu); if (OF_getencprop(cpu_node, "reg", &cpu_num, sizeof(cpu_num)) <= 0) { device_printf(dev, "Could not retrieve CPU number.\n"); return (ENXIO); } cpus++; - if (cpus > MAXCPU) - break; - if (ofw_bus_gen_setup_devinfo(&ofw_di, child) != 0) { device_printf(dev, "could not set up devinfo\n"); continue; } resource_list_init(&di.di_res); if (ofw_bus_reg_to_rl(dev, child, addr, size, &di.di_res)) { device_printf(dev, "%s: could not process 'reg' " "property\n", ofw_di.obd_name); ofw_bus_gen_destroy_devinfo(&ofw_di); continue; } if (ofw_bus_intr_to_rl(dev, child, &di.di_res, &intr_rid)) { device_printf(dev, "%s: could not process " "'interrupts' property\n", ofw_di.obd_name); resource_list_free(&di.di_res); ofw_bus_gen_destroy_devinfo(&ofw_di); continue; } di.di_intr_rid = intr_rid; - - ofw_reg_to_paddr(child, 0, &portal_pa, &portal_size, NULL); - rle = resource_list_find(&di.di_res, SYS_RES_MEMORY, 0); - - if (sc->sc_dp_pa == 0) - sc->sc_dp_pa = portal_pa - rle->start; - - portal_size = rle->end + 1; - rle = resource_list_find(&di.di_res, SYS_RES_MEMORY, 1); - portal_size = ulmax(rle->end + 1, portal_size); - sc->sc_dp_size = ulmax(sc->sc_dp_size, portal_size); if (dpaa_portal_alloc_res(dev, &di, cpu_num)) goto err; } ofw_bus_gen_destroy_devinfo(&ofw_di); return (qman_portals_attach(dev)); err: resource_list_free(&di.di_res); ofw_bus_gen_destroy_devinfo(&ofw_di); qman_portals_detach(dev); return (ENXIO); } Index: head/sys/powerpc/conf/dpaa/files.dpaa =================================================================== --- head/sys/powerpc/conf/dpaa/files.dpaa (revision 308583) +++ head/sys/powerpc/conf/dpaa/files.dpaa (revision 308584) @@ -1,107 +1,105 @@ # $FreeBSD$ # NetCommSw drivers contrib/ncsw/etc/error.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/etc/list.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/etc/memcpy.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/etc/mm.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/etc/ncsw_mem.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/etc/sprint.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/BM/bm.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/BM/bman_low.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/BM/bm_pool.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/BM/bm_portal.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/Rtc/fm_rtc.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/Port/fm_port.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/Port/fm_port_im.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/Pcd/fm_cc.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/Pcd/fm_kg.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/Pcd/fm_manip.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/Pcd/fm_pcd.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/Pcd/fm_plcr.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/Pcd/fm_prs.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/MAC/dtsec.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/MAC/dtsec_mii_acc.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/MAC/fm_mac.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/MAC/tgec.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/MAC/tgec_mii_acc.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/HC/hc.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/fm_muram.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/fm_guest.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/FM/fm.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/QM/qm.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/Peripherals/QM/qm_portal_fqr.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/user/env/stdlib.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/user/env/xx.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" contrib/ncsw/user/env/core.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" # FreeBSD Wrappers -dev/dpaa/dpaa.c optional dpaa fdt \ - no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/portals_common.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/bman_portals.c optional dpaa fdt \ no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/bman.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/bman_fdt.c optional dpaa fdt \ no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/qman_portals.c optional dpaa fdt \ no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/qman.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/qman_fdt.c optional dpaa fdt \ no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/fman.c optional dpaa fdt \ no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/fman_mdio.c optional dpaa fdt \ no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/fman_fdt.c optional dpaa fdt \ no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/if_dtsec.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/if_dtsec_im.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/if_dtsec_rm.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/if_dtsec_fdt.c optional dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" # Examples dev/dpaa/bman-example.c optional bman_example dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}" dev/dpaa/qman-example.c optional qman_example dpaa \ no-depend compile-with "${DPAA_COMPILE_CMD}"