Index: head/sys/arm/annapurna/alpine/alpine_pci_msix.c =================================================================== --- head/sys/arm/annapurna/alpine/alpine_pci_msix.c (nonexistent) +++ head/sys/arm/annapurna/alpine/alpine_pci_msix.c (revision 307668) @@ -0,0 +1,394 @@ +/*- + * Copyright (c) 2015,2016 Annapurna Labs Ltd. and affiliates + * All rights reserved. + * + * Developed by Semihalf. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "msi_if.h" +#include "pic_if.h" + +#define AL_SPI_INTR 0 +#define AL_EDGE_HIGH 1 +#define ERR_NOT_IN_MAP -1 +#define IRQ_OFFSET 1 +#define GIC_INTR_CELL_CNT 3 +#define INTR_RANGE_COUNT 2 +#define MAX_MSIX_COUNT 160 + +static int al_msix_attach(device_t); +static int al_msix_probe(device_t); + +static msi_alloc_msi_t al_msix_alloc_msi; +static msi_release_msi_t al_msix_release_msi; +static msi_alloc_msix_t al_msix_alloc_msix; +static msi_release_msix_t al_msix_release_msix; +static msi_map_msi_t al_msix_map_msi; + +static int al_find_intr_pos_in_map(device_t, struct intr_irqsrc *); + +static struct ofw_compat_data compat_data[] = { + {"annapurna-labs,al-msix", true}, + {"annapurna-labs,alpine-msix", true}, + {NULL, false} +}; + +/* + * Bus interface definitions. + */ +static device_method_t al_msix_methods[] = { + DEVMETHOD(device_probe, al_msix_probe), + DEVMETHOD(device_attach, al_msix_attach), + + /* Interrupt controller interface */ + DEVMETHOD(msi_alloc_msi, al_msix_alloc_msi), + DEVMETHOD(msi_release_msi, al_msix_release_msi), + DEVMETHOD(msi_alloc_msix, al_msix_alloc_msix), + DEVMETHOD(msi_release_msix, al_msix_release_msix), + DEVMETHOD(msi_map_msi, al_msix_map_msi), + + DEVMETHOD_END +}; + +struct al_msix_softc { + bus_addr_t base_addr; + struct resource *res; + uint32_t irq_min; + uint32_t irq_max; + uint32_t irq_count; + struct mtx msi_mtx; + vmem_t *irq_alloc; + device_t gic_dev; + /* Table of isrcs maps isrc pointer to vmem_alloc'd irq number */ + struct intr_irqsrc *isrcs[MAX_MSIX_COUNT]; +}; + +static driver_t al_msix_driver = { + "al_msix", + al_msix_methods, + sizeof(struct al_msix_softc), +}; + +devclass_t al_msix_devclass; + +DRIVER_MODULE(al_msix, ofwbus, al_msix_driver, al_msix_devclass, 0, 0); +DRIVER_MODULE(al_msix, simplebus, al_msix_driver, al_msix_devclass, 0, 0); + +MALLOC_DECLARE(M_AL_MSIX); +MALLOC_DEFINE(M_AL_MSIX, "al_msix", "Alpine MSIX"); + +static int +al_msix_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) + return (ENXIO); + + device_set_desc(dev, "Annapurna-Labs MSI-X Controller"); + return (BUS_PROBE_DEFAULT); +} + +static int +al_msix_attach(device_t dev) +{ + struct al_msix_softc *sc; + device_t gic_dev; + phandle_t iparent; + phandle_t node; + intptr_t xref; + int interrupts[INTR_RANGE_COUNT]; + int nintr, i, rid; + uint32_t icells, *intr; + + sc = device_get_softc(dev); + + node = ofw_bus_get_node(dev); + xref = OF_xref_from_node(node); + OF_device_register_xref(xref, dev); + + rid = 0; + sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); + if (sc->res == NULL) { + device_printf(dev, "Failed to allocate resource\n"); + return (ENXIO); + } + + sc->base_addr = (bus_addr_t)rman_get_start(sc->res); + + /* Register this device to handle MSI interrupts */ + if (intr_msi_register(dev, xref) != 0) { + device_printf(dev, "could not register MSI-X controller\n"); + return (ENXIO); + } + else + device_printf(dev, "MSI-X controller registered\n"); + + /* Find root interrupt controller */ + iparent = ofw_bus_find_iparent(node); + if (iparent == 0) { + device_printf(dev, "No interrupt-parrent found. " + "Error in DTB\n"); + return (ENXIO); + } else { + /* While at parent - store interrupt cells prop */ + if (OF_searchencprop(OF_node_from_xref(iparent), + "#interrupt-cells", &icells, sizeof(icells)) == -1) { + device_printf(dev, "DTB: Missing #interrupt-cells " + "property in GIC node\n"); + return (ENXIO); + } + } + + gic_dev = OF_device_from_xref(iparent); + if (gic_dev == NULL) { + device_printf(dev, "Cannot find GIC device\n"); + return (ENXIO); + } + sc->gic_dev = gic_dev; + + /* Manually read range of interrupts from DTB */ + nintr = OF_getencprop_alloc(node, "interrupts", sizeof(*intr), + (void **)&intr); + if (nintr == 0) { + device_printf(dev, "Cannot read interrupts prop from DTB\n"); + return (ENXIO); + } else if ((nintr / icells) != INTR_RANGE_COUNT) { + /* Supposed to have min and max value only */ + device_printf(dev, "Unexpected count of interrupts " + "in DTB node\n"); + return (EINVAL); + } + + /* Read interrupt range values */ + for (i = 0; i < INTR_RANGE_COUNT; i++) + interrupts[i] = intr[(i * icells) + IRQ_OFFSET]; + + sc->irq_min = interrupts[0]; + sc->irq_max = interrupts[1]; + sc->irq_count = (sc->irq_max - sc->irq_min + 1); + + if (sc->irq_count > MAX_MSIX_COUNT) { + device_printf(dev, "Available MSI-X count exceeds buffer size." + " Capping to %d\n", MAX_MSIX_COUNT); + sc->irq_count = MAX_MSIX_COUNT; + } + + mtx_init(&sc->msi_mtx, "msi_mtx", NULL, MTX_DEF); + + sc->irq_alloc = vmem_create("Alpine MSI-X IRQs", 0, sc->irq_count, + 1, 0, M_FIRSTFIT | M_WAITOK); + + device_printf(dev, "MSI-X SPI IRQ %d-%d\n", sc->irq_min, sc->irq_max); + + return (bus_generic_attach(dev)); +} + +static int +al_find_intr_pos_in_map(device_t dev, struct intr_irqsrc *isrc) +{ + struct al_msix_softc *sc; + int i; + + sc = device_get_softc(dev); + for (i = 0; i < MAX_MSIX_COUNT; i++) + if (sc->isrcs[i] == isrc) + return (i); + return (ERR_NOT_IN_MAP); +} + +static int +al_msix_map_msi(device_t dev, device_t child, struct intr_irqsrc *isrc, + uint64_t *addr, uint32_t *data) +{ + struct al_msix_softc *sc; + int i, spi; + + sc = device_get_softc(dev); + + i = al_find_intr_pos_in_map(dev, isrc); + if (i == ERR_NOT_IN_MAP) + return (EINVAL); + + spi = sc->irq_min + i; + + /* + * MSIX message address format: + * [63:20] - MSIx TBAR + * Same value as the MSIx Translation Base Address Register + * [19] - WFE_EXIT + * Once set by MSIx message, an EVENTI is signal to the CPUs + * cluster specified by ‘Local GIC Target List’ + * [18:17] - Target GIC ID + * Specifies which IO-GIC (external shared GIC) is targeted + * 0: Local GIC, as specified by the Local GIC Target List + * 1: IO-GIC 0 + * 2: Reserved + * 3: Reserved + * [16:13] - Local GIC Target List + * Specifies the Local GICs list targeted by this MSIx + * message. + * [16] If set, SPIn is set in Cluster 0 local GIC + * [15:13] Reserved + * [15] If set, SPIn is set in Cluster 1 local GIC + * [14] If set, SPIn is set in Cluster 2 local GIC + * [13] If set, SPIn is set in Cluster 3 local GIC + * [12:3] - SPIn + * Specifies the SPI (Shared Peripheral Interrupt) index to + * be set in target GICs + * Notes: + * If targeting any local GIC than only SPI[249:0] are valid + * [2] - Function vector + * MSI Data vector extension hint + * [1:0] - Reserved + * Must be set to zero + */ + *addr = (uint64_t)sc->base_addr + (uint64_t)((1 << 16) + (spi << 3)); + *data = 0; + + if (bootverbose) + device_printf(dev, "MSI mapping: SPI: %d addr: %jx data: %x\n", + spi, (uintmax_t)*addr, *data); + return (0); +} + +static int +al_msix_alloc_msi(device_t dev, device_t child, int count, int maxcount, + device_t *pic, struct intr_irqsrc **srcs) +{ + struct intr_map_data_fdt *fdt_data; + struct al_msix_softc *sc; + vmem_addr_t irq_base; + int error; + u_int i, j; + + sc = device_get_softc(dev); + + if ((powerof2(count) == 0) || (count > 8)) + return (EINVAL); + + if (vmem_alloc(sc->irq_alloc, count, M_FIRSTFIT | M_NOWAIT, + &irq_base) != 0) + return (ENOMEM); + + /* Fabricate OFW data to get ISRC from GIC and return it */ + fdt_data = malloc(sizeof(*fdt_data) + + GIC_INTR_CELL_CNT * sizeof(pcell_t), M_AL_MSIX, M_WAITOK); + fdt_data->hdr.type = INTR_MAP_DATA_FDT; + fdt_data->iparent = 0; + fdt_data->ncells = GIC_INTR_CELL_CNT; + fdt_data->cells[0] = AL_SPI_INTR; /* code for SPI interrupt */ + fdt_data->cells[1] = 0; /* SPI number (uninitialized) */ + fdt_data->cells[2] = AL_EDGE_HIGH; /* trig = edge, pol = high */ + + mtx_lock(&sc->msi_mtx); + + for (i = irq_base; i < irq_base + count; i++) { + fdt_data->cells[1] = sc->irq_min + i; + error = PIC_MAP_INTR(sc->gic_dev, + (struct intr_map_data *)fdt_data, srcs); + if (error) { + for (j = irq_base; j < i; j++) + sc->isrcs[j] = NULL; + mtx_unlock(&sc->msi_mtx); + vmem_free(sc->irq_alloc, irq_base, count); + free(fdt_data, M_AL_MSIX); + return (error); + } + + sc->isrcs[i] = *srcs; + srcs++; + } + + mtx_unlock(&sc->msi_mtx); + free(fdt_data, M_AL_MSIX); + + if (bootverbose) + device_printf(dev, + "MSI-X allocation: start SPI %d, count %d\n", + (int)irq_base + sc->irq_min, count); + + *pic = sc->gic_dev; + + return (0); +} + +static int +al_msix_release_msi(device_t dev, device_t child, int count, + struct intr_irqsrc **srcs) +{ + struct al_msix_softc *sc; + int i, pos; + + sc = device_get_softc(dev); + + mtx_lock(&sc->msi_mtx); + + pos = al_find_intr_pos_in_map(dev, *srcs); + vmem_free(sc->irq_alloc, pos, count); + for (i = 0; i < count; i++) { + pos = al_find_intr_pos_in_map(dev, *srcs); + if (pos != ERR_NOT_IN_MAP) + sc->isrcs[pos] = NULL; + srcs++; + } + + mtx_unlock(&sc->msi_mtx); + + return (0); +} + +static int +al_msix_alloc_msix(device_t dev, device_t child, device_t *pic, + struct intr_irqsrc **isrcp) +{ + + return (al_msix_alloc_msi(dev, child, 1, 1, pic, isrcp)); +} + +static int +al_msix_release_msix(device_t dev, device_t child, struct intr_irqsrc *isrc) +{ + + return (al_msix_release_msi(dev, child, 1, &isrc)); +} Property changes on: head/sys/arm/annapurna/alpine/alpine_pci_msix.c ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/boot/fdt/dts/arm/annapurna-alpine.dts =================================================================== --- head/sys/boot/fdt/dts/arm/annapurna-alpine.dts (revision 307667) +++ head/sys/boot/fdt/dts/arm/annapurna-alpine.dts (revision 307668) @@ -1,251 +1,262 @@ /*- * Copyright (c) 2013 Ruslan Bukin * Copyright (c) 2015 Semihalf * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ /dts-v1/; / { model = "annapurna,alpine"; #address-cells = <1>; #size-cells = <1>; aliases { serial0 = &serial0; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x0>; d-cache-line-size = <64>; // 64 bytes i-cache-line-size = <64>; // 64 bytes d-cache-size = <0x8000>; // L1, 32K i-cache-size = <0x8000>; // L1, 32K timebase-frequency = <0>; bus-frequency = <375000000>; clock-frequency = <0>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x0>; d-cache-line-size = <64>; // 64 bytes i-cache-line-size = <64>; // 64 bytes d-cache-size = <0x8000>; // L1, 32K i-cache-size = <0x8000>; // L1, 32K timebase-frequency = <0>; bus-frequency = <375000000>; clock-frequency = <0>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x0>; d-cache-line-size = <64>; // 64 bytes i-cache-line-size = <64>; // 64 bytes d-cache-size = <0x8000>; // L1, 32K i-cache-size = <0x8000>; // L1, 32K timebase-frequency = <0>; bus-frequency = <375000000>; clock-frequency = <0>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x0>; d-cache-line-size = <64>; // 64 bytes i-cache-line-size = <64>; // 64 bytes d-cache-size = <0x8000>; // L1, 32K i-cache-size = <0x8000>; // L1, 32K timebase-frequency = <0>; bus-frequency = <375000000>; clock-frequency = <0>; }; }; memory { device_type = "memory"; reg = <0x00100000 0x7ff00000>; // 2047MB at 1MB }; soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; ranges = <0x0 0xfb000000 0x03000000>; bus-frequency = <0>; MPIC: interrupt-controller { compatible = "arm,gic"; reg = < 0x1000 0x1000 >, /* Distributor Registers */ < 0x2000 0x2000 >; /* CPU Interface Registers */ interrupt-controller; #address-cells = <0>; #interrupt-cells = <3>; // In intr[2], bits[3:0] are trigger type and level flags. // 1 = low-to-high edge triggered // 2 = high-to-low edge triggered // 4 = active high level-sensitive // 8 = active low level-sensitive // The hardware only supports active-high-level or rising-edge. }; generic_timer { compatible = "arm,sp804"; reg = <0x02890000 0x1000>; interrupts = <0 9 4>; interrupt-parent = <&MPIC>; clock-frequency = <375000000>; }; cpu_resume { compatible = "annapurna-labs,al-cpu-resume"; reg = <0x00ff5ec0 0x30>; }; ccu { compatible = "annapurna-labs,al-ccu"; reg = <0x00090000 0x10000>; io_coherency = <1>; }; nb_service { compatible = "annapurna-labs,al-nb-service"; reg = <0x00070000 0x10000>; interrupts = <0 32 4>, <0 33 4>, <0 34 4>, <0 35 4>; interrupt-parent = <&MPIC>; }; wdt0 { compatible = "arm,sp805", "arm,primecell"; reg = <0x288c000 0x1000>; interrupt-parent = <&MPIC>; }; serial0: serial@2883000 { compatible = "ns16550"; reg = <0x2883000 0x20>; reg-shift = <2>; current-speed = <115200>; clock-frequency = <375000000>; interrupts = <0 17 4>; interrupt-parent = <&MPIC>; }; }; + /* MSIX Configuration */ + msix: msix { + compatible = "annapurna-labs,al-msix"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0xfbe00000 0x100000>; + interrupts = <0 96 1 0 159 1>; + interrupt-parent = <&MPIC>; + }; + pcie-internal { compatible = "annapurna-labs,al-internal-pcie"; device_type = "pci"; #size-cells = <2>; #address-cells = <3>; reg = <0xfbc00000 0x100000>; interrupt-parent = <&MPIC>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = <0x3000 0 0 1 &MPIC 0 32 4>, // USB adapter <0x3800 0 0 1 &MPIC 0 36 4>, <0x4000 0 0 1 &MPIC 0 43 4>, // SATA 0 (PCIe expander) <0x4800 0 0 1 &MPIC 0 44 1>; // SATA 1 (onboard) + msi-parent = <&msix>; // ranges: // - ECAM - non prefetchable config space // - 32 bit non prefetchable memory space ranges = <0x00000000 0x0 0xfbc00000 0xfbc00000 0x0 0x100000 0x02000000 0x0 0xfe000000 0xfe000000 0x0 0x1000000>; bus-range = <0x00 0x00>; }; // WORKAROUND: enabling PCIe controller when no card is plugged in // leads to kernel panic because u-boot disables PCIe controller if no link // is detected. Just be kind and compatible with Linux /* // External PCIe Controller 0 pcie-external0 { compatible = "annapurna-labs,al-external-pcie"; reg = <0xfd800000 0x00020000>; device_type = "pci"; #size-cells = <2>; #address-cells = <3>; interrupt-parent = <&MPIC>; interrupt-map-mask = <0x00 0 0 7>; interrupt-map = <0x0000 0 0 1 &MPIC 0 40 4>; // ranges: // Controller 0: // - ECAM - non prefetchable config space: 2MB // - IO - IO port space 64KB, reserve 64KB from target memory windows // real IO address on the pci bus starts at 0x10000 // - 32 bit non prefetchable memory space: 128MB - 64KB ranges = <0x00000000 0x0 0xfb600000 0xfb600000 0x0 0x00200000 0x01000000 0x0 0x00010000 0xe0000000 0x0 0x00010000 0x02000000 0x0 0xe1000000 0xe1000000 0x0 0x06f00000>; bus-range = <0x00 0xff>; }; // External PCIe Controllers 1 pcie-external1 { compatible = "annapurna-labs,al-external-pcie"; reg = <0xfd820000 0x00020000>; device_type = "pci"; #size-cells = <2>; #address-cells = <3>; interrupt-parent = <&MPIC>; interrupt-map-mask = <0x0 0 0 7>; interrupt-map = <0x0000 0 0 1 &MPIC 0 41 4>; // ranges: // - ECAM - non prefetchable config space: 2MB // - IO - IO port space 64KB, reserve 64KB from target memory windows // real IO address on the pci bus starts at 0x20000 // - 32 bit non prefetchable memory space: 64MB - 64KB ranges = <0x00000000 0x0 0xfb800000 0xfb800000 0x0 0x00200000 0x01000000 0x0 0x00020000 0xe8000000 0x0 0x00010000 0x02000000 0x0 0xe8100000 0xe8100000 0x0 0x02ff0000>; bus-range = <0x00 0xff>; }; */ chosen { stdin = "serial0"; stdout = "serial0"; stddbg = "serial0"; }; }; Index: head/sys/conf/files.arm =================================================================== --- head/sys/conf/files.arm (revision 307667) +++ head/sys/conf/files.arm (revision 307668) @@ -1,162 +1,163 @@ # $FreeBSD$ cloudabi32_vdso.o optional compat_cloudabi32 \ dependency "$S/contrib/cloudabi/cloudabi_vdso_armv6.S" \ compile-with "${CC} -x assembler-with-cpp -shared -nostdinc -nostdlib -Wl,-T$S/compat/cloudabi/cloudabi_vdso.lds $S/contrib/cloudabi/cloudabi_vdso_armv6.S -o ${.TARGET}" \ no-obj no-implicit-rule \ clean "cloudabi32_vdso.o" # cloudabi32_vdso_blob.o optional compat_cloudabi32 \ dependency "cloudabi32_vdso.o" \ compile-with "${OBJCOPY} --input-target binary --output-target elf32-littlearm --binary-architecture arm cloudabi32_vdso.o ${.TARGET}" \ no-implicit-rule \ clean "cloudabi32_vdso_blob.o" # arm/annapurna/alpine/alpine_ccu.c optional al_ccu fdt arm/annapurna/alpine/alpine_nb_service.c optional al_nb_service fdt arm/annapurna/alpine/alpine_pci.c optional al_pci fdt +arm/annapurna/alpine/alpine_pci_msix.c optional al_pci fdt arm/arm/autoconf.c standard arm/arm/bcopy_page.S standard arm/arm/bcopyinout.S standard arm/arm/blockio.S standard arm/arm/bus_space_asm_generic.S standard arm/arm/bus_space_base.c optional fdt arm/arm/bus_space_generic.c standard arm/arm/busdma_machdep-v4.c optional !armv6 arm/arm/busdma_machdep-v6.c optional armv6 arm/arm/copystr.S standard arm/arm/cpufunc.c standard arm/arm/cpufunc_asm.S standard arm/arm/cpufunc_asm_arm9.S optional cpu_arm9 | cpu_arm9e arm/arm/cpufunc_asm_arm11.S optional cpu_arm1176 arm/arm/cpufunc_asm_arm11x6.S optional cpu_arm1176 arm/arm/cpufunc_asm_armv4.S optional cpu_arm9 | cpu_arm9e | cpu_fa526 | cpu_xscale_pxa2x0 | cpu_xscale_ixp425 | cpu_xscale_81342 arm/arm/cpufunc_asm_armv5_ec.S optional cpu_arm9e arm/arm/cpufunc_asm_armv6.S optional cpu_arm1176 arm/arm/cpufunc_asm_armv7.S optional cpu_cortexa8 | cpu_cortexa_mp | cpu_krait | cpu_mv_pj4b arm/arm/cpufunc_asm_fa526.S optional cpu_fa526 arm/arm/cpufunc_asm_pj4b.S optional cpu_mv_pj4b arm/arm/cpufunc_asm_sheeva.S optional cpu_arm9e arm/arm/cpufunc_asm_xscale.S optional cpu_xscale_pxa2x0 | cpu_xscale_ixp425 | cpu_xscale_81342 arm/arm/cpufunc_asm_xscale_c3.S optional cpu_xscale_81342 arm/arm/cpuinfo.c standard arm/arm/cpu_asm-v6.S optional armv6 arm/arm/db_disasm.c optional ddb arm/arm/db_interface.c optional ddb arm/arm/db_trace.c optional ddb arm/arm/debug_monitor.c optional ddb armv6 arm/arm/disassem.c optional ddb arm/arm/dump_machdep.c standard arm/arm/elf_machdep.c standard arm/arm/elf_note.S standard arm/arm/exception.S standard arm/arm/fiq.c standard arm/arm/fiq_subr.S standard arm/arm/fusu.S standard arm/arm/gdb_machdep.c optional gdb arm/arm/generic_timer.c optional generic_timer arm/arm/gic.c optional gic arm/arm/gic_fdt.c optional gic fdt arm/arm/hdmi_if.m optional hdmi arm/arm/identcpu-v4.c optional !armv6 arm/arm/identcpu-v6.c optional armv6 arm/arm/in_cksum.c optional inet | inet6 arm/arm/in_cksum_arm.S optional inet | inet6 arm/arm/intr.c optional !intrng kern/subr_intr.c optional intrng arm/arm/locore.S standard no-obj arm/arm/machdep.c standard arm/arm/machdep_intr.c standard arm/arm/mem.c optional mem arm/arm/minidump_machdep.c optional mem arm/arm/mp_machdep.c optional smp arm/arm/mpcore_timer.c optional mpcore_timer arm/arm/nexus.c standard arm/arm/ofw_machdep.c optional fdt arm/arm/physmem.c standard arm/arm/pl190.c optional pl190 arm/arm/pl310.c optional pl310 arm/arm/platform.c optional platform arm/arm/platform_if.m optional platform arm/arm/pmap-v4.c optional !armv6 arm/arm/pmap-v6.c optional armv6 arm/arm/pmu.c optional pmu | fdt hwpmc arm/arm/sc_machdep.c optional sc arm/arm/setcpsr.S standard arm/arm/setstack.s standard arm/arm/stack_machdep.c optional ddb | stack arm/arm/stdatomic.c standard \ compile-with "${NORMAL_C:N-Wmissing-prototypes}" arm/arm/support.S standard arm/arm/swtch.S standard arm/arm/swtch-v4.S optional !armv6 arm/arm/swtch-v6.S optional armv6 arm/arm/sys_machdep.c standard arm/arm/syscall.c standard arm/arm/trap-v4.c optional !armv6 arm/arm/trap-v6.c optional armv6 arm/arm/uio_machdep.c standard arm/arm/undefined.c standard arm/arm/unwind.c optional ddb | kdtrace_hooks arm/arm/vm_machdep.c standard arm/arm/vfp.c standard arm/cloudabi32/cloudabi32_sysvec.c optional compat_cloudabi32 board_id.h standard \ dependency "$S/arm/conf/genboardid.awk $S/arm/conf/mach-types" \ compile-with "${AWK} -f $S/arm/conf/genboardid.awk $S/arm/conf/mach-types > board_id.h" \ no-obj no-implicit-rule before-depend \ clean "board_id.h" cddl/compat/opensolaris/kern/opensolaris_atomic.c optional zfs | dtrace compile-with "${CDDL_C}" cddl/dev/dtrace/arm/dtrace_asm.S optional dtrace compile-with "${DTRACE_S}" cddl/dev/dtrace/arm/dtrace_subr.c optional dtrace compile-with "${DTRACE_C}" cddl/dev/fbt/arm/fbt_isa.c optional dtrace_fbt | dtraceall compile-with "${FBT_C}" crypto/blowfish/bf_enc.c optional crypto | ipsec crypto/des/des_enc.c optional crypto | ipsec | netsmb dev/cpufreq/cpufreq_dt.c optional cpufreq fdt dev/dwc/if_dwc.c optional dwc dev/dwc/if_dwc_if.m optional dwc dev/fb/fb.c optional sc dev/fdt/fdt_arm_platform.c optional platform fdt dev/hwpmc/hwpmc_arm.c optional hwpmc dev/hwpmc/hwpmc_armv7.c optional hwpmc armv6 dev/iicbus/twsi/twsi.c optional twsi dev/ofw/ofwpci.c optional fdt pci dev/pci/pci_host_generic.c optional pci_host_generic pci fdt dev/psci/psci.c optional psci dev/psci/psci_arm.S optional psci dev/syscons/scgfbrndr.c optional sc dev/syscons/scterm-teken.c optional sc dev/syscons/scvtb.c optional sc dev/uart/uart_cpu_fdt.c optional uart fdt font.h optional sc \ compile-with "uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x16.fnt && file2c 'u_char dflt_font_16[16*256] = {' '};' < ${SC_DFLT_FONT}-8x16 > font.h && uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x14.fnt && file2c 'u_char dflt_font_14[14*256] = {' '};' < ${SC_DFLT_FONT}-8x14 >> font.h && uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x8.fnt && file2c 'u_char dflt_font_8[8*256] = {' '};' < ${SC_DFLT_FONT}-8x8 >> font.h" \ no-obj no-implicit-rule before-depend \ clean "font.h ${SC_DFLT_FONT}-8x14 ${SC_DFLT_FONT}-8x16 ${SC_DFLT_FONT}-8x8" kern/msi_if.m optional intrng kern/pic_if.m optional intrng kern/subr_busdma_bufalloc.c standard kern/subr_devmap.c standard kern/subr_sfbuf.c standard libkern/arm/aeabi_unwind.c standard libkern/arm/divsi3.S standard libkern/arm/ffs.S standard libkern/arm/ldivmod.S standard libkern/arm/ldivmod_helper.c standard libkern/arm/memclr.S standard libkern/arm/memcpy.S standard libkern/arm/memset.S standard libkern/arm/muldi3.c standard libkern/ashldi3.c standard libkern/ashrdi3.c standard libkern/divdi3.c standard libkern/ffsl.c standard libkern/ffsll.c standard libkern/fls.c standard libkern/flsl.c standard libkern/flsll.c standard libkern/lshrdi3.c standard libkern/moddi3.c standard libkern/qdivrem.c standard libkern/ucmpdi2.c standard libkern/udivdi3.c standard libkern/umoddi3.c standard Index: head/sys/conf/files.arm64 =================================================================== --- head/sys/conf/files.arm64 (revision 307667) +++ head/sys/conf/files.arm64 (revision 307668) @@ -1,182 +1,183 @@ # $FreeBSD$ cloudabi64_vdso.o optional compat_cloudabi64 \ dependency "$S/contrib/cloudabi/cloudabi_vdso_aarch64.S" \ compile-with "${CC} -x assembler-with-cpp -shared -nostdinc -nostdlib -Wl,-T$S/compat/cloudabi/cloudabi_vdso.lds $S/contrib/cloudabi/cloudabi_vdso_aarch64.S -o ${.TARGET}" \ no-obj no-implicit-rule \ clean "cloudabi64_vdso.o" # cloudabi64_vdso_blob.o optional compat_cloudabi64 \ dependency "cloudabi64_vdso.o" \ compile-with "${OBJCOPY} --input-target binary --output-target elf64-littleaarch64 --binary-architecture aarch64 cloudabi64_vdso.o ${.TARGET}" \ no-implicit-rule \ clean "cloudabi64_vdso_blob.o" # arm/allwinner/a10_ehci.c optional ehci aw_ehci arm/allwinner/a10_gpio.c optional gpio aw_gpio arm/allwinner/a10_mmc.c optional mmc aw_mmc arm/allwinner/a64/a64_padconf.c optional soc_allwinner_a64 arm/allwinner/a64/a64_r_padconf.c optional soc_allwinner_a64 arm/allwinner/aw_ccu.c optional aw_ccu arm/allwinner/aw_nmi.c optional aw_nmi \ compile-with "${NORMAL_C} -I$S/gnu/dts/include" arm/allwinner/aw_reset.c optional aw_ccu arm/allwinner/aw_rsb.c optional aw_rsb arm/allwinner/aw_rtc.c optional aw_rtc arm/allwinner/aw_sid.c optional aw_sid arm/allwinner/aw_thermal.c optional aw_thermal arm/allwinner/aw_usbphy.c optional ehci aw_usbphy arm/allwinner/aw_wdog.c optional aw_wdog arm/allwinner/axp81x.c optional axp81x arm/allwinner/clk/aw_ahbclk.c optional aw_ccu arm/allwinner/clk/aw_apbclk.c optional aw_ccu arm/allwinner/clk/aw_axiclk.c optional aw_ccu arm/allwinner/clk/aw_cpuclk.c optional aw_ccu arm/allwinner/clk/aw_gate.c optional aw_ccu arm/allwinner/clk/aw_modclk.c optional aw_ccu arm/allwinner/clk/aw_pll.c optional aw_ccu \ compile-with "${NORMAL_C} -I$S/gnu/dts/include" arm/allwinner/clk/aw_thsclk.c optional aw_ccu arm/allwinner/clk/aw_usbclk.c optional aw_ccu arm/allwinner/if_awg.c optional awg arm/annapurna/alpine/alpine_ccu.c optional al_ccu fdt arm/annapurna/alpine/alpine_nb_service.c optional al_nb_service fdt arm/annapurna/alpine/alpine_pci.c optional al_pci fdt +arm/annapurna/alpine/alpine_pci_msix.c optional al_pci fdt arm/arm/generic_timer.c standard arm/arm/gic.c standard arm/arm/gic_fdt.c optional fdt arm/arm/pmu.c standard arm/broadcom/bcm2835/bcm2835_audio.c optional sound vchiq \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" arm/broadcom/bcm2835/bcm2835_bsc.c optional bcm2835_bsc soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm2835_common.c optional fdt soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm2835_cpufreq.c optional soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm2835_dma.c optional soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm2835_fbd.c optional vt soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm2835_ft5406.c optional evdev bcm2835_ft5406 soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm2835_gpio.c optional gpio soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm2835_intr.c optional soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm2835_mbox.c optional soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm2835_rng.c optional random soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm2835_sdhci.c optional sdhci soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm2835_spi.c optional bcm2835_spi soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm2835_vcio.c optional soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm2835_wdog.c optional soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm2836.c optional soc_brcm_bcm2837 arm/broadcom/bcm2835/bcm283x_dwc_fdt.c optional dwcotg fdt soc_brcm_bcm2837 arm64/acpica/acpi_machdep.c optional acpi arm64/acpica/OsdEnvironment.c optional acpi arm64/acpica/acpi_wakeup.c optional acpi arm64/acpica/pci_cfgreg.c optional acpi pci arm64/arm64/autoconf.c standard arm64/arm64/bcopy.c standard arm64/arm64/bus_machdep.c standard arm64/arm64/bus_space_asm.S standard arm64/arm64/busdma_bounce.c standard arm64/arm64/busdma_machdep.c standard arm64/arm64/bzero.S standard arm64/arm64/clock.c standard arm64/arm64/copyinout.S standard arm64/arm64/copystr.c standard arm64/arm64/cpufunc_asm.S standard arm64/arm64/db_disasm.c optional ddb arm64/arm64/db_interface.c optional ddb arm64/arm64/db_trace.c optional ddb arm64/arm64/debug_monitor.c optional ddb arm64/arm64/disassem.c optional ddb arm64/arm64/dump_machdep.c standard arm64/arm64/elf_machdep.c standard arm64/arm64/exception.S standard arm64/arm64/gicv3_its.c optional intrng arm64/arm64/gic_v3.c standard arm64/arm64/gic_v3_fdt.c optional fdt arm64/arm64/identcpu.c standard arm64/arm64/in_cksum.c optional inet | inet6 arm64/arm64/locore.S standard no-obj arm64/arm64/machdep.c standard arm64/arm64/mem.c standard arm64/arm64/minidump_machdep.c standard arm64/arm64/mp_machdep.c optional smp arm64/arm64/nexus.c standard arm64/arm64/ofw_machdep.c optional fdt arm64/arm64/pmap.c standard arm64/arm64/stack_machdep.c optional ddb | stack arm64/arm64/support.S standard arm64/arm64/swtch.S standard arm64/arm64/sys_machdep.c standard arm64/arm64/trap.c standard arm64/arm64/uio_machdep.c standard arm64/arm64/uma_machdep.c standard arm64/arm64/unwind.c optional ddb | kdtrace_hooks | stack arm64/arm64/vfp.c standard arm64/arm64/vm_machdep.c standard arm64/cavium/thunder_pcie_fdt.c optional soc_cavm_thunderx pci fdt arm64/cavium/thunder_pcie_pem.c optional soc_cavm_thunderx pci arm64/cavium/thunder_pcie_pem_fdt.c optional soc_cavm_thunderx pci fdt arm64/cavium/thunder_pcie_common.c optional soc_cavm_thunderx pci arm64/cloudabi64/cloudabi64_sysvec.c optional compat_cloudabi64 contrib/vchiq/interface/compat/vchi_bsd.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_2835_arm.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -Wno-unused -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_arm.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -Wno-unused -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_connected.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_core.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_kern_lib.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_kmod.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_shim.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" contrib/vchiq/interface/vchiq_arm/vchiq_util.c optional vchiq soc_brcm_bcm2837 \ compile-with "${NORMAL_C} -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 -I$S/contrib/vchiq" crypto/blowfish/bf_enc.c optional crypto | ipsec crypto/des/des_enc.c optional crypto | ipsec | netsmb dev/acpica/acpi_if.m optional acpi dev/ahci/ahci_generic.c optional ahci fdt dev/cpufreq/cpufreq_dt.c optional cpufreq fdt dev/hwpmc/hwpmc_arm64.c optional hwpmc dev/hwpmc/hwpmc_arm64_md.c optional hwpmc dev/mbox/mbox_if.m optional soc_brcm_bcm2837 dev/mmc/host/dwmmc.c optional dwmmc fdt dev/mmc/host/dwmmc_hisi.c optional dwmmc fdt soc_hisi_hi6220 dev/ofw/ofw_cpu.c optional fdt dev/ofw/ofwpci.c optional fdt pci dev/pci/pci_host_generic.c optional pci fdt dev/psci/psci.c optional psci dev/psci/psci_arm64.S optional psci dev/uart/uart_cpu_fdt.c optional uart fdt dev/uart/uart_dev_pl011.c optional uart pl011 dev/usb/controller/dwc_otg_hisi.c optional dwcotg fdt soc_hisi_hi6220 dev/usb/controller/generic_ehci.c optional ehci acpi dev/usb/controller/generic_ohci.c optional ohci fdt dev/usb/controller/generic_usb_if.m optional ohci fdt dev/vnic/mrml_bridge.c optional vnic fdt dev/vnic/nic_main.c optional vnic pci dev/vnic/nicvf_main.c optional vnic pci pci_iov dev/vnic/nicvf_queues.c optional vnic pci pci_iov dev/vnic/thunder_bgx_fdt.c optional vnic fdt dev/vnic/thunder_bgx.c optional vnic pci dev/vnic/thunder_mdio_fdt.c optional vnic fdt dev/vnic/thunder_mdio.c optional vnic dev/vnic/lmac_if.m optional inet | inet6 | vnic kern/kern_clocksource.c standard kern/msi_if.m optional intrng kern/pic_if.m optional intrng kern/subr_devmap.c standard kern/subr_intr.c optional intrng libkern/bcmp.c standard libkern/ffs.c standard libkern/ffsl.c standard libkern/ffsll.c standard libkern/fls.c standard libkern/flsl.c standard libkern/flsll.c standard libkern/memmove.c standard libkern/memset.c standard cddl/contrib/opensolaris/common/atomic/aarch64/opensolaris_atomic.S optional zfs | dtrace compile-with "${CDDL_C}" cddl/dev/dtrace/aarch64/dtrace_asm.S optional dtrace compile-with "${DTRACE_S}" cddl/dev/dtrace/aarch64/dtrace_subr.c optional dtrace compile-with "${DTRACE_C}" cddl/dev/fbt/aarch64/fbt_isa.c optional dtrace_fbt | dtraceall compile-with "${FBT_C}"