Index: head/sys/gnu/dts/mips/mt7620a.dtsi
===================================================================
--- head/sys/gnu/dts/mips/mt7620a.dtsi	(revision 298344)
+++ head/sys/gnu/dts/mips/mt7620a.dtsi	(revision 298345)
@@ -1,538 +1,538 @@
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
 	compatible = "ralink,mtk7620a-soc";
 
 	cpus {
 		cpu@0 {
 			compatible = "mips,mips24KEc";
 		};
 	};
 
 	chosen {
 		bootargs = "console=ttyS0,57600";
 	};
 
 	cpuintc: cpuintc@0 {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
 		interrupt-controller;
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
 	aliases {
 		spi0 = &spi0;
 		spi1 = &spi1;
 	};
 
 	palmbus@10000000 {
 		compatible = "palmbus";
 		reg = <0x10000000 0x200000>;
 		ranges = <0x0 0x10000000 0x1FFFFF>;
 
 		#address-cells = <1>;
 		#size-cells = <1>;
 
 		sysc@0 {
 			compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
 			reg = <0x0 0x100>;
 		};
 
 		timer@100 {
 			compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
 			reg = <0x100 0x20>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 		};
 
 		watchdog@120 {
 			compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
 			reg = <0x120 0x10>;
 
 			resets = <&rstctrl 8>;
 			reset-names = "wdt";
 
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 		};
 
 		intc: intc@200 {
 			compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
 			reg = <0x200 0x100>;
 
 			resets = <&rstctrl 19>;
 			reset-names = "intc";
 
 			interrupt-controller;
 			#interrupt-cells = <1>;
 
 			interrupt-parent = <&cpuintc>;
 			interrupts = <2>;
 		};
 
 		memc@300 {
 			compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
 			reg = <0x300 0x100>;
 
 			resets = <&rstctrl 20>;
 			reset-names = "mc";
 
 			interrupt-parent = <&intc>;
 			interrupts = <3>;
 		};
 
 		uart@500 {
 			compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0x500 0x100>;
 
 			resets = <&rstctrl 12>;
 			reset-names = "uart";
 
 			interrupt-parent = <&intc>;
 			interrupts = <5>;
 
 			reg-shift = <2>;
 
 			status = "disabled";
 		};
 
 		gpio0: gpio@600 {
 			compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 			reg = <0x600 0x34>;
 
 			resets = <&rstctrl 13>;
 			reset-names = "pio";
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
 			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
 		};
 
 		gpio1: gpio@638 {
 			compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 			reg = <0x638 0x24>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <24>;
 			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		gpio2: gpio@660 {
 			compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 			reg = <0x660 0x24>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <40>;
 			ralink,num-gpios = <32>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		gpio3: gpio@688 {
 			compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 			reg = <0x688 0x24>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <72>;
 			ralink,num-gpios = <1>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		i2c@900 {
 			compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c";
 			reg = <0x900 0x100>;
 
 			resets = <&rstctrl 16>;
 			reset-names = "i2c";
 
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			status = "disabled";
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&i2c_pins>;
 		};
 
 		i2s@a00 {
 			compatible = "ralink,mt7620a-i2s";
 			reg = <0xa00 0x100>;
 
 			resets = <&rstctrl 17>;
 			reset-names = "i2s";
 
 			interrupt-parent = <&intc>;
 			interrupts = <10>;
 
 			dmas = <&gdma 4>,
 				<&gdma 5>;
 			dma-names = "tx", "rx";
 
 			status = "disabled";
 		};
 
 		spi0: spi@b00 {
 			compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
 			reg = <0xb00 0x40>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
 
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			status = "disabled";
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_pins>;
 		};
 
 		spi1: spi@b40 {
 			compatible = "ralink,rt2880-spi";
 			reg = <0xb40 0x60>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
 
 			#address-cells = <1>;
 			#size-cells = <1>;
 
 			status = "disabled";
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_cs1>;
 		};
 
 		uartlite@c00 {
 			compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0xc00 0x100>;
 
 			resets = <&rstctrl 19>;
 			reset-names = "uartl";
 
 			interrupt-parent = <&intc>;
 			interrupts = <12>;
 
 			reg-shift = <2>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&uartlite_pins>;
 		};
 
 		systick@d00 {
 			compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
 			reg = <0xd00 0x10>;
 
 			resets = <&rstctrl 28>;
 			reset-names = "intc";
 
 			interrupt-parent = <&cpuintc>;
 			interrupts = <7>;
 		};
 
 		pcm@2000 {
 			compatible = "ralink,mt7620a-pcm";
 			reg = <0x2000 0x800>;
 
 			resets = <&rstctrl 11>;
 			reset-names = "pcm";
 
 			interrupt-parent = <&intc>;
 			interrupts = <4>;
 
 			status = "disabled";
 		};
 
 		gdma: gdma@2800 {
 			compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
 			reg = <0x2800 0x800>;
 
 			resets = <&rstctrl 14>;
 			reset-names = "dma";
 
 			interrupt-parent = <&intc>;
 			interrupts = <7>;
 
 			#dma-cells = <1>;
 			#dma-channels = <16>;
 			#dma-requests = <16>;
 
 			status = "disabled";
 		};
 	};
 
 	pinctrl {
 		compatible = "ralink,rt2880-pinmux";
 		pinctrl-names = "default";
 		pinctrl-0 = <&state_default>;
 
 		state_default: pinctrl0 {
 		};
 
 		pcm_i2s_pins: pcm_i2s {
 			pcm_i2s {
 				ralink,group = "uartf";
 				ralink,function = "pcm i2s";
 			};
 		};
 
 		uartf_gpio_pins: uartf_gpio {
 			uartf_gpio {
 				ralink,group = "uartf";
 				ralink,function = "gpio uartf";
 			};
 		};
 
 		spi_pins: spi {
 			spi {
 				ralink,group = "spi";
 				ralink,function = "spi";
 			};
 		};
 
 		spi_cs1: spi1 {
 			spi1 {
 				ralink,group = "spi_cs1";
 				ralink,function = "spi_cs1";
 			};
 		};
 
 		i2c_pins: i2c {
 			i2c {
 				ralink,group = "i2c";
 				ralink,function = "i2c";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
 				ralink,group = "uartlite";
 				ralink,function = "uartlite";
 			};
 		};
 
 		mdio_pins: mdio {
 			mdio {
 				ralink,group = "mdio";
 				ralink,function = "mdio";
 			};
 		};
 
 		ephy_pins: ephy {
 			ephy {
 				ralink,group = "ephy";
 				ralink,function = "ephy";
 			};
 		};
 
 		wled_pins: wled {
 			wled {
 				ralink,group = "wled";
 				ralink,function = "wled";
 			};
 		};
 
 		rgmii1_pins: rgmii1 {
 			rgmii1 {
 				ralink,group = "rgmii1";
 				ralink,function = "rgmii1";
 			};
 		};
 
 		rgmii2_pins: rgmii2 {
 			rgmii2 {
 				ralink,group = "rgmii2";
 				ralink,function = "rgmii2";
 			};
 		};
 
 		pcie_pins: pcie {
 			pcie {
 				ralink,group = "pcie";
 				ralink,function = "pcie rst";
 			};
 		};
 	};
 
 	rstctrl: rstctrl {
 		compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 		#reset-cells = <1>;
 	};
 
 	usbphy: usbphy {
 		compatible = "mediatek,mt7620-usbphy";
 		#phy-cells = <1>;
 
 		resets = <&rstctrl 22 &rstctrl 25>;
 		reset-names = "host", "device";
 	};
 
 	ethernet@10100000 {
 		compatible = "mediatek,mt7620-eth";
 		reg = <0x10100000 10000>;
 
 		#address-cells = <1>;
 		#size-cells = <0>;
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <5>;
 
 		resets = <&rstctrl 21 &rstctrl 23>;
 		reset-names = "fe", "esw";
 
 		mediatek,switch = <&gsw>;
 
 		port@4 {
 			compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
 			reg = <4>;
 
 			status = "disabled";
 		};
 
 		port@5 {
 			compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
 			reg = <5>;
 
 			status = "disabled";
 		};
 
 		mdio-bus {
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			status = "disabled";
 		};
 	};
 
 	gsw: gsw@10110000 {
 		compatible = "mediatek,mt7620-gsw";
 		reg = <0x10110000 8000>;
 
 		resets = <&rstctrl 23>;
 		reset-names = "esw";
 
 		interrupt-parent = <&intc>;
 		interrupts = <17>;
 	};
 
 	sdhci@10130000 {
 		compatible = "ralink,mt7620-sdhci";
 		reg = <0x10130000 4000>;
 
 		interrupt-parent = <&intc>;
 		interrupts = <14>;
 
 		status = "disabled";
 	};
 
 	ehci@101c0000 {
 		compatible = "generic-ehci";
 		reg = <0x101c0000 0x1000>;
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 
 		phys = <&usbphy 1>;
 		phy-names = "usb";
 
 		status = "disabled";
 	};
 
 	ohci@101c1000 {
 		compatible = "generic-ohci";
 		reg = <0x101c1000 0x1000>;
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 
 		phys = <&usbphy 1>;
 		phy-names = "usb";
 
 		status = "disabled";
 	};
 
 	pcie@10140000 {
 		compatible = "mediatek,mt7620-pci";
 		reg = <0x10140000 0x100
 			0x10142000 0x100>;
 
 		#address-cells = <3>;
 		#size-cells = <2>;
 
 		resets = <&rstctrl 26>;
 		reset-names = "pcie0";
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <4>;
 
 		pinctrl-names = "default";
 		pinctrl-0 = <&pcie_pins>;
 
 		device_type = "pci";
 
 		bus-range = <0 255>;
 		ranges = <
 			0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 			0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 		>;
 
 		status = "disabled";
 
 		pcie-bridge {
 			reg = <0x0000 0 0 0 0>;
 
 			#address-cells = <3>;
 			#size-cells = <2>;
 
 			device_type = "pci";
 		};
 	};
 
 	wmac@10180000 {
 		compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
 		reg = <0x10180000 40000>;
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <6>;
 
 		ralink,eeprom = "soc_wmac.eeprom";
 	};
 };
 
-#include <fbsd-mt7620a.dtsi>
+/include/ "fbsd-mt7620a.dtsi"
Index: head/sys/gnu/dts/mips/mt7620n.dtsi
===================================================================
--- head/sys/gnu/dts/mips/mt7620n.dtsi	(revision 298344)
+++ head/sys/gnu/dts/mips/mt7620n.dtsi	(revision 298345)
@@ -1,337 +1,337 @@
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
 	compatible = "ralink,mtk7620n-soc";
 
 	cpus {
 		cpu@0 {
 			compatible = "mips,mips24KEc";
 		};
 	};
 
 	chosen {
 		bootargs = "console=ttyS0,57600";
 	};
 
 	cpuintc: cpuintc@0 {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
 		interrupt-controller;
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
 	aliases {
 		spi0 = &spi0;
 		spi1 = &spi1;
 	};
 
 	palmbus@10000000 {
 		compatible = "palmbus";
 		reg = <0x10000000 0x200000>;
 		ranges = <0x0 0x10000000 0x1FFFFF>;
 
 		#address-cells = <1>;
 		#size-cells = <1>;
 
 		sysc@0 {
 			compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
 			reg = <0x0 0x100>;
 		};
 
 		timer@100 {
 			compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
 			reg = <0x100 0x20>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 		};
 
 		watchdog@120 {
 			compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
 			reg = <0x120 0x10>;
 
 			resets = <&rstctrl 8>;
 			reset-names = "wdt";
 
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 		};
 
 		intc: intc@200 {
 			compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
 			reg = <0x200 0x100>;
 
 			resets = <&rstctrl 19>;
 			reset-names = "intc";
 
 			interrupt-controller;
 			#interrupt-cells = <1>;
 
 			interrupt-parent = <&cpuintc>;
 			interrupts = <2>;
 		};
 
 		memc@300 {
 			compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
 			reg = <0x300 0x100>;
 
 			resets = <&rstctrl 20>;
 			reset-names = "mc";
 
 			interrupt-parent = <&intc>;
 			interrupts = <3>;
 		};
 
 		gpio0: gpio@600 {
 			compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 			reg = <0x600 0x34>;
 
 			resets = <&rstctrl 13>;
 			reset-names = "pio";
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
 			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
 		};
 
 		gpio1: gpio@638 {
 			compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 			reg = <0x638 0x24>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <24>;
 			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		gpio2: gpio@660 {
 			compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 			reg = <0x660 0x24>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <40>;
 			ralink,num-gpios = <32>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		gpio3: gpio@688 {
 			compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 			reg = <0x688 0x24>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <72>;
 			ralink,num-gpios = <1>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		spi0: spi@b00 {
 			compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
 			reg = <0xb00 0x40>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
 
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			status = "disabled";
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_pins>;
 		};
 
 		spi1: spi@b40 {
 			compatible = "ralink,rt2880-spi";
 			reg = <0xb40 0x60>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
 
 			#address-cells = <1>;
 			#size-cells = <1>;
 
 			status = "disabled";
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_cs1>;
 		};
 
 		uartlite@c00 {
 			compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0xc00 0x100>;
 
 			resets = <&rstctrl 19>;
 			reset-names = "uartl";
 
 			interrupt-parent = <&intc>;
 			interrupts = <12>;
 
 			reg-shift = <2>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&uartlite_pins>;
 		};
 
 		systick@d00 {
 			compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
 			reg = <0xd00 0x10>;
 
 			resets = <&rstctrl 28>;
 			reset-names = "intc";
 
 			interrupt-parent = <&cpuintc>;
 			interrupts = <7>;
 		};
 	};
 
 	pinctrl {
 		compatible = "ralink,rt2880-pinmux";
 		pinctrl-names = "default";
 		pinctrl-0 = <&state_default>;
 
 		state_default: pinctrl0 {
 		};
 
 		spi_pins: spi {
 			spi {
 				ralink,group = "spi";
 				ralink,function = "spi";
 			};
 		};
 
 		spi_cs1: spi1 {
 			spi1 {
 				ralink,group = "spi_cs1";
 				ralink,function = "spi_cs1";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
 				ralink,group = "uartlite";
 				ralink,function = "uartlite";
 			};
 		};
 	};
 
 	rstctrl: rstctrl {
 		compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 		#reset-cells = <1>;
 	};
 
 	usbphy: usbphy {
 		compatible = "mediatek,mt7620-usbphy";
 		#phy-cells = <1>;
 
 		resets = <&rstctrl 22 &rstctrl 25>;
 		reset-names = "host", "device";
 	};
 
 	ethernet@10100000 {
 		compatible = "mediatek,mt7620-eth";
 		reg = <0x10100000 10000>;
 
 		#address-cells = <1>;
 		#size-cells = <0>;
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <5>;
 
 		resets = <&rstctrl 21 &rstctrl 23>;
 		reset-names = "fe", "esw";
 
 		mediatek,switch = <&gsw>;
 
 		mdio-bus {
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			status = "disabled";
 		};
 	};
 
 	gsw: gsw@10110000 {
 		compatible = "mediatek,mt7620-gsw";
 		reg = <0x10110000 8000>;
 
 		resets = <&rstctrl 23>;
 		reset-names = "esw";
 
 		interrupt-parent = <&intc>;
 		interrupts = <17>;
 		mediatek,port4 = "gmac";
 	};
 
 	ehci@101c0000 {
 		compatible = "generic-ehci";
 		reg = <0x101c0000 0x1000>;
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 
 		phys = <&usbphy 1>;
 		phy-names = "usb";
 
 		status = "disabled";
 	};
 
 	ohci@101c1000 {
 		compatible = "generic-ohci";
 		reg = <0x101c1000 0x1000>;
 
 		phys = <&usbphy 1>;
 		phy-names = "usb";
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 
 		status = "disabled";
 	};
 
 	wmac@10180000 {
 		compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
 		reg = <0x10180000 40000>;
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <6>;
 
 		ralink,eeprom = "soc_wmac.eeprom";
 	};
 };
 
-#include <fbsd-mt7620n.dtsi>
+/include/ "fbsd-mt7620n.dtsi"
Index: head/sys/gnu/dts/mips/mt7621.dtsi
===================================================================
--- head/sys/gnu/dts/mips/mt7621.dtsi	(revision 298344)
+++ head/sys/gnu/dts/mips/mt7621.dtsi	(revision 298345)
@@ -1,377 +1,377 @@
 #include <dt-bindings/interrupt-controller/mips-gic.h>
 
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
 	compatible = "mediatek,mtk7621-soc";
 
 	cpus {
 		cpu@0 {
 			compatible = "mips,mips1004Kc";
 		};
 
 		cpu@1 {
 			compatible = "mips,mips1004Kc";
 		};
 	};
 
 	cpuintc: cpuintc@0 {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
 		interrupt-controller;
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
 	cpuclock: cpuclock@0 {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
 
 		/* FIXME: there should be way to detect this */
 		clock-frequency = <880000000>;
 	};
 
 	sysclock: sysclock@0 {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
 
 		/* FIXME: there should be way to detect this */
 		clock-frequency = <50000000>;
 	};
 
 	palmbus@1E000000 {
 		compatible = "palmbus";
 		reg = <0x1E000000 0x100000>;
 		ranges = <0x0 0x1E000000 0x0FFFFF>;
 
 		#address-cells = <1>;
 		#size-cells = <1>;
 
 		sysc@0 {
 			compatible = "mtk,mt7621-sysc";
 			reg = <0x0 0x100>;
 		};
 
 		wdt@100 {
 			compatible = "mtk,mt7621-wdt";
 			reg = <0x100 0x100>;
 		};
 
 		gpio@600 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			compatible = "mtk,mt7621-gpio";
 			reg = <0x600 0x100>;
 
 			gpio0: bank@0 {
 				reg = <0>;
 				compatible = "mtk,mt7621-gpio-bank";
 				gpio-controller;
 				#gpio-cells = <2>;
 			};
 
 			gpio1: bank@1 {
 				reg = <1>;
 				compatible = "mtk,mt7621-gpio-bank";
 				gpio-controller;
 				#gpio-cells = <2>;
 			};
 
 			gpio2: bank@2 {
 				reg = <2>;
 				compatible = "mtk,mt7621-gpio-bank";
 				gpio-controller;
 				#gpio-cells = <2>;
 			};
 		};
 
 		memc@5000 {
 			compatible = "mtk,mt7621-memc";
 			reg = <0x300 0x100>;
 		};
 
 		cpc@1fbf0000 {
 			     compatible = "mtk,mt7621-cpc";
 			     reg = <0x1fbf0000 0x8000>;
 		};
 
 		mc@1fbf8000 {
 			    compatible = "mtk,mt7621-mc";
 			    reg = <0x1fbf8000 0x8000>;
  		};
 
 		uartlite@c00 {
 			compatible = "ns16550a";
 			reg = <0xc00 0x100>;
 
 			clocks = <&sysclock>;
 
 			interrupt-parent = <&gic>;
 			interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>;
 
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			no-loopback-test;
 		};
 
 		spi@b00 {
 			status = "okay";
 
 			compatible = "ralink,mt7621-spi";
 			reg = <0xb00 0x100>;
 
 			clocks = <&sysclock>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
 
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_pins>;
 
 			m25p80@0 {
 				#address-cells = <1>;
 				#size-cells = <1>;
 				reg = <0 0>;
 				spi-max-frequency = <10000000>;
 				m25p,chunked-io = <32>;
 			};
 		};
 	};
 
 	pinctrl {
 		compatible = "ralink,rt2880-pinmux";
 		pinctrl-names = "default";
 		pinctrl-0 = <&state_default>;
 
 		state_default: pinctrl0 {
 		};
 
 		spi_pins: spi {
 			spi {
 				ralink,group = "spi";
 				ralink,function = "spi";
 			};
 		};
 
 		i2c_pins: i2c {
 			i2c {
 				ralink,group = "i2c";
 				ralink,function = "i2c";
 			};
 		};
 
 		uart1_pins: uart1 {
 			uart1 {
 				ralink,group = "uart1";
 				ralink,function = "uart1";
 			};
 		};
 
 		uart2_pins: uart2 {
 			uart2 {
 				ralink,group = "uart2";
 				ralink,function = "uart2";
 			};
 		};
 
 		uart3_pins: uart3 {
 			uart3 {
 				ralink,group = "uart3";
 				ralink,function = "uart3";
 			};
 		};
 
 		rgmii1_pins: rgmii1 {
 			rgmii1 {
 				ralink,group = "rgmii1";
 				ralink,function = "rgmii1";
 			};
 		};
 
 		rgmii2_pins: rgmii2 {
 			rgmii2 {
 				ralink,group = "rgmii2";
 				ralink,function = "rgmii2";
 			};
 		};
 
 		mdio_pins: mdio {
 			mdio {
 				ralink,group = "mdio";
 				ralink,function = "mdio";
 			};
 		};
 
 		pcie_pins: pcie {
 			pcie {
 				ralink,group = "pcie";
 				ralink,function = "pcie rst";
 			};
 		};
 
 		nand_pins: nand {
 			spi-nand {
 				ralink,group = "spi";
 				ralink,function = "nand1";
 			};
 
 			sdhci-nand {
 				ralink,group = "sdhci";
 				ralink,function = "nand2";
 			};
 		};
 
 		sdhci_pins: sdhci {
 			sdhci {
 				ralink,group = "sdhci";
 				ralink,function = "sdhci";
 			};
 		};
 	};
 
 	rstctrl: rstctrl {
 		compatible = "ralink,rt2880-reset";
 		#reset-cells = <1>;
 	};
 
 	sdhci@1E130000 {
 		compatible = "ralink,mt7620-sdhci";
 		reg = <0x1E130000 4000>;
 
 		interrupt-parent = <&gic>;
 		interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
 	xhci@1E1C0000 {
 		status = "okay";
 
 		compatible = "mediatek,mt8173-xhci";
 		reg = <0x1e1c0000 0x1000
 		       0x1e1d0700 0x0100>;
 
 		clocks = <&sysclock>;
 		clock-names = "sys_ck";
 
 		interrupt-parent = <&gic>;
 		interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
 	gic: interrupt-controller@1fbc0000 {
 		compatible = "mti,gic";
 		reg = <0x1fbc0000 0x2000>;
 
 		interrupt-controller;
 		#interrupt-cells = <3>;
 
 		mti,reserved-cpu-vectors = <7>;
 
 		timer {
 			compatible = "mti,gic-timer";
 			interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
 			clocks = <&cpuclock>;
 		};
 	};
 
 	nand@1e003000 {
 		status = "disabled";
 
 		compatible = "mtk,mt7621-nand";
 		bank-width = <2>;
 		reg = <0x1e003000 0x800
 			0x1e003800 0x800>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 	};
 
 	ethernet@1e100000 {
 		compatible = "mediatek,mt7621-eth";
 		reg = <0x1e100000 10000>;
 
 		#address-cells = <1>;
 		#size-cells = <0>;
 
 		resets = <&rstctrl 6 &rstctrl 23>;
 		reset-names = "fe", "eth";
 
 		interrupt-parent = <&gic>;
 		interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
 
 		mediatek,switch = <&gsw>;
 
 		mdio-bus {
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			phy1f: ethernet-phy@1f {
 				reg = <0x1f>;
 				phy-mode = "rgmii";
 			};
 		};
 	};
 
 	gsw: gsw@1e110000 {
 		compatible = "mediatek,mt7621-gsw";
 		reg = <0x1e110000 8000>;
 		interrupt-parent = <&gic>;
 		interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
 	pcie@1e140000 {
 		compatible = "mediatek,mt7621-pci";
 		reg = <0x1e140000 0x100
 			0x1e142000 0x100>;
 
 		#address-cells = <3>;
 		#size-cells = <2>;
 
 		pinctrl-names = "default";
 		pinctrl-0 = <&pcie_pins>;
 
 		device_type = "pci";
 
 		bus-range = <0 255>;
 		ranges = <
 			0x02000000 0 0x00000000 0x60000000 0 0x10000000 /* pci memory */
 			0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */
 		>;
 
 		interrupt-parent = <&gic>;
 		interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH
 				GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH
 				GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
 
 		status = "okay";
 
 		pcie0 {
 			reg = <0x0000 0 0 0 0>;
 
 			#address-cells = <3>;
 			#size-cells = <2>;
 
 			device_type = "pci";
 		};
 
 		pcie1 {
 			reg = <0x0800 0 0 0 0>;
 
 			#address-cells = <3>;
 			#size-cells = <2>;
 
 			device_type = "pci";
 		};
 
 		pcie2 {
 			reg = <0x1000 0 0 0 0>;
 
 			#address-cells = <3>;
 			#size-cells = <2>;
 
 			device_type = "pci";
 		};
 	};
 };
 
-#include <fbsd-mt7621.dtsi>
+/include/ "fbsd-mt7621.dtsi"
Index: head/sys/gnu/dts/mips/mt7628an.dtsi
===================================================================
--- head/sys/gnu/dts/mips/mt7628an.dtsi	(revision 298344)
+++ head/sys/gnu/dts/mips/mt7628an.dtsi	(revision 298345)
@@ -1,459 +1,459 @@
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
 	compatible = "ralink,mtk7628an-soc";
 
 	cpus {
 		cpu@0 {
 			compatible = "mips,mips24KEc";
 		};
 	};
 
 	chosen {
 		bootargs = "console=ttyS0,57600";
 	};
 
 	cpuintc: cpuintc@0 {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
 		interrupt-controller;
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
 	palmbus@10000000 {
 		compatible = "palmbus";
 		reg = <0x10000000 0x200000>;
 		ranges = <0x0 0x10000000 0x1FFFFF>;
 
 		#address-cells = <1>;
 		#size-cells = <1>;
 
 		sysc@0 {
 			compatible = "ralink,mt7620a-sysc";
 			reg = <0x0 0x100>;
 		};
 
 		watchdog@120 {
 			compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
 			reg = <0x120 0x10>;
 
 			resets = <&rstctrl 8>;
 			reset-names = "wdt";
 
 			interrupt-parent = <&intc>;
 			interrupts = <24>;
 		};
 
 		intc: intc@200 {
 			compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
 			reg = <0x200 0x100>;
 
 			resets = <&rstctrl 9>;
 			reset-names = "intc";
 
 			interrupt-controller;
 			#interrupt-cells = <1>;
 
 			interrupt-parent = <&cpuintc>;
 			interrupts = <2>;
 
 			ralink,intc-registers = <0x9c 0xa0
 						 0x6c 0xa4
 						 0x80 0x78>;
 		};
 
 		memc@300 {
 			compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
 			reg = <0x300 0x100>;
 
 			resets = <&rstctrl 20>;
 			reset-names = "mc";
 
 			interrupt-parent = <&intc>;
 			interrupts = <3>;
 		};
 
 		gpio@600 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
 			reg = <0x600 0x100>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 
 			gpio0: bank@0 {
 				reg = <0>;
 				compatible = "mtk,mt7621-gpio-bank";
 				gpio-controller;
 				#gpio-cells = <2>;
 			};
 
 			gpio1: bank@1 {
 				reg = <1>;
 				compatible = "mtk,mt7621-gpio-bank";
 				gpio-controller;
 				#gpio-cells = <2>;
 			};
 
 			gpio2: bank@2 {
 				reg = <2>;
 				compatible = "mtk,mt7621-gpio-bank";
 				gpio-controller;
 				#gpio-cells = <2>;
 			};
 		};
 
 		i2c@900 {
 			compatible = "mediatek,mt7628-i2c";
 			reg = <0x900 0x100>;
 
 			resets = <&rstctrl 16>;
 			reset-names = "i2c";
 
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			status = "disabled";
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&i2c_pins>;
 		};
 
 		i2s@a00 {
 			compatible = "ralink,mt7620a-i2s";
 			reg = <0xa00 0x100>;
 
 			resets = <&rstctrl 17>;
 			reset-names = "i2s";
 
 			interrupt-parent = <&intc>;
 			interrupts = <10>;
 
 			dmas = <&gdma 2>,
 				<&gdma 3>;
 			dma-names = "tx", "rx";
 
 			status = "disabled";
 		};
 
 		spi@b00 {
 			compatible = "ralink,mt7621-spi";
 			reg = <0xb00 0x100>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
 
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_pins>;
 
 			status = "disabled";
 		};
 
 		uartlite@c00 {
 			compatible = "ns16550a";
 			reg = <0xc00 0x100>;
 
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			no-loopback-test;
 
 			resets = <&rstctrl 12>;
 			reset-names = "uartl";
 
 			interrupt-parent = <&intc>;
 			interrupts = <20>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&uart0_pins>;
 		};
 
 		uart1@d00 {
 			compatible = "ns16550a";
 			reg = <0xd00 0x100>;
 
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			no-loopback-test;
 
 			resets = <&rstctrl 19>;
 			reset-names = "uart1";
 
 			interrupt-parent = <&intc>;
 			interrupts = <21>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&uart1_pins>;
 
 			status = "disabled";
 		};
 
 		uart2@e00 {
 			compatible = "ns16550a";
 			reg = <0xe00 0x100>;
 
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			no-loopback-test;
 
 			resets = <&rstctrl 20>;
 			reset-names = "uart2";
 
 			interrupt-parent = <&intc>;
 			interrupts = <22>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&uart2_pins>;
 
 			status = "disabled";
 		};
 
 		pwm@5000 {
 			compatible = "mediatek,mt7628-pwm";
 			reg = <0x5000 0x1000>;
 
 			resets = <&rstctrl 31>;
 			reset-names = "pwm";
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
 
 			status = "disabled";
 		};
 
 		pcm@2000 {
 			compatible = "ralink,mt7620a-pcm";
 			reg = <0x2000 0x800>;
 
 			resets = <&rstctrl 11>;
 			reset-names = "pcm";
 
 			interrupt-parent = <&intc>;
 			interrupts = <4>;
 
 			status = "disabled";
 		};
 
 		gdma: gdma@2800 {
 			compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
 			reg = <0x2800 0x800>;
 
 			resets = <&rstctrl 14>;
 			reset-names = "dma";
 
 			interrupt-parent = <&intc>;
 			interrupts = <7>;
 
 			#dma-cells = <1>;
 			#dma-channels = <16>;
 			#dma-requests = <16>;
 
 			status = "disabled";
 		};
 	};
 
 	pinctrl {
 		compatible = "ralink,rt2880-pinmux";
 		pinctrl-names = "default";
 		pinctrl-0 = <&state_default>;
 
 		state_default: pinctrl0 {
 		};
 
 		spi_pins: spi {
 			spi {
 				ralink,group = "spi";
 				ralink,function = "spi";
 			};
 		};
 
 		spi_cs1_pins: spi_cs1 {
 			spi_cs1 {
 				ralink,group = "spi cs1";
 				ralink,function = "spi cs1";
 			};
 		};
 
 		i2c_pins: i2c {
 			i2c {
 				ralink,group = "i2c";
 				ralink,function = "i2c";
 			};
 		};
 
 		uart0_pins: uartlite {
 			uartlite {
 				ralink,group = "uart0";
 				ralink,function = "uart0";
 			};
 		};
 
 		uart1_pins: uart1 {
 			uart1 {
 				ralink,group = "uart1";
 				ralink,function = "uart1";
 			};
 		};
 
 		uart2_pins: uart2 {
 			uart2 {
 				ralink,group = "uart2";
 				ralink,function = "uart2";
 			};
 		};
 
 		sdxc_pins: sdxc {
 			sdxc {
 				ralink,group = "sdmode";
 				ralink,function = "sdxc";
 			};
 		};
 
 		pwm0_pins: pwm0 {
 			pwm0 {
 				ralink,group = "pwm0";
 				ralink,function = "pwm0";
 			};
 		};
 
 		pwm1_pins: pwm1 {
 			pwm1 {
 				ralink,group = "pwm1";
 				ralink,function = "pwm1";
 			};
 		};
 
 		pcm_i2s_pins: i2s {
 			i2s {
 				ralink,group = "i2s";
 				ralink,function = "pcm";
 			};
 		};
 	};
 
 	rstctrl: rstctrl {
 		compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 		#reset-cells = <1>;
 	};
 
 	usbphy: usbphy@10120000 {
 		compatible = "ralink,mt7628an-usbphy", "mediatek,mt7620-usbphy";
 		reg = <0x10120000 4000>;
 		#phy-cells = <1>;
 
 		resets = <&rstctrl 22 &rstctrl 25>;
 		reset-names = "host", "device";
 	};
 
 	sdhci@10130000 {
 		compatible = "ralink,mt7620-sdhci";
 		reg = <0x10130000 4000>;
 
 		interrupt-parent = <&intc>;
 		interrupts = <14>;
 
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdxc_pins>;
 
 		status = "disabled";
 	};
 
 	ehci@101c0000 {
 		compatible = "generic-ehci";
 		reg = <0x101c0000 0x1000>;
 
 		phys = <&usbphy 1>;
 		phy-names = "usb";
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 	};
 
 	ohci@101c1000 {
 		compatible = "generic-ohci";
 		reg = <0x101c1000 0x1000>;
 
 		phys = <&usbphy 1>;
 		phy-names = "usb";
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 	};
 
 	ethernet@10100000 {
 		compatible = "ralink,rt5350-eth";
 		reg = <0x10100000 10000>;
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <5>;
 
 		resets = <&rstctrl 21 &rstctrl 23>;
 		reset-names = "fe", "esw";
 
 		mediatek,switch = <&esw>;
 	};
 
 	esw: esw@10110000 {
 		compatible = "ralink,rt3050-esw";
 		reg = <0x10110000 8000>;
 
 		resets = <&rstctrl 23>;
 		reset-names = "esw";
 
 		interrupt-parent = <&intc>;
 		interrupts = <17>;
 	};
 
 	pcie@10140000 {
 		compatible = "mediatek,mt7620-pci";
 		reg = <0x10140000 0x100
 			0x10142000 0x100>;
 
 		#address-cells = <3>;
 		#size-cells = <2>;
 
 		resets = <&rstctrl 26>;
 		reset-names = "pcie0";
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <4>;
 
 		status = "disabled";
 
 		device_type = "pci";
 
 		bus-range = <0 255>;
 		ranges = <
 			0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 			0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 		>;
 
 		pcie-bridge {
 			reg = <0x0000 0 0 0 0>;
 
 			#address-cells = <3>;
 			#size-cells = <2>;
 
 			device_type = "pci";
 		};
 	};
 
 	wmac: wmac@10300000 {
 		compatible = "mediatek,mt7628-wmac";
 		reg = <0x10300000 100000>;
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <6>;
 
 		status = "disabled";
 
 		mediatek,mtd-eeprom = <&factory 0x0000>;
 		mediatek,5ghz = <0>;
 	};
 };
 
-#include <fbsd-mt7628an.dtsi>
+/include/ "fbsd-mt7628an.dtsi"
Index: head/sys/gnu/dts/mips/rt2880.dtsi
===================================================================
--- head/sys/gnu/dts/mips/rt2880.dtsi	(revision 298344)
+++ head/sys/gnu/dts/mips/rt2880.dtsi	(revision 298345)
@@ -1,196 +1,196 @@
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
 	compatible = "ralink,rt2880-soc";
 
 	cpus {
 		cpu@0 {
 			compatible = "mips,mips24KEc";
 		};
 	};
 
 	chosen {
 		bootargs = "console=ttyS0,57600";
 	};
 
 	cpuintc: cpuintc@0 {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
 		interrupt-controller;
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
 	palmbus@300000 {
 		compatible = "palmbus";
 		reg = <0x300000 0x200000>;
 		ranges = <0x0 0x300000 0x1FFFFF>;
 
 		#address-cells = <1>;
 		#size-cells = <1>;
 
 		sysc@0 {
 			compatible = "ralink,rt2880-sysc";
 			reg = <0x000 0x100>;
 		};
 
 		timer@100 {
 			compatible = "ralink,rt2880-timer";
 			reg = <0x100 0x20>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 
 			status = "disabled";
 		};
 
 		watchdog@120 {
 			compatible = "ralink,rt2880-wdt";
 			reg = <0x120 0x10>;
 		};
 
 		intc: intc@200 {
 			compatible = "ralink,rt2880-intc";
 			reg = <0x200 0x100>;
 
 			interrupt-controller;
 			#interrupt-cells = <1>;
 
 			interrupt-parent = <&cpuintc>;
 			interrupts = <2>;
 		};
 
 		memc@300 {
 			compatible = "ralink,rt2880-memc";
 			reg = <0x300 0x100>;
 		};
 
 		gpio0: gpio@600 {
 			compatible = "ralink,rt2880-gpio";
 			reg = <0x600 0x34>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
 			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
 		};
 
 		gpio1: gpio@638 {
 			compatible = "ralink,rt2880-gpio";
 			reg = <0x638 0x24>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <24>;
 			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		gpio2: gpio@660 {
 			compatible = "ralink,rt2880-gpio";
 			reg = <0x660 0x24>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <40>;
 			ralink,num-gpios = <32>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		uartlite@c00 {
 			compatible = "ralink,rt2880-uart", "ns16550a";
 			reg = <0xc00 0x100>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <8>;
 
 			reg-shift = <2>;
 		};
 	};
 
 	pinctrl {
 		compatible = "ralink,rt2880-pinmux";
 
 		pinctrl-names = "default";
 		pinctrl-0 = <&state_default>;
 
 		state_default: pinctrl0 {
 			sdram {
 				ralink,group = "sdram";
 				ralink,function = "sdram";
 			};
 		};
 
 		spi_pins: spi {
 			spi {
 				ralink,group = "spi";
 				ralink,function = "spi";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
 				ralink,group = "uartlite";
 				ralink,function = "uartlite";
 			};
 		};
 	};
 
 	rstctrl: rstctrl {
 		compatible = "ralink,rt2880-reset";
 		#reset-cells = <1>;
 	};
 
 	ethernet@400000 {
 		compatible = "ralink,rt2880-eth";
 		reg = <0x00400000 10000>;
 
 		#address-cells = <1>;
 		#size-cells = <0>;
 
 		resets = <&rstctrl 18>;
 		reset-names = "fe";
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <5>;
 
 		status = "disabled";
 
 		port@0 {
 			compatible = "ralink,rt2880-port", "mediatek,eth-port";
 			reg = <0>;
 		};
 
 		mdio-bus {
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			status = "disabled";
 		};
 	};
 
 	wmac@480000 {
 		compatible = "ralink,rt2880-wmac";
 		reg = <0x480000 40000>;
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <6>;
 
 		ralink,eeprom = "soc_wmac.eeprom";
 	};
 };
 
-#include <fbsd-rt2880.dtsi>
+/include/ "fbsd-rt2880.dtsi"
Index: head/sys/gnu/dts/mips/rt3050.dtsi
===================================================================
--- head/sys/gnu/dts/mips/rt3050.dtsi	(revision 298344)
+++ head/sys/gnu/dts/mips/rt3050.dtsi	(revision 298345)
@@ -1,265 +1,265 @@
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
 	compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
 
 	cpus {
 		cpu@0 {
 			compatible = "mips,mips24KEc";
 		};
 	};
 
 	chosen {
 		bootargs = "console=ttyS0,57600";
 	};
 
 	aliases {
 		spi0 = &spi0;
 	};
 
 	cpuintc: cpuintc@0 {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
 		interrupt-controller;
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
 	palmbus@10000000 {
 		compatible = "palmbus";
 		reg = <0x10000000 0x200000>;
 		ranges = <0x0 0x10000000 0x1FFFFF>;
 
 		#address-cells = <1>;
 		#size-cells = <1>;
 
 		sysc@0 {
 			compatible = "ralink,rt3050-sysc";
 			reg = <0x0 0x100>;
 		};
 
 		timer@100 {
 			compatible = "ralink,rt3050-timer", "ralink,rt2880-timer";
 			reg = <0x100 0x20>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 		};
 
 		watchdog@120 {
 			compatible = "ralink,rt3050-wdt", "ralink,rt2880-wdt";
 			reg = <0x120 0x10>;
 
 			resets = <&rstctrl 8>;
 			reset-names = "wdt";
 
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 		};
 
 		intc: intc@200 {
 			compatible = "ralink,rt3050-intc", "ralink,rt2880-intc";
 			reg = <0x200 0x100>;
 
 			resets = <&rstctrl 19>;
 			reset-names = "intc";
 
 			interrupt-controller;
 			#interrupt-cells = <1>;
 
 			interrupt-parent = <&cpuintc>;
 			interrupts = <2>;
 		};
 
 		memc@300 {
 			compatible = "ralink,rt3050-memc";
 			reg = <0x300 0x100>;
 
 			resets = <&rstctrl 20>;
 			reset-names = "mc";
 
 			interrupt-parent = <&intc>;
 			interrupts = <3>;
 		};
 
 		uart@500 {
 			compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0x500 0x100>;
 
 			resets = <&rstctrl 12>;
 			reset-names = "uart";
 
 			interrupt-parent = <&intc>;
 			interrupts = <5>;
 
 			reg-shift = <2>;
 
 			status = "disabled";
 		};
 
 		gpio0: gpio@600 {
 			compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
 			reg = <0x600 0x34>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
 			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
 
 			resets = <&rstctrl 13>;
 			reset-names = "pio";
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 		};
 
 		gpio1: gpio@638 {
 			compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
 			reg = <0x638 0x24>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <24>;
 			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		gpio2: gpio@660 {
 			compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
 			reg = <0x660 0x24>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <40>;
 			ralink,num-gpios = <12>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		spi0: spi@b00 {
 			compatible = "ralink,rt3050-spi", "ralink,rt2880-spi";
 			reg = <0xb00 0x100>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
 
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_pins>;
 
 			status = "disabled";
 		};
 
 		uartlite@c00 {
 			compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0xc00 0x100>;
 
 			resets = <&rstctrl 19>;
 			reset-names = "uartl";
 
 			interrupt-parent = <&intc>;
 			interrupts = <12>;
 
 			reg-shift = <2>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&uartlite_pins>;
 		};
 	};
 
 	pinctrl {
 		compatible = "ralink,rt2880-pinmux";
 
 		pinctrl-names = "default";
 		pinctrl-0 = <&state_default>;
 
 		state_default: pinctrl0 {
 			sdram {
 				ralink,group = "sdram";
 				ralink,function = "sdram";
 			};
 		};
 
 		spi_pins: spi {
 			spi {
 				ralink,group = "spi";
 				ralink,function = "spi";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
 				ralink,group = "uartlite";
 				ralink,function = "uartlite";
 			};
 		};
 	};
 
 	rstctrl: rstctrl {
 		compatible = "ralink,rt3050-reset", "ralink,rt2880-reset";
 		#reset-cells = <1>;
 	};
 
 	ethernet@10100000 {
 		compatible = "ralink,rt3050-eth";
 		reg = <0x10100000 10000>;
 
 		resets = <&rstctrl 21>;
 		reset-names = "fe";
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <5>;
 
 		mediatek,switch = <&esw>;
 	};
 
 	esw: esw@10110000 {
 		compatible = "ralink,rt3050-esw";
 		reg = <0x10110000 8000>;
 
 		resets = <&rstctrl 23>;
 		reset-names = "esw";
 
 		interrupt-parent = <&intc>;
 		interrupts = <17>;
 	};
 
 	wmac@10180000 {
 		compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac";
 		reg = <0x10180000 40000>;
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <6>;
 
 		ralink,eeprom = "soc_wmac.eeprom";
 	};
 
 	otg@101c0000 {
 		compatible = "ralink,rt3050-otg", "snps,dwc2";
 		reg = <0x101c0000 40000>;
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 
 		resets = <&rstctrl 22>;
 		reset-names = "otg";
 
 		status = "disabled";
 	};
 };
 
-#include <fbsd-rt3050.dtsi>
+/include/ "fbsd-rt3050.dtsi"
Index: head/sys/gnu/dts/mips/rt3352.dtsi
===================================================================
--- head/sys/gnu/dts/mips/rt3352.dtsi	(revision 298344)
+++ head/sys/gnu/dts/mips/rt3352.dtsi	(revision 298345)
@@ -1,293 +1,293 @@
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
 	compatible = "ralink,rt3352-soc";
 
 	cpus {
 		cpu@0 {
 			compatible = "mips,mips24KEc";
 		};
 	};
 
 	chosen {
 		bootargs = "console=ttyS0,57600";
 	};
 
 	cpuintc: cpuintc@0 {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
 		interrupt-controller;
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
 	aliases {
 		spi0 = &spi0;
 		spi1 = &spi1;
 	};
 
 	palmbus@10000000 {
 		compatible = "palmbus";
 		reg = <0x10000000 0x200000>;
 		ranges = <0x0 0x10000000 0x1FFFFF>;
 
 		#address-cells = <1>;
 		#size-cells = <1>;
 
 		sysc@0 {
 			compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc";
 			reg = <0x0 0x100>;
 		};
 
 		timer@100 {
 			compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
 			reg = <0x100 0x20>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 		};
 
 		watchdog@120 {
 			compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
 			reg = <0x120 0x10>;
 
 			resets = <&rstctrl 8>;
 			reset-names = "wdt";
 
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 		};
 
 		intc: intc@200 {
 			compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
 			reg = <0x200 0x100>;
 
 			interrupt-controller;
 			#interrupt-cells = <1>;
 
 			interrupt-parent = <&cpuintc>;
 			interrupts = <2>;
 		};
 
 		memc@300 {
 			compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
 			reg = <0x300 0x100>;
 
 			resets = <&rstctrl 20>;
 			reset-names = "mc";
 
 			interrupt-parent = <&intc>;
 			interrupts = <3>;
 		};
 
 		uart@500 {
 			compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0x500 0x100>;
 
 			resets = <&rstctrl 12>;
 			reset-names = "uart";
 
 			interrupt-parent = <&intc>;
 			interrupts = <5>;
 
 			reg-shift = <2>;
 
 			status = "disabled";
 		};
 
 		gpio0: gpio@600 {
 			compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
 			reg = <0x600 0x34>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
 			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
 			resets = <&rstctrl 13>;
 			reset-names = "pio";
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 		};
 
 		gpio1: gpio@638 {
 			compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
 			reg = <0x638 0x24>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <24>;
 			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		gpio2: gpio@660 {
 			compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
 			reg = <0x660 0x24>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <40>;
 			ralink,num-gpios = <6>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		spi0: spi@b00 {
 			compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
 			reg = <0xb00 0x40>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_pins>;
 
 			status = "disabled";
 		};
 
 		spi1: spi@b40 {
 			compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
 			reg = <0xb40 0x60>;
 			#address-cells = <1>;
 			#size-cells = <1>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_cs1>;
 
 			status = "disabled";
 		};
 
 		uartlite@c00 {
 			compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0xc00 0x100>;
 
 			resets = <&rstctrl 19>;
 			reset-names = "uartl";
 
 			interrupt-parent = <&intc>;
 			interrupts = <12>;
 
 			reg-shift = <2>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&uartlite_pins>;
 		};
 	};
 
 	pinctrl {
 		compatible = "ralink,rt2880-pinmux";
 
 		pinctrl-names = "default";
 		pinctrl-0 = <&state_default>;
 
 		state_default: pinctrl0 {
 		};
 
 		spi_pins: spi {
 			spi {
 				ralink,group = "spi";
 				ralink,function = "spi";
 			};
 		};
 
 		spi_cs1: spi1 {
 			spi1 {
 				ralink,group = "spi_cs1";
 				ralink,function = "spi_cs1";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
 				ralink,group = "uartlite";
 				ralink,function = "uartlite";
 			};
 		};
 	};
 
 	rstctrl: rstctrl {
 		compatible = "ralink,rt3352-reset", "ralink,rt2880-reset";
 		#reset-cells = <1>;
 	};
 
 	ethernet@10100000 {
 		compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
 		reg = <0x10100000 10000>;
 
 		resets = <&rstctrl 21>;
 		reset-names = "fe";
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <5>;
 
 		mediatek,switch = <&esw>;
 	};
 
 	esw: esw@10110000 {
 		compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
 		reg = <0x10110000 8000>;
 
 		resets = <&rstctrl 23>;
 		reset-names = "esw";
 
 		interrupt-parent = <&intc>;
 		interrupts = <17>;
 	};
 
 	usbphy {
 		compatible = "ralink,rt3352-usbphy";
 
 		resets = <&rstctrl 22 &rstctrl 25>;
 		reset-names = "host", "device";
 	};
 
 	wmac@10180000 {
 		compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
 		reg = <0x10180000 40000>;
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <6>;
 
 		ralink,eeprom = "soc_wmac.eeprom";
 	};
 
 	ehci@101c0000 {
 		compatible = "generic-ehci";
 		reg = <0x101c0000 0x1000>;
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 
 		status = "disabled";
 	};
 
 	ohci@101c1000 {
 		compatible = "generic-ohci";
 		reg = <0x101c1000 0x1000>;
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 
 		status = "disabled";
 	};
 };
 
-#include <fbsd-rt3352.dtsi>
+/include/ "fbsd-rt3352.dtsi"
Index: head/sys/gnu/dts/mips/rt3883.dtsi
===================================================================
--- head/sys/gnu/dts/mips/rt3883.dtsi	(revision 298344)
+++ head/sys/gnu/dts/mips/rt3883.dtsi	(revision 298345)
@@ -1,405 +1,405 @@
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
 	compatible = "ralink,rt3883-soc";
 
 	cpus {
 		cpu@0 {
 			compatible = "mips,mips74Kc";
 		};
 	};
 
 	chosen {
 		bootargs = "console=ttyS0,57600";
 	};
 
 	aliases {
 		spi0 = &spi0;
 		spi1 = &spi1;
 	};
 
 	cpuintc: cpuintc@0 {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
 		interrupt-controller;
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
 	palmbus@10000000 {
 		compatible = "palmbus";
 		reg = <0x10000000 0x200000>;
 		ranges = <0x0 0x10000000 0x1FFFFF>;
 
 		#address-cells = <1>;
 		#size-cells = <1>;
 
 		sysc@0 {
 			compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc";
 			reg = <0x0 0x100>;
 		};
 
 		timer@100 {
 			compatible = "ralink,rt3883-timer", "ralink,rt2880-timer";
 			reg = <0x100 0x20>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 		};
 
 		watchdog@120 {
 			compatible = "ralink,rt3883-wdt", "ralink,rt2880-wdt";
 			reg = <0x120 0x10>;
 
 			resets = <&rstctrl 8>;
 			reset-names = "wdt";
 
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 		};
 
 		intc: intc@200 {
 			compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
 			reg = <0x200 0x100>;
 
 			resets = <&rstctrl 19>;
 			reset-names = "intc";
 
 			interrupt-controller;
 			#interrupt-cells = <1>;
 
 			interrupt-parent = <&cpuintc>;
 			interrupts = <2>;
 		};
 
 		memc@300 {
 			compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
 			reg = <0x300 0x100>;
 
 			resets = <&rstctrl 20>;
 			reset-names = "mc";
 
 			interrupt-parent = <&intc>;
 			interrupts = <3>;
 		};
 
 		uart@500 {
 			compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0x500 0x100>;
 
 			resets = <&rstctrl 12>;
 			reset-names = "uart";
 
 			interrupt-parent = <&intc>;
 			interrupts = <5>;
 
 			reg-shift = <2>;
 
 			status = "disabled";
 		};
 
 		gpio0: gpio@600 {
 			compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
 			reg = <0x600 0x34>;
 
 			resets = <&rstctrl 13>;
 			reset-names = "pio";
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
 			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
 		};
 
 		gpio1: gpio@638 {
 			compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
 			reg = <0x638 0x24>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <24>;
 			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		gpio2: gpio@660 {
 			compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
 			reg = <0x660 0x24>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <40>;
 			ralink,num-gpios = <32>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		gpio3: gpio@688 {
 			compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
 			reg = <0x688 0x24>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <72>;
 			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		spi0: spi@b00 {
 			compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
 			reg = <0xb00 0x40>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_pins>;
 
 			status = "disabled";
 		};
 
 		spi1: spi@b40 {
 			compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
 			reg = <0xb40 0x60>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_cs1>;
 
 			status = "disabled";
 		};
 
 		uartlite@c00 {
 			compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0xc00 0x100>;
 
 			resets = <&rstctrl 19>;
 			reset-names = "uartl";
 
 			interrupt-parent = <&intc>;
 			interrupts = <12>;
 
 			reg-shift = <2>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&uartlite_pins>;
 		};
 	};
 
 	pinctrl {
 		compatible = "ralink,rt2880-pinmux";
 
 		pinctrl-names = "default";
 		pinctrl-0 = <&state_default>;
 
 		state_default: pinctrl0 {
 		};
 
 		spi_pins: spi {
 			spi {
 				ralink,group = "spi";
 				ralink,function = "spi";
 			};
 		};
 
 		spi_cs1: spi1 {
 			spi1 {
 				ralink,group = "spi_cs1";
 				ralink,function = "spi_cs1";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
 				ralink,group = "uartlite";
 				ralink,function = "uartlite";
 			};
 		};
 	};
 
 	ethernet@10100000 {
 		compatible = "ralink,rt3883-eth";
 		reg = <0x10100000 10000>;
 
 		resets = <&rstctrl 21>;
 		reset-names = "fe";
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <5>;
 
 		port@0 {
 			compatible = "ralink,rt3883-port", "mediatek,eth-port";
 			reg = <0>;
 		};
 
 		mdio-bus {
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			status = "disabled";
 		};
 	};
 
 	rstctrl: rstctrl {
 		compatible = "ralink,rt3883-reset", "ralink,rt2880-reset";
 		#reset-cells = <1>;
 	};
 
 	pci@10140000 {
 		compatible = "ralink,rt3883-pci";
 		reg = <0x10140000 0x20000>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges; /* direct mapping */
 
 		status = "disabled";
 
 		pciintc: interrupt-controller {
 			interrupt-controller;
 			#address-cells = <0>;
 			#interrupt-cells = <1>;
 
 			interrupt-parent = <&cpuintc>;
 			interrupts = <4>;
 		};
 
 		host-bridge {
 			#address-cells = <3>;
 			#size-cells = <2>;
 			#interrupt-cells = <1>;
 
 			device_type = "pci";
 
 			bus-range = <0 255>;
 			ranges = <
 				0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 				0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 			>;
 
 			interrupt-map-mask = <0xf800 0 0 7>;
 			interrupt-map = <
 				/* IDSEL 17 */
 				0x8800 0 0 1 &pciintc 18
 				0x8800 0 0 2 &pciintc 18
 				0x8800 0 0 3 &pciintc 18
 				0x8800 0 0 4 &pciintc 18
 				/* IDSEL 18 */
 				0x9000 0 0 1 &pciintc 19
 				0x9000 0 0 2 &pciintc 19
 				0x9000 0 0 3 &pciintc 19
 				0x9000 0 0 4 &pciintc 19
 			>;
 
 			pci-bridge@1 {
 				reg = <0x0800 0 0 0 0>;
 				device_type = "pci";
 				#interrupt-cells = <1>;
 				#address-cells = <3>;
 				#size-cells = <2>;
 
 				status = "disabled";
 
 				ralink,pci-slot = <1>;
 
 				interrupt-map-mask = <0x0 0 0 0>;
 				interrupt-map = <0x0 0 0 0 &pciintc 20>;
 			};
 
 			pci-slot@17 {
 				reg = <0x8800 0 0 0 0>;
 				device_type = "pci";
 				#interrupt-cells = <1>;
 				#address-cells = <3>;
 				#size-cells = <2>;
 
 				ralink,pci-slot = <17>;
 
 				status = "disabled";
 			};
 
 			pci-slot@18 {
 				reg = <0x9000 0 0 0 0>;
 				device_type = "pci";
 				#interrupt-cells = <1>;
 				#address-cells = <3>;
 				#size-cells = <2>;
 
 				ralink,pci-slot = <18>;
 
 				status = "disabled";
 			};
 		};
 	};
 
 	usbphy: usbphy {
 		compatible = "ralink,rt3352-usbphy";
 		#phy-cells = <1>;
 
 		resets = <&rstctrl 22 &rstctrl 25>;
 		reset-names = "host", "device";
 	};
 
 	wmac@10180000 {
 		compatible = "ralink,rt3883-wmac", "ralink,rt2880-wmac";
 		reg = <0x10180000 40000>;
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <6>;
 
 		ralink,eeprom = "soc_wmac.eeprom";
 	};
 
 	ehci@101c0000 {
 		compatible = "generic-ehci";
 		reg = <0x101c0000 0x1000>;
 
 		phys = <&usbphy 1>;
 		phy-names = "usb";
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 
 		status = "disabled";
 	};
 
 	ohci@101c1000 {
 		compatible = "generic-ohci";
 		reg = <0x101c1000 0x1000>;
 
 		phys = <&usbphy 1>;
 		phy-names = "usb";
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 
 		status = "disabled";
 	};
 };
 
-#include <fbsd-rt3883.dtsi>
+/include/ "fbsd-rt3883.dtsi"
Index: head/sys/gnu/dts/mips/rt5350.dtsi
===================================================================
--- head/sys/gnu/dts/mips/rt5350.dtsi	(revision 298344)
+++ head/sys/gnu/dts/mips/rt5350.dtsi	(revision 298345)
@@ -1,334 +1,334 @@
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
 	compatible = "ralink,rt5350-soc";
 
 	cpus {
 		cpu@0 {
 			compatible = "mips,mips24KEc";
 		};
 	};
 
 	chosen {
 		bootargs = "console=ttyS0,57600";
 	};
 
 	cpuintc: cpuintc@0 {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
 		interrupt-controller;
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
 	aliases {
 		spi0 = &spi0;
 		spi1 = &spi1;
 	};
 
 	palmbus@10000000 {
 		compatible = "palmbus";
 		reg = <0x10000000 0x200000>;
 		ranges = <0x0 0x10000000 0x1FFFFF>;
 
 		#address-cells = <1>;
 		#size-cells = <1>;
 
 		sysc@0 {
 			compatible = "ralink,rt5350-sysc", "ralink,rt3050-sysc";
 			reg = <0x0 0x100>;
 		};
 
 		timer@100 {
 			compatible = "ralink,rt5350-timer", "ralink,rt2880-timer";
 			reg = <0x100 0x20>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 		};
 
 		watchdog@120 {
 			compatible = "ralink,rt5350-wdt", "ralink,rt2880-wdt";
 			reg = <0x120 0x10>;
 
 			resets = <&rstctrl 8>;
 			reset-names = "wdt";
 
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 		};
 
 		intc: intc@200 {
 			compatible = "ralink,rt5350-intc", "ralink,rt2880-intc";
 			reg = <0x200 0x100>;
 
 			resets = <&rstctrl 19>;
 			reset-names = "intc";
 
 			interrupt-controller;
 			#interrupt-cells = <1>;
 
 			interrupt-parent = <&cpuintc>;
 			interrupts = <2>;
 		};
 
 		memc@300 {
 			compatible = "ralink,rt5350-memc", "ralink,rt3050-memc";
 			reg = <0x300 0x100>;
 
 			resets = <&rstctrl 20>;
 			reset-names = "mc";
 
 			interrupt-parent = <&intc>;
 			interrupts = <3>;
 		};
 
 		uart@500 {
 			compatible = "ralink,rt5350-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0x500 0x100>;
 
 			resets = <&rstctrl 12>;
 			reset-names = "uart";
 
 			interrupt-parent = <&intc>;
 			interrupts = <5>;
 
 			reg-shift = <2>;
 
 			status = "disabled";
 		};
 
 		gpio0: gpio@600 {
 			compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
 			reg = <0x600 0x34>;
 
 			resets = <&rstctrl 13>;
 			reset-names = "pio";
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
 			ralink,num-gpios = <22>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
 		};
 
 		gpio1: gpio@660 {
 			compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
 			reg = <0x660 0x24>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <22>;
 			ralink,num-gpios = <6>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
 
 			status = "disabled";
 		};
 
 		i2c@900 {
 			compatible = "link,rt5350-i2c", "ralink,rt2880-i2c";
 			reg = <0x900 0x100>;
 
 			resets = <&rstctrl 16>;
 			reset-names = "i2c";
 
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&i2c_pins>;
 
 			status = "disabled";
 		};
 
 		spi0: spi@b00 {
 			compatible = "ralink,rt5350-spi", "ralink,rt2880-spi";
 			reg = <0xb00 0x40>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
 
 			#address-cells = <1>;
 			#size-cells = <1>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_pins>;
 
 			status = "disabled";
 		};
 
 		spi1: spi@b40 {
 			compatible = "ralink,rt5350-spi", "ralink,rt2880-spi";
 			reg = <0xb40 0x60>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
 
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_cs1>;
 
 			status = "disabled";
 		};
 
 		uartlite@c00 {
 			compatible = "ralink,rt5350-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0xc00 0x100>;
 
 			resets = <&rstctrl 19>;
 			reset-names = "uartl";
 
 			interrupt-parent = <&intc>;
 			interrupts = <12>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&uartlite_pins>;
 
 			reg-shift = <2>;
 		};
 
 		systick@d00 {
 			compatible = "ralink,rt5350-systick", "ralink,cevt-systick";
 			reg = <0xd00 0x10>;
 
 			interrupt-parent = <&cpuintc>;
 			interrupts = <7>;
 		};
 	};
 
 	pinctrl {
 		compatible = "ralink,rt2880-pinmux";
 
 		pinctrl-names = "default";
 		pinctrl-0 = <&state_default>;
 
 		state_default: pinctrl0 {
 		};
 
 		spi_pins: spi {
 			spi {
 				ralink,group = "spi";
 				ralink,function = "spi";
 			};
 		};
 
 		i2c_pins: i2c {
 			i2c {
 				ralink,group = "i2c";
 				ralink,function = "i2c";
 			};
 		};
 
 		phy_led_pins: phy_led {
 			phy_led {
 				ralink,group = "led";
 				ralink,function = "led";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
 				ralink,group = "uartlite";
 				ralink,function = "uartlite";
 			};
 		};
 
 		uartf_pins: uartf {
 			uartf {
 				ralink,group = "uartf";
 				ralink,function = "uartf";
 			};
 		};
 
 		spi_cs1: spi1 {
 			spi1 {
 				ralink,group = "spi_cs1";
 				ralink,function = "spi_cs1";
 			};
 		};
 	};
 
 	rstctrl: rstctrl {
 		compatible = "ralink,rt5350-reset", "ralink,rt2880-reset";
 		#reset-cells = <1>;
 	};
 
 	usbphy: usbphy {
 		compatible = "ralink,rt3352-usbphy";
 		#phy-cells = <1>;
 
 		resets = <&rstctrl 22 &rstctrl 25>;
 		reset-names = "host", "device";
 	};
 
 	ethernet@10100000 {
 		compatible = "ralink,rt5350-eth";
 		reg = <0x10100000 10000>;
 
 		resets = <&rstctrl 21 &rstctrl 23>;
 		reset-names = "fe", "esw";
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <5>;
 
 		mediatek,switch = <&esw>;
 	};
 
 	esw: esw@10110000 {
 		compatible = "ralink,rt3050-esw";
 		reg = <0x10110000 8000>;
 
 		resets = <&rstctrl 23>;
 		reset-names = "esw";
 
 		interrupt-parent = <&intc>;
 		interrupts = <17>;
 	};
 
 	wmac@10180000 {
 		compatible = "ralink,rt5350-wmac", "ralink,rt2880-wmac";
 		reg = <0x10180000 40000>;
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <6>;
 
 		ralink,eeprom = "soc_wmac.eeprom";
 	};
 
 	ehci@101c0000 {
 		compatible = "generic-ehci";
 		reg = <0x101c0000 0x1000>;
 
 		phys = <&usbphy 1>;
 		phy-names = "usb";
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 	};
 
 	ohci@101c1000 {
 		compatible = "generic-ohci";
 		reg = <0x101c1000 0x1000>;
 
 		phys = <&usbphy 1>;
 		phy-names = "usb";
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 	};
 };
 
-#include <fbsd-rt5350.dtsi>
+/include/ "fbsd-rt5350.dtsi"