Index: head/share/man/man4/uart.4 =================================================================== --- head/share/man/man4/uart.4 (revision 286590) +++ head/share/man/man4/uart.4 (revision 286591) @@ -1,181 +1,214 @@ .\" .\" Copyright (c) 2003 Marcel Moolenaar .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without .\" modification, are permitted provided that the following conditions .\" are met: .\" .\" 1. Redistributions of source code must retain the above copyright .\" notice, this list of conditions and the following disclaimer. .\" 2. Redistributions in binary form must reproduce the above copyright .\" notice, this list of conditions and the following disclaimer in the .\" documentation and/or other materials provided with the distribution. .\" .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR .\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES .\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. .\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, .\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT .\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, .\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY .\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. .\" .\" $FreeBSD$ .\" -.Dd March 12, 2008 +.Dd August 10, 2015 .Dt UART 4 .Os .Sh NAME .Nm uart .Nd driver for Universal Asynchronous Receiver/Transmitter (UART) devices .Sh SYNOPSIS .Cd "device uart" .Pp .Cd "device puc" .Cd "device uart" .Pp .Cd "device scc" .Cd "device uart" .Pp In .Pa /boot/device.hints : .Cd hint.uart.0.disabled="1" .Cd hint.uart.0.baud="38400" .Cd hint.uart.0.port="0x3f8" .Cd hint.uart.0.flags="0x10" .Pp With .Ar flags encoded as: .Bl -tag -compact -width 0x000000 .It 0x00010 device is potential system console .It 0x00080 use this port for remote kernel debugging .It 0x00100 set RX FIFO trigger level to ``low'' (NS8250 only) .It 0x00200 set RX FIFO trigger level to ``medium low'' (NS8250 only) .It 0x00400 set RX FIFO trigger level to ``medium high'' (default, NS8250 only) .It 0x00800 set RX FIFO trigger level to ``high'' (NS8250 only) .El .\" .Sh DESCRIPTION The .Nm device driver provides support for various classes of UARTs implementing the EIA RS-232C (CCITT V.24) serial communications interface. Each such interface is controlled by a separate and independent instance of the .Nm driver. The primary support for devices that contain multiple serial interfaces or that contain other functionality besides one or more serial interfaces is provided by the .Xr puc 4 , or .Xr scc 4 device drivers. However, the serial interfaces of those devices that are managed by the .Xr puc 4 , or .Xr scc 4 driver are each independently controlled by the .Nm driver. As such, the .Xr puc 4 , or .Xr scc 4 driver provides umbrella functionality for the .Nm driver and hides the complexities that are inherent when elementary components are packaged together. .Pp The .Nm driver has a modular design to allow it to be used on differing hardware and for various purposes. In the following sections the components are discussed in detail. Options are described in the section that covers the component to which each option applies. .\" .Ss CORE COMPONENT At the heart of the .Nm driver is the core component. It contains the bus attachments and the low-level interrupt handler. .\" .Ss HARDWARE DRIVERS The core component and the kernel interfaces talk to the hardware through the hardware interface. This interface serves as an abstraction of the hardware and allows varying UARTs to be used for serial communications. .\" .Ss SYSTEM DEVICES System devices are UARTs that have a special purpose by way of hardware design or software setup. For example, Sun UltraSparc machines use UARTs as their keyboard interface. Such an UART cannot be used for general purpose communications. Likewise, when the kernel is configured for a serial console, the corresponding UART will in turn be a system device so that the kernel can output boot messages early on in the boot process. .\" .Ss KERNEL INTERFACES The last but not least of the components is the kernel interface. This component ultimately determines how the UART is made visible to the kernel in particular and to users in general. The default kernel interface is the TTY interface. This allows the UART to be used for terminals, modems and serial line IP applications. System devices, with the notable exception of serial consoles, generally have specialized kernel interfaces. .\" .Sh HARDWARE The .Nm driver supports the following classes of UARTs: .Pp .Bl -bullet -compact .It NS8250: standard hardware based on the 8250, 16450, 16550, 16650, 16750 or the 16950 UARTs. .It SCC: serial communications controllers supported by the .Xr scc 4 device driver. .El .\" +.Sh Pulse Per Second (PPS) Timing Interface +The +.Nm +driver can capture PPS timing information as defined in RFC 2783. +The API, accessed via +.Xr ioctl 8 , +is available on the tty device. +To use the PPS capture feature with +.Xr ntpd 8 , +symlink the tty device to +.Va /dev/pps0. +.Pp +The +.Va hw.uart.pps_mode +tunable configures the PPS capture mode for all uart devices; +it can be set in +.Xr loader.conf 5 . +The +.Va dev.uart.0.pps_mode +sysctl configures the PPS capture mode for a specific uart device; +it can be set in +.Xr loader.conf 5 +or +.Xr sysctl.conf 5 . +The following capture modes are available: +.Bl -tag -compact -offset "mmmm" -width "mmmm" +.It 0 +Capture disabled. +.It 1 +Capture pulses on the CTS line. +.It 2 +Capture pulses on the DCD line (default). +.El .Sh FILES .Bl -tag -width ".Pa /dev/ttyu?.init" -compact .It Pa /dev/ttyu? for callin ports .It Pa /dev/ttyu?.init .It Pa /dev/ttyu?.lock corresponding callin initial-state and lock-state devices .Pp .It Pa /dev/cuau? for callout ports .It Pa /dev/cuau?.init .It Pa /dev/cuau?.lock corresponding callout initial-state and lock-state devices .El .Sh SEE ALSO .Xr puc 4 , .Xr scc 4 .\" .Sh HISTORY The .Nm device driver first appeared in .Fx 5.2 . .Sh AUTHORS The .Nm device driver and this manual page were written by .An Marcel Moolenaar Aq Mt marcel@xcllnt.net . Index: head/sys/dev/uart/uart_bus.h =================================================================== --- head/sys/dev/uart/uart_bus.h (revision 286590) +++ head/sys/dev/uart/uart_bus.h (revision 286591) @@ -1,222 +1,215 @@ /*- * Copyright (c) 2003 Marcel Moolenaar * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD$ */ #ifndef _DEV_UART_BUS_H_ #define _DEV_UART_BUS_H_ #ifndef KLD_MODULE #include "opt_uart.h" #endif #include #include /* Drain and flush targets. */ #define UART_DRAIN_RECEIVER 0x0001 #define UART_DRAIN_TRANSMITTER 0x0002 #define UART_FLUSH_RECEIVER UART_DRAIN_RECEIVER #define UART_FLUSH_TRANSMITTER UART_DRAIN_TRANSMITTER /* Received character status bits. */ #define UART_STAT_BREAK 0x0100 #define UART_STAT_FRAMERR 0x0200 #define UART_STAT_OVERRUN 0x0400 #define UART_STAT_PARERR 0x0800 -#ifdef UART_PPS_ON_CTS -#define UART_SIG_DPPS SER_DCTS -#define UART_SIG_PPS SER_CTS -#else -#define UART_SIG_DPPS SER_DDCD -#define UART_SIG_PPS SER_DCD -#endif - /* UART_IOCTL() requests */ #define UART_IOCTL_BREAK 1 #define UART_IOCTL_IFLOW 2 #define UART_IOCTL_OFLOW 3 #define UART_IOCTL_BAUD 4 /* * UART class & instance (=softc) */ struct uart_class { KOBJ_CLASS_FIELDS; struct uart_ops *uc_ops; /* Low-level console operations. */ u_int uc_range; /* Bus space address range. */ u_int uc_rclk; /* Default rclk for this device. */ u_int uc_rshift; /* Default regshift for this device. */ }; struct uart_softc { KOBJ_FIELDS; struct uart_class *sc_class; struct uart_bas sc_bas; device_t sc_dev; struct mtx sc_hwmtx_s; /* Spinlock protecting hardware. */ struct mtx *sc_hwmtx; struct resource *sc_rres; /* Register resource. */ int sc_rrid; int sc_rtype; /* SYS_RES_{IOPORT|MEMORY}. */ struct resource *sc_ires; /* Interrupt resource. */ void *sc_icookie; int sc_irid; struct callout sc_timer; int sc_callout:1; /* This UART is opened for callout. */ int sc_fastintr:1; /* This UART uses fast interrupts. */ int sc_hwiflow:1; /* This UART has HW input flow ctl. */ int sc_hwoflow:1; /* This UART has HW output flow ctl. */ int sc_leaving:1; /* This UART is going away. */ int sc_opened:1; /* This UART is open for business. */ int sc_polled:1; /* This UART has no interrupts. */ int sc_txbusy:1; /* This UART is transmitting. */ int sc_isquelch:1; /* This UART has input squelched. */ int sc_testintr:1; /* This UART is under int. testing. */ struct uart_devinfo *sc_sysdev; /* System device (or NULL). */ int sc_altbrk; /* State for alt break sequence. */ uint32_t sc_hwsig; /* Signal state. Used by HW driver. */ /* Receiver data. */ uint16_t *sc_rxbuf; int sc_rxbufsz; int sc_rxput; int sc_rxget; int sc_rxfifosz; /* Size of RX FIFO. */ /* Transmitter data. */ uint8_t *sc_txbuf; int sc_txdatasz; int sc_txfifosz; /* Size of TX FIFO and buffer. */ /* Pulse capturing support (PPS). */ struct pps_state sc_pps; + int sc_pps_mode; /* Upper layer data. */ void *sc_softih; uint32_t sc_ttypend; union { /* TTY specific data. */ struct { struct tty *tp; } u_tty; /* Keyboard specific data. */ struct { } u_kbd; } sc_u; }; extern devclass_t uart_devclass; extern const char uart_driver_name[]; int uart_bus_attach(device_t dev); int uart_bus_detach(device_t dev); int uart_bus_resume(device_t dev); serdev_intr_t *uart_bus_ihand(device_t dev, int ipend); int uart_bus_ipend(device_t dev); int uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan); int uart_bus_sysdev(device_t dev); void uart_sched_softih(struct uart_softc *, uint32_t); int uart_tty_attach(struct uart_softc *); int uart_tty_detach(struct uart_softc *); struct mtx *uart_tty_getlock(struct uart_softc *); void uart_tty_intr(void *arg); /* * Receive buffer operations. */ static __inline int uart_rx_empty(struct uart_softc *sc) { return ((sc->sc_rxget == sc->sc_rxput) ? 1 : 0); } static __inline int uart_rx_full(struct uart_softc *sc) { return ((sc->sc_rxput + 1 < sc->sc_rxbufsz) ? (sc->sc_rxput + 1 == sc->sc_rxget) : (sc->sc_rxget == 0)); } static __inline int uart_rx_get(struct uart_softc *sc) { int ptr, xc; ptr = sc->sc_rxget; if (ptr == sc->sc_rxput) return (-1); xc = sc->sc_rxbuf[ptr++]; sc->sc_rxget = (ptr < sc->sc_rxbufsz) ? ptr : 0; return (xc); } static __inline int uart_rx_next(struct uart_softc *sc) { int ptr; ptr = sc->sc_rxget; if (ptr == sc->sc_rxput) return (-1); ptr += 1; sc->sc_rxget = (ptr < sc->sc_rxbufsz) ? ptr : 0; return (0); } static __inline int uart_rx_peek(struct uart_softc *sc) { int ptr; ptr = sc->sc_rxget; return ((ptr == sc->sc_rxput) ? -1 : sc->sc_rxbuf[ptr]); } static __inline int uart_rx_put(struct uart_softc *sc, int xc) { int ptr; ptr = (sc->sc_rxput + 1 < sc->sc_rxbufsz) ? sc->sc_rxput + 1 : 0; if (ptr == sc->sc_rxget) return (ENOSPC); sc->sc_rxbuf[sc->sc_rxput] = xc; sc->sc_rxput = ptr; return (0); } #endif /* _DEV_UART_BUS_H_ */ Index: head/sys/dev/uart/uart_core.c =================================================================== --- head/sys/dev/uart/uart_core.c (revision 286590) +++ head/sys/dev/uart/uart_core.c (revision 286591) @@ -1,664 +1,767 @@ /*- * Copyright (c) 2003 Marcel Moolenaar * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "uart_if.h" devclass_t uart_devclass; const char uart_driver_name[] = "uart"; SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs = SLIST_HEAD_INITIALIZER(uart_sysdevs); static MALLOC_DEFINE(M_UART, "UART", "UART driver"); #ifndef UART_POLL_FREQ #define UART_POLL_FREQ 50 #endif static int uart_poll_freq = UART_POLL_FREQ; SYSCTL_INT(_debug, OID_AUTO, uart_poll_freq, CTLFLAG_RDTUN, &uart_poll_freq, 0, "UART poll frequency"); static int uart_force_poll; SYSCTL_INT(_debug, OID_AUTO, uart_force_poll, CTLFLAG_RDTUN, &uart_force_poll, 0, "Force UART polling"); +#define PPS_MODE_DISABLED 0 +#define PPS_MODE_CTS 1 +#define PPS_MODE_DCD 2 + +static inline int +uart_pps_signal(int pps_mode) +{ + + switch(pps_mode) + { + case PPS_MODE_CTS: + return (SER_CTS); + case PPS_MODE_DCD: + return (SER_DCD); + } + return (0); +} +static inline int +uart_pps_mode_valid(int pps_mode) +{ + + switch(pps_mode) + { + case PPS_MODE_DISABLED: + case PPS_MODE_CTS: + case PPS_MODE_DCD: + return (true); + } + return (false); +} + +static const char * +uart_pps_mode_name(int pps_mode) +{ + switch(pps_mode) + { + case PPS_MODE_DISABLED: + return ("disabled"); + case PPS_MODE_CTS: + return ("CTS"); + case PPS_MODE_DCD: + return ("DCD"); + } + return ("invalid"); +} + +static int +uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS) +{ + struct uart_softc *sc; + int err, tmp; + + sc = arg1; + tmp = sc->sc_pps_mode; + err = sysctl_handle_int(oidp, &tmp, 0, req); + if (err != 0 || req->newptr == NULL) + return (err); + if (!uart_pps_mode_valid(tmp)) + return (EINVAL); + sc->sc_pps_mode = tmp; + return(0); +} + +static void +uart_pps_init(struct uart_softc *sc) +{ + struct sysctl_ctx_list *ctx; + struct sysctl_oid *tree; + + ctx = device_get_sysctl_ctx(sc->sc_dev); + tree = device_get_sysctl_tree(sc->sc_dev); + + /* + * The historical default for pps capture mode is either DCD or CTS, + * depending on the UART_PPS_ON_CTS kernel option. Start with that, + * then try to fetch the tunable that overrides the mode for all uart + * devices, then try to fetch the sysctl-tunable that overrides the mode + * for one specific device. + */ +#ifdef UART_PPS_ON_CTS + sc->sc_pps_mode = PPS_MODE_CTS; +#else + sc->sc_pps_mode = PPS_MODE_DCD; +#endif + TUNABLE_INT_FETCH("hw.uart.pps_mode", &sc->sc_pps_mode); + SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "pps_mode", + CTLTYPE_INT | CTLFLAG_RWTUN, sc, 0, uart_pps_mode_sysctl, "I", + "pulse capturing mode - 0/1/2 - disabled/CTS/DCD"); + + if (!uart_pps_mode_valid(sc->sc_pps_mode)) { + device_printf(sc->sc_dev, + "Invalid pps_mode %d configured; disabling PPS capture\n", + sc->sc_pps_mode); + sc->sc_pps_mode = PPS_MODE_DISABLED; + } else if (bootverbose) { + device_printf(sc->sc_dev, "PPS capture mode %d (%s)\n", + sc->sc_pps_mode, uart_pps_mode_name(sc->sc_pps_mode)); + } + + sc->sc_pps.ppscap = PPS_CAPTUREBOTH; + sc->sc_pps.driver_mtx = uart_tty_getlock(sc); + sc->sc_pps.driver_abi = PPS_ABI_VERSION; + pps_init_abi(&sc->sc_pps); +} + void uart_add_sysdev(struct uart_devinfo *di) { SLIST_INSERT_HEAD(&uart_sysdevs, di, next); } const char * uart_getname(struct uart_class *uc) { return ((uc != NULL) ? uc->name : NULL); } struct uart_ops * uart_getops(struct uart_class *uc) { return ((uc != NULL) ? uc->uc_ops : NULL); } int uart_getrange(struct uart_class *uc) { return ((uc != NULL) ? uc->uc_range : 0); } u_int uart_getregshift(struct uart_class *uc) { return ((uc != NULL) ? uc->uc_rshift : 0); } /* * Schedule a soft interrupt. We do this on the 0 to !0 transition * of the TTY pending interrupt status. */ void uart_sched_softih(struct uart_softc *sc, uint32_t ipend) { uint32_t new, old; do { old = sc->sc_ttypend; new = old | ipend; } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); if ((old & SER_INT_MASK) == 0) swi_sched(sc->sc_softih, 0); } /* * A break condition has been detected. We treat the break condition as * a special case that should not happen during normal operation. When * the break condition is to be passed to higher levels in the form of * a NUL character, we really want the break to be in the right place in * the input stream. The overhead to achieve that is not in relation to * the exceptional nature of the break condition, so we permit ourselves * to be sloppy. */ static __inline int uart_intr_break(void *arg) { struct uart_softc *sc = arg; #if defined(KDB) if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { if (kdb_break()) return (0); } #endif if (sc->sc_opened) uart_sched_softih(sc, SER_INT_BREAK); return (0); } /* * Handle a receiver overrun situation. We lost at least 1 byte in the * input stream and it's our job to contain the situation. We grab as * much of the data we can, but otherwise flush the receiver FIFO to * create some breathing room. The net effect is that we avoid the * overrun condition to happen for the next X characters, where X is * related to the FIFO size at the cost of losing data right away. * So, instead of having multiple overrun interrupts in close proximity * to each other and possibly pessimizing UART interrupt latency for * other UARTs in a multiport configuration, we create a longer segment * of missing characters by freeing up the FIFO. * Each overrun condition is marked in the input buffer by a token. The * token represents the loss of at least one, but possible more bytes in * the input stream. */ static __inline int uart_intr_overrun(void *arg) { struct uart_softc *sc = arg; if (sc->sc_opened) { UART_RECEIVE(sc); if (uart_rx_put(sc, UART_STAT_OVERRUN)) sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; uart_sched_softih(sc, SER_INT_RXREADY); } UART_FLUSH(sc, UART_FLUSH_RECEIVER); return (0); } /* * Received data ready. */ static __inline int uart_intr_rxready(void *arg) { struct uart_softc *sc = arg; int rxp; rxp = sc->sc_rxput; UART_RECEIVE(sc); #if defined(KDB) if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { while (rxp != sc->sc_rxput) { kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk); if (rxp == sc->sc_rxbufsz) rxp = 0; } } #endif if (sc->sc_opened) uart_sched_softih(sc, SER_INT_RXREADY); else sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */ return (1); } /* * Line or modem status change (OOB signalling). * We pass the signals to the software interrupt handler for further * processing. Note that we merge the delta bits, but set the state * bits. This is to avoid losing state transitions due to having more * than 1 hardware interrupt between software interrupts. */ static __inline int uart_intr_sigchg(void *arg) { struct uart_softc *sc = arg; - int new, old, sig; + int new, old, pps_sig, sig; sig = UART_GETSIG(sc); if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) { - if (sig & UART_SIG_DPPS) { + pps_sig = uart_pps_signal(sc->sc_pps_mode); + if (sig & SER_DELTA(pps_sig)) { pps_capture(&sc->sc_pps); - pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ? + pps_event(&sc->sc_pps, (sig & pps_sig) ? PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); } } /* * Keep track of signal changes, even when the device is not * opened. This allows us to inform upper layers about a * possible loss of DCD and thus the existence of a (possibly) * different connection when we have DCD back, during the time * that the device was closed. */ do { old = sc->sc_ttypend; new = old & ~SER_MASK_STATE; new |= sig & SER_INT_SIGMASK; } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); if (sc->sc_opened) uart_sched_softih(sc, SER_INT_SIGCHG); return (1); } /* * The transmitter can accept more data. */ static __inline int uart_intr_txidle(void *arg) { struct uart_softc *sc = arg; if (sc->sc_txbusy) { sc->sc_txbusy = 0; uart_sched_softih(sc, SER_INT_TXIDLE); } return (0); } static int uart_intr(void *arg) { struct uart_softc *sc = arg; int cnt, ipend, testintr; if (sc->sc_leaving) return (FILTER_STRAY); cnt = 0; testintr = sc->sc_testintr; while ((!testintr || cnt < 20) && (ipend = UART_IPEND(sc)) != 0) { cnt++; if (ipend & SER_INT_OVERRUN) uart_intr_overrun(sc); if (ipend & SER_INT_BREAK) uart_intr_break(sc); if (ipend & SER_INT_RXREADY) uart_intr_rxready(sc); if (ipend & SER_INT_SIGCHG) uart_intr_sigchg(sc); if (ipend & SER_INT_TXIDLE) uart_intr_txidle(sc); } if (sc->sc_polled) { callout_reset(&sc->sc_timer, hz / uart_poll_freq, (timeout_t *)uart_intr, sc); } return ((cnt == 0) ? FILTER_STRAY : ((testintr && cnt == 20) ? FILTER_SCHEDULE_THREAD : FILTER_HANDLED)); } serdev_intr_t * uart_bus_ihand(device_t dev, int ipend) { switch (ipend) { case SER_INT_BREAK: return (uart_intr_break); case SER_INT_OVERRUN: return (uart_intr_overrun); case SER_INT_RXREADY: return (uart_intr_rxready); case SER_INT_SIGCHG: return (uart_intr_sigchg); case SER_INT_TXIDLE: return (uart_intr_txidle); } return (NULL); } int uart_bus_ipend(device_t dev) { struct uart_softc *sc; sc = device_get_softc(dev); return (UART_IPEND(sc)); } int uart_bus_sysdev(device_t dev) { struct uart_softc *sc; sc = device_get_softc(dev); return ((sc->sc_sysdev != NULL) ? 1 : 0); } int uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan) { struct uart_softc *sc; struct uart_devinfo *sysdev; int error; sc = device_get_softc(dev); /* * All uart_class references are weak. Check that the needed * class has been compiled-in. Fail if not. */ if (sc->sc_class == NULL) return (ENXIO); /* * Initialize the instance. Note that the instance (=softc) does * not necessarily match the hardware specific softc. We can't do * anything about it now, because we may not attach to the device. * Hardware drivers cannot use any of the class specific fields * while probing. */ kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class); sc->sc_dev = dev; if (device_get_desc(dev) == NULL) device_set_desc(dev, uart_getname(sc->sc_class)); /* * Allocate the register resource. We assume that all UARTs have * a single register window in either I/O port space or memory * mapped I/O space. Any UART that needs multiple windows will * consequently not be supported by this driver as-is. We try I/O * port space first because that's the common case. */ sc->sc_rrid = rid; sc->sc_rtype = SYS_RES_IOPORT; sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE); if (sc->sc_rres == NULL) { sc->sc_rrid = rid; sc->sc_rtype = SYS_RES_MEMORY; sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE); if (sc->sc_rres == NULL) return (ENXIO); } /* * Fill in the bus access structure and compare this device with * a possible console device and/or a debug port. We set the flags * in the softc so that the hardware dependent probe can adjust * accordingly. In general, you don't want to permanently disrupt * console I/O. */ sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); sc->sc_bas.chan = chan; sc->sc_bas.regshft = regshft; sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk; SLIST_FOREACH(sysdev, &uart_sysdevs, next) { if (chan == sysdev->bas.chan && uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) { /* XXX check if ops matches class. */ sc->sc_sysdev = sysdev; sysdev->bas.rclk = sc->sc_bas.rclk; } } error = UART_PROBE(sc); bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); return ((error) ? error : BUS_PROBE_DEFAULT); } int uart_bus_attach(device_t dev) { struct uart_softc *sc, *sc0; const char *sep; int error, filt; /* * The sc_class field defines the type of UART we're going to work * with and thus the size of the softc. Replace the generic softc * with one that matches the UART now that we're certain we handle * the device. */ sc0 = device_get_softc(dev); if (sc0->sc_class->size > sizeof(*sc)) { sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO); bcopy(sc0, sc, sizeof(*sc)); device_set_softc(dev, sc); } else sc = sc0; /* * Now that we know the softc for this device, connect the back * pointer from the sysdev for this device, if any */ if (sc->sc_sysdev != NULL) sc->sc_sysdev->sc = sc; /* * Protect ourselves against interrupts while we're not completely * finished attaching and initializing. We don't expect interrupts * until after UART_ATTACH(), though. */ sc->sc_leaving = 1; mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN); if (sc->sc_hwmtx == NULL) sc->sc_hwmtx = &sc->sc_hwmtx_s; /* * Re-allocate. We expect that the softc contains the information * collected by uart_bus_probe() intact. */ sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE); if (sc->sc_rres == NULL) { mtx_destroy(&sc->sc_hwmtx_s); return (ENXIO); } sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); /* * Ensure there is room for at least three full FIFOs of data in the * receive buffer (handles the case of low-level drivers with huge * FIFOs), and also ensure that there is no less than the historical * size of 384 bytes (handles the typical small-FIFO case). */ sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3); sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf), M_UART, M_WAITOK); sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf), M_UART, M_WAITOK); error = UART_ATTACH(sc); if (error) goto fail; if (sc->sc_hwiflow || sc->sc_hwoflow) { sep = ""; device_print_prettyname(dev); if (sc->sc_hwiflow) { printf("%sRTS iflow", sep); sep = ", "; } if (sc->sc_hwoflow) { printf("%sCTS oflow", sep); sep = ", "; } printf("\n"); } if (sc->sc_sysdev != NULL) { if (sc->sc_sysdev->baudrate == 0) { if (UART_IOCTL(sc, UART_IOCTL_BAUD, (intptr_t)&sc->sc_sysdev->baudrate) != 0) sc->sc_sysdev->baudrate = -1; } switch (sc->sc_sysdev->type) { case UART_DEV_CONSOLE: device_printf(dev, "console"); break; case UART_DEV_DBGPORT: device_printf(dev, "debug port"); break; case UART_DEV_KEYBOARD: device_printf(dev, "keyboard"); break; default: device_printf(dev, "unknown system device"); break; } printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate, "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits, sc->sc_sysdev->stopbits); } sc->sc_leaving = 0; sc->sc_testintr = 1; filt = uart_intr(sc); sc->sc_testintr = 0; /* * Don't use interrupts if we couldn't clear any pending interrupt * conditions. We may have broken H/W and polling is probably the * safest thing to do. */ if (filt != FILTER_SCHEDULE_THREAD && !uart_force_poll) { sc->sc_irid = 0; sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE); } if (sc->sc_ires != NULL) { error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY, uart_intr, NULL, sc, &sc->sc_icookie); sc->sc_fastintr = (error == 0) ? 1 : 0; if (!sc->sc_fastintr) error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY | INTR_MPSAFE, NULL, (driver_intr_t *)uart_intr, sc, &sc->sc_icookie); if (error) { device_printf(dev, "could not activate interrupt\n"); bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, sc->sc_ires); sc->sc_ires = NULL; } } if (sc->sc_ires == NULL) { /* No interrupt resource. Force polled mode. */ sc->sc_polled = 1; callout_init(&sc->sc_timer, 1); callout_reset(&sc->sc_timer, hz / uart_poll_freq, (timeout_t *)uart_intr, sc); } if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) { sep = ""; device_print_prettyname(dev); if (sc->sc_fastintr) { printf("%sfast interrupt", sep); sep = ", "; } if (sc->sc_polled) { printf("%spolled mode (%dHz)", sep, uart_poll_freq); sep = ", "; } printf("\n"); } if (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) { if ((error = sc->sc_sysdev->attach(sc)) != 0) goto fail; } else { if ((error = uart_tty_attach(sc)) != 0) goto fail; - sc->sc_pps.ppscap = PPS_CAPTUREBOTH; - sc->sc_pps.driver_mtx = uart_tty_getlock(sc); - sc->sc_pps.driver_abi = PPS_ABI_VERSION; - pps_init_abi(&sc->sc_pps); + uart_pps_init(sc); } if (sc->sc_sysdev != NULL) sc->sc_sysdev->hwmtx = sc->sc_hwmtx; return (0); fail: free(sc->sc_txbuf, M_UART); free(sc->sc_rxbuf, M_UART); if (sc->sc_ires != NULL) { bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, sc->sc_ires); } bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); mtx_destroy(&sc->sc_hwmtx_s); return (error); } int uart_bus_detach(device_t dev) { struct uart_softc *sc; sc = device_get_softc(dev); sc->sc_leaving = 1; if (sc->sc_sysdev != NULL) sc->sc_sysdev->hwmtx = NULL; UART_DETACH(sc); if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL) (*sc->sc_sysdev->detach)(sc); else uart_tty_detach(sc); free(sc->sc_txbuf, M_UART); free(sc->sc_rxbuf, M_UART); if (sc->sc_ires != NULL) { bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, sc->sc_ires); } bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); mtx_destroy(&sc->sc_hwmtx_s); if (sc->sc_class->size > sizeof(*sc)) { device_set_softc(dev, NULL); free(sc, M_UART); } else device_set_softc(dev, NULL); return (0); } int uart_bus_resume(device_t dev) { struct uart_softc *sc; sc = device_get_softc(dev); return (UART_ATTACH(sc)); } void uart_grab(struct uart_devinfo *di) { if (di->sc) UART_GRAB(di->sc); } void uart_ungrab(struct uart_devinfo *di) { if (di->sc) UART_UNGRAB(di->sc); }