Index: head/sys/arm/amlogic/aml8726/aml8726_rtc.c =================================================================== --- head/sys/arm/amlogic/aml8726/aml8726_rtc.c (revision 283180) +++ head/sys/arm/amlogic/aml8726/aml8726_rtc.c (revision 283181) @@ -1,505 +1,490 @@ /*- * Copyright 2013-2015 John Wehle * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ /* * Amlogic aml8726 RTC driver. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include +#include + #include "clock_if.h" /* * The RTC initialization various slightly between the different chips. * * aml8726-m1 aml8726-m3 aml8726-m6 (and later) * init-always true true false * xo-init 0x0004 0x3c0a 0x180a * gpo-init 0x100000 0x100000 0x500000 */ struct aml8726_rtc_init { boolean_t always; uint16_t xo; uint32_t gpo; }; struct aml8726_rtc_softc { device_t dev; struct aml8726_rtc_init init; struct resource * res[2]; struct mtx mtx; }; static struct resource_spec aml8726_rtc_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, { SYS_RES_IRQ, 0, RF_ACTIVE }, { -1, 0 } }; #define AML_RTC_LOCK(sc) mtx_lock_spin(&(sc)->mtx) #define AML_RTC_UNLOCK(sc) mtx_unlock_spin(&(sc)->mtx) #define AML_RTC_LOCK_INIT(sc) \ mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \ "rtc", MTX_SPIN) #define AML_RTC_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx); #define AML_RTC_0_REG 0 #define AML_RTC_SCLK (1 << 0) #define AML_RTC_SDI (1 << 2) #define AML_RTC_SEN (1 << 1) #define AML_RTC_AS (1 << 17) #define AML_RTC_ABSY (1 << 22) #define AML_RTC_IRQ_DIS (1 << 12) #define AML_RTC_1_REG 4 #define AML_RTC_SDO (1 << 0) #define AML_RTC_SRDY (1 << 1) #define AML_RTC_2_REG 8 #define AML_RTC_3_REG 12 #define AML_RTC_MSR_BUSY (1 << 20) #define AML_RTC_MSR_CA (1 << 17) #define AML_RTC_MSR_DURATION_EN (1 << 16) #define AML_RTC_MSR_DURATION_MASK 0xffff #define AML_RTC_MSR_DURATION_SHIFT 0 #define AML_RTC_4_REG 16 #define AML_RTC_TIME_SREG 0 #define AML_RTC_GPO_SREG 1 #define AML_RTC_GPO_LEVEL (1 << 24) #define AML_RTC_GPO_BUSY (1 << 23) #define AML_RTC_GPO_ACTIVE_HIGH (1 << 22) #define AML_RTC_GPO_CMD_MASK (3 << 20) #define AML_RTC_GPO_CMD_SHIFT 20 #define AML_RTC_GPO_CMD_NOW (1 << 20) #define AML_RTC_GPO_CMD_COUNT (2 << 20) #define AML_RTC_GPO_CMD_PULSE (3 << 20) #define AML_RTC_GPO_CNT_MASK 0xfffff #define AML_RTC_GPO_CNT_SHIFT 0 #define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], reg, (val)) #define CSR_READ_4(sc, reg) bus_read_4((sc)->res[0], reg) #define CSR_BARRIER(sc, reg) bus_barrier((sc)->res[0], reg, 4, \ (BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)) static int aml8726_rtc_start_transfer(struct aml8726_rtc_softc *sc) { unsigned i; /* idle the serial interface */ CSR_WRITE_4(sc, AML_RTC_0_REG, (CSR_READ_4(sc, AML_RTC_0_REG) & ~(AML_RTC_SCLK | AML_RTC_SEN | AML_RTC_SDI))); CSR_BARRIER(sc, AML_RTC_0_REG); /* see if it is ready for a new cycle */ for (i = 40; i; i--) { DELAY(5); if ( (CSR_READ_4(sc, AML_RTC_1_REG) & AML_RTC_SRDY) ) break; } if (i == 0) return (EIO); /* start the cycle */ CSR_WRITE_4(sc, AML_RTC_0_REG, (CSR_READ_4(sc, AML_RTC_0_REG) | AML_RTC_SEN)); return (0); } static inline void aml8726_rtc_sclk_pulse(struct aml8726_rtc_softc *sc) { DELAY(5); CSR_WRITE_4(sc, AML_RTC_0_REG, (CSR_READ_4(sc, AML_RTC_0_REG) | AML_RTC_SCLK)); CSR_BARRIER(sc, AML_RTC_0_REG); DELAY(5); CSR_WRITE_4(sc, AML_RTC_0_REG, (CSR_READ_4(sc, AML_RTC_0_REG) & ~AML_RTC_SCLK)); CSR_BARRIER(sc, AML_RTC_0_REG); } static inline void aml8726_rtc_send_bit(struct aml8726_rtc_softc *sc, unsigned bit) { if (bit) { CSR_WRITE_4(sc, AML_RTC_0_REG, (CSR_READ_4(sc, AML_RTC_0_REG) | AML_RTC_SDI)); } else { CSR_WRITE_4(sc, AML_RTC_0_REG, (CSR_READ_4(sc, AML_RTC_0_REG) & ~AML_RTC_SDI)); } aml8726_rtc_sclk_pulse(sc); } static inline void aml8726_rtc_send_addr(struct aml8726_rtc_softc *sc, u_char addr) { unsigned mask; for (mask = 1 << 3; mask; mask >>= 1) { if (mask == 1) { /* final bit indicates read / write mode */ CSR_WRITE_4(sc, AML_RTC_0_REG, (CSR_READ_4(sc, AML_RTC_0_REG) & ~AML_RTC_SEN)); } aml8726_rtc_send_bit(sc, (addr & mask)); } } static inline void aml8726_rtc_send_data(struct aml8726_rtc_softc *sc, uint32_t data) { unsigned mask; for (mask = 1U << 31; mask; mask >>= 1) aml8726_rtc_send_bit(sc, (data & mask)); } static inline void aml8726_rtc_recv_data(struct aml8726_rtc_softc *sc, uint32_t *dp) { uint32_t data; unsigned i; data = 0; for (i = 0; i < 32; i++) { aml8726_rtc_sclk_pulse(sc); data <<= 1; data |= (CSR_READ_4(sc, AML_RTC_1_REG) & AML_RTC_SDO) ? 1 : 0; } *dp = data; } static int aml8726_rtc_sreg_read(struct aml8726_rtc_softc *sc, u_char sreg, uint32_t *val) { u_char addr; int error; /* read is indicated by lsb = 0 */ addr = (sreg << 1) | 0; error = aml8726_rtc_start_transfer(sc); if (error) return (error); aml8726_rtc_send_addr(sc, addr); aml8726_rtc_recv_data(sc, val); return (0); } static int aml8726_rtc_sreg_write(struct aml8726_rtc_softc *sc, u_char sreg, uint32_t val) { u_char addr; int error; /* write is indicated by lsb = 1 */ addr = (sreg << 1) | 1; error = aml8726_rtc_start_transfer(sc); if (error) return (error); aml8726_rtc_send_data(sc, val); aml8726_rtc_send_addr(sc, addr); return (0); } static int aml8726_rtc_initialize(struct aml8726_rtc_softc *sc) { int error; unsigned i; /* idle the serial interface */ CSR_WRITE_4(sc, AML_RTC_0_REG, (CSR_READ_4(sc, AML_RTC_0_REG) & ~(AML_RTC_SCLK | AML_RTC_SEN | AML_RTC_SDI))); CSR_BARRIER(sc, AML_RTC_0_REG); /* see if it is ready for a new cycle */ for (i = 40; i; i--) { DELAY(5); if ( (CSR_READ_4(sc, AML_RTC_1_REG) & AML_RTC_SRDY) ) break; } if (sc->init.always == TRUE || (CSR_READ_4(sc, AML_RTC_1_REG) & AML_RTC_SRDY) == 0) { /* * The RTC has a 16 bit initialization register. The upper * bits can be written directly. The lower bits are written * through a shift register. */ CSR_WRITE_4(sc, AML_RTC_4_REG, ((sc->init.xo >> 8) & 0xff)); CSR_WRITE_4(sc, AML_RTC_0_REG, ((CSR_READ_4(sc, AML_RTC_0_REG) & 0xffffff) | ((uint32_t)(sc->init.xo & 0xff) << 24) | AML_RTC_AS | AML_RTC_IRQ_DIS)); while ((CSR_READ_4(sc, AML_RTC_0_REG) & AML_RTC_ABSY) != 0) cpu_spinwait(); DELAY(2); error = aml8726_rtc_sreg_write(sc, AML_RTC_GPO_SREG, sc->init.gpo); if (error) return (error); } return (0); } static int aml8726_rtc_check_xo(struct aml8726_rtc_softc *sc) { uint32_t now, previous; int i; /* * The RTC is driven by a 32.768khz clock meaning it's period * is roughly 30.5 us. Check that it's working (implying the * RTC could contain a valid value) by enabling count always * and seeing if the value changes after 200 us (per RTC User * Guide ... presumably the extra time is to cover XO startup). */ CSR_WRITE_4(sc, AML_RTC_3_REG, (CSR_READ_4(sc, AML_RTC_3_REG) | AML_RTC_MSR_CA)); previous = CSR_READ_4(sc, AML_RTC_2_REG); for (i = 0; i < 4; i++) { DELAY(50); now = CSR_READ_4(sc, AML_RTC_2_REG); if (now != previous) break; } CSR_WRITE_4(sc, AML_RTC_3_REG, (CSR_READ_4(sc, AML_RTC_3_REG) & ~AML_RTC_MSR_CA)); if (now == previous) return (EINVAL); return (0); } static int aml8726_rtc_probe(device_t dev) { if (!ofw_bus_status_okay(dev)) return (ENXIO); if (!ofw_bus_is_compatible(dev, "amlogic,aml8726-rtc")) return (ENXIO); device_set_desc(dev, "Amlogic aml8726 RTC"); return (BUS_PROBE_DEFAULT); } static int aml8726_rtc_attach(device_t dev) { struct aml8726_rtc_softc *sc = device_get_softc(dev); - boolean_t init_always_valid; - char *init_always; - pcell_t prop; - phandle_t node; - ssize_t len; sc->dev = dev; - node = ofw_bus_get_node(dev); - - len = OF_getprop_alloc(node, "init-always", - sizeof(char), (void **)&init_always); - sc->init.always = FALSE; - init_always_valid = FALSE; - if (len > 0) { - if (strncmp(init_always, "true", len) == 0) { - sc->init.always = TRUE; - init_always_valid = TRUE; - } else if (strncmp(init_always, "false", len) == 0) - init_always_valid = TRUE; - free(init_always, M_OFWPROP); - } - if (init_always_valid == FALSE) { - device_printf(dev, "missing init-always attribute in FDT\n"); + switch (aml8726_soc_hw_rev) { + case AML_SOC_HW_REV_M3: + sc->init.always = true; + sc->init.xo = 0x3c0a; + sc->init.gpo = 0x100000; + break; + case AML_SOC_HW_REV_M6: + case AML_SOC_HW_REV_M8: + case AML_SOC_HW_REV_M8B: + sc->init.always = false; + sc->init.xo = 0x180a; + sc->init.gpo = 0x500000; + break; + default: + device_printf(dev, "unsupported SoC\n"); return (ENXIO); + /* NOTREACHED */ } - - if (OF_getencprop(node, "xo-init", &prop, sizeof(prop)) <= 0) { - device_printf(dev, "missing xo-init attribute in FDT\n"); - return (ENXIO); - } - sc->init.xo = prop; - - if (OF_getencprop(node, "gpo-init", &prop, sizeof(prop)) <= 0) { - device_printf(dev, "missing gpo-init attribute in FDT\n"); - return (ENXIO); - } - sc->init.gpo = prop; if (bus_alloc_resources(dev, aml8726_rtc_spec, sc->res)) { device_printf(dev, "can not allocate resources for device\n"); return (ENXIO); } aml8726_rtc_initialize(sc); if (aml8726_rtc_check_xo(sc) != 0) { device_printf(dev, "crystal oscillator check failed\n"); bus_release_resources(dev, aml8726_rtc_spec, sc->res); return (ENXIO); } AML_RTC_LOCK_INIT(sc); clock_register(dev, 1000000); return (0); } static int aml8726_rtc_detach(device_t dev) { return (EBUSY); } static int aml8726_rtc_gettime(device_t dev, struct timespec *ts) { struct aml8726_rtc_softc *sc = device_get_softc(dev); uint32_t sec; int error; AML_RTC_LOCK(sc); error = aml8726_rtc_sreg_read(sc, AML_RTC_TIME_SREG, &sec); AML_RTC_UNLOCK(sc); ts->tv_sec = sec; ts->tv_nsec = 0; return (error); } static int aml8726_rtc_settime(device_t dev, struct timespec *ts) { struct aml8726_rtc_softc *sc = device_get_softc(dev); uint32_t sec; int error; sec = ts->tv_sec; /* Accuracy is only one second. */ if (ts->tv_nsec >= 500000000) sec++; AML_RTC_LOCK(sc); error = aml8726_rtc_sreg_write(sc, AML_RTC_TIME_SREG, sec); AML_RTC_UNLOCK(sc); return (error); } static device_method_t aml8726_rtc_methods[] = { /* Device interface */ DEVMETHOD(device_probe, aml8726_rtc_probe), DEVMETHOD(device_attach, aml8726_rtc_attach), DEVMETHOD(device_detach, aml8726_rtc_detach), /* Clock interface */ DEVMETHOD(clock_gettime, aml8726_rtc_gettime), DEVMETHOD(clock_settime, aml8726_rtc_settime), DEVMETHOD_END }; static driver_t aml8726_rtc_driver = { "rtc", aml8726_rtc_methods, sizeof(struct aml8726_rtc_softc), }; static devclass_t aml8726_rtc_devclass; DRIVER_MODULE(rtc, simplebus, aml8726_rtc_driver, aml8726_rtc_devclass, 0, 0); Index: head/sys/boot/fdt/dts/arm/odroidc1.dts =================================================================== --- head/sys/boot/fdt/dts/arm/odroidc1.dts (revision 283180) +++ head/sys/boot/fdt/dts/arm/odroidc1.dts (revision 283181) @@ -1,400 +1,396 @@ /*- * Copyright (c) 2015 John Wehle * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ /* * The ordering of certain devices is significant (e.g. usb depends on * usb-phy which depends on gpio, also the timer should appear early on * to provide a reasonably accurate DELAY implementation). * * Both usb-phys devices must be configured to prevent the usb controller * from hanging during initialization. */ /dts-v1/; /memreserve/ 0x7900000 0x00600000; /* 6MB frame buffer */ #include "meson8b.dtsi" / { model = "hardkernel,odroid-c1"; compatible = "hardkernel,odroid-c1", "amlogic,s805"; #address-cells = <1>; #size-cells = <1>; aliases { soc = &soc; screen = &screen; uart0 = &uart_AO; }; memory { device_type = "memory"; reg = <0x0 0x40000000>; /* 1GB RAM */ }; soc: soc { device_type = "soc"; bus-frequency = <0>; scu: scu@c4300000 { compatible = "arm,cortex-a5-scu"; reg = <0xc4300000 0x1000>; }; cpuconfig: cpuconfig@d901ff80 { compatible = "amlogic,aml8726-cpuconfig"; reg = <0xd901ff80 16>; }; ccm@c1104140 { compatible = "amlogic,aml8726-ccm"; reg = <0xc1104140 20>; /* cbus 0x1050 */ functions = "ethernet", "i2c", "rng", "sdio", "sdxc", "uart-a", "uart-b", "uart-c", "usb-a", "usb-b"; }; pinctrl@c11080b0 { compatible = "amlogic,aml8726-pinctrl"; reg = <0xc11080b0 40>, /* mux */ <0xc11080e8 24>, /* pu/pd */ <0xc1108120 24>, /* pull enable */ <0xc8100014 4>, /* ao mux */ <0xc810002c 4>, /* ao pu/pd */ <0xc810002c 4>; /* ao pull enable */ /* * Currently only pin muxing that deviates * from the power on default of gpio is * specified here. */ pinctrl-names = "default"; pinctrl-0 = <&pins_uartao &pins_ethernet &pins_hdmi>; pins_ethernet: ethernet { amlogic,pins = "ref_clk", "tx_clk", "tx_en", "tx_d0", "tx_d1", "tx_d2", "tx_d3", "rx_clk", "rx_dv", "rx_d0", "rx_d1", "rx_d2", "rx_d3", "mdc", "mdio"; amlogic,function = "ethernet"; }; pins_hdmi: hdmi { amlogic,pins = "cec", "hpd", "scl", "sda"; amlogic,function = "hdmi"; }; pins_sdio_b: sdio_b { amlogic,pins = "clk", "cmd", "d0", "d1", "d2", "d3"; amlogic,function = "sdio-b"; amlogic,pull = "up"; }; pins_sdxc_b: sdxc_b { amlogic,pins = "clk", "cmd", "d0", "d1", "d2", "d3"; amlogic,function = "sdxc-b"; amlogic,pull = "up"; }; pins_sdio_c: sdio_c { amlogic,pins = "clk", "cmd", "d0", "d1", "d2", "d3"; amlogic,function = "sdio-c"; amlogic,pull = "up"; }; pins_sdxc_c: sdxc_c { amlogic,pins = "clk", "cmd", "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7"; amlogic,function = "sdxc-c"; amlogic,pull = "up"; }; pins_i2c_a: i2c_a { amlogic,pins = "scl", "sda"; amlogic,function = "i2c-a"; }; pins_i2c_b: i2c_b { amlogic,pins = "scl", "sda"; amlogic,function = "i2c-b"; }; pins_uarta: uarta { amlogic,pins = "tx", "rx", "cts", "rts"; amlogic,function = "uart-a"; }; pins_uartb: uartb { /* * gpiox18 appears to have special * meaning to the bootloader making * hardware handshaking unavailable. */ amlogic,pins = "tx", "rx"; amlogic,function = "uart-b"; }; pins_uartc: uartc { amlogic,pins = "tx", "rx", "cts", "rts"; amlogic,function = "uart-c"; }; pins_uartao: uartao { amlogic,pins = "tx", "rx"; amlogic,function = "uart-ao"; }; }; rtc@c8100740 { compatible = "amlogic,aml8726-rtc"; reg = <0xc8100740 20>; /* aobus 0x1d0 */ interrupts = <0 72 1>; - - init-always = "false"; - xo-init = <0x180a>; - gpo-init = <0x500000>; }; clkmsr: clkmsr@c1108758 { compatible = "amlogic,aml8726-clkmsr"; reg = <0xc1108758 16>; /* cbus 0x21d6 */ clocks = <&clk81>; }; gpioao: gpio@c8100024 { /* gpio unit 7 */ compatible = "amlogic,aml8726-gpio"; reg = <0xc8100024 4>, /* oen aobus 0x9 */ <0xc8100024 4>, /* out */ <0xc8100028 4>; /* in */ gpio-controller; #gpio-cells = <1>; pin-count = <14>; }; gpio3: gpio@c1108054 { compatible = "amlogic,aml8726-gpio"; reg = <0xc1108054 4>, /* oen cbus 0x2015 */ <0xc1108058 4>, /* out */ <0xc110805c 4>; /* in */ gpio-controller; #gpio-cells = <1>; pin-count = <32>; }; gpio5: gpio@c110806c { compatible = "amlogic,aml8726-gpio"; reg = <0xc110806c 4>, /* oen cbus 0x201b */ <0xc1108070 4>, /* out */ <0xc1108074 4>; /* in */ gpio-controller; #gpio-cells = <1>; pin-count = <32>; }; mmc@c1108c20 { compatible = "amlogic,aml8726-mmc"; reg = <0xc1108c20 32>; /* cbus 0x2308 */ interrupts = <0 28 1>; clocks = <&clk81>; pinctrl-names = "default"; pinctrl-0 = <&pins_sdio_b>; /* * Ordering is significant. * * mmc-vselect low sets first voltage * mmc-vselect high sets second voltage * * If mmc-vselect is not present, then * only one voltage should be specified. */ mmc-voltages = "3.3", "1.8"; mmc-vselect = <&gpioao 3>; /* gpioao_3 */ mmc-pwr-en = <&gpio5 31 0>; /* card_8 */ ins-detect = <&gpio5 29 0>; /* card_6 */ }; sdxc@c1108e00 { compatible = "amlogic,aml8726-sdxc-m8"; clock-frequency = <1275000000>; reg = <0xc1108e00 60>; /* cbus 0x2380 */ interrupts = <0 78 1>; pinctrl-names = "default"; pinctrl-0 = <&pins_sdxc_c>; mmc-voltages = "1.8"; mmc-rst = <&gpio3 9 0>; /* boot_9 emmc-rst */ }; rng@c1108100 { compatible = "amlogic,aml8726-rng"; reg = <0xc1108100 8>; /* cbus 0x2040 */ }; usb-phy@c1108800 { /* usb-a phy */ compatible = "amlogic,aml8726-m8-usb-phy"; reg = <0xc1108800 32>; /* cbus 0x2200 */ usb-pwr-en = <&gpioao 5 1>; /* gpioao_5 vbus */ }; usb-phy@c1108820 { /* usb-b phy */ compatible = "amlogic,aml8726-m8-usb-phy"; reg = <0xc1108820 32>; /* cbus 0x2208 */ force-aca = "true"; usb-hub-rst = <&gpioao 4 0>; /* gpioao_4 hub-rst */ }; usb@c9040000 { /* usb-a */ compatible = "synopsys,designware-hs-otg2"; reg = <0xc9040000 0x40000>; /* ahbbus 0x40000*/ interrupts = <0 30 4>; #address-cells = <1>; #size-cells = <0>; dr_mode = "host"; }; usb@c90c0000 { /* usb-b */ compatible = "synopsys,designware-hs-otg2"; reg = <0xc90c0000 0x40000>; /* ahbbus 0xc0000 */ interrupts = <0 31 4>; #address-cells = <1>; #size-cells = <0>; dr_mode = "host"; }; eth@c9410000 { /* ethernet */ compatible = "snps,dwmac"; reg = <0xc9410000 0x2000>; /* ahbbus 0x410000 */ interrupts = <0 8 1>; #address-cells = <1>; #size-cells = <0>; eth-phy-rst = <&gpio3 23 0>; /* gpioh_4 phy-rst */ }; screen: fb@c8006020 { device_type = "display"; compatible = "amlogic,aml8726-fb"; reg = <0xc8006048 12>, /* CANVAS */ <0xc1106800 1024>, /* VIU */ <0xc1107400 1024>; /* VPP */ interrupts = <0 2 1>, <0 3 1>, <0 12 1>, <0 13 1>; address = <0x7900000>; /* match memreserve */ width = <720>; height = <480>; depth = <24>; linebytes = <2160>; }; }; leds { compatible = "gpio-leds"; sys_led { gpios = <&gpioao 13>; /* gpioao_13 sys_led */ label = "sys_led"; }; }; chosen { stdin = "uart0"; stdout = "uart0"; }; }; &clk81 { clock-frequency = <0>; }; &uart_AO { status = "okay"; current-speed = <115200>; }; &uart_A { status = "okay"; }; &uart_B { status = "okay"; }; &uart_C { status = "okay"; }; &i2c_A { status = "okay"; }; &i2c_B { status = "okay"; }; Index: head/sys/boot/fdt/dts/arm/vsatv102-m6.dts =================================================================== --- head/sys/boot/fdt/dts/arm/vsatv102-m6.dts (revision 283180) +++ head/sys/boot/fdt/dts/arm/vsatv102-m6.dts (revision 283181) @@ -1,302 +1,298 @@ /*- * Copyright (c) 2013-2015 John Wehle * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ /* * The ordering of certain devices is significant (e.g. usb depends on * usb-phy which depends on gpio, also the timer should appear early on * to provide a reasonably accurate DELAY implementation). * * Both usb-phys devices must be configured to prevent the usb controller * from hanging during initialization. */ /dts-v1/; /memreserve/ 0x84900000 0x00600000; /* 6MB frame buffer */ #include "meson6.dtsi" / { /* * My development unit visually appears to be a Visson ATV-102 * and the specs for both my unit and the Visson ATV-102 say * the SoC is an aml8726-m3. However the uboot prompt says * m6_mbx_v1, the RTC is located on SECBUS2 instead of AOBUS, * and there are two cores so it seems my unit is a newer * version using the later processor. */ model = "visson,atv-102"; compatible = "visson,atv-102", "amlogic,meson6"; #address-cells = <1>; #size-cells = <1>; aliases { soc = &soc; screen = &screen; uart0 = &uart_AO; }; memory { device_type = "memory"; reg = <0x80000000 0x40000000>; /* 1GB RAM */ }; soc: soc { device_type = "soc"; bus-frequency = <0>; pic: pic@c1109a40 { device_type = "interrupt-controller"; compatible = "amlogic,aml8726-pic"; reg = <0xc1109a40 128>; /* cbus 0x2690 */ interrupt-controller; #interrupt-cells = <3>; }; scu: scu@c4300000 { compatible = "arm,cortex-a9-scu"; reg = <0xc4300000 0x1000>; }; cpuconfig: cpuconfig@d901ff80 { compatible = "amlogic,aml8726-cpuconfig"; reg = <0xd901ff80 8>; }; ccm@c1104140 { compatible = "amlogic,aml8726-ccm"; reg = <0xc1104140 20>; /* cbus 0x1050 */ functions = "ethernet", "i2c", "rng", "sdio", "uart-a", "uart-b", "uart-c", "usb-a", "usb-b"; }; pinctrl: pinctrl@c11080b0 { compatible = "amlogic,aml8726-pinctrl"; reg = <0xc11080b0 40>, /* mux */ <0xc11080e8 24>, /* pu/pd */ <0xc11080e8 24>, /* pull enable */ <0xc8100014 4>, /* ao mux */ <0xc810002c 4>, /* ao pu/pd */ <0xc810002c 4>; /* ao pull enable */ /* * Currently only pin muxing that deviates * from the power on default of gpio is * specified here. */ pinctrl-names = "default"; pinctrl-0 = <&pins_uartao &pins_ethernet &pins_hdmi>; pins_ethernet: ethernet { amlogic,pins = "ref_clk_in", "tx_clk", "tx_en", "tx_d0", "tx_d1", "tx_d2", "tx_d3", "rx_clk", "rx_dv", "rx_d0", "rx_d1", "rx_d2", "rx_d3", "mdc", "mdio"; amlogic,function = "ethernet"; }; pins_hdmi: hdmi { amlogic,pins = "cec", "hpd", "scl", "sda"; amlogic,function = "hdmi"; }; pins_sdio_b: sdio_b { amlogic,pins = "clk", "cmd", "d0", "d1", "d2", "d3"; amlogic,function = "sdio-b"; }; pins_uartao: uartao { amlogic,pins = "tx", "rx"; amlogic,function = "uart-ao"; }; }; rtc@da004340 { compatible = "amlogic,aml8726-rtc"; reg = <0xda004340 20>; /* secbus2 0xd0 */ interrupts = <0 72 1>; /* AM_IRQ2(8) */ - - init-always = "false"; - xo-init = <0x180a>; - gpo-init = <0x500000>; }; clkmsr: clkmsr@c1108758 { compatible = "amlogic,aml8726-clkmsr"; reg = <0xc1108758 16>; /* cbus 0x21d6 */ clocks = <&clk81>; }; gpioao: gpio@c8100024 { /* gpio unit 7 */ compatible = "amlogic,aml8726-gpio"; reg = <0xc8100024 4>, /* oen aobus 0x9 */ <0xc8100024 4>, /* out */ <0xc8100028 4>; /* in */ gpio-controller; #gpio-cells = <1>; pin-count = <12>; }; gpio5: gpio@c110806c { compatible = "amlogic,aml8726-gpio"; reg = <0xc110806c 4>, /* oen cbus 0x201b */ <0xc1108070 4>, /* out */ <0xc1108074 4>; /* in */ gpio-controller; #gpio-cells = <1>; pin-count = <32>; }; gpio6: gpio@c1108020 { compatible = "amlogic,aml8726-gpio"; reg = <0xc1108020 4>, /* oen cbus 0x2008 */ <0xc1108024 4>, /* out */ <0xc1108028 4>; /* in */ gpio-controller; #gpio-cells = <1>; pin-count = <29>; }; mmc@c1108c20 { compatible = "amlogic,aml8726-mmc"; reg = <0xc1108c20 32>; /* cbus 0x2308 */ interrupts = <0 28 1>; /* AM_IRQ0(28) */ clocks = <&clk81>; pinctrl-names = "default"; pinctrl-0 = <&pins_sdio_b>; mmc-voltages = "3.3"; mmc-pwr-en = <&gpio5 31 0>; /* card_8 */ ins-detect = <&gpio5 29 0>; /* card_6 */ }; rng@c1108100 { compatible = "amlogic,aml8726-rng"; reg = <0xc1108100 8>; /* cbus 0x2040 */ }; usb-phy@c1108400 { /* usb-a phy */ compatible = "amlogic,aml8726-m6-usb-phy"; reg = <0xc1108400 32>; /* cbus 0x2100 */ }; usb-phy@c1108420 { /* usb-b phy */ compatible = "amlogic,aml8726-m6-usb-phy"; reg = <0xc1108420 32>; /* cbus 0x2108 */ usb-pwr-en = <&gpioao 3 1>, /* gpioao_3 vbus */ <&gpio6 11 0>; /* gpioe_11 wifi */ }; usb@c9040000 { /* usb-a */ compatible = "synopsys,designware-hs-otg2"; reg = <0xc9040000 0x40000>; /* ahbbus 0x40000*/ interrupts = <0 30 4>; /* AM_IRQ0(30) */ #address-cells = <1>; #size-cells = <0>; }; usb@c90c0000 { /* usb-b */ compatible = "synopsys,designware-hs-otg2"; reg = <0xc90c0000 0x40000>; /* ahbbus 0xc0000 */ interrupts = <0 31 4>; /* AM_IRQ0(31) */ #address-cells = <1>; #size-cells = <0>; dr_mode = "host"; }; eth@c9410000 { /* ethernet */ compatible = "snps,dwmac"; reg = <0xc9410000 0x2000>; /* ahbbus 0x410000 */ interrupts = <0 8 1>; /* AM_IRQ0(8) */ #address-cells = <1>; #size-cells = <0>; eth-phy-rst = <&gpio5 15 0>; /* gpioy_15 phy-rst */ }; screen: fb@c8006324 { device_type = "display"; compatible = "amlogic,aml8726-fb"; reg = <0xc8006324 12>, /* CANVAS */ <0xc1106800 1024>, /* VIU */ <0xc1107400 1024>; /* VPP */ interrupts = <0 2 1>, /* AM_IRQ0(2) */ <0 3 1>, /* AM_IRQ0(3) */ <0 12 1>, /* AM_IRQ0(12) */ <0 13 1>; /* AM_IRQ0(13) */ address = <0x84900000>; /* match memreserve */ width = <720>; height = <480>; depth = <24>; linebytes = <2160>; }; }; chosen { stdin = "uart0"; stdout = "uart0"; }; }; &clk81 { clock-frequency = <0>; }; &uart_AO { status = "okay"; current-speed = <115200>; };