Index: head/sys/arm/amlogic/aml8726/aml8726_machdep.c =================================================================== --- head/sys/arm/amlogic/aml8726/aml8726_machdep.c (revision 283056) +++ head/sys/arm/amlogic/aml8726/aml8726_machdep.c (revision 283057) @@ -1,223 +1,212 @@ /*- * Copyright 2013-2015 John Wehle * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include "opt_global.h" #include __FBSDID("$FreeBSD$"); #define _ARM32_BUS_DMA_PRIVATE #include #include #include #include #include #include #include #include +#include #include #include #include #include #include #if defined(SOCDEV_PA) && defined(SOCDEV_VA) vm_offset_t aml8726_aobus_kva_base = SOCDEV_VA; #else vm_offset_t aml8726_aobus_kva_base; #endif static void aml8726_fixup_busfreq() { phandle_t node; pcell_t freq, prop; ssize_t len; /* * Set the bus-frequency for the SoC simple-bus if it * needs updating (meaning the current frequency is zero). */ if ((freq = aml8726_clkmsr_bus_frequency()) == 0 || (node = OF_finddevice("/soc")) == 0 || fdt_is_compatible_strict(node, "simple-bus") == 0) while (1); freq = cpu_to_fdt32(freq); len = OF_getencprop(node, "bus-frequency", &prop, sizeof(prop)); if ((len / sizeof(prop)) == 1 && prop == 0) OF_setprop(node, "bus-frequency", (void *)&freq, sizeof(freq)); } vm_offset_t platform_lastaddr(void) { return (arm_devmap_lastaddr()); } void platform_probe_and_attach(void) { } void platform_gpio_init(void) { /* * The UART console driver used for debugging early boot code * needs to know the virtual base address of the aobus. It's * expected to equal SOCDEV_VA prior to initarm calling setttb * ... afterwards it needs to be updated due to the new page * tables. * * This means there's a deadzone in initarm between setttb * and platform_gpio_init during which printf can't be used. */ aml8726_aobus_kva_base = (vm_offset_t)arm_devmap_ptov(0xc8100000, 0x100000); /* * The hardware mux used by clkmsr is unique to the SoC (though * currently clk81 is at a fixed location, however that might * change in the future). */ aml8726_identify_soc(); /* * My aml8726-m3 development box which identifies the CPU as * a Cortex A9-r2 rev 4 randomly locks up during boot when WFI * is used. */ switch (aml8726_soc_hw_rev) { case AML_SOC_HW_REV_M3: cpufuncs.cf_sleep = (void *)cpufunc_nullop; break; default: break; } /* * This FDT fixup should arguably be called through fdt_fixup_table, * however currently there's no mechanism to specify a fixup which * should always be invoked. * * It needs to be called prior to the console being initialized which * is why it's called here, rather than from platform_late_init. */ aml8726_fixup_busfreq(); } void platform_late_init(void) { } /* * Construct static devmap entries to map out the core * peripherals using 1mb section mappings. */ int platform_devmap_init(void) { arm_devmap_add_entry(0xc1100000, 0x200000); /* cbus */ arm_devmap_add_entry(0xc4200000, 0x100000); /* pl310 */ arm_devmap_add_entry(0xc4300000, 0x100000); /* periph */ arm_devmap_add_entry(0xc8000000, 0x100000); /* apbbus */ arm_devmap_add_entry(0xc8100000, 0x100000); /* aobus */ arm_devmap_add_entry(0xc9000000, 0x800000); /* ahbbus */ arm_devmap_add_entry(0xd9000000, 0x100000); /* ahb */ arm_devmap_add_entry(0xda000000, 0x100000); /* secbus */ return (0); } struct arm32_dma_range * bus_dma_get_range(void) { return (NULL); } int bus_dma_get_range_nb(void) { return (0); } struct fdt_fixup_entry fdt_fixup_table[] = { { NULL, NULL } }; +#ifndef DEV_GIC static int fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig, int *pol) { /* - * The single core chips have just an Amlogic PIC. However the - * multi core chips also have a GIC. + * The single core chips have just an Amlogic PIC. */ -#ifdef SMP - if (!fdt_is_compatible_strict(node, "arm,cortex-a9-gic")) -#else if (!fdt_is_compatible_strict(node, "amlogic,aml8726-pic")) -#endif return (ENXIO); *interrupt = fdt32_to_cpu(intr[1]); *trig = INTR_TRIGGER_EDGE; *pol = INTR_POLARITY_HIGH; - switch (*interrupt) { - case 30: /* INT_USB_A */ - case 31: /* INT_USB_B */ - *trig = INTR_TRIGGER_LEVEL; - break; - default: - break; - } - -#ifdef SMP - *interrupt += 32; -#endif - return (0); } +#endif fdt_pic_decode_t fdt_pic_table[] = { +#ifdef DEV_GIC + &gic_decode_fdt, +#else &fdt_pic_decode_ic, +#endif NULL }; Index: head/sys/arm/amlogic/aml8726/aml8726_pic.c =================================================================== --- head/sys/arm/amlogic/aml8726/aml8726_pic.c (revision 283056) +++ head/sys/arm/amlogic/aml8726/aml8726_pic.c (revision 283057) @@ -1,278 +1,278 @@ /*- * Copyright 2013-2015 John Wehle * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ /* * Amlogic aml8726 PIC driver. * * The current implementation doesn't include support for FIQ. * * There is a set of four interrupt controllers per cpu located in adjacent * memory addresses (the set for cpu 1 starts right after the set for cpu 0) * ... this allows for interrupt handling to be spread across the cpus. * * The multicore chips also have a GIC ... typically they run SMP kernels * which include the GIC driver in which case this driver is simply used * to disable the PIC. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include struct aml8726_pic_softc { device_t dev; struct resource * res[1]; }; static struct resource_spec aml8726_pic_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, { -1, 0 } }; /* * devclass_get_device / device_get_softc could be used * to dynamically locate this, however the pic is a * required device which can't be unloaded so there's * no need for the overhead. */ static struct aml8726_pic_softc *aml8726_pic_sc = NULL; #define AML_PIC_NCNTRLS 4 #define AML_PIC_IRQS_PER_CNTRL 32 #define AML_PIC_NIRQS (AML_PIC_NCNTRLS * AML_PIC_IRQS_PER_CNTRL) #define AML_PIC_0_STAT_REG 0 #define AML_PIC_0_STAT_CLR_REG 4 #define AML_PIC_0_MASK_REG 8 #define AML_PIC_0_FIRQ_SEL 12 #define AML_PIC_1_STAT_REG 16 #define AML_PIC_1_STAT_CLR_REG 20 #define AML_PIC_1_MASK_REG 24 #define AML_PIC_1_FIRQ_SEL 28 #define AML_PIC_2_STAT_REG 32 #define AML_PIC_2_STAT_CLR_REG 36 #define AML_PIC_2_MASK_REG 40 #define AML_PIC_2_FIRQ_SEL 44 #define AML_PIC_3_STAT_REG 48 #define AML_PIC_3_STAT_CLR_REG 52 #define AML_PIC_3_MASK_REG 56 #define AML_PIC_3_FIRQ_SEL 60 #define AML_PIC_CTRL(x) ((x) >> 5) #define AML_PIC_BIT(x) (1 << ((x) & 0x1f)) #define AML_PIC_STAT_REG(x) (AML_PIC_0_STAT_REG + AML_PIC_CTRL(x) * 16) #define AML_PIC_STAT_CLR_REG(x) (AML_PIC_0_STAT_CLR_REG + AML_PIC_CTRL(x) * 16) #define AML_PIC_MASK_REG(x) (AML_PIC_0_MASK_REG + AML_PIC_CTRL(x) * 16) #define AML_PIC_FIRQ_SEL(x) (AML_PIC_0_FIRQ_REG + AML_PIC_CTRL(x) * 16) #define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], reg, (val)) #define CSR_READ_4(sc, reg) bus_read_4((sc)->res[0], reg) #define CSR_BARRIER(sc, reg) bus_barrier((sc)->res[0], reg, 4, \ (BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)) static void aml8726_pic_eoi(void *arg) { uintptr_t nb = (uintptr_t) arg; if (nb >= AML_PIC_NIRQS) return; arm_irq_memory_barrier(nb); CSR_WRITE_4(aml8726_pic_sc, AML_PIC_STAT_CLR_REG(nb), AML_PIC_BIT(nb)); CSR_BARRIER(aml8726_pic_sc, AML_PIC_STAT_CLR_REG(nb)); } static int aml8726_pic_probe(device_t dev) { if (!ofw_bus_status_okay(dev)) return (ENXIO); if (!ofw_bus_is_compatible(dev, "amlogic,aml8726-pic")) return (ENXIO); device_set_desc(dev, "Amlogic aml8726 PIC"); return (BUS_PROBE_DEFAULT); } static int aml8726_pic_attach(device_t dev) { struct aml8726_pic_softc *sc = device_get_softc(dev); int i; /* There should be exactly one instance. */ if (aml8726_pic_sc != NULL) return (ENXIO); sc->dev = dev; if (bus_alloc_resources(dev, aml8726_pic_spec, sc->res)) { device_printf(dev, "could not allocate resources for device\n"); return (ENXIO); } /* * Disable, clear, and set the interrupts to normal mode. */ for (i = 0; i < AML_PIC_NCNTRLS; i++) { CSR_WRITE_4(sc, AML_PIC_0_MASK_REG + i * 16, 0); CSR_WRITE_4(sc, AML_PIC_0_STAT_CLR_REG + i * 16, ~0u); CSR_WRITE_4(sc, AML_PIC_0_FIRQ_SEL + i * 16, 0); } -#ifndef SMP +#ifndef DEV_GIC arm_post_filter = aml8726_pic_eoi; #else device_printf(dev, "disabled in favor of gic\n"); #endif aml8726_pic_sc = sc; return (0); } static int aml8726_pic_detach(device_t dev) { return (EBUSY); } static device_method_t aml8726_pic_methods[] = { /* Device interface */ DEVMETHOD(device_probe, aml8726_pic_probe), DEVMETHOD(device_attach, aml8726_pic_attach), DEVMETHOD(device_detach, aml8726_pic_detach), DEVMETHOD_END }; static driver_t aml8726_pic_driver = { "pic", aml8726_pic_methods, sizeof(struct aml8726_pic_softc), }; static devclass_t aml8726_pic_devclass; EARLY_DRIVER_MODULE(pic, simplebus, aml8726_pic_driver, aml8726_pic_devclass, 0, 0, BUS_PASS_INTERRUPT); -#ifndef SMP +#ifndef DEV_GIC int arm_get_next_irq(int last) { uint32_t value; int irq; int start; /* * The extra complexity is simply so that all IRQs are checked * round robin so a particularly busy interrupt can't prevent * other interrupts from being serviced. */ start = (last + 1) % AML_PIC_NIRQS; irq = start; for ( ; ; ) { value = CSR_READ_4(aml8726_pic_sc, AML_PIC_STAT_REG(irq)); for ( ; ; ) { if ((value & AML_PIC_BIT(irq)) != 0) return (irq); irq = (irq + 1) % AML_PIC_NIRQS; if (irq == start) return (-1); if ((irq % AML_PIC_IRQS_PER_CNTRL) == 0) break; } } } void arm_mask_irq(uintptr_t nb) { uint32_t mask; if (nb >= AML_PIC_NIRQS) return; mask = CSR_READ_4(aml8726_pic_sc, AML_PIC_MASK_REG(nb)); mask &= ~AML_PIC_BIT(nb); CSR_WRITE_4(aml8726_pic_sc, AML_PIC_MASK_REG(nb), mask); CSR_BARRIER(aml8726_pic_sc, AML_PIC_MASK_REG(nb)); aml8726_pic_eoi((void *)nb); } void arm_unmask_irq(uintptr_t nb) { uint32_t mask; if (nb >= AML_PIC_NIRQS) return; arm_irq_memory_barrier(nb); mask = CSR_READ_4(aml8726_pic_sc, AML_PIC_MASK_REG(nb)); mask |= AML_PIC_BIT(nb); CSR_WRITE_4(aml8726_pic_sc, AML_PIC_MASK_REG(nb), mask); CSR_BARRIER(aml8726_pic_sc, AML_PIC_MASK_REG(nb)); } #endif Index: head/sys/arm/amlogic/aml8726/files.aml8726 =================================================================== --- head/sys/arm/amlogic/aml8726/files.aml8726 (revision 283056) +++ head/sys/arm/amlogic/aml8726/files.aml8726 (revision 283057) @@ -1,35 +1,35 @@ #$FreeBSD$ kern/kern_clocksource.c standard arm/arm/bus_space_base.c standard arm/arm/bus_space_generic.c standard arm/arm/pl310.c standard arm/amlogic/aml8726/aml8726_l2cache.c standard arm/amlogic/aml8726/aml8726_machdep.c standard arm/amlogic/aml8726/aml8726_mp.c optional smp arm/amlogic/aml8726/aml8726_identsoc.c standard arm/amlogic/aml8726/aml8726_ccm.c standard arm/amlogic/aml8726/aml8726_clkmsr.c standard -arm/amlogic/aml8726/aml8726_pic.c standard +arm/amlogic/aml8726/aml8726_pic.c optional aml_pic arm/amlogic/aml8726/aml8726_rtc.c standard arm/amlogic/aml8726/aml8726_timer.c standard arm/amlogic/aml8726/aml8726_wdt.c standard # serial console for debugging early boot code # also define SOCDEV_PA and SOCDEV_VA in std.aml8726 #arm/amlogic/aml8726/aml8726_uart_console.c standard arm/amlogic/aml8726/aml8726_fb.c optional vt arm/amlogic/aml8726/aml8726_gpio.c optional gpio arm/amlogic/aml8726/aml8726_i2c.c optional iicbus arm/amlogic/aml8726/aml8726_mmc.c optional mmc gpio arm/amlogic/aml8726/aml8726_sdxc-m8.c optional mmc gpio arm/amlogic/aml8726/aml8726_pinctrl.c optional fdt_pinctrl #arm/amlogic/aml8726/aml8726_rng.c optional random arm/amlogic/aml8726/uart_dev_aml8726.c optional uart arm/amlogic/aml8726/aml8726_usb_phy-m6.c optional dwcotg usb gpio dev/dwc/if_dwc.c optional dwc Index: head/sys/arm/conf/AML8726 =================================================================== --- head/sys/arm/conf/AML8726 (revision 283056) +++ head/sys/arm/conf/AML8726 (revision 283057) @@ -1,117 +1,116 @@ # # Kernel configuration for Amlogic aml8726 boards. # # For more information on this file, please read the config(5) manual page, # and/or the handbook section on Kernel Configuration Files: # # http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html # # The handbook is also available locally in /usr/share/doc/handbook # if you've installed the doc distribution, otherwise always see the # FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the # latest information. # # An exhaustive list of options and more detailed explanations of the # device lines is also present in the ../../conf/NOTES and NOTES files. # If you are in doubt as to the purpose or necessity of a line, check first # in NOTES. # # $FreeBSD$ ident AML8726 include "std.armv6" include "../amlogic/aml8726/std.aml8726" options HZ=100 options SCHED_ULE # ULE scheduler options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed. options LINUX_BOOT_ABI -options SMP # Enable multiple cores # Debugging makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols options ALT_BREAK_TO_DEBUGGER #options VERBOSE_SYSINIT # Enable verbose sysinit messages options BOOTVERBOSE=1 options KDB # Enable kernel debugger support # For minimum debugger support (stable branch) use: #options KDB_TRACE # Print a stack trace for a panic # For full debugger support use this instead: options DDB # Enable the kernel debugger options INVARIANTS # Enable calls of extra sanity checking options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS options WITNESS # Enable checks to detect deadlocks and cycles options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed #options DIAGNOSTIC # NFS root from boopt/dhcp #options BOOTP #options BOOTP_NFSROOT #options BOOTP_COMPAT #options BOOTP_NFSV3 #options BOOTP_WIRED_TO=axe0 +# Interrupt controller +device aml_pic + # MMC/SD/SDIO Card slot support device mmc # mmc/sd bus device mmcsd # mmc/sd flash cards # Boot device is 2nd slice on MMC/SD card options ROOTDEVNAME=\"ufs:mmcsd0s2\" - -# Interrupt controller -device gic # GPIO device gpio device gpioled # I2C support device iicbus device iicbb device iic # vt is the default console driver, resembling an SCO console device vt #device kbdmux # Serial (COM) ports device uart # Generic UART driver # Pseudo devices. device loop # Network loopback device random # Entropy device device ether # Ethernet support device pty # BSD-style compatibility pseudo ttys # The `bpf' device enables the Berkeley Packet Filter. # Be aware of the administrative consequences of enabling this! # Note that 'bpf' is required for DHCP. device bpf # Berkeley packet filter # USB support device usb # General USB code (mandatory for USB) device dwcotg # DWC OTG controller options USB_HOST_ALIGN=64 # Align usb buffers to cache line size. options USB_DEBUG #options USB_REQ_DEBUG #options USB_VERBOSE #device ukbd # USB keyboard #device ums # USB mouse device scbus # SCSI bus (required for ATA/SCSI) device da # Direct Access (disks) device umass # Disks/Mass storage - Requires scbus and da # Ethernet support device miibus # MII bus support # SoC Ethernet, requires miibus device dwc # USB Ethernet support, requires miibus device axe # ASIX Electronics USB Ethernet # Flattened Device Tree options FDT # Configure using FDT/DTB data Index: head/sys/arm/conf/ODROIDC1 =================================================================== --- head/sys/arm/conf/ODROIDC1 (revision 283056) +++ head/sys/arm/conf/ODROIDC1 (revision 283057) @@ -1,26 +1,29 @@ # ODROIDC1 -- Custom configuration for the HardKernel ODROID-C1 SBC # # For more information on this file, please read the config(5) manual page, # and/or the handbook section on Kernel Configuration Files: # # http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html # # The handbook is also available locally in /usr/share/doc/handbook # if you've installed the doc distribution, otherwise always see the # FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the # latest information. # # An exhaustive list of options and more detailed explanations of the # device lines is also present in the ../../conf/NOTES and NOTES files. # If you are in doubt as to the purpose or necessity of a line, check first # in NOTES. # # $FreeBSD$ #NO_UNIVERSE include "AML8726" ident ODROIDC1 +# Interrupt controller +device gic + options FDT_DTB_STATIC makeoptions FDT_DTS_FILE=odroidc1.dts Index: head/sys/arm/conf/VSATV102 =================================================================== --- head/sys/arm/conf/VSATV102 (revision 283056) +++ head/sys/arm/conf/VSATV102 (revision 283057) @@ -1,26 +1,29 @@ # VSATV102 -- Custom configuration for the Visson ATV-102 media player # # For more information on this file, please read the config(5) manual page, # and/or the handbook section on Kernel Configuration Files: # # http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html # # The handbook is also available locally in /usr/share/doc/handbook # if you've installed the doc distribution, otherwise always see the # FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the # latest information. # # An exhaustive list of options and more detailed explanations of the # device lines is also present in the ../../conf/NOTES and NOTES files. # If you are in doubt as to the purpose or necessity of a line, check first # in NOTES. # # $FreeBSD$ #NO_UNIVERSE include "AML8726" ident VSATV102 +# Interrupt controller +device gic + options FDT_DTB_STATIC makeoptions FDT_DTS_FILE=vsatv102-m6.dts Index: head/sys/conf/options.arm =================================================================== --- head/sys/conf/options.arm (revision 283056) +++ head/sys/conf/options.arm (revision 283057) @@ -1,69 +1,70 @@ #$FreeBSD$ ARMV6 opt_global.h ARM_CACHE_LOCK_ENABLE opt_global.h ARM_KERN_DIRECTMAP opt_vm.h ARM_L2_PIPT opt_global.h ARM_MANY_BOARD opt_global.h ARM_NEW_PMAP opt_global.h NKPT2PG opt_pmap.h ARM_WANT_TP_ADDRESS opt_global.h COUNTS_PER_SEC opt_timer.h CPU_ARM9 opt_global.h CPU_ARM9E opt_global.h CPU_ARM1176 opt_global.h CPU_CORTEXA opt_global.h CPU_KRAIT opt_global.h CPU_FA526 opt_global.h CPU_MV_PJ4B opt_global.h CPU_XSCALE_80219 opt_global.h CPU_XSCALE_80321 opt_global.h CPU_XSCALE_81342 opt_global.h CPU_XSCALE_IXP425 opt_global.h CPU_XSCALE_IXP435 opt_global.h CPU_XSCALE_PXA2X0 opt_global.h +DEV_GIC opt_global.h FLASHADDR opt_global.h GIC_DEFAULT_ICFGR_INIT opt_global.h IPI_IRQ_START opt_smp.h IPI_IRQ_END opt_smp.h FREEBSD_BOOT_LOADER opt_global.h IXP4XX_FLASH_SIZE opt_global.h KERNBASE opt_global.h KERNPHYSADDR opt_global.h KERNVIRTADDR opt_global.h LINUX_BOOT_ABI opt_global.h LOADERRAMADDR opt_global.h PHYSADDR opt_global.h PLATFORM opt_global.h SOCDEV_PA opt_global.h SOCDEV_VA opt_global.h PV_STATS opt_pmap.h QEMU_WORKAROUNDS opt_global.h SOC_BCM2835 opt_global.h SOC_BCM2836 opt_global.h SOC_IMX51 opt_global.h SOC_IMX53 opt_global.h SOC_IMX6 opt_global.h SOC_MV_ARMADAXP opt_global.h SOC_MV_DISCOVERY opt_global.h SOC_MV_DOVE opt_global.h SOC_MV_FREY opt_global.h SOC_MV_KIRKWOOD opt_global.h SOC_MV_LOKIPLUS opt_global.h SOC_MV_ORION opt_global.h SOC_OMAP3 opt_global.h SOC_OMAP4 opt_global.h SOC_TI_AM335X opt_global.h SOC_TEGRA2 opt_global.h XSCALE_CACHE_READ_WRITE_ALLOCATE opt_global.h XSACLE_DISABLE_CCNT opt_timer.h VERBOSE_INIT_ARM opt_global.h VM_MAXUSER_ADDRESS opt_global.h AT91_ATE_USE_RMII opt_at91.h AT91_MCI_ALLOW_OVERCLOCK opt_at91.h AT91_MCI_HAS_4WIRE opt_at91.h AT91_MCI_SLOT_B opt_at91.h GFB_DEBUG opt_gfb.h GFB_NO_FONT_LOADING opt_gfb.h GFB_NO_MODE_CHANGE opt_gfb.h AT91C_MAIN_CLOCK opt_at91.h VFP opt_global.h