Index: head/lib/libc/arm/SYS.h =================================================================== --- head/lib/libc/arm/SYS.h (revision 282815) +++ head/lib/libc/arm/SYS.h (revision 282816) @@ -1,82 +1,84 @@ /* $NetBSD: SYS.h,v 1.8 2003/08/07 16:42:02 agc Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. * All rights reserved. * * This code is derived from software contributed to Berkeley by * William Jolitz. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * from: @(#)SYS.h 5.5 (Berkeley) 5/7/91 * $FreeBSD$ */ #include #include #include #ifdef __ARM_EABI__ #define SYSTRAP(x) \ mov ip, r7; \ ldr r7, =SYS_ ## x; \ swi 0; \ mov r7, ip #else #define SYSTRAP(x) swi 0 | SYS_ ## x #endif #define CERROR _C_LABEL(cerror) #define CURBRK _C_LABEL(curbrk) #define _SYSCALL_NOERROR(x) \ ENTRY(__CONCAT(__sys_, x)); \ .weak _C_LABEL(x); \ .set _C_LABEL(x), _C_LABEL(__CONCAT(__sys_,x)); \ .weak _C_LABEL(__CONCAT(_,x)); \ .set _C_LABEL(__CONCAT(_,x)),_C_LABEL(__CONCAT(__sys_,x)); \ SYSTRAP(x) #define _SYSCALL(x) \ _SYSCALL_NOERROR(x); \ + it cs; \ bcs PIC_SYM(CERROR, PLT) #define SYSCALL(x) \ _SYSCALL(x) #define PSEUDO(x) \ ENTRY(__CONCAT(__sys_, x)); \ .weak _C_LABEL(__CONCAT(_,x)); \ .set _C_LABEL(__CONCAT(_,x)),_C_LABEL(__CONCAT(__sys_,x)); \ SYSTRAP(x); \ + it cs; \ bcs PIC_SYM(CERROR, PLT); \ RET #define RSYSCALL(x) \ _SYSCALL(x); \ RET .globl CERROR Index: head/lib/libc/arm/aeabi/aeabi_vfp_double.S =================================================================== --- head/lib/libc/arm/aeabi/aeabi_vfp_double.S (revision 282815) +++ head/lib/libc/arm/aeabi/aeabi_vfp_double.S (revision 282816) @@ -1,197 +1,203 @@ /* * Copyright (C) 2013 Andrew Turner * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * */ #include __FBSDID("$FreeBSD$"); #include "aeabi_vfp.h" .fpu vfp .syntax unified /* void __aeabi_cdcmpeq(double, double) */ AEABI_ENTRY(cdcmpeq) LOAD_DREG(d0, r0, r1) LOAD_DREG(d1, r2, r3) vcmp.f64 d0, d1 vmrs APSR_nzcv, fpscr RET AEABI_END(cdcmpeq) /* void __aeabi_cdcmple(double, double) */ AEABI_ENTRY(cdcmple) LOAD_DREG(d0, r0, r1) LOAD_DREG(d1, r2, r3) vcmpe.f64 d0, d1 vmrs APSR_nzcv, fpscr RET AEABI_END(cdcmple) /* void __aeabi_cdrcmple(double, double) */ AEABI_ENTRY(cdrcmple) LOAD_DREG(d0, r0, r1) LOAD_DREG(d1, r2, r3) vcmpe.f64 d1, d0 vmrs APSR_nzcv, fpscr RET AEABI_END(cdrcmple) /* int __aeabi_dcmpeq(double, double) */ AEABI_ENTRY(dcmpeq) LOAD_DREG(d0, r0, r1) LOAD_DREG(d1, r2, r3) vcmp.f64 d0, d1 vmrs APSR_nzcv, fpscr + ite ne movne r0, #0 moveq r0, #1 RET AEABI_END(dcmpeq) /* int __aeabi_dcmplt(double, double) */ AEABI_ENTRY(dcmplt) LOAD_DREG(d0, r0, r1) LOAD_DREG(d1, r2, r3) vcmp.f64 d0, d1 vmrs APSR_nzcv, fpscr + ite cs movcs r0, #0 - movlt r0, #1 + movcc r0, #1 RET AEABI_END(dcmplt) /* int __aeabi_dcmple(double, double) */ AEABI_ENTRY(dcmple) LOAD_DREG(d0, r0, r1) LOAD_DREG(d1, r2, r3) vcmp.f64 d0, d1 vmrs APSR_nzcv, fpscr + ite hi movhi r0, #0 movls r0, #1 RET AEABI_END(dcmple) /* int __aeabi_dcmpge(double, double) */ AEABI_ENTRY(dcmpge) LOAD_DREG(d0, r0, r1) LOAD_DREG(d1, r2, r3) vcmp.f64 d0, d1 vmrs APSR_nzcv, fpscr + ite lt movlt r0, #0 movge r0, #1 RET AEABI_END(dcmpge) /* int __aeabi_dcmpgt(double, double) */ AEABI_ENTRY(dcmpgt) LOAD_DREG(d0, r0, r1) LOAD_DREG(d1, r2, r3) vcmp.f64 d0, d1 vmrs APSR_nzcv, fpscr + ite le movle r0, #0 movgt r0, #1 RET AEABI_END(dcmpgt) /* int __aeabi_dcmpun(double, double) */ AEABI_ENTRY(dcmpun) LOAD_DREG(d0, r0, r1) LOAD_DREG(d1, r2, r3) vcmp.f64 d0, d1 vmrs APSR_nzcv, fpscr + ite vc movvc r0, #0 movvs r0, #1 RET AEABI_END(dcmpun) /* int __aeabi_d2iz(double) */ AEABI_ENTRY(d2iz) LOAD_DREG(d0, r0, r1) #if 0 /* * This should be the correct instruction, but binutils incorrectly * encodes it as the version that used FPSCR to determine the rounding. * When binutils is fixed we can use this again. */ vcvt.s32.f64 s0, d0 #else ftosizd s0, d0 #endif vmov r0, s0 RET AEABI_END(d2iz) /* float __aeabi_d2f(double) */ AEABI_ENTRY(d2f) LOAD_DREG(d0, r0, r1) vcvt.f32.f64 s0, d0 UNLOAD_SREG(r0, s0) RET AEABI_END(d2f) /* double __aeabi_i2d(int) */ AEABI_ENTRY(i2d) vmov s0, r0 vcvt.f64.s32 d0, s0 UNLOAD_DREG(r0, r1, d0) RET AEABI_END(i2d) /* double __aeabi_dadd(double, double) */ AEABI_ENTRY(dadd) LOAD_DREG(d0, r0, r1) LOAD_DREG(d1, r2, r3) vadd.f64 d0, d0, d1 UNLOAD_DREG(r0, r1, d0) RET AEABI_END(dadd) /* double __aeabi_ddiv(double, double) */ AEABI_ENTRY(ddiv) LOAD_DREG(d0, r0, r1) LOAD_DREG(d1, r2, r3) vdiv.f64 d0, d0, d1 UNLOAD_DREG(r0, r1, d0) RET AEABI_END(ddiv) /* double __aeabi_dmul(double, double) */ AEABI_ENTRY(dmul) LOAD_DREG(d0, r0, r1) LOAD_DREG(d1, r2, r3) vmul.f64 d0, d0, d1 UNLOAD_DREG(r0, r1, d0) RET AEABI_END(dmul) /* double __aeabi_dsub(double, double) */ AEABI_ENTRY(dsub) LOAD_DREG(d0, r0, r1) LOAD_DREG(d1, r2, r3) vsub.f64 d0, d0, d1 UNLOAD_DREG(r0, r1, d0) RET AEABI_END(dsub) Index: head/lib/libc/arm/aeabi/aeabi_vfp_float.S =================================================================== --- head/lib/libc/arm/aeabi/aeabi_vfp_float.S (revision 282815) +++ head/lib/libc/arm/aeabi/aeabi_vfp_float.S (revision 282816) @@ -1,184 +1,190 @@ /* * Copyright (C) 2013 Andrew Turner * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * */ #include __FBSDID("$FreeBSD$"); #include "aeabi_vfp.h" .fpu vfp .syntax unified /* void __aeabi_cfcmpeq(float, float) */ AEABI_ENTRY(cfcmpeq) LOAD_SREGS(s0, s1, r0, r1) vcmp.f32 s0, s1 vmrs APSR_nzcv, fpscr RET AEABI_END(cfcmpeq) /* void __aeabi_cfcmple(float, float) */ AEABI_ENTRY(cfcmple) LOAD_SREGS(s0, s1, r0, r1) vcmpe.f32 s0, s1 vmrs APSR_nzcv, fpscr RET AEABI_END(cfcmple) /* void __aeabi_cfrcmple(float, float) */ AEABI_ENTRY(cfrcmple) LOAD_SREGS(s0, s1, r0, r1) vcmpe.f32 s1, s0 vmrs APSR_nzcv, fpscr RET AEABI_END(cfrcmple) /* int __aeabi_fcmpeq(float, float) */ AEABI_ENTRY(fcmpeq) LOAD_SREGS(s0, s1, r0, r1) vcmp.f32 s0, s1 vmrs APSR_nzcv, fpscr + ite ne movne r0, #0 moveq r0, #1 RET AEABI_END(fcmpeq) /* int __aeabi_fcmplt(float, float) */ AEABI_ENTRY(fcmplt) LOAD_SREGS(s0, s1, r0, r1) vcmp.f32 s0, s1 vmrs APSR_nzcv, fpscr + ite cs movcs r0, #0 - movlt r0, #1 + movcc r0, #1 RET AEABI_END(fcmplt) /* int __aeabi_fcmple(float, float) */ AEABI_ENTRY(fcmple) LOAD_SREGS(s0, s1, r0, r1) vcmp.f32 s0, s1 vmrs APSR_nzcv, fpscr + ite hi movhi r0, #0 movls r0, #1 RET AEABI_END(fcmple) /* int __aeabi_fcmpge(float, float) */ AEABI_ENTRY(fcmpge) LOAD_SREGS(s0, s1, r0, r1) vcmp.f32 s0, s1 vmrs APSR_nzcv, fpscr + ite lt movlt r0, #0 movge r0, #1 RET AEABI_END(fcmpge) /* int __aeabi_fcmpgt(float, float) */ AEABI_ENTRY(fcmpgt) LOAD_SREGS(s0, s1, r0, r1) vcmp.f32 s0, s1 vmrs APSR_nzcv, fpscr + ite le movle r0, #0 movgt r0, #1 RET AEABI_END(fcmpgt) /* int __aeabi_fcmpun(float, float) */ AEABI_ENTRY(fcmpun) LOAD_SREGS(s0, s1, r0, r1) vcmp.f32 s0, s1 vmrs APSR_nzcv, fpscr + ite vc movvc r0, #0 movvs r0, #1 RET AEABI_END(fcmpun) /* int __aeabi_f2iz(float) */ AEABI_ENTRY(f2iz) LOAD_SREG(s0, r0) #if 0 /* * This should be the correct instruction, but binutils incorrectly * encodes it as the version that used FPSCR to determine the rounding. * When binutils is fixed we can use this again. */ vcvt.s32.f32 s0, s0 #else ftosizs s0, s0 #endif vmov r0, s0 RET AEABI_END(f2iz) /* double __aeabi_f2d(float) */ AEABI_ENTRY(f2d) LOAD_SREG(s0, r0) vcvt.f64.f32 d0, s0 UNLOAD_DREG(r0, r1, d0) RET AEABI_END(f2d) /* float __aeabi_i2f(int) */ AEABI_ENTRY(i2f) vmov s0, r0 vcvt.f32.s32 s0, s0 UNLOAD_SREG(r0, s0) RET AEABI_END(i2f) /* float __aeabi_fadd(float, float) */ AEABI_ENTRY(fadd) LOAD_SREGS(s0, s1, r0, r1) vadd.f32 s0, s0, s1 UNLOAD_SREG(r0, s0) RET AEABI_END(fadd) /* float __aeabi_fmul(float, float) */ AEABI_ENTRY(fdiv) LOAD_SREGS(s0, s1, r0, r1) vdiv.f32 s0, s0, s1 UNLOAD_SREG(r0, s0) RET AEABI_END(fdiv) /* float __aeabi_fmul(float, float) */ AEABI_ENTRY(fmul) LOAD_SREGS(s0, s1, r0, r1) vmul.f32 s0, s0, s1 UNLOAD_SREG(r0, s0) RET AEABI_END(fmul) /* float __aeabi_fsub(float, float) */ AEABI_ENTRY(fsub) LOAD_SREGS(s0, s1, r0, r1) vsub.f32 s0, s0, s1 UNLOAD_SREG(r0, s0) RET AEABI_END(fsub) Index: head/lib/libc/arm/gen/_setjmp.S =================================================================== --- head/lib/libc/arm/gen/_setjmp.S (revision 282815) +++ head/lib/libc/arm/gen/_setjmp.S (revision 282816) @@ -1,144 +1,159 @@ /* $NetBSD: _setjmp.S,v 1.12 2013/04/19 13:45:45 matt Exp $ */ /* * Copyright (c) 1997 Mark Brinicombe * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Mark Brinicombe * 4. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #if !defined(__SOFTFP__) && !defined(__VFP_FP__) && !defined(__ARM_PCS) #error FPA is not supported anymore #endif #if defined(__ARM_EABI__) && !defined(_STANDALONE) .fpu vfp #endif #include #include __FBSDID("$FreeBSD$"); /* * C library -- _setjmp, _longjmp * * _longjmp(a,v) * will generate a "return(v)" from the last call to * _setjmp(a) * by restoring registers from the stack. * The previous signal state is NOT restored. * * Note: r0 is the return value * r1-r3,ip are scratch registers in functions */ ENTRY(_setjmp) ldr r1, .L_setjmp_magic #if defined(__ARM_EABI__) && !defined(_STANDALONE) ldr r2, .Lfpu_present #ifdef PIC GOT_INIT(r3, .L_setjmp_got, .L_setjmp_gotinit) ldr r2, [r2, r3] #else ldr r2, [r2] #endif teq r2, #0 /* do we have a FPU? */ beq 1f /* no, don't save VFP registers */ orr r1, r1, #(_JB_MAGIC__SETJMP ^ _JB_MAGIC__SETJMP_VFP) /* change magic to VFP magic */ add r2, r0, #(_JB_REG_D8 * 4) vstmia r2, {d8-d15} vmrs r2, fpscr str r2, [r0, #(_JB_REG_FPSCR * 4)] 1: #endif /* __ARM_EABI__ */ str r1, [r0] add r0, r0, #(_JB_REG_R4 * 4) /* Store integer registers */ +#ifndef __thumb__ stmia r0, {r4-r14} +#else + stmia r0, {r4-r12} + str r13, [r0, #((_JB_REG_R13 - _JB_REG_R4) * 4)] + str r14, [r0, #((_JB_REG_R14 - _JB_REG_R4) * 4)] +#endif mov r0, #0x00000000 RET END(_setjmp) .L_setjmp_magic: .word _JB_MAGIC__SETJMP #if defined(__ARM_EABI__) && !defined(_STANDALONE) GOT_INITSYM(.L_setjmp_got, .L_setjmp_gotinit) .Lfpu_present: .word PIC_SYM(_libc_arm_fpu_present, GOTOFF) #endif /* __ARM_EABI__ */ WEAK_ALIAS(___longjmp, _longjmp) ENTRY(_longjmp) ldr r2, [r0] /* get magic from jmp_buf */ bic r3, r2, #(_JB_MAGIC__SETJMP ^ _JB_MAGIC__SETJMP_VFP) /* ignore VFP-ness of magic */ ldr ip, .L_setjmp_magic /* load magic */ teq ip, r3 /* magic correct? */ bne botch /* no, botch */ #if defined(__ARM_EABI__) && !defined(_STANDALONE) teq r3, r2 /* did magic change? */ beq 1f /* no, don't restore VFP */ add ip, r0, #(_JB_REG_D8 * 4) vldmia ip, {d8-d15} ldr ip, [r0, #(_JB_REG_FPSCR * 4)] vmsr fpscr, ip 1: #endif /* __ARM_EABI__ */ add r0, r0, #(_JB_REG_R4 * 4) /* Restore integer registers */ +#ifndef __thumb__ ldmia r0, {r4-r14} +#else + ldmia r0, {r4-r12} + ldr r13, [r0, #((_JB_REG_R13 - _JB_REG_R4) * 4)] + ldr r14, [r0, #((_JB_REG_R14 - _JB_REG_R4) * 4)] +#endif /* Validate sp and r14 */ teq sp, #0 + it ne teqne r14, #0 + it eq beq botch /* Set return value */ movs r0, r1 + it eq moveq r0, #0x00000001 RET /* validation failed, die die die. */ botch: #if !defined(_STANDALONE) bl PIC_SYM(_C_LABEL(longjmperror), PLT) bl PIC_SYM(_C_LABEL(abort), PLT) - b . - 8 /* Cannot get here */ +1: b 1b /* Cannot get here */ #else b . #endif END(_longjmp) Index: head/lib/libc/arm/gen/setjmp.S =================================================================== --- head/lib/libc/arm/gen/setjmp.S (revision 282815) +++ head/lib/libc/arm/gen/setjmp.S (revision 282816) @@ -1,153 +1,168 @@ /* $NetBSD: setjmp.S,v 1.14 2013/04/19 13:45:45 matt Exp $ */ /* * Copyright (c) 1997 Mark Brinicombe * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Mark Brinicombe * 4. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #if !defined(__SOFTFP__) && !defined(__VFP_FP__) && !defined(__ARM_PCS) #error FPA is not supported anymore #endif #ifdef __ARM_EABI__ .fpu vfp #endif #include #include __FBSDID("$FreeBSD$"); /* * C library -- setjmp, longjmp * * longjmp(a,v) * will generate a "return(v)" from the last call to * setjmp(a) * by restoring registers from the stack. * The previous signal state is restored. */ ENTRY(setjmp) /* Block all signals and retrieve the old signal mask */ stmfd sp!, {r0, r14} add r2, r0, #(_JB_SIGMASK * 4) /* oset */ mov r1, #0x00000000 /* set */ mov r0, #0x00000001 /* SIG_BLOCK */ bl PIC_SYM(_C_LABEL(sigprocmask), PLT) ldmfd sp!, {r0, r14} ldr r1, .Lsetjmp_magic #ifdef __ARM_EABI__ ldr r2, .Lfpu_present #ifdef PIC GOT_INIT(r3, .Lsetjmp_got, .Lsetjmp_gotinit) ldr r2, [r2, r3] #else ldr r2, [r2] #endif teq r2, #0 /* do we have a FPU? */ beq 1f /* no, don't save VFP registers */ orr r1, r1, #(_JB_MAGIC_SETJMP ^ _JB_MAGIC_SETJMP_VFP) /* change magic to VFP magic */ add r2, r0, #(_JB_REG_D8 * 4) vstmia r2, {d8-d15} vmrs r2, fpscr str r2, [r0, #(_JB_REG_FPSCR * 4)] 1: #endif /* __ARM_EABI__ */ str r1, [r0] /* store magic */ /* Store integer registers */ add r0, r0, #(_JB_REG_R4 * 4) +#ifndef __thumb__ stmia r0, {r4-r14} +#else + stmia r0, {r4-r12} + str r13, [r0, #((_JB_REG_R13 - _JB_REG_R4) * 4)] + str r14, [r0, #((_JB_REG_R14 - _JB_REG_R4) * 4)] +#endif mov r0, #0x00000000 RET .Lsetjmp_magic: .word _JB_MAGIC_SETJMP #ifdef __ARM_EABI__ GOT_INITSYM(.Lsetjmp_got, .Lsetjmp_gotinit) .Lfpu_present: .word PIC_SYM(_libc_arm_fpu_present, GOTOFF) #endif /* __ARM_EABI__ */ END(setjmp) .weak _C_LABEL(longjmp) .set _C_LABEL(longjmp), _C_LABEL(__longjmp) ENTRY(__longjmp) ldr r2, [r0] ldr ip, .Lsetjmp_magic bic r3, r2, #(_JB_MAGIC_SETJMP ^ _JB_MAGIC_SETJMP_VFP) teq r3, ip bne .Lbotch /* Restore the signal mask. */ stmfd sp!, {r0-r2, r14} mov r2, #0x00000000 add r1, r0, #(_JB_SIGMASK * 4) /* Signal mask */ mov r0, #3 /* SIG_SETMASK */ bl PIC_SYM(_C_LABEL(sigprocmask), PLT) ldmfd sp!, {r0-r2, r14} #ifdef __ARM_EABI__ tst r2, #(_JB_MAGIC_SETJMP ^ _JB_MAGIC_SETJMP_VFP) /* is this a VFP magic? */ beq 1f /* no, don't restore VFP */ add ip, r0, #(_JB_REG_D8 * 4) vldmia ip, {d8-d15} ldr ip, [r0, #(_JB_REG_FPSCR * 4)] vmsr fpscr, ip 1: #endif /* __ARM_EABI__ */ add r0, r0, #(_JB_REG_R4 * 4) /* Restore integer registers */ +#ifndef __thumb__ ldmia r0, {r4-r14} +#else + ldmia r0, {r4-r12} + ldr r13, [r0, #((_JB_REG_R13 - _JB_REG_R4) * 4)] + ldr r14, [r0, #((_JB_REG_R14 - _JB_REG_R4) * 4)] +#endif /* Validate sp and r14 */ teq sp, #0 + it ne teqne r14, #0 + it eq beq .Lbotch /* Set return value */ movs r0, r1 + it eq moveq r0, #0x00000001 RET /* validation failed, die die die. */ .Lbotch: bl PIC_SYM(_C_LABEL(longjmperror), PLT) bl PIC_SYM(_C_LABEL(abort), PLT) - b . - 8 /* Cannot get here */ +1: b 1b /* Cannot get here */ END(__longjmp)