Index: head/sys/mips/conf/CARAMBOLA2.hints =================================================================== --- head/sys/mips/conf/CARAMBOLA2.hints (revision 280318) +++ head/sys/mips/conf/CARAMBOLA2.hints (revision 280319) @@ -1,114 +1,114 @@ # # This file adds to the values in AR91XX_BASE.hints. # # $FreeBSD$ # mdiobus on arge1 hint.argemdio.0.at="nexus0" hint.argemdio.0.maddr=0x1a000000 hint.argemdio.0.msize=0x1000 hint.argemdio.0.order=0 # Embedded Atheros Switch hint.arswitch.0.at="mdio0" # XXX this should really say it's an AR933x switch, as there # are some vlan specific differences here! hint.arswitch.0.is_7240=1 hint.arswitch.0.numphys=4 hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY hint.arswitch.0.is_rgmii=0 hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII # arge0 - MII, autoneg, phy(4) hint.arge.0.phymask=0x10 # PHY4 hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus # arge1 - GMII, 1000/full hint.arge.1.phymask=0x0 # No directly mapped PHYs hint.arge.1.media=1000 hint.arge.1.fduplex=1 # Where the ART is - last 64k in the flash # 0x9fff1000 ? hint.ath.0.eepromaddr=0x1fff0000 hint.ath.0.eepromsize=16384 # The AP121 16MB flash layout: # # [ 0.700000] 0x000000000000-0x000000040000 : "u-boot" # [ 0.710000] 0x000000040000-0x000000050000 : "u-boot-env" # [ 0.710000] 0x000000050000-0x000000250000 : "kernel" # [ 0.720000] 0x000000250000-0x000000fe0000 : "rootfs" # [ 0.720000] mtd: partition "rootfs" set to be root filesystem # [ 0.730000] mtd: partition "rootfs_data" created automatically, ofs=480000, len=B60000 # [ 0.740000] 0x000000480000-0x000000fe0000 : "rootfs_data" # [ 0.740000] 0x000000fe0000-0x000000ff0000 : "nvram" # [ 0.750000] 0x000000ff0000-0x000001000000 : "art" # [ 0.750000] 0x000000050000-0x000000fe0000 : "firmware" hint.map.0.at="flash/spi0" hint.map.0.start=0x00000000 hint.map.0.end=0x000040000 hint.map.0.name="uboot" hint.map.0.readonly=1 hint.map.1.at="flash/spi0" hint.map.1.start=0x00040000 hint.map.1.end=0x00050000 hint.map.1.name="uboot-env" hint.map.1.readonly=0 hint.map.2.at="flash/spi0" hint.map.2.start=0x00050000 -hint.map.2.end=0x00250000 +hint.map.2.end="search:0x00050000:0x10000:.!/bin/sh" hint.map.2.name="kernel" hint.map.2.readonly=0 hint.map.3.at="flash/spi0" -hint.map.3.start=0x00250000 +hint.map.3.start="search:0x00050000:0x10000:.!/bin/sh" hint.map.3.end=0x00fe0000 hint.map.3.name="rootfs" hint.map.3.readonly=0 hint.map.4.at="flash/spi0" hint.map.4.start=0x00fe0000 hint.map.4.end=0x00ff0000 hint.map.4.name="cfg" hint.map.4.readonly=0 # This is radio calibration section. It is (or should be!) unique # for each board, to take into account thermal and electrical differences # as well as the regulatory compliance data. # hint.map.5.at="flash/spi0" hint.map.5.start=0x00ff0000 hint.map.5.end=0x01000000 hint.map.5.name="art" hint.map.5.readonly=1 # GPIO specific configuration block # Don't flip on anything that isn't already enabled. # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're # not used here. hint.gpio.0.function_set=0x00000000 hint.gpio.0.function_clear=0x00000000 # These are the GPIO LEDs and buttons which can be software controlled. #hint.gpio.0.pinmask=0x001c02ae hint.gpio.0.pinmask=0x00001803 # gpio0 - WLAN LED # gpio1 - USB LED # gpio11 - Jumpstart button # gpio12 - Reset button # LEDs are configured separately and driven by the LED device hint.gpioled.0.at="gpiobus0" hint.gpioled.0.name="wlan" hint.gpioled.0.pins=0x0001 hint.gpioled.1.at="gpiobus0" hint.gpioled.1.name="usb" hint.gpioled.1.pins=0x0002 Index: head/sys/mips/conf/DIR-825B1.hints =================================================================== --- head/sys/mips/conf/DIR-825B1.hints (revision 280318) +++ head/sys/mips/conf/DIR-825B1.hints (revision 280319) @@ -1,140 +1,140 @@ # $FreeBSD$ # arge0 is connected to the LAN side of the switch PHY. # arge1 is connected to the single port WAN side of the switch PHY. hint.arge.0.phymask=0x0 hint.arge.0.media=1000 hint.arge.0.fduplex=1 hint.arge.0.eeprommac=0x1f66ffa0 hint.arge.0.readascii=1 hint.arge.1.phymask=0x0 hint.arge.1.media=1000 hint.arge.1.fduplex=1 hint.arge.1.eeprommac=0x1f66ffb4 hint.arge.1.readascii=1 # ath0 - slot 17 hint.pcib.0.bus.0.17.0.ath_fixup_addr=0x1f661000 hint.pcib.0.bus.0.17.0.ath_fixup_size=4096 # ath1 - slot 18 hint.pcib.0.bus.0.18.0.ath_fixup_addr=0x1f665000 hint.pcib.0.bus.0.18.0.ath_fixup_size=4096 # .. and now, telling each ath(4) NIC where to find the firmware # image. hint.ath.0.eeprom_firmware="pcib.0.bus.0.17.0.eeprom_firmware" hint.ath.1.eeprom_firmware="pcib.0.bus.0.18.0.eeprom_firmware" # Geom MAP # The DIR-825B1 has an 8MB flash part - HOWEVER, the 64k caldata isn't # at the end of the flash. It's ~ 6MB into the flash image. # mtdparts=ar7100-nor0:256k(uboot),64k(Config),1024k(vmlinux),5184k(rootfs), # 64k(caldata) hint.map.0.at="flash/spi0" hint.map.0.start=0x00000000 hint.map.0.end=0x000040000 hint.map.0.name="uboot" hint.map.0.readonly=1 # This config partition is the D-Link specific configuration area. # I'm re-purposing it for FreeBSD. hint.map.1.at="flash/spi0" hint.map.1.start=0x00040000 hint.map.1.end=0x00050000 hint.map.1.name="cfg" hint.map.1.readonly=0 hint.map.2.at="flash/spi0" hint.map.2.start=0x0050000 -hint.map.2.end=0x00150000 +hint.map.2.end="search:0x00050000:0x10000:.!/bin/sh" hint.map.2.name="kernel" hint.map.2.readonly=1 hint.map.3.at="flash/spi0" -hint.map.3.start=0x00150000 +hint.map.3.start="search:0x00050000:0x10000:.!/bin/sh" hint.map.3.end=0x00660000 hint.map.3.name="rootfs" hint.map.3.readonly=0 hint.map.4.at="flash/spi0" hint.map.4.start=0x00660000 hint.map.4.end=0x00670000 hint.map.4.name="art" hint.map.4.readonly=1 # GPIO specific configuration block # Don't flip on anything that isn't already enabled. # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're # not used here. hint.gpio.0.function_set=0x00000000 hint.gpio.0.function_clear=0x00000000 # These are the GPIO LEDs and buttons which can be software controlled. hint.gpio.0.pinmask=0x000009ff # Pin 1 - USB (LED blue) --> works # Pin 2 - Power (LED orange) --> works # Pin 3 - Power (LED blue) --> works # Pin 4 - Button (RESET) --> works # Pin 5 - WPS (LED blue) --> works # Pin 6 - RTL8366RB switch data line # Pin 7 - Planet (LED orange)--> works # Pin 8 - RTL8366RB switch clock line # Pin 9 - Button (WPS) --> works after set to high # Pin 10 - N/C # Pin 11 - N/C # Pin 12 - Planet (LED blue) --> works # LEDs are configured separately and driven by the LED device # usb tested good hint.gpioled.0.at="gpiobus0" hint.gpioled.0.name="usb-blue" hint.gpioled.0.pins=0x0001 # no orange power led? hint.gpioled.1.at="gpiobus0" hint.gpioled.1.name="power-orange" hint.gpioled.1.pins=0x0002 # blue power tested good hint.gpioled.2.at="gpiobus0" hint.gpioled.2.name="power-blue" hint.gpioled.2.pins=0x0004 # wps tested good hint.gpioled.3.at="gpiobus0" hint.gpioled.3.name="wps-blue" hint.gpioled.3.pins=0x0010 # orage globe tested good hint.gpioled.4.at="gpiobus0" hint.gpioled.4.name="planet-orange" hint.gpioled.4.pins=0x0040 # no blue planet LED on this unit hint.gpioled.5.at="gpiobus0" hint.gpioled.5.name="planet-blue" hint.gpioled.5.pins=0x0800 # GPIO I2C bus hint.gpioiic.0.at="gpiobus0" hint.gpioiic.0.pins=0x00a0 hint.gpioiic.0.sda=0 hint.gpioiic.0.scl=1 # I2C bus # Don't be strict about I2C protocol - the relaxed semantics are required # by the realtek switch PHY. hint.iicbus.0.strict=0 # Bit bang bus - override default delay #hint.iicbb.0.udelay=3 Index: head/sys/mips/conf/DIR-825C1.hints =================================================================== --- head/sys/mips/conf/DIR-825C1.hints (revision 280318) +++ head/sys/mips/conf/DIR-825C1.hints (revision 280319) @@ -1,130 +1,130 @@ # $FreeBSD$ # This is a placeholder until the hardware support is complete. # mdiobus0 on arge0 hint.argemdio.0.at="nexus0" hint.argemdio.0.maddr=0x19000000 hint.argemdio.0.msize=0x1000 hint.argemdio.0.order=0 # DIR-825C1 GMAC configuration # + AR934X_ETH_CFG_RGMII_GMAC0 (1 << 0) # Onboard AR9344 10/100 switch is not wired up hint.ar934x_gmac.0.gmac_cfg=0x1 # GMAC0 here - connected to an AR8327 hint.arswitch.0.at="mdio0" hint.arswitch.0.is_7240=0 hint.arswitch.0.is_9340=0 # not the internal switch! hint.arswitch.0.numphys=5 hint.arswitch.0.phy4cpu=0 hint.arswitch.0.is_rgmii=1 hint.arswitch.0.is_gmii=0 # Other AR8327 configuration parameters # AR8327_PAD_MAC_RGMII hint.arswitch.0.pad.0.mode=6 hint.arswitch.0.pad.0.txclk_delay_en=1 hint.arswitch.0.pad.0.rxclk_delay_en=1 # AR8327_CLK_DELAY_SEL1 hint.arswitch.0.pad.0.txclk_delay_sel=1 # AR8327_CLK_DELAY_SEL2 hint.arswitch.0.pad.0.rxclk_delay_sel=2 # XXX there's no LED management just yet! hint.arswitch.0.led.ctrl0=0x00000000 hint.arswitch.0.led.ctrl1=0xc737c737 hint.arswitch.0.led.ctrl2=0x00000000 hint.arswitch.0.led.ctrl3=0x00c30c00 hint.arswitch.0.led.open_drain=1 # force_link=1 is required for the rest of the parameters # to be configured. hint.arswitch.0.port.0.force_link=1 hint.arswitch.0.port.0.speed=1000 hint.arswitch.0.port.0.duplex=1 hint.arswitch.0.port.0.txpause=1 hint.arswitch.0.port.0.rxpause=1 # XXX OpenWRT DB120 BSP doesn't have media/duplex set? hint.arge.0.phymask=0x0 hint.arge.0.media=1000 hint.arge.0.fduplex=1 hint.arge.0.miimode=3 # RGMII hint.arge.0.pll_1000=0x06000000 # ath0: Where the ART is - last 64k in the flash hint.ath.0.eepromaddr=0x1fff0000 hint.ath.0.eepromsize=16384 # ath1: it's different; it's a PCIe attached device, so # we instead need to teach the PCIe bridge code about it # (ie, the 'early pci fixup' stuff that programs the PCIe # host registers on the NIC) and then we teach ath where # to find it. # ath1 hint - pcie slot 0 hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000 hint.pcib.0.bus.0.0.0.ath_fixup_size=16384 # ath0 - eeprom comes from here hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" # flash layout: # m25p80 spi0.0: mx25l12805d (16384 Kbytes) # # uBoot firmware variables: # bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init # mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART) # 64KiB u-boot hint.map.0.at="flash/spi0" hint.map.0.start=0x00000000 -hint.map.0.end= 0x00010000 +hint.map.0.end=0x00010000 hint.map.0.name="u-boot" hint.map.0.readonly=1 # 64KiB u-boot-env hint.map.1.at="flash/spi0" hint.map.1.start=0x00010000 -hint.map.1.end= 0x00020000 +hint.map.1.end=0x00020000 hint.map.1.name="u-boot-env" hint.map.1.readonly=1 # 1344KiB kernel hint.map.2.at="flash/spi0" hint.map.2.start=0x00020000 -hint.map.2.end="search:0x00100000:0x10000:.!/bin/sh" +hint.map.2.end="search:0x00020000:0x10000:.!/bin/sh" hint.map.2.name="kernel" hint.map.2.readonly=1 # 14592KiB rootfs hint.map.3.at="flash/spi0" -hint.map.3.start="search:0x00100000:0x10000:.!/bin/sh" +hint.map.3.start="search:0x00020000:0x10000:.!/bin/sh" hint.map.3.end=0x00fb0000 hint.map.3.name="rootfs" hint.map.3.readonly=1 # 192KiB lang -- remapped to cfg hint.map.4.at="flash/spi0" hint.map.4.start=0x00fb0000 -hint.map.4.end= 0x00fe0000 +hint.map.4.end=0x00fe0000 hint.map.4.name="cfg" hint.map.4.readonly=0 # 64KiB mac hint.map.5.at="flash/spi0" hint.map.5.start=0x00fe0000 -hint.map.5.end= 0x00ff0000 +hint.map.5.end=0x00ff0000 hint.map.5.name="mac" hint.map.5.readonly=1 # 64KiB art hint.map.6.at="flash/spi0" hint.map.6.start=0x00ff0000 -hint.map.6.end= 0x01000000 +hint.map.6.end=0x01000000 hint.map.6.name="art" hint.map.6.readonly=1