Index: head/sys/arm/arm/bus_space-v6.c =================================================================== --- head/sys/arm/arm/bus_space-v6.c (revision 277466) +++ head/sys/arm/arm/bus_space-v6.c (revision 277467) @@ -1,163 +1,162 @@ /*- * Copyright (C) 2008 MARVELL INTERNATIONAL LTD. * All rights reserved. * * Developed by Semihalf. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of MARVELL nor the names of contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include /* Prototypes for all the bus_space structure functions */ bs_protos(generic); -bs_protos(generic_armv4); static void bs_unimplemented(void) { panic("unimplemented bus_space function called"); } #define BS_UNIMPLEMENTED (void *)bs_unimplemented /* * The bus space tag. This is constant for all instances, so * we never have to explicitly "create" it. */ static struct bus_space _base_tag = { /* privdata is whatever the implementer wants; unused in base tag */ .bs_privdata = NULL, /* mapping/unmapping */ .bs_map = generic_bs_map, .bs_unmap = generic_bs_unmap, .bs_subregion = generic_bs_subregion, /* allocation/deallocation */ .bs_alloc = generic_bs_alloc, .bs_free = generic_bs_free, /* barrier */ .bs_barrier = generic_bs_barrier, /* read (single) */ .bs_r_1 = NULL, /* Use inline code in bus.h */ .bs_r_2 = NULL, /* Use inline code in bus.h */ .bs_r_4 = NULL, /* Use inline code in bus.h */ .bs_r_8 = NULL, /* Use inline code in bus.h */ /* read multiple */ .bs_rm_1 = generic_bs_rm_1, - .bs_rm_2 = generic_armv4_bs_rm_2, + .bs_rm_2 = generic_bs_rm_2, .bs_rm_4 = generic_bs_rm_4, .bs_rm_8 = BS_UNIMPLEMENTED, /* read region */ .bs_rr_1 = generic_bs_rr_1, - .bs_rr_2 = generic_armv4_bs_rr_2, + .bs_rr_2 = generic_bs_rr_2, .bs_rr_4 = generic_bs_rr_4, .bs_rr_8 = BS_UNIMPLEMENTED, /* write (single) */ .bs_w_1 = NULL, /* Use inline code in bus.h */ .bs_w_2 = NULL, /* Use inline code in bus.h */ .bs_w_4 = NULL, /* Use inline code in bus.h */ .bs_w_8 = NULL, /* Use inline code in bus.h */ /* write multiple */ .bs_wm_1 = generic_bs_wm_1, - .bs_wm_2 = generic_armv4_bs_wm_2, + .bs_wm_2 = generic_bs_wm_2, .bs_wm_4 = generic_bs_wm_4, .bs_wm_8 = BS_UNIMPLEMENTED, /* write region */ .bs_wr_1 = generic_bs_wr_1, - .bs_wr_2 = generic_armv4_bs_wr_2, + .bs_wr_2 = generic_bs_wr_2, .bs_wr_4 = generic_bs_wr_4, .bs_wr_8 = BS_UNIMPLEMENTED, /* set multiple */ .bs_sm_1 = BS_UNIMPLEMENTED, .bs_sm_2 = BS_UNIMPLEMENTED, .bs_sm_4 = BS_UNIMPLEMENTED, .bs_sm_8 = BS_UNIMPLEMENTED, /* set region */ .bs_sr_1 = generic_bs_sr_1, - .bs_sr_2 = generic_armv4_bs_sr_2, + .bs_sr_2 = generic_bs_sr_2, .bs_sr_4 = generic_bs_sr_4, .bs_sr_8 = BS_UNIMPLEMENTED, /* copy */ .bs_c_1 = BS_UNIMPLEMENTED, - .bs_c_2 = generic_armv4_bs_c_2, + .bs_c_2 = generic_bs_c_2, .bs_c_4 = BS_UNIMPLEMENTED, .bs_c_8 = BS_UNIMPLEMENTED, /* read stream (single) */ .bs_r_1_s = NULL, /* Use inline code in bus.h */ .bs_r_2_s = NULL, /* Use inline code in bus.h */ .bs_r_4_s = NULL, /* Use inline code in bus.h */ .bs_r_8_s = NULL, /* Use inline code in bus.h */ /* read multiple stream */ .bs_rm_1_s = generic_bs_rm_1, - .bs_rm_2_s = generic_armv4_bs_rm_2, + .bs_rm_2_s = generic_bs_rm_2, .bs_rm_4_s = generic_bs_rm_4, .bs_rm_8_s = BS_UNIMPLEMENTED, /* read region stream */ .bs_rr_1_s = generic_bs_rr_1, - .bs_rr_2_s = generic_armv4_bs_rr_2, + .bs_rr_2_s = generic_bs_rr_2, .bs_rr_4_s = generic_bs_rr_4, .bs_rr_8_s = BS_UNIMPLEMENTED, /* write stream (single) */ .bs_w_1_s = NULL, /* Use inline code in bus.h */ .bs_w_2_s = NULL, /* Use inline code in bus.h */ .bs_w_4_s = NULL, /* Use inline code in bus.h */ .bs_w_8_s = NULL, /* Use inline code in bus.h */ /* write multiple stream */ .bs_wm_1_s = generic_bs_wm_1, - .bs_wm_2_s = generic_armv4_bs_wm_2, + .bs_wm_2_s = generic_bs_wm_2, .bs_wm_4_s = generic_bs_wm_4, .bs_wm_8_s = BS_UNIMPLEMENTED, /* write region stream */ .bs_wr_1_s = generic_bs_wr_1, - .bs_wr_2_s = generic_armv4_bs_wr_2, + .bs_wr_2_s = generic_bs_wr_2, .bs_wr_4_s = generic_bs_wr_4, .bs_wr_8_s = BS_UNIMPLEMENTED, }; bus_space_tag_t fdtbus_bs_tag = &_base_tag; Index: head/sys/arm/arm/bus_space_asm_generic.S =================================================================== --- head/sys/arm/arm/bus_space_asm_generic.S (revision 277466) +++ head/sys/arm/arm/bus_space_asm_generic.S (revision 277467) @@ -1,360 +1,360 @@ /* $NetBSD: bus_space_asm_generic.S,v 1.3 2003/03/27 19:46:14 mycroft Exp $ */ /*- * Copyright (c) 1997 Causality Limited. * Copyright (c) 1997 Mark Brinicombe. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Mark Brinicombe * for the NetBSD Project. * 4. The name of the company nor the name of the author may be used to * endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * */ #include #include __FBSDID("$FreeBSD$"); /* * Generic bus_space functions. */ /* * read single */ ENTRY(generic_bs_r_1) ldrb r0, [r1, r2] RET END(generic_bs_r_1) -ENTRY(generic_armv4_bs_r_2) +ENTRY(generic_bs_r_2) ldrh r0, [r1, r2] RET -END(generic_armv4_bs_r_2) +END(generic_bs_r_2) ENTRY(generic_bs_r_4) ldr r0, [r1, r2] RET END(generic_bs_r_4) /* * write single */ ENTRY(generic_bs_w_1) strb r3, [r1, r2] RET END(generic_bs_w_1) -ENTRY(generic_armv4_bs_w_2) +ENTRY(generic_bs_w_2) strh r3, [r1, r2] RET -END(generic_armv4_bs_w_2) +END(generic_bs_w_2) ENTRY(generic_bs_w_4) str r3, [r1, r2] RET END(generic_bs_w_4) /* * read multiple */ ENTRY(generic_bs_rm_1) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: ldrb r3, [r0] strb r3, [r1], #1 subs r2, r2, #1 bne 1b RET END(generic_bs_rm_1) -ENTRY(generic_armv4_bs_rm_2) +ENTRY(generic_bs_rm_2) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: ldrh r3, [r0] strh r3, [r1], #2 subs r2, r2, #1 bne 1b RET -END(generic_armv4_bs_rm_2) +END(generic_bs_rm_2) ENTRY(generic_bs_rm_4) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: ldr r3, [r0] str r3, [r1], #4 subs r2, r2, #1 bne 1b RET END(generic_bs_rm_4) /* * write multiple */ ENTRY(generic_bs_wm_1) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: ldrb r3, [r1], #1 strb r3, [r0] subs r2, r2, #1 bne 1b RET END(generic_bs_wm_1) -ENTRY(generic_armv4_bs_wm_2) +ENTRY(generic_bs_wm_2) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: ldrh r3, [r1], #2 strh r3, [r0] subs r2, r2, #1 bne 1b RET -END(generic_armv4_bs_wm_2) +END(generic_bs_wm_2) ENTRY(generic_bs_wm_4) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: ldr r3, [r1], #4 str r3, [r0] subs r2, r2, #1 bne 1b RET END(generic_bs_wm_4) /* * read region */ ENTRY(generic_bs_rr_1) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: ldrb r3, [r0], #1 strb r3, [r1], #1 subs r2, r2, #1 bne 1b RET END(generic_bs_rr_1) -ENTRY(generic_armv4_bs_rr_2) +ENTRY(generic_bs_rr_2) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: ldrh r3, [r0], #2 strh r3, [r1], #2 subs r2, r2, #1 bne 1b RET -END(generic_armv4_bs_rr_2) +END(generic_bs_rr_2) ENTRY(generic_bs_rr_4) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: ldr r3, [r0], #4 str r3, [r1], #4 subs r2, r2, #1 bne 1b RET END(generic_bs_rr_4) /* * write region. */ ENTRY(generic_bs_wr_1) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: ldrb r3, [r1], #1 strb r3, [r0], #1 subs r2, r2, #1 bne 1b RET END(generic_bs_wr_1) -ENTRY(generic_armv4_bs_wr_2) +ENTRY(generic_bs_wr_2) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: ldrh r3, [r1], #2 strh r3, [r0], #2 subs r2, r2, #1 bne 1b RET -END(generic_armv4_bs_wr_2) +END(generic_bs_wr_2) ENTRY(generic_bs_wr_4) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: ldr r3, [r1], #4 str r3, [r0], #4 subs r2, r2, #1 bne 1b RET END(generic_bs_wr_4) /* * set region */ ENTRY(generic_bs_sr_1) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: strb r1, [r0], #1 subs r2, r2, #1 bne 1b RET END(generic_bs_sr_1) -ENTRY(generic_armv4_bs_sr_2) +ENTRY(generic_bs_sr_2) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: strh r1, [r0], #2 subs r2, r2, #1 bne 1b RET -END(generic_armv4_bs_sr_2) +END(generic_bs_sr_2) ENTRY(generic_bs_sr_4) add r0, r1, r2 mov r1, r3 ldr r2, [sp, #0] teq r2, #0 RETeq 1: str r1, [r0], #4 subs r2, r2, #1 bne 1b RET END(generic_bs_sr_4) /* * copy region */ -ENTRY(generic_armv4_bs_c_2) +ENTRY(generic_bs_c_2) add r0, r1, r2 ldr r2, [sp, #0] add r1, r2, r3 ldr r2, [sp, #4] teq r2, #0 RETeq cmp r0, r1 blt 2f 1: ldrh r3, [r0], #2 strh r3, [r1], #2 subs r2, r2, #1 bne 1b RET 2: add r0, r0, r2, lsl #1 add r1, r1, r2, lsl #1 sub r0, r0, #2 sub r1, r1, #2 3: ldrh r3, [r0], #-2 strh r3, [r1], #-2 subs r2, r2, #1 bne 3b RET -END(generic_armv4_bs_c_2) +END(generic_bs_c_2) Index: head/sys/arm/at91/at91.c =================================================================== --- head/sys/arm/at91/at91.c (revision 277466) +++ head/sys/arm/at91/at91.c (revision 277467) @@ -1,529 +1,528 @@ /*- * Copyright (c) 2005 Olivier Houchard. All rights reserved. * Copyright (c) 2010 Greg Ansley. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include "opt_platform.h" #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #define _ARM32_BUS_DMA_PRIVATE #include #include #include #include #include #include uint32_t at91_master_clock; static int at91_bs_map(bus_space_tag_t tag, bus_addr_t bpa, bus_size_t size, int flags, bus_space_handle_t *bshp) { vm_paddr_t pa, endpa; pa = trunc_page(bpa); if (pa >= AT91_PA_BASE + 0xff00000) { *bshp = bpa - AT91_PA_BASE + AT91_BASE; return (0); } if (pa >= AT91_BASE + 0xff00000) { *bshp = bpa; return (0); } endpa = round_page(bpa + size); *bshp = (vm_offset_t)pmap_mapdev(pa, endpa - pa) + (bpa - pa); return (0); } static void at91_bs_unmap(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t size) { vm_offset_t va; va = (vm_offset_t)h; if (va >= AT91_BASE && va <= AT91_BASE + 0xff00000) return; pmap_unmapdev(va, size); } static int at91_bs_subregion(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp) { *nbshp = bsh + offset; return (0); } static void at91_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t size, bus_size_t b, int a) { } struct arm32_dma_range * bus_dma_get_range(void) { return (NULL); } int bus_dma_get_range_nb(void) { return (0); } bs_protos(generic); -bs_protos(generic_armv4); struct bus_space at91_bs_tag = { /* cookie */ (void *) 0, /* mapping/unmapping */ at91_bs_map, at91_bs_unmap, at91_bs_subregion, /* allocation/deallocation */ NULL, NULL, /* barrier */ at91_barrier, /* read (single) */ generic_bs_r_1, - generic_armv4_bs_r_2, + generic_bs_r_2, generic_bs_r_4, NULL, /* read multiple */ generic_bs_rm_1, - generic_armv4_bs_rm_2, + generic_bs_rm_2, generic_bs_rm_4, NULL, /* read region */ generic_bs_rr_1, - generic_armv4_bs_rr_2, + generic_bs_rr_2, generic_bs_rr_4, NULL, /* write (single) */ generic_bs_w_1, - generic_armv4_bs_w_2, + generic_bs_w_2, generic_bs_w_4, NULL, /* write multiple */ generic_bs_wm_1, - generic_armv4_bs_wm_2, + generic_bs_wm_2, generic_bs_wm_4, NULL, /* write region */ NULL, - generic_armv4_bs_wr_2, + generic_bs_wr_2, generic_bs_wr_4, NULL, /* set multiple */ NULL, NULL, NULL, NULL, /* set region */ NULL, - generic_armv4_bs_sr_2, + generic_bs_sr_2, generic_bs_sr_4, NULL, /* copy */ NULL, - generic_armv4_bs_c_2, + generic_bs_c_2, NULL, NULL, /* read (single) stream */ generic_bs_r_1, - generic_armv4_bs_r_2, + generic_bs_r_2, generic_bs_r_4, NULL, /* read multiple stream */ generic_bs_rm_1, - generic_armv4_bs_rm_2, + generic_bs_rm_2, generic_bs_rm_4, NULL, /* read region stream */ generic_bs_rr_1, - generic_armv4_bs_rr_2, + generic_bs_rr_2, generic_bs_rr_4, NULL, /* write (single) stream */ generic_bs_w_1, - generic_armv4_bs_w_2, + generic_bs_w_2, generic_bs_w_4, NULL, /* write multiple stream */ generic_bs_wm_1, - generic_armv4_bs_wm_2, + generic_bs_wm_2, generic_bs_wm_4, NULL, /* write region stream */ NULL, - generic_armv4_bs_wr_2, + generic_bs_wr_2, generic_bs_wr_4, NULL, }; #ifndef FDT static struct at91_softc *at91_softc; static void at91_eoi(void *); static int at91_probe(device_t dev) { device_set_desc(dev, soc_info.name); return (BUS_PROBE_NOWILDCARD); } static void at91_identify(driver_t *drv, device_t parent) { BUS_ADD_CHILD(parent, 0, "atmelarm", 0); } static void at91_cpu_add_builtin_children(device_t dev, const struct cpu_devs *walker) { int i; for (i = 0; walker->name; i++, walker++) { at91_add_child(dev, i, walker->name, walker->unit, walker->mem_base, walker->mem_len, walker->irq0, walker->irq1, walker->irq2); } } static int at91_attach(device_t dev) { struct at91_softc *sc = device_get_softc(dev); arm_post_filter = at91_eoi; at91_softc = sc; sc->sc_st = &at91_bs_tag; sc->sc_sh = AT91_BASE; sc->sc_aic_sh = AT91_BASE + AT91_SYS_BASE; sc->dev = dev; sc->sc_irq_rman.rm_type = RMAN_ARRAY; sc->sc_irq_rman.rm_descr = "AT91 IRQs"; if (rman_init(&sc->sc_irq_rman) != 0 || rman_manage_region(&sc->sc_irq_rman, 1, 31) != 0) panic("at91_attach: failed to set up IRQ rman"); sc->sc_mem_rman.rm_type = RMAN_ARRAY; sc->sc_mem_rman.rm_descr = "AT91 Memory"; if (rman_init(&sc->sc_mem_rman) != 0) panic("at91_attach: failed to set up memory rman"); /* * Manage the physical space, defined as being everything that isn't * DRAM. */ if (rman_manage_region(&sc->sc_mem_rman, 0, PHYSADDR - 1) != 0) panic("at91_attach: failed to set up memory rman"); if (rman_manage_region(&sc->sc_mem_rman, PHYSADDR + (256 << 20), 0xfffffffful) != 0) panic("at91_attach: failed to set up memory rman"); /* * Add this device's children... */ at91_cpu_add_builtin_children(dev, soc_info.soc_data->soc_children); soc_info.soc_data->soc_clock_init(); bus_generic_probe(dev); bus_generic_attach(dev); enable_interrupts(PSR_I | PSR_F); return (0); } static struct resource * at91_alloc_resource(device_t dev, device_t child, int type, int *rid, u_long start, u_long end, u_long count, u_int flags) { struct at91_softc *sc = device_get_softc(dev); struct resource_list_entry *rle; struct at91_ivar *ivar = device_get_ivars(child); struct resource_list *rl = &ivar->resources; bus_space_handle_t bsh; if (device_get_parent(child) != dev) return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child, type, rid, start, end, count, flags)); rle = resource_list_find(rl, type, *rid); if (rle == NULL) return (NULL); if (rle->res) panic("Resource rid %d type %d already in use", *rid, type); if (start == 0UL && end == ~0UL) { start = rle->start; count = ulmax(count, rle->count); end = ulmax(rle->end, start + count - 1); } switch (type) { case SYS_RES_IRQ: rle->res = rman_reserve_resource(&sc->sc_irq_rman, start, end, count, flags, child); break; case SYS_RES_MEMORY: rle->res = rman_reserve_resource(&sc->sc_mem_rman, start, end, count, flags, child); if (rle->res != NULL) { bus_space_map(&at91_bs_tag, start, rman_get_size(rle->res), 0, &bsh); rman_set_bustag(rle->res, &at91_bs_tag); rman_set_bushandle(rle->res, bsh); } break; } if (rle->res) { rle->start = rman_get_start(rle->res); rle->end = rman_get_end(rle->res); rle->count = count; rman_set_rid(rle->res, *rid); } return (rle->res); } static struct resource_list * at91_get_resource_list(device_t dev, device_t child) { struct at91_ivar *ivar; ivar = device_get_ivars(child); return (&(ivar->resources)); } static int at91_release_resource(device_t dev, device_t child, int type, int rid, struct resource *r) { struct resource_list *rl; struct resource_list_entry *rle; rl = at91_get_resource_list(dev, child); if (rl == NULL) return (EINVAL); rle = resource_list_find(rl, type, rid); if (rle == NULL) return (EINVAL); rman_release_resource(r); rle->res = NULL; return (0); } static int at91_setup_intr(device_t dev, device_t child, struct resource *ires, int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep) { int error; if (rman_get_start(ires) == AT91_IRQ_SYSTEM && filt == NULL) panic("All system interrupt ISRs must be FILTER"); error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, filt, intr, arg, cookiep); if (error) return (error); return (0); } static int at91_teardown_intr(device_t dev, device_t child, struct resource *res, void *cookie) { struct at91_softc *sc = device_get_softc(dev); bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IDCR, 1 << rman_get_start(res)); return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie)); } static int at91_activate_resource(device_t bus, device_t child, int type, int rid, struct resource *r) { #if 0 u_long p; int error; if (type == SYS_RES_MEMORY) { error = bus_space_map(rman_get_bustag(r), rman_get_bushandle(r), rman_get_size(r), 0, &p); if (error) return (error); rman_set_bushandle(r, p); } #endif return (rman_activate_resource(r)); } static int at91_print_child(device_t dev, device_t child) { struct at91_ivar *ivars; struct resource_list *rl; int retval = 0; ivars = device_get_ivars(child); rl = &ivars->resources; retval += bus_print_child_header(dev, child); retval += resource_list_print_type(rl, "port", SYS_RES_IOPORT, "%#lx"); retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); if (device_get_flags(dev)) retval += printf(" flags %#x", device_get_flags(dev)); retval += bus_print_child_footer(dev, child); return (retval); } static void at91_eoi(void *unused) { bus_space_write_4(at91_softc->sc_st, at91_softc->sc_aic_sh, IC_EOICR, 0); } void at91_add_child(device_t dev, int prio, const char *name, int unit, bus_addr_t addr, bus_size_t size, int irq0, int irq1, int irq2) { device_t kid; struct at91_ivar *ivar; kid = device_add_child_ordered(dev, prio, name, unit); if (kid == NULL) { printf("Can't add child %s%d ordered\n", name, unit); return; } ivar = malloc(sizeof(*ivar), M_DEVBUF, M_NOWAIT | M_ZERO); if (ivar == NULL) { device_delete_child(dev, kid); printf("Can't add alloc ivar\n"); return; } device_set_ivars(kid, ivar); resource_list_init(&ivar->resources); if (irq0 != -1) { bus_set_resource(kid, SYS_RES_IRQ, 0, irq0, 1); if (irq0 != AT91_IRQ_SYSTEM) at91_pmc_clock_add(device_get_nameunit(kid), irq0, 0); } if (irq1 != 0) bus_set_resource(kid, SYS_RES_IRQ, 1, irq1, 1); if (irq2 != 0) bus_set_resource(kid, SYS_RES_IRQ, 2, irq2, 1); /* * Special case for on-board devices. These have their address * defined relative to AT91_PA_BASE in all the register files we * have. We could change this, but that's a lot of effort which * will be obsoleted when FDT arrives. */ if (addr != 0 && addr < 0x10000000 && addr >= 0x0f000000) addr += AT91_PA_BASE; if (addr != 0) bus_set_resource(kid, SYS_RES_MEMORY, 0, addr, size); } static device_method_t at91_methods[] = { DEVMETHOD(device_probe, at91_probe), DEVMETHOD(device_attach, at91_attach), DEVMETHOD(device_identify, at91_identify), DEVMETHOD(bus_alloc_resource, at91_alloc_resource), DEVMETHOD(bus_setup_intr, at91_setup_intr), DEVMETHOD(bus_teardown_intr, at91_teardown_intr), DEVMETHOD(bus_activate_resource, at91_activate_resource), DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), DEVMETHOD(bus_get_resource_list,at91_get_resource_list), DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), DEVMETHOD(bus_release_resource, at91_release_resource), DEVMETHOD(bus_print_child, at91_print_child), {0, 0}, }; static driver_t at91_driver = { "atmelarm", at91_methods, sizeof(struct at91_softc), }; static devclass_t at91_devclass; DRIVER_MODULE(atmelarm, nexus, at91_driver, at91_devclass, 0, 0); #endif Index: head/sys/arm/cavium/cns11xx/econa.c =================================================================== --- head/sys/arm/cavium/cns11xx/econa.c (revision 277466) +++ head/sys/arm/cavium/cns11xx/econa.c (revision 277467) @@ -1,760 +1,759 @@ /*- * Copyright (c) 2009 Yohanes Nugroho * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #define _ARM32_BUS_DMA_PRIVATE #include #include #include #include #include "econa_reg.h" #include "econa_var.h" static struct econa_softc *econa_softc; unsigned int CPU_clock = 200000000; unsigned int AHB_clock; unsigned int APB_clock; bs_protos(generic); -bs_protos(generic_armv4); struct bus_space econa_bs_tag = { /* cookie */ (void *) 0, /* mapping/unmapping */ generic_bs_map, generic_bs_unmap, generic_bs_subregion, /* allocation/deallocation */ generic_bs_alloc, generic_bs_free, /* barrier */ generic_bs_barrier, /* read (single) */ generic_bs_r_1, - generic_armv4_bs_r_2, + generic_bs_r_2, generic_bs_r_4, NULL, /* read multiple */ generic_bs_rm_1, - generic_armv4_bs_rm_2, + generic_bs_rm_2, generic_bs_rm_4, NULL, /* read region */ generic_bs_rr_1, - generic_armv4_bs_rr_2, + generic_bs_rr_2, generic_bs_rr_4, NULL, /* write (single) */ generic_bs_w_1, - generic_armv4_bs_w_2, + generic_bs_w_2, generic_bs_w_4, NULL, /* write multiple */ generic_bs_wm_1, - generic_armv4_bs_wm_2, + generic_bs_wm_2, generic_bs_wm_4, NULL, /* write region */ NULL, NULL, NULL, NULL, /* set multiple */ NULL, NULL, NULL, NULL, /* set region */ NULL, NULL, NULL, NULL, /* copy */ NULL, NULL, NULL, NULL, /* read (single) stream */ NULL, NULL, NULL, NULL, /* read multiple stream */ NULL, - generic_armv4_bs_rm_2, + generic_bs_rm_2, NULL, NULL, /* read region stream */ NULL, NULL, NULL, NULL, /* write (single) stream */ NULL, NULL, NULL, NULL, /* write multiple stream */ NULL, - generic_armv4_bs_wm_2, + generic_bs_wm_2, NULL, NULL, /* write region stream */ NULL, NULL, NULL, NULL }; bus_space_tag_t obio_tag = &econa_bs_tag; static int econa_probe(device_t dev) { device_set_desc(dev, "ECONA device bus"); return (BUS_PROBE_NOWILDCARD); } static void econa_identify(driver_t *drv, device_t parent) { BUS_ADD_CHILD(parent, 0, "econaarm", 0); } struct arm32_dma_range * bus_dma_get_range(void) { return (NULL); } int bus_dma_get_range_nb(void) { return (0); } extern void irq_entry(void); static void econa_add_child(device_t dev, int prio, const char *name, int unit, bus_addr_t addr, bus_size_t size, int irq0, int irq1, int irq2, int irq3, int irq4) { device_t kid; struct econa_ivar *ivar; kid = device_add_child_ordered(dev, prio, name, unit); if (kid == NULL) { printf("Can't add child %s%d ordered\n", name, unit); return; } ivar = malloc(sizeof(*ivar), M_DEVBUF, M_NOWAIT | M_ZERO); if (ivar == NULL) { device_delete_child(dev, kid); return; } device_set_ivars(kid, ivar); resource_list_init(&ivar->resources); if (irq0 != -1) bus_set_resource(kid, SYS_RES_IRQ, 0, irq0, 1); if (irq1 != 0) bus_set_resource(kid, SYS_RES_IRQ, 1, irq1, 1); if (irq2 != 0) bus_set_resource(kid, SYS_RES_IRQ, 2, irq2, 1); if (irq3 != 0) bus_set_resource(kid, SYS_RES_IRQ, 3, irq3, 1); if (irq4 != 0) bus_set_resource(kid, SYS_RES_IRQ, 4, irq4, 1); if (addr != 0) bus_set_resource(kid, SYS_RES_MEMORY, 0, addr, size); } struct cpu_devs { const char *name; int unit; bus_addr_t mem_base; bus_size_t mem_len; int irq0; int irq1; int irq2; int irq3; int irq4; }; struct cpu_devs econarm_devs[] = { { "econa_ic", 0, ECONA_IO_BASE + ECONA_PIC_BASE, ECONA_PIC_SIZE, 0 }, { "system", 0, ECONA_IO_BASE + ECONA_SYSTEM_BASE, ECONA_SYSTEM_SIZE, 0 }, { "uart", 0, ECONA_IO_BASE + ECONA_UART_BASE, ECONA_UART_SIZE, ECONA_IRQ_UART }, { "timer", 0, ECONA_IO_BASE + ECONA_TIMER_BASE, ECONA_TIMER_SIZE, ECONA_IRQ_TIMER_1, ECONA_IRQ_TIMER_2 }, { "ohci", 0, ECONA_OHCI_VBASE, ECONA_OHCI_SIZE, ECONA_IRQ_OHCI }, { "ehci", 0, ECONA_EHCI_VBASE, ECONA_EHCI_SIZE, ECONA_IRQ_EHCI }, { "cfi", 0, ECONA_CFI_VBASE, ECONA_CFI_SIZE, 0 }, { "ece", 0, ECONA_IO_BASE + ECONA_NET_BASE, ECONA_NET_SIZE, ECONA_IRQ_STATUS, ECONA_IRQ_TSTC, ECONA_IRQ_FSRC, ECONA_IRQ_TSQE, ECONA_IRQ_FSQF, }, { 0, 0, 0, 0, 0, 0, 0, 0, 0 } }; static void econa_cpu_add_builtin_children(device_t dev, struct econa_softc *sc) { int i; struct cpu_devs *walker; for (i = 0, walker = econarm_devs; walker->name; i++, walker++) { econa_add_child(dev, i, walker->name, walker->unit, walker->mem_base, walker->mem_len, walker->irq0,walker->irq1, walker->irq2, walker->irq3, walker->irq4); } } struct intc_trigger_t { int mode; int level; }; static struct intc_trigger_t intc_trigger_table[] = { {INTC_EDGE_TRIGGER, INTC_RISING_EDGE}, {INTC_EDGE_TRIGGER, INTC_RISING_EDGE}, {INTC_EDGE_TRIGGER, INTC_FALLING_EDGE}, {INTC_EDGE_TRIGGER, INTC_RISING_EDGE}, {INTC_TRIGGER_UNKNOWN, INTC_TRIGGER_UNKNOWN}, {INTC_LEVEL_TRIGGER, INTC_ACTIVE_LOW}, {INTC_LEVEL_TRIGGER, INTC_ACTIVE_LOW}, {INTC_LEVEL_TRIGGER, INTC_ACTIVE_HIGH}, {INTC_TRIGGER_UNKNOWN, INTC_TRIGGER_UNKNOWN}, {INTC_LEVEL_TRIGGER, INTC_ACTIVE_HIGH}, {INTC_LEVEL_TRIGGER, INTC_ACTIVE_HIGH}, {INTC_LEVEL_TRIGGER, INTC_ACTIVE_HIGH}, {INTC_LEVEL_TRIGGER, INTC_ACTIVE_HIGH}, {INTC_TRIGGER_UNKNOWN, INTC_TRIGGER_UNKNOWN}, {INTC_LEVEL_TRIGGER, INTC_ACTIVE_HIGH}, {INTC_EDGE_TRIGGER, INTC_FALLING_EDGE}, {INTC_TRIGGER_UNKNOWN, INTC_TRIGGER_UNKNOWN}, {INTC_TRIGGER_UNKNOWN, INTC_TRIGGER_UNKNOWN}, {INTC_LEVEL_TRIGGER, INTC_ACTIVE_HIGH}, {INTC_EDGE_TRIGGER, INTC_RISING_EDGE}, {INTC_EDGE_TRIGGER, INTC_RISING_EDGE}, {INTC_EDGE_TRIGGER, INTC_RISING_EDGE}, {INTC_EDGE_TRIGGER, INTC_RISING_EDGE}, {INTC_LEVEL_TRIGGER, INTC_ACTIVE_LOW}, {INTC_LEVEL_TRIGGER, INTC_ACTIVE_LOW}, }; static inline uint32_t read_4(struct econa_softc *sc, bus_size_t off) { return bus_space_read_4(sc->ec_st, sc->ec_sys_sh, off); } static inline void write_4(struct econa_softc *sc, bus_size_t off, uint32_t val) { return bus_space_write_4(sc->ec_st, sc->ec_sys_sh, off, val); } static inline uint32_t system_read_4(struct econa_softc *sc, bus_size_t off) { return bus_space_read_4(sc->ec_st, sc->ec_system_sh, off); } static inline void system_write_4(struct econa_softc *sc, bus_size_t off, uint32_t val) { return bus_space_write_4(sc->ec_st, sc->ec_system_sh, off, val); } static inline void econa_set_irq_mode(struct econa_softc * sc, unsigned int irq, unsigned int mode) { unsigned int val; if ((mode != INTC_LEVEL_TRIGGER) && (mode != INTC_EDGE_TRIGGER)) return; val = read_4(sc, INTC_INTERRUPT_TRIGGER_MODE_REG_OFFSET); if (mode == INTC_LEVEL_TRIGGER) { if (val & (1UL << irq)) { val &= ~(1UL << irq); write_4(sc, INTC_INTERRUPT_TRIGGER_MODE_REG_OFFSET, val); } } else { if (!(val & (1UL << irq))) { val |= (1UL << irq); write_4(sc, INTC_INTERRUPT_TRIGGER_MODE_REG_OFFSET, val); } } } /* * Configure interrupt trigger level to be Active High/Low * or Rising/Falling Edge */ static inline void econa_set_irq_level(struct econa_softc * sc, unsigned int irq, unsigned int level) { unsigned int val; if ((level != INTC_ACTIVE_HIGH) && (level != INTC_ACTIVE_LOW) && (level != INTC_RISING_EDGE) && (level != INTC_FALLING_EDGE)) { return; } val = read_4(sc, INTC_INTERRUPT_TRIGGER_LEVEL_REG_OFFSET); if ((level == INTC_ACTIVE_HIGH) || (level == INTC_RISING_EDGE)) { if (val & (1UL << irq)) { val &= ~(1UL << irq); write_4(sc, INTC_INTERRUPT_TRIGGER_LEVEL_REG_OFFSET, val); } } else { if (!(val & (1UL << irq))) { val |= (1UL << irq); write_4(sc, INTC_INTERRUPT_TRIGGER_LEVEL_REG_OFFSET, val); } } } static void get_system_clock(void) { uint32_t sclock = system_read_4(econa_softc, SYSTEM_CLOCK); sclock = (sclock >> 6) & 0x03; switch (sclock) { case 0: CPU_clock = 175000000; break; case 1: CPU_clock = 200000000; break; case 2: CPU_clock = 225000000; break; case 3: CPU_clock = 250000000; break; } AHB_clock = CPU_clock >> 1; APB_clock = AHB_clock >> 1; } static int econa_attach(device_t dev) { struct econa_softc *sc = device_get_softc(dev); int i; econa_softc = sc; sc->ec_st = &econa_bs_tag; sc->ec_sh = ECONA_IO_BASE; sc->dev = dev; if (bus_space_subregion(sc->ec_st, sc->ec_sh, ECONA_PIC_BASE, ECONA_PIC_SIZE, &sc->ec_sys_sh) != 0) panic("Unable to map IRQ registers"); if (bus_space_subregion(sc->ec_st, sc->ec_sh, ECONA_SYSTEM_BASE, ECONA_SYSTEM_SIZE, &sc->ec_system_sh) != 0) panic("Unable to map IRQ registers"); sc->ec_irq_rman.rm_type = RMAN_ARRAY; sc->ec_irq_rman.rm_descr = "ECONA IRQs"; sc->ec_mem_rman.rm_type = RMAN_ARRAY; sc->ec_mem_rman.rm_descr = "ECONA Memory"; if (rman_init(&sc->ec_irq_rman) != 0 || rman_manage_region(&sc->ec_irq_rman, 0, 31) != 0) panic("econa_attach: failed to set up IRQ rman"); if (rman_init(&sc->ec_mem_rman) != 0 || rman_manage_region(&sc->ec_mem_rman, 0, ~0) != 0) panic("econa_attach: failed to set up memory rman"); write_4(sc, INTC_INTERRUPT_CLEAR_EDGE_TRIGGER_REG_OFFSET, 0xffffffff); write_4(sc, INTC_INTERRUPT_MASK_REG_OFFSET, 0xffffffff); write_4(sc, INTC_FIQ_MODE_SELECT_REG_OFFSET, 0); /*initialize irq*/ for (i = 0; i < 32; i++) { if (intc_trigger_table[i].mode != INTC_TRIGGER_UNKNOWN) { econa_set_irq_mode(sc,i, intc_trigger_table[i].mode); econa_set_irq_level(sc, i, intc_trigger_table[i].level); } } get_system_clock(); econa_cpu_add_builtin_children(dev, sc); bus_generic_probe(dev); bus_generic_attach(dev); enable_interrupts(PSR_I | PSR_F); return (0); } static struct resource * econa_alloc_resource(device_t dev, device_t child, int type, int *rid, u_long start, u_long end, u_long count, u_int flags) { struct econa_softc *sc = device_get_softc(dev); struct resource_list_entry *rle; struct econa_ivar *ivar = device_get_ivars(child); struct resource_list *rl = &ivar->resources; if (device_get_parent(child) != dev) return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child, type, rid, start, end, count, flags)); rle = resource_list_find(rl, type, *rid); if (rle == NULL) { return (NULL); } if (rle->res) panic("Resource rid %d type %d already in use", *rid, type); if (start == 0UL && end == ~0UL) { start = rle->start; count = ulmax(count, rle->count); end = ulmax(rle->end, start + count - 1); } switch (type) { case SYS_RES_IRQ: rle->res = rman_reserve_resource(&sc->ec_irq_rman, start, end, count, flags, child); break; case SYS_RES_MEMORY: rle->res = rman_reserve_resource(&sc->ec_mem_rman, start, end, count, flags, child); if (rle->res != NULL) { rman_set_bustag(rle->res, &econa_bs_tag); rman_set_bushandle(rle->res, start); } break; } if (rle->res) { rle->start = rman_get_start(rle->res); rle->end = rman_get_end(rle->res); rle->count = count; rman_set_rid(rle->res, *rid); } return (rle->res); } static struct resource_list * econa_get_resource_list(device_t dev, device_t child) { struct econa_ivar *ivar; ivar = device_get_ivars(child); return (&(ivar->resources)); } static int econa_release_resource(device_t dev, device_t child, int type, int rid, struct resource *r) { struct resource_list *rl; struct resource_list_entry *rle; rl = econa_get_resource_list(dev, child); if (rl == NULL) return (EINVAL); rle = resource_list_find(rl, type, rid); if (rle == NULL) return (EINVAL); rman_release_resource(r); rle->res = NULL; return (0); } static int econa_setup_intr(device_t dev, device_t child, struct resource *ires, int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep) { int error; if (rman_get_start(ires) == ECONA_IRQ_SYSTEM && filt == NULL) panic("All system interrupt ISRs must be FILTER"); error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, filt, intr, arg, cookiep); if (error) return (error); return (0); } static int econa_teardown_intr(device_t dev, device_t child, struct resource *res, void *cookie) { return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie)); } static int econa_activate_resource(device_t bus, device_t child, int type, int rid, struct resource *r) { return (rman_activate_resource(r)); } static int econa_print_child(device_t dev, device_t child) { struct econa_ivar *ivars; struct resource_list *rl; int retval = 0; ivars = device_get_ivars(child); rl = &ivars->resources; retval += bus_print_child_header(dev, child); retval += resource_list_print_type(rl, "port", SYS_RES_IOPORT, "%#lx"); retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); if (device_get_flags(dev)) retval += printf(" flags %#x", device_get_flags(dev)); retval += bus_print_child_footer(dev, child); return (retval); } void arm_mask_irq(uintptr_t nb) { unsigned int value; value = read_4(econa_softc,INTC_INTERRUPT_MASK_REG_OFFSET) | 1< __FBSDID("$FreeBSD$"); #include #include #include #include #include #include /* * Bus space functions for Marvell SoC family */ /* Prototypes for all the bus_space structure functions */ bs_protos(generic); -bs_protos(generic_armv4); /* * The bus space tag. This is constant for all instances, so * we never have to explicitly "create" it. */ static struct bus_space _base_tag = { /* cookie */ (void *) 0, /* mapping/unmapping */ generic_bs_map, generic_bs_unmap, generic_bs_subregion, /* allocation/deallocation */ generic_bs_alloc, generic_bs_free, /* barrier */ generic_bs_barrier, /* read (single) */ generic_bs_r_1, - generic_armv4_bs_r_2, + generic_bs_r_2, generic_bs_r_4, NULL, /* read multiple */ generic_bs_rm_1, - generic_armv4_bs_rm_2, + generic_bs_rm_2, generic_bs_rm_4, NULL, /* read region */ generic_bs_rr_1, - generic_armv4_bs_rr_2, + generic_bs_rr_2, generic_bs_rr_4, NULL, /* write (single) */ generic_bs_w_1, - generic_armv4_bs_w_2, + generic_bs_w_2, generic_bs_w_4, NULL, /* write multiple */ generic_bs_wm_1, - generic_armv4_bs_wm_2, + generic_bs_wm_2, generic_bs_wm_4, NULL, /* write region */ NULL, NULL, NULL, NULL, /* set multiple */ NULL, NULL, NULL, NULL, /* set region */ NULL, NULL, NULL, NULL, /* copy */ NULL, NULL, NULL, NULL, /* read stream (single) */ NULL, NULL, NULL, NULL, /* read multiple stream */ NULL, - generic_armv4_bs_rm_2, /* bus_space_read_multi_stream_2 */ + generic_bs_rm_2, /* bus_space_read_multi_stream_2 */ NULL, NULL, /* read region stream */ NULL, NULL, NULL, NULL, /* write stream (single) */ NULL, NULL, NULL, NULL, /* write multiple stream */ NULL, - generic_armv4_bs_wm_2, /* bus_space_write_multi_stream_2 */ + generic_bs_wm_2, /* bus_space_write_multi_stream_2 */ NULL, NULL, /* write region stream */ NULL, NULL, NULL, NULL }; bus_space_tag_t fdtbus_bs_tag = &_base_tag; Index: head/sys/arm/samsung/s3c2xx0/s3c2xx0_space.c =================================================================== --- head/sys/arm/samsung/s3c2xx0/s3c2xx0_space.c (revision 277466) +++ head/sys/arm/samsung/s3c2xx0/s3c2xx0_space.c (revision 277467) @@ -1,165 +1,164 @@ /* $NetBSD: s3c2xx0_space.c,v 1.7 2005/11/24 13:08:32 yamt Exp $ */ /* * Copyright (c) 2002 Fujitsu Component Limited * Copyright (c) 2002 Genetec Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of The Fujitsu Component Limited nor the name of * Genetec corporation may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ /* derived from sa11x0_io.c */ /* * Copyright (c) 1997 Mark Brinicombe. * Copyright (c) 1997 Causality Limited. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation * by Ichiro FUKUHARA. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Mark Brinicombe. * 4. The name of the company nor the name of the author may be used to * endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ /* * bus_space functions for Samsung S3C2800/2400/2410. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include /* Prototypes for all the bus_space structure functions */ bs_protos(generic); -bs_protos(generic_armv4); struct bus_space s3c2xx0_bs_tag = { /* cookie */ (void *) 0, /* mapping/unmapping */ generic_bs_map, generic_bs_unmap, generic_bs_subregion, /* allocation/deallocation */ generic_bs_alloc, /* not implemented */ generic_bs_free, /* not implemented */ /* barrier */ generic_bs_barrier, /* read (single) */ generic_bs_r_1, - generic_armv4_bs_r_2, + generic_bs_r_2, generic_bs_r_4, NULL, /* read multiple */ generic_bs_rm_1, - generic_armv4_bs_rm_2, + generic_bs_rm_2, generic_bs_rm_4, NULL, /* read region */ generic_bs_rr_1, - generic_armv4_bs_rr_2, + generic_bs_rr_2, generic_bs_rr_4, NULL, /* write (single) */ generic_bs_w_1, - generic_armv4_bs_w_2, + generic_bs_w_2, generic_bs_w_4, NULL, /* write multiple */ generic_bs_wm_1, - generic_armv4_bs_wm_2, + generic_bs_wm_2, generic_bs_wm_4, NULL, /* write region */ generic_bs_wr_1, - generic_armv4_bs_wr_2, + generic_bs_wr_2, generic_bs_wr_4, NULL, /* set multiple */ NULL, NULL, NULL, NULL, /* set region */ generic_bs_sr_1, - generic_armv4_bs_sr_2, + generic_bs_sr_2, NULL, NULL, /* copy */ NULL, - generic_armv4_bs_c_2, + generic_bs_c_2, NULL, NULL, }; Index: head/sys/arm/versatile/bus_space.c =================================================================== --- head/sys/arm/versatile/bus_space.c (revision 277466) +++ head/sys/arm/versatile/bus_space.c (revision 277467) @@ -1,115 +1,114 @@ /*- * Copyright (C) 2008 MARVELL INTERNATIONAL LTD. * All rights reserved. * * Developed by Semihalf. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of MARVELL nor the names of contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include /* Prototypes for all the bus_space structure functions */ bs_protos(generic); -bs_protos(generic_armv4); struct bus_space _base_tag = { /* cookie */ .bs_privdata = (void *) 0, /* mapping/unmapping */ .bs_map = generic_bs_map, .bs_unmap = generic_bs_unmap, .bs_subregion = generic_bs_subregion, /* allocation/deallocation */ .bs_alloc = generic_bs_alloc, .bs_free = generic_bs_free, /* barrier */ .bs_barrier = generic_bs_barrier, /* read (single) */ .bs_r_1 = generic_bs_r_1, - .bs_r_2 = generic_armv4_bs_r_2, + .bs_r_2 = generic_bs_r_2, .bs_r_4 = generic_bs_r_4, .bs_r_8 = NULL, /* read multiple */ .bs_rm_1 = generic_bs_rm_1, - .bs_rm_2 = generic_armv4_bs_rm_2, + .bs_rm_2 = generic_bs_rm_2, .bs_rm_4 = generic_bs_rm_4, .bs_rm_8 = NULL, /* read region */ .bs_rr_1 = generic_bs_rr_1, - .bs_rr_2 = generic_armv4_bs_rr_2, + .bs_rr_2 = generic_bs_rr_2, .bs_rr_4 = generic_bs_rr_4, .bs_rr_8 = NULL, /* write (single) */ .bs_w_1 = generic_bs_w_1, - .bs_w_2 = generic_armv4_bs_w_2, + .bs_w_2 = generic_bs_w_2, .bs_w_4 = generic_bs_w_4, .bs_w_8 = NULL, /* write multiple */ .bs_wm_1 = generic_bs_wm_1, - .bs_wm_2 = generic_armv4_bs_wm_2, + .bs_wm_2 = generic_bs_wm_2, .bs_wm_4 = generic_bs_wm_4, .bs_wm_8 = NULL, /* write region */ .bs_wr_1 = generic_bs_wr_1, - .bs_wr_2 = generic_armv4_bs_wr_2, + .bs_wr_2 = generic_bs_wr_2, .bs_wr_4 = generic_bs_wr_4, .bs_wr_8 = NULL, /* set multiple */ /* XXX not implemented */ /* set region */ .bs_sr_1 = NULL, - .bs_sr_2 = generic_armv4_bs_sr_2, + .bs_sr_2 = generic_bs_sr_2, .bs_sr_4 = generic_bs_sr_4, .bs_sr_8 = NULL, /* copy */ .bs_c_1 = NULL, - .bs_c_2 = generic_armv4_bs_c_2, + .bs_c_2 = generic_bs_c_2, .bs_c_4 = NULL, .bs_c_8 = NULL, }; bus_space_tag_t fdtbus_bs_tag = &_base_tag; Index: head/sys/arm/versatile/versatile_pci_bus_space.c =================================================================== --- head/sys/arm/versatile/versatile_pci_bus_space.c (revision 277466) +++ head/sys/arm/versatile/versatile_pci_bus_space.c (revision 277467) @@ -1,153 +1,152 @@ /*- * Copyright (c) 2009, Oleksandr Tymoshenko * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice unmodified, this list of conditions, and the following * disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include /* Prototypes for all the bus_space structure functions */ bs_protos(generic); -bs_protos(generic_armv4); /* * Bus space that handles offsets in word for 1/2 bytes read/write access. * Byte order of values is handled by device drivers itself. */ static struct bus_space bus_space_pcimem = { /* cookie */ (void *) 0, /* mapping/unmapping */ generic_bs_map, generic_bs_unmap, generic_bs_subregion, /* allocation/deallocation */ NULL, NULL, /* barrier */ generic_bs_barrier, /* read (single) */ generic_bs_r_1, - generic_armv4_bs_r_2, + generic_bs_r_2, generic_bs_r_4, NULL, /* read multiple */ generic_bs_rm_1, - generic_armv4_bs_rm_2, + generic_bs_rm_2, generic_bs_rm_4, NULL, /* read region */ generic_bs_rr_1, - generic_armv4_bs_rr_2, + generic_bs_rr_2, generic_bs_rr_4, NULL, /* write (single) */ generic_bs_w_1, - generic_armv4_bs_w_2, + generic_bs_w_2, generic_bs_w_4, NULL, /* write multiple */ generic_bs_wm_1, - generic_armv4_bs_wm_2, + generic_bs_wm_2, generic_bs_wm_4, NULL, /* write region */ generic_bs_wr_1, - generic_armv4_bs_wr_2, + generic_bs_wr_2, generic_bs_wr_4, NULL, /* set multiple */ NULL, NULL, NULL, NULL, /* set region */ NULL, NULL, generic_bs_sr_4, NULL, /* copy */ NULL, NULL, NULL, NULL, /* read (single) stream */ NULL, NULL, NULL, NULL, /* read multiple stream */ NULL, NULL, NULL, NULL, /* read region stream */ NULL, NULL, NULL, NULL, /* write (single) stream */ NULL, NULL, NULL, NULL, /* write multiple stream */ NULL, NULL, NULL, NULL, /* write region stream */ NULL, NULL, NULL, NULL, }; bus_space_tag_t versatile_bus_space_pcimem = &bus_space_pcimem; Index: head/sys/arm/xscale/i80321/i80321_space.c =================================================================== --- head/sys/arm/xscale/i80321/i80321_space.c (revision 277466) +++ head/sys/arm/xscale/i80321/i80321_space.c (revision 277467) @@ -1,322 +1,321 @@ /* $NetBSD: i80321_space.c,v 1.6 2003/10/06 15:43:35 thorpej Exp $ */ /*- * Copyright (c) 2001, 2002 Wasabi Systems, Inc. * All rights reserved. * * Written by Jason R. Thorpe for Wasabi Systems, Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed for the NetBSD Project by * Wasabi Systems, Inc. * 4. The name of Wasabi Systems, Inc. may not be used to endorse * or promote products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* * bus_space functions for i80321 I/O Processor. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include /* Prototypes for all the bus_space structure functions */ bs_protos(i80321); bs_protos(i80321_io); bs_protos(i80321_mem); bs_protos(generic); -bs_protos(generic_armv4); /* * Template bus_space -- copied, and the bits that are NULL are * filled in. */ const struct bus_space i80321_bs_tag_template = { /* cookie */ (void *) 0, /* mapping/unmapping */ NULL, NULL, i80321_bs_subregion, /* allocation/deallocation */ NULL, NULL, /* barrier */ i80321_bs_barrier, /* read (single) */ generic_bs_r_1, - generic_armv4_bs_r_2, + generic_bs_r_2, generic_bs_r_4, NULL, /* read multiple */ generic_bs_rm_1, - generic_armv4_bs_rm_2, + generic_bs_rm_2, generic_bs_rm_4, NULL, /* read region */ generic_bs_rr_1, - generic_armv4_bs_rr_2, + generic_bs_rr_2, generic_bs_rr_4, NULL, /* write (single) */ generic_bs_w_1, - generic_armv4_bs_w_2, + generic_bs_w_2, generic_bs_w_4, NULL, /* write multiple */ generic_bs_wm_1, - generic_armv4_bs_wm_2, + generic_bs_wm_2, generic_bs_wm_4, NULL, /* write region */ NULL, - generic_armv4_bs_wr_2, + generic_bs_wr_2, generic_bs_wr_4, NULL, /* set multiple */ NULL, NULL, NULL, NULL, /* set region */ NULL, - generic_armv4_bs_sr_2, + generic_bs_sr_2, generic_bs_sr_4, NULL, /* copy */ NULL, - generic_armv4_bs_c_2, + generic_bs_c_2, NULL, NULL, /* read (single) stream */ generic_bs_r_1, - generic_armv4_bs_r_2, + generic_bs_r_2, generic_bs_r_4, NULL, /* read multiple stream */ generic_bs_rm_1, - generic_armv4_bs_rm_2, + generic_bs_rm_2, generic_bs_rm_4, NULL, /* read region stream */ generic_bs_rr_1, - generic_armv4_bs_rr_2, + generic_bs_rr_2, generic_bs_rr_4, NULL, /* write (single) stream */ generic_bs_w_1, - generic_armv4_bs_w_2, + generic_bs_w_2, generic_bs_w_4, NULL, /* write multiple stream */ generic_bs_wm_1, - generic_armv4_bs_wm_2, + generic_bs_wm_2, generic_bs_wm_4, NULL, /* write region stream */ NULL, - generic_armv4_bs_wr_2, + generic_bs_wr_2, generic_bs_wr_4, NULL, }; void i80321_bs_init(bus_space_tag_t bs, void *cookie) { *bs = i80321_bs_tag_template; bs->bs_privdata = cookie; } void i80321_io_bs_init(bus_space_tag_t bs, void *cookie) { *bs = i80321_bs_tag_template; bs->bs_privdata = cookie; bs->bs_map = i80321_io_bs_map; bs->bs_unmap = i80321_io_bs_unmap; bs->bs_alloc = i80321_io_bs_alloc; bs->bs_free = i80321_io_bs_free; } void i80321_mem_bs_init(bus_space_tag_t bs, void *cookie) { *bs = i80321_bs_tag_template; bs->bs_privdata = cookie; bs->bs_map = i80321_mem_bs_map; bs->bs_unmap = i80321_mem_bs_unmap; bs->bs_alloc = i80321_mem_bs_alloc; bs->bs_free = i80321_mem_bs_free; } /* *** Routines shared by i80321, PCI IO, and PCI MEM. *** */ int i80321_bs_subregion(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp) { *nbshp = bsh + offset; return (0); } void i80321_bs_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset, bus_size_t len, int flags) { /* Nothing to do. */ } /* *** Routines for PCI IO. *** */ extern struct i80321_softc *i80321_softc; int i80321_io_bs_map(bus_space_tag_t tag, bus_addr_t bpa, bus_size_t size, int flags, bus_space_handle_t *bshp) { struct i80321_softc *sc = i80321_softc; vm_offset_t winvaddr; uint32_t busbase; if (bpa >= sc->sc_ioout_xlate && bpa < (sc->sc_ioout_xlate + VERDE_OUT_XLATE_IO_WIN_SIZE)) { busbase = sc->sc_ioout_xlate; winvaddr = sc->sc_iow_vaddr; } else return (EINVAL); if ((bpa + size) >= (busbase + VERDE_OUT_XLATE_IO_WIN_SIZE)) return (EINVAL); /* * Found the window -- PCI I/O space is mapped at a fixed * virtual address by board-specific code. Translate the * bus address to the virtual address. */ *bshp = winvaddr + (bpa - busbase); return (0); } void i80321_io_bs_unmap(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t size) { /* Nothing to do. */ } int i80321_io_bs_alloc(bus_space_tag_t tag, bus_addr_t rstart, bus_addr_t rend, bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags, bus_addr_t *bpap, bus_space_handle_t *bshp) { panic("i80321_io_bs_alloc(): not implemented"); } void i80321_io_bs_free(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t size) { panic("i80321_io_bs_free(): not implemented"); } /* *** Routines for PCI MEM. *** */ extern int badaddr_read(void *, int, void *); int i80321_mem_bs_map(bus_space_tag_t tag, bus_addr_t bpa, bus_size_t size, int flags, bus_space_handle_t *bshp) { *bshp = (vm_offset_t)pmap_mapdev(bpa, size); return (0); } void i80321_mem_bs_unmap(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t size) { pmap_unmapdev((vm_offset_t)h, size); } int i80321_mem_bs_alloc(bus_space_tag_t tag, bus_addr_t rstart, bus_addr_t rend, bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags, bus_addr_t *bpap, bus_space_handle_t *bshp) { panic("i80321_mem_bs_alloc(): not implemented"); } void i80321_mem_bs_free(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t size) { panic("i80321_mem_bs_free(): not implemented"); } Index: head/sys/arm/xscale/i80321/obio_space.c =================================================================== --- head/sys/arm/xscale/i80321/obio_space.c (revision 277466) +++ head/sys/arm/xscale/i80321/obio_space.c (revision 277467) @@ -1,128 +1,127 @@ /* $NetBSD: obio_space.c,v 1.6 2003/07/15 00:25:05 lukem Exp $ */ /*- * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc. * All rights reserved. * * Written by Jason R. Thorpe for Wasabi Systems, Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed for the NetBSD Project by * Wasabi Systems, Inc. * 4. The name of Wasabi Systems, Inc. may not be used to endorse * or promote products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* * bus_space functions for IQ80321 on-board devices */ #include __FBSDID("$FreeBSD$"); #include #include #include #include /* Prototypes for all the bus_space structure functions */ bs_protos(generic); -bs_protos(generic_armv4); /* * The obio bus space tag. This is constant for all instances, so * we never have to explicitly "create" it. */ struct bus_space obio_bs_tag = { /* cookie */ (void *) 0, /* mapping/unmapping */ generic_bs_map, generic_bs_unmap, generic_bs_subregion, /* allocation/deallocation */ generic_bs_alloc, generic_bs_free, /* barrier */ generic_bs_barrier, /* read (single) */ generic_bs_r_1, - generic_armv4_bs_r_2, + generic_bs_r_2, generic_bs_r_4, NULL, /* read multiple */ generic_bs_rm_1, NULL, NULL, NULL, /* read region */ generic_bs_rr_1, NULL, NULL, NULL, /* write (single) */ generic_bs_w_1, - generic_armv4_bs_w_2, + generic_bs_w_2, generic_bs_w_4, NULL, /* write multiple */ generic_bs_wm_1, NULL, NULL, NULL, /* write region */ NULL, NULL, NULL, NULL, /* set multiple */ NULL, NULL, NULL, NULL, /* set region */ NULL, NULL, NULL, NULL, /* copy */ NULL, NULL, NULL, NULL, }; Index: head/sys/arm/xscale/i8134x/i81342_space.c =================================================================== --- head/sys/arm/xscale/i8134x/i81342_space.c (revision 277466) +++ head/sys/arm/xscale/i8134x/i81342_space.c (revision 277467) @@ -1,345 +1,344 @@ /* $NetBSD: i80321_space.c,v 1.6 2003/10/06 15:43:35 thorpej Exp $ */ /*- * Copyright (c) 2001, 2002 Wasabi Systems, Inc. * All rights reserved. * * Written by Jason R. Thorpe for Wasabi Systems, Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed for the NetBSD Project by * Wasabi Systems, Inc. * 4. The name of Wasabi Systems, Inc. may not be used to endorse * or promote products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* * bus_space functions for i81342 I/O Processor. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include /* Prototypes for all the bus_space structure functions */ bs_protos(i81342); bs_protos(i81342_io); bs_protos(i81342_mem); bs_protos(generic); -bs_protos(generic_armv4); /* * Template bus_space -- copied, and the bits that are NULL are * filled in. */ const struct bus_space i81342_bs_tag_template = { /* cookie */ (void *) 0, /* mapping/unmapping */ NULL, NULL, i81342_bs_subregion, /* allocation/deallocation */ NULL, NULL, /* barrier */ i81342_bs_barrier, /* read (single) */ generic_bs_r_1, - generic_armv4_bs_r_2, + generic_bs_r_2, generic_bs_r_4, NULL, /* read multiple */ generic_bs_rm_1, - generic_armv4_bs_rm_2, + generic_bs_rm_2, generic_bs_rm_4, NULL, /* read region */ generic_bs_rr_1, - generic_armv4_bs_rr_2, + generic_bs_rr_2, generic_bs_rr_4, NULL, /* write (single) */ generic_bs_w_1, - generic_armv4_bs_w_2, + generic_bs_w_2, generic_bs_w_4, NULL, /* write multiple */ generic_bs_wm_1, - generic_armv4_bs_wm_2, + generic_bs_wm_2, generic_bs_wm_4, NULL, /* write region */ NULL, - generic_armv4_bs_wr_2, + generic_bs_wr_2, generic_bs_wr_4, NULL, /* set multiple */ NULL, NULL, NULL, NULL, /* set region */ NULL, - generic_armv4_bs_sr_2, + generic_bs_sr_2, generic_bs_sr_4, NULL, /* copy */ NULL, - generic_armv4_bs_c_2, + generic_bs_c_2, NULL, NULL, /* read (single) stream */ generic_bs_r_1, - generic_armv4_bs_r_2, + generic_bs_r_2, generic_bs_r_4, NULL, /* read multiple stream */ generic_bs_rm_1, - generic_armv4_bs_rm_2, + generic_bs_rm_2, generic_bs_rm_4, NULL, /* read region stream */ generic_bs_rr_1, - generic_armv4_bs_rr_2, + generic_bs_rr_2, generic_bs_rr_4, NULL, /* write (single) stream */ generic_bs_w_1, - generic_armv4_bs_w_2, + generic_bs_w_2, generic_bs_w_4, NULL, /* write multiple stream */ generic_bs_wm_1, - generic_armv4_bs_wm_2, + generic_bs_wm_2, generic_bs_wm_4, NULL, /* write region stream */ NULL, - generic_armv4_bs_wr_2, + generic_bs_wr_2, generic_bs_wr_4, NULL, }; void i81342_bs_init(bus_space_tag_t bs, void *cookie) { *bs = i81342_bs_tag_template; bs->bs_privdata = cookie; } void i81342_io_bs_init(bus_space_tag_t bs, void *cookie) { *bs = i81342_bs_tag_template; bs->bs_privdata = cookie; bs->bs_map = i81342_io_bs_map; bs->bs_unmap = i81342_io_bs_unmap; bs->bs_alloc = i81342_io_bs_alloc; bs->bs_free = i81342_io_bs_free; } void i81342_mem_bs_init(bus_space_tag_t bs, void *cookie) { *bs = i81342_bs_tag_template; bs->bs_privdata = cookie; bs->bs_map = i81342_mem_bs_map; bs->bs_unmap = i81342_mem_bs_unmap; bs->bs_alloc = i81342_mem_bs_alloc; bs->bs_free = i81342_mem_bs_free; } /* *** Routines shared by i81342, PCI IO, and PCI MEM. *** */ int i81342_bs_subregion(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp) { *nbshp = bsh + offset; return (0); } void i81342_bs_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset, bus_size_t len, int flags) { /* Nothing to do. */ } /* *** Routines for PCI IO. *** */ int i81342_io_bs_map(bus_space_tag_t tag, bus_addr_t bpa, bus_size_t size, int flags, bus_space_handle_t *bshp) { *bshp = bpa; return (0); } void i81342_io_bs_unmap(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t size) { /* Nothing to do. */ } int i81342_io_bs_alloc(bus_space_tag_t tag, bus_addr_t rstart, bus_addr_t rend, bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags, bus_addr_t *bpap, bus_space_handle_t *bshp) { panic("i81342_io_bs_alloc(): not implemented"); } void i81342_io_bs_free(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t size) { panic("i81342_io_bs_free(): not implemented"); } /* *** Routines for PCI MEM. *** */ extern int badaddr_read(void *, int, void *); static vm_offset_t allocable = 0xe1000000; int i81342_mem_bs_map(bus_space_tag_t tag, bus_addr_t bpa, bus_size_t size, int flags, bus_space_handle_t *bshp) { struct i81342_pci_softc *sc = (struct i81342_pci_softc *)tag->bs_privdata; struct i81342_pci_map *tmp; vm_offset_t addr, endaddr; vm_paddr_t paddr; /* Lookup to see if we already have a mapping at this address. */ tmp = sc->sc_pci_mappings; while (tmp) { if (tmp->paddr <= bpa && tmp->paddr + tmp->size > bpa + size) { *bshp = bpa - tmp->paddr + tmp->vaddr; return (0); } tmp = tmp->next; } addr = allocable; endaddr = ((addr + size) &~ (0x1000000 - 1)) + 0x1000000; if (endaddr >= IOP34X_VADDR) panic("PCI virtual memory exhausted"); allocable = endaddr; tmp = malloc(sizeof(*tmp), M_DEVBUF, M_WAITOK); tmp->next = NULL; paddr = bpa &~ (0x100000 - 1); tmp->paddr = paddr; tmp->vaddr = addr; tmp->size = 0; while (addr < endaddr) { pmap_kenter_supersection(addr, paddr + (sc->sc_is_atux ? IOP34X_PCIX_OMBAR : IOP34X_PCIE_OMBAR), 0); addr += 0x1000000; paddr += 0x1000000; tmp->size += 0x1000000; } tmp->next = sc->sc_pci_mappings; sc->sc_pci_mappings = tmp; *bshp = bpa - tmp->paddr + tmp->vaddr; return (0); } void i81342_mem_bs_unmap(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t size) { #if 0 vm_offset_t va, endva; va = trunc_page((vm_offset_t)h); endva = va + round_page(size); /* Free the kernel virtual mapping. */ kva_free(va, endva - va); #endif } int i81342_mem_bs_alloc(bus_space_tag_t tag, bus_addr_t rstart, bus_addr_t rend, bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags, bus_addr_t *bpap, bus_space_handle_t *bshp) { panic("i81342_mem_bs_alloc(): not implemented"); } void i81342_mem_bs_free(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t size) { panic("i81342_mem_bs_free(): not implemented"); } Index: head/sys/arm/xscale/i8134x/obio_space.c =================================================================== --- head/sys/arm/xscale/i8134x/obio_space.c (revision 277466) +++ head/sys/arm/xscale/i8134x/obio_space.c (revision 277467) @@ -1,128 +1,127 @@ /* $NetBSD: obio_space.c,v 1.6 2003/07/15 00:25:05 lukem Exp $ */ /*- * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc. * All rights reserved. * * Written by Jason R. Thorpe for Wasabi Systems, Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed for the NetBSD Project by * Wasabi Systems, Inc. * 4. The name of Wasabi Systems, Inc. may not be used to endorse * or promote products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* * bus_space functions for IQ80321 on-board devices */ #include __FBSDID("$FreeBSD$"); #include #include #include #include /* Prototypes for all the bus_space structure functions */ bs_protos(generic); -bs_protos(generic_armv4); /* * The obio bus space tag. This is constant for all instances, so * we never have to explicitly "create" it. */ struct bus_space obio_bs_tag = { /* cookie */ (void *) 0, /* mapping/unmapping */ generic_bs_map, generic_bs_unmap, generic_bs_subregion, /* allocation/deallocation */ generic_bs_alloc, generic_bs_free, /* barrier */ generic_bs_barrier, /* read (single) */ generic_bs_r_1, - generic_armv4_bs_r_2, + generic_bs_r_2, generic_bs_r_4, NULL, /* read multiple */ generic_bs_rm_1, NULL, NULL, NULL, /* read region */ generic_bs_rr_1, NULL, NULL, NULL, /* write (single) */ generic_bs_w_1, - generic_armv4_bs_w_2, + generic_bs_w_2, generic_bs_w_4, NULL, /* write multiple */ generic_bs_wm_1, NULL, NULL, NULL, /* write region */ NULL, NULL, NULL, NULL, /* set multiple */ NULL, NULL, NULL, NULL, /* set region */ NULL, NULL, NULL, NULL, /* copy */ NULL, NULL, NULL, NULL, }; Index: head/sys/arm/xscale/ixp425/ixp425_a4x_space.c =================================================================== --- head/sys/arm/xscale/ixp425/ixp425_a4x_space.c (revision 277466) +++ head/sys/arm/xscale/ixp425/ixp425_a4x_space.c (revision 277467) @@ -1,115 +1,114 @@ /* $NetBSD: ixp425_a4x_space.c,v 1.2 2005/12/11 12:16:51 christos Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. * All rights reserved. * * Written by Steve C. Woodford for Wasabi Systems, Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed for the NetBSD Project by * Wasabi Systems, Inc. * 4. The name of Wasabi Systems, Inc. may not be used to endorse * or promote products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* * Bus space tag for 8/16-bit devices on 32-bit bus. * all registers are located at the address of multiple of 4. * * Based on pxa2x0_a4x_space.c */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include /* Prototypes for all the bus_space structure functions */ bs_protos(a4x); bs_protos(generic); -bs_protos(generic_armv4); struct bus_space ixp425_a4x_bs_tag = { /* cookie */ .bs_privdata = (void *) 0, /* mapping/unmapping */ .bs_map = generic_bs_map, .bs_unmap = generic_bs_unmap, .bs_subregion = generic_bs_subregion, /* allocation/deallocation */ .bs_alloc = generic_bs_alloc, /* XXX not implemented */ .bs_free = generic_bs_free, /* XXX not implemented */ /* barrier */ .bs_barrier = generic_bs_barrier, /* read (single) */ .bs_r_1 = a4x_bs_r_1, .bs_r_2 = a4x_bs_r_2, .bs_r_4 = a4x_bs_r_4, /* read multiple */ .bs_rm_1 = a4x_bs_rm_1, .bs_rm_2 = a4x_bs_rm_2, /* read region */ /* XXX not implemented */ /* write (single) */ .bs_w_1 = a4x_bs_w_1, .bs_w_2 = a4x_bs_w_2, .bs_w_4 = a4x_bs_w_4, /* write multiple */ .bs_wm_1 = a4x_bs_wm_1, .bs_wm_2 = a4x_bs_wm_2, /* write region */ /* XXX not implemented */ /* set multiple */ /* XXX not implemented */ /* set region */ /* XXX not implemented */ /* copy */ /* XXX not implemented */ }; Index: head/sys/arm/xscale/ixp425/ixp425_space.c =================================================================== --- head/sys/arm/xscale/ixp425/ixp425_space.c (revision 277466) +++ head/sys/arm/xscale/ixp425/ixp425_space.c (revision 277467) @@ -1,130 +1,129 @@ /* $NetBSD: ixp425_space.c,v 1.6 2006/04/10 03:36:03 simonb Exp $ */ /* * Copyright (c) 2003 * Ichiro FUKUHARA . * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Ichiro FUKUHARA. * 4. The name of the company nor the name of the author may be used to * endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); /* * bus_space I/O functions for ixp425 */ #include #include #include #include #include #include #include #include #include #include #include #include /* Proto types for all the bus_space structure functions */ bs_protos(generic); -bs_protos(generic_armv4); struct bus_space ixp425_bs_tag = { /* cookie */ .bs_privdata = (void *) 0, /* mapping/unmapping */ .bs_map = generic_bs_map, .bs_unmap = generic_bs_unmap, .bs_subregion = generic_bs_subregion, /* allocation/deallocation */ .bs_alloc = generic_bs_alloc, .bs_free = generic_bs_free, /* barrier */ .bs_barrier = generic_bs_barrier, /* read (single) */ .bs_r_1 = generic_bs_r_1, - .bs_r_2 = generic_armv4_bs_r_2, + .bs_r_2 = generic_bs_r_2, .bs_r_4 = generic_bs_r_4, .bs_r_8 = NULL, /* read multiple */ .bs_rm_1 = generic_bs_rm_1, - .bs_rm_2 = generic_armv4_bs_rm_2, + .bs_rm_2 = generic_bs_rm_2, .bs_rm_4 = generic_bs_rm_4, .bs_rm_8 = NULL, /* read region */ .bs_rr_1 = generic_bs_rr_1, - .bs_rr_2 = generic_armv4_bs_rr_2, + .bs_rr_2 = generic_bs_rr_2, .bs_rr_4 = generic_bs_rr_4, .bs_rr_8 = NULL, /* write (single) */ .bs_w_1 = generic_bs_w_1, - .bs_w_2 = generic_armv4_bs_w_2, + .bs_w_2 = generic_bs_w_2, .bs_w_4 = generic_bs_w_4, .bs_w_8 = NULL, /* write multiple */ .bs_wm_1 = generic_bs_wm_1, - .bs_wm_2 = generic_armv4_bs_wm_2, + .bs_wm_2 = generic_bs_wm_2, .bs_wm_4 = generic_bs_wm_4, .bs_wm_8 = NULL, /* write region */ .bs_wr_1 = generic_bs_wr_1, - .bs_wr_2 = generic_armv4_bs_wr_2, + .bs_wr_2 = generic_bs_wr_2, .bs_wr_4 = generic_bs_wr_4, .bs_wr_8 = NULL, /* set multiple */ /* XXX not implemented */ /* set region */ .bs_sr_1 = NULL, - .bs_sr_2 = generic_armv4_bs_sr_2, + .bs_sr_2 = generic_bs_sr_2, .bs_sr_4 = generic_bs_sr_4, .bs_sr_8 = NULL, /* copy */ .bs_c_1 = NULL, - .bs_c_2 = generic_armv4_bs_c_2, + .bs_c_2 = generic_bs_c_2, .bs_c_4 = NULL, .bs_c_8 = NULL, }; Index: head/sys/arm/xscale/pxa/pxa_space.c =================================================================== --- head/sys/arm/xscale/pxa/pxa_space.c (revision 277466) +++ head/sys/arm/xscale/pxa/pxa_space.c (revision 277467) @@ -1,233 +1,232 @@ /* $NetBSD: obio_space.c,v 1.6 2003/07/15 00:25:05 lukem Exp $ */ /*- * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc. * All rights reserved. * * Written by Jason R. Thorpe for Wasabi Systems, Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed for the NetBSD Project by * Wasabi Systems, Inc. * 4. The name of Wasabi Systems, Inc. may not be used to endorse * or promote products derived from this software without specific prior * written permission. * * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* * bus_space functions for PXA devices */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include static MALLOC_DEFINE(M_PXATAG, "PXA bus_space tags", "Bus_space tags for PXA"); /* Prototypes for all the bus_space structure functions */ bs_protos(generic); -bs_protos(generic_armv4); bs_protos(pxa); /* * The obio bus space tag. This is constant for all instances, so * we never have to explicitly "create" it. */ struct bus_space _base_tag = { /* cookie */ (void *) 0, /* mapping/unmapping */ generic_bs_map, generic_bs_unmap, generic_bs_subregion, /* allocation/deallocation */ generic_bs_alloc, generic_bs_free, /* barrier */ generic_bs_barrier, /* read (single) */ pxa_bs_r_1, pxa_bs_r_2, pxa_bs_r_4, NULL, /* read multiple */ pxa_bs_rm_1, pxa_bs_rm_2, NULL, NULL, /* read region */ pxa_bs_rr_1, NULL, NULL, NULL, /* write (single) */ pxa_bs_w_1, pxa_bs_w_2, pxa_bs_w_4, NULL, /* write multiple */ pxa_bs_wm_1, pxa_bs_wm_2, NULL, NULL, /* write region */ NULL, NULL, NULL, NULL, /* set multiple */ NULL, NULL, NULL, NULL, /* set region */ NULL, NULL, NULL, NULL, /* copy */ NULL, NULL, NULL, NULL, }; static struct bus_space _obio_tag; bus_space_tag_t base_tag = &_base_tag; bus_space_tag_t obio_tag = NULL; void pxa_obio_tag_init() { bcopy(&_base_tag, &_obio_tag, sizeof(struct bus_space)); _obio_tag.bs_privdata = (void *)PXA2X0_PERIPH_OFFSET; obio_tag = &_obio_tag; } bus_space_tag_t pxa_bus_tag_alloc(bus_addr_t offset) { struct bus_space *tag; tag = (struct bus_space *)malloc(sizeof(struct bus_space), M_PXATAG, M_WAITOK); if (tag == NULL) { return (NULL); } bcopy(&_base_tag, tag, sizeof(struct bus_space)); tag->bs_privdata = (void *)offset; return ((bus_space_tag_t)tag); } #define READ_SINGLE(type, proto, base) \ type \ proto(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset) \ { \ bus_addr_t tag_offset; \ type value; \ tag_offset = (bus_addr_t)tag->bs_privdata; \ value = base(NULL, bsh + tag_offset, offset); \ return (value); \ } READ_SINGLE(u_int8_t, pxa_bs_r_1, generic_bs_r_1) -READ_SINGLE(u_int16_t, pxa_bs_r_2, generic_armv4_bs_r_2) +READ_SINGLE(u_int16_t, pxa_bs_r_2, generic_bs_r_2) READ_SINGLE(u_int32_t, pxa_bs_r_4, generic_bs_r_4) #undef READ_SINGLE #define WRITE_SINGLE(type, proto, base) \ void \ proto(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset, \ type value) \ { \ bus_addr_t tag_offset; \ tag_offset = (bus_addr_t)tag->bs_privdata; \ base(NULL, bsh + tag_offset, offset, value); \ } WRITE_SINGLE(u_int8_t, pxa_bs_w_1, generic_bs_w_1) -WRITE_SINGLE(u_int16_t, pxa_bs_w_2, generic_armv4_bs_w_2) +WRITE_SINGLE(u_int16_t, pxa_bs_w_2, generic_bs_w_2) WRITE_SINGLE(u_int32_t, pxa_bs_w_4, generic_bs_w_4) #undef WRITE_SINGLE #define READ_MULTI(type, proto, base) \ void \ proto(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset, \ type *dest, bus_size_t count) \ { \ bus_addr_t tag_offset; \ tag_offset = (bus_addr_t)tag->bs_privdata; \ base(NULL, bsh + tag_offset, offset, dest, count); \ } READ_MULTI(u_int8_t, pxa_bs_rm_1, generic_bs_rm_1) -READ_MULTI(u_int16_t, pxa_bs_rm_2, generic_armv4_bs_rm_2) +READ_MULTI(u_int16_t, pxa_bs_rm_2, generic_bs_rm_2) READ_MULTI(u_int8_t, pxa_bs_rr_1, generic_bs_rr_1) #undef READ_MULTI #define WRITE_MULTI(type, proto, base) \ void \ proto(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset, \ const type *src, bus_size_t count) \ { \ bus_addr_t tag_offset; \ tag_offset = (bus_addr_t)tag->bs_privdata; \ base(NULL, bsh + tag_offset, offset, src, count); \ } WRITE_MULTI(u_int8_t, pxa_bs_wm_1, generic_bs_wm_1) -WRITE_MULTI(u_int16_t, pxa_bs_wm_2, generic_armv4_bs_wm_2) +WRITE_MULTI(u_int16_t, pxa_bs_wm_2, generic_bs_wm_2) #undef WRITE_MULTI