Index: head/sys/dev/mii/brgphy.c =================================================================== --- head/sys/dev/mii/brgphy.c (revision 277092) +++ head/sys/dev/mii/brgphy.c (revision 277093) @@ -1,1077 +1,1074 @@ /*- * Copyright (c) 2000 * Bill Paul . All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Bill Paul. * 4. Neither the name of the author nor the names of any co-contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); /* * Driver for the Broadcom BCM54xx/57xx 1000baseTX PHY. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include "miidevs.h" #include #include #include #include #include #include #include #include "miibus_if.h" static int brgphy_probe(device_t); static int brgphy_attach(device_t); struct brgphy_softc { struct mii_softc mii_sc; int serdes_flags; /* Keeps track of the serdes type used */ #define BRGPHY_5706S 0x0001 #define BRGPHY_5708S 0x0002 #define BRGPHY_NOANWAIT 0x0004 #define BRGPHY_5709S 0x0008 int bce_phy_flags; /* PHY flags transferred from the MAC driver */ }; static device_method_t brgphy_methods[] = { /* device interface */ DEVMETHOD(device_probe, brgphy_probe), DEVMETHOD(device_attach, brgphy_attach), DEVMETHOD(device_detach, mii_phy_detach), DEVMETHOD(device_shutdown, bus_generic_shutdown), DEVMETHOD_END }; static devclass_t brgphy_devclass; static driver_t brgphy_driver = { "brgphy", brgphy_methods, sizeof(struct brgphy_softc) }; DRIVER_MODULE(brgphy, miibus, brgphy_driver, brgphy_devclass, 0, 0); static int brgphy_service(struct mii_softc *, struct mii_data *, int); static void brgphy_setmedia(struct mii_softc *, int); static void brgphy_status(struct mii_softc *); static void brgphy_mii_phy_auto(struct mii_softc *, int); static void brgphy_reset(struct mii_softc *); static void brgphy_enable_loopback(struct mii_softc *); static void bcm5401_load_dspcode(struct mii_softc *); static void bcm5411_load_dspcode(struct mii_softc *); static void bcm54k2_load_dspcode(struct mii_softc *); static void brgphy_fixup_5704_a0_bug(struct mii_softc *); static void brgphy_fixup_adc_bug(struct mii_softc *); static void brgphy_fixup_adjust_trim(struct mii_softc *); static void brgphy_fixup_ber_bug(struct mii_softc *); static void brgphy_fixup_crc_bug(struct mii_softc *); static void brgphy_fixup_jitter_bug(struct mii_softc *); static void brgphy_ethernet_wirespeed(struct mii_softc *); static void brgphy_jumbo_settings(struct mii_softc *, u_long); static const struct mii_phydesc brgphys[] = { MII_PHY_DESC(BROADCOM, BCM5400), MII_PHY_DESC(BROADCOM, BCM5401), MII_PHY_DESC(BROADCOM, BCM5411), MII_PHY_DESC(BROADCOM, BCM54K2), MII_PHY_DESC(BROADCOM, BCM5701), MII_PHY_DESC(BROADCOM, BCM5703), MII_PHY_DESC(BROADCOM, BCM5704), MII_PHY_DESC(BROADCOM, BCM5705), MII_PHY_DESC(BROADCOM, BCM5706), MII_PHY_DESC(BROADCOM, BCM5714), MII_PHY_DESC(BROADCOM, BCM5421), MII_PHY_DESC(BROADCOM, BCM5750), MII_PHY_DESC(BROADCOM, BCM5752), MII_PHY_DESC(BROADCOM, BCM5780), MII_PHY_DESC(BROADCOM, BCM5708C), MII_PHY_DESC(BROADCOM2, BCM5482), MII_PHY_DESC(BROADCOM2, BCM5708S), MII_PHY_DESC(BROADCOM2, BCM5709C), MII_PHY_DESC(BROADCOM2, BCM5709S), MII_PHY_DESC(BROADCOM2, BCM5709CAX), MII_PHY_DESC(BROADCOM2, BCM5722), MII_PHY_DESC(BROADCOM2, BCM5755), MII_PHY_DESC(BROADCOM2, BCM5754), MII_PHY_DESC(BROADCOM2, BCM5761), MII_PHY_DESC(BROADCOM2, BCM5784), #ifdef notyet /* better handled by ukphy(4) until WARs are implemented */ MII_PHY_DESC(BROADCOM2, BCM5785), #endif MII_PHY_DESC(BROADCOM3, BCM5717C), MII_PHY_DESC(BROADCOM3, BCM5719C), MII_PHY_DESC(BROADCOM3, BCM5720C), MII_PHY_DESC(BROADCOM3, BCM57765), MII_PHY_DESC(BROADCOM3, BCM57780), MII_PHY_DESC(BROADCOM4, BCM5725C), MII_PHY_DESC(xxBROADCOM_ALT1, BCM5906), MII_PHY_END }; static const struct mii_phy_funcs brgphy_funcs = { brgphy_service, brgphy_status, brgphy_reset }; #define HS21_PRODUCT_ID "IBM eServer BladeCenter HS21" #define HS21_BCM_CHIPID 0x57081021 static int detect_hs21(struct bce_softc *bce_sc) { char *sysenv; int found; found = 0; if (bce_sc->bce_chipid == HS21_BCM_CHIPID) { sysenv = kern_getenv("smbios.system.product"); if (sysenv != NULL) { if (strncmp(sysenv, HS21_PRODUCT_ID, strlen(HS21_PRODUCT_ID)) == 0) found = 1; freeenv(sysenv); } } return (found); } /* Search for our PHY in the list of known PHYs */ static int brgphy_probe(device_t dev) { return (mii_phy_dev_probe(dev, brgphys, BUS_PROBE_DEFAULT)); } /* Attach the PHY to the MII bus */ static int brgphy_attach(device_t dev) { struct brgphy_softc *bsc; struct bge_softc *bge_sc = NULL; struct bce_softc *bce_sc = NULL; struct mii_softc *sc; - if_t ifp; bsc = device_get_softc(dev); sc = &bsc->mii_sc; mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE, &brgphy_funcs, 0); bsc->serdes_flags = 0; - ifp = sc->mii_pdata->mii_ifp; /* Find the MAC driver associated with this PHY. */ - if (strcmp(if_getdname(ifp), "bge") == 0) - bge_sc = if_getsoftc(ifp); - else if (strcmp(if_getdname(ifp), "bce") == 0) - bce_sc = if_getsoftc(ifp); + if (mii_dev_mac_match(dev, "bge")) + bge_sc = mii_dev_mac_softc(dev); + else if (mii_dev_mac_match(dev, "bce")) + bce_sc = mii_dev_mac_softc(dev); /* Handle any special cases based on the PHY ID */ switch (sc->mii_mpd_oui) { case MII_OUI_BROADCOM: switch (sc->mii_mpd_model) { case MII_MODEL_BROADCOM_BCM5706: case MII_MODEL_BROADCOM_BCM5714: /* * The 5464 PHY used in the 5706 supports both copper * and fiber interfaces over GMII. Need to check the * shadow registers to see which mode is actually * in effect, and therefore whether we have 5706C or * 5706S. */ PHY_WRITE(sc, BRGPHY_MII_SHADOW_1C, BRGPHY_SHADOW_1C_MODE_CTRL); if (PHY_READ(sc, BRGPHY_MII_SHADOW_1C) & BRGPHY_SHADOW_1C_ENA_1000X) { bsc->serdes_flags |= BRGPHY_5706S; sc->mii_flags |= MIIF_HAVEFIBER; } break; } break; case MII_OUI_BROADCOM2: switch (sc->mii_mpd_model) { case MII_MODEL_BROADCOM2_BCM5708S: bsc->serdes_flags |= BRGPHY_5708S; sc->mii_flags |= MIIF_HAVEFIBER; break; case MII_MODEL_BROADCOM2_BCM5709S: /* * XXX * 5720S and 5709S shares the same PHY id. * Assume 5720S PHY if parent device is bge(4). */ if (bge_sc != NULL) bsc->serdes_flags |= BRGPHY_5708S; else bsc->serdes_flags |= BRGPHY_5709S; sc->mii_flags |= MIIF_HAVEFIBER; break; } break; } PHY_RESET(sc); /* Read the PHY's capabilities. */ sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask; if (sc->mii_capabilities & BMSR_EXTSTAT) sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); device_printf(dev, " "); #define ADD(m, c) ifmedia_add(&sc->mii_pdata->mii_media, (m), (c), NULL) /* Add the supported media types */ if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { mii_phy_add_media(sc); printf("\n"); } else { sc->mii_anegticks = MII_ANEGTICKS_GIGE; ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, sc->mii_inst), BRGPHY_S1000 | BRGPHY_BMCR_FDX); printf("1000baseSX-FDX, "); /* 2.5G support is a software enabled feature on the 5708S and 5709S. */ if (bce_sc && (bce_sc->bce_phy_flags & BCE_PHY_2_5G_CAPABLE_FLAG)) { ADD(IFM_MAKEWORD(IFM_ETHER, IFM_2500_SX, IFM_FDX, sc->mii_inst), 0); printf("2500baseSX-FDX, "); } else if ((bsc->serdes_flags & BRGPHY_5708S) && bce_sc && (detect_hs21(bce_sc) != 0)) { /* * There appears to be certain silicon revision * in IBM HS21 blades that is having issues with * this driver wating for the auto-negotiation to * complete. This happens with a specific chip id * only and when the 1000baseSX-FDX is the only * mode. Workaround this issue since it's unlikely * to be ever addressed. */ printf("auto-neg workaround, "); bsc->serdes_flags |= BRGPHY_NOANWAIT; } ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0); printf("auto\n"); } #undef ADD MIIBUS_MEDIAINIT(sc->mii_dev); return (0); } static int brgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) { struct ifmedia_entry *ife = mii->mii_media.ifm_cur; int val; switch (cmd) { case MII_POLLSTAT: break; case MII_MEDIACHG: /* Todo: Why is this here? Is it really needed? */ PHY_RESET(sc); /* XXX hardware bug work-around */ switch (IFM_SUBTYPE(ife->ifm_media)) { case IFM_AUTO: brgphy_mii_phy_auto(sc, ife->ifm_media); break; case IFM_2500_SX: case IFM_1000_SX: case IFM_1000_T: case IFM_100_TX: case IFM_10_T: brgphy_setmedia(sc, ife->ifm_media); break; default: return (EINVAL); } break; case MII_TICK: /* Bail if autoneg isn't in process. */ if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { sc->mii_ticks = 0; break; } /* * Check to see if we have link. If we do, we don't * need to restart the autonegotiation process. */ val = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); if (val & BMSR_LINK) { sc->mii_ticks = 0; /* Reset autoneg timer. */ break; } /* Announce link loss right after it happens. */ if (sc->mii_ticks++ == 0) break; /* Only retry autonegotiation every mii_anegticks seconds. */ if (sc->mii_ticks <= sc->mii_anegticks) break; /* Retry autonegotiation */ sc->mii_ticks = 0; brgphy_mii_phy_auto(sc, ife->ifm_media); break; } /* Update the media status. */ PHY_STATUS(sc); /* * Callback if something changed. Note that we need to poke * the DSP on the Broadcom PHYs if the media changes. */ if (sc->mii_media_active != mii->mii_media_active || sc->mii_media_status != mii->mii_media_status || cmd == MII_MEDIACHG) { switch (sc->mii_mpd_oui) { case MII_OUI_BROADCOM: switch (sc->mii_mpd_model) { case MII_MODEL_BROADCOM_BCM5400: bcm5401_load_dspcode(sc); break; case MII_MODEL_BROADCOM_BCM5401: if (sc->mii_mpd_rev == 1 || sc->mii_mpd_rev == 3) bcm5401_load_dspcode(sc); break; case MII_MODEL_BROADCOM_BCM5411: bcm5411_load_dspcode(sc); break; case MII_MODEL_BROADCOM_BCM54K2: bcm54k2_load_dspcode(sc); break; } break; } } mii_phy_update(sc, cmd); return (0); } /****************************************************************************/ /* Sets the PHY link speed. */ /* */ /* Returns: */ /* None */ /****************************************************************************/ static void brgphy_setmedia(struct mii_softc *sc, int media) { int bmcr = 0, gig; switch (IFM_SUBTYPE(media)) { case IFM_2500_SX: break; case IFM_1000_SX: case IFM_1000_T: bmcr = BRGPHY_S1000; break; case IFM_100_TX: bmcr = BRGPHY_S100; break; case IFM_10_T: default: bmcr = BRGPHY_S10; break; } if ((media & IFM_FDX) != 0) { bmcr |= BRGPHY_BMCR_FDX; gig = BRGPHY_1000CTL_AFD; } else { gig = BRGPHY_1000CTL_AHD; } /* Force loopback to disconnect PHY from Ethernet medium. */ brgphy_enable_loopback(sc); PHY_WRITE(sc, BRGPHY_MII_1000CTL, 0); PHY_WRITE(sc, BRGPHY_MII_ANAR, BRGPHY_SEL_TYPE); if (IFM_SUBTYPE(media) != IFM_1000_T && IFM_SUBTYPE(media) != IFM_1000_SX) { PHY_WRITE(sc, BRGPHY_MII_BMCR, bmcr); return; } if (IFM_SUBTYPE(media) == IFM_1000_T) { gig |= BRGPHY_1000CTL_MSE; if ((media & IFM_ETH_MASTER) != 0) gig |= BRGPHY_1000CTL_MSC; } PHY_WRITE(sc, BRGPHY_MII_1000CTL, gig); PHY_WRITE(sc, BRGPHY_MII_BMCR, bmcr | BRGPHY_BMCR_AUTOEN | BRGPHY_BMCR_STARTNEG); } /****************************************************************************/ /* Set the media status based on the PHY settings. */ /* */ /* Returns: */ /* None */ /****************************************************************************/ static void brgphy_status(struct mii_softc *sc) { struct brgphy_softc *bsc = (struct brgphy_softc *)sc; struct mii_data *mii = sc->mii_pdata; int aux, bmcr, bmsr, val, xstat; u_int flowstat; mii->mii_media_status = IFM_AVALID; mii->mii_media_active = IFM_ETHER; bmsr = PHY_READ(sc, BRGPHY_MII_BMSR) | PHY_READ(sc, BRGPHY_MII_BMSR); bmcr = PHY_READ(sc, BRGPHY_MII_BMCR); if (bmcr & BRGPHY_BMCR_LOOP) { mii->mii_media_active |= IFM_LOOP; } if ((bmcr & BRGPHY_BMCR_AUTOEN) && (bmsr & BRGPHY_BMSR_ACOMP) == 0 && (bsc->serdes_flags & BRGPHY_NOANWAIT) == 0) { /* Erg, still trying, I guess... */ mii->mii_media_active |= IFM_NONE; return; } if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { /* * NB: reading the ANAR, ANLPAR or 1000STS after the AUXSTS * wedges at least the PHY of BCM5704 (but not others). */ flowstat = mii_phy_flowstatus(sc); xstat = PHY_READ(sc, BRGPHY_MII_1000STS); aux = PHY_READ(sc, BRGPHY_MII_AUXSTS); /* If copper link is up, get the negotiated speed/duplex. */ if (aux & BRGPHY_AUXSTS_LINK) { mii->mii_media_status |= IFM_ACTIVE; switch (aux & BRGPHY_AUXSTS_AN_RES) { case BRGPHY_RES_1000FD: mii->mii_media_active |= IFM_1000_T | IFM_FDX; break; case BRGPHY_RES_1000HD: mii->mii_media_active |= IFM_1000_T | IFM_HDX; break; case BRGPHY_RES_100FD: mii->mii_media_active |= IFM_100_TX | IFM_FDX; break; case BRGPHY_RES_100T4: mii->mii_media_active |= IFM_100_T4; break; case BRGPHY_RES_100HD: mii->mii_media_active |= IFM_100_TX | IFM_HDX; break; case BRGPHY_RES_10FD: mii->mii_media_active |= IFM_10_T | IFM_FDX; break; case BRGPHY_RES_10HD: mii->mii_media_active |= IFM_10_T | IFM_HDX; break; default: mii->mii_media_active |= IFM_NONE; break; } if ((mii->mii_media_active & IFM_FDX) != 0) mii->mii_media_active |= flowstat; if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T && (xstat & BRGPHY_1000STS_MSR) != 0) mii->mii_media_active |= IFM_ETH_MASTER; } } else { /* Todo: Add support for flow control. */ /* If serdes link is up, get the negotiated speed/duplex. */ if (bmsr & BRGPHY_BMSR_LINK) { mii->mii_media_status |= IFM_ACTIVE; } /* Check the link speed/duplex based on the PHY type. */ if (bsc->serdes_flags & BRGPHY_5706S) { mii->mii_media_active |= IFM_1000_SX; /* If autoneg enabled, read negotiated duplex settings */ if (bmcr & BRGPHY_BMCR_AUTOEN) { val = PHY_READ(sc, BRGPHY_SERDES_ANAR) & PHY_READ(sc, BRGPHY_SERDES_ANLPAR); if (val & BRGPHY_SERDES_ANAR_FDX) mii->mii_media_active |= IFM_FDX; else mii->mii_media_active |= IFM_HDX; } } else if (bsc->serdes_flags & BRGPHY_5708S) { PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, BRGPHY_5708S_DIG_PG0); xstat = PHY_READ(sc, BRGPHY_5708S_PG0_1000X_STAT1); /* Check for MRBE auto-negotiated speed results. */ switch (xstat & BRGPHY_5708S_PG0_1000X_STAT1_SPEED_MASK) { case BRGPHY_5708S_PG0_1000X_STAT1_SPEED_10: mii->mii_media_active |= IFM_10_FL; break; case BRGPHY_5708S_PG0_1000X_STAT1_SPEED_100: mii->mii_media_active |= IFM_100_FX; break; case BRGPHY_5708S_PG0_1000X_STAT1_SPEED_1G: mii->mii_media_active |= IFM_1000_SX; break; case BRGPHY_5708S_PG0_1000X_STAT1_SPEED_25G: mii->mii_media_active |= IFM_2500_SX; break; } /* Check for MRBE auto-negotiated duplex results. */ if (xstat & BRGPHY_5708S_PG0_1000X_STAT1_FDX) mii->mii_media_active |= IFM_FDX; else mii->mii_media_active |= IFM_HDX; } else if (bsc->serdes_flags & BRGPHY_5709S) { /* Select GP Status Block of the AN MMD, get autoneg results. */ PHY_WRITE(sc, BRGPHY_BLOCK_ADDR, BRGPHY_BLOCK_ADDR_GP_STATUS); xstat = PHY_READ(sc, BRGPHY_GP_STATUS_TOP_ANEG_STATUS); /* Restore IEEE0 block (assumed in all brgphy(4) code). */ PHY_WRITE(sc, BRGPHY_BLOCK_ADDR, BRGPHY_BLOCK_ADDR_COMBO_IEEE0); /* Check for MRBE auto-negotiated speed results. */ switch (xstat & BRGPHY_GP_STATUS_TOP_ANEG_SPEED_MASK) { case BRGPHY_GP_STATUS_TOP_ANEG_SPEED_10: mii->mii_media_active |= IFM_10_FL; break; case BRGPHY_GP_STATUS_TOP_ANEG_SPEED_100: mii->mii_media_active |= IFM_100_FX; break; case BRGPHY_GP_STATUS_TOP_ANEG_SPEED_1G: mii->mii_media_active |= IFM_1000_SX; break; case BRGPHY_GP_STATUS_TOP_ANEG_SPEED_25G: mii->mii_media_active |= IFM_2500_SX; break; } /* Check for MRBE auto-negotiated duplex results. */ if (xstat & BRGPHY_GP_STATUS_TOP_ANEG_FDX) mii->mii_media_active |= IFM_FDX; else mii->mii_media_active |= IFM_HDX; } } } static void brgphy_mii_phy_auto(struct mii_softc *sc, int media) { int anar, ktcr = 0; PHY_RESET(sc); if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA; if ((media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0) anar |= BRGPHY_ANAR_PC | BRGPHY_ANAR_ASP; PHY_WRITE(sc, BRGPHY_MII_ANAR, anar); ktcr = BRGPHY_1000CTL_AFD | BRGPHY_1000CTL_AHD; if (sc->mii_mpd_model == MII_MODEL_BROADCOM_BCM5701) ktcr |= BRGPHY_1000CTL_MSE | BRGPHY_1000CTL_MSC; PHY_WRITE(sc, BRGPHY_MII_1000CTL, ktcr); PHY_READ(sc, BRGPHY_MII_1000CTL); } else { anar = BRGPHY_SERDES_ANAR_FDX | BRGPHY_SERDES_ANAR_HDX; if ((media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0) anar |= BRGPHY_SERDES_ANAR_BOTH_PAUSE; PHY_WRITE(sc, BRGPHY_SERDES_ANAR, anar); } PHY_WRITE(sc, BRGPHY_MII_BMCR, BRGPHY_BMCR_AUTOEN | BRGPHY_BMCR_STARTNEG); PHY_WRITE(sc, BRGPHY_MII_IMR, 0xFF00); } /* Enable loopback to force the link down. */ static void brgphy_enable_loopback(struct mii_softc *sc) { int i; PHY_WRITE(sc, BRGPHY_MII_BMCR, BRGPHY_BMCR_LOOP); for (i = 0; i < 15000; i++) { if (!(PHY_READ(sc, BRGPHY_MII_BMSR) & BRGPHY_BMSR_LINK)) break; DELAY(10); } } /* Turn off tap power management on 5401. */ static void bcm5401_load_dspcode(struct mii_softc *sc) { static const struct { int reg; uint16_t val; } dspcode[] = { { BRGPHY_MII_AUXCTL, 0x0c20 }, { BRGPHY_MII_DSP_ADDR_REG, 0x0012 }, { BRGPHY_MII_DSP_RW_PORT, 0x1804 }, { BRGPHY_MII_DSP_ADDR_REG, 0x0013 }, { BRGPHY_MII_DSP_RW_PORT, 0x1204 }, { BRGPHY_MII_DSP_ADDR_REG, 0x8006 }, { BRGPHY_MII_DSP_RW_PORT, 0x0132 }, { BRGPHY_MII_DSP_ADDR_REG, 0x8006 }, { BRGPHY_MII_DSP_RW_PORT, 0x0232 }, { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, { BRGPHY_MII_DSP_RW_PORT, 0x0a20 }, { 0, 0 }, }; int i; for (i = 0; dspcode[i].reg != 0; i++) PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); DELAY(40); } static void bcm5411_load_dspcode(struct mii_softc *sc) { static const struct { int reg; uint16_t val; } dspcode[] = { { 0x1c, 0x8c23 }, { 0x1c, 0x8ca3 }, { 0x1c, 0x8c23 }, { 0, 0 }, }; int i; for (i = 0; dspcode[i].reg != 0; i++) PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); } void bcm54k2_load_dspcode(struct mii_softc *sc) { static const struct { int reg; uint16_t val; } dspcode[] = { { 4, 0x01e1 }, { 9, 0x0300 }, { 0, 0 }, }; int i; for (i = 0; dspcode[i].reg != 0; i++) PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); } static void brgphy_fixup_5704_a0_bug(struct mii_softc *sc) { static const struct { int reg; uint16_t val; } dspcode[] = { { 0x1c, 0x8d68 }, { 0x1c, 0x8d68 }, { 0, 0 }, }; int i; for (i = 0; dspcode[i].reg != 0; i++) PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); } static void brgphy_fixup_adc_bug(struct mii_softc *sc) { static const struct { int reg; uint16_t val; } dspcode[] = { { BRGPHY_MII_AUXCTL, 0x0c00 }, { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, { BRGPHY_MII_DSP_RW_PORT, 0x2aaa }, { 0, 0 }, }; int i; for (i = 0; dspcode[i].reg != 0; i++) PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); } static void brgphy_fixup_adjust_trim(struct mii_softc *sc) { static const struct { int reg; uint16_t val; } dspcode[] = { { BRGPHY_MII_AUXCTL, 0x0c00 }, { BRGPHY_MII_DSP_ADDR_REG, 0x000a }, { BRGPHY_MII_DSP_RW_PORT, 0x110b }, { BRGPHY_MII_TEST1, 0x0014 }, { BRGPHY_MII_AUXCTL, 0x0400 }, { 0, 0 }, }; int i; for (i = 0; dspcode[i].reg != 0; i++) PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); } static void brgphy_fixup_ber_bug(struct mii_softc *sc) { static const struct { int reg; uint16_t val; } dspcode[] = { { BRGPHY_MII_AUXCTL, 0x0c00 }, { BRGPHY_MII_DSP_ADDR_REG, 0x000a }, { BRGPHY_MII_DSP_RW_PORT, 0x310b }, { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, { BRGPHY_MII_DSP_RW_PORT, 0x9506 }, { BRGPHY_MII_DSP_ADDR_REG, 0x401f }, { BRGPHY_MII_DSP_RW_PORT, 0x14e2 }, { BRGPHY_MII_AUXCTL, 0x0400 }, { 0, 0 }, }; int i; for (i = 0; dspcode[i].reg != 0; i++) PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); } static void brgphy_fixup_crc_bug(struct mii_softc *sc) { static const struct { int reg; uint16_t val; } dspcode[] = { { BRGPHY_MII_DSP_RW_PORT, 0x0a75 }, { 0x1c, 0x8c68 }, { 0x1c, 0x8d68 }, { 0x1c, 0x8c68 }, { 0, 0 }, }; int i; for (i = 0; dspcode[i].reg != 0; i++) PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); } static void brgphy_fixup_jitter_bug(struct mii_softc *sc) { static const struct { int reg; uint16_t val; } dspcode[] = { { BRGPHY_MII_AUXCTL, 0x0c00 }, { BRGPHY_MII_DSP_ADDR_REG, 0x000a }, { BRGPHY_MII_DSP_RW_PORT, 0x010b }, { BRGPHY_MII_AUXCTL, 0x0400 }, { 0, 0 }, }; int i; for (i = 0; dspcode[i].reg != 0; i++) PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); } static void brgphy_fixup_disable_early_dac(struct mii_softc *sc) { uint32_t val; PHY_WRITE(sc, BRGPHY_MII_DSP_ADDR_REG, 0x0f08); val = PHY_READ(sc, BRGPHY_MII_DSP_RW_PORT); val &= ~(1 << 8); PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT, val); } static void brgphy_ethernet_wirespeed(struct mii_softc *sc) { uint32_t val; /* Enable Ethernet@WireSpeed. */ PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007); val = PHY_READ(sc, BRGPHY_MII_AUXCTL); PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) | (1 << 4)); } static void brgphy_jumbo_settings(struct mii_softc *sc, u_long mtu) { uint32_t val; /* Set or clear jumbo frame settings in the PHY. */ if (mtu > ETHER_MAX_LEN) { if (sc->mii_mpd_model == MII_MODEL_BROADCOM_BCM5401) { /* BCM5401 PHY cannot read-modify-write. */ PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x4c20); } else { PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7); val = PHY_READ(sc, BRGPHY_MII_AUXCTL); PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | BRGPHY_AUXCTL_LONG_PKT); } val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL); PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, val | BRGPHY_PHY_EXTCTL_HIGH_LA); } else { PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7); val = PHY_READ(sc, BRGPHY_MII_AUXCTL); PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val & ~(BRGPHY_AUXCTL_LONG_PKT | 0x7)); val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL); PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, val & ~BRGPHY_PHY_EXTCTL_HIGH_LA); } } static void brgphy_reset(struct mii_softc *sc) { struct bge_softc *bge_sc = NULL; struct bce_softc *bce_sc = NULL; if_t ifp; int i, val; /* * Perform a reset. Note that at least some Broadcom PHYs default to * being powered down as well as isolated after a reset but don't work * if one or both of these bits are cleared. However, they just work * fine if both bits remain set, so we don't use mii_phy_reset() here. */ PHY_WRITE(sc, BRGPHY_MII_BMCR, BRGPHY_BMCR_RESET); /* Wait 100ms for it to complete. */ for (i = 0; i < 100; i++) { if ((PHY_READ(sc, BRGPHY_MII_BMCR) & BRGPHY_BMCR_RESET) == 0) break; DELAY(1000); } /* Handle any PHY specific procedures following the reset. */ switch (sc->mii_mpd_oui) { case MII_OUI_BROADCOM: switch (sc->mii_mpd_model) { case MII_MODEL_BROADCOM_BCM5400: bcm5401_load_dspcode(sc); break; case MII_MODEL_BROADCOM_BCM5401: if (sc->mii_mpd_rev == 1 || sc->mii_mpd_rev == 3) bcm5401_load_dspcode(sc); break; case MII_MODEL_BROADCOM_BCM5411: bcm5411_load_dspcode(sc); break; case MII_MODEL_BROADCOM_BCM54K2: bcm54k2_load_dspcode(sc); break; } break; case MII_OUI_BROADCOM3: switch (sc->mii_mpd_model) { case MII_MODEL_BROADCOM3_BCM5717C: case MII_MODEL_BROADCOM3_BCM5719C: case MII_MODEL_BROADCOM3_BCM5720C: case MII_MODEL_BROADCOM3_BCM57765: return; } break; case MII_OUI_BROADCOM4: return; } ifp = sc->mii_pdata->mii_ifp; /* Find the driver associated with this PHY. */ - if (strcmp(if_getdname(ifp), "bge") == 0) { - bge_sc = if_getsoftc(ifp); - } else if (strcmp(if_getdname(ifp), "bce") == 0) { - bce_sc = if_getsoftc(ifp); - } + if (mii_phy_mac_match(sc, "bge")) + bge_sc = mii_phy_mac_softc(sc); + else if (mii_phy_mac_match(sc, "bce")) + bce_sc = mii_phy_mac_softc(sc); if (bge_sc) { /* Fix up various bugs */ if (bge_sc->bge_phy_flags & BGE_PHY_5704_A0_BUG) brgphy_fixup_5704_a0_bug(sc); if (bge_sc->bge_phy_flags & BGE_PHY_ADC_BUG) brgphy_fixup_adc_bug(sc); if (bge_sc->bge_phy_flags & BGE_PHY_ADJUST_TRIM) brgphy_fixup_adjust_trim(sc); if (bge_sc->bge_phy_flags & BGE_PHY_BER_BUG) brgphy_fixup_ber_bug(sc); if (bge_sc->bge_phy_flags & BGE_PHY_CRC_BUG) brgphy_fixup_crc_bug(sc); if (bge_sc->bge_phy_flags & BGE_PHY_JITTER_BUG) brgphy_fixup_jitter_bug(sc); if (bge_sc->bge_flags & BGE_FLAG_JUMBO) brgphy_jumbo_settings(sc, if_getmtu(ifp)); if ((bge_sc->bge_phy_flags & BGE_PHY_NO_WIRESPEED) == 0) brgphy_ethernet_wirespeed(sc); /* Enable Link LED on Dell boxes */ if (bge_sc->bge_phy_flags & BGE_PHY_NO_3LED) { PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL) & ~BRGPHY_PHY_EXTCTL_3_LED); } /* Adjust output voltage (From Linux driver) */ if (bge_sc->bge_asicrev == BGE_ASICREV_BCM5906) PHY_WRITE(sc, BRGPHY_MII_EPHY_PTEST, 0x12); } else if (bce_sc) { if (BCE_CHIP_NUM(bce_sc) == BCE_CHIP_NUM_5708 && (bce_sc->bce_phy_flags & BCE_PHY_SERDES_FLAG)) { /* Store autoneg capabilities/results in digital block (Page 0) */ PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, BRGPHY_5708S_DIG3_PG2); PHY_WRITE(sc, BRGPHY_5708S_PG2_DIGCTL_3_0, BRGPHY_5708S_PG2_DIGCTL_3_0_USE_IEEE); PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, BRGPHY_5708S_DIG_PG0); /* Enable fiber mode and autodetection */ PHY_WRITE(sc, BRGPHY_5708S_PG0_1000X_CTL1, PHY_READ(sc, BRGPHY_5708S_PG0_1000X_CTL1) | BRGPHY_5708S_PG0_1000X_CTL1_AUTODET_EN | BRGPHY_5708S_PG0_1000X_CTL1_FIBER_MODE); /* Enable parallel detection */ PHY_WRITE(sc, BRGPHY_5708S_PG0_1000X_CTL2, PHY_READ(sc, BRGPHY_5708S_PG0_1000X_CTL2) | BRGPHY_5708S_PG0_1000X_CTL2_PAR_DET_EN); /* Advertise 2.5G support through next page during autoneg */ if (bce_sc->bce_phy_flags & BCE_PHY_2_5G_CAPABLE_FLAG) PHY_WRITE(sc, BRGPHY_5708S_ANEG_NXT_PG_XMIT1, PHY_READ(sc, BRGPHY_5708S_ANEG_NXT_PG_XMIT1) | BRGPHY_5708S_ANEG_NXT_PG_XMIT1_25G); /* Increase TX signal amplitude */ if ((BCE_CHIP_ID(bce_sc) == BCE_CHIP_ID_5708_A0) || (BCE_CHIP_ID(bce_sc) == BCE_CHIP_ID_5708_B0) || (BCE_CHIP_ID(bce_sc) == BCE_CHIP_ID_5708_B1)) { PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, BRGPHY_5708S_TX_MISC_PG5); PHY_WRITE(sc, BRGPHY_5708S_PG5_TXACTL1, PHY_READ(sc, BRGPHY_5708S_PG5_TXACTL1) & ~0x30); PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, BRGPHY_5708S_DIG_PG0); } /* Backplanes use special driver/pre-driver/pre-emphasis values. */ if ((bce_sc->bce_shared_hw_cfg & BCE_SHARED_HW_CFG_PHY_BACKPLANE) && (bce_sc->bce_port_hw_cfg & BCE_PORT_HW_CFG_CFG_TXCTL3_MASK)) { PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, BRGPHY_5708S_TX_MISC_PG5); PHY_WRITE(sc, BRGPHY_5708S_PG5_TXACTL3, bce_sc->bce_port_hw_cfg & BCE_PORT_HW_CFG_CFG_TXCTL3_MASK); PHY_WRITE(sc, BRGPHY_5708S_BLOCK_ADDR, BRGPHY_5708S_DIG_PG0); } } else if (BCE_CHIP_NUM(bce_sc) == BCE_CHIP_NUM_5709 && (bce_sc->bce_phy_flags & BCE_PHY_SERDES_FLAG)) { /* Select the SerDes Digital block of the AN MMD. */ PHY_WRITE(sc, BRGPHY_BLOCK_ADDR, BRGPHY_BLOCK_ADDR_SERDES_DIG); val = PHY_READ(sc, BRGPHY_SERDES_DIG_1000X_CTL1); val &= ~BRGPHY_SD_DIG_1000X_CTL1_AUTODET; val |= BRGPHY_SD_DIG_1000X_CTL1_FIBER; PHY_WRITE(sc, BRGPHY_SERDES_DIG_1000X_CTL1, val); /* Select the Over 1G block of the AN MMD. */ PHY_WRITE(sc, BRGPHY_BLOCK_ADDR, BRGPHY_BLOCK_ADDR_OVER_1G); /* Enable autoneg "Next Page" to advertise 2.5G support. */ val = PHY_READ(sc, BRGPHY_OVER_1G_UNFORMAT_PG1); if (bce_sc->bce_phy_flags & BCE_PHY_2_5G_CAPABLE_FLAG) val |= BRGPHY_5708S_ANEG_NXT_PG_XMIT1_25G; else val &= ~BRGPHY_5708S_ANEG_NXT_PG_XMIT1_25G; PHY_WRITE(sc, BRGPHY_OVER_1G_UNFORMAT_PG1, val); /* Select the Multi-Rate Backplane Ethernet block of the AN MMD. */ PHY_WRITE(sc, BRGPHY_BLOCK_ADDR, BRGPHY_BLOCK_ADDR_MRBE); /* Enable MRBE speed autoneg. */ val = PHY_READ(sc, BRGPHY_MRBE_MSG_PG5_NP); val |= BRGPHY_MRBE_MSG_PG5_NP_MBRE | BRGPHY_MRBE_MSG_PG5_NP_T2; PHY_WRITE(sc, BRGPHY_MRBE_MSG_PG5_NP, val); /* Select the Clause 73 User B0 block of the AN MMD. */ PHY_WRITE(sc, BRGPHY_BLOCK_ADDR, BRGPHY_BLOCK_ADDR_CL73_USER_B0); /* Enable MRBE speed autoneg. */ PHY_WRITE(sc, BRGPHY_CL73_USER_B0_MBRE_CTL1, BRGPHY_CL73_USER_B0_MBRE_CTL1_NP_AFT_BP | BRGPHY_CL73_USER_B0_MBRE_CTL1_STA_MGR | BRGPHY_CL73_USER_B0_MBRE_CTL1_ANEG); /* Restore IEEE0 block (assumed in all brgphy(4) code). */ PHY_WRITE(sc, BRGPHY_BLOCK_ADDR, BRGPHY_BLOCK_ADDR_COMBO_IEEE0); } else if (BCE_CHIP_NUM(bce_sc) == BCE_CHIP_NUM_5709) { if ((BCE_CHIP_REV(bce_sc) == BCE_CHIP_REV_Ax) || (BCE_CHIP_REV(bce_sc) == BCE_CHIP_REV_Bx)) brgphy_fixup_disable_early_dac(sc); brgphy_jumbo_settings(sc, if_getmtu(ifp)); brgphy_ethernet_wirespeed(sc); } else { brgphy_fixup_ber_bug(sc); brgphy_jumbo_settings(sc, if_getmtu(ifp)); brgphy_ethernet_wirespeed(sc); } } } Index: head/sys/dev/mii/ciphy.c =================================================================== --- head/sys/dev/mii/ciphy.c (revision 277092) +++ head/sys/dev/mii/ciphy.c (revision 277093) @@ -1,371 +1,370 @@ /*- * Copyright (c) 2004 * Bill Paul . All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Bill Paul. * 4. Neither the name of the author nor the names of any co-contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); /* * Driver for the Cicada/Vitesse CS/VSC8xxx 10/100/1000 copper PHY. */ #include #include #include #include #include #include #include #include #include #include #include #include "miidevs.h" #include #include "miibus_if.h" #include static int ciphy_probe(device_t); static int ciphy_attach(device_t); static device_method_t ciphy_methods[] = { /* device interface */ DEVMETHOD(device_probe, ciphy_probe), DEVMETHOD(device_attach, ciphy_attach), DEVMETHOD(device_detach, mii_phy_detach), DEVMETHOD(device_shutdown, bus_generic_shutdown), DEVMETHOD_END }; static devclass_t ciphy_devclass; static driver_t ciphy_driver = { "ciphy", ciphy_methods, sizeof(struct mii_softc) }; DRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0); static int ciphy_service(struct mii_softc *, struct mii_data *, int); static void ciphy_status(struct mii_softc *); static void ciphy_reset(struct mii_softc *); static void ciphy_fixup(struct mii_softc *); static const struct mii_phydesc ciphys[] = { MII_PHY_DESC(xxCICADA, CS8201), MII_PHY_DESC(xxCICADA, CS8201A), MII_PHY_DESC(xxCICADA, CS8201B), MII_PHY_DESC(xxCICADA, CS8204), MII_PHY_DESC(xxCICADA, VSC8211), MII_PHY_DESC(xxCICADA, VSC8221), MII_PHY_DESC(xxCICADA, CS8244), MII_PHY_DESC(xxVITESSE, VSC8601), MII_PHY_DESC(xxVITESSE, VSC8641), MII_PHY_END }; static const struct mii_phy_funcs ciphy_funcs = { ciphy_service, ciphy_status, ciphy_reset }; static int ciphy_probe(device_t dev) { return (mii_phy_dev_probe(dev, ciphys, BUS_PROBE_DEFAULT)); } static int ciphy_attach(device_t dev) { mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE, &ciphy_funcs, 1); return (0); } static int ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) { struct ifmedia_entry *ife = mii->mii_media.ifm_cur; int reg, speed, gig; switch (cmd) { case MII_POLLSTAT: break; case MII_MEDIACHG: ciphy_fixup(sc); /* XXX hardware bug work-around */ switch (IFM_SUBTYPE(ife->ifm_media)) { case IFM_AUTO: #ifdef foo /* * If we're already in auto mode, just return. */ if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN) return (0); #endif (void)mii_phy_auto(sc); break; case IFM_1000_T: speed = CIPHY_S1000; goto setit; case IFM_100_TX: speed = CIPHY_S100; goto setit; case IFM_10_T: speed = CIPHY_S10; setit: if ((ife->ifm_media & IFM_FDX) != 0) { speed |= CIPHY_BMCR_FDX; gig = CIPHY_1000CTL_AFD; } else gig = CIPHY_1000CTL_AHD; if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { gig |= CIPHY_1000CTL_MSE; if ((ife->ifm_media & IFM_ETH_MASTER) != 0) gig |= CIPHY_1000CTL_MSC; speed |= CIPHY_BMCR_AUTOEN | CIPHY_BMCR_STARTNEG; } else gig = 0; PHY_WRITE(sc, CIPHY_MII_1000CTL, gig); PHY_WRITE(sc, CIPHY_MII_BMCR, speed); PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE); break; case IFM_NONE: PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN); break; default: return (EINVAL); } break; case MII_TICK: /* * Only used for autonegotiation. */ if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) break; /* * Check to see if we have link. If we do, we don't * need to restart the autonegotiation process. Read * the BMSR twice in case it's latched. */ reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); if (reg & BMSR_LINK) break; /* Announce link loss right after it happens. */ if (++sc->mii_ticks == 0) break; /* * Only retry autonegotiation every mii_anegticks seconds. */ if (sc->mii_ticks <= sc->mii_anegticks) break; sc->mii_ticks = 0; mii_phy_auto(sc); break; } /* Update the media status. */ PHY_STATUS(sc); /* * Callback if something changed. Note that we need to poke * apply fixups for certain PHY revs. */ if (sc->mii_media_active != mii->mii_media_active || sc->mii_media_status != mii->mii_media_status || cmd == MII_MEDIACHG) { ciphy_fixup(sc); } mii_phy_update(sc, cmd); return (0); } static void ciphy_status(struct mii_softc *sc) { struct mii_data *mii = sc->mii_pdata; int bmsr, bmcr; mii->mii_media_status = IFM_AVALID; mii->mii_media_active = IFM_ETHER; bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); if (bmsr & BMSR_LINK) mii->mii_media_status |= IFM_ACTIVE; bmcr = PHY_READ(sc, CIPHY_MII_BMCR); if (bmcr & CIPHY_BMCR_LOOP) mii->mii_media_active |= IFM_LOOP; if (bmcr & CIPHY_BMCR_AUTOEN) { if ((bmsr & CIPHY_BMSR_ACOMP) == 0) { /* Erg, still trying, I guess... */ mii->mii_media_active |= IFM_NONE; return; } } bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR); switch (bmsr & CIPHY_AUXCSR_SPEED) { case CIPHY_SPEED10: mii->mii_media_active |= IFM_10_T; break; case CIPHY_SPEED100: mii->mii_media_active |= IFM_100_TX; break; case CIPHY_SPEED1000: mii->mii_media_active |= IFM_1000_T; break; default: device_printf(sc->mii_dev, "unknown PHY speed %x\n", bmsr & CIPHY_AUXCSR_SPEED); break; } if (bmsr & CIPHY_AUXCSR_FDX) mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc); else mii->mii_media_active |= IFM_HDX; if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) && (PHY_READ(sc, CIPHY_MII_1000STS) & CIPHY_1000STS_MSR) != 0) mii->mii_media_active |= IFM_ETH_MASTER; } static void ciphy_reset(struct mii_softc *sc) { mii_phy_reset(sc); DELAY(1000); } #define PHY_SETBIT(x, y, z) \ PHY_WRITE(x, y, (PHY_READ(x, y) | (z))) #define PHY_CLRBIT(x, y, z) \ PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z))) static void ciphy_fixup(struct mii_softc *sc) { uint16_t model; uint16_t status, speed; uint16_t val; model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2)); status = PHY_READ(sc, CIPHY_MII_AUXCSR); speed = status & CIPHY_AUXCSR_SPEED; - if (strcmp(device_get_name(device_get_parent(sc->mii_dev)), - "nfe") == 0) { + if (mii_phy_mac_match(sc, "nfe")) { /* need to set for 2.5V RGMII for NVIDIA adapters */ val = PHY_READ(sc, CIPHY_MII_ECTL1); val &= ~(CIPHY_ECTL1_IOVOL | CIPHY_ECTL1_INTSEL); val |= (CIPHY_IOVOL_2500MV | CIPHY_INTSEL_RGMII); PHY_WRITE(sc, CIPHY_MII_ECTL1, val); /* From Linux. */ val = PHY_READ(sc, CIPHY_MII_AUXCSR); val |= CIPHY_AUXCSR_MDPPS; PHY_WRITE(sc, CIPHY_MII_AUXCSR, val); val = PHY_READ(sc, CIPHY_MII_10BTCSR); val |= CIPHY_10BTCSR_ECHO; PHY_WRITE(sc, CIPHY_MII_10BTCSR, val); } switch (model) { case MII_MODEL_xxCICADA_CS8204: case MII_MODEL_xxCICADA_CS8201: /* Turn off "aux mode" (whatever that means) */ PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS); /* * Work around speed polling bug in VT3119/VT3216 * when using MII in full duplex mode. */ if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && (status & CIPHY_AUXCSR_FDX)) { PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); } else { PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); } /* Enable link/activity LED blink. */ PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK); break; case MII_MODEL_xxCICADA_CS8201A: case MII_MODEL_xxCICADA_CS8201B: /* * Work around speed polling bug in VT3119/VT3216 * when using MII in full duplex mode. */ if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && (status & CIPHY_AUXCSR_FDX)) { PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); } else { PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); } break; case MII_MODEL_xxCICADA_VSC8211: case MII_MODEL_xxCICADA_VSC8221: case MII_MODEL_xxCICADA_CS8244: case MII_MODEL_xxVITESSE_VSC8601: case MII_MODEL_xxVITESSE_VSC8641: break; default: device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n", model); break; } } Index: head/sys/dev/mii/e1000phy.c =================================================================== --- head/sys/dev/mii/e1000phy.c (revision 277092) +++ head/sys/dev/mii/e1000phy.c (revision 277093) @@ -1,502 +1,501 @@ /*- * Principal Author: Parag Patel * Copyright (c) 2001 * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice unmodified, this list of conditions, and the following * disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * Additional Copyright (c) 2001 by Traakan Software under same licence. * Secondary Author: Matthew Jacob */ #include __FBSDID("$FreeBSD$"); /* * driver for the Marvell 88E1000 series external 1000/100/10-BT PHY. */ /* * Support added for the Marvell 88E1011 (Alaska) 1000/100/10baseTX and * 1000baseSX PHY. * Nathan Binkert * Jung-uk Kim */ #include #include #include #include #include #include #include #include #include #include #include #include "miidevs.h" #include #include "miibus_if.h" static int e1000phy_probe(device_t); static int e1000phy_attach(device_t); static device_method_t e1000phy_methods[] = { /* device interface */ DEVMETHOD(device_probe, e1000phy_probe), DEVMETHOD(device_attach, e1000phy_attach), DEVMETHOD(device_detach, mii_phy_detach), DEVMETHOD(device_shutdown, bus_generic_shutdown), DEVMETHOD_END }; static devclass_t e1000phy_devclass; static driver_t e1000phy_driver = { "e1000phy", e1000phy_methods, sizeof(struct mii_softc) }; DRIVER_MODULE(e1000phy, miibus, e1000phy_driver, e1000phy_devclass, 0, 0); static int e1000phy_service(struct mii_softc *, struct mii_data *, int); static void e1000phy_status(struct mii_softc *); static void e1000phy_reset(struct mii_softc *); static int e1000phy_mii_phy_auto(struct mii_softc *, int); static const struct mii_phydesc e1000phys[] = { MII_PHY_DESC(MARVELL, E1000), MII_PHY_DESC(MARVELL, E1011), MII_PHY_DESC(MARVELL, E1000_3), MII_PHY_DESC(MARVELL, E1000_5), MII_PHY_DESC(MARVELL, E1111), MII_PHY_DESC(xxMARVELL, E1000), MII_PHY_DESC(xxMARVELL, E1011), MII_PHY_DESC(xxMARVELL, E1000_3), MII_PHY_DESC(xxMARVELL, E1000S), MII_PHY_DESC(xxMARVELL, E1000_5), MII_PHY_DESC(xxMARVELL, E1101), MII_PHY_DESC(xxMARVELL, E3082), MII_PHY_DESC(xxMARVELL, E1112), MII_PHY_DESC(xxMARVELL, E1149), MII_PHY_DESC(xxMARVELL, E1111), MII_PHY_DESC(xxMARVELL, E1116), MII_PHY_DESC(xxMARVELL, E1116R), MII_PHY_DESC(xxMARVELL, E1116R_29), MII_PHY_DESC(xxMARVELL, E1118), MII_PHY_DESC(xxMARVELL, E1145), MII_PHY_DESC(xxMARVELL, E1149R), MII_PHY_DESC(xxMARVELL, E3016), MII_PHY_DESC(xxMARVELL, PHYG65G), MII_PHY_END }; static const struct mii_phy_funcs e1000phy_funcs = { e1000phy_service, e1000phy_status, e1000phy_reset }; static int e1000phy_probe(device_t dev) { return (mii_phy_dev_probe(dev, e1000phys, BUS_PROBE_DEFAULT)); } static int e1000phy_attach(device_t dev) { struct mii_softc *sc; if_t ifp; sc = device_get_softc(dev); mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &e1000phy_funcs, 0); ifp = sc->mii_pdata->mii_ifp; - if (strcmp(if_getdname(ifp), "msk") == 0 && - (sc->mii_flags & MIIF_MACPRIV0) != 0) + if (mii_dev_mac_match(dev, "msk") && (sc->mii_flags & MIIF_MACPRIV0) != 0) sc->mii_flags |= MIIF_PHYPRIV0; switch (sc->mii_mpd_model) { case MII_MODEL_xxMARVELL_E1011: case MII_MODEL_xxMARVELL_E1112: if (PHY_READ(sc, E1000_ESSR) & E1000_ESSR_FIBER_LINK) sc->mii_flags |= MIIF_HAVEFIBER; break; case MII_MODEL_xxMARVELL_E1149: case MII_MODEL_xxMARVELL_E1149R: /* * Some 88E1149 PHY's page select is initialized to * point to other bank instead of copper/fiber bank * which in turn resulted in wrong registers were * accessed during PHY operation. It is believed that * page 0 should be used for copper PHY so reinitialize * E1000_EADR to select default copper PHY. If parent * device know the type of PHY(either copper or fiber), * that information should be used to select default * type of PHY. */ PHY_WRITE(sc, E1000_EADR, 0); break; } PHY_RESET(sc); sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask; if (sc->mii_capabilities & BMSR_EXTSTAT) { sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) sc->mii_flags |= MIIF_HAVE_GTCR; } device_printf(dev, " "); mii_phy_add_media(sc); printf("\n"); MIIBUS_MEDIAINIT(sc->mii_dev); return (0); } static void e1000phy_reset(struct mii_softc *sc) { uint16_t reg, page; reg = PHY_READ(sc, E1000_SCR); if ((sc->mii_flags & MIIF_HAVEFIBER) != 0) { reg &= ~E1000_SCR_AUTO_X_MODE; PHY_WRITE(sc, E1000_SCR, reg); if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1112) { /* Select 1000BASE-X only mode. */ page = PHY_READ(sc, E1000_EADR); PHY_WRITE(sc, E1000_EADR, 2); reg = PHY_READ(sc, E1000_SCR); reg &= ~E1000_SCR_MODE_MASK; reg |= E1000_SCR_MODE_1000BX; PHY_WRITE(sc, E1000_SCR, reg); if ((sc->mii_flags & MIIF_PHYPRIV0) != 0) { /* Set SIGDET polarity low for SFP module. */ PHY_WRITE(sc, E1000_EADR, 1); reg = PHY_READ(sc, E1000_SCR); reg |= E1000_SCR_FIB_SIGDET_POLARITY; PHY_WRITE(sc, E1000_SCR, reg); } PHY_WRITE(sc, E1000_EADR, page); } } else { switch (sc->mii_mpd_model) { case MII_MODEL_xxMARVELL_E1111: case MII_MODEL_xxMARVELL_E1112: case MII_MODEL_xxMARVELL_E1116: case MII_MODEL_xxMARVELL_E1116R_29: case MII_MODEL_xxMARVELL_E1118: case MII_MODEL_xxMARVELL_E1149: case MII_MODEL_xxMARVELL_E1149R: case MII_MODEL_xxMARVELL_PHYG65G: /* Disable energy detect mode. */ reg &= ~E1000_SCR_EN_DETECT_MASK; reg |= E1000_SCR_AUTO_X_MODE; if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116 || sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116R_29) reg &= ~E1000_SCR_POWER_DOWN; reg |= E1000_SCR_ASSERT_CRS_ON_TX; break; case MII_MODEL_xxMARVELL_E3082: reg |= (E1000_SCR_AUTO_X_MODE >> 1); reg |= E1000_SCR_ASSERT_CRS_ON_TX; break; case MII_MODEL_xxMARVELL_E3016: reg |= E1000_SCR_AUTO_MDIX; reg &= ~(E1000_SCR_EN_DETECT | E1000_SCR_SCRAMBLER_DISABLE); reg |= E1000_SCR_LPNP; /* XXX Enable class A driver for Yukon FE+ A0. */ PHY_WRITE(sc, 0x1C, PHY_READ(sc, 0x1C) | 0x0001); break; default: reg &= ~E1000_SCR_AUTO_X_MODE; reg |= E1000_SCR_ASSERT_CRS_ON_TX; break; } if (sc->mii_mpd_model != MII_MODEL_xxMARVELL_E3016) { /* Auto correction for reversed cable polarity. */ reg &= ~E1000_SCR_POLARITY_REVERSAL; } PHY_WRITE(sc, E1000_SCR, reg); if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116 || sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116R_29 || sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1149 || sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1149R) { PHY_WRITE(sc, E1000_EADR, 2); reg = PHY_READ(sc, E1000_SCR); reg |= E1000_SCR_RGMII_POWER_UP; PHY_WRITE(sc, E1000_SCR, reg); PHY_WRITE(sc, E1000_EADR, 0); } } switch (sc->mii_mpd_model) { case MII_MODEL_xxMARVELL_E3082: case MII_MODEL_xxMARVELL_E1112: case MII_MODEL_xxMARVELL_E1118: break; case MII_MODEL_xxMARVELL_E1116: case MII_MODEL_xxMARVELL_E1116R_29: page = PHY_READ(sc, E1000_EADR); /* Select page 3, LED control register. */ PHY_WRITE(sc, E1000_EADR, 3); PHY_WRITE(sc, E1000_SCR, E1000_SCR_LED_LOS(1) | /* Link/Act */ E1000_SCR_LED_INIT(8) | /* 10Mbps */ E1000_SCR_LED_STAT1(7) | /* 100Mbps */ E1000_SCR_LED_STAT0(7)); /* 1000Mbps */ /* Set blink rate. */ PHY_WRITE(sc, E1000_IER, E1000_PULSE_DUR(E1000_PULSE_170MS) | E1000_BLINK_RATE(E1000_BLINK_84MS)); PHY_WRITE(sc, E1000_EADR, page); break; case MII_MODEL_xxMARVELL_E3016: /* LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED. */ PHY_WRITE(sc, 0x16, 0x0B << 8 | 0x05 << 4 | 0x04); /* Integrated register calibration workaround. */ PHY_WRITE(sc, 0x1D, 17); PHY_WRITE(sc, 0x1E, 0x3F60); break; default: /* Force TX_CLK to 25MHz clock. */ reg = PHY_READ(sc, E1000_ESCR); reg |= E1000_ESCR_TX_CLK_25; PHY_WRITE(sc, E1000_ESCR, reg); break; } /* Reset the PHY so all changes take effect. */ reg = PHY_READ(sc, E1000_CR); reg |= E1000_CR_RESET; PHY_WRITE(sc, E1000_CR, reg); } static int e1000phy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) { struct ifmedia_entry *ife = mii->mii_media.ifm_cur; uint16_t speed, gig; int reg; switch (cmd) { case MII_POLLSTAT: break; case MII_MEDIACHG: if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { e1000phy_mii_phy_auto(sc, ife->ifm_media); break; } speed = 0; switch (IFM_SUBTYPE(ife->ifm_media)) { case IFM_1000_T: if ((sc->mii_flags & MIIF_HAVE_GTCR) == 0) return (EINVAL); speed = E1000_CR_SPEED_1000; break; case IFM_1000_SX: if ((sc->mii_extcapabilities & (EXTSR_1000XFDX | EXTSR_1000XHDX)) == 0) return (EINVAL); speed = E1000_CR_SPEED_1000; break; case IFM_100_TX: speed = E1000_CR_SPEED_100; break; case IFM_10_T: speed = E1000_CR_SPEED_10; break; case IFM_NONE: reg = PHY_READ(sc, E1000_CR); PHY_WRITE(sc, E1000_CR, reg | E1000_CR_ISOLATE | E1000_CR_POWER_DOWN); goto done; default: return (EINVAL); } if ((ife->ifm_media & IFM_FDX) != 0) { speed |= E1000_CR_FULL_DUPLEX; gig = E1000_1GCR_1000T_FD; } else gig = E1000_1GCR_1000T; reg = PHY_READ(sc, E1000_CR); reg &= ~E1000_CR_AUTO_NEG_ENABLE; PHY_WRITE(sc, E1000_CR, reg | E1000_CR_RESET); if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { gig |= E1000_1GCR_MS_ENABLE; if ((ife->ifm_media & IFM_ETH_MASTER) != 0) gig |= E1000_1GCR_MS_VALUE; } else if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) gig = 0; PHY_WRITE(sc, E1000_1GCR, gig); PHY_WRITE(sc, E1000_AR, E1000_AR_SELECTOR_FIELD); PHY_WRITE(sc, E1000_CR, speed | E1000_CR_RESET); done: break; case MII_TICK: /* * Only used for autonegotiation. */ if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { sc->mii_ticks = 0; break; } /* * check for link. * Read the status register twice; BMSR_LINK is latch-low. */ reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); if (reg & BMSR_LINK) { sc->mii_ticks = 0; break; } /* Announce link loss right after it happens. */ if (sc->mii_ticks++ == 0) break; if (sc->mii_ticks <= sc->mii_anegticks) break; sc->mii_ticks = 0; PHY_RESET(sc); e1000phy_mii_phy_auto(sc, ife->ifm_media); break; } /* Update the media status. */ PHY_STATUS(sc); /* Callback if something changed. */ mii_phy_update(sc, cmd); return (0); } static void e1000phy_status(struct mii_softc *sc) { struct mii_data *mii = sc->mii_pdata; int bmcr, bmsr, ssr; mii->mii_media_status = IFM_AVALID; mii->mii_media_active = IFM_ETHER; bmsr = PHY_READ(sc, E1000_SR) | PHY_READ(sc, E1000_SR); bmcr = PHY_READ(sc, E1000_CR); ssr = PHY_READ(sc, E1000_SSR); if (bmsr & E1000_SR_LINK_STATUS) mii->mii_media_status |= IFM_ACTIVE; if (bmcr & E1000_CR_LOOPBACK) mii->mii_media_active |= IFM_LOOP; if ((bmcr & E1000_CR_AUTO_NEG_ENABLE) != 0 && (ssr & E1000_SSR_SPD_DPLX_RESOLVED) == 0) { /* Erg, still trying, I guess... */ mii->mii_media_active |= IFM_NONE; return; } if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { switch (ssr & E1000_SSR_SPEED) { case E1000_SSR_1000MBS: mii->mii_media_active |= IFM_1000_T; break; case E1000_SSR_100MBS: mii->mii_media_active |= IFM_100_TX; break; case E1000_SSR_10MBS: mii->mii_media_active |= IFM_10_T; break; default: mii->mii_media_active |= IFM_NONE; return; } } else { /* * Some fiber PHY(88E1112) does not seem to set resolved * speed so always assume we've got IFM_1000_SX. */ mii->mii_media_active |= IFM_1000_SX; } if (ssr & E1000_SSR_DUPLEX) { mii->mii_media_active |= IFM_FDX; if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) mii->mii_media_active |= mii_phy_flowstatus(sc); } else mii->mii_media_active |= IFM_HDX; if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) { if (((PHY_READ(sc, E1000_1GSR) | PHY_READ(sc, E1000_1GSR)) & E1000_1GSR_MS_CONFIG_RES) != 0) mii->mii_media_active |= IFM_ETH_MASTER; } } static int e1000phy_mii_phy_auto(struct mii_softc *sc, int media) { uint16_t reg; if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { reg = PHY_READ(sc, E1000_AR); reg &= ~(E1000_AR_PAUSE | E1000_AR_ASM_DIR); reg |= E1000_AR_10T | E1000_AR_10T_FD | E1000_AR_100TX | E1000_AR_100TX_FD; if ((media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0) reg |= E1000_AR_PAUSE | E1000_AR_ASM_DIR; PHY_WRITE(sc, E1000_AR, reg | E1000_AR_SELECTOR_FIELD); } else PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD | E1000_FA_1000X); if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) { reg = 0; if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) reg |= E1000_1GCR_1000T_FD; if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) reg |= E1000_1GCR_1000T; PHY_WRITE(sc, E1000_1GCR, reg); } PHY_WRITE(sc, E1000_CR, E1000_CR_AUTO_NEG_ENABLE | E1000_CR_RESTART_AUTO_NEG); return (EJUSTRETURN); } Index: head/sys/dev/mii/ip1000phy.c =================================================================== --- head/sys/dev/mii/ip1000phy.c (revision 277092) +++ head/sys/dev/mii/ip1000phy.c (revision 277093) @@ -1,354 +1,354 @@ /*- * Copyright (c) 2006, Pyun YongHyeon * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice unmodified, this list of conditions, and the following * disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * */ #include __FBSDID("$FreeBSD$"); /* * Driver for the IC Plus IP1000A/IP1001 10/100/1000 PHY. */ #include #include #include #include #include #include #include #include #include #include #include #include #include "miidevs.h" #include #include "miibus_if.h" #include #include static int ip1000phy_probe(device_t); static int ip1000phy_attach(device_t); static device_method_t ip1000phy_methods[] = { /* device interface */ DEVMETHOD(device_probe, ip1000phy_probe), DEVMETHOD(device_attach, ip1000phy_attach), DEVMETHOD(device_detach, mii_phy_detach), DEVMETHOD(device_shutdown, bus_generic_shutdown), DEVMETHOD_END }; static devclass_t ip1000phy_devclass; static driver_t ip1000phy_driver = { "ip1000phy", ip1000phy_methods, sizeof(struct mii_softc) }; DRIVER_MODULE(ip1000phy, miibus, ip1000phy_driver, ip1000phy_devclass, 0, 0); static int ip1000phy_service(struct mii_softc *, struct mii_data *, int); static void ip1000phy_status(struct mii_softc *); static void ip1000phy_reset(struct mii_softc *); static int ip1000phy_mii_phy_auto(struct mii_softc *, int); static const struct mii_phydesc ip1000phys[] = { MII_PHY_DESC(xxICPLUS, IP1000A), MII_PHY_DESC(xxICPLUS, IP1001), MII_PHY_END }; static const struct mii_phy_funcs ip1000phy_funcs = { ip1000phy_service, ip1000phy_status, ip1000phy_reset }; static int ip1000phy_probe(device_t dev) { return (mii_phy_dev_probe(dev, ip1000phys, BUS_PROBE_DEFAULT)); } static int ip1000phy_attach(device_t dev) { struct mii_attach_args *ma; u_int flags; ma = device_get_ivars(dev); flags = MIIF_NOISOLATE | MIIF_NOMANPAUSE; if (MII_MODEL(ma->mii_id2) == MII_MODEL_xxICPLUS_IP1000A && - strcmp(if_getdname(ma->mii_data->mii_ifp), "stge") == 0 && + mii_dev_mac_match(dev, "stge") && (miibus_get_flags(dev) & MIIF_MACPRIV0) != 0) flags |= MIIF_PHYPRIV0; mii_phy_dev_attach(dev, flags, &ip1000phy_funcs, 1); return (0); } static int ip1000phy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) { struct ifmedia_entry *ife = mii->mii_media.ifm_cur; uint32_t gig, reg, speed; switch (cmd) { case MII_POLLSTAT: break; case MII_MEDIACHG: PHY_RESET(sc); switch (IFM_SUBTYPE(ife->ifm_media)) { case IFM_AUTO: (void)ip1000phy_mii_phy_auto(sc, ife->ifm_media); goto done; case IFM_1000_T: /* * XXX * Manual 1000baseT setting doesn't seem to work. */ speed = IP1000PHY_BMCR_1000; break; case IFM_100_TX: speed = IP1000PHY_BMCR_100; break; case IFM_10_T: speed = IP1000PHY_BMCR_10; break; default: return (EINVAL); } if ((ife->ifm_media & IFM_FDX) != 0) { speed |= IP1000PHY_BMCR_FDX; gig = IP1000PHY_1000CR_1000T_FDX; } else gig = IP1000PHY_1000CR_1000T; if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { gig |= IP1000PHY_1000CR_MASTER | IP1000PHY_1000CR_MANUAL; if ((ife->ifm_media & IFM_ETH_MASTER) != 0) gig |= IP1000PHY_1000CR_MMASTER; } else gig = 0; PHY_WRITE(sc, IP1000PHY_MII_1000CR, gig); PHY_WRITE(sc, IP1000PHY_MII_BMCR, speed); done: break; case MII_TICK: /* * Only used for autonegotiation. */ if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { sc->mii_ticks = 0; break; } /* * check for link. */ reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); if (reg & BMSR_LINK) { sc->mii_ticks = 0; break; } /* Announce link loss right after it happens */ if (sc->mii_ticks++ == 0) break; /* * Only retry autonegotiation every mii_anegticks seconds. */ if (sc->mii_ticks <= sc->mii_anegticks) break; sc->mii_ticks = 0; ip1000phy_mii_phy_auto(sc, ife->ifm_media); break; } /* Update the media status. */ PHY_STATUS(sc); /* Callback if something changed. */ mii_phy_update(sc, cmd); return (0); } static void ip1000phy_status(struct mii_softc *sc) { struct mii_data *mii = sc->mii_pdata; uint32_t bmsr, bmcr, stat; mii->mii_media_status = IFM_AVALID; mii->mii_media_active = IFM_ETHER; bmsr = PHY_READ(sc, IP1000PHY_MII_BMSR) | PHY_READ(sc, IP1000PHY_MII_BMSR); if ((bmsr & IP1000PHY_BMSR_LINK) != 0) mii->mii_media_status |= IFM_ACTIVE; bmcr = PHY_READ(sc, IP1000PHY_MII_BMCR); if ((bmcr & IP1000PHY_BMCR_LOOP) != 0) mii->mii_media_active |= IFM_LOOP; if ((bmcr & IP1000PHY_BMCR_AUTOEN) != 0) { if ((bmsr & IP1000PHY_BMSR_ANEGCOMP) == 0) { /* Erg, still trying, I guess... */ mii->mii_media_active |= IFM_NONE; return; } } if (sc->mii_mpd_model == MII_MODEL_xxICPLUS_IP1001) { stat = PHY_READ(sc, IP1000PHY_LSR); switch (stat & IP1000PHY_LSR_SPEED_MASK) { case IP1000PHY_LSR_SPEED_10: mii->mii_media_active |= IFM_10_T; break; case IP1000PHY_LSR_SPEED_100: mii->mii_media_active |= IFM_100_TX; break; case IP1000PHY_LSR_SPEED_1000: mii->mii_media_active |= IFM_1000_T; break; default: mii->mii_media_active |= IFM_NONE; return; } if ((stat & IP1000PHY_LSR_FULL_DUPLEX) != 0) mii->mii_media_active |= IFM_FDX; else mii->mii_media_active |= IFM_HDX; } else { stat = PHY_READ(sc, STGE_PhyCtrl); switch (PC_LinkSpeed(stat)) { case PC_LinkSpeed_Down: mii->mii_media_active |= IFM_NONE; return; case PC_LinkSpeed_10: mii->mii_media_active |= IFM_10_T; break; case PC_LinkSpeed_100: mii->mii_media_active |= IFM_100_TX; break; case PC_LinkSpeed_1000: mii->mii_media_active |= IFM_1000_T; break; default: mii->mii_media_active |= IFM_NONE; return; } if ((stat & PC_PhyDuplexStatus) != 0) mii->mii_media_active |= IFM_FDX; else mii->mii_media_active |= IFM_HDX; } if ((mii->mii_media_active & IFM_FDX) != 0) mii->mii_media_active |= mii_phy_flowstatus(sc); if ((mii->mii_media_active & IFM_1000_T) != 0) { stat = PHY_READ(sc, IP1000PHY_MII_1000SR); if ((stat & IP1000PHY_1000SR_MASTER) != 0) mii->mii_media_active |= IFM_ETH_MASTER; } } static int ip1000phy_mii_phy_auto(struct mii_softc *sc, int media) { uint32_t reg; reg = 0; if (sc->mii_mpd_model == MII_MODEL_xxICPLUS_IP1001) { reg = PHY_READ(sc, IP1000PHY_MII_ANAR); reg &= ~(IP1000PHY_ANAR_PAUSE | IP1000PHY_ANAR_APAUSE); reg |= IP1000PHY_ANAR_NP; } reg |= IP1000PHY_ANAR_10T | IP1000PHY_ANAR_10T_FDX | IP1000PHY_ANAR_100TX | IP1000PHY_ANAR_100TX_FDX; if ((media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0) reg |= IP1000PHY_ANAR_PAUSE | IP1000PHY_ANAR_APAUSE; PHY_WRITE(sc, IP1000PHY_MII_ANAR, reg | IP1000PHY_ANAR_CSMA); reg = IP1000PHY_1000CR_1000T | IP1000PHY_1000CR_1000T_FDX; if (sc->mii_mpd_model != MII_MODEL_xxICPLUS_IP1001) reg |= IP1000PHY_1000CR_MASTER; PHY_WRITE(sc, IP1000PHY_MII_1000CR, reg); PHY_WRITE(sc, IP1000PHY_MII_BMCR, (IP1000PHY_BMCR_FDX | IP1000PHY_BMCR_AUTOEN | IP1000PHY_BMCR_STARTNEG)); return (EJUSTRETURN); } static void ip1000phy_load_dspcode(struct mii_softc *sc) { PHY_WRITE(sc, 31, 0x0001); PHY_WRITE(sc, 27, 0x01e0); PHY_WRITE(sc, 31, 0x0002); PHY_WRITE(sc, 27, 0xeb8e); PHY_WRITE(sc, 31, 0x0000); PHY_WRITE(sc, 30, 0x005e); PHY_WRITE(sc, 9, 0x0700); DELAY(50); } static void ip1000phy_reset(struct mii_softc *sc) { uint32_t reg; mii_phy_reset(sc); /* clear autoneg/full-duplex as we don't want it after reset */ reg = PHY_READ(sc, IP1000PHY_MII_BMCR); reg &= ~(IP1000PHY_BMCR_AUTOEN | IP1000PHY_BMCR_FDX); PHY_WRITE(sc, MII_BMCR, reg); if ((sc->mii_flags & MIIF_PHYPRIV0) != 0) ip1000phy_load_dspcode(sc); } Index: head/sys/dev/mii/jmphy.c =================================================================== --- head/sys/dev/mii/jmphy.c (revision 277092) +++ head/sys/dev/mii/jmphy.c (revision 277093) @@ -1,345 +1,345 @@ /*- * Copyright (c) 2008, Pyun YongHyeon * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice unmodified, this list of conditions, and the following * disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); /* * Driver for the JMicron JMP211 10/100/1000, JMP202 10/100 PHY. */ #include #include #include #include #include #include #include #include #include #include #include #include "miidevs.h" #include #include "miibus_if.h" static int jmphy_probe(device_t); static int jmphy_attach(device_t); static void jmphy_reset(struct mii_softc *); static uint16_t jmphy_anar(struct ifmedia_entry *); static int jmphy_setmedia(struct mii_softc *, struct ifmedia_entry *); static device_method_t jmphy_methods[] = { /* Device interface. */ DEVMETHOD(device_probe, jmphy_probe), DEVMETHOD(device_attach, jmphy_attach), DEVMETHOD(device_detach, mii_phy_detach), DEVMETHOD(device_shutdown, bus_generic_shutdown), DEVMETHOD_END }; static devclass_t jmphy_devclass; static driver_t jmphy_driver = { "jmphy", jmphy_methods, sizeof(struct mii_softc) }; DRIVER_MODULE(jmphy, miibus, jmphy_driver, jmphy_devclass, 0, 0); static int jmphy_service(struct mii_softc *, struct mii_data *, int); static void jmphy_status(struct mii_softc *); static const struct mii_phydesc jmphys[] = { MII_PHY_DESC(JMICRON, JMP202), MII_PHY_DESC(JMICRON, JMP211), MII_PHY_END }; static const struct mii_phy_funcs jmphy_funcs = { jmphy_service, jmphy_status, jmphy_reset }; static int jmphy_probe(device_t dev) { return (mii_phy_dev_probe(dev, jmphys, BUS_PROBE_DEFAULT)); } static int jmphy_attach(device_t dev) { struct mii_attach_args *ma; u_int flags; ma = device_get_ivars(dev); flags = 0; - if (strcmp(if_getdname(ma->mii_data->mii_ifp), "jme") == 0 && + if (mii_dev_mac_match(dev, "jme") && (miibus_get_flags(dev) & MIIF_MACPRIV0) != 0) flags |= MIIF_PHYPRIV0; mii_phy_dev_attach(dev, flags, &jmphy_funcs, 1); return (0); } static int jmphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) { struct ifmedia_entry *ife = mii->mii_media.ifm_cur; switch (cmd) { case MII_POLLSTAT: break; case MII_MEDIACHG: if (jmphy_setmedia(sc, ife) != EJUSTRETURN) return (EINVAL); break; case MII_TICK: /* * Only used for autonegotiation. */ if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { sc->mii_ticks = 0; break; } /* Check for link. */ if ((PHY_READ(sc, JMPHY_SSR) & JMPHY_SSR_LINK_UP) != 0) { sc->mii_ticks = 0; break; } /* Announce link loss right after it happens. */ if (sc->mii_ticks++ == 0) break; if (sc->mii_ticks <= sc->mii_anegticks) return (0); sc->mii_ticks = 0; (void)jmphy_setmedia(sc, ife); break; } /* Update the media status. */ PHY_STATUS(sc); /* Callback if something changed. */ mii_phy_update(sc, cmd); return (0); } static void jmphy_status(struct mii_softc *sc) { struct mii_data *mii = sc->mii_pdata; int bmcr, ssr; mii->mii_media_status = IFM_AVALID; mii->mii_media_active = IFM_ETHER; ssr = PHY_READ(sc, JMPHY_SSR); if ((ssr & JMPHY_SSR_LINK_UP) != 0) mii->mii_media_status |= IFM_ACTIVE; bmcr = PHY_READ(sc, MII_BMCR); if ((bmcr & BMCR_ISO) != 0) { mii->mii_media_active |= IFM_NONE; mii->mii_media_status = 0; return; } if ((bmcr & BMCR_LOOP) != 0) mii->mii_media_active |= IFM_LOOP; if ((ssr & JMPHY_SSR_SPD_DPLX_RESOLVED) == 0) { /* Erg, still trying, I guess... */ mii->mii_media_active |= IFM_NONE; return; } switch ((ssr & JMPHY_SSR_SPEED_MASK)) { case JMPHY_SSR_SPEED_1000: mii->mii_media_active |= IFM_1000_T; /* * jmphy(4) got a valid link so reset mii_ticks. * Resetting mii_ticks is needed in order to * detect link loss after auto-negotiation. */ sc->mii_ticks = 0; break; case JMPHY_SSR_SPEED_100: mii->mii_media_active |= IFM_100_TX; sc->mii_ticks = 0; break; case JMPHY_SSR_SPEED_10: mii->mii_media_active |= IFM_10_T; sc->mii_ticks = 0; break; default: mii->mii_media_active |= IFM_NONE; return; } if ((ssr & JMPHY_SSR_DUPLEX) != 0) mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc); else mii->mii_media_active |= IFM_HDX; if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) { if ((PHY_READ(sc, MII_100T2SR) & GTSR_MS_RES) != 0) mii->mii_media_active |= IFM_ETH_MASTER; } } static void jmphy_reset(struct mii_softc *sc) { uint16_t t2cr, val; int i; /* Disable sleep mode. */ PHY_WRITE(sc, JMPHY_TMCTL, PHY_READ(sc, JMPHY_TMCTL) & ~JMPHY_TMCTL_SLEEP_ENB); PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN); for (i = 0; i < 1000; i++) { DELAY(1); if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0) break; } /* Perform vendor recommended PHY calibration. */ if ((sc->mii_flags & MIIF_PHYPRIV0) != 0) { /* Select PHY test mode 1. */ t2cr = PHY_READ(sc, MII_100T2CR); t2cr &= ~GTCR_TEST_MASK; t2cr |= 0x2000; PHY_WRITE(sc, MII_100T2CR, t2cr); /* Apply calibration patch. */ PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_READ | JMPHY_EXT_COMM_2); val = PHY_READ(sc, JMPHY_SPEC_DATA); val &= ~0x0002; val |= 0x0010 | 0x0001; PHY_WRITE(sc, JMPHY_SPEC_DATA, val); PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_WRITE | JMPHY_EXT_COMM_2); /* XXX 20ms to complete recalibration. */ DELAY(20 * 1000); PHY_READ(sc, MII_100T2CR); PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_READ | JMPHY_EXT_COMM_2); val = PHY_READ(sc, JMPHY_SPEC_DATA); val &= ~(0x0001 | 0x0002 | 0x0010); PHY_WRITE(sc, JMPHY_SPEC_DATA, val); PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_WRITE | JMPHY_EXT_COMM_2); /* Disable PHY test mode. */ PHY_READ(sc, MII_100T2CR); t2cr &= ~GTCR_TEST_MASK; PHY_WRITE(sc, MII_100T2CR, t2cr); } } static uint16_t jmphy_anar(struct ifmedia_entry *ife) { uint16_t anar; anar = 0; switch (IFM_SUBTYPE(ife->ifm_media)) { case IFM_AUTO: anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10; break; case IFM_1000_T: break; case IFM_100_TX: anar |= ANAR_TX | ANAR_TX_FD; break; case IFM_10_T: anar |= ANAR_10 | ANAR_10_FD; break; default: break; } return (anar); } static int jmphy_setmedia(struct mii_softc *sc, struct ifmedia_entry *ife) { uint16_t anar, bmcr, gig; gig = 0; bmcr = PHY_READ(sc, MII_BMCR); switch (IFM_SUBTYPE(ife->ifm_media)) { case IFM_AUTO: gig |= GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX; break; case IFM_1000_T: gig |= GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX; break; case IFM_100_TX: case IFM_10_T: break; case IFM_NONE: PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO | BMCR_PDOWN); return (EJUSTRETURN); default: return (EINVAL); } anar = jmphy_anar(ife); if ((IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO || (ife->ifm_media & IFM_FDX) != 0) && ((ife->ifm_media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0)) anar |= ANAR_PAUSE_TOWARDS; if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) { if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { gig |= GTCR_MAN_MS; if ((ife->ifm_media & IFM_ETH_MASTER) != 0) gig |= GTCR_ADV_MS; } PHY_WRITE(sc, MII_100T2CR, gig); } PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA); PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_AUTOEN | BMCR_STARTNEG); return (EJUSTRETURN); } Index: head/sys/dev/mii/mii.c =================================================================== --- head/sys/dev/mii/mii.c (revision 277092) +++ head/sys/dev/mii/mii.c (revision 277093) @@ -1,647 +1,677 @@ /* $NetBSD: mii.c,v 1.12 1999/08/03 19:41:49 drochner Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, * NASA Ames Research Center. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); /* * MII bus layer, glues MII-capable network interface drivers to sharable * PHY drivers. This exports an interface compatible with BSD/OS 3.0's, * plus some NetBSD extensions. */ #include #include #include #include #include #include #include #include #include #include #include MODULE_VERSION(miibus, 1); #include "miibus_if.h" static device_attach_t miibus_attach; static bus_child_location_str_t miibus_child_location_str; static bus_child_pnpinfo_str_t miibus_child_pnpinfo_str; static device_detach_t miibus_detach; static bus_hinted_child_t miibus_hinted_child; static bus_print_child_t miibus_print_child; static device_probe_t miibus_probe; static bus_read_ivar_t miibus_read_ivar; static miibus_readreg_t miibus_readreg; static miibus_statchg_t miibus_statchg; static miibus_writereg_t miibus_writereg; static miibus_linkchg_t miibus_linkchg; static miibus_mediainit_t miibus_mediainit; static unsigned char mii_bitreverse(unsigned char x); static device_method_t miibus_methods[] = { /* device interface */ DEVMETHOD(device_probe, miibus_probe), DEVMETHOD(device_attach, miibus_attach), DEVMETHOD(device_detach, miibus_detach), DEVMETHOD(device_shutdown, bus_generic_shutdown), /* bus interface */ DEVMETHOD(bus_print_child, miibus_print_child), DEVMETHOD(bus_read_ivar, miibus_read_ivar), DEVMETHOD(bus_child_pnpinfo_str, miibus_child_pnpinfo_str), DEVMETHOD(bus_child_location_str, miibus_child_location_str), DEVMETHOD(bus_hinted_child, miibus_hinted_child), /* MII interface */ DEVMETHOD(miibus_readreg, miibus_readreg), DEVMETHOD(miibus_writereg, miibus_writereg), DEVMETHOD(miibus_statchg, miibus_statchg), DEVMETHOD(miibus_linkchg, miibus_linkchg), DEVMETHOD(miibus_mediainit, miibus_mediainit), DEVMETHOD_END }; devclass_t miibus_devclass; driver_t miibus_driver = { "miibus", miibus_methods, sizeof(struct mii_data) }; struct miibus_ivars { if_t ifp; ifm_change_cb_t ifmedia_upd; ifm_stat_cb_t ifmedia_sts; u_int mii_flags; u_int mii_offset; }; static int miibus_probe(device_t dev) { device_set_desc(dev, "MII bus"); return (BUS_PROBE_SPECIFIC); } static int miibus_attach(device_t dev) { struct miibus_ivars *ivars; struct mii_attach_args *ma; struct mii_data *mii; device_t *children; int i, nchildren; mii = device_get_softc(dev); if (device_get_children(dev, &children, &nchildren) == 0) { for (i = 0; i < nchildren; i++) { ma = device_get_ivars(children[i]); ma->mii_data = mii; } free(children, M_TEMP); } if (nchildren == 0) { device_printf(dev, "cannot get children\n"); return (ENXIO); } ivars = device_get_ivars(dev); ifmedia_init(&mii->mii_media, IFM_IMASK, ivars->ifmedia_upd, ivars->ifmedia_sts); mii->mii_ifp = ivars->ifp; if_setcapabilitiesbit(mii->mii_ifp, IFCAP_LINKSTATE, 0); if_setcapenablebit(mii->mii_ifp, IFCAP_LINKSTATE, 0); LIST_INIT(&mii->mii_phys); return (bus_generic_attach(dev)); } static int miibus_detach(device_t dev) { struct mii_data *mii; bus_generic_detach(dev); mii = device_get_softc(dev); ifmedia_removeall(&mii->mii_media); mii->mii_ifp = NULL; return (0); } static int miibus_print_child(device_t dev, device_t child) { struct mii_attach_args *ma; int retval; ma = device_get_ivars(child); retval = bus_print_child_header(dev, child); retval += printf(" PHY %d", ma->mii_phyno); retval += bus_print_child_footer(dev, child); return (retval); } static int miibus_read_ivar(device_t dev, device_t child __unused, int which, uintptr_t *result) { struct miibus_ivars *ivars; /* * NB: this uses the instance variables of the miibus rather than * its PHY children. */ ivars = device_get_ivars(dev); switch (which) { case MIIBUS_IVAR_FLAGS: *result = ivars->mii_flags; break; default: return (ENOENT); } return (0); } static int miibus_child_pnpinfo_str(device_t dev __unused, device_t child, char *buf, size_t buflen) { struct mii_attach_args *ma; ma = device_get_ivars(child); snprintf(buf, buflen, "oui=0x%x model=0x%x rev=0x%x", MII_OUI(ma->mii_id1, ma->mii_id2), MII_MODEL(ma->mii_id2), MII_REV(ma->mii_id2)); return (0); } static int miibus_child_location_str(device_t dev __unused, device_t child, char *buf, size_t buflen) { struct mii_attach_args *ma; ma = device_get_ivars(child); snprintf(buf, buflen, "phyno=%d", ma->mii_phyno); return (0); } static void miibus_hinted_child(device_t dev, const char *name, int unit) { struct miibus_ivars *ivars; struct mii_attach_args *args, *ma; device_t *children, phy; int i, nchildren; u_int val; if (resource_int_value(name, unit, "phyno", &val) != 0) return; if (device_get_children(dev, &children, &nchildren) != 0) return; ma = NULL; for (i = 0; i < nchildren; i++) { args = device_get_ivars(children[i]); if (args->mii_phyno == val) { ma = args; break; } } free(children, M_TEMP); /* * Don't add a PHY that was automatically identified by having media * in its BMSR twice, only allow to alter its attach arguments. */ if (ma == NULL) { ma = malloc(sizeof(struct mii_attach_args), M_DEVBUF, M_NOWAIT); if (ma == NULL) return; phy = device_add_child(dev, name, unit); if (phy == NULL) { free(ma, M_DEVBUF); return; } ivars = device_get_ivars(dev); ma->mii_phyno = val; ma->mii_offset = ivars->mii_offset++; ma->mii_id1 = 0; ma->mii_id2 = 0; ma->mii_capmask = BMSR_DEFCAPMASK; device_set_ivars(phy, ma); } if (resource_int_value(name, unit, "id1", &val) == 0) ma->mii_id1 = val; if (resource_int_value(name, unit, "id2", &val) == 0) ma->mii_id2 = val; if (resource_int_value(name, unit, "capmask", &val) == 0) ma->mii_capmask = val; } static int miibus_readreg(device_t dev, int phy, int reg) { device_t parent; parent = device_get_parent(dev); return (MIIBUS_READREG(parent, phy, reg)); } static int miibus_writereg(device_t dev, int phy, int reg, int data) { device_t parent; parent = device_get_parent(dev); return (MIIBUS_WRITEREG(parent, phy, reg, data)); } static void miibus_statchg(device_t dev) { device_t parent; struct mii_data *mii; parent = device_get_parent(dev); MIIBUS_STATCHG(parent); mii = device_get_softc(dev); if_setbaudrate(mii->mii_ifp, ifmedia_baudrate(mii->mii_media_active)); } static void miibus_linkchg(device_t dev) { struct mii_data *mii; device_t parent; int link_state; parent = device_get_parent(dev); MIIBUS_LINKCHG(parent); mii = device_get_softc(dev); if (mii->mii_media_status & IFM_AVALID) { if (mii->mii_media_status & IFM_ACTIVE) link_state = LINK_STATE_UP; else link_state = LINK_STATE_DOWN; } else link_state = LINK_STATE_UNKNOWN; if_link_state_change(mii->mii_ifp, link_state); } static void miibus_mediainit(device_t dev) { struct mii_data *mii; struct ifmedia_entry *m; int media = 0; /* Poke the parent in case it has any media of its own to add. */ MIIBUS_MEDIAINIT(device_get_parent(dev)); mii = device_get_softc(dev); LIST_FOREACH(m, &mii->mii_media.ifm_list, ifm_list) { media = m->ifm_media; if (media == (IFM_ETHER | IFM_AUTO)) break; } ifmedia_set(&mii->mii_media, media); } /* * Helper function used by network interface drivers, attaches the miibus and * the PHYs to the network interface driver parent. */ int mii_attach(device_t dev, device_t *miibus, if_t ifp, ifm_change_cb_t ifmedia_upd, ifm_stat_cb_t ifmedia_sts, int capmask, int phyloc, int offloc, int flags) { struct miibus_ivars *ivars; struct mii_attach_args *args, ma; device_t *children, phy; int bmsr, first, i, nchildren, phymax, phymin, rv; uint32_t phymask; if (phyloc != MII_PHY_ANY && offloc != MII_OFFSET_ANY) { printf("%s: phyloc and offloc specified\n", __func__); return (EINVAL); } if (offloc != MII_OFFSET_ANY && (offloc < 0 || offloc >= MII_NPHY)) { printf("%s: ivalid offloc %d\n", __func__, offloc); return (EINVAL); } if (phyloc == MII_PHY_ANY) { phymin = 0; phymax = MII_NPHY - 1; } else { if (phyloc < 0 || phyloc >= MII_NPHY) { printf("%s: ivalid phyloc %d\n", __func__, phyloc); return (EINVAL); } phymin = phymax = phyloc; } first = 0; if (*miibus == NULL) { first = 1; ivars = malloc(sizeof(*ivars), M_DEVBUF, M_NOWAIT); if (ivars == NULL) return (ENOMEM); ivars->ifp = ifp; ivars->ifmedia_upd = ifmedia_upd; ivars->ifmedia_sts = ifmedia_sts; ivars->mii_flags = flags; *miibus = device_add_child(dev, "miibus", -1); if (*miibus == NULL) { rv = ENXIO; goto fail; } device_set_ivars(*miibus, ivars); } else { ivars = device_get_ivars(*miibus); if (ivars->ifp != ifp || ivars->ifmedia_upd != ifmedia_upd || ivars->ifmedia_sts != ifmedia_sts || ivars->mii_flags != flags) { printf("%s: non-matching invariant\n", __func__); return (EINVAL); } /* * Assignment of the attach arguments mii_data for the first * pass is done in miibus_attach(), i.e. once the miibus softc * has been allocated. */ ma.mii_data = device_get_softc(*miibus); } ma.mii_capmask = capmask; if (resource_int_value(device_get_name(*miibus), device_get_unit(*miibus), "phymask", &phymask) != 0) phymask = 0xffffffff; if (device_get_children(*miibus, &children, &nchildren) != 0) { children = NULL; nchildren = 0; } ivars->mii_offset = 0; for (ma.mii_phyno = phymin; ma.mii_phyno <= phymax; ma.mii_phyno++) { /* * Make sure we haven't already configured a PHY at this * address. This allows mii_attach() to be called * multiple times. */ for (i = 0; i < nchildren; i++) { args = device_get_ivars(children[i]); if (args->mii_phyno == ma.mii_phyno) { /* * Yes, there is already something * configured at this address. */ goto skip; } } /* * Check to see if there is a PHY at this address. Note, * many braindead PHYs report 0/0 in their ID registers, * so we test for media in the BMSR. */ bmsr = MIIBUS_READREG(dev, ma.mii_phyno, MII_BMSR); if (bmsr == 0 || bmsr == 0xffff || (bmsr & (BMSR_EXTSTAT | BMSR_MEDIAMASK)) == 0) { /* Assume no PHY at this address. */ continue; } /* * There is a PHY at this address. If we were given an * `offset' locator, skip this PHY if it doesn't match. */ if (offloc != MII_OFFSET_ANY && offloc != ivars->mii_offset) goto skip; /* * Skip this PHY if it's not included in the phymask hint. */ if ((phymask & (1 << ma.mii_phyno)) == 0) goto skip; /* * Extract the IDs. Braindead PHYs will be handled by * the `ukphy' driver, as we have no ID information to * match on. */ ma.mii_id1 = MIIBUS_READREG(dev, ma.mii_phyno, MII_PHYIDR1); ma.mii_id2 = MIIBUS_READREG(dev, ma.mii_phyno, MII_PHYIDR2); ma.mii_offset = ivars->mii_offset; args = malloc(sizeof(struct mii_attach_args), M_DEVBUF, M_NOWAIT); if (args == NULL) goto skip; bcopy((char *)&ma, (char *)args, sizeof(ma)); phy = device_add_child(*miibus, NULL, -1); if (phy == NULL) { free(args, M_DEVBUF); goto skip; } device_set_ivars(phy, args); skip: ivars->mii_offset++; } free(children, M_TEMP); if (first != 0) { rv = device_set_driver(*miibus, &miibus_driver); if (rv != 0) goto fail; bus_enumerate_hinted_children(*miibus); rv = device_get_children(*miibus, &children, &nchildren); if (rv != 0) goto fail; free(children, M_TEMP); if (nchildren == 0) { rv = ENXIO; goto fail; } rv = bus_generic_attach(dev); if (rv != 0) goto fail; /* Attaching of the PHY drivers is done in miibus_attach(). */ return (0); } rv = bus_generic_attach(*miibus); if (rv != 0) goto fail; return (0); fail: if (*miibus != NULL) device_delete_child(dev, *miibus); free(ivars, M_DEVBUF); if (first != 0) *miibus = NULL; return (rv); } /* * Media changed; notify all PHYs. */ int mii_mediachg(struct mii_data *mii) { struct mii_softc *child; struct ifmedia_entry *ife = mii->mii_media.ifm_cur; int rv; mii->mii_media_status = 0; mii->mii_media_active = IFM_NONE; LIST_FOREACH(child, &mii->mii_phys, mii_list) { /* * If the media indicates a different PHY instance, * isolate this one. */ if (IFM_INST(ife->ifm_media) != child->mii_inst) { if ((child->mii_flags & MIIF_NOISOLATE) != 0) { device_printf(child->mii_dev, "%s: " "can't handle non-zero PHY instance %d\n", __func__, child->mii_inst); continue; } PHY_WRITE(child, MII_BMCR, PHY_READ(child, MII_BMCR) | BMCR_ISO); continue; } rv = PHY_SERVICE(child, mii, MII_MEDIACHG); if (rv) return (rv); } return (0); } /* * Call the PHY tick routines, used during autonegotiation. */ void mii_tick(struct mii_data *mii) { struct mii_softc *child; struct ifmedia_entry *ife = mii->mii_media.ifm_cur; LIST_FOREACH(child, &mii->mii_phys, mii_list) { /* * If this PHY instance isn't currently selected, just skip * it. */ if (IFM_INST(ife->ifm_media) != child->mii_inst) continue; (void)PHY_SERVICE(child, mii, MII_TICK); } } /* * Get media status from PHYs. */ void mii_pollstat(struct mii_data *mii) { struct mii_softc *child; struct ifmedia_entry *ife = mii->mii_media.ifm_cur; mii->mii_media_status = 0; mii->mii_media_active = IFM_NONE; LIST_FOREACH(child, &mii->mii_phys, mii_list) { /* * If we're not polling this PHY instance, just skip it. */ if (IFM_INST(ife->ifm_media) != child->mii_inst) continue; (void)PHY_SERVICE(child, mii, MII_POLLSTAT); } } /* * Inform the PHYs that the interface is down. */ void mii_down(struct mii_data *mii) { struct mii_softc *child; LIST_FOREACH(child, &mii->mii_phys, mii_list) mii_phy_down(child); } static unsigned char mii_bitreverse(unsigned char x) { static unsigned const char nibbletab[16] = { 0, 8, 4, 12, 2, 10, 6, 14, 1, 9, 5, 13, 3, 11, 7, 15 }; return ((nibbletab[x & 15] << 4) | nibbletab[x >> 4]); } u_int mii_oui(u_int id1, u_int id2) { u_int h; h = (id1 << 6) | (id2 >> 10); return ((mii_bitreverse(h >> 16) << 16) | (mii_bitreverse((h >> 8) & 0xff) << 8) | mii_bitreverse(h & 0xff)); } + +int +mii_phy_mac_match(struct mii_softc *mii, const char *name) +{ + + return (strcmp(device_get_name(device_get_parent(mii->mii_dev)), + name) == 0); +} + +int +mii_dev_mac_match(device_t parent, const char *name) +{ + + return (strcmp(device_get_name(device_get_parent( + device_get_parent(parent))), name) == 0); +} + +void * +mii_phy_mac_softc(struct mii_softc *mii) +{ + + return (device_get_softc(device_get_parent(mii->mii_dev))); +} + +void * +mii_dev_mac_softc(device_t parent) +{ + + return (device_get_softc(device_get_parent(device_get_parent(parent)))); +} Index: head/sys/dev/mii/miivar.h =================================================================== --- head/sys/dev/mii/miivar.h (revision 277092) +++ head/sys/dev/mii/miivar.h (revision 277093) @@ -1,284 +1,288 @@ /* $NetBSD: miivar.h,v 1.8 1999/04/23 04:24:32 thorpej Exp $ */ /*- * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, * NASA Ames Research Center. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD$ */ #ifndef _DEV_MII_MIIVAR_H_ #define _DEV_MII_MIIVAR_H_ #include #include /* XXX driver API temporary */ /* * Media Independent Interface data structure defintions */ struct mii_softc; /* * Callbacks from MII layer into network interface device driver. */ typedef int (*mii_readreg_t)(struct device *, int, int); typedef void (*mii_writereg_t)(struct device *, int, int, int); typedef void (*mii_statchg_t)(struct device *); /* * A network interface driver has one of these structures in its softc. * It is the interface from the network interface driver to the MII * layer. */ struct mii_data { struct ifmedia mii_media; /* media information */ if_t mii_ifp; /* pointer back to network interface */ /* * For network interfaces with multiple PHYs, a list of all * PHYs is required so they can all be notified when a media * request is made. */ LIST_HEAD(mii_listhead, mii_softc) mii_phys; u_int mii_instance; /* * PHY driver fills this in with active media status. */ u_int mii_media_status; u_int mii_media_active; /* * Calls from MII layer into network interface driver. */ mii_readreg_t mii_readreg; mii_writereg_t mii_writereg; mii_statchg_t mii_statchg; }; typedef struct mii_data mii_data_t; /* * Functions provided by the PHY to perform various functions. */ struct mii_phy_funcs { int (*pf_service)(struct mii_softc *, struct mii_data *, int); void (*pf_status)(struct mii_softc *); void (*pf_reset)(struct mii_softc *); }; /* * Requests that can be made to the downcall. */ #define MII_TICK 1 /* once-per-second tick */ #define MII_MEDIACHG 2 /* user changed media; perform the switch */ #define MII_POLLSTAT 3 /* user requested media status; fill it in */ /* * Each PHY driver's softc has one of these as the first member. * XXX This would be better named "phy_softc", but this is the name * XXX BSDI used, and we would like to have the same interface. */ struct mii_softc { device_t mii_dev; /* generic device glue */ LIST_ENTRY(mii_softc) mii_list; /* entry on parent's PHY list */ uint32_t mii_mpd_oui; /* the PHY's OUI (MII_OUI())*/ uint32_t mii_mpd_model; /* the PHY's model (MII_MODEL())*/ uint32_t mii_mpd_rev; /* the PHY's revision (MII_REV())*/ u_int mii_capmask; /* capability mask for BMSR */ u_int mii_phy; /* our MII address */ u_int mii_offset; /* first PHY, second PHY, etc. */ u_int mii_inst; /* instance for ifmedia */ /* Our PHY functions. */ const struct mii_phy_funcs *mii_funcs; struct mii_data *mii_pdata; /* pointer to parent's mii_data */ u_int mii_flags; /* misc. flags; see below */ u_int mii_capabilities; /* capabilities from BMSR */ u_int mii_extcapabilities; /* extended capabilities */ u_int mii_ticks; /* MII_TICK counter */ u_int mii_anegticks; /* ticks before retrying aneg */ u_int mii_media_active; /* last active media */ u_int mii_media_status; /* last active status */ }; typedef struct mii_softc mii_softc_t; /* mii_flags */ #define MIIF_INITDONE 0x00000001 /* has been initialized (mii_data) */ #define MIIF_NOISOLATE 0x00000002 /* do not isolate the PHY */ #if 0 #define MIIF_NOLOOP 0x00000004 /* no loopback capability */ #endif #define MIIF_DOINGAUTO 0x00000008 /* doing autonegotiation (mii_softc) */ #define MIIF_AUTOTSLEEP 0x00000010 /* use tsleep(), not callout() */ #define MIIF_HAVEFIBER 0x00000020 /* from parent: has fiber interface */ #define MIIF_HAVE_GTCR 0x00000040 /* has 100base-T2/1000base-T CR */ #define MIIF_IS_1000X 0x00000080 /* is a 1000BASE-X device */ #define MIIF_DOPAUSE 0x00000100 /* advertise PAUSE capability */ #define MIIF_IS_HPNA 0x00000200 /* is a HomePNA device */ #define MIIF_FORCEANEG 0x00000400 /* force auto-negotiation */ #define MIIF_NOMANPAUSE 0x00100000 /* no manual PAUSE selection */ #define MIIF_FORCEPAUSE 0x00200000 /* force PAUSE advertisement */ #define MIIF_MACPRIV0 0x01000000 /* private to the MAC driver */ #define MIIF_MACPRIV1 0x02000000 /* private to the MAC driver */ #define MIIF_MACPRIV2 0x04000000 /* private to the MAC driver */ #define MIIF_PHYPRIV0 0x10000000 /* private to the PHY driver */ #define MIIF_PHYPRIV1 0x20000000 /* private to the PHY driver */ #define MIIF_PHYPRIV2 0x40000000 /* private to the PHY driver */ /* Default mii_anegticks values */ #define MII_ANEGTICKS 5 #define MII_ANEGTICKS_GIGE 17 #define MIIF_INHERIT_MASK (MIIF_NOISOLATE|MIIF_NOLOOP|MIIF_AUTOTSLEEP) /* * Special `locators' passed to mii_attach(). If one of these is not * an `any' value, we look for *that* PHY and configure it. If both * are not `any', that is an error, and mii_attach() will fail. */ #define MII_OFFSET_ANY -1 #define MII_PHY_ANY -1 /* * Used to attach a PHY to a parent. */ struct mii_attach_args { struct mii_data *mii_data; /* pointer to parent data */ u_int mii_phyno; /* MII address */ u_int mii_offset; /* first PHY, second PHY, etc. */ uint32_t mii_id1; /* PHY ID register 1 */ uint32_t mii_id2; /* PHY ID register 2 */ u_int mii_capmask; /* capability mask for BMSR */ }; typedef struct mii_attach_args mii_attach_args_t; /* * Used to match a PHY. */ struct mii_phydesc { uint32_t mpd_oui; /* the PHY's OUI */ uint32_t mpd_model; /* the PHY's model */ const char *mpd_name; /* the PHY's name */ }; #define MII_PHY_DESC(a, b) { MII_OUI_ ## a, MII_MODEL_ ## a ## _ ## b, \ MII_STR_ ## a ## _ ## b } #define MII_PHY_END { 0, 0, NULL } /* * An array of these structures map MII media types to BMCR/ANAR settings. */ struct mii_media { u_int mm_bmcr; /* BMCR settings for this media */ u_int mm_anar; /* ANAR settings for this media */ u_int mm_gtcr; /* 100base-T2 or 1000base-T CR */ }; #define MII_MEDIA_NONE 0 #define MII_MEDIA_10_T 1 #define MII_MEDIA_10_T_FDX 2 #define MII_MEDIA_100_T4 3 #define MII_MEDIA_100_TX 4 #define MII_MEDIA_100_TX_FDX 5 #define MII_MEDIA_1000_X 6 #define MII_MEDIA_1000_X_FDX 7 #define MII_MEDIA_1000_T 8 #define MII_MEDIA_1000_T_FDX 9 #define MII_NMEDIA 10 #ifdef _KERNEL #define PHY_READ(p, r) \ MIIBUS_READREG((p)->mii_dev, (p)->mii_phy, (r)) #define PHY_WRITE(p, r, v) \ MIIBUS_WRITEREG((p)->mii_dev, (p)->mii_phy, (r), (v)) #define PHY_SERVICE(p, d, o) \ (*(p)->mii_funcs->pf_service)((p), (d), (o)) #define PHY_STATUS(p) \ (*(p)->mii_funcs->pf_status)(p) #define PHY_RESET(p) \ (*(p)->mii_funcs->pf_reset)(p) enum miibus_device_ivars { MIIBUS_IVAR_FLAGS }; /* * Simplified accessors for miibus */ #define MIIBUS_ACCESSOR(var, ivar, type) \ __BUS_ACCESSOR(miibus, var, MIIBUS, ivar, type) MIIBUS_ACCESSOR(flags, FLAGS, u_int) extern devclass_t miibus_devclass; extern driver_t miibus_driver; int mii_attach(device_t, device_t *, if_t, ifm_change_cb_t, ifm_stat_cb_t, int, int, int, int); void mii_down(struct mii_data *); int mii_mediachg(struct mii_data *); void mii_tick(struct mii_data *); void mii_pollstat(struct mii_data *); void mii_phy_add_media(struct mii_softc *); int mii_phy_auto(struct mii_softc *); int mii_phy_detach(device_t dev); void mii_phy_down(struct mii_softc *); u_int mii_phy_flowstatus(struct mii_softc *); void mii_phy_reset(struct mii_softc *); void mii_phy_setmedia(struct mii_softc *sc); void mii_phy_update(struct mii_softc *, int); int mii_phy_tick(struct mii_softc *); +int mii_phy_mac_match(struct mii_softc *, const char *); +int mii_dev_mac_match(device_t, const char *); +void *mii_phy_mac_softc(struct mii_softc *); +void *mii_dev_mac_softc(device_t); const struct mii_phydesc * mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd); const struct mii_phydesc * mii_phy_match_gen(const struct mii_attach_args *ma, const struct mii_phydesc *mpd, size_t endlen); int mii_phy_dev_probe(device_t dev, const struct mii_phydesc *mpd, int mrv); void mii_phy_dev_attach(device_t dev, u_int flags, const struct mii_phy_funcs *mpf, int add_media); void ukphy_status(struct mii_softc *); u_int mii_oui(u_int, u_int); #define MII_OUI(id1, id2) mii_oui(id1, id2) #define MII_MODEL(id2) (((id2) & IDR2_MODEL) >> 4) #define MII_REV(id2) ((id2) & IDR2_REV) #endif /* _KERNEL */ #endif /* _DEV_MII_MIIVAR_H_ */ Index: head/sys/dev/mii/mlphy.c =================================================================== --- head/sys/dev/mii/mlphy.c (revision 277092) +++ head/sys/dev/mii/mlphy.c (revision 277093) @@ -1,378 +1,377 @@ /*- * Copyright (c) 1997, 1998, 1999 * Bill Paul . All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Bill Paul. * 4. Neither the name of the author nor the names of any co-contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. * */ #include __FBSDID("$FreeBSD$"); /* * driver for Micro Linear 6692 PHYs * * The Micro Linear 6692 is a strange beast, and dealing with it using * this code framework is tricky. The 6692 is actually a 100Mbps-only * device, which means that a second PHY is required to support 10Mbps * modes. However, even though the 6692 does not support 10Mbps modes, * it can still advertise them when performing autonegotiation. If a * 10Mbps mode is negotiated, we must program the registers of the * companion PHY accordingly in addition to programming the registers * of the 6692. * * This device also does not have vendor/device ID registers. */ #include #include #include #include #include #include #include #include #include #include #include #include "miibus_if.h" #define ML_STATE_AUTO_SELF 1 #define ML_STATE_AUTO_OTHER 2 struct mlphy_softc { struct mii_softc ml_mii; device_t ml_dev; int ml_state; int ml_linked; }; static int mlphy_probe(device_t); static int mlphy_attach(device_t); static device_method_t mlphy_methods[] = { /* device interface */ DEVMETHOD(device_probe, mlphy_probe), DEVMETHOD(device_attach, mlphy_attach), DEVMETHOD(device_detach, mii_phy_detach), DEVMETHOD(device_shutdown, bus_generic_shutdown), DEVMETHOD_END }; static devclass_t mlphy_devclass; static driver_t mlphy_driver = { "mlphy", mlphy_methods, sizeof(struct mlphy_softc) }; DRIVER_MODULE(mlphy, miibus, mlphy_driver, mlphy_devclass, 0, 0); static struct mii_softc *mlphy_find_other(struct mlphy_softc *); static int mlphy_service(struct mii_softc *, struct mii_data *, int); static void mlphy_reset(struct mii_softc *); static void mlphy_status(struct mii_softc *); static const struct mii_phy_funcs mlphy_funcs = { mlphy_service, mlphy_status, mlphy_reset }; static int mlphy_probe(dev) device_t dev; { struct mii_attach_args *ma; ma = device_get_ivars(dev); /* * Micro Linear PHY reports oui == 0 model == 0 */ if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 || MII_MODEL(ma->mii_id2) != 0) return (ENXIO); /* * Make sure the parent is a `tl'. So far, I have only * encountered the 6692 on an Olicom card with a ThunderLAN * controller chip. */ - if (strcmp(device_get_name(device_get_parent(device_get_parent(dev))), - "tl") != 0) + if (!mii_dev_mac_match(dev, "tl")) return (ENXIO); device_set_desc(dev, "Micro Linear 6692 media interface"); return (BUS_PROBE_DEFAULT); } static int mlphy_attach(dev) device_t dev; { struct mlphy_softc *msc; struct mii_softc *sc; msc = device_get_softc(dev); sc = &msc->ml_mii; msc->ml_dev = dev; mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &mlphy_funcs, 0); PHY_RESET(sc); sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask; /* Let the companion PHY (if any) only handle the media we don't. */ sc->mii_capmask = ~sc->mii_capabilities; device_printf(dev, " "); mii_phy_add_media(sc); printf("\n"); MIIBUS_MEDIAINIT(sc->mii_dev); return (0); } static struct mii_softc * mlphy_find_other(struct mlphy_softc *msc) { device_t *devlist; struct mii_softc *retval; int i, devs; retval = NULL; if (device_get_children(msc->ml_mii.mii_dev, &devlist, &devs) != 0) return (NULL); for (i = 0; i < devs; i++) { if (devlist[i] != msc->ml_dev) { retval = device_get_softc(devlist[i]); break; } } free(devlist, M_TEMP); return (retval); } static int mlphy_service(xsc, mii, cmd) struct mii_softc *xsc; struct mii_data *mii; int cmd; { struct ifmedia_entry *ife = mii->mii_media.ifm_cur; struct mii_softc *other = NULL; struct mlphy_softc *msc = (struct mlphy_softc *)xsc; struct mii_softc *sc = (struct mii_softc *)&msc->ml_mii; int other_inst, reg; /* * See if there's another PHY on this bus with us. * If so, we may need it for 10Mbps modes. */ other = mlphy_find_other(msc); switch (cmd) { case MII_POLLSTAT: break; case MII_MEDIACHG: switch (IFM_SUBTYPE(ife->ifm_media)) { case IFM_AUTO: /* * For autonegotiation, reset and isolate the * companion PHY (if any) and then do NWAY * autonegotiation ourselves. */ msc->ml_state = ML_STATE_AUTO_SELF; if (other != NULL) { PHY_RESET(other); PHY_WRITE(other, MII_BMCR, BMCR_ISO); } (void)mii_phy_auto(sc); msc->ml_linked = 0; return (0); case IFM_10_T: /* * For 10baseT modes, reset and program the * companion PHY (of any), then program ourselves * to match. This will put us in pass-through * mode and let the companion PHY do all the * work. * * BMCR data is stored in the ifmedia entry. */ if (other != NULL) { PHY_RESET(other); PHY_WRITE(other, MII_BMCR, ife->ifm_data); } mii_phy_setmedia(sc); msc->ml_state = 0; break; case IFM_100_TX: /* * For 100baseTX modes, reset and isolate the * companion PHY (if any), then program ourselves * accordingly. * * BMCR data is stored in the ifmedia entry. */ if (other != NULL) { PHY_RESET(other); PHY_WRITE(other, MII_BMCR, BMCR_ISO); } mii_phy_setmedia(sc); msc->ml_state = 0; break; default: return (EINVAL); } break; case MII_TICK: /* * Only used for autonegotiation. */ if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) break; /* * Check to see if we have link. If we do, we don't * need to restart the autonegotiation process. Read * the BMSR twice in case it's latched. * If we're in a 10Mbps mode, check the link of the * 10Mbps PHY. Sometimes the Micro Linear PHY's * linkstat bit will clear while the linkstat bit of * the companion PHY will remain set. */ if (msc->ml_state == ML_STATE_AUTO_OTHER) { reg = PHY_READ(other, MII_BMSR) | PHY_READ(other, MII_BMSR); } else { reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); } if (reg & BMSR_LINK) { if (!msc->ml_linked) { msc->ml_linked = 1; PHY_STATUS(sc); } break; } /* * Only retry autonegotiation every 5 seconds. */ if (++sc->mii_ticks <= MII_ANEGTICKS) break; sc->mii_ticks = 0; msc->ml_linked = 0; mii->mii_media_active = IFM_NONE; PHY_RESET(sc); msc->ml_state = ML_STATE_AUTO_SELF; if (other != NULL) { PHY_RESET(other); PHY_WRITE(other, MII_BMCR, BMCR_ISO); } mii_phy_auto(sc); return (0); } /* Update the media status. */ if (msc->ml_state == ML_STATE_AUTO_OTHER) { other_inst = other->mii_inst; other->mii_inst = sc->mii_inst; if (IFM_INST(ife->ifm_media) == other->mii_inst) (void)PHY_SERVICE(other, mii, MII_POLLSTAT); other->mii_inst = other_inst; sc->mii_media_active = other->mii_media_active; sc->mii_media_status = other->mii_media_status; } else ukphy_status(sc); /* Callback if something changed. */ mii_phy_update(sc, cmd); return (0); } /* * The Micro Linear PHY comes out of reset with the 'autoneg * enable' bit set, which we don't want. */ static void mlphy_reset(sc) struct mii_softc *sc; { int reg; mii_phy_reset(sc); reg = PHY_READ(sc, MII_BMCR); reg &= ~BMCR_AUTOEN; PHY_WRITE(sc, MII_BMCR, reg); } /* * If we negotiate a 10Mbps mode, we need to check for an alternate * PHY and make sure it's enabled and set correctly. */ static void mlphy_status(sc) struct mii_softc *sc; { struct mlphy_softc *msc = (struct mlphy_softc *)sc; struct mii_data *mii = msc->ml_mii.mii_pdata; struct mii_softc *other = NULL; /* See if there's another PHY on the bus with us. */ other = mlphy_find_other(msc); if (other == NULL) return; ukphy_status(sc); if (IFM_SUBTYPE(mii->mii_media_active) != IFM_10_T) { msc->ml_state = ML_STATE_AUTO_SELF; PHY_RESET(other); PHY_WRITE(other, MII_BMCR, BMCR_ISO); } if (IFM_SUBTYPE(mii->mii_media_active) == IFM_10_T) { msc->ml_state = ML_STATE_AUTO_OTHER; PHY_RESET(&msc->ml_mii); PHY_WRITE(&msc->ml_mii, MII_BMCR, BMCR_ISO); PHY_RESET(other); mii_phy_auto(other); } } Index: head/sys/dev/mii/nsphy.c =================================================================== --- head/sys/dev/mii/nsphy.c (revision 277092) +++ head/sys/dev/mii/nsphy.c (revision 277093) @@ -1,327 +1,325 @@ /* $NetBSD: nsphy.c,v 1.18 1999/07/14 23:57:36 thorpej Exp $ */ /*- * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, * NASA Ames Research Center. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /*- * Copyright (c) 1997 Manuel Bouyer. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); /* * driver for National Semiconductor's DP83840A ethernet 10/100 PHY * Data Sheet available from www.national.com */ #include #include #include #include #include #include #include #include #include #include #include #include #include "miidevs.h" #include #include "miibus_if.h" static int nsphy_probe(device_t); static int nsphy_attach(device_t); static device_method_t nsphy_methods[] = { /* device interface */ DEVMETHOD(device_probe, nsphy_probe), DEVMETHOD(device_attach, nsphy_attach), DEVMETHOD(device_detach, mii_phy_detach), DEVMETHOD(device_shutdown, bus_generic_shutdown), DEVMETHOD_END }; static devclass_t nsphy_devclass; static driver_t nsphy_driver = { "nsphy", nsphy_methods, sizeof(struct mii_softc) }; DRIVER_MODULE(nsphy, miibus, nsphy_driver, nsphy_devclass, 0, 0); static int nsphy_service(struct mii_softc *, struct mii_data *, int); static void nsphy_status(struct mii_softc *); static void nsphy_reset(struct mii_softc *); static const struct mii_phydesc nsphys[] = { MII_PHY_DESC(xxNATSEMI, DP83840), MII_PHY_END }; static const struct mii_phy_funcs nsphy_funcs = { nsphy_service, nsphy_status, nsphy_reset }; static int nsphy_probe(device_t dev) { return (mii_phy_dev_probe(dev, nsphys, BUS_PROBE_DEFAULT)); } static int nsphy_attach(device_t dev) { - const char *nic; u_int flags; - nic = device_get_name(device_get_parent(device_get_parent(dev))); flags = MIIF_NOMANPAUSE; /* * Am79C971 wedge when isolating all of their external PHYs. */ - if (strcmp(nic, "pcn") == 0) + if (mii_dev_mac_match(dev,"pcn")) flags |= MIIF_NOISOLATE; mii_phy_dev_attach(dev, flags, &nsphy_funcs, 1); return (0); } static int nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) { int reg; switch (cmd) { case MII_POLLSTAT: break; case MII_MEDIACHG: reg = PHY_READ(sc, MII_NSPHY_PCR); /* * Set up the PCR to use LED4 to indicate full-duplex * in both 10baseT and 100baseTX modes. */ reg |= PCR_LED4MODE; /* * Make sure Carrier Integrity Monitor function is * disabled (normal for Node operation, but sometimes * it's not set?!) */ reg |= PCR_CIMDIS; /* * Make sure "force link good" is set to normal mode. * It's only intended for debugging. */ reg |= PCR_FLINK100; /* * Mystery bits which are supposedly `reserved', * but we seem to need to set them when the PHY * is connected to some interfaces: * * 0x0400 is needed for fxp * (Intel EtherExpress Pro 10+/100B, 82557 chip) * (nsphy with a DP83840 chip) * 0x0100 may be needed for some other card */ reg |= 0x0100 | 0x0400; - if (strcmp(if_getdname(mii->mii_ifp), "fxp") == 0) + if (mii_phy_mac_match(sc, "fxp")) PHY_WRITE(sc, MII_NSPHY_PCR, reg); mii_phy_setmedia(sc); break; case MII_TICK: if (mii_phy_tick(sc) == EJUSTRETURN) return (0); break; } /* Update the media status. */ PHY_STATUS(sc); /* Callback if something changed. */ mii_phy_update(sc, cmd); return (0); } static void nsphy_status(struct mii_softc *sc) { struct mii_data *mii = sc->mii_pdata; struct ifmedia_entry *ife = mii->mii_media.ifm_cur; int bmsr, bmcr, par, anlpar; mii->mii_media_status = IFM_AVALID; mii->mii_media_active = IFM_ETHER; bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); if (bmsr & BMSR_LINK) mii->mii_media_status |= IFM_ACTIVE; bmcr = PHY_READ(sc, MII_BMCR); if (bmcr & BMCR_ISO) { mii->mii_media_active |= IFM_NONE; mii->mii_media_status = 0; return; } if (bmcr & BMCR_LOOP) mii->mii_media_active |= IFM_LOOP; if (bmcr & BMCR_AUTOEN) { /* * The PAR status bits are only valid if autonegotiation * has completed (or it's disabled). */ if ((bmsr & BMSR_ACOMP) == 0) { /* Erg, still trying, I guess... */ mii->mii_media_active |= IFM_NONE; return; } /* * Argh. The PAR doesn't seem to indicate duplex mode * properly! Determine media based on link partner's * advertised capabilities. */ if (PHY_READ(sc, MII_ANER) & ANER_LPAN) { anlpar = PHY_READ(sc, MII_ANAR) & PHY_READ(sc, MII_ANLPAR); if (anlpar & ANLPAR_TX_FD) mii->mii_media_active |= IFM_100_TX|IFM_FDX; else if (anlpar & ANLPAR_T4) mii->mii_media_active |= IFM_100_T4|IFM_HDX; else if (anlpar & ANLPAR_TX) mii->mii_media_active |= IFM_100_TX|IFM_HDX; else if (anlpar & ANLPAR_10_FD) mii->mii_media_active |= IFM_10_T|IFM_FDX; else if (anlpar & ANLPAR_10) mii->mii_media_active |= IFM_10_T|IFM_HDX; else mii->mii_media_active |= IFM_NONE; if ((mii->mii_media_active & IFM_FDX) != 0) mii->mii_media_active |= mii_phy_flowstatus(sc); return; } /* * Link partner is not capable of autonegotiation. * We will never be in full-duplex mode if this is * the case, so reading the PAR is OK. */ par = PHY_READ(sc, MII_NSPHY_PAR); if (par & PAR_10) mii->mii_media_active |= IFM_10_T; else mii->mii_media_active |= IFM_100_TX; mii->mii_media_active |= IFM_HDX; } else mii->mii_media_active = ife->ifm_media; } static void nsphy_reset(struct mii_softc *sc) { struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; int reg, i; if (sc->mii_flags & MIIF_NOISOLATE) reg = BMCR_RESET; else reg = BMCR_RESET | BMCR_ISO; PHY_WRITE(sc, MII_BMCR, reg); /* * It is best to allow a little time for the reset to settle * in before we start polling the BMCR again. Notably, the * DP83840A manuals state that there should be a 500us delay * between asserting software reset and attempting MII serial * operations. Be conservative. */ DELAY(1000); /* * Wait another 2s for it to complete. * This is only a little overkill as under normal circumstances * the PHY can take up to 1s to complete reset. * This is also a bit odd because after a reset, the BMCR will * clear the reset bit and simply reports 0 even though the reset * is not yet complete. */ for (i = 0; i < 1000; i++) { reg = PHY_READ(sc, MII_BMCR); if (reg != 0 && (reg & BMCR_RESET) == 0) break; DELAY(2000); } if ((sc->mii_flags & MIIF_NOISOLATE) == 0) { if ((ife == NULL && sc->mii_inst != 0) || (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst)) PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); } } Index: head/sys/dev/mii/rgephy.c =================================================================== --- head/sys/dev/mii/rgephy.c (revision 277092) +++ head/sys/dev/mii/rgephy.c (revision 277093) @@ -1,507 +1,507 @@ /*- * Copyright (c) 2003 * Bill Paul . All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Bill Paul. * 4. Neither the name of the author nor the names of any co-contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); /* * Driver for the RealTek 8169S/8110S/8211B/8211C internal 10/100/1000 PHY. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include "miidevs.h" #include #include "miibus_if.h" #include #include static int rgephy_probe(device_t); static int rgephy_attach(device_t); static device_method_t rgephy_methods[] = { /* device interface */ DEVMETHOD(device_probe, rgephy_probe), DEVMETHOD(device_attach, rgephy_attach), DEVMETHOD(device_detach, mii_phy_detach), DEVMETHOD(device_shutdown, bus_generic_shutdown), DEVMETHOD_END }; static devclass_t rgephy_devclass; static driver_t rgephy_driver = { "rgephy", rgephy_methods, sizeof(struct mii_softc) }; DRIVER_MODULE(rgephy, miibus, rgephy_driver, rgephy_devclass, 0, 0); static int rgephy_service(struct mii_softc *, struct mii_data *, int); static void rgephy_status(struct mii_softc *); static int rgephy_mii_phy_auto(struct mii_softc *, int); static void rgephy_reset(struct mii_softc *); static void rgephy_loop(struct mii_softc *); static void rgephy_load_dspcode(struct mii_softc *); static const struct mii_phydesc rgephys[] = { MII_PHY_DESC(REALTEK, RTL8169S), MII_PHY_DESC(REALTEK, RTL8251), MII_PHY_END }; static const struct mii_phy_funcs rgephy_funcs = { rgephy_service, rgephy_status, rgephy_reset }; static int rgephy_probe(device_t dev) { return (mii_phy_dev_probe(dev, rgephys, BUS_PROBE_DEFAULT)); } static int rgephy_attach(device_t dev) { struct mii_softc *sc; struct mii_attach_args *ma; u_int flags; sc = device_get_softc(dev); ma = device_get_ivars(dev); flags = 0; - if (strcmp(if_getdname(ma->mii_data->mii_ifp), "re") == 0) + if (mii_dev_mac_match(dev, "re")) flags |= MIIF_PHYPRIV0; mii_phy_dev_attach(dev, flags, &rgephy_funcs, 0); /* RTL8169S do not report auto-sense; add manually. */ sc->mii_capabilities = (PHY_READ(sc, MII_BMSR) | BMSR_ANEG) & sc->mii_capmask; if (sc->mii_capabilities & BMSR_EXTSTAT) sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); device_printf(dev, " "); mii_phy_add_media(sc); printf("\n"); /* * Allow IFM_FLAG0 to be set indicating that auto-negotiation with * manual configuration, which is used to work around issues with * certain setups by default, should not be triggered as it may in * turn cause harm in some edge cases. */ sc->mii_pdata->mii_media.ifm_mask |= IFM_FLAG0; PHY_RESET(sc); MIIBUS_MEDIAINIT(sc->mii_dev); return (0); } static int rgephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) { struct ifmedia_entry *ife = mii->mii_media.ifm_cur; int reg, speed, gig, anar; switch (cmd) { case MII_POLLSTAT: break; case MII_MEDIACHG: PHY_RESET(sc); /* XXX hardware bug work-around */ anar = PHY_READ(sc, RGEPHY_MII_ANAR); anar &= ~(RGEPHY_ANAR_PC | RGEPHY_ANAR_ASP | RGEPHY_ANAR_TX_FD | RGEPHY_ANAR_TX | RGEPHY_ANAR_10_FD | RGEPHY_ANAR_10); switch (IFM_SUBTYPE(ife->ifm_media)) { case IFM_AUTO: #ifdef foo /* * If we're already in auto mode, just return. */ if (PHY_READ(sc, RGEPHY_MII_BMCR) & RGEPHY_BMCR_AUTOEN) return (0); #endif (void)rgephy_mii_phy_auto(sc, ife->ifm_media); break; case IFM_1000_T: speed = RGEPHY_S1000; goto setit; case IFM_100_TX: speed = RGEPHY_S100; anar |= RGEPHY_ANAR_TX_FD | RGEPHY_ANAR_TX; goto setit; case IFM_10_T: speed = RGEPHY_S10; anar |= RGEPHY_ANAR_10_FD | RGEPHY_ANAR_10; setit: if ((ife->ifm_media & IFM_FLOW) != 0 && (mii->mii_media.ifm_media & IFM_FLAG0) != 0) return (EINVAL); if ((ife->ifm_media & IFM_FDX) != 0) { speed |= RGEPHY_BMCR_FDX; gig = RGEPHY_1000CTL_AFD; anar &= ~(RGEPHY_ANAR_TX | RGEPHY_ANAR_10); if ((ife->ifm_media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0) anar |= RGEPHY_ANAR_PC | RGEPHY_ANAR_ASP; } else { gig = RGEPHY_1000CTL_AHD; anar &= ~(RGEPHY_ANAR_TX_FD | RGEPHY_ANAR_10_FD); } if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { gig |= RGEPHY_1000CTL_MSE; if ((ife->ifm_media & IFM_ETH_MASTER) != 0) gig |= RGEPHY_1000CTL_MSC; } else { gig = 0; anar &= ~RGEPHY_ANAR_ASP; } if ((mii->mii_media.ifm_media & IFM_FLAG0) == 0) speed |= RGEPHY_BMCR_AUTOEN | RGEPHY_BMCR_STARTNEG; rgephy_loop(sc); PHY_WRITE(sc, RGEPHY_MII_1000CTL, gig); PHY_WRITE(sc, RGEPHY_MII_ANAR, anar); PHY_WRITE(sc, RGEPHY_MII_BMCR, speed); break; case IFM_NONE: PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN); break; default: return (EINVAL); } break; case MII_TICK: /* * Only used for autonegotiation. */ if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { sc->mii_ticks = 0; break; } /* * Check to see if we have link. If we do, we don't * need to restart the autonegotiation process. */ if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev >= 2) { /* RTL8211B(L) */ reg = PHY_READ(sc, RGEPHY_MII_SSR); if (reg & RGEPHY_SSR_LINK) { sc->mii_ticks = 0; break; } } else { reg = PHY_READ(sc, RL_GMEDIASTAT); if (reg & RL_GMEDIASTAT_LINK) { sc->mii_ticks = 0; break; } } /* Announce link loss right after it happens. */ if (sc->mii_ticks++ == 0) break; /* Only retry autonegotiation every mii_anegticks seconds. */ if (sc->mii_ticks <= sc->mii_anegticks) return (0); sc->mii_ticks = 0; rgephy_mii_phy_auto(sc, ife->ifm_media); break; } /* Update the media status. */ PHY_STATUS(sc); /* * Callback if something changed. Note that we need to poke * the DSP on the RealTek PHYs if the media changes. * */ if (sc->mii_media_active != mii->mii_media_active || sc->mii_media_status != mii->mii_media_status || cmd == MII_MEDIACHG) { rgephy_load_dspcode(sc); } mii_phy_update(sc, cmd); return (0); } static void rgephy_status(struct mii_softc *sc) { struct mii_data *mii = sc->mii_pdata; int bmsr, bmcr; uint16_t ssr; mii->mii_media_status = IFM_AVALID; mii->mii_media_active = IFM_ETHER; if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev >= 2) { ssr = PHY_READ(sc, RGEPHY_MII_SSR); if (ssr & RGEPHY_SSR_LINK) mii->mii_media_status |= IFM_ACTIVE; } else { bmsr = PHY_READ(sc, RL_GMEDIASTAT); if (bmsr & RL_GMEDIASTAT_LINK) mii->mii_media_status |= IFM_ACTIVE; } bmsr = PHY_READ(sc, RGEPHY_MII_BMSR); bmcr = PHY_READ(sc, RGEPHY_MII_BMCR); if (bmcr & RGEPHY_BMCR_ISO) { mii->mii_media_active |= IFM_NONE; mii->mii_media_status = 0; return; } if (bmcr & RGEPHY_BMCR_LOOP) mii->mii_media_active |= IFM_LOOP; if (bmcr & RGEPHY_BMCR_AUTOEN) { if ((bmsr & RGEPHY_BMSR_ACOMP) == 0) { /* Erg, still trying, I guess... */ mii->mii_media_active |= IFM_NONE; return; } } if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev >= 2) { ssr = PHY_READ(sc, RGEPHY_MII_SSR); switch (ssr & RGEPHY_SSR_SPD_MASK) { case RGEPHY_SSR_S1000: mii->mii_media_active |= IFM_1000_T; break; case RGEPHY_SSR_S100: mii->mii_media_active |= IFM_100_TX; break; case RGEPHY_SSR_S10: mii->mii_media_active |= IFM_10_T; break; default: mii->mii_media_active |= IFM_NONE; break; } if (ssr & RGEPHY_SSR_FDX) mii->mii_media_active |= IFM_FDX; else mii->mii_media_active |= IFM_HDX; } else { bmsr = PHY_READ(sc, RL_GMEDIASTAT); if (bmsr & RL_GMEDIASTAT_1000MBPS) mii->mii_media_active |= IFM_1000_T; else if (bmsr & RL_GMEDIASTAT_100MBPS) mii->mii_media_active |= IFM_100_TX; else if (bmsr & RL_GMEDIASTAT_10MBPS) mii->mii_media_active |= IFM_10_T; else mii->mii_media_active |= IFM_NONE; if (bmsr & RL_GMEDIASTAT_FDX) mii->mii_media_active |= IFM_FDX; else mii->mii_media_active |= IFM_HDX; } if ((mii->mii_media_active & IFM_FDX) != 0) mii->mii_media_active |= mii_phy_flowstatus(sc); if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) && (PHY_READ(sc, RGEPHY_MII_1000STS) & RGEPHY_1000STS_MSR) != 0) mii->mii_media_active |= IFM_ETH_MASTER; } static int rgephy_mii_phy_auto(struct mii_softc *sc, int media) { int anar; rgephy_loop(sc); PHY_RESET(sc); anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA; if ((media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0) anar |= RGEPHY_ANAR_PC | RGEPHY_ANAR_ASP; PHY_WRITE(sc, RGEPHY_MII_ANAR, anar); DELAY(1000); PHY_WRITE(sc, RGEPHY_MII_1000CTL, RGEPHY_1000CTL_AHD | RGEPHY_1000CTL_AFD); DELAY(1000); PHY_WRITE(sc, RGEPHY_MII_BMCR, RGEPHY_BMCR_AUTOEN | RGEPHY_BMCR_STARTNEG); DELAY(100); return (EJUSTRETURN); } static void rgephy_loop(struct mii_softc *sc) { int i; if (sc->mii_mpd_model != MII_MODEL_REALTEK_RTL8251 && sc->mii_mpd_rev < 2) { PHY_WRITE(sc, RGEPHY_MII_BMCR, RGEPHY_BMCR_PDOWN); DELAY(1000); } for (i = 0; i < 15000; i++) { if (!(PHY_READ(sc, RGEPHY_MII_BMSR) & RGEPHY_BMSR_LINK)) { #if 0 device_printf(sc->mii_dev, "looped %d\n", i); #endif break; } DELAY(10); } } #define PHY_SETBIT(x, y, z) \ PHY_WRITE(x, y, (PHY_READ(x, y) | (z))) #define PHY_CLRBIT(x, y, z) \ PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z))) /* * Initialize RealTek PHY per the datasheet. The DSP in the PHYs of * existing revisions of the 8169S/8110S chips need to be tuned in * order to reliably negotiate a 1000Mbps link. This is only needed * for rev 0 and rev 1 of the PHY. Later versions work without * any fixups. */ static void rgephy_load_dspcode(struct mii_softc *sc) { int val; if (sc->mii_mpd_model == MII_MODEL_REALTEK_RTL8251 || sc->mii_mpd_rev >= 2) return; PHY_WRITE(sc, 31, 0x0001); PHY_WRITE(sc, 21, 0x1000); PHY_WRITE(sc, 24, 0x65C7); PHY_CLRBIT(sc, 4, 0x0800); val = PHY_READ(sc, 4) & 0xFFF; PHY_WRITE(sc, 4, val); PHY_WRITE(sc, 3, 0x00A1); PHY_WRITE(sc, 2, 0x0008); PHY_WRITE(sc, 1, 0x1020); PHY_WRITE(sc, 0, 0x1000); PHY_SETBIT(sc, 4, 0x0800); PHY_CLRBIT(sc, 4, 0x0800); val = (PHY_READ(sc, 4) & 0xFFF) | 0x7000; PHY_WRITE(sc, 4, val); PHY_WRITE(sc, 3, 0xFF41); PHY_WRITE(sc, 2, 0xDE60); PHY_WRITE(sc, 1, 0x0140); PHY_WRITE(sc, 0, 0x0077); val = (PHY_READ(sc, 4) & 0xFFF) | 0xA000; PHY_WRITE(sc, 4, val); PHY_WRITE(sc, 3, 0xDF01); PHY_WRITE(sc, 2, 0xDF20); PHY_WRITE(sc, 1, 0xFF95); PHY_WRITE(sc, 0, 0xFA00); val = (PHY_READ(sc, 4) & 0xFFF) | 0xB000; PHY_WRITE(sc, 4, val); PHY_WRITE(sc, 3, 0xFF41); PHY_WRITE(sc, 2, 0xDE20); PHY_WRITE(sc, 1, 0x0140); PHY_WRITE(sc, 0, 0x00BB); val = (PHY_READ(sc, 4) & 0xFFF) | 0xF000; PHY_WRITE(sc, 4, val); PHY_WRITE(sc, 3, 0xDF01); PHY_WRITE(sc, 2, 0xDF20); PHY_WRITE(sc, 1, 0xFF95); PHY_WRITE(sc, 0, 0xBF00); PHY_SETBIT(sc, 4, 0x0800); PHY_CLRBIT(sc, 4, 0x0800); PHY_WRITE(sc, 31, 0x0000); DELAY(40); } static void rgephy_reset(struct mii_softc *sc) { uint16_t pcr, ssr; if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev == 3) { /* RTL8211C(L) */ ssr = PHY_READ(sc, RGEPHY_MII_SSR); if ((ssr & RGEPHY_SSR_ALDPS) != 0) { ssr &= ~RGEPHY_SSR_ALDPS; PHY_WRITE(sc, RGEPHY_MII_SSR, ssr); } } if (sc->mii_mpd_rev >= 2) { pcr = PHY_READ(sc, RGEPHY_MII_PCR); if ((pcr & RGEPHY_PCR_MDIX_AUTO) == 0) { pcr &= ~RGEPHY_PCR_MDI_MASK; pcr |= RGEPHY_PCR_MDIX_AUTO; PHY_WRITE(sc, RGEPHY_MII_PCR, pcr); } } mii_phy_reset(sc); DELAY(1000); rgephy_load_dspcode(sc); } Index: head/sys/dev/mii/rlphy.c =================================================================== --- head/sys/dev/mii/rlphy.c (revision 277092) +++ head/sys/dev/mii/rlphy.c (revision 277093) @@ -1,261 +1,259 @@ /*- * Copyright (c) 1997, 1998, 1999 * Bill Paul . All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Bill Paul. * 4. Neither the name of the author nor the names of any co-contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); /* * driver for RealTek 8139 internal PHYs */ #include #include #include #include #include #include #include /* XXXGL: if_rlreg.h contamination */ #include #include #include #include #include #include "miidevs.h" #include #include #include "miibus_if.h" static int rlphy_probe(device_t); static int rlphy_attach(device_t); static device_method_t rlphy_methods[] = { /* device interface */ DEVMETHOD(device_probe, rlphy_probe), DEVMETHOD(device_attach, rlphy_attach), DEVMETHOD(device_detach, mii_phy_detach), DEVMETHOD(device_shutdown, bus_generic_shutdown), DEVMETHOD_END }; static devclass_t rlphy_devclass; static driver_t rlphy_driver = { "rlphy", rlphy_methods, sizeof(struct mii_softc) }; DRIVER_MODULE(rlphy, miibus, rlphy_driver, rlphy_devclass, 0, 0); static int rlphy_service(struct mii_softc *, struct mii_data *, int); static void rlphy_status(struct mii_softc *); /* * RealTek internal PHYs don't have vendor/device ID registers; * re(4) and rl(4) fake up a return value of all zeros. */ static const struct mii_phydesc rlintphys[] = { { 0, 0, "RealTek internal media interface" }, MII_PHY_END }; static const struct mii_phydesc rlphys[] = { MII_PHY_DESC(yyREALTEK, RTL8201L), MII_PHY_DESC(REALTEK, RTL8201E), MII_PHY_DESC(xxICPLUS, IP101), MII_PHY_END }; static const struct mii_phy_funcs rlphy_funcs = { rlphy_service, rlphy_status, mii_phy_reset }; static int rlphy_probe(device_t dev) { - const char *nic; int rv; rv = mii_phy_dev_probe(dev, rlphys, BUS_PROBE_DEFAULT); if (rv <= 0) return (rv); - nic = device_get_name(device_get_parent(device_get_parent(dev))); - if (strcmp(nic, "rl") == 0 || strcmp(nic, "re") == 0) + if (mii_dev_mac_match(dev, "rl") || mii_dev_mac_match(dev, "re")) return (mii_phy_dev_probe(dev, rlintphys, BUS_PROBE_DEFAULT)); return (ENXIO); } static int rlphy_attach(device_t dev) { /* * The RealTek PHY can never be isolated. */ mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE, &rlphy_funcs, 1); return (0); } static int rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) { switch (cmd) { case MII_POLLSTAT: break; case MII_MEDIACHG: mii_phy_setmedia(sc); break; case MII_TICK: /* * The RealTek PHY's autonegotiation doesn't need to be * kicked; it continues in the background. */ break; } /* Update the media status. */ PHY_STATUS(sc); /* Callback if something changed. */ mii_phy_update(sc, cmd); return (0); } static void rlphy_status(struct mii_softc *phy) { struct mii_data *mii = phy->mii_pdata; struct ifmedia_entry *ife = mii->mii_media.ifm_cur; int bmsr, bmcr, anlpar; mii->mii_media_status = IFM_AVALID; mii->mii_media_active = IFM_ETHER; bmsr = PHY_READ(phy, MII_BMSR) | PHY_READ(phy, MII_BMSR); if (bmsr & BMSR_LINK) mii->mii_media_status |= IFM_ACTIVE; bmcr = PHY_READ(phy, MII_BMCR); if (bmcr & BMCR_ISO) { mii->mii_media_active |= IFM_NONE; mii->mii_media_status = 0; return; } if (bmcr & BMCR_LOOP) mii->mii_media_active |= IFM_LOOP; if (bmcr & BMCR_AUTOEN) { /* * NWay autonegotiation takes the highest-order common * bit of the ANAR and ANLPAR (i.e. best media advertised * both by us and our link partner). */ if ((bmsr & BMSR_ACOMP) == 0) { /* Erg, still trying, I guess... */ mii->mii_media_active |= IFM_NONE; return; } if ((anlpar = PHY_READ(phy, MII_ANAR) & PHY_READ(phy, MII_ANLPAR))) { if (anlpar & ANLPAR_TX_FD) mii->mii_media_active |= IFM_100_TX|IFM_FDX; else if (anlpar & ANLPAR_T4) mii->mii_media_active |= IFM_100_T4|IFM_HDX; else if (anlpar & ANLPAR_TX) mii->mii_media_active |= IFM_100_TX|IFM_HDX; else if (anlpar & ANLPAR_10_FD) mii->mii_media_active |= IFM_10_T|IFM_FDX; else if (anlpar & ANLPAR_10) mii->mii_media_active |= IFM_10_T|IFM_HDX; else mii->mii_media_active |= IFM_NONE; if ((mii->mii_media_active & IFM_FDX) != 0) mii->mii_media_active |= mii_phy_flowstatus(phy); return; } /* * If the other side doesn't support NWAY, then the * best we can do is determine if we have a 10Mbps or * 100Mbps link. There's no way to know if the link * is full or half duplex, so we default to half duplex * and hope that the user is clever enough to manually * change the media settings if we're wrong. */ /* * The RealTek PHY supports non-NWAY link speed * detection, however it does not report the link * detection results via the ANLPAR or BMSR registers. * (What? RealTek doesn't do things the way everyone * else does? I'm just shocked, shocked I tell you.) * To determine the link speed, we have to do one * of two things: * * - If this is a standalone RealTek RTL8201(L) or * workalike PHY, we can determine the link speed by * testing bit 0 in the magic, vendor-specific register * at offset 0x19. * * - If this is a RealTek MAC with integrated PHY, we * can test the 'SPEED10' bit of the MAC's media status * register. */ if (!(phy->mii_mpd_model == 0 && phy->mii_mpd_rev == 0)) { if (PHY_READ(phy, 0x0019) & 0x01) mii->mii_media_active |= IFM_100_TX; else mii->mii_media_active |= IFM_10_T; } else { if (PHY_READ(phy, RL_MEDIASTAT) & RL_MEDIASTAT_SPEED10) mii->mii_media_active |= IFM_10_T; else mii->mii_media_active |= IFM_100_TX; } mii->mii_media_active |= IFM_HDX; } else mii->mii_media_active = ife->ifm_media; } Index: head/sys/dev/mii/tlphy.c =================================================================== --- head/sys/dev/mii/tlphy.c (revision 277092) +++ head/sys/dev/mii/tlphy.c (revision 277093) @@ -1,375 +1,374 @@ /* $NetBSD: tlphy.c,v 1.18 1999/05/14 11:40:28 drochner Exp $ */ /*- * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, * NASA Ames Research Center. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /*- * Copyright (c) 1997 Manuel Bouyer. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); /* * Driver for Texas Instruments's ThunderLAN PHYs */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include "miidevs.h" #include #include "miibus_if.h" struct tlphy_softc { struct mii_softc sc_mii; /* generic PHY */ int sc_need_acomp; }; static int tlphy_probe(device_t); static int tlphy_attach(device_t); static device_method_t tlphy_methods[] = { /* device interface */ DEVMETHOD(device_probe, tlphy_probe), DEVMETHOD(device_attach, tlphy_attach), DEVMETHOD(device_detach, mii_phy_detach), DEVMETHOD(device_shutdown, bus_generic_shutdown), DEVMETHOD_END }; static devclass_t tlphy_devclass; static driver_t tlphy_driver = { "tlphy", tlphy_methods, sizeof(struct tlphy_softc) }; DRIVER_MODULE(tlphy, miibus, tlphy_driver, tlphy_devclass, 0, 0); static int tlphy_service(struct mii_softc *, struct mii_data *, int); static int tlphy_auto(struct tlphy_softc *); static void tlphy_acomp(struct tlphy_softc *); static void tlphy_status(struct mii_softc *); static const struct mii_phydesc tlphys[] = { MII_PHY_DESC(TI, TLAN10T), MII_PHY_END }; static const struct mii_phy_funcs tlphy_funcs = { tlphy_service, tlphy_status, mii_phy_reset }; static int tlphy_probe(device_t dev) { - if (strcmp(device_get_name(device_get_parent(device_get_parent(dev))), - "tl") != 0) + if (!mii_dev_mac_match(dev, "tl")) return (ENXIO); return (mii_phy_dev_probe(dev, tlphys, BUS_PROBE_DEFAULT)); } static int tlphy_attach(device_t dev) { device_t *devlist; struct mii_softc *other, *sc_mii; const char *sep = ""; int capmask, devs, i; sc_mii = device_get_softc(dev); mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &tlphy_funcs, 0); /* * Note that if we're on a device that also supports 100baseTX, * we are not going to want to use the built-in 10baseT port, * since there will be another PHY on the MII wired up to the * UTP connector. */ capmask = BMSR_DEFCAPMASK; if (sc_mii->mii_inst && device_get_children(sc_mii->mii_dev, &devlist, &devs) == 0) { for (i = 0; i < devs; i++) { if (devlist[i] != dev) { other = device_get_softc(devlist[i]); capmask &= ~other->mii_capabilities; break; } } free(devlist, M_TEMP); } PHY_RESET(sc_mii); sc_mii->mii_capabilities = PHY_READ(sc_mii, MII_BMSR) & capmask; #define ADD(m, c) \ ifmedia_add(&sc_mii->mii_pdata->mii_media, (m), (c), NULL) #define PRINT(s) printf("%s%s", sep, s); sep = ", " if ((sc_mii->mii_flags & (MIIF_MACPRIV0 | MIIF_MACPRIV1)) != 0 && (sc_mii->mii_capabilities & BMSR_MEDIAMASK) != 0) device_printf(dev, " "); if ((sc_mii->mii_flags & MIIF_MACPRIV0) != 0) { ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_2, 0, sc_mii->mii_inst), 0); PRINT("10base2/BNC"); } if ((sc_mii->mii_flags & MIIF_MACPRIV1) != 0) { ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_5, 0, sc_mii->mii_inst), 0); PRINT("10base5/AUI"); } if ((sc_mii->mii_capabilities & BMSR_MEDIAMASK) != 0) { printf("%s", sep); mii_phy_add_media(sc_mii); } if ((sc_mii->mii_flags & (MIIF_MACPRIV0 | MIIF_MACPRIV1)) != 0 && (sc_mii->mii_capabilities & BMSR_MEDIAMASK) != 0) printf("\n"); #undef ADD #undef PRINT MIIBUS_MEDIAINIT(sc_mii->mii_dev); return (0); } static int tlphy_service(struct mii_softc *self, struct mii_data *mii, int cmd) { struct tlphy_softc *sc = (struct tlphy_softc *)self; struct ifmedia_entry *ife = mii->mii_media.ifm_cur; int reg; if (sc->sc_need_acomp) tlphy_acomp(sc); switch (cmd) { case MII_POLLSTAT: break; case MII_MEDIACHG: switch (IFM_SUBTYPE(ife->ifm_media)) { case IFM_AUTO: /* * The ThunderLAN PHY doesn't self-configure after * an autonegotiation cycle, so there's no such * thing as "already in auto mode". */ (void)tlphy_auto(sc); break; case IFM_10_2: case IFM_10_5: PHY_WRITE(&sc->sc_mii, MII_BMCR, 0); PHY_WRITE(&sc->sc_mii, MII_TLPHY_CTRL, CTRL_AUISEL); DELAY(100000); break; default: PHY_WRITE(&sc->sc_mii, MII_TLPHY_CTRL, 0); DELAY(100000); mii_phy_setmedia(&sc->sc_mii); } break; case MII_TICK: /* * Only used for autonegotiation. */ if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) break; /* * Check to see if we have link. If we do, we don't * need to restart the autonegotiation process. Read * the BMSR twice in case it's latched. * * XXX WHAT ABOUT CHECKING LINK ON THE BNC/AUI?! */ reg = PHY_READ(&sc->sc_mii, MII_BMSR) | PHY_READ(&sc->sc_mii, MII_BMSR); if (reg & BMSR_LINK) break; /* * Only retry autonegotiation every 5 seconds. */ if (++sc->sc_mii.mii_ticks <= MII_ANEGTICKS) break; sc->sc_mii.mii_ticks = 0; PHY_RESET(&sc->sc_mii); (void)tlphy_auto(sc); return (0); } /* Update the media status. */ PHY_STATUS(self); /* Callback if something changed. */ mii_phy_update(&sc->sc_mii, cmd); return (0); } static void tlphy_status(struct mii_softc *self) { struct tlphy_softc *sc = (struct tlphy_softc *)self; struct mii_data *mii = sc->sc_mii.mii_pdata; int bmsr, bmcr, tlctrl; mii->mii_media_status = IFM_AVALID; mii->mii_media_active = IFM_ETHER; bmcr = PHY_READ(&sc->sc_mii, MII_BMCR); if (bmcr & BMCR_ISO) { mii->mii_media_active |= IFM_NONE; mii->mii_media_status = 0; return; } tlctrl = PHY_READ(&sc->sc_mii, MII_TLPHY_CTRL); if (tlctrl & CTRL_AUISEL) { mii->mii_media_status = 0; mii->mii_media_active = mii->mii_media.ifm_cur->ifm_media; return; } bmsr = PHY_READ(&sc->sc_mii, MII_BMSR) | PHY_READ(&sc->sc_mii, MII_BMSR); if (bmsr & BMSR_LINK) mii->mii_media_status |= IFM_ACTIVE; if (bmcr & BMCR_LOOP) mii->mii_media_active |= IFM_LOOP; /* * Grr, braindead ThunderLAN PHY doesn't have any way to * tell which media is actually active. (Note it also * doesn't self-configure after autonegotiation.) We * just have to report what's in the BMCR. */ if (bmcr & BMCR_FDX) mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(self); else mii->mii_media_active |= IFM_HDX; mii->mii_media_active |= IFM_10_T; } static int tlphy_auto(struct tlphy_softc *sc) { int error; switch ((error = mii_phy_auto(&sc->sc_mii))) { case EIO: /* * Just assume we're not in full-duplex mode. * XXX Check link and try AUI/BNC? */ PHY_WRITE(&sc->sc_mii, MII_BMCR, 0); break; case EJUSTRETURN: /* Flag that we need to program when it completes. */ sc->sc_need_acomp = 1; break; default: tlphy_acomp(sc); } return (error); } static void tlphy_acomp(struct tlphy_softc *sc) { int aner, anlpar; sc->sc_need_acomp = 0; /* * Grr, braindead ThunderLAN PHY doesn't self-configure * after autonegotiation. We have to do it ourselves * based on the link partner status. */ aner = PHY_READ(&sc->sc_mii, MII_ANER); if (aner & ANER_LPAN) { anlpar = PHY_READ(&sc->sc_mii, MII_ANLPAR) & PHY_READ(&sc->sc_mii, MII_ANAR); if (anlpar & ANAR_10_FD) { PHY_WRITE(&sc->sc_mii, MII_BMCR, BMCR_FDX); return; } } PHY_WRITE(&sc->sc_mii, MII_BMCR, 0); }