Index: head/sys/arm/conf/BEAGLEBONE =================================================================== --- head/sys/arm/conf/BEAGLEBONE (revision 277041) +++ head/sys/arm/conf/BEAGLEBONE (revision 277042) @@ -1,161 +1,163 @@ # # BEAGLEBONE -- Custom configuration for the BeagleBone ARM development # platforms, check out http://www.beagleboard.org/bone and # http://www.beagleboard.org/black. This kernel config file is used for the # original BeagleBone and the BeagleBone Black. # # For more information on this file, please read the config(5) manual page, # and/or the handbook section on Kernel Configuration Files: # # http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html # # The handbook is also available locally in /usr/share/doc/handbook # if you've installed the doc distribution, otherwise always see the # FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the # latest information. # # An exhaustive list of options and more detailed explanations of the # device lines is also present in the ../../conf/NOTES and NOTES files. # If you are in doubt as to the purpose or necessity of a line, check first # in NOTES. # # $FreeBSD$ ident BEAGLEBONE include "../ti/am335x/std.am335x" makeoptions WITHOUT_MODULES="ahc" options HZ=100 options SCHED_4BSD # 4BSD scheduler options PREEMPTION # Enable kernel thread preemption options INET # InterNETworking options INET6 # IPv6 communications protocols options SCTP # Stream Control Transmission Protocol options FFS # Berkeley Fast Filesystem options SOFTUPDATES # Enable FFS soft updates support options UFS_ACL # Support for access control lists options UFS_DIRHASH # Improve performance on big directories options UFS_GJOURNAL # Enable gjournal-based UFS journaling options QUOTA # Enable disk quotas for UFS options NFSCL # Network Filesystem Client options NFSLOCKD # Network Lock Manager options NFS_ROOT # NFS usable as /, requires NFSCL options MSDOSFS # MSDOS Filesystem options CD9660 # ISO 9660 Filesystem options PROCFS # Process filesystem (requires PSEUDOFS) options PSEUDOFS # Pseudo-filesystem framework options TMPFS # Efficient memory filesystem options GEOM_PART_GPT # GUID Partition Tables options GEOM_PART_BSD # BSD partition scheme options GEOM_PART_MBR # MBR partition scheme options COMPAT_43 # Compatible with BSD 4.3 [KEEP THIS!] options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI options KTRACE # ktrace(1) support options SYSVSHM # SYSV-style shared memory options SYSVMSG # SYSV-style message queues options SYSVSEM # SYSV-style semaphores options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions options KBD_INSTALL_CDEV # install a CDEV entry in /dev options PLATFORM options FREEBSD_BOOT_LOADER # Process metadata passed from loader(8) options VFP # Enable floating point hardware support # Debugging for use in -current makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols options BREAK_TO_DEBUGGER #options VERBOSE_SYSINIT # Enable verbose sysinit messages options KDB # Enable kernel debugger support # For minimum debugger support (stable branch) use: #options KDB_TRACE # Print a stack trace for a panic # For full debugger support use this instead: options DDB # Enable the kernel debugger options INVARIANTS # Enable calls of extra sanity checking options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS options WITNESS # Enable checks to detect deadlocks and cycles options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed #options DIAGNOSTIC # NFS server support #options NFSD # NFS root from boopt/dhcp #options BOOTP #options BOOTP_NFSROOT #options BOOTP_COMPAT #options BOOTP_NFSV3 #options BOOTP_WIRED_TO=cpsw0 # Boot device is 2nd slice on MMC/SD card options ROOTDEVNAME=\"ufs:mmcsd0s2\" # MMC/SD/SDIO Card slot support device mmc # mmc/sd bus device mmcsd # mmc/sd flash cards device sdhci # mmc/sd host controller # I2C support device iicbus device iic device ti_i2c device am335x_pmic # AM335x Power Management IC (TPC65217) +device am335x_rtc # RTC support (power management only) + # Console and misc device uart device uart_ns8250 device pty device snp device md device random # Entropy device # GPIO device gpio device gpioled # ADC support device ti_adc # Watchdog support # If we don't enable the watchdog driver, the system could potentially # reboot automatically because the boot loader might have enabled the # watchdog. device ti_wdt # TI Programmable Realtime Unit support device ti_pruss # Mailbox support device ti_mbox # USB support device usb options USB_HOST_ALIGN=64 # Align usb buffers to cache line size. options USB_DEBUG #options USB_REQ_DEBUG #options USB_VERBOSE device musb device umass device scbus # SCSI bus (required for ATA/SCSI) device da # Direct Access (disks) # Ethernet device loop device ether device mii device smscphy device cpsw device bpf # USB Ethernet support, requires miibus device miibus device axe # ASIX Electronics USB Ethernet # Device mode support and USFS template device usb_template # Control of the gadget device usfs # Flattened Device Tree options FDT # Configure using FDT/DTB data options FDT_DTB_STATIC makeoptions FDT_DTS_FILE=beaglebone.dts Index: head/sys/arm/ti/am335x/am335x_pmic.c =================================================================== --- head/sys/arm/ti/am335x/am335x_pmic.c (revision 277041) +++ head/sys/arm/ti/am335x/am335x_pmic.c (revision 277042) @@ -1,184 +1,211 @@ /*- * Copyright (c) 2012 Damjan Marion * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); /* * TPS65217 PMIC companion chip for AM335x SoC sitting on I2C bus */ #include #include +#include #include #include #include #include #include +#include #include #include #include #include #include #include #include +#include + #include "iicbus_if.h" #define TPS65217A 0x7 #define TPS65217B 0xF #define TPS65217C 0xE #define TPS65217D 0x6 /* TPS65217 Reisters */ #define TPS65217_CHIPID_REG 0x00 #define TPS65217_STATUS_REG 0x0A +#define TPS65217_STATUS_OFF (1U << 7) +#define TPS65217_STATUS_ACPWR (1U << 3) +#define TPS65217_STATUS_USBPWR (1U << 2) +#define TPS65217_STATUS_BT (1U << 0) #define MAX_IIC_DATA_SIZE 2 struct am335x_pmic_softc { device_t sc_dev; uint32_t sc_addr; struct intr_config_hook enum_hook; }; +static void am335x_pmic_shutdown(void *, int); + static int am335x_pmic_read(device_t dev, uint8_t addr, uint8_t *data, uint8_t size) { struct am335x_pmic_softc *sc = device_get_softc(dev); struct iic_msg msg[] = { { sc->sc_addr, IIC_M_WR, 1, &addr }, { sc->sc_addr, IIC_M_RD, size, data }, }; return (iicbus_transfer(dev, msg, 2)); } -#ifdef notyet static int am335x_pmic_write(device_t dev, uint8_t address, uint8_t *data, uint8_t size) { uint8_t buffer[MAX_IIC_DATA_SIZE + 1]; struct am335x_pmic_softc *sc = device_get_softc(dev); struct iic_msg msg[] = { { sc->sc_addr, IIC_M_WR, size + 1, buffer }, }; if (size > MAX_IIC_DATA_SIZE) return (ENOMEM); buffer[0] = address; memcpy(buffer + 1, data, size); return (iicbus_transfer(dev, msg, 1)); } -#endif static int am335x_pmic_probe(device_t dev) { struct am335x_pmic_softc *sc; if (!ofw_bus_is_compatible(dev, "ti,am335x-pmic")) return (ENXIO); sc = device_get_softc(dev); sc->sc_dev = dev; sc->sc_addr = iicbus_get_addr(dev); device_set_desc(dev, "TI TPS65217 Power Management IC"); return (0); } static void am335x_pmic_start(void *xdev) { struct am335x_pmic_softc *sc; device_t dev = (device_t)xdev; uint8_t reg; char name[20]; char pwr[4][11] = {"Unknown", "USB", "AC", "USB and AC"}; sc = device_get_softc(dev); am335x_pmic_read(dev, TPS65217_CHIPID_REG, ®, 1); switch (reg>>4) { case TPS65217A: sprintf(name, "TPS65217A ver 1.%u", reg & 0xF); break; case TPS65217B: sprintf(name, "TPS65217B ver 1.%u", reg & 0xF); break; case TPS65217C: sprintf(name, "TPS65217C ver 1.%u", reg & 0xF); break; case TPS65217D: sprintf(name, "TPS65217D ver 1.%u", reg & 0xF); break; default: sprintf(name, "Unknown PMIC"); } am335x_pmic_read(dev, TPS65217_STATUS_REG, ®, 1); device_printf(dev, "%s powered by %s\n", name, pwr[(reg>>2)&0x03]); + EVENTHANDLER_REGISTER(shutdown_final, am335x_pmic_shutdown, dev, + SHUTDOWN_PRI_LAST); + config_intrhook_disestablish(&sc->enum_hook); } static int am335x_pmic_attach(device_t dev) { struct am335x_pmic_softc *sc; sc = device_get_softc(dev); sc->enum_hook.ich_func = am335x_pmic_start; sc->enum_hook.ich_arg = dev; if (config_intrhook_establish(&sc->enum_hook) != 0) return (ENOMEM); return (0); +} + +static void +am335x_pmic_shutdown(void *xdev, int howto) +{ + device_t dev; + uint8_t reg; + + if (!(howto & RB_POWEROFF)) + return; + dev = (device_t)xdev; + /* Set the OFF bit on status register to start the shutdown sequence. */ + reg = TPS65217_STATUS_OFF; + am335x_pmic_write(dev, TPS65217_STATUS_REG, ®, 1); + /* Toggle pmic_pwr_enable to shutdown the PMIC. */ + am335x_rtc_pmic_pwr_toggle(); } static device_method_t am335x_pmic_methods[] = { DEVMETHOD(device_probe, am335x_pmic_probe), DEVMETHOD(device_attach, am335x_pmic_attach), {0, 0}, }; static driver_t am335x_pmic_driver = { "am335x_pmic", am335x_pmic_methods, sizeof(struct am335x_pmic_softc), }; static devclass_t am335x_pmic_devclass; DRIVER_MODULE(am335x_pmic, iicbus, am335x_pmic_driver, am335x_pmic_devclass, 0, 0); MODULE_VERSION(am335x_pmic, 1); MODULE_DEPEND(am335x_pmic, iicbus, 1, 1, 1); Index: head/sys/arm/ti/am335x/am335x_prcm.c =================================================================== --- head/sys/arm/ti/am335x/am335x_prcm.c (revision 277041) +++ head/sys/arm/ti/am335x/am335x_prcm.c (revision 277042) @@ -1,790 +1,798 @@ /*- * Copyright (c) 2012 Damjan Marion * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include __FBSDID("$FreeBSD$"); #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #define CM_PER 0 #define CM_PER_L4LS_CLKSTCTRL (CM_PER + 0x000) #define CM_PER_L3S_CLKSTCTRL (CM_PER + 0x004) #define CM_PER_L3_CLKSTCTRL (CM_PER + 0x00C) #define CM_PER_CPGMAC0_CLKCTRL (CM_PER + 0x014) #define CM_PER_LCDC_CLKCTRL (CM_PER + 0x018) #define CM_PER_USB0_CLKCTRL (CM_PER + 0x01C) #define CM_PER_TPTC0_CLKCTRL (CM_PER + 0x024) #define CM_PER_UART5_CLKCTRL (CM_PER + 0x038) #define CM_PER_MMC0_CLKCTRL (CM_PER + 0x03C) #define CM_PER_I2C2_CLKCTRL (CM_PER + 0x044) #define CM_PER_I2C1_CLKCTRL (CM_PER + 0x048) #define CM_PER_UART1_CLKCTRL (CM_PER + 0x06C) #define CM_PER_UART2_CLKCTRL (CM_PER + 0x070) #define CM_PER_UART3_CLKCTRL (CM_PER + 0x074) #define CM_PER_UART4_CLKCTRL (CM_PER + 0x078) #define CM_PER_TIMER7_CLKCTRL (CM_PER + 0x07C) #define CM_PER_TIMER2_CLKCTRL (CM_PER + 0x080) #define CM_PER_TIMER3_CLKCTRL (CM_PER + 0x084) #define CM_PER_TIMER4_CLKCTRL (CM_PER + 0x088) #define CM_PER_GPIO1_CLKCTRL (CM_PER + 0x0AC) #define CM_PER_GPIO2_CLKCTRL (CM_PER + 0x0B0) #define CM_PER_GPIO3_CLKCTRL (CM_PER + 0x0B4) #define CM_PER_TPCC_CLKCTRL (CM_PER + 0x0BC) #define CM_PER_EPWMSS1_CLKCTRL (CM_PER + 0x0CC) #define CM_PER_EPWMSS0_CLKCTRL (CM_PER + 0x0D4) #define CM_PER_EPWMSS2_CLKCTRL (CM_PER + 0x0D8) #define CM_PER_L3_INSTR_CLKCTRL (CM_PER + 0x0DC) #define CM_PER_L3_CLKCTRL (CM_PER + 0x0E0) #define CM_PER_PRUSS_CLKCTRL (CM_PER + 0x0E8) #define CM_PER_TIMER5_CLKCTRL (CM_PER + 0x0EC) #define CM_PER_TIMER6_CLKCTRL (CM_PER + 0x0F0) #define CM_PER_MMC1_CLKCTRL (CM_PER + 0x0F4) #define CM_PER_MMC2_CLKCTRL (CM_PER + 0x0F8) #define CM_PER_TPTC1_CLKCTRL (CM_PER + 0x0FC) #define CM_PER_TPTC2_CLKCTRL (CM_PER + 0x100) #define CM_PER_SPINLOCK0_CLKCTRL (CM_PER + 0x10C) #define CM_PER_MAILBOX0_CLKCTRL (CM_PER + 0x110) #define CM_PER_OCPWP_L3_CLKSTCTRL (CM_PER + 0x12C) #define CM_PER_OCPWP_CLKCTRL (CM_PER + 0x130) #define CM_PER_CPSW_CLKSTCTRL (CM_PER + 0x144) #define CM_PER_PRUSS_CLKSTCTRL (CM_PER + 0x140) #define CM_WKUP 0x400 #define CM_WKUP_CLKSTCTRL (CM_WKUP + 0x000) #define CM_WKUP_CONTROL_CLKCTRL (CM_WKUP + 0x004) #define CM_WKUP_GPIO0_CLKCTRL (CM_WKUP + 0x008) #define CM_WKUP_CM_L3_AON_CLKSTCTRL (CM_WKUP + 0x01C) #define CM_WKUP_CM_CLKSEL_DPLL_MPU (CM_WKUP + 0x02C) #define CM_WKUP_CM_IDLEST_DPLL_DISP (CM_WKUP + 0x048) #define CM_WKUP_CM_CLKSEL_DPLL_DISP (CM_WKUP + 0x054) #define CM_WKUP_CM_CLKDCOLDO_DPLL_PER (CM_WKUP + 0x07C) #define CM_WKUP_CM_CLKMODE_DPLL_DISP (CM_WKUP + 0x098) #define CM_WKUP_I2C0_CLKCTRL (CM_WKUP + 0x0B8) #define CM_WKUP_ADC_TSC_CLKCTRL (CM_WKUP + 0x0BC) #define CM_DPLL 0x500 #define CLKSEL_TIMER7_CLK (CM_DPLL + 0x004) #define CLKSEL_TIMER2_CLK (CM_DPLL + 0x008) #define CLKSEL_TIMER3_CLK (CM_DPLL + 0x00C) #define CLKSEL_TIMER4_CLK (CM_DPLL + 0x010) #define CLKSEL_TIMER5_CLK (CM_DPLL + 0x018) #define CLKSEL_TIMER6_CLK (CM_DPLL + 0x01C) #define CLKSEL_PRUSS_OCP_CLK (CM_DPLL + 0x030) +#define CM_RTC 0x800 +#define CM_RTC_RTC_CLKCTRL (CM_RTC + 0x000) +#define CM_RTC_CLKSTCTRL (CM_RTC + 0x004) + #define PRM_PER 0xC00 #define PRM_PER_RSTCTRL (PRM_PER + 0x00) #define PRM_DEVICE_OFFSET 0xF00 #define PRM_RSTCTRL (PRM_DEVICE_OFFSET + 0x00) struct am335x_prcm_softc { struct resource * res[2]; bus_space_tag_t bst; bus_space_handle_t bsh; }; static struct resource_spec am335x_prcm_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, { -1, 0 } }; static struct am335x_prcm_softc *am335x_prcm_sc = NULL; static int am335x_clk_noop_activate(struct ti_clock_dev *clkdev); static int am335x_clk_generic_activate(struct ti_clock_dev *clkdev); static int am335x_clk_gpio_activate(struct ti_clock_dev *clkdev); static int am335x_clk_noop_deactivate(struct ti_clock_dev *clkdev); static int am335x_clk_generic_deactivate(struct ti_clock_dev *clkdev); static int am335x_clk_noop_set_source(struct ti_clock_dev *clkdev, clk_src_t clksrc); static int am335x_clk_generic_set_source(struct ti_clock_dev *clkdev, clk_src_t clksrc); static int am335x_clk_hsmmc_get_source_freq(struct ti_clock_dev *clkdev, unsigned int *freq); static int am335x_clk_get_sysclk_freq(struct ti_clock_dev *clkdev, unsigned int *freq); static int am335x_clk_get_arm_fclk_freq(struct ti_clock_dev *clkdev, unsigned int *freq); static int am335x_clk_get_arm_disp_freq(struct ti_clock_dev *clkdev, unsigned int *freq); static void am335x_prcm_reset(void); static int am335x_clk_cpsw_activate(struct ti_clock_dev *clkdev); static int am335x_clk_musb0_activate(struct ti_clock_dev *clkdev); static int am335x_clk_lcdc_activate(struct ti_clock_dev *clkdev); static int am335x_clk_pruss_activate(struct ti_clock_dev *clkdev); #define AM335X_NOOP_CLOCK_DEV(i) \ { .id = (i), \ .clk_activate = am335x_clk_noop_activate, \ .clk_deactivate = am335x_clk_noop_deactivate, \ .clk_set_source = am335x_clk_noop_set_source, \ .clk_accessible = NULL, \ .clk_get_source_freq = NULL \ } #define AM335X_GENERIC_CLOCK_DEV(i) \ { .id = (i), \ .clk_activate = am335x_clk_generic_activate, \ .clk_deactivate = am335x_clk_generic_deactivate, \ .clk_set_source = am335x_clk_generic_set_source, \ .clk_accessible = NULL, \ .clk_get_source_freq = NULL \ } #define AM335X_GPIO_CLOCK_DEV(i) \ { .id = (i), \ .clk_activate = am335x_clk_gpio_activate, \ .clk_deactivate = am335x_clk_generic_deactivate, \ .clk_set_source = am335x_clk_generic_set_source, \ .clk_accessible = NULL, \ .clk_get_source_freq = NULL \ } #define AM335X_MMCHS_CLOCK_DEV(i) \ { .id = (i), \ .clk_activate = am335x_clk_generic_activate, \ .clk_deactivate = am335x_clk_generic_deactivate, \ .clk_set_source = am335x_clk_generic_set_source, \ .clk_accessible = NULL, \ .clk_get_source_freq = am335x_clk_hsmmc_get_source_freq \ } struct ti_clock_dev ti_am335x_clk_devmap[] = { /* System clocks */ { .id = SYS_CLK, .clk_activate = NULL, .clk_deactivate = NULL, .clk_set_source = NULL, .clk_accessible = NULL, .clk_get_source_freq = am335x_clk_get_sysclk_freq, }, /* MPU (ARM) core clocks */ { .id = MPU_CLK, .clk_activate = NULL, .clk_deactivate = NULL, .clk_set_source = NULL, .clk_accessible = NULL, .clk_get_source_freq = am335x_clk_get_arm_fclk_freq, }, /* CPSW Ethernet Switch core clocks */ { .id = CPSW_CLK, .clk_activate = am335x_clk_cpsw_activate, .clk_deactivate = NULL, .clk_set_source = NULL, .clk_accessible = NULL, .clk_get_source_freq = NULL, }, /* Mentor USB HS controller core clocks */ { .id = MUSB0_CLK, .clk_activate = am335x_clk_musb0_activate, .clk_deactivate = NULL, .clk_set_source = NULL, .clk_accessible = NULL, .clk_get_source_freq = NULL, }, /* LCD controller clocks */ { .id = LCDC_CLK, .clk_activate = am335x_clk_lcdc_activate, .clk_deactivate = NULL, .clk_set_source = NULL, .clk_accessible = NULL, .clk_get_source_freq = am335x_clk_get_arm_disp_freq, }, /* UART. Uart0 clock cannot be controlled. */ AM335X_NOOP_CLOCK_DEV(UART0_CLK), AM335X_GENERIC_CLOCK_DEV(UART1_CLK), AM335X_GENERIC_CLOCK_DEV(UART2_CLK), AM335X_GENERIC_CLOCK_DEV(UART3_CLK), AM335X_GENERIC_CLOCK_DEV(UART4_CLK), AM335X_GENERIC_CLOCK_DEV(UART5_CLK), /* DMTimer */ AM335X_GENERIC_CLOCK_DEV(DMTIMER2_CLK), AM335X_GENERIC_CLOCK_DEV(DMTIMER3_CLK), AM335X_GENERIC_CLOCK_DEV(DMTIMER4_CLK), AM335X_GENERIC_CLOCK_DEV(DMTIMER5_CLK), AM335X_GENERIC_CLOCK_DEV(DMTIMER6_CLK), AM335X_GENERIC_CLOCK_DEV(DMTIMER7_CLK), /* GPIO */ AM335X_GPIO_CLOCK_DEV(GPIO0_CLK), AM335X_GPIO_CLOCK_DEV(GPIO1_CLK), AM335X_GPIO_CLOCK_DEV(GPIO2_CLK), AM335X_GPIO_CLOCK_DEV(GPIO3_CLK), /* I2C */ AM335X_GENERIC_CLOCK_DEV(I2C0_CLK), AM335X_GENERIC_CLOCK_DEV(I2C1_CLK), AM335X_GENERIC_CLOCK_DEV(I2C2_CLK), /* TSC_ADC */ AM335X_GENERIC_CLOCK_DEV(TSC_ADC_CLK), /* EDMA */ AM335X_GENERIC_CLOCK_DEV(EDMA_TPCC_CLK), AM335X_GENERIC_CLOCK_DEV(EDMA_TPTC0_CLK), AM335X_GENERIC_CLOCK_DEV(EDMA_TPTC1_CLK), AM335X_GENERIC_CLOCK_DEV(EDMA_TPTC2_CLK), /* MMCHS */ AM335X_MMCHS_CLOCK_DEV(MMC0_CLK), AM335X_MMCHS_CLOCK_DEV(MMC1_CLK), AM335X_MMCHS_CLOCK_DEV(MMC2_CLK), /* PWMSS */ AM335X_GENERIC_CLOCK_DEV(PWMSS0_CLK), AM335X_GENERIC_CLOCK_DEV(PWMSS1_CLK), AM335X_GENERIC_CLOCK_DEV(PWMSS2_CLK), /* System Mailbox clock */ AM335X_GENERIC_CLOCK_DEV(MAILBOX0_CLK), /* SPINLOCK */ AM335X_GENERIC_CLOCK_DEV(SPINLOCK0_CLK), /* PRU-ICSS */ { .id = PRUSS_CLK, .clk_activate = am335x_clk_pruss_activate, .clk_deactivate = NULL, .clk_set_source = NULL, .clk_accessible = NULL, .clk_get_source_freq = NULL, }, + /* RTC */ + AM335X_GENERIC_CLOCK_DEV(RTC_CLK), - { INVALID_CLK_IDENT, NULL, NULL, NULL, NULL } }; struct am335x_clk_details { clk_ident_t id; uint32_t clkctrl_reg; uint32_t clksel_reg; }; #define _CLK_DETAIL(i, c, s) \ { .id = (i), \ .clkctrl_reg = (c), \ .clksel_reg = (s), \ } static struct am335x_clk_details g_am335x_clk_details[] = { /* UART. UART0 clock not controllable. */ _CLK_DETAIL(UART0_CLK, 0, 0), _CLK_DETAIL(UART1_CLK, CM_PER_UART1_CLKCTRL, 0), _CLK_DETAIL(UART2_CLK, CM_PER_UART2_CLKCTRL, 0), _CLK_DETAIL(UART3_CLK, CM_PER_UART3_CLKCTRL, 0), _CLK_DETAIL(UART4_CLK, CM_PER_UART4_CLKCTRL, 0), _CLK_DETAIL(UART5_CLK, CM_PER_UART5_CLKCTRL, 0), /* DMTimer modules */ _CLK_DETAIL(DMTIMER2_CLK, CM_PER_TIMER2_CLKCTRL, CLKSEL_TIMER2_CLK), _CLK_DETAIL(DMTIMER3_CLK, CM_PER_TIMER3_CLKCTRL, CLKSEL_TIMER3_CLK), _CLK_DETAIL(DMTIMER4_CLK, CM_PER_TIMER4_CLKCTRL, CLKSEL_TIMER4_CLK), _CLK_DETAIL(DMTIMER5_CLK, CM_PER_TIMER5_CLKCTRL, CLKSEL_TIMER5_CLK), _CLK_DETAIL(DMTIMER6_CLK, CM_PER_TIMER6_CLKCTRL, CLKSEL_TIMER6_CLK), _CLK_DETAIL(DMTIMER7_CLK, CM_PER_TIMER7_CLKCTRL, CLKSEL_TIMER7_CLK), /* GPIO modules */ _CLK_DETAIL(GPIO0_CLK, CM_WKUP_GPIO0_CLKCTRL, 0), _CLK_DETAIL(GPIO1_CLK, CM_PER_GPIO1_CLKCTRL, 0), _CLK_DETAIL(GPIO2_CLK, CM_PER_GPIO2_CLKCTRL, 0), _CLK_DETAIL(GPIO3_CLK, CM_PER_GPIO3_CLKCTRL, 0), /* I2C modules */ _CLK_DETAIL(I2C0_CLK, CM_WKUP_I2C0_CLKCTRL, 0), _CLK_DETAIL(I2C1_CLK, CM_PER_I2C1_CLKCTRL, 0), _CLK_DETAIL(I2C2_CLK, CM_PER_I2C2_CLKCTRL, 0), /* TSC_ADC module */ _CLK_DETAIL(TSC_ADC_CLK, CM_WKUP_ADC_TSC_CLKCTRL, 0), /* EDMA modules */ _CLK_DETAIL(EDMA_TPCC_CLK, CM_PER_TPCC_CLKCTRL, 0), _CLK_DETAIL(EDMA_TPTC0_CLK, CM_PER_TPTC0_CLKCTRL, 0), _CLK_DETAIL(EDMA_TPTC1_CLK, CM_PER_TPTC1_CLKCTRL, 0), _CLK_DETAIL(EDMA_TPTC2_CLK, CM_PER_TPTC2_CLKCTRL, 0), /* MMCHS modules*/ _CLK_DETAIL(MMC0_CLK, CM_PER_MMC0_CLKCTRL, 0), _CLK_DETAIL(MMC1_CLK, CM_PER_MMC1_CLKCTRL, 0), _CLK_DETAIL(MMC2_CLK, CM_PER_MMC1_CLKCTRL, 0), /* PWMSS modules */ _CLK_DETAIL(PWMSS0_CLK, CM_PER_EPWMSS0_CLKCTRL, 0), _CLK_DETAIL(PWMSS1_CLK, CM_PER_EPWMSS1_CLKCTRL, 0), _CLK_DETAIL(PWMSS2_CLK, CM_PER_EPWMSS2_CLKCTRL, 0), _CLK_DETAIL(MAILBOX0_CLK, CM_PER_MAILBOX0_CLKCTRL, 0), _CLK_DETAIL(SPINLOCK0_CLK, CM_PER_SPINLOCK0_CLKCTRL, 0), + + /* RTC module */ + _CLK_DETAIL(RTC_CLK, CM_RTC_RTC_CLKCTRL, 0), { INVALID_CLK_IDENT, 0}, }; /* Read/Write macros */ #define prcm_read_4(reg) \ bus_space_read_4(am335x_prcm_sc->bst, am335x_prcm_sc->bsh, reg) #define prcm_write_4(reg, val) \ bus_space_write_4(am335x_prcm_sc->bst, am335x_prcm_sc->bsh, reg, val) void am335x_prcm_setup_dmtimer(int); static int am335x_prcm_probe(device_t dev) { if (!ofw_bus_status_okay(dev)) return (ENXIO); if (ofw_bus_is_compatible(dev, "am335x,prcm")) { device_set_desc(dev, "AM335x Power and Clock Management"); return(BUS_PROBE_DEFAULT); } return (ENXIO); } static int am335x_prcm_attach(device_t dev) { struct am335x_prcm_softc *sc = device_get_softc(dev); unsigned int sysclk, fclk; if (am335x_prcm_sc) return (ENXIO); if (bus_alloc_resources(dev, am335x_prcm_spec, sc->res)) { device_printf(dev, "could not allocate resources\n"); return (ENXIO); } sc->bst = rman_get_bustag(sc->res[0]); sc->bsh = rman_get_bushandle(sc->res[0]); am335x_prcm_sc = sc; ti_cpu_reset = am335x_prcm_reset; am335x_clk_get_sysclk_freq(NULL, &sysclk); am335x_clk_get_arm_fclk_freq(NULL, &fclk); device_printf(dev, "Clocks: System %u.%01u MHz, CPU %u MHz\n", sysclk/1000000, (sysclk % 1000000)/100000, fclk/1000000); return (0); } static device_method_t am335x_prcm_methods[] = { DEVMETHOD(device_probe, am335x_prcm_probe), DEVMETHOD(device_attach, am335x_prcm_attach), { 0, 0 } }; static driver_t am335x_prcm_driver = { "am335x_prcm", am335x_prcm_methods, sizeof(struct am335x_prcm_softc), }; static devclass_t am335x_prcm_devclass; DRIVER_MODULE(am335x_prcm, simplebus, am335x_prcm_driver, am335x_prcm_devclass, 0, 0); MODULE_DEPEND(am335x_prcm, ti_scm, 1, 1, 1); static struct am335x_clk_details* am335x_clk_details(clk_ident_t id) { struct am335x_clk_details *walker; for (walker = g_am335x_clk_details; walker->id != INVALID_CLK_IDENT; walker++) { if (id == walker->id) return (walker); } return NULL; } static int am335x_clk_noop_activate(struct ti_clock_dev *clkdev) { return (0); } static int am335x_clk_generic_activate(struct ti_clock_dev *clkdev) { struct am335x_prcm_softc *sc = am335x_prcm_sc; struct am335x_clk_details* clk_details; if (sc == NULL) return ENXIO; clk_details = am335x_clk_details(clkdev->id); if (clk_details == NULL) return (ENXIO); /* set *_CLKCTRL register MODULEMODE[1:0] to enable(2) */ prcm_write_4(clk_details->clkctrl_reg, 2); while ((prcm_read_4(clk_details->clkctrl_reg) & 0x3) != 2) DELAY(10); return (0); } static int am335x_clk_gpio_activate(struct ti_clock_dev *clkdev) { struct am335x_prcm_softc *sc = am335x_prcm_sc; struct am335x_clk_details* clk_details; if (sc == NULL) return ENXIO; clk_details = am335x_clk_details(clkdev->id); if (clk_details == NULL) return (ENXIO); /* set *_CLKCTRL register MODULEMODE[1:0] to enable(2) */ /* set *_CLKCTRL register OPTFCLKEN_GPIO_1_G DBCLK[18] to FCLK_EN(1) */ prcm_write_4(clk_details->clkctrl_reg, 2 | (1 << 18)); while ((prcm_read_4(clk_details->clkctrl_reg) & (3 | (1 << 18) )) != (2 | (1 << 18))) DELAY(10); return (0); } static int am335x_clk_noop_deactivate(struct ti_clock_dev *clkdev) { return(0); } static int am335x_clk_generic_deactivate(struct ti_clock_dev *clkdev) { struct am335x_prcm_softc *sc = am335x_prcm_sc; struct am335x_clk_details* clk_details; if (sc == NULL) return ENXIO; clk_details = am335x_clk_details(clkdev->id); if (clk_details == NULL) return (ENXIO); /* set *_CLKCTRL register MODULEMODE[1:0] to disable(0) */ prcm_write_4(clk_details->clkctrl_reg, 0); while ((prcm_read_4(clk_details->clkctrl_reg) & 0x3) != 0) DELAY(10); return (0); } static int am335x_clk_noop_set_source(struct ti_clock_dev *clkdev, clk_src_t clksrc) { return (0); } static int am335x_clk_generic_set_source(struct ti_clock_dev *clkdev, clk_src_t clksrc) { struct am335x_prcm_softc *sc = am335x_prcm_sc; struct am335x_clk_details* clk_details; uint32_t reg; if (sc == NULL) return ENXIO; clk_details = am335x_clk_details(clkdev->id); if (clk_details == NULL) return (ENXIO); switch (clksrc) { case EXT_CLK: reg = 0; /* SEL2: TCLKIN clock */ break; case SYSCLK_CLK: reg = 1; /* SEL1: CLK_M_OSC clock */ break; case F32KHZ_CLK: reg = 2; /* SEL3: CLK_32KHZ clock */ break; default: return (ENXIO); } prcm_write_4(clk_details->clksel_reg, reg); while ((prcm_read_4(clk_details->clksel_reg) & 0x3) != reg) DELAY(10); return (0); } static int am335x_clk_hsmmc_get_source_freq(struct ti_clock_dev *clkdev, unsigned int *freq) { *freq = 96000000; return (0); } static int am335x_clk_get_sysclk_freq(struct ti_clock_dev *clkdev, unsigned int *freq) { uint32_t ctrl_status; /* Read the input clock freq from the control module */ /* control_status reg (0x40) */ if (ti_scm_reg_read_4(0x40, &ctrl_status)) return ENXIO; switch ((ctrl_status>>22) & 0x3) { case 0x0: /* 19.2Mhz */ *freq = 19200000; break; case 0x1: /* 24Mhz */ *freq = 24000000; break; case 0x2: /* 25Mhz */ *freq = 25000000; break; case 0x3: /* 26Mhz */ *freq = 26000000; break; } return (0); } #define DPLL_BYP_CLKSEL(reg) ((reg>>23) & 1) #define DPLL_DIV(reg) ((reg & 0x7f)+1) #define DPLL_MULT(reg) ((reg>>8) & 0x7FF) static int am335x_clk_get_arm_fclk_freq(struct ti_clock_dev *clkdev, unsigned int *freq) { uint32_t reg; uint32_t sysclk; reg = prcm_read_4(CM_WKUP_CM_CLKSEL_DPLL_MPU); /*Check if we are running in bypass */ if (DPLL_BYP_CLKSEL(reg)) return ENXIO; am335x_clk_get_sysclk_freq(NULL, &sysclk); *freq = DPLL_MULT(reg) * (sysclk / DPLL_DIV(reg)); return(0); } static int am335x_clk_get_arm_disp_freq(struct ti_clock_dev *clkdev, unsigned int *freq) { uint32_t reg; uint32_t sysclk; reg = prcm_read_4(CM_WKUP_CM_CLKSEL_DPLL_DISP); /*Check if we are running in bypass */ if (DPLL_BYP_CLKSEL(reg)) return ENXIO; am335x_clk_get_sysclk_freq(NULL, &sysclk); *freq = DPLL_MULT(reg) * (sysclk / DPLL_DIV(reg)); return(0); } static void am335x_prcm_reset(void) { prcm_write_4(PRM_RSTCTRL, (1<<1)); } static int am335x_clk_cpsw_activate(struct ti_clock_dev *clkdev) { struct am335x_prcm_softc *sc = am335x_prcm_sc; if (sc == NULL) return ENXIO; /* set MODULENAME to ENABLE */ prcm_write_4(CM_PER_CPGMAC0_CLKCTRL, 2); /* wait for IDLEST to become Func(0) */ while(prcm_read_4(CM_PER_CPGMAC0_CLKCTRL) & (3<<16)); /*set CLKTRCTRL to SW_WKUP(2) */ prcm_write_4(CM_PER_CPSW_CLKSTCTRL, 2); /* wait for 125 MHz OCP clock to become active */ while((prcm_read_4(CM_PER_CPSW_CLKSTCTRL) & (1<<4)) == 0); return(0); } static int am335x_clk_musb0_activate(struct ti_clock_dev *clkdev) { struct am335x_prcm_softc *sc = am335x_prcm_sc; if (sc == NULL) return ENXIO; /* set ST_DPLL_CLKDCOLDO(9) to CLK_GATED(1) */ /* set DPLL_CLKDCOLDO_GATE_CTRL(8) to CLK_ENABLE(1)*/ prcm_write_4(CM_WKUP_CM_CLKDCOLDO_DPLL_PER, 0x300); /*set MODULEMODE to ENABLE(2) */ prcm_write_4(CM_PER_USB0_CLKCTRL, 2); /* wait for MODULEMODE to become ENABLE(2) */ while ((prcm_read_4(CM_PER_USB0_CLKCTRL) & 0x3) != 2) DELAY(10); /* wait for IDLEST to become Func(0) */ while(prcm_read_4(CM_PER_USB0_CLKCTRL) & (3<<16)) DELAY(10); return(0); } static int am335x_clk_lcdc_activate(struct ti_clock_dev *clkdev) { struct am335x_prcm_softc *sc = am335x_prcm_sc; if (sc == NULL) return (ENXIO); /* Bypass mode */ prcm_write_4(CM_WKUP_CM_CLKMODE_DPLL_DISP, 0x4); /* Make sure it's in bypass mode */ while (!(prcm_read_4(CM_WKUP_CM_IDLEST_DPLL_DISP) & (1 << 8))) DELAY(10); /* * For now set frequency to 5xSYSFREQ * More flexible control might be required */ prcm_write_4(CM_WKUP_CM_CLKSEL_DPLL_DISP, (5 << 8) | 0); /* Locked mode */ prcm_write_4(CM_WKUP_CM_CLKMODE_DPLL_DISP, 0x7); int timeout = 10000; while ((!(prcm_read_4(CM_WKUP_CM_IDLEST_DPLL_DISP) & (1 << 0))) && timeout--) DELAY(10); /*set MODULEMODE to ENABLE(2) */ prcm_write_4(CM_PER_LCDC_CLKCTRL, 2); /* wait for MODULEMODE to become ENABLE(2) */ while ((prcm_read_4(CM_PER_LCDC_CLKCTRL) & 0x3) != 2) DELAY(10); /* wait for IDLEST to become Func(0) */ while(prcm_read_4(CM_PER_LCDC_CLKCTRL) & (3<<16)) DELAY(10); return (0); } static int am335x_clk_pruss_activate(struct ti_clock_dev *clkdev) { struct am335x_prcm_softc *sc = am335x_prcm_sc; if (sc == NULL) return (ENXIO); /* Set MODULEMODE to ENABLE(2) */ prcm_write_4(CM_PER_PRUSS_CLKCTRL, 2); /* Wait for MODULEMODE to become ENABLE(2) */ while ((prcm_read_4(CM_PER_PRUSS_CLKCTRL) & 0x3) != 2) DELAY(10); /* Set CLKTRCTRL to SW_WKUP(2) */ prcm_write_4(CM_PER_PRUSS_CLKSTCTRL, 2); /* Wait for the 200 MHz OCP clock to become active */ while ((prcm_read_4(CM_PER_PRUSS_CLKSTCTRL) & (1<<4)) == 0) DELAY(10); /* Wait for the 200 MHz IEP clock to become active */ while ((prcm_read_4(CM_PER_PRUSS_CLKSTCTRL) & (1<<5)) == 0) DELAY(10); /* Wait for the 192 MHz UART clock to become active */ while ((prcm_read_4(CM_PER_PRUSS_CLKSTCTRL) & (1<<6)) == 0) DELAY(10); /* Select DISP DPLL as OCP clock */ prcm_write_4(CLKSEL_PRUSS_OCP_CLK, 1); while ((prcm_read_4(CLKSEL_PRUSS_OCP_CLK) & 0x3) != 1) DELAY(10); /* Clear the RESET bit */ prcm_write_4(PRM_PER_RSTCTRL, prcm_read_4(PRM_PER_RSTCTRL) & ~2); return (0); } Index: head/sys/arm/ti/am335x/am335x_rtc.c =================================================================== --- head/sys/arm/ti/am335x/am335x_rtc.c (nonexistent) +++ head/sys/arm/ti/am335x/am335x_rtc.c (revision 277042) @@ -0,0 +1,211 @@ +/*- + * Copyright (c) 2015 Luiz Otavio O Souza + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include + +#define RTC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) +#define RTC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) +#define RTC_LOCK_INIT(_sc) mtx_init(&(_sc)->sc_mtx, \ + device_get_nameunit(_sc->sc_dev), "am335x_rtc", MTX_DEF) +#define RTC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx) + +#define RTC_READ4(_sc, reg) \ + bus_read_4((_sc)->sc_mem_res, reg) +#define RTC_WRITE4(_sc, reg, value) \ + bus_write_4((_sc)->sc_mem_res, reg, value) + +#define RTC_MAXIRQS 2 + +struct am335x_rtc_softc { + device_t sc_dev; + struct mtx sc_mtx; + struct resource *sc_irq_res[RTC_MAXIRQS]; + struct resource *sc_mem_res; +}; + +static struct am335x_rtc_softc *rtc_sc = NULL; +static struct resource_spec am335x_rtc_irq_spec[] = { + { SYS_RES_IRQ, 0, RF_ACTIVE }, + { SYS_RES_IRQ, 1, RF_ACTIVE }, + { -1, 0, 0 } +}; + +static int +am335x_rtc_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + if (!ofw_bus_is_compatible(dev, "ti,da830-rtc")) + return (ENXIO); + device_set_desc(dev, "AM335x RTC (power management mode)"); + + return (BUS_PROBE_DEFAULT); +} + +static int +am335x_rtc_attach(device_t dev) +{ + int rid; + struct am335x_rtc_softc *sc; + uint32_t rev; + + if (rtc_sc != NULL) + return (ENXIO); + rtc_sc = sc = device_get_softc(dev); + sc->sc_dev = dev; + rid = 0; + sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, + RF_ACTIVE); + if (!sc->sc_mem_res) { + device_printf(dev, "cannot allocate memory resources\n"); + return (ENXIO); + } + if (bus_alloc_resources(dev, am335x_rtc_irq_spec, sc->sc_irq_res) != 0) { + bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); + device_printf(dev, "cannot allocate irq resources\n"); + return (ENXIO); + } + RTC_LOCK_INIT(sc); + + /* Enable the RTC module. */ + ti_prcm_clk_enable(RTC_CLK); + rev = RTC_READ4(sc, RTC_REVISION); + device_printf(dev, "AM335X RTC v%d.%d.%d\n", + (rev >> 8) & 0x7, (rev >> 6) & 0x3, rev & 0x3f); + /* Unlock the RTC. */ + RTC_WRITE4(sc, RTC_KICK0R, RTC_KICK0R_PASS); + RTC_WRITE4(sc, RTC_KICK1R, RTC_KICK1R_PASS); + /* Stop the RTC, we don't need it right now. */ + RTC_WRITE4(sc, RTC_CTRL, 0); + /* Disable interrupts. */ + RTC_WRITE4(sc, RTC_INTR, 0); + /* Ack any pending interrupt. */ + RTC_WRITE4(sc, RTC_STATUS, RTC_STATUS_ALARM2 | RTC_STATUS_ALARM); + /* Enable external clock (xtal) and 32 kHz clock. */ + RTC_WRITE4(sc, RTC_OSC, RTC_OSC_32KCLK_EN | RTC_OSC_32KCLK_SEL); + /* Enable pmic_pwr_enable. */ + RTC_WRITE4(sc, RTC_PMIC, PMIC_PWR_ENABLE); + + return (0); +} + +static int +am335x_rtc_detach(device_t dev) +{ + struct am335x_rtc_softc *sc; + + sc = device_get_softc(dev); + if (sc->sc_irq_res) + bus_release_resources(dev, am335x_rtc_irq_spec, sc->sc_irq_res); + if (sc->sc_mem_res) + bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); + RTC_LOCK_DESTROY(sc); + + return (0); +} + +void +am335x_rtc_pmic_pwr_toggle(void) +{ + int timeout; + struct clocktime ct; + struct timespec ts; + + /* + * We stop the RTC so we don't need to check the STATUS.BUSY bit + * before update ALARM2 registers. + */ + timeout = 10; + RTC_WRITE4(rtc_sc, RTC_CTRL, 0); + while (--timeout && RTC_READ4(rtc_sc, RTC_STATUS) & RTC_STATUS_RUN) + DELAY(100); + if (timeout == 0) { + device_printf(rtc_sc->sc_dev, "RTC does not stop.\n"); + return; + } + /* Program the ALARM2 to fire in 2 seconds. */ + ct.dow = 0; + ct.nsec = 0; + ct.sec = FROMBCD(RTC_READ4(rtc_sc, RTC_SECONDS) & 0x7f); + ct.min = FROMBCD(RTC_READ4(rtc_sc, RTC_MINUTES) & 0x7f); + ct.hour = FROMBCD(RTC_READ4(rtc_sc, RTC_HOURS) & 0x3f); + ct.day = FROMBCD(RTC_READ4(rtc_sc, RTC_DAYS) & 0x3f); + ct.mon = FROMBCD(RTC_READ4(rtc_sc, RTC_MONTHS) & 0x1f); + ct.year = FROMBCD(RTC_READ4(rtc_sc, RTC_YEARS) & 0xff); + ct.year += POSIX_BASE_YEAR; + clock_ct_to_ts(&ct, &ts); + ts.tv_sec += 2; + clock_ts_to_ct(&ts, &ct); + RTC_WRITE4(rtc_sc, RTC_ALARM2_SECONDS, TOBCD(ct.sec)); + RTC_WRITE4(rtc_sc, RTC_ALARM2_MINUTES, TOBCD(ct.min)); + RTC_WRITE4(rtc_sc, RTC_ALARM2_HOURS, TOBCD(ct.hour)); + RTC_WRITE4(rtc_sc, RTC_ALARM2_DAYS, TOBCD(ct.day)); + RTC_WRITE4(rtc_sc, RTC_ALARM2_MONTHS, TOBCD(ct.mon)); + RTC_WRITE4(rtc_sc, RTC_ALARM2_YEARS, TOBCD(ct.year - POSIX_BASE_YEAR)); + /* Enable ALARM2 interrupt. */ + RTC_WRITE4(rtc_sc, RTC_INTR, RTC_INTR_ALARM2); + /* Start count. */ + RTC_WRITE4(rtc_sc, RTC_CTRL, RTC_CTRL_RUN); +} + +static device_method_t am335x_rtc_methods[] = { + DEVMETHOD(device_probe, am335x_rtc_probe), + DEVMETHOD(device_attach, am335x_rtc_attach), + DEVMETHOD(device_detach, am335x_rtc_detach), + + DEVMETHOD_END +}; + +static driver_t am335x_rtc_driver = { + "am335x_rtc", + am335x_rtc_methods, + sizeof(struct am335x_rtc_softc), +}; + +static devclass_t am335x_rtc_devclass; + +DRIVER_MODULE(am335x_rtc, simplebus, am335x_rtc_driver, am335x_rtc_devclass, 0, 0); +MODULE_VERSION(am335x_rtc, 1); +MODULE_DEPEND(am335x_rtc, simplebus, 1, 1, 1); Property changes on: head/sys/arm/ti/am335x/am335x_rtc.c ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/arm/ti/am335x/am335x_rtcreg.h =================================================================== --- head/sys/arm/ti/am335x/am335x_rtcreg.h (nonexistent) +++ head/sys/arm/ti/am335x/am335x_rtcreg.h (revision 277042) @@ -0,0 +1,76 @@ +/*- + * Copyright 2015 Luiz Otavio O Souza + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _AM335X_RTCREG_H_ +#define _AM335X_RTCREG_H_ + +#define RTC_SECONDS 0x00 +#define RTC_MINUTES 0x04 +#define RTC_HOURS 0x08 +#define RTC_DAYS 0x0c +#define RTC_MONTHS 0x10 +#define RTC_YEARS 0x14 +#define RTC_WEEK 0x18 +#define RTC_CTRL 0x40 +#define RTC_CTRL_DISABLE (1U << 6) +#define RTC_CTRL_RUN (1U << 0) +#define RTC_STATUS 0x44 +#define RTC_STATUS_ALARM2 (1U << 7) +#define RTC_STATUS_ALARM (1U << 6) +#define RTC_STATUS_1D_EVENT (1U << 5) +#define RTC_STATUS_1H_EVENT (1U << 4) +#define RTC_STATUS_1M_EVENT (1U << 3) +#define RTC_STATUS_1S_EVENT (1U << 2) +#define RTC_STATUS_RUN (1U << 1) +#define RTC_STATUS_BUSY (1U << 0) +#define RTC_INTR 0x48 +#define RTC_INTR_ALARM2 (1U << 4) +#define RTC_INTR_ALARM (1U << 3) +#define RTC_INTR_TIMER (1U << 2) +#define RTC_OSC 0x54 +#define RTC_OSC_32KCLK_EN (1U << 6) +#define RTC_OSC_OSC32K_GZ (1U << 4) +#define RTC_OSC_32KCLK_SEL (1U << 3) +#define RTC_OSC_RES_SELECT (1U << 2) +#define RTC_OSC_SW2 (1U << 1) +#define RTC_OSC_SW1 (1U << 0) +#define RTC_KICK0R 0x6c +#define RTC_KICK0R_PASS 0x83e70b13 +#define RTC_KICK1R 0x70 +#define RTC_KICK1R_PASS 0x95a4f1e0 +#define RTC_REVISION 0x74 +#define RTC_ALARM2_SECONDS 0x80 +#define RTC_ALARM2_MINUTES 0x84 +#define RTC_ALARM2_HOURS 0x88 +#define RTC_ALARM2_DAYS 0x8c +#define RTC_ALARM2_MONTHS 0x90 +#define RTC_ALARM2_YEARS 0x94 +#define RTC_PMIC 0x98 +#define PMIC_PWR_ENABLE (1U << 16) + +#endif /* _AM335X_RTCREG_H_ */ Property changes on: head/sys/arm/ti/am335x/am335x_rtcreg.h ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/arm/ti/am335x/am335x_rtcvar.h =================================================================== --- head/sys/arm/ti/am335x/am335x_rtcvar.h (nonexistent) +++ head/sys/arm/ti/am335x/am335x_rtcvar.h (revision 277042) @@ -0,0 +1,34 @@ +/*- + * Copyright 2015 Luiz Otavio O Souza + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _AM335X_RTCVAR_H_ +#define _AM335X_RTCVAR_H_ + +void am335x_rtc_pmic_pwr_toggle(void); + +#endif /* _AM335X_RTCVAR_H_ */ Property changes on: head/sys/arm/ti/am335x/am335x_rtcvar.h ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +FreeBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Index: head/sys/arm/ti/am335x/files.am335x =================================================================== --- head/sys/arm/ti/am335x/files.am335x (revision 277041) +++ head/sys/arm/ti/am335x/files.am335x (revision 277042) @@ -1,16 +1,17 @@ #$FreeBSD$ arm/ti/aintc.c standard arm/ti/am335x/am335x_dmtimer.c standard arm/ti/am335x/am335x_gpio.c optional gpio arm/ti/am335x/am335x_lcd.c optional sc arm/ti/am335x/am335x_lcd_syscons.c optional sc arm/ti/am335x/am335x_pmic.c optional am335x_pmic arm/ti/am335x/am335x_prcm.c standard arm/ti/am335x/am335x_pwm.c standard +arm/ti/am335x/am335x_rtc.c optional am335x_rtc arm/ti/am335x/am335x_scm_padconf.c standard arm/ti/am335x/am335x_usbss.c optional musb fdt arm/ti/ti_edma3.c standard arm/ti/cpsw/if_cpsw.c optional cpsw Index: head/sys/arm/ti/ti_prcm.h =================================================================== --- head/sys/arm/ti/ti_prcm.h (revision 277041) +++ head/sys/arm/ti/ti_prcm.h (revision 277042) @@ -1,208 +1,211 @@ /* * Copyright (c) 2010 * Ben Gray . * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Ben Gray. * 4. The name of the company nor the name of the author may be used to * endorse or promote products derived from this software without specific * prior written permission. * * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD$ */ /* * Texas Instruments - OMAP3xxx series processors * * Reference: * OMAP35x Applications Processor * Technical Reference Manual * (omap35xx_techref.pdf) */ #ifndef _TI_PRCM_H_ #define _TI_PRCM_H_ typedef enum { /* System clocks, typically you can only call ti_prcm_clk_get_source_freq() * on these clocks as they are enabled by default. */ SYS_CLK = 1, /* The MPU (ARM) core clock */ MPU_CLK = 20, /* MMC modules */ MMC0_CLK = 100, MMC1_CLK, MMC2_CLK, MMC3_CLK, MMC4_CLK, MMC5_CLK, /* I2C modules */ I2C0_CLK = 200, I2C1_CLK, I2C2_CLK, I2C3_CLK, I2C4_CLK, /* USB module(s) */ USBTLL_CLK = 300, USBHSHOST_CLK, USBFSHOST_CLK, USBP1_PHY_CLK, USBP2_PHY_CLK, USBP1_UTMI_CLK, USBP2_UTMI_CLK, USBP1_HSIC_CLK, USBP2_HSIC_CLK, /* UART modules */ UART0_CLK = 400, UART1_CLK, UART2_CLK, UART3_CLK, UART4_CLK, UART5_CLK, UART6_CLK, UART7_CLK, UART8_CLK, /* General purpose timer modules */ GPTIMER1_CLK = 500, GPTIMER2_CLK, GPTIMER3_CLK, GPTIMER4_CLK, GPTIMER5_CLK, GPTIMER6_CLK, GPTIMER7_CLK, GPTIMER8_CLK, GPTIMER9_CLK, GPTIMER10_CLK, GPTIMER11_CLK, GPTIMER12_CLK, /* McBSP module(s) */ MCBSP1_CLK = 600, MCBSP2_CLK, MCBSP3_CLK, MCBSP4_CLK, MCBSP5_CLK, /* General purpose I/O modules */ GPIO0_CLK = 700, GPIO1_CLK, GPIO2_CLK, GPIO3_CLK, GPIO4_CLK, GPIO5_CLK, GPIO6_CLK, /* sDMA module */ SDMA_CLK = 800, /* DMTimer modules */ DMTIMER0_CLK = 900, DMTIMER1_CLK, DMTIMER2_CLK, DMTIMER3_CLK, DMTIMER4_CLK, DMTIMER5_CLK, DMTIMER6_CLK, DMTIMER7_CLK, /* CPSW modules */ CPSW_CLK = 1000, /* Mentor USB modules */ MUSB0_CLK = 1100, /* EDMA module */ EDMA_TPCC_CLK = 1200, EDMA_TPTC0_CLK, EDMA_TPTC1_CLK, EDMA_TPTC2_CLK, /* LCD controller module */ LCDC_CLK = 1300, /* PWM modules */ PWMSS0_CLK = 1400, PWMSS1_CLK, PWMSS2_CLK, /* Mailbox modules */ MAILBOX0_CLK = 1500, /* Spinlock modules */ SPINLOCK0_CLK = 1600, PRUSS_CLK = 1700, TSC_ADC_CLK = 1800, + /* RTC module */ + RTC_CLK = 1900, + INVALID_CLK_IDENT } clk_ident_t; /* * */ typedef enum { SYSCLK_CLK, /* System clock */ EXT_CLK, F32KHZ_CLK, /* 32KHz clock */ F48MHZ_CLK, /* 48MHz clock */ F64MHZ_CLK, /* 64MHz clock */ F96MHZ_CLK, /* 96MHz clock */ } clk_src_t; struct ti_clock_dev { /* The profile of the timer */ clk_ident_t id; /* A bunch of callbacks associated with the clock device */ int (*clk_activate)(struct ti_clock_dev *clkdev); int (*clk_deactivate)(struct ti_clock_dev *clkdev); int (*clk_set_source)(struct ti_clock_dev *clkdev, clk_src_t clksrc); int (*clk_accessible)(struct ti_clock_dev *clkdev); int (*clk_get_source_freq)(struct ti_clock_dev *clkdev, unsigned int *freq); }; int ti_prcm_clk_valid(clk_ident_t clk); int ti_prcm_clk_enable(clk_ident_t clk); int ti_prcm_clk_disable(clk_ident_t clk); int ti_prcm_clk_accessible(clk_ident_t clk); int ti_prcm_clk_disable_autoidle(clk_ident_t clk); int ti_prcm_clk_set_source(clk_ident_t clk, clk_src_t clksrc); int ti_prcm_clk_get_source_freq(clk_ident_t clk, unsigned int *freq); void ti_prcm_reset(void); #endif /* _TI_PRCM_H_ */ Index: head/sys/boot/fdt/dts/arm/am335x.dtsi =================================================================== --- head/sys/boot/fdt/dts/arm/am335x.dtsi (revision 277041) +++ head/sys/boot/fdt/dts/arm/am335x.dtsi (revision 277042) @@ -1,337 +1,344 @@ /*- * Copyright (c) 2012 Damjan Marion * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ / { #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&AINTC>; SOC: am335x { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; ranges; bus-frequency = <0>; AINTC: interrupt-controller@48200000 { compatible = "ti,aintc"; interrupt-controller; #address-cells = <0>; #interrupt-cells = <1>; reg = < 0x48200000 0x1000 >; }; scm@44e10000 { compatible = "ti,scm"; reg = < 0x44e10000 0x2000 >; }; prcm@44E00000 { compatible = "am335x,prcm"; #address-cells = <1>; #size-cells = <1>; reg = < 0x44E00000 0x1300 >; }; dmtimers@44E05000 { compatible = "ti,am335x-dmtimer"; #address-cells = <1>; #size-cells = <1>; reg = < 0x44E05000 0x1000 0x44E31000 0x1000 0x48040000 0x1000 0x48042000 0x1000 0x48044000 0x1000 0x48046000 0x1000 0x48048000 0x1000 0x4804A000 0x1000 >; interrupts = < 66 67 68 69 92 93 94 95 >; interrupt-parent = <&AINTC>; }; + rtc: rtc@44E3E000 { + compatible = "ti,da830-rtc"; + reg = <0x44E3E000 0x1000>; + interrupts = < 75 76 >; + interrupt-parent = <&AINTC>; + }; + adc0: adc@44E0D000 { compatible = "ti,adc"; reg = <0x44E0D000 0x2000>; interrupts = < 16 >; interrupt-parent = <&AINTC>; }; wdt1@44E35000 { compatible = "ti,omap3-wdt"; reg = <0x44E35000 0x1000>; interrupts = <91>; interrupt-parent = <&AINTC>; }; GPIO: gpio { #gpio-cells = <3>; compatible = "ti,gpio"; gpio-controller; reg =< 0x44E07000 0x1000 0x4804C000 0x1000 0x481AC000 0x1000 0x481AE000 0x1000 >; interrupts = < 96 97 98 99 32 33 62 63 >; interrupt-parent = <&AINTC>; interrupt-controller; #interrupt-cells = <1>; }; uart0: serial@44E09000 { compatible = "ti,ns16550"; reg = <0x44E09000 0x1000>; reg-shift = <2>; interrupts = < 72 >; interrupt-parent = <&AINTC>; clock-frequency = < 48000000 >; uart-device-id = < 0 >; }; uart1: serial@48022000 { compatible = "ti,ns16550"; reg = <0x48022000 0x1000>; reg-shift = <2>; interrupts = < 73 >; interrupt-parent = <&AINTC>; clock-frequency = < 48000000 >; uart-device-id = < 1 >; status = "disabled"; }; uart2: serial@48024000 { compatible = "ti,ns16550"; reg = <0x48024000 0x1000>; reg-shift = <2>; interrupts = < 74 >; interrupt-parent = <&AINTC>; clock-frequency = < 48000000 >; uart-device-id = < 2 >; status = "disabled"; }; uart3: serial@481a6000 { compatible = "ti,ns16550"; reg = <0x481A6000 0x1000>; reg-shift = <2>; interrupts = < 44 >; interrupt-parent = <&AINTC>; clock-frequency = < 48000000 >; uart-device-id = < 3 >; status = "disabled"; }; uart4: serial@481a8000 { compatible = "ti,ns16550"; reg = <0x481A8000 0x1000>; reg-shift = <2>; interrupts = < 45 >; interrupt-parent = <&AINTC>; clock-frequency = < 48000000 >; uart-device-id = < 4 >; status = "disabled"; }; uart5: serial@481aa000 { compatible = "ti,ns16550"; reg = <0x481AA000 0x1000>; reg-shift = <2>; interrupts = < 46 >; interrupt-parent = <&AINTC>; clock-frequency = < 48000000 >; uart-device-id = < 5 >; status = "disabled"; }; edma3@49000000 { compatible = "ti,edma3"; reg =< 0x49000000 0x100000 /* Channel Controller Regs */ 0x49800000 0x100000 /* Transfer Controller 0 Regs */ 0x49900000 0x100000 /* Transfer Controller 1 Regs */ 0x49a00000 0x100000 >; /* Transfer Controller 2 Regs */ interrupts = <12 13 14>; interrupt-parent = <&AINTC>; }; mmchs0@48060000 { compatible = "ti,omap3-hsmmc", "ti,mmchs"; reg =<0x48060000 0x1000 >; interrupts = <64>; interrupt-parent = <&AINTC>; mmchs-device-id = <0>; mmchs-wp-gpio-pin = <0xffffffff>; ti,dual-volt; }; mmchs1@481D8000 { compatible = "ti,omap3-hsmmc", "ti,mmchs"; reg =<0x481D8000 0x1000 >; interrupts = <28>; interrupt-parent = <&AINTC>; mmchs-device-id = <1>; mmchs-wp-gpio-pin = <0xffffffff>; status = "disabled"; }; enet0: ethernet@4A100000 { #address-cells = <1>; #size-cells = <1>; compatible = "ti,cpsw"; reg = <0x4A100000 0x4000>; interrupts = <40 41 42 43>; interrupt-parent = <&AINTC>; phy-handle = <&phy0>; mdio@0 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,cpsw-mdio"; phy0: ethernet-phy@0 { reg = <0x0>; }; }; }; i2c0: i2c@44e0b000 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,i2c"; reg =< 0x44e0b000 0x1000 >; interrupts = <70>; interrupt-parent = <&AINTC>; i2c-device-id = <0>; }; i2c1: i2c@4802a000 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,i2c"; reg =< 0x4802a000 0x1000 >; interrupts = <71>; interrupt-parent = <&AINTC>; i2c-device-id = <1>; }; i2c2: i2c@4819c000 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,i2c"; reg =< 0x4819c000 0x1000 >; interrupts = <30>; interrupt-parent = <&AINTC>; i2c-device-id = <2>; }; pwm@48300000 { compatible = "ti,am335x-pwm"; #address-cells = <1>; #size-cells = <1>; reg = < 0x48300000 0x100 /* PWMSS0 */ 0x48300100 0x80 /* eCAP0 */ 0x48300180 0x80 /* eQEP0 */ 0x48300200 0x60 /* ePWM0 */ >; interrupts = <86 58>; /* ePWM0INT, ePWM0_TZINT */ interrupt-parent = <&AINTC>; pwm-device-id = <0>; }; pwm@48302000 { compatible = "ti,am335x-pwm"; #address-cells = <1>; #size-cells = <1>; reg = < 0x48302000 0x100 /* PWMSS1 */ 0x48302100 0x80 /* eCAP1 */ 0x48302180 0x80 /* eQEP1 */ 0x48302200 0x60 /* ePWM1 */ >; interrupts = <87 59>; /* ePWM1INT, ePWM1_TZINT */ interrupt-parent = <&AINTC>; pwm-device-id = <1>; }; pwm@48304000 { compatible = "ti,am335x-pwm"; #address-cells = <1>; #size-cells = <1>; reg = < 0x48304000 0x100 /* PWMSS2 */ 0x48304100 0x80 /* eCAP2 */ 0x48304180 0x80 /* eQEP2 */ 0x48304200 0x60 /* ePWM2 */ >; interrupts = <88 60>; /* ePWM2INT, ePWM2_TZINT */ interrupt-parent = <&AINTC>; pwm-device-id = <2>; }; lcd: lcd@4830e000 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,am335x-lcd"; reg =< 0x4830e000 0x1000 >; interrupts = <36>; interrupt-parent = <&AINTC>; }; usb@47400000 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,musb-am33xx"; reg =< 0x47400000 0x1000 /* USBSS */ 0x47401000 0x300 /* USB0 */ 0x47401300 0x100 /* USB0_PHY */ 0x47401400 0x400 /* USB0_CORE */ 0x47401800 0x300 /* USB1 */ 0x47401B00 0x100 /* USB1_PHY */ 0x47401C00 0x400 /* USB1_CORE */ >; interrupts = <17 18 19>; interrupt-parent = <&AINTC>; /* 1 - Host Mode, 0 - Device Mode */ modemask = <2>; }; mbox0@480C8000 { compatible = "am335x,system-mbox"; reg = < 0x480C8000 0x1000 >; interrupts = <77>; interrupt-parent = <&AINTC>; }; spinlock0@480CA000 { compatible = "am335x,spinlock"; reg = < 0x480CA000 0x1000 >; }; pruss@4A300000 { compatible = "ti,pruss-v2"; reg = <0x4A300000 0x80000>; interrupt-parent = <&AINTC>; interrupts = <20 21 22 23 24 25 26 27>; }; }; };